From 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Thu, 24 May 2018 01:37:55 -0700 Subject: [PATCH] systemc: Import tests from the Accellera systemc distribution. Change-Id: Iad76b398949a55d768a34d027a2d8e3739953da6 Reviewed-on: https://gem5-review.googlesource.com/10845 Reviewed-by: Giacomo Travaglini Maintainer: Gabe Black --- .../async_reset/async_reset.cpp | 661 + .../async_reset/golden/async_reset.log | 3 + .../async_reset_port/async_reset_port.cpp | 372 + .../golden/async_reset_port.log | 3 + .../child_proc_control/child_proc_control.cpp | 217 + .../golden/child_proc_control.log | 3 + .../disable_enable/disable_enable.cpp | 135 + .../disable_enable/golden/disable_enable.log | 5 + .../event_list/event_list.cpp | 318 + .../event_list/golden/event_list.log | 23 + .../golden/immed_self_notif.log | 7 + .../immed_self_notif/immed_self_notif.cpp | 216 + .../golden/include_descendants.log | 3 + .../include_descendants.cpp | 328 + .../kill_reset/golden/kill_reset.log | 17 + .../kill_reset/kill_reset.cpp | 270 + .../late_reset_bug/golden/late_reset_bug.log | 3 + .../late_reset_bug/late_reset_bug.cpp | 90 + .../golden/living_children.log | 3 + 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++ .../bits_to_bits/main.cpp | 78 + .../bits_to_bits/stimgen.cpp | 69 + .../bits_to_bits/stimgen.h | 77 + .../extension/common.h | 49 + .../extension/datawidth.cpp | 65 + .../extension/datawidth.h | 87 + .../extension/extension.f | 3 + .../extension/golden/extension.log | 4099 ++ .../extension/main.cpp | 79 + .../extension/stimgen.cpp | 69 + .../extension/stimgen.h | 77 + .../lost_carry/common.h | 46 + .../lost_carry/datawidth.cpp | 65 + .../lost_carry/datawidth.h | 87 + .../lost_carry/golden/lost_carry.log | 4099 ++ .../lost_carry/lost_carry.f | 3 + .../lost_carry/main.cpp | 78 + .../lost_carry/stimgen.cpp | 69 + .../lost_carry/stimgen.h | 77 + .../datawidth_bool_to_signed/promote/common.h | 51 + .../promote/datawidth.cpp | 65 + .../promote/datawidth.h | 87 + .../promote/golden/promote.log | 4099 ++ .../datawidth_bool_to_signed/promote/main.cpp | 78 + .../promote/promote.f | 3 + .../promote/stimgen.cpp | 69 + .../promote/stimgen.h | 77 + .../promote_extension/common.h | 51 + .../promote_extension/datawidth.cpp | 65 + .../promote_extension/datawidth.h | 87 + .../golden/promote_extension.log | 4099 ++ .../promote_extension/main.cpp | 77 + .../promote_extension/promote_extension.f | 3 + .../promote_extension/stimgen.cpp | 69 + .../promote_extension/stimgen.h | 77 + .../promote_lost_carry/common.h | 49 + .../promote_lost_carry/datawidth.cpp | 65 + .../promote_lost_carry/datawidth.h | 87 + .../golden/promote_lost_carry.log | 4099 ++ .../promote_lost_carry/main.cpp | 77 + .../promote_lost_carry/promote_lost_carry.f | 3 + .../promote_lost_carry/stimgen.cpp | 69 + .../promote_lost_carry/stimgen.h | 77 + .../promote_truncation/common.h | 49 + .../promote_truncation/datawidth.cpp | 65 + .../promote_truncation/datawidth.h | 87 + .../golden/promote_truncation.log | 4099 ++ .../promote_truncation/main.cpp | 77 + .../promote_truncation/promote_truncation.f | 3 + .../promote_truncation/stimgen.cpp | 69 + .../promote_truncation/stimgen.h | 77 + .../truncation/common.h | 49 + .../truncation/datawidth.cpp | 65 + .../truncation/datawidth.h | 87 + .../truncation/golden/truncation.log | 4099 ++ .../truncation/main.cpp | 77 + .../truncation/stimgen.cpp | 69 + .../truncation/stimgen.h | 77 + .../truncation/truncation.f | 3 + .../data/datawidth_bool_to_unsigned/README | 9 + .../bits_to_bits/bits_to_bits.f | 3 + .../bits_to_bits/common.h | 49 + .../bits_to_bits/datawidth.cpp | 65 + .../bits_to_bits/datawidth.h | 87 + .../bits_to_bits/golden/bits_to_bits.log | 4099 ++ .../bits_to_bits/main.cpp | 77 + .../bits_to_bits/stimgen.cpp | 69 + .../bits_to_bits/stimgen.h | 77 + .../extension/common.h | 49 + .../extension/datawidth.cpp | 65 + .../extension/datawidth.h | 87 + .../extension/extension.f | 3 + .../extension/golden/extension.log | 4099 ++ .../extension/main.cpp | 77 + .../extension/stimgen.cpp | 69 + .../extension/stimgen.h | 77 + .../lost_carry/common.h | 47 + .../lost_carry/datawidth.cpp | 65 + .../lost_carry/datawidth.h | 87 + .../lost_carry/golden/lost_carry.log | 4099 ++ .../lost_carry/lost_carry.f | 3 + .../lost_carry/main.cpp | 77 + .../lost_carry/stimgen.cpp | 69 + .../lost_carry/stimgen.h | 77 + .../promote/common.h | 51 + .../promote/datawidth.cpp | 65 + .../promote/datawidth.h | 87 + .../promote/golden/promote.log | 4099 ++ .../promote/main.cpp | 77 + .../promote/promote.f | 3 + .../promote/stimgen.cpp | 69 + .../promote/stimgen.h | 77 + .../promote_extension/common.h | 51 + .../promote_extension/datawidth.cpp | 65 + .../promote_extension/datawidth.h | 87 + .../golden/promote_extension.log | 4099 ++ .../promote_extension/main.cpp | 77 + .../promote_extension/promote_extension.f | 3 + .../promote_extension/stimgen.cpp | 69 + .../promote_extension/stimgen.h | 77 + .../promote_lost_carry/common.h | 49 + .../promote_lost_carry/datawidth.cpp | 65 + .../promote_lost_carry/datawidth.h | 87 + .../golden/promote_lost_carry.log | 4099 ++ .../promote_lost_carry/main.cpp | 77 + .../promote_lost_carry/promote_lost_carry.f | 3 + .../promote_lost_carry/stimgen.cpp | 69 + .../promote_lost_carry/stimgen.h | 77 + .../promote_truncation/common.h | 49 + .../promote_truncation/datawidth.cpp | 65 + .../promote_truncation/datawidth.h | 87 + .../golden/promote_truncation.log | 4099 ++ .../promote_truncation/main.cpp | 77 + .../promote_truncation/promote_truncation.f | 3 + .../promote_truncation/stimgen.cpp | 69 + .../promote_truncation/stimgen.h | 77 + .../truncation/common.h | 49 + .../truncation/datawidth.cpp | 65 + .../truncation/datawidth.h | 87 + .../truncation/golden/truncation.log | 4099 ++ .../truncation/main.cpp | 77 + .../truncation/stimgen.cpp | 69 + .../truncation/stimgen.h | 77 + .../truncation/truncation.f | 3 + .../misc/unit/data/datawidth_signed/README | 9 + .../bits_to_bits/bits_to_bits.f | 3 + .../datawidth_signed/bits_to_bits/common.h | 46 + .../bits_to_bits/datawidth.cpp | 65 + .../datawidth_signed/bits_to_bits/datawidth.h | 87 + .../bits_to_bits/golden/bits_to_bits.log | 4099 ++ .../datawidth_signed/bits_to_bits/main.cpp | 77 + .../datawidth_signed/bits_to_bits/stimgen.cpp | 69 + .../datawidth_signed/bits_to_bits/stimgen.h | 77 + .../data/datawidth_signed/extension/common.h | 46 + .../datawidth_signed/extension/datawidth.cpp | 65 + .../datawidth_signed/extension/datawidth.h | 87 + .../datawidth_signed/extension/extension.f | 3 + .../extension/golden/extension.log | 4099 ++ .../data/datawidth_signed/extension/main.cpp | 77 + .../datawidth_signed/extension/stimgen.cpp | 69 + .../data/datawidth_signed/extension/stimgen.h | 77 + .../data/datawidth_signed/lost_carry/common.h | 45 + .../datawidth_signed/lost_carry/datawidth.cpp | 65 + .../datawidth_signed/lost_carry/datawidth.h | 87 + .../lost_carry/golden/lost_carry.log | 4099 ++ .../datawidth_signed/lost_carry/lost_carry.f | 3 + .../data/datawidth_signed/lost_carry/main.cpp | 78 + .../datawidth_signed/lost_carry/stimgen.cpp | 69 + .../datawidth_signed/lost_carry/stimgen.h | 77 + .../data/datawidth_signed/promote/common.h | 47 + .../datawidth_signed/promote/datawidth.cpp | 65 + .../data/datawidth_signed/promote/datawidth.h | 87 + .../promote/golden/promote.log | 4099 ++ .../data/datawidth_signed/promote/main.cpp | 77 + .../data/datawidth_signed/promote/promote.f | 3 + .../data/datawidth_signed/promote/stimgen.cpp | 69 + .../data/datawidth_signed/promote/stimgen.h | 77 + .../promote_extension/common.h | 47 + .../promote_extension/datawidth.cpp | 65 + .../promote_extension/datawidth.h | 87 + .../golden/promote_extension.log | 4099 ++ .../promote_extension/main.cpp | 77 + .../promote_extension/promote_extension.f | 3 + .../promote_extension/stimgen.cpp | 69 + .../promote_extension/stimgen.h | 77 + .../promote_lost_carry/common.h | 46 + .../promote_lost_carry/datawidth.cpp | 65 + .../promote_lost_carry/datawidth.h | 87 + .../golden/promote_lost_carry.log | 4099 ++ .../promote_lost_carry/main.cpp | 77 + .../promote_lost_carry/promote_lost_carry.f | 3 + .../promote_lost_carry/stimgen.cpp | 69 + .../promote_lost_carry/stimgen.h | 77 + .../promote_truncation/common.h | 46 + .../promote_truncation/datawidth.cpp | 65 + .../promote_truncation/datawidth.h | 87 + .../golden/promote_truncation.log | 4099 ++ .../promote_truncation/main.cpp | 78 + .../promote_truncation/promote_truncation.f | 3 + .../promote_truncation/stimgen.cpp | 69 + .../promote_truncation/stimgen.h | 77 + .../data/datawidth_signed/truncation/common.h | 46 + .../datawidth_signed/truncation/datawidth.cpp | 65 + .../datawidth_signed/truncation/datawidth.h | 87 + .../truncation/golden/truncation.log | 4099 ++ .../data/datawidth_signed/truncation/main.cpp | 78 + .../datawidth_signed/truncation/stimgen.cpp | 69 + .../datawidth_signed/truncation/stimgen.h | 77 + .../datawidth_signed/truncation/truncation.f | 3 + .../misc/unit/data/datawidth_unsigned/README | 9 + .../bits_to_bits/bits_to_bits.f | 3 + .../datawidth_unsigned/bits_to_bits/common.h | 46 + .../bits_to_bits/datawidth.cpp | 65 + .../bits_to_bits/datawidth.h | 87 + .../bits_to_bits/golden/bits_to_bits.log | 4099 ++ .../datawidth_unsigned/bits_to_bits/main.cpp | 78 + .../bits_to_bits/stimgen.cpp | 69 + .../datawidth_unsigned/bits_to_bits/stimgen.h | 77 + .../datawidth_unsigned/extension/common.h | 46 + .../extension/datawidth.cpp | 65 + .../datawidth_unsigned/extension/datawidth.h | 87 + .../datawidth_unsigned/extension/extension.f | 3 + .../extension/golden/extension.log | 4099 ++ .../datawidth_unsigned/extension/main.cpp | 78 + .../datawidth_unsigned/extension/stimgen.cpp | 69 + .../datawidth_unsigned/extension/stimgen.h | 77 + .../datawidth_unsigned/lost_carry/common.h | 45 + .../lost_carry/datawidth.cpp | 65 + .../datawidth_unsigned/lost_carry/datawidth.h | 87 + .../lost_carry/golden/lost_carry.log | 4099 ++ .../lost_carry/lost_carry.f | 3 + .../datawidth_unsigned/lost_carry/main.cpp | 78 + .../datawidth_unsigned/lost_carry/stimgen.cpp | 69 + .../datawidth_unsigned/lost_carry/stimgen.h | 77 + .../data/datawidth_unsigned/promote/common.h | 47 + .../datawidth_unsigned/promote/datawidth.cpp | 65 + .../datawidth_unsigned/promote/datawidth.h | 87 + .../promote/golden/promote.log | 4099 ++ .../data/datawidth_unsigned/promote/main.cpp | 78 + .../data/datawidth_unsigned/promote/promote.f | 3 + .../datawidth_unsigned/promote/stimgen.cpp | 69 + .../data/datawidth_unsigned/promote/stimgen.h | 77 + .../promote_extension/common.h | 47 + .../promote_extension/datawidth.cpp | 65 + .../promote_extension/datawidth.h | 87 + .../golden/promote_extension.log | 4099 ++ .../promote_extension/main.cpp | 78 + .../promote_extension/promote_extension.f | 3 + .../promote_extension/stimgen.cpp | 69 + .../promote_extension/stimgen.h | 77 + .../promote_lost_carry/common.h | 46 + .../promote_lost_carry/datawidth.cpp | 65 + .../promote_lost_carry/datawidth.h | 87 + .../golden/promote_lost_carry.log | 4099 ++ .../promote_lost_carry/main.cpp | 78 + .../promote_lost_carry/promote_lost_carry.f | 3 + .../promote_lost_carry/stimgen.cpp | 69 + .../promote_lost_carry/stimgen.h | 77 + .../promote_truncation/common.h | 46 + .../promote_truncation/datawidth.cpp | 65 + .../promote_truncation/datawidth.h | 87 + .../golden/promote_truncation.log | 4099 ++ .../promote_truncation/main.cpp | 77 + .../promote_truncation/promote_truncation.f | 3 + .../promote_truncation/stimgen.cpp | 69 + .../promote_truncation/stimgen.h | 77 + .../datawidth_unsigned/truncation/common.h | 46 + .../truncation/datawidth.cpp | 65 + .../datawidth_unsigned/truncation/datawidth.h | 87 + .../truncation/golden/truncation.log | 4099 ++ .../datawidth_unsigned/truncation/main.cpp | 77 + .../datawidth_unsigned/truncation/stimgen.cpp | 69 + .../datawidth_unsigned/truncation/stimgen.h | 77 + .../truncation/truncation.f | 3 + .../data/general/add_promote/add_promote.f | 3 + .../unit/data/general/add_promote/common.h | 48 + .../data/general/add_promote/datawidth.cpp | 67 + .../unit/data/general/add_promote/datawidth.h | 77 + .../add_promote/golden/add_promote.log | 4099 ++ .../unit/data/general/add_promote/main.cpp | 79 + .../unit/data/general/add_promote/stimgen.cpp | 68 + .../unit/data/general/add_promote/stimgen.h | 77 + .../data/general/array_range/array_range.cpp | 77 + .../data/general/array_range/array_range.f | 3 + .../data/general/array_range/array_range.h | 83 + .../unit/data/general/array_range/common.h | 49 + .../array_range/golden/array_range.log | 8 + .../unit/data/general/array_range/main.cpp | 67 + .../unit/data/general/array_range/stimgen.cpp | 61 + .../unit/data/general/array_range/stimgen.h | 83 + .../data/general/bool_tilda/bool_tilda.cpp | 63 + .../general/bool_tilda/golden/bool_tilda.log | 6 + .../unit/data/general/concat_port/common.h | 48 + .../data/general/concat_port/concat_port.cpp | 85 + .../data/general/concat_port/concat_port.f | 3 + .../data/general/concat_port/concat_port.h | 86 + .../concat_port/golden/concat_port.log | 11 + .../unit/data/general/concat_port/main.cpp | 68 + .../unit/data/general/concat_port/stimgen.cpp | 66 + .../unit/data/general/concat_port/stimgen.h | 86 + .../data/general/datawidth_int/datawidth.cpp | 65 + .../data/general/datawidth_int/datawidth.h | 77 + .../general/datawidth_int/datawidth_int.f | 3 + .../datawidth_int/golden/datawidth_int.log | 4099 ++ .../unit/data/general/datawidth_int/main.cpp | 71 + .../data/general/datawidth_int/stimgen.cpp | 68 + .../unit/data/general/datawidth_int/stimgen.h | 77 + .../unit/data/general/int_to_bits/common.h | 46 + .../data/general/int_to_bits/datawidth.cpp | 65 + .../unit/data/general/int_to_bits/datawidth.h | 77 + .../int_to_bits/golden/int_to_bits.log | 4099 ++ .../data/general/int_to_bits/int_to_bits.f | 3 + .../unit/data/general/int_to_bits/main.cpp | 72 + .../unit/data/general/int_to_bits/stimgen.cpp | 68 + .../unit/data/general/int_to_bits/stimgen.h | 77 + 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| 223 + .../general/subvector/test1/golden/test1.log | 63 + .../data/general/subvector/test1/test1.cpp | 147 + .../ch9/c_array_datatype/c_array_datatype.cpp | 110 + .../golden/c_array_datatype.log | 17 + .../ch9/int_datatype/golden/int_datatype.log | 46 + .../ch9/int_datatype/int_datatype.cpp | 217 + .../std_ulogic_datatype/golden/std_ulogic_da | 106 + .../golden/std_ulogic_datatype.log | 106 + .../std_ulogic_datatype.cpp | 542 + .../std_ulogic_vector_datatype/golden/std_ul | 203 + .../golden/std_ulogic_vector_datatype.log | 203 + .../std_ulogic_vector_datatype.log.bsd64 | 203 + .../std_ulogic_vector_datatype.log.cygwin64 | 203 + .../std_ulogic_vector_datatype.log.linux64 | 203 + ...td_ulogic_vector_datatype.log.linuxaarch64 | 203 + .../std_ulogic_vector_datatype.log.macosx64 | 203 + .../std_ulogic_vector_datatype.cpp | 772 + .../tests/systemc/misc/unit/extern/COMPILE | 0 .../tests/systemc/misc/unit/extern/extern.cpp | 59 + .../tests/systemc/misc/unit/extern/extern.h | 38 + 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(Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// async_reset.cpp +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: async_reset.cpp,v $ +// Revision 1.3 2011/05/08 19:18:45 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// async_reset_signal_is + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + : count(0) + { + clk_port.bind(clk); + + SC_THREAD(ctrl); + + SC_CTHREAD(CT, clk_port.value_changed()); + async_reset_signal_is(areset, true); + ct = sc_get_current_process_handle(); + + sc_spawn_options opt; + opt.async_reset_signal_is(areset, true); + t = sc_spawn(sc_bind(&Top::T, this), "T", &opt); + + opt.spawn_method(); + opt.dont_initialize(); + opt.set_sensitivity( &clk ); + m = sc_spawn(sc_bind(&Top::M, this), "M", &opt); + + SC_CTHREAD(CT2, clk_port.pos()) + async_reset_signal_is(areset1, true); + async_reset_signal_is(areset2, true); + async_reset_signal_is(areset3, true); + reset_signal_is(sreset1, true); + reset_signal_is(sreset2, true); + reset_signal_is(sreset3, true); + ct2 = sc_get_current_process_handle(); + ct2.disable(); + + SC_THREAD(T2) + sensitive << clk_port.pos(); + async_reset_signal_is(areset1, true); + async_reset_signal_is(areset2, true); + async_reset_signal_is(areset3, true); + reset_signal_is(sreset1, true); + reset_signal_is(sreset2, true); + reset_signal_is(sreset3, true); + t2 = sc_get_current_process_handle(); + t2.disable(); + + clk.write(false); + areset.write(false); + + f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + f10 = f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = f23 = f24 = f25 = f26 = f27 = f28 = f29 = 0; + f30 = f31 = f32 = f33 = f34 = f35 = f36 = f37 = f38 = f39 = 0; + f40 = f41 = f42 = f43 = f44 = f45 = f46 = f47 = f48 = f49 = 0; + f50 = f51 = f52 = f53 = f54 = f55 = f56 = f57 = f58 = f59 = 0; + f60 = f61 = f62 = f63 = f64 = f65 = f66 = f67 = f68 = f69 = 0; + f70 = f71 = f72 = f73 = f74 = f75 = f76 = f77 = f78 = f79 = 0; + f80 = f81 = f82 = f83 = f84 = f85 = f86 = f87 = f88 = f89 = 0; + } + + sc_signal clk; + sc_in clk_port; + sc_signal areset; + sc_signal areset1, areset2, areset3, sreset1, sreset2, sreset3; + + sc_process_handle ct, t, m, ct2, t2; + int count; + + int f1, f2, f3, f4, f5, f6, f7, f8, f9; + int f10, f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22, f23, f24, f25, f26, f27, f28, f29; + int f30, f31, f32, f33, f34, f35, f36, f37, f38, f39; + int f40, f41, f42, f43, f44, f45, f46, f47, f48, f49; + int f50, f51, f52, f53, f54, f55, f56, f57, f58, f59; + int f60, f61, f62, f63, f64, f65, f66, f67, f68, f69; + int f70, f71, f72, f73, f74, f75, f76, f77, f78, f79; + int f80, f81, f82, f83, f84, f85, f86, f87, f88, f89; + + void ctrl() + { + sc_assert( sc_delta_count() == 0 ); + clock(); + wait(SC_ZERO_TIME); + wait(SC_ZERO_TIME); + + count = 1; + clock(); + wait(1, SC_NS); + + count = 2; + clock(); + wait(10, SC_NS); + + count = 3; + clock(); + wait(sc_time(20, SC_NS) - sc_time_stamp()); + + count = 4; + areset.write(true); + wait(1, SC_NS); + + count = 5; + areset.write(false); + wait(1, SC_NS); + + count = 6; + clock(); + wait(sc_time(30, SC_NS) - sc_time_stamp()); + + count = 7; + areset.write(true); + wait(1, SC_NS); + + count = 8; + clock(); // Clocked while asynch reset is active + wait(1, SC_NS); + + count = 9; + clock(); + wait(1, SC_NS); + + count = 10; + areset.write(false); + wait(1, SC_NS); + + count = 11; + areset.write(true); + wait(1, SC_NS); + + count = 12; + areset.write(false); + wait(sc_time(40, SC_NS) - sc_time_stamp()); + + count = 13; + sync_reset_on(); + wait(1, SC_NS); + + count = 14; + clock(); + wait(1, SC_NS); + + count = 15; + sync_reset_off(); + wait(sc_time(50, SC_NS) - sc_time_stamp()); + + count = 16; + disable(); + wait(1, SC_NS); + + count = 17; + clock(); + wait(1, SC_NS); + + count = 18; + sync_reset_on(); + clock(); + wait(1, SC_NS); + + count = 19; + enable(); + clock(); + wait(1, SC_NS); + + count = 20; + sync_reset_off(); + clock(); + wait(sc_time(60, SC_NS) - sc_time_stamp()); + + count = 21; + disable(); + wait(1, SC_NS); + + count = 22; + areset.write(true); + wait(1, SC_NS); + + count = 23; + clock(); + wait(1, SC_NS); + + count = 24; + areset.write(false); + wait(1, SC_NS); + + count = 25; + clock(); + wait(1, SC_NS); + + count = 26; + areset.write(true); + wait(1, SC_NS); + + count = 27; + enable(); + wait(1, SC_NS); + + count = 28; + clock(); + wait(1, SC_NS); + + count = 29; + areset.write(false); + wait(sc_time(100, SC_NS) - sc_time_stamp()); + + count = 30; + ct.disable(); + t.disable(); + m.disable(); + + // Test multiple resets + ct2.enable(); + t2.enable(); + clock2(); + + count = 31; + clock2(); + + count = 32; + sreset1.write(1); + clock2(); + + count = 33; + sreset2.write(1); + sreset3.write(1); + clock2(); + + count = 34; + sreset1.write(0); + sreset2.write(0); + clock2(); + + count = 35; + sreset3.write(0); + clock2(); + + count = 36; + areset1.write(1); + areset2.write(1); + areset3.write(1); + wait(SC_ZERO_TIME); + + count = 37; + clock2(); + + count = 38; + sreset1.write(1); + sreset2.write(1); + sreset3.write(1); + ct2.sync_reset_on(); + t2.sync_reset_on(); + clock2(); + + count = 39; + areset1.write(0); + areset2.write(0); + areset3.write(0); + sreset1.write(0); + sreset2.write(0); + sreset3.write(0); + clock2(); + + count = 40; + ct2.sync_reset_off(); + t2.sync_reset_off(); + clock2(); + + count = 41; + sreset2.write(1); + ct2.sync_reset_on(); + t2.sync_reset_on(); + clock2(); + + count = 42; + areset2.write(1); + wait(SC_ZERO_TIME); + + count = 43; + clock2(); + + count = 44; + sreset2.write(0); + ct2.sync_reset_off(); + t2.sync_reset_off(); + clock2(); + + count = 45; + areset1.write(0); + areset2.write(0); + areset3.write(0); + sreset1.write(0); + sreset2.write(0); + sreset3.write(0); + clock2(); + + count = 46; + ct2.reset(); + t2.reset(); + wait(SC_ZERO_TIME); + + count = 47; + clock2(); + } + + void CT() + { + //cout << "CT() called at " << sc_time_stamp() << endl; + switch (count) + { + case 0: sc_assert( sc_delta_count() == 1 ); f1=1; break; + case 4: sc_assert( sc_time_stamp() == sc_time(20, SC_NS) ); f2=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(30, SC_NS) ); f3=1; break; + case 8: sc_assert( sc_time_stamp() == sc_time(31, SC_NS) ); f4=1; break; + case 9: sc_assert( sc_time_stamp() == sc_time(32, SC_NS) ); f5=1; break; + case 11: sc_assert( sc_time_stamp() == sc_time(34, SC_NS) ); f6=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(41, SC_NS) ); f7=1; break; + case 19: sc_assert( sc_time_stamp() == sc_time(53, SC_NS) ); f8=1; break; + case 22: sc_assert( sc_time_stamp() == sc_time(61, SC_NS) ); f9=1; break; + case 26: sc_assert( sc_time_stamp() == sc_time(65, SC_NS) ); f11=1; break; + case 28: sc_assert( sc_time_stamp() == sc_time(67, SC_NS) ); f12=1; break; + default: sc_assert( false ); break; + } + while (true) + { + wait(); + //cout << "CT() awoke at " << sc_time_stamp() << endl; + + switch (count) + { + case 1: sc_assert( sc_delta_count() == 3 ); f13=1; break; + case 2: sc_assert( sc_time_stamp() == sc_time(1, SC_NS) ); f14=1; break; + case 3: sc_assert( sc_time_stamp() == sc_time(11, SC_NS) ); f15=1; break; + case 6: sc_assert( sc_time_stamp() == sc_time(22, SC_NS) ); f16=1; break; + case 20: sc_assert( sc_time_stamp() == sc_time(54, SC_NS) ); f17=1; break; + default: sc_assert( false ); break; + } + + } + } + + void T() + { + //cout << "T() called at " << sc_time_stamp() << endl; + switch (count) + { + case 0: sc_assert( sc_delta_count() == 0 ); f18=1; break; + case 4: sc_assert( sc_time_stamp() == sc_time(20, SC_NS) ); f19=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(30, SC_NS) ); f20=1; break; + case 8: sc_assert( sc_time_stamp() == sc_time(31, SC_NS) ); f21=1; break; + case 9: sc_assert( sc_time_stamp() == sc_time(32, SC_NS) ); f22=1; break; + case 11: sc_assert( sc_time_stamp() == sc_time(34, SC_NS) ); f23=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(41, SC_NS) ); f24=1; break; + case 19: sc_assert( sc_time_stamp() == sc_time(53, SC_NS) ); f25=1; break; + case 22: sc_assert( sc_time_stamp() == sc_time(61, SC_NS) ); f26=1; break; + case 26: sc_assert( sc_time_stamp() == sc_time(65, SC_NS) ); f28=1; break; + case 28: sc_assert( sc_time_stamp() == sc_time(67, SC_NS) ); f29=1; break; + default: sc_assert( false ); break; + } + while (true) + { + wait(clk.default_event()); + //cout << "T() awoke at " << sc_time_stamp() << endl; + + switch (count) + { + case 0: sc_assert( sc_delta_count() == 1 ); f30=1; break; + case 1: sc_assert( sc_delta_count() == 3 ); f31=1; break; + case 2: sc_assert( sc_time_stamp() == sc_time(1, SC_NS) ); f32=1; break; + case 3: sc_assert( sc_time_stamp() == sc_time(11, SC_NS) ); f33=1; break; + case 6: sc_assert( sc_time_stamp() == sc_time(22, SC_NS) ); f34=1; break; + case 20: sc_assert( sc_time_stamp() == sc_time(54, SC_NS) ); f35=1; break; + default: sc_assert( false ); break; + } + + } + } + + void M() + { + //cout << "M() called at " << sc_time_stamp() << endl; + switch (count) + { + case 0: sc_assert( sc_delta_count() == 1 ); f36=1; break; + case 1: sc_assert( sc_delta_count() == 3 ); f37=1; break; + case 2: sc_assert( sc_time_stamp() == sc_time(1, SC_NS) ); f38=1; break; + case 3: sc_assert( sc_time_stamp() == sc_time(11, SC_NS) ); f39=1; break; + case 4: sc_assert( sc_time_stamp() == sc_time(20, SC_NS) ); f83=1; break; + case 6: sc_assert( sc_time_stamp() == sc_time(22, SC_NS) ); f40=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(30, SC_NS) ); f84=1; break; + case 8: sc_assert( sc_time_stamp() == sc_time(31, SC_NS) ); f41=1; break; + case 9: sc_assert( sc_time_stamp() == sc_time(32, SC_NS) ); f42=1; break; + case 11: sc_assert( sc_time_stamp() == sc_time(34, SC_NS) ); f85=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(41, SC_NS) ); f43=1; break; + case 19: sc_assert( sc_time_stamp() == sc_time(53, SC_NS) ); f44=1; break; + case 20: sc_assert( sc_time_stamp() == sc_time(54, SC_NS) ); f45=1; break; + case 22: sc_assert( sc_time_stamp() == sc_time(61, SC_NS) ); f26=1; break; + case 26: sc_assert( sc_time_stamp() == sc_time(65, SC_NS) ); f86=1; break; + case 28: sc_assert( sc_time_stamp() == sc_time(67, SC_NS) ); f46=1; break; + default: sc_assert( false ); break; + } + } + + void CT2() + { + //cout << "CT2() called at " << sc_time_stamp() << endl; + switch (count) + { + case 30: sc_assert( sc_time_stamp() == sc_time(105, SC_NS) ); f47=1; break; + case 32: sc_assert( sc_time_stamp() == sc_time(125, SC_NS) ); f51=1; break; + case 33: sc_assert( sc_time_stamp() == sc_time(135, SC_NS) ); f53=1; break; + case 34: sc_assert( sc_time_stamp() == sc_time(145, SC_NS) ); f55=1; break; + case 36: sc_assert( sc_time_stamp() == sc_time(160, SC_NS) ); f59=1; break; + case 37: sc_assert( sc_time_stamp() == sc_time(165, SC_NS) ); f61=1; break; + case 38: sc_assert( sc_time_stamp() == sc_time(175, SC_NS) ); f63=1; break; + case 39: sc_assert( sc_time_stamp() == sc_time(185, SC_NS) ); f65=1; break; + case 41: sc_assert( sc_time_stamp() == sc_time(205, SC_NS) ); f69=1; break; + case 42: sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); f71=1; break; + case 43: sc_assert( sc_time_stamp() == sc_time(215, SC_NS) ); f73=1; break; + case 44: sc_assert( sc_time_stamp() == sc_time(225, SC_NS) ); f75=1; break; + case 46: sc_assert( sc_time_stamp() == sc_time(240, SC_NS) ); f79=1; break; + default: sc_assert( false ); break; + } + while (true) + { + wait(); + //cout << "CT2() awoke at " << sc_time_stamp() << endl; + switch (count) + { + case 31: sc_assert( sc_time_stamp() == sc_time(115, SC_NS) ); f49=1; break; + case 35: sc_assert( sc_time_stamp() == sc_time(155, SC_NS) ); f57=1; break; + case 40: sc_assert( sc_time_stamp() == sc_time(195, SC_NS) ); f67=1; break; + case 45: sc_assert( sc_time_stamp() == sc_time(235, SC_NS) ); f77=1; break; + case 47: sc_assert( sc_time_stamp() == sc_time(245, SC_NS) ); f81=1; break; + default: sc_assert( false ); break; + } + } + } + + void T2() + { + //cout << "T2() called at " << sc_time_stamp() << endl; + switch (count) + { + case 30: sc_assert( sc_time_stamp() == sc_time(105, SC_NS) ); f48=1; break; + case 32: sc_assert( sc_time_stamp() == sc_time(125, SC_NS) ); f52=1; break; + case 33: sc_assert( sc_time_stamp() == sc_time(135, SC_NS) ); f54=1; break; + case 34: sc_assert( sc_time_stamp() == sc_time(145, SC_NS) ); f56=1; break; + case 36: sc_assert( sc_time_stamp() == sc_time(160, SC_NS) ); f60=1; break; + case 37: sc_assert( sc_time_stamp() == sc_time(165, SC_NS) ); f62=1; break; + case 38: sc_assert( sc_time_stamp() == sc_time(175, SC_NS) ); f64=1; break; + case 39: sc_assert( sc_time_stamp() == sc_time(185, SC_NS) ); f66=1; break; + case 41: sc_assert( sc_time_stamp() == sc_time(205, SC_NS) ); f70=1; break; + case 42: sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); f72=1; break; + case 43: sc_assert( sc_time_stamp() == sc_time(215, SC_NS) ); f74=1; break; + case 44: sc_assert( sc_time_stamp() == sc_time(225, SC_NS) ); f76=1; break; + case 46: sc_assert( sc_time_stamp() == sc_time(240, SC_NS) ); f80=1; break; + default: sc_assert( false ); break; + } + while (true) + { + wait(); + //cout << "T2() awoke at " << sc_time_stamp() << endl; + switch (count) + { + case 31: sc_assert( sc_time_stamp() == sc_time(115, SC_NS) ); f50=1; break; + case 35: sc_assert( sc_time_stamp() == sc_time(155, SC_NS) ); f58=1; break; + case 40: sc_assert( sc_time_stamp() == sc_time(195, SC_NS) ); f68=1; break; + case 45: sc_assert( sc_time_stamp() == sc_time(235, SC_NS) ); f78=1; break; + case 47: sc_assert( sc_time_stamp() == sc_time(245, SC_NS) ); f82=1; break; + default: sc_assert( false ); break; + } + } + } + + void clock() + { + clk.write( !clk.read() ); + } + + void clock2() + { + clk.write(0); + wait(5, SC_NS); + clk.write(1); + wait(5, SC_NS); + } + + void suspend() + { + ct.suspend(); + t.suspend(); + m.suspend(); + } + + void resume() + { + ct.resume(); + t.resume(); + m.resume(); + } + + void disable() + { + ct.disable(); + t.disable(); + m.disable(); + } + + void enable() + { + ct.enable(); + t.enable(); + m.enable(); + } + + void sync_reset_on() + { + ct.sync_reset_on(); + t.sync_reset_on(); + m.sync_reset_on(); + } + + void sync_reset_off() + { + ct.sync_reset_off(); + t.sync_reset_off(); + m.sync_reset_off(); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert(top.f1); + sc_assert(top.f2); + sc_assert(top.f3); + sc_assert(top.f4); + sc_assert(top.f5); + sc_assert(top.f6); + sc_assert(top.f7); + sc_assert(top.f8); + sc_assert(top.f9); + sc_assert(top.f11); + sc_assert(top.f12); + sc_assert(top.f13); + sc_assert(top.f14); + sc_assert(top.f15); + sc_assert(top.f16); + sc_assert(top.f17); + sc_assert(top.f18); + sc_assert(top.f19); + sc_assert(top.f20); + sc_assert(top.f21); + sc_assert(top.f22); + sc_assert(top.f23); + sc_assert(top.f24); + sc_assert(top.f25); + sc_assert(top.f26); + sc_assert(top.f28); + sc_assert(top.f29); + sc_assert(top.f30); + sc_assert(top.f31); + sc_assert(top.f32); + sc_assert(top.f33); + sc_assert(top.f34); + sc_assert(top.f35); + sc_assert(top.f36); + sc_assert(top.f37); + sc_assert(top.f38); + sc_assert(top.f39); + sc_assert(top.f40); + sc_assert(top.f41); + sc_assert(top.f42); + sc_assert(top.f43); + sc_assert(top.f44); + sc_assert(top.f45); + sc_assert(top.f46); + sc_assert(top.f47); + sc_assert(top.f48); + sc_assert(top.f49); + sc_assert(top.f50); + sc_assert(top.f51); + sc_assert(top.f52); + sc_assert(top.f53); + sc_assert(top.f54); + sc_assert(top.f55); + sc_assert(top.f56); + sc_assert(top.f57); + sc_assert(top.f58); + sc_assert(top.f59); + sc_assert(top.f60); + sc_assert(top.f61); + sc_assert(top.f62); + sc_assert(top.f63); + sc_assert(top.f64); + sc_assert(top.f65); + sc_assert(top.f66); + sc_assert(top.f67); + sc_assert(top.f68); + sc_assert(top.f69); + sc_assert(top.f70); + sc_assert(top.f71); + sc_assert(top.f72); + sc_assert(top.f73); + sc_assert(top.f74); + sc_assert(top.f75); + sc_assert(top.f76); + sc_assert(top.f77); + sc_assert(top.f78); + sc_assert(top.f79); + sc_assert(top.f80); + sc_assert(top.f81); + sc_assert(top.f82); + sc_assert(top.f83); + sc_assert(top.f84); + sc_assert(top.f85); + sc_assert(top.f86); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/async_reset/golden/async_reset.log b/src/systemc/tests/systemc/1666-2011-compliance/async_reset/golden/async_reset.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/async_reset/golden/async_reset.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/async_reset_port/async_reset_port.cpp b/src/systemc/tests/systemc/1666-2011-compliance/async_reset_port/async_reset_port.cpp new file mode 100644 index 000000000..4828f9bb6 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/async_reset_port/async_reset_port.cpp @@ -0,0 +1,372 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// async_reset_port.cpp -- +// +// Original Author: John Aynsley, Doulos Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: async_reset_port.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// async_reset_signal_is + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using std::cout; +using std::endl; + +struct M: sc_module +{ + sc_in clk; + + sc_in sreset1; + sc_inout sreset2; + sc_out sreset3; + + sc_in areset1; + sc_inout areset2; + sc_out areset3; + + M(sc_module_name _name) + : count(0) + { + SC_CTHREAD(CT1, clk); + reset_signal_is(sreset1, false); + ct1 = sc_get_current_process_handle(); + + SC_CTHREAD(CT2, clk); + reset_signal_is(sreset2, false); + ct2 = sc_get_current_process_handle(); + + SC_CTHREAD(CT3, clk); + reset_signal_is(sreset3, false); + ct3 = sc_get_current_process_handle(); + + SC_CTHREAD(CT4, clk); + async_reset_signal_is(areset1, false); + ct4 = sc_get_current_process_handle(); + + SC_CTHREAD(CT5, clk); + async_reset_signal_is(areset2, false); + ct5 = sc_get_current_process_handle(); + + SC_CTHREAD(CT6, clk); + async_reset_signal_is(areset3, false); + ct6 = sc_get_current_process_handle(); + + f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + f10 = f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = f23 = f24 = f25 = f26 = f27 = f28 = f29 = 0; + f30 = f31 = f32 = f33 = f34 = f35 = f36 = f37 = f38 = f39 = 0; + } + + int count; + sc_process_handle ct1, ct2, ct3, ct4, ct5, ct6; + + int f1, f2, f3, f4, f5, f6, f7, f8, f9; + int f10, f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22, f23, f24, f25, f26, f27, f28, f29; + int f30, f31, f32, f33, f34, f35, f36, f37, f38, f39; + + void CT1() + { + if (count == 2) { sc_assert(sc_time_stamp() == sc_time( 15, SC_NS)); f1 = 1; } + if (count == 17) { sc_assert(false); } + if (count == 18) { sc_assert(sc_time_stamp() == sc_time(135, SC_NS)); f16 = 1; } + if (count == 19) { sc_assert(sc_time_stamp() == sc_time(145, SC_NS)); f25 = 1; } + while (true) + { + wait(); + if (count == 16) { sc_assert(sc_time_stamp() == sc_time(125, SC_NS)); f10 = 1; } + if (count == 20) { sc_assert(sc_time_stamp() == sc_time(155, SC_NS)); f31 = 1; } + } + } + + void CT2() + { + if (count == 4) { sc_assert(sc_time_stamp() == sc_time( 35, SC_NS)); f2 = 1; } + if (count == 17) { sc_assert(false); } + if (count == 18) { sc_assert(sc_time_stamp() == sc_time(135, SC_NS)); f17 = 1; } + if (count == 19) { sc_assert(sc_time_stamp() == sc_time(145, SC_NS)); f26 = 1; } + while (true) + { + wait(); + if (count == 16) { sc_assert(sc_time_stamp() == sc_time(125, SC_NS)); f11 = 1; } + if (count == 20) { sc_assert(sc_time_stamp() == sc_time(155, SC_NS)); f32 = 1; } + } + } + + void CT3() + { + if (count == 6) { sc_assert(sc_time_stamp() == sc_time( 55, SC_NS)); f3 = 1; } + if (count == 17) { sc_assert(false); } + if (count == 18) { sc_assert(sc_time_stamp() == sc_time(135, SC_NS)); f18 = 1; } + if (count == 19) { sc_assert(sc_time_stamp() == sc_time(145, SC_NS)); f27 = 1; } + while (true) + { + wait(); + if (count == 16) { sc_assert(sc_time_stamp() == sc_time(125, SC_NS)); f12 = 1; } + if (count == 20) { sc_assert(sc_time_stamp() == sc_time(155, SC_NS)); f33 = 1; } + } + } + + void CT4() + { + if (count == 8) { sc_assert(sc_time_stamp() == sc_time( 70, SC_NS)); f4 = 1; } + if (count == 9) { sc_assert(sc_time_stamp() == sc_time( 75, SC_NS)); f5 = 1; } + if (count == 17) { sc_assert(sc_time_stamp() == sc_time(130, SC_NS)); f19 = 1; } + if (count == 18) { sc_assert(sc_time_stamp() == sc_time(135, SC_NS)); f22 = 1; } + if (count == 19) { sc_assert(sc_time_stamp() == sc_time(145, SC_NS)); f28 = 1; } + while (true) + { + wait(); + if (count == 16) { sc_assert(sc_time_stamp() == sc_time(125, SC_NS)); f13 = 1; } + if (count == 20) { sc_assert(sc_time_stamp() == sc_time(155, SC_NS)); f34 = 1; } + } + } + + void CT5() + { + if (count == 11) { sc_assert(sc_time_stamp() == sc_time( 90, SC_NS)); f6 = 1; } + if (count == 12) { sc_assert(sc_time_stamp() == sc_time( 95, SC_NS)); f7 = 1; } + if (count == 17) { sc_assert(sc_time_stamp() == sc_time(130, SC_NS)); f20 = 1; } + if (count == 18) { sc_assert(sc_time_stamp() == sc_time(135, SC_NS)); f23 = 1; } + if (count == 19) { sc_assert(sc_time_stamp() == sc_time(145, SC_NS)); f29 = 1; } + while (true) + { + wait(); + if (count == 16) { sc_assert(sc_time_stamp() == sc_time(125, SC_NS)); f14 = 1; } + if (count == 20) { sc_assert(sc_time_stamp() == sc_time(155, SC_NS)); f35 = 1; } + } + } + + void CT6() + { + if (count == 14) { sc_assert(sc_time_stamp() == sc_time(110, SC_NS)); f8 = 1; } + if (count == 15) { sc_assert(sc_time_stamp() == sc_time(115, SC_NS)); f9 = 1; } + if (count == 17) { sc_assert(sc_time_stamp() == sc_time(130, SC_NS)); f21 = 1; } + if (count == 18) { sc_assert(sc_time_stamp() == sc_time(135, SC_NS)); f24 = 1; } + if (count == 19) { sc_assert(sc_time_stamp() == sc_time(145, SC_NS)); f30 = 1; } + while (true) + { + try { + wait(); + } + catch (const sc_unwind_exception& e) { + sc_assert( e.is_reset() ); + sc_assert( sc_is_unwinding() ); + if (count == 14) { sc_assert(sc_time_stamp() == sc_time(110, SC_NS)); f37 = 1; } + if (count == 17) { sc_assert(sc_time_stamp() == sc_time(130, SC_NS)); f38 = 1; } + throw e; + } + if (count == 16) { sc_assert(sc_time_stamp() == sc_time(125, SC_NS)); f15 = 1; } + if (count == 20) { sc_assert(sc_time_stamp() == sc_time(155, SC_NS)); f36 = 1; } + } + } + + SC_HAS_PROCESS(M); +}; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + m = new M("m"); + m->clk(clk); + m->sreset1(sreset1); + m->sreset2(sreset2); + m->sreset3(sreset3); + m->areset1(areset1); + m->areset2(areset2); + m->areset3(areset3); + + SC_THREAD(ctrl); + + // Resets are all active-low + sreset1.write(1); + sreset2.write(1); + sreset3.write(1); + areset1.write(1); + areset2.write(1); + areset3.write(1); + } + + M* m; + + sc_signal clk; + + sc_signal sreset1; + sc_signal sreset2; + sc_signal sreset3; + + sc_signal areset1; + sc_signal areset2; + sc_signal areset3; + + void ctrl() + { + m->count = 1; + clock(); + + m->count = 2; + sreset1.write(0); + clock(); + + m->count = 3; + sreset1.write(1); + clock(); + + m->count = 4; + sreset2.write(0); + clock(); + + m->count = 5; + sreset2.write(1); + clock(); + + m->count = 6; + sreset3.write(0); + clock(); + + m->count = 7; + sreset3.write(1); + clock(); + + m->count = 8; + areset1.write(0); + wait(SC_ZERO_TIME); + + m->count = 9; + clock(); + + m->count = 10; + areset1.write(1); + clock(); + + m->count = 11; + areset2.write(0); + wait(SC_ZERO_TIME); + + m->count = 12; + clock(); + + m->count = 13; + areset2.write(1); + clock(); + + m->count = 14; + areset3.write(0); + wait(SC_ZERO_TIME); + + m->count = 15; + clock(); + + m->count = 16; + areset3.write(1); + clock(); + + m->count = 17; + sreset1.write(0); + sreset2.write(0); + sreset3.write(0); + areset1.write(0); + areset2.write(0); + areset3.write(0); + wait(SC_ZERO_TIME); + + m->count = 18; + clock(); + + m->count = 19; + clock(); + + m->count = 20; + sreset1.write(1); + sreset2.write(1); + sreset3.write(1); + areset1.write(1); + areset2.write(1); + areset3.write(1); + clock(); + } + + void clock() + { + clk.write(0); + wait(5, SC_NS); + clk.write(1); + wait(5, SC_NS); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert(top.m->f1); + sc_assert(top.m->f2); + sc_assert(top.m->f3); + sc_assert(top.m->f4); + sc_assert(top.m->f5); + sc_assert(top.m->f6); + sc_assert(top.m->f7); + sc_assert(top.m->f8); + sc_assert(top.m->f9); + sc_assert(top.m->f10); + sc_assert(top.m->f11); + sc_assert(top.m->f12); + sc_assert(top.m->f13); + sc_assert(top.m->f14); + sc_assert(top.m->f15); + sc_assert(top.m->f16); + sc_assert(top.m->f17); + sc_assert(top.m->f18); + sc_assert(top.m->f19); + sc_assert(top.m->f20); + sc_assert(top.m->f21); + sc_assert(top.m->f22); + sc_assert(top.m->f23); + sc_assert(top.m->f24); + sc_assert(top.m->f25); + sc_assert(top.m->f26); + sc_assert(top.m->f28); + sc_assert(top.m->f29); + sc_assert(top.m->f30); + sc_assert(top.m->f31); + sc_assert(top.m->f32); + sc_assert(top.m->f33); + sc_assert(top.m->f34); + sc_assert(top.m->f35); + sc_assert(top.m->f36); + sc_assert(top.m->f37); + sc_assert(top.m->f38); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/async_reset_port/golden/async_reset_port.log b/src/systemc/tests/systemc/1666-2011-compliance/async_reset_port/golden/async_reset_port.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/async_reset_port/golden/async_reset_port.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/child_proc_control.cpp b/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/child_proc_control.cpp new file mode 100644 index 000000000..1c80be921 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/child_proc_control.cpp @@ -0,0 +1,217 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// child_proc_control.cpp -- test for +// +// Original Author: John Aynsley, Doulos Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: child_proc_control.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Process control methods applied to child processes + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + : count(0) + , n(155) + , proc_count(0) + { + SC_THREAD(ctrl); + SC_THREAD(observer); + + f0 = f1 = 0; + + given_birth = new bool[n]; + + c0 = new int[n]; + c1 = new int[n]; + c2 = new int[n]; + c3 = new int[n]; + c4 = new int[n]; + c5 = new int[n]; + + for (int i = 0; i < n; i++) + { + given_birth[i] = false; + c0[i] = c1[i] = c2[i] = c3[i] = c4[i] = c5[i] = 0; + } + } + + int count; + int f0, f1; + const int n; + int proc_count; + bool *given_birth; + int *c0, *c1, *c2, *c3 ,*c4, *c5; + + sc_event ev; + sc_process_handle ph; + sc_event_and_list reset_event_list; + sc_event_and_list terminated_event_list; + + void ctrl() + { + count = 1; + ph = sc_spawn(sc_bind(&Top::parent_proc, this)); + wait(10, SC_NS); + + count = 2; + ph.reset(SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + + count = 3; + ev.notify(); + wait(10, SC_NS); + + count = 4; + ph.suspend(SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + + count = 5; + ev.notify(); + wait(10, SC_NS); + + count = 6; + ph.resume(SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + + count = 7; + ph.kill(SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + } + + void observer() + { + wait(SC_ZERO_TIME); + + wait(reset_event_list); + sc_assert(sc_time_stamp() == sc_time(10, SC_NS)); + f0 = 1; + + wait(terminated_event_list); + sc_assert(sc_time_stamp() == sc_time(60, SC_NS)); + f1 = 1; + } + + void parent_proc() + { + sc_process_handle h; + int level = 2; + for (int i = 0; i < 5; i++) + { + if (proc_count < n) + { + h = sc_spawn(sc_bind(&Top::child_proc, this, proc_count++, level)); + reset_event_list &= h.reset_event(); + terminated_event_list &= h.terminated_event(); + } + } + } + + void child_proc(int i, int level) + { + //cout << "Child " << i << " called at " << sc_time_stamp() << endl; + if (level > 0) + if ( !given_birth[i] ) + { + sc_process_handle h; + for (int j = 0; j < 5; j++) + { + if (proc_count < n) + { + h = sc_spawn(sc_bind(&Top::child_proc, this, proc_count++, level-1)); + reset_event_list &= h.reset_event(); + terminated_event_list &= h.terminated_event(); + given_birth[i] = true; + } + } + } + switch(count) + { + case 1: sc_assert(sc_time_stamp() == sc_time( 0, SC_NS)); c0[i] = 1; break; + case 2: sc_assert(sc_time_stamp() == sc_time(10, SC_NS)); c2[i] = 1; break; + default: sc_assert(false); break; + } + while(true) + { + try { + wait(ev); + } + catch (const sc_unwind_exception& e) { + switch(count) + { + case 2: sc_assert(sc_time_stamp() == sc_time(10, SC_NS)); + sc_assert( e.is_reset() ); c1[i] = 1; break; + case 7: sc_assert(sc_time_stamp() == sc_time(60, SC_NS)); + sc_assert( !e.is_reset() ); c5[i] = 1; break; + default: sc_assert(false); break; + } + sc_assert( sc_is_unwinding() ); + throw e; + } + switch(count) + { + case 3: sc_assert(sc_time_stamp() == sc_time(20, SC_NS)); c3[i] = 1; break; + case 6: sc_assert(sc_time_stamp() == sc_time(50, SC_NS)); c4[i] = 1; break; + default: sc_assert(false); break; + } + } + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.proc_count == top.n ); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + + for (int i = 0; i < top.n; i++) + { + sc_assert( top.c0[i] ); + sc_assert( top.c1[i] ); + sc_assert( top.c2[i] ); + sc_assert( top.c3[i] ); + sc_assert( top.c4[i] ); + sc_assert( top.c5[i] ); + } + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/golden/child_proc_control.log b/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/golden/child_proc_control.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/child_proc_control/golden/child_proc_control.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/disable_enable/disable_enable.cpp b/src/systemc/tests/systemc/1666-2011-compliance/disable_enable/disable_enable.cpp new file mode 100644 index 000000000..1302e7e7e --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/disable_enable/disable_enable.cpp @@ -0,0 +1,135 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// disable_enable.cpp -- test for +// +// Original Author: John Aynsley, Doulos Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: disable_enable.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// disable() should take effect only the next evaluation phase + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using namespace std; + +struct Top: sc_module +{ + Top(sc_module_name _name) + : count(0) + { + SC_THREAD(control); + SC_THREAD(target); + t = sc_get_current_process_handle(); + + f0 = f1 = f2 = f3 = f4 = f5 = 0; + } + + sc_process_handle t; + sc_event ev; + int count; + int f0, f1, f2, f3, f4, f5; + + void control() + { + wait(SC_ZERO_TIME); + + count = 1; + ev.notify(); + wait(10, SC_NS); + + count = 2; + ev.notify(); + t.disable(); + wait(SC_ZERO_TIME); + + count = 3; + ev.notify(); + wait(SC_ZERO_TIME); + + count = 4; + t.enable(); + ev.notify(); + wait(10, SC_NS); + + count = 5; + t.disable(); + t.reset(); + wait(10, SC_NS); + + count = 6; + t.reset(); + wait(10, SC_NS); + + sc_stop(); + } + + void target() + { + //cout << "Target called at " << sc_time_stamp() << " with count = " << count << endl; + switch(count) + { + case 0: sc_assert(sc_time_stamp() == sc_time( 0, SC_NS)); f0 = 1; break; + case 5: sc_assert(sc_time_stamp() == sc_time(20, SC_NS)); f4 = 1; break; + case 6: sc_assert(sc_time_stamp() == sc_time(30, SC_NS)); f5 = 1; break; + default: sc_assert(false); + } + for (;;) + { + wait(ev); + //cout << "Target awoke at " << sc_time_stamp() << " with count = " << count << endl; + switch(count) + { + case 1: sc_assert(sc_time_stamp() == sc_time( 0, SC_NS)); f1 = 1; break; + case 2: sc_assert(sc_time_stamp() == sc_time(10, SC_NS)); f2 = 1; break; + case 4: sc_assert(sc_time_stamp() == sc_time(10, SC_NS)); f3 = 1; break; + default: sc_assert(false); + } + } + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + sc_assert( top.f4 ); + sc_assert( top.f5 ); + /* + */ + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/disable_enable/golden/disable_enable.log b/src/systemc/tests/systemc/1666-2011-compliance/disable_enable/golden/disable_enable.log new file mode 100644 index 000000000..cdf4578d6 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/disable_enable/golden/disable_enable.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/event_list/event_list.cpp b/src/systemc/tests/systemc/1666-2011-compliance/event_list/event_list.cpp new file mode 100644 index 000000000..a3617ff60 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/event_list/event_list.cpp @@ -0,0 +1,318 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// event_list.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: event_list.cpp,v $ +// Revision 1.3 2011/09/05 21:23:30 acg +// Philipp A. Hartmann: eliminate compiler warnings. +// +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Event lists. A thread waits on a list of events built dynamically from a multiport + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Mod: sc_module +{ + sc_port, 0> p; // Multiport + + Mod(sc_module_name _name) + { + SC_THREAD(T1); + SC_THREAD(T2); + } + + void T1() + { + for (;;) + { + wait(all_events()); + cout << "M::T1 awoke with " << p[0]->read() << p[1]->read() << p[2]->read() + << " at " << sc_time_stamp() << " on list" << endl; + } + } + void T2() + { + for (;;) + { + wait( p[0]->default_event() | p[1]->default_event() ); + cout << "M::T2 awoke with " << p[0]->read() << p[1]->read() << p[2]->read() + << " at " << sc_time_stamp() << " on list" << endl; + } + } + sc_event_or_list all_events() const + { + sc_assert( p.size() == 3 ); + + sc_event_or_list or_list; + for (int i = 0; i < p.size(); i++) + or_list |= p[i]->default_event(); + + sc_assert( or_list.size() == 3 ); + return or_list; + } + + SC_HAS_PROCESS(Mod); +}; + +struct Top: sc_module +{ + Top(sc_module_name _name) + : finished(false) + , count(0) + { + m = new Mod("m"); + m->p.bind(sig1); + m->p.bind(sig2); + m->p.bind(sig3); + SC_THREAD(T); + SC_METHOD(M); + } + + ~Top() + { + sc_assert( finished ); + sc_assert( count == 4 ); + sc_assert( sc_get_status() == SC_PAUSED ); + sc_assert( sc_is_running() == true ); + cout << "~T() called" << endl; + } + + sc_signal sig1, sig2, sig3; + Mod* m; + + sc_event e1, e2, e3, e4; + bool finished; + + void T() + { + sig1.write(0); + sig2.write(0); + sig3.write(0); + + wait(10, SC_NS); + sig1.write(1); + wait(10, SC_NS); + sig1.write(2); + + wait(10, SC_NS); + sig2.write(1); + wait(10, SC_NS); + sig2.write(2); + + wait(10, SC_NS); + sig3.write(1); + wait(10, SC_NS); + sig3.write(2); + + sc_time start; + start = sc_time_stamp(); + + e1.notify(10, SC_NS); + e2.notify(20, SC_NS); + + sc_event_and_list list1 = e1 & e2; + sc_assert( list1.size() == 2 ); + + wait( list1 ); + cout << "Awoke at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() - start == sc_time(20, SC_NS) ); + + start = sc_time_stamp(); + e1.notify(11, SC_NS); + e2.notify(21, SC_NS); + + sc_event_and_list list2; + list2 &= e1; + list2 &= e2; + sc_assert( list2.size() == 2 ); + + wait( list2); + cout << "Awoke at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() - start == sc_time(21, SC_NS) ); + + start = sc_time_stamp(); + e1.notify(14, SC_NS); + e2.notify(24, SC_NS); + + sc_event_and_list list3 = list2 & e2; + sc_assert( list3.size() == 2 ); + + wait( list3 ); + cout << "Awoke at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() - start == sc_time(24, SC_NS) ); + + start = sc_time_stamp(); + e1.notify(100, SC_NS); + e2.notify(200, SC_NS); + + sc_event_and_list list4; + list4 = list3 & e2; + sc_assert( list4.size() == 2 ); + wait( list4 ); + cout << "Awoke at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() - start == sc_time(200, SC_NS) ); + + start = sc_time_stamp(); + e1.notify(101, SC_NS); + e2.notify(202, SC_NS); + + sc_event_and_list list5 = list3 & list4; + sc_assert( list5.size() == 2 ); + wait( list5 ); + cout << "Awoke at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() - start == sc_time(202, SC_NS) ); + + sc_event_and_list list6 = e1; + sc_assert( list6.size() == 1 ); + + start = sc_time_stamp(); + e1.notify(500, SC_NS); + wait(list6); + sc_assert( sc_time_stamp() - start == sc_time(500, SC_NS) ); + + + start = sc_time_stamp(); + e1.notify(1000, SC_NS); + wait(e1 | e2 | e3); + cout << "Awoke at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() - start == sc_time(1000, SC_NS) ); + + start = sc_time_stamp(); + e1.notify(1002, SC_NS); + e2.notify(1001, SC_NS); + e3.notify(1000, SC_NS); + + wait(e1 & e2 & e3); + cout << "Awoke at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() - start == sc_time(1002, SC_NS) ); + + start = sc_time_stamp(); + e1.notify(2000, SC_NS); + + sc_event_or_list list7; + list7 = e1 | e2; + list7 = list7 | e3; + list7 |= e4; + wait(list7); + cout << "Awoke at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() - start == sc_time(2000, SC_NS) ); + + start = sc_time_stamp(); + e1.notify(3000, SC_NS); + list7 = e2 | e3; + list7 = e1 | list7; + wait(list7); + cout << "Awoke at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() - start == sc_time(3000, SC_NS) ); + + list1 = e1; + list2 = e2; + e1.notify(SC_ZERO_TIME); + wait(list1); + e2.notify(SC_ZERO_TIME); + wait(list2); + + list1.swap(list2); + + e1.notify(SC_ZERO_TIME); + wait(list2); + e2.notify(SC_ZERO_TIME); + wait(list1); + + finished = true; + } + + sc_event v1, v2, v3, v4; + sc_event_or_list or_list1, or_list2; + sc_event_and_list and_list1, and_list2; + int count; + + void M() + { + switch (count) + { + case 0: + { + sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); + or_list1 = v1 | v2; + or_list2 = v3 | v4; + v2.notify(10, SC_NS); + next_trigger(or_list1 | or_list2); + break; + } + case 1: + { + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + and_list1 = v1 & v2; + and_list2 = v3 & v4; + v1.notify(1, SC_NS); + v2.notify(2, SC_NS); + v3.notify(3, SC_NS); + v4.notify(4, SC_NS); + next_trigger(and_list1 & and_list2); + break; + } + case 2: + { + sc_assert( sc_time_stamp() == sc_time(14, SC_NS) ); + and_list1 = v1 & v2 & v2 & v1; + sc_assert( and_list1.size() == 2 ); + v1.notify(1, SC_NS); + v2.notify(2, SC_NS); + next_trigger(and_list1); + break; + } + case 3: + { + sc_assert( sc_time_stamp() == sc_time(16, SC_NS) ); + break; + } + } + ++count; + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( sc_get_status() == SC_PAUSED ); + sc_assert( sc_is_running() ); + sc_assert( sc_pending_activity() == false ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/event_list/golden/event_list.log b/src/systemc/tests/systemc/1666-2011-compliance/event_list/golden/event_list.log new file mode 100644 index 000000000..91fb861d7 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/event_list/golden/event_list.log @@ -0,0 +1,23 @@ +SystemC Simulation +M::T1 awoke with 100 at 10 ns on list +M::T2 awoke with 100 at 10 ns on list +M::T1 awoke with 200 at 20 ns on list +M::T2 awoke with 200 at 20 ns on list +M::T1 awoke with 210 at 30 ns on list +M::T2 awoke with 210 at 30 ns on list +M::T1 awoke with 220 at 40 ns on list +M::T2 awoke with 220 at 40 ns on list +M::T1 awoke with 221 at 50 ns on list +M::T1 awoke with 222 at 60 ns on list +Awoke at 80 ns +Awoke at 101 ns +Awoke at 125 ns +Awoke at 325 ns +Awoke at 527 ns +Awoke at 2027 ns +Awoke at 3029 ns +Awoke at 5029 ns +Awoke at 8029 ns + +Success +~T() called diff --git a/src/systemc/tests/systemc/1666-2011-compliance/immed_self_notif/golden/immed_self_notif.log b/src/systemc/tests/systemc/1666-2011-compliance/immed_self_notif/golden/immed_self_notif.log new file mode 100644 index 000000000..994878d96 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/immed_self_notif/golden/immed_self_notif.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Warning: (W536) immediate self-notification ignored as of IEEE 1666-2011: top.M1 +In file: +In process: top.M1 @ 0 s + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/immed_self_notif/immed_self_notif.cpp b/src/systemc/tests/systemc/1666-2011-compliance/immed_self_notif/immed_self_notif.cpp new file mode 100644 index 000000000..d29582a38 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/immed_self_notif/immed_self_notif.cpp @@ -0,0 +1,216 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// immed_self_notif.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: immed_self_notif.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Change to the semantics of immediate self-notification to match Verilog semantics + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(T1); + sensitive << ev1; + + SC_THREAD(T2); + sensitive << ev1; + + SC_THREAD(T3); + + SC_THREAD(T4); + sensitive << ev3; + + SC_METHOD(M1); + sensitive << ev5; + + SC_METHOD(M2); + + SC_METHOD(M3); + + SC_THREAD(yield_test); + + end_of_t2 = false; + m1_run = false; + m2_run = false; + m3_run = false; + first_yield = true; + yield_count = 0; + yield_test_run = false; + } + + sc_event ev1, ev2, ev3, ev4, ev5, ev6, ev7; + bool end_of_t2; + bool m1_run; + bool m2_run; + bool m3_run; + + sc_event yield_event_1, yield_event_2; + bool first_yield; + int yield_count; + bool yield_test_run; + + void T1() + { + wait(SC_ZERO_TIME); + ev1.notify(); + sc_assert( sc_delta_count() == 1 ); + wait(ev1); + sc_assert( false ); + } + + void T2() + { + wait(ev1); + sc_assert( sc_delta_count() == 1 ); + end_of_t2 = true; + } + + void T3() + { + wait(SC_ZERO_TIME); + ev2.notify(); + sc_assert( sc_delta_count() == 1 ); + wait(ev2); + sc_assert( false ); + } + + void T4() + { + wait(SC_ZERO_TIME); + ev3.notify(); + sc_assert( sc_delta_count() == 1 ); + wait(ev4); + sc_assert( false ); + } + + void M1() + { + sc_assert( !m1_run ); + ev5.notify(); + m1_run = true; + } + + void M2() + { + sc_assert( !m2_run ); + ev6.notify(); + next_trigger(ev6); + m2_run = true; + } + + void M3() + { + sc_assert( !m3_run ); + next_trigger(ev7); + ev7.notify(); + m3_run = true; + } + + void yield_test() + { + sc_assert( sc_delta_count() == 0 ); + wait(SC_ZERO_TIME); + sc_assert( sc_delta_count() == 1 ); + + yield(); + sc_spawn(sc_bind( &Top::yield_test_child, this)); + yield(); + sc_spawn(sc_bind( &Top::yield_test_child, this)); + yield(); + + sc_assert( sc_delta_count() == 1 ); + wait(1, SC_MS); + unsigned int delta_count = sc_delta_count(); + + yield(); + sc_spawn(sc_bind( &Top::yield_test_child, this)); + yield(); + sc_spawn(sc_bind( &Top::yield_test_child, this)); + yield(); + + sc_assert( sc_delta_count() == delta_count ); + yield_test_run = true; + } + + void yield_test_child() + { + yield(); + } + + void yield() + { + ++yield_count; + if (first_yield) + { + sc_spawn(sc_bind(&Top::yield_helper, this)); + first_yield = false; + } + else + yield_event_1.notify(); + wait(yield_event_2); + } + + void yield_helper() + { + yield_event_2.notify(); + while (true) + { + wait(yield_event_1); + yield_event_2.notify(); + } + } + + SC_HAS_PROCESS(Top); +}; + + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.end_of_t2 ); + sc_assert( top.m1_run ); + sc_assert( top.m2_run ); + sc_assert( top.m3_run ); + sc_assert( top.first_yield == false ); + sc_assert( top.yield_count == 10 ); + sc_assert( top.yield_test_run ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/include_descendants/golden/include_descendants.log b/src/systemc/tests/systemc/1666-2011-compliance/include_descendants/golden/include_descendants.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/include_descendants/golden/include_descendants.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/include_descendants/include_descendants.cpp b/src/systemc/tests/systemc/1666-2011-compliance/include_descendants/include_descendants.cpp new file mode 100644 index 000000000..3a9306d04 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/include_descendants/include_descendants.cpp @@ -0,0 +1,328 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// include_descendants.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: include_descendants.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Process control methods include_descendants argument + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(calling); + + SC_THREAD(target1); + t1 = sc_get_current_process_handle(); + + SC_THREAD(target4); + t4 = sc_get_current_process_handle(); + + SC_THREAD(target7); + t7 = sc_get_current_process_handle(); + + count = 0; + f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = f10 = 0; + f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = 0; + } + + sc_process_handle t1, ch2, ch3, t4, ch5, ch6, t7, ch8, ch9; + sc_process_handle gch10, gch11, gch12, gch13; + sc_event ev; + int count; + int f1, f2, f3, f4, f5, f6, f7, f8, f9, f10; + int f11, f12, f13, f14, f15, f16, f17, f18; + + std::exception ex; + + void calling() + { + wait(SC_ZERO_TIME); + + count = 1; + t1.suspend(SC_INCLUDE_DESCENDANTS); + ev.notify(5, SC_NS); + wait(10, SC_NS); + + count = 2; + t1.resume(SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + + count = 3; + t1.disable(SC_INCLUDE_DESCENDANTS); + ev.notify(5, SC_NS); + wait(10, SC_NS); + + count = 4; + t1.enable(SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + + count = 5; + ev.notify(); + wait(10, SC_NS); + + count = 6; + t1.sync_reset_on(SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + + count = 7; + ev.notify(); + wait(10, SC_NS); + + count = 8; + t1.sync_reset_off(SC_INCLUDE_DESCENDANTS); + wait(sc_time(110, SC_NS) - sc_time_stamp()); + + count = 10; + t4.reset(SC_INCLUDE_DESCENDANTS); + wait(sc_time(210, SC_NS) - sc_time_stamp()); + + t7.throw_it(ex, SC_INCLUDE_DESCENDANTS); + } + + void target1() + { + sc_assert(count == 0); + ch2 = sc_spawn(sc_bind(&Top::child2, this)); + ch3 = sc_spawn(sc_bind(&Top::child3, this)); + wait(ch2.terminated_event() & ch3.terminated_event()); + f5 = 1; + } + + void child2() + { + if (count == 0) // Initialization + { + wait(ev); + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + wait(ev); + sc_assert(count == 5); + sc_assert( sc_time_stamp() == sc_time(40, SC_NS) ); + f1 = 1; + wait(ev); + } + else if (count == 7) // Sync reset + { + sc_assert( sc_time_stamp() == sc_time(60, SC_NS) ); + f3 = 1; + wait(20, SC_NS); + } + } + + void child3() + { + if (count == 0) // Initialization + { + wait(ev); + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + wait(ev); + sc_assert(count == 5); + sc_assert( sc_time_stamp() == sc_time(40, SC_NS) ); + f2 = 1; + wait(ev); + } + else if (count == 7) // Sync reset + { + sc_assert( sc_time_stamp() == sc_time(60, SC_NS) ); + f4 = 1; + wait(20, SC_NS); + } + } + + void target4() + { + if (count == 0) + { + wait(100, SC_NS); + count = 9; + ch5 = sc_spawn(sc_bind(&Top::child5, this)); + ch6 = sc_spawn(sc_bind(&Top::child6, this)); + } + else // Hard reset + { + sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); + f11 = 1; + } + wait(ch5.terminated_event() & ch6.terminated_event()); + f6 = 1; + } + + void child5() + { + switch (count) + { + case 9: sc_assert( sc_time_stamp() == sc_time(100, SC_NS) ); f7=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); f8=1; break; + default: sc_assert( false ); break; + } + wait(20, SC_NS); + } + + void child6() + { + switch (count) + { + case 9: sc_assert( sc_time_stamp() == sc_time(100, SC_NS) ); f9=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); f10=1; break; + default: sc_assert( false ); break; + } + wait(20, SC_NS); + } + + void target7() + { + wait(200, SC_NS); + count = 11; + ch8 = sc_spawn(sc_bind(&Top::child8, this)); + ch9 = sc_spawn(sc_bind(&Top::child9, this)); + try { + wait(20, SC_NS); + } + catch (std::exception e) { + sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); + } + wait(ch8.terminated_event() & ch9.terminated_event()); + sc_assert( sc_time_stamp() == sc_time(214, SC_NS) ); + f12 = 1; + } + + void child8() + { + gch10 = sc_spawn(sc_bind(&Top::grandchild10, this)); + gch11 = sc_spawn(sc_bind(&Top::grandchild11, this)); + try { + wait(20, SC_NS); + } + catch (std::exception e) { + f13 = 1; + sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); + } + wait(gch10.terminated_event() & gch11.terminated_event()); + } + + void child9() + { + gch12 = sc_spawn(sc_bind(&Top::grandchild12, this)); + gch13 = sc_spawn(sc_bind(&Top::grandchild13, this)); + try { + wait(20, SC_NS); + } + catch (std::exception e) { + f14 = 1; + sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); + } + wait(gch12.terminated_event() & gch13.terminated_event()); + } + + void grandchild10() + { + try { + wait(20, SC_NS); + } + catch (std::exception e) { + f15 = 1; + sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); + } + wait(1, SC_NS); + } + + void grandchild11() + { + try { + wait(20, SC_NS); + } + catch (std::exception e) { + f16 = 1; + sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); + } + wait(4, SC_NS); + } + + void grandchild12() + { + try { + wait(20, SC_NS); + } + catch (std::exception e) { + f17 = 1; + sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); + } + wait(2, SC_NS); + } + + void grandchild13() + { + try { + wait(20, SC_NS); + } + catch (std::exception e) { + f18 = 1; + sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); + } + wait(3, SC_NS); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + sc_assert( top.f4 ); + sc_assert( top.f5 ); + sc_assert( top.f6 ); + sc_assert( top.f7 ); + sc_assert( top.f8 ); + sc_assert( top.f9 ); + sc_assert( top.f10 ); + sc_assert( top.f11 ); + sc_assert( top.f12 ); + sc_assert( top.f13 ); + sc_assert( top.f14 ); + sc_assert( top.f15 ); + sc_assert( top.f16 ); + sc_assert( top.f17 ); + sc_assert( top.f18 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/kill_reset/golden/kill_reset.log b/src/systemc/tests/systemc/1666-2011-compliance/kill_reset/golden/kill_reset.log new file mode 100644 index 000000000..e9e5e75ef --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/kill_reset/golden/kill_reset.log @@ -0,0 +1,17 @@ +SystemC Simulation +Target called/reset at 0 s +Target awoke at 10 ns +Target awoke at 20 ns +sc_unwind_exception caught by target +Target called/reset at 25 ns +Target awoke at 30 ns +sc_unwind_exception caught by target +sc_unwind_exception caught by ticker +sc_unwind_exception caught by victim +sc_unwind_exception caught by bystander +sc_unwind_exception caught by second_bystander +sc_unwind_exception caught by third_bystander + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/kill_reset/kill_reset.cpp b/src/systemc/tests/systemc/1666-2011-compliance/kill_reset/kill_reset.cpp new file mode 100644 index 000000000..208e5bb2d --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/kill_reset/kill_reset.cpp @@ -0,0 +1,270 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// kill_reset.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: kill_reset.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Reset and kill a thread process, including nested kills and resets + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M3: sc_module +{ + M3(sc_module_name _name) + { + SC_THREAD(ticker); + k = sc_get_current_process_handle(); + + SC_THREAD(calling); + + SC_THREAD(target); + t = sc_get_current_process_handle(); + + SC_THREAD(victim); + v = sc_get_current_process_handle(); + + SC_THREAD(bystander); + b = sc_get_current_process_handle(); + + SC_THREAD(second_bystander); + b2 = sc_get_current_process_handle(); + + SC_THREAD(third_bystander); + b3 = sc_get_current_process_handle(); + + killing_over = false; + third_bystander_knocked_over = false; + } + + sc_process_handle t, k, v, b, b2, b3; + sc_event ev; + int count; + bool killing_over; + bool third_bystander_knocked_over; + + void ticker() + { + for (;;) + { + try { + wait(10, SC_NS); + ev.notify(); + sc_assert( !sc_is_unwinding() ); + } + catch (const sc_unwind_exception& ex) + { + // ticker process killed by target + cout << "sc_unwind_exception caught by ticker" << endl; + sc_assert( !ex.is_reset() ); + sc_assert( count == 1 ); + sc_assert( !killing_over ); + sc_assert( t.is_unwinding() ); + sc_assert( sc_is_unwinding() ); + + v.kill(); + throw ex; + } + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at time 10 NS due to notification + sc_assert( count == 1 ); + // The victim awakes every 1ns + sc_assert( sc_time_to_pending_activity() <= sc_time(1, SC_NS) ); + + wait(10, SC_NS); + // Target runs again at time 20 NS due to notification + sc_assert( count == 2 ); + + t.reset(); + // Target reset immediately at time 25 NS + sc_assert( count == 0 ); + + wait(10, SC_NS); + // Target runs again at time 30 NS due to notification + sc_assert( count == 1 ); + + t.kill(); + sc_assert( !killing_over ); + killing_over = true; + + // Target killed immediately at time 35 NS + if (t.valid()) + sc_assert( t.terminated() ); + if (k.valid()) + sc_assert( k.terminated() ); + if (v.valid()) + sc_assert( v.terminated() ); + sc_assert( b.valid() && !b.terminated() ); + sc_assert( b2.valid() && !b2.terminated() ); + if (b3.valid()) + sc_assert( b3.terminated() ); + + sc_stop(); + } + + void target() + { + cout << "Target called/reset at " << sc_time_stamp() << endl; + count = 0; + for (;;) + { + try { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << endl; + ++count; + } + catch (const sc_unwind_exception& ex) + { + cout << "sc_unwind_exception caught by target" << endl; + if (count == 2) + sc_assert( ex.is_reset() ); + else if (count == 1) + { + sc_assert( !ex.is_reset() ); + sc_assert( !killing_over ); + k.kill(); + } + else + sc_assert( false ); + throw ex; + } + } + } + + void victim() + { + try { + while (true) + { + wait(1, SC_NS); + sc_assert( !sc_is_unwinding() ); + } + } + catch (const sc_unwind_exception& ex) + { + cout << "sc_unwind_exception caught by victim" << endl; + sc_assert( sc_time_stamp() == sc_time(35, SC_NS) ); + sc_assert( ex.is_reset() == false ); + sc_assert( !killing_over ); + sc_assert( v.is_unwinding() ); + sc_assert( sc_is_unwinding() ); + + b.reset(); + throw ex; + } + } + + void bystander() // Gets reset by victim + { + for (;;) + { + try { + wait(ev); + } + catch (const sc_unwind_exception& ex) { + cout << "sc_unwind_exception caught by bystander" << endl; + sc_assert( sc_time_stamp() == sc_time(35, SC_NS) ); + sc_assert( ex.is_reset() == true ); + sc_assert( !killing_over ); + sc_assert( v.is_unwinding() ); // sic + sc_assert( sc_is_unwinding() ); + + b2.reset(); + throw ex; + } + } + } + + void second_bystander() // Gets reset by bystander + { + for (;;) + { + try { + wait(ev); + } + catch (const sc_unwind_exception& ex) { + cout << "sc_unwind_exception caught by second_bystander" << endl; + sc_assert( sc_time_stamp() == sc_time(35, SC_NS) ); + sc_assert( ex.is_reset() == true ); + sc_assert( !killing_over ); + sc_assert( v.is_unwinding() ); // sic + sc_assert( b.is_unwinding() ); // sic + sc_assert( sc_is_unwinding() ); + + b3.kill(); + throw ex; + } + } + } + + void third_bystander() // Gets killed by second bystander + { + for (;;) + { + try { + wait(ev); + } + catch (const sc_unwind_exception& ex) { + cout << "sc_unwind_exception caught by third_bystander" << endl; + sc_assert( sc_time_stamp() == sc_time(35, SC_NS) ); + sc_assert( !ex.is_reset() == true ); + sc_assert( !killing_over ); + sc_assert( v.is_unwinding() ); // sic + sc_assert( b.is_unwinding() ); // sic + sc_assert( b2.is_unwinding() ); // sic + sc_assert( sc_is_unwinding() ); + + third_bystander_knocked_over = true; + throw ex; + } + } + } + + SC_HAS_PROCESS(M3); +}; + +int sc_main(int argc, char* argv[]) +{ + M3 m("m"); + sc_assert( sc_pending_activity() == false ); + sc_assert( sc_time_to_pending_activity() == sc_max_time() ); + + sc_start(); + sc_assert( m.third_bystander_knocked_over ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/late_reset_bug/golden/late_reset_bug.log b/src/systemc/tests/systemc/1666-2011-compliance/late_reset_bug/golden/late_reset_bug.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/late_reset_bug/golden/late_reset_bug.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/late_reset_bug/late_reset_bug.cpp b/src/systemc/tests/systemc/1666-2011-compliance/late_reset_bug/late_reset_bug.cpp new file mode 100644 index 000000000..9ec572ff5 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/late_reset_bug/late_reset_bug.cpp @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// late_reset_bug.cpp -- test for +// +// Original Author: John Aynsley, Doulus +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// + +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(control); + + SC_METHOD(target); + sensitive << ev; + dont_initialize(); + target_handle = sc_get_current_process_handle(); + + count = 0; + f0 = f1 = 0; + } + + sc_event ev; + sc_process_handle target_handle; + int count; + int f0, f1; + + void control() + { + count = 0; + wait(10, SC_NS); + + count = 1; + target_handle.reset(); + + count = 2; + f1 = 1; + } + + void target() + { + sc_assert( count == 1 ); // FAILS !!!!!! + f0 = 1; + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/living_children/golden/living_children.log b/src/systemc/tests/systemc/1666-2011-compliance/living_children/golden/living_children.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/living_children/golden/living_children.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/living_children/living_children.cpp b/src/systemc/tests/systemc/1666-2011-compliance/living_children/living_children.cpp new file mode 100644 index 000000000..e67218770 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/living_children/living_children.cpp @@ -0,0 +1,107 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// living_children.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: living_children.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Not invaliding handles to processes with living children + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + t1 = sc_spawn(sc_bind(&Top::T1, this)); + } + + sc_process_handle t1, t2a, t2b; + + void T1() + { + wait(1, SC_NS); + t2a = sc_spawn(sc_bind(&Top::T2, this)); + t2b = sc_spawn(sc_bind(&Top::T2, this)); + wait(1, SC_NS); + sc_assert( t2a.valid() ); + sc_assert( t2b.valid() ); + + std::vector children = t1.get_child_objects(); + sc_assert( children.size() == 2); + + sc_event_and_list and_list = t2a.terminated_event() & t2b.terminated_event(); + wait( and_list ); + + sc_assert( t2a.valid() ); + sc_assert( t2a.terminated() ); + sc_assert( t2b.valid() ); + sc_assert( t2b.terminated() ); + sc_assert( sc_time_stamp() == sc_time(3, SC_NS) ); + } + + void T2() + { + wait(2, SC_NS); + sc_process_handle t3 = sc_spawn(sc_bind(&Top::T3, this)); + wait(SC_ZERO_TIME); + sc_assert( t3.valid() ); + + sc_process_handle me = sc_get_current_process_handle(); + sc_assert( me.get_parent_object() ); // Parent handle shall still be valid + std::vector children = me.get_child_objects(); + sc_assert( children.size() == 1); + + std::vector my_events = me.get_child_events(); + sc_assert( my_events.size() == 0 ); + } + + void T3() + { + wait(3, SC_NS); + sc_process_handle me = sc_get_current_process_handle(); + sc_assert( me.get_parent_object() ); // Parent handle shall still be valid + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/living_dead_bug/golden/living_dead_bug.log b/src/systemc/tests/systemc/1666-2011-compliance/living_dead_bug/golden/living_dead_bug.log new file mode 100644 index 000000000..09402b72c --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/living_dead_bug/golden/living_dead_bug.log @@ -0,0 +1,10 @@ +SystemC Simulation + +Warning: (W558) disable() or dont_initialize() called on process with no static sensitivity, it will be orphaned: top.target +In file: + +Warning: (W558) disable() or dont_initialize() called on process with no static sensitivity, it will be orphaned: top.control.dyn_target +In file: +In process: top.control @ 0 s + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/living_dead_bug/living_dead_bug.cpp b/src/systemc/tests/systemc/1666-2011-compliance/living_dead_bug/living_dead_bug.cpp new file mode 100644 index 000000000..921ddd5bb --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/living_dead_bug/living_dead_bug.cpp @@ -0,0 +1,88 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// living_dead_bug.cpp -- test for +// +// Original Author: John Aynsley, Doulus +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// + +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(control); + + SC_THREAD(target); + dont_initialize(); + target_handle = sc_get_current_process_handle(); + + f0 = f1 = 0; + } + + sc_process_handle target_handle; + int f0, f1; + + void control() + { + // create another (orphaned) instance of "target" + { + sc_spawn_options opt; + opt.dont_initialize(); + sc_spawn( sc_bind( &Top::target, this ), "dyn_target", &opt ); + } + + wait(10, SC_NS); + f0 = 1; + target_handle.kill(); + f1 = 1; + } + + void target() + { + sc_assert( false ); // FAILS!!!!!! + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/method_suspends_itself/golden/method_suspends_itself.log b/src/systemc/tests/systemc/1666-2011-compliance/method_suspends_itself/golden/method_suspends_itself.log new file mode 100644 index 000000000..cdf4578d6 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/method_suspends_itself/golden/method_suspends_itself.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/method_suspends_itself/method_suspends_itself.cpp b/src/systemc/tests/systemc/1666-2011-compliance/method_suspends_itself/method_suspends_itself.cpp new file mode 100644 index 000000000..26dce0530 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/method_suspends_itself/method_suspends_itself.cpp @@ -0,0 +1,429 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// method_suspends_itself.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: method_suspends_itself.cpp,v $ +// Revision 1.3 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Method process uses suspends, resumes, disables, and enables itself + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + + SC_METHOD(target); + sensitive << ev; + dont_initialize(); + t = sc_get_current_process_handle(); + + suspend_target = false; + resume_target = false; + disable_target = false; + enable_target = false; + dynamic_sensitivity = false; + f0 = f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + f10 = f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = f23 = f24 = f25 = f26 = f27 = f28 = f29 = 0; + } + + sc_process_handle t; + sc_event ev, ev2; + bool suspend_target; + bool resume_target; + bool disable_target; + bool enable_target; + bool dynamic_sensitivity; + int count; + int f0, f1, f2, f3, f4, f5, f6, f7, f8, f9; + int f10, f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22, f23, f24, f25, f26, f27, f28, f29; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + count = 1; + wait(15, SC_NS); + // Target runs at 10 NS + + count = 2; + suspend_target = true; + wait(10, SC_NS); + // Target runs at 20 NS and suspends itself + + count = 3; + suspend_target = false; + wait(10, SC_NS); + // Target does not run at 30 NS + + count = 4; + t.resume(); + // Target runs at 35 NS + + wait(10, SC_NS); + // Target runs at 40 NS + + count = 6; + suspend_target = true; + resume_target = true; + wait(10, SC_NS); + // Target runs at 50 NS + + count = 7; + resume_target = true; + wait(10, SC_NS); + // Double resume at 60 NS + + count = 8; + suspend_target = true; + resume_target = false; + wait(10, SC_NS); + // Target runs at 70 NS + + count = 9; + wait(10, SC_NS); + // Double suspend + // Target does not run at 80 NS + + count = 10; + suspend_target = false; + resume_target = false; + t.resume(); + // Target runs at 85 NS + + wait(10, SC_NS); + // Target runs at 90 NS + sc_assert( count == 11 ); + + count = 12; + t.suspend(); + wait(10, SC_NS); + // Target does not run at 100 NS + + count = 13; + t.resume(); + // Target runs at 105 NS + + wait(10, SC_NS); + // Target runs at 110 NS + sc_assert( count == 14 ); + + count = 15; + t.disable(); + wait(10, SC_NS); + // Target does not run at 120 NS + + count = 16; + wait(10, SC_NS); + // Target does not run at 130 NS + + count = 17; + t.disable(); + // Double disable + wait(10, SC_NS); + // Target does not run at 140 NS + + count = 18; + t.enable(); + wait(10, SC_NS); + // Target runs at 150 NS + + count = 19; + t.enable(); + // Double enable + wait(10, SC_NS); + // Target runs at 160 NS + + count = 20; + disable_target = true; + wait(10, SC_NS); + // Target runs at 170 and disables itself + + count = 21; + disable_target = false; + wait(10, SC_NS); + // Target does not run at 180 + + count = 22; + enable_target = true; + wait(10, SC_NS); + // Target does not run at 190 + + count = 23; + wait(10, SC_NS); + // Failed to enable it itself, so still does not run at 200 + + count = 24; + enable_target = false; + t.enable(); + wait(10, SC_NS); + // Target runs at 210 + + count = 25; + disable_target = true; + enable_target = true; + wait(10, SC_NS); + // Target runs at 220 and calls disable -> enable + + count = 26; + disable_target = false; + enable_target = false; + wait(10, SC_NS); + // Target runs at 230 + + count = 27; + t.suspend(); + wait(10, SC_NS); + // Target does not run at 240 + + count = 28; + t.enable(); + wait(10, SC_NS); + // Has no effect - still suspended at 250 + + count = 29; + t.disable(); + wait(10, SC_NS); + // Both disabled and suspended at 260 + + count = 30; + t.enable(); + wait(10, SC_NS); + // Enabled but still suspended + + count = 31; + t.resume(); + // Target resumed at 275 NS + wait(SC_ZERO_TIME); + + count = 311; + wait(10, SC_NS); + + count = 32; + t.disable(); + wait(10, SC_NS); + // Disabled at 290 NS + + count = 33; + t.resume(); + wait(10, SC_NS); + // Still disabled at 300 NS + + count = 34; + t.suspend(); + wait(10, SC_NS); + // Both disabled and suspended at 310 + + count = 35; + t.enable(); + wait(10, SC_NS); + // Remains suspended at 320 + + count = 36; + t.resume(); + wait(10, SC_NS); + // Resumed at 325 NS and runs at 330 + sc_assert( count == 37 ); + + count = 38; + suspend_target = true; + resume_target = true; + disable_target = true; + enable_target = true; + wait(10, SC_NS); + // Runs at 340 + + count = 39; + suspend_target = true; + resume_target = false; + disable_target = true; + enable_target = true; + wait(10, SC_NS); + // Runs at 350, when it suspends + + count = 40; + suspend_target = false; + wait(10, SC_NS); + // Suspended at 360 + + count = 41; + t.resume(); + wait(10, SC_NS); + // Runs at 365 and 370 + sc_assert( count == 42 ); + + sc_assert( t.valid() ); + sc_assert( t.terminated() == false ); + sc_assert( t.dynamic() == false ); + sc_assert( t.get_parent_object() == this ); + sc_assert( t.get_process_object() != 0 ); + + count = 43; + t.reset(); + wait(SC_ZERO_TIME); + + count = 44; + dynamic_sensitivity = true; + wait(10, SC_NS); + // Runs at 380 + + count = 45; + ev2.notify(); + wait(1, SC_NS); + + count = 46; + ev2.notify(); + wait(sc_time(400, SC_NS) - sc_time_stamp()); + + count = 47; + dynamic_sensitivity = false; + t.sync_reset_on(); // Still dynamically sensitive to ev2 + ev2.notify(); // Clears dynamic sensitivity, restores static sensitivity + + count = 48; + wait(10, SC_NS); + + count = 49; + t.kill(); + + if (t.valid()) + sc_assert( t.terminated() ); + + sc_stop(); + } + + void target() + { + //cout << "Target called at " << sc_time_stamp() << " count = " << count << endl; + switch (count) + { + case 1: sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); f0=1; break; + case 2: sc_assert( sc_time_stamp() == sc_time(20, SC_NS) ); f1=1; break; + case 4: sc_assert( sc_time_stamp() == sc_time(35, SC_NS) ); count = 5; f2=1; break; + case 5: sc_assert( sc_time_stamp() == sc_time(40, SC_NS) ); f3=1; break; + case 6: sc_assert( sc_time_stamp() == sc_time(50, SC_NS) ); f4=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(60, SC_NS) ); f5=1; break; + case 8: sc_assert( sc_time_stamp() == sc_time(70, SC_NS) ); f6=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time(85, SC_NS) ); count = 11; f7=1; break; + case 11: sc_assert( sc_time_stamp() == sc_time(90, SC_NS) ); f8=1; break; + case 13: sc_assert( sc_time_stamp() == sc_time(105, SC_NS) ); count = 14; f9=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); f10=1; break; + case 18: sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); f11=1; break; + case 19: sc_assert( sc_time_stamp() == sc_time(160, SC_NS) ); f12=1; break; + case 20: sc_assert( sc_time_stamp() == sc_time(170, SC_NS) ); f13=1; break; + case 24: sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); f14=1; break; + case 25: sc_assert( sc_time_stamp() == sc_time(220, SC_NS) ); f15=1; break; + case 26: sc_assert( sc_time_stamp() == sc_time(230, SC_NS) ); f16=1; break; + case 31: sc_assert( sc_time_stamp() == sc_time(275, SC_NS) ); f17=1; break; + case 311:sc_assert( sc_time_stamp() == sc_time(280, SC_NS) ); f18=1; break; + case 36: sc_assert( sc_time_stamp() == sc_time(325, SC_NS) ); count = 37; f19=1; break; + case 37: sc_assert( sc_time_stamp() == sc_time(330, SC_NS) ); f20=1; break; + case 38: sc_assert( sc_time_stamp() == sc_time(340, SC_NS) ); f21=1; break; + case 39: sc_assert( sc_time_stamp() == sc_time(350, SC_NS) ); f22=1; break; + case 41: sc_assert( sc_time_stamp() == sc_time(365, SC_NS) ); count = 42; f23=1; break; + case 42: sc_assert( sc_time_stamp() == sc_time(370, SC_NS) ); f24=1; break; + case 43: sc_assert( sc_time_stamp() == sc_time(375, SC_NS) ); f29=1; break; //////// + case 44: sc_assert( sc_time_stamp() == sc_time(380, SC_NS) ); f25=1; break; + case 45: sc_assert( sc_time_stamp() == sc_time(385, SC_NS) ); f26=1; break; + case 46: sc_assert( sc_time_stamp() == sc_time(386, SC_NS) ); f27=1; break; + case 48: sc_assert( sc_time_stamp() == sc_time(400, SC_NS) ); f28=1; break; + default: sc_assert( false ); break; + } + + if (suspend_target) + t.suspend(); + if (resume_target) + t.resume(); + if (disable_target) + t.disable(); + if (enable_target) + t.enable(); + if (dynamic_sensitivity) + next_trigger(ev2); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + sc_assert( top.f4 ); + sc_assert( top.f5 ); + sc_assert( top.f6 ); + sc_assert( top.f7 ); + sc_assert( top.f8 ); + sc_assert( top.f9 ); + sc_assert( top.f10 ); + sc_assert( top.f11 ); + sc_assert( top.f12 ); + sc_assert( top.f13 ); + sc_assert( top.f14 ); + sc_assert( top.f15 ); + sc_assert( top.f16 ); + sc_assert( top.f17 ); + sc_assert( top.f18 ); + sc_assert( top.f19 ); + sc_assert( top.f20 ); + sc_assert( top.f21 ); + sc_assert( top.f22 ); + sc_assert( top.f23 ); + sc_assert( top.f24 ); + sc_assert( top.f25 ); + sc_assert( top.f26 ); + sc_assert( top.f27 ); + sc_assert( top.f28 ); + sc_assert( top.f29 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/method_with_reset/golden/method_with_reset.log b/src/systemc/tests/systemc/1666-2011-compliance/method_with_reset/golden/method_with_reset.log new file mode 100644 index 000000000..0d5dc4ebb --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/method_with_reset/golden/method_with_reset.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Error: (E521) immediate notification is not allowed during update phase or elaboration +In file: +In process: top.ctrl.m3 @ 520 ns diff --git a/src/systemc/tests/systemc/1666-2011-compliance/method_with_reset/method_with_reset.cpp b/src/systemc/tests/systemc/1666-2011-compliance/method_with_reset/method_with_reset.cpp new file mode 100644 index 000000000..aafd3f61d --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/method_with_reset/method_with_reset.cpp @@ -0,0 +1,446 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// method_with_reset.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: method_with_reset.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Method processes with sync and async resets, reset_event, sc_event_or_list + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + : clk("clk") + , count(0) + { + SC_THREAD(ctrl); + + SC_METHOD(method_sync_reset); + sensitive << clk.posedge_event(); + reset_signal_is(reset, true); + dont_initialize(); + m1 = sc_get_current_process_handle(); + + SC_METHOD(method_async_reset); + sensitive << clk.posedge_event(); + async_reset_signal_is(reset, true); + dont_initialize(); + m2 = sc_get_current_process_handle(); + + f0 = f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + f10 = f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = f23 = f24 = f25 = f26 = f27 = f28 = f29 = 0; + f30 = f31 = f32 = f33 = f34 = f35 = f36 = f37 = f38 = f39 = 0; + f40 = f41 = f42 = f43 = f44 = f45 = f46 = f47 = f48 = f49 = 0; + f50 = f51 = f52 = f53 = f54 = f55 = f56 = f57 = f58 = f59 = 0; + } + + sc_process_handle m1, m2, m3, m4, m5, m6; + sc_signal clk, reset, sreset, areset; + int count; + int f0, f1, f2, f3, f4, f5, f6, f7, f8, f9; + int f10, f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22, f23, f24, f25, f26, f27, f28, f29; + int f30, f31, f32, f33, f34, f35, f36, f37, f38, f39; + int f40, f41, f42, f43, f44, f45, f46, f47, f48, f49; + int f50, f51, f52, f53, f54, f55, f56, f57, f58, f59; + + void ctrl() + { + count = 1; + reset.write(false); + sreset.write(false); + areset.write(false); + clk.write(false); + wait(10, SC_NS); + + count = 2; + reset.write(true); + wait(10, SC_NS); + + count = 3; + reset.write(false); + wait(10, SC_NS); + + count = 4; + reset.write(true); + wait(10, SC_NS); + + count = 5; + clk.write(true); + wait(10, SC_NS); + + count = 6; + clk.write(false); + wait(10, SC_NS); + + count = 7; + reset.write(false); + wait(10, SC_NS); + + count = 8; + clk.write(true); + wait(10, SC_NS); + + count = 9; + clk.write(false); + wait(10, SC_NS); + + count = 10; + clk.write(true); + wait(10, SC_NS); + + count = 11; + reset.write(true); + wait(10, SC_NS); + + count = 12; + reset.write(false); + wait(10, SC_NS); + + count = 13; + reset.write(true); + wait(10, SC_NS); + + count = 14; + clk.write(false); + wait(sc_time(200, SC_NS) - sc_time_stamp()); + + count = 15; + clk.write(true); + wait(10, SC_NS); + + count = 16; + clk.write(false); + wait(10, SC_NS); + + count = 17; + clk.write(true); + wait(10, SC_NS); + + count = 18; + reset.write(false); + wait(10, SC_NS); + + count = 19; + reset.write(true); + wait(10, SC_NS); + + count = 20; + reset.write(false); + wait(10, SC_NS); + + count = 21; + clk.write(false); + wait(sc_time(300, SC_NS) - sc_time_stamp()); + + count = 22; + clk.write(true); + wait(10, SC_NS); + + count = 23; + clk.write(false); + m1.disable(); + m2.disable(); + + sc_spawn_options opt3; + opt3.spawn_method(); + opt3.set_sensitivity( &clk.posedge_event() ); + opt3.reset_signal_is(sreset, true); + opt3.async_reset_signal_is(areset, true); + m3 = sc_spawn(sc_bind( &Top::spawned_method, this ), "m3", &opt3); + + sc_spawn_options opt4; + opt4.spawn_method(); + opt4.set_sensitivity( &m3.reset_event() ); + opt4.dont_initialize(); + m4 = sc_spawn(sc_bind( &Top::reset_handler, this), "m4", &opt4); + + sc_spawn_options opt5; + opt5.spawn_method(); + m5 = sc_spawn(sc_bind( &Top::reset_or_terminated_handler, this), "m5", &opt5); + + std::vector vec = this->get_child_events(); + sc_assert( vec.size() == 0 ); + wait(10, SC_NS); + + m6 = sc_spawn(sc_bind( &Top::multiple_reset_handler, this) ); + + count = 24; + clk.write(true); + wait(10, SC_NS); + + count = 25; + clk.write(false); + wait(10, SC_NS); + + count = 26; + sreset.write(true); + wait(10, SC_NS); + + count = 27; + clk.write(true); + wait(sc_time(500, SC_NS) - sc_time_stamp()); + + count = 28; + clk.write(false); + sreset.write(false); + wait(10, SC_NS); + + count = 29; + m3.reset(); + wait(10, SC_NS); + + count = 30; + areset.write(true); + wait(10, SC_NS); + + count = 31; + areset.write(false); + wait(10, SC_NS); + + count = 32; + areset.write(true); + wait(10, SC_NS); + + count = 33; + clk.write(true); + wait(10, SC_NS); + + count = 34; + clk.write(false); + wait(10, SC_NS); + + count = 35; + areset.write(false); + wait(sc_time(600, SC_NS) - sc_time_stamp()); + + count = 36; + m3.kill(); + wait(10, SC_NS); + + count = 37; + m1.reset(); + wait(10, SC_NS); + + count = 38; + m2.reset(); + wait(10, SC_NS); + + + } + + void method_sync_reset() + { + if (reset) + switch (count) + { + case 5: sc_assert( sc_time_stamp() == sc_time( 40, SC_NS) ); f0=1; break; + case 15: sc_assert( sc_time_stamp() == sc_time(200, SC_NS) ); f3=1; break; + case 17: sc_assert( sc_time_stamp() == sc_time(220, SC_NS) ); f4=1; break; + default: sc_assert( false ); + } + else + switch (count) + { + case 8: sc_assert( sc_time_stamp() == sc_time( 70, SC_NS) ); f1=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time( 90, SC_NS) ); f2=1; break; + case 22: sc_assert( sc_time_stamp() == sc_time(300, SC_NS) ); f5=1; break; + case 37: sc_assert( sc_time_stamp() == sc_time(610, SC_NS) ); f55=1; break; + default: sc_assert( false ); + } + } + + void method_async_reset() + { + if (reset) + switch (count) + { + case 2: sc_assert( sc_time_stamp() == sc_time( 10, SC_NS) ); f10=1; break; + case 4: sc_assert( sc_time_stamp() == sc_time( 30, SC_NS) ); f11=1; break; + case 5: sc_assert( sc_time_stamp() == sc_time( 40, SC_NS) ); f12=1; break; + case 11: sc_assert( sc_time_stamp() == sc_time(100, SC_NS) ); f15=1; break; + case 13: sc_assert( sc_time_stamp() == sc_time(120, SC_NS) ); f16=1; break; + case 15: sc_assert( sc_time_stamp() == sc_time(200, SC_NS) ); f17=1; break; + case 17: sc_assert( sc_time_stamp() == sc_time(220, SC_NS) ); f18=1; break; + case 19: sc_assert( sc_time_stamp() == sc_time(240, SC_NS) ); f19=1; break; + default: sc_assert( false ); + } + else + switch (count) + { + case 8: sc_assert( sc_time_stamp() == sc_time( 70, SC_NS) ); f13=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time( 90, SC_NS) ); f14=1; break; + case 22: sc_assert( sc_time_stamp() == sc_time(300, SC_NS) ); f20=1; break; + case 38: sc_assert( sc_time_stamp() == sc_time(620, SC_NS) ); f57=1; break; + default: sc_assert( false ); + } + } + + void spawned_method() + { + switch (count) + { + case 23: sc_assert( sc_time_stamp() == sc_time(310, SC_NS) ); f30=1; break; + case 24: sc_assert( sc_time_stamp() == sc_time(320, SC_NS) ); f31=1; break; + case 27: sc_assert( sc_time_stamp() == sc_time(350, SC_NS) ); f32=1; break; + case 29: sc_assert( sc_time_stamp() == sc_time(510, SC_NS) ); f34=1; break; + case 30: sc_assert( sc_time_stamp() == sc_time(520, SC_NS) ); f36=1; break; + case 32: sc_assert( sc_time_stamp() == sc_time(540, SC_NS) ); f38=1; break; + case 33: sc_assert( sc_time_stamp() == sc_time(550, SC_NS) ); f40=1; break; + default: sc_assert( false ); + } + } + + void reset_handler() + { + switch (count) + { + case 27: sc_assert( sc_time_stamp() == sc_time(350, SC_NS) ); f33=1; break; + case 29: sc_assert( sc_time_stamp() == sc_time(510, SC_NS) ); f35=1; break; + case 30: sc_assert( sc_time_stamp() == sc_time(520, SC_NS) ); f37=1; break; + case 32: sc_assert( sc_time_stamp() == sc_time(540, SC_NS) ); f39=1; break; + case 33: sc_assert( sc_time_stamp() == sc_time(550, SC_NS) ); f41=1; break; + default: sc_assert( false ); + } + } + + sc_event_or_list event_list; + + void reset_or_terminated_handler() + { + switch (count) + { + case 23: sc_assert( sc_time_stamp() == sc_time(310, SC_NS) ); f42=1; break; + case 27: sc_assert( sc_time_stamp() == sc_time(350, SC_NS) ); f43=1; break; + case 29: sc_assert( sc_time_stamp() == sc_time(510, SC_NS) ); f44=1; break; + case 30: sc_assert( sc_time_stamp() == sc_time(520, SC_NS) ); f45=1; break; + case 32: sc_assert( sc_time_stamp() == sc_time(540, SC_NS) ); f46=1; break; + case 33: sc_assert( sc_time_stamp() == sc_time(550, SC_NS) ); f47=1; break; + case 36: sc_assert( sc_time_stamp() == sc_time(600, SC_NS) ); f48=1; break; + default: sc_assert( false ); + } + event_list = m3.reset_event() | m3.terminated_event(); + next_trigger(event_list); + } + + void multiple_reset_handler() + { + sc_event_or_list or_list; + or_list |= m1.reset_event(); + or_list |= m2.reset_event(); + or_list |= m3.reset_event(); + or_list |= m4.reset_event(); + or_list |= m5.reset_event(); + + while (true) + { + wait(or_list); + switch (count) + { + case 27: sc_assert( sc_time_stamp() == sc_time(350, SC_NS) ); f50=1; break; + case 29: sc_assert( sc_time_stamp() == sc_time(510, SC_NS) ); f51=1; break; + case 30: sc_assert( sc_time_stamp() == sc_time(520, SC_NS) ); f52=1; break; + case 32: sc_assert( sc_time_stamp() == sc_time(540, SC_NS) ); f53=1; break; + case 33: sc_assert( sc_time_stamp() == sc_time(550, SC_NS) ); f54=1; break; + case 37: sc_assert( sc_time_stamp() == sc_time(610, SC_NS) ); f56=1; break; + case 38: sc_assert( sc_time_stamp() == sc_time(620, SC_NS) ); f58=1; break; + default: sc_assert( false ); + } + } + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + sc_allow_process_control_corners = true; // Andy's hack to switch on async_reset with method + + Top top("top"); + + sc_start(); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + sc_assert( top.f4 ); + sc_assert( top.f5 ); + sc_assert( top.f10 ); + sc_assert( top.f11 ); + sc_assert( top.f12 ); + sc_assert( top.f13 ); + sc_assert( top.f14 ); + sc_assert( top.f15 ); + sc_assert( top.f16 ); + sc_assert( top.f17 ); + sc_assert( top.f18 ); + sc_assert( top.f19 ); + sc_assert( top.f20 ); + + sc_assert( top.f30 ); + sc_assert( top.f31 ); + sc_assert( top.f32 ); + sc_assert( top.f33 ); + sc_assert( top.f34 ); + sc_assert( top.f35 ); + sc_assert( top.f36 ); + sc_assert( top.f37 ); + sc_assert( top.f38 ); + sc_assert( top.f39 ); + sc_assert( top.f40 ); + sc_assert( top.f41 ); + sc_assert( top.f42 ); + sc_assert( top.f43 ); + sc_assert( top.f44 ); + sc_assert( top.f45 ); + sc_assert( top.f46 ); + sc_assert( top.f47 ); + sc_assert( top.f48 ); + + sc_assert( top.f50 ); + sc_assert( top.f51 ); + sc_assert( top.f52 ); + sc_assert( top.f53 ); + sc_assert( top.f54 ); + sc_assert( top.f55 ); + sc_assert( top.f56 ); + sc_assert( top.f57 ); + sc_assert( top.f58 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/golden/mixed_child_procs.log b/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/golden/mixed_child_procs.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/golden/mixed_child_procs.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/mixed_child_procs.cpp b/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/mixed_child_procs.cpp new file mode 100644 index 000000000..58b185c13 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/mixed_child_procs/mixed_child_procs.cpp @@ -0,0 +1,214 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// mixed_child_procs.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: mixed_child_procs.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Process control methods applied where child process tree contains +// a mixture of method and thread processes + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +#include +using std::string; + +struct Top: sc_module +{ + Top(sc_module_name _name) + : count(0) + , index(0) + , n(30) + { + SC_THREAD(ctrl); + + opt.spawn_method(); + opt.set_sensitivity( &ev ); + + given_birth = new bool[n]; + + f0 = new int[n]; + f1 = new int[n]; + f2 = new int[n]; + f3 = new int[n]; + f4 = new int[n]; + f5 = new int[n]; + + for (int i = 0; i < n; i++) + { + given_birth[i] = false; + + f0[i] = 0; + f1[i] = 0; + f2[i] = 0; + f3[i] = 0; + f4[i] = 0; + f5[i] = 0; + } + + t = sc_spawn(sc_bind(&Top::child_thread, this, index++, 3)); + m = sc_spawn(sc_bind(&Top::child_method, this, index++, 3), "m", &opt); + } + + sc_spawn_options opt; + sc_process_handle t, m; + std::exception ex; + int count; + int index; + const int n; + int *f0, *f1, *f2, *f3, *f4, *f5; + bool *given_birth; + + sc_event ev; + + void ctrl() + { + wait(10, SC_NS); + + count = 1; + ev.notify(); + wait(10, SC_NS); + + count = 2; + t.throw_it(ex, SC_INCLUDE_DESCENDANTS); + m.throw_it(ex, SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + + count = 3; + t.sync_reset_on(SC_INCLUDE_DESCENDANTS); + m.sync_reset_on(SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + + count = 4; + ev.notify(); + wait(10, SC_NS); + + count = 5; + t.sync_reset_off(SC_INCLUDE_DESCENDANTS); + m.sync_reset_off(SC_INCLUDE_DESCENDANTS); + wait(10, SC_NS); + + count = 6; + ev.notify(); + wait(10, SC_NS); + } + + void child_thread(int i, int level) + { + //cout << "child_thread " << i << " at level " << level << " called at " << sc_time_stamp() << endl; + if (level > 0 && !given_birth[i]) + { + sc_spawn(sc_bind(&Top::child_thread, this, index++, level-1)); + sc_spawn(sc_bind(&Top::child_method, this, index++, level-1), "h", &opt); + given_birth[i] = true; + } + switch(count) + { + case 0: f0[i]=1; break; + case 4: f4[i]=1; break; + default: sc_assert(false); break; + } + while(true) + { + try { + wait(ev); + //cout << "child_thread " << i << " at level " << level << " awoke at " << sc_time_stamp() << endl; + switch(count) + { + case 1: f1[i]=1; break; + case 6: f5[i]=1; break; + default: sc_assert(false); break; + } + } + catch (const std::exception& e) { + //cout << "child_thread " << i << " at level " << level << " caught at " << sc_time_stamp() << endl; + switch(count) + { + case 2: f2[i]=1; break; + case 4: f3[i]=1; throw static_cast(e); + default: sc_assert(false); break; + } + } + } + } + + void child_method(int i, int level) + { + //cout << "child_method " << i << " at level " << level << " at " << sc_time_stamp() << endl; + if (level > 0 && !given_birth[i]) + { + sc_spawn(sc_bind(&Top::child_thread, this, index++, level-1)); + sc_spawn(sc_bind(&Top::child_method, this, index++, level-1), "m", &opt); + given_birth[i] = true; + } + switch(count) + { + case 0: f0[i]=2; break; + case 1: sc_assert(sc_time_stamp() == sc_time(10, SC_NS)); f1[i]=1; break; + case 4: f4[i]=1; break; + case 6: f5[i]=1; break; + default: sc_assert(false); break; + } + next_trigger(ev); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + sc_report_handler::set_actions(SC_WARNING, SC_DO_NOTHING); + + Top top("top"); + + sc_start(); + + sc_assert( top.index == top.n ); + + for (int i = 0; i < top.n; i++) + { + sc_assert( top.f0[i] ); + sc_assert( top.f1[i] ); + + if (top.f0[i] == 1) // i.e. a thread process + { + sc_assert( top.f2[i] ); + sc_assert( top.f3[i] ); + } + sc_assert( top.f4[i] ); + sc_assert( top.f5[i] ); + } + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/named_events/golden/named_events.log b/src/systemc/tests/systemc/1666-2011-compliance/named_events/golden/named_events.log new file mode 100644 index 000000000..254874664 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/named_events/golden/named_events.log @@ -0,0 +1,11 @@ +SystemC Simulation + +Warning: (W505) object already exists: top.ev2. Latter declaration will be renamed to top.ev2_0 +In file: + +Warning: (W505) object already exists: top. Latter declaration will be renamed to top_0 +In file: + +There should be two name clashes reported above + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/named_events/named_events.cpp b/src/systemc/tests/systemc/1666-2011-compliance/named_events/named_events.cpp new file mode 100644 index 000000000..c655cbb62 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/named_events/named_events.cpp @@ -0,0 +1,207 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// named_events.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: named_events.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Hierarchically named events + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Object: sc_object +{ + Object(const char* n) + : sc_object(n) + , ev((std::string(n) + "_ev").c_str()) {} + + sc_event ev; // Parent of event is containing module or process instance +}; + +struct Top: sc_module +{ + sc_event ev1, ev2; + Object *obj; + sc_signal sig; // Kernel events should not be hierarchically named + sc_fifo fifo; // Kernel events should not be hierarchically named + sc_semaphore sema; // Kernel events should not be hierarchically named + sc_mutex mut; // Kernel events should not be hierarchically named + + bool T_done; + + Top(sc_module_name _name) + : ev2("ev2") + , sig("sig") + , sema(1) + , T_done(false) + { + + sc_assert( ev1.in_hierarchy() ); + sc_assert( ev1.get_parent_object() == this ); + sc_assert( std::string(ev1.name()).substr(0,9) == "top.event" ); + sc_assert( std::string(ev1.basename()).substr(0,5) == "event" ); + + sc_assert( ev2.in_hierarchy() ); + sc_assert( ev2.get_parent_object() == this ); + sc_assert( std::string(ev2.name()) == "top.ev2" ); + sc_assert( std::string(ev2.basename()) == "ev2" ); + + sc_assert( sc_find_event("top.ev2") == &ev2 ); + + std::vector vec = this->get_child_events(); + sc_assert( vec.size() == 2 ); + + sc_process_handle dummy_handle; + sc_assert( dummy_handle.get_child_events().size() == 0 ); + sc_assert( std::string(dummy_handle.name()) == ""); + + obj = new Object("obj"); + vec = obj->get_child_events(); // Should return empty vector + sc_assert( vec.size() == 0 ); + + vec = this->get_child_events(); + sc_assert( vec.size() == 3 ); + + sc_assert( sc_find_event("top.obj_ev") == &obj->ev ); + + Object obj2("ev2"); // Name clash + + vec = this->get_child_events(); + sc_assert( vec.size() == 4 ); + + SC_THREAD(T); + } + + void T() + { + sc_event ev1("local1"); + sc_event ev2("local2"); + + sc_process_handle handle = sc_get_current_process_handle(); + std::string proc_name = handle.name(); + + sc_assert( ev1.in_hierarchy() ); + sc_assert( ev1.get_parent_object() == handle.get_process_object() ); + sc_assert( std::string(ev1.name()) == proc_name + ".local1" ); + sc_assert( std::string(ev1.basename()) == "local1" ); + sc_assert( sc_hierarchical_name_exists(ev1.name()) ); + + sc_assert( ev2.in_hierarchy() ); + sc_assert( ev2.get_parent_object() == handle.get_process_object() ); + sc_assert( std::string(ev2.name()) == proc_name + ".local2" ); + sc_assert( std::string(ev2.basename()) == "local2" ); + sc_assert( sc_hierarchical_name_exists(ev2.name()) ); + + std::vector vec = handle.get_child_events(); + sc_assert( vec.size() == 2 ); + sc_assert( vec[0] == &ev1 ); + sc_assert( vec[1] == &ev2 ); + + sc_assert( sc_find_event(ev1.name()) == &ev1 ); + sc_assert( sc_find_event(ev2.name()) == &ev2 ); + + T_done = true; + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + std::vector vec_o; + vec_o = sc_get_top_level_objects(); + sc_assert( vec_o.size() == 0 ); + + std::vector vec_e; + vec_e = sc_get_top_level_events(); + sc_assert( vec_e.size() == 0 ); + + sc_event ev("foo"); + + sc_assert( ev.in_hierarchy() ); + sc_assert( ev.get_parent_object() == 0 ); + sc_assert( std::string(ev.name()) == "foo" ); + sc_assert( std::string(ev.basename()) == "foo" ); + sc_assert( sc_hierarchical_name_exists("foo") ); + + vec_o = sc_get_top_level_objects(); + sc_assert( vec_o.size() == 0 ); + vec_e = sc_get_top_level_events(); + sc_assert( vec_e.size() == 1 ); + sc_assert( vec_e[0] == &ev ); + sc_assert( std::string(vec_e[0]->name()) == "foo" ); + + sc_assert( sc_find_event("foo") == &ev ); + + Top top("top"); + sc_assert( sc_hierarchical_name_exists("top") ); + sc_assert( sc_hierarchical_name_exists("top.ev2") ); + sc_assert( sc_hierarchical_name_exists("top.sig") ); + sc_assert( sc_hierarchical_name_exists("top.obj") ); + sc_assert( sc_hierarchical_name_exists("top.obj_ev") ); + sc_assert( !sc_hierarchical_name_exists("woowoo") ); + sc_assert( !sc_hierarchical_name_exists("top.woowoo") ); + + sc_event ev2; + + sc_assert( ev2.in_hierarchy() ); + sc_assert( ev2.get_parent_object() == 0 ); + sc_assert( std::string(ev2.name()).substr(0,5) == "event" ); + sc_assert( std::string(ev2.basename()).substr(0,5) == "event" ); + sc_assert( sc_hierarchical_name_exists(ev2.name()) ); + + vec_e = sc_get_top_level_events(); + sc_assert( vec_e.size() == 2); + + sc_event ev3("top"); // Name clash + vec_e = sc_get_top_level_events(); + sc_assert( vec_e.size() == 3); + vec_o = sc_get_top_level_objects(); + sc_assert( vec_o.size() == 1 ); + + sc_assert( sc_find_event(ev3.name()) == &ev3 ); + + sc_signal sig; // Kernel events should not be hierarchically named + vec_e = sc_get_top_level_events(); + sc_assert( vec_e.size() == 3 ); + vec_o = sc_get_top_level_objects(); + sc_assert( vec_o.size() == 2 ); + + sc_start(); + + sc_assert( top.T_done ); + + cout << endl << "There should be two name clashes reported above" << endl; + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/odds_and_ends/golden/odds_and_ends.log b/src/systemc/tests/systemc/1666-2011-compliance/odds_and_ends/golden/odds_and_ends.log new file mode 100644 index 000000000..bb048354f --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/odds_and_ends/golden/odds_and_ends.log @@ -0,0 +1,35 @@ +SystemC Simulation +task1 or task2 completed +task1 or task2 completed +T2 at 10 ns +T2 at 20 ns +suspend at 25 ns +resume at 45 ns +T2 at 45 ns +T2 at 50 ns +T2 at 60 ns +disable at 65 ns +enable at 85 ns +T2 at 90 ns +T2 at 100 ns +reset_handler() called at 105 ns +T2 at 110 ns +T2 at 120 ns +kill_handler() called at 125 ns +Reentering sc_start at 145 ns +Reentering sc_start at 150 ns +Reentering sc_start at 150 ns +Reentering sc_start at 160 ns +Reentering sc_start at 160 ns +Reentering sc_start at 170 ns +Reentering sc_start at 170 ns +Reentering sc_start at 180 ns +Reentering sc_start at 180 ns +Reentering sc_start at 190 ns +Reentering sc_start at 190 ns +Reentering sc_start at 195 ns + +Info: /OSCI/SystemC: Simulation stopped by user. +sc_max_time() = 18446744073709551615 ps + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/odds_and_ends/odds_and_ends.cpp b/src/systemc/tests/systemc/1666-2011-compliance/odds_and_ends/odds_and_ends.cpp new file mode 100644 index 000000000..aac544b1b --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/odds_and_ends/odds_and_ends.cpp @@ -0,0 +1,207 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// odds_and_ends.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: odds_and_ends.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Quick test of new features in 1666-2011 + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using std::cout; +using std::endl; + +SC_MODULE(Top) +{ + SC_CTOR(Top) + { + SC_THREAD(gen); + SC_THREAD(T1); + h1 = sc_get_current_process_handle(); + SC_THREAD(T2); + h2 = sc_get_current_process_handle(); + + // Complete for mutex + SC_THREAD(task1); + SC_THREAD(task2); + + SC_METHOD(reset_handler); + dont_initialize(); + sensitive << h2.reset_event(); + + SC_METHOD(kill_handler); + dont_initialize(); + sensitive << h2.terminated_event(); + + SC_THREAD(T3); + + end_of_T1 = end_of_T3 = T3A_called = T3B_called = false; + } + + sc_event ev; + + sc_process_handle h1, h2; + bool end_of_T1, end_of_T3; + + void gen() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void T1() + { + wait(25, SC_NS); + cout << "suspend at " << sc_time_stamp() << endl; + h2.suspend(); + wait(20, SC_NS); + cout << "resume at " << sc_time_stamp() << endl; + h2.resume(); + wait(20, SC_NS); + + cout << "disable at " << sc_time_stamp() << endl; + h2.disable(); + wait(20, SC_NS); + cout << "enable at " << sc_time_stamp() << endl; + h2.enable(); + wait(20, SC_NS); + + h2.reset(); + wait(20, SC_NS); + + h2.kill(); + wait(20, SC_NS); + + sc_pause(); + wait(50, SC_NS); + sc_stop(); + end_of_T1 = true; + } + + void T2() + { + for (;;) + { + wait(ev); + cout << "T2 at " << sc_time_stamp() << endl; + } + } + + void task1() + { + resource(); + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) || sc_time_stamp() == sc_time(20, SC_NS) ); + cout << "task1 or task2 completed" << endl; + } + + void task2() + { + resource(); + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) || sc_time_stamp() == sc_time(20, SC_NS) ); + cout << "task1 or task2 completed" << endl; + } + + void resource() + { + sc_mutex mut; + mut.lock(); + wait(10, SC_NS); + mut.unlock(); + } + + void reset_handler() + { + cout << "reset_handler() called at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() == sc_time(105, SC_NS) ); + sc_assert( !sc_is_unwinding() ); + } + + void kill_handler() + { + cout << "kill_handler() called at " << sc_time_stamp() << endl; + sc_assert( sc_time_stamp() == sc_time(125, SC_NS) ); + sc_assert( !sc_is_unwinding() ); + } + + void T3() + { + wait(10, SC_NS); + SC_FORK + t3a = sc_spawn(sc_bind( &Top::T3A, this)), + t3b = sc_spawn(sc_bind( &Top::T3B, this)) + SC_JOIN + if (t3a.valid()) sc_assert( t3a.terminated() ); + if (t3b.valid()) sc_assert( t3b.terminated() ); + end_of_T3 = true; + } + + sc_process_handle t3a, t3b; + bool T3A_called; + bool T3B_called; + + void T3A() + { + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + wait(5, SC_NS); + T3A_called = true; + } + + void T3B() + { + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + wait(7, SC_NS); + T3B_called = true; + } +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + sc_start(); + + while (sc_pending_activity() && sc_get_status() != SC_STOPPED) + { + cout << "Reentering sc_start at " << sc_time_stamp() << endl; + sc_start(sc_time_to_pending_activity()); + } + + cout << "sc_max_time() = " << sc_max_time() << endl; + sc_assert( sc_get_status() == SC_STOPPED ); + + sc_assert( top.end_of_T1 ); + sc_assert( top.end_of_T3 ); + sc_assert( top.T3A_called ); + sc_assert( top.T3B_called ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/old_event_bug/golden/old_event_bug.log b/src/systemc/tests/systemc/1666-2011-compliance/old_event_bug/golden/old_event_bug.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/old_event_bug/golden/old_event_bug.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/old_event_bug/old_event_bug.cpp b/src/systemc/tests/systemc/1666-2011-compliance/old_event_bug/old_event_bug.cpp new file mode 100644 index 000000000..e776ceb00 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/old_event_bug/old_event_bug.cpp @@ -0,0 +1,147 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// old_event_bug.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: old_event_bug.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Longstanding bug when checking for events in signals + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + : counti(0) + , countb(0) + , reached_the_end(false) + { + SC_THREAD(T); + + SC_METHOD(MI); + sensitive << sigi; + dont_initialize(); + + SC_METHOD(MB); + sensitive << sigb; + dont_initialize(); + + sigi.write(0); + sigb.write(false); + sigi_dummy.write(0); + sigb_dummy.write(false); + } + + int counti; + int countb; + bool reached_the_end; + + sc_signal sigi; + sc_signal sigb; + + sc_signal sigi_dummy; + sc_signal sigb_dummy; + + void T() + { + sc_assert( sigi.event() == false ); + sc_assert( sigb.event() == false ); + sc_assert( sigb.posedge() == false ); + sc_assert( sigb.negedge() == false ); + + sigi.write(1); + wait(sigi.value_changed_event()); + sc_assert( sigi.event() ); + + sigb.write(true); + wait(sigb.value_changed_event()); + sc_assert( sigb.event() ); + sc_assert( sigb.posedge() ); + sc_assert( sigb.negedge() == false ); + + wait(1, SC_NS); + + sc_assert( sigi.event() == false ); + sc_assert( sigb.event() == false ); + + sigi.write(2); + sigb.write(false); + + wait(1, SC_NS); + + sc_assert( sigi.event() == false ); + sc_assert( sigb.event() == false ); + sc_assert( sigb.posedge() == false ); + sc_assert( sigb.negedge() == false ); + + sigi_dummy.write(1); + sigb_dummy.write(true); + + wait(1, SC_NS); + + sc_assert( sigi_dummy.event() == false ); + sc_assert( sigb_dummy.event() == false ); + sc_assert( sigb_dummy.posedge() == false ); + sc_assert( sigb_dummy.negedge() == false ); + + reached_the_end = true; + } + + void MI() + { + sc_assert( sigi.event() ); + ++counti; + } + + void MB() + { + sc_assert( sigb.event() ); + ++countb; + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.counti == 2 ); + sc_assert( top.countb == 2 ); + sc_assert( top.reached_the_end ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/overkill_bug/golden/overkill_bug.log b/src/systemc/tests/systemc/1666-2011-compliance/overkill_bug/golden/overkill_bug.log new file mode 100644 index 000000000..1b72448a0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/overkill_bug/golden/overkill_bug.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Warning: (W540) kill/reset ignored during unwinding: top.target +In file: +In process: top.target @ 10 ns + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/overkill_bug/overkill_bug.cpp b/src/systemc/tests/systemc/1666-2011-compliance/overkill_bug/overkill_bug.cpp new file mode 100644 index 000000000..b66f4955f --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/overkill_bug/overkill_bug.cpp @@ -0,0 +1,88 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// overkill_bug.cpp -- test for +// +// Original Author: John Aynsley, Doulus +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// + +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(target); + target_handle = sc_get_current_process_handle(); + f0 = 0; + } + + struct bomb + { + sc_process_handle h; + + bomb(sc_process_handle _h) + { + h = _h; + } + + ~bomb() + { + h.kill(); // Aborts !!!!!! + } + }; + + sc_process_handle target_handle; + int f0; + + void target() + { + bomb local_obj(target_handle); + + wait(10, SC_NS); + + f0 = 1; + target_handle.kill(); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f0 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl/golden/proc_ctrl.log b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl/golden/proc_ctrl.log new file mode 100644 index 000000000..cdf4578d6 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl/golden/proc_ctrl.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl/proc_ctrl.cpp b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl/proc_ctrl.cpp new file mode 100644 index 000000000..b8e9f2569 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl/proc_ctrl.cpp @@ -0,0 +1,295 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// proc_ctrl.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: proc_ctrl.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Basic functionality of process control methods + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using sc_core::sc_process_handle; +using sc_core::sc_event; +using sc_core::sc_get_current_process_handle; +using sc_core::SC_NS; +using sc_core::sc_time; +using sc_core::sc_time_stamp; +using sc_core::sc_stop; +using sc_core::sc_unwind_exception; +using sc_core::sc_is_unwinding; +using sc_core::sc_start; +using sc_core::SC_ZERO_TIME; +using std::cout; +using std::endl; + +SC_MODULE(Top) +{ + SC_CTOR(Top) + : count(0) + { + SC_METHOD(gen); + sensitive << ev; + + SC_THREAD(ctrl); + + SC_THREAD(target); + t1 = sc_get_current_process_handle(); + + f0 = f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + f10 = f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = f23 = f24 = f25 = f26 = f27 = f28 = f29 = 0; + } + + sc_process_handle t1, t2; + sc_event ev; + int count; + int f0, f1, f2, f3, f4, f5, f6, f7, f8, f9; + int f10, f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22, f23, f24, f25, f26, f27, f28, f29; + + void gen() + { + ev.notify(10, SC_NS); + } + + void ctrl() + { + wait(SC_ZERO_TIME); + + count = 1; + wait(15, SC_NS); + + count = 2; + t1.suspend(); + wait(20, SC_NS); + + count = 3; + t1.reset(); // Reset takes priority over suspend + wait(20, SC_NS); + + count = 4; + t1.reset(); // Reset takes priority over suspend + wait(20, SC_NS); + + count = 5; + t1.resume(); + wait(SC_ZERO_TIME); + + count = 6; + wait(10, SC_NS); + + count = 7; + wait(10, SC_NS); + + count = 8; + t1.reset(); + + count = 9; + wait(10, SC_NS); + + count = 10; + wait(10, SC_NS); + + count = 11; + t1.disable(); + wait(20, SC_NS); + + count = 12; + t1.reset(); // Reset takes priority over enable + + count = 13; + wait(20, SC_NS); + + count = 14; + t1.reset(); // Reset takes priority over enable + + count = 15; + wait(20, SC_NS); + + count = 16; + t1.enable(); + wait(SC_ZERO_TIME); + + count = 17; + wait(10, SC_NS); + + count = 18; + wait(10, SC_NS); + + count = 19; + t1.disable(); + wait(SC_ZERO_TIME); + + count = 20; + wait(20, SC_NS); + + count = 21; + t1.suspend(); + wait(20, SC_NS); + + count = 22; + t1.enable(); + wait(SC_ZERO_TIME); + + count = 23; + wait(20, SC_NS); + + count = 24; + t1.resume(); + wait(SC_ZERO_TIME); + + count = 25; + wait(10, SC_NS); + + count = 26; + wait(10, SC_NS); + + count = 27; + t1.suspend(); + + count = 28; + wait(20, SC_NS); + + count = 29; + t1.kill(); // kill takes priority over suspend + wait(20, SC_NS); + + count = 30; + t1.resume(); + wait(20, SC_NS); + + count = 31; + sc_assert( !sc_is_unwinding() ); + if (t1.valid()) + sc_assert( !t1.is_unwinding() ); + + sc_stop(); + } + + void target() + { + sc_assert( !sc_is_unwinding() ); + + switch(count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); f1=1; break; + case 3: sc_assert( sc_time_stamp() == sc_time(35, SC_NS) ); f3=1; break; + case 4: sc_assert( sc_time_stamp() == sc_time(55, SC_NS) ); f4=1; break; + case 8: sc_assert( sc_time_stamp() == sc_time(95, SC_NS) ); f8=1; break; + case 12: sc_assert( sc_time_stamp() == sc_time(135, SC_NS) ); f11=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(155, SC_NS) ); f12=1; break; + default: sc_assert( false ); break; + } + + for(;;) + { + try { + wait(ev); + + switch(count) + { + case 1: sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); f2=1; break; + case 5: sc_assert( sc_time_stamp() == sc_time(75, SC_NS) ); f5=1; break; + case 6: sc_assert( sc_time_stamp() == sc_time(80, SC_NS) ); f6=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(90, SC_NS) ); f7=1; break; + case 9: sc_assert( sc_time_stamp() == sc_time(100, SC_NS) ); f9=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); f10=1; break; + case 17: sc_assert( sc_time_stamp() == sc_time(180, SC_NS) ); f13=1; break; + case 18: sc_assert( sc_time_stamp() == sc_time(190, SC_NS) ); f14=1; break; + case 24: sc_assert( sc_time_stamp() == sc_time(255, SC_NS) ); f15=1; break; + case 25: sc_assert( sc_time_stamp() == sc_time(260, SC_NS) ); f16=1; break; + case 26: sc_assert( sc_time_stamp() == sc_time(270, SC_NS) ); f17=1; break; + default: sc_assert( false ); break; + } + + } + catch (const sc_unwind_exception& e) + { + sc_assert( sc_is_unwinding() ); + + if (count == 29) + { + sc_assert( e.is_reset() == false ); f24=1; + } + switch(count) + { + case 3: sc_assert( sc_time_stamp() == sc_time(35, SC_NS) ); f18=1; break; + case 4: sc_assert( sc_time_stamp() == sc_time(55, SC_NS) ); f19=1; break; + case 8: sc_assert( sc_time_stamp() == sc_time(95, SC_NS) ); f20=1; break; + case 12: sc_assert( sc_time_stamp() == sc_time(135, SC_NS) ); f21=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(155, SC_NS) ); f22=1; break; + case 29: sc_assert( sc_time_stamp() == sc_time(295, SC_NS) ); f23=1; break; + default: sc_assert( false ); break; + } + + throw e; + } + } + } +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + sc_start(); + + sc_assert(top.f1); + sc_assert(top.f2); + sc_assert(top.f3); + sc_assert(top.f4); + sc_assert(top.f5); + sc_assert(top.f6); + sc_assert(top.f7); + sc_assert(top.f8); + sc_assert(top.f9); + sc_assert(top.f10); + sc_assert(top.f11); + sc_assert(top.f12); + sc_assert(top.f13); + sc_assert(top.f14); + sc_assert(top.f15); + sc_assert(top.f16); + sc_assert(top.f17); + sc_assert(top.f18); + sc_assert(top.f19); + sc_assert(top.f20); + sc_assert(top.f21); + sc_assert(top.f22); + sc_assert(top.f23); + sc_assert(top.f24); + /* + sc_assert(top.f25); + sc_assert(top.f26); + sc_assert(top.f27); + sc_assert(top.f28); + sc_assert(top.f29); + */ + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_elab/golden/proc_ctrl_elab.log b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_elab/golden/proc_ctrl_elab.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_elab/golden/proc_ctrl_elab.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_elab/proc_ctrl_elab.cpp b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_elab/proc_ctrl_elab.cpp new file mode 100644 index 000000000..a89120921 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_elab/proc_ctrl_elab.cpp @@ -0,0 +1,534 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// proc_ctrl_elab.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: proc_ctrl_elab.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Calling process control methods during elaboration + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include "systemc.h" + +SC_MODULE(Top) +{ + SC_CTOR(Top) + : caught_throw_it(0) + , caught_reset(0) + , caught_kill(0) + + , target_suspend_1_called(false) + , target_suspend_2_called(false) + , target_suspend_3_called(false) + , target_suspend_4_called(false) + , target_suspend_5_called(false) + + , target_disable_1_called(false) + , target_disable_2_called(false) + , target_disable_2_called_again(false) + , target_disable_3_called(false) + , target_disable_4_called(false) + , target_disable_5_called(false) + + , target_sync_reset_1_called(false) + , target_sync_reset_2_called(false) + , target_sync_reset_3_called(false) + , target_sync_reset_4_called(false) + + , reset_1_count(0) + , reset_2_count(0) + , reset_3_count(0) + , reset_4_count(0) + { + SC_THREAD(ctrl); + + SC_THREAD(target_suspend_1); + sensitive << ev; + ts1 = sc_get_current_process_handle(); + + SC_THREAD(target_suspend_2); + dont_initialize(); + sensitive << ev; + ts2 = sc_get_current_process_handle(); + + SC_THREAD(target_suspend_3); + dont_initialize(); + sensitive << ev; + ts3 = sc_get_current_process_handle(); + + SC_THREAD(target_suspend_4); + dont_initialize(); + sensitive << ev; + ts4 = sc_get_current_process_handle(); + ts4.suspend(); + + SC_THREAD(target_suspend_5); + dont_initialize(); + sensitive << ev; + ts5 = sc_get_current_process_handle(); + ts5.suspend(); + ts5.resume(); + + SC_THREAD(target_disable_1); + sensitive << dummy_ev; + td1 = sc_get_current_process_handle(); + + SC_THREAD(target_disable_2); + sensitive << ev; + td2 = sc_get_current_process_handle(); + + SC_THREAD(target_disable_3); + td3 = sc_get_current_process_handle(); + + SC_THREAD(target_disable_4); + dont_initialize(); + sensitive << ev; + td4 = sc_get_current_process_handle(); + td4.disable(); + + SC_THREAD(target_disable_5); + dont_initialize(); + sensitive << ev; + td5 = sc_get_current_process_handle(); + td5.disable(); + td5.enable(); + td5.sync_reset_on(); + td5.sync_reset_off(); + + SC_THREAD(target_sync_reset_1); + sensitive << ev; + tr1 = sc_get_current_process_handle(); + + SC_THREAD(target_sync_reset_2); + sensitive << ev; + tr2 = sc_get_current_process_handle(); + + SC_THREAD(target_sync_reset_3); + dont_initialize(); + sensitive << ev; + tr3 = sc_get_current_process_handle(); + + SC_THREAD(target_sync_reset_4); + dont_initialize(); + sensitive << ev; + tr4 = sc_get_current_process_handle(); + tr4.sync_reset_on(); + + try { + ts2.throw_it(ex); + sc_assert( false ); + } + catch (std::exception e) { + ++caught_throw_it; + } + + try { + ts2.reset(); + sc_assert( false ); + } + catch (std::exception e) { + ++caught_reset; + } + + try { + ts2.kill(); + sc_assert( false ); + } + catch (std::exception e) { + ++caught_kill; + } + } + + void before_end_of_elaboration() + { + ts1.suspend(); + ts2.suspend(); + ts3.suspend(); + + td1.disable(); + td2.disable(); + td3.disable(); + + tr1.sync_reset_on(); + tr2.sync_reset_on(); + tr3.sync_reset_on(); + + try { + ts2.throw_it(ex); + sc_assert( false ); + } + catch (std::exception e) { + ++caught_throw_it; + } + + try { + ts2.reset(); + sc_assert( false ); + } + catch (std::exception e) { + ++caught_reset; + } + + try { + ts2.kill(); + sc_assert( false ); + } + catch (std::exception e) { + ++caught_kill; + } + } + + void start_of_simulation() + { + td3.enable(); + tr3.sync_reset_off(); + + try { + ts2.throw_it(ex); + sc_assert( false ); + } + catch (std::exception e) { + ++caught_throw_it; + } + + try { + ts2.reset(); + sc_assert( false ); + } + catch (std::exception e) { + ++caught_reset; + } + + try { + ts2.kill(); + sc_assert( false ); + } + catch (std::exception e) { + ++caught_kill; + } + } + + sc_event ev, dummy_ev; + + std::exception ex; + + sc_process_handle ts1; + sc_process_handle ts2; + sc_process_handle ts3; + sc_process_handle ts4; + sc_process_handle ts5; + + sc_process_handle td1; + sc_process_handle td2; + sc_process_handle td3; + sc_process_handle td4; + sc_process_handle td5; + + sc_process_handle tr1; + sc_process_handle tr2; + sc_process_handle tr3; + sc_process_handle tr4; + + int caught_throw_it; + int caught_reset; + int caught_kill; + + bool target_suspend_1_called; + bool target_suspend_2_called; + bool target_suspend_3_called; + bool target_suspend_4_called; + bool target_suspend_5_called; + + bool target_disable_1_called; + bool target_disable_2_called; + bool target_disable_2_called_again; + bool target_disable_3_called; + bool target_disable_4_called; + bool target_disable_5_called; + + bool target_sync_reset_1_called; + bool target_sync_reset_2_called; + bool target_sync_reset_3_called; + bool target_sync_reset_4_called; + + int reset_1_count; + int reset_2_count; + int reset_3_count; + int reset_4_count; + + void ctrl() + { + ts3.resume(); + + wait(10, SC_NS); + ts1.resume(); + ev.notify(); + + wait(10, SC_NS); + ts2.resume(); + tr2.sync_reset_off(); + tr4.sync_reset_off(); + + wait(10, SC_NS); + td2.enable(); + + wait(10, SC_NS); + ev.notify(); + + wait(10, SC_NS); + ev.notify(); + td2.disable(); + + wait(10, SC_NS); + td4.enable(); + ts4.resume(); + ev.notify(); + } + + void target_suspend_1() + { + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + target_suspend_1_called = true; + } + + void target_suspend_2() + { + sc_assert( sc_time_stamp() == sc_time(20, SC_NS) ); + target_suspend_2_called = true; + } + + void target_suspend_3() + { + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + target_suspend_3_called = true; + } + + void target_suspend_4() + { + sc_assert( sc_time_stamp() == sc_time(60, SC_NS) ); + target_suspend_4_called = true; + } + + void target_suspend_5() + { + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + target_suspend_5_called = true; + ts5.suspend(); + } + + void target_disable_1() + { + sc_assert( false ); + target_disable_1_called = true; + } + + void target_disable_2() + { + sc_assert( sc_time_stamp() == sc_time(40, SC_NS) ); + target_disable_2_called = true; + wait(); // on ev + + sc_assert( sc_time_stamp() == sc_time(50, SC_NS) ); + target_disable_2_called_again = true; + } + + void target_disable_3() + { + sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); + sc_assert( sc_delta_count() == 0 ); + target_disable_3_called = true; + } + + void target_disable_4() + { + sc_assert( sc_time_stamp() == sc_time(60, SC_NS) ); + target_disable_4_called = true; + } + + void target_disable_5() + { + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + target_disable_5_called = true; + td5.disable(); + } + + void target_sync_reset_1() + { + switch (reset_1_count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); + sc_assert( sc_delta_count() == 0 ); + break; + case 1: sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + break; + case 2: sc_assert( sc_time_stamp() == sc_time(40, SC_NS) ); + break; + case 3: sc_assert( sc_time_stamp() == sc_time(50, SC_NS) ); + target_sync_reset_1_called = true; + break; + } + ++reset_1_count; + + while (true) + { + wait(); + sc_assert( false ); + } + } + + void target_sync_reset_2() + { + switch (reset_2_count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); + sc_assert( sc_delta_count() == 0 ); + break; + case 1: sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + break; + case 2: sc_assert( false ); + break; + case 3: sc_assert( false ); + break; + } + ++reset_2_count; + + while (true) + { + wait(); + + switch (reset_2_count) + { + case 0: sc_assert( false ); + break; + case 1: sc_assert( false ); + break; + case 2: sc_assert( sc_time_stamp() == sc_time(40, SC_NS) ); + break; + case 3: sc_assert( sc_time_stamp() == sc_time(50, SC_NS) ); + target_sync_reset_2_called = true; + break; + } + ++reset_2_count; + + } + } + + void target_sync_reset_3() + { + switch (reset_3_count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + break; + case 1: sc_assert( false ); + break; + case 2: sc_assert( false ); + break; + } + ++reset_3_count; + + while (true) + { + wait(); + + switch (reset_3_count) + { + case 0: sc_assert( false ); + break; + case 1: sc_assert( sc_time_stamp() == sc_time(40, SC_NS) ); + break; + case 2: sc_assert( sc_time_stamp() == sc_time(50, SC_NS) ); + target_sync_reset_3_called = true; + break; + } + ++reset_3_count; + + } + } + + void target_sync_reset_4() + { + switch (reset_4_count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + break; + case 1: sc_assert( false ); + break; + case 2: sc_assert( false ); + break; + } + ++reset_4_count; + + while (true) + { + wait(); + + switch (reset_4_count) + { + case 0: sc_assert( false ); + break; + case 1: sc_assert( sc_time_stamp() == sc_time(40, SC_NS) ); + break; + case 2: sc_assert( sc_time_stamp() == sc_time(50, SC_NS) ); + target_sync_reset_4_called = true; + break; + } + ++reset_4_count; + + } + } +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + sc_start(); + + sc_assert( top.caught_throw_it == 3 ); + sc_assert( top.caught_reset == 3 ); + sc_assert( top.caught_kill == 3 ); + + sc_assert( top.target_suspend_1_called ); + sc_assert( top.target_suspend_2_called ); + sc_assert( top.target_suspend_3_called ); + sc_assert( top.target_suspend_4_called ); + sc_assert( top.target_suspend_5_called ); + + sc_assert( !top.target_disable_1_called ); + sc_assert( top.target_disable_2_called ); + sc_assert( top.target_disable_2_called_again ); + sc_assert( top.target_disable_3_called ); + sc_assert( top.target_disable_4_called ); + sc_assert( top.target_disable_5_called ); + + sc_assert( top.target_sync_reset_1_called ); + sc_assert( top.target_sync_reset_2_called ); + sc_assert( top.target_sync_reset_3_called ); + sc_assert( top.target_sync_reset_4_called ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_immed/golden/proc_ctrl_immed.log b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_immed/golden/proc_ctrl_immed.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_immed/golden/proc_ctrl_immed.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_immed/proc_ctrl_immed.cpp b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_immed/proc_ctrl_immed.cpp new file mode 100644 index 000000000..69a607198 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_immed/proc_ctrl_immed.cpp @@ -0,0 +1,413 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// proc_ctrl_immed.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: proc_ctrl_immed.cpp,v $ +// Revision 1.3 2011/09/01 15:47:15 acg +// John Aynsley: correction for immediate method invocation on reset. +// +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Process control methods executed immediately in same eval phase + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + : count(0), reset_count(0) + { + SC_THREAD(ctrl); + SC_THREAD(target_thread); + t = sc_get_current_process_handle(); + + SC_METHOD(target_method); + sensitive << ev; + dont_initialize(); + m = sc_get_current_process_handle(); + m.disable(); + + SC_METHOD(thread_reset_handler); + sensitive << t.reset_event(); + dont_initialize(); + + SC_METHOD(method_reset_handler); + sensitive << m.reset_event(); + dont_initialize(); + + SC_METHOD(thread_terminated_handler); + sensitive << t.terminated_event(); + dont_initialize(); + + SC_METHOD(method_terminated_handler); + sensitive << m.terminated_event(); + dont_initialize(); + + SC_METHOD(yield_helper_method); + sensitive << yield_event_1; + dont_initialize(); + + f0 = f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + f10 = f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = f23 = f24 = f25 = f26 = f27 = f28 = f29 = 0; + f30 = f31 = f32 = f33 = f34 = f35 = f36 = f37 = f38 = f39 = 0; + } + + sc_event yield_event_1, yield_event_2, target_awoke_event; + int count, reset_count; + int f0, f1, f2, f3, f4, f5, f6, f7, f8, f9; + int f10, f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22, f23, f24, f25, f26, f27, f28, f29; + int f30, f31, f32, f33, f34, f35, f36, f37, f38, f39; + + sc_event ev; + sc_process_handle t, m; + std::exception ex; + + void ctrl() + { + wait(SC_ZERO_TIME); + sc_assert( sc_delta_count() == 1 ); + + count = 1; + ev.notify(); + wait(target_awoke_event); + + count = 2; + ev.notify(); + t.suspend(); + yield(); + + count = 2; + t.resume(); + wait(target_awoke_event); + + count = 3; + ev.notify(); + t.disable(); + wait(target_awoke_event); + + count = 4; + ev.notify(); + yield(); + + count = 5; + t.enable(); + yield(); + + count = 6; + ev.notify(); + wait(target_awoke_event); + + count = 7; + t.suspend(); + ev.notify(); + yield(); + + count = 8; + t.resume(); + wait(target_awoke_event); + + count = 9; + reset_count = 9; + t.sync_reset_on(); + ev.notify(); + wait(target_awoke_event); + + count = 10; + reset_count = 10; + ev.notify(); + wait(target_awoke_event); + + count = 11; + t.sync_reset_off(); + ev.notify(); + wait(target_awoke_event); + + count = 12; + t.resume(); + t.enable(); + t.sync_reset_off(); + yield(); + + count = 13; + ev.notify(); + wait(target_awoke_event); + + count = 14; + reset_count = 14; + t.reset(); + + count = 15; + ev.notify(); + wait(target_awoke_event); + + count = 16; + reset_count = 16; + t.reset(); + + count = 17; + t.throw_it(ex); + + count = 18; + t.kill(); + yield(); + + count = 19; + m.enable(); + ev.notify(); + wait(target_awoke_event); + + count = 20; + ev.notify(); + m.suspend(); + yield(); + + count = 21; + m.resume(); + wait(target_awoke_event); + + count = 22; + m.suspend(); + ev.notify(); + yield(); + + count = 23; + m.resume(); + wait(target_awoke_event); + + count = 24; + m.suspend(); + ev.notify(); + + count = 25; + m.resume(); + wait(target_awoke_event); + + count = 26; + reset_count = 26; + m.sync_reset_on(); + ev.notify(); + wait(target_awoke_event); + + count = 27; + m.disable(); + ev.notify(); + yield(); + + count = 28; + reset_count = 28; + m.enable(); + ev.notify(); + wait(target_awoke_event); + + count = 29; + m.sync_reset_off(); + m.enable(); + m.resume(); + yield(); + + count = 30; + reset_count = 30; + m.reset(); + + count = 31; + m.kill(); + yield(); + + sc_assert( sc_delta_count() == 1 ); + f27 = 1; + } + + void target_thread() + { + switch (count) + { + case 0: f0=1; break; + case 9: f7=1; break; + case 10: f9=1; break; + case 14: f13=1; break; + case 16: f16=1; break; + default: sc_assert(false); break; + } + while (true) + { + try { + target_awoke_event.notify(); + wait(ev); + } + catch (const std::exception& e) { + switch (count) + { + case 9: sc_assert(sc_is_unwinding()); f6=1; break; + case 10: sc_assert(sc_is_unwinding()); f8=1; break; + case 14: sc_assert(sc_is_unwinding()); f12=1; break; + case 16: sc_assert(sc_is_unwinding()); f15=1; break; + case 17: sc_assert( !sc_is_unwinding() ); f17=1; break; + case 18: sc_assert(sc_is_unwinding()); f19=1; break; + default: sc_assert(false); break; + } + if ( sc_is_unwinding() ) + throw dynamic_cast(e); + } + switch (count) + { + case 1: f1=1; break; + case 2: f2=1; break; + case 3: f3=1; break; + case 6: f4=1; break; + case 8: f5=1; break; + case 11: f10=1; break; + case 13: f11=1; break; + case 15: f14=1; break; + case 17: f18=1; break; + default: sc_assert(false); break; + } + } + } + + void target_method() + { + switch (count) + { + case 19: f20=1; break; + case 21: f21=1; break; + case 23: f22=1; break; + case 25: f23=1; break; + case 26: f24=1; break; + case 28: f25=1; break; + case 30: f26=1; break; + default: sc_assert(false); break; + } + target_awoke_event.notify(); + } + + void thread_reset_handler() + { + switch (reset_count) + { + case 9: f30=1; break; + case 10: f31=1; break; + case 14: f32=1; break; + case 16: f33=1; break; + default: sc_assert(false); break; + } + } + + void method_reset_handler() + { + switch (reset_count) + { + case 26: f34=1; break; + case 28: f35=1; break; + case 30: f36=1; break; + default: sc_assert(false); break; + } + } + + void thread_terminated_handler() + { + sc_assert(count == 18); + sc_assert(sc_delta_count() == 1); + f37 = 1; + } + + void method_terminated_handler() + { + sc_assert(count == 31); + sc_assert(sc_delta_count() == 1); + f38 = 1; + } + + void yield() + { + yield_event_1.notify(); + wait(yield_event_2); + } + + void yield_helper_method() + { + yield_event_2.notify(); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + sc_assert( top.f4 ); + sc_assert( top.f5 ); + sc_assert( top.f6 ); + sc_assert( top.f7 ); + sc_assert( top.f8 ); + sc_assert( top.f9 ); + sc_assert( top.f10 ); + sc_assert( top.f11 ); + sc_assert( top.f12 ); + sc_assert( top.f13 ); + sc_assert( top.f14 ); + sc_assert( top.f15 ); + sc_assert( top.f16 ); + sc_assert( top.f17 ); + sc_assert( top.f18 ); + sc_assert( top.f19 ); + sc_assert( top.f20 ); + sc_assert( top.f21 ); + sc_assert( top.f22 ); + sc_assert( top.f23 ); + sc_assert( top.f24 ); + sc_assert( top.f25 ); + sc_assert( top.f26 ); + sc_assert( top.f27 ); + + sc_assert( top.f30 ); + sc_assert( top.f31 ); + sc_assert( top.f32 ); + sc_assert( top.f33 ); + sc_assert( top.f34 ); + sc_assert( top.f35 ); + sc_assert( top.f36 ); + sc_assert( top.f37 ); + sc_assert( top.f38 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_priority/golden/proc_ctrl_priority.log b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_priority/golden/proc_ctrl_priority.log new file mode 100644 index 000000000..cdf4578d6 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_priority/golden/proc_ctrl_priority.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_priority/proc_ctrl_priority.cpp b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_priority/proc_ctrl_priority.cpp new file mode 100644 index 000000000..1f8c9d71a --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_priority/proc_ctrl_priority.cpp @@ -0,0 +1,377 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// proc_ctrl_priority.cpp -- test for +// +// Original Author: John Aynsley, Doulus +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: proc_ctrl_priority.cpp,v $ +// Revision 1.3 2011/09/05 21:23:35 acg +// Philipp A. Hartmann: eliminate compiler warnings. +// +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Priority of process control methods suspend, disable, sync_reset_on, reset + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(calling); + + SC_THREAD(target); + t = sc_get_current_process_handle(); + + count = 0; + f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + f10 = f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = f23 = f24 = f25 = f26 = f27 = f28 = f29 = 0; + } + + sc_process_handle t; + sc_event ev; + int count; + bool target_awoke; + int f1, f2, f3, f4, f5, f6, f7, f8, f9; + int f10, f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22, f23, f24, f25, f26, f27, f28, f29; + + void calling() + { + count = 0; + wait(SC_ZERO_TIME); + + count = 1; + ev.notify(5, SC_NS); + wait(10, SC_NS); + + count = 2; + ev.notify(5, SC_NS); + t.disable(); + wait(10, SC_NS); + + count = 3; + ev.notify(5, SC_NS); + t.disable(); + t.disable(); // Dummy + t.resume(); + t.resume(); + t.sync_reset_off(); // Dummy + t.sync_reset_off(); // Dummy + wait(10, SC_NS); + + count = 4; + ev.notify(5, SC_NS); + t.enable(); + wait(10, SC_NS); + + count = 5; + ev.notify(5, SC_NS); + t.enable(); // Dummy + t.enable(); // Dummy + t.sync_reset_off(); // Dummy + t.sync_reset_off(); // Dummy + wait(10, SC_NS); + + count = 6; + ev.notify(5, SC_NS); + t.reset(); + wait(SC_ZERO_TIME); + + count = 7; + wait(sc_time(100, SC_NS) - sc_time_stamp()); + + count = 8; + ev.notify(5, SC_NS); + t.disable(); + wait(10, SC_NS); + + count = 9; + ev.notify(5, SC_NS); + t.reset(); + wait(10, SC_NS); + + count = 10; + ev.notify(5, SC_NS); + t.reset(); + wait(10, SC_NS); + + count = 11; + ev.notify(5, SC_NS); + t.enable(); + wait(sc_time(200, SC_NS) - sc_time_stamp()); + + count = 12; + ev.notify(5, SC_NS); + t.suspend(); + wait(10, SC_NS); + + count = 13; + t.suspend(); // Dummy + t.suspend(); // Dummy + t.enable(); // Dummy + t.enable(); // Dummy + t.sync_reset_off(); // Dummy + t.sync_reset_off(); // Dummy + wait(10, SC_NS); + + count = 14; + t.resume(); + wait(10, SC_NS); + + count = 15; + ev.notify(5, SC_NS); + t.resume(); // Dummy + t.resume(); // Dummy + t.enable(); // Dummy + t.enable(); // Dummy + t.sync_reset_off(); // Dummy + t.sync_reset_off(); // Dummy + wait(10, SC_NS); + + count = 16; + ev.notify(); + t.resume(); // Dummy + t.resume(); // Dummy + t.disable(); // Dummy + t.disable(); // Dummy + t.enable(); // Dummy + t.enable(); // Dummy + t.suspend(); + wait(10, SC_NS); + + count = 17; + t.suspend(); // Dummy + t.suspend(); // Dummy + t.enable(); // Dummy + t.enable(); // Dummy + t.sync_reset_off(); // Dummy + t.sync_reset_off(); // Dummy + wait(10, SC_NS); + + count = 18; + t.resume(); + wait(sc_time(300, SC_NS) - sc_time_stamp()); + + count = 19; + ev.notify(); + ev.notify(5, SC_NS); + t.disable(); + t.disable(); // Dummy + wait(5, SC_NS); + t.disable(); // Dummy + t.resume(); + t.resume(); + wait(5, SC_NS); + + count = 20; + ev.notify(5, SC_NS); + t.enable(); + t.enable(); // Dummy + wait(SC_ZERO_TIME); + + count = 21; + wait(10, SC_NS); + + count = 22; + ev.notify(5, SC_NS); + t.suspend(); + wait(10, SC_NS); + + count = 23; + t.reset(); + ev.notify(5, SC_NS); + wait(10, SC_NS); + + count = 24; + t.reset(); + ev.notify(5, SC_NS); + wait(10, SC_NS); + + count = 25; + t.resume(); + wait(sc_time(400, SC_NS) - sc_time_stamp()); + + count = 26; + ev.notify(); + t.reset(); + wait(10, SC_NS); + + count = 27; + ev.notify(); + t.suspend(); + wait(10, SC_NS); + + count = 28; + t.reset(); + wait(10, SC_NS); + t.resume(); + + wait(sc_time(500, SC_NS) - sc_time_stamp()); + + count = 29; + t.sync_reset_on(); + t.sync_reset_on(); // Dummy + wait(10, SC_NS); + + count = 30; + ev.notify(); + wait(10, SC_NS); + + count = 31; + t.resume(); // Dummy + t.resume(); // Dummy + t.enable(); // Dummy + t.enable(); // Dummy + t.sync_reset_on(); // Dummy + t.sync_reset_on(); // Dummy + wait(10, SC_NS); + + count = 32; + ev.notify(); + wait(10, SC_NS); + + count = 33; + ev.notify(); + t.disable(); + wait(10, SC_NS); + + count = 34; + ev.notify(); + wait(10, SC_NS); + + count = 35; + t.enable(); + ev.notify(); + wait(10, SC_NS); + + count = 36; + t.disable(); + t.disable(); // Dummy + ev.notify(); + ev.notify(); // Dummy + wait(10, SC_NS); + + count = 37; + t.sync_reset_off(); + t.sync_reset_off(); // Dummy + wait(10, SC_NS); + + count = 38; + t.enable(); + wait(10, SC_NS); + + count = 39; + ev.notify(); + wait(sc_time(700, SC_NS) - sc_time_stamp()); + + sc_stop(); + } + + void target() + { + switch (count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); f1=1; break; + case 6: sc_assert( sc_time_stamp() == sc_time(50, SC_NS) ); f5=1; break; + case 9: sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); f7=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time(120, SC_NS) ); f8=1; break; + case 23: sc_assert( sc_time_stamp() == sc_time(330, SC_NS) ); f15=1; break; + case 24: sc_assert( sc_time_stamp() == sc_time(340, SC_NS) ); f16=1; break; + case 26: sc_assert( sc_time_stamp() == sc_time(400, SC_NS) ); f18=1; break; + case 28: sc_assert( sc_time_stamp() == sc_time(420, SC_NS) ); f19=1; break; + case 30: sc_assert( sc_time_stamp() == sc_time(510, SC_NS) ); f20=1; break; + case 32: sc_assert( sc_time_stamp() == sc_time(530, SC_NS) ); f21=1; break; + case 33: sc_assert( sc_time_stamp() == sc_time(540, SC_NS) ); f22=1; break; + case 35: sc_assert( sc_time_stamp() == sc_time(560, SC_NS) ); f23=1; break; + default: sc_assert( false ); break; + } + + for (;;) + { + wait(ev); + switch (count) + { + case 1: sc_assert( sc_time_stamp() == sc_time(5, SC_NS) ); f2=1; break; + case 4: sc_assert( sc_time_stamp() == sc_time(35, SC_NS) ); f3=1; break; + case 5: sc_assert( sc_time_stamp() == sc_time(45, SC_NS) ); f4=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(55, SC_NS) ); f6=1; break; + case 11: sc_assert( sc_time_stamp() == sc_time(135, SC_NS) ); f9=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(220, SC_NS) ); f10=1; break; + case 15: sc_assert( sc_time_stamp() == sc_time(235, SC_NS) ); f11=1; break; + case 18: sc_assert( sc_time_stamp() == sc_time(260, SC_NS) ); f12=1; break; + case 19: sc_assert( sc_time_stamp() == sc_time(300, SC_NS) ); f13=1; break; + case 21: sc_assert( sc_time_stamp() == sc_time(315, SC_NS) ); f14=1; break; + case 25: sc_assert( sc_time_stamp() == sc_time(350, SC_NS) ); f17=1; break; + case 39: sc_assert( sc_time_stamp() == sc_time(600, SC_NS) ); f24=1; break; + default: sc_assert( false ); break; + } + } + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + sc_assert( top.f4 ); + sc_assert( top.f5 ); + sc_assert( top.f6 ); + sc_assert( top.f7 ); + sc_assert( top.f8 ); + sc_assert( top.f9 ); + sc_assert( top.f10 ); + sc_assert( top.f11 ); + sc_assert( top.f12 ); + sc_assert( top.f13 ); + sc_assert( top.f14 ); + sc_assert( top.f15 ); + sc_assert( top.f16 ); + sc_assert( top.f17 ); + sc_assert( top.f18 ); + sc_assert( top.f19 ); + sc_assert( top.f20 ); + sc_assert( top.f21 ); + sc_assert( top.f22 ); + sc_assert( top.f23 ); + sc_assert( top.f24 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_timeout/golden/proc_ctrl_timeout.log b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_timeout/golden/proc_ctrl_timeout.log new file mode 100644 index 000000000..cdf4578d6 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_timeout/golden/proc_ctrl_timeout.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_timeout/proc_ctrl_timeout.cpp b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_timeout/proc_ctrl_timeout.cpp new file mode 100644 index 000000000..060ff3ac1 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/proc_ctrl_timeout/proc_ctrl_timeout.cpp @@ -0,0 +1,340 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// proc_ctrl_timeout.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: proc_ctrl_timeout.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Process control methods interacting with time-out and event lists + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(calling); + + SC_THREAD(target1); + t1 = sc_get_current_process_handle(); + + SC_METHOD(target2); + t2 = sc_get_current_process_handle(); + + SC_THREAD(target3); + t3 = sc_get_current_process_handle(); + + SC_METHOD(target4); + t4 = sc_get_current_process_handle(); + + SC_METHOD(target5); + t5 = sc_get_current_process_handle(); + t5.disable(); + sensitive << ev4; + + count = 0; + f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = f10 = 0; + f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = 0; + } + + sc_process_handle t1, t2, t3, t4, t5; + sc_event ev1, ev2, ev3, ev4; + int count; + int f1, f2, f3, f4, f5, f6, f7, f8, f9, f10; + int f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22; + + void calling() + { + wait(SC_ZERO_TIME); + count = 1; + wait(15, SC_NS); + + count = 2; + try { + t1.disable(); + sc_assert(false); + } + catch (sc_exception ex) { + //cout << "Exception caught at " << sc_time_stamp() << endl; + f7 = 1; + } + + try { + t2.disable(); + sc_assert(false); + } + catch (sc_exception ex) { + //cout << "Exception caught at " << sc_time_stamp() << endl; + f8 = 1; + } + wait(SC_ZERO_TIME); + t1.kill(); + t2.kill(); + ev1.notify(); + wait(sc_time(100, SC_NS) - sc_time_stamp()); + + count = 6; + t3.disable(); + t4.disable(); + wait(10, SC_NS); + + ev2.notify(); + wait(10, SC_NS); + + t3.enable(); + t4.enable(); + wait(10, SC_NS); + + ev3.notify(); + wait(10, SC_NS); + + ev2.notify(); + wait(sc_time(200, SC_NS) - sc_time_stamp()); + + count = 7; + ev1.notify(); + wait(10, SC_NS); + + t3.suspend(); + t4.suspend(); + wait(10, SC_NS); + + ev2.notify(); + wait(10, SC_NS); + + t3.resume(); + t4.resume(); + wait(10, SC_NS); + + ev3.notify(); + wait(sc_time(300, SC_NS) - sc_time_stamp()); + + count = 8; + ev1.notify(); + wait(10, SC_NS); + + ev2.notify(); + wait(10, SC_NS); + + t3.reset(); + count = 9; + wait(10, SC_NS); + + ev3.notify(); + wait(10, SC_NS); + + ev1.notify(); + wait(10, SC_NS); + + ev2.notify(); + wait(sc_time(400, SC_NS) - sc_time_stamp()); + t3.disable(); + t4.disable(); + + // Now target5 + count = 9; + t5.enable(); + ev4.notify(); + wait(SC_ZERO_TIME); + + count = 10; + ev3.notify(3, SC_NS); + ev2.notify(2, SC_NS); + ev1.notify(1, SC_NS); + wait(10, SC_NS); + + count = 11; + t5.reset(); // On reset, dynamic sensit is cleared, then target is called again + wait(SC_ZERO_TIME); + + count = 12; + ev3.notify(3, SC_NS); + ev2.notify(2, SC_NS); + ev1.notify(1, SC_NS); + wait(10, SC_NS); + + count = 13; + ev4.notify(); + wait(SC_ZERO_TIME); + + count = 14; + try { + t5.disable(); // Disabling a process waiting on a time-out + } + catch (sc_exception ex) { + //cout << "Exception caught at " << sc_time_stamp() << endl; + f21 = 1; + } + wait(sc_time(500, SC_NS) - sc_time_stamp()); + + count = 15; + t5.reset(); + wait(10, SC_NS); + + count = 16; + ev4.notify(); + wait(10, SC_NS); + + sc_stop(); + } + + void target1() + { + //cout << "target1() called at " << sc_time_stamp() << " count = " << count << endl; + switch (count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); f1=1; break; + default: sc_assert( false ); break; + } + + for (;;) + { + wait(10, SC_NS); + //cout << "target1() awoke at " << sc_time_stamp() << " count = " << count << endl; + switch (count) + { + case 1: sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); f5=1; break; + default: sc_assert( false ); break; + } + } + } + + void target2() + { + //cout << "target2() called at " << sc_time_stamp() << " count = " << count << endl; + switch (count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); f2=1; break; + case 1: sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); f6=1; break; + default: sc_assert( false ); break; + } + next_trigger(10, SC_NS); + } + + void target3() + { + //cout << "target3() called at " << sc_time_stamp() << " count = " << count << endl; + switch (count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); f3=1; break; + case 8: sc_assert( sc_time_stamp() == sc_time(320, SC_NS) ); f13=1; break; + default: sc_assert( false ); break; + } + + for (;;) + { + wait(ev1 & ev2 & ev3); + //cout << "target3() awoke at " << sc_time_stamp() << " count = " << count << endl; + switch (count) + { + case 6: sc_assert( sc_time_stamp() == sc_time(140, SC_NS) ); f9=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(240, SC_NS) ); f11=1; break; + case 9: sc_assert( sc_time_stamp() == sc_time(350, SC_NS) ); f15=1; break; + default: sc_assert( false ); break; + } + } + } + + void target4() + { + //cout << "target4() called at " << sc_time_stamp() << " count = " << count << endl; + switch (count) + { + case 0: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); f4=1; break; + case 6: sc_assert( sc_time_stamp() == sc_time(140, SC_NS) ); f10=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(240, SC_NS) ); f12=1; break; + case 9: sc_assert( sc_time_stamp() == sc_time(330, SC_NS) ); f14=1; break; + default: sc_assert( false ); break; + } + next_trigger(ev1 & ev2 & ev3); + } + + void target5() + { + //cout << "target5() called at " << sc_time_stamp() << " count = " << count << endl; + switch (count) + { + case 9: sc_assert( sc_time_stamp() == sc_time(400, SC_NS) ); f16=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time(403, SC_NS) ); f17=1; break; + case 11: sc_assert( sc_time_stamp() == sc_time(410, SC_NS) ); f18=1; break; + case 12: sc_assert( sc_time_stamp() == sc_time(413, SC_NS) ); f19=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(424, SC_NS) ); break; + case 15: sc_assert( sc_time_stamp() == sc_time(500, SC_NS) ); f20=1; break; + case 16: sc_assert( sc_time_stamp() == sc_time(510, SC_NS) ); f22=1; break; + default: sc_assert( false ); break; + } + if (count < 12) + next_trigger(ev1 & ev2 & ev3); + else if (count == 12) + next_trigger(11, SC_NS, ev3); + else if (count > 12) + next_trigger(); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + sc_assert( top.f4 ); + sc_assert( top.f5 ); + sc_assert( top.f6 ); + sc_assert( top.f7 ); + sc_assert( top.f8 ); + sc_assert( top.f9 ); + sc_assert( top.f10 ); + sc_assert( top.f11 ); + sc_assert( top.f12 ); + sc_assert( top.f13 ); + sc_assert( top.f14 ); + sc_assert( top.f15 ); + sc_assert( top.f16 ); + sc_assert( top.f17 ); + sc_assert( top.f18 ); + sc_assert( top.f19 ); + sc_assert( top.f20 ); + sc_assert( top.f21 ); + sc_assert( top.f22 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/recursive_kill_bug/golden/recursive_kill_bug.log b/src/systemc/tests/systemc/1666-2011-compliance/recursive_kill_bug/golden/recursive_kill_bug.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/recursive_kill_bug/golden/recursive_kill_bug.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/recursive_kill_bug/recursive_kill_bug.cpp b/src/systemc/tests/systemc/1666-2011-compliance/recursive_kill_bug/recursive_kill_bug.cpp new file mode 100644 index 000000000..50ed7d537 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/recursive_kill_bug/recursive_kill_bug.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// recursive_kill_bug.cpp -- test for +// +// Original Author: John Aynsley, Doulus +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// + +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(control); + + SC_METHOD(caller); + sensitive << ev; + dont_initialize(); + caller_handle = sc_get_current_process_handle(); + + SC_THREAD(target); + target_handle = sc_get_current_process_handle(); + + count = 0; + f0 = f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + } + + struct bomb + { + sc_process_handle h; + + bomb(sc_process_handle _h) + { + h = _h; + } + + ~bomb() + { + h.kill(); + } + }; + + sc_process_handle caller_handle; + sc_process_handle target_handle; + int count; + int f0, f1, f2, f3, f4, f5, f6, f7, f8, f9; + sc_event ev; + + void control() + { + count = 0; + wait(10, SC_NS); + + count = 1; + ev.notify(); + } + + void caller() + { + f0 = 1; + target_handle.kill(); + sc_assert( false ); // FAILS !!!!!! + } + + void target() + { + bomb local_obj(caller_handle); + sc_assert( count == 0 ); + f1 = 1; + try { + wait(20, SC_NS); + } + catch (const sc_unwind_exception& e) { + sc_assert( count == 1 ); + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + f2 = 1; + throw e; + } + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + sc_assert( top.f2 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_delta_count/golden/sc_delta_count.log b/src/systemc/tests/systemc/1666-2011-compliance/sc_delta_count/golden/sc_delta_count.log new file mode 100644 index 000000000..4a4355f1f --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_delta_count/golden/sc_delta_count.log @@ -0,0 +1,25 @@ +SystemC Simulation +M() awoke at 0 s +M() awoke at 0 s +M() awoke at 0 s +M() awoke at 1 ns +M() awoke at 2 ns +M() awoke at 5 ns +M() awoke at 6 ns +M() awoke at 7 ns +M() awoke at 8 ns + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: +M() awoke at 9 ns +M() awoke at 10 ns +M() awoke at 12 ns +M() awoke at 12 ns +M() awoke at 13 ns + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_delta_count/sc_delta_count.cpp b/src/systemc/tests/systemc/1666-2011-compliance/sc_delta_count/sc_delta_count.cpp new file mode 100644 index 000000000..ad8622e03 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_delta_count/sc_delta_count.cpp @@ -0,0 +1,250 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// sc_delta_count.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: sc_delta_count.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// sc_delta_count, including notifications across pauses + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + + SC_THREAD(T); + + SC_METHOD(M); + sensitive << ev << ev2 << ev3; + dont_initialize(); + m = sc_get_current_process_handle(); + + sc_assert( sc_delta_count() == 0 ); + count = 0; + reached_end = false; + } + + void start_of_simulation() + { + sc_assert( sc_delta_count() == 0 ); + } + + sc_process_handle m; + sc_event ev, ev2, ev3; + int count; + sc_time last_time; + bool reached_end; + + void T() + { + sc_assert( sc_delta_count() == 0 ); + + count = 1; + ev.notify(); + wait(SC_ZERO_TIME); + sc_assert( sc_delta_count() == 1 ); + + count = 2; + ev.notify(); + wait(SC_ZERO_TIME); + sc_assert( sc_delta_count() == 2 ); + + count = 3; + ev.notify(SC_ZERO_TIME); + wait(SC_ZERO_TIME); + sc_assert( sc_delta_count() == 3 ); + + count = 4; + ev.notify(1, SC_NS); + wait(SC_ZERO_TIME); + sc_assert( sc_delta_count() == 4 ); + + count = 5; + wait(1, SC_NS); + ev.notify(1, SC_NS); + sc_assert( sc_delta_count() == 5 ); + + count = 6; + wait(2, SC_NS); + sc_assert( sc_delta_count() == 7 ); + + count = 7; + m.disable(); + ev.notify(1, SC_NS); + wait(2, SC_NS); + sc_assert( sc_delta_count() == 8 ); + + count = 8; + m.enable(); + ev .notify(); + ev2.notify(1, SC_NS); + ev3.notify(2, SC_NS); + wait(3, SC_NS); + sc_assert( sc_delta_count() == 11 ); + + count = 9; + last_time = sc_time_stamp(); + sc_pause(); // 1st pause + wait(ev); + sc_assert( sc_delta_count() == 12 ); + + count = 10; + last_time = sc_time_stamp(); + sc_pause(); // 2nd pause + wait(ev); + sc_assert( sc_delta_count() == 13 ); + + count = 11; + last_time = sc_time_stamp(); + sc_pause(); // 3rd pause + wait(ev); + sc_assert( sc_delta_count() == 14 ); + + count = 12; + last_time = sc_time_stamp(); + sc_pause(); // 4th pause + wait(ev); + sc_assert( sc_delta_count() == 15 ); + + count = 13; + last_time = sc_time_stamp(); + sc_pause(); // 5th pause + wait(ev); + sc_assert( sc_delta_count() == 16 ); + + count = 14; + wait(ev); + sc_assert( sc_delta_count() == 17 ); + + last_time = sc_time_stamp(); + reached_end = true; + sc_stop(); + } + + void M() + { + cout << "M() awoke at " << sc_time_stamp() << endl; + switch (count) + { + case 0: sc_assert( false ); break; + case 1: sc_assert( sc_delta_count() == 0 ); break; + case 2: sc_assert( sc_delta_count() == 1 ); break; + case 3: sc_assert( sc_delta_count() == 3 ); break; + case 4: sc_assert( false ); break; + case 5: sc_assert( sc_delta_count() == 5 ); break; + case 6: sc_assert( sc_delta_count() == 6 ); break; + case 7: sc_assert( false ); break; + case 8: sc_assert( sc_delta_count() == 8 || + sc_delta_count() == 9 || + sc_delta_count() == 10 ); break; + case 9: sc_assert( sc_delta_count() == 12 ); break; + case 10: sc_assert( sc_delta_count() == 13 ); break; + case 11: sc_assert( sc_delta_count() == 14 ); break; + case 12: sc_assert( sc_delta_count() == 15 ); break; + case 13: sc_assert( sc_delta_count() == 16 ); break; + case 14: sc_assert( sc_delta_count() == 17 ); break; + } + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + sc_assert( sc_delta_count() == 0 ); + + Top top("top"); + + sc_start(); + + sc_assert( sc_delta_count() == 12 ); + sc_assert( sc_get_status() == SC_PAUSED ); + top.ev.notify(); // Wake from 1st pause on immed notification + + sc_start(); + sc_assert( sc_delta_count() == 13 ); + sc_assert( sc_get_status() == SC_PAUSED ); + sc_assert( sc_pending_activity_at_current_time() == false ); + sc_assert( sc_pending_activity_at_future_time() == false ); + + sc_start(SC_ZERO_TIME); + sc_assert( sc_delta_count() == 13 ); + + sc_assert( sc_get_status() == SC_PAUSED ); + sc_start(SC_ZERO_TIME); + sc_assert( sc_delta_count() == 13 ); + sc_assert( top.last_time == sc_time_stamp() ); + + sc_start(1, SC_NS); + sc_assert( sc_delta_count() == 13 ); + sc_assert( top.count == 10 ); + // sc_assert( top.last_time == sc_time_stamp() ); + + top.ev.notify(SC_ZERO_TIME); // Wake from 2nd pause on delta notification + sc_start(1, SC_NS); + sc_assert( sc_delta_count() == 14 ); + sc_assert( top.last_time == sc_time_stamp() ); + + top.ev.notify(1, SC_NS); // Wake from 3rd pause on timed notification + sc_start(2, SC_NS); + sc_assert( sc_delta_count() == 15 ); + sc_assert( top.last_time == sc_time_stamp() ); + + top.ev.notify(2, SC_NS); // Future notification beyond the subsequent start + sc_assert( sc_pending_activity_at_current_time() == false ); + sc_assert( sc_pending_activity_at_future_time() == true ); + sc_start(1, SC_NS); + sc_assert( sc_delta_count() == 15 ); + + sc_start(); + sc_assert( sc_delta_count() == 16 ); + sc_assert( top.last_time == sc_time_stamp() ); + + top.ev.notify(); // Wake from 5th pause on immed notification + sc_start(SC_ZERO_TIME); + sc_assert( sc_delta_count() == 17 ); + sc_assert( top.last_time == sc_time_stamp() ); + + sc_assert( sc_get_status() == SC_PAUSED ); + + top.ev.notify(1, SC_NS); // Future notification before calling sc_stop + sc_start(2, SC_NS); + + sc_assert( sc_get_status() == SC_STOPPED ); + sc_assert( sc_end_of_simulation_invoked() ); + sc_assert( top.last_time == sc_time_stamp() ); + sc_assert( top.reached_end ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_pause/golden/sc_pause.log b/src/systemc/tests/systemc/1666-2011-compliance/sc_pause/golden/sc_pause.log new file mode 100644 index 000000000..dcbcdcb48 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_pause/golden/sc_pause.log @@ -0,0 +1,29 @@ +SystemC Simulation +sc_get_status() == SC_ELABORATION ELAB +sc_get_status() == SC_ELABORATION CTOR in top +sc_get_status() == SC_BEFORE_END_OF_ELABORATION before_end_of_elaboration in top +sc_get_status() == SC_BEFORE_END_OF_ELABORATION CTOR in top.m +sc_get_status() == SC_BEFORE_END_OF_ELABORATION before_end_of_elaboration in top.m +sc_get_status() == SC_END_OF_ELABORATION end_of_elaboration in top +sc_get_status() == SC_END_OF_ELABORATION end_of_elaboration in top.m +sc_get_status() == SC_START_OF_SIMULATION start_of_simulation in top +sc_get_status() == SC_START_OF_SIMULATION start_of_simulation in top.m +sc_get_status() == SC_RUNNING METHOD in top +sc_get_status() == SC_RUNNING PROCESS in top +on_timed_event() awoke +sc_get_status() == SC_RUNNING METHOD in top +sc_get_status() == SC_RUNNING PROCESS after sc_pause in top +sc_get_status() == SC_PAUSED PAUSED +sc_get_status() == SC_RUNNING PROCESS after sc_pause in top +sc_get_status() == SC_PAUSED PAUSED +on_immed_event() awoke +spawned_while_paused() awoke +on_delta_event() awoke +sc_get_status() == SC_RUNNING PROCESS after sc_stop() in top + +Info: /OSCI/SystemC: Simulation stopped by user. +sc_get_status() == SC_END_OF_SIMULATION end_of_simulation in top +sc_get_status() == SC_END_OF_SIMULATION end_of_simulation in top.m +sc_get_status() == SC_STOPPED STOPPED + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_pause/sc_pause.cpp b/src/systemc/tests/systemc/1666-2011-compliance/sc_pause/sc_pause.cpp new file mode 100644 index 000000000..2f7ebd930 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_pause/sc_pause.cpp @@ -0,0 +1,348 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// sc_pause.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: sc_pause.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// sc_pause, sc_get_status, sc_is_running + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using std::cout; +using std::endl; +using std::hex; + +struct my_interface: virtual sc_interface +{ + virtual void schedule_events_while_paused() = 0; +}; + +struct M: sc_module, private my_interface +{ + sc_export xport; + + SC_CTOR(M) + { + cout << "sc_get_status() == " << hex << sc_get_status() << " CTOR in " << name() << endl; + sc_assert( sc_get_status() == SC_BEFORE_END_OF_ELABORATION ); + sc_assert( sc_is_running() == false ); + + xport.bind(*this); + + sc_spawn(sc_bind(&M::T, this)); + + SC_THREAD(on_immed_event); + SC_THREAD(on_delta_event); + SC_THREAD(on_timed_event); + } + + sc_signal sig1, sig2, sig3, sig4; + sc_event immed_event; + sc_event delta_event; + sc_event timed_event; + + void before_end_of_elaboration() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " before_end_of_elaboration in " << name() << endl; + sc_assert( sc_get_status() == SC_BEFORE_END_OF_ELABORATION ); + sc_assert( sc_is_running() == false ); + sig1.write(1); + timed_event.notify(1234, SC_NS); + sc_pause(); // Should be ignored + } + + void end_of_elaboration() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " end_of_elaboration in " << name() << endl; + sc_assert( sc_get_status() == SC_END_OF_ELABORATION ); + sc_assert( sc_is_running() == false ); + sig2.write(2); + sc_pause(); // Should be ignored + } + + void start_of_simulation() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " start_of_simulation in " << name() << endl; + sc_assert( sc_get_status() == SC_START_OF_SIMULATION ); + sc_assert( sc_is_running() == false ); + sig3.write(3); + sig4.write(0); + sc_pause(); // Should be ignored + } + + void end_of_simulation() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " end_of_simulation in " << name() << endl;; + sc_assert( sc_get_status() == SC_END_OF_SIMULATION ); + sc_assert( sc_is_running() == false ); + } + + void T() + { + sc_assert( sig1.read() == 1 ); + sc_assert( sig2.read() == 2 ); + sc_assert( sig3.read() == 3 ); + } + + void on_immed_event() + { + wait(immed_event); + cout << "on_immed_event() awoke\n"; + + // Should run in 1st eval phase after pause + sc_assert( sig4.read() == 0 ); + } + + void on_delta_event() + { + wait(delta_event); + cout << "on_delta_event() awoke\n"; + + // Should run in 2nd eval phase after pause + sc_assert( sig4.read() == 4 ); + } + + void on_timed_event() + { + wait(timed_event); + cout << "on_timed_event() awoke\n"; + + sc_assert( sig1.read() == 1 ); + sc_assert( sig2.read() == 2 ); + sc_assert( sig3.read() == 3 ); + sc_assert( sig4.read() == 0 ); + sc_assert( sc_time_stamp() == sc_time(1234, SC_NS) ); + } + +private: + + void schedule_events_while_paused() + { + sig4.write(4); + immed_event.notify(); + delta_event.notify(SC_ZERO_TIME); + + // Should be able to instantiate an sc_object while paused + mut = new sc_mutex("mut"); + sem = new sc_semaphore("sem", 1); + } + + sc_mutex* mut; + sc_semaphore* sem; +}; + +SC_MODULE(Top) +{ + SC_CTOR(Top) + { + cout << "sc_get_status() == " << hex << sc_get_status() << " CTOR in " << name() << endl; + sc_assert( sc_get_status() == SC_ELABORATION ); + sc_assert( sc_is_running() == false ); + SC_THREAD(T); + + sc_spawn_options opt; + opt.spawn_method(); + opt.set_sensitivity( &timed_ev ); + opt.set_sensitivity( &delta_ev ); + opt.dont_initialize(); + sc_spawn(sc_bind(&Top::ev_handler, this), "ev_handler", &opt); + + SC_METHOD(immed_ev_handler); + sensitive << immed_ev; + dont_initialize(); + + immed_ev_delta = 0; + sc_assert( sc_delta_count() == 0 ); + } + + ~Top() + { + sc_assert( sc_get_status() == SC_STOPPED ); + sc_assert( sc_is_running() == false ); + } + + M* m; + sc_event timed_ev; + sc_event delta_ev; + sc_event immed_ev; + unsigned immed_ev_delta; + sc_signal sig; + + void before_end_of_elaboration() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " before_end_of_elaboration in " << name() << endl; + sc_assert( sc_get_status() == SC_BEFORE_END_OF_ELABORATION ); + sc_assert( sc_is_running() == false ); + + m = new M("m"); + } + + void end_of_elaboration() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " end_of_elaboration in " << name() << endl; + sc_assert( sc_get_status() == SC_END_OF_ELABORATION ); + sc_assert( sc_is_running() == false ); + } + + void start_of_simulation() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " start_of_simulation in " << name() << endl; + sc_assert( sc_get_status() == SC_START_OF_SIMULATION ); + sc_assert( sc_is_running() == false ); + } + + void end_of_simulation() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " end_of_simulation in " << name() << endl; + sc_assert( sc_get_status() == SC_END_OF_SIMULATION ); + sc_assert( sc_is_running() == false ); + sc_assert( immed_ev_delta == 999 ); + } + + void T() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " PROCESS in " << name() << endl; + sc_assert( sc_delta_count() == 0 ); + sc_assert( sig.read() == 42 ); + sc_assert( sc_get_status() == SC_RUNNING ); + sc_assert( sc_is_running() == true ); + wait(timed_ev); + sc_assert( sc_time_stamp() == sc_time(42, SC_US) ); + sc_assert( sc_get_status() == SC_RUNNING ); + sc_assert( sc_is_running() == true ); + + sc_pause(); + cout << "sc_get_status() == " << hex << sc_get_status() << " PROCESS after sc_pause in " << name() << endl; + sc_assert( sc_time_stamp() == sc_time(42, SC_US) ); + sc_assert( sc_get_status() == SC_RUNNING ); + sc_assert( sc_is_running() == true ); + wait(SC_ZERO_TIME); + sc_assert( sc_get_status() == SC_RUNNING ); + sc_assert( sc_is_running() == true ); + + sc_pause(); + cout << "sc_get_status() == " << hex << sc_get_status() << " PROCESS after sc_pause in " << name() << endl; + sc_assert( sc_time_stamp() == sc_time(42, SC_US) ); + sc_assert( sc_get_status() == SC_RUNNING ); + sc_assert( sc_is_running() == true ); + wait(2, SC_US); + sc_assert( sc_time_stamp() == sc_time(44, SC_US) ); + sc_assert( sc_get_status() == SC_RUNNING ); + sc_assert( sc_is_running() == true ); + + sc_stop(); + cout << "sc_get_status() == " << hex << sc_get_status() << " PROCESS after sc_stop() in " << name() << endl;; + sc_assert( sc_time_stamp() == sc_time(44, SC_US) ); + sc_assert( sc_get_status() == SC_RUNNING ); + sc_assert( sc_is_running() == true ); + + sc_pause(); + sc_assert( sc_get_status() == SC_RUNNING ); + } + + void ev_handler() + { + cout << "sc_get_status() == " << hex << sc_get_status() << " METHOD in " << name() << endl; + sc_assert( sc_get_status() == SC_RUNNING ); + sc_assert( sig.read() == 42 ); + + static bool first = true; + if (first) + { + sc_assert( sc_time_stamp() == SC_ZERO_TIME ); + first = false; + } + else + sc_assert( sc_time_stamp() == sc_time(42, SC_US) ); + } + + void immed_ev_handler() + { + sc_assert( sc_time_stamp() == sc_time(42, SC_US) ); + sc_assert( sc_delta_count() == immed_ev_delta ); + immed_ev_delta = 999; + } +}; + +void spawned_while_paused() +{ + cout << "spawned_while_paused() awoke" << endl; + sc_assert( sc_time_stamp() == sc_time(42, SC_US) ); + sc_assert( sc_get_status() == SC_RUNNING ); + sc_assert( sc_pending_activity() == true ); +} + +int sc_main(int argc, char* argv[]) +{ + sc_assert( sc_delta_count() == 0 ); + cout << "sc_get_status() == " << hex << sc_get_status() << " ELAB" << endl; + sc_assert( sc_get_status() == SC_ELABORATION ); + sc_assert( sc_is_running() == false ); + Top top("top"); + + sc_pause(); // Should be ignored + + // Schedule some update requests and events + top.sig.write(42); + top.timed_ev.notify(42, SC_US); + top.delta_ev.notify(SC_ZERO_TIME); + sc_assert( sc_get_status() == SC_ELABORATION ); + sc_assert( sc_delta_count() == 0 ); + + sc_start(); + cout << "sc_get_status() == " << hex << sc_get_status() << " PAUSED" << endl; + sc_assert( sc_get_status() == SC_PAUSED ); + sc_assert( sc_is_running() == true ); + sc_assert( sc_time_stamp() == sc_time(42, SC_US) ); + + sc_start(1, SC_US); + cout << "sc_get_status() == " << hex << sc_get_status() << " PAUSED" << endl; + sc_assert( sc_get_status() == SC_PAUSED ); + sc_assert( sc_is_running() == true ); + sc_assert( sc_time_stamp() == sc_time(42, SC_US) ); + + // Schedule an immediate notification + top.immed_ev.notify(); + top.immed_ev_delta = sc_delta_count(); + + // IMC while paused + top.m->xport->schedule_events_while_paused(); + + sc_process_handle h = sc_spawn(&spawned_while_paused); + sc_assert( h.valid() ); + + sc_start(); + cout << "sc_get_status() == " << hex << sc_get_status() << " STOPPED" << endl; + sc_assert( sc_get_status() == SC_STOPPED ); + sc_assert( sc_is_running() == false ); + sc_assert( sc_time_stamp() == sc_time(44, SC_US) ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_process_handle_less_than/golden/sc_process_handle_less_than.log b/src/systemc/tests/systemc/1666-2011-compliance/sc_process_handle_less_than/golden/sc_process_handle_less_than.log new file mode 100644 index 000000000..3574ecaa6 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_process_handle_less_than/golden/sc_process_handle_less_than.log @@ -0,0 +1,5 @@ +SystemC Simulation +T2 completed +T1 completed + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_process_handle_less_than/sc_process_handle_less_than.cpp b/src/systemc/tests/systemc/1666-2011-compliance/sc_process_handle_less_than/sc_process_handle_less_than.cpp new file mode 100644 index 000000000..300bd4bac --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_process_handle_less_than/sc_process_handle_less_than.cpp @@ -0,0 +1,180 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// sc_process_handle_less_than.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: sc_process_handle_less_than.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// sc_process_handle::operator< and swap + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(T1); + SC_THREAD(T2); + } + + void T1() + { + sc_process_handle a, b; // Two empty handles + sc_assert( !a.valid() && !b.valid() ); // Both are invalid + sc_assert( a != b ); + sc_assert( !(a < b) && !(b < a) ); + + a = sc_spawn(sc_bind(&Top::f, this)); + b = sc_spawn(sc_bind(&Top::f, this)); + + sc_assert( a != b ); + sc_assert( (a < b) || (b < a) ); // Two handles to different processes + + sc_process_handle c = b; + + sc_assert( b == c ); + sc_assert( !(b < c) && !(c < b) ); // Two handles to the same process + + std::map m; + m[a] = 1; + m[b] = 2; + m[c] = 3; + + sc_assert( m.size() == 2 ); + sc_assert( m[a] == 1 ); + sc_assert( m[b] == 3 ); + sc_assert( m[c] == 3 ); + + a.swap(b); + sc_assert( m[a] == 3 ); + sc_assert( m[b] == 1 ); + sc_assert( m[c] == 3 ); + b.swap(a); + + wait( a.terminated_event() & b.terminated_event() ); + + sc_assert( (a < b) || (b < a) ); // Same ordering whether handles are valid or not + + if ( b.valid() ) // Handles may or may not have been invalidated + sc_assert( b == c ); + else + sc_assert( b != c ); + + sc_assert( b.valid() == c.valid() ); // Invalidation is consistent + sc_assert( !(b < c) && !(c < b) ); // Two handles to the same process, whether valid or not + sc_assert( c.terminated() ); + + sc_process_handle d = a; + m[d] = 4; + + sc_assert( m.size() == 2 ); + sc_assert( m[a] == 4 ); + sc_assert( m[b] == 3 ); + sc_assert( m[c] == 3 ); + sc_assert( m[d] == 4 ); + + sc_process_handle e; + m[e] = 5; + + sc_assert( m.size() == 3 ); + sc_assert( m[a] == 4 ); + sc_assert( m[b] == 3 ); + sc_assert( m[c] == 3 ); + sc_assert( m[d] == 4 ); + sc_assert( m[e] == 5 ); + + sc_process_handle f; + m[f] = 6; + + sc_assert( m.size() == 3 ); + sc_assert( m[a] == 4 ); + sc_assert( m[b] == 3 ); + sc_assert( m[c] == 3 ); + sc_assert( m[d] == 4 ); + sc_assert( m[e] == 6 ); + sc_assert( m[f] == 6 ); + + sc_process_handle g; + m[g] = 7; + + sc_assert( m.size() == 3 ); + sc_assert( m[a] == 4 ); + sc_assert( m[b] == 3 ); + sc_assert( m[c] == 3 ); + sc_assert( m[d] == 4 ); + sc_assert( m[e] == 7 ); + sc_assert( m[f] == 7 ); + sc_assert( m[g] == 7 ); + + g = sc_spawn(sc_bind(&Top::f, this)); + m[g] = 8; + + sc_assert( m.size() == 4 ); + sc_assert( m[a] == 4 ); + sc_assert( m[b] == 3 ); + sc_assert( m[c] == 3 ); + sc_assert( m[d] == 4 ); + sc_assert( m[e] == 7 ); + sc_assert( m[f] == 7 ); + sc_assert( m[g] == 8 ); + + cout << "T1 completed" << endl; + } + + void T2() + { + sc_process_handle a, b = sc_get_current_process_handle(); + sc_assert( b.valid() ); + + a.swap( b ); + sc_assert( a == sc_get_current_process_handle() ); + sc_assert( !b.valid() ); + + cout << "T2 completed" << endl; + } + + void f() {} + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_start_bug/golden/sc_start_bug.log b/src/systemc/tests/systemc/1666-2011-compliance/sc_start_bug/golden/sc_start_bug.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_start_bug/golden/sc_start_bug.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_start_bug/sc_start_bug.cpp b/src/systemc/tests/systemc/1666-2011-compliance/sc_start_bug/sc_start_bug.cpp new file mode 100644 index 000000000..c69289e66 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_start_bug/sc_start_bug.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// sc_start_bug.cpp +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(T1); + SC_THREAD(T2); + } + + void T1() + { + sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); + wait(15, SC_NS); + sc_assert( sc_time_stamp() == sc_time(15, SC_NS) ); + sc_pause(); + } + + void T2() + { + sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); + wait(30, SC_NS); + sc_assert( sc_time_stamp() == sc_time(30, SC_NS) ); + sc_pause(); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(10, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); + + sc_start(10, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(15, SC_NS) ); + + sc_start(10, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(25, SC_NS) ); + + sc_start(10, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(30, SC_NS) ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_start_starvation/golden/sc_start_starvation.log b/src/systemc/tests/systemc/1666-2011-compliance/sc_start_starvation/golden/sc_start_starvation.log new file mode 100644 index 000000000..ae3e71658 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_start_starvation/golden/sc_start_starvation.log @@ -0,0 +1,12 @@ +SystemC Simulation + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_start_starvation/sc_start_starvation.cpp b/src/systemc/tests/systemc/1666-2011-compliance/sc_start_starvation/sc_start_starvation.cpp new file mode 100644 index 000000000..d279c4364 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_start_starvation/sc_start_starvation.cpp @@ -0,0 +1,151 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// sc_start_starvation.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: sc_start_starvation.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// sc_start with event starvation policy +// sc_pending_activity and friends + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using std::cout; +using std::endl; + +SC_MODULE(Top) +{ + SC_CTOR(Top) + { + SC_THREAD(T); + } + + sc_event ev2; + + void T() + { + sc_assert( sc_get_status() == SC_RUNNING ); + + sc_assert( sc_pending_activity_at_current_time() == false ); + sc_assert( sc_pending_activity_at_future_time() == true ); + sc_assert( sc_time_to_pending_activity() == sc_time(250, SC_NS) ); + + ev2.notify(150, SC_NS); + + sc_assert( sc_pending_activity_at_current_time() == false ); + sc_assert( sc_pending_activity_at_future_time() == true ); + sc_assert( sc_time_to_pending_activity() == sc_time(150, SC_NS) ); + } +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_event ev; + ev.notify(250, SC_NS); + + sc_assert( sc_pending_activity_at_current_time() == false ); + sc_assert( sc_pending_activity_at_future_time() == true ); + sc_assert( sc_pending_activity() == true ); + sc_assert( sc_time_to_pending_activity() == sc_time(250, SC_NS) ); + + sc_assert( sc_get_status() == SC_ELABORATION ); + sc_assert( sc_time_stamp() == SC_ZERO_TIME ); + sc_start(100, SC_NS); + sc_assert( sc_get_status() == SC_PAUSED ); + sc_assert( sc_time_stamp() == sc_time(100, SC_NS) ); + + sc_assert( sc_pending_activity_at_current_time() == false ); + sc_assert( sc_pending_activity_at_future_time() == true ); + sc_assert( sc_time_to_pending_activity() == sc_time(50, SC_NS) ); + + sc_start(10, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); + sc_assert( sc_time_to_pending_activity() == sc_time(40, SC_NS) ); + + sc_start(10, SC_NS, SC_EXIT_ON_STARVATION); + sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); + + sc_start(80, SC_NS, SC_EXIT_ON_STARVATION); + + sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); + sc_assert( sc_pending_activity_at_current_time() == false ); + sc_assert( sc_pending_activity_at_future_time() == true ); + sc_assert( sc_time_to_pending_activity() == sc_time(100, SC_NS) ); + + sc_start(50, SC_NS, SC_EXIT_ON_STARVATION); + sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); + sc_assert( sc_time_to_pending_activity() == sc_time(100, SC_NS) ); + + sc_start(50, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(200, SC_NS) ); + sc_assert( sc_time_to_pending_activity() == sc_time(50, SC_NS) ); + + sc_start(); + sc_assert( sc_get_status() == SC_PAUSED ); + sc_assert( sc_time_stamp() == sc_time(250, SC_NS) ); + + sc_assert( sc_pending_activity() == false ); + sc_assert( sc_time_to_pending_activity() == sc_max_time() - sc_time_stamp() ); + + ev.notify(SC_ZERO_TIME); + + sc_assert( sc_pending_activity_at_current_time() == true ); + sc_assert( sc_pending_activity_at_future_time() == false ); + sc_assert( sc_time_to_pending_activity() == SC_ZERO_TIME ); + + sc_start(); + sc_assert( sc_time_stamp() == sc_time(250, SC_NS) ); + + sc_assert( sc_pending_activity() == false ); + sc_assert( sc_time_to_pending_activity() == sc_max_time() - sc_time_stamp() ); + + ev.notify(10, SC_NS); + + sc_assert( sc_pending_activity() == true ); + sc_assert( sc_time_to_pending_activity() == sc_time(10, SC_NS) ); + + sc_start(); + sc_assert( sc_time_stamp() == sc_time(260, SC_NS) ); + + ev.notify(10, SC_NS); + sc_start(sc_time(100, SC_NS), SC_EXIT_ON_STARVATION); + sc_assert( sc_time_stamp() == sc_time(270, SC_NS) ); + + ev.notify(10, SC_NS); + sc_start(sc_time(100, SC_NS)); // SC_RUN_TO_TIME + sc_assert( sc_time_stamp() == sc_time(370, SC_NS) ); + sc_assert( sc_get_status() == SC_PAUSED ); + + ev.notify(); + sc_assert( sc_pending_activity() == false ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_vector/golden/sc_vector.log b/src/systemc/tests/systemc/1666-2011-compliance/sc_vector/golden/sc_vector.log new file mode 100644 index 000000000..c2d510c75 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_vector/golden/sc_vector.log @@ -0,0 +1,40 @@ +SystemC Simulation +Called method() in top.m1.target_vec_0 at 10 ns +Called method() in top.m1.target_vec_1 at 10 ns +Called method() in top.m3.targets_0 at 10 ns +Called method() in top.m1.target_vec_3 at 10 ns +Called method() in top.m3.target_vec_2 at 10 ns +Called method() in top.m3.target_vec_1 at 10 ns +Called method() in top.m3.target_vec_0 at 10 ns +Called method() in top.m2.targets_0 at 10 ns +Called method() in top.m2.target_vec_3 at 10 ns +Called method() in top.m2.target_vec_2 at 10 ns +Called method() in top.m2.target_vec_1 at 10 ns +Called method() in top.m2.target_vec_0 at 10 ns +Called method() in top.m1.targets_0 at 10 ns +Called method() in top.m3.target_vec_3 at 10 ns +Called method() in top.m1.target_vec_2 at 10 ns +Called method() in top.m1.targets_1 at 20 ns +Called method() in top.m2.targets_1 at 20 ns +Called method() in top.m3.targets_1 at 20 ns +Top:0100 +Called method() in top.m3.targets_2 at 30 ns +Called method() in top.m2.targets_2 at 30 ns +Called method() in top.m1.targets_2 at 30 ns +Top:0120 +Called method() in top.m1.targets_3 at 40 ns +Called method() in top.m2.targets_3 at 40 ns +Called method() in top.m3.targets_3 at 40 ns +Top:0123 +Top:4123 +Top:4523 +Top:4563 +Top:4567 +Top:8567 +Top:8967 +vec_obj[0].name() = top.T2.vec_obj_0 +vec_obj[1].name() = top.T2.vec_obj_1 +vec_obj[2].name() = top.T2.vec_obj_2 +vec_obj[3].name() = top.T2.vec_obj_3 + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_vector/sc_vector.cpp b/src/systemc/tests/systemc/1666-2011-compliance/sc_vector/sc_vector.cpp new file mode 100644 index 000000000..21628e93d --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_vector/sc_vector.cpp @@ -0,0 +1,380 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// sc_vector.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: sc_vector.cpp,v $ +// Revision 1.3 2011/07/24 16:04:12 acg +// Philipp A. Hartmann: remove assert() that does not test the correct thing. +// +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// sc_vector + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include +#include + +using namespace sc_core; +using std::cout; +using std::endl; +using std::string; + +struct Sub: sc_module +{ + sc_inout p; + + Sub(sc_module_name) + { + SC_THREAD(T); + } + + void T() + { + for (;;) + { + wait(p.default_event()); + } + } + + SC_HAS_PROCESS(Sub); +}; + + +struct my_module: sc_module +{ + my_module(sc_module_name n, string weird_arg ) + { + sc_assert( weird_arg == "The Creator" || weird_arg == "WeIrD_aRg" ); + } +}; + + +struct my_object: sc_object +{ + my_object() : sc_object() {} + my_object(const char* c) : sc_object(c) {} +}; + + +struct i_f: virtual sc_interface +{ + virtual void method() = 0; +}; + + +struct Initiator: sc_module +{ + sc_vector > ports; + + Initiator(sc_module_name) + : ports("ports", 4) + { + SC_THREAD(T); + } + + void T() + { + for (unsigned int i = 0; i < ports.size(); i++) // Use method size() with vector + { + wait(10, SC_NS); + ports[i]->method(); // Use operator[] with vector + } + } + SC_HAS_PROCESS(Initiator); +}; + + +struct Initiator1: sc_module +{ + sc_port port; + + Initiator1(sc_module_name) + : port("port") + { + SC_THREAD(T); + } + + void T() + { + wait(10, SC_NS); + port->method(); + } + SC_HAS_PROCESS(Initiator1); +}; + + +struct Target: public sc_module, private i_f +{ + sc_export xp; + + Target(sc_module_name) + : xp("xp") + { + xp.bind( *this ); + } + + virtual void method() { + cout << "Called method() in " << name() << " at " << sc_time_stamp() << endl; + } +}; + + +typedef sc_vector > port_type; + +struct M: sc_module +{ + port_type ports; // Vector-of-ports + + sc_vector kids; // Vector-of-modules, each with a port p + sc_vector kids2; + sc_vector > sigs2; + sc_vector > sigs3; + + int dim; + + Initiator* initiator; + sc_vector targets; + + sc_vector initiator_vec; + sc_vector target_vec; + + + sc_vector my_vec_of_modules; + + struct my_module_creator + { + my_module_creator( string arg ) : weird_arg(arg) {} + + my_module* operator() (const char* name, size_t) + { + return new my_module(name, weird_arg ); + } + string weird_arg; + }; + + sc_vector my_vec_of_modules2; + + // If creator is not a function object, it could be a function + my_module* my_module_creator_func( const char* name, size_t i ) + { + creator_func_called = true; + return new my_module( name, "WeIrD_aRg" ); + } + + bool creator_func_called; + + + M(sc_module_name _name, int N) + : ports("ports", N) + , kids("kids") // Construct the vector with name seed "kids" + , kids2("kids2", 8) + , sigs2("sigs2", 4) + , sigs3("sigs3", 4) + , dim(N) + , targets("targets", N) + , initiator_vec("initiator_vec", N) + , target_vec("target_vec", N) + , my_vec_of_modules("my_vec_of_modules") + , creator_func_called(false) + { + //vec.init(N); // Alternative initialization (instead of passing N to ctor) + kids.init(N); + + sc_assert( ports.size() == static_cast(N) ); + sc_assert( kids.size() == static_cast(N) ); + + // Using vector view to create vector-of-ports + sc_assemble_vector(kids, &Sub::p).bind( ports ); + + for (unsigned int i = 0; i < kids.size(); i++) + { + sc_assert( kids[i].p.get_interface() == ports[i].get_interface() ); + } + + initiator = new Initiator("initiator"); + + // Using vector view to create vector-of-exports + initiator->ports.bind( sc_assemble_vector(targets, &Target::xp) ); + + // Double whammy + sc_assemble_vector(initiator_vec, &Initiator1::port).bind( sc_assemble_vector(target_vec, &Target::xp) ); + + // sc_vector_view has no public constructors, though it is copyable + sc_vector_assembly< Initiator1, sc_port > assembly = sc_assemble_vector(initiator_vec, &Initiator1::port); + + sc_assert( &*(assembly.begin()) == &(*initiator_vec.begin()).port ); + // sc_assert( &*(assembly.end()) == &(*initiator_vec.end()).port ); + sc_assert( assembly.size() == initiator_vec.size() ); + for (unsigned int i = 0; i < assembly.size(); i++) + { + sc_assert( &assembly[i] == &initiator_vec[i].port ); + sc_assert( &assembly.at(i) == &initiator_vec[i].port ); + } + + std::vector elements; + + // sc_vector_view (aka sc_vector_assembly) acts as a proxy for sc_vector + // It has begin() end() size() operator[] bind() etc + + elements = assembly.get_elements(); + for ( unsigned i = 0; i < elements.size(); i++ ) + if ( elements[i] ) + sc_assert( elements[i] == &initiator_vec[i].port ); + + elements = ports.get_elements(); + for ( unsigned i = 0; i < elements.size(); i++ ) + if ( elements[i] ) + sc_assert( elements[i] == &ports[i] ); + + elements = sc_assemble_vector(initiator_vec, &Initiator1::port).get_elements(); + for ( unsigned i = 0; i < elements.size(); i++ ) + if ( elements[i] ) + sc_assert( elements[i] == &initiator_vec[i].port ); + + // Additional method to support a vector iterator as an offset + sc_assemble_vector(kids2, &Sub::p).bind( sigs2.begin(), sigs2.end(), kids2.begin()); + sc_assemble_vector(kids2, &Sub::p).bind( sigs3.begin(), sigs3.end(), kids2.begin() + 4 ); + + // Construct elements of sc_vector, passing through ctor arguments to user-defined sc_module + my_vec_of_modules.init(N, my_module_creator("The Creator")); + + // Alternatively, instead of a function object pass in a function + my_vec_of_modules2.init(N, sc_bind( &M::my_module_creator_func, this, sc_unnamed::_1, sc_unnamed::_2 ) ); + + // Well-formedness check on creator function call + my_module_creator foo("The Creator"); + const char* nm = "foo"; + unsigned int idx = 0; + my_module* next = foo( (const char*)nm, (sc_vector::size_type)idx ); + char buf[80]; + strcpy(buf, this->name()); + strcat(buf, ".foo"); + sc_assert( strcmp(next->name(), buf) == 0 ); + delete next; + + SC_THREAD(T); + } + + void T() + { + int j = 0; + for (int i = 0; i < 10; i++) + { + wait(10, SC_NS); + ports[i % dim].write((j++) % 10); // Use operator[] with vector + } + } + + SC_HAS_PROCESS(M); +}; + +struct Top: sc_module +{ + sc_vector > sigs; // Vector-of-signals + sc_vector > more_sigs; // Vector-of-signals + sc_vector > hi_sigs; // Vector-of-signals + sc_vector > lo_sigs; // Vector-of-signals + + M *m1, *m2, *m3; + + Top(sc_module_name _name) + : sigs("sigs", 4) + , more_sigs("more_sigs", 4) + , hi_sigs("hi_sigs", 2) + , lo_sigs("lo_sigs", 2) + { + m1 = new M("m1", 4); + m2 = new M("m2", 4); + m3 = new M("m3", 4); + + for (int i = 0; i < 4; i++) + m1->ports[i].bind( sigs[i] ); // Using operator[] with a vector + + port_type::iterator it = m2->ports.bind( more_sigs ); // Vector-to-vector bind + sc_assert( (it - m2->ports.begin()) == 4 ); + + // Bind upper half of ports vector to hi_sigs + it = m3->ports.bind( hi_sigs.begin(), hi_sigs.end() ); + sc_assert( (it - m3->ports.begin()) == 2 ); + + // Bind lower half of ports vector to lo_sigs + it = m3->ports.bind( lo_sigs.begin(), lo_sigs.end(), it); + sc_assert( (it - m3->ports.begin()) == 4 ); + + SC_THREAD(T); + SC_THREAD(T2); + } + + void T() + { + sc_event_or_list list; + for (int i = 0; i < 4; i++) + list |= sigs[i].default_event(); + for (;;) + { + wait(list); + cout << "Top:" << sigs[0] << sigs[1] << sigs[2] << sigs[3] << endl; + } + } + + + void T2() + { + wait(10, SC_US); + + // Create sc_vector during simulation + sc_vector vec_obj("vec_obj", 4); + sc_assert( vec_obj.size() == 4 ); + for (unsigned int i = 0; i < vec_obj.size(); i++) + cout << "vec_obj[" << i << "].name() = " << vec_obj[i].name() << endl; + + sc_object* proc = sc_get_current_process_handle().get_process_object(); + std::vector children = proc->get_child_objects(); + + sc_assert( children.size() == 5 ); // sc_vector itself + 4 X my_object + } + + SC_HAS_PROCESS(Top); +}; + + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + std::vector children = top.get_child_objects(); + sc_assert( children.size() == 21 ); // sc_vectors themselves are sc_objects + + sc_start(); + + sc_assert( top.m1->creator_func_called ); + sc_assert( top.m2->creator_func_called ); + sc_assert( top.m3->creator_func_called ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_verbosity/golden/sc_verbosity.log b/src/systemc/tests/systemc/1666-2011-compliance/sc_verbosity/golden/sc_verbosity.log new file mode 100644 index 000000000..45b0a71ce --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_verbosity/golden/sc_verbosity.log @@ -0,0 +1,51 @@ +SystemC Simulation + +Info: DEFAULT: verbosity=SC_NONE + +Info: DEFAULT: verbosity=SC_LOW + +Info: DEFAULT: verbosity=SC_MEDIUM + +Info: SC_NONE: verbosity=SC_NONE + +Info: SC_MEDIUM: verbosity=SC_NONE + +Info: SC_MEDIUM: verbosity=SC_LOW + +Info: SC_MEDIUM: verbosity=SC_MEDIUM + +Info: SC_FULL: verbosity=SC_NONE + +Info: SC_FULL: verbosity=SC_LOW + +Info: SC_FULL: verbosity=SC_MEDIUM + +Info: SC_FULL: verbosity=SC_HIGH + +Info: SC_FULL: verbosity=SC_FULL + +Info: SC_LOW: verbosity=SC_NONE + +Info: SC_LOW: verbosity=SC_LOW + +Info: SC_HIGH: verbosity=SC_NONE + +Info: SC_HIGH: verbosity=SC_LOW + +Info: SC_HIGH: verbosity=SC_MEDIUM + +Info: SC_HIGH: verbosity=SC_HIGH + +Info: SC_DEBUG: verbosity=SC_NONE + +Info: SC_DEBUG: verbosity=SC_LOW + +Info: SC_DEBUG: verbosity=SC_MEDIUM + +Info: SC_DEBUG: verbosity=SC_HIGH + +Info: SC_DEBUG: verbosity=SC_FULL + +Info: SC_DEBUG: verbosity=SC_DEBUG + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_verbosity/sc_verbosity.cpp b/src/systemc/tests/systemc/1666-2011-compliance/sc_verbosity/sc_verbosity.cpp new file mode 100644 index 000000000..dfb7633d5 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_verbosity/sc_verbosity.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// sc_verbosity.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: sc_verbosity.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Verbosity level + +#include +using namespace sc_core; +using std::cout; +using std::endl; + + +void report_with_verbosity(const char* msg_type) +{ + SC_REPORT_INFO_VERB(msg_type, "verbosity=SC_NONE", SC_NONE); + SC_REPORT_INFO_VERB(msg_type, "verbosity=SC_LOW", SC_LOW); + SC_REPORT_INFO_VERB(msg_type, "verbosity=SC_MEDIUM", SC_MEDIUM); + SC_REPORT_INFO_VERB(msg_type, "verbosity=SC_HIGH", SC_HIGH); + SC_REPORT_INFO_VERB(msg_type, "verbosity=SC_FULL", SC_FULL); + SC_REPORT_INFO_VERB(msg_type, "verbosity=SC_DEBUG", SC_DEBUG); +} + + +SC_MODULE(Top) +{ + SC_CTOR(Top) + { + report_with_verbosity("DEFAULT"); + + sc_report_handler::set_verbosity_level( SC_NONE ); + report_with_verbosity("SC_NONE"); + sc_assert( sc_report_handler::get_verbosity_level() == 0 ); + + sc_report_handler::set_verbosity_level( SC_MEDIUM ); + report_with_verbosity("SC_MEDIUM"); + sc_assert( sc_report_handler::get_verbosity_level() == 200 ); + + sc_report_handler::set_verbosity_level( SC_FULL ); + report_with_verbosity("SC_FULL"); + sc_assert( sc_report_handler::get_verbosity_level() == 400 ); + + SC_THREAD(T); + + f = 0; + } + + int f; + + void T() + { + sc_report_handler::set_verbosity_level( SC_LOW ); + report_with_verbosity("SC_LOW"); + sc_assert( sc_report_handler::get_verbosity_level() == 100 ); + + sc_report_handler::set_verbosity_level( SC_HIGH ); + report_with_verbosity("SC_HIGH"); + sc_assert( sc_report_handler::get_verbosity_level() == 300 ); + + sc_report_handler::set_verbosity_level( SC_DEBUG ); + report_with_verbosity("SC_DEBUG"); + sc_assert( sc_report_handler::get_verbosity_level() == 500 ); + + try { + SC_REPORT_ERROR("msg_type", "msg"); + } + catch (const sc_report& e) { + sc_assert( e.get_verbosity() == SC_MEDIUM ); + f = 1; + } + } + +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + sc_start(); + + sc_assert( top.f ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_writer_policy/golden/sc_writer_policy.log b/src/systemc/tests/systemc/1666-2011-compliance/sc_writer_policy/golden/sc_writer_policy.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_writer_policy/golden/sc_writer_policy.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sc_writer_policy/sc_writer_policy.cpp b/src/systemc/tests/systemc/1666-2011-compliance/sc_writer_policy/sc_writer_policy.cpp new file mode 100644 index 000000000..fccd8fa60 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sc_writer_policy/sc_writer_policy.cpp @@ -0,0 +1,321 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// sc_writer_policy.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: sc_writer_policy.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// sc_writer_policy template argument of class sc_signal + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; +using std::string; + + +struct M: sc_module +{ + sc_inout port; + + sc_time delay; + sc_signal one_sig; + sc_signal many_sig; + + bool first_run; + int g0, g1, g2, g3; + + M(sc_module_name _name, sc_time _delay) + : port("port") + , delay(_delay) + , first_run(true) + { + sc_assert( one_sig.get_writer_policy() == SC_ONE_WRITER ); + sc_assert( many_sig.get_writer_policy() == SC_MANY_WRITERS ); + + SC_THREAD(T); + SC_METHOD(method_process_1); + SC_METHOD(method_process_2); + + one_sig.write(-1); + many_sig.write(-1); + + g0 = g1 = g2 = g3 = 0; + } + + void end_of_elaboration() + { + sc_assert( port->get_writer_policy() == SC_MANY_WRITERS ); + one_sig.write(1); + many_sig.write(1); + g0 = 1; + } + + void start_of_simulation() + { + one_sig.write(2); + many_sig.write(2); + g1 = 1; + } + + void T() + { + wait(delay); + port.write(true); + g2 = 1; + } + + void method_process_1() + { + one_sig.write(3); + many_sig.write(3); + } + + void method_process_2() + { + if (first_run) + { + first_run = false; + next_trigger(SC_ZERO_TIME); + } + else + { + try { + one_sig = 4; + } + catch (const std::exception& e) { + g3 = 1; + } + many_sig.write(4); + } + } + + SC_HAS_PROCESS(M); +}; + +struct Top: sc_module +{ + M *m1; + M *m2; + + sc_signal many_sig_1; + sc_signal many_sig_2; + sc_signal one_sig_1; + sc_signal one_sig_2; + + sc_buffer buffy; + + sc_signal_resolved resolved; + sc_signal_rv<2> rv; + + Top(sc_module_name _name) + : many_sig_1("many_sig_1") + , many_sig_2("many_sig_2") + , one_sig_1("one_sig_1") + , buffy("buffy") + , resolved("resolved") + , rv("rv") + { + m1 = new M("m1", sc_time(1, SC_PS)); + m2 = new M("m2", sc_time(2, SC_PS)); + + m1->port.bind(many_sig_1); + m2->port.bind(many_sig_1); + + SC_THREAD(T1); + SC_THREAD(T2); + sc_spawn(sc_bind(&Top::T3, this)); + + sc_assert( many_sig_1.get_writer_policy() == SC_MANY_WRITERS ); + sc_assert( many_sig_2.get_writer_policy() == SC_MANY_WRITERS ); + sc_assert( one_sig_1 .get_writer_policy() == SC_ONE_WRITER ); + sc_assert( one_sig_2 .get_writer_policy() == SC_ONE_WRITER ); + sc_assert( buffy .get_writer_policy() == SC_MANY_WRITERS ); + sc_assert( resolved .get_writer_policy() == SC_MANY_WRITERS ); + sc_assert( rv .get_writer_policy() == SC_MANY_WRITERS ); + + one_sig_1 = 0; + buffy = SC_LOGIC_X; + resolved = SC_LOGIC_Z; + rv = sc_lv<2>("ZZ"); + + // Writes outside of a process should not count as manyple writers + many_sig_1.write(true); + many_sig_2.write(0); + one_sig_1.write(0); + one_sig_2.write(0); + buffy.write(SC_LOGIC_0); + + f0 = f1 = f2 = f3 = f4 = f5 = 0; + + } + + int f0, f1, f2, f3, f4, f5; + + void T1() + { + resolved = SC_LOGIC_0; + rv = sc_lv<2>("01"); + + // Attempt to write SC_ONE_WRITER signal from >1 process should fail + try { + one_sig_1 = 1; + } + catch (const std::exception& e) { + f3 = 1; + } + + try { + one_sig_2 = 1; + } + catch (const std::exception& e) { + f4 = 1; + } + wait(1, SC_PS); + + // Attempt to write SC_MANY_WRITER signal from >1 process IN SAME DELTA should fail + try { + many_sig_2.write(3); + } + catch (const std::exception& e) { + f5 = 1; + } + wait(3, SC_PS); + + many_sig_2.write(6); + buffy = SC_LOGIC_0; + + wait(many_sig_2.default_event()); + f0 = 1; + } + + void T2() + { + resolved = SC_LOGIC_1; + rv = sc_lv<2>("10"); + + try { + one_sig_1 = 2; + } + catch (const std::exception& e) { + f3 = 1; + } + + try { + one_sig_2 = 2; + } + catch (const std::exception& e) { + f4 = 1; + } + wait(1, SC_PS); + + try { + many_sig_2.write(4); + } + catch (const std::exception& e) { + f5 = 1; + } + wait(4, SC_PS); + + many_sig_2.write(7); + buffy = SC_LOGIC_1; + + wait(many_sig_2.default_event()); + f1 = 1; + } + + void T3() + { + resolved = SC_LOGIC_Z; + rv = sc_lv<2>("ZZ"); + + try { + one_sig_1 = 3; + } + catch (const std::exception& e) { + f3 = 1; + } + + try { + one_sig_2 = 3; + } + catch (const std::exception& e) { + f4 = 1; + } + wait(1, SC_PS); + + try { + many_sig_2.write(5); + } + catch (const std::exception& e) { + f5 = 1; + } + wait(5, SC_PS); + + many_sig_2.write(8); + buffy = SC_LOGIC_0; + + wait(many_sig_2.default_event()); + f2 = 1; + + sc_assert( resolved.read() == SC_LOGIC_X ); + sc_assert( rv.read() == sc_lv<2>("XX") ); + sc_assert( many_sig_2.read() == 8 ); + sc_assert( buffy.read() == SC_LOGIC_0 ); + } + + SC_HAS_PROCESS(Top); +}; + + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + sc_start(); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + sc_assert( top.f4 ); + sc_assert( top.f5 ); + + sc_assert( top.m1->g0 ); + sc_assert( top.m2->g0 ); + sc_assert( top.m1->g1 ); + sc_assert( top.m2->g1 ); + sc_assert( top.m1->g2 ); + sc_assert( top.m2->g2 ); + sc_assert( top.m1->g3 ); + sc_assert( top.m2->g3 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/self_reset_bug/golden/self_reset_bug.log b/src/systemc/tests/systemc/1666-2011-compliance/self_reset_bug/golden/self_reset_bug.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/self_reset_bug/golden/self_reset_bug.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/self_reset_bug/self_reset_bug.cpp b/src/systemc/tests/systemc/1666-2011-compliance/self_reset_bug/self_reset_bug.cpp new file mode 100644 index 000000000..a56a140b9 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/self_reset_bug/self_reset_bug.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// self_reset_bug.cpp -- test for +// +// Original Author: John Aynsley, Doulus +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// + +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_METHOD(target); + target_handle = sc_get_current_process_handle(); + + count = 0; + f0 = f1 = f2 = f3 = 0; + } + + sc_process_handle target_handle; + int count; + int f0, f1, f2, f3; + + void target() + { + switch (count) + { + case 0: + f0 = 1; + count = 1; + next_trigger(10, SC_NS); + break; + + case 1: + f1 = 1; + count = 2; + target_handle.reset(); + break; + + case 2: + f2 = 1; + count = 3; + target_handle.reset(); + break; + + case 3: + f3 = 1; + count = 4; + break; + } + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f0 ); + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/stepwise_simulation/golden/stepwise_simulation.log b/src/systemc/tests/systemc/1666-2011-compliance/stepwise_simulation/golden/stepwise_simulation.log new file mode 100644 index 000000000..e16fcee9d --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/stepwise_simulation/golden/stepwise_simulation.log @@ -0,0 +1,42 @@ +SystemC Simulation + ----- running for delta + -- stopped at - 0 s - delta: 0 + ----- running for 10 ns + --- No-op start (warning) - +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + -- stopped at - 10 ns - delta: 0 + ----- running for delta +`echo.do_print' triggered at 10 ns - delta: 0 + -- stopped at - 10 ns - delta: 1 + ----- running for 5 ns + --- No-op start (warning) - +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + -- stopped at - 15 ns - delta: 1 + ----- running for delta +`echo.do_print' triggered at 15 ns - delta: 1 + -- stopped at - 15 ns - delta: 2 + ----- running for delta +`echo.do_print' triggered at 15 ns - delta: 2 + -- stopped at - 15 ns - delta: 3 + ----- running for 5 ns + --- No-op start (warning) - +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + -- stopped at - 20 ns - delta: 3 + ----- running for delta +`echo.do_print' triggered at 20 ns - delta: 3 + -- stopped at - 20 ns - delta: 4 + ----- running for 5 ns + --- No-op start (warning) - +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + -- stopped at - 25 ns - delta: 4 + ----- running for delta +`echo.do_print' triggered at 25 ns - delta: 4 + -- stopped at - 25 ns - delta: 5 + ----- running for delta +`echo.do_print' triggered at 25 ns - delta: 5 + -- stopped at - 25 ns - delta: 6 +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/stepwise_simulation/stepwise_simulation.cpp b/src/systemc/tests/systemc/1666-2011-compliance/stepwise_simulation/stepwise_simulation.cpp new file mode 100644 index 000000000..4a480e352 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/stepwise_simulation/stepwise_simulation.cpp @@ -0,0 +1,165 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stepwise_simulation.cpp -- Test step-wise simulation + + Original Author: Philipp A. Hartmann, OFFIS, 2011-01-21 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +const int num_events = 2; +const sc_time delay( 10, SC_NS ); + +//#define EXPLICIT_DELTA // should not modify the trace +#define DELAYED_EVENTS + +SC_MODULE(echo) +{ + sc_event ev[num_events]; + SC_CTOR(echo) + : self_trigger(3) + { + SC_METHOD(do_print); +# ifdef DELAYED_EVENTS + dont_initialize(); +# endif + for( int i=0; i 1 ) + next_trigger( delay/2 ); + else if( self_trigger == 1 ) + next_trigger( SC_ZERO_TIME ); + else + self_trigger = 3; + + } + int self_trigger; +}; + +void do_step( sc_time const & step ) +{ + sc_dt::uint64 delta = sc_delta_count(); + static bool start_delta = ( delta == 0 ) && ( step == SC_ZERO_TIME ); + std::cout + << " ----- running for " + << ( ( step == SC_ZERO_TIME ) ? "delta" : step.to_string() ) + << std::endl; + + sc_time start = sc_time_stamp(); + if( step > SC_ZERO_TIME ) + { + std::cout << " --- No-op start (warning) - "; + sc_start( step / 2, SC_EXIT_ON_STARVATION ); + sc_assert( start == sc_time_stamp() ); + + sc_start( step / 2, SC_RUN_TO_TIME ); + sc_assert( start + step / 2 == sc_time_stamp() ); + + sc_start( step / 2 ); // complete step + } + else + { + sc_start( SC_ZERO_TIME ); + } + sc_assert( start + step == sc_time_stamp() ); + + std::cout + << " -- stopped at - " + << sc_time_stamp() << " - delta: " << sc_delta_count() + << std::endl; + + // delta has only increased, when a delta has been run + sc_assert( sc_delta_count() + == delta + ( !start_delta && step == SC_ZERO_TIME ) ); + start_delta = false; +} + +int sc_main(int, char*[]) +{ + sc_assert( !sc_pending_activity() ); + sc_assert( sc_time_to_pending_activity() + == sc_max_time() - sc_time_stamp() ); + + sc_signal toggle("toggle"); + echo dut("echo"); + + // notify future events + for( int i=0; i SC_ZERO_TIME ); + + sc_assert( sc_pending_activity_at_future_time() + || sc_time_to_pending_activity() == SC_ZERO_TIME ); + + // run single (time) step + do_step( sc_time_to_pending_activity() ); + +# ifdef EXPLICIT_DELTA + // run remaining current deltas (optional) + while( sc_pending_activity_at_current_time() ) { + sc_assert( sc_time_to_pending_activity() == SC_ZERO_TIME ); + do_step( SC_ZERO_TIME ); + } +# endif // EXPLICIT_DELTA + } + + // force one empty evaluate (w/ non-empty update) + toggle.write( !toggle.read() ); + sc_assert( sc_pending_activity_at_current_time() ); + sc_start( SC_ZERO_TIME ); + + sc_assert( !sc_pending_activity() ); + sc_assert( sc_time_to_pending_activity() + == sc_max_time() - sc_time_stamp() ); + + std::cout << "Success" << std::endl; + return 0; +} diff --git a/src/systemc/tests/systemc/1666-2011-compliance/suspend_resume/golden/suspend_resume.log b/src/systemc/tests/systemc/1666-2011-compliance/suspend_resume/golden/suspend_resume.log new file mode 100644 index 000000000..5e04aadb4 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/suspend_resume/golden/suspend_resume.log @@ -0,0 +1,9 @@ +SystemC Simulation +Target awoke at 10 ns +Target awoke at 25 ns +Target awoke at 30 ns +Target awoke at 50 ns + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/suspend_resume/suspend_resume.cpp b/src/systemc/tests/systemc/1666-2011-compliance/suspend_resume/suspend_resume.cpp new file mode 100644 index 000000000..5f03444fd --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/suspend_resume/suspend_resume.cpp @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// suspend_resume.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: suspend_resume.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M1: sc_module +{ + M1(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_THREAD(target); + t = sc_get_current_process_handle(); + } + + sc_process_handle t; + sc_event ev; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at time 10 NS due to notification + + t.suspend(); + wait(10, SC_NS); + // Target does not run at time 20 NS while suspended + + t.resume(); + // Target runs at time 25 NS when resume is called + + wait(10, SC_NS); + // Target runs at time 30 NS due to notification + + t.disable(); + wait(10, SC_NS); + // Target does not run at time 40 NS while disabled + + t.enable(); + // Target does not run at time 45 NS when enable is called + + wait(10, SC_NS); + // Target runs at time 50 NS due to notification + + sc_stop(); + } + + void target() + { + for (;;) + { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << endl; + } + } + + SC_HAS_PROCESS(M1); +}; + +int sc_main(int argc, char* argv[]) +{ + M1 m("m"); + + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sync_reset/golden/sync_reset.log b/src/systemc/tests/systemc/1666-2011-compliance/sync_reset/golden/sync_reset.log new file mode 100644 index 000000000..cdf4578d6 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sync_reset/golden/sync_reset.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/sync_reset/sync_reset.cpp b/src/systemc/tests/systemc/1666-2011-compliance/sync_reset/sync_reset.cpp new file mode 100644 index 000000000..4cbcc6030 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/sync_reset/sync_reset.cpp @@ -0,0 +1,425 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// sync_reset.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: sync_reset.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// sync_reset_on/off + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M2: sc_module +{ + M2(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_THREAD(target1); + t1 = sc_get_current_process_handle(); + + sc_spawn_options opt; + opt.spawn_method(); + opt.dont_initialize(); + opt.set_sensitivity( &t1.reset_event() ); + sc_spawn(sc_bind( &M2::reset_handler, this ), "reset_handler", &opt); + + SC_THREAD(target2); + t2 = sc_get_current_process_handle(); + + SC_METHOD(target3); + sensitive << ev; + t3 = sc_get_current_process_handle(); + + count = 1; + f0 = f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + f10 = f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = f23 = f24 = f25 = f26 = f27 = f28 = f29 = 0; + f30 = f31 = f32 = f33 = f34 = f35 = f36 = f37 = f38 = f39 = 0; + f40 = f41 = f42 = f43 = f44 = f45 = f46 = f47 = f48 = f49 = 0; + } + + sc_process_handle t1, t2, t3; + sc_event ev; + int count; + + int f0, f1, f2, f3, f4, f5, f6, f7, f8, f9; + int f10, f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22, f23, f24, f25, f26, f27, f28, f29; + int f30, f31, f32, f33, f34, f35, f36, f37, f38, f39; + int f40, f41, f42, f43, f44, f45, f46, f47, f48, f49; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + sc_assert( !sc_is_unwinding() ); + ev.notify(); + } + } + + void calling() + { + count = 1; + wait(15, SC_NS); + // Target runs at 10 NS + + count = 2; + t1.sync_reset_on(); + // Target does not run at 15 NS + + wait(10, SC_NS); + // Target is reset at 20 NS + + count = 3; + wait(10, SC_NS); + // Target is reset again at 30 NS + + count = 4; + t1.sync_reset_off(); + // Target does not run at 35 NS + + wait(10, SC_NS); + // Target runs at 40 NS + + count = 5; + t1.sync_reset_off(); + // Double sync_reset_off + + wait(10, SC_NS); + // Target runs at 50 NS + + count = 6; + t1.sync_reset_on(); + t1.disable(); + wait(10, SC_NS); + // Target does not run at 60 NS + + count = 7; + t1.enable(); + // Target does not run at 65 NS + wait(10, SC_NS); + // Target reset at 70 NS + + count = 8; + t1.disable(); + wait(10, SC_NS); + // Target does not run at 80 NS + + count = 9; + t1.sync_reset_off(); + wait(10, SC_NS); + // Target still disabled at 90 NS + + count = 10; + t1.enable(); + wait(10, SC_NS); + // Target runs at 100 NS + + count = 11; + t1.suspend(); + wait(10, SC_NS); + // Target does not run at 110 NS + + count = 12; + wait(10, SC_NS); + // Target still suspended at 120 NS + + count = 13; + t1.resume(); + // Target runs at 125 NS + wait(1, SC_NS); + + count = 14; + wait(9, SC_NS); + // Target runs again at 130 NS + + count = 15; + t1.sync_reset_on(); + // Double sync_reset_on + wait(10, SC_NS); + // Target reset at 140 NS + + count = 16; + t1.sync_reset_off(); + wait(10, SC_NS); + // Target runs at 150 NS + + count = 17; + t1.sync_reset_off(); + wait(10, SC_NS); + // Target runs at 160 NS + + count = 18; + t1.sync_reset_on(); + wait(10, SC_NS); + // Target reset at 170 NS + + count = 19; + t1.reset(); + // Target reset at 175 NS + wait(SC_ZERO_TIME); + + count = 20; + wait(1, SC_NS); + t1.reset(); + // Target reset at 176 NS + + count = 21; + t1.reset(); + // Target reset at 176 NS + wait(1, SC_NS); + + count = 22; + wait(8, SC_NS); + // Target reset at 180 NS + + count = 23; + wait(10, SC_NS); + // Target reset at 190 NS + + count = 24; + t1.sync_reset_off(); + wait(10, SC_NS); + // Target runs at 200 NS + + count = 25; + wait(10, SC_NS); + // Target runs at 210 NS + + count = 26; + t1.reset(); + wait(SC_ZERO_TIME); + // Target reset at 215 + + t1.disable(); // Close it down + wait(sc_time(300, SC_NS) - sc_time_stamp()); + + count = 27; + t2.resume(); + wait(SC_ZERO_TIME); + + count = 28; + wait(15, SC_NS); + + count = 29; + t2.sync_reset_on(); + wait(10, SC_NS); + + t2.sync_reset_off(); + t2.suspend(); + wait(sc_time(405, SC_NS) - sc_time_stamp()); + + count = 30; + t3.resume(); + wait(SC_ZERO_TIME); + + count = 31; + wait(10, SC_NS); + + count = 32; + t3.sync_reset_on(); + wait(10, SC_NS); + + sc_stop(); + } + + void target1() + { + //cout << "Target1 called/reset at " << sc_time_stamp() << " count = " << count << endl; + switch (count) + { + case 1: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); f0=1; break; + case 2: sc_assert( sc_time_stamp() == sc_time(20, SC_NS) ); f1=1; break; + case 3: sc_assert( sc_time_stamp() == sc_time(30, SC_NS) ); f2=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(70, SC_NS) ); f3=1; break; + case 15: sc_assert( sc_time_stamp() == sc_time(140, SC_NS) ); f4=1; break; + case 18: sc_assert( sc_time_stamp() == sc_time(170, SC_NS) ); f5=1; break; + case 19: sc_assert( sc_time_stamp() == sc_time(175, SC_NS) ); f6=1; break; + case 20: sc_assert( sc_time_stamp() == sc_time(176, SC_NS) ); f7=1; break; + case 21: sc_assert( sc_time_stamp() == sc_time(176, SC_NS) ); f8=1; break; + case 22: sc_assert( sc_time_stamp() == sc_time(180, SC_NS) ); f9=1; break; + case 23: sc_assert( sc_time_stamp() == sc_time(190, SC_NS) ); f10=1; break; + case 26: sc_assert( sc_time_stamp() == sc_time(215, SC_NS) ); f11=1; break; + default: sc_assert( false ); break; + } + + for (;;) + { + try { + wait(ev); + //cout << "Target1 awoke at " << sc_time_stamp() << " count = " << count << endl; + sc_assert( !sc_is_unwinding() ); + switch (count) + { + case 1: sc_assert( sc_time_stamp() == sc_time(10, SC_NS) ); f12=1; break; + case 4: sc_assert( sc_time_stamp() == sc_time(40, SC_NS) ); f13=1; break; + case 5: sc_assert( sc_time_stamp() == sc_time(50, SC_NS) ); f14=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time(100, SC_NS) ); f15=1; break; + case 13: sc_assert( sc_time_stamp() == sc_time(125, SC_NS) ); f16=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(130, SC_NS) ); f17=1; break; + case 16: sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); f18=1; break; + case 17: sc_assert( sc_time_stamp() == sc_time(160, SC_NS) ); f19=1; break; + case 24: sc_assert( sc_time_stamp() == sc_time(200, SC_NS) ); f20=1; break; + case 25: sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); f21=1; break; + default: sc_assert( false ); break; + } + } + catch (const sc_unwind_exception& ex) { + sc_assert( sc_is_unwinding() ); + sc_assert( ex.is_reset() ); + throw ex; + } + } + } + + void reset_handler() + { + //cout << "reset_handler awoke at " << sc_time_stamp() << " count = " << count << endl; + sc_assert( !sc_is_unwinding() ); + switch (count) + { + case 2: sc_assert( sc_time_stamp() == sc_time(20, SC_NS) ); f22=1; break; + case 3: sc_assert( sc_time_stamp() == sc_time(30, SC_NS) ); f23=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(70, SC_NS) ); f24=1; break; + case 15: sc_assert( sc_time_stamp() == sc_time(140, SC_NS) ); f27=1; break;; + case 18: sc_assert( sc_time_stamp() == sc_time(170, SC_NS) ); f28=1; break; + case 19: sc_assert( sc_time_stamp() == sc_time(175, SC_NS) ); f29=1; break; + case 21: sc_assert( sc_time_stamp() == sc_time(176, SC_NS) ); f31=1; break; + case 22: sc_assert( sc_time_stamp() == sc_time(180, SC_NS) ); f32=1; break; + case 23: sc_assert( sc_time_stamp() == sc_time(190, SC_NS) ); f33=1; break; + case 26: sc_assert( sc_time_stamp() == sc_time(215, SC_NS) ); f34=1; break; + default: sc_assert( false ); break; + } + } + + void target2() + { + if (sc_delta_count() == 0) + t2.suspend(); // Hack to work around not being able to call suspend during elab + + switch (count) + { + case 27: sc_assert( sc_time_stamp() == sc_time(300, SC_NS) ); f35=1; break; + case 29: sc_assert( sc_time_stamp() == sc_time(320, SC_NS) ); f37=1; break; + default: sc_assert( false ); break; + } + while(1) + { + try { + wait(10, SC_NS); + } + catch (const sc_unwind_exception& e) { + switch (count) + { + case 29: sc_assert( sc_time_stamp() == sc_time(320, SC_NS) ); f38=1; break; + default: sc_assert( false ); break; + } + throw e; + } + switch (count) + { + case 28: sc_assert( sc_time_stamp() == sc_time(310, SC_NS) ); f36=1; break; + default: sc_assert( false ); break; + } + } + } + + void target3() + { + if (sc_delta_count() == 0) + t3.suspend(); // Hack to work around not being able to call suspend during elab + + switch (count) + { + case 1: sc_assert( sc_time_stamp() == sc_time(0, SC_NS) ); break; + case 30: sc_assert( sc_time_stamp() == sc_time(405, SC_NS) ); f39=1; break; + case 31: sc_assert( sc_time_stamp() == sc_time(410, SC_NS) ); f40=1; break; + case 32: sc_assert( sc_time_stamp() == sc_time(420, SC_NS) ); f41=1; break; + default: sc_assert( false ); break; + } + } + + SC_HAS_PROCESS(M2); +}; + +int sc_main(int argc, char* argv[]) +{ + M2 m("m"); + + sc_start(); + + sc_assert(m.f0); + sc_assert(m.f1); + sc_assert(m.f2); + sc_assert(m.f3); + sc_assert(m.f4); + sc_assert(m.f5); + sc_assert(m.f6); + sc_assert(m.f7); + sc_assert(m.f8); + sc_assert(m.f9); + sc_assert(m.f10); + sc_assert(m.f11); + sc_assert(m.f12); + sc_assert(m.f13); + sc_assert(m.f14); + sc_assert(m.f15); + sc_assert(m.f16); + sc_assert(m.f17); + sc_assert(m.f18); + sc_assert(m.f19); + sc_assert(m.f20); + sc_assert(m.f21); + sc_assert(m.f22); + sc_assert(m.f23); + sc_assert(m.f24); + sc_assert(m.f27); + sc_assert(m.f28); + sc_assert(m.f29); + sc_assert(m.f31); + sc_assert(m.f32); + sc_assert(m.f33); + sc_assert(m.f34); + sc_assert(m.f35); + sc_assert(m.f36); + sc_assert(m.f37); + sc_assert(m.f38); + sc_assert(m.f39); + sc_assert(m.f40); + sc_assert(m.f41); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/throw_it/golden/throw_it.log b/src/systemc/tests/systemc/1666-2011-compliance/throw_it/golden/throw_it.log new file mode 100644 index 000000000..3ff513536 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/throw_it/golden/throw_it.log @@ -0,0 +1,11 @@ +SystemC Simulation + +Warning: (W556) throw_it on method/non-running process is being ignored : top.target4 +In file: +In process: top.target4 @ 0 s + +Warning: (W556) throw_it on method/non-running process is being ignored : top.target4 +In file: +In process: top.calling @ 20 ns + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/throw_it/throw_it.cpp b/src/systemc/tests/systemc/1666-2011-compliance/throw_it/throw_it.cpp new file mode 100644 index 000000000..6417758bc --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/throw_it/throw_it.cpp @@ -0,0 +1,378 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// throw_it.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: throw_it.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Process control method throw_it + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct Top: sc_module +{ + Top(sc_module_name _name) + { + SC_THREAD(calling); + + SC_THREAD(target1); + t1 = sc_get_current_process_handle(); + + SC_THREAD(target2); + t2 = sc_get_current_process_handle(); + + SC_THREAD(target3); + t3 = sc_get_current_process_handle(); + + SC_METHOD(target4); + t4 = sc_get_current_process_handle(); + + SC_THREAD(target5); + async_reset_signal_is(areset, true); + sensitive << ev; + t5 = sc_get_current_process_handle(); + t5.disable(); + + count = 0; + f0 = f1 = f2 = f3 = f4 = f5 = f6 = f7 = f8 = f9 = 0; + f10 = f11 = f12 = f13 = f14 = f15 = f16 = f17 = f18 = f19 = 0; + f20 = f21 = f22 = f23 = f24 = f25 = f26 = f27 = f28 = f29 = 0; + } + + sc_process_handle t1, t2, t3, t4, t5; + sc_event ev; + sc_signal areset; + int count; + int f0, f1, f2, f3, f4, f5, f6, f7, f8, f9; + int f10, f11, f12, f13, f14, f15, f16, f17, f18, f19; + int f20, f21, f22, f23, f24, f25, f26, f27, f28, f29; + + std::exception ex; + + void start_of_simulation() + { + try { + t1.throw_it(ex); + } + catch (std::exception ex) { + f1 = 1; + sc_assert( t1.valid() ); + sc_assert( !t1.terminated() ); + } + } + + void calling() + { + wait(SC_ZERO_TIME); + + count = 1; + ev.notify(5, SC_NS); + wait(10, SC_NS); + + count = 2; + t1.throw_it(ex); + sc_assert( t1.valid() ); + sc_assert( !t1.terminated() ); + sc_assert(f4); + wait(10, SC_NS); + + count = 3; + t4.throw_it(ex); // Throw exception in method process + sc_assert( t4.valid() ); + sc_assert( !t4.terminated() ); + wait(sc_time(200, SC_NS) - sc_time_stamp()); + + count = 4; + t1.suspend(); + ev.notify(5, SC_NS); + wait(10, SC_NS); + + count = 5; + t1.throw_it(ex); + wait(10, SC_NS); + + count = 6; + t1.throw_it(ex); + sc_assert( t1.valid() ); + sc_assert( !t1.terminated() ); + wait(10, SC_NS); + + count = 7; + t1.resume(); + wait(sc_time(300, SC_NS) - sc_time_stamp()); + + count = 8; + t1.disable(); + ev.notify(5, SC_NS); + wait(10, SC_NS); + + count = 9; + t1.throw_it(ex); + wait(10, SC_NS); + + count = 10; + t1.throw_it(ex); + wait(10, SC_NS); + + count = 11; + t1.enable(); + wait(sc_time(400, SC_NS) - sc_time_stamp()); + + count = 12; + t1.sync_reset_on(); + ev.notify(5, SC_NS); + wait(10, SC_NS); + wait(sc_time(400, SC_NS) - sc_time_stamp()); + + count = 13; + t1.throw_it(ex); + wait(10, SC_NS); + + count = 14; + t1.throw_it(ex); + wait(10, SC_NS); + + count = 15; + t1.sync_reset_off(); + wait(sc_time(500, SC_NS) - sc_time_stamp()); + + count = 16; + ev.notify(); + t1.throw_it(ex); + wait(10, SC_NS); + + count = 17; + t1.reset(); + wait(sc_time(600, SC_NS) - sc_time_stamp()); + + count = 18; + t1.disable(); + t5.enable(); + areset.write(false); + wait(10, SC_NS); + + count = 19; + ev.notify(); + wait(10, SC_NS); + + count = 20; + ev.notify(); + wait(10, SC_NS); + + count = 21; + areset.write(true); + wait(10, SC_NS); + + count = 22; + t5.throw_it(ex); + wait(10, SC_NS); + + count = 23; + ev.notify(); + wait(10, SC_NS); + + count = 24; + t5.throw_it(ex); + wait(10, SC_NS); + + count = 25; + areset.write(false); + wait(sc_time(700, SC_NS) - sc_time_stamp()); + + count = 26; + ev.notify(); + wait(10, SC_NS); + // async_reset_signal_is ? + } + + void target1() // Target for throw_it from calling() + { + switch (count) + { + case 0: sc_assert( sc_time_stamp() == sc_time( 0, SC_NS) ); f2=1; break; + case 12: sc_assert( sc_time_stamp() == sc_time(405, SC_NS) ); f13=1; break; + case 17: sc_assert( sc_time_stamp() == sc_time(510, SC_NS) ); f19=1; break; + default: sc_assert( false ); break; + } + + for (;;) + { + try { + wait(ev); + switch (count) + { + case 1: sc_assert( sc_time_stamp() == sc_time(5, SC_NS) ); f3=1; break; + case 7: sc_assert( sc_time_stamp() == sc_time(230, SC_NS) ); f9=1; break; + default: sc_assert( false ); break; + } + } + catch (const std::exception& ex) { + switch (count) + { + case 2: sc_assert( !sc_is_unwinding() ); + sc_assert( sc_time_stamp() == sc_time( 10, SC_NS) ); f4=1; break; + case 5: sc_assert( sc_time_stamp() == sc_time(210, SC_NS) ); f7=1; break; + case 6: sc_assert( sc_time_stamp() == sc_time(220, SC_NS) ); f8=1; break; + case 9: sc_assert( sc_time_stamp() == sc_time(310, SC_NS) ); f10=1; break; + case 10: sc_assert( sc_time_stamp() == sc_time(320, SC_NS) ); f11=1; break; + case 12: sc_assert( sc_is_unwinding() ); + sc_assert( sc_time_stamp() == sc_time(405, SC_NS) ); f12=1; + throw dynamic_cast(ex); + case 13: sc_assert( !sc_is_unwinding() ); + sc_assert( sc_time_stamp() == sc_time(410, SC_NS) ); f14=1; break; + case 14: sc_assert( sc_time_stamp() == sc_time(420, SC_NS) ); f15=1; break; + case 16: sc_assert( sc_time_stamp() == sc_time(500, SC_NS) ); f16=1; break; + case 17: sc_assert( sc_is_unwinding() ); + sc_assert( sc_time_stamp() == sc_time(510, SC_NS) ); f18=1; + throw dynamic_cast(ex); + default: sc_assert( false ); break; + } + } + } + } + + void target2() + { + wait(100, SC_NS); + try { + t2.throw_it(ex); // Process throws an exception to itself + sc_assert( false ); + } + catch (std::exception ex) { + sc_assert( t2.valid() ); + sc_assert( !t2.terminated() ); + f5 = 1; + t3.throw_it(ex); + } + } + + void target3() // Target for throw_it from target2() + { + try { + wait(1, SC_US); + } + catch (std::exception ex) { + sc_assert( t3.valid() ); + sc_assert( !t3.terminated() ); + f6 = 1; + } + } + + void target4() // SC_METHOD, target for throw_it from calling() + { + t4.throw_it(ex); // Method process throws exception to itself + if (count != 0) + sc_assert( false ); + } + + void target5() // Target for throw_it from calling() + async_reset_signal + { + switch (count) + { + case 19: sc_assert( sc_time_stamp() == sc_time(610, SC_NS) ); f20=1; break; + case 21: sc_assert( sc_time_stamp() == sc_time(630, SC_NS) ); f23=1; break; + case 23: sc_assert( sc_time_stamp() == sc_time(650, SC_NS) ); f26=1; break; + default: sc_assert( false ); break; + } + + for (;;) + { + try { + wait(); + + switch (count) + { + case 20: sc_assert( sc_time_stamp() == sc_time(620, SC_NS) ); f21=1; break; + case 26: sc_assert( sc_time_stamp() == sc_time(700, SC_NS) ); f28=1; break; + default: sc_assert( false ); break; + } + } + catch (const std::exception& ex) { + switch (count) + { + case 21: sc_assert( sc_is_unwinding() ); + sc_assert( sc_time_stamp() == sc_time(630, SC_NS) ); f22=1; + throw dynamic_cast(ex); + case 22: sc_assert( !sc_is_unwinding() ); + sc_assert( sc_time_stamp() == sc_time(640, SC_NS) ); f24=1; break; + case 23: sc_assert( sc_is_unwinding() ); + sc_assert( sc_time_stamp() == sc_time(650, SC_NS) ); f25=1; + throw dynamic_cast(ex); + case 24: sc_assert( !sc_is_unwinding() ); + sc_assert( sc_time_stamp() == sc_time(660, SC_NS) ); f27=1; break; + default: sc_assert( false ); break; + } + } + } + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.f1 ); + sc_assert( top.f2 ); + sc_assert( top.f3 ); + sc_assert( top.f4 ); + sc_assert( top.f5 ); + sc_assert( top.f6 ); + sc_assert( top.f7 ); + sc_assert( top.f8 ); + sc_assert( top.f9 ); + sc_assert( top.f10 ); + sc_assert( top.f11 ); + sc_assert( top.f12 ); + sc_assert( top.f13 ); + sc_assert( top.f14 ); + sc_assert( top.f15 ); + sc_assert( top.f16 ); + sc_assert( top.f18 ); + sc_assert( top.f19 ); + sc_assert( top.f20 ); + sc_assert( top.f21 ); + sc_assert( top.f22 ); + sc_assert( top.f23 ); + sc_assert( top.f24 ); + sc_assert( top.f25 ); + sc_assert( top.f26 ); + sc_assert( top.f27 ); + sc_assert( top.f28 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/version_macros/golden/version_macros.log b/src/systemc/tests/systemc/1666-2011-compliance/version_macros/golden/version_macros.log new file mode 100644 index 000000000..147d986bf --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/version_macros/golden/version_macros.log @@ -0,0 +1,4 @@ +SystemC Simulation +IEEE_1666_SYSTEMC = 201101 + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/version_macros/version_macros.cpp b/src/systemc/tests/systemc/1666-2011-compliance/version_macros/version_macros.cpp new file mode 100644 index 000000000..9b84c265b --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/version_macros/version_macros.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// version_macros.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: version_macros.cpp,v $ +// Revision 1.4 2011/05/16 17:17:43 acg +// Andy Goodrich: update test to mask information that changes by SystemC +// revision. +// +// Revision 1.3 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Process control method throw_it + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +int sc_main(int argc, char* argv[]) +{ + sc_assert( SC_VERSION_MAJOR == sc_version_major ); + sc_assert( SC_VERSION_MINOR == sc_version_minor ); + sc_assert( SC_VERSION_PATCH == sc_version_patch ); + sc_assert( SC_VERSION_ORIGINATOR == sc_version_originator ); + sc_assert( SC_VERSION_RELEASE_DATE == sc_version_release_date ); + sc_assert( SC_VERSION_PRERELEASE == sc_version_prerelease ); + sc_assert( SC_IS_PRERELEASE == sc_is_prerelease ); + sc_assert( SC_VERSION == sc_version_string ); + sc_assert( sc_release() == sc_version_string ); + sc_assert( SC_COPYRIGHT == sc_copyright_string ); + sc_assert( sc_copyright() == sc_copyright_string ); + + cout << "IEEE_1666_SYSTEMC = " << IEEE_1666_SYSTEMC << endl; + + //sc_start(); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/1666-2011-compliance/virtual_bind/golden/virtual_bind.log b/src/systemc/tests/systemc/1666-2011-compliance/virtual_bind/golden/virtual_bind.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/virtual_bind/golden/virtual_bind.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/1666-2011-compliance/virtual_bind/virtual_bind.cpp b/src/systemc/tests/systemc/1666-2011-compliance/virtual_bind/virtual_bind.cpp new file mode 100644 index 000000000..4be25a357 --- /dev/null +++ b/src/systemc/tests/systemc/1666-2011-compliance/virtual_bind/virtual_bind.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// virtual_bind.cpp -- test for +// +// Original Author: John Aynsley, Doulos, Inc. +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: virtual_bind.cpp,v $ +// Revision 1.2 2011/05/08 19:18:46 acg +// Andy Goodrich: remove extraneous + prefixes from git diff. +// + +// Process control method throw_it + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct i_f: virtual sc_interface +{ + virtual void meth() = 0; +}; + +struct Chan: i_f, sc_module +{ + int f1; + Chan(sc_module_name _name) + { + f1 = 0; + } + virtual void meth() { f1 = 1; } +}; + +struct my_port: sc_port +{ + void bind(i_f& _if) + { + sc_assert(false); + } +}; + +struct extended_port: my_port +{ + int f2; + extended_port() { f2 = 0; } + + void bind(i_f& _if) + { + sc_port::bind(_if); + f2 = 1; + } +}; + +struct my_export: sc_export +{ + void bind(i_f& _if) + { + sc_assert(false); + } +}; + +struct extended_export: my_export +{ + int f3; + extended_export() { f3 = 0; } + + void bind(i_f& _if) + { + sc_export::bind(_if); + f3 = 1; + } +}; + +struct Child: sc_module +{ + extended_port p; + extended_export xp; + + Chan chan; + + Child(sc_module_name _name) + : chan("chan") + { + my_export* mxp = static_cast( &xp ); + mxp->bind(chan); // bind should be virtual + SC_THREAD(T); + } + + void T() + { + p->meth(); + } + + SC_HAS_PROCESS(Child); +}; + +struct Top: sc_module +{ + Child *child; + Chan chan; + + Top(sc_module_name _name) + : chan("chan") + { + child = new Child("child"); + extended_port* ep = &(child->p); + my_port* mp = static_cast(ep); + mp->bind(chan); // bind should be virtual + + SC_THREAD(T); + } + + void T() + { + child->xp->meth(); + } + + SC_HAS_PROCESS(Top); +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_start(); + + sc_assert( top.chan.f1 ); + sc_assert( top.child->chan.f1 ); + sc_assert( top.child->p.f2 ); + sc_assert( top.child->xp.f3 ); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/bugs/async_reset_init/async_reset_init.cpp b/src/systemc/tests/systemc/bugs/async_reset_init/async_reset_init.cpp new file mode 100644 index 000000000..70455825d --- /dev/null +++ b/src/systemc/tests/systemc/bugs/async_reset_init/async_reset_init.cpp @@ -0,0 +1,135 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + async_reset_init.cpp -- Starting a process in async reset state + + Original Author: Philipp A. Hartmann, Intel Corporation, 2017-07-23 + + *****************************************************************************/ + +#include +#include + +SC_MODULE(module) +{ + sc_core::sc_in rst_in; + sc_core::sc_event ev; + + SC_CTOR(module) + : rst_in("rst_in") + , ev("ev") + { + SC_THREAD(thread0); + sensitive << ev; + async_reset_signal_is(rst_in,true); + + SC_THREAD(thread1); + sensitive << ev; + async_reset_signal_is(rst_in,true); + dont_initialize(); + + SC_METHOD(method0); + sensitive << ev; + async_reset_signal_is(rst_in,true); + + SC_METHOD(method1); + sensitive << ev; + async_reset_signal_is(rst_in,true); + dont_initialize(); + } + + void thread0() { do_thread(); } + void thread1() { do_thread(); } + + void do_thread() + { + print( "reset state" ); + wait(); + print( "reset done" ); + + while(1) // main loop + { + wait(); + print( "continuing" ); + } + } + + void method0() { do_method(); } + void method1() { do_method(); } + + void do_method() + { + if( rst_in.read() ) { + print("reset state"); + } else { + print("running"); + } + } + + void print(const char* msg) + { + using namespace sc_core; + using namespace std; + cout + << setw(6) << sc_time_stamp() + << " (" << sc_delta_count() << "): " + << sc_get_current_process_handle().name() << ": " + << msg + << endl; + } +}; // SC_MODULE(module) + +int sc_main(int argc, char* argv[]) +{ + using namespace sc_core; + using namespace std; + + sc_signal rst_sig; + rst_sig.write(true); + + module top("top"); + top.rst_in(rst_sig); + + cout << "Starting simulation ... " << endl; + + sc_start(10, SC_NS); + top.ev.notify(SC_ZERO_TIME); + sc_start(10, SC_NS); + + rst_sig.write(false); // releasing reset + + sc_start(10, SC_NS); + top.ev.notify(SC_ZERO_TIME); + sc_start(10, SC_NS); + top.ev.notify(SC_ZERO_TIME); + sc_start(10, SC_NS); + + rst_sig.write(true); // entering reset + + sc_start(10, SC_NS); + top.ev.notify(SC_ZERO_TIME); + sc_start(10, SC_NS); + + cout << "... done." << endl; + sc_stop(); + return 0; +} + diff --git a/src/systemc/tests/systemc/bugs/async_reset_init/golden/async_reset_init.log b/src/systemc/tests/systemc/bugs/async_reset_init/golden/async_reset_init.log new file mode 100644 index 000000000..681bfe511 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/async_reset_init/golden/async_reset_init.log @@ -0,0 +1,30 @@ +SystemC Simulation +Starting simulation ... + 0 s (0): top.method1: reset state + 0 s (0): top.method0: reset state + 0 s (0): top.method0: reset state + 0 s (0): top.thread0: reset state + 0 s (0): top.thread1: reset state + 10 ns (1): top.method1: reset state + 10 ns (1): top.method0: reset state + 10 ns (1): top.thread1: reset state + 10 ns (1): top.thread0: reset state + 30 ns (2): top.method1: running + 30 ns (2): top.method0: running + 30 ns (2): top.thread1: reset done + 30 ns (2): top.thread0: reset done + 40 ns (3): top.method1: running + 40 ns (3): top.method0: running + 40 ns (3): top.thread1: continuing + 40 ns (3): top.thread0: continuing + 50 ns (4): top.method1: reset state + 50 ns (4): top.method0: reset state + 50 ns (4): top.thread0: reset state + 50 ns (4): top.thread1: reset state + 60 ns (5): top.method1: reset state + 60 ns (5): top.method0: reset state + 60 ns (5): top.thread1: reset state + 60 ns (5): top.thread0: reset state +... done. + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/bugs/bug_147853/bug_147853.cpp b/src/systemc/tests/systemc/bugs/bug_147853/bug_147853.cpp new file mode 100644 index 000000000..82c20d6a3 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/bug_147853/bug_147853.cpp @@ -0,0 +1,34 @@ +// This tests that sc_clock values are updated during the value update phase +// not during the execution phase of a delta cycle. + +#include "systemc.h" + + +SC_MODULE(Test) { + sc_in_clk clk; + sc_event e1; + sc_time d; + + void main() { + cerr << sc_time_stamp() <<" " << name() << " clk = " << clk.read() << "\n"; + e1.notify(d); + } + SC_CTOR(Test) :d(5,SC_NS) { + SC_METHOD(main); + sensitive << e1; + } +}; + + +int sc_main(int argc,char *argv[]) { + + Test t1("t1"); + sc_clock clk("clk",10,SC_NS); + Test t2("t2"); + + t1.clk(clk); + t2.clk(clk); + + sc_start(50,SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/bugs/bug_147853/golden/bug_147853.log b/src/systemc/tests/systemc/bugs/bug_147853/golden/bug_147853.log new file mode 100644 index 000000000..cb6267fb4 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/bug_147853/golden/bug_147853.log @@ -0,0 +1,21 @@ +SystemC Simulation +0 s t1 clk = 0 +0 s t2 clk = 0 +5 ns t1 clk = 1 +5 ns t2 clk = 1 +10 ns t1 clk = 0 +10 ns t2 clk = 0 +15 ns t1 clk = 1 +15 ns t2 clk = 1 +20 ns t1 clk = 0 +20 ns t2 clk = 0 +25 ns t1 clk = 1 +25 ns t2 clk = 1 +30 ns t1 clk = 0 +30 ns t2 clk = 0 +35 ns t1 clk = 1 +35 ns t2 clk = 1 +40 ns t1 clk = 0 +40 ns t2 clk = 0 +45 ns t1 clk = 1 +45 ns t2 clk = 1 diff --git a/src/systemc/tests/systemc/bugs/bug_185/bug_185.cpp b/src/systemc/tests/systemc/bugs/bug_185/bug_185.cpp new file mode 100644 index 000000000..d314a3504 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/bug_185/bug_185.cpp @@ -0,0 +1,26 @@ +// Bug 185 Test - sc_bv(char) constructor. +// +// sc_bv<8> a('1') was yielding an all-zero value rather than all ones. + + +#include "systemc.h" + +int sc_main(int argc, char* argv[]) +{ + sc_bv<8> a('0'); + sc_bv<9> b('1'); + sc_bv<11> c(false); + sc_bv<11> d(true); + sc_bv<11> e(0); + sc_bv<11> f(1); + + cout << "a = " << a << endl; + cout << "b = " << b << endl; + cout << "c = " << c << endl; + cout << "d = " << d << endl; + cout << "e = " << e << endl; + cout << "f = " << f << endl; + + cerr << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/bugs/bug_185/golden/bug_185.log b/src/systemc/tests/systemc/bugs/bug_185/golden/bug_185.log new file mode 100644 index 000000000..e022eb2d5 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/bug_185/golden/bug_185.log @@ -0,0 +1,8 @@ +SystemC Simulation +a = 00000000 +b = 111111111 +c = 00000000000 +d = 11111111111 +e = 00000000000 +f = 00000000001 +Program completed diff --git a/src/systemc/tests/systemc/bugs/bug_70/bug_70.cpp b/src/systemc/tests/systemc/bugs/bug_70/bug_70.cpp new file mode 100644 index 000000000..e36a1e57b --- /dev/null +++ b/src/systemc/tests/systemc/bugs/bug_70/bug_70.cpp @@ -0,0 +1,29 @@ +// Bug 70 - Problems with part selections on sc_biguint. + +#include "systemc.h" +//#include "iomanip.h" + +int sc_main(int argc, char* argv[]) +{ + sc_biguint< 16 > a, b, c; + //sc_uint< 16 > a, b ; + + a = 0x5A6C ; + b = 0 ; + c = 0 ; + + cout << "a: " << a.to_string(SC_HEX) << endl ; + cout << "b: " << b.to_string(SC_HEX) << " - So far so good" << endl ; + cout << "c: " << c.to_string(SC_HEX) << " - So far so good" << endl ; + + b(7,0) = a(15,8) ; // Now b should be "0x005A" or ??? + c = a(15,8) ; // Now c should be "0x005A" or ??? + + cout << "a: " << a.to_string(SC_HEX) << endl ; + cout << "b: " << b.to_string(SC_HEX) << endl ; + cout << "c: " << c.to_string(SC_HEX) << endl ; + + sc_stop() ; + return 0; +} + diff --git a/src/systemc/tests/systemc/bugs/bug_70/golden/bug_70.log b/src/systemc/tests/systemc/bugs/bug_70/golden/bug_70.log new file mode 100644 index 000000000..d8a7be7f2 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/bug_70/golden/bug_70.log @@ -0,0 +1,9 @@ +SystemC Simulation +a: 0x05a6c +b: 0x00000 - So far so good +c: 0x00000 - So far so good +a: 0x05a6c +b: 0x0005a +c: 0x0005a + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/bugs/constructor_throw/constructor_throw.cpp b/src/systemc/tests/systemc/bugs/constructor_throw/constructor_throw.cpp new file mode 100644 index 000000000..560643bc1 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/constructor_throw/constructor_throw.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 14 March 2006 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + $Log: constructor_throw.cpp,v $ + Revision 1.1.1.1 2006/12/15 20:25:56 acg + systemc_tests-2.3 + + Revision 1.1 2006/03/15 00:12:08 acg + Andy Goodrich: Forte Design Systems + First check in. + + *****************************************************************************/ + +// This tests a bug when an exception is thrown in +// sc_module::sc_module() for a dynamically allocated sc_module +// object. We are calling sc_module::end_module() on a module that has +// already been deleted. The scenario runs like this: +// +// a) the sc_module constructor is entered +// b) the exception is thrown +// c) the exception processor deletes the storage for the sc_module +// d) the stack is unrolled causing the sc_module_name instance to be deleted +// e) ~sc_module_name() calls end_module() with its pointer to the sc_module +// f) because the sc_module has been deleted its storage is corrupted, +// either by linking it to a free space chain, or by reuse of some sort +// g) the m_simc field is garbage +// h) the m_object_manager field is also garbage +// i) an exception occurs +// +// This does not happen for automatic sc_module instances since the +// storage for the module is not reclaimed its just part of the stack. +// +// I am fixing this by having the destructor for sc_module clear the +// module pointer in its sc_module_name instance. That cuts things at +// step (e) above, since the pointer will be null if the module has +// already been deleted. To make sure the module stack is okay, I call +// end-module() in ~sc_module in the case where there is an +// sc_module_name pointer lying around. + +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + SC_REPORT_ERROR(SC_ID_SET_TIME_RESOLUTION_,""); + } +}; + +int sc_main(int argc, char* argv[]) +{ + sc_module* x_p = new X("x"); + + cout << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/bugs/constructor_throw/golden/constructor_throw.log b/src/systemc/tests/systemc/bugs/constructor_throw/golden/constructor_throw.log new file mode 100644 index 000000000..6401c8a94 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/constructor_throw/golden/constructor_throw.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E514) set time resolution failed +In file: diff --git a/src/systemc/tests/systemc/bugs/instantiation_detection/golden/instantiation_detection.log b/src/systemc/tests/systemc/bugs/instantiation_detection/golden/instantiation_detection.log new file mode 100644 index 000000000..4ba693b97 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/instantiation_detection/golden/instantiation_detection.log @@ -0,0 +1,161 @@ +SystemC Simulation + +Error: (E100) port specified outside of module: port 'port_0' (sc_port_base) +In file: + +Error: (E122) sc_export specified outside of module: export 'export_0' (sc_object) +In file: + +---8<--- end_of_elaboration ---8<--- + +Error: (E529) insert module failed: elaboration done +In file: + +Error: (E110) insert port failed: elaboration done: port 'dut.port_0' (sc_port_base) +In file: + +Error: (E121) insert sc_export failed: elaboration done: export 'dut.export_0' (sc_object) +In file: + +Error: (E113) insert primitive channel failed: elaboration done +In file: + +--->8--- end_of_elaboration --->8--- + +---8<--- start_of_simulation ---8<--- + +Error: (E529) insert module failed: elaboration done +In file: + +Error: (E110) insert port failed: elaboration done: port 'dut.port_1' (sc_port_base) +In file: + +Error: (E121) insert sc_export failed: elaboration done: export 'dut.export_1' (sc_object) +In file: + +Error: (E113) insert primitive channel failed: elaboration done +In file: + +--->8--- start_of_simulation --->8--- + +Error: (E529) insert module failed: simulation running +In file: +In process: dut.create_things_1 @ 0 s + +Error: (E110) insert port failed: simulation running: port 'dut.create_things_1.port_0' (sc_port_base) +In file: +In process: dut.create_things_1 @ 0 s + +Error: (E121) insert sc_export failed: simulation running: export 'dut.create_things_1.export_0' (sc_object) +In file: +In process: dut.create_things_1 @ 0 s + +Error: (E113) insert primitive channel failed: simulation running +In file: +In process: dut.create_things_1 @ 0 s + +Error: (E542) call to SC_THREAD in sc_module while simulation running: dut.create_things_1.create_things +In file: +In process: dut.create_things_1 @ 0 s + +Error: (E541) call to SC_METHOD in sc_module while simulation running: dut.create_things_1.create_things +In file: +In process: dut.create_things_1 @ 0 s + +Error: (E529) insert module failed: simulation running +In file: +In process: dut.create_things_3 @ 0 s + +Error: (E110) insert port failed: simulation running: port 'dut.create_things_3.port_0' (sc_port_base) +In file: +In process: dut.create_things_3 @ 0 s + +Error: (E121) insert sc_export failed: simulation running: export 'dut.create_things_3.export_0' (sc_object) +In file: +In process: dut.create_things_3 @ 0 s + +Error: (E113) insert primitive channel failed: simulation running +In file: +In process: dut.create_things_3 @ 0 s + +Error: (E542) call to SC_THREAD in sc_module while simulation running: dut.create_things_3.create_things +In file: +In process: dut.create_things_3 @ 0 s + +Error: (E541) call to SC_METHOD in sc_module while simulation running: dut.create_things_3.create_things +In file: +In process: dut.create_things_3 @ 0 s + +Error: (E529) insert module failed: simulation running +In file: +In process: dut.create_things @ 0 s + +Error: (E110) insert port failed: simulation running: port 'dut.create_things.port_0' (sc_port_base) +In file: +In process: dut.create_things @ 0 s + +Error: (E121) insert sc_export failed: simulation running: export 'dut.create_things.export_0' (sc_object) +In file: +In process: dut.create_things @ 0 s + +Error: (E113) insert primitive channel failed: simulation running +In file: +In process: dut.create_things @ 0 s + +Error: (E542) call to SC_THREAD in sc_module while simulation running: dut.create_things.create_things +In file: +In process: dut.create_things @ 0 s + +Error: (E541) call to SC_METHOD in sc_module while simulation running: dut.create_things.create_things +In file: +In process: dut.create_things @ 0 s + +Error: (E529) insert module failed: simulation running +In file: +In process: dut.create_things_0 @ 0 s + +Error: (E110) insert port failed: simulation running: port 'dut.create_things_0.port_0' (sc_port_base) +In file: +In process: dut.create_things_0 @ 0 s + +Error: (E121) insert sc_export failed: simulation running: export 'dut.create_things_0.export_0' (sc_object) +In file: +In process: dut.create_things_0 @ 0 s + +Error: (E113) insert primitive channel failed: simulation running +In file: +In process: dut.create_things_0 @ 0 s + +Error: (E542) call to SC_THREAD in sc_module while simulation running: dut.create_things_0.create_things +In file: +In process: dut.create_things_0 @ 0 s + +Error: (E541) call to SC_METHOD in sc_module while simulation running: dut.create_things_0.create_things +In file: +In process: dut.create_things_0 @ 0 s + +Error: (E529) insert module failed: simulation running +In file: +In process: dut.create_things_2 @ 0 s + +Error: (E110) insert port failed: simulation running: port 'dut.create_things_2.port_0' (sc_port_base) +In file: +In process: dut.create_things_2 @ 0 s + +Error: (E121) insert sc_export failed: simulation running: export 'dut.create_things_2.export_0' (sc_object) +In file: +In process: dut.create_things_2 @ 0 s + +Error: (E113) insert primitive channel failed: simulation running +In file: +In process: dut.create_things_2 @ 0 s + +Error: (E542) call to SC_THREAD in sc_module while simulation running: dut.create_things_2.create_things +In file: +In process: dut.create_things_2 @ 0 s + +Error: (E541) call to SC_METHOD in sc_module while simulation running: dut.create_things_2.create_things +In file: +In process: dut.create_things_2 @ 0 s + +Success diff --git a/src/systemc/tests/systemc/bugs/instantiation_detection/instantiation_detection.cpp b/src/systemc/tests/systemc/bugs/instantiation_detection/instantiation_detection.cpp new file mode 100644 index 000000000..b3cd75b6d --- /dev/null +++ b/src/systemc/tests/systemc/bugs/instantiation_detection/instantiation_detection.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + end_of_elaboration.cpp -- Check instantiation detection + + Original Author: Philipp A. Hartmann, OFFIS, 2011-02-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +template< typename T > +T* create( const char* nm ) +{ + try { + return new T( sc_gen_unique_name(nm) ); + } + catch ( sc_report const & x ) + { + std::cout << "\n" << x.what() << std::endl; + } + return 0; // error detected, return NULL +} + +SC_MODULE(sub_module) +{ + SC_CTOR(sub_module){} +}; + +SC_MODULE(top) +{ + SC_CTOR(top){ + SC_THREAD( create_things ); + } + + void create_things() + { + sc_assert( create("sub_module") == NULL ); + sc_assert( create >("port") == NULL ); + sc_assert( create > >("export") == NULL ); + sc_assert( create >("signal") == NULL ); + + try { + SC_THREAD(create_things); + } catch ( sc_report const & x ) { + std::cout << "\n" << x.what() << std::endl; + } + + try { + SC_METHOD(create_things); + } catch ( sc_report const & x ) { + std::cout << "\n" << x.what() << std::endl; + } + } + +#if 1 + void start_of_simulation() + { + std:: cout << "\n---8<--- start_of_simulation ---8<---\n"; + create_things(); + std:: cout << "\n--->8--- start_of_simulation --->8---\n"; + } + void end_of_elaboration() + { + std:: cout << "\n---8<--- end_of_elaboration ---8<---\n"; + create_things(); + std:: cout << "\n--->8--- end_of_elaboration --->8---\n"; + } +#endif +}; + +int sc_main( int, char*[] ) +{ + sc_report_handler::set_actions( "object already exists", SC_DO_NOTHING ); + + top dut("dut"); + + // disallow ports and exports outside of modules + sc_assert( create >("port") == NULL ); + sc_assert( create > >("export") == NULL ); + + sc_start( 1, SC_NS ); + std::cout << "\nSuccess" << std::endl; + return 0; +} diff --git a/src/systemc/tests/systemc/bugs/sc_bigint_part_select/test01/golden/test01.log b/src/systemc/tests/systemc/bugs/sc_bigint_part_select/test01/golden/test01.log new file mode 100644 index 000000000..3c0381b46 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sc_bigint_part_select/test01/golden/test01.log @@ -0,0 +1,10 @@ +SystemC Simulation + bw:0x999888fffeeedddcccbbbaaa + f0:0x0aaa + f1:0x0bbb + f2:0x0ccc + f3:0x0ddd + f4:0x0eee + f5:0x0fff + f6:0x0888 + f7:0x0999 diff --git a/src/systemc/tests/systemc/bugs/sc_bigint_part_select/test01/test01.cpp b/src/systemc/tests/systemc/bugs/sc_bigint_part_select/test01/test01.cpp new file mode 100644 index 000000000..23aca446b --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sc_bigint_part_select/test01/test01.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_main.cpp -- + + Original Author: Ray Ryan, Mentor Graphics, 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(sctop) { + SC_CTOR(sctop); +}; + +#ifdef MTI_INTEGRATION + SC_MODULE_EXPORT(sctop); +#endif + +sctop::sctop(sc_module_name name) : sc_module(name) +{ + sc_bigint<96> bigword("0x999888fffeeedddcccbbbaaa"); + + cout << " bw:" << bigword.to_string(SC_HEX) + << "\n f0:" << bigword.range( 11, 0).to_string(SC_HEX) + << "\n f1:" << bigword.range( 23, 12).to_string(SC_HEX) + << "\n f2:" << bigword.range( 35, 24).to_string(SC_HEX) + << "\n f3:" << bigword.range( 47, 36).to_string(SC_HEX) + << "\n f4:" << bigword.range( 59, 48).to_string(SC_HEX) + << "\n f5:" << bigword.range( 71, 60).to_string(SC_HEX) + << "\n f6:" << bigword.range( 83, 72).to_string(SC_HEX) + << "\n f7:" << bigword.range( 95, 84).to_string(SC_HEX) + << endl; + +} +int sc_main(int argc, char** argv) { + sctop top("top"); + sc_start(1, SC_NS); + return 0; +} + + diff --git a/src/systemc/tests/systemc/bugs/sc_string_bracket_assign/golden/sc_string_bracket_assign.log b/src/systemc/tests/systemc/bugs/sc_string_bracket_assign/golden/sc_string_bracket_assign.log new file mode 100644 index 000000000..4811e4392 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sc_string_bracket_assign/golden/sc_string_bracket_assign.log @@ -0,0 +1,3 @@ +SystemC Simulation +s5: abc +s6: aXc diff --git a/src/systemc/tests/systemc/bugs/sc_string_bracket_assign/sc_string_bracket_assign.cpp b/src/systemc/tests/systemc/bugs/sc_string_bracket_assign/sc_string_bracket_assign.cpp new file mode 100644 index 000000000..8014fb07f --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sc_string_bracket_assign/sc_string_bracket_assign.cpp @@ -0,0 +1,17 @@ + +#if !defined(SC_USE_SC_STRING_OLD) && !defined(SC_USE_STD_STRING) +# define SC_USE_SC_STRING_OLD +//# define SC_USE_STD_STRING +#endif //SC_USE_STRING_* + +#include "systemc.h" + +int sc_main(int argc, char* argv[]) +{ + sc_string s5 = "abc"; + sc_string s6 = s5; + + s6[1] ='X'; + cout << "s5: " << s5 << endl << "s6: " << s6 << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log new file mode 100644 index 000000000..233ac07ad --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log @@ -0,0 +1,11 @@ +SystemC Simulation +v_sc_int_31_min=0b1000000000000000000000000000000 +v_sc_bigint_31_min=0b1000000000000000000000000000000 +v_sc_uint32_max=0b011111111111111111111111111111111 +v_sc_biguint_32_max=0b011111111111111111111111111111111 +v_sc_bigint_31_min & v_uint_max=0b11000000000000000000000000000000 +v_sc_bigint_31_min & v_sc_biguint_32_max=0b011000000000000000000000000000000 +int31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint=0b1111111111111111111111111111111111000000000000000000000000000000 +bigint31_uint32=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_biguint32=0b0000000000000000000000000000000011000000000000000000000000000000 diff --git a/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.bsd64 b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.bsd64 new file mode 100644 index 000000000..3d7ccbcae --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.bsd64 @@ -0,0 +1,11 @@ +SystemC Simulation +v_sc_int_31_min=0b1000000000000000000000000000000 +v_sc_bigint_31_min=0b1000000000000000000000000000000 +v_sc_uint32_max=0b011111111111111111111111111111111 +v_sc_biguint_32_max=0b011111111111111111111111111111111 +v_sc_bigint_31_min & v_uint_max=0b0000000000000000000000000000000011000000000000000000000000000000 +v_sc_bigint_31_min & v_sc_biguint_32_max=0b011000000000000000000000000000000 +int31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint32=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_biguint32=0b0000000000000000000000000000000011000000000000000000000000000000 diff --git a/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.cygwin64 b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.cygwin64 new file mode 100644 index 000000000..3d7ccbcae --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.cygwin64 @@ -0,0 +1,11 @@ +SystemC Simulation +v_sc_int_31_min=0b1000000000000000000000000000000 +v_sc_bigint_31_min=0b1000000000000000000000000000000 +v_sc_uint32_max=0b011111111111111111111111111111111 +v_sc_biguint_32_max=0b011111111111111111111111111111111 +v_sc_bigint_31_min & v_uint_max=0b0000000000000000000000000000000011000000000000000000000000000000 +v_sc_bigint_31_min & v_sc_biguint_32_max=0b011000000000000000000000000000000 +int31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint32=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_biguint32=0b0000000000000000000000000000000011000000000000000000000000000000 diff --git a/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.linux64 b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.linux64 new file mode 100644 index 000000000..3d7ccbcae --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.linux64 @@ -0,0 +1,11 @@ +SystemC Simulation +v_sc_int_31_min=0b1000000000000000000000000000000 +v_sc_bigint_31_min=0b1000000000000000000000000000000 +v_sc_uint32_max=0b011111111111111111111111111111111 +v_sc_biguint_32_max=0b011111111111111111111111111111111 +v_sc_bigint_31_min & v_uint_max=0b0000000000000000000000000000000011000000000000000000000000000000 +v_sc_bigint_31_min & v_sc_biguint_32_max=0b011000000000000000000000000000000 +int31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint32=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_biguint32=0b0000000000000000000000000000000011000000000000000000000000000000 diff --git a/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.linuxaarch64 b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.linuxaarch64 new file mode 100644 index 000000000..3d7ccbcae --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.linuxaarch64 @@ -0,0 +1,11 @@ +SystemC Simulation +v_sc_int_31_min=0b1000000000000000000000000000000 +v_sc_bigint_31_min=0b1000000000000000000000000000000 +v_sc_uint32_max=0b011111111111111111111111111111111 +v_sc_biguint_32_max=0b011111111111111111111111111111111 +v_sc_bigint_31_min & v_uint_max=0b0000000000000000000000000000000011000000000000000000000000000000 +v_sc_bigint_31_min & v_sc_biguint_32_max=0b011000000000000000000000000000000 +int31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint32=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_biguint32=0b0000000000000000000000000000000011000000000000000000000000000000 diff --git a/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.macosx64 b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.macosx64 new file mode 100644 index 000000000..3d7ccbcae --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sign_extension/golden/sign_extension.log.macosx64 @@ -0,0 +1,11 @@ +SystemC Simulation +v_sc_int_31_min=0b1000000000000000000000000000000 +v_sc_bigint_31_min=0b1000000000000000000000000000000 +v_sc_uint32_max=0b011111111111111111111111111111111 +v_sc_biguint_32_max=0b011111111111111111111111111111111 +v_sc_bigint_31_min & v_uint_max=0b0000000000000000000000000000000011000000000000000000000000000000 +v_sc_bigint_31_min & v_sc_biguint_32_max=0b011000000000000000000000000000000 +int31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_uint32=0b0000000000000000000000000000000011000000000000000000000000000000 +bigint31_biguint32=0b0000000000000000000000000000000011000000000000000000000000000000 diff --git a/src/systemc/tests/systemc/bugs/sign_extension/sign_extension.cpp b/src/systemc/tests/systemc/bugs/sign_extension/sign_extension.cpp new file mode 100644 index 000000000..c51fde25a --- /dev/null +++ b/src/systemc/tests/systemc/bugs/sign_extension/sign_extension.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sign_extension.cpp -- + + Original Author: Philipp A. Hartmann, OFFIS, 2012-07-17 + + ----------------------------------------------------------------------------- + + This test demonatrates a bug in the sc_biguint constructor(?), where + construction from bit-wise expressions with "unsigned int" and sc_bigint + may lead to wrongly sign-extended values (at least on 32-bit machines) when + the destination size is bigger than the source size. + + *****************************************************************************/ + +#include +using sc_dt::sc_int; +using sc_dt::sc_uint; +using sc_dt::sc_bigint; +using sc_dt::sc_biguint; +using sc_dt::SC_BIN; + +#define DUMP_VAR( Var ) \ + std::cout << #Var "=" << (Var).to_string(SC_BIN) << "\n" + +int sc_main(int, char*[]) +{ + + sc_int<31> v_sc_int_31_min = (1<<30); // 010...0 (31 bit) + sc_bigint<31> v_sc_bigint_31_min = (1<<30); // 010...0 + unsigned int v_uint_max = ~0; // 11....1 (32-bit) + sc_uint<32> v_sc_uint32_max = ~0; // 11....1 (32-bit) + sc_biguint<32> v_sc_biguint_32_max = -1; // 11....1 (32-bit) + + DUMP_VAR( v_sc_int_31_min ); + DUMP_VAR( v_sc_bigint_31_min ); + DUMP_VAR( v_sc_uint32_max ); + DUMP_VAR( v_sc_biguint_32_max ); + + sc_bigint<64> int31_uint = (v_sc_int_31_min & v_uint_max); + // the following expression yields 0b1....10...0 on 32-bit machines + sc_bigint<64> bigint31_uint = (v_sc_bigint_31_min & v_uint_max); + sc_bigint<64> bigint31_uint32 = (v_sc_bigint_31_min & v_sc_uint32_max); + sc_bigint<64> bigint31_biguint32 = (v_sc_bigint_31_min & v_sc_biguint_32_max); + + DUMP_VAR( v_sc_bigint_31_min & v_uint_max ); + DUMP_VAR( v_sc_bigint_31_min & v_sc_biguint_32_max ); + + DUMP_VAR(int31_uint); + DUMP_VAR(bigint31_uint); // <-- + DUMP_VAR(bigint31_uint32); + DUMP_VAR(bigint31_biguint32); + + return 0; +} + diff --git a/src/systemc/tests/systemc/bugs/stack_alignment/.notsparcOS5 b/src/systemc/tests/systemc/bugs/stack_alignment/.notsparcOS5 new file mode 100644 index 000000000..f40b3ddeb --- /dev/null +++ b/src/systemc/tests/systemc/bugs/stack_alignment/.notsparcOS5 @@ -0,0 +1 @@ +# This bug is assumed not to affect the 32-bit SPARC architecture. diff --git a/src/systemc/tests/systemc/bugs/stack_alignment/golden/stack_alignment.log b/src/systemc/tests/systemc/bugs/stack_alignment/golden/stack_alignment.log new file mode 100644 index 000000000..fcb395ef9 --- /dev/null +++ b/src/systemc/tests/systemc/bugs/stack_alignment/golden/stack_alignment.log @@ -0,0 +1,6 @@ +SystemC Simulation +Inside sc_main() +Inside C::run() +Between C::run() +Out of C::run() +Out of sc_main() diff --git a/src/systemc/tests/systemc/bugs/stack_alignment/stack_alignment.cpp b/src/systemc/tests/systemc/bugs/stack_alignment/stack_alignment.cpp new file mode 100644 index 000000000..e20395e2f --- /dev/null +++ b/src/systemc/tests/systemc/bugs/stack_alignment/stack_alignment.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stack_alignment.cpp -- This example shows the crash of an fxsave instruction + in the sc_thread stack environment, but not in the + original linux process stack, which is correctly + aligned on first function. + + Please note that this test probably runs OK on a faulty implementation in + 64-bit in general (depending on your libc implementation), but will crash + for sure in 32-bit. + + Original Author: Eric Paire, STMicroelectronics + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +/* + * This program exhibits a bug in the management by QT of the stack of each + * SystemC process. At least on i686 & x86_64, GCC makes the assumption that + * the stack is aligned on a 16-byte boundary on each C/C++ function entry. + * This convention allows GCC to respects constraints of automatic (stack) + * variable alignment, using the __attribute)__ ((align(X))) GCC extension. + * + * The X is known to be 16 for i686 & x86_64, as this is the largest alignment + * required by instructions operands, actually used by fxsave instruction. + * + * The attached code shows up the problem by crashing when fxsave is executed + * in a SystemC thread, and executing correctly the *same* code on the initial + * process stack, as initialized by the libc runtime. + * + * This misbehavior does not occur systematically for x86_64 (no crash, + * or crash difficult to reproduce with standard malloc()), but often does + * with i686. Notice that the instruction with the right alignment is shown + * when using the myfpxregs address which is aligned on 16-byte boundary. + */ + +#if defined(__x86_64__) +# define FXSAVE "fxsaveq" +#else +# define FXSAVE "fxsave" +#endif + +#if defined(__GNUC__) +# define ALIGNED_ARRAY( Type, Name, Size, Align ) \ + Type Name[Size] __attribute__((aligned(Align))) +#elif defined(_MSC_VER) +# define ALIGNED_ARRAY( Type, Name, Size, Align ) \ + __declspec(align(Align)) Type Name[Size] +#endif + +#if defined(__GNUC__) && ( defined(__x86_64__) || defined(__i386__) ) +# define ASM( Assembly ) __asm__ __volatile__( Assembly ) +#else +# define ASM( Assembly ) /* not implemented */ +#endif + +// Class +SC_MODULE(C) +{ +public: + SC_CTOR(C) { + SC_THREAD(run); + } + void run(void) + { + ALIGNED_ARRAY( char, fpxregs64, 512+15, 16 ); + + cout << "Inside C::run() " << endl; + + // manually enforce alignment (volatile to avoid optmizations) + char * volatile myfpxregs = fpxregs64; + while ((uintptr_t)myfpxregs & 0xF) + myfpxregs++; + + // the "real" requirement: enforced alignment works + sc_assert( !((uintptr_t)fpxregs64 & 0xF) ); + sc_assert( !((uintptr_t)myfpxregs & 0xF) ); + sc_assert( myfpxregs == fpxregs64 ); + + // test assembly on supported platforms + ASM( FXSAVE " (%0)" :: "r"(myfpxregs) ); + cout << "Between C::run() " << endl; + ASM( FXSAVE " %0" : "=m"(fpxregs64) ); + + cout << "Out of C::run() " << endl; + } +}; + +int sc_main(int , char** ) { + C the_C("C"); + + ALIGNED_ARRAY( char, fpxregs64, 512, 16 ); + + cout << "Inside sc_main() " << endl; + ASM( FXSAVE " %0" : "=m"(fpxregs64) ); + sc_start(1, SC_NS); + cout << "Out of sc_main() " << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/ports/test01/golden/test01.log b/src/systemc/tests/systemc/communication/ports/test01/golden/test01.log new file mode 100644 index 000000000..dba01dd10 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test01/golden/test01.log @@ -0,0 +1,22 @@ +SystemC Simulation +a.in_clk (sc_in) +a.inout_clk (sc_inout) +a.out_clk (sc_out) +a.fifo_in (sc_fifo_in) +a.fifo_out (sc_fifo_out) +a.port (sc_port) +a.in_int (sc_in) +a.in_bool (sc_in) +a.in_logic (sc_in) +a.inout_int (sc_inout) +a.inout_bool (sc_inout) +a.inout_logic (sc_inout) +a.out_int (sc_out) +a.out_bool (sc_out) +a.out_logic (sc_out) +a.in_resolved (sc_in_resolved) +a.inout_resolved (sc_inout_resolved) +a.out_resolved (sc_out_resolved) +a.in_rv (sc_in_rv) +a.inout_rv (sc_inout_rv) +a.out_rv (sc_out_rv) diff --git a/src/systemc/tests/systemc/communication/ports/test01/test01.cpp b/src/systemc/tests/systemc/communication/ports/test01/test01.cpp new file mode 100644 index 000000000..2b4c72cb0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test01/test01.cpp @@ -0,0 +1,121 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of named ports + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk in_clk; + sc_inout_clk inout_clk; + sc_out_clk out_clk; + + sc_fifo_in fifo_in; + sc_fifo_out fifo_out; + + sc_port > port; + + sc_in in_int; + sc_in in_bool; + sc_in in_logic; + sc_inout inout_int; + sc_inout inout_bool; + sc_inout inout_logic; + sc_out out_int; + sc_out out_bool; + sc_out out_logic; + + sc_in_resolved in_resolved; + sc_inout_resolved inout_resolved; + sc_out_resolved out_resolved; + + sc_in_rv<1> in_rv; + sc_inout_rv<1> inout_rv; + sc_out_rv<1> out_rv; + + SC_CTOR( mod_a ) + : in_clk( "in_clk" ), inout_clk( "inout_clk" ), out_clk( "out_clk" ), + fifo_in( "fifo_in" ), fifo_out( "fifo_out" ), + port( "port" ), + in_int( "in_int" ), in_bool( "in_bool" ), in_logic( "in_logic" ), + inout_int( "inout_int" ), inout_bool( "inout_bool" ), + inout_logic( "inout_logic" ), + out_int( "out_int" ), out_bool( "out_bool" ), out_logic( "out_logic" ), + in_resolved( "in_resolved" ), inout_resolved( "inout_resolved" ), + out_resolved( "out_resolved" ), + in_rv( "in_rv" ), inout_rv( "inout_rv" ), out_rv( "out_rv" ) + {} +}; + +#define WRITE(a) \ + cout << a.name() << " (" << a.kind() << ")" << endl + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + WRITE( a.in_clk ); + WRITE( a.inout_clk ); + WRITE( a.out_clk ); + + WRITE( a.fifo_in ); + WRITE( a.fifo_out ); + + WRITE( a.port ); + + WRITE( a.in_int ); + WRITE( a.in_bool ); + WRITE( a.in_logic ); + WRITE( a.inout_int ); + WRITE( a.inout_bool ); + WRITE( a.inout_logic ); + WRITE( a.out_int ); + WRITE( a.out_bool ); + WRITE( a.out_logic ); + + WRITE( a.in_resolved ); + WRITE( a.inout_resolved ); + WRITE( a.out_resolved ); + + WRITE( a.in_rv ); + WRITE( a.inout_rv ); + WRITE( a.out_rv ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/ports/test02/golden/test02.log b/src/systemc/tests/systemc/communication/ports/test02/golden/test02.log new file mode 100644 index 000000000..171833b33 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test02/golden/test02.log @@ -0,0 +1,2 @@ +SystemC Simulation +binding of models to parent model is completed diff --git a/src/systemc/tests/systemc/communication/ports/test02/test02.cpp b/src/systemc/tests/systemc/communication/ports/test02/test02.cpp new file mode 100644 index 000000000..9db0a12ad --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test02/test02.cpp @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of ports binding in hierarchical model + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + + sc_in in; + sc_out out; + + SC_CTOR( mod_a ) + { } +}; + +SC_MODULE( mod_b ) +{ + + sc_in in; + sc_out out; + + SC_CTOR( mod_b ) + { } +}; + +// parent model +SC_MODULE( mod_c ) +{ + + sc_in input; + sc_out output; + sc_signal buf; + mod_a module_a; + mod_b module_b; + + SC_CTOR( mod_c ): + module_a("module_a"), + module_b("module_b") + { + + module_a.in(input); + module_a.out(buf); + module_b.in(buf); + module_b.out(output); + + } +}; + + +int +sc_main( int, char*[] ) +{ + mod_c c("c"); + cout << "binding of models to parent model is completed\n"; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/ports/test03/golden/test03.log b/src/systemc/tests/systemc/communication/ports/test03/golden/test03.log new file mode 100644 index 000000000..6ba7e2788 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test03/golden/test03.log @@ -0,0 +1,27 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: interface and/or port binding in port constructors is deprecated +c.sig_1 (sc_signal) +c.sig_2 (sc_signal) +c.sig_3 (sc_signal) +c.sig_4 (sc_signal) +c.in_1 (sc_port) +c.in_2 (sc_port) +c.in_3 (sc_port) +c.in_4 (sc_port) +c.port_0 (sc_port) +c.port_1 (sc_port) +c.inout_1 (sc_port) +c.inout_2 (sc_port) +c.inout_3 (sc_port) +c.inout_4 (sc_port) +c.port_2 (sc_port) +c.port_3 (sc_port) + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/communication/ports/test03/test03.cpp b/src/systemc/tests/systemc/communication/ports/test03/test03.cpp new file mode 100644 index 000000000..b535b76af --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test03/test03.cpp @@ -0,0 +1,122 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_port constructors for sc_signal_in(inout)_if interface + +#include "systemc.h" + + +SC_MODULE( mod_b ) +{ + + sc_port,1> input_1; + sc_port,1> input_2; + sc_port,1> input_3; + sc_port,1> input_4; + sc_port,1> inout_1; + sc_port,1> inout_2; + sc_port,1> inout_3; + sc_port,1> inout_4; + + + SC_CTOR( mod_b ) + { } +}; + +SC_MODULE( mod_c ) +{ + mod_b b; + + sc_signal sig1; + sc_signal sig2; + sc_signal sig3; + sc_signal sig4; + + sc_port,1> in1; + sc_port,1> in2; + sc_port,1> inout1; + sc_port,1> inout2; + sc_port,1> in3; + sc_port,1> in4; + sc_port,1> inout3; + sc_port,1> inout4; + sc_port,1> in5; + sc_port,1> in6; + sc_port,1> inout5; + sc_port,1> inout6; + + + SC_CTOR( mod_c ) + : b("b"), + sig1("sig_1"),sig2("sig_2"), sig3("sig_3"), sig4("sig_4"), + in1( "in_1", sig1 ), in2( "in_2", sig3 ), inout1( "inout_1", sig2), + inout2( "inout_2", sig4), + in3("in_3", b.input_1), in4("in_4", b.input_2), + inout3("inout_3", b.inout_1), inout4("inout_4", b.inout_2), + in5(b.input_3), in6(b.input_4), inout5(b.inout_3), + inout6(b.inout_4) + {} +}; + + +#define WRITE(a) \ + cout << a.name() << " (" << a.kind() << ")" << endl + + +int sc_main(int, char* []){ + + mod_c c("c"); + WRITE(c.sig1); + WRITE(c.sig2); + WRITE(c.sig3); + WRITE(c.sig4); + WRITE(c.in1); + WRITE(c.in2); + WRITE(c.in3); + WRITE(c.in4); + WRITE(c.in5); + WRITE(c.in6); + WRITE(c.inout1); + WRITE(c.inout2); + WRITE(c.inout3); + WRITE(c.inout4); + WRITE(c.inout5); + WRITE(c.inout6); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/ports/test04/golden/test04.log b/src/systemc/tests/systemc/communication/ports/test04/golden/test04.log new file mode 100644 index 000000000..450dcf662 --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test04/golden/test04.log @@ -0,0 +1,13 @@ +SystemC Simulation +d.c.a.port_0 (sc_port) +d.c.a.port_1 (sc_port) +d.c.a.port_2 (sc_port) +d.c.a.port_3 (sc_port) +d.c.b.port_0 (sc_port) +d.c.b.port_1 (sc_port) +d.c.b.port_2 (sc_port) +d.c.b.port_3 (sc_port) +d.c.port_0 (sc_port) +d.c.port_1 (sc_port) +d.c.port_4 (sc_port) +d.c.port_5 (sc_port) diff --git a/src/systemc/tests/systemc/communication/ports/test04/test04.cpp b/src/systemc/tests/systemc/communication/ports/test04/test04.cpp new file mode 100644 index 000000000..f3f383d8b --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test04/test04.cpp @@ -0,0 +1,152 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of port connections + +#include "systemc.h" + + +#define WRITE(a) \ + cout << a.name() << " (" << a.kind() << ")" << endl + + +SC_MODULE( mod_a) +{ + sc_port,2> in_1; + sc_port,2> in_2; + sc_port,2> inout_1; + sc_port,2> inout_2; + + SC_CTOR( mod_a ) + { + WRITE(in_1); + WRITE(in_2); + WRITE(inout_1); + WRITE(inout_2); + } +}; + +SC_MODULE( mod_b) +{ + sc_port,2> in_1; + sc_port,2> in_2; + sc_port,2> inout_1; + sc_port,2> inout_2; + + SC_CTOR( mod_b ) + { + WRITE(in_1); + WRITE(in_2); + WRITE(inout_1); + WRITE(inout_2); + } +}; + +SC_MODULE( mod_c ) +{ + sc_port,0> input_1; + sc_port,3> input_2; + sc_port,0> input_3; + sc_port,3> input_4; + sc_port,0> inout_1; + sc_port,3> inout_2; + sc_port,0> inout_3; + sc_port,3> inout_4; + sc_signal sig_1; + sc_signal sig_2; + sc_signal sig_3; + sc_signal sig_4; + + mod_a a; + mod_b b; + + SC_CTOR( mod_c ) + :a("a"), b("b") + { + a.in_1(input_2); + a.in_1(sig_1); + a.in_2(input_4); + a.in_2(sig_3); + a.inout_1(inout_2); + a.inout_1(sig_2); + a.inout_2(inout_4); + a.inout_2(sig_4); + + b.in_1(input_1); + b.in_1(input_2); + b.in_2(input_3); + b.in_2(input_4); + b.inout_1(inout_1); + b.inout_1(inout_2); + b.inout_2(inout_3); + b.inout_2(inout_4); + + WRITE(input_1); + WRITE(input_2); + WRITE(inout_1); + WRITE(inout_2); + } +}; + +SC_MODULE( mod_d ) +{ + sc_port,1> input_1; + sc_port,1> input_2; + sc_port,1> inout_1; + sc_port,1> inout_2; + + mod_c c; + + SC_CTOR( mod_d ) + : input_1("input_1"), input_2("input_2"), + inout_1("inout_1"), inout_2("inout_2"), c("c") + { + c.input_1(input_1); + c.input_3(input_2); + c.inout_1(inout_1); + c.inout_3(inout_2); + } +}; + + +int sc_main(int, char* []){ + + mod_d d("d"); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/ports/test05/golden/test05.log b/src/systemc/tests/systemc/communication/ports/test05/golden/test05.log new file mode 100644 index 000000000..3d204c99d --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test05/golden/test05.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E107) bind interface to port failed: interface already bound to port: port 'tb.port_0' (sc_port) +In file: diff --git a/src/systemc/tests/systemc/communication/ports/test05/test05.cpp b/src/systemc/tests/systemc/communication/ports/test05/test05.cpp new file mode 100644 index 000000000..a9e581f6a --- /dev/null +++ b/src/systemc/tests/systemc/communication/ports/test05/test05.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 2005-09-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of error detection: interface being supplied twice to a multi-port. + +#include "systemc.h" + +SC_MODULE(TB) +{ + SC_CTOR(TB) + { + m_port(m_signal); + m_multi_port(m_signal); + m_multi_port(m_port); + } + sc_port,0> m_multi_port; + sc_inout m_port; + sc_signal m_signal; +}; + +int sc_main(int, char**) +{ + sc_clock clock; + TB tb("tb"); + + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/reverse_bind/test01/golden/test01.log b/src/systemc/tests/systemc/communication/reverse_bind/test01/golden/test01.log new file mode 100644 index 000000000..19836dbfb --- /dev/null +++ b/src/systemc/tests/systemc/communication/reverse_bind/test01/golden/test01.log @@ -0,0 +1,25 @@ +SystemC Simulation +READ_LEAF: change 0 +TOP: change 0 +TOP: change 1 +READ_LEAF: change 1 +TOP: change 2 +READ_LEAF: change 2 +TOP: change 3 +READ_LEAF: change 3 +TOP: change 4 +READ_LEAF: change 4 +TOP: change 5 +READ_LEAF: change 5 +TOP: change 6 +READ_LEAF: change 6 +TOP: change 7 +READ_LEAF: change 7 +TOP: change 8 +READ_LEAF: change 8 +TOP: change 9 +READ_LEAF: change 9 +TOP: change 10 +READ_LEAF: change 10 +TOP: change 11 +READ_LEAF: change 11 diff --git a/src/systemc/tests/systemc/communication/reverse_bind/test01/test01.cpp b/src/systemc/tests/systemc/communication/reverse_bind/test01/test01.cpp new file mode 100644 index 000000000..a98f7c46a --- /dev/null +++ b/src/systemc/tests/systemc/communication/reverse_bind/test01/test01.cpp @@ -0,0 +1,73 @@ +#include "systemc.h" + +SC_MODULE(READ_LEAF) +{ + SC_CTOR(READ_LEAF) + { + SC_METHOD(delta); + sensitive << in; + } + void delta() + { + cout << "READ_LEAF: change " << (int)in.read() << endl; + } + sc_in > in; +}; + +SC_MODULE(WRITE_LEAF) +{ + SC_CTOR(WRITE_LEAF) + { + SC_METHOD(sync) + sensitive << clk.pos(); + } + void sync() + { + out = out.read() + 1; + } + sc_signal > out; + sc_in_clk clk; +}; + +SC_MODULE(MIDDLE) +{ + SC_CTOR(MIDDLE) : reader("reader"), writer("writer") + { + writer.clk(clk); // Bind clk going down the module hierarchy. + reader.in(my_port); // Bind my_port going down the module hierarchy. + my_port(writer.out); // Bind my_port coming up the module hierarchy. + } + sc_in_clk clk; + sc_in > my_port; + READ_LEAF reader; + WRITE_LEAF writer; +}; + +SC_MODULE(TOP) +{ + SC_CTOR(TOP) : down("down") + { + down.clk(clk); // Bind clk going down the module hierarchy. + in(down.my_port); // Bind in coming up the module hierarchy. + SC_METHOD(delta); + sensitive << in; + } + void delta() + { + cout << "TOP: change " << (int)in.read() << endl; + } + sc_in_clk clk; + sc_in > in; + MIDDLE down; +}; + +int sc_main(int argc, char* arg[]) +{ + sc_clock clock; + TOP top("top"); + top.clk(clock); + + sc_start(10, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/reverse_bind/test02/golden/test02.log b/src/systemc/tests/systemc/communication/reverse_bind/test02/golden/test02.log new file mode 100644 index 000000000..19836dbfb --- /dev/null +++ b/src/systemc/tests/systemc/communication/reverse_bind/test02/golden/test02.log @@ -0,0 +1,25 @@ +SystemC Simulation +READ_LEAF: change 0 +TOP: change 0 +TOP: change 1 +READ_LEAF: change 1 +TOP: change 2 +READ_LEAF: change 2 +TOP: change 3 +READ_LEAF: change 3 +TOP: change 4 +READ_LEAF: change 4 +TOP: change 5 +READ_LEAF: change 5 +TOP: change 6 +READ_LEAF: change 6 +TOP: change 7 +READ_LEAF: change 7 +TOP: change 8 +READ_LEAF: change 8 +TOP: change 9 +READ_LEAF: change 9 +TOP: change 10 +READ_LEAF: change 10 +TOP: change 11 +READ_LEAF: change 11 diff --git a/src/systemc/tests/systemc/communication/reverse_bind/test02/test02.cpp b/src/systemc/tests/systemc/communication/reverse_bind/test02/test02.cpp new file mode 100644 index 000000000..1f7fa5420 --- /dev/null +++ b/src/systemc/tests/systemc/communication/reverse_bind/test02/test02.cpp @@ -0,0 +1,73 @@ +#include "systemc.h" + +SC_MODULE(READ_LEAF) +{ + SC_CTOR(READ_LEAF) + { + SC_METHOD(delta); + sensitive << in; + } + void delta() + { + cout << "READ_LEAF: change " << (int)in.read() << endl; + } + sc_in > in; +}; + +SC_MODULE(WRITE_LEAF) +{ + SC_CTOR(WRITE_LEAF) + { + SC_METHOD(sync) + sensitive << clk.pos(); + } + void sync() + { + out = out.read() + 1; + } + sc_signal > out; + sc_in_clk clk; +}; + +SC_MODULE(MIDDLE) +{ + SC_CTOR(MIDDLE) : reader("reader"), writer("writer") + { + writer.clk(clk); // Bind clk going down the module hierarchy. + reader.in(my_port); // Bind my_port going down the module hierarchy. + my_port(writer.out); // Bind my_port coming up the module hierarchy. + } + sc_in_clk clk; + sc_in > my_port; + READ_LEAF reader; + WRITE_LEAF writer; +}; + +SC_MODULE(TOP) +{ + SC_CTOR(TOP) : down("down") + { + down.clk(clk); // Bind clk going down the module hierarchy. + in(down.my_port); // Bind in coming up the module hierarchy. + SC_METHOD(delta); + sensitive << in; + } + void delta() + { + cout << "TOP: change " << (int)in.read() << endl; + } + sc_in_clk clk; + sc_in > in; + MIDDLE down; +}; + +int sc_main(int argc, char* arg[]) +{ + sc_clock clock; + TOP top("top"); + top.clk(clock); + + sc_start(10, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_buffer/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_buffer/test01/golden/test01.log new file mode 100644 index 000000000..708a33b5c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_buffer/test01/golden/test01.log @@ -0,0 +1,102 @@ +SystemC Simulation +0 s 0 +0 s 3 +1 ns 3 +2 ns 3 +3 ns 3 +4 ns 3 +5 ns 3 +6 ns 3 +7 ns 3 +8 ns 3 +9 ns 3 +10 ns 3 +11 ns 3 +12 ns 3 +13 ns 3 +14 ns 3 +15 ns 3 +16 ns 3 +17 ns 3 +18 ns 3 +19 ns 3 +20 ns 3 +21 ns 3 +22 ns 3 +23 ns 3 +24 ns 3 +25 ns 3 +26 ns 3 +27 ns 3 +28 ns 3 +29 ns 3 +30 ns 3 +31 ns 3 +32 ns 3 +33 ns 3 +34 ns 3 +35 ns 3 +36 ns 3 +37 ns 3 +38 ns 3 +39 ns 3 +40 ns 3 +41 ns 3 +42 ns 3 +43 ns 3 +44 ns 3 +45 ns 3 +46 ns 3 +47 ns 3 +48 ns 3 +49 ns 3 +50 ns 3 +51 ns 3 +52 ns 3 +53 ns 3 +54 ns 3 +55 ns 3 +56 ns 3 +57 ns 3 +58 ns 3 +59 ns 3 +60 ns 3 +61 ns 3 +62 ns 3 +63 ns 3 +64 ns 3 +65 ns 3 +66 ns 3 +67 ns 3 +68 ns 3 +69 ns 3 +70 ns 3 +71 ns 3 +72 ns 3 +73 ns 3 +74 ns 3 +75 ns 3 +76 ns 3 +77 ns 3 +78 ns 3 +79 ns 3 +80 ns 3 +81 ns 3 +82 ns 3 +83 ns 3 +84 ns 3 +85 ns 3 +86 ns 3 +87 ns 3 +88 ns 3 +89 ns 3 +90 ns 3 +91 ns 3 +92 ns 3 +93 ns 3 +94 ns 3 +95 ns 3 +96 ns 3 +97 ns 3 +98 ns 3 +99 ns 3 diff --git a/src/systemc/tests/systemc/communication/sc_buffer/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_buffer/test01/test01.cpp new file mode 100644 index 000000000..2f7b49f4f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_buffer/test01/test01.cpp @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test01.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:25:56 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/24 19:11:29 acg +// Andy Goodrich: Changed sc_simulation_time() usage to sc_time_stamp(). +// + +// test of sc_buffer -- general test + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in clk; + sc_out out; + + void main_action() + { + while( true ) { + wait(); + out = 3; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( main_action ); + sensitive << clk.pos(); + } +}; + +SC_MODULE( mod_b ) +{ + sc_in in; + + void main_action() + { + cout << sc_time_stamp() << " " << in.read() << endl; + } + + SC_CTOR( mod_b ) + { + SC_METHOD( main_action ); + sensitive << in; + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + mod_b b( "b" ); + + sc_clock clk; + sc_buffer buf; + + a.clk( clk ); + a.out( buf ); + b.in( buf ); + + sc_start( 100, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_buffer/test02/golden/sc_buffer_edge_reset.log b/src/systemc/tests/systemc/communication/sc_buffer/test02/golden/sc_buffer_edge_reset.log new file mode 100644 index 000000000..15f6aaa60 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_buffer/test02/golden/sc_buffer_edge_reset.log @@ -0,0 +1,31 @@ +SystemC Simulation +sig_mod.trigger_rst @ 0 s: in = 1 +buf_mod.trigger_rst @ 0 s: in = 1 +buf_mod.trigger_pos @ 0 s: in = 1 +buf_mod.trigger_val @ 0 s: in = 1 +sig_mod.trigger_pos @ 0 s: in = 1 +sig_mod.trigger_val @ 0 s: in = 1 +buf_mod.trigger_rst @ 1 ns: in = 1 +buf_mod.trigger_pos @ 1 ns: in = 1 +buf_mod.trigger_val @ 1 ns: in = 1 +buf_mod.trigger_neg @ 2 ns: in = 0 +buf_mod.trigger_val @ 2 ns: in = 0 +sig_mod.trigger_neg @ 2 ns: in = 0 +sig_mod.trigger_val @ 2 ns: in = 0 +buf_mod.trigger_neg @ 3 ns: in = 0 +buf_mod.trigger_val @ 3 ns: in = 0 +sig_mod.trigger_rst @ 4 ns: in = 1 +buf_mod.trigger_rst @ 4 ns: in = 1 +buf_mod.trigger_pos @ 4 ns: in = 1 +buf_mod.trigger_val @ 4 ns: in = 1 +sig_mod.trigger_pos @ 4 ns: in = 1 +sig_mod.trigger_val @ 4 ns: in = 1 +buf_mod.trigger_rst @ 5 ns: in = 1 +buf_mod.trigger_pos @ 5 ns: in = 1 +buf_mod.trigger_val @ 5 ns: in = 1 +buf_mod.trigger_neg @ 6 ns: in = 0 +buf_mod.trigger_val @ 6 ns: in = 0 +sig_mod.trigger_neg @ 6 ns: in = 0 +sig_mod.trigger_val @ 6 ns: in = 0 +buf_mod.trigger_neg @ 7 ns: in = 0 +buf_mod.trigger_val @ 7 ns: in = 0 diff --git a/src/systemc/tests/systemc/communication/sc_buffer/test02/sc_buffer_edge_reset.cpp b/src/systemc/tests/systemc/communication/sc_buffer/test02/sc_buffer_edge_reset.cpp new file mode 100644 index 000000000..98fe8a5bb --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_buffer/test02/sc_buffer_edge_reset.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_buffer_edge_reset.cpp -- Test sc_buffer edge events and reset + + Original Author: Philipp A. Hartmann, OFFIS, 2013-10-12 + + ----------------------------------------------------------------------------- + + This test checks the functionality of the pos(), neg() event finders and + the async_reset_signal_is functionality, if the target port is bound to + an sc_buffer instead of an sc_signal. + + *****************************************************************************/ + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include +#include + +SC_MODULE(print_edge) +{ + sc_in in; + + SC_CTOR(print_edge) + : in("in") + { + spawn_trigger( "trigger_val", &in.value_changed() ); + spawn_trigger( "trigger_pos", &in.pos() ); + spawn_trigger( "trigger_neg", &in.neg() ); + spawn_trigger( "trigger_rst", NULL ); + } + + void spawn_trigger( const char* name, sc_event_finder* ef ) + { + sc_spawn_options opts; + opts.spawn_method(); + opts.dont_initialize(); + if( ef ) { + opts.set_sensitivity( ef ); + } else { + opts.async_reset_signal_is( in, true ); + } + sc_spawn( sc_bind(&print_edge::trigger,this) + , name, &opts); + } + + void trigger() + { + std::cout << sc_get_current_process_handle().name() + << " @ " << std::setw(4) << sc_time_stamp() + << ": " << "in = " << in.read() + << std::endl; + } +}; + +int sc_main(int, char*[]) +{ + sc_report_handler::set_actions( SC_ID_DISABLE_WILL_ORPHAN_PROCESS_ + , SC_DO_NOTHING ); + + sc_signal sig_int; + + sc_buffer buf; + sc_signal sig; + + print_edge sig_mod("sig_mod"); + sig_mod.in(sig); + + print_edge buf_mod("buf_mod"); + buf_mod.in(buf); + + for(int i=0; i<4; ++i) { + buf.write( !buf.read() ); + sig.write( !sig.read() ); + sc_start( 1, SC_NS ); + + buf.write( buf.read() ); + sig.write( sig.read() ); + sc_start( 1, SC_NS ); + } + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_clock/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_clock/test01/golden/test01.log new file mode 100644 index 000000000..68fd7fe24 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test01/golden/test01.log @@ -0,0 +1,70 @@ +SystemC Simulation + +name = clock_0 +period = 1 ns +duty_cycle = 0.5 + +name = c2 +period = 1 ns +duty_cycle = 0.5 + +name = c3 +period = 8 ns +duty_cycle = 0.5 + +name = c4 +period = 8 ns +duty_cycle = 0.1 + +name = c5 +period = 8 ns +duty_cycle = 0.1 + +name = c6 +period = 8 ns +duty_cycle = 0.1 + +name = c7 +period = 8 ns +duty_cycle = 0.5 + +name = c8 +period = 8 ns +duty_cycle = 0.1 + +name = c9 +period = 8 ns +duty_cycle = 0.1 + +name = cA +period = 8 ns +duty_cycle = 0.1 + +Info: (I804) /IEEE_Std_1666/deprecated: + sc_clock(const char*, double, double, double, bool) + is deprecated use a form that includes sc_time or + sc_time_unit + +name = cB +period = 8 ns +duty_cycle = 0.5 + +name = cC +period = 8 ns +duty_cycle = 0.1 + +name = cD +period = 8 ns +duty_cycle = 0.1 + +name = cE +period = 8 ns +duty_cycle = 0.1 + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/communication/sc_clock/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_clock/test01/test01.cpp new file mode 100644 index 000000000..0d6e81174 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test01/test01.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_clock constructors + +#include "systemc.h" + +#define CLOCK_INFO(clk) \ + cout << endl; \ + cout << "name = " << clk.name() << endl; \ + cout << "period = " << clk.period() << endl; \ + cout << "duty_cycle = " << clk.duty_cycle() << endl; + +int +sc_main( int, char*[] ) +{ + sc_time t1( 8, SC_NS ); + sc_time t2( 2, SC_NS ); + + sc_clock c1; + CLOCK_INFO( c1 ); + + sc_clock c2( "c2" ); + CLOCK_INFO( c2 ); + + sc_clock c3( "c3", t1 ); + CLOCK_INFO( c3 ); + sc_clock c4( "c4", t1, 0.1 ); + CLOCK_INFO( c4 ); + sc_clock c5( "c5", t1, 0.1, t2 ); + CLOCK_INFO( c5 ); + sc_clock c6( "c6", t1, 0.1, t2, false ); + CLOCK_INFO( c6 ); + + sc_clock c7( "c7", 8, SC_NS ); + CLOCK_INFO( c7 ); + sc_clock c8( "c8", 8, SC_NS, 0.1 ); + CLOCK_INFO( c8 ); + + sc_clock c9( "c9", 8, SC_NS, 0.1, 2, SC_NS ); + CLOCK_INFO( c9 ); + sc_clock cA( "cA", 8, SC_NS, 0.1, 2, SC_NS, false ); + CLOCK_INFO( cA ); + + sc_clock cB( "cB", 8 ); + CLOCK_INFO( cB ); + sc_clock cC( "cC", 8, 0.1 ); + CLOCK_INFO( cC ); + sc_clock cD( "cD", 8, 0.1, 2 ); + CLOCK_INFO( cD ); + sc_clock cE( "cE", 8, 0.1, 2, false ); + CLOCK_INFO( cE ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_clock/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_clock/test02/golden/test02.log new file mode 100644 index 000000000..568507d71 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test02/golden/test02.log @@ -0,0 +1,20 @@ +SystemC Simulation +m_cur_val for c1( "c1", t1, 0.1, t2 ) is: 0 +m_cur_val for c2( "c2", t1, 0.1, t2, false ) is: 1 +m_cur_val for c3( "c3", t1, 0.1, t2 ) is: 0 + +Info: (I804) /IEEE_Std_1666/deprecated: + sc_clock(const char*, double, double, double, bool) + is deprecated use a form that includes sc_time or + sc_time_unit +m_cur_val for c4( "c4", t1, 0.1, t2, false ) is: 1 +m_cur_val for c5( "c5", t1, 0.1, t2 ) is: 0 +m_cur_val for c6( "c6", t1, 0.1, t2, false ) is: 1 + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/communication/sc_clock/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_clock/test02/test02.cpp new file mode 100644 index 000000000..1d95b2a90 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test02/test02.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_clock::print + +#include "systemc.h" + + +int +sc_main( int, char*[] ) +{ + sc_time t1( 8, SC_NS ); + sc_time t2( 2, SC_NS ); + + + sc_clock c1( "c1", t1, 0.1, t2 ); + cout << "m_cur_val for c1( \"c1\", t1, 0.1, t2 ) is: "; + c1.print(cout); + cout << "\n"; + + sc_clock c2( "c2", t1, 0.1, t2, false ); + cout << "m_cur_val for c2( \"c2\", t1, 0.1, t2, false ) is: "; + c2.print(cout); + cout << "\n"; + + + sc_clock c3( "c3", 8, SC_NS, 0.1 ); + cout << "m_cur_val for c3( \"c3\", t1, 0.1, t2 ) is: "; + c3.print(cout); + cout << "\n"; + + sc_clock c4( "c4", 8, SC_NS, 0.1, false ); + cout << "m_cur_val for c4( \"c4\", t1, 0.1, t2, false ) is: "; + c4.print(cout); + cout << "\n"; + + sc_clock c5( "c5", 8, SC_NS, 0.1, 2, SC_NS ); + cout << "m_cur_val for c5( \"c5\", t1, 0.1, t2 ) is: "; + c5.print(cout); + cout<< "\n"; + + sc_clock c6( "c6", 8, SC_NS, 0.1, 2, SC_NS, false ); + cout << "m_cur_val for c6( \"c6\", t1, 0.1, t2, false ) is: "; + c6.print(cout); + cout<< "\n"; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_clock/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_clock/test03/golden/test03.log new file mode 100644 index 000000000..e77ee4ca8 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test03/golden/test03.log @@ -0,0 +1,9 @@ +SystemC Simulation + name = c1 + value = 0 +new value = 0 + + name = c2 + value = 1 +new value = 1 + diff --git a/src/systemc/tests/systemc/communication/sc_clock/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_clock/test03/test03.cpp new file mode 100644 index 000000000..3f82ef7f1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test03/test03.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_clock::dump( ostream& os ) const + +#include "systemc.h" + + +int +sc_main( int, char*[] ) +{ + sc_time t1( 8, SC_NS ); + sc_time t2( 2, SC_NS ); + + sc_clock c1( "c1", t1, 0.1, t2 ); + c1.dump(cout); + cout << "\n"; + + sc_clock c2( "c2", t1, 0.1, t2, false ); + c2.dump(cout); + cout << "\n"; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_clock/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_clock/test04/golden/test04.log new file mode 100644 index 000000000..37da64982 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test04/golden/test04.log @@ -0,0 +1,3 @@ +SystemC Simulation +current time is: 8 ns +now, the current time is: 10 ns diff --git a/src/systemc/tests/systemc/communication/sc_clock/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_clock/test04/test04.cpp new file mode 100644 index 000000000..759fc48fb --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_clock/test04/test04.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_clock::time_stamp() + +#include "systemc.h" + + +int +sc_main( int, char*[] ) +{ + sc_time t1( 8, SC_NS ); + sc_time t2( 2, SC_NS ); + + sc_clock c1( "c1", t1, 0.1, t2 ); + sc_start(t1); + cout << "current time is: "; + cout << c1.time_stamp(); + cout << endl; + + sc_start(t2); + cout << "now, the current time is: "; + cout << c1.time_stamp(); + cout << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_event_queue/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_event_queue/test01/golden/test01.log new file mode 100644 index 000000000..73b6d527c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_event_queue/test01/golden/test01.log @@ -0,0 +1,38 @@ +SystemC Simulation +0 s delta 2: P awakes +0 s delta 3: P awakes +0 s delta 4: P awakes +0 s delta 5: P awakes +1 ns delta 6: P awakes +1 ns delta 7: P awakes +1 ns delta 8: P awakes +1 ns delta 9: P awakes +13 ns delta 11: P awakes +15 ns delta 12: P awakes +15 ns delta 12: xyz awakes +15 ns delta 13: P awakes +18 ns delta 14: P awakes +20 ns delta 17: P awakes +20 ns delta 18: P awakes +21 ns delta 19: P awakes +21 ns delta 20: P awakes +40 ns delta 24: P awakes +40 ns delta 25: P awakes +40 ns delta 26: P awakes +40 ns delta 27: P awakes +41 ns delta 28: P awakes +41 ns delta 29: P awakes +41 ns delta 30: P awakes +41 ns delta 31: P awakes +60 ns delta 35: P awakes +60 ns delta 36: P awakes +61 ns delta 37: P awakes +61 ns delta 38: P awakes +80 ns delta 42: P awakes +80 ns delta 43: P awakes +80 ns delta 44: P awakes +80 ns delta 45: P awakes +81 ns delta 46: P awakes +81 ns delta 47: P awakes +81 ns delta 48: P awakes +81 ns delta 49: P awakes diff --git a/src/systemc/tests/systemc/communication/sc_event_queue/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_event_queue/test01/test01.cpp new file mode 100644 index 000000000..85e52c703 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_event_queue/test01/test01.cpp @@ -0,0 +1,88 @@ +#include + +SC_MODULE(Rec) { + sc_event_queue_port E; + + SC_CTOR(Rec) { + SC_METHOD(P); + sensitive << E; + dont_initialize(); + } + void P() { + cout << sc_time_stamp() + << " delta " << sc_delta_count() + << ": P awakes\n"; + } +}; + +SC_MODULE(Sender) { + sc_in Clock; + sc_event_queue_port E; + + SC_CTOR(Sender) { + SC_METHOD(P); + sensitive << Clock.pos(); + dont_initialize(); + } + void P() { + // trigger in now (2x), now+1ns (2x) + E->notify( 0, SC_NS ); + E->notify( 0, SC_NS ); + E->notify( 1, SC_NS ); + E->notify( 1, SC_NS ); + } +}; + +SC_MODULE(xyz) { + SC_CTOR(xyz) { + SC_THREAD(P); + } + void P() { + wait(15, SC_NS); + cout << sc_time_stamp() + << " delta " << sc_delta_count() + << ": xyz awakes\n"; + } +}; + +int sc_main (int agrc, char** argv) +{ + sc_event_queue E("E"); + + Rec R("Rec"); + R.E(E); + + sc_clock C1 ("C1", 20, SC_NS); + sc_clock C2 ("C2", 40, SC_NS); + + xyz xyz_obj("xyz"); + + // Events at 0ns (2x), 1ns (2x), 20ns (2x), 21ns (2x), 40ns (2x), ... + Sender S1("S1"); + S1.Clock(C1); + S1.E(E); + + // Events at 0ns (2x), 1ns (2x), 40ns (2x), 41ns (2x), 80ns (2x), ... + Sender S2("S2"); + S2.Clock(C2); + S2.E(E); + + // Events at 3ns, 5ns (2x), 8ns + sc_start(10, SC_NS); + E.notify( 5,SC_NS ); + E.notify( 3,SC_NS ); + E.notify( 5,SC_NS ); + E.notify( 8,SC_NS) ; + + // Events would be at 40ns, 43ns (2x), 44ns but all are cancelled + sc_start(40, SC_NS); + E.notify( 3, SC_NS ); + E.notify( 3, SC_NS ); + E.notify( 4, SC_NS ); + E.notify( SC_ZERO_TIME ); + E.cancel_all(); + + sc_start(40, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_export/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_export/test01/golden/test01.log new file mode 100644 index 000000000..19836dbfb --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test01/golden/test01.log @@ -0,0 +1,25 @@ +SystemC Simulation +READ_LEAF: change 0 +TOP: change 0 +TOP: change 1 +READ_LEAF: change 1 +TOP: change 2 +READ_LEAF: change 2 +TOP: change 3 +READ_LEAF: change 3 +TOP: change 4 +READ_LEAF: change 4 +TOP: change 5 +READ_LEAF: change 5 +TOP: change 6 +READ_LEAF: change 6 +TOP: change 7 +READ_LEAF: change 7 +TOP: change 8 +READ_LEAF: change 8 +TOP: change 9 +READ_LEAF: change 9 +TOP: change 10 +READ_LEAF: change 10 +TOP: change 11 +READ_LEAF: change 11 diff --git a/src/systemc/tests/systemc/communication/sc_export/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_export/test01/test01.cpp new file mode 100644 index 000000000..9b2388421 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test01/test01.cpp @@ -0,0 +1,75 @@ +#include "systemc.h" + +SC_MODULE(READ_LEAF) +{ + SC_CTOR(READ_LEAF) + { + SC_METHOD(delta); + sensitive << in; + } + void delta() + { + cout << "READ_LEAF: change " << (int)in->read() << endl; + } + sc_in > in; +}; + +SC_MODULE(WRITE_LEAF) +{ + SC_CTOR(WRITE_LEAF) : out("out"), clk("clk") + { + my_export(out); + SC_METHOD(sync) + sensitive << clk.pos(); + } + void sync() + { + out = out.read() + 1; + } + sc_signal > out; + sc_export > > my_export; + sc_in_clk clk; +}; + +SC_MODULE(MIDDLE) +{ + SC_CTOR(MIDDLE) : reader("reader"), writer("writer") + { + writer.clk(clk); // Bind clk going down the module hierarchy. + my_port(writer.my_export); // Bind my_port coming up the module hierarchy. + reader.in(my_port); // Bind my_port going down the module hierarchy. + } + sc_in_clk clk; + sc_export > > my_port; + READ_LEAF reader; + WRITE_LEAF writer; +}; + +SC_MODULE(TOP) +{ + SC_CTOR(TOP) : down("down") + { + down.clk(clk); // Bind clk going down the module hierarchy. + in(down.my_port); // Bind in coming up the module hierarchy. + SC_METHOD(delta); + sensitive << in; + } + void delta() + { + cout << "TOP: change " << (int)in.read() << endl; + } + sc_in_clk clk; + sc_in > in; + MIDDLE down; +}; + +int sc_main(int argc, char* arg[]) +{ + sc_clock clock; + TOP top("top"); + top.clk(clock); + + sc_start(10, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_export/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_export/test02/golden/test02.log new file mode 100644 index 000000000..b2a9f1c81 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test02/golden/test02.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E120) sc_export instance has no interface: x.export_1 +In file: diff --git a/src/systemc/tests/systemc/communication/sc_export/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_export/test02/test02.cpp new file mode 100644 index 000000000..f044fc741 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test02/test02.cpp @@ -0,0 +1,20 @@ +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + a(b); + } + sc_export > a; + sc_export > b; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + X x("x"); + + sc_start(1, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_export/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_export/test03/golden/test03.log new file mode 100644 index 000000000..3de4cda83 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation +10 ns In Channel run() +17 ns In Channel run() +20 ns In Channel run() diff --git a/src/systemc/tests/systemc/communication/sc_export/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_export/test03/test03.cpp new file mode 100644 index 000000000..9da2e4934 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test03/test03.cpp @@ -0,0 +1,86 @@ +#include "systemc.h" + +// Interface +class C_if : virtual public sc_interface +{ +public: + virtual void run() = 0; +}; + +// Channel +class C : public C_if, public sc_channel +{ +public: + SC_CTOR(C) { } + virtual void run() + { + cout << sc_time_stamp() << " In Channel run() " << endl; + } +}; + +// --- D: export channel C through IFP -------- +SC_MODULE( D ) +{ + sc_export IFP; + + SC_CTOR( D ) + : IFP("IFP"), // explicit name + m_C("C") + { + IFP( m_C ); // bind sc_export->interface by name + } + private: + C m_C; // channel +}; + +// --- E: module with two interface-ports --- +SC_MODULE( E ) +{ + private: + C m_C; + D m_D; + + public: + sc_export IFP1; + sc_export IFP2; + + SC_CTOR( E ) + : m_C("C"), + m_D("D"), + IFP1("IFP1") + { + IFP1( m_C ); + IFP2( m_D.IFP ); // bind sc_export->sc_export by name + IFP1.get_interface(); // just to see whether it compiles + } +}; + +// Module X connected to the channels through E +SC_MODULE( X ) +{ + sc_port P1; + sc_port P2; + SC_CTOR(X) { + SC_THREAD(run); + } + void run() { + wait(10, SC_NS); + P1->run(); + wait(10, SC_NS); + P2->run(); + } +}; + +int sc_main(int argc, char** argv) { + E the_E("E"); + X the_X("X"); + // port->IFP + the_X.P1( the_E.IFP1 ); + the_X.P2( the_E.IFP2 ); + + sc_start(17, SC_NS); + the_E.IFP1->run(); // testing the operator-> of sc_export + sc_start(50, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_export/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_export/test04/golden/test04.log new file mode 100644 index 000000000..df6df8478 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test04/golden/test04.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E109) complete binding failed: export not bound: export 'x.a' (sc_export) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_export/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_export/test04/test04.cpp new file mode 100644 index 000000000..6a2b21421 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test04/test04.cpp @@ -0,0 +1,17 @@ +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) : a("a") + { + } + sc_export > a; +}; + +int sc_main(int argc, char* argv[]) +{ + X x("x"); + + sc_start(1, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_export/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_export/test05/golden/test05.log new file mode 100644 index 000000000..a736ca05c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test05/golden/test05.log @@ -0,0 +1,51 @@ +SystemC Simulation +0 s: 0 +1 ns: 0 +2 ns: 0 +3 ns: 0 +4 ns: 1 +5 ns: 2 +6 ns: 3 +7 ns: 4 +8 ns: 5 +9 ns: 6 +10 ns: 7 +11 ns: 8 +12 ns: 9 +13 ns: 10 +14 ns: 11 +15 ns: 12 +16 ns: 13 +17 ns: 14 +18 ns: 15 +19 ns: 16 +20 ns: 17 +21 ns: 18 +22 ns: 19 +23 ns: 20 +24 ns: 21 +25 ns: 22 +26 ns: 23 +27 ns: 24 +28 ns: 25 +29 ns: 26 +30 ns: 27 +31 ns: 28 +32 ns: 29 +33 ns: 30 +34 ns: 31 +35 ns: 32 +36 ns: 33 +37 ns: 34 +38 ns: 35 +39 ns: 36 +40 ns: 37 +41 ns: 38 +42 ns: 39 +43 ns: 40 +44 ns: 41 +45 ns: 42 +46 ns: 43 +47 ns: 44 +48 ns: 45 +49 ns: 46 diff --git a/src/systemc/tests/systemc/communication/sc_export/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_export/test05/test05.cpp new file mode 100644 index 000000000..f1e38c862 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_export/test05/test05.cpp @@ -0,0 +1,106 @@ +#include "systemc.h" + +typedef sc_biguint<121> atom; // Value to be pipe delayed. + +//============================================================================== +// esc_dpipe - DELAY PIPELINE FOR AN ARBITRARY CLASS: +//============================================================================== +template +SC_MODULE(esc_dpipe) { + public: + typedef sc_export > in; // To pipe port type. + typedef sc_export > out; // From pipe port type. + + public: + SC_CTOR(esc_dpipe) + { + m_in(m_pipe[0]); + m_out(m_pipe[N-1]); + SC_METHOD(rachet); + sensitive << m_clk.pos(); + } + + protected: + void rachet() + { + for ( int i = N-1; i > 0; i-- ) + { + m_pipe[i].write(m_pipe[i-1].read()); + } + } + + public: + sc_in_clk m_clk; // Pipe synchronization. + in m_in; // Input to delay pipe. + out m_out; // Output from delay pipe. + + protected: + sc_signal m_pipe[N]; // Pipeline stages. +}; + + +// Testbench reader of values from the pipe: + +SC_MODULE(Reader) +{ + SC_CTOR(Reader) + { + SC_METHOD(extract) + sensitive << m_clk.pos(); + dont_initialize(); + } + + void extract() + { + cout << sc_time_stamp() << ": " << m_from_pipe.read() << endl; + } + + sc_in_clk m_clk; // Module synchronization. + sc_in m_from_pipe; // Output from delay pipe. +}; + + + +// Testbench writer of values to the pipe: + +SC_MODULE(Writer) +{ + SC_CTOR(Writer) + { + SC_METHOD(insert) + sensitive << m_clk.pos(); + m_counter = 0; + } + + void insert() + { + m_to_pipe.write(m_counter); + m_counter++; + } + + sc_in_clk m_clk; // Module synchronization. + atom m_counter; // Write value. + sc_inout m_to_pipe; // Input for delay pipe. +}; + +// Main program + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + esc_dpipe delay("pipe"); + Reader reader("reader"); + Writer writer("writer"); + + delay.m_clk(clock); + + reader.m_clk(clock); + reader.m_from_pipe(delay.m_out); + + writer.m_clk(clock); + writer.m_to_pipe(delay.m_in); + + sc_start(50, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_fifo/test01/golden/test01.log new file mode 100644 index 000000000..7dbaa863b --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test01/golden/test01.log @@ -0,0 +1,145 @@ +SystemC Simulation +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11 +12 +13 +14 +Available: 5 +15 +16 +17 +18 +19 +20 +21 +22 +23 +24 +25 +26 +27 +28 +29 +Available: 0 +30 +31 +32 +33 +34 +35 +36 +37 +38 +39 +40 +41 +42 +43 +44 +Available: 5 +45 +46 +47 +48 +49 +50 +51 +52 +53 +54 +55 +56 +57 +58 +59 +Available: 0 +60 +61 +62 +63 +64 +65 +66 +67 +68 +69 +70 +71 +72 +73 +74 +Available: 5 +75 +76 +77 +78 +79 +80 +81 +82 +83 +84 +85 +86 +87 +88 +89 +Available: 0 +90 +91 +92 +93 +94 +95 +96 +97 +98 +99 +100 +101 +102 +103 +104 +Available: 5 +105 +106 +107 +108 +109 +110 +111 +112 +113 +114 +115 +116 +117 +118 +119 +Available: 0 +120 +121 +122 +123 +124 +125 +126 +127 +128 +129 +130 +131 +132 +133 +134 +Available: 5 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test01/test01.cpp new file mode 100644 index 000000000..b9e8515d0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test01/test01.cpp @@ -0,0 +1,107 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo - general test + +#include "systemc.h" + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + for( int i = 0; i < 20; i ++ ) + out->write( val ++ ); // blocking write + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in in; + + // process(es) + void main_action() + { + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + for( int i = 0; i < 15; i ++ ) { + in->read( val ); // blocking read + cout << val << endl; + } + cout << "Available: " << in->num_available() << endl; + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + } +}; + +int sc_main( int, char*[] ) +{ + sc_clock c; + + // declare channel(s) + sc_fifo fifo( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + r.in( fifo ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_fifo/test02/golden/test02.log new file mode 100644 index 000000000..fc200328a --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test02/golden/test02.log @@ -0,0 +1,18 @@ +SystemC Simulation +print +dump +name = fifo_0 + +print +123 +dump +name = fifo_0 +value[0] = 123 + +print +123 +321 +dump +name = fifo_0 +value[0] = 123 +value[1] = 321 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test02/test02.cpp new file mode 100644 index 000000000..e41bc9a60 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test02/test02.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo print() and dump() methods + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_fifo a( 2 ); + + cout << "print\n"; + a.print( cout ); + cout << "dump\n"; + a.dump( cout ); + + cout << endl; + a.write( 123 ); + cout << "print\n"; + a.print( cout ); + cout << "dump\n"; + a.dump( cout ); + + cout << endl; + a.write( 321 ); + cout << "print\n"; + a.print( cout ); + cout << "dump\n"; + a.dump( cout ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_fifo/test03/golden/test03.log new file mode 100644 index 000000000..e259c8151 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test03/golden/test03.log @@ -0,0 +1,181 @@ +SystemC Simulation +writer: blocking write +reader: blocking read 1 +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +10 +11 +12 +13 +14 +writer: 5 free spaces +writer: non-blocking write +writer: waiting +reader: 5 available samples +reader: blocking read 2 +15 +16 +17 +18 +19 +20 +21 +22 +23 +24 +writer: waiting +26 +27 +28 +29 +30 +reader: 10 available samples +reader: non-blocking read +31 +32 +33 +34 +35 +37 +38 +39 +40 +41 +reader: waiting +writer: blocking write +reader: waiting +42 +43 +44 +45 +46 +reader: blocking read 1 +47 +48 +49 +50 +51 +52 +53 +54 +55 +56 +57 +58 +59 +60 +61 +writer: 10 free spaces +writer: non-blocking write +writer: waiting +reader: 0 available samples +reader: blocking read 2 +62 +63 +64 +65 +66 +67 +68 +69 +70 +71 +73 +74 +75 +76 +77 +writer: blocking write +reader: 5 available samples +reader: non-blocking read +78 +79 +80 +81 +82 +reader: waiting +83 +84 +85 +86 +87 +88 +89 +90 +91 +92 +reader: blocking read 1 +93 +94 +95 +96 +97 +98 +99 +100 +101 +102 +writer: 0 free spaces +writer: non-blocking write +writer: waiting +writer: waiting +104 +105 +106 +107 +108 +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +writer: waiting +reader: 10 available samples +reader: blocking read 2 +109 +110 +111 +112 +113 +115 +116 +117 +118 +119 +writer: waiting +130 +131 +132 +133 +134 +writer: blocking write +reader: 0 available samples +reader: non-blocking read +reader: waiting +135 +136 +137 +138 +139 +140 +141 +142 +143 +144 +reader: waiting +145 +146 +147 +148 +149 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test03/test03.cpp new file mode 100644 index 000000000..da5a8faa0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test03/test03.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo ports - interface access shortcut methods + +#include "systemc.h" + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + cout << "writer: blocking write\n"; + for( int i = 0; i < 20; i ++ ) { + out.write( val ++ ); // blocking write + } + wait( 10, SC_NS ); + cout << "writer: " << out.num_free() << " free spaces\n"; + cout << "writer: non-blocking write\n"; + for( int i = 0; i < 20; i ++ ) { + while( ! out.nb_write( val ++ ) ) { // non-blocking write + cout << "writer: waiting\n"; + wait( 1, SC_NS ); + } + } + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in in; + + // process(es) + void main_action() + { + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + cout << "reader: blocking read 1\n"; + for( int i = 0; i < 15; i ++ ) { + in.read( val ); // blocking read + cout << val << endl; + } + wait( 10, SC_NS ); + cout << "reader: " << in.num_available() << " available samples\n"; + cout << "reader: blocking read 2\n"; + for( int i = 0; i < 15; i ++ ) { + cout << in.read() << endl; // blocking read + } + wait( 10, SC_NS ); + cout << "reader: " << in.num_available() << " available samples\n"; + cout << "reader: non-blocking read\n"; + for( int i = 0; i < 15; i ++ ) { + while( ! in.nb_read( val ) ) { // non-blocking read + cout << "reader: waiting\n"; + wait( 1, SC_NS ); + } + cout << val << endl; + } + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + } +}; + +int sc_main( int, char*[] ) +{ + // sc_clock c; + + // declare channel(s) + sc_fifo fifo( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + r.in( fifo ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_fifo/test04/golden/test04.log new file mode 100644 index 000000000..4c8333c81 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test04/golden/test04.log @@ -0,0 +1,185 @@ +SystemC Simulation +10 ns,1: writer: blocking write +10 ns,1: reader: blocking read 1 +10 ns,2: reader: 0 +10 ns,2: reader: 1 +10 ns,2: reader: 2 +10 ns,2: reader: 3 +10 ns,2: reader: 4 +10 ns,2: reader: 5 +10 ns,2: reader: 6 +10 ns,2: reader: 7 +10 ns,2: reader: 8 +10 ns,2: reader: 9 +10 ns,4: reader: 10 +10 ns,4: reader: 11 +10 ns,4: reader: 12 +10 ns,4: reader: 13 +10 ns,4: reader: 14 +20 ns,5: writer: 5 free spaces +20 ns,5: writer: non-blocking write +20 ns,5: writer: waiting +20 ns,5: reader: 5 available samples +20 ns,5: reader: blocking read 2 +20 ns,5: reader: 15 +20 ns,5: reader: 16 +20 ns,5: reader: 17 +20 ns,5: reader: 18 +20 ns,5: reader: 19 +20 ns,6: reader: 20 +20 ns,6: reader: 21 +20 ns,6: reader: 22 +20 ns,6: reader: 23 +20 ns,6: reader: 24 +20 ns,6: writer: data read event +20 ns,6: writer: waiting +20 ns,7: reader: 26 +20 ns,7: reader: 27 +20 ns,7: reader: 28 +20 ns,7: reader: 29 +20 ns,7: reader: 30 +20 ns,7: writer: data read event +20 ns,7: writer: waiting +20 ns,8: writer: data read event +30 ns,9: reader: 10 available samples +30 ns,9: reader: non-blocking read +30 ns,9: reader: 32 +30 ns,9: reader: 33 +30 ns,9: reader: 34 +30 ns,9: reader: 35 +30 ns,9: reader: 36 +30 ns,9: reader: 38 +30 ns,9: reader: 39 +30 ns,9: reader: 40 +30 ns,9: reader: 41 +30 ns,9: reader: 42 +30 ns,9: reader: waiting +30 ns,9: writer: blocking write +30 ns,11: reader: data written event +30 ns,11: reader: 43 +30 ns,11: reader: 44 +30 ns,11: reader: 45 +30 ns,11: reader: 46 +30 ns,11: reader: 47 +40 ns,13: reader: blocking read 1 +40 ns,13: reader: 48 +40 ns,13: reader: 49 +40 ns,13: reader: 50 +40 ns,13: reader: 51 +40 ns,13: reader: 52 +40 ns,13: reader: 53 +40 ns,13: reader: 54 +40 ns,13: reader: 55 +40 ns,13: reader: 56 +40 ns,13: reader: 57 +40 ns,15: reader: 58 +40 ns,15: reader: 59 +40 ns,15: reader: 60 +40 ns,15: reader: 61 +40 ns,15: reader: 62 +50 ns,16: writer: 10 free spaces +50 ns,16: writer: non-blocking write +50 ns,16: writer: waiting +50 ns,16: reader: 0 available samples +50 ns,16: reader: blocking read 2 +50 ns,17: reader: 63 +50 ns,17: reader: 64 +50 ns,17: reader: 65 +50 ns,17: reader: 66 +50 ns,17: reader: 67 +50 ns,17: reader: 68 +50 ns,17: reader: 69 +50 ns,17: reader: 70 +50 ns,17: reader: 71 +50 ns,17: reader: 72 +50 ns,18: writer: data read event +50 ns,19: reader: 74 +50 ns,19: reader: 75 +50 ns,19: reader: 76 +50 ns,19: reader: 77 +50 ns,19: reader: 78 +60 ns,20: writer: blocking write +60 ns,20: reader: 5 available samples +60 ns,20: reader: non-blocking read +60 ns,20: reader: 79 +60 ns,20: reader: 80 +60 ns,20: reader: 81 +60 ns,20: reader: 82 +60 ns,20: reader: 83 +60 ns,20: reader: waiting +60 ns,21: reader: data written event +60 ns,21: reader: 84 +60 ns,21: reader: 85 +60 ns,21: reader: 86 +60 ns,21: reader: 87 +60 ns,21: reader: 88 +60 ns,21: reader: waiting +60 ns,22: reader: data written event +60 ns,22: reader: 89 +60 ns,22: reader: 90 +60 ns,22: reader: 91 +60 ns,22: reader: 92 +60 ns,22: reader: 93 +70 ns,24: reader: blocking read 1 +70 ns,24: reader: 94 +70 ns,24: reader: 95 +70 ns,24: reader: 96 +70 ns,24: reader: 97 +70 ns,24: reader: 98 +70 ns,24: reader: 99 +70 ns,24: reader: 100 +70 ns,24: reader: 101 +70 ns,24: reader: 102 +70 ns,24: reader: 103 +70 ns,24: writer: 0 free spaces +70 ns,24: writer: non-blocking write +70 ns,24: writer: waiting +70 ns,25: writer: data read event +70 ns,25: writer: waiting +70 ns,26: reader: 105 +70 ns,26: reader: 106 +70 ns,26: reader: 107 +70 ns,26: reader: 108 +70 ns,26: reader: 109 +70 ns,27: writer: data read event +70 ns,27: writer: waiting +80 ns,28: reader: 10 available samples +80 ns,28: reader: blocking read 2 +80 ns,28: reader: 110 +80 ns,28: reader: 111 +80 ns,28: reader: 112 +80 ns,28: reader: 113 +80 ns,28: reader: 114 +80 ns,28: reader: 116 +80 ns,28: reader: 117 +80 ns,28: reader: 118 +80 ns,28: reader: 119 +80 ns,28: reader: 120 +80 ns,29: writer: data read event +80 ns,30: reader: 122 +80 ns,30: reader: 123 +80 ns,30: reader: 124 +80 ns,30: reader: 125 +80 ns,30: reader: 126 +90 ns,31: writer: blocking write +90 ns,31: reader: 0 available samples +90 ns,31: reader: non-blocking read +90 ns,31: reader: waiting +90 ns,32: reader: data written event +90 ns,32: reader: 127 +90 ns,32: reader: 128 +90 ns,32: reader: 129 +90 ns,32: reader: 130 +90 ns,32: reader: 131 +90 ns,32: reader: 132 +90 ns,32: reader: 133 +90 ns,32: reader: 134 +90 ns,32: reader: 135 +90 ns,32: reader: 136 +90 ns,32: reader: waiting +90 ns,34: reader: data written event +90 ns,34: reader: 137 +90 ns,34: reader: 138 +90 ns,34: reader: 139 +90 ns,34: reader: 140 +90 ns,34: reader: 141 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test04/test04.cpp new file mode 100644 index 000000000..be6ee57c5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test04/test04.cpp @@ -0,0 +1,145 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-23 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo events + +#include "systemc.h" + +#define W_INFO(msg) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": writer: " << msg << endl; + +#define R_INFO(msg) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": reader: " << msg << endl; + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + W_INFO( "blocking write" ); + for( int i = 0; i < 20; i ++ ) { + out.write( val ++ ); // blocking write + } + wait( 10, SC_NS ); + W_INFO( out.num_free() << " free spaces" ); + W_INFO( "non-blocking write" ); + for( int i = 0; i < 20; i ++ ) { + while( ! out.nb_write( val ++ ) ) { // non-blocking write + W_INFO( "waiting" ); + wait( out.data_read_event() ); + W_INFO( "data read event" ); + } + } + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in in; + + // process(es) + void main_action() + { + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + R_INFO( "blocking read 1" ); + for( int i = 0; i < 15; i ++ ) { + in.read( val ); // blocking read + R_INFO( val ); + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples" ); + R_INFO( "blocking read 2" ); + for( int i = 0; i < 15; i ++ ) { + val = in.read(); // blocking read + R_INFO( val ); + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples" ); + R_INFO( "non-blocking read" ); + for( int i = 0; i < 15; i ++ ) { + while( ! in.nb_read( val ) ) { // non-blocking read + R_INFO( "waiting" ); + wait( in.data_written_event() ); + R_INFO( "data written event" ); + } + R_INFO( val ); + } + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + } +}; + +int sc_main( int, char*[] ) +{ + // sc_clock c; + + // declare channel(s) + sc_fifo fifo( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + r.in( fifo ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_fifo/test05/golden/test05.log new file mode 100644 index 000000000..4c8333c81 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test05/golden/test05.log @@ -0,0 +1,185 @@ +SystemC Simulation +10 ns,1: writer: blocking write +10 ns,1: reader: blocking read 1 +10 ns,2: reader: 0 +10 ns,2: reader: 1 +10 ns,2: reader: 2 +10 ns,2: reader: 3 +10 ns,2: reader: 4 +10 ns,2: reader: 5 +10 ns,2: reader: 6 +10 ns,2: reader: 7 +10 ns,2: reader: 8 +10 ns,2: reader: 9 +10 ns,4: reader: 10 +10 ns,4: reader: 11 +10 ns,4: reader: 12 +10 ns,4: reader: 13 +10 ns,4: reader: 14 +20 ns,5: writer: 5 free spaces +20 ns,5: writer: non-blocking write +20 ns,5: writer: waiting +20 ns,5: reader: 5 available samples +20 ns,5: reader: blocking read 2 +20 ns,5: reader: 15 +20 ns,5: reader: 16 +20 ns,5: reader: 17 +20 ns,5: reader: 18 +20 ns,5: reader: 19 +20 ns,6: reader: 20 +20 ns,6: reader: 21 +20 ns,6: reader: 22 +20 ns,6: reader: 23 +20 ns,6: reader: 24 +20 ns,6: writer: data read event +20 ns,6: writer: waiting +20 ns,7: reader: 26 +20 ns,7: reader: 27 +20 ns,7: reader: 28 +20 ns,7: reader: 29 +20 ns,7: reader: 30 +20 ns,7: writer: data read event +20 ns,7: writer: waiting +20 ns,8: writer: data read event +30 ns,9: reader: 10 available samples +30 ns,9: reader: non-blocking read +30 ns,9: reader: 32 +30 ns,9: reader: 33 +30 ns,9: reader: 34 +30 ns,9: reader: 35 +30 ns,9: reader: 36 +30 ns,9: reader: 38 +30 ns,9: reader: 39 +30 ns,9: reader: 40 +30 ns,9: reader: 41 +30 ns,9: reader: 42 +30 ns,9: reader: waiting +30 ns,9: writer: blocking write +30 ns,11: reader: data written event +30 ns,11: reader: 43 +30 ns,11: reader: 44 +30 ns,11: reader: 45 +30 ns,11: reader: 46 +30 ns,11: reader: 47 +40 ns,13: reader: blocking read 1 +40 ns,13: reader: 48 +40 ns,13: reader: 49 +40 ns,13: reader: 50 +40 ns,13: reader: 51 +40 ns,13: reader: 52 +40 ns,13: reader: 53 +40 ns,13: reader: 54 +40 ns,13: reader: 55 +40 ns,13: reader: 56 +40 ns,13: reader: 57 +40 ns,15: reader: 58 +40 ns,15: reader: 59 +40 ns,15: reader: 60 +40 ns,15: reader: 61 +40 ns,15: reader: 62 +50 ns,16: writer: 10 free spaces +50 ns,16: writer: non-blocking write +50 ns,16: writer: waiting +50 ns,16: reader: 0 available samples +50 ns,16: reader: blocking read 2 +50 ns,17: reader: 63 +50 ns,17: reader: 64 +50 ns,17: reader: 65 +50 ns,17: reader: 66 +50 ns,17: reader: 67 +50 ns,17: reader: 68 +50 ns,17: reader: 69 +50 ns,17: reader: 70 +50 ns,17: reader: 71 +50 ns,17: reader: 72 +50 ns,18: writer: data read event +50 ns,19: reader: 74 +50 ns,19: reader: 75 +50 ns,19: reader: 76 +50 ns,19: reader: 77 +50 ns,19: reader: 78 +60 ns,20: writer: blocking write +60 ns,20: reader: 5 available samples +60 ns,20: reader: non-blocking read +60 ns,20: reader: 79 +60 ns,20: reader: 80 +60 ns,20: reader: 81 +60 ns,20: reader: 82 +60 ns,20: reader: 83 +60 ns,20: reader: waiting +60 ns,21: reader: data written event +60 ns,21: reader: 84 +60 ns,21: reader: 85 +60 ns,21: reader: 86 +60 ns,21: reader: 87 +60 ns,21: reader: 88 +60 ns,21: reader: waiting +60 ns,22: reader: data written event +60 ns,22: reader: 89 +60 ns,22: reader: 90 +60 ns,22: reader: 91 +60 ns,22: reader: 92 +60 ns,22: reader: 93 +70 ns,24: reader: blocking read 1 +70 ns,24: reader: 94 +70 ns,24: reader: 95 +70 ns,24: reader: 96 +70 ns,24: reader: 97 +70 ns,24: reader: 98 +70 ns,24: reader: 99 +70 ns,24: reader: 100 +70 ns,24: reader: 101 +70 ns,24: reader: 102 +70 ns,24: reader: 103 +70 ns,24: writer: 0 free spaces +70 ns,24: writer: non-blocking write +70 ns,24: writer: waiting +70 ns,25: writer: data read event +70 ns,25: writer: waiting +70 ns,26: reader: 105 +70 ns,26: reader: 106 +70 ns,26: reader: 107 +70 ns,26: reader: 108 +70 ns,26: reader: 109 +70 ns,27: writer: data read event +70 ns,27: writer: waiting +80 ns,28: reader: 10 available samples +80 ns,28: reader: blocking read 2 +80 ns,28: reader: 110 +80 ns,28: reader: 111 +80 ns,28: reader: 112 +80 ns,28: reader: 113 +80 ns,28: reader: 114 +80 ns,28: reader: 116 +80 ns,28: reader: 117 +80 ns,28: reader: 118 +80 ns,28: reader: 119 +80 ns,28: reader: 120 +80 ns,29: writer: data read event +80 ns,30: reader: 122 +80 ns,30: reader: 123 +80 ns,30: reader: 124 +80 ns,30: reader: 125 +80 ns,30: reader: 126 +90 ns,31: writer: blocking write +90 ns,31: reader: 0 available samples +90 ns,31: reader: non-blocking read +90 ns,31: reader: waiting +90 ns,32: reader: data written event +90 ns,32: reader: 127 +90 ns,32: reader: 128 +90 ns,32: reader: 129 +90 ns,32: reader: 130 +90 ns,32: reader: 131 +90 ns,32: reader: 132 +90 ns,32: reader: 133 +90 ns,32: reader: 134 +90 ns,32: reader: 135 +90 ns,32: reader: 136 +90 ns,32: reader: waiting +90 ns,34: reader: data written event +90 ns,34: reader: 137 +90 ns,34: reader: 138 +90 ns,34: reader: 139 +90 ns,34: reader: 140 +90 ns,34: reader: 141 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test05/test05.cpp new file mode 100644 index 000000000..cbc5db975 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test05/test05.cpp @@ -0,0 +1,147 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-23 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_fifo event finders + +#include "systemc.h" + +#define W_INFO(msg) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": writer: " << msg << endl; + +#define R_INFO(msg) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": reader: " << msg << endl; + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + W_INFO( "blocking write" ); + for( int i = 0; i < 20; i ++ ) { + out.write( val ++ ); // blocking write + } + wait( 10, SC_NS ); + W_INFO( out.num_free() << " free spaces" ); + W_INFO( "non-blocking write" ); + for( int i = 0; i < 20; i ++ ) { + while( ! out.nb_write( val ++ ) ) { // non-blocking write + W_INFO( "waiting" ); + wait(); + W_INFO( "data read event" ); + } + } + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + sensitive << out.data_read(); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in in; + + // process(es) + void main_action() + { + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + R_INFO( "blocking read 1" ); + for( int i = 0; i < 15; i ++ ) { + in.read( val ); // blocking read + R_INFO( val ); + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples" ); + R_INFO( "blocking read 2" ); + for( int i = 0; i < 15; i ++ ) { + val = in.read(); // blocking read + R_INFO( val ); + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples" ); + R_INFO( "non-blocking read" ); + for( int i = 0; i < 15; i ++ ) { + while( ! in.nb_read( val ) ) { // non-blocking read + R_INFO( "waiting" ); + wait(); + R_INFO( "data written event" ); + } + R_INFO( val ); + } + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + sensitive << in.data_written(); + } +}; + +int sc_main( int, char*[] ) +{ + // sc_clock c; + + // declare channel(s) + sc_fifo fifo( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + r.in( fifo ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test06/golden/test06.log b/src/systemc/tests/systemc/communication/sc_fifo/test06/golden/test06.log new file mode 100644 index 000000000..273d16efc --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test06/golden/test06.log @@ -0,0 +1,130 @@ +SystemC Simulation +10 ns,1: writer0: blocking write +10 ns,1: reader0: blocking read 1 +10 ns,2: reader0: 0 +10 ns,2: reader0: 1 +10 ns,2: reader0: 2 +10 ns,2: reader0: 3 +10 ns,2: reader0: 4 +10 ns,2: reader0: 5 +10 ns,2: reader0: 6 +10 ns,2: reader0: 7 +10 ns,2: reader0: 8 +10 ns,2: reader0: 9 +10 ns,3: writer1: blocking write +10 ns,4: reader0: 10 +10 ns,4: reader0: 11 +10 ns,4: reader0: 12 +10 ns,4: reader0: 13 +10 ns,4: reader0: 14 +10 ns,4: reader1: blocking read 1 +10 ns,4: reader1: 20 +10 ns,4: reader1: 21 +10 ns,4: reader1: 22 +10 ns,4: reader1: 23 +10 ns,4: reader1: 24 +10 ns,4: reader1: 25 +10 ns,4: reader1: 26 +10 ns,4: reader1: 27 +10 ns,4: reader1: 28 +10 ns,4: reader1: 29 +10 ns,5: writer2: blocking write +10 ns,6: reader1: 30 +10 ns,6: reader1: 31 +10 ns,6: reader1: 32 +10 ns,6: reader1: 33 +10 ns,6: reader1: 34 +10 ns,6: reader2: blocking read 1 +10 ns,6: reader2: 40 +10 ns,6: reader2: 41 +10 ns,6: reader2: 42 +10 ns,6: reader2: 43 +10 ns,6: reader2: 44 +10 ns,6: reader2: 45 +10 ns,6: reader2: 46 +10 ns,6: reader2: 47 +10 ns,6: reader2: 48 +10 ns,6: reader2: 49 +10 ns,8: reader2: 50 +10 ns,8: reader2: 51 +10 ns,8: reader2: 52 +10 ns,8: reader2: 53 +10 ns,8: reader2: 54 +20 ns,9: writer0: blocking write +20 ns,9: reader3: 5 available samples +20 ns,9: reader3: blocking read 2 +20 ns,9: reader0: 15 +20 ns,9: reader0: 16 +20 ns,9: reader0: 17 +20 ns,9: reader0: 18 +20 ns,9: reader0: 19 +20 ns,10: reader0: 60 +20 ns,10: reader0: 61 +20 ns,10: reader0: 62 +20 ns,10: reader0: 63 +20 ns,10: reader0: 64 +20 ns,11: reader0: 65 +20 ns,11: reader0: 66 +20 ns,11: reader0: 67 +20 ns,11: reader0: 68 +20 ns,11: reader0: 69 +20 ns,11: reader1: 35 +20 ns,11: reader1: 36 +20 ns,11: reader1: 37 +20 ns,11: reader1: 38 +20 ns,11: reader1: 39 +20 ns,12: writer1: blocking write +20 ns,13: reader1: 80 +20 ns,13: reader1: 81 +20 ns,13: reader1: 82 +20 ns,13: reader1: 83 +20 ns,13: reader1: 84 +20 ns,13: reader1: 85 +20 ns,13: reader1: 86 +20 ns,13: reader1: 87 +20 ns,13: reader1: 88 +20 ns,13: reader1: 89 +20 ns,13: reader2: 55 +20 ns,13: reader2: 56 +20 ns,13: reader2: 57 +20 ns,13: reader2: 58 +20 ns,13: reader2: 59 +20 ns,14: writer2: blocking write +20 ns,15: reader2: 100 +20 ns,15: reader2: 101 +20 ns,15: reader2: 102 +20 ns,15: reader2: 103 +20 ns,15: reader2: 104 +20 ns,15: reader2: 105 +20 ns,15: reader2: 106 +20 ns,15: reader2: 107 +20 ns,15: reader2: 108 +20 ns,15: reader2: 109 +30 ns,17: reader0: blocking read 1 +30 ns,17: reader0: 70 +30 ns,17: reader0: 71 +30 ns,17: reader0: 72 +30 ns,17: reader0: 73 +30 ns,17: reader0: 74 +30 ns,17: reader0: 75 +30 ns,17: reader0: 76 +30 ns,17: reader0: 77 +30 ns,17: reader0: 78 +30 ns,17: reader0: 79 +30 ns,17: writer0: blocking write +30 ns,19: reader0: 120 +30 ns,19: reader0: 121 +30 ns,19: reader0: 122 +30 ns,19: reader0: 123 +30 ns,19: reader0: 124 +30 ns,19: reader1: blocking read 1 +30 ns,19: reader1: 90 +30 ns,19: reader1: 91 +30 ns,19: reader1: 92 +30 ns,19: reader1: 93 +30 ns,19: reader1: 94 +30 ns,19: reader1: 95 +30 ns,19: reader1: 96 +30 ns,19: reader1: 97 +30 ns,19: reader1: 98 +30 ns,19: reader1: 99 diff --git a/src/systemc/tests/systemc/communication/sc_fifo/test06/test06.cpp b/src/systemc/tests/systemc/communication/sc_fifo/test06/test06.cpp new file mode 100644 index 000000000..bc2c34f89 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_fifo/test06/test06.cpp @@ -0,0 +1,142 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- test multiple interfaces + + Original Author: Andy Goodrich, Forte Design Systems, 03 April 2007 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of multiple interfaces for an sc_fifo + +#include "systemc.h" + +#define W_INFO(msg,iface) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": writer" << iface << ": " << msg << endl; + +#define R_INFO(msg,iface) \ + cout << sc_time_stamp() << "," << sc_delta_count() \ + << ": reader" << iface << ": " << msg << endl; + +SC_MODULE( writer ) +{ + // port(s) + sc_fifo_out out; + + // process(es) + void main_action() + { + int val = 0; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + for ( int iface=0; iface < 3; iface++ ) + { + W_INFO( "blocking write", iface ); + for( int i = 0; i < 20; i ++ ) { + out[iface]->write( val ++ ); // blocking write + } + } + } + } + + SC_CTOR( writer ) + { + SC_THREAD( main_action ); + sensitive << out.data_read(); + } +}; + +SC_MODULE( reader ) +{ + // port(s) + sc_fifo_in in; + + // process(es) + void main_action() + { + int iface; + int val; + while( true ) { + wait( 10, SC_NS ); // wait for 10 ns + for ( iface=0; iface < 3; iface++ ) + { + R_INFO( "blocking read 1", iface ); + for( int i = 0; i < 15; i ++ ) { + in[iface]->read( val ); // blocking read + R_INFO( val, iface ); + } + } + wait( 10, SC_NS ); + R_INFO( in.num_available() << " available samples", iface ); + R_INFO( "blocking read 2", iface ); + for ( iface=0; iface < 3; iface++ ) + { + for( int i = 0; i < 15; i ++ ) { + val = in[iface]->read(); // blocking read + R_INFO( val, iface ); + } + } + } + } + + SC_CTOR( reader ) + { + SC_THREAD( main_action ); + sensitive << in.data_written(); + } +}; + +int sc_main( int, char*[] ) +{ + // sc_clock c; + + // declare channel(s) + sc_fifo fifo( 10 ); + sc_fifo fifo1( 10 ); + sc_fifo fifo2( 10 ); + + // instantiate block(s) and connect to channel(s) + writer w( "writer" ); + reader r( "reader" ); + + w.out( fifo ); + w.out( fifo1 ); + w.out( fifo2 ); + r.in( fifo ); + r.in( fifo1 ); + r.in( fifo2 ); + + // run the simulation + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_interface/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_interface/test01/golden/test01.log new file mode 100644 index 000000000..fa93f8ad4 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_interface/test01/golden/test01.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Warning: (W116) channel doesn't have a default event +In file: diff --git a/src/systemc/tests/systemc/communication/sc_interface/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_interface/test01/test01.cpp new file mode 100644 index 000000000..e882848b1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_interface/test01/test01.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_interface test; +// get warning if default_event is called and not redefined + +#include "systemc.h" + +class channel +: virtual public sc_interface +{}; + +int +sc_main( int, char*[] ) +{ + channel c; + + c.default_event(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_mutex/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_mutex/test01/golden/test01.log new file mode 100644 index 000000000..3522def1e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_mutex/test01/golden/test01.log @@ -0,0 +1,48 @@ +SystemC Simulation +1 ns proc_a - lock requested +1 ns proc_a - lock obtained +2 ns proc_b - lock requested +3 ns proc_a - unlock successful +3 ns proc_b - lock obtained +6 ns proc_a - trylock failed +6 ns proc_a - unlock failed +7 ns proc_b - unlock successful +7 ns proc_a - lock requested +7 ns proc_a - lock obtained +9 ns proc_a - unlock successful +10 ns proc_b - trylock successful +10 ns proc_b - unlock successful +12 ns proc_a - trylock successful +12 ns proc_a - unlock successful +12 ns proc_b - lock requested +12 ns proc_b - lock obtained +13 ns proc_a - lock requested +16 ns proc_b - unlock successful +16 ns proc_a - lock obtained +18 ns proc_a - unlock successful +19 ns proc_b - trylock successful +19 ns proc_b - unlock successful +21 ns proc_a - trylock successful +21 ns proc_a - unlock successful +21 ns proc_b - lock requested +21 ns proc_b - lock obtained +22 ns proc_a - lock requested +25 ns proc_b - unlock successful +25 ns proc_a - lock obtained +27 ns proc_a - unlock successful +28 ns proc_b - trylock successful +28 ns proc_b - unlock successful +30 ns proc_a - trylock successful +30 ns proc_a - unlock successful +30 ns proc_b - lock requested +30 ns proc_b - lock obtained +31 ns proc_a - lock requested +34 ns proc_b - unlock successful +34 ns proc_a - lock obtained +36 ns proc_a - unlock successful +37 ns proc_b - trylock successful +37 ns proc_b - unlock successful +39 ns proc_a - trylock successful +39 ns proc_a - unlock successful +39 ns proc_b - lock requested +39 ns proc_b - lock obtained diff --git a/src/systemc/tests/systemc/communication/sc_mutex/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_mutex/test01/test01.cpp new file mode 100644 index 000000000..a27a16e56 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_mutex/test01/test01.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_mutex primitive channel + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_mutex mutex; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_a() + { + while( true ) { + wait( 1, SC_NS ); + write( "proc_a - lock requested" ); + mutex.lock(); + write( "proc_a - lock obtained" ); + wait( 2, SC_NS ); + if( mutex.unlock() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + wait( 3, SC_NS ); + if( mutex.trylock() == 0 ) { + write( "proc_a - trylock successful" ); + } else { + write( "proc_a - trylock failed" ); + } + if( mutex.unlock() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + } + } + + void proc_b() + { + while( true ) { + wait( 2, SC_NS ); + write( "proc_b - lock requested" ); + mutex.lock(); + write( "proc_b - lock obtained" ); + wait( 4, SC_NS ); + if( mutex.unlock() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + wait( 3, SC_NS ); + if( mutex.trylock() == 0 ) { + write( "proc_b - trylock successful" ); + } else { + write( "proc_b - trylock failed" ); + } + if( mutex.unlock() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( proc_a ); + SC_THREAD( proc_b ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start( 40, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_mutex/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_mutex/test02/golden/test02.log new file mode 100644 index 000000000..3522def1e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_mutex/test02/golden/test02.log @@ -0,0 +1,48 @@ +SystemC Simulation +1 ns proc_a - lock requested +1 ns proc_a - lock obtained +2 ns proc_b - lock requested +3 ns proc_a - unlock successful +3 ns proc_b - lock obtained +6 ns proc_a - trylock failed +6 ns proc_a - unlock failed +7 ns proc_b - unlock successful +7 ns proc_a - lock requested +7 ns proc_a - lock obtained +9 ns proc_a - unlock successful +10 ns proc_b - trylock successful +10 ns proc_b - unlock successful +12 ns proc_a - trylock successful +12 ns proc_a - unlock successful +12 ns proc_b - lock requested +12 ns proc_b - lock obtained +13 ns proc_a - lock requested +16 ns proc_b - unlock successful +16 ns proc_a - lock obtained +18 ns proc_a - unlock successful +19 ns proc_b - trylock successful +19 ns proc_b - unlock successful +21 ns proc_a - trylock successful +21 ns proc_a - unlock successful +21 ns proc_b - lock requested +21 ns proc_b - lock obtained +22 ns proc_a - lock requested +25 ns proc_b - unlock successful +25 ns proc_a - lock obtained +27 ns proc_a - unlock successful +28 ns proc_b - trylock successful +28 ns proc_b - unlock successful +30 ns proc_a - trylock successful +30 ns proc_a - unlock successful +30 ns proc_b - lock requested +30 ns proc_b - lock obtained +31 ns proc_a - lock requested +34 ns proc_b - unlock successful +34 ns proc_a - lock obtained +36 ns proc_a - unlock successful +37 ns proc_b - trylock successful +37 ns proc_b - unlock successful +39 ns proc_a - trylock successful +39 ns proc_a - unlock successful +39 ns proc_b - lock requested +39 ns proc_b - lock obtained diff --git a/src/systemc/tests/systemc/communication/sc_mutex/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_mutex/test02/test02.cpp new file mode 100644 index 000000000..52050f933 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_mutex/test02/test02.cpp @@ -0,0 +1,139 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_mutex_if interface + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_port mutex; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_a() + { + while( true ) { + wait( 1, SC_NS ); + write( "proc_a - lock requested" ); + mutex->lock(); + write( "proc_a - lock obtained" ); + wait( 2, SC_NS ); + if( mutex->unlock() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + wait( 3, SC_NS ); + if( mutex->trylock() == 0 ) { + write( "proc_a - trylock successful" ); + } else { + write( "proc_a - trylock failed" ); + } + if( mutex->unlock() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( proc_a ); + } +}; + +SC_MODULE( mod_b ) +{ + sc_port mutex; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_b() + { + while( true ) { + wait( 2, SC_NS ); + write( "proc_b - lock requested" ); + mutex->lock(); + write( "proc_b - lock obtained" ); + wait( 4, SC_NS ); + if( mutex->unlock() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + wait( 3, SC_NS ); + if( mutex->trylock() == 0 ) { + write( "proc_b - trylock successful" ); + } else { + write( "proc_b - trylock failed" ); + } + if( mutex->unlock() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + } + } + + SC_CTOR( mod_b ) + { + SC_THREAD( proc_b ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + mod_b b( "b" ); + sc_mutex mutex( "mutex" ); + + a.mutex( mutex ); + b.mutex( mutex ); + + sc_start( 40, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_port_policy/test01/golden/test01.log new file mode 100644 index 000000000..b5ba39034 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test01/golden/test01.log @@ -0,0 +1,13 @@ +SystemC Simulation +1 ns: + all[0] = 1 + all[1] = 0 + one = 1 +2 ns: + all[0] = 1 + all[1] = 1 + one = 1 +3 ns: + all[0] = 0 + all[1] = 0 + one = 0 diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test01/test01.cpp new file mode 100644 index 000000000..30afd975e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test01/test01.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- Test bind policy: unbound port. + + Original Author: Andy Goodrich, Forte Design Systems, 02 September 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +// #define ALL_ERROR // Force error on all bound port. +// #define BIND_NONE // Bind port with zero or more bound. +// #define ONE_ERROR // Force error on one or more bound port. + +SC_MODULE(TB) +{ + SC_CTOR(TB) : m_all("all"), m_none("none"), m_one("one") + { + SC_CTHREAD(thread, m_clk.pos()); + } + void thread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ":" << endl; + cout << " all[0] = " << m_all[0]->read() << endl; + cout << " all[1] = " << m_all[1]->read() << endl; + cout << " one = " << m_one->read() << endl; +# if defined(BIND_NONE) + cout << " none = " << m_none->read() << endl; +# endif + } + } + sc_port,2,SC_ALL_BOUND> m_all; + sc_in m_clk; + sc_port,2,SC_ZERO_OR_MORE_BOUND> m_none; + sc_port,2,SC_ONE_OR_MORE_BOUND> m_one; +}; + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal sig1; + sc_signal sig2; + + TB tb("tb"); + + tb.m_clk(clock); + +# if !defined(ONE_ERROR) + tb.m_one(sig1); +# endif +# if defined(BIND_NONE) + tb.m_none(sig2); +# endif + tb.m_all(sig1); +# if !defined(ALL_ERROR) + tb.m_all(sig2); +# endif + + sc_start(1, SC_NS); + sig1 = true; + sc_start(1, SC_NS); + sig2 = true; + sc_start(1, SC_NS); + sig1 = false; + sig2 = false; + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_port_policy/test02/golden/test02.log new file mode 100644 index 000000000..53354e74d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test02/golden/test02.log @@ -0,0 +1,16 @@ +SystemC Simulation +1 ns: + all[0] = 1 + all[1] = 0 + one = 1 + none = 0 +2 ns: + all[0] = 1 + all[1] = 1 + one = 1 + none = 1 +3 ns: + all[0] = 0 + all[1] = 0 + one = 0 + none = 0 diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test02/test02.cpp new file mode 100644 index 000000000..4a7ef1e38 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test02/test02.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- Test bind policy: none port bound. + + Original Author: Andy Goodrich, Forte Design Systems, 02 September 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +// #define ALL_ERROR // Force error on all bound port. +#define BIND_NONE // Bind port with zero or more bound. +// #define ONE_ERROR // Force error on one or more bound port. + +SC_MODULE(TB) +{ + SC_CTOR(TB) : m_all("all"), m_none("none"), m_one("one") + { + SC_CTHREAD(thread, m_clk.pos()); + } + void thread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ":" << endl; + cout << " all[0] = " << m_all[0]->read() << endl; + cout << " all[1] = " << m_all[1]->read() << endl; + cout << " one = " << m_one->read() << endl; +# if defined(BIND_NONE) + cout << " none = " << m_none->read() << endl; +# endif + } + } + sc_port,2,SC_ALL_BOUND> m_all; + sc_in m_clk; + sc_port,2,SC_ZERO_OR_MORE_BOUND> m_none; + sc_port,2,SC_ONE_OR_MORE_BOUND> m_one; +}; + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal sig1; + sc_signal sig2; + + TB tb("tb"); + + tb.m_clk(clock); + +# if !defined(ONE_ERROR) + tb.m_one(sig1); +# endif +# if defined(BIND_NONE) + tb.m_none(sig2); +# endif + tb.m_all(sig1); +# if !defined(ALL_ERROR) + tb.m_all(sig2); +# endif + + sc_start(1, SC_NS); + sig1 = true; + sc_start(1, SC_NS); + sig2 = true; + sc_start(1, SC_NS); + sig1 = false; + sig2 = false; + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_port_policy/test03/golden/test03.log new file mode 100644 index 000000000..2119b4e08 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E109) complete binding failed: port not bound: port 'tb.one' (sc_port) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test03/test03.cpp new file mode 100644 index 000000000..8200ead5d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test03/test03.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- Test bind policy: one required not bound. + + Original Author: Andy Goodrich, Forte Design Systems, 02 September 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +// #define ALL_ERROR // Force error on all bound port. +// #define BIND_NONE // Bind port with zero or more bound. +#define ONE_ERROR // Force error on one or more bound port. + +SC_MODULE(TB) +{ + SC_CTOR(TB) : m_all("all"), m_none("none"), m_one("one") + { + SC_CTHREAD(thread, m_clk.pos()); + } + void thread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ":" << endl; + cout << " all[0] = " << m_all[0]->read() << endl; + cout << " all[1] = " << m_all[1]->read() << endl; + cout << " one = " << m_one->read() << endl; +# if defined(BIND_NONE) + cout << " none = " << m_none->read() << endl; +# endif + } + } + sc_port,2,SC_ALL_BOUND> m_all; + sc_in m_clk; + sc_port,2,SC_ZERO_OR_MORE_BOUND> m_none; + sc_port,2,SC_ONE_OR_MORE_BOUND> m_one; +}; + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal sig1; + sc_signal sig2; + + TB tb("tb"); + + tb.m_clk(clock); + +# if !defined(ONE_ERROR) + tb.m_one(sig1); +# endif +# if defined(BIND_NONE) + tb.m_none(sig2); +# endif + tb.m_all(sig1); +# if !defined(ALL_ERROR) + tb.m_all(sig2); +# endif + + sc_start(1, SC_NS); + sig1 = true; + sc_start(1, SC_NS); + sig2 = true; + sc_start(1, SC_NS); + sig1 = false; + sig2 = false; + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_port_policy/test04/golden/test04.log new file mode 100644 index 000000000..ee4a4baaf --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test04/golden/test04.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E109) complete binding failed: 1 actual binds is less than required 2: port 'tb.all' (sc_port) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test04/test04.cpp new file mode 100644 index 000000000..8f202dc11 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test04/test04.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- Test bind policy: all required not bound. + + Original Author: Andy Goodrich, Forte Design Systems, 02 September 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +#define ALL_ERROR // Force error on all bound port. +// #define BIND_NONE // Bind port with zero or more bound. +// #define ONE_ERROR // Force error on one or more bound port. + +SC_MODULE(TB) +{ + SC_CTOR(TB) : m_all("all"), m_none("none"), m_one("one") + { + SC_CTHREAD(thread, m_clk.pos()); + } + void thread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ":" << endl; + cout << " all[0] = " << m_all[0]->read() << endl; + cout << " all[1] = " << m_all[1]->read() << endl; + cout << " one = " << m_one->read() << endl; +# if defined(BIND_NONE) + cout << " none = " << m_none->read() << endl; +# endif + } + } + sc_port,2,SC_ALL_BOUND> m_all; + sc_in m_clk; + sc_port,2,SC_ZERO_OR_MORE_BOUND> m_none; + sc_port,2,SC_ONE_OR_MORE_BOUND> m_one; +}; + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal sig1; + sc_signal sig2; + + TB tb("tb"); + + tb.m_clk(clock); + +# if !defined(ONE_ERROR) + tb.m_one(sig1); +# endif +# if defined(BIND_NONE) + tb.m_none(sig2); +# endif + tb.m_all(sig1); +# if !defined(ALL_ERROR) + tb.m_all(sig2); +# endif + + sc_start(1, SC_NS); + sig1 = true; + sc_start(1, SC_NS); + sig2 = true; + sc_start(1, SC_NS); + sig1 = false; + sig2 = false; + sc_start(1, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_port_policy/test05/golden/test05.log new file mode 100644 index 000000000..833e3177e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test05/golden/test05.log @@ -0,0 +1,6 @@ +SystemC Simulation +m_all_bound_4[0] = 0 +m_all_bound_4[1] = 1 +m_all_bound_4[2] = 2 +m_all_bound_4[3] = 3 +Program completed diff --git a/src/systemc/tests/systemc/communication/sc_port_policy/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_port_policy/test05/test05.cpp new file mode 100644 index 000000000..c50ee616b --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_port_policy/test05/test05.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- test of binding w/zero bound port and binding after the fact. + + Original Author: Andy Goodrich, Forte Design Systems, 2005-09-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of binding with zero bound port and binding after the fact. + + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) : + m_all_bound_0("all_bound_0"), + m_all_bound_4("all_bound_4"), + m_one_or_more_2("one_or_more_2"), + m_zero_or_more_2("zero_or_more_2") + { + SC_CTHREAD(thread,m_clk.pos()); + + m_all_bound_0(m_signal_0); // 1 + + m_all_bound_4(m_all_bound_0); // 1 + m_all_bound_4(m_one_or_more_2); // 2 and 3 + m_all_bound_4(m_zero_or_more_2); + m_all_bound_4(m_signal_3); // 4 + m_all_bound_4(m_zero_or_more_2); + + m_one_or_more_2(m_signal_1); // 1 + m_one_or_more_2(m_signal_2); // 2 + } + void thread() + { + m_signal_0 = 0; + m_signal_1 = 1; + m_signal_2 = 2; + m_signal_3 = 3; + for (;;) + { + wait(); + cout << "m_all_bound_4[0] = " << m_all_bound_4[0]->read() << endl; + cout << "m_all_bound_4[1] = " << m_all_bound_4[1]->read() << endl; + cout << "m_all_bound_4[2] = " << m_all_bound_4[2]->read() << endl; + cout << "m_all_bound_4[3] = " << m_all_bound_4[3]->read() << endl; + } + } + sc_in m_clk; + + sc_port,0,SC_ALL_BOUND> m_all_bound_0; + sc_port,4,SC_ALL_BOUND> m_all_bound_4; + sc_port,2,SC_ONE_OR_MORE_BOUND> m_one_or_more_2; + sc_signal m_signal_0; + sc_signal m_signal_1; + sc_signal m_signal_2; + sc_signal m_signal_3; + sc_port,2,SC_ZERO_OR_MORE_BOUND> m_zero_or_more_2; +}; +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(2, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test01/golden/test01.log new file mode 100644 index 000000000..510988bc1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test01/golden/test01.log @@ -0,0 +1,3 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test01/test01.cpp new file mode 100644 index 000000000..87fb28e29 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test01/test01.cpp @@ -0,0 +1,139 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger() + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name), data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(10, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test02/golden/test02.log new file mode 100644 index 000000000..531039f15 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test02/golden/test02.log @@ -0,0 +1,21 @@ +SystemC Simulation +writting 0 to channel and notifying write_event +reading 0 from channel and notifying read_event +writting 1 to channel and notifying write_event +reading 1 from channel and notifying read_event +writting 2 to channel and notifying write_event +reading 2 from channel and notifying read_event +writting 3 to channel and notifying write_event +reading 3 from channel and notifying read_event +writting 4 to channel and notifying write_event +reading 4 from channel and notifying read_event +writting 5 to channel and notifying write_event +reading 5 from channel and notifying read_event +writting 6 to channel and notifying write_event +reading 6 from channel and notifying read_event +writting 7 to channel and notifying write_event +reading 7 from channel and notifying read_event +writting 8 to channel and notifying write_event +reading 8 from channel and notifying read_event +writting 9 to channel and notifying write_event +reading 9 from channel and notifying read_event diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test02/test02.cpp new file mode 100644 index 000000000..c0c0c2a7a --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test02/test02.cpp @@ -0,0 +1,144 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(const sc_event&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + if(i < 10){ + next_trigger(read_event); + data = i; + cout<<"writting "<< data <<" to channel"; + i++; + cout<<" and notifying write_event" << endl; + write_event.notify(); + } + } + + //read from channel + void read( ){ + int j; + next_trigger(write_event); + j = data; + cout<<"reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(10, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test03/golden/test03.log new file mode 100644 index 000000000..f783e1cb6 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test03/golden/test03.log @@ -0,0 +1,15 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:20 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:30 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:40 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:50 ns reading 5 from channel +simulation time:60 ns writting 6 to channel +simulation time:60 ns reading 6 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test03/test03.cpp new file mode 100644 index 000000000..07554c293 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test03/test03.cpp @@ -0,0 +1,140 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(const sc_time&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + i++; + } + + //read from channel + void read( ){ + int j; + sc_time t(10, SC_NS); + next_trigger(t); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(70, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test04/golden/test04.log new file mode 100644 index 000000000..da6325102 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test04/golden/test04.log @@ -0,0 +1,22 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:55 ns reading 5 from channel +simulation time:60 ns writting 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:70 ns writting 7 to channel +simulation time:75 ns reading 7 from channel +simulation time:80 ns writting 8 to channel +simulation time:85 ns reading 8 from channel +simulation time:90 ns writting 9 to channel +simulation time:95 ns reading 9 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test04/test04.cpp new file mode 100644 index 000000000..395186f17 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test04/test04.cpp @@ -0,0 +1,148 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(double, sc_time_unit, sc_event&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 5){ + write_event.notify(20, SC_NS); + } + else { + write_event.notify(5, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(10, SC_NS, write_event); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test05/golden/test05.log new file mode 100644 index 000000000..8988b3192 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test05/golden/test05.log @@ -0,0 +1,26 @@ +SystemC Simulation +simulation time:0 s writing 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writing 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writing 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writing 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:40 ns writing 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:50 ns writing 5 to channel +simulation time:60 ns reading 5 from channel +simulation time:60 ns writing 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:70 ns writing 7 to channel +simulation time:75 ns reading 7 from channel +simulation time:80 ns writing 8 to channel +simulation time:85 ns reading 8 from channel +simulation time:90 ns writing 9 to channel +simulation time:95 ns reading 9 from channel +simulation time:100 ns writing 10 to channel +simulation time:105 ns reading 10 from channel +simulation time:110 ns writing 11 to channel +simulation time:115 ns reading 11 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test05/test05.cpp new file mode 100644 index 000000000..60c7624c6 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test05/test05.cpp @@ -0,0 +1,152 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(double, sc_time_unit, sc_event_and_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writing "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_2.notify(5, SC_NS); + } + else{ + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(10, SC_NS, write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test06/golden/test06.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test06/golden/test06.log new file mode 100644 index 000000000..50d5bb719 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test06/golden/test06.log @@ -0,0 +1,27 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:35 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:45 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:55 ns reading 5 from channel +simulation time:60 ns writting 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:66 ns reading 6 from channel +simulation time:70 ns writting 7 to channel +simulation time:76 ns reading 7 from channel +simulation time:80 ns writting 8 to channel +simulation time:86 ns reading 8 from channel +simulation time:90 ns writting 9 to channel +simulation time:96 ns reading 9 from channel +simulation time:100 ns writting 10 to channel +simulation time:106 ns reading 10 from channel +simulation time:110 ns writting 11 to channel +simulation time:116 ns reading 11 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test06/test06.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test06/test06.cpp new file mode 100644 index 000000000..ddfbd5c2a --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test06/test06.cpp @@ -0,0 +1,151 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of sc_prim_channel::next_trigger(double, sc_time_unit, sc_event_or_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_1.notify(5, SC_NS); + } + else{ + write_event_2.notify(6, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(10, SC_NS, write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test07/golden/test07.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test07/golden/test07.log new file mode 100644 index 000000000..da6325102 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test07/golden/test07.log @@ -0,0 +1,22 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:55 ns reading 5 from channel +simulation time:60 ns writting 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:70 ns writting 7 to channel +simulation time:75 ns reading 7 from channel +simulation time:80 ns writting 8 to channel +simulation time:85 ns reading 8 from channel +simulation time:90 ns writting 9 to channel +simulation time:95 ns reading 9 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test07/test07.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test07/test07.cpp new file mode 100644 index 000000000..b1b18185c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test07/test07.cpp @@ -0,0 +1,149 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(const sc_time&, sc_event&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 5){ + write_event.notify(20, SC_NS); + } + else { + write_event.notify(5, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + const sc_time t(10, SC_NS); + next_trigger(t, write_event); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test08/golden/test08.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test08/golden/test08.log new file mode 100644 index 000000000..8988b3192 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test08/golden/test08.log @@ -0,0 +1,26 @@ +SystemC Simulation +simulation time:0 s writing 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writing 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writing 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writing 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:40 ns writing 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:50 ns writing 5 to channel +simulation time:60 ns reading 5 from channel +simulation time:60 ns writing 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:70 ns writing 7 to channel +simulation time:75 ns reading 7 from channel +simulation time:80 ns writing 8 to channel +simulation time:85 ns reading 8 from channel +simulation time:90 ns writing 9 to channel +simulation time:95 ns reading 9 from channel +simulation time:100 ns writing 10 to channel +simulation time:105 ns reading 10 from channel +simulation time:110 ns writing 11 to channel +simulation time:115 ns reading 11 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test08/test08.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test08/test08.cpp new file mode 100644 index 000000000..9f8ae16fa --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test08/test08.cpp @@ -0,0 +1,154 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(sc_time&, sc_event_and_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writing "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_2.notify(5, SC_NS); + } + else{ + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + const sc_time t(10, SC_NS); + next_trigger(t, write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test09/golden/test09.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test09/golden/test09.log new file mode 100644 index 000000000..0886c231e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test09/golden/test09.log @@ -0,0 +1,27 @@ +SystemC Simulation +simulation time:0 s writing 0 to channel +simulation time:0 s reading 0 from channel +simulation time:10 ns writing 1 to channel +simulation time:10 ns reading 1 from channel +simulation time:20 ns reading 1 from channel +simulation time:20 ns writing 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:30 ns writing 3 to channel +simulation time:35 ns reading 3 from channel +simulation time:40 ns writing 4 to channel +simulation time:45 ns reading 4 from channel +simulation time:50 ns writing 5 to channel +simulation time:55 ns reading 5 from channel +simulation time:60 ns writing 6 to channel +simulation time:65 ns reading 6 from channel +simulation time:66 ns reading 6 from channel +simulation time:70 ns writing 7 to channel +simulation time:76 ns reading 7 from channel +simulation time:80 ns writing 8 to channel +simulation time:86 ns reading 8 from channel +simulation time:90 ns writing 9 to channel +simulation time:96 ns reading 9 from channel +simulation time:100 ns writing 10 to channel +simulation time:106 ns reading 10 from channel +simulation time:110 ns writing 11 to channel +simulation time:116 ns reading 11 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test09/test09.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test09/test09.cpp new file mode 100644 index 000000000..d474a086d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test09/test09.cpp @@ -0,0 +1,153 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test09.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(const sc_time&, sc_event_or_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + sc_time t1(10, SC_NS); + next_trigger(t1); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writing "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i & i < 6) { + write_event_1.notify(5, SC_NS); + } + else{ + write_event_2.notify(6, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + sc_time t2(10, SC_NS); + next_trigger(t2, write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test10/golden/test10.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test10/golden/test10.log new file mode 100644 index 000000000..0385702b3 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test10/golden/test10.log @@ -0,0 +1,14 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:5 ns reading 0 from channel +simulation time:10 ns writting 1 to channel +simulation time:15 ns reading 1 from channel +simulation time:20 ns writting 2 to channel +simulation time:25 ns reading 2 from channel +simulation time:30 ns writting 3 to channel +simulation time:35 ns reading 3 from channel +simulation time:40 ns writting 4 to channel +simulation time:45 ns reading 4 from channel +simulation time:50 ns writting 5 to channel +simulation time:55 ns reading 5 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test10/test10.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test10/test10.cpp new file mode 100644 index 000000000..e28fd2a6f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test10/test10.cpp @@ -0,0 +1,145 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(sc_event_and_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(60, SC_NS); + return 0 ; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test11/golden/test11.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test11/golden/test11.log new file mode 100644 index 000000000..e48baf7c5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test11/golden/test11.log @@ -0,0 +1,22 @@ +SystemC Simulation +simulation time:0 s writting 0 to channel +simulation time:0 s reading 0 from channel +simulation time:5 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:25 ns reading 1 from channel +simulation time:40 ns writting 2 to channel +simulation time:45 ns reading 2 from channel +simulation time:60 ns writting 3 to channel +simulation time:70 ns reading 3 from channel +simulation time:80 ns writting 4 to channel +simulation time:90 ns reading 4 from channel +simulation time:100 ns writting 5 to channel +simulation time:110 ns reading 5 from channel +simulation time:120 ns writting 6 to channel +simulation time:135 ns reading 6 from channel +simulation time:140 ns writting 7 to channel +simulation time:155 ns reading 7 from channel +simulation time:160 ns writting 8 to channel +simulation time:175 ns reading 8 from channel +simulation time:180 ns writting 9 to channel +simulation time:195 ns reading 9 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test11/test11.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test11/test11.cpp new file mode 100644 index 000000000..e85090b16 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test11/test11.cpp @@ -0,0 +1,152 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test11.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::next_trigger(sc_event_or_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name), data(0) + { } + + //write to channel + void write(){ + static int i = 0; + next_trigger(20, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + else if(3 <= i & i < 6) { + write_event_1.notify(10, SC_NS); + } + else{ + write_event_2.notify(15, SC_NS); + } + + i++; + } + + //read from channel + void read( ){ + int j; + next_trigger(write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_METHOD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_METHOD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(200, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test12/golden/test12.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test12/golden/test12.log new file mode 100644 index 000000000..43e07ec75 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test12/golden/test12.log @@ -0,0 +1,19 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:30 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:40 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:60 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:70 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:80 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:90 ns reading 8 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test12/test12.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test12/test12.cpp new file mode 100644 index 000000000..6af1bbd22 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test12/test12.cpp @@ -0,0 +1,144 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test12.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(const sc_time&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + sc_time t1(10, SC_NS); + + while(1){ + wait(t1); + data = i; + cout<<"simulation time"<<":"< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test13/golden/test13.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test13/golden/test13.log new file mode 100644 index 000000000..b5b5202e5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test13/golden/test13.log @@ -0,0 +1,20 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:50 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:60 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:65 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:75 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:85 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:95 ns reading 8 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test13/test13.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test13/test13.cpp new file mode 100644 index 000000000..b26ceafc1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test13/test13.cpp @@ -0,0 +1,155 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test13.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_time&, sc_event&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + sc_time t(10, SC_NS); + + while(1){ + wait(t); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 5){ + write_event.notify(20, SC_NS); + } + else { + write_event.notify(5, SC_NS); + } + i++; + } + } + + //read from channel + void read( ){ + int j; + sc_time t1(10, SC_NS); + + while(1){ + wait(t1, write_event); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test14/golden/test14.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test14/golden/test14.log new file mode 100644 index 000000000..b5b5202e5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test14/golden/test14.log @@ -0,0 +1,20 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:50 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:60 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:65 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:75 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:85 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:95 ns reading 8 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test14/test14.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test14/test14.cpp new file mode 100644 index 000000000..e93ef3fa6 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test14/test14.cpp @@ -0,0 +1,154 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test14.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(double, sc_time_unit, sc_event&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + sc_time t(10, SC_NS); + + while(1){ + wait(t); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 5){ + write_event.notify(20, SC_NS); + } + else { + write_event.notify(5, SC_NS); + } + i++; + } + } + + //read from channel + void read( ){ + int j; + + while(1){ + wait(10, SC_NS, write_event); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test15/golden/test15.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test15/golden/test15.log new file mode 100644 index 000000000..9f6958921 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test15/golden/test15.log @@ -0,0 +1,24 @@ +SystemC Simulation +simulation time:10 ns writing 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writing 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writing 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writing 3 to channel +simulation time:50 ns writing 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:60 ns reading 4 from channel +simulation time:60 ns writing 5 to channel +simulation time:70 ns writing 6 to channel +simulation time:70 ns reading 6 from channel +simulation time:75 ns reading 6 from channel +simulation time:80 ns writing 7 to channel +simulation time:85 ns reading 7 from channel +simulation time:90 ns writing 8 to channel +simulation time:95 ns reading 8 from channel +simulation time:100 ns writing 9 to channel +simulation time:105 ns reading 9 from channel +simulation time:110 ns writing 10 to channel +simulation time:115 ns reading 10 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test15/test15.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test15/test15.cpp new file mode 100644 index 000000000..28781776d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test15/test15.cpp @@ -0,0 +1,156 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test15.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(double, sc_time_unit, sc_event_and_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writing "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_2.notify(5, SC_NS); + } + else{ + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + i++; + } + } + //read from channel + void read( ){ + int j; + + while(1){ + wait(10, SC_NS, write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test16/golden/test16.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test16/golden/test16.log new file mode 100644 index 000000000..2c73a9072 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test16/golden/test16.log @@ -0,0 +1,24 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:50 ns writting 4 to channel +simulation time:50 ns reading 4 from channel +simulation time:60 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:70 ns writting 6 to channel +simulation time:70 ns reading 6 from channel +simulation time:75 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:85 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:95 ns reading 8 from channel +simulation time:100 ns writting 9 to channel +simulation time:105 ns reading 9 from channel +simulation time:110 ns writting 10 to channel +simulation time:115 ns reading 10 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test16/test16.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test16/test16.cpp new file mode 100644 index 000000000..c82ec5d06 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test16/test16.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test16.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_time, sc_event_and_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_2.notify(5, SC_NS); + } + else{ + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + i++; + } + } + //read from channel + void read( ){ + int j; + sc_time t(10, SC_NS); + + while(1){ + wait(t, write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test17/golden/test17.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test17/golden/test17.log new file mode 100644 index 000000000..6d9eb24d9 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test17/golden/test17.log @@ -0,0 +1,25 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:45 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:55 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:65 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:75 ns reading 6 from channel +simulation time:76 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:86 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:96 ns reading 8 from channel +simulation time:100 ns writting 9 to channel +simulation time:106 ns reading 9 from channel +simulation time:110 ns writting 10 to channel +simulation time:116 ns reading 10 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test17/test17.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test17/test17.cpp new file mode 100644 index 000000000..3ed584ea6 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test17/test17.cpp @@ -0,0 +1,156 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test17.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(double, sc_time_unit, sc_event_or_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_1.notify(5, SC_NS); + } + else{ + write_event_2.notify(6, SC_NS); + } + i++; + } + } + + //read from channel + void read( ){ + int j; + + while(1){ + wait(10, SC_NS, write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test18/golden/test18.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test18/golden/test18.log new file mode 100644 index 000000000..6d9eb24d9 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test18/golden/test18.log @@ -0,0 +1,25 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:10 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:20 ns reading 1 from channel +simulation time:30 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:40 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:45 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:55 ns reading 4 from channel +simulation time:60 ns writting 5 to channel +simulation time:65 ns reading 5 from channel +simulation time:70 ns writting 6 to channel +simulation time:75 ns reading 6 from channel +simulation time:76 ns reading 6 from channel +simulation time:80 ns writting 7 to channel +simulation time:86 ns reading 7 from channel +simulation time:90 ns writting 8 to channel +simulation time:96 ns reading 8 from channel +simulation time:100 ns writting 9 to channel +simulation time:106 ns reading 9 from channel +simulation time:110 ns writting 10 to channel +simulation time:116 ns reading 10 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test18/test18.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test18/test18.cpp new file mode 100644 index 000000000..e57ce7097 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test18/test18.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test18.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_time, sc_event_or_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(20, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_1.notify(5, SC_NS); + } + else{ + write_event_2.notify(6, SC_NS); + } + i++; + } + } + + //read from channel + void read( ){ + int j; + sc_time t(10, SC_NS); + + while(1){ + wait(t, write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(120, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test19/golden/test19.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test19/golden/test19.log new file mode 100644 index 000000000..f1e6af3b0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test19/golden/test19.log @@ -0,0 +1,11 @@ +SystemC Simulation +simulation time:10 ns writting 0 to channel +simulation time:15 ns reading 0 from channel +simulation time:20 ns writting 1 to channel +simulation time:25 ns reading 1 from channel +simulation time:30 ns writting 2 to channel +simulation time:35 ns reading 2 from channel +simulation time:40 ns writting 3 to channel +simulation time:45 ns reading 3 from channel +simulation time:50 ns writting 4 to channel +simulation time:55 ns reading 4 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test19/test19.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test19/test19.cpp new file mode 100644 index 000000000..a0a6c4330 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test19/test19.cpp @@ -0,0 +1,149 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test19.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_event_and_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(10, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + write_event_2.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + i++; + } + } + + //read from channel + void read( ){ + int j; + + while(1){ + wait(write_event_1 & write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(60, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test20/golden/test20.log b/src/systemc/tests/systemc/communication/sc_prim_channel/test20/golden/test20.log new file mode 100644 index 000000000..2a867ec5a --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test20/golden/test20.log @@ -0,0 +1,19 @@ +SystemC Simulation +simulation time:20 ns writting 0 to channel +simulation time:25 ns reading 0 from channel +simulation time:40 ns writting 1 to channel +simulation time:45 ns reading 1 from channel +simulation time:60 ns writting 2 to channel +simulation time:65 ns reading 2 from channel +simulation time:80 ns writting 3 to channel +simulation time:90 ns reading 3 from channel +simulation time:100 ns writting 4 to channel +simulation time:110 ns reading 4 from channel +simulation time:120 ns writting 5 to channel +simulation time:130 ns reading 5 from channel +simulation time:140 ns writting 6 to channel +simulation time:155 ns reading 6 from channel +simulation time:160 ns writting 7 to channel +simulation time:175 ns reading 7 from channel +simulation time:180 ns writting 8 to channel +simulation time:195 ns reading 8 from channel diff --git a/src/systemc/tests/systemc/communication/sc_prim_channel/test20/test20.cpp b/src/systemc/tests/systemc/communication/sc_prim_channel/test20/test20.cpp new file mode 100644 index 000000000..a92b1a0e5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_prim_channel/test20/test20.cpp @@ -0,0 +1,156 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test20.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_prim_channel::wait(sc_event_or_list&) + +#include + +//write and read interfaces +class write_if : virtual public +sc_interface + { + public: + virtual void write() = 0; +}; + +class read_if : virtual public +sc_interface +{ + public: + virtual void read( ) = 0; +}; + +// channel implements write_if and read_if interfaces +class channel : + public sc_channel, + public write_if, + public read_if +{ + + public : + + //constructor + channel(sc_module_name name):sc_channel(name) , data(0) + { } + + //write to channel + void write(){ + int i = 0; + + while(1){ + wait(20, SC_NS); + data = i; + cout <<"simulation time" << ":" << sc_time_stamp()<<" "; + cout<<"writting "<< data <<" to channel" << endl; + + if(i < 3){ + write_event_1.notify(5, SC_NS); + write_event_1.notify(5, SC_NS); + } + else if(3 <= i && i < 6) { + write_event_1.notify(10, SC_NS); + } + else{ + write_event_2.notify(15, SC_NS); + } + i++; + } + } + //read from channel + void read( ){ + int j; + + while(1){ + wait(write_event_1 | write_event_2); + j = data; + cout <<"simulation time" << ":" << sc_time_stamp(); + cout<<" reading "< out; + + void write( ) + { + out->write(); + } + + SC_CTOR( mod_a ){ + + SC_THREAD(write); + } +}; + +//sink module +SC_MODULE(mod_b) +{ + sc_port input; + int i; + + void read( ) + { + input->read(); + } + + SC_CTOR( mod_b ){ + + SC_THREAD(read); + } +}; + + +int sc_main(int, char*[] ) +{ + channel a("a"); + mod_a modul_a("modul_a"); + mod_b modul_b("modul_b"); + modul_a.out(a); + modul_b.input(a); + + sc_start(200, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_semaphore/test01/golden/test01.log new file mode 100644 index 000000000..b498f9139 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test01/golden/test01.log @@ -0,0 +1,56 @@ +SystemC Simulation +1 ns proc_a - lock requested +1 ns proc_a - lock obtained +2 ns proc_b - lock requested +3 ns proc_a - unlock successful +3 ns proc_b - lock obtained +6 ns proc_a - trylock failed +6 ns proc_a - unlock successful +7 ns proc_b - unlock successful +7 ns proc_a - lock requested +7 ns proc_a - lock obtained +9 ns proc_a - unlock successful +10 ns proc_b - trylock successful +10 ns proc_b - unlock successful +12 ns proc_a - trylock successful +12 ns proc_a - unlock successful +12 ns proc_b - lock requested +12 ns proc_b - lock obtained +13 ns proc_a - lock requested +13 ns proc_a - lock obtained +15 ns proc_a - unlock successful +16 ns proc_b - unlock successful +18 ns proc_a - trylock successful +18 ns proc_a - unlock successful +19 ns proc_b - trylock successful +19 ns proc_b - unlock successful +19 ns proc_a - lock requested +19 ns proc_a - lock obtained +21 ns proc_b - lock requested +21 ns proc_b - lock obtained +21 ns proc_a - unlock successful +24 ns proc_a - trylock successful +24 ns proc_a - unlock successful +25 ns proc_b - unlock successful +25 ns proc_a - lock requested +25 ns proc_a - lock obtained +27 ns proc_a - unlock successful +28 ns proc_b - trylock successful +28 ns proc_b - unlock successful +30 ns proc_a - trylock successful +30 ns proc_a - unlock successful +30 ns proc_b - lock requested +30 ns proc_b - lock obtained +31 ns proc_a - lock requested +31 ns proc_a - lock obtained +33 ns proc_a - unlock successful +34 ns proc_b - unlock successful +36 ns proc_a - trylock successful +36 ns proc_a - unlock successful +37 ns proc_b - trylock successful +37 ns proc_b - unlock successful +37 ns proc_a - lock requested +37 ns proc_a - lock obtained +39 ns proc_b - lock requested +39 ns proc_b - lock obtained +39 ns proc_a - unlock successful diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test01/test01.cpp new file mode 100644 index 000000000..dd031f95c --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test01/test01.cpp @@ -0,0 +1,121 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_semaphore primitive channel -- mutex case + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_semaphore semaphore; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_a() + { + while( true ) { + wait( 1, SC_NS ); + write( "proc_a - lock requested" ); + semaphore.wait(); + write( "proc_a - lock obtained" ); + wait( 2, SC_NS ); + if( semaphore.post() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + wait( 3, SC_NS ); + if( semaphore.trywait() == 0 ) { + write( "proc_a - trylock successful" ); + } else { + write( "proc_a - trylock failed" ); + } + if( semaphore.post() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + } + } + + void proc_b() + { + while( true ) { + wait( 2, SC_NS ); + write( "proc_b - lock requested" ); + semaphore.wait(); + write( "proc_b - lock obtained" ); + wait( 4, SC_NS ); + if( semaphore.post() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + wait( 3, SC_NS ); + if( semaphore.trywait() == 0 ) { + write( "proc_b - trylock successful" ); + } else { + write( "proc_b - trylock failed" ); + } + if( semaphore.post() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + } + } + + SC_CTOR( mod_a ) + : semaphore( 1 ) + { + SC_THREAD( proc_a ); + SC_THREAD( proc_b ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start( 40, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_semaphore/test02/golden/test02.log new file mode 100644 index 000000000..b498f9139 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test02/golden/test02.log @@ -0,0 +1,56 @@ +SystemC Simulation +1 ns proc_a - lock requested +1 ns proc_a - lock obtained +2 ns proc_b - lock requested +3 ns proc_a - unlock successful +3 ns proc_b - lock obtained +6 ns proc_a - trylock failed +6 ns proc_a - unlock successful +7 ns proc_b - unlock successful +7 ns proc_a - lock requested +7 ns proc_a - lock obtained +9 ns proc_a - unlock successful +10 ns proc_b - trylock successful +10 ns proc_b - unlock successful +12 ns proc_a - trylock successful +12 ns proc_a - unlock successful +12 ns proc_b - lock requested +12 ns proc_b - lock obtained +13 ns proc_a - lock requested +13 ns proc_a - lock obtained +15 ns proc_a - unlock successful +16 ns proc_b - unlock successful +18 ns proc_a - trylock successful +18 ns proc_a - unlock successful +19 ns proc_b - trylock successful +19 ns proc_b - unlock successful +19 ns proc_a - lock requested +19 ns proc_a - lock obtained +21 ns proc_b - lock requested +21 ns proc_b - lock obtained +21 ns proc_a - unlock successful +24 ns proc_a - trylock successful +24 ns proc_a - unlock successful +25 ns proc_b - unlock successful +25 ns proc_a - lock requested +25 ns proc_a - lock obtained +27 ns proc_a - unlock successful +28 ns proc_b - trylock successful +28 ns proc_b - unlock successful +30 ns proc_a - trylock successful +30 ns proc_a - unlock successful +30 ns proc_b - lock requested +30 ns proc_b - lock obtained +31 ns proc_a - lock requested +31 ns proc_a - lock obtained +33 ns proc_a - unlock successful +34 ns proc_b - unlock successful +36 ns proc_a - trylock successful +36 ns proc_a - unlock successful +37 ns proc_b - trylock successful +37 ns proc_b - unlock successful +37 ns proc_a - lock requested +37 ns proc_a - lock obtained +39 ns proc_b - lock requested +39 ns proc_b - lock obtained +39 ns proc_a - unlock successful diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test02/test02.cpp new file mode 100644 index 000000000..3ca52a36d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test02/test02.cpp @@ -0,0 +1,139 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_semaphore_if interface -- mutex case + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_port semaphore; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_a() + { + while( true ) { + wait( 1, SC_NS ); + write( "proc_a - lock requested" ); + semaphore->wait(); + write( "proc_a - lock obtained" ); + wait( 2, SC_NS ); + if( semaphore->post() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + wait( 3, SC_NS ); + if( semaphore->trywait() == 0 ) { + write( "proc_a - trylock successful" ); + } else { + write( "proc_a - trylock failed" ); + } + if( semaphore->post() == 0 ) { + write( "proc_a - unlock successful" ); + } else { + write( "proc_a - unlock failed" ); + } + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( proc_a ); + } +}; + +SC_MODULE( mod_b ) +{ + sc_port semaphore; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void proc_b() + { + while( true ) { + wait( 2, SC_NS ); + write( "proc_b - lock requested" ); + semaphore->wait(); + write( "proc_b - lock obtained" ); + wait( 4, SC_NS ); + if( semaphore->post() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + wait( 3, SC_NS ); + if( semaphore->trywait() == 0 ) { + write( "proc_b - trylock successful" ); + } else { + write( "proc_b - trylock failed" ); + } + if( semaphore->post() == 0 ) { + write( "proc_b - unlock successful" ); + } else { + write( "proc_b - unlock failed" ); + } + } + } + + SC_CTOR( mod_b ) + { + SC_THREAD( proc_b ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + mod_b b( "b" ); + sc_semaphore semaphore( "semaphore", 1 ); + + a.semaphore( semaphore ); + b.semaphore( semaphore ); + + sc_start( 40, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_semaphore/test03/golden/test03.log new file mode 100644 index 000000000..784723471 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/golden/test03.log @@ -0,0 +1,19 @@ +SystemC Simulation +time 0.000000 => thread1 : took semaphore 1 times +time 0.000000 => thread1 : took semaphore 2 times +time 0.000000 => thread1 : took semaphore 3 times +time 0.000000 => thread1 : took semaphore 4 times +time 0.000000 => thread1 : took semaphore 5 times +time 10.000000 => thread2 : posted semaphore 1 +time 10.000000 => thread1 : took semaphore 6 times +time 30.000000 => thread2 : posted semaphore 1 +time 30.000000 => thread1 : took semaphore 7 times +time 50.000000 => thread2 : posted semaphore 1 +time 50.000000 => thread1 : took semaphore 8 times +time 70.000000 => thread2 : posted semaphore 1 +time 70.000000 => thread1 : took semaphore 9 times +time 90.000000 => thread2 : posted semaphore 1 +time 90.000000 => thread1 : took semaphore 10 times +time 90.000000 => thread1 : value of semaphore = 0 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/main.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test03/main.cpp new file mode 100644 index 000000000..c02d1ae8b --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/main.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test_sem.h" + +int sc_main (int argc , char *argv[]) +{ + sc_clock clock1("clock1",10,SC_PS); + + TestSem my_block("test_sem"); + + my_block.clk(clock1); + + sc_start(3000, SC_PS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/test03.f b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test03.f new file mode 100644 index 000000000..cd4b09961 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test03.f @@ -0,0 +1,2 @@ +test03/test_sem.cpp +test03/main.cpp diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.cpp new file mode 100644 index 000000000..9c7e12eca --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test_sem.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test_sem.h" + +TestSem::TestSem( sc_module_name ) + :sem_1(5) +{ + SC_THREAD(body_1); + sensitive << clk.pos(); + SC_THREAD(body_2); + sensitive << clk.pos(); +} + +void TestSem::body_1() +{ + unsigned int loop_counter=0; + char buf[BUFSIZ]; + + while (loop_counter++<10 && !sem_1.wait()) + { + sprintf(buf, "time %f => thread1 : took semaphore %d times\n", + sc_time_stamp().to_double(), loop_counter); + cout << buf << flush; +} + + sprintf(buf, "time %f => thread1 : value of semaphore = %d\n", + sc_time_stamp().to_double(), sem_1.get_value()); + cout << buf << flush; + + sc_stop(); +} + +void TestSem::body_2() +{ + unsigned int loop_counter=0; + char buf[BUFSIZ]; + + do + { + wait(2); + sem_1.post(); + sprintf(buf, "time %f => thread2 : posted semaphore 1\n", + sc_time_stamp().to_double()); + cout << buf << flush; + } + while (loop_counter++ < 5); + + wait(100); +} diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.h b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.h new file mode 100644 index 000000000..4adb00524 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test03/test_sem.h @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test_sem.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef TESTSEM_H +#define TESTSEM_H + +#include + +SC_MODULE(TestSem) +{ + sc_in_clk clk; + + SC_CTOR(TestSem); + + void body_1(); + void body_2(); + +private: + + sc_semaphore sem_1; +}; + + +#endif diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_semaphore/test04/golden/test04.log new file mode 100644 index 000000000..5ae06a29f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test04/golden/test04.log @@ -0,0 +1,2 @@ +SystemC Simulation +sc_semaphore diff --git a/src/systemc/tests/systemc/communication/sc_semaphore/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_semaphore/test04/test04.cpp new file mode 100644 index 000000000..7cd1dd2e5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_semaphore/test04/test04.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_semaphore::kind() + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_semaphore semaphore; + + SC_CTOR( mod_a ) + : semaphore( 1 ) + { } +}; + + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + cout< cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test01/test01.cpp new file mode 100644 index 000000000..c6d3c8cc8 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test01/test01.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +// #define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_int; + sc_out out_bool; + sc_out out_logic; + sc_out out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + out_int = 0; + out_bool = false; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_int; + sc_signal sig_bool; + sc_signal sig_logic; + sc_buffer buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk,sig_int,sig_bool,sig_logic,buf_int,sig_resolved,sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/golden/test02.log new file mode 100644 index 000000000..95d2bcaa2 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/golden/test02.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/test02.cpp new file mode 100644 index 000000000..ec1d30ed2 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test02/test02.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_int; + sc_out out_bool; + sc_out out_logic; + sc_out out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + out_int = 0; + out_bool = false; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_int; + sc_signal sig_bool; + sc_signal sig_logic; + sc_buffer buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/golden/test03.log new file mode 100644 index 000000000..5be096a49 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/golden/test03.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `sig_int' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/test03.cpp new file mode 100644 index 000000000..553014ff8 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test03/test03.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_int; + sc_out out_bool; + sc_out out_logic; + sc_out out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + out_int = 0; + out_bool = false; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_int("sig_int"); + sc_signal sig_bool("sig_bool"); + sc_signal sig_logic("sig_logic"); + sc_buffer buf_int("buf_int"); + sc_signal_resolved sig_resolved("sig_resolved"); + sc_signal_rv<1> sig_rv1("sig_rv1"); + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/golden/test04.log new file mode 100644 index 000000000..7efe9540e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/golden/test04.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `signal_2' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/test04.cpp new file mode 100644 index 000000000..af7d991aa --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test04/test04.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_int; + sc_out out_bool; + sc_out out_logic; + sc_out out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + // out_int = 0; + // out_bool = false; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_int; + sc_signal sig_bool; + sc_signal sig_logic; + sc_buffer buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/golden/test05.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/golden/test05.log new file mode 100644 index 000000000..1e2e6730e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/golden/test05.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `buffer_0' (sc_buffer) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/test05.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/test05.cpp new file mode 100644 index 000000000..482de1c2e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test05/test05.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_int; + sc_out out_bool; + sc_out out_logic; + sc_out out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + // out_int = 0; + // out_bool = false; + // out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_int; + sc_signal sig_bool; + sc_signal sig_logic; + sc_buffer buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/golden/test06.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/golden/test06.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/golden/test06.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/test06.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/test06.cpp new file mode 100644 index 000000000..ee6ff58ee --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test06/test06.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_int; + sc_out out_bool; + sc_out out_logic; + sc_out out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_bool = true; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + // out_int = 0; + // out_bool = false; + // out_logic = SC_LOGIC_0; + // out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_int; + sc_signal sig_bool; + sc_signal sig_logic; + sc_buffer buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/golden/test07.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/golden/test07.log new file mode 100644 index 000000000..fa5aabca2 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/golden/test07.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `signal_1' (sc_signal) + first driver `a.main_action1' (sc_method_process) + second driver `a.main_action2' (sc_method_process) +In file: +In process: a.main_action2 @ 500 ps diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/test07.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/test07.cpp new file mode 100644 index 000000000..89a9d6566 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test07/test07.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + Description of Modification: + + *****************************************************************************/ + +// test of dynamic design rule checking in specialized signals. + +#define DEBUG_SYSTEMC +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_int; + sc_out > out_uint; + sc_out out_logic; + sc_out out_int2; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action1() + { + out_int = 42; + out_uint = 1; + out_logic = SC_LOGIC_1; + out_int2 = 1; + out_resolved = SC_LOGIC_1; + out_rv1 = sc_lv<1>( SC_LOGIC_1 ); + } + + void main_action2() + { + // out_int = 0; + out_uint = 0; + out_logic = SC_LOGIC_0; + out_int2 = 0; + out_resolved = SC_LOGIC_0; + out_rv1 = sc_lv<1>( SC_LOGIC_0 ); + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action1 ); + sensitive << clk.pos(); + dont_initialize(); + SC_METHOD( main_action2 ); + sensitive << clk.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_int; + sc_signal > sig_bool; + sc_signal sig_logic; + sc_buffer buf_int; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a("a"); + a(clk, sig_int, sig_bool, sig_logic, buf_int, sig_resolved, sig_rv1); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/golden/test08.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/golden/test08.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/golden/test08.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/test08.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/test08.cpp new file mode 100644 index 000000000..52f3f54ad --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test08/test08.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- Test detection of two write ports connected to one signal + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef int target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_target; + sc_out out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/golden/test09.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/golden/test09.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/golden/test09.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/test09.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/test09.cpp new file mode 100644 index 000000000..daf15072d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test09/test09.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef sc_bigint<5> target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_target; + sc_out out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/golden/test10.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/golden/test10.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/golden/test10.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/test10.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/test10.cpp new file mode 100644 index 000000000..7844e1307 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test10/test10.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef sc_biguint<5> target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_target; + sc_out out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/golden/test11.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/golden/test11.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/golden/test11.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/test11.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/test11.cpp new file mode 100644 index 000000000..aa3bafa85 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test11/test11.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- Test detection of two write ports connected to 1 signal. + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef sc_int<5> target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_target; + sc_out out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/golden/test12.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/golden/test12.log new file mode 100644 index 000000000..2d63f201f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/golden/test12.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `signal_0' (sc_signal) + first driver `a.port_2' (sc_out) + second driver `a.port_1' (sc_out) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/test12.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/test12.cpp new file mode 100644 index 000000000..dd638238e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test12/test12.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- Test detection of two write ports connected to 1 signal. + + Original Author: Andy Goodrich, Forte Design Systems, 15 Oct 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test register port for more than one writer + +#define DEBUG_SYSTEMC +#include "systemc.h" +typedef sc_uint<5> target; + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_out out_target; + sc_out out_target2; + + SC_CTOR( mod_a ) + { + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_target; + + mod_a a("a"); + a(clk, sig_target, sig_target); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/golden/test13.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/golden/test13.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/golden/test13.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/test13.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/test13.cpp new file mode 100644 index 000000000..93c3b2124 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test13/test13.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test13.cpp -- Test detection of write from process and sc_main. + + Original Author: Andy Goodrich, Forte Design Systems, 02 Apr 2007 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(thread,m_clk.pos()); + } + void thread() + { + m_data = false; + for (;;) + { + wait(); + } + } + sc_in m_clk; + sc_out m_data; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + sc_signal data; + DUT dut("dut"); + + dut.m_clk(clock); + dut.m_data(data); + + sc_start(1, SC_NS); + data = true; + sc_start(1, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/golden/test14.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/golden/test14.log new file mode 100644 index 000000000..f9660d5a8 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/golden/test14.log @@ -0,0 +1,8 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_thread_process) + second driver `dut.p1' (sc_thread_process) +In file: +In process: dut.p1 @ 10 ns diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/test14.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/test14.cpp new file mode 100644 index 000000000..aa1ffbc6f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test14/test14.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test14.cpp -- sc_writer_policy: writer check with terminated writer + + Original Author: Philipp A. Hartmann, OFFIS, 2014-11-15 + + *****************************************************************************/ + +// see https://github.com/OSCI-WG/systemc/issues/104 + +#include + +using sc_core::SC_NS; + +SC_MODULE(dut) +{ + sc_core::sc_signal sig; + + SC_CTOR(dut) + : sig("sig") + { + SC_THREAD(p1); + SC_THREAD(p2); + } + + void p1() { + wait( 10, SC_NS ); + sig.write(1); + } + + void p2() { + wait( 1, SC_NS ); + sig.write(0); + } +}; + +int sc_main( int, char*[] ) +{ + dut top("dut"); + sc_core::sc_start(); + std::cout << "Program completed" << std::endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/golden/test15.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/golden/test15.log new file mode 100644 index 000000000..0a9ea351f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/golden/test15.log @@ -0,0 +1,167 @@ +SystemC Simulation + +*** trigger each driver in individual delta cycles + dut.p1: 1 ns @ 1: writing dut.sig = 1 + dut.run: 1 ns @ 2: reading dut.sig = 1 + dut.p2: 1 ns @ 2: writing dut.sig = 2 + dut.run: 1 ns @ 3: reading dut.sig = 2 + dut.p3: 1 ns @ 3: writing dut.sig = 3 + dut.run: 1 ns @ 4: reading dut.sig = 3 + dut.p4: 1 ns @ 4: writing dut.sig = 1 + dut.run: 1 ns @ 5: reading dut.sig = 1 + +*** trigger 1-2-3 in the same delta cycle + dut.p1: 2 ns @ 6: writing dut.sig = 1 + dut.p2: 2 ns @ 6: writing dut.sig = 2 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 6 +In file: +In process: dut.p2 @ 2 ns + + dut.p3: 2 ns @ 6: writing dut.sig = 3 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 6 +In file: +In process: dut.p3 @ 2 ns + + dut.run: 2 ns @ 7: reading dut.sig = 1 + +*** trigger 2-3-1 in the same delta cycle + dut.p2: 3 ns @ 8: writing dut.sig = 2 + dut.p3: 3 ns @ 8: writing dut.sig = 3 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 8 +In file: +In process: dut.p3 @ 3 ns + + dut.p1: 3 ns @ 8: writing dut.sig = 1 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 8 +In file: +In process: dut.p1 @ 3 ns + + dut.run: 3 ns @ 9: reading dut.sig = 2 + +*** trigger 3-1-2 in the same delta cycle + dut.p3: 4 ns @ 10: writing dut.sig = 3 + dut.p1: 4 ns @ 10: writing dut.sig = 1 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p3' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 10 +In file: +In process: dut.p1 @ 4 ns + + dut.p2: 4 ns @ 10: writing dut.sig = 2 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p3' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 10 +In file: +In process: dut.p2 @ 4 ns + + dut.run: 4 ns @ 11: reading dut.sig = 3 + +*** trigger 1-2-1-2 in the same delta cycle + dut.p1: 5 ns @ 12: writing dut.sig = 1 + dut.p2: 5 ns @ 12: writing dut.sig = 2 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 12 +In file: +In process: dut.p2 @ 5 ns + + dut.p1: 5 ns @ 12: writing dut.sig = 1 + dut.p2: 5 ns @ 12: writing dut.sig = 2 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 12 +In file: +In process: dut.p2 @ 5 ns + + dut.run: 5 ns @ 13: reading dut.sig = 1 + +*** trigger 2-1 in the same delta cycle + dut.p2: 6 ns @ 14: writing dut.sig = 2 + dut.p1: 6 ns @ 14: writing dut.sig = 1 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 14 +In file: +In process: dut.p1 @ 6 ns + + dut.run: 6 ns @ 15: reading dut.sig = 2 + +*** trigger 1-3 in the same delta cycle + dut.p1: 7 ns @ 16: writing dut.sig = 1 + dut.p3: 7 ns @ 16: writing dut.sig = 3 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 16 +In file: +In process: dut.p3 @ 7 ns + + dut.run: 7 ns @ 17: reading dut.sig = 1 + +*** trigger 1-4-1 in the same delta cycle + dut.p1: 8 ns @ 18: writing dut.sig = 1 + dut.p4: 8 ns @ 18: writing dut.sig = 1 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p4' (sc_method_process) + conflicting write in delta cycle 18 +In file: +In process: dut.p4 @ 8 ns + + dut.p1: 8 ns @ 18: writing dut.sig = 1 + dut.run: 8 ns @ 19: reading dut.sig = 1 + +*** trigger 4-1 in the same delta cycle + dut.p4: 9 ns @ 20: writing dut.sig = 1 + dut.p1: 9 ns @ 20: writing dut.sig = 1 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p4' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 20 +In file: +In process: dut.p1 @ 9 ns + + dut.run: 9 ns @ 21: reading dut.sig = 1 + +Program completed diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/test15.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/test15.cpp new file mode 100644 index 000000000..1719abe87 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test15/test15.cpp @@ -0,0 +1,175 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test15.cpp -- sc_writer_policy: check conflicts within an evaluation phase + + Original Author: Philipp A. Hartmann, Intel, 2017-05-12 + + *****************************************************************************/ + +// see https://github.com/OSCI-WG/systemc/issues/222 + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include +#include +#include + +using sc_core::SC_NS; +using sc_core::SC_ZERO_TIME; + +SC_MODULE(dut) +{ + static const int num_drivers = 4; + + SC_CTOR(dut) + : sig("sig") + { + SC_THREAD(run); + for(int id=1; id <= num_drivers; ++id) { + // first and last driver write the same values + spawn_driver( id, (id-1) % (num_drivers-1) + 1 ); + } + } + +private: + void spawn_driver(int id, int value) { + sc_assert( id > 0 && id <= num_drivers ); + sc_core::sc_spawn_options sp; + sp.set_sensitivity(&ev[id-1]); + sp.spawn_method(); + sp.dont_initialize(); + + std::stringstream nm; + nm << "p" << id; + sc_spawn( sc_bind(&dut::driver, this, value), nm.str().c_str(), &sp ); + } + + void run() { + wait(1, SC_NS); + + std::cout << "\n*** trigger each driver in individual delta cycles" << std::endl; + for(int id=1; id <= num_drivers; ++id) { + trigger(id); + wait(SC_ZERO_TIME); + log(); + } + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-2-3 in the same delta cycle" << std::endl; + trigger(1); + trigger(2); // error expected + trigger(3); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 2-3-1 in the same delta cycle" << std::endl; + trigger(2); + trigger(3); // error expected + trigger(1); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 3-1-2 in the same delta cycle" << std::endl; + trigger(3); + trigger(1); // error expected + trigger(2); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-2-1-2 in the same delta cycle" << std::endl; + trigger(1); + trigger(2); // error expected + trigger(1); // NO error expected (original process) + trigger(2); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 2-1 in the same delta cycle" << std::endl; + trigger(2); + trigger(1); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-3 in the same delta cycle" << std::endl; + trigger(1); + trigger(3); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-4-1 in the same delta cycle" << std::endl; + trigger(1); + trigger(4); // error expected? (same value) + trigger(1); // NO error expected (original process) + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 4-1 in the same delta cycle" << std::endl; + trigger(4); + trigger(1); // error expected? (same value) + wait(SC_ZERO_TIME); + log(); + } + + void trigger(int id) { + sc_assert( id > 0 && id <= num_drivers ); + ev[id-1].notify(); + wait(ev_schedule); + } + + void driver(int value) { + log(value); + try { + sig.write(value); + } catch (const sc_core::sc_report& msg ) { + std::cout << "\n" << msg.what() << "\n" << std::endl; + } + ev_schedule.notify(); + } + + void log(int value = -1) { + std::cout + << std::setw(8) << sc_core::sc_get_current_process_handle().name() << ": " + << std::setw(5) << sc_core::sc_time_stamp() + << " @ " << std::setw(2) << sc_core::sc_delta_count() << ": " + << ( (value!=-1) ? "writing " : "reading " ) + << sig.name() << " = " + << ( (value!=-1) ? value : sig.read() ) + << std::endl; + } + + sc_core::sc_signal sig; + sc_core::sc_event ev_schedule, ev[num_drivers]; +}; + +int sc_main( int, char*[] ) +{ + dut top("dut"); + sc_core::sc_start(); + std::cout << "\nProgram completed" << std::endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/golden/test16.log b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/golden/test16.log new file mode 100644 index 000000000..248e4b616 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/golden/test16.log @@ -0,0 +1,115 @@ +SystemC Simulation + +*** trigger each driver in individual delta cycles + + dut.p1: 1 ns @ 1: writing dut.sig = 1 + + dut.run: 1 ns @ 2: reading dut.sig = 1 + + dut.p2: 1 ns @ 2: writing dut.sig = 2 + + dut.run: 1 ns @ 3: reading dut.sig = 2 + + dut.p3: 1 ns @ 3: writing dut.sig = 1 + + dut.run: 1 ns @ 4: reading dut.sig = 1 + +*** trigger 1-2-3 in the same delta cycle + + dut.p1: 2 ns @ 5: writing dut.sig = 1 + + dut.p2: 2 ns @ 5: writing dut.sig = 2 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 5 +In file: +In process: dut.p2 @ 2 ns + + dut.p3: 2 ns @ 5: writing dut.sig = 1 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 5 +In file: +In process: dut.p3 @ 2 ns + + dut.run: 2 ns @ 6: reading dut.sig = 1 + +*** trigger 2-3-1 in the same delta cycle + + dut.p2: 3 ns @ 7: writing dut.sig = 2 + + dut.p3: 3 ns @ 7: writing dut.sig = 1 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p2' (sc_method_process) + second driver `dut.p3' (sc_method_process) + conflicting write in delta cycle 7 +In file: +In process: dut.p3 @ 3 ns + + dut.p1: 3 ns @ 7: writing dut.sig = 1 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p3' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 7 +In file: +In process: dut.p1 @ 3 ns + + dut.run: 3 ns @ 8: reading dut.sig = 1 + +*** trigger 3-1-2 in the same delta cycle + + dut.p3: 4 ns @ 9: writing dut.sig = 1 + + dut.p1: 4 ns @ 9: writing dut.sig = 1 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p3' (sc_method_process) + second driver `dut.p1' (sc_method_process) + conflicting write in delta cycle 9 +In file: +In process: dut.p1 @ 4 ns + + dut.p2: 4 ns @ 9: writing dut.sig = 2 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 9 +In file: +In process: dut.p2 @ 4 ns + + dut.run: 4 ns @ 10: reading dut.sig = 2 + +*** trigger 1-1-2-2 in the same delta cycle + + dut.p1: 5 ns @ 11: writing dut.sig = 1 + + dut.p1: 5 ns @ 11: writing dut.sig = 1 + + dut.p2: 5 ns @ 11: writing dut.sig = 2 + +Error: (E115) sc_signal cannot have more than one driver: + signal `dut.sig' (sc_signal) + first driver `dut.p1' (sc_method_process) + second driver `dut.p2' (sc_method_process) + conflicting write in delta cycle 11 +In file: +In process: dut.p2 @ 5 ns + + dut.p2: 5 ns @ 11: writing dut.sig = 2 + + dut.run: 5 ns @ 12: reading dut.sig = 2 + +Program completed diff --git a/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/test16.cpp b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/test16.cpp new file mode 100644 index 000000000..a295b6540 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/check_writer/test16/test16.cpp @@ -0,0 +1,158 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test16.cpp -- sc_writer_policy: test SC_SIGNAL_WRITE_CHECK=CONFLICT + + Original Author: Philipp A. Hartmann, Intel, 2017-05-12 + + *****************************************************************************/ + +// see https://github.com/OSCI-WG/systemc/issues/222 + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include +#include +#include + +using sc_core::SC_NS; +using sc_core::SC_ZERO_TIME; + +SC_MODULE(dut) +{ + static const int num_drivers = 3; + + SC_CTOR(dut) + : sig("sig") + { + SC_THREAD(run); + for(int id=1; id <= num_drivers; ++id) { + // first and last driver write the same values + spawn_driver( id, (id-1) % (num_drivers-1) + 1 ); + } + } + +private: + void spawn_driver(int id, int value) { + sc_assert( id > 0 && id <= num_drivers ); + sc_core::sc_spawn_options sp; + sp.set_sensitivity(&ev[id-1]); + sp.spawn_method(); + sp.dont_initialize(); + + std::stringstream nm; + nm << "p" << id; + sc_spawn( sc_bind(&dut::driver, this, value), nm.str().c_str(), &sp ); + } + + void run() { + wait(1, SC_NS); + + std::cout << "\n*** trigger each driver in individual delta cycles" << std::endl; + for(int id=1; id <= num_drivers; ++id) { + trigger(id); // NO error expected (environment override) + wait(SC_ZERO_TIME); + log(); + } + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-2-3 in the same delta cycle" << std::endl; + trigger(1); + trigger(2); // error expected + trigger(3); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 2-3-1 in the same delta cycle" << std::endl; + trigger(2); + trigger(3); // error expected + trigger(1); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 3-1-2 in the same delta cycle" << std::endl; + trigger(3); + trigger(1); // error expected + trigger(2); // error expected + wait(SC_ZERO_TIME); + log(); + + wait(1, SC_NS); + std::cout << "\n*** trigger 1-1-2-2 in the same delta cycle" << std::endl; + trigger(1); + trigger(1); // NO error expected (current process) + trigger(2); // error expected + trigger(2); // NO error expected (current process) + wait(SC_ZERO_TIME); + log(); + } + + void trigger(int id) { + sc_assert( id > 0 && id <= num_drivers ); + ev[id-1].notify(); + wait(ev_schedule); + } + + void driver(int value) { + log(value); + sig.write(value); // errors suppressed via report handler below + ev_schedule.notify(); + } + + void log(int value = -1) { + std::cout + << "\n" + << std::setw(8) << sc_core::sc_get_current_process_handle().name() << ": " + << std::setw(5) << sc_core::sc_time_stamp() + << " @ " << std::setw(2) << sc_core::sc_delta_count() << ": " + << ( (value!=-1) ? "writing " : "reading " ) + << sig.name() << " = " + << ( (value!=-1) ? value : sig.read() ) + << std::endl; + } + + sc_core::sc_signal sig; // use single-writer signal + sc_core::sc_event ev_schedule, ev[num_drivers]; +}; + +#ifdef _WIN32 +#define putenv _putenv // Windows deprecates putenv +#endif + +int sc_main( int, char*[] ) +{ + // prepare environment variable (takes a char*) + putenv(const_cast("SC_SIGNAL_WRITE_CHECK=CONFLICT")); + // and reset simulation context to pick it up (non-standard) + sc_core::sc_get_curr_simcontext()->reset(); + + // report multiple writer errors as warnings + sc_core::sc_report_handler::set_actions( + sc_core::SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_ + , sc_core::SC_DEFAULT_WARNING_ACTIONS + ); + + dut top("dut"); + sc_core::sc_start(); + std::cout << "\nProgram completed" << std::endl; + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/constructors/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal/constructors/golden/test01.log new file mode 100644 index 000000000..ddbc3ca3d --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/constructors/golden/test01.log @@ -0,0 +1,13 @@ +SystemC Simulation +signal_0 = 0 +sig2 = 0 +sig3 = 42 + +signal_1 = 0 +sig2 = 0 +sig3 = 1 + +signal_2 = X +sig2 = X +sig3 = 0 + diff --git a/src/systemc/tests/systemc/communication/sc_signal/constructors/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal/constructors/test01.cpp new file mode 100644 index 000000000..d8ee215b5 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/constructors/test01.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// constructors + +#include "systemc.h" + +template +void +test_constructors( T const & val = T() ) +{ + sc_signal sig1; + sc_signal sig2( "sig2" ); + sc_signal sig3( "sig3", val ); + + cout << sig1.name() << " = " << sig1.read() << endl; + cout << sig2.name() << " = " << sig2.read() << endl; + cout << sig3.name() << " = " << sig3.read() << endl; + cout << endl; +} + +int +sc_main( int, char*[] ) +{ + test_constructors( 42 ); + + // bool specialization + test_constructors( true ); + + // sc_logic specialization + test_constructors( SC_LOGIC_0 ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/golden/test01.log new file mode 100644 index 000000000..8e6c47049 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/golden/test01.log @@ -0,0 +1,2 @@ +SystemC Simulation +123 diff --git a/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/test01.cpp new file mode 100644 index 000000000..a6c5657d1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test01/test01.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of signals with user-defined datatypes +// -- operator =, operator ==, and operator << must be defined +// -- sc_trace() does not have to be defined (unless used) +// -- here, sc_trace() is not defined and not used + +#include "systemc.h" + +class my_datatype +{ +public: + my_datatype() + : m_val( 0 ) {} + my_datatype( int val_ ) + : m_val( val_ ) {} + my_datatype( const my_datatype& a ) + : m_val( a.m_val ) {} + ~my_datatype() + {} + my_datatype& operator = ( const my_datatype& a ) + { m_val = a.m_val; return *this; } + friend bool operator == ( const my_datatype& a, const my_datatype& b ) + { return ( a.m_val == b.m_val ); } + void print( ostream& os ) const + { os << m_val; } +private: + int m_val; +}; + +ostream& +operator << ( ostream& os, const my_datatype& a ) +{ + a.print( os ); + return os; +} + +int +sc_main( int, char*[] ) +{ + my_datatype a( 123 ); + a.print( cout ); + cout << endl; + + sc_signal sig; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/golden/test02.log new file mode 100644 index 000000000..597bc2ef1 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/golden/test02.log @@ -0,0 +1,12 @@ +SystemC Simulation +123 +10 +9 +8 +7 +6 +5 +4 +3 +2 +1 diff --git a/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/test02.cpp new file mode 100644 index 000000000..474aa3e79 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/datatypes/test02/test02.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of signals with user-defined datatypes +// -- operator =, operator ==, and operator << must be defined +// -- sc_trace() does not have to be defined (unless used) +// -- here, sc_trace() is defined and used + +#include "systemc.h" + +class my_datatype +{ +public: + my_datatype() + : m_val( 0 ) {} + my_datatype( int val_ ) + : m_val( val_ ) {} + my_datatype( const my_datatype& a ) + : m_val( a.m_val ) {} + ~my_datatype() + {} + my_datatype& operator = ( const my_datatype& a ) + { m_val = a.m_val; return *this; } + friend bool operator == ( const my_datatype& a, const my_datatype& b ) + { return ( a.m_val == b.m_val ); } + friend void sc_trace( sc_trace_file* tf, const my_datatype& a, + const std::string& name ) + { sc_core::sc_trace( tf, a.m_val, name ); } + void print( ostream& os ) const + { os << m_val; } +private: + int m_val; +}; + +ostream& +operator << ( ostream& os, const my_datatype& a ) +{ + a.print( os ); + return os; +} + +int +sc_main( int, char*[] ) +{ + my_datatype a( 123 ); + a.print( cout ); + cout << endl; + + sc_signal sig; + + sc_trace_file* tf = sc_create_vcd_trace_file( "test02" ); + sc_trace( tf, sig, "sig" ); + for( int i = 0; i < 10; ++ i ) { + sig = my_datatype( 10 - i ); + sc_start( 1, SC_NS ); + cout << sig.read() << endl; + } + sc_close_vcd_trace_file( tf ); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/golden/test01.log new file mode 100644 index 000000000..1b061bb5f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/golden/test01.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `t1.signal_0' (sc_signal) + first driver `t1.w2.port_0' (sc_out) + second driver `t1.w1.port_0' (sc_out) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test.h b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test.h new file mode 100644 index 000000000..77f579f41 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() + +#ifndef TEST_H +#define TEST_H + +#include "systemc.h" + +template +class writer +: public sc_module +{ +public: + + // output port + sc_out out; + + // constructor + writer( sc_module_name ) + {} +}; + +template +class top +: public sc_module +{ +public: + + // channel + sc_signal sig; + + // modules + writer w1; + writer w2; + + // constructor + top( sc_module_name ) + : sig(), w1( "w1" ), w2( "w2" ) + { + w1.out( sig ); + w2.out( sig ); + } +}; + +#endif + +// Taf! diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test01.cpp new file mode 100644 index 000000000..3e343bf86 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test01/test01.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() -- T + +#include "test.h" + +int +sc_main( int, char*[] ) +{ + top t1( "t1" ); + + sc_start(0, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/golden/test02.log new file mode 100644 index 000000000..1b061bb5f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/golden/test02.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `t1.signal_0' (sc_signal) + first driver `t1.w2.port_0' (sc_out) + second driver `t1.w1.port_0' (sc_out) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test.h b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test.h new file mode 100644 index 000000000..77f579f41 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() + +#ifndef TEST_H +#define TEST_H + +#include "systemc.h" + +template +class writer +: public sc_module +{ +public: + + // output port + sc_out out; + + // constructor + writer( sc_module_name ) + {} +}; + +template +class top +: public sc_module +{ +public: + + // channel + sc_signal sig; + + // modules + writer w1; + writer w2; + + // constructor + top( sc_module_name ) + : sig(), w1( "w1" ), w2( "w2" ) + { + w1.out( sig ); + w2.out( sig ); + } +}; + +#endif + +// Taf! diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test02.cpp new file mode 100644 index 000000000..f62a0e86b --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test02/test02.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() -- bool + +#include "test.h" + +int +sc_main( int, char*[] ) +{ + top t1( "t1" ); + + sc_start(0, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/golden/test03.log new file mode 100644 index 000000000..1b061bb5f --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/golden/test03.log @@ -0,0 +1,7 @@ +SystemC Simulation + +Error: (E115) sc_signal cannot have more than one driver: + signal `t1.signal_0' (sc_signal) + first driver `t1.w2.port_0' (sc_out) + second driver `t1.w1.port_0' (sc_out) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test.h b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test.h new file mode 100644 index 000000000..77f579f41 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() + +#ifndef TEST_H +#define TEST_H + +#include "systemc.h" + +template +class writer +: public sc_module +{ +public: + + // output port + sc_out out; + + // constructor + writer( sc_module_name ) + {} +}; + +template +class top +: public sc_module +{ +public: + + // channel + sc_signal sig; + + // modules + writer w1; + writer w2; + + // constructor + top( sc_module_name ) + : sig(), w1( "w1" ), w2( "w2" ) + { + w1.out( sig ); + w2.out( sig ); + } +}; + +#endif + +// Taf! diff --git a/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test03.cpp new file mode 100644 index 000000000..cc94eed68 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal/register_port/test03/test03.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// sc_signal test; +// interface methods -- register_port() -- sc_logic + +#include "test.h" + +int +sc_main( int, char*[] ) +{ + top t1( "t1" ); + + sc_start(0, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_ports/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal_ports/test01/golden/test01.log new file mode 100644 index 000000000..9098253a7 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_ports/test01/golden/test01.log @@ -0,0 +1,9 @@ +SystemC Simulation +0 +0 +X +XXXX +2 +1 +1 +1111 diff --git a/src/systemc/tests/systemc/communication/sc_signal_ports/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal_ports/test01/test01.cpp new file mode 100644 index 000000000..f321f6c21 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_ports/test01/test01.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the initialize() method in output signal ports + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_out out_int; + sc_out out_bool; + sc_out out_logic; + sc_out_rv<4> out_rv4; + + SC_CTOR( mod_a ) + { + out_int.initialize( 1 ); + out_int.initialize( 2 ); + out_bool.initialize( true ); + out_logic.initialize( sc_dt::Log_Z ); + out_logic.initialize( sc_dt::Log_1 ); + out_rv4.initialize( sc_lv<4>( "ZZZZ" ) ); + out_rv4.initialize( sc_lv<4>( "1111" ) ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal sig_int; + sc_signal sig_bool; + sc_signal sig_logic; + sc_signal_rv<4> sig_rv4; + + mod_a a( "a" ); + + a.out_int( sig_int ); + a.out_bool( sig_bool ); + a.out_logic( sig_logic ); + a.out_rv4( sig_rv4 ); + + cout << sig_int << endl; + cout << sig_bool << endl; + cout << sig_logic << endl; + cout << sig_rv4 << endl; + + sc_start(0, SC_NS); + + cout << sig_int << endl; + cout << sig_bool << endl; + cout << sig_logic << endl; + cout << sig_rv4 << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_ports/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal_ports/test02/golden/test02.log new file mode 100644 index 000000000..a692610c0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_ports/test02/golden/test02.log @@ -0,0 +1,13 @@ +SystemC Simulation +in_int default_event() +in_int value_changed_event() +in_bool default_event() +in_bool value_changed_event() +in_bool posedge_event() +in_bool negedge_event() +in_logic default_event() +in_logic value_changed_event() +in_logic posedge_event() +in_logic negedge_event() + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/communication/sc_signal_ports/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal_ports/test02/test02.cpp new file mode 100644 index 000000000..230056a62 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_ports/test02/test02.cpp @@ -0,0 +1,137 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of signal port event methods + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in in_int; + sc_in in_bool; + sc_in in_logic; + + void main_action() + { + wait( in_int.default_event() ); + cout << "in_int default_event()" << endl; + wait( in_int.value_changed_event() ); + cout << "in_int value_changed_event()" << endl; + + wait( in_bool.default_event() ); + cout << "in_bool default_event()" << endl; + wait( in_bool.value_changed_event() ); + cout << "in_bool value_changed_event()" << endl; + wait( in_bool.posedge_event() ); + cout << "in_bool posedge_event()" << endl; + wait( in_bool.negedge_event() ); + cout << "in_bool negedge_event()" << endl; + + wait( in_logic.default_event() ); + cout << "in_logic default_event()" << endl; + wait( in_logic.value_changed_event() ); + cout << "in_logic value_changed_event()" << endl; + wait( in_logic.posedge_event() ); + cout << "in_logic posedge_event()" << endl; + wait( in_logic.negedge_event() ); + cout << "in_logic negedge_event()" << endl; + + sc_stop(); + } + + SC_CTOR( mod_a ) + { + SC_THREAD( main_action ); + } +}; + +SC_MODULE( mod_b ) +{ + sc_in_clk clk; + + sc_out out_bool; + sc_out out_int; + sc_out out_logic; + + void main_action() + { + int i = 0; + bool b = false; + sc_logic l = SC_LOGIC_0; + while( true ) { + wait(); + out_int.write( i ); + i ++; + out_bool.write( b ); + b = !b; + out_logic.write( l ); + l = ~l; + } + } + + SC_CTOR( mod_b ) + { + SC_THREAD( main_action ); + sensitive << clk.pos(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "clk", 10, SC_NS ); + + mod_a a( "a" ); + mod_b b( "b" ); + + sc_signal sig_int; + sc_signal sig_bool; + sc_signal sig_logic; + + b.clk( clk ); + b.out_bool( sig_bool ); + b.out_int( sig_int ); + b.out_logic( sig_logic ); + + a.in_int( sig_int ); + a.in_bool( sig_bool ); + a.in_logic( sig_logic ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/golden/test01.log new file mode 100644 index 000000000..a6bb9d360 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/golden/test01.log @@ -0,0 +1,17 @@ +SystemC Simulation +0 0 -> 0 +0 1 -> X +0 Z -> 0 +0 X -> X +1 0 -> X +1 1 -> 1 +1 Z -> 1 +1 X -> X +Z 0 -> 0 +Z 1 -> 1 +Z Z -> Z +Z X -> X +X 0 -> X +X 1 -> X +X Z -> X +X X -> X diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/test01.cpp new file mode 100644 index 000000000..191e974dd --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test01/test01.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_resolved + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_resolved out1; + sc_out_resolved out2; + sc_in_resolved in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( l1 ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( l2 ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_resolved sig; + + mod_a a( "a" ); + + a.out1( sig ); + a.out2( sig ); + a.in( sig ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/golden/test02.log new file mode 100644 index 000000000..35f526382 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/golden/test02.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E117) resolved port not bound to resolved signal: port 'a.port_2' (sc_in_resolved) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/test02.cpp new file mode 100644 index 000000000..8c41eec53 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test02/test02.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_resolved port classes. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_resolved out1; + sc_out_resolved out2; + sc_in_resolved in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( l1 ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( l2 ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_resolved sig_resolved; + sc_signal sig_logic; + + mod_a a( "a" ); + + a.out1( sig_resolved ); + a.out2( sig_logic ); + a.in( sig_logic ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/golden/test03.log new file mode 100644 index 000000000..812fad951 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E117) resolved port not bound to resolved signal: port 'a.port_1' (sc_out_resolved) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/test03.cpp new file mode 100644 index 000000000..e107d211e --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test03/test03.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_resolved port classes. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_resolved out1; + sc_out_resolved out2; + // sc_in_resolved in; + sc_in in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( l1 ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( l2 ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_resolved sig_resolved; + sc_signal sig_logic; + + mod_a a( "a" ); + + a.out1( sig_resolved ); + a.out2( sig_logic ); + a.in( sig_logic ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/golden/test04.log b/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/golden/test04.log new file mode 100644 index 000000000..41e76e0af --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/golden/test04.log @@ -0,0 +1,9 @@ +SystemC Simulation +a.res_sig1 +a.res_sig2 +1. cycle +1 +X +2. cycle +1 +1 diff --git a/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/test04.cpp b/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/test04.cpp new file mode 100644 index 000000000..5915f8377 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_resolved/test04/test04.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_resolved::operator + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in clk; + + sc_signal_resolved sig1; + sc_signal_resolved sig2; + + void main_action(){ + sc_logic data('1'); + sig1.write(data); + int i = 1; + + while(1){ + wait(); + cout<,1> in_out5; + sc_port,1> in_1; + + sc_in clk; + + void main_action() + { + + sc_logic m; + m = 'Z'; + + while(1){ + wait(); + cout<< m<<" "; + in_out1 = m; + cout<read()<<" "; + in_out2 = in_out1; + cout<read()<<" "; + in_out3 = in_1; + cout<read()<<" "; + in_out4 = in_out5; + cout<read()< sig4; + sc_signal_resolved sig5; + sc_signal sig6; + + a.clk(clk); + a.in_out1(sig1); + a.in_out2(sig2); + a.in_out3(sig3); + a.in_1(sig4); + a.in_out4(sig5); + a.in_out5(sig6); + + sc_start(15, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test01/golden/test01.log b/src/systemc/tests/systemc/communication/sc_signal_rv/test01/golden/test01.log new file mode 100644 index 000000000..a6bb9d360 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test01/golden/test01.log @@ -0,0 +1,17 @@ +SystemC Simulation +0 0 -> 0 +0 1 -> X +0 Z -> 0 +0 X -> X +1 0 -> X +1 1 -> 1 +1 Z -> 1 +1 X -> X +Z 0 -> 0 +Z 1 -> 1 +Z Z -> Z +Z X -> X +X 0 -> X +X 1 -> X +X Z -> X +X X -> X diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test01/test01.cpp b/src/systemc/tests/systemc/communication/sc_signal_rv/test01/test01.cpp new file mode 100644 index 000000000..b5facb3ce --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test01/test01.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_rv. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_rv<1> out1; + sc_out_rv<1> out2; + sc_in_rv<1> in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( sc_lv<1>( l1 ) ); + /*::sc_core::*/wait( 1, SC_NS ); + ready1.notify(); + ::sc_core::wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( sc_lv<1>( l2 ) ); + ::sc_core::wait( 1, SC_NS ); + ready2.notify(); + ::sc_core::wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + ::sc_core::wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_rv<1> sig; + + mod_a a( "a" ); + + a.out1( sig ); + a.out2( sig ); + a.in( sig ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test02/golden/test02.log b/src/systemc/tests/systemc/communication/sc_signal_rv/test02/golden/test02.log new file mode 100644 index 000000000..dee5f96b3 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test02/golden/test02.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E117) resolved port not bound to resolved signal: port 'a.port_2' (sc_in_rv) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test02/test02.cpp b/src/systemc/tests/systemc/communication/sc_signal_rv/test02/test02.cpp new file mode 100644 index 000000000..878e69eb7 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test02/test02.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_rv port classes. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_rv<1> out1; + sc_out_rv<1> out2; + sc_in_rv<1> in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( sc_lv<1>( l1 ) ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( sc_lv<1>( l2 ) ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_rv<1> sig_rv; + sc_signal > sig_lv; + + mod_a a( "a" ); + + a.out1( sig_lv ); + a.out2( sig_rv ); + a.in( sig_lv ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test03/golden/test03.log b/src/systemc/tests/systemc/communication/sc_signal_rv/test03/golden/test03.log new file mode 100644 index 000000000..7739a7781 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E117) resolved port not bound to resolved signal: port 'a.port_1' (sc_out_rv) +In file: diff --git a/src/systemc/tests/systemc/communication/sc_signal_rv/test03/test03.cpp b/src/systemc/tests/systemc/communication/sc_signal_rv/test03/test03.cpp new file mode 100644 index 000000000..539fc6af0 --- /dev/null +++ b/src/systemc/tests/systemc/communication/sc_signal_rv/test03/test03.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal_rv port classes. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + // ports + sc_out_rv<1> out1; + sc_out_rv<1> out2; + // sc_in_rv<1> in; + sc_in > in; + + // variables + sc_logic l1; + sc_logic l2; + + // events + sc_event ready1; + sc_event ready2; + + void out_action1() + { + for( int i = 0; i < 4; ++ i ) { + l1 = sc_dt::sc_logic_value_t( i ); + for( int j = 0; j < 4; ++j ) { + out1.write( sc_lv<1>( l1 ) ); + wait( 1, SC_NS ); + ready1.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void out_action2() + { + for( int i = 0; i < 4; ++ i ) { + for( int j = 0; j < 4; ++ j ) { + l2 = sc_dt::sc_logic_value_t( j ); + out2.write( sc_lv<1>( l2 ) ); + wait( 1, SC_NS ); + ready2.notify(); + wait( SC_ZERO_TIME ); + } + } + } + + void in_action() + { + for( int i = 0; i < 16; ++ i ) { + wait( ready1 & ready2 ); + cout << l1 << " " << l2 << " -> " << in.read() << endl; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( out_action1 ); + SC_THREAD( out_action2 ); + SC_THREAD( in_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal_rv<1> sig_rv; + sc_signal > sig_lv; + + mod_a a( "a" ); + + a.out1( sig_rv ); + a.out2( sig_lv ); + a.in( sig_lv ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test00/golden/test00.log b/src/systemc/tests/systemc/compliance_1666/test00/golden/test00.log new file mode 100644 index 000000000..809bb8015 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test00/golden/test00.log @@ -0,0 +1,9 @@ +SystemC Simulation +Caught rpt Info: msg_type: msg +Prim::Proc spawned and resumed +Th::i=1 +Th::i=2 + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test00/test00.cpp b/src/systemc/tests/systemc/compliance_1666/test00/test00.cpp new file mode 100644 index 000000000..6541e9e0d --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test00/test00.cpp @@ -0,0 +1,384 @@ + +// General tests combining features of SystemC 2.1 and 1666 + + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using sc_core::sc_interface; +using sc_core::sc_object; +using sc_core::sc_port; +using sc_core::sc_export; +using sc_core::sc_module; +using sc_core::sc_module_name; +using sc_core::sc_in; +using sc_core::sc_in_clk; +using sc_core::sc_signal; +using sc_core::sc_prim_channel; +using sc_core::sc_event; +using sc_core::sc_delta_count; +using sc_core::sc_is_running; +using sc_core::sc_get_top_level_objects; +using sc_core::sc_find_object; +using sc_core::sc_report; +using sc_core::sc_report_handler; +using sc_core::sc_actions; +using sc_core::SC_INFO; +using sc_core::SC_UNSPECIFIED; +using sc_core::SC_THROW; +using sc_core::sc_spawn; +using sc_core::sc_process_handle; +using sc_core::sc_get_current_process_handle; +using sc_core::sc_time; +using sc_core::sc_time_stamp; +using sc_core::SC_ZERO_TIME; +using sc_core::SC_PS; +using sc_core::SC_NS; +using sc_core::SC_US; +using sc_core::sc_start_of_simulation_invoked; +using sc_core::sc_end_of_simulation_invoked; +using sc_core::sc_start; +using sc_core::sc_stop; +using sc_core::sc_copyright; +using sc_core::sc_version; +using sc_core::sc_release; +using sc_dt::sc_abs; +using sc_dt::sc_max; +using sc_dt::sc_min; +using sc_dt::sc_int; +using sc_dt::sc_bigint; +using std::cout; +using std::endl; + +#if defined(IEEE_1666_CPLUSPLUS) && IEEE_1666_CPLUSPLUS >= 201103L +// dynamic process macros have been moved to functions on C++11 +using sc_core::sc_bind; +using sc_core::sc_ref; +using sc_core::sc_cref; +#endif // IEEE_1666_CPLUSPLUS + +struct i_f: virtual sc_interface +{ + virtual void write() = 0; +}; + +void check_form_of_suffix(std::string s) +{ + std::string charset = "0123456789"; + while (!s.empty()) + { + sc_assert(s[0] == '_'); + s = s.substr(1); + sc_assert(!s.empty()); + do + { + sc_assert(charset.find(s[0]) < charset.size()); + s = s.substr(1); + } while (!s.empty() && (s[0] != '_')); + } +} + +struct Chan: i_f, sc_object +{ + virtual void write() + { + sc_assert(std::string(name()).substr(0,17) == "top.m_dest.object"); + check_form_of_suffix(std::string(name()).substr(17)); + } +}; + +struct M_src: sc_core::sc_behavior +{ + sc_port* p; + SC_HAS_PROCESS(M_src); + + M_src(sc_module_name _name) + { + p = new sc_port; + + SC_THREAD(T); + } + void T() + { + (*p)->write(); + } +}; + +struct M_dest: sc_core::sc_channel +{ + sc_export* xp; + SC_HAS_PROCESS(M_dest); + + M_dest(sc_module_name _name) + { + xp = new sc_export; + Chan* ch = new Chan; + xp->bind(*ch); + } +}; + +void f() +{ + ::sc_core::wait(33, SC_PS); +} + +struct Prim: sc_prim_channel +{ + Prim() : cref_arg(1) {} + + void write() { request_update(); } + + void update() + { + sc_spawn(sc_bind(&Prim::proc, this)); + } + + void proc() + { + ev.notify(SC_ZERO_TIME); + wait(ev); + cout << "Prim::Proc spawned and resumed" << endl; + SC_FORK + sc_spawn(sc_bind(&Prim::Th, this, 1)), + sc_spawn(sc_bind(&Prim::Th, this, 2)) + SC_JOIN + sc_spawn(sc_bind(&Prim::Th_ref, this, sc_ref(ref_arg))); + sc_spawn(sc_bind(&Prim::Th_cref, this, sc_cref(cref_arg))); + wait(1, SC_NS); + sc_assert(ref_arg == 99); + } + sc_event ev; + void Th(int i) + { + cout << "Th::i=" << i << endl; + } + void Th_ref(int& arg) + { + arg = 99; + sc_time t(sc_time_stamp()); + sc_process_handle h = sc_spawn(&f); + wait(h.terminated_event()); + sc_assert(sc_time_stamp() == t + sc_time(33, SC_PS)); + } + void Th_cref(const int& arg) + { + } + int ref_arg; + const int cref_arg; +}; + +SC_MODULE(M) +{ + Prim prim; + SC_CTOR(M) + { + SC_THREAD(T); + } + + void T() + { + wait(10, SC_NS); + try { + sc_report_handler::set_actions("msg_type", SC_INFO, SC_THROW); + SC_REPORT_INFO("msg_type", "msg"); + } + catch (sc_report& rpt) { + cout << "Caught rpt " << rpt.what() << endl; + sc_assert(rpt.get_severity() == SC_INFO); + sc_assert(std::string(rpt.get_msg_type()) == "msg_type"); + sc_assert(std::string(rpt.get_msg()) == "msg"); + sc_assert(rpt.get_time() == sc_time(10, SC_NS)); + sc_assert(std::string(rpt.get_process_name()) == "top.m.T"); + + sc_assert(sc_report_handler::get_count(SC_INFO) == 1); + sc_report rpt2 = rpt; // Copy constructor + + prim.write(); + + sc_spawn(sc_bind(&M::proc, this, &rpt2)); + wait(100, SC_NS); + } + } + void proc(sc_report* rpt) + { + sc_assert(rpt->get_severity() == SC_INFO); + sc_assert(std::string(rpt->get_msg_type()) == "msg_type"); + sc_assert(std::string(rpt->get_msg()) == "msg"); + sc_assert(rpt->get_time() == sc_time(10, SC_NS)); + sc_assert(std::string(rpt->get_process_name()) == "top.m.T"); + rpt->get_file_name(); + rpt->get_line_number(); + } +}; + +struct CM: sc_module +{ + sc_in_clk clk; + sc_in reset; + + SC_HAS_PROCESS(CM); + + CM(sc_module_name _name) + : first(true) + { + SC_CTHREAD(CT, clk.pos()); + reset_signal_is(reset, true); + + sc_assert(sc_start_of_simulation_invoked() == false); + sc_assert(sc_end_of_simulation_invoked() == false); + sc_assert(sc_is_running() == false); + } + + bool first; + + void CT() + { + if (first) + sc_assert(sc_time_stamp() == sc_time(5, SC_US)); + else + sc_assert(sc_time_stamp() == sc_time(30, SC_US)); + first = false; + + sc_assert(sc_start_of_simulation_invoked() == true); + sc_assert(sc_end_of_simulation_invoked() == false); + sc_assert(sc_is_running() == true); + + while(1) + { + wait(); + sc_assert(sc_time_stamp() == sc_time(15, SC_US)); + wait(); + sc_assert(sc_time_stamp() == sc_time(25, SC_US)); + wait(); + sc_assert(false); + } + } + + void start_of_simulation() + { + sc_assert(sc_start_of_simulation_invoked() == false); + sc_assert(sc_end_of_simulation_invoked() == false); + sc_assert(sc_is_running() == false); + } + + void end_of_simulation() + { + sc_assert(sc_start_of_simulation_invoked() == true); + sc_assert(sc_end_of_simulation_invoked() == false); + sc_assert(sc_is_running() == false); + } +}; + +SC_MODULE(Top) +{ + M *m; + CM *cm; + + M_src m_src; + M_dest m_dest; + + sc_signal clk, reset; + + SC_CTOR(Top) + : m_src("m_src"), m_dest("m_dest") + { + m = new M("m"); + cm = new CM("cm"); + cm->clk(clk); + cm->reset(reset); + + m_src.p->bind( *(m_dest.xp) ); // Port-export binding + + SC_THREAD(T); + SC_THREAD(T2); + } + void T() + { + clk = false; + reset = true; + wait(5, SC_US); + clk = true; + wait(5, SC_US); + clk = false; + reset = false; + wait(5, SC_US); + clk = true; + wait(5, SC_US); + clk = false; + wait(5, SC_US); + clk = true; + wait(5, SC_US); + clk = false; + reset = true; + wait(10, SC_US); + } + void T2() + { + sc_assert(sc_min(-1,1) == -1); + sc_assert(sc_max(-1,1) == 1); + sc_assert(sc_abs(-1) == 1); + + sc_assert(sc_min(sc_int<8>(-1),sc_int<8>(1)) == sc_int<8>(-1)); + sc_assert(sc_max(sc_int<8>(-1),sc_int<8>(1)) == sc_int<8>(1)); + sc_assert(sc_abs(sc_int<8>(-1)) == sc_int<8>(1)); + + sc_assert(sc_min(sc_bigint<256>(-1),sc_bigint<256>(1)) == sc_bigint<256>(-1)); + sc_assert(sc_max(sc_bigint<256>(-1),sc_bigint<256>(1)) == sc_bigint<256>(1)); + sc_assert(sc_abs(sc_bigint<256>(-1)) == sc_bigint<256>(1)); + } +}; + +int sc_main(int argc, char* argv[]) +{ + sc_assert(sc_delta_count() == 0); + sc_assert(sc_is_running() == 0); + sc_assert(sc_time_stamp() == sc_time(SC_ZERO_TIME)); + sc_assert(sc_report_handler::get_count(SC_INFO) == 0); + sc_assert(sc_report_handler::get_count("foo") == 0); + + sc_actions act1 = sc_report_handler::get_new_action_id(); + sc_actions act2 = sc_report_handler::get_new_action_id(); + while (act2 != SC_UNSPECIFIED) + { + sc_assert(act2 != act1); + act2 = sc_report_handler::get_new_action_id(); + } + sc_assert(sc_report_handler::get_log_file_name() == 0); + sc_assert(sc_get_top_level_objects().size() == 0); + sc_assert(sc_find_object("foo") == 0); + sc_assert(!sc_get_current_process_handle().valid()); + + sc_copyright(); + sc_version(); + std::string release = sc_release(); + int n = release.find('.'); + std::string major = release.substr(0,n); + release = release.substr(n+1,release.size()-1); + n = release.find('.'); + std::string minor = release.substr(0,n); + release = release.substr(n+1,release.size()-1); + n = release.find('-'); + std::string patch = release.substr(0,n); + std::string originator = release.substr(n+1,release.size()); + + std::string charset = + "abcdefghijklmnopqrstuvwxyzABSCDEFGHIJKLMNOPQRSTUVWXYZ0123456789_-"; + + for (unsigned int i = 0; i < major.size(); i++) + sc_assert(charset.find(major[i]) < charset.size()); + for (unsigned int i = 0; i < minor.size(); i++) + sc_assert(charset.find(minor[i]) < charset.size()); + for (unsigned int i = 0; i < patch.size(); i++) + sc_assert(charset.find(patch[i]) < charset.size()); + for (unsigned int i = 0; i < originator.size(); i++) + sc_assert(charset.find(originator[i]) < charset.size()); + + Top top("top"); + sc_start(); + + sc_stop(); + sc_assert(sc_end_of_simulation_invoked() == true); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test001/golden/test001.log b/src/systemc/tests/systemc/compliance_1666/test001/golden/test001.log new file mode 100644 index 000000000..4f2aa1853 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test001/golden/test001.log @@ -0,0 +1,19 @@ +SystemC Simulation +Should be silent except for some renaming warnings... + +Warning: (W505) object already exists: top.mod0.thread. Latter declaration will be renamed to top.mod0.thread_0 +In file: + +Warning: (W505) object already exists: top.mod0.thread. Latter declaration will be renamed to top.mod0.thread_1 +In file: + +Warning: (W505) object already exists: top.mod0.thread. Latter declaration will be renamed to top.mod0.thread_2 +In file: + +Warning: (W505) object already exists: top.mod0.thread. Latter declaration will be renamed to top.mod0.thread_3 +In file: + +Warning: (W558) disable() or dont_initialize() called on process with no static sensitivity, it will be orphaned: top.mod0.method +In file: + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test001/test001.cpp b/src/systemc/tests/systemc/compliance_1666/test001/test001.cpp new file mode 100644 index 000000000..d40a7aa14 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test001/test001.cpp @@ -0,0 +1,330 @@ + +#include + +// Tests for 2.0.1 extended coding styles, illustrating that SystemC is a class library, not a syntax + +static int global_count = 0; + +SC_MODULE(Mod) +{ + SC_CTOR(Mod) + { + sc_assert(std::string(this->kind()) == "sc_module"); + } +}; + + + +SC_MODULE(Mod0) +{ + SC_CTOR(Mod0) + { + sc_assert(std::string(basename()) == "mod0"); + SC_METHOD(method); + dont_initialize(); + method(); //// Calling an SC_METHOD member function directly DOULOS009 + + for (int i = 0; i < 3; i++) + { + SC_THREAD(thread); //// Registering the same function multiple times DOULOS046 + //// Get warnings re-defining sc_object names, multiple threads created + } + SC_THREAD(thread); + SC_THREAD(thread); //// Compile-time error - 'threadhandle' redefinition + + f(); + } + void method(void) { + sc_assert(sc_get_current_process_handle().proc_kind() == SC_METHOD_PROC_); + ++ global_count; + } + void thread(void) { + sc_assert(sc_get_current_process_handle().proc_kind() == SC_THREAD_PROC_); + ++ global_count; + } + + void f() { SC_THREAD(g); } //// Process registered in member function called from constructor DOULOS007 + void g() + { + sc_assert(std::string(sc_get_current_process_handle().name()) == "top.mod0.g"); + ++ global_count; + } +}; + + +struct Chan //// Pseudo-channel used for port-less interprocess communication + //// but not derived from sc_module, sc_prim_channel or sc_interface DOULOS048 +{ + void write(int i) { wait(10, SC_NS); data = i; e.notify(); } + void read(int& i) { wait(e); i = data; } + int data; + bool wr, re; + sc_event e; +}; + +struct MyMod: Mod //// Class derived from an SC_MODULE DOULOS050 +{ + sc_in p; + + MyMod(sc_module_name n) + : Mod(n) + { + SC_THREAD(p1); + SC_THREAD(p2); + } + + Chan ch; //// Instance of pseudo-channel DOULOS048 + void p1() { ch.write(333); } + void p2() { int i; ch.read(i); sc_assert(i == 333); } + + SC_HAS_PROCESS(MyMod); +}; + + + +struct C0: sc_module, virtual sc_interface //// Combining channel and interface in one class DOULOS015 +{ + void write(int i) { data = i; } + void read(int& i) { i = data; } + int data; + + SC_CTOR(C0) + { + SC_THREAD(action); + } + void action() { + sc_assert(std::string(sc_get_current_process_handle().get_process_object()->basename()) == "action"); + } +}; + + +struct C1: virtual public sc_interface //// Combining channel and interface in one class DOULOS015 +{ + void write(int i) { data = i; } + void read(int& i) { i = data; } + int data; +}; + + +struct I_F: virtual public sc_interface +{ + virtual void method() = 0; +}; + +struct C2: I_F //// Channel derived from neither sc_module nor sc_prim_channel DOULOS049 +{ + void method() {} +}; + +struct C3: sc_object, I_F //// Channel derived from sc_object only + //// (and derived from neither sc_module nor sc_prim_channel) DOULOS049 +{ + void method() {} +}; + + +void check_form_of_suffix(std::string s) +{ + std::string charset = "0123456789"; + while (!s.empty()) + { + sc_assert(s[0] == '_'); + s = s.substr(1); + sc_assert(!s.empty()); + do + { + sc_assert(charset.find(s[0]) < charset.size()); + s = s.substr(1); + } while (!s.empty() && (s[0] != '_')); + } +} + +struct Modtype: sc_module +{ + Modtype(sc_module_name n = sc_gen_unique_name("Modtype")) + { + if (global_count == 0) + sc_assert(std::string(basename()) == "mt"); + else + { + std::string s = std::string(basename()); + sc_assert(s.substr(0,7) == "Modtype"); + sc_assert(s.size() > 7); + check_form_of_suffix(s.substr(7)); + } + ++ global_count; + } + void dump() { + sc_assert(std::string(sc_get_current_process_handle().get_process_object()->basename()) == "thread"); + ++ global_count; + } +}; + +typedef sc_signal MS; //// Pointer-to-module used as the type of a signal DOULOS051 + + + +template +struct S +{ + T t; +}; + + + +SC_MODULE(Moda) +{ + sc_port p0; + sc_port p1; + sc_port p2; + sc_port p3; + sc_port p4; + + Modtype mt; + + SC_CTOR(Moda): mt("mt") + { + sc_assert(std::string(name()) == "top.moda"); + SC_THREAD(thread); + } + void thread(); +}; + +SC_MODULE(Modb) +{ + sc_port p0; + sc_port p1; + sc_port p2; + sc_port p3; + sc_port p4; + + SC_CTOR(Modb) + { + sc_assert(std::string(name()) == "top.modb"); + SC_THREAD(thread); + SC_THREAD(funny); + } + void thread(); + void funny(); +}; + +void Moda::thread() +{ + p1->write(999); + p2->method(); + p3->method(); + p4->write(&mt); +} +void Modb::thread() +{ + wait(SC_ZERO_TIME); + int i; p1->read(i); + sc_assert(i == 999); + p2->method(); + p3->method(); + wait(SC_ZERO_TIME); + (p4->read())->dump(); +} + +void Modb::funny() { C1 c1; C2 c2; C3 c3; } + + + + +struct Link +{ + Link *link; + sc_module *m; //// Pointer-to-module DOULOS006 + sc_signal *s; //// Pointer-to-signal + sc_in *p; //// Pointer-to-port DOULOS008 +}; + +SC_MODULE(Top) +{ + + SC_MODULE(Nested) //// Nested modules DOULOS005 + { + sc_in *pp; //// Pointer-to-port DOULOS008 + + SC_CTOR(Nested) + { + SC_METHOD(action); + + pp = new sc_in; //// Dynamic port instantiation DOULOS008 + + sensitive << *pp; //// Sensitivity separated from SC_METHOD DOULOS011 + } + + void action() { op = sc_min(3, (*pp).read() + 1); } + + sc_out op; //// Out-of-order declaration DOULOS052 + }; + + + Nested n; + Link* link; + sc_signal b; + sc_signal *sig; //// Pointer-to-signal + + MyMod mymod; + Moda moda; + Modb modb; + C0 c0; + C1 c1; + C2 c2; + C3 c3; + + S Sm; //// Using sc_module as a template parameter DOULOS051 + MS ms; //// Pointer-to-module used as the type of a signal DOULOS051 + + Mod0 mod0; + + SC_CTOR(Top) + : n("n"), mymod("mymod"), moda("moda"), modb("modb"), c0("c0"), mod0("mod0") + { + link = new Link; + link->m = new Mod("mod_1"); + link->p = new sc_in; + link->link = new Link; + link->link->m = new Mod("mod_2"); //// Buried dynamic module instantiation DOULOS002 + link->link->s = new sc_signal;//// Buried dynamic channel instantiation + link->link->p = new sc_in; //// Buried dynamic port instantiation DOULOS008 + + sig = new sc_signal; //// Dynamic channel instantiation + n.op(*sig); + (*(n.pp)).bind(*sig); //// Binding dynamically allocated port DOULOS008 + + mymod.p(b); + + moda.p0(c0); + moda.p1(c1); + moda.p2(c2); + moda.p3(c3); + moda.p4(ms); + + modb.p0(c0); + modb.p1(c1); + modb.p2(c2); + modb.p3(c3); + modb.p4(ms); + } + +}; + + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent except for some renaming warnings..." << endl; + + sc_signal s; + Top top("top"); + top.link->p->bind(s); + top.link->link->p->bind(s); //// Binding dynamically allocated port DOULOS008 + + sc_start(); + sc_assert(global_count == 10); + sc_assert(top.sig->read() == 3); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test106/golden/test106.log b/src/systemc/tests/systemc/compliance_1666/test106/golden/test106.log new file mode 100644 index 000000000..8f2cbd409 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test106/golden/test106.log @@ -0,0 +1,7 @@ +SystemC Simulation +T() 1 0 +T() 1 1 +T() 1 2 +T() 1 3 + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test106/test106.cpp b/src/systemc/tests/systemc/compliance_1666/test106/test106.cpp new file mode 100644 index 000000000..68c52d5a2 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test106/test106.cpp @@ -0,0 +1,50 @@ +#include + +using sc_core::sc_delta_count; +using sc_core::sc_is_running; +using sc_core::SC_ZERO_TIME; +using sc_core::sc_start; +using sc_core::sc_event; +using sc_core::SC_NS; +using std::cout; +using std::endl; + +// D.1 6) sc_delta_count() + +SC_MODULE(M) +{ + SC_CTOR(M) + { + SC_THREAD(T); + } + void T() + { + cout << "T() " << sc_is_running() << " " << sc_delta_count() << endl; + wait(10, SC_NS); + cout << "T() " << sc_is_running() << " " << sc_delta_count() << endl; + wait(10, SC_NS); + cout << "T() " << sc_is_running() << " " << sc_delta_count() << endl; + wait(10, SC_NS); + cout << "T() " << sc_is_running() << " " << sc_delta_count() << endl; + } +}; + +SC_MODULE(Top) +{ + M *m; + SC_CTOR(Top) + { + m = new M("m"); + } +}; + +int sc_main(int argc, char* argv[]) +{ + sc_assert(sc_delta_count() == 0); + + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test200/golden/test200.log b/src/systemc/tests/systemc/compliance_1666/test200/golden/test200.log new file mode 100644 index 000000000..b4a7d0f5f --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test200/golden/test200.log @@ -0,0 +1,56 @@ +SystemC Simulation +Should be silent except for reports ... + +Warning: (W505) object already exists: top.m.T. Latter declaration will be renamed to top.m.T_0 +In file: + +Warning: (W505) object already exists: top.m.T. Latter declaration will be renamed to top.m.T_1 +In file: + +Info: type: msg + +Warning: type: msg +In file: +In process: top.m.T @ 0 s + +Error: type: msg +In file: +In process: top.m.T @ 0 s + +Fatal: type: msg +In file: +In process: top.m.T @ 0 s + +Info: type: msg + +Warning: type: msg +In file: +In process: top.m.T_0 @ 0 s + +Error: type: msg +In file: +In process: top.m.T_0 @ 0 s + +Fatal: type: msg +In file: +In process: top.m.T_0 @ 0 s + +Info: type: msg + +Warning: type: msg +In file: +In process: top.m.T_1 @ 0 s + +Error: type: msg +In file: +In process: top.m.T_1 @ 0 s + +Fatal: type: msg +In file: +In process: top.m.T_1 @ 0 s + +Error: type: msg +In file: +In process: top.m.R @ 100 ns + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test200/test200.cpp b/src/systemc/tests/systemc/compliance_1666/test200/test200.cpp new file mode 100644 index 000000000..5f68240aa --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test200/test200.cpp @@ -0,0 +1,194 @@ +#include + +// Multiple tests for Annex D.1 and D.2 + +struct i_f: virtual sc_interface +{ +}; + +struct Chan: i_f, sc_object +{ +}; + +struct Port: sc_port +{ + Chan chan; +}; + +void check_form_of_suffix(std::string s) +{ + std::string charset = "0123456789"; + while (!s.empty()) + { + sc_assert(s[0] == '_'); + s = s.substr(1); + sc_assert(!s.empty()); + do + { + sc_assert(charset.find(s[0]) < charset.size()); + s = s.substr(1); + } while (!s.empty() && (s[0] != '_')); + } +} + +SC_MODULE(M) +{ + Port port; + + SC_CTOR(M) + { + SC_THREAD(T); + std::string s1 = std::string(sc_get_current_process_handle().name()); + sc_assert(s1.substr(0,7) == "top.m.T"); + check_form_of_suffix(s1.substr(7)); + + SC_THREAD(T); + std::string s2 = std::string(sc_get_current_process_handle().name()); + sc_assert(s2.substr(0,7) == "top.m.T"); + check_form_of_suffix(s2.substr(7)); + + SC_THREAD(T); + std::string s3 = std::string(sc_get_current_process_handle().name()); + sc_assert(s3.substr(0,7) == "top.m.T"); + check_form_of_suffix(s3.substr(7)); + + sc_assert(s1 != s2); + sc_assert(s2 != s3); + sc_assert(s3 != s1); + + SC_THREAD(R); + } + + void end_of_elaboration() + { + sc_assert(port.get_parent_object() == this); + sc_assert(port.chan.get_parent_object() == this); + sc_assert(get_child_objects().size() == 6); + } + + void T() + { + int i_count = sc_report_handler::get_count(SC_INFO); + int w_count = sc_report_handler::get_count(SC_WARNING); + int e_count = sc_report_handler::get_count(SC_ERROR); + int f_count = sc_report_handler::get_count(SC_FATAL); + + sc_report_handler::set_actions(SC_INFO, SC_DO_NOTHING); + sc_report_handler::set_actions(SC_WARNING, SC_DO_NOTHING); + sc_report_handler::set_actions(SC_ERROR, SC_DO_NOTHING); + sc_report_handler::set_actions(SC_FATAL, SC_DO_NOTHING); + + SC_REPORT_INFO("type", "msg"); + + sc_assert(sc_report_handler::get_count(SC_INFO) == i_count + 1); + sc_assert(sc_report_handler::get_count(SC_WARNING) == w_count); + sc_assert(sc_report_handler::get_count(SC_ERROR) == e_count); + sc_assert(sc_report_handler::get_count(SC_FATAL) == f_count); + + SC_REPORT_WARNING("type", "msg"); + + sc_assert(sc_report_handler::get_count(SC_INFO) == i_count + 1); + sc_assert(sc_report_handler::get_count(SC_WARNING) == w_count + 1); + sc_assert(sc_report_handler::get_count(SC_ERROR) == e_count); + sc_assert(sc_report_handler::get_count(SC_FATAL) == f_count); + + SC_REPORT_ERROR("type", "msg"); + + sc_assert(sc_report_handler::get_count(SC_INFO) == i_count + 1); + sc_assert(sc_report_handler::get_count(SC_WARNING) == w_count + 1); + sc_assert(sc_report_handler::get_count(SC_ERROR) == e_count + 1); + sc_assert(sc_report_handler::get_count(SC_FATAL) == f_count); + + SC_REPORT_FATAL("type", "msg"); + + sc_assert(sc_report_handler::get_count(SC_INFO) == i_count + 1); + sc_assert(sc_report_handler::get_count(SC_WARNING) == w_count + 1); + sc_assert(sc_report_handler::get_count(SC_ERROR) == e_count + 1); + sc_assert(sc_report_handler::get_count(SC_FATAL) == f_count + 1); + + sc_report_handler::set_actions(SC_INFO, SC_DISPLAY); + sc_report_handler::set_actions(SC_WARNING, SC_DISPLAY); + sc_report_handler::set_actions(SC_ERROR, SC_DISPLAY); + sc_report_handler::set_actions(SC_FATAL, SC_DISPLAY); + + SC_REPORT_INFO("type", "msg"); + + sc_assert(sc_report_handler::get_count(SC_INFO) == i_count + 2); + sc_assert(sc_report_handler::get_count(SC_WARNING) == w_count + 1); + sc_assert(sc_report_handler::get_count(SC_ERROR) == e_count + 1); + sc_assert(sc_report_handler::get_count(SC_FATAL) == f_count + 1); + + SC_REPORT_WARNING("type", "msg"); + + sc_assert(sc_report_handler::get_count(SC_INFO) == i_count + 2); + sc_assert(sc_report_handler::get_count(SC_WARNING) == w_count + 2); + sc_assert(sc_report_handler::get_count(SC_ERROR) == e_count + 1); + sc_assert(sc_report_handler::get_count(SC_FATAL) == f_count + 1); + + SC_REPORT_ERROR("type", "msg"); + + sc_assert(sc_report_handler::get_count(SC_INFO) == i_count + 2); + sc_assert(sc_report_handler::get_count(SC_WARNING) == w_count + 2); + sc_assert(sc_report_handler::get_count(SC_ERROR) == e_count + 2); + sc_assert(sc_report_handler::get_count(SC_FATAL) == f_count + 1); + + SC_REPORT_FATAL("type", "msg"); + + sc_assert(sc_report_handler::get_count(SC_INFO) == i_count + 2); + sc_assert(sc_report_handler::get_count(SC_WARNING) == w_count + 2); + sc_assert(sc_report_handler::get_count(SC_ERROR) == e_count + 2); + sc_assert(sc_report_handler::get_count(SC_FATAL) == f_count + 2); + } + void R() + { + wait(100, SC_NS); + + int i_count = sc_report_handler::get_count(SC_INFO); + int w_count = sc_report_handler::get_count(SC_WARNING); + int e_count = sc_report_handler::get_count(SC_ERROR); + int f_count = sc_report_handler::get_count(SC_FATAL); + + try { + SC_REPORT_ERROR("type", "msg"); + } + catch (sc_report& rpt) { + sc_assert(rpt.get_severity() == SC_ERROR); + sc_assert(strcmp(rpt.get_msg_type(), "type") == 0); + sc_assert(strcmp(rpt.get_msg(), "msg") == 0); + sc_assert(rpt.get_time() == sc_time(0, SC_NS)); + sc_assert(strcmp(rpt.get_process_name(), "top.m.R") == 0); + } + + sc_assert(sc_report_handler::get_count(SC_INFO) == i_count); + sc_assert(sc_report_handler::get_count(SC_WARNING) == w_count); + sc_assert(sc_report_handler::get_count(SC_ERROR) == e_count + 1); + sc_assert(sc_report_handler::get_count(SC_FATAL) == f_count); + } +}; + +SC_MODULE(Top) +{ + M *m; + Chan *chan; + SC_CTOR(Top) + { + m = new M("m"); + chan = new Chan; + m->port.bind(*chan); + } + void end_of_elaboration() + { + sc_assert(get_child_objects().size() == 2); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent except for reports ..." << endl; + + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test202/golden/test202.log b/src/systemc/tests/systemc/compliance_1666/test202/golden/test202.log new file mode 100644 index 000000000..6dbc6d5c7 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test202/golden/test202.log @@ -0,0 +1,6 @@ +SystemC Simulation +Should be silent... + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test202/test202.cpp b/src/systemc/tests/systemc/compliance_1666/test202/test202.cpp new file mode 100644 index 000000000..8d8fec5dd --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test202/test202.cpp @@ -0,0 +1,49 @@ +#include +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 2) sc_clock - start_time and posedge_first (in addition to period and duty_cycle) + +SC_MODULE(M) +{ + SC_CTOR(M) + { + SC_THREAD(T); + } + void T() + { + wait(10, SC_NS); + sc_stop(); + } +}; + +struct Top: sc_module +{ + sc_clock clk; + M *m; + Top(sc_module_name) + : clk("clk", 20, SC_NS, 0.75, 5, SC_NS, false) + { + m = new M("m"); + sc_assert(strcmp(clk.name(), "top.clk") == 0); + sc_assert(strcmp(clk.kind(), "sc_clock") == 0); + sc_assert(clk.period() == sc_time(20, SC_NS)); + sc_assert(clk.duty_cycle() == 0.75); + sc_assert(clk.start_time() == sc_time(5, SC_NS)); + sc_assert(clk.posedge_first() == false); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test203a/golden/test203a.log b/src/systemc/tests/systemc/compliance_1666/test203a/golden/test203a.log new file mode 100644 index 000000000..74a57a017 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test203a/golden/test203a.log @@ -0,0 +1,398 @@ +SystemC Simulation +Should be silent except for warning messages +There should be warning 11 messages + +Warning: (W570) attempt to use an empty process handle ignored: disable() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: enable() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: is_unwinding() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: kill() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: reset() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: resume() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: suspend() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_off() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_on() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: terminated_event() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: throw_it() +In file: +End of warning messages +There should be warning 11 messages + +Warning: (W570) attempt to use an empty process handle ignored: disable() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: enable() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: is_unwinding() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: kill() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: reset() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: resume() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: suspend() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_off() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_on() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: terminated_event() +In file: + +Warning: (W570) attempt to use an empty process handle ignored: throw_it() +In file: +End of warning messages +There should be warning 11 messages + +Warning: (W570) attempt to use an empty process handle ignored: disable() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: enable() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: is_unwinding() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: kill() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: reset() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: resume() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: suspend() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_off() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_on() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: terminated_event() +In file: +In process: top.m.ME @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: throw_it() +In file: +In process: top.m.ME @ 0 s +End of warning messages +There should be warning 11 messages + +Warning: (W570) attempt to use an empty process handle ignored: disable() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: enable() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: is_unwinding() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: kill() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: reset() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: resume() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: suspend() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_off() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_on() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: terminated_event() +In file: +In process: top.m.stat_method @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: throw_it() +In file: +In process: top.m.stat_method @ 0 s +End of warning messages +There should be warning 11 messages + +Warning: (W570) attempt to use an empty process handle ignored: disable() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: enable() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: is_unwinding() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: kill() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: reset() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: resume() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: suspend() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_off() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_on() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: terminated_event() +In file: +In process: top.m.T @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: throw_it() +In file: +In process: top.m.T @ 0 s +End of warning messages +There should be warning 11 messages + +Warning: (W570) attempt to use an empty process handle ignored: disable() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: enable() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: is_unwinding() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: kill() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: reset() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: resume() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: suspend() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_off() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_on() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: terminated_event() +In file: +In process: top.m.stat_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: throw_it() +In file: +In process: top.m.stat_thread @ 0 s +End of warning messages +There should be warning 11 messages + +Warning: (W570) attempt to use an empty process handle ignored: disable() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: enable() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: is_unwinding() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: kill() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: reset() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: resume() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: suspend() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_off() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_on() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: terminated_event() +In file: +In process: top.m.T.dyn_thread @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: throw_it() +In file: +In process: top.m.T.dyn_thread @ 0 s +End of warning messages +There should be warning 11 messages + +Warning: (W570) attempt to use an empty process handle ignored: disable() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: enable() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: is_unwinding() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: kill() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: reset() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: resume() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: suspend() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_off() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_on() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: terminated_event() +In file: +In process: top.m.CT @ 0 s + +Warning: (W570) attempt to use an empty process handle ignored: throw_it() +In file: +In process: top.m.CT @ 0 s +End of warning messages +There should be warning 11 messages + +Warning: (W570) attempt to use an empty process handle ignored: disable() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: enable() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: is_unwinding() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: kill() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: reset() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: resume() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: suspend() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_off() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: sync_reset_on() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: terminated_event() +In file: +In process: top.m.T.dyn_method @ 1 ns + +Warning: (W570) attempt to use an empty process handle ignored: throw_it() +In file: +In process: top.m.T.dyn_method @ 1 ns +End of warning messages + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test203a/test203a.cpp b/src/systemc/tests/systemc/compliance_1666/test203a/test203a.cpp new file mode 100644 index 000000000..ad2a6b0f0 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test203a/test203a.cpp @@ -0,0 +1,265 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 3) Process handle methods, including invalid and terminated process + +void invalid_handle_check(sc_process_handle& h) +{ + + sc_assert(h.valid() == false); + sc_assert(strcmp(h.name(), "") == 0); + sc_assert(h.proc_kind() == SC_NO_PROC_); + sc_assert(h.get_process_object() == 0); + std::vector children = h.get_child_objects(); + sc_assert(children.size() == 0); + sc_assert(h.get_parent_object() == 0); + sc_assert(h.terminated() == false); + sc_assert(h.dynamic() == false); + sc_assert( !(h == h) ); + sc_assert(h != h); + + cout << "There should be warning 11 messages" << endl; + + h.disable(); + h.enable(); + h.is_unwinding(); + h.kill(); + h.reset(); + h.resume(); + h.suspend(); + h.sync_reset_off(); + h.sync_reset_on(); + h.terminated_event(); + h.throw_it(sc_user(), SC_NO_DESCENDANTS); + + cout << "End of warning messages" << endl; +} + +SC_MODULE(M) +{ + sc_in_clk clk; + SC_CTOR(M) + { + sc_process_handle h; + invalid_handle_check(h); + + SC_THREAD(T); + SC_CTHREAD(CT, clk.pos()); + SC_METHOD(ME); + + sc_process_handle h3 = sc_spawn(sc_bind(&M::stat_thread, this), "stat_thread"); + sc_spawn_options opt; + opt.spawn_method(); + sc_process_handle h4 = sc_spawn(sc_bind(&M::stat_method, this), "stat_method", &opt); + + std::vector children = this->get_child_objects(); + sc_assert(children.size() == 6); + } + void T() + { + sc_process_handle h; + invalid_handle_check(h); + + sc_process_handle h2 = sc_get_current_process_handle(); + sc_assert(h2.valid() == true); + sc_assert(strcmp(h2.name(), "top.m.T") == 0); + sc_assert(h2.proc_kind() == SC_THREAD_PROC_); + sc_assert(h2.get_process_object() != 0); + std::vector children2 = h2.get_child_objects(); + sc_assert(children2.size() == 0); + sc_assert(h2.get_parent_object() == this); + sc_assert(h2.terminated() == false); + sc_assert(h2.dynamic() == false); + sc_assert(h2 == h2); + sc_assert(h2 != h); + + sc_process_handle h3 = sc_spawn(sc_bind(&M::dyn_thread, this), "dyn_thread"); + wait(1, SC_NS); + + if (h3.valid() == true) + { + sc_assert(strcmp(h3.name(), "top.m.T.dyn_thread") == 0); + sc_assert(h3.proc_kind() == SC_THREAD_PROC_); + sc_assert(h3.get_process_object() != 0); + std::vector children3 = h3.get_child_objects(); + sc_assert(children3.size() == 0); + sc_assert(h3.get_parent_object() == sc_get_current_process_handle().get_process_object()); + sc_assert(h3.terminated() == true); + sc_assert(h3.dynamic() == true); + sc_assert(h3 == h3); + sc_assert( !(h3 != h3) ); + } + + sc_spawn_options opt; + opt.spawn_method(); + sc_process_handle h4 = sc_spawn(sc_bind(&M::dyn_method, this), "dyn_method", &opt); + sc_assert(h4 != h3); + + wait(10, SC_NS); + sc_stop(); + } + + void stat_thread() + { + sc_process_handle h; + invalid_handle_check(h); + + wait(5, SC_NS); + + sc_process_handle h3 = sc_get_current_process_handle(); + sc_assert(h3.valid() == true); + sc_assert(strcmp(h3.name(), "top.m.stat_thread") == 0); + sc_assert(h3.proc_kind() == SC_THREAD_PROC_); + sc_assert(h3.get_process_object() != 0); + std::vector children3 = h3.get_child_objects(); + sc_assert(children3.size() == 0); + sc_assert(h3.get_parent_object() != 0); + sc_assert(h3.terminated() == false); + sc_assert(h3.dynamic() == false); + sc_assert(h3 == h3); + sc_assert(h3 != h); + + sc_process_handle h4; + h4 = h3; + sc_assert(h4 == h3); + sc_assert(h4 != h); + } + + void stat_method() + { + sc_process_handle h; + invalid_handle_check(h); + + sc_process_handle h3 = sc_get_current_process_handle(); + sc_assert(h3.valid() == true); + sc_assert(strcmp(h3.name(), "top.m.stat_method") == 0); + sc_assert(h3.proc_kind() == SC_METHOD_PROC_); + sc_assert(h3.get_process_object() != 0); + std::vector children3 = h3.get_child_objects(); + sc_assert(children3.size() == 0); + sc_assert(h3.get_parent_object() != 0); + sc_assert(h3.terminated() == false); + sc_assert(h3.dynamic() == false); + sc_assert(h3 == h3); + sc_assert(h3 != h); + + sc_process_handle h4; + h4 = h3; + sc_assert(h4 == h3); + sc_assert(h4 != h); + } + + void dyn_thread() + { + sc_process_handle h; + invalid_handle_check(h); + + sc_process_handle h3 = sc_get_current_process_handle(); + sc_assert(h3.valid() == true); + sc_assert(strcmp(h3.name(), "top.m.T.dyn_thread") == 0); + sc_assert(h3.proc_kind() == SC_THREAD_PROC_); + sc_assert(h3.get_process_object() != 0); + std::vector children3 = h3.get_child_objects(); + sc_assert(children3.size() == 0); + sc_assert(h3.get_parent_object() != 0); + sc_assert(h3.terminated() == false); + sc_assert(h3.dynamic() == true); + sc_assert(h3 == h3); + sc_assert(h3 != h); + + sc_process_handle h4(h3); + sc_assert(h4 == h3); + } + + void dyn_method() + { + sc_process_handle h; + invalid_handle_check(h); + + sc_process_handle h3 = sc_get_current_process_handle(); + sc_assert(h3.valid() == true); + sc_assert(strcmp(h3.name(), "top.m.T.dyn_method") == 0); + sc_assert(h3.proc_kind() == SC_METHOD_PROC_); + sc_assert(h3.get_process_object() != 0); + std::vector children3 = h3.get_child_objects(); + sc_assert(children3.size() == 0); + sc_assert(h3.get_parent_object() != 0); + sc_assert(h3.terminated() == false); + sc_assert(h3.dynamic() == true); + sc_assert(h3 == h3); + sc_assert(h3 != h); + + sc_process_handle h4(h3); + sc_assert(h4 == h3); + } + + void CT() + { + sc_process_handle h; + invalid_handle_check(h); + + sc_process_handle h2 = sc_get_current_process_handle(); + sc_assert(h2.valid() == true); + sc_assert(strcmp(h2.name(), "top.m.CT") == 0); + sc_assert(h2.proc_kind() == SC_CTHREAD_PROC_); + sc_assert(h2.get_process_object() != 0); + std::vector children2 = h2.get_child_objects(); + sc_assert(children2.size() == 0); + sc_assert(h2.get_parent_object() == this); + sc_assert(h2.terminated() == false); + sc_assert(h2.dynamic() == false); + sc_assert(h2 == h2); + sc_assert(h2 != h); + } + + void ME() + { + sc_process_handle h; + invalid_handle_check(h); + + sc_process_handle h2 = sc_get_current_process_handle(); + sc_assert(h2.valid() == true); + sc_assert(strcmp(h2.name(), "top.m.ME") == 0); + sc_assert(h2.proc_kind() == SC_METHOD_PROC_); + sc_assert(h2.get_process_object() != 0); + std::vector children2 = h2.get_child_objects(); + sc_assert(children2.size() == 0); + sc_assert(h2.get_parent_object() == this); + sc_assert(h2.terminated() == false); + sc_assert(h2.dynamic() == false); + sc_assert(h2 == h2); + sc_assert(h2 != h); + } + +}; + +struct Top: sc_module +{ + M *m; + sc_clock clk; + Top(sc_module_name) + { + m = new M("m"); + m->clk(clk); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent except for warning messages" << endl; + + sc_process_handle h; + invalid_handle_check(h); + + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test203b/golden/test203b.log b/src/systemc/tests/systemc/compliance_1666/test203b/golden/test203b.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test203b/golden/test203b.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test203b/test203b.cpp b/src/systemc/tests/systemc/compliance_1666/test203b/test203b.cpp new file mode 100644 index 000000000..07f4cb506 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test203b/test203b.cpp @@ -0,0 +1,68 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 3) terminated_event() + +SC_MODULE(M) +{ + SC_CTOR(M) + { + SC_THREAD(T); + } + + void T() + { + sc_process_handle h1 = sc_spawn(sc_bind(&M::proc, this, 2)); + sc_process_handle h2 = sc_spawn(sc_bind(&M::proc, this, 3)); + sc_process_handle h3 = sc_spawn(sc_bind(&M::proc, this, 1)); + sc_assert(sc_time_stamp() == sc_time(0, SC_NS)); + wait(h1.terminated_event() & h2.terminated_event() & h3.terminated_event()); + sc_assert(sc_time_stamp() == sc_time(3, SC_NS)); + if (h1.valid()) sc_assert (h1.terminated()); + if (h2.valid()) sc_assert (h2.terminated()); + if (h3.valid()) sc_assert (h3.terminated()); + + h1 = sc_spawn(sc_bind(&M::proc, this, 10)); + h2 = sc_spawn(sc_bind(&M::proc, this, 30)); + h3 = sc_spawn(sc_bind(&M::proc, this, 20)); + sc_assert(sc_time_stamp() == sc_time(3, SC_NS)); + wait(h1.terminated_event() | h2.terminated_event() | h3.terminated_event()); + sc_assert(sc_time_stamp() == sc_time(13, SC_NS)); + sc_assert(h2.valid()); + sc_assert( !h2.terminated() ); + sc_assert(h3.valid()); + sc_assert( !h3.terminated() ); + + wait(h2.terminated_event() & h3.terminated_event()); + sc_assert(sc_time_stamp() == sc_time(33, SC_NS)); + } + void proc(int delay) + { + wait(delay * sc_time(1, SC_NS)); + } +}; + +SC_MODULE(Top) +{ + M *m; + SC_CTOR(Top) + { + m = new M("m"); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test205/golden/test205.log b/src/systemc/tests/systemc/compliance_1666/test205/golden/test205.log new file mode 100644 index 000000000..6dbc6d5c7 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test205/golden/test205.log @@ -0,0 +1,6 @@ +SystemC Simulation +Should be silent... + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test205/test205.cpp b/src/systemc/tests/systemc/compliance_1666/test205/test205.cpp new file mode 100644 index 000000000..2e0810abb --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test205/test205.cpp @@ -0,0 +1,69 @@ +#include +using namespace sc_core; +using namespace sc_dt; +using sc_core::wait; +using std::cout; +using std::endl; + +// 5) wait( int ) for SC_THREAD, primitives and global + +void global() +{ + wait(); + sc_assert(sc_time_stamp() == sc_time(0, SC_NS)); + wait(3); + sc_assert(sc_time_stamp() == sc_time(3, SC_NS)); +} + +struct Prim: sc_prim_channel +{ + void method() + { + wait(); + sc_assert(sc_time_stamp() == sc_time(4, SC_NS)); + wait(3); + sc_assert(sc_time_stamp() == sc_time(7, SC_NS)); + } +}; + +SC_MODULE(M) +{ + sc_in_clk clk; + Prim prim; + SC_CTOR(M) + { + SC_THREAD(T); + sensitive << clk.pos(); + } + void T() + { + global(); + prim.method(); + wait(); + sc_assert(sc_time_stamp() == sc_time(8, SC_NS)); + wait(3); + sc_assert(sc_time_stamp() == sc_time(11, SC_NS)); + sc_stop(); + } +}; + +struct Top: sc_module +{ + M *m; + sc_clock clk; + Top(sc_module_name) + { + m = new M("m"); + m->clk.bind(clk); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test206/golden/test206.log b/src/systemc/tests/systemc/compliance_1666/test206/golden/test206.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test206/golden/test206.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test206/test206.cpp b/src/systemc/tests/systemc/compliance_1666/test206/test206.cpp new file mode 100644 index 000000000..9ab52e9b0 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test206/test206.cpp @@ -0,0 +1,103 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 6) sc_get_current_process_handle + +SC_MODULE(M) +{ + SC_CTOR(M) + { + sc_process_handle h; + sc_assert (!h.valid()); + h = sc_get_current_process_handle(); + sc_assert (!h.valid()); + SC_THREAD(T); + h = sc_get_current_process_handle(); + sc_assert (h.valid()); + sc_assert (strcmp(h.name(),"top.m.T") == 0); + sc_assert (h.proc_kind()==SC_THREAD_PROC_); + sc_assert (h.dynamic()==false); + sc_assert (h.terminated()==false); + sc_assert (h.get_process_object() != 0); + sc_assert (h.get_parent_object() == this); + + sc_spawn(sc_bind(&M::proc, this), "static_proc"); + h = sc_get_current_process_handle(); + sc_assert (h.valid()); + sc_assert (strcmp(h.name(),"top.m.static_proc") == 0); + sc_assert (h.proc_kind()==SC_THREAD_PROC_); + sc_assert (h.dynamic()==false); + sc_assert (h.terminated()==false); + sc_assert (h.get_process_object() != 0); + sc_assert (h.get_parent_object() == this); + } + sc_object* obj; + void T() + { + sc_process_handle h; + sc_assert (!h.valid()); + h = sc_get_current_process_handle(); + sc_assert (h.valid()); + sc_assert (strcmp(h.name(),"top.m.T") == 0); + sc_assert (h.proc_kind()==SC_THREAD_PROC_); + sc_assert (h.dynamic()==false); + sc_assert (h.terminated()==false); + sc_assert (h.get_process_object() != 0); + sc_assert (h.get_parent_object() == this); + + obj = h.get_process_object(); + sc_spawn_options opt; + opt.spawn_method(); + sc_spawn(sc_bind(&M::proc, this), "dynamic_proc", &opt); + wait(1, SC_NS); + } + void proc() + { + sc_process_handle h = sc_get_current_process_handle(); + sc_assert (h.valid()); + if (h.dynamic()) + { + sc_assert (strcmp(h.name(),"top.m.T.dynamic_proc") == 0); + sc_assert (h.proc_kind()==SC_METHOD_PROC_); + sc_assert (h.get_parent_object() == obj); + } + else + { + sc_assert (strcmp(h.name(),"top.m.static_proc") == 0); + sc_assert (h.proc_kind()==SC_THREAD_PROC_); + sc_assert (h.get_parent_object() == this); + } + sc_assert (h.terminated()==false); + sc_assert (h.get_process_object() != 0); + } +}; + +struct Top: sc_module +{ + M *m; + Top(sc_module_name) + { + m = new M("m"); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + sc_process_handle h; + sc_assert (!h.valid()); + h = sc_get_current_process_handle(); + sc_assert (!h.valid()); + + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test207/golden/test207.log b/src/systemc/tests/systemc/compliance_1666/test207/golden/test207.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test207/golden/test207.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test207/test207.cpp b/src/systemc/tests/systemc/compliance_1666/test207/test207.cpp new file mode 100644 index 000000000..76910ef84 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test207/test207.cpp @@ -0,0 +1,67 @@ +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 7) "event_queue" + +void check_form_of_suffix(std::string s) +{ + std::string charset = "0123456789"; + while (!s.empty()) + { + sc_assert(s[0] == '_'); + s = s.substr(1); + sc_assert(!s.empty()); + do + { + sc_assert(charset.find(s[0]) < charset.size()); + s = s.substr(1); + } while (!s.empty() && (s[0] != '_')); + } +} + +SC_MODULE(M) +{ + SC_CTOR(M) + { + SC_THREAD(T); + } + void T() + { + } +}; + +struct Top: sc_module +{ + sc_event_queue eq; + M *m; + Top(sc_module_name) + { + m = new M("m"); + + std::string s = eq.basename(); + sc_assert (s.substr(0,11) == "event_queue"); + sc_assert (s.size() > 11); + check_form_of_suffix(s.substr(11)); + + s = eq.name(); + sc_assert (s.substr(0,15) == "top.event_queue"); + sc_assert (s.size() > 15); + check_form_of_suffix(s.substr(15)); + + sc_assert (std::string(eq.kind()) == "sc_event_queue"); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test208/golden/test208.log b/src/systemc/tests/systemc/compliance_1666/test208/golden/test208.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test208/golden/test208.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test208/test208.cpp b/src/systemc/tests/systemc/compliance_1666/test208/test208.cpp new file mode 100644 index 000000000..1b526484a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test208/test208.cpp @@ -0,0 +1,238 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +#include +using namespace sc_core; +using namespace sc_dt; +using sc_core::wait; +using std::cout; +using std::endl; + +// 8) get_parent_object, get_child_objects + +struct Object: sc_object +{ + Object(const char* _n) : sc_object(_n) {} +}; + +SC_MODULE(M) +{ + sc_signal sig; + sc_object* T_obj; + + SC_CTOR(M) + { + std::vector children = sig.get_child_objects(); + sc_assert (children.size() == 0); + SC_THREAD(T); + sc_process_handle h = sc_get_current_process_handle(); + sc_assert (h.valid()); + T_obj = h.get_process_object(); + children = h.get_child_objects(); + sc_assert (children.size() == 0); + children = h.get_process_object()->get_child_objects(); + sc_assert (children.size() == 0); + + Object obj("obj"); + children = obj.get_child_objects(); + sc_assert (children.size() == 0); + sc_assert (obj.get_parent_object() == this); + } + + void T() + { + sc_process_handle h = sc_get_current_process_handle(); + sc_assert (h.valid()); + sc_assert (h.dynamic() == false); + sc_assert (h.get_process_object() == T_obj); + sc_assert (h.get_parent_object() == this); + std::vector children = h.get_child_objects(); + sc_assert (children.size() == 0); + children = h.get_process_object()->get_child_objects(); + sc_assert (children.size() == 0); + + Object obj("obj"); + children = obj.get_child_objects(); + sc_assert (children.size() == 0); + sc_assert (obj.get_parent_object() == h.get_process_object()); + + children = h.get_child_objects(); + sc_assert (children.size() == 1); + sc_assert (children[0] == &obj); + sc_assert (strcmp(children[0]->name(), "top.m.T.obj") == 0); + sc_assert (children[0]->get_parent_object() == h.get_process_object()); + + Object obj2("obj2"); + children = h.get_child_objects(); + sc_assert (children.size() == 2); + sc_assert (children[0] == &obj); + sc_assert (children[1] == &obj2); + sc_assert (children[0]->get_parent_object() == h.get_process_object()); + sc_assert (children[1]->get_parent_object() == h.get_process_object()); + + wait (1, SC_NS); + sc_spawn(sc_bind(&M::dynamic_proc, this), "dynamic_proc"); + wait (1, SC_NS); + + sc_assert (h.valid()); + } + + sc_object* dynamic_proc_obj; + + void dynamic_proc() + { + sc_process_handle h = sc_get_current_process_handle(); + sc_assert (h.valid()); + dynamic_proc_obj = h.get_process_object(); + sc_assert (h.dynamic() == true); + sc_assert (h.get_parent_object() == T_obj); + std::vector children = h.get_child_objects(); + sc_assert (children.size() == 0); + children = h.get_process_object()->get_child_objects(); + sc_assert (children.size() == 0); + + Object obj("obj"); + children = obj.get_child_objects(); + sc_assert (children.size() == 0); + sc_assert (obj.get_parent_object() == dynamic_proc_obj); + + children = h.get_child_objects(); + sc_assert (children.size() == 1); + sc_assert (children[0] == &obj); + sc_assert (strcmp(children[0]->name(), "top.m.T.dynamic_proc.obj") == 0); + sc_assert (children[0]->get_parent_object() == dynamic_proc_obj); + + Object obj2("obj2"); + children = h.get_child_objects(); + sc_assert (children.size() == 2); + sc_assert (children[0] == &obj); + sc_assert (children[1] == &obj2); + sc_assert (children[0]->get_parent_object() == dynamic_proc_obj); + sc_assert (children[1]->get_parent_object() == dynamic_proc_obj); + + wait (1, SC_NS); + sc_process_handle h2 = sc_spawn(sc_bind(&M::dynamic_proc2, this), "dynamic_proc2"); + wait (1, SC_NS); + + children = h.get_child_objects(); + sc_assert (children.size() == 3); + sc_assert (children[0] == &obj); + sc_assert (children[1] == &obj2); + sc_assert (children[2] == h2.get_process_object()); + sc_assert (children[0]->get_parent_object() == dynamic_proc_obj); + sc_assert (children[1]->get_parent_object() == dynamic_proc_obj); + sc_assert (children[2]->get_parent_object() == dynamic_proc_obj); + + sc_assert (h.valid()); + } + + void dynamic_proc2() + { + sc_process_handle h = sc_get_current_process_handle(); + sc_assert (h.valid()); + sc_assert (h.dynamic() == true); + sc_assert (h.get_parent_object() == dynamic_proc_obj); + std::vector children = h.get_child_objects(); + sc_assert (children.size() == 0); + children = h.get_process_object()->get_child_objects(); + sc_assert (children.size() == 0); + + Object obj("obj"); + children = obj.get_child_objects(); + sc_assert (children.size() == 0); + sc_assert (obj.get_parent_object() == h.get_process_object()); + + children = h.get_child_objects(); + sc_assert (children.size() == 1); + sc_assert (children[0] == &obj); + sc_assert (strcmp(children[0]->name(), "top.m.T.dynamic_proc.dynamic_proc2.obj") == 0); + sc_assert (children[0]->get_parent_object() == h.get_process_object()); + + Object obj2("obj2"); + children = h.get_child_objects(); + sc_assert (children.size() == 2); + sc_assert (children[0] == &obj); + sc_assert (children[1] == &obj2); + sc_assert (children[0]->get_parent_object() == h.get_process_object()); + sc_assert (children[1]->get_parent_object() == h.get_process_object()); + + wait(10, SC_NS); + + sc_assert (h.valid()); + } +}; + +void g(sc_object* obj) +{ + sc_process_handle h = sc_get_current_process_handle(); + sc_object* this_process = h.get_process_object(); + sc_assert(this_process->get_parent_object() == obj); +} +void f() +{ + sc_object* obj = sc_get_current_process_handle().get_process_object(); + sc_process_handle h = sc_spawn(sc_bind(&g, obj)); + std::vector children = obj->get_child_objects(); + sc_assert (children.size() == 1); + wait(1, SC_NS); +} + +SC_MODULE(Top) +{ + sc_in_clk clk; + sc_port, 1, SC_ZERO_OR_MORE_BOUND> p; + sc_export > xp; + sc_signal sig; + + M *m; + SC_CTOR(Top) + : clk("clk"), p("p"), xp("xp"), sig("sig") + { + m = new M("m"); + xp.bind(sig); + + SC_THREAD(p1); + SC_CTHREAD(p2,clk); + SC_METHOD(p3); + sc_spawn(&f,"p4"); + + sc_object* parent = this->get_parent_object(); + sc_assert (parent == 0); + + std::vector children = this->get_child_objects(); + sc_assert (children.size() == 9); + sc_assert (strcmp(children[0]->name(), "top.clk") == 0); + sc_assert (strcmp(children[1]->name(), "top.p") == 0); + sc_assert (strcmp(children[2]->name(), "top.xp") == 0); + sc_assert (strcmp(children[3]->name(), "top.sig") == 0); + sc_assert (strcmp(children[4]->name(), "top.m") == 0); + sc_assert (strcmp(children[5]->name(), "top.p1") == 0); + sc_assert (strcmp(children[6]->name(), "top.p2") == 0); + sc_assert (strcmp(children[7]->name(), "top.p3") == 0); + sc_assert (strcmp(children[8]->name(), "top.p4") == 0); + + for (unsigned i = 0; i < children.size(); i++) + sc_assert (children[i]->get_parent_object() == this); + } + void p1() {} + void p2() {} + void p3() {} +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + + Object obj("obj"); + std::vector children = obj.get_child_objects(); + sc_assert (children.size() == 0); + sc_assert (obj.get_parent_object() == 0); + + sc_signal clk; + Top top("top"); + top.clk(clk); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test209/golden/test209.log b/src/systemc/tests/systemc/compliance_1666/test209/golden/test209.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test209/golden/test209.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test209/test209.cpp b/src/systemc/tests/systemc/compliance_1666/test209/test209.cpp new file mode 100644 index 000000000..da1066aef --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test209/test209.cpp @@ -0,0 +1,136 @@ +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 9) sc_object registered and named + +struct i_f: virtual sc_interface +{ +}; + +struct Chan: i_f, sc_object +{ + Chan() {} + Chan(const char* _n): sc_object(_n) {} +}; + +SC_MODULE(M) +{ + SC_CTOR(M) + { + SC_THREAD(T); + } + void T() + { + } +}; + +struct Top: sc_module +{ + M *m; + Top(sc_module_name) + { + m = new M("m"); + } +}; + +void check_form_of_suffix(std::string s) +{ + std::string charset = "0123456789"; + while (!s.empty()) + { + sc_assert(s[0] == '_'); + s = s.substr(1); + sc_assert(!s.empty()); + do + { + sc_assert(charset.find(s[0]) < charset.size()); + s = s.substr(1); + } while (!s.empty() && (s[0] != '_')); + } +} + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + sc_report_handler::set_actions(SC_WARNING, SC_DO_NOTHING); + + Chan ch1(""); // object + std::string s1 = std::string(ch1.name()); + sc_assert(s1.substr(0,6) == "object"); + check_form_of_suffix(s1.substr(6)); + + Chan ch2; // object_0 + const std::string s2 = std::string(ch2.name()); + sc_assert(s2.substr(0,6) == "object"); + check_form_of_suffix(s2.substr(6)); + sc_assert(s2 != s1); + + Chan ch3(s2.c_str()); // object_0_0 or object_1 + std::string s3 = std::string(ch3.name()); + sc_assert(s3.substr(0,6) == "object"); + check_form_of_suffix(s3.substr(6)); + sc_assert(s3 != s1); + sc_assert(s3 != s2); + + Chan ch4("object_2"); + std::string s4 = std::string(ch4.name()); + sc_assert(s4.substr(0,6) == "object"); + check_form_of_suffix(s4.substr(6)); + sc_assert(s4 != s1); + sc_assert(s4 != s2); + sc_assert(s4 != s3); + + Chan ch5; + std::string s5 = std::string(ch5.name()); + sc_assert(s5.substr(0,6) == "object"); + check_form_of_suffix(s5.substr(6)); + sc_assert(s5 != s1); + sc_assert(s5 != s2); + sc_assert(s5 != s3); + sc_assert(s5 != s4); + + Chan ch6(""); + std::string s6 = std::string(ch6.name()); + sc_assert(s6.substr(0,6) == "object"); + check_form_of_suffix(s6.substr(6)); + sc_assert(s6 != s1); + sc_assert(s6 != s2); + sc_assert(s6 != s3); + sc_assert(s6 != s4); + sc_assert(s6 != s5); + + sc_signal sig7("signal_0"); + std::string s7 = std::string(sig7.name()); + sc_assert(s7 == "signal_0"); + sc_assert(s7 != s1); + sc_assert(s7 != s2); + sc_assert(s7 != s3); + sc_assert(s7 != s4); + sc_assert(s7 != s5); + sc_assert(s7 != s6); + + sc_signal sig8; + std::string s8 = std::string(sig8.name()); + sc_assert(s8.substr(0,6) == "signal"); + sc_assert(s8.size() > 6); + check_form_of_suffix(s8.substr(6)); + sc_assert(s8 != s1); + sc_assert(s8 != s2); + sc_assert(s8 != s3); + sc_assert(s8 != s4); + sc_assert(s8 != s5); + sc_assert(s8 != s6); + sc_assert(s8 != s7); + + std::vector children = sc_get_top_level_objects(); + sc_assert (children.size() == 8); + + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test210/golden/test210.log b/src/systemc/tests/systemc/compliance_1666/test210/golden/test210.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test210/golden/test210.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test210/test210.cpp b/src/systemc/tests/systemc/compliance_1666/test210/test210.cpp new file mode 100644 index 000000000..d328fbefb --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test210/test210.cpp @@ -0,0 +1,120 @@ +#include +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 10) sc_find_object, sc_get_top_level_objects + +static int object_count = 0; + +void recurse_hierarchy(sc_object* obj) +{ + ++ object_count; + std::vector children = obj->get_child_objects(); + for (std::vector::iterator i = children.begin(); i != children.end(); i++) + recurse_hierarchy(*i); +} + +SC_MODULE(M) +{ + SC_CTOR(M) + : sig("sig") + { + SC_THREAD(T); + } + void T() + { + } + sc_signal sig; +}; + +SC_MODULE(Top) +{ + M *m; + SC_CTOR(Top) + { + m = new M("m"); + + sc_object* obj; + obj = sc_find_object(""); + sc_assert(obj == 0); + obj = sc_find_object("foo"); + sc_assert(obj == 0); + obj = sc_find_object("top.m.foo"); + sc_assert(obj == 0); + obj = sc_find_object("top"); + sc_assert(strcmp(obj->kind(), "sc_module") == 0); + obj = sc_find_object("top.m"); + sc_assert(strcmp(obj->kind(), "sc_module") == 0); + obj = sc_find_object("top.m.sig"); + sc_assert(strcmp(obj->kind(), "sc_signal") == 0); + obj = sc_find_object("top.m.T"); + sc_assert(sc_process_handle(obj).valid()); + sc_assert(strcmp(sc_process_handle(obj).name(), "top.m.T") == 0); + + object_count = 0; + recurse_hierarchy(m); + sc_assert(object_count == 3); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + + std::vector tops = sc_get_top_level_objects(); + sc_assert(tops.size() == 0); + + Top top("top"); + + tops = sc_get_top_level_objects(); + sc_assert(tops.size() == 1); + sc_assert(strcmp(tops[0]->name(), "top") == 0); + + M m2("m2"); + + tops = sc_get_top_level_objects(); + sc_assert(tops.size() == 2); + sc_assert(strcmp(tops[0]->name(), "top") == 0); + sc_assert(strcmp(tops[1]->name(), "m2") == 0); + + sc_signal sig("sig2"); + + tops = sc_get_top_level_objects(); + sc_assert(tops.size() == 3); + sc_assert(strcmp(tops[0]->name(), "top") == 0); + sc_assert(strcmp(tops[1]->name(), "m2") == 0); + sc_assert(strcmp(tops[2]->name(), "sig2") == 0); + + sc_object* obj; + obj = sc_find_object(""); + sc_assert(obj == 0); + obj = sc_find_object("foo"); + sc_assert(obj == 0); + obj = sc_find_object("top.m.foo"); + sc_assert(obj == 0); + obj = sc_find_object("top"); + sc_assert(strcmp(obj->kind(), "sc_module") == 0); + obj = sc_find_object("sig2"); + sc_assert(strcmp(obj->kind(), "sc_signal") == 0); + obj = sc_find_object("m2"); + sc_assert(strcmp(obj->kind(), "sc_module") == 0); + obj = sc_find_object("top.m"); + sc_assert(strcmp(obj->kind(), "sc_module") == 0); + obj = sc_find_object("top.m.sig"); + sc_assert(strcmp(obj->kind(), "sc_signal") == 0); + obj = sc_find_object("top.m.T"); + sc_assert(sc_process_handle(obj).valid()); + sc_assert(strcmp(sc_process_handle(obj).name(), "top.m.T") == 0); + + object_count = 0; + recurse_hierarchy(tops[0]); + sc_assert(object_count == 4); + + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test211/golden/test211.log b/src/systemc/tests/systemc/compliance_1666/test211/golden/test211.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test211/golden/test211.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test211/test211.cpp b/src/systemc/tests/systemc/compliance_1666/test211/test211.cpp new file mode 100644 index 000000000..e336d541b --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test211/test211.cpp @@ -0,0 +1,110 @@ +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 11) sc_is_running() + +struct my_port: sc_port > +{ + my_port() + { + sc_assert(sc_is_running() == false); + } + ~my_port() + { + sc_assert(sc_is_running() == false); + } + void before_end_of_elaboration() + { + sc_assert(sc_is_running() == false); + } + void end_of_elaboration() + { + sc_assert(sc_is_running() == false); + } + void start_of_simulation() + { + sc_assert(sc_is_running() == false); + } + void end_of_simulation() + { + sc_assert(sc_is_running() == false); + } + int read() + { + sc_assert(sc_is_running() == true); + return (*this)->read(); + } +}; + +SC_MODULE(M) +{ + my_port p; + SC_CTOR(M) + { + sc_assert(sc_is_running() == false); + SC_THREAD(T); + SC_METHOD(ME); + } + ~M() + { + sc_assert(sc_is_running() == false); + } + void T() + { + int i = p.read(); + sc_assert(sc_is_running() == true); + wait (1, SC_NS); + sc_assert(sc_is_running() == true); + wait (1, SC_NS); + sc_assert(sc_is_running() == true); + wait (1, SC_NS); + } + void ME() + { + sc_assert(sc_is_running() == true); + } + void before_end_of_elaboration() + { + sc_assert(sc_is_running() == false); + } + void end_of_elaboration() + { + sc_assert(sc_is_running() == false); + } + void start_of_simulation() + { + sc_assert(sc_is_running() == false); + } + void end_of_simulation() + { + sc_assert(sc_is_running() == false); + } +}; + +struct Top: sc_module +{ + M *m; + sc_signal sig; + Top(sc_module_name) + { + sc_assert(sc_is_running() == false); + m = new M("m"); + m->p.bind(sig); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + + sc_assert(sc_is_running() == false); + Top top("top"); + sc_assert(sc_is_running() == false); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test219/golden/test219.log b/src/systemc/tests/systemc/compliance_1666/test219/golden/test219.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test219/golden/test219.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test219/test219.cpp b/src/systemc/tests/systemc/compliance_1666/test219/test219.cpp new file mode 100644 index 000000000..0dc0f5361 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test219/test219.cpp @@ -0,0 +1,79 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 19) Call to sc_spawn in what would have been the final update phase... + +sc_event ev; + +struct Prim: sc_prim_channel, sc_interface +{ + Prim() : count(0) {} + + void write() { + request_update(); + } + void update() { + sc_spawn(sc_bind(&Prim::spawned_proc, this)); + } + void spawned_proc() + { + ++ count; + ev.notify(5, SC_NS); + } + const sc_event& default_event() const { return ev; } + int count; +}; + +SC_MODULE(M) +{ + Prim prim; + SC_CTOR(M) + : ME_count(0) + { + SC_THREAD(T); + SC_METHOD(ME); + sensitive << prim; + dont_initialize(); + } + void T() + { + wait(10, SC_NS); + prim.write(); + sc_assert(sc_time_stamp() == sc_time(10, SC_NS)); + } + void ME() + { + ++ ME_count; + sc_assert(sc_time_stamp() == sc_time(15, SC_NS)); + } + int ME_count; +}; + +struct Top: sc_module +{ + M *m; + Top(sc_module_name) + { + m = new M("m"); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + + Top top("top"); + sc_start(); + + sc_assert(top.m->prim.count == 1); + sc_assert(top.m->ME_count == 1); + + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test220/golden/test220.log b/src/systemc/tests/systemc/compliance_1666/test220/golden/test220.log new file mode 100644 index 000000000..82a7635b4 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test220/golden/test220.log @@ -0,0 +1,16 @@ +SystemC Simulation +Should be silent except for 3 fatal errors... + +Fatal: /JA: A bad thing has happened +In file: +In process: top.m.T @ 0 s + +Fatal: /JA: A bad thing has happened +In file: +In process: top.m.T @ 1 ns + +Fatal: /JA: A bad thing has happened +In file: +In process: top.m.T @ 2 ns + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test220/test220.cpp b/src/systemc/tests/systemc/compliance_1666/test220/test220.cpp new file mode 100644 index 000000000..0d25509b6 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test220/test220.cpp @@ -0,0 +1,68 @@ +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 20) sc_report_handler::stop_after(SC_FATAL,-1) should NOT call sc_stop on 1st fatal error + +static bool global_flag_1 = false; +static bool global_flag_2 = false; +static bool global_flag_3 = false; + +SC_MODULE(M) +{ + SC_CTOR(M) + { + SC_THREAD(T); + } + void T() + { + SC_REPORT_FATAL("/JA", "A bad thing has happened"); + wait(1, SC_NS); + sc_assert(sc_report_handler::get_count(SC_FATAL) == 1); + global_flag_1 = true; + + sc_report_handler::stop_after(SC_FATAL, 0); + SC_REPORT_FATAL("/JA", "A bad thing has happened"); + wait(1, SC_NS); + sc_assert(sc_report_handler::get_count(SC_FATAL) == 2); + global_flag_2 = true; + + sc_report_handler::stop_after(SC_FATAL, -1); + SC_REPORT_FATAL("/JA", "A bad thing has happened"); + wait(1, SC_NS); + sc_assert(sc_report_handler::get_count(SC_FATAL) == 3); + global_flag_3 = true; + } +}; + +struct Top: sc_module +{ + M *m; + Top(sc_module_name) + { + m = new M("m"); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent except for 3 fatal errors..." << endl; + + sc_report_handler::set_actions(SC_FATAL, SC_DISPLAY); + + Top top("top"); + sc_start(); + + sc_assert(global_flag_1); + sc_assert(global_flag_2); + sc_assert(global_flag_3); + sc_assert(sc_report_handler::get_count(SC_INFO) == 0); + sc_assert(sc_report_handler::get_count(SC_WARNING) == 0); + sc_assert(sc_report_handler::get_count(SC_ERROR) == 0); + sc_assert(sc_report_handler::get_count(SC_FATAL) == 3); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test228/golden/test228.log b/src/systemc/tests/systemc/compliance_1666/test228/golden/test228.log new file mode 100644 index 000000000..a84cdf31f --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test228/golden/test228.log @@ -0,0 +1,6 @@ +SystemC Simulation +Should be silent except for some renaming warnings... + +Info: (I703) tracing timescale unit set: 1 ns (vcd.vcd) + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test228/test228.cpp b/src/systemc/tests/systemc/compliance_1666/test228/test228.cpp new file mode 100644 index 000000000..a7cff6a6b --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test228/test228.cpp @@ -0,0 +1,107 @@ +#define SC_INCLUDE_FX + +#include + +// 28) sc_core and sc_dt - check names still visible in + +SC_MODULE(Mod) +{ + SC_CTOR(Mod) + { + SC_THREAD(T); + }; + void T() + { + sc_int<4> i; + sc_uint<4> ui; + sc_bigint<4> bi; + sc_biguint<4> bui; + sc_fixed<4,2> f; + sc_ufixed<4,2> uf; + sc_fixed_fast<4,2> ff; + sc_ufixed_fast<4,2> uff; + sc_bv<4> bv; + sc_lv<4> lv; + + sc_int_base ib; + sc_int_base uib; + sc_signed s; + sc_unsigned u; + sc_fix fi; + sc_ufix ufi; + sc_fix_fast ffi; + sc_ufix_fast uffi; + sc_logic l; + sc_bv_base bvb; + sc_lv_base lvb; + + //sc_value_base vb; + //sc_fxnum fx; + //sc_fxnum_fast fxf; + sc_fxval fxv; + sc_fxval_fast fxvf; + + sc_assert(sc_abs(-1) == 1); + sc_assert(sc_max(1, 2) == 2); + sc_assert(sc_min(1, 2) == 1); + sc_copyright(); + sc_version(); + sc_release(); + } + void f(sc_report& rpt) + { + sc_severity sev; + sev = SC_INFO; + sev = SC_WARNING; + sev = SC_ERROR; + sev = SC_FATAL; + sc_assert (sev == SC_FATAL); + + sc_actions act; + act = SC_DO_NOTHING; + } + void g(sc_exception x) {} +}; + +struct Top: sc_module +{ + Top(sc_module_name) + { + tf = sc_create_vcd_trace_file("vcd"); + tf->set_time_unit(1.0, SC_NS); + sc_trace(tf, sig, "sig"); + sc_write_comment(tf, "Hello"); + } + ~Top() + { + sc_close_vcd_trace_file(tf); + } + sc_trace_file* tf; + sc_signal sig; +}; + +int sc_main(int argc, char* argv[]) +{ +#if defined(_MSC_VER) && _MSC_VER < 1900 + _set_output_format(_TWO_DIGIT_EXPONENT); +#endif + + cout << "Should be silent except for some renaming warnings..." << endl; + + Top top("top"); + + sc_attr_base ab("base"); + sc_attribute at("attr"); + + sc_buffer bu; + sc_signal_resolved sr; + sc_fifo fi; + sc_mutex mut; + sc_semaphore sem(2); + sc_event_queue eq; + + sc_start(100, SC_NS); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test233/golden/test233.log b/src/systemc/tests/systemc/compliance_1666/test233/golden/test233.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test233/golden/test233.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test233/test233.cpp b/src/systemc/tests/systemc/compliance_1666/test233/test233.cpp new file mode 100644 index 000000000..55a2c190e --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test233/test233.cpp @@ -0,0 +1,144 @@ +#include +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 33) Process macros in (before_)end_of_elaboration + +SC_MODULE(M) +{ + SC_CTOR(M) + { + SC_THREAD(T); + } + void T() + { + } + void before_end_of_elaboration() + { + SC_THREAD(T1); + sc_process_handle h = sc_get_current_process_handle(); + sc_assert(h.valid() == true); + sc_assert(strcmp(h.name(), "top.m.T1") == 0); + sc_assert(h.proc_kind() == SC_THREAD_PROC_); + sc_assert(h.get_process_object() != 0); + std::vector children = h.get_child_objects(); + sc_assert(children.size() == 0); + sc_assert(h.get_parent_object() == this); + sc_assert(h.terminated() == false); + sc_assert(h.dynamic() == false); + + SC_METHOD(M1); + h = sc_get_current_process_handle(); + sc_assert(h.valid() == true); + sc_assert(strcmp(h.name(), "top.m.M1") == 0); + sc_assert(h.proc_kind() == SC_METHOD_PROC_); + sc_assert(h.get_process_object() != 0); + children = h.get_child_objects(); + sc_assert(children.size() == 0); + sc_assert(h.get_parent_object() == this); + sc_assert(h.terminated() == false); + sc_assert(h.dynamic() == false); + } + + void end_of_elaboration() + { + SC_THREAD(T2); + sc_process_handle h = sc_get_current_process_handle(); + sc_assert(h.valid() == true); + sc_assert(strcmp(h.name(), "top.m.T2") == 0); + sc_assert(h.proc_kind() == SC_THREAD_PROC_); + sc_assert(h.get_process_object() != 0); + std::vector children = h.get_child_objects(); + sc_assert(children.size() == 0); + sc_assert(h.get_parent_object() == this); + sc_assert(h.terminated() == false); + sc_assert(h.dynamic() == true); + + SC_METHOD(M2); + h = sc_get_current_process_handle(); + sc_assert(h.valid() == true); + sc_assert(strcmp(h.name(), "top.m.M2") == 0); + sc_assert(h.proc_kind() == SC_METHOD_PROC_); + sc_assert(h.get_process_object() != 0); + children = h.get_child_objects(); + sc_assert(children.size() == 0); + sc_assert(h.get_parent_object() == this); + sc_assert(h.terminated() == false); + sc_assert(h.dynamic() == true); + } + + void T1 () + { + sc_process_handle h = sc_get_current_process_handle(); + sc_assert(h.valid() == true); + sc_assert(strcmp(h.name(), "top.m.T1") == 0); + sc_assert(h.proc_kind() == SC_THREAD_PROC_); + sc_assert(h.get_process_object() != 0); + std::vector children = h.get_child_objects(); + sc_assert(children.size() == 0); + sc_assert(h.get_parent_object() == this); + sc_assert(h.terminated() == false); + sc_assert(h.dynamic() == false); + } + void M1 () + { + sc_process_handle h = sc_get_current_process_handle(); + sc_assert(h.valid() == true); + sc_assert(strcmp(h.name(), "top.m.M1") == 0); + sc_assert(h.proc_kind() == SC_METHOD_PROC_); + sc_assert(h.get_process_object() != 0); + std::vector children = h.get_child_objects(); + sc_assert(children.size() == 0); + sc_assert(h.get_parent_object() == this); + sc_assert(h.terminated() == false); + sc_assert(h.dynamic() == false); + } + void T2 () + { + sc_process_handle h = sc_get_current_process_handle(); + sc_assert(h.valid() == true); + sc_assert(strcmp(h.name(), "top.m.T2") == 0); + sc_assert(h.proc_kind() == SC_THREAD_PROC_); + sc_assert(h.get_process_object() != 0); + std::vector children = h.get_child_objects(); + sc_assert(children.size() == 0); + sc_assert(h.get_parent_object() == this); + sc_assert(h.terminated() == false); + sc_assert(h.dynamic() == true); + } + void M2 () + { + sc_process_handle h = sc_get_current_process_handle(); + sc_assert(h.valid() == true); + sc_assert(strcmp(h.name(), "top.m.M2") == 0); + sc_assert(h.proc_kind() == SC_METHOD_PROC_); + sc_assert(h.get_process_object() != 0); + std::vector children = h.get_child_objects(); + sc_assert(children.size() == 0); + sc_assert(h.get_parent_object() == this); + sc_assert(h.terminated() == false); + sc_assert(h.dynamic() == true); + } +}; + +struct Top: sc_module +{ + M *m; + Top(sc_module_name) + { + m = new M("m"); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test234/golden/test234.log b/src/systemc/tests/systemc/compliance_1666/test234/golden/test234.log new file mode 100644 index 000000000..6dbc6d5c7 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test234/golden/test234.log @@ -0,0 +1,6 @@ +SystemC Simulation +Should be silent... + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test234/test234.cpp b/src/systemc/tests/systemc/compliance_1666/test234/test234.cpp new file mode 100644 index 000000000..1b5467544 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test234/test234.cpp @@ -0,0 +1,110 @@ +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 34) event finder on multiport + +struct i_f: virtual sc_interface +{ + virtual const sc_event& event() const = 0; +}; + +struct Chan: i_f, sc_object +{ + virtual const sc_event& event() const { return ev; } + sc_event ev; +}; + +struct Port: sc_port +{ + sc_event_finder& find_event() const + { + return *new sc_event_finder_t( *this, &i_f::event ); + } +}; + +SC_MODULE(M) +{ + Port mp; + bool flag, flag2; + + SC_CTOR(M) + : flag(false), flag2(false) + { + SC_THREAD(T); + sensitive << mp.find_event(); + } + void T() + { + wait(); + sc_assert(sc_time_stamp() == sc_time(1, SC_NS)); + wait(); + sc_assert(sc_time_stamp() == sc_time(11, SC_NS)); + wait(); + sc_assert(sc_time_stamp() == sc_time(111, SC_NS)); + flag = true; + wait(); + flag = false; + } + void end_of_elaboration() + { + SC_THREAD(T2); + for (int i = 0; i < mp.size(); i++) + sensitive << mp[i]->event(); + } + void T2() + { + wait(); + sc_assert(sc_time_stamp() == sc_time(1, SC_NS)); + wait(); + sc_assert(sc_time_stamp() == sc_time(11, SC_NS)); + wait(); + sc_assert(sc_time_stamp() == sc_time(111, SC_NS)); + flag2 = true; + wait(); + flag2 = false; + } + void end_of_simulation() + { + sc_assert( flag ); + sc_assert( flag2 ); + } +}; + +SC_MODULE(Top) +{ + M *m; + Chan chan1, chan2, chan3; + SC_CTOR(Top) + { + m = new M("m"); + m->mp(chan1); + m->mp(chan2); + m->mp(chan3); + SC_THREAD(T); + } + void T() + { + wait(1, SC_NS); + chan1.ev.notify(); + wait(10, SC_NS); + chan2.ev.notify(); + wait(100, SC_NS); + chan3.ev.notify(); + wait(1, SC_NS); + sc_stop(); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + + Top top("top"); + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test235a/golden/test235a.log b/src/systemc/tests/systemc/compliance_1666/test235a/golden/test235a.log new file mode 100644 index 000000000..d1a84db9a --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test235a/golden/test235a.log @@ -0,0 +1,4 @@ +SystemC Simulation +Should be silent... + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test235a/test235a.cpp b/src/systemc/tests/systemc/compliance_1666/test235a/test235a.cpp new file mode 100644 index 000000000..1df0f5fde --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test235a/test235a.cpp @@ -0,0 +1,175 @@ +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 35) Port policy (correct binding) + +SC_MODULE(M) +{ + sc_port,1,SC_ONE_OR_MORE_BOUND> p1; + sc_port,2,SC_ONE_OR_MORE_BOUND> p2; + sc_port,2,SC_ONE_OR_MORE_BOUND> p3; + sc_port,0,SC_ONE_OR_MORE_BOUND> p4; + sc_port,2,SC_ZERO_OR_MORE_BOUND> p5; + sc_port,2,SC_ZERO_OR_MORE_BOUND> p6; + sc_port,2,SC_ZERO_OR_MORE_BOUND> p7; + sc_port,0,SC_ZERO_OR_MORE_BOUND> p8; + sc_port,0,SC_ZERO_OR_MORE_BOUND> p9; + sc_port,0,SC_ZERO_OR_MORE_BOUND> p10; + sc_port,1,SC_ALL_BOUND> p11; + sc_port,3,SC_ALL_BOUND> p12; + + sc_port,2,SC_ALL_BOUND> p1_all_2; + sc_port,2,SC_ALL_BOUND> p2_all_2; + sc_port,2,SC_ALL_BOUND> p3_all_2; + sc_port,5,SC_ALL_BOUND> p4_all_5; + sc_port,2,SC_ALL_BOUND> p5_all_2; + + sc_port,2,SC_ZERO_OR_MORE_BOUND> p6_zero; + sc_port,2,SC_ZERO_OR_MORE_BOUND> p7_one; + sc_port,2,SC_ZERO_OR_MORE_BOUND> p8_two; + + SC_CTOR(M) + : p1("p1"), + p2("p2"), + p3("p3"), + p4("p4"), + p5("p5"), + p6("p6"), + p7("p7"), + p8("p8"), + p9("p9"), + p10("p10"), + p11("p11"), + p12("p12"), + p1_all_2("p1_all_2"), + p2_all_2("p2_all_2"), + p3_all_2("p3_all_2"), + p4_all_5("p4_all_5"), + p5_all_2("p5_all_2"), + p6_zero("p6_zero"), + p7_one("p7_one"), + p8_two("p8_two") + {} + void end_of_elaboration() + { + sc_assert(p1.size() == 1); + sc_assert(p2.size() == 1); + sc_assert(p3.size() == 2); + sc_assert(p4.size() == 3); + sc_assert(p5.size() == 0); + sc_assert(p6.size() == 1); + sc_assert(p7.size() == 2); + sc_assert(p8.size() == 0); + sc_assert(p9.size() == 1); + sc_assert(p10.size() == 2); + sc_assert(p11.size() == 1); + sc_assert(p12.size() == 3); + + sc_assert(p1_all_2.size() == 2); + sc_assert(p2_all_2.size() == 2); + sc_assert(p3_all_2.size() == 2); + sc_assert(p4_all_5.size() == 5); + sc_assert(p5_all_2.size() == 2); + + sc_assert(p6_zero.size() == 0); + sc_assert(p7_one.size() == 1); + sc_assert(p8_two.size() == 2); + } +}; + +SC_MODULE(Top) +{ + sc_port,0,SC_ZERO_OR_MORE_BOUND> p1_twice; + sc_port,0,SC_ZERO_OR_MORE_BOUND> p2_once; + sc_port,0,SC_ZERO_OR_MORE_BOUND> p3_once; + sc_port,0,SC_ZERO_OR_MORE_BOUND> p4_unbound; + + M *m; + sc_signal sig1, sig2, sig3, sig4; + + SC_CTOR(Top) + { + m = new M("m"); + m->p1(sig1); + + m->p2(sig1); + + m->p3(sig1); + m->p3(sig2); + + m->p4(sig1); + m->p4(sig2); + m->p4(sig3); + + m->p6(sig3); + + m->p7(sig1); + m->p7(sig2); + + m->p9(sig1); + + m->p10(sig1); + m->p10(sig2); + + m->p11(sig1); + + m->p12(sig1); + m->p12(sig2); + m->p12(sig3); + + m->p1_all_2(p1_twice); + + m->p2_all_2(p2_once); + m->p2_all_2(p3_once); + + m->p3_all_2(sig1); + m->p3_all_2(p2_once); + + m->p4_all_5(p2_once); + m->p4_all_5(sig1); + m->p4_all_5(p1_twice); + m->p4_all_5(p3_once); + m->p4_all_5(p4_unbound); + + m->p5_all_2(p2_once); + m->p5_all_2(p4_unbound); + + m->p6_zero(p4_unbound); + + m->p7_one(p2_once); + + m->p8_two(p2_once); + } + void before_end_of_elaboration() + { + m->p5_all_2(p4_unbound); + m->p5_all_2(p3_once); + m->p5_all_2(p4_unbound); + + m->p6_zero(p4_unbound); + + m->p8_two(sig1); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be silent..." << endl; + + sc_signal sig1, sig2, sig3, sig4; + + Top top("top"); + top.p1_twice(sig1); + top.p1_twice(sig2); + + top.p2_once(sig3); + top.p3_once(sig4); + + sc_start(1, SC_NS); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/compliance_1666/test235b/golden/test235b.log b/src/systemc/tests/systemc/compliance_1666/test235b/golden/test235b.log new file mode 100644 index 000000000..90ff5e501 --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test235b/golden/test235b.log @@ -0,0 +1,25 @@ +SystemC Simulation +Should be 7 errors but no aborts ... + +Error: (E107) bind interface to port failed: interface already bound to port: port 'top.m.p7' (sc_port) +In file: + +Error: (E109) complete binding failed: 0 actual binds is less than required 5: port 'top.m.p6' (sc_port) +In file: + +Error: (E109) complete binding failed: 6 binds exceeds maximum of 5 allowed: port 'top.m.p5' (sc_port) +In file: + +Error: (E109) complete binding failed: 2 binds exceeds maximum of 1 allowed: port 'top.m.p4' (sc_port) +In file: + +Error: (E109) complete binding failed: 3 binds exceeds maximum of 2 allowed: port 'top.m.p3' (sc_port) +In file: + +Error: (E109) complete binding failed: 1 actual binds is less than required 2: port 'top.m.p2' (sc_port) +In file: + +Error: (E109) complete binding failed: port not bound: port 'top.m.p1' (sc_port) +In file: + +Success diff --git a/src/systemc/tests/systemc/compliance_1666/test235b/test235b.cpp b/src/systemc/tests/systemc/compliance_1666/test235b/test235b.cpp new file mode 100644 index 000000000..d5855e1cc --- /dev/null +++ b/src/systemc/tests/systemc/compliance_1666/test235b/test235b.cpp @@ -0,0 +1,92 @@ +#include +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; + +// 35) Port policy (incorrect binding) + +SC_MODULE(M) +{ + sc_port,1,SC_ONE_OR_MORE_BOUND> p1; + sc_port,2,SC_ALL_BOUND> p2; + sc_port,2,SC_ZERO_OR_MORE_BOUND> p3; + sc_port,1,SC_ONE_OR_MORE_BOUND> p4; + sc_port,5,SC_ALL_BOUND> p5; + sc_port,5,SC_ALL_BOUND> p6; + sc_port,0,SC_ZERO_OR_MORE_BOUND> p7; + + SC_CTOR(M) + : p1("p1"), + p2("p2"), + p3("p3"), + p4("p4"), + p5("p5"), + p6("p6"), + p7("p7") + {} + void end_of_elaboration() + { + sc_assert(p1.size() == 0); + sc_assert(p2.size() == 1); + sc_assert(p3.size() == 3); + sc_assert(p4.size() == 2); + sc_assert(p5.size() == 6); + sc_assert(p6.size() == 0); + sc_assert(p7.size() == 2); + } +}; + +SC_MODULE(Top) +{ + sc_port,0,SC_ZERO_OR_MORE_BOUND> p0_unbound; + sc_port,0,SC_ZERO_OR_MORE_BOUND> p1_once; + sc_port,0,SC_ZERO_OR_MORE_BOUND> p2_twice; + + M *m; + sc_signal sig1, sig2, sig3, sig4; + + SC_CTOR(Top) + { + m = new M("m"); + m->p1(p0_unbound); + + m->p2(p1_once); + + m->p3(p1_once); + m->p3(p2_twice); + + m->p4(p2_twice); + + m->p5(sig1); + m->p5(p1_once); + m->p5(sig2); + m->p5(p2_twice); + m->p5(sig3); + + m->p7(sig1); + m->p7(sig1); + } +}; + +int sc_main(int argc, char* argv[]) +{ + cout << "Should be 7 errors but no aborts ..." << endl; + + sc_report_handler::set_actions(SC_ERROR, SC_DISPLAY); + + sc_signal sig1, sig2, sig3, sig4; + + Top top("top"); + top.p1_once(sig1); + + top.p2_twice(sig2); + top.p2_twice(sig3); + + sc_start(1, SC_NS); + + sc_assert(sc_report_handler::get_count(SC_ERROR) == 7); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_bit/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/bit/sc_bit/test01/golden/test01.log new file mode 100644 index 000000000..537dd619b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_bit/test01/golden/test01.log @@ -0,0 +1,59 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: sc_bit is deprecated, use bool instead +Caught exception for sc_bit(2) +Caught exception for sc_bit('2') + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: +00101010111 +0111 +0001 +0110 +0111 +0001 +0110 +0111 +0001 +0110 +1011 +0010 +1001 +0111 +0001 +0110 +0111 +0001 +0110 +0111 +0001 +0110 +0111 +0001 +0110 +0111 +0001 +0110 +0111 +0001 +0110 +0111 +0001 +0110 +0111 +0001 +0110 +0111 +0001 +0110 +0111 +0001 +0110 + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_bit/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/bit/sc_bit/test01/test01.cpp new file mode 100644 index 000000000..e96061ac8 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_bit/test01/test01.cpp @@ -0,0 +1,235 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Joe Buck, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +void cover_sc_bit() +{ + sc_bit bdef; + sc_bit bf(false); + sc_bit bt(true); + sc_bit b0(0); + sc_bit b1(1); + try { + sc_bit foo(2); + } + catch (sc_report) { + cout << "Caught exception for sc_bit(2)\n"; + } + sc_bit bc0('0'); + sc_bit bc1('1'); + try { + sc_bit foo('2'); + } + catch (sc_report) { + cout << "Caught exception for sc_bit('2')\n"; + } + sc_bit blc0(sc_logic('0')); + sc_bit blc1(sc_logic('1')); + sc_bit blcx(sc_logic('X')); + sc_bit bcop(bt); + cout << bdef << bf << bt << b0 << b1 << bc0 << bc1 << blc0 << blc1 + << blcx << bcop << endl; + sc_bit b; + b = bt; + sc_assert(b); + b = 0; + sc_assert(!b); + b = true; + sc_assert(b.to_bool()); + b = '0'; + sc_assert(!b.to_bool()); + b = sc_logic('1'); + sc_assert(b.to_char() == '1'); + b = bf; + sc_assert(~b); + b |= bt; + sc_assert(b); + b &= bf; + sc_assert(!b); + b |= 1; + sc_assert(b); + b &= 0; + sc_assert(!b); + b |= '1'; + sc_assert(b); + b &= '0'; + sc_assert(!b); + b |= true; + sc_assert(b); + b &= false; + sc_assert(!b); + b ^= bt; + sc_assert(b); + b ^= 1; + sc_assert(!b); + b ^= '1'; + sc_assert(b); + b ^= true; + sc_assert(!b); + + sc_assert(b == bf); + sc_assert(b == 0); + sc_assert(b == '0'); + sc_assert(b == false); + b = 1; + sc_assert(b == bt); + sc_assert(b == 1); + sc_assert(b == '1'); + sc_assert(b == true); + sc_assert(1 == b); + sc_assert('1' == b); + sc_assert(true == b); + sc_assert(equal(b, bt)); + sc_assert(equal(b, 1)); + sc_assert(equal(b, '1')); + sc_assert(equal(b, true)); + sc_assert(equal(1, b)); + sc_assert(equal('1', b)); + sc_assert(equal(true, b)); + b = 0; + sc_assert(b != bt); + sc_assert(b != 1); + sc_assert(b != '1'); + sc_assert(b != true); + sc_assert(1 != b); + sc_assert('1' != b); + sc_assert(true != b); + sc_assert(not_equal(b, bt)); + sc_assert(not_equal(b, 1)); + sc_assert(not_equal(b, '1')); + sc_assert(not_equal(b, true)); + sc_assert(not_equal(1, b)); + sc_assert(not_equal('1', b)); + sc_assert(not_equal(true, b)); + + // the following assertion is incorrect, because the b_not() method + // is destructive, i.e., it implements something like b ~= void. + /// sc_assert(b == b_not(b.b_not())); + b.b_not(); + sc_assert(b); + sc_bit bx; + b_not(bx, b0); + sc_assert(bx); + b_not(bx, b1); + sc_assert(!bx); + + cout << (b0|b0) << (b0|b1) << (b1|b0) << (b1|b1) << endl; + cout << (b0&b0) << (b0&b1) << (b1&b0) << (b1&b1) << endl; + cout << (b0^b0) << (b0^b1) << (b1^b0) << (b1^b1) << endl; + + cout << (b0|0) << (b0|1) << (b1|0) << (b1|1) << endl; + cout << (b0&0) << (b0&1) << (b1&0) << (b1&1) << endl; + cout << (b0^0) << (b0^1) << (b1^0) << (b1^1) << endl; + + cout << (b0|'0') << (b0|'1') << (b1|'0') << (b1|'1') << endl; + cout << (b0&'0') << (b0&'1') << (b1&'0') << (b1&'1') << endl; + cout << (b0^'0') << (b0^'1') << (b1^'0') << (b1^'1') << endl; + + cout << (b0|true) << (b0|false) << (b1|true) << (b1|false) << endl; + cout << (b0&true) << (b0&false) << (b1&true) << (b1&false) << endl; + cout << (b0^true) << (b0^false) << (b1^true) << (b1^false) << endl; + + cout << (0|b0) << (0|b1) << (1|b0) << (1|b1) << endl; + cout << (0&b0) << (0&b1) << (1&b0) << (1&b1) << endl; + cout << (0^b0) << (0^b1) << (1^b0) << (1^b1) << endl; + + cout << ('0'|b0) << ('0'|b1) << ('1'|b0) << ('1'|b1) << endl; + cout << ('0'&b0) << ('0'&b1) << ('1'&b0) << ('1'&b1) << endl; + cout << ('0'^b0) << ('0'^b1) << ('1'^b0) << ('1'^b1) << endl; + + cout << (false|b0) << (false|b1) << (true|b0) << (true|b1) << endl; + cout << (false&b0) << (false&b1) << (true&b0) << (true&b1) << endl; + cout << (false^b0) << (false^b1) << (true^b0) << (true^b1) << endl; + + cout << b_or(b0,b0) << b_or(b0,b1) << b_or(b1,b0) << b_or(b1,b1) << endl; + cout << b_and(b0,b0) << b_and(b0,b1) << b_and(b1,b0) << b_and(b1,b1) + << endl; + cout << b_xor(b0,b0) << b_xor(b0,b1) << b_xor(b1,b0) << b_xor(b1,b1) + << endl; + + cout << b_or(b0,0) << b_or(b0,1) << b_or(b1,0) << b_or(b1,1) << endl; + cout << b_and(b0,0) << b_and(b0,1) << b_and(b1,0) << b_and(b1,1) << endl; + cout << b_xor(b0,0) << b_xor(b0,1) << b_xor(b1,0) << b_xor(b1,1) << endl; + + cout << b_or(b0,'0') << b_or(b0,'1') << b_or(b1,'0') << b_or(b1,'1') + << endl; + cout << b_and(b0,'0') << b_and(b0,'1') << b_and(b1,'0') << b_and(b1,'1') + << endl; + cout << b_xor(b0,'0') << b_xor(b0,'1') << b_xor(b1,'0') << b_xor(b1,'1') + << endl; + + cout << b_or(b0,false) << b_or(b0,true) << b_or(b1,false) << b_or(b1,true) + << endl; + cout << b_and(b0,false) << b_and(b0,true) << b_and(b1,false) + << b_and(b1,true) << endl; + cout << b_xor(b0,false) << b_xor(b0,true) << b_xor(b1,false) + << b_xor(b1,true) << endl; + + cout << b_or(0,b0) << b_or(0,b1) << b_or(1,b0) << b_or(1,b1) << endl; + cout << b_and(0,b0) << b_and(0,b1) << b_and(1,b0) << b_and(1,b1) << endl; + cout << b_xor(0,b0) << b_xor(0,b1) << b_xor(1,b0) << b_xor(1,b1) << endl; + + cout << b_or('0',b0) << b_or('0',b1) << b_or('1',b0) << b_or('1',b1) + << endl; + cout << b_and('0',b0) << b_and('0',b1) << b_and('1',b0) << b_and('1',b1) + << endl; + cout << b_xor('0',b0) << b_xor('0',b1) << b_xor('1',b0) << b_xor('1',b1) + << endl; + + cout << b_or(false,b0) << b_or(false,b1) << b_or(true,b0) << b_or(true,b1) + << endl; + cout << b_and(false,b0) << b_and(false,b1) << b_and(true,b0) + << b_and(true,b1) << endl; + cout << b_xor(false,b0) << b_xor(false,b1) << b_xor(true,b0) + << b_xor(true,b1) << endl; + + b_or(b, b0, b1); + sc_assert(b); + b_and(b, b0, b1); + sc_assert(!b); + b_xor(b, b0, b1); + sc_assert(b); +} + +int +sc_main(int, char*[]) +{ + cover_sc_bit(); + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_bitref/test01/golden/test_bitref.log b/src/systemc/tests/systemc/datatypes/bit/sc_bitref/test01/golden/test_bitref.log new file mode 100644 index 000000000..1b35a76fa --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_bitref/test01/golden/test_bitref.log @@ -0,0 +1,19 @@ +SystemC Simulation + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_bitref/test01/test_bitref.cpp b/src/systemc/tests/systemc/datatypes/bit/sc_bitref/test01/test_bitref.cpp new file mode 100644 index 000000000..5d010dbf4 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_bitref/test01/test_bitref.cpp @@ -0,0 +1,218 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test_bitref.cpp -- Test using bitrefs in boolean contexts + + Original Author: Philipp A. Hartmann, OFFIS, 2013-10-28 + +*****************************************************************************/ + +#include + +#define sc_nassert( expr ) \ + sc_assert( !(expr) ) + +using sc_dt::sc_bitref; +using sc_dt::sc_bitref_r; +using sc_dt::sc_concref; +using sc_dt::sc_concref_r; +using sc_dt::sc_subref; +using sc_dt::sc_subref_r; + +int sc_main(int,char*[]) +{ + sc_bv<8> bv = "00101010"; + sc_lv<8> lv = "1XZ01010"; + + // plain bitrefs + { + sc_nassert( bv[0] ); + sc_assert ( !bv[0] ); + // sc_assert( ~bv[0] ); // could not convert ... to ‘bool’ + sc_nassert( bv[0].to_bool() ); + sc_assert ( !bv[0].to_bool() ); + sc_assert( (~bv[0]).to_bool() ); + +#if IEEE_1666_CPLUSPLUS >= 201103L + sc_assert( bv[1] ); +#endif + sc_nassert( !bv[1] ); + sc_assert ( bv[1].to_bool() ); + sc_nassert( (~bv[1]).to_bool() ); + + sc_nassert( bv[0] == true ); + sc_assert ( bv[0] != true ); + sc_assert ( bv[0] == SC_LOGIC_0 ); + sc_nassert( bv[0].to_bool() ); + sc_assert( bv[1].to_bool() ); + sc_nassert( bv[0] != 0 ); + sc_nassert( bv[0] == bv[1] ); + sc_nassert( SC_LOGIC_1 != bv[1] ); + + sc_assert ( bv[0] == '0' ); + sc_nassert( bv[1] == '0' ); + sc_assert ( bv[1] == '1' ); + sc_nassert( bv[0] == '1' ); + + sc_nassert( bv[0] != '0' ); + sc_assert ( bv[1] != '0' ); + sc_nassert( bv[1] != '1' ); + sc_assert ( bv[0] != '1' ); + + sc_assert ( '0' == bv[0] ); + sc_nassert( '0' == bv[1] ); + sc_assert ( '1' == bv[1] ); + sc_nassert( '1' == bv[0] ); + + sc_nassert( '0' != bv[0] ); + sc_assert ( '0' != bv[1] ); + sc_nassert( '1' != bv[1] ); + sc_assert ( '1' != bv[0] ); + + sc_nassert( ~bv[0] == '0' ); + sc_assert ( ~bv[1] == '0' ); + sc_nassert( ~bv[1] == '1' ); + sc_assert ( ~bv[0] == '1' ); + + sc_assert ( ~bv[0] != '0' ); + sc_nassert( ~bv[1] != '0' ); + sc_assert ( ~bv[1] != '1' ); + sc_nassert( ~bv[0] != '1' ); + + sc_nassert( '0' == ~bv[0] ); + sc_assert ( '0' == ~bv[1] ); + sc_nassert( '1' == ~bv[1] ); + sc_assert ( '1' == ~bv[0] ); + + sc_assert ( '0' != ~bv[0] ); + sc_nassert( '0' != ~bv[1] ); + sc_assert ( '1' != ~bv[1] ); + sc_nassert( '1' != ~bv[0] ); + + + + sc_assert( bv[0] == lv[0] ); + sc_assert( bv[0] != lv[6] ); + + sc_assert( bv.or_reduce() ); + sc_assert( !bv.nor_reduce() ); + + sc_assert ( lv[0] == false ); + sc_assert ( lv[5] == SC_LOGIC_Z ); + sc_assert ( lv[6] == SC_LOGIC_X ); + sc_assert ( lv[6].value() == SC_LOGIC_X ); + + // sc_assert( ~lv[0] ); // could not convert ... to ‘bool’ + // sc_assert( lv[7] ); // could not convert ... to ‘bool’ + // sc_assert( !lv[0] ); // could not convert ... to ‘bool’ + + sc_assert( !lv[0].to_bool() ); + sc_assert( (~lv[0]).to_bool() ); + + // with warnings + sc_assert( lv[5].to_bool() ); + sc_assert( lv[6].to_bool() ); + } + + // bitrefs to subrefs + { + /* auto */ sc_subref_r< sc_bv_base > bv_range_r = bv.range(5,1); + /* auto */ sc_subref_r< sc_lv_base > lv_range_r = lv.range(6,2); + + /* auto */ sc_subref< sc_bv_base > bv_range = bv.range(5,1); + /* auto */ sc_subref< sc_lv_base > lv_range = lv.range(6,2); + +#if IEEE_1666_CPLUSPLUS >= 201103L + sc_assert( bv_range[0] ); +#endif + sc_nassert( !bv_range[0] ); + sc_assert( !bv_range[1] ); + sc_assert( (~bv_range[1]).to_bool() ); + + sc_assert( bv[1] == bv_range_r[0] ); + + bv_range[0] = false; + sc_assert( !bv[1] ); + sc_assert( bv[1] == bv_range_r[0] ); + sc_assert( bv[1] == bv_range[0] ); + + bv_range[0] = SC_LOGIC_1; +#if IEEE_1666_CPLUSPLUS >= 201103L + sc_assert( bv[1] ); +#endif + sc_assert( bv[1] == bv_range_r[0] ); + sc_assert( bv[1] == bv_range[0] ); + + // sc_assert( ~lv_range[0] ); // could not convert ... to ‘bool’ + // sc_assert( lv_range_r[7] ); // could not convert ... to ‘bool’ + + sc_assert( !lv_range_r[0].to_bool() ); + sc_assert( lv_range_r[1].to_bool() ); + sc_nassert( (~lv_range[1]).to_bool() ); + + // with warnings + sc_assert( lv_range[3].to_bool() ); + sc_assert( lv_range_r[4].to_bool() ); + } + + // bitrefs to concrefs + { + /* auto */ sc_concref< sc_concref, sc_subref > + , sc_bitref > + bv_range = ( bv.range(7,6) , bv.range(5,1), bv[1] ); + /* auto */ sc_concref_r< sc_concref_r, sc_subref > + , sc_bv_base > + lv_range_r = ( bv.range(7,6) , lv.range(6,2), true ); + +#if IEEE_1666_CPLUSPLUS >= 201103L + sc_assert( bv_range[0] ); +#endif + sc_nassert( !bv_range[0] ); + sc_assert( !bv_range[2] ); + // sc_assert( ~bv_range[2] ); // could not convert ... to ‘bool’ + + sc_assert( bv[1] == bv_range[0] ); + + bv_range[0] = false; + sc_assert( !bv[1] ); + sc_assert( bv[1] == bv_range[0] ); + + bv_range[0] = SC_LOGIC_1; +#if IEEE_1666_CPLUSPLUS >= 201103L + sc_assert( bv[1] ); +#endif + sc_assert( bv[1] == bv_range[0] ); + + // sc_assert( ~lv_range_r[0] ); // could not convert ... to ‘bool’ + // sc_assert( lv_range_r[7] ); // could not convert ... to ‘bool’ + // sc_assert( !lv_range_r[0] ); // could not convert ... to ‘bool’ + + sc_assert( lv_range_r[0].to_bool() ); + sc_assert( !lv_range_r[1].to_bool() ); + sc_assert( (~lv_range_r[1]).to_bool() ); + + // with warnings + sc_assert( lv_range_r[4].to_bool() ); + sc_assert( lv_range_r[5].to_bool() ); + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/bitwise_binary/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/bitwise_binary/test01/golden/test01.log new file mode 100644 index 000000000..faa9c66e9 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/bitwise_binary/test01/golden/test01.log @@ -0,0 +1,2 @@ +SystemC Simulation +OK diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/bitwise_binary/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/bitwise_binary/test01/test01.cpp new file mode 100644 index 000000000..9ff92df52 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/bitwise_binary/test01/test01.cpp @@ -0,0 +1,137 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the bitwise binary operators of sc_proxy + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_bv<32> bv = 10; + sc_bv<32> lv = 11; + + int I = 12; + unsigned U = 12; + + sc_bv<32> bv1; + sc_bv<32> bv2; + sc_lv<32> lv1; + sc_lv<32> lv2; + + // & + + bv1 = bv; + bv2 = bv; + bv1 &= I; + bv2 = bv2 & I; + sc_assert( bv1 == bv2 ); + + bv1 = bv; + bv2 = bv; + bv1 &= U; + bv2 = bv2 & U; + sc_assert( bv1 == bv2 ); + + lv1 = lv; + lv2 = lv; + lv1 &= I; + lv2 = lv2 & I; + sc_assert( lv1 == lv2 ); + + lv1 = lv; + lv2 = lv; + lv1 &= U; + lv2 = lv2 & U; + sc_assert( lv1 == lv2 ); + + // | + + bv1 = bv; + bv2 = bv; + bv1 |= I; + bv2 = bv2 | I; + sc_assert( bv1 == bv2 ); + + bv1 = bv; + bv2 = bv; + bv1 |= U; + bv2 = bv2 | U; + sc_assert( bv1 == bv2 ); + + lv1 = lv; + lv2 = lv; + lv1 |= I; + lv2 = lv2 | I; + sc_assert( lv1 == lv2 ); + + lv1 = lv; + lv2 = lv; + lv1 |= U; + lv2 = lv2 | U; + sc_assert( lv1 == lv2 ); + + // ^ + + bv1 = bv; + bv2 = bv; + bv1 ^= I; + bv2 = bv2 ^ I; + sc_assert( bv1 == bv2 ); + + bv1 = bv; + bv2 = bv; + bv1 ^= U; + bv2 = bv2 ^ U; + sc_assert( bv1 == bv2 ); + + lv1 = lv; + lv2 = lv; + lv1 ^= I; + lv2 = lv2 ^ I; + sc_assert( lv1 == lv2 ); + + lv1 = lv; + lv2 = lv; + lv1 ^= U; + lv2 = lv2 ^ U; + sc_assert( lv1 == lv2 ); + + cout << "OK" << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test01/golden/test01.log new file mode 100644 index 000000000..c57396dc4 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test01/golden/test01.log @@ -0,0 +1,33 @@ +SystemC Simulation +bv2a = 01 +bv2b = 10 +bv4a = 0110 +bv4a = 1001 +bv4a = 1011 +bv2a = 10 +bv4a = 1101 +bv2a = 01 +bv4a = 1111 +bv4b = 1001 +bv2a = 00 +bv2b = 11 +bv4a = 0011 +bv4a = 1100 +bv2a = 11 +bv2b = 00 +bv2a = 01 +bv2b = 10 +bv4a = 0000 +bv4b = 1111 +bv2a = 00 +bv2b = 11 +bv4a = 0110 +bv4a = 0000 +bv2a = 11 +bv2b = 00 +11111010 +10101111 +00001 +10000 +00001 +10000 diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test01/test01.cpp new file mode 100644 index 000000000..9028946e7 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test01/test01.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Andy Goodrich, Forte Design Systemc, 2003-01-17 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of r-value and l-value concatenation -- use operator , () + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_bv<2> bv2a; + sc_bv<2> bv2b; + const sc_bv<2> bv2c( "10" ); + const sc_bv<2> bv2d( "01" ); + sc_bv<4> bv4a; + sc_bv<4> bv4b( "1111" ); + + ( bv2a, bv2b ) = "0110"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + + bv4a = ( bv2a, bv2b ); + cout << "bv4a = " << bv4a << endl; + + bv4a = ( bv2c, bv2d ); + cout << "bv4a = " << bv4a << endl; + + ( bv4a.range( 2, 1 ), bv2a ) = "0110"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + + ( bv2a, bv4a.range( 1, 2 ) ) = "0101"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + + ( bv4a.range( 2, 1 ), bv4b.range( 2, 1 ) ) = "1100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv4b = " << bv4b << endl; + + ( ( bv2a, bv2b ), bv4a ) = "00110011"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + cout << "bv4a = " << bv4a << endl; + + ( bv4a, ( bv2a, bv2b ) ) = "11001100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + + ( ( bv2a, bv2b ), ( bv4a, bv4b ) ) = "011000001111"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + cout << "bv4a = " << bv4a << endl; + cout << "bv4b = " << bv4b << endl; + + ( ( bv2a, bv2b ), bv4a.range( 2, 1 ) ) = "001111"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + cout << "bv4a = " << bv4a << endl; + + ( bv4a.range( 2, 1 ), ( bv2a, bv2b ) ) = "001100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + + const char* s = "1010"; + sc_logic l = SC_LOGIC_1; + bool b = true; + + cout << ( bv4b, s ) << endl; + cout << ( s, bv4b ) << endl; + cout << ( bv4a, l ) << endl; + cout << ( l, bv4a ) << endl; + cout << ( bv4a, b ) << endl; + cout << ( b, bv4a ) << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test02/golden/test02.log new file mode 100644 index 000000000..c57396dc4 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test02/golden/test02.log @@ -0,0 +1,33 @@ +SystemC Simulation +bv2a = 01 +bv2b = 10 +bv4a = 0110 +bv4a = 1001 +bv4a = 1011 +bv2a = 10 +bv4a = 1101 +bv2a = 01 +bv4a = 1111 +bv4b = 1001 +bv2a = 00 +bv2b = 11 +bv4a = 0011 +bv4a = 1100 +bv2a = 11 +bv2b = 00 +bv2a = 01 +bv2b = 10 +bv4a = 0000 +bv4b = 1111 +bv2a = 00 +bv2b = 11 +bv4a = 0110 +bv4a = 0000 +bv2a = 11 +bv2b = 00 +11111010 +10101111 +00001 +10000 +00001 +10000 diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test02/test02.cpp new file mode 100644 index 000000000..35e83cf6a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test02/test02.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 2003-01-17 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of r-value and l-value concatenation -- use concat() + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_bv<2> bv2a; + sc_bv<2> bv2b; + const sc_bv<2> bv2c( "10" ); + const sc_bv<2> bv2d( "01" ); + sc_bv<4> bv4a; + sc_bv<4> bv4b( "1111" ); + + concat( bv2a, bv2b ) = "0110"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + + bv4a = concat( bv2a, bv2b ); + cout << "bv4a = " << bv4a << endl; + + bv4a = concat( bv2c, bv2d ); + cout << "bv4a = " << bv4a << endl; + + concat( bv4a.range( 2, 1 ), bv2a ) = "0110"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + + concat( bv2a, bv4a.range( 1, 2 ) ) = "0101"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + + concat( bv4a.range( 2, 1 ), bv4b.range( 2, 1 ) ) = "1100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv4b = " << bv4b << endl; + + concat( concat( bv2a, bv2b ), bv4a ) = "00110011"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + cout << "bv4a = " << bv4a << endl; + + concat( bv4a, concat( bv2a, bv2b ) ) = "11001100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + + concat( concat( bv2a, bv2b ), concat( bv4a, bv4b ) ) = "011000001111"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + cout << "bv4a = " << bv4a << endl; + cout << "bv4b = " << bv4b << endl; + + concat( concat( bv2a, bv2b ), bv4a.range( 2, 1 ) ) = "001111"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + cout << "bv4a = " << bv4a << endl; + + concat( bv4a.range( 2, 1 ), concat( bv2a, bv2b ) ) = "001100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + + const char* s = "1010"; + sc_logic l = SC_LOGIC_1; + bool b = true; + + cout << concat( bv4b, s ) << endl; + cout << concat( s, bv4b ) << endl; + cout << concat( bv4a, l ) << endl; + cout << concat( l, bv4a ) << endl; + cout << concat( bv4a, b ) << endl; + cout << concat( b, bv4a ) << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test03/golden/test03.log new file mode 100644 index 000000000..a46c785ff --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test03/golden/test03.log @@ -0,0 +1,35 @@ +SystemC Simulation + +6666555555555544444444443333333333222222222211111111110000000000 +3210987654321098765432109876543210987654321098765432109876543210 +---------------------------------------------------------------- +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX lv1 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX lv2 + (lv1[33], lv2[34]) = 0 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXX0XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX lv1 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXX0XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX lv2 +lv1[43].set_cword(0, 0) +XXXXXXXXXXXXXXXXXXXX1XXXXXXXXX0XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX lv1 +lv2[44].set_word(0, 0) +XXXXXXXXXXXXXXXXXXXZXXXXXXXXX0XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX lv2 +(lv1,lv2[9]) = 0 +0000000000000000000000000000000000000000000000000000000000000000 lv1 +XXXXXXXXXXXXXXXXXXXZXXXXXXXXX0XXXXXXXXXXXXXXXXXXXXXXXX0XXXXXXXXX lv2 +(lv2[9], lv1) = -1ll +1111111111111111111111111111111111111111111111111111111111111111 lv1 +XXXXXXXXXXXXXXXXXXXZXXXXXXXXX0XXXXXXXXXXXXXXXXXXXXXXXX1XXXXXXXXX lv2 + +0000000000000000000000000000000000000000000000000000000000000000 bv1 +0000000000000000000000000000000000000000000000000000000000000000 bv2 +(bv1[33], bv2[34]) = 3 +0000000000000000000000000000001000000000000000000000000000000000 bv1 +0000000000000000000000000000010000000000000000000000000000000000 bv2 +bv1[43].set_word(0, 1) +0000000000000000000010000000001000000000000000000000000000000000 bv1 +(bv1,bv2[9]) = 0 +0000000000000000000000000000000000000000000000000000000000000000 bv1 +0000000000000000000000000000010000000000000000000000000000000000 bv2 +(bv2[9], bv1) = -1ll +1111111111111111111111111111111111111111111111111111111111111111 bv1 +0000000000000000000000000000010000000000000000000000001000000000 bv2 +Program completed diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test03/test03.cpp new file mode 100644 index 000000000..1c30c19d9 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/concat/test03/test03.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 2003-01-17 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test and l-value bit selection concatenation on sc_lv and sc_bv +// also test set_word() and set_cword on bit selections + +#include "systemc.h" + +int sc_main(int argc, char* argv[]) +{ + sc_bv<64> bv1; + sc_bv<64> bv2; + sc_lv<64> lv1; + sc_lv<64> lv2; + + cout << endl; + cout << "6666555555555544444444443333333333222222222211111111110000000000" + << endl; + cout << "3210987654321098765432109876543210987654321098765432109876543210" + << endl; + cout << "----------------------------------------------------------------" + << endl; + + // LV SUPPORT: + + cout << lv1 << " lv1" << endl; + cout << lv2 << " lv2 " << endl; + + cout << " (lv1[33], lv2[34]) = 0 " << endl; + (lv1[33], lv2[34]) = 0; + cout << lv1 << " lv1" << endl; + cout << lv2 << " lv2 " << endl; + + cout << "lv1[43].set_cword(0, 0) " << endl; + lv1[43].set_cword(0, 0); + cout << lv1 << " lv1" << endl; + + cout << "lv2[44].set_word(0, 0)" << endl; + lv2[44].set_word(0, 0); + cout << lv2 << " lv2" << endl; + + cout << "(lv1,lv2[9]) = 0" << endl; + (lv1,lv2[9]) = 0; + cout << lv1 << " lv1 " << endl; + cout << lv2 << " lv2 " << endl; + + cout << "(lv2[9], lv1) = -1ll" << endl; + (lv2[9], lv1) = -1ll; + cout << lv1 << " lv1 " << endl; + cout << lv2 << " lv2 " << endl; + + + // BV SUPPORT: + + cout << endl; + cout << bv1 << " bv1" << endl; + cout << bv2 << " bv2" << endl; + + cout << "(bv1[33], bv2[34]) = 3" << endl; + (bv1[33], bv2[34]) = 3; + cout << bv1 << " bv1" << endl; + cout << bv2 << " bv2" << endl; + + cout << "bv1[43].set_word(0, 1)" << endl; + bv1[43].set_word(0, 1); + cout << bv1 << " bv1" << endl; + + + cout << "(bv1,bv2[9]) = 0" << endl; + (bv1,bv2[9]) = 0; + cout << bv1 << " bv1" << endl; + cout << bv2 << " bv2 " << endl; + + cout << "(bv2[9], bv1) = -1ll" << endl; + (bv2[9], bv1) = -1ll; + cout << bv1 << " bv1" << endl; + cout << bv2 << " bv2 " << endl; + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/test01/golden/test01.log new file mode 100644 index 000000000..1d06f278b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/test01/golden/test01.log @@ -0,0 +1,498 @@ +SystemC Simulation +*** test_ctors +sc_bv_base() +32 +00000000000000000000000000000000 +sc_bv_base( int ) +3 +000 +sc_bv_base( bool ) +32 +11111111111111111111111111111111 +sc_bv_base( bool, int ) +3 +111 +sc_bv_base( const char* ) +4 +0101 +4 +1010 +4 +0101 +4 +1010 +sc_bv_base( const char*, int ) +3 +101 +4 +0101 +5 +00101 +3 +010 +4 +1010 +5 +01010 +3 +101 +4 +0101 +5 +00101 +3 +010 +4 +1010 +5 +11010 +sc_bv_base( const sc_proxy& ) + +Warning: (W207) sc_bv cannot contain values X and Z +In file: +4 +0101 +sc_bv_base( const sc_bv_base& ) +4 +0110 +*** test_bitwise_complement +sc_bv_base::b_not() +4 +0110 +4 +1001 +sc_bv_base::operator ~ () const +4 +0110 +4 +1001 +sc_lv_base::b_not() +4 +01ZX +4 +10XX +sc_lv_base::operator ~ () const +4 +01ZX +4 +10XX +sc_proxy::b_not() +4 +01ZX +4 +10XX +sc_proxy::operator ~ () const +4 +01ZX +4 +10XX +*** test_bitwise_and +*** test_bitwise_or +*** test_bitwise_xor +*** test_bitwise_left_shift +sc_bv_base::operator <<= ( int ) +70 +1111111111111111111111111111111111111111111111111111111111111111111110 + +caught exception +Error: (E5) out of bounds: left shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +1111111111111111111111111111111111111111111111111111111111111111110000 +70 +1111111111111111111111111111111110000000000000000000000000000000000000 +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_bv_base::operator << ( int ) const +70 +1111111111111111111111111111111111111111111111111111111111111111111110 + +caught exception +Error: (E5) out of bounds: left shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +1111111111111111111111111111111111111111111111111111111111111111110000 +70 +1111111111111111111111111111111111110000000000000000000000000000000000 +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_lv_base::operator <<= ( int ) +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ + +caught exception +Error: (E5) out of bounds: left shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ000 +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ000000000000000000000000000000000000 +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_lv_base::operator << ( int ) const +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ + +caught exception +Error: (E5) out of bounds: left shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ000 +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ000000000000000000000000000000000 +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_proxy::operator <<= ( int ) +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ + +caught exception +Error: (E5) out of bounds: left shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ000 +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ000000000000000000000000000000000000 +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_proxy::operator << ( int ) const +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ + +caught exception +Error: (E5) out of bounds: left shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ000 +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ000000000000000000000000000000000 +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +*** test_bitwise_right_shift +sc_bv_base::operator >>= ( int ) +70 +0111111111111111111111111111111111111111111111111111111111111111111111 + +caught exception +Error: (E5) out of bounds: right shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +0000111111111111111111111111111111111111111111111111111111111111111111 +70 +0000000000000000000000000000000000000111111111111111111111111111111111 +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_bv_base::operator >> ( int ) const +70 +0111111111111111111111111111111111111111111111111111111111111111111111 + +caught exception +Error: (E5) out of bounds: right shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +0000111111111111111111111111111111111111111111111111111111111111111111 +70 +0000000000000000000000000000000000111111111111111111111111111111111111 +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_lv_base::operator >>= ( int ) +70 +ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX + +caught exception +Error: (E5) out of bounds: right shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +000ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +000000000000000000000000000000000000ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_lv_base::operator >> ( int ) const +70 +ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX + +caught exception +Error: (E5) out of bounds: right shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +000ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +000000000000000000000000000000000ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_proxy::operator >>= ( int ) +70 +ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX + +caught exception +Error: (E5) out of bounds: right shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +000ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +000000000000000000000000000000000000ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +sc_proxy::operator >> ( int ) const +70 +ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX + +caught exception +Error: (E5) out of bounds: right shift operation is only allowed with positive shift values, shift value = -1 +In file: +70 +000ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +000000000000000000000000000000000ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +0000000000000000000000000000000000000000000000000000000000000000000000 +*** test_bitwise_left_rotate +sc_bv_base::lrotate( int ) +70 +1111111111111111111111111111111111111111111111111111111111111111111110 + +caught exception +Error: (E5) out of bounds: left rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +1111111111111111111111111111111111111111111111111111111111111111110111 +70 +1111111111111111111111111111111110111111111111111111111111111111111111 +70 +1111111111111111111111111111111011111111111111111111111111111111111111 +lrotate( const sc_bv_base&, int ) +70 +1111111111111111111111111111111111111111111111111111111111111111111110 + +caught exception +Error: (E5) out of bounds: left rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +1111111111111111111111111111111111111111111111111111111111111111110111 +70 +1111111111111111111111111111111111110111111111111111111111111111111111 +70 +1111111111111111111111111111111111111111111111111111111111111111111011 +sc_lv_base::lrotate( int ) +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ + +caught exception +Error: (E5) out of bounds: left rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +lrotate( const sc_lv_base&, int ) +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ + +caught exception +Error: (E5) out of bounds: left rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXX +sc_proxy::lrotate( int ) +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ + +caught exception +Error: (E5) out of bounds: left rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +lrotate( const sc_proxy&, int ) +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZ + +caught exception +Error: (E5) out of bounds: left rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXX +*** test_bitwise_right_rotate +sc_bv_base::rrotate( int ) +70 +0111111111111111111111111111111111111111111111111111111111111111111111 + +caught exception +Error: (E5) out of bounds: right rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +1110111111111111111111111111111111111111111111111111111111111111111111 +70 +1111111111111111111111111111111111110111111111111111111111111111111111 +70 +1111111111111111111111111111111111111101111111111111111111111111111111 +rrotate( const sc_bv_base&, int ) +70 +0111111111111111111111111111111111111111111111111111111111111111111111 + +caught exception +Error: (E5) out of bounds: right rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +1110111111111111111111111111111111111111111111111111111111111111111111 +70 +1111111111111111111111111111111110111111111111111111111111111111111111 +70 +1101111111111111111111111111111111111111111111111111111111111111111111 +sc_lv_base::rrotate( int ) +70 +ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX + +caught exception +Error: (E5) out of bounds: right rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +XXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +rrotate( const sc_lv_base&, int ) +70 +ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX + +caught exception +Error: (E5) out of bounds: right rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +XXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +sc_proxy::rrotate( int ) +70 +ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX + +caught exception +Error: (E5) out of bounds: right rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +XXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +rrotate( const sc_proxy&, int ) +70 +ZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX + +caught exception +Error: (E5) out of bounds: right rotate operation is only allowed with positive rotate values, rotate value = -1 +In file: +70 +XXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +70 +XXZXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX +*** test_bitwise_reverse +sc_bv_base::reverse() +7 +1111000 +7 +0001111 +8 +11110000 +8 +00001111 +reverse( const sc_bv_base& ) +7 +1111000 +7 +0001111 +8 +11110000 +8 +00001111 +sc_lv_base::reverse() +7 +01ZX01Z +7 +Z10XZ10 +8 +01ZX01ZX +8 +XZ10XZ10 +reverse( const sc_lv_base& ) +7 +01ZX01Z +7 +Z10XZ10 +8 +01ZX01ZX +8 +XZ10XZ10 +sc_proxy::reverse() +8 +01ZX01ZX +8 +XZ10XZ10 +8 +01ZX01ZX +reverse( const sc_proxy& ) +8 +01ZX01ZX +8 +XZ10XZ10 +8 +01ZX01ZX +*** test_string_conversions +sc_bv_base +11111111 +0b011111111 +0bus11111111 +0bsm11111111 +0o377 +0ous377 +0osm377 +0x0ff +0xusff +0xsmff +0d255 +0csd10000000- +sc_lv_base +11111111 +0b011111111 +0bus11111111 +0bsm11111111 +0o377 +0ous377 +0osm377 +0x0ff +0xusff +0xsmff +0d255 +0csd10000000- +sc_proxy +11111111 +0b011111111 +0bus11111111 +0bsm11111111 +0o377 +0ous377 +0osm377 +0x0ff +0xusff +0xsmff +0d255 +0csd10000000- diff --git a/src/systemc/tests/systemc/datatypes/bit/sc_proxy/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/test01/test01.cpp new file mode 100644 index 000000000..12941d7ae --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/bit/sc_proxy/test01/test01.cpp @@ -0,0 +1,1014 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WRITE(a) \ + cout << a.length() << endl; \ + cout << a << endl + +void +test_ctors() +{ + cout << "*** test_ctors" << endl; + { + cout << "sc_bv_base()" << endl; + + sc_bv_base a; + WRITE( a ); + } + { + cout << "sc_bv_base( int )" << endl; + + sc_bv_base a( 3 ); + WRITE( a ); + } + { + cout << "sc_bv_base( bool )" << endl; + + sc_bv_base a( true ); + WRITE( a ); + } + { + cout << "sc_bv_base( bool, int )" << endl; + + sc_bv_base a( true, 3 ); + WRITE( a ); + } + { + cout << "sc_bv_base( const char* )" << endl; + + sc_bv_base a( "0101" ); + WRITE( a ); + sc_bv_base b( "1010" ); + WRITE( b ); + sc_bv_base c( "0b0101" ); + WRITE( c ); + sc_bv_base d( "0b1010" ); + WRITE( d ); + } + { + cout << "sc_bv_base( const char*, int )" << endl; + + sc_bv_base a3( "0101", 3 ); + WRITE( a3 ); + sc_bv_base a4( "0101", 4 ); + WRITE( a4 ); + sc_bv_base a5( "0101", 5 ); + WRITE( a5 ); + + sc_bv_base b3( "1010", 3 ); + WRITE( b3 ); + sc_bv_base b4( "1010", 4 ); + WRITE( b4 ); + sc_bv_base b5( "1010", 5 ); + WRITE( b5 ); + + sc_bv_base c3( "0b0101", 3 ); + WRITE( c3 ); + sc_bv_base c4( "0b0101", 4 ); + WRITE( c4 ); + sc_bv_base c5( "0b0101", 5 ); + WRITE( c5 ); + + sc_bv_base d3( "0b1010", 3 ); + WRITE( d3 ); + sc_bv_base d4( "0b1010", 4 ); + WRITE( d4 ); + sc_bv_base d5( "0b1010", 5 ); + WRITE( d5 ); + } + { + cout << "sc_bv_base( const sc_proxy& )" << endl; + + sc_lv<4> x( "01ZX" ); + sc_bv_base a( x ); + WRITE( a ); + } + { + cout << "sc_bv_base( const sc_bv_base& )" << endl; + + sc_bv<4> x( "0110" ); + sc_bv_base a( x ); + WRITE( a ); + } +} + +void +test_bitwise_complement() +{ + cout << "*** test_bitwise_complement" << endl; + { + cout << "sc_bv_base::b_not()" << endl; + + sc_bv_base a( "0110", 4 ); + WRITE( a ); + a.b_not(); + WRITE( a ); + } + { + cout << "sc_bv_base::operator ~ () const" << endl; + + sc_bv_base a( "0110", 4 ); + WRITE( a ); + sc_bv_base b( 4 ); + b = ~a; + WRITE( b ); + } + { + cout << "sc_lv_base::b_not()" << endl; + + sc_lv_base a( "01ZX", 4 ); + WRITE( a ); + a.b_not(); + WRITE( a ); + } + { + cout << "sc_lv_base::operator ~ () const" << endl; + + sc_lv_base a( "01ZX", 4 ); + WRITE( a ); + sc_lv_base b( 4 ); + b = ~a; + WRITE( b ); + } + { + cout << "sc_proxy::b_not()" << endl; + + sc_lv_base a( "01ZX", 4 ); + WRITE( a ); + (a( 3, 2 ), a( 1, 0 )).b_not(); + WRITE( a ); + } + { + cout << "sc_proxy::operator ~ () const" << endl; + + sc_lv_base a( "01ZX", 4 ); + WRITE( a ); + sc_lv_base b( 4 ); + b = ~(a( 3, 2 ), a( 1, 0 )); + WRITE( b ); + } +} + +void +test_bitwise_and() +{ + cout << "*** test_bitwise_and" << endl; +} + +void +test_bitwise_or() +{ + cout << "*** test_bitwise_or" << endl; +} + +void +test_bitwise_xor() +{ + cout << "*** test_bitwise_xor" << endl; +} + +void +test_bitwise_left_shift() +{ + cout << "*** test_bitwise_left_shift" << endl; + { + cout << "sc_bv_base::operator <<= ( int )" << endl; + + sc_bv_base a( 1, 70 ); + a[0] = 0; + WRITE( a ); + try { + a <<= -1; + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + a <<= 3; + WRITE( a ); + a <<= 33; + WRITE( a ); + a <<= 72; + WRITE( a ); + } + { + cout << "sc_bv_base::operator << ( int ) const" << endl; + + sc_bv_base a( 1, 70 ); + a[0] = 0; + WRITE( a ); + sc_bv_base b( 70 ); + try { + b = a << -1; + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = a << 3; + WRITE( b ); + b = a << 33; + WRITE( b ); + b = a << 72; + WRITE( b ); + } + { + cout << "sc_lv_base::operator <<= ( int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[0] = SC_LOGIC_Z; + WRITE( a ); + try { + a <<= -1; + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + a <<= 3; + WRITE( a ); + a <<= 33; + WRITE( a ); + a <<= 72; + WRITE( a ); + } + { + cout << "sc_lv_base::operator << ( int ) const" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[0] = SC_LOGIC_Z; + WRITE( a ); + sc_lv_base b( 70 ); + try { + b = a << -1; + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = a << 3; + WRITE( b ); + b = a << 33; + WRITE( b ); + b = a << 72; + WRITE( b ); + } + { + cout << "sc_proxy::operator <<= ( int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[0] = SC_LOGIC_Z; + WRITE( a ); + try { + (a( 69, 20 ), a( 19, 0 )) <<= -1; + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + // FIX ME: BUG, the following two operations result in 0XX.. + (a( 69, 20 ), a( 19, 0 )) <<= 3; + WRITE( a ); + (a( 69, 20 ), a( 19, 0 )) <<= 33; + WRITE( a ); + (a( 69, 20 ), a( 19, 0 )) <<= 72; + WRITE( a ); + } + { + cout << "sc_proxy::operator << ( int ) const" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[0] = SC_LOGIC_Z; + WRITE( a ); + sc_lv_base b( 70 ); + try { + b = (a( 69, 20 ), a( 19, 0 )) << -1; + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = (a( 69, 20 ), a( 19, 0 )) << 3; + WRITE( b ); + b = (a( 69, 20 ), a( 19, 0 )) << 33; + WRITE( b ); + b = (a( 69, 20 ), a( 19, 0 )) << 72; + WRITE( b ); + } +} + +void +test_bitwise_right_shift() +{ + cout << "*** test_bitwise_right_shift" << endl; + { + cout << "sc_bv_base::operator >>= ( int )" << endl; + + sc_bv_base a( 1, 70 ); + a[69] = 0; + WRITE( a ); + try { + a >>= -1; + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + a >>= 3; + WRITE( a ); + a >>= 33; + WRITE( a ); + a >>= 72; + WRITE( a ); + } + { + cout << "sc_bv_base::operator >> ( int ) const" << endl; + + sc_bv_base a( 1, 70 ); + a[69] = 0; + WRITE( a ); + sc_bv_base b( 70 ); + try { + b = a >> -1; + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = a >> 3; + WRITE( b ); + b = a >> 33; + WRITE( b ); + b = a >> 72; + WRITE( b ); + } + { + cout << "sc_lv_base::operator >>= ( int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[69] = SC_LOGIC_Z; + WRITE( a ); + try { + a >>= -1; + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + a >>= 3; + WRITE( a ); + a >>= 33; + WRITE( a ); + a >>= 72; + WRITE( a ); + } + { + cout << "sc_lv_base::operator >> ( int ) const" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[69] = SC_LOGIC_Z; + WRITE( a ); + sc_lv_base b( 70 ); + try { + b = a >> -1; + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = a >> 3; + WRITE( b ); + b = a >> 33; + WRITE( b ); + b = a >> 72; + WRITE( b ); + } + { + cout << "sc_proxy::operator >>= ( int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[69] = SC_LOGIC_Z; + WRITE( a ); + try { + (a( 69, 20 ), a( 19, 0 )) >>= -1; + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + (a( 69, 20 ), a( 19, 0 )) >>= 3; + WRITE( a ); + (a( 69, 20 ), a( 19, 0 )) >>= 33; + WRITE( a ); + (a( 69, 20 ), a( 19, 0 )) >>= 72; + WRITE( a ); + } + { + cout << "sc_proxy::operator >> ( int ) const" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[69] = SC_LOGIC_Z; + WRITE( a ); + sc_lv_base b( 70 ); + try { + b = (a( 69, 20 ), a( 19, 0 )) >> -1; + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = (a( 69, 20 ), a( 19, 0 )) >> 3; + WRITE( b ); + b = (a( 69, 20 ), a( 19, 0 )) >> 33; + WRITE( b ); + b = (a( 69, 20 ), a( 19, 0 )) >> 72; + WRITE( b ); + } +} + +void +test_bitwise_left_rotate() +{ + cout << "*** test_bitwise_left_rotate" << endl; + { + cout << "sc_bv_base::lrotate( int )" << endl; + + sc_bv_base a( 1, 70 ); + a[0] = 0; + WRITE( a ); + try { + a.lrotate( -1 ); + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + a.lrotate( 3 ); + WRITE( a ); + a.lrotate( 33 ); + WRITE( a ); + a.lrotate( 72 ); + WRITE( a ); + } + { + cout << "lrotate( const sc_bv_base&, int )" << endl; + + sc_bv_base a( 1, 70 ); + a[0] = 0; + WRITE( a ); + sc_bv_base b( 70 ); + try { + b = lrotate( a, -1 ); + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = lrotate( a, 3 ); + WRITE( b ); + b = lrotate( a, 33 ); + WRITE( b ); + b = lrotate( a, 72 ); + WRITE( b ); + } + { + cout << "sc_lv_base::lrotate( int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[0] = SC_LOGIC_Z; + WRITE( a ); + try { + a.lrotate( -1 ); + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + a.lrotate( 3 ); + WRITE( a ); + a.lrotate( 33 ); + WRITE( a ); + a.lrotate( 72 ); + WRITE( a ); + } + { + cout << "lrotate( const sc_lv_base&, int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[0] = SC_LOGIC_Z; + WRITE( a ); + sc_lv_base b( 70 ); + try { + b = lrotate( a, -1 ); + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = lrotate( a, 3 ); + WRITE( b ); + b = lrotate( a, 33 ); + WRITE( b ); + b = lrotate( a, 72 ); + WRITE( b ); + } + { + cout << "sc_proxy::lrotate( int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[0] = SC_LOGIC_Z; + WRITE( a ); + try { + (a( 69, 20 ), a( 19, 0 )).lrotate( -1 ); + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + (a( 69, 20 ), a( 19, 0 )).lrotate( 3 ); + WRITE( a ); + (a( 69, 20 ), a( 19, 0 )).lrotate( 33 ); + WRITE( a ); + (a( 69, 20 ), a( 19, 0 )).lrotate( 72 ); + WRITE( a ); + } + { + cout << "lrotate( const sc_proxy&, int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[0] = SC_LOGIC_Z; + WRITE( a ); + sc_lv_base b( 70 ); + try { + b = lrotate( (a( 69, 20 ), a( 19, 0 )), -1 ); + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = lrotate( (a( 69, 20 ), a( 19, 0 )), 3 ); + WRITE( b ); + b = lrotate( (a( 69, 20 ), a( 19, 0 )), 33 ); + WRITE( b ); + b = lrotate( (a( 69, 20 ), a( 19, 0 )), 72 ); + WRITE( b ); + } +} + +void +test_bitwise_right_rotate() +{ + cout << "*** test_bitwise_right_rotate" << endl; + { + cout << "sc_bv_base::rrotate( int )" << endl; + + sc_bv_base a( 1, 70 ); + a[69] = 0; + WRITE( a ); + try { + a.rrotate( -1 ); + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + a.rrotate( 3 ); + WRITE( a ); + a.rrotate( 33 ); + WRITE( a ); + a.rrotate( 72 ); + WRITE( a ); + } + { + cout << "rrotate( const sc_bv_base&, int )" << endl; + + sc_bv_base a( 1, 70 ); + a[69] = 0; + WRITE( a ); + sc_bv_base b( 70 ); + try { + b = rrotate( a, -1 ); + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = rrotate( a, 3 ); + WRITE( b ); + b = rrotate( a, 33 ); + WRITE( b ); + b = rrotate( a, 72 ); + WRITE( b ); + } + { + cout << "sc_lv_base::rrotate( int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[69] = SC_LOGIC_Z; + WRITE( a ); + try { + a.rrotate( -1 ); + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + a.rrotate( 3 ); + WRITE( a ); + a.rrotate( 33 ); + WRITE( a ); + a.rrotate( 72 ); + WRITE( a ); + } + { + cout << "rrotate( const sc_lv_base&, int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[69] = SC_LOGIC_Z; + WRITE( a ); + sc_lv_base b( 70 ); + try { + b = rrotate( a, -1 ); + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = rrotate( a, 3 ); + WRITE( b ); + b = rrotate( a, 33 ); + WRITE( b ); + b = rrotate( a, 72 ); + WRITE( b ); + } + { + cout << "sc_proxy::rrotate( int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[69] = SC_LOGIC_Z; + WRITE( a ); + try { + (a( 69, 20 ), a( 19, 0 )).rrotate( -1 ); + WRITE( a ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + // FIX ME: BUG, the following three operations result in 0XX.. + (a( 69, 20 ), a( 19, 0 )).rrotate( 3 ); + WRITE( a ); + (a( 69, 20 ), a( 19, 0 )).rrotate( 33 ); + WRITE( a ); + (a( 69, 20 ), a( 19, 0 )).rrotate( 72 ); + WRITE( a ); + } + { + cout << "rrotate( const sc_proxy&, int )" << endl; + + sc_lv_base a( SC_LOGIC_X, 70 ); + a[69] = SC_LOGIC_Z; + WRITE( a ); + sc_lv_base b( 70 ); + try { + b = rrotate( (a( 69, 20 ), a( 19, 0 )), -1 ); + WRITE( b ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + b = rrotate( (a( 69, 20 ), a( 19, 0 )), 3 ); + WRITE( b ); + b = rrotate( (a( 69, 20 ), a( 19, 0 )), 33 ); + WRITE( b ); + b = rrotate( (a( 69, 20 ), a( 19, 0 )), 72 ); + WRITE( b ); + } +} + +void +test_bitwise_reverse() +{ + cout << "*** test_bitwise_reverse" << endl; + { + cout << "sc_bv_base::reverse()" << endl; + + sc_bv_base a( "1111000", 7 ); + WRITE( a ); + a.reverse(); + WRITE( a ); + sc_bv_base b( "11110000", 8 ); + WRITE( b ); + b.reverse(); + WRITE( b ); + } + { + cout << "reverse( const sc_bv_base& )" << endl; + + sc_bv_base a( "1111000", 7 ); + WRITE( a ); + sc_bv_base b( 7 ); + b = reverse( a ); + WRITE( b ); + sc_bv_base c( "11110000", 8 ); + WRITE( c ); + sc_bv_base d( 8 ); + d = reverse( c ); + WRITE( d ); + } + { + cout << "sc_lv_base::reverse()" << endl; + + sc_lv_base a( "01ZX01Z", 7 ); + WRITE( a ); + a.reverse(); + WRITE( a ); + sc_lv_base b( "01ZX01ZX", 8 ); + WRITE( b ); + b.reverse(); + WRITE( b ); + } + { + cout << "reverse( const sc_lv_base& )" << endl; + + sc_lv_base a( "01ZX01Z", 7 ); + WRITE( a ); + sc_lv_base b( 7 ); + b = reverse( a ); + WRITE( b ); + sc_lv_base c( "01ZX01ZX", 8 ); + WRITE( c ); + sc_lv_base d( 8 ); + d = reverse( c ); + WRITE( d ); + } + { + cout << "sc_proxy::reverse()" << endl; + + sc_lv_base a( "01ZX01ZX", 8 ); + WRITE( a ); + (a( 7, 4 ), a( 3, 0 )).reverse(); + WRITE( a ); + (a( 0, 3 ), a( 4, 7 )).reverse(); + WRITE( a ); + } + { + cout << "reverse( const sc_proxy& )" << endl; + + sc_lv_base a( "01ZX01ZX", 8 ); + WRITE( a ); + sc_lv_base b( 8 ); + b = reverse( (a( 7, 4 ), a( 3, 0 )) ); + WRITE( b ); + b = reverse( (a( 0, 3 ), a( 4, 7 )) ); + WRITE( b ); + } +} + +void +test_string_conversions() +{ + cout << "*** test_string_conversions" << endl; + { + cout << "sc_bv_base" << endl; + + sc_bv_base a( 1, 8 ); + sc_bv_base b( 8 ); + std::string s; + s = a.to_string(); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_BIN ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_BIN_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_BIN_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_OCT ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_OCT_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_OCT_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_HEX ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_HEX_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_HEX_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_DEC ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_CSD ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + } + { + cout << "sc_lv_base" << endl; + + sc_lv_base a( SC_LOGIC_1, 8 ); + sc_lv_base b( 8 ); + std::string s; + s = a.to_string(); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_BIN ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_BIN_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_BIN_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_OCT ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_OCT_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_OCT_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_HEX ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_HEX_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_HEX_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_DEC ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + s = a.to_string( SC_CSD ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + } + { + cout << "sc_proxy" << endl; + + sc_lv_base a( SC_LOGIC_1, 8 ); + sc_lv_base b( 8 ); + std::string s; + s = (a( 7, 4 ), a( 3, 0 )).to_string(); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_BIN ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_BIN_US ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_BIN_SM ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_OCT ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_OCT_US ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_OCT_SM ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_HEX ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_HEX_US ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_HEX_SM ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_DEC ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + s = (a( 7, 4 ), a( 3, 0 )).to_string( SC_CSD ); + cout << s << endl; + (b( 7, 4 ), b( 3, 0 )) = s.c_str(); + sc_assert( b == a ); + } +} + +int +sc_main( int, char*[] ) +{ + test_ctors(); + test_bitwise_complement(); + test_bitwise_and(); + test_bitwise_or(); + test_bitwise_xor(); + test_bitwise_left_shift(); + test_bitwise_right_shift(); + test_bitwise_left_rotate(); + test_bitwise_right_rotate(); + test_bitwise_reverse(); + test_string_conversions(); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/arith_big/add_big.cpp b/src/systemc/tests/systemc/datatypes/fx/arith_big/add_big.cpp new file mode 100644 index 000000000..da8c0d7dd --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/arith_big/add_big.cpp @@ -0,0 +1,117 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + add_big.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// add_big.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 15 12:35:43 1999 +// Status : none +// + + +#define SC_INCLUDE_FX +#include "systemc.h" + + +#define SHOW(r, m) \ +out << r.to_string(SC_BIN) << " " << flush; \ +out << r.to_string(SC_HEX) << " " << flush; \ +out << m.to_string(SC_BIN) << " " << flush; \ +out << m.to_string(SC_HEX) << "\n" << flush + + +#define BIG_ARROW(T_op) \ +{ \ + out << "______________________ " #T_op " ______________________\n"; \ + out << "______________________ UP ______________________\n"; \ + sc_fxtype_params fooc(T_WL, T_IWL, SC_RND, SC_SAT); \ + T_op m(1); \ + T_op r(1); \ + int i; \ + for (i = 0; i < T_WL + 10; ++i) \ + { \ + r += r + (r >> 1); \ + SHOW(r, m); \ + m *= 16; \ + } \ + out << "______________________ DOWN ______________________\n"; \ + m = 1; \ + for (i = 0; i < T_WL + 10; ++i) \ + { \ + r -= m; \ + SHOW(r, m); \ + m *= 16; \ + } \ +} + +#define T_FX_FLOAT sc_fxval +#define T_FX_UFIX sc_ufix +#define T_FX_FIX sc_fix +#define T_FX_FIXED sc_fixed +#define T_FX_UFIXED sc_ufixed + +#define THE_BIG_ARROW \ +BIG_ARROW(T_FX_FLOAT) \ +BIG_ARROW(T_FX_UFIX) \ +BIG_ARROW(T_FX_FIX) \ +BIG_ARROW(T_FX_FIXED) \ +BIG_ARROW(T_FX_UFIXED) + + +void add_big(ostream& out) +{ + out.precision(15); + +#define T_WL 16 +#define T_IWL T_WL + out << "************* add_big " << T_WL << " ***************\n"; + THE_BIG_ARROW; +#undef T_WL +#undef T_IWL +#define T_WL 67 +#define T_IWL T_WL + out << "************* add_big " << T_WL << " ***************\n"; + THE_BIG_ARROW; +#undef T_WL +#undef T_IWL +#define T_WL 150 +#define T_IWL T_WL + out << "************* add_big " << T_WL << " ***************\n"; + THE_BIG_ARROW; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/arith_big/golden/test.log b/src/systemc/tests/systemc/datatypes/fx/arith_big/golden/test.log new file mode 100644 index 000000000..a05d1ca19 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/arith_big/golden/test.log @@ -0,0 +1,2681 @@ +SystemC Simulation +************* add_big +************* add_big 16 *************** +______________________ T_FX_FLOAT ______________________ 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(Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// main.cxx<3> -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Mon Jan 11 13:25:23 1999 +// Status : none +// + + +#define SC_INCLUDE_FX +#include "systemc.h" + + +extern void add_big(ostream&); + +int sc_main( int, char** ) +{ + ostream& out = cout; + + out << "************* add_big\n"; + sc_fxtype_params fooc(65, 33, SC_RND, SC_SAT); + + add_big(out); + out << "************* done\n"; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/arith_big/test.f b/src/systemc/tests/systemc/datatypes/fx/arith_big/test.f new file mode 100644 index 000000000..6bec3d77e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/arith_big/test.f @@ -0,0 +1,2 @@ +arith_big/add_big.cpp +arith_big/main.cpp diff --git a/src/systemc/tests/systemc/datatypes/fx/bit/golden/test.log b/src/systemc/tests/systemc/datatypes/fx/bit/golden/test.log new file mode 100644 index 000000000..6d2694bb2 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/bit/golden/test.log @@ -0,0 +1,121 @@ +SystemC Simulation +T_FX_FIX 13 13 +............. |..|..|..|..| +||||||||||||| .||.||.||.||. +a = 0b0110110110110 +a = 0b0000000001010 +T_FX_FIXED 13 13 +............. |..|..|..|..| +||||||||||||| .||.||.||.||. +a = 0b0110110110110 +a = 0b0000000001010 +T_FX_UFIX 13 13 +............. |..|..|..|..| +||||||||||||| .||.||.||.||. +a = 0b00110110110110 +a = 0b00000000001010 +T_FX_UFIXED 13 13 +............. |..|..|..|..| +||||||||||||| .||.||.||.||. +a = 0b00110110110110 +a = 0b00000000001010 +T_FX_FIX 13 0 +............. |..|..|..|..| +||||||||||||| .||.||.||.||. +a = 0b.0110110110110 +a = 0b.0000000000000 +T_FX_FIXED 13 0 +............. |..|..|..|..| +||||||||||||| .||.||.||.||. +a = 0b.0110110110110 +a = 0b.0000000000000 +T_FX_UFIX 13 0 +............. |..|..|..|..| +||||||||||||| .||.||.||.||. +a = 0b0.0110110110110 +a = 0b0.0000000000000 +T_FX_UFIXED 13 0 +............. |..|..|..|..| +||||||||||||| .||.||.||.||. +a = 0b0.0110110110110 +a = 0b0.0000000000000 +T_FX_FIX 5 13 +..... |..|. +||||| .||.| +a = 0b1011000000000 +a = 0b0000000000000 +T_FX_FIXED 5 13 +..... |..|. +||||| .||.| +a = 0b1011000000000 +a = 0b0000000000000 +T_FX_UFIX 5 13 +..... |..|. +||||| .||.| +a = 0b01011000000000 +a = 0b00000000000000 +T_FX_UFIXED 5 13 +..... |..|. +||||| .||.| +a = 0b01011000000000 +a = 0b00000000000000 +T_FX_FIX 65 65 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b10110110110110110110110110110110110110110110110110110110110110110 +a = 0b00000000000000000000000000000000000000000000000000000000000001010 +T_FX_FIXED 65 65 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b10110110110110110110110110110110110110110110110110110110110110110 +a = 0b00000000000000000000000000000000000000000000000000000000000001010 +T_FX_UFIX 65 65 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b010110110110110110110110110110110110110110110110110110110110110110 +a = 0b000000000000000000000000000000000000000000000000000000000000001010 +T_FX_UFIXED 65 65 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b010110110110110110110110110110110110110110110110110110110110110110 +a = 0b000000000000000000000000000000000000000000000000000000000000001010 +T_FX_FIX 65 33 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b101101101101101101101101101101101.10110110110110110110110110110110 +a = 0b000000000000000000000000000001010.00000000000000000000000000000000 +T_FX_FIXED 65 33 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b101101101101101101101101101101101.10110110110110110110110110110110 +a = 0b000000000000000000000000000001010.00000000000000000000000000000000 +T_FX_UFIX 65 33 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b0101101101101101101101101101101101.10110110110110110110110110110110 +a = 0b0000000000000000000000000000001010.00000000000000000000000000000000 +T_FX_UFIXED 65 33 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b0101101101101101101101101101101101.10110110110110110110110110110110 +a = 0b0000000000000000000000000000001010.00000000000000000000000000000000 +T_FX_FIX 65 111 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b101101101101101101101101101101101101101101101101101101101101101100000000000000000000000000000000000000000000000 +a = 0b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +T_FX_FIXED 65 111 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b101101101101101101101101101101101101101101101101101101101101101100000000000000000000000000000000000000000000000 +a = 0b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +T_FX_UFIX 65 111 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b0101101101101101101101101101101101101101101101101101101101101101100000000000000000000000000000000000000000000000 +a = 0b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 +T_FX_UFIXED 65 111 +................................................................. |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|. +||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.| +a = 0b0101101101101101101101101101101101101101101101101101101101101101100000000000000000000000000000000000000000000000 +a = 0b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 diff --git a/src/systemc/tests/systemc/datatypes/fx/bit/main.cpp b/src/systemc/tests/systemc/datatypes/fx/bit/main.cpp new file mode 100644 index 000000000..f3e25cc6f --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/bit/main.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// main.cxx<3> -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Mon Jan 11 13:25:23 1999 +// Status : none +// + + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "test_all.hh" + + +extern void test_bit(ostream&, int, int); + +static void test_cases(ostream& out, int wl, int iwl) +{ + test_bit(out, wl, iwl); +} + + +int sc_main( int, char** ) +{ + int wl = 0, iwl = 0; + test_cases(cout, wl, wl); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/t_all.0 b/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/t_all.0 new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/t_all.1 b/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/t_all.1 new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/test_bit_FX_off.dat b/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/test_bit_FX_off.dat new file mode 100644 index 000000000..b93cc245a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/test_bit_FX_off.dat @@ -0,0 +1,120 @@ +T_FX_FIX 13 13 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 13 13 +................................................................................ ............|..|..|..|.......................................................... +..........|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ..........||.||.||.||.|||||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_UFIX 13 13 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 13 13 +................................................................................ ............|..|..|..|.......................................................... +..........|||||||||||||......................................................... ..........||.||.||.||.|......................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_FIX 13 0 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 13 0 +................................................................................ |..|..|..||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||....................................................................... +.a = NaN +a = 0b.0111111111111 +T_FX_UFIX 13 0 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 13 0 +................................................................................ |..|..|..|...................................................................... +||||||||||...................................................................... .||.||.||....................................................................... +.a = NaN +a = 0b.01111111111111e+1 +T_FX_FIX 5 13 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 5 13 +................................................................................ ..................|..|.......................................................... +..................|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ...................||.|||||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0 +T_FX_UFIX 5 13 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 5 13 +................................................................................ ..................|..|.......................................................... +..................|||||......................................................... ...................||.|......................................................... +.a = NaN +a = 0b.0 +T_FX_FIX 65 65 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 65 65 +................................................................................ .....................|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|....... +..........|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .....................|||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_UFIX 65 65 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 65 65 +................................................................................ .....................|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|....... +...........................................................................|.... ...........................................................................|.... +.a = NaN +a = 0b.0101e+5 +T_FX_FIX 65 33 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 65 33 +................................................................................ |..|..|..|..|..|..|..|..|..|..|..|..|..|..|||||||||||||||||||||||||||||||||||||| +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |||.||.||.||.||.||.||.||.||.||.||.||.||.||...................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIX 65 33 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 65 33 +................................................................................ |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..................................... +...........................................|.................................... ...........................................|.................................... +.a = NaN +a = 0b.0101e+5 +T_FX_FIX 65 111 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 65 111 +................................................................................ .........................................................|..|..|..|..|..|..|..|. +........................................................|||||||||||||||||||||||| ........................................................|.||.||.||.||.||.||.||.| +.a = NaN +a = 0b.0 +T_FX_UFIX 65 111 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 65 111 +................................................................................ .........................................................|..|..|..|..|..|..|..|. +................................................................................ ................................................................................ +.a = NaN +a = 0b.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/test_bit_FX_on.dat b/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/test_bit_FX_on.dat new file mode 100644 index 000000000..ddded08c3 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/bit/ref_files/test_bit_FX_on.dat @@ -0,0 +1,120 @@ +T_FX_FIX 13 13 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 13 13 +................................................................................ ............|..|..|..|.......................................................... +..........|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ..........||.||.||.||.|||||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_UFIX 13 13 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 13 13 +................................................................................ ............|..|..|..|.......................................................... +..........|||||||||||||......................................................... ..........||.||.||.||.|......................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_FIX 13 0 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 13 0 +................................................................................ |||.||.||.|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |..|..|..|...................................................................... +.a = NaN +a = 0b.0111111111111 +T_FX_UFIX 13 0 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 13 0 +................................................................................ |..|..|..|...................................................................... +||||||||||...................................................................... .||.||.||....................................................................... +.a = NaN +a = 0b.01111111111111e+1 +T_FX_FIX 5 13 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 5 13 +................................................................................ ..................|..|.......................................................... +..................|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ...................||.|||||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0 +T_FX_UFIX 5 13 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 5 13 +................................................................................ ..................|..|.......................................................... +..................|||||......................................................... ...................||.|......................................................... +.a = NaN +a = 0b.0 +T_FX_FIX 65 65 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 65 65 +................................................................................ ............|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|....... +..........|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ..........||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_UFIX 65 65 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 65 65 +................................................................................ ............|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|..|....... +..........|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||..... ..........||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||.||..... +.a = NaN +a = 0b.0101e+5 +T_FX_FIX 65 33 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 65 33 +................................................................................ |||.||.||.||.||.||.||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||| +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIX 65 33 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 65 33 +................................................................................ |..|..|..|..|..|..|..|..|..|..|..|..|..|..|..................................... +|||||||||||||||||||||||||||||||||||||||||||..................................... .||.||.||.||.||.||.||.||.||.||.||.||.||.||...................................... +.a = NaN +a = 0b.0101e+5 +T_FX_FIX 65 111 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| .||.||.||.||.||.||.||.||.||||||||||||||||||||||||||||||||||||||||||||||||||||||| +.a = NaN +a = 0b.0101e+5 +T_FX_FIXED 65 111 +................................................................................ .........................................................|..|..|..|..|..|..|..|. +........................................................|||||||||||||||||||||||| ........................................................|.||.||.||.||.||.||.||.| +.a = NaN +a = 0b.0 +T_FX_UFIX 65 111 +................................................................................ |..|..|..|..|..|..|..|..|....................................................... +||||||||||||||||||||||||||...................................................... .||.||.||.||.||.||.||.||.|...................................................... +.a = NaN +a = 0b.0101e+5 +T_FX_UFIXED 65 111 +................................................................................ .........................................................|..|..|..|..|..|..|..|. +........................................................|||||||||||||||||||||||| ........................................................|.||.||.||.||.||.||.||.| +.a = NaN +a = 0b.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/bit/test.f b/src/systemc/tests/systemc/datatypes/fx/bit/test.f new file mode 100644 index 000000000..cb82c1ef5 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/bit/test.f @@ -0,0 +1,2 @@ +bit/main.cpp +bit/test_bit.cpp diff --git a/src/systemc/tests/systemc/datatypes/fx/bit/test_all.hh b/src/systemc/tests/systemc/datatypes/fx/bit/test_all.hh new file mode 100644 index 000000000..592b7ed4e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/bit/test_all.hh @@ -0,0 +1,80 @@ +// This may look like C code, but it is really -*- C++ -*- +// +// test_all.hh<2> -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Thu Jan 21 10:32:46 1999 +// Status : none +// + +#ifndef _test_all_hh_ +#define _test_all_hh_ + + + +#define TEST_BIT_T(T_op) \ +{ \ + out << #T_op << " " << T_WL << " " << T_IWL << "\n"; \ + sc_fxtype_context fooc(sc_fxtype_params(T_WL, T_IWL)); \ + T_op a = 0; \ + int i; \ + for (i = 0; i < T_WL; ++i) \ + { \ + if (a[i]) \ + out << "|"; \ + else \ + out << "."; \ + } \ + out << "\t"; \ + for (i = 0; i < T_WL; i += 3) \ + a[i] = 1; \ + for (i = 0; i < T_WL; ++i) \ + { \ + if (a[i]) \ + out << "|"; \ + else \ + out << "."; \ + } \ + out << "\n"; \ + a = 0; \ + a = ~a; \ + for (i = 0; i < T_WL; ++i) \ + { \ + if (a[i]) \ + out << "|"; \ + else \ + out << "."; \ + } \ + out << "\t"; \ + for (i = 0; i < T_WL; i += 3) \ + a[i] = 0; \ + for (i = 0; i < T_WL; ++i) \ + { \ + if (a[i]) \ + out << "|"; \ + else \ + out << "."; \ + } \ + out << "\n"; \ + out << "a = " << a.to_string(SC_BIN) << "\n"; \ + a = "0b01010"; \ + out << "a = " << a.to_string(SC_BIN) << "\n"; \ +} + + +#define TEST_BIT \ +TEST_BIT_T(T_FX_FIX); \ +TEST_BIT_T(T_FX_FIXED); \ +TEST_BIT_T(T_FX_UFIX); \ +TEST_BIT_T(T_FX_UFIXED); + + +#define T_FX_UFIX sc_ufix +#define T_FX_FIX sc_fix +#define T_FX_FIXED sc_fixed +#define T_FX_UFIXED sc_ufixed + +#define T_WL 4 +#define T_IWL 4 + +#endif diff --git a/src/systemc/tests/systemc/datatypes/fx/bit/test_bit.cpp b/src/systemc/tests/systemc/datatypes/fx/bit/test_bit.cpp new file mode 100644 index 000000000..e4bb174cf --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/bit/test_bit.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test_bit.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// test_bit.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Thu Jan 21 10:27:26 1999 +// Status : none +// + + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "test_all.hh" + + +void test_bit(ostream& out, int wl, int iwl) +{ +#undef T_WL +#undef T_IWL +#define T_WL 13 +#define T_IWL 13 + TEST_BIT; +#undef T_WL +#undef T_IWL +#define T_WL 13 +#define T_IWL 0 + TEST_BIT; +#undef T_WL +#undef T_IWL +#define T_WL 5 +#define T_IWL 13 + TEST_BIT; + +#undef T_WL +#undef T_IWL +#define T_WL 65 +#define T_IWL 65 + TEST_BIT; +#undef T_WL +#undef T_IWL +#define T_WL 65 +#define T_IWL 33 + TEST_BIT; +#undef T_WL +#undef T_IWL +#define T_WL 65 +#define T_IWL 111 + TEST_BIT; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/array.cpp b/src/systemc/tests/systemc/datatypes/fx/constructors/array.cpp new file mode 100644 index 000000000..985f0015f --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/array.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + array.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// array.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 11:55:50 1998 +// Status : none +// + +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +// Without this, conversions use the implicit +// operator double, which is both lossy and +// can cause UB in certain cases. +template +class converter { + From val; +public: + converter(From val): val(val) {} + operator int() const { return val.to_int(); } + operator unsigned int() const { return val.to_uint(); } + operator short() const { return val.to_short(); } + operator unsigned short() const { return val.to_ushort(); } + operator long() const { return val.to_long(); } + operator unsigned long() const { return val.to_ulong(); } + operator float() const { return val.to_float(); } + operator double() const { return val.to_double(); } +}; + +template +To convert(From val) { + return converter(val); +} + + +template +void show(char const *const name, int i, T val) { + cerr << name << "[" << i << "] : " << val.to_double() << " : " << val.to_string(SC_HEX) << "\n"; +} + +template +void test_fx(U a_mul, U b_init, U b_mul, char const *t_name, char const *u_name) +{ + cerr << "--array-Inf-Inf-Inf-Inf-Inf- test_fx_" << t_name << "_" << u_name << "\n"; + + T a(static_cast(0)); + T b(b_init); + show("a", 0, a); + show("b", 0, b); + + for (U i = 1; i < 4; ++i) { + // Be careful here. We don't want a T to ever be implicitly converted, + // else we have a double which cannot be safely cast, but converting early + // means we can be subject to implicit upcasts. That's minimized by having all + // of the values of type U, but if U is smaller than int it can still be + // implicitly upcast, ergo the outer cast. + a = static_cast(i * i * a_mul); + b = static_cast(convert(b) * i * b_mul); + show("a", i, a); + show("b", i, b); + } +} + +template +void batch_test_fx(char const *t_name, int uinit) { + cerr << "************** array test_fx_" << t_name << "_\n"; + test_fx(1, -1, -1, t_name, "int"); + test_fx(1, uinit, -1, t_name, "uint"); + test_fx(1, -1, -1, t_name, "short"); + test_fx(1, uinit, -1, t_name, "ushort"); + test_fx(1, -1, -1, t_name, "long"); + test_fx(1, uinit, -1, t_name, "ulong"); + test_fx(1.123456789f, -1.987654321f, -1.789654123f, t_name, "float"); + test_fx(1.123456789, -1.987654321, -1.789654123, t_name, "double"); +} + +void array() { + batch_test_fx("float", -1); + batch_test_fx("ufix", -1); + batch_test_fx("fix", -1); + batch_test_fx >("fixed", 1); + batch_test_fx >("ufixed", 1); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/assign.cpp b/src/systemc/tests/systemc/datatypes/fx/constructors/assign.cpp new file mode 100644 index 000000000..3523857c0 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/assign.cpp @@ -0,0 +1,546 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + assign.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// assign.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 09:58:11 1998 +// Status : none +// + +#include +#define SC_INCLUDE_FX +#define SC_FXVAL_IMPLICIT_CONV +#include "systemc.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +#define SHOW_ASSIGN(a) cerr << #a << " : " << double(a) << " : " << a.to_string(SC_HEX) << "\n" +#define IDENT_ASSIGN(a) cerr << "--assign-Inf-Inf-Inf-Inf-Inf- " << a << "\n" + +//---------------------------------------------------------------- +static void test_fx_float_int() +{ + IDENT_ASSIGN("test_fx_float_int"); + + sc_fxval a = 0; + sc_fxval b; + sc_fxval c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_uint() +{ + IDENT_ASSIGN("test_fx_float_uint"); + + sc_fxval a = (uint)0; + sc_fxval b; + sc_fxval c = b = (uint)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_short() +{ + IDENT_ASSIGN("test_fx_float_short"); + + sc_fxval a = (short)0; + sc_fxval b; + sc_fxval c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_ushort() +{ + IDENT_ASSIGN("test_fx_float_ushort"); + + sc_fxval a = (ushort)0; + sc_fxval b; + sc_fxval c = b = (ushort)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_long() +{ + IDENT_ASSIGN("test_fx_float_long"); + + sc_fxval a = (long)0; + sc_fxval b; + sc_fxval c = b = -1L; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_ulong() +{ + IDENT_ASSIGN("test_fx_float_ulong"); + sc_fxval a(0); + sc_fxval b; + sc_fxval c = b = -1UL; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_float() +{ + IDENT_ASSIGN("test_fx_float_float"); + + sc_fxval a(0.0f); + sc_fxval b; + sc_fxval c = b = -1.0f; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_double() +{ + IDENT_ASSIGN("test_fx_float_double"); + + sc_fxval a(0.0); + sc_fxval b; + sc_fxval c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +//---------------------------------------------------------------- +static void test_fx_ufix_int() +{ + IDENT_ASSIGN("test_fx_ufix_int"); + + sc_ufix a(0); + sc_ufix b; + sc_ufix c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_uint() +{ + IDENT_ASSIGN("test_fx_ufix_uint"); + + sc_ufix a(0u); + sc_ufix b; + sc_ufix c = b = (uint)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_short() +{ + IDENT_ASSIGN("test_fx_ufix_short"); + + sc_ufix a((short)0); + sc_ufix b; + sc_ufix c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_ushort() +{ + IDENT_ASSIGN("test_fx_ufix_ushort"); + + sc_ufix a((ushort)0); + sc_ufix b; + sc_ufix c = b = (ushort)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_long() +{ + IDENT_ASSIGN("test_fx_ufix_long"); + + sc_ufix a(0L); + sc_ufix b; + sc_ufix c = b = -1L; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_ulong() +{ + IDENT_ASSIGN("test_fx_ufix_ulong"); + sc_ufix a = (ulong)0; + sc_ufix b; + sc_ufix c = b = (ulong)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_float() +{ + IDENT_ASSIGN("test_fx_ufix_float"); + + sc_ufix a = 0.0; + sc_ufix b; + sc_ufix c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_double() +{ + IDENT_ASSIGN("test_fx_ufix_double"); + + sc_ufix a = (double)0.0; + sc_ufix b; + sc_ufix c = b = (double)-1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +//---------------------------------------------------------------- +static void test_fx_fix_int() +{ + IDENT_ASSIGN("test_fx_fix_int"); + + sc_fix a = 0; + sc_fix b; + sc_fix c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_uint() +{ + IDENT_ASSIGN("test_fx_fix_uint"); + + sc_fix a = (uint)0; + sc_fix b; + sc_fix c = b = (uint)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_short() +{ + IDENT_ASSIGN("test_fx_fix_short"); + + sc_fix a = (short)0; + sc_fix b; + sc_fix c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_ushort() +{ + IDENT_ASSIGN("test_fx_fix_ushort"); + + sc_fix a = (ushort)0; + sc_fix b; + sc_fix c = b = (ushort)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_long() +{ + IDENT_ASSIGN("test_fx_fix_long"); + + sc_fix a = (long)0; + sc_fix b; + sc_fix c = b = (long)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_ulong() +{ + IDENT_ASSIGN("test_fx_fix_ulong"); + sc_fix a = (ulong)0; + sc_fix b; + sc_fix c = b = (ulong)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_float() +{ + IDENT_ASSIGN("test_fx_fix_float"); + + sc_fix a = 0.0; + sc_fix b; + sc_fix c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_double() +{ + IDENT_ASSIGN("test_fx_fix_double"); + + sc_fix a = (double)0.0; + sc_fix b; + sc_fix c = b = (double)-1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +//---------------------------------------------------------------- +static void test_fx_fixed_int() +{ + IDENT_ASSIGN("test_fx_fixed_int"); + + sc_fixed<8, 5> a = 0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_uint() +{ + IDENT_ASSIGN("test_fx_fixed_uint"); + + sc_fixed<8, 5> a = (uint)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (uint)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_short() +{ + IDENT_ASSIGN("test_fx_fixed_short"); + + sc_fixed<8, 5> a = (short)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_ushort() +{ + IDENT_ASSIGN("test_fx_fixed_ushort"); + + sc_fixed<8, 5> a = (ushort)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (ushort)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_long() +{ + IDENT_ASSIGN("test_fx_fixed_long"); + + sc_fixed<8, 5> a = (long)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (long)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_ulong() +{ + IDENT_ASSIGN("test_fx_fixed_ulong"); + sc_fixed<8, 5> a = (ulong)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (ulong)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_float() +{ + IDENT_ASSIGN("test_fx_fixed_float"); + + sc_fixed<8, 5> a = 0.0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_double() +{ + IDENT_ASSIGN("test_fx_fixed_double"); + + sc_fixed<8, 5> a = (double)0.0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (double)-1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +//---------------------------------------------------------------- +static void test_fx_ufixed_int() +{ + IDENT_ASSIGN("test_fx_ufixed_int"); + + sc_ufixed<8, 5> a = 0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_uint() +{ + IDENT_ASSIGN("test_fx_ufixed_uint"); + + sc_ufixed<8, 5> a = (uint)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (uint)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_short() +{ + IDENT_ASSIGN("test_fx_ufixed_short"); + + sc_ufixed<8, 5> a = (short)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_ushort() +{ + IDENT_ASSIGN("test_fx_ufixed_ushort"); + + sc_ufixed<8, 5> a = (ushort)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (ushort)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_long() +{ + IDENT_ASSIGN("test_fx_ufixed_long"); + + sc_ufixed<8, 5> a = (long)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (long)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_ulong() +{ + IDENT_ASSIGN("test_fx_ufixed_ulong"); + sc_ufixed<8, 5> a = (ulong)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (ulong)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_float() +{ + IDENT_ASSIGN("test_fx_ufixed_float"); + + sc_ufixed<8, 5> a = 0.0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_double() +{ + IDENT_ASSIGN("test_fx_ufixed_double"); + + sc_ufixed<8, 5> a = (double)0.0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (double)-1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +void assign() +{ + cerr << "************** assign test_fx_float_\n"; + test_fx_float_int(); + test_fx_float_uint(); + test_fx_float_short(); + test_fx_float_ushort(); + test_fx_float_long(); + test_fx_float_ulong(); + test_fx_float_float(); + test_fx_float_double(); + cerr << "************** assign test_fx_ufix_\n"; + test_fx_ufix_int(); + test_fx_ufix_uint(); + test_fx_ufix_short(); + test_fx_ufix_ushort(); + test_fx_ufix_long(); + test_fx_ufix_ulong(); + test_fx_ufix_float(); + test_fx_ufix_double(); + cerr << "************** assign test_fx_fix_\n"; + test_fx_fix_int(); + test_fx_fix_uint(); + test_fx_fix_short(); + test_fx_fix_ushort(); + test_fx_fix_long(); + test_fx_fix_ulong(); + test_fx_fix_float(); + test_fx_fix_double(); + cerr << "************** assign test_fx_fixed_\n"; + test_fx_fixed_int(); + test_fx_fixed_uint(); + test_fx_fixed_short(); + test_fx_fixed_ushort(); + test_fx_fixed_long(); + test_fx_fixed_ulong(); + test_fx_fixed_float(); + test_fx_fixed_double(); + cerr << "************** assign test_fx_ufixed_\n"; + test_fx_ufixed_int(); + test_fx_ufixed_uint(); + test_fx_ufixed_short(); + test_fx_ufixed_ushort(); + test_fx_ufixed_long(); + test_fx_ufixed_ulong(); + test_fx_ufixed_float(); + test_fx_ufixed_double(); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/assign_constructor.cpp b/src/systemc/tests/systemc/datatypes/fx/constructors/assign_constructor.cpp new file mode 100644 index 000000000..e4121e49a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/assign_constructor.cpp @@ -0,0 +1,639 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + assign_constructor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// assign_constructor.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 09:47:21 1998 +// Status : none +// + +#include +#include +#define SC_INCLUDE_FX +#define SC_FXVAL_IMPLICIT_CONV +#include "systemc.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +#define SHOW_ASSIGN_CONSTRUCTORS(a) cerr << #a << " : " << double(a) << " : " << a.to_string(SC_HEX) << "\n" +#define IDENT_ASSIGN_CONSTRUCTORS(a) cerr << "--assign_constructor-Inf-Inf-Inf-Inf-Inf- " << a << "\n" + +//---------------------------------------------------------------- +// copy-initialisation from builtin types no longer works with sc_fxval, +// unless SC_FXVAL_IMPLICIT_CONV is defined + +#if defined(SC_FXVAL_IMPLICIT_CONV) +static void test_fx_float_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_int"); + + sc_fxval a = 0; + sc_fxval b = 1; + sc_fxval c = -1; + sc_fxval d = INT_MAX; + sc_fxval e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_uint"); + + sc_fxval a = (uint)0; + sc_fxval b = (uint)1; + sc_fxval c = (uint)-1; + sc_fxval d = UINT_MAX; + sc_fxval e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_short"); + + sc_fxval a = (short)0; + sc_fxval b = (short)1; + sc_fxval c = (short)-1; + sc_fxval d = SHRT_MAX; + sc_fxval e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_ushort"); + + sc_fxval a = (ushort)0; + sc_fxval b = (ushort)1; + sc_fxval c = (ushort)-1; + sc_fxval d = USHRT_MAX; + sc_fxval e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_long"); + + sc_fxval a = (long)0; + sc_fxval b = (long)1; + sc_fxval c = (long)-1; + sc_fxval d = LONG_MAX; + sc_fxval e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_ulong"); + + sc_fxval a = (ulong)0; + sc_fxval b = (ulong)1; + sc_fxval c = (ulong)-1; + sc_fxval d = ULONG_MAX; + sc_fxval e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_float"); + + sc_fxval a = 0.0; + sc_fxval b = 1.0; + sc_fxval c = -1.0; + sc_fxval d = FLT_MAX; + sc_fxval e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_double"); + + sc_fxval a = (double)0.0; + sc_fxval b = (double)1.0; + sc_fxval c = (double)-1.0; + sc_fxval d = DBL_MAX; + sc_fxval e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} +#endif // defined(SC_FXVAL_IMPLICIT_CONV) + +//---------------------------------------------------------------- +static void test_fx_ufix_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_int"); + + sc_ufix a = 0; + sc_ufix b = 1; + sc_ufix c = -1; + sc_ufix d = INT_MAX; + sc_ufix e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_uint"); + + sc_ufix a = (uint)0; + sc_ufix b = (uint)1; + sc_ufix c = (uint)-1; + sc_ufix d = UINT_MAX; + sc_ufix e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_short"); + + sc_ufix a = (short)0; + sc_ufix b = (short)1; + sc_ufix c = (short)-1; + sc_ufix d = SHRT_MAX; + sc_ufix e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_ushort"); + + sc_ufix a = (ushort)0; + sc_ufix b = (ushort)1; + sc_ufix c = (ushort)-1; + sc_ufix d = USHRT_MAX; + sc_ufix e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_long"); + + sc_ufix a = (long)0; + sc_ufix b = (long)1; + sc_ufix c = (long)-1; + sc_ufix d = LONG_MAX; + sc_ufix e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_ulong"); + + sc_ufix a = (ulong)0; + sc_ufix b = (ulong)1; + sc_ufix c = (ulong)-1; + sc_ufix d = ULONG_MAX; + sc_ufix e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_float"); + + sc_ufix a = 0.0; + sc_ufix b = 1.0; + sc_ufix c = -1.0; + sc_ufix d = FLT_MAX; + sc_ufix e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_double"); + + sc_ufix a = (double)0.0; + sc_ufix b = (double)1.0; + sc_ufix c = (double)-1.0; + sc_ufix d = DBL_MAX; + sc_ufix e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +//---------------------------------------------------------------- +static void test_fx_fix_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_int"); + + sc_fix a = 0; + sc_fix b = 1; + sc_fix c = -1; + sc_fix d = INT_MAX; + sc_fix e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_uint"); + + sc_fix a = (uint)0; + sc_fix b = (uint)1; + sc_fix c = (uint)-1; + sc_fix d = UINT_MAX; + sc_fix e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_short"); + + sc_fix a = (short)0; + sc_fix b = (short)1; + sc_fix c = (short)-1; + sc_fix d = SHRT_MAX; + sc_fix e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_ushort"); + + sc_fix a = (ushort)0; + sc_fix b = (ushort)1; + sc_fix c = (ushort)-1; + sc_fix d = USHRT_MAX; + sc_fix e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_long"); + + sc_fix a = (long)0; + sc_fix b = (long)1; + sc_fix c = (long)-1; + sc_fix d = LONG_MAX; + sc_fix e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_ulong"); + + sc_fix a = (ulong)0; + sc_fix b = (ulong)1; + sc_fix c = (ulong)-1; + sc_fix d = ULONG_MAX; + sc_fix e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_float"); + + sc_fix a = 0.0; + sc_fix b = 1.0; + sc_fix c = -1.0; + sc_fix d = FLT_MAX; + sc_fix e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_double"); + + sc_fix a = (double)0.0; + sc_fix b = (double)1.0; + sc_fix c = (double)-1.0; + sc_fix d = DBL_MAX; + sc_fix e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +//---------------------------------------------------------------- +static void test_fx_fixed_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_int"); + + sc_fixed<8, 5> a = 0; + sc_fixed<8, 5> b = 1; + sc_fixed<8, 5> c = -1; + sc_fixed<8, 5> d = INT_MAX; + sc_fixed<8, 5> e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_uint"); + + sc_fixed<8, 5> a = (uint)0; + sc_fixed<8, 5> b = (uint)1; + sc_fixed<8, 5> c = (uint)-1; + sc_fixed<8, 5> d = UINT_MAX; + sc_fixed<8, 5> e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_short"); + + sc_fixed<8, 5> a = (short)0; + sc_fixed<8, 5> b = (short)1; + sc_fixed<8, 5> c = (short)-1; + sc_fixed<8, 5> d = SHRT_MAX; + sc_fixed<8, 5> e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_ushort"); + + sc_fixed<8, 5> a = (ushort)0; + sc_fixed<8, 5> b = (ushort)1; + sc_fixed<8, 5> c = (ushort)-1; + sc_fixed<8, 5> d = USHRT_MAX; + sc_fixed<8, 5> e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_long"); + + sc_fixed<8, 5> a = (long)0; + sc_fixed<8, 5> b = (long)1; + sc_fixed<8, 5> c = (long)-1; + sc_fixed<8, 5> d = LONG_MAX; + sc_fixed<8, 5> e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_ulong"); + + sc_fixed<8, 5> a = (ulong)0; + sc_fixed<8, 5> b = (ulong)1; + sc_fixed<8, 5> c = (ulong)-1; + sc_fixed<8, 5> d = ULONG_MAX; + sc_fixed<8, 5> e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_float"); + + sc_fixed<8, 5> a = 0.0; + sc_fixed<8, 5> b = 1.0; + sc_fixed<8, 5> c = -1.0; + sc_fixed<8, 5> d = FLT_MAX; + sc_fixed<8, 5> e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_double"); + + sc_fixed<8, 5> a = (double)0.0; + sc_fixed<8, 5> b = (double)1.0; + sc_fixed<8, 5> c = (double)-1.0; + sc_fixed<8, 5> d = DBL_MAX; + sc_fixed<8, 5> e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +//---------------------------------------------------------------- +static void test_fx_ufixed_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_int"); + + sc_ufixed<8, 5> a = 0; + sc_ufixed<8, 5> b = 1; + sc_ufixed<8, 5> c = -1; + sc_ufixed<8, 5> d = INT_MAX; + sc_ufixed<8, 5> e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_uint"); + + sc_ufixed<8, 5> a = (uint)0; + sc_ufixed<8, 5> b = (uint)1; + sc_ufixed<8, 5> c = (uint)-1; + sc_ufixed<8, 5> d = UINT_MAX; + sc_ufixed<8, 5> e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_short"); + + sc_ufixed<8, 5> a = (short)0; + sc_ufixed<8, 5> b = (short)1; + sc_ufixed<8, 5> c = (short)-1; + sc_ufixed<8, 5> d = SHRT_MAX; + sc_ufixed<8, 5> e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_ushort"); + + sc_ufixed<8, 5> a = (ushort)0; + sc_ufixed<8, 5> b = (ushort)1; + sc_ufixed<8, 5> c = (ushort)-1; + sc_ufixed<8, 5> d = USHRT_MAX; + sc_ufixed<8, 5> e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_long"); + + sc_ufixed<8, 5> a = (long)0; + sc_ufixed<8, 5> b = (long)1; + sc_ufixed<8, 5> c = (long)-1; + sc_ufixed<8, 5> d = LONG_MAX; + sc_ufixed<8, 5> e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_ulong"); + + sc_ufixed<8, 5> a = (ulong)0; + sc_ufixed<8, 5> b = (ulong)1; + sc_ufixed<8, 5> c = (ulong)-1; + sc_ufixed<8, 5> d = ULONG_MAX; + sc_ufixed<8, 5> e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_float"); + + sc_ufixed<8, 5> a = 0.0; + sc_ufixed<8, 5> b = 1.0; + sc_ufixed<8, 5> c = -1.0; + sc_ufixed<8, 5> d = FLT_MAX; + sc_ufixed<8, 5> e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_double"); + + sc_ufixed<8, 5> a = (double)0.0; + sc_ufixed<8, 5> b = (double)1.0; + sc_ufixed<8, 5> c = (double)-1.0; + sc_ufixed<8, 5> d = DBL_MAX; + sc_ufixed<8, 5> e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +void assign_constructor() +{ +#if defined(SC_FXVAL_IMPLICIT_CONV) + cerr << "************** assign_constructor test_fx_float_\n"; + test_fx_float_int(); + test_fx_float_uint(); + test_fx_float_short(); + test_fx_float_ushort(); + test_fx_float_long(); + test_fx_float_ulong(); + test_fx_float_float(); + test_fx_float_double(); +#endif // defined(SC_FXVAL_IMPLICIT_CONV) + cerr << "************** assign_constructor test_fx_ufix_\n"; + test_fx_ufix_int(); + test_fx_ufix_uint(); + test_fx_ufix_short(); + test_fx_ufix_ushort(); + test_fx_ufix_long(); + test_fx_ufix_ulong(); + test_fx_ufix_float(); + test_fx_ufix_double(); + cerr << "************** assign_constructor test_fx_fix_\n"; + test_fx_fix_int(); + test_fx_fix_uint(); + test_fx_fix_short(); + test_fx_fix_ushort(); + test_fx_fix_long(); + test_fx_fix_ulong(); + test_fx_fix_float(); + test_fx_fix_double(); + cerr << "************** assign_constructor test_fx_fixed_\n"; + test_fx_fixed_int(); + test_fx_fixed_uint(); + test_fx_fixed_short(); + test_fx_fixed_ushort(); + test_fx_fixed_long(); + test_fx_fixed_ulong(); + test_fx_fixed_float(); + test_fx_fixed_double(); + cerr << "************** assign_constructor test_fx_ufixed_\n"; + test_fx_ufixed_int(); + test_fx_ufixed_uint(); + test_fx_ufixed_short(); + test_fx_ufixed_ushort(); + test_fx_ufixed_long(); + test_fx_ufixed_ulong(); + test_fx_ufixed_float(); + test_fx_ufixed_double(); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/default_assign.cpp b/src/systemc/tests/systemc/datatypes/fx/constructors/default_assign.cpp new file mode 100644 index 000000000..1fd4fceba --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/default_assign.cpp @@ -0,0 +1,635 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + default_assign.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// default_assign.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 09:52:54 1998 +// Status : none +// + +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +#define SHOW_DEFAULT_ASSIGN(a) cerr << #a << " : " << double(a) << " : " << a.to_string(SC_HEX) << "\n" +#define IDENT_DEFAULT_ASSIGN(a) cerr << "--default_assign-Inf-Inf-Inf-Inf-Inf- " << a << "\n" + +//------------------------------------------------------- +static void test_fx_float_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_int"); + + sc_fxval a; a = 0; + sc_fxval b; b = 1; + sc_fxval c; c = -1; + sc_fxval d; d = INT_MAX; + sc_fxval e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_uint"); + + sc_fxval a; a = (uint)0; + sc_fxval b; b = (uint)1; + sc_fxval c; c = (uint)-1; + sc_fxval d; d = UINT_MAX; + sc_fxval e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_short"); + + sc_fxval a; a = (short)0; + sc_fxval b; b = (short)1; + sc_fxval c; c = (short)-1; + sc_fxval d; d = SHRT_MAX; + sc_fxval e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_ushort"); + + sc_fxval a; a = (ushort)0; + sc_fxval b; b = (ushort)1; + sc_fxval c; c = (ushort)-1; + sc_fxval d; d = USHRT_MAX; + sc_fxval e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_long"); + + sc_fxval a; a = (long)0; + sc_fxval b; b = (long)1; + sc_fxval c; c = (long)-1; + sc_fxval d; d = LONG_MAX; + sc_fxval e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_ulong"); + + sc_fxval a; a = (ulong)0; + sc_fxval b; b = (ulong)1; + sc_fxval c; c = (ulong)-1; + sc_fxval d; d = ULONG_MAX; + sc_fxval e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_float"); + + sc_fxval a; a = 0.0; + sc_fxval b; b = 1.0; + sc_fxval c; c = -1.0; + sc_fxval d; d = FLT_MAX; + sc_fxval e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_double"); + + sc_fxval a; a = (double)0.0; + sc_fxval b; b = (double)1.0; + sc_fxval c; c = (double)-1.0; + sc_fxval d; d = DBL_MAX; + sc_fxval e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +//------------------------------------------------------- +static void test_fx_ufix_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_int"); + + sc_ufix a; a = 0; + sc_ufix b; b = 1; + sc_ufix c; c = -1; + sc_ufix d; d = INT_MAX; + sc_ufix e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_uint"); + + sc_ufix a; a = (uint)0; + sc_ufix b; b = (uint)1; + sc_ufix c; c = (uint)-1; + sc_ufix d; d = UINT_MAX; + sc_ufix e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_short"); + + sc_ufix a; a = (short)0; + sc_ufix b; b = (short)1; + sc_ufix c; c = (short)-1; + sc_ufix d; d = SHRT_MAX; + sc_ufix e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_ushort"); + + sc_ufix a; a = (ushort)0; + sc_ufix b; b = (ushort)1; + sc_ufix c; c = (ushort)-1; + sc_ufix d; d = USHRT_MAX; + sc_ufix e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_long"); + + sc_ufix a; a = (long)0; + sc_ufix b; b = (long)1; + sc_ufix c; c = (long)-1; + sc_ufix d; d = LONG_MAX; + sc_ufix e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_ulong"); + + sc_ufix a; a = (ulong)0; + sc_ufix b; b = (ulong)1; + sc_ufix c; c = (ulong)-1; + sc_ufix d; d = ULONG_MAX; + sc_ufix e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_float"); + + sc_ufix a; a = 0.0; + sc_ufix b; b = 1.0; + sc_ufix c; c = -1.0; + sc_ufix d; d = FLT_MAX; + sc_ufix e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_double"); + + sc_ufix a; a = (double)0.0; + sc_ufix b; b = (double)1.0; + sc_ufix c; c = (double)-1.0; + sc_ufix d; d = DBL_MAX; + sc_ufix e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +//------------------------------------------------------- +static void test_fx_fix_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_int"); + + sc_fix a; a = 0; + sc_fix b; b = 1; + sc_fix c; c = -1; + sc_fix d; d = INT_MAX; + sc_fix e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_uint"); + + sc_fix a; a = (uint)0; + sc_fix b; b = (uint)1; + sc_fix c; c = (uint)-1; + sc_fix d; d = UINT_MAX; + sc_fix e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_short"); + + sc_fix a; a = (short)0; + sc_fix b; b = (short)1; + sc_fix c; c = (short)-1; + sc_fix d; d = SHRT_MAX; + sc_fix e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_ushort"); + + sc_fix a; a = (ushort)0; + sc_fix b; b = (ushort)1; + sc_fix c; c = (ushort)-1; + sc_fix d; d = USHRT_MAX; + sc_fix e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_long"); + + sc_fix a; a = (long)0; + sc_fix b; b = (long)1; + sc_fix c; c = (long)-1; + sc_fix d; d = LONG_MAX; + sc_fix e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_ulong"); + + sc_fix a; a = (ulong)0; + sc_fix b; b = (ulong)1; + sc_fix c; c = (ulong)-1; + sc_fix d; d = ULONG_MAX; + sc_fix e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_float"); + + sc_fix a; a = 0.0; + sc_fix b; b = 1.0; + sc_fix c; c = -1.0; + sc_fix d; d = FLT_MAX; + sc_fix e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_double"); + + sc_fix a; a = (double)0.0; + sc_fix b; b = (double)1.0; + sc_fix c; c = (double)-1.0; + sc_fix d; d = DBL_MAX; + sc_fix e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +//------------------------------------------------------- +static void test_fx_fixed_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_int"); + + sc_fixed<8, 5> a; a = 0; + sc_fixed<8, 5> b; b = 1; + sc_fixed<8, 5> c; c = -1; + sc_fixed<8, 5> d; d = INT_MAX; + sc_fixed<8, 5> e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_uint"); + + sc_fixed<8, 5> a; a = (uint)0; + sc_fixed<8, 5> b; b = (uint)1; + sc_fixed<8, 5> c; c = (uint)-1; + sc_fixed<8, 5> d; d = UINT_MAX; + sc_fixed<8, 5> e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_short"); + + sc_fixed<8, 5> a; a = (short)0; + sc_fixed<8, 5> b; b = (short)1; + sc_fixed<8, 5> c; c = (short)-1; + sc_fixed<8, 5> d; d = SHRT_MAX; + sc_fixed<8, 5> e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_ushort"); + + sc_fixed<8, 5> a; a = (ushort)0; + sc_fixed<8, 5> b; b = (ushort)1; + sc_fixed<8, 5> c; c = (ushort)-1; + sc_fixed<8, 5> d; d = USHRT_MAX; + sc_fixed<8, 5> e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_long"); + + sc_fixed<8, 5> a; a = (long)0; + sc_fixed<8, 5> b; b = (long)1; + sc_fixed<8, 5> c; c = (long)-1; + sc_fixed<8, 5> d; d = LONG_MAX; + sc_fixed<8, 5> e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_ulong"); + + sc_fixed<8, 5> a; a = (ulong)0; + sc_fixed<8, 5> b; b = (ulong)1; + sc_fixed<8, 5> c; c = (ulong)-1; + sc_fixed<8, 5> d; d = ULONG_MAX; + sc_fixed<8, 5> e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_float"); + + sc_fixed<8, 5> a; a = 0.0; + sc_fixed<8, 5> b; b = 1.0; + sc_fixed<8, 5> c; c = -1.0; + sc_fixed<8, 5> d; d = FLT_MAX; + sc_fixed<8, 5> e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_double"); + + sc_fixed<8, 5> a; a = (double)0.0; + sc_fixed<8, 5> b; b = (double)1.0; + sc_fixed<8, 5> c; c = (double)-1.0; + sc_fixed<8, 5> d; d = DBL_MAX; + sc_fixed<8, 5> e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +//------------------------------------------------------- +static void test_fx_ufixed_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_int"); + + sc_ufixed<8, 5> a; a = 0; + sc_ufixed<8, 5> b; b = 1; + sc_ufixed<8, 5> c; c = -1; + sc_ufixed<8, 5> d; d = INT_MAX; + sc_ufixed<8, 5> e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_uint"); + + sc_ufixed<8, 5> a; a = (uint)0; + sc_ufixed<8, 5> b; b = (uint)1; + sc_ufixed<8, 5> c; c = (uint)-1; + sc_ufixed<8, 5> d; d = UINT_MAX; + sc_ufixed<8, 5> e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_short"); + + sc_ufixed<8, 5> a; a = (short)0; + sc_ufixed<8, 5> b; b = (short)1; + sc_ufixed<8, 5> c; c = (short)-1; + sc_ufixed<8, 5> d; d = SHRT_MAX; + sc_ufixed<8, 5> e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_ushort"); + + sc_ufixed<8, 5> a; a = (ushort)0; + sc_ufixed<8, 5> b; b = (ushort)1; + sc_ufixed<8, 5> c; c = (ushort)-1; + sc_ufixed<8, 5> d; d = USHRT_MAX; + sc_ufixed<8, 5> e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_long"); + + sc_ufixed<8, 5> a; a = (long)0; + sc_ufixed<8, 5> b; b = (long)1; + sc_ufixed<8, 5> c; c = (long)-1; + sc_ufixed<8, 5> d; d = LONG_MAX; + sc_ufixed<8, 5> e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_ulong"); + + sc_ufixed<8, 5> a; a = (ulong)0; + sc_ufixed<8, 5> b; b = (ulong)1; + sc_ufixed<8, 5> c; c = (ulong)-1; + sc_ufixed<8, 5> d; d = ULONG_MAX; + sc_ufixed<8, 5> e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_float"); + + sc_ufixed<8, 5> a; a = 0.0; + sc_ufixed<8, 5> b; b = 1.0; + sc_ufixed<8, 5> c; c = -1.0; + sc_ufixed<8, 5> d; d = FLT_MAX; + sc_ufixed<8, 5> e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_double"); + + sc_ufixed<8, 5> a; a = (double)0.0; + sc_ufixed<8, 5> b; b = (double)1.0; + sc_ufixed<8, 5> c; c = (double)-1.0; + sc_ufixed<8, 5> d; d = DBL_MAX; + sc_ufixed<8, 5> e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +void default_assign() +{ + cerr << "************** default_assign fx_float\n"; + test_fx_float_int(); + test_fx_float_uint(); + test_fx_float_short(); + test_fx_float_ushort(); + test_fx_float_long(); + test_fx_float_ulong(); + test_fx_float_float(); + test_fx_float_double(); + + cerr << "************** default_assign fx_ufix\n"; + test_fx_ufix_int(); + test_fx_ufix_uint(); + test_fx_ufix_short(); + test_fx_ufix_ushort(); + test_fx_ufix_long(); + test_fx_ufix_ulong(); + test_fx_ufix_float(); + test_fx_ufix_double(); + + cerr << "************** default_assign fx_fix\n"; + test_fx_fix_int(); + test_fx_fix_uint(); + test_fx_fix_short(); + test_fx_fix_ushort(); + test_fx_fix_long(); + test_fx_fix_ulong(); + test_fx_fix_float(); + test_fx_fix_double(); + + cerr << "************** default_assign fx_fixed\n"; + test_fx_fixed_int(); + test_fx_fixed_uint(); + test_fx_fixed_short(); + test_fx_fixed_ushort(); + test_fx_fixed_long(); + test_fx_fixed_ulong(); + test_fx_fixed_float(); + test_fx_fixed_double(); + + cerr << "************** default_assign fx_ufixed\n"; + test_fx_ufixed_int(); + test_fx_ufixed_uint(); + test_fx_ufixed_short(); + test_fx_ufixed_ushort(); + test_fx_ufixed_long(); + test_fx_ufixed_ulong(); + test_fx_ufixed_float(); + test_fx_ufixed_double(); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/default_constructor.cpp b/src/systemc/tests/systemc/datatypes/fx/constructors/default_constructor.cpp new file mode 100644 index 000000000..425195d7d --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/default_constructor.cpp @@ -0,0 +1,708 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + default_constructor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// default_constructor.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 09:38:31 1998 +// Status : none +// + +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +#define SHOW(a) cerr << #a << " : " << double(a) << " : " << a.to_string(SC_HEX) << "\n" +#define IDENT(a) cerr << "--default_constructor-Inf-Inf-Inf-Inf-Inf- " << a << "\n" + +#define T_CHAR_MAX "0b010101110100110111001011" +#define T_CHAR_MIN "-0xsmdeadbeafe-101" +#define T_UCHAR_MAX "0b010101110100110111001011e+101" +#define T_UCHAR_MIN "0xdeadbeafe-101" + +static void test_fx_float_char() +{ + IDENT("test_fx_float_char"); + + sc_fxval a("0"); + sc_fxval b("1"); + sc_fxval c("-1"); + sc_fxval d(T_CHAR_MAX); + sc_fxval e(T_CHAR_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_int() +{ + IDENT("test_fx_float_int"); + + sc_fxval a(0); + sc_fxval b(1); + sc_fxval c(-1); + sc_fxval d(INT_MAX); + sc_fxval e(INT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_uint() +{ + IDENT("test_fx_float_uint"); + + sc_fxval a((uint)0); + sc_fxval b((uint)1); + sc_fxval c((uint)-1); + sc_fxval d(UINT_MAX); + sc_fxval e((uint)abs(INT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_short() +{ + IDENT("test_fx_float_short"); + + sc_fxval a((short)0); + sc_fxval b((short)1); + sc_fxval c((short)-1); + sc_fxval d((short)SHRT_MAX); + sc_fxval e((short)SHRT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_ushort() +{ + IDENT("test_fx_float_ushort"); + + sc_fxval a((ushort)0); + sc_fxval b((ushort)1); + sc_fxval c((ushort)-1); + sc_fxval d(USHRT_MAX); + sc_fxval e((ushort)abs(SHRT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_long() +{ + IDENT("test_fx_float_long"); + + sc_fxval a((long)0); + sc_fxval b((long)1); + sc_fxval c((long)-1); + sc_fxval d(LONG_MAX); + sc_fxval e(LONG_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_ulong() +{ + IDENT("test_fx_float_ulong"); + + sc_fxval a((ulong)0); + sc_fxval b((ulong)1); + sc_fxval c((ulong)-1); + sc_fxval d(ULONG_MAX); + sc_fxval e((ulong)abs(LONG_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_float() +{ + IDENT("test_fx_float_float"); + + sc_fxval a(0.0); + sc_fxval b(1.0); + sc_fxval c(-1.0); + sc_fxval d(FLT_MAX); + sc_fxval e(FLT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_double() +{ + IDENT("test_fx_float_double"); + + sc_fxval a((double)0.0); + sc_fxval b((double)1.0); + sc_fxval c((double)-1.0); + sc_fxval d(DBL_MAX); + sc_fxval e(DBL_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +//----------------------------------------------------------------------- +static void test_fx_ufix_char() +{ + IDENT("test_fx_ufix_char"); + + sc_ufix a("0"); + sc_ufix b("1"); + sc_ufix c("-1"); + sc_ufix d(T_UCHAR_MAX); + sc_ufix e(T_UCHAR_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_int() +{ + IDENT("test_fx_ufix_int"); + + sc_ufix a(0); + sc_ufix b(1); + sc_ufix c(-1); + sc_ufix d(INT_MAX); + sc_ufix e(INT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_uint() +{ + IDENT("test_fx_ufix_uint"); + + sc_ufix a((uint)0); + sc_ufix b((uint)1); + sc_ufix c((uint)-1); + sc_ufix d(UINT_MAX); + sc_ufix e((uint)abs(INT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_short() +{ + IDENT("test_fx_ufix_short"); + + sc_ufix a((short)0); + sc_ufix b((short)1); + sc_ufix c((short)-1); + sc_ufix d(SHRT_MAX); + sc_ufix e(SHRT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_ushort() +{ + IDENT("test_fx_ufix_ushort"); + + sc_ufix a((ushort)0); + sc_ufix b((ushort)1); + sc_ufix c((ushort)-1); + sc_ufix d(USHRT_MAX); + sc_ufix e((ushort)abs(SHRT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_long() +{ + IDENT("test_fx_ufix_long"); + + sc_ufix a((long)0); + sc_ufix b((long)1); + sc_ufix c((long)-1); + sc_ufix d(LONG_MAX); + sc_ufix e(LONG_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_ulong() +{ + IDENT("test_fx_ufix_ulong"); + + sc_ufix a((ulong)0); + sc_ufix b((ulong)1); + sc_ufix c((ulong)-1); + sc_ufix d(ULONG_MAX); + sc_ufix e((ulong)abs(LONG_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_float() +{ + IDENT("test_fx_ufix_float"); + + sc_ufix a(0.0); + sc_ufix b(1.0); + sc_ufix c(-1.0); + sc_ufix d(FLT_MAX); + sc_ufix e(FLT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_double() +{ + IDENT("test_fx_ufix_double"); + + sc_ufix a((double)0.0); + sc_ufix b((double)1.0); + sc_ufix c((double)-1.0); + sc_ufix d(DBL_MAX); + sc_ufix e(DBL_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +//----------------------------------------------------------------------- +static void test_fx_fix_char() +{ + IDENT("test_fx_fix_char"); + + sc_fix a("0"); SHOW(a); + sc_fix b("1"); SHOW(b); + sc_fix c("-1"); SHOW(c); + sc_fix d(T_CHAR_MAX); SHOW(d); + sc_fix e(T_CHAR_MIN); SHOW(e); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_int() +{ + IDENT("test_fx_fix_int"); + + sc_fix a(0); + sc_fix b(1); + sc_fix c(-1); + sc_fix d(INT_MAX); + sc_fix e(INT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_uint() +{ + IDENT("test_fx_fix_uint"); + + sc_fix a((uint)0); + sc_fix b((uint)1); + sc_fix c((uint)-1); + sc_fix d(UINT_MAX); + sc_fix e((uint)abs(INT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} +static void test_fx_fix_short() +{ + IDENT("test_fx_fix_short"); + + sc_fix a((short)0); + sc_fix b((short)1); + sc_fix c((short)-1); + sc_fix d(SHRT_MAX); + sc_fix e(SHRT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_ushort() +{ + IDENT("test_fx_fix_ushort"); + + sc_fix a((ushort)0); + sc_fix b((ushort)1); + sc_fix c((ushort)-1); + sc_fix d(USHRT_MAX); + sc_fix e((ushort)abs(SHRT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_long() +{ + IDENT("test_fx_fix_long"); + + sc_fix a((long)0); + sc_fix b((long)1); + sc_fix c((long)-1); + sc_fix d(LONG_MAX); + sc_fix e(LONG_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_ulong() +{ + IDENT("test_fx_fix_ulong"); + + sc_fix a((ulong)0); + sc_fix b((ulong)1); + sc_fix c((ulong)-1); + sc_fix d(ULONG_MAX); + sc_fix e((ulong)abs(LONG_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_float() +{ + IDENT("test_fx_fix_float"); + + sc_fix a(0.0); + sc_fix b(1.0); + sc_fix c(-1.0); + sc_fix d(FLT_MAX); + sc_fix e(FLT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_double() +{ + IDENT("test_fx_fix_double"); + + sc_fix a((double)0.0); + sc_fix b((double)1.0); + sc_fix c((double)-1.0); + sc_fix d(DBL_MAX); + sc_fix e(DBL_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +//----------------------------------------------------------------------- +static void test_fx_fixed_char() +{ + IDENT("test_fx_fixed_char"); + + sc_fixed<8, 5> a("0"); + sc_fixed<8, 5> b("1"); + sc_fixed<8, 5> c("-1"); + sc_fixed<8, 5> d(T_CHAR_MAX); + sc_fixed<8, 5> e(T_CHAR_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_int() +{ + IDENT("test_fx_fixed_int"); + + sc_fixed<8, 5> a(0); + sc_fixed<8, 5> b(1); + sc_fixed<8, 5> c(-1); + sc_fixed<8, 5> d(INT_MAX); + sc_fixed<8, 5> e(INT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_uint() +{ + IDENT("test_sc_fixed_uint"); + + sc_fixed<8, 5> a((uint)0); + sc_fixed<8, 5> b((uint)1); + sc_fixed<8, 5> c((uint)-1); + sc_fixed<8, 5> d(UINT_MAX); + sc_fixed<8, 5> e((uint)abs(INT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_short() +{ + IDENT("test_fx_fixed_short"); + + sc_fixed<8, 5> a((short)0); + sc_fixed<8, 5> b((short)1); + sc_fixed<8, 5> c((short)-1); + sc_fixed<8, 5> d(SHRT_MAX); + sc_fixed<8, 5> e(SHRT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_ushort() +{ + IDENT("test_sc_fixed_ushort"); + + sc_fixed<8, 5> a((ushort)0); + sc_fixed<8, 5> b((ushort)1); + sc_fixed<8, 5> c((ushort)-1); + sc_fixed<8, 5> d(USHRT_MAX); + sc_fixed<8, 5> e((ushort)abs(SHRT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_long() +{ + IDENT("test_sc_fixeded_long"); + + sc_fixed<8, 5> a((long)0); + sc_fixed<8, 5> b((long)1); + sc_fixed<8, 5> c((long)-1); + sc_fixed<8, 5> d(LONG_MAX); + sc_fixed<8, 5> e(LONG_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_ulong() +{ + IDENT("test_fx_fixed_ulong"); + + sc_fixed<8, 5> a((ulong)0); + sc_fixed<8, 5> b((ulong)1); + sc_fixed<8, 5> c((ulong)-1); + sc_fixed<8, 5> d(ULONG_MAX); + sc_fixed<8, 5> e((ulong)abs(LONG_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_float() +{ + IDENT("test_fx_fixed_float"); + + sc_fixed<8, 5> a(0.0); + sc_fixed<8, 5> b(1.0); + sc_fixed<8, 5> c(-1.0); + sc_fixed<8, 5> d(FLT_MAX); + sc_fixed<8, 5> e(FLT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_double() +{ + IDENT("test_fx_fixed_double"); + + sc_fixed<8, 5> a((double)0.0); + sc_fixed<8, 5> b((double)1.0); + sc_fixed<8, 5> c((double)-1.0); + sc_fixed<8, 5> d(DBL_MAX); + sc_fixed<8, 5> e(DBL_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +//----------------------------------------------------------------------- +static void test_fx_ufixed_char() +{ + IDENT("test_fx_ufixed_char"); + + sc_ufixed<8, 5> a("0"); + sc_ufixed<8, 5> b("1"); + sc_ufixed<8, 5> c("-1"); + sc_ufixed<8, 5> d(T_UCHAR_MAX); + sc_ufixed<8, 5> e(T_UCHAR_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_int() +{ + IDENT("test_fx_ufixed_int"); + + sc_ufixed<8, 5> a(0); + sc_ufixed<8, 5> b(1); + sc_ufixed<8, 5> c(-1); + sc_ufixed<8, 5> d(INT_MAX); + sc_ufixed<8, 5> e(INT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_uint() +{ + IDENT("test_fx_ufixed_uint"); + + sc_ufixed<8, 5> a((uint)0); + sc_ufixed<8, 5> b((uint)1); + sc_ufixed<8, 5> c((uint)-1); + sc_ufixed<8, 5> d(UINT_MAX); + sc_ufixed<8, 5> e((uint)abs(INT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_short() +{ + IDENT("test_fx_ufixed_short"); + + sc_ufixed<8, 5> a((short)0); + sc_ufixed<8, 5> b((short)1); + sc_ufixed<8, 5> c((short)-1); + sc_ufixed<8, 5> d(SHRT_MAX); + sc_ufixed<8, 5> e(SHRT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_ushort() +{ + IDENT("test_fx_ufixed_ushort"); + + sc_ufixed<8, 5> a((ushort)0); + sc_ufixed<8, 5> b((ushort)1); + sc_ufixed<8, 5> c((ushort)-1); + sc_ufixed<8, 5> d(USHRT_MAX); + sc_ufixed<8, 5> e((ushort)abs(SHRT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_long() +{ + IDENT("test_fx_ufixeded_long"); + + sc_ufixed<8, 5> a((long)0); + sc_ufixed<8, 5> b((long)1); + sc_ufixed<8, 5> c((long)-1); + sc_ufixed<8, 5> d(LONG_MAX); + sc_ufixed<8, 5> e(LONG_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_ulong() +{ + IDENT("test_fx_ufixed_ulong"); + + sc_ufixed<8, 5> a((ulong)0); + sc_ufixed<8, 5> b((ulong)1); + sc_ufixed<8, 5> c((ulong)-1); + sc_ufixed<8, 5> d(ULONG_MAX); + sc_ufixed<8, 5> e((ulong)abs(LONG_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_float() +{ + IDENT("test_fx_ufixed_float"); + + sc_ufixed<8, 5> a(0.0); + sc_ufixed<8, 5> b(1.0); + sc_ufixed<8, 5> c(-1.0); + sc_ufixed<8, 5> d(FLT_MAX); + sc_ufixed<8, 5> e(FLT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_double() +{ + IDENT("test_fx_ufixed_double"); + + sc_ufixed<8, 5> a((double)0.0); + sc_ufixed<8, 5> b((double)1.0); + sc_ufixed<8, 5> c((double)-1.0); + sc_ufixed<8, 5> d(DBL_MAX); + sc_ufixed<8, 5> e(DBL_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +void default_constructor() +{ + cerr << "************** default_constructor for fx_float\n"; + test_fx_float_char(); + test_fx_float_int(); + test_fx_float_uint(); + test_fx_float_short(); + test_fx_float_ushort(); + test_fx_float_long(); + test_fx_float_ulong(); + test_fx_float_float(); + test_fx_float_double(); + + cerr << "************** default_constructor for fx_ufix\n"; + test_fx_ufix_char(); + test_fx_ufix_int(); + test_fx_ufix_uint(); + test_fx_ufix_short(); + test_fx_ufix_ushort(); + test_fx_ufix_long(); + test_fx_ufix_ulong(); + test_fx_ufix_float(); + test_fx_ufix_double(); + + cerr << "************** default_constructor for fx_fix\n"; + test_fx_fix_char(); + test_fx_fix_int(); + test_fx_fix_uint(); + test_fx_fix_short(); + test_fx_fix_ushort(); + test_fx_fix_long(); + test_fx_fix_ulong(); + test_fx_fix_float(); + test_fx_fix_double(); + + cerr << "************** default_constructor for fx_fixed\n"; + test_fx_fixed_char(); + test_fx_fixed_int(); + test_fx_fixed_uint(); + test_fx_fixed_short(); + test_fx_fixed_ushort(); + test_fx_fixed_long(); + test_fx_fixed_ulong(); + test_fx_fixed_float(); + test_fx_fixed_double(); + + cerr << "************** default_constructor for fx_ufixed\n"; + test_fx_ufixed_char(); + test_fx_ufixed_int(); + test_fx_ufixed_uint(); + test_fx_ufixed_short(); + test_fx_ufixed_ushort(); + test_fx_ufixed_long(); + test_fx_ufixed_ulong(); + test_fx_ufixed_float(); + test_fx_ufixed_double(); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/files.f b/src/systemc/tests/systemc/datatypes/fx/constructors/files.f new file mode 100644 index 000000000..71aafc3cc --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/files.f @@ -0,0 +1,6 @@ +constructors/main.cpp +constructors/array.cpp +constructors/assign.cpp +constructors/assign_constructor.cpp +constructors/default_assign.cpp +constructors/default_constructor.cpp diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log new file mode 100644 index 000000000..4a3056204 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.bsd b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.bsd new file mode 100644 index 000000000..1ff0e6199 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.bsd @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 4294934528 : 0x0ffff8000 +a[2] : 4 : 0x000000004 +b[2] : 4294934528 : 0x0ffff8000 +a[3] : 9 : 0x000000009 +b[3] : 4294934528 : 0x0ffff8000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.bsd64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.bsd64 new file mode 100644 index 000000000..3ca7d226e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.bsd64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x0ffffffffffffffff +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x0ffffffffffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.cygwin b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.cygwin new file mode 100644 index 000000000..1ff0e6199 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.cygwin @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 4294934528 : 0x0ffff8000 +a[2] : 4 : 0x000000004 +b[2] : 4294934528 : 0x0ffff8000 +a[3] : 9 : 0x000000009 +b[3] : 4294934528 : 0x0ffff8000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.cygwin64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.cygwin64 new file mode 100644 index 000000000..fbce68b10 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.cygwin64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x0ffffffffffffffff +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x0ffffffffffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 1.84467440737096e+19 : 0x0fffffffffffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.linux b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.linux new file mode 100644 index 000000000..8397d8cab --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.linux @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.linux64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.linux64 new file mode 100644 index 000000000..fbce68b10 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.linux64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x0ffffffffffffffff +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x0ffffffffffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 1.84467440737096e+19 : 0x0fffffffffffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.linuxaarch64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.linuxaarch64 new file mode 100644 index 000000000..f8bd80b34 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.linuxaarch64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x0ffffffffffffffff +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 0 : 0x0 +a[2] : 4 : 0x4 +b[2] : 0 : 0x0 +a[3] : 9 : 0x09 +b[3] : 0 : 0x0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x0ffffffffffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 0 : 0x00000000 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.macosx b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.macosx new file mode 100644 index 000000000..1ff0e6199 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.macosx @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 4294934528 : 0x0ffff8000 +a[2] : 4 : 0x000000004 +b[2] : 4294934528 : 0x0ffff8000 +a[3] : 9 : 0x000000009 +b[3] : 4294934528 : 0x0ffff8000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.macosx64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.macosx64 new file mode 100644 index 000000000..3ca7d226e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.macosx64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x7fffffffffffffff +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +d : 1.84467440737096e+19 : 0x0ffffffffffffffff +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x0ffffffffffffffff +c : 1.84467440737096e+19 : 0x0ffffffffffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x0ffffffffffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.mingw b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.mingw new file mode 100644 index 000000000..9c43e4eec --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.mingw @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 4294934528 : 0x0ffff8000 +a[2] : 4 : 0x000000004 +b[2] : 4294934528 : 0x0ffff8000 +a[3] : 9 : 0x000000009 +b[3] : 4294934528 : 0x0ffff8000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.mingw64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.mingw64 new file mode 100644 index 000000000..5a456535e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.mingw64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc10 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc10 new file mode 100644 index 000000000..7c6723a44 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc10 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc10-x64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc10-x64 new file mode 100644 index 000000000..7c6723a44 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc10-x64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc11 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc11 new file mode 100644 index 000000000..5a456535e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc11 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc11-x64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc11-x64 new file mode 100644 index 000000000..5a456535e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc11-x64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc12 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc12 new file mode 100644 index 000000000..7c6723a44 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc12 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc12-x64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc12-x64 new file mode 100644 index 000000000..7c6723a44 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc12-x64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc14 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc14 new file mode 100644 index 000000000..9381b100a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc14 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc14-x64 b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc14-x64 new file mode 100644 index 000000000..9381b100a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/golden/files.log.msvc14-x64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/constructors/main.cpp b/src/systemc/tests/systemc/datatypes/fx/constructors/main.cpp new file mode 100644 index 000000000..0a36bbf8e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/constructors/main.cpp @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// 4.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 08:50:50 1998 +// Status : none +// + +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +extern void default_constructor(); +extern void assign_constructor(); +extern void default_assign(); +extern void assign(); +extern void array(); + +int sc_main( int, char** ) +{ + cerr.precision(15); + default_constructor(); + assign_constructor(); + default_assign(); + assign(); + + array(); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/copy_ctors/copy_ctors.cpp b/src/systemc/tests/systemc/datatypes/fx/copy_ctors/copy_ctors.cpp new file mode 100644 index 000000000..4cdd0e087 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/copy_ctors/copy_ctors.cpp @@ -0,0 +1,162 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + copy_ctors.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_[u]fix constructors with fixed-point type argument + +#define SC_INCLUDE_FX +#include "systemc.h" + +#define WRITE(a) \ + cout << a.type_params() << endl + +int +sc_main( int, char*[] ) +{ + sc_fixed<1,2,SC_RND,SC_SAT> fxd; + sc_fixed_fast<3,4,SC_RND_ZERO,SC_SAT_ZERO> fxdf; + sc_ufixed<5,6,SC_RND_MIN_INF,SC_SAT_SYM> ufxd; + sc_ufixed_fast<7,8,SC_RND_INF,SC_WRAP> ufxdf; + + sc_fix fx( 9, 10, SC_RND_CONV, SC_SAT ); + sc_fix_fast fxf( 11, 12, SC_TRN, SC_SAT_ZERO ); + sc_ufix ufx( 13, 14, SC_TRN_ZERO, SC_SAT_SYM ); + sc_ufix_fast ufxf( 15, 16, SC_RND, SC_WRAP ); + + WRITE( fxd ); + WRITE( fxdf ); + WRITE( ufxd ); + WRITE( ufxdf ); + + WRITE( fx ); + WRITE( fxf ); + WRITE( ufx ); + WRITE( ufxf ); + + // sc_fix + sc_fix fx01( fxd ); + sc_fix fx02( fxdf ); + sc_fix fx03( ufxd ); + sc_fix fx04( ufxdf ); + sc_fix fx05( fx ); + sc_fix fx06( fxf ); + sc_fix fx07( ufx ); + sc_fix fx08( ufxf ); + + cout << endl; + WRITE( fx01 ); + WRITE( fx02 ); + WRITE( fx03 ); + WRITE( fx04 ); + WRITE( fx05 ); + WRITE( fx06 ); + WRITE( fx07 ); + WRITE( fx08 ); + + // sc_fix_fast + sc_fix_fast fxf01( fxd ); + sc_fix_fast fxf02( fxdf ); + sc_fix_fast fxf03( ufxd ); + sc_fix_fast fxf04( ufxdf ); + sc_fix_fast fxf05( fx ); + sc_fix_fast fxf06( fxf ); + sc_fix_fast fxf07( ufx ); + sc_fix_fast fxf08( ufxf ); + + cout << endl; + WRITE( fxf01 ); + WRITE( fxf02 ); + WRITE( fxf03 ); + WRITE( fxf04 ); + WRITE( fxf05 ); + WRITE( fxf06 ); + WRITE( fxf07 ); + WRITE( fxf08 ); + + // sc_ufix + sc_ufix ufx01( fxd ); + sc_ufix ufx02( fxdf ); + sc_ufix ufx03( ufxd ); + sc_ufix ufx04( ufxdf ); + sc_ufix ufx05( fx ); + sc_ufix ufx06( fxf ); + sc_ufix ufx07( ufx ); + sc_ufix ufx08( ufxf ); + + cout << endl; + WRITE( ufx01 ); + WRITE( ufx02 ); + WRITE( ufx03 ); + WRITE( ufx04 ); + WRITE( ufx05 ); + WRITE( ufx06 ); + WRITE( ufx07 ); + WRITE( ufx08 ); + + // sc_ufix_fast + sc_ufix_fast ufxf01( fxd ); + sc_ufix_fast ufxf02( fxdf ); + sc_ufix_fast ufxf03( ufxd ); + sc_ufix_fast ufxf04( ufxdf ); + sc_ufix_fast ufxf05( fx ); + sc_ufix_fast ufxf06( fxf ); + sc_ufix_fast ufxf07( ufx ); + sc_ufix_fast ufxf08( ufxf ); + + cout << endl; + WRITE( ufxf01 ); + WRITE( ufxf02 ); + WRITE( ufxf03 ); + WRITE( ufxf04 ); + WRITE( ufxf05 ); + WRITE( ufxf06 ); + WRITE( ufxf07 ); + WRITE( ufxf08 ); + + // misc + sc_fix fx09( fx, 123, 456 ); + sc_fix_fast fxf09( fxf, SC_RND, SC_SAT ); + sc_ufix ufx09( ufx, 456, 123 ); + sc_ufix_fast ufxf09( ufxf, SC_TRN, SC_WRAP ); + + cout << endl; + WRITE( fx09 ); + WRITE( fxf09 ); + WRITE( ufx09 ); + WRITE( ufxf09 ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/copy_ctors/golden/copy_ctors.log b/src/systemc/tests/systemc/datatypes/fx/copy_ctors/golden/copy_ctors.log new file mode 100644 index 000000000..8f937764e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/copy_ctors/golden/copy_ctors.log @@ -0,0 +1,50 @@ +SystemC Simulation +(1,2,SC_RND,SC_SAT,0) +(3,4,SC_RND_ZERO,SC_SAT_ZERO,0) +(5,6,SC_RND_MIN_INF,SC_SAT_SYM,0) +(7,8,SC_RND_INF,SC_WRAP,0) +(9,10,SC_RND_CONV,SC_SAT,0) +(11,12,SC_TRN,SC_SAT_ZERO,0) +(13,14,SC_TRN_ZERO,SC_SAT_SYM,0) +(15,16,SC_RND,SC_WRAP,0) + +(1,2,SC_RND,SC_SAT,0) +(3,4,SC_RND_ZERO,SC_SAT_ZERO,0) +(5,6,SC_RND_MIN_INF,SC_SAT_SYM,0) +(7,8,SC_RND_INF,SC_WRAP,0) +(9,10,SC_RND_CONV,SC_SAT,0) +(11,12,SC_TRN,SC_SAT_ZERO,0) +(13,14,SC_TRN_ZERO,SC_SAT_SYM,0) +(15,16,SC_RND,SC_WRAP,0) + +(1,2,SC_RND,SC_SAT,0) +(3,4,SC_RND_ZERO,SC_SAT_ZERO,0) +(5,6,SC_RND_MIN_INF,SC_SAT_SYM,0) +(7,8,SC_RND_INF,SC_WRAP,0) +(9,10,SC_RND_CONV,SC_SAT,0) +(11,12,SC_TRN,SC_SAT_ZERO,0) +(13,14,SC_TRN_ZERO,SC_SAT_SYM,0) +(15,16,SC_RND,SC_WRAP,0) + +(1,2,SC_RND,SC_SAT,0) +(3,4,SC_RND_ZERO,SC_SAT_ZERO,0) +(5,6,SC_RND_MIN_INF,SC_SAT_SYM,0) +(7,8,SC_RND_INF,SC_WRAP,0) +(9,10,SC_RND_CONV,SC_SAT,0) +(11,12,SC_TRN,SC_SAT_ZERO,0) +(13,14,SC_TRN_ZERO,SC_SAT_SYM,0) +(15,16,SC_RND,SC_WRAP,0) + +(1,2,SC_RND,SC_SAT,0) +(3,4,SC_RND_ZERO,SC_SAT_ZERO,0) +(5,6,SC_RND_MIN_INF,SC_SAT_SYM,0) +(7,8,SC_RND_INF,SC_WRAP,0) +(9,10,SC_RND_CONV,SC_SAT,0) +(11,12,SC_TRN,SC_SAT_ZERO,0) +(13,14,SC_TRN_ZERO,SC_SAT_SYM,0) +(15,16,SC_RND,SC_WRAP,0) + +(123,456,SC_RND_CONV,SC_SAT,0) +(11,12,SC_RND,SC_SAT,0) +(456,123,SC_TRN_ZERO,SC_SAT_SYM,0) +(15,16,SC_TRN,SC_WRAP,0) diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/array.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/array.cpp new file mode 100644 index 000000000..37ce9b8e8 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/array.cpp @@ -0,0 +1,121 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + array.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// array.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 11:55:50 1998 +// Status : none +// + +#include +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +// Without this, conversions use the implicit +// operator double, which is both lossy and +// can cause UB in certain cases. +template +class converter { + From val; +public: + converter(From val): val(val) {} + operator int() const { return val.to_int(); } + operator unsigned int() const { return val.to_uint(); } + operator short() const { return val.to_short(); } + operator unsigned short() const { return val.to_ushort(); } + operator long() const { return val.to_long(); } + operator unsigned long() const { return val.to_ulong(); } + operator float() const { return val.to_float(); } + operator double() const { return val.to_double(); } +}; + +template +To convert(From val) { + return converter(val); +} + + +template +void show(char const *const name, int i, T val) { + cerr << name << "[" << i << "] : " << val.to_double() << " : " << val.to_string(SC_HEX) << "\n"; +} + +template +void test_fx(U a_mul, U b_init, U b_mul, char const *t_name, char const *u_name) +{ + cerr << "--array-Inf-Inf-Inf-Inf-Inf- test_fx_" << t_name << "_" << u_name << "\n"; + + T a(static_cast(0)); + T b(b_init); + show("a", 0, a); + show("b", 0, b); + + for (U i = 1; i < 4; ++i) { + // Be careful here. We don't want a T to ever be implicitly converted, + // else we have a double which cannot be safely cast, but converting early + // means we can be subject to implicit upcasts. That's minimized by having all + // of the values of type U, but if U is smaller than int it can still be + // implicitly upcast, ergo the outer cast. + a = static_cast(i * i * a_mul); + b = static_cast(convert(b) * i * b_mul); + show("a", i, a); + show("b", i, b); + } +} + +template +void batch_test_fx(char const *t_name, int uinit) { + cerr << "************** array test_fx_" << t_name << "_\n"; + test_fx(1, -1, -1, t_name, "int"); + test_fx(1, uinit, -1, t_name, "uint"); + test_fx(1, -1, -1, t_name, "short"); + test_fx(1, uinit, -1, t_name, "ushort"); + test_fx(1, -1, -1, t_name, "long"); + test_fx(1, uinit, -1, t_name, "ulong"); + test_fx(1.123456789f, -1.987654321f, -1.789654123f, t_name, "float"); + test_fx(1.123456789, -1.987654321, -1.789654123, t_name, "double"); +} + +void array() { + batch_test_fx("float", -1); + batch_test_fx("ufix", -1); + batch_test_fx("fix", -1); + batch_test_fx >("fixed", 1); + batch_test_fx >("ufixed", 1); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/assign.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/assign.cpp new file mode 100644 index 000000000..c2cdf175c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/assign.cpp @@ -0,0 +1,547 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + assign.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// assign.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 09:58:11 1998 +// Status : none +// + +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +#define SHOW_ASSIGN(a) cerr << #a << " : " << double(a) << " : " << a.to_string(SC_HEX) << "\n" +#define IDENT_ASSIGN(a) cerr << "--assign-Inf-Inf-Inf-Inf-Inf- " << a << "\n" + +//---------------------------------------------------------------- +static void test_fx_float_int() +{ + IDENT_ASSIGN("test_fx_float_int"); + + sc_fxval a(0); + sc_fxval b; + sc_fxval c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_uint() +{ + IDENT_ASSIGN("test_fx_float_uint"); + + sc_fxval a(0u); + sc_fxval b; + sc_fxval c = b = (uint)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_short() +{ + IDENT_ASSIGN("test_fx_float_short"); + + sc_fxval a((short)0); + sc_fxval b; + sc_fxval c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_ushort() +{ + IDENT_ASSIGN("test_fx_float_ushort"); + + sc_fxval a((ushort)0); + sc_fxval b; + sc_fxval c = b = (ushort)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_long() +{ + IDENT_ASSIGN("test_fx_float_long"); + + sc_fxval a(0L); + sc_fxval b; + sc_fxval c = b = -1L; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_ulong() +{ + IDENT_ASSIGN("test_fx_float_ulong"); + sc_fxval a(0UL); + sc_fxval b; + sc_fxval c = b = -1UL; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_float() +{ + IDENT_ASSIGN("test_fx_float_float"); + + sc_fxval a(0.0f); + sc_fxval b; + sc_fxval c = b = -1.0f; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_float_double() +{ + IDENT_ASSIGN("test_fx_float_double"); + + sc_fxval a(0.0); + sc_fxval b; + sc_fxval c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +//---------------------------------------------------------------- +static void test_fx_ufix_int() +{ + IDENT_ASSIGN("test_fx_ufix_int"); + + sc_ufix a = 0; + sc_ufix b; + sc_ufix c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_uint() +{ + IDENT_ASSIGN("test_fx_ufix_uint"); + + sc_ufix a = (uint)0; + sc_ufix b; + sc_ufix c = b = (uint)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_short() +{ + IDENT_ASSIGN("test_fx_ufix_short"); + + sc_ufix a = (short)0; + sc_ufix b; + sc_ufix c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_ushort() +{ + IDENT_ASSIGN("test_fx_ufix_ushort"); + + sc_ufix a = (ushort)0; + sc_ufix b; + sc_ufix c = b = (ushort)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_long() +{ + IDENT_ASSIGN("test_fx_ufix_long"); + + sc_ufix a = (long)0; + sc_ufix b; + sc_ufix c = b = (long)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_ulong() +{ + IDENT_ASSIGN("test_fx_ufix_ulong"); + sc_ufix a = (ulong)0; + sc_ufix b; + sc_ufix c = b = (ulong)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_float() +{ + IDENT_ASSIGN("test_fx_ufix_float"); + + sc_ufix a = 0.0; + sc_ufix b; + sc_ufix c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufix_double() +{ + IDENT_ASSIGN("test_fx_ufix_double"); + + sc_ufix a = (double)0.0; + sc_ufix b; + sc_ufix c = b = (double)-1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +//---------------------------------------------------------------- +static void test_fx_fix_int() +{ + IDENT_ASSIGN("test_fx_fix_int"); + + sc_fix a = 0; + sc_fix b; + sc_fix c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_uint() +{ + IDENT_ASSIGN("test_fx_fix_uint"); + + sc_fix a = (uint)0; + sc_fix b; + sc_fix c = b = (uint)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_short() +{ + IDENT_ASSIGN("test_fx_fix_short"); + + sc_fix a = (short)0; + sc_fix b; + sc_fix c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_ushort() +{ + IDENT_ASSIGN("test_fx_fix_ushort"); + + sc_fix a = (ushort)0; + sc_fix b; + sc_fix c = b = (ushort)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_long() +{ + IDENT_ASSIGN("test_fx_fix_long"); + + sc_fix a = (long)0; + sc_fix b; + sc_fix c = b = (long)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_ulong() +{ + IDENT_ASSIGN("test_fx_fix_ulong"); + sc_fix a = (ulong)0; + sc_fix b; + sc_fix c = b = (ulong)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_float() +{ + IDENT_ASSIGN("test_fx_fix_float"); + + sc_fix a = 0.0; + sc_fix b; + sc_fix c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fix_double() +{ + IDENT_ASSIGN("test_fx_fix_double"); + + sc_fix a = (double)0.0; + sc_fix b; + sc_fix c = b = (double)-1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +//---------------------------------------------------------------- +static void test_fx_fixed_int() +{ + IDENT_ASSIGN("test_fx_fixed_int"); + + sc_fixed<8, 5> a = 0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_uint() +{ + IDENT_ASSIGN("test_fx_fixed_uint"); + + sc_fixed<8, 5> a = (uint)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (uint)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_short() +{ + IDENT_ASSIGN("test_fx_fixed_short"); + + sc_fixed<8, 5> a = (short)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_ushort() +{ + IDENT_ASSIGN("test_fx_fixed_ushort"); + + sc_fixed<8, 5> a = (ushort)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (ushort)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_long() +{ + IDENT_ASSIGN("test_fx_fixed_long"); + + sc_fixed<8, 5> a = (long)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (long)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_ulong() +{ + IDENT_ASSIGN("test_fx_fixed_ulong"); + sc_fixed<8, 5> a = (ulong)0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (ulong)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_float() +{ + IDENT_ASSIGN("test_fx_fixed_float"); + + sc_fixed<8, 5> a = 0.0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_fixed_double() +{ + IDENT_ASSIGN("test_fx_fixed_double"); + + sc_fixed<8, 5> a = (double)0.0; + sc_fixed<8, 5> b; + sc_fixed<8, 5> c = b = (double)-1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +//---------------------------------------------------------------- +static void test_fx_ufixed_int() +{ + IDENT_ASSIGN("test_fx_ufixed_int"); + + sc_ufixed<8, 5> a = 0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = -1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_uint() +{ + IDENT_ASSIGN("test_fx_ufixed_uint"); + + sc_ufixed<8, 5> a = (uint)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (uint)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_short() +{ + IDENT_ASSIGN("test_fx_ufixed_short"); + + sc_ufixed<8, 5> a = (short)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (short)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_ushort() +{ + IDENT_ASSIGN("test_fx_ufixed_ushort"); + + sc_ufixed<8, 5> a = (ushort)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (ushort)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_long() +{ + IDENT_ASSIGN("test_fx_ufixed_long"); + + sc_ufixed<8, 5> a = (long)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (long)-1; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_ulong() +{ + IDENT_ASSIGN("test_fx_ufixed_ulong"); + sc_ufixed<8, 5> a = (ulong)0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (ulong)abs(-1); + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_float() +{ + IDENT_ASSIGN("test_fx_ufixed_float"); + + sc_ufixed<8, 5> a = 0.0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = -1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +static void test_fx_ufixed_double() +{ + IDENT_ASSIGN("test_fx_ufixed_double"); + + sc_ufixed<8, 5> a = (double)0.0; + sc_ufixed<8, 5> b; + sc_ufixed<8, 5> c = b = (double)-1.0; + + SHOW_ASSIGN(a); SHOW_ASSIGN(b); SHOW_ASSIGN(c); +} + +void assign() +{ + cerr << "************** assign test_fx_float_\n"; + test_fx_float_int(); + test_fx_float_uint(); + test_fx_float_short(); + test_fx_float_ushort(); + test_fx_float_long(); + test_fx_float_ulong(); + test_fx_float_float(); + test_fx_float_double(); + cerr << "************** assign test_fx_ufix_\n"; + test_fx_ufix_int(); + test_fx_ufix_uint(); + test_fx_ufix_short(); + test_fx_ufix_ushort(); + test_fx_ufix_long(); + test_fx_ufix_ulong(); + test_fx_ufix_float(); + test_fx_ufix_double(); + cerr << "************** assign test_fx_fix_\n"; + test_fx_fix_int(); + test_fx_fix_uint(); + test_fx_fix_short(); + test_fx_fix_ushort(); + test_fx_fix_long(); + test_fx_fix_ulong(); + test_fx_fix_float(); + test_fx_fix_double(); + cerr << "************** assign test_fx_fixed_\n"; + test_fx_fixed_int(); + test_fx_fixed_uint(); + test_fx_fixed_short(); + test_fx_fixed_ushort(); + test_fx_fixed_long(); + test_fx_fixed_ulong(); + test_fx_fixed_float(); + test_fx_fixed_double(); + cerr << "************** assign test_fx_ufixed_\n"; + test_fx_ufixed_int(); + test_fx_ufixed_uint(); + test_fx_ufixed_short(); + test_fx_ufixed_ushort(); + test_fx_ufixed_long(); + test_fx_ufixed_ulong(); + test_fx_ufixed_float(); + test_fx_ufixed_double(); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/assign_constructor.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/assign_constructor.cpp new file mode 100644 index 000000000..3678ebab5 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/assign_constructor.cpp @@ -0,0 +1,641 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + assign_constructor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// assign_constructor.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 09:47:21 1998 +// Status : none +// + +#include +#include + +#define SC_INCLUDE_FX +#define SC_FXVAL_IMPLICIT_CONV +#include "systemc.h" +#include "fx_precision_double.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +#define SHOW_ASSIGN_CONSTRUCTORS(a) cerr << #a << " : " << double(a) << " : " << a.to_string(SC_HEX) << "\n" +#define IDENT_ASSIGN_CONSTRUCTORS(a) cerr << "--assign_constructor-Inf-Inf-Inf-Inf-Inf- " << a << "\n" + +//---------------------------------------------------------------- +// copy-initialisation from builtin types no longer works with +// sc_fxval_fast, unless SC_FXVAL_IMPLICIT_CONV is defined. +#if defined(SC_FXVAL_IMPLICIT_CONV) +static void test_fx_float_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_int"); + + sc_fxval a = 0; + sc_fxval b = 1; + sc_fxval c = -1; + sc_fxval d = INT_MAX; + sc_fxval e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_uint"); + + sc_fxval a = (uint)0; + sc_fxval b = (uint)1; + sc_fxval c = (uint)-1; + sc_fxval d = UINT_MAX; + sc_fxval e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_short"); + + sc_fxval a = (short)0; + sc_fxval b = (short)1; + sc_fxval c = (short)-1; + sc_fxval d = SHRT_MAX; + sc_fxval e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_ushort"); + + sc_fxval a = (ushort)0; + sc_fxval b = (ushort)1; + sc_fxval c = (ushort)-1; + sc_fxval d = USHRT_MAX; + sc_fxval e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_long"); + + sc_fxval a = (long)0; + sc_fxval b = (long)1; + sc_fxval c = (long)-1; + sc_fxval d = LONG_MAX; + sc_fxval e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_ulong"); + + sc_fxval a = (ulong)0; + sc_fxval b = (ulong)1; + sc_fxval c = (ulong)-1; + sc_fxval d = ULONG_MAX; + sc_fxval e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_float"); + + sc_fxval a = 0.0; + sc_fxval b = 1.0; + sc_fxval c = -1.0; + sc_fxval d = FLT_MAX; + sc_fxval e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_float_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_float_double"); + + sc_fxval a = (double)0.0; + sc_fxval b = (double)1.0; + sc_fxval c = (double)-1.0; + sc_fxval d = DBL_MAX; + sc_fxval e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +#endif // defined(SC_FXVAL_IMPLICIT_CONV) + +//---------------------------------------------------------------- +static void test_fx_ufix_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_int"); + + sc_ufix a = 0; + sc_ufix b = 1; + sc_ufix c = -1; + sc_ufix d = INT_MAX; + sc_ufix e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_uint"); + + sc_ufix a = (uint)0; + sc_ufix b = (uint)1; + sc_ufix c = (uint)-1; + sc_ufix d = UINT_MAX; + sc_ufix e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_short"); + + sc_ufix a = (short)0; + sc_ufix b = (short)1; + sc_ufix c = (short)-1; + sc_ufix d = SHRT_MAX; + sc_ufix e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_ushort"); + + sc_ufix a = (ushort)0; + sc_ufix b = (ushort)1; + sc_ufix c = (ushort)-1; + sc_ufix d = USHRT_MAX; + sc_ufix e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_long"); + + sc_ufix a = (long)0; + sc_ufix b = (long)1; + sc_ufix c = (long)-1; + sc_ufix d = LONG_MAX; + sc_ufix e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_ulong"); + + sc_ufix a = (ulong)0; + sc_ufix b = (ulong)1; + sc_ufix c = (ulong)-1; + sc_ufix d = ULONG_MAX; + sc_ufix e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_float"); + + sc_ufix a = 0.0; + sc_ufix b = 1.0; + sc_ufix c = -1.0; + sc_ufix d = FLT_MAX; + sc_ufix e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufix_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufix_double"); + + sc_ufix a = (double)0.0; + sc_ufix b = (double)1.0; + sc_ufix c = (double)-1.0; + sc_ufix d = DBL_MAX; + sc_ufix e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +//---------------------------------------------------------------- +static void test_fx_fix_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_int"); + + sc_fix a = 0; + sc_fix b = 1; + sc_fix c = -1; + sc_fix d = INT_MAX; + sc_fix e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_uint"); + + sc_fix a = (uint)0; + sc_fix b = (uint)1; + sc_fix c = (uint)-1; + sc_fix d = UINT_MAX; + sc_fix e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_short"); + + sc_fix a = (short)0; + sc_fix b = (short)1; + sc_fix c = (short)-1; + sc_fix d = SHRT_MAX; + sc_fix e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_ushort"); + + sc_fix a = (ushort)0; + sc_fix b = (ushort)1; + sc_fix c = (ushort)-1; + sc_fix d = USHRT_MAX; + sc_fix e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_long"); + + sc_fix a = (long)0; + sc_fix b = (long)1; + sc_fix c = (long)-1; + sc_fix d = LONG_MAX; + sc_fix e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_ulong"); + + sc_fix a = (ulong)0; + sc_fix b = (ulong)1; + sc_fix c = (ulong)-1; + sc_fix d = ULONG_MAX; + sc_fix e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_float"); + + sc_fix a = 0.0; + sc_fix b = 1.0; + sc_fix c = -1.0; + sc_fix d = FLT_MAX; + sc_fix e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fix_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fix_double"); + + sc_fix a = (double)0.0; + sc_fix b = (double)1.0; + sc_fix c = (double)-1.0; + sc_fix d = DBL_MAX; + sc_fix e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +//---------------------------------------------------------------- +static void test_fx_fixed_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_int"); + + sc_fixed<8, 5> a = 0; + sc_fixed<8, 5> b = 1; + sc_fixed<8, 5> c = -1; + sc_fixed<8, 5> d = INT_MAX; + sc_fixed<8, 5> e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_uint"); + + sc_fixed<8, 5> a = (uint)0; + sc_fixed<8, 5> b = (uint)1; + sc_fixed<8, 5> c = (uint)-1; + sc_fixed<8, 5> d = UINT_MAX; + sc_fixed<8, 5> e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_short"); + + sc_fixed<8, 5> a = (short)0; + sc_fixed<8, 5> b = (short)1; + sc_fixed<8, 5> c = (short)-1; + sc_fixed<8, 5> d = SHRT_MAX; + sc_fixed<8, 5> e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_ushort"); + + sc_fixed<8, 5> a = (ushort)0; + sc_fixed<8, 5> b = (ushort)1; + sc_fixed<8, 5> c = (ushort)-1; + sc_fixed<8, 5> d = USHRT_MAX; + sc_fixed<8, 5> e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_long"); + + sc_fixed<8, 5> a = (long)0; + sc_fixed<8, 5> b = (long)1; + sc_fixed<8, 5> c = (long)-1; + sc_fixed<8, 5> d = LONG_MAX; + sc_fixed<8, 5> e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_ulong"); + + sc_fixed<8, 5> a = (ulong)0; + sc_fixed<8, 5> b = (ulong)1; + sc_fixed<8, 5> c = (ulong)-1; + sc_fixed<8, 5> d = ULONG_MAX; + sc_fixed<8, 5> e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_float"); + + sc_fixed<8, 5> a = 0.0; + sc_fixed<8, 5> b = 1.0; + sc_fixed<8, 5> c = -1.0; + sc_fixed<8, 5> d = FLT_MAX; + sc_fixed<8, 5> e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_fixed_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_fixed_double"); + + sc_fixed<8, 5> a = (double)0.0; + sc_fixed<8, 5> b = (double)1.0; + sc_fixed<8, 5> c = (double)-1.0; + sc_fixed<8, 5> d = DBL_MAX; + sc_fixed<8, 5> e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +//---------------------------------------------------------------- +static void test_fx_ufixed_int() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_int"); + + sc_ufixed<8, 5> a = 0; + sc_ufixed<8, 5> b = 1; + sc_ufixed<8, 5> c = -1; + sc_ufixed<8, 5> d = INT_MAX; + sc_ufixed<8, 5> e = INT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_uint() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_uint"); + + sc_ufixed<8, 5> a = (uint)0; + sc_ufixed<8, 5> b = (uint)1; + sc_ufixed<8, 5> c = (uint)-1; + sc_ufixed<8, 5> d = UINT_MAX; + sc_ufixed<8, 5> e = (uint)abs(INT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_short() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_short"); + + sc_ufixed<8, 5> a = (short)0; + sc_ufixed<8, 5> b = (short)1; + sc_ufixed<8, 5> c = (short)-1; + sc_ufixed<8, 5> d = SHRT_MAX; + sc_ufixed<8, 5> e = SHRT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_ushort() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_ushort"); + + sc_ufixed<8, 5> a = (ushort)0; + sc_ufixed<8, 5> b = (ushort)1; + sc_ufixed<8, 5> c = (ushort)-1; + sc_ufixed<8, 5> d = USHRT_MAX; + sc_ufixed<8, 5> e = (ushort)abs(SHRT_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_long() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_long"); + + sc_ufixed<8, 5> a = (long)0; + sc_ufixed<8, 5> b = (long)1; + sc_ufixed<8, 5> c = (long)-1; + sc_ufixed<8, 5> d = LONG_MAX; + sc_ufixed<8, 5> e = LONG_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_ulong() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_ulong"); + + sc_ufixed<8, 5> a = (ulong)0; + sc_ufixed<8, 5> b = (ulong)1; + sc_ufixed<8, 5> c = (ulong)-1; + sc_ufixed<8, 5> d = ULONG_MAX; + sc_ufixed<8, 5> e = (ulong)abs(LONG_MIN); + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_float() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_float"); + + sc_ufixed<8, 5> a = 0.0; + sc_ufixed<8, 5> b = 1.0; + sc_ufixed<8, 5> c = -1.0; + sc_ufixed<8, 5> d = FLT_MAX; + sc_ufixed<8, 5> e = FLT_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +static void test_fx_ufixed_double() +{ + IDENT_ASSIGN_CONSTRUCTORS("test_fx_ufixed_double"); + + sc_ufixed<8, 5> a = (double)0.0; + sc_ufixed<8, 5> b = (double)1.0; + sc_ufixed<8, 5> c = (double)-1.0; + sc_ufixed<8, 5> d = DBL_MAX; + sc_ufixed<8, 5> e = DBL_MIN; + + SHOW_ASSIGN_CONSTRUCTORS(a); SHOW_ASSIGN_CONSTRUCTORS(b); SHOW_ASSIGN_CONSTRUCTORS(c); SHOW_ASSIGN_CONSTRUCTORS(d); SHOW_ASSIGN_CONSTRUCTORS(e); +} + +void assign_constructor() +{ +#if defined(SC_FXVAL_IMPLICIT_CONV) + cerr << "************** assign_constructor test_fx_float_\n"; + test_fx_float_int(); + test_fx_float_uint(); + test_fx_float_short(); + test_fx_float_ushort(); + test_fx_float_long(); + test_fx_float_ulong(); + test_fx_float_float(); + test_fx_float_double(); +#endif // defined(SC_FXVAL_IMPLICIT_CONV) + cerr << "************** assign_constructor test_fx_ufix_\n"; + test_fx_ufix_int(); + test_fx_ufix_uint(); + test_fx_ufix_short(); + test_fx_ufix_ushort(); + test_fx_ufix_long(); + test_fx_ufix_ulong(); + test_fx_ufix_float(); + test_fx_ufix_double(); + cerr << "************** assign_constructor test_fx_fix_\n"; + test_fx_fix_int(); + test_fx_fix_uint(); + test_fx_fix_short(); + test_fx_fix_ushort(); + test_fx_fix_long(); + test_fx_fix_ulong(); + test_fx_fix_float(); + test_fx_fix_double(); + cerr << "************** assign_constructor test_fx_fixed_\n"; + test_fx_fixed_int(); + test_fx_fixed_uint(); + test_fx_fixed_short(); + test_fx_fixed_ushort(); + test_fx_fixed_long(); + test_fx_fixed_ulong(); + test_fx_fixed_float(); + test_fx_fixed_double(); + cerr << "************** assign_constructor test_fx_ufixed_\n"; + test_fx_ufixed_int(); + test_fx_ufixed_uint(); + test_fx_ufixed_short(); + test_fx_ufixed_ushort(); + test_fx_ufixed_long(); + test_fx_ufixed_ulong(); + test_fx_ufixed_float(); + test_fx_ufixed_double(); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/default_assign.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/default_assign.cpp new file mode 100644 index 000000000..7b040453e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/default_assign.cpp @@ -0,0 +1,637 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + default_assign.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// default_assign.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 09:52:54 1998 +// Status : none +// + +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +#define SHOW_DEFAULT_ASSIGN(a) cerr << #a << " : " << double(a) << " : " << a.to_string(SC_HEX) << "\n" +#define IDENT_DEFAULT_ASSIGN(a) cerr << "--default_assign-Inf-Inf-Inf-Inf-Inf- " << a << "\n" + +//------------------------------------------------------- +static void test_fx_float_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_int"); + + sc_fxval a; a = 0; + sc_fxval b; b = 1; + sc_fxval c; c = -1; + sc_fxval d; d = INT_MAX; + sc_fxval e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_uint"); + + sc_fxval a; a = (uint)0; + sc_fxval b; b = (uint)1; + sc_fxval c; c = (uint)-1; + sc_fxval d; d = UINT_MAX; + sc_fxval e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_short"); + + sc_fxval a; a = (short)0; + sc_fxval b; b = (short)1; + sc_fxval c; c = (short)-1; + sc_fxval d; d = SHRT_MAX; + sc_fxval e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_ushort"); + + sc_fxval a; a = (ushort)0; + sc_fxval b; b = (ushort)1; + sc_fxval c; c = (ushort)-1; + sc_fxval d; d = USHRT_MAX; + sc_fxval e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_long"); + + sc_fxval a; a = (long)0; + sc_fxval b; b = (long)1; + sc_fxval c; c = (long)-1; + sc_fxval d; d = LONG_MAX; + sc_fxval e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_ulong"); + + sc_fxval a; a = (ulong)0; + sc_fxval b; b = (ulong)1; + sc_fxval c; c = (ulong)-1; + sc_fxval d; d = ULONG_MAX; + sc_fxval e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_float"); + + sc_fxval a; a = 0.0; + sc_fxval b; b = 1.0; + sc_fxval c; c = -1.0; + sc_fxval d; d = FLT_MAX; + sc_fxval e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_float_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_float_double"); + + sc_fxval a; a = (double)0.0; + sc_fxval b; b = (double)1.0; + sc_fxval c; c = (double)-1.0; + sc_fxval d; d = DBL_MAX; + sc_fxval e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +//------------------------------------------------------- +static void test_fx_ufix_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_int"); + + sc_ufix a; a = 0; + sc_ufix b; b = 1; + sc_ufix c; c = -1; + sc_ufix d; d = INT_MAX; + sc_ufix e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_uint"); + + sc_ufix a; a = (uint)0; + sc_ufix b; b = (uint)1; + sc_ufix c; c = (uint)-1; + sc_ufix d; d = UINT_MAX; + sc_ufix e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_short"); + + sc_ufix a; a = (short)0; + sc_ufix b; b = (short)1; + sc_ufix c; c = (short)-1; + sc_ufix d; d = SHRT_MAX; + sc_ufix e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_ushort"); + + sc_ufix a; a = (ushort)0; + sc_ufix b; b = (ushort)1; + sc_ufix c; c = (ushort)-1; + sc_ufix d; d = USHRT_MAX; + sc_ufix e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_long"); + + sc_ufix a; a = (long)0; + sc_ufix b; b = (long)1; + sc_ufix c; c = (long)-1; + sc_ufix d; d = LONG_MAX; + sc_ufix e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_ulong"); + + sc_ufix a; a = (ulong)0; + sc_ufix b; b = (ulong)1; + sc_ufix c; c = (ulong)-1; + sc_ufix d; d = ULONG_MAX; + sc_ufix e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_float"); + + sc_ufix a; a = 0.0; + sc_ufix b; b = 1.0; + sc_ufix c; c = -1.0; + sc_ufix d; d = FLT_MAX; + sc_ufix e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufix_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufix_double"); + + sc_ufix a; a = (double)0.0; + sc_ufix b; b = (double)1.0; + sc_ufix c; c = (double)-1.0; + sc_ufix d; d = DBL_MAX; + sc_ufix e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +//------------------------------------------------------- +static void test_fx_fix_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_int"); + + sc_fix a; a = 0; + sc_fix b; b = 1; + sc_fix c; c = -1; + sc_fix d; d = INT_MAX; + sc_fix e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_uint"); + + sc_fix a; a = (uint)0; + sc_fix b; b = (uint)1; + sc_fix c; c = (uint)-1; + sc_fix d; d = UINT_MAX; + sc_fix e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_short"); + + sc_fix a; a = (short)0; + sc_fix b; b = (short)1; + sc_fix c; c = (short)-1; + sc_fix d; d = SHRT_MAX; + sc_fix e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_ushort"); + + sc_fix a; a = (ushort)0; + sc_fix b; b = (ushort)1; + sc_fix c; c = (ushort)-1; + sc_fix d; d = USHRT_MAX; + sc_fix e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_long"); + + sc_fix a; a = (long)0; + sc_fix b; b = (long)1; + sc_fix c; c = (long)-1; + sc_fix d; d = LONG_MAX; + sc_fix e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_ulong"); + + sc_fix a; a = (ulong)0; + sc_fix b; b = (ulong)1; + sc_fix c; c = (ulong)-1; + sc_fix d; d = ULONG_MAX; + sc_fix e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_float"); + + sc_fix a; a = 0.0; + sc_fix b; b = 1.0; + sc_fix c; c = -1.0; + sc_fix d; d = FLT_MAX; + sc_fix e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fix_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fix_double"); + + sc_fix a; a = (double)0.0; + sc_fix b; b = (double)1.0; + sc_fix c; c = (double)-1.0; + sc_fix d; d = DBL_MAX; + sc_fix e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +//------------------------------------------------------- +static void test_fx_fixed_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_int"); + + sc_fixed<8, 5> a; a = 0; + sc_fixed<8, 5> b; b = 1; + sc_fixed<8, 5> c; c = -1; + sc_fixed<8, 5> d; d = INT_MAX; + sc_fixed<8, 5> e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_uint"); + + sc_fixed<8, 5> a; a = (uint)0; + sc_fixed<8, 5> b; b = (uint)1; + sc_fixed<8, 5> c; c = (uint)-1; + sc_fixed<8, 5> d; d = UINT_MAX; + sc_fixed<8, 5> e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_short"); + + sc_fixed<8, 5> a; a = (short)0; + sc_fixed<8, 5> b; b = (short)1; + sc_fixed<8, 5> c; c = (short)-1; + sc_fixed<8, 5> d; d = SHRT_MAX; + sc_fixed<8, 5> e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_ushort"); + + sc_fixed<8, 5> a; a = (ushort)0; + sc_fixed<8, 5> b; b = (ushort)1; + sc_fixed<8, 5> c; c = (ushort)-1; + sc_fixed<8, 5> d; d = USHRT_MAX; + sc_fixed<8, 5> e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_long"); + + sc_fixed<8, 5> a; a = (long)0; + sc_fixed<8, 5> b; b = (long)1; + sc_fixed<8, 5> c; c = (long)-1; + sc_fixed<8, 5> d; d = LONG_MAX; + sc_fixed<8, 5> e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_ulong"); + + sc_fixed<8, 5> a; a = (ulong)0; + sc_fixed<8, 5> b; b = (ulong)1; + sc_fixed<8, 5> c; c = (ulong)-1; + sc_fixed<8, 5> d; d = ULONG_MAX; + sc_fixed<8, 5> e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_float"); + + sc_fixed<8, 5> a; a = 0.0; + sc_fixed<8, 5> b; b = 1.0; + sc_fixed<8, 5> c; c = -1.0; + sc_fixed<8, 5> d; d = FLT_MAX; + sc_fixed<8, 5> e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_fixed_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_fixed_double"); + + sc_fixed<8, 5> a; a = (double)0.0; + sc_fixed<8, 5> b; b = (double)1.0; + sc_fixed<8, 5> c; c = (double)-1.0; + sc_fixed<8, 5> d; d = DBL_MAX; + sc_fixed<8, 5> e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +//------------------------------------------------------- +static void test_fx_ufixed_int() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_int"); + + sc_ufixed<8, 5> a; a = 0; + sc_ufixed<8, 5> b; b = 1; + sc_ufixed<8, 5> c; c = -1; + sc_ufixed<8, 5> d; d = INT_MAX; + sc_ufixed<8, 5> e; e = INT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_uint() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_uint"); + + sc_ufixed<8, 5> a; a = (uint)0; + sc_ufixed<8, 5> b; b = (uint)1; + sc_ufixed<8, 5> c; c = (uint)-1; + sc_ufixed<8, 5> d; d = UINT_MAX; + sc_ufixed<8, 5> e; e = (uint)abs(INT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_short() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_short"); + + sc_ufixed<8, 5> a; a = (short)0; + sc_ufixed<8, 5> b; b = (short)1; + sc_ufixed<8, 5> c; c = (short)-1; + sc_ufixed<8, 5> d; d = SHRT_MAX; + sc_ufixed<8, 5> e; e = SHRT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_ushort() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_ushort"); + + sc_ufixed<8, 5> a; a = (ushort)0; + sc_ufixed<8, 5> b; b = (ushort)1; + sc_ufixed<8, 5> c; c = (ushort)-1; + sc_ufixed<8, 5> d; d = USHRT_MAX; + sc_ufixed<8, 5> e; e = (ushort)abs(SHRT_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_long() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_long"); + + sc_ufixed<8, 5> a; a = (long)0; + sc_ufixed<8, 5> b; b = (long)1; + sc_ufixed<8, 5> c; c = (long)-1; + sc_ufixed<8, 5> d; d = LONG_MAX; + sc_ufixed<8, 5> e; e = LONG_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_ulong() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_ulong"); + + sc_ufixed<8, 5> a; a = (ulong)0; + sc_ufixed<8, 5> b; b = (ulong)1; + sc_ufixed<8, 5> c; c = (ulong)-1; + sc_ufixed<8, 5> d; d = ULONG_MAX; + sc_ufixed<8, 5> e; e = (ulong)abs(LONG_MIN); + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_float() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_float"); + + sc_ufixed<8, 5> a; a = 0.0; + sc_ufixed<8, 5> b; b = 1.0; + sc_ufixed<8, 5> c; c = -1.0; + sc_ufixed<8, 5> d; d = FLT_MAX; + sc_ufixed<8, 5> e; e = FLT_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +static void test_fx_ufixed_double() +{ + IDENT_DEFAULT_ASSIGN("test_fx_ufixed_double"); + + sc_ufixed<8, 5> a; a = (double)0.0; + sc_ufixed<8, 5> b; b = (double)1.0; + sc_ufixed<8, 5> c; c = (double)-1.0; + sc_ufixed<8, 5> d; d = DBL_MAX; + sc_ufixed<8, 5> e; e = DBL_MIN; + + SHOW_DEFAULT_ASSIGN(a); SHOW_DEFAULT_ASSIGN(b); SHOW_DEFAULT_ASSIGN(c); SHOW_DEFAULT_ASSIGN(d); SHOW_DEFAULT_ASSIGN(e); +} + +void default_assign() +{ + cerr << "************** default_assign fx_float\n"; + test_fx_float_int(); + test_fx_float_uint(); + test_fx_float_short(); + test_fx_float_ushort(); + test_fx_float_long(); + test_fx_float_ulong(); + test_fx_float_float(); + test_fx_float_double(); + + cerr << "************** default_assign fx_ufix\n"; + test_fx_ufix_int(); + test_fx_ufix_uint(); + test_fx_ufix_short(); + test_fx_ufix_ushort(); + test_fx_ufix_long(); + test_fx_ufix_ulong(); + test_fx_ufix_float(); + test_fx_ufix_double(); + + cerr << "************** default_assign fx_fix\n"; + test_fx_fix_int(); + test_fx_fix_uint(); + test_fx_fix_short(); + test_fx_fix_ushort(); + test_fx_fix_long(); + test_fx_fix_ulong(); + test_fx_fix_float(); + test_fx_fix_double(); + + cerr << "************** default_assign fx_fixed\n"; + test_fx_fixed_int(); + test_fx_fixed_uint(); + test_fx_fixed_short(); + test_fx_fixed_ushort(); + test_fx_fixed_long(); + test_fx_fixed_ulong(); + test_fx_fixed_float(); + test_fx_fixed_double(); + + cerr << "************** default_assign fx_ufixed\n"; + test_fx_ufixed_int(); + test_fx_ufixed_uint(); + test_fx_ufixed_short(); + test_fx_ufixed_ushort(); + test_fx_ufixed_long(); + test_fx_ufixed_ulong(); + test_fx_ufixed_float(); + test_fx_ufixed_double(); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/default_constructor.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/default_constructor.cpp new file mode 100644 index 000000000..b534ddd77 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/default_constructor.cpp @@ -0,0 +1,732 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + default_constructor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// default_constructor.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 09:38:31 1998 +// Status : none +// + +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +#define SHOW(a) cerr << #a << " : " << double(a) << " : " << a.to_string(SC_HEX) << "\n" +#define IDENT(a) cerr << "--default_constructor-Inf-Inf-Inf-Inf-Inf- " << a << "\n" + +#define T_CHAR_MAX "0b010101110100110111001011" +#define T_CHAR_MIN "-0xsmdeadbeafe-101" +#define T_UCHAR_MAX "0b010101110100110111001011e+101" +#define T_UCHAR_MIN "0xdeadbeafe-101" + +static void test_fx_float_char() +{ + IDENT("test_fx_float_char"); + + sc_fxval a("0"); + sc_fxval b("1"); + sc_fxval c("-1"); + sc_fxval d(T_CHAR_MAX); + sc_fxval e(T_CHAR_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_int() +{ + IDENT("test_fx_float_int"); + + sc_fxval a(0); + sc_fxval b(1); + sc_fxval c(-1); + sc_fxval d(INT_MAX); + sc_fxval e(INT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_uint() +{ + IDENT("test_fx_float_uint"); + + sc_fxval a((uint)0); + sc_fxval b((uint)1); + sc_fxval c((uint)-1); + sc_fxval d(UINT_MAX); + sc_fxval e((uint)abs(INT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_short() +{ + IDENT("test_fx_float_short"); + + sc_fxval a((short)0); + sc_fxval b((short)1); + sc_fxval c((short)-1); + sc_fxval d((short)SHRT_MAX); + sc_fxval e((short)SHRT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_ushort() +{ + IDENT("test_fx_float_ushort"); + + sc_fxval a((ushort)0); + sc_fxval b((ushort)1); + sc_fxval c((ushort)-1); + sc_fxval d(USHRT_MAX); + sc_fxval e((ushort)abs(SHRT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_long() +{ + IDENT("test_fx_float_long"); + + sc_fxval a((long)0); + sc_fxval b((long)1); + sc_fxval c((long)-1); + sc_fxval d(LONG_MAX); + sc_fxval e(LONG_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_ulong() +{ + IDENT("test_fx_float_ulong"); + + sc_fxval a((ulong)0); + sc_fxval b((ulong)1); + sc_fxval c((ulong)-1); + sc_fxval d(ULONG_MAX); + sc_fxval e((ulong)abs(LONG_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_float() +{ + IDENT("test_fx_float_float"); + + sc_fxval a(0.0); + sc_fxval b(1.0); + sc_fxval c(-1.0); + sc_fxval d(FLT_MAX); + sc_fxval e(FLT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_float_double() +{ + IDENT("test_fx_float_double"); + + sc_fxval a((double)0.0); + sc_fxval b((double)1.0); + sc_fxval c((double)-1.0); + sc_fxval d(DBL_MAX); + sc_fxval e(DBL_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +//----------------------------------------------------------------------- +static void test_fx_ufix_char() +{ + IDENT("test_fx_ufix_char"); + + sc_ufix a("0"); + sc_ufix b("1"); + sc_ufix c("-1"); + sc_ufix d(T_UCHAR_MAX); + sc_ufix e(T_UCHAR_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_int() +{ + IDENT("test_fx_ufix_int"); + + sc_ufix a(0); + sc_ufix b(1); + sc_ufix c(-1); + sc_ufix d(INT_MAX); + sc_ufix e(INT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_uint() +{ + IDENT("test_fx_ufix_uint"); + + sc_ufix a((uint)0); + sc_ufix b((uint)1); + sc_ufix c((uint)-1); + sc_ufix d(UINT_MAX); + sc_ufix e((uint)abs(INT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_short() +{ + IDENT("test_fx_ufix_short"); + + sc_ufix a((short)0); + sc_ufix b((short)1); + sc_ufix c((short)-1); + sc_ufix d(SHRT_MAX); + sc_ufix e(SHRT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_ushort() +{ + IDENT("test_fx_ufix_ushort"); + + sc_ufix a((ushort)0); + sc_ufix b((ushort)1); + sc_ufix c((ushort)-1); + sc_ufix d(USHRT_MAX); + sc_ufix e((ushort)abs(SHRT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_long() +{ + IDENT("test_fx_ufix_long"); + + sc_ufix a((long)0); + sc_ufix b((long)1); + sc_ufix c((long)-1); + sc_ufix d(LONG_MAX); + sc_ufix e(LONG_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_ulong() +{ + IDENT("test_fx_ufix_ulong"); + + sc_ufix a((ulong)0); + sc_ufix b((ulong)1); + sc_ufix c((ulong)-1); + sc_ufix d(ULONG_MAX); + sc_ufix e((ulong)abs(LONG_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_float() +{ + IDENT("test_fx_ufix_float"); + + sc_ufix a(0.0); + sc_ufix b(1.0); + sc_ufix c(-1.0); + sc_ufix d(FLT_MAX); + sc_ufix e(FLT_MIN); + +// cerr << "sc_ufix d(FLT_MAX); does not work (yet)\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufix_double() +{ + IDENT("test_fx_ufix_double"); + + sc_ufix a((double)0.0); + sc_ufix b((double)1.0); + sc_ufix c((double)-1.0); + sc_ufix d(DBL_MAX); + sc_ufix e(DBL_MIN); + +// cerr << "sc_ufix d(DBL_MAX); does not work (yet)\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +//----------------------------------------------------------------------- +static void test_fx_fix_char() +{ + IDENT("test_fx_fix_char"); + + sc_fix a("0"); SHOW(a); + sc_fix b("1"); SHOW(b); + sc_fix c("-1"); SHOW(c); + sc_fix d(T_CHAR_MAX); SHOW(d); + sc_fix e(T_CHAR_MIN); SHOW(e); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_int() +{ + IDENT("test_fx_fix_int"); + + sc_fix a(0); + sc_fix b(1); + sc_fix c(-1); + sc_fix d(INT_MAX); + sc_fix e(INT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_uint() +{ + IDENT("test_fx_fix_uint"); + + sc_fix a((uint)0); + sc_fix b((uint)1); + sc_fix c((uint)-1); + sc_fix d(UINT_MAX); + sc_fix e((uint)abs(INT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} +static void test_fx_fix_short() +{ + IDENT("test_fx_fix_short"); + + sc_fix a((short)0); + sc_fix b((short)1); + sc_fix c((short)-1); + sc_fix d(SHRT_MAX); + sc_fix e(SHRT_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_ushort() +{ + IDENT("test_fx_fix_ushort"); + + sc_fix a((ushort)0); + sc_fix b((ushort)1); + sc_fix c((ushort)-1); + sc_fix d(USHRT_MAX); + sc_fix e((ushort)abs(SHRT_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_long() +{ + IDENT("test_fx_fix_long"); + + sc_fix a((long)0); + sc_fix b((long)1); + sc_fix c((long)-1); + sc_fix d(LONG_MAX); + sc_fix e(LONG_MIN); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_ulong() +{ + IDENT("test_fx_fix_ulong"); + + sc_fix a((ulong)0); + sc_fix b((ulong)1); + sc_fix c((ulong)-1); + sc_fix d(ULONG_MAX); + sc_fix e((ulong)abs(LONG_MIN)); + + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_float() +{ + IDENT("test_fx_fix_float"); + + sc_fix a(0.0); + sc_fix b(1.0); + sc_fix c(-1.0); + sc_fix d(FLT_MAX); + sc_fix e(FLT_MIN); + +// cerr << "sc_fix d(FLT_MAX); does not work (yet)\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fix_double() +{ + IDENT("test_fx_fix_double"); + + sc_fix a((double)0.0); + sc_fix b((double)1.0); + sc_fix c((double)-1.0); + sc_fix d(DBL_MAX); + sc_fix e(DBL_MIN); + +// cerr << "sc_fix d(DBL_MAX); does not work (yet)\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +//----------------------------------------------------------------------- +static void test_fx_fixed_char() +{ + IDENT("test_fx_fixed_char"); + + sc_fixed<8, 5> a("0"); + sc_fixed<8, 5> b("1"); + sc_fixed<8, 5> c("-1"); + sc_fixed<8, 5> d(T_CHAR_MAX); + sc_fixed<8, 5> e(T_CHAR_MIN); + +// cerr << "sc_fixed<8, 5> d(INT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_int() +{ + IDENT("test_fx_fixed_int"); + + sc_fixed<8, 5> a(0); + sc_fixed<8, 5> b(1); + sc_fixed<8, 5> c(-1); + sc_fixed<8, 5> d(INT_MAX); + sc_fixed<8, 5> e(INT_MIN); + +// cerr << "sc_fixed<8, 5> d(INT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_uint() +{ + IDENT("test_sc_fixed_uint"); + + sc_fixed<8, 5> a((uint)0); + sc_fixed<8, 5> b((uint)1); + sc_fixed<8, 5> c((uint)-1); + sc_fixed<8, 5> d(UINT_MAX); + sc_fixed<8, 5> e((uint)abs(INT_MIN)); + +// cerr << "sc_fixed<8, 5> d(UINT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_short() +{ + IDENT("test_fx_fixed_short"); + + sc_fixed<8, 5> a((short)0); + sc_fixed<8, 5> b((short)1); + sc_fixed<8, 5> c((short)-1); + sc_fixed<8, 5> d(SHRT_MAX); + sc_fixed<8, 5> e(SHRT_MIN); + +// cerr << "sc_fixed<8, 5> d(INT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_ushort() +{ + IDENT("test_sc_fixed_ushort"); + + sc_fixed<8, 5> a((ushort)0); + sc_fixed<8, 5> b((ushort)1); + sc_fixed<8, 5> c((ushort)-1); + sc_fixed<8, 5> d(USHRT_MAX); + sc_fixed<8, 5> e((ushort)abs(SHRT_MIN)); + +// cerr << "sc_fixed<8, 5> d(UINT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_long() +{ + IDENT("test_sc_fixeded_long"); + + sc_fixed<8, 5> a((long)0); + sc_fixed<8, 5> b((long)1); + sc_fixed<8, 5> c((long)-1); + sc_fixed<8, 5> d(LONG_MAX); + sc_fixed<8, 5> e(LONG_MIN); + +// cerr << "sc_fixed<8, 5> d(INT_LONG); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_ulong() +{ + IDENT("test_fx_fixed_ulong"); + + sc_fixed<8, 5> a((ulong)0); + sc_fixed<8, 5> b((ulong)1); + sc_fixed<8, 5> c((ulong)-1); + sc_fixed<8, 5> d(ULONG_MAX); + sc_fixed<8, 5> e((ulong)abs(LONG_MIN)); + +// cerr << "sc_fixed<8, 5> d(ULONG_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_float() +{ + IDENT("test_fx_fixed_float"); + + sc_fixed<8, 5> a(0.0); + sc_fixed<8, 5> b(1.0); + sc_fixed<8, 5> c(-1.0); + sc_fixed<8, 5> d(FLT_MAX); + sc_fixed<8, 5> e(FLT_MIN); + +// cerr << "sc_fixed<8, 5> d(FLT_MAX); does not work (yet)\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_fixed_double() +{ + IDENT("test_fx_fixed_double"); + + sc_fixed<8, 5> a((double)0.0); + sc_fixed<8, 5> b((double)1.0); + sc_fixed<8, 5> c((double)-1.0); + sc_fixed<8, 5> d(DBL_MAX); + sc_fixed<8, 5> e(DBL_MIN); + +// cerr << "sc_fixed<8, 5> d(DBL_MAX); does not work (yet)\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +//----------------------------------------------------------------------- +static void test_fx_ufixed_char() +{ + IDENT("test_fx_ufixed_char"); + + sc_ufixed<8, 5> a("0"); + sc_ufixed<8, 5> b("1"); + sc_ufixed<8, 5> c("-1"); + sc_ufixed<8, 5> d(T_UCHAR_MAX); + sc_ufixed<8, 5> e(T_UCHAR_MIN); + +// cerr << "sc_ufixed<8, 5> d(INT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_int() +{ + IDENT("test_fx_ufixed_int"); + + sc_ufixed<8, 5> a(0); + sc_ufixed<8, 5> b(1); + sc_ufixed<8, 5> c(-1); + sc_ufixed<8, 5> d(INT_MAX); + sc_ufixed<8, 5> e(INT_MIN); + +// cerr << "sc_ufixed<8, 5> d(INT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_uint() +{ + IDENT("test_fx_ufixed_uint"); + + sc_ufixed<8, 5> a((uint)0); + sc_ufixed<8, 5> b((uint)1); + sc_ufixed<8, 5> c((uint)-1); + sc_ufixed<8, 5> d(UINT_MAX); + sc_ufixed<8, 5> e((uint)abs(INT_MIN)); + +// cerr << "sc_ufixed<8, 5> d(UINT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_short() +{ + IDENT("test_fx_ufixed_short"); + + sc_ufixed<8, 5> a((short)0); + sc_ufixed<8, 5> b((short)1); + sc_ufixed<8, 5> c((short)-1); + sc_ufixed<8, 5> d(SHRT_MAX); + sc_ufixed<8, 5> e(SHRT_MIN); + +// cerr << "sc_ufixed<8, 5> d(INT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_ushort() +{ + IDENT("test_fx_ufixed_ushort"); + + sc_ufixed<8, 5> a((ushort)0); + sc_ufixed<8, 5> b((ushort)1); + sc_ufixed<8, 5> c((ushort)-1); + sc_ufixed<8, 5> d(USHRT_MAX); + sc_ufixed<8, 5> e((ushort)abs(SHRT_MIN)); + +// cerr << "sc_ufixed<8, 5> d(UINT_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_long() +{ + IDENT("test_fx_ufixeded_long"); + + sc_ufixed<8, 5> a((long)0); + sc_ufixed<8, 5> b((long)1); + sc_ufixed<8, 5> c((long)-1); + sc_ufixed<8, 5> d(LONG_MAX); + sc_ufixed<8, 5> e(LONG_MIN); + +// cerr << "sc_ufixed<8, 5> d(INT_LONG); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_ulong() +{ + IDENT("test_fx_ufixed_ulong"); + + sc_ufixed<8, 5> a((ulong)0); + sc_ufixed<8, 5> b((ulong)1); + sc_ufixed<8, 5> c((ulong)-1); + sc_ufixed<8, 5> d(ULONG_MAX); + sc_ufixed<8, 5> e((ulong)abs(LONG_MIN)); + +// cerr << "sc_ufixed<8, 5> d(ULONG_MAX); does not work\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_float() +{ + IDENT("test_fx_ufixed_float"); + + sc_ufixed<8, 5> a(0.0); + sc_ufixed<8, 5> b(1.0); + sc_ufixed<8, 5> c(-1.0); + sc_ufixed<8, 5> d(FLT_MAX); + sc_ufixed<8, 5> e(FLT_MIN); + +// cerr << "sc_ufixed<8, 5> d(FLT_MAX); does not work (yet)\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +static void test_fx_ufixed_double() +{ + IDENT("test_fx_ufixed_double"); + + sc_ufixed<8, 5> a((double)0.0); + sc_ufixed<8, 5> b((double)1.0); + sc_ufixed<8, 5> c((double)-1.0); + sc_ufixed<8, 5> d(DBL_MAX); + sc_ufixed<8, 5> e(DBL_MIN); + +// cerr << "sc_ufixed<8, 5> d(DBL_MAX); does not work (yet)\n"; + SHOW(a); SHOW(b); SHOW(c); SHOW(d); SHOW(e); +} + +void default_constructor() +{ + cerr << "************** default_constructor for fx_float\n"; + test_fx_float_char(); + test_fx_float_int(); + test_fx_float_uint(); + test_fx_float_short(); + test_fx_float_ushort(); + test_fx_float_long(); + test_fx_float_ulong(); + test_fx_float_float(); + test_fx_float_double(); + + cerr << "************** default_constructor for fx_ufix\n"; + test_fx_ufix_char(); + test_fx_ufix_int(); + test_fx_ufix_uint(); + test_fx_ufix_short(); + test_fx_ufix_ushort(); + test_fx_ufix_long(); + test_fx_ufix_ulong(); + test_fx_ufix_float(); + test_fx_ufix_double(); + + cerr << "************** default_constructor for fx_fix\n"; + test_fx_fix_char(); + test_fx_fix_int(); + test_fx_fix_uint(); + test_fx_fix_short(); + test_fx_fix_ushort(); + test_fx_fix_long(); + test_fx_fix_ulong(); + test_fx_fix_float(); + test_fx_fix_double(); + + cerr << "************** default_constructor for fx_fixed\n"; + test_fx_fixed_char(); + test_fx_fixed_int(); + test_fx_fixed_uint(); + test_fx_fixed_short(); + test_fx_fixed_ushort(); + test_fx_fixed_long(); + test_fx_fixed_ulong(); + test_fx_fixed_float(); + test_fx_fixed_double(); + + cerr << "************** default_constructor for fx_ufixed\n"; + test_fx_ufixed_char(); + test_fx_ufixed_int(); + test_fx_ufixed_uint(); + test_fx_ufixed_short(); + test_fx_ufixed_ushort(); + test_fx_ufixed_long(); + test_fx_ufixed_ulong(); + test_fx_ufixed_float(); + test_fx_ufixed_double(); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/fx_precision_arbitrary.h b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/fx_precision_arbitrary.h new file mode 100644 index 000000000..c5a999e66 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/fx_precision_arbitrary.h @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_precision_arbitrary.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// ============================================================================ +// +// This confidential and proprietary software may be used only +// as authorized by a licensing agreement from Synopsys, Inc. +// In the event of publication, the following notice is applicable: +// +// Copyright (c) 1999 by Synopsys, Inc. +// ALL RIGHTS RESERVED +// +// The entire notice above must be reproduced on all authorized copies. +// +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +// +// File : fx_precision_arbitrary.h +// +// Abstract : Define arbitrary precision. +// +// Author : Martin Janssen +// +// Created : 21-jun-1999 +// +// ============================================================================ + +#ifndef FRIDGE_INTERPOLATOR + +#undef sc_fix +#undef sc_fixed +#undef sc_fxval +#undef sc_ufix +#undef sc_ufixed + +#endif + +// That's all folks! + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/fx_precision_default.h b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/fx_precision_default.h new file mode 100644 index 000000000..4853f0b9a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/fx_precision_default.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_precision_default.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// ============================================================================ +// +// This confidential and proprietary software may be used only +// as authorized by a licensing agreement from Synopsys, Inc. +// In the event of publication, the following notice is applicable: +// +// Copyright (c) 1999 by Synopsys, Inc. +// ALL RIGHTS RESERVED +// +// The entire notice above must be reproduced on all authorized copies. +// +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +// +// File : fx_precision_default.h +// +// Abstract : Define default precision. +// +// Author : Martin Janssen +// +// Created : 21-jun-1999 +// +// ============================================================================ + +#ifdef FX_PRECISION_DOUBLE +# include "fx_precision_double.h" +#else +# include "fx_precision_arbitrary.h" +#endif + +// That's all folks! + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/fx_precision_double.h b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/fx_precision_double.h new file mode 100644 index 000000000..6b7c6df7c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/fx_precision_double.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_precision_double.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// ============================================================================ +// +// This confidential and proprietary software may be used only +// as authorized by a licensing agreement from Synopsys, Inc. +// In the event of publication, the following notice is applicable: +// +// Copyright (c) 1999 by Synopsys, Inc. +// ALL RIGHTS RESERVED +// +// The entire notice above must be reproduced on all authorized copies. +// +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +// +// File : fx_precision_double.h +// +// Abstract : Define double precision. +// +// Author : Martin Janssen +// +// Created : 21-jun-1999 +// +// ============================================================================ + +#include "fx_precision_arbitrary.h" + +#define sc_fix sc_fix_fast +#define sc_fixed sc_fixed_fast +#define sc_fxval sc_fxval_fast +#define sc_ufix sc_ufix_fast +#define sc_ufixed sc_ufixed_fast + +// That's all folks! + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log new file mode 100644 index 000000000..49229581e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x1e+16 +c : 1.84467440737096e+19 : 0x1e+16 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 0 : 0x000000000 +c : 0 : 0x000000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 0 : 0x00000000 +c : 0 : 0x00000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x1e+16 +a[1] : 1 : 0x1 +b[1] : 0 : 0x0 +a[2] : 4 : 0x4 +b[2] : 0 : 0x0 +a[3] : 9 : 0x09 +b[3] : 0 : 0x0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 0 : 0x000000000 +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : 0 : 0x00000000 +a[1] : 1 : 0x00000001 +b[1] : 0 : 0x00000000 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.bsd b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.bsd new file mode 100644 index 000000000..6d5038dda --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.bsd @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 4294934528 : 0x0ffff8000 +a[2] : 4 : 0x000000004 +b[2] : 4294934528 : 0x0ffff8000 +a[3] : 9 : 0x000000009 +b[3] : 4294934528 : 0x0ffff8000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.cygwin b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.cygwin new file mode 100644 index 000000000..6d5038dda --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.cygwin @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 4294934528 : 0x0ffff8000 +a[2] : 4 : 0x000000004 +b[2] : 4294934528 : 0x0ffff8000 +a[3] : 9 : 0x000000009 +b[3] : 4294934528 : 0x0ffff8000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.cygwin64 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.cygwin64 new file mode 100644 index 000000000..b6aaf4263 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.cygwin64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x1e+16 +c : 1.84467440737096e+19 : 0x1e+16 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 0 : 0x000000000 +c : 0 : 0x000000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 0 : 0x00000000 +c : 0 : 0x00000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x1e+16 +a[1] : 1 : 0x1 +b[1] : 0 : 0x0 +a[2] : 4 : 0x4 +b[2] : 0 : 0x0 +a[3] : 9 : 0x09 +b[3] : 0 : 0x0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 0 : 0x000000000 +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : 0 : 0x00000000 +a[1] : 1 : 0x00000001 +b[1] : 0 : 0x00000000 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.gccsparcOS5 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.gccsparcOS5 new file mode 100644 index 000000000..282f1ed82 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.gccsparcOS5 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.linux b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.linux new file mode 100644 index 000000000..8397d8cab --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.linux @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa68 +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.linux64 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.linux64 new file mode 100644 index 000000000..b6aaf4263 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.linux64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x1e+16 +c : 1.84467440737096e+19 : 0x1e+16 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 0 : 0x000000000 +c : 0 : 0x000000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 0 : 0x00000000 +c : 0 : 0x00000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x1e+16 +a[1] : 1 : 0x1 +b[1] : 0 : 0x0 +a[2] : 4 : 0x4 +b[2] : 0 : 0x0 +a[3] : 9 : 0x09 +b[3] : 0 : 0x0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 0 : 0x000000000 +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : 0 : 0x00000000 +a[1] : 1 : 0x00000001 +b[1] : 0 : 0x00000000 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.linuxaarch64 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.linuxaarch64 new file mode 100644 index 000000000..b5950a52b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.linuxaarch64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x1e+16 +c : 1.84467440737096e+19 : 0x1e+16 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 0 : 0x000000000 +c : 0 : 0x000000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 0 : 0x00000000 +c : 0 : 0x00000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 0 : 0x0 +a[2] : 4 : 0x4 +b[2] : 0 : 0x0 +a[3] : 9 : 0x09 +b[3] : 0 : 0x0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x1e+16 +a[1] : 1 : 0x1 +b[1] : 0 : 0x0 +a[2] : 4 : 0x4 +b[2] : 0 : 0x0 +a[3] : 9 : 0x09 +b[3] : 0 : 0x0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 0 : 0x000000000 +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 0 : 0x00000000 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : 0 : 0x00000000 +a[1] : 1 : 0x00000001 +b[1] : 0 : 0x00000000 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.macosx b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.macosx new file mode 100644 index 000000000..6d5038dda --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.macosx @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 4294934528 : 0x0ffff8000 +a[2] : 4 : 0x000000004 +b[2] : 4294934528 : 0x0ffff8000 +a[3] : 9 : 0x000000009 +b[3] : 4294934528 : 0x0ffff8000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.macosx64 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.macosx64 new file mode 100644 index 000000000..49229581e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.macosx64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 9.22337203685478e+18 : 0x08e+15 +e : -9.22337203685478e+18 : 0x8e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 1.84467440737096e+19 : 0x1e+16 +d : 1.84467440737096e+19 : 0x1e+16 +e : 9.22337203685478e+18 : 0x08e+15 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 0 : 0x000000000 +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 0 : 0x00000000 +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 0 : 0x00.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1.84467440737096e+19 : 0x1e+16 +c : 1.84467440737096e+19 : 0x1e+16 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 0 : 0x000000000 +c : 0 : 0x000000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 0 : 0x00000000 +c : 0 : 0x00000000 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 1.84467440737096e+19 : 0x1e+16 +a[1] : 1 : 0x1 +b[1] : 0 : 0x0 +a[2] : 4 : 0x4 +b[2] : 0 : 0x0 +a[3] : 9 : 0x09 +b[3] : 0 : 0x0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 0 : 0x000000000 +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : 0 : 0x00000000 +a[1] : 1 : 0x00000001 +b[1] : 0 : 0x00000000 +a[2] : 4 : 0x00000004 +b[2] : 0 : 0x00000000 +a[3] : 9 : 0x00000009 +b[3] : 0 : 0x00000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 0 : 0x00.0 +a[2] : 4 : 0x04.0 +b[2] : 0 : 0x00.0 +a[3] : 9 : 0x09.0 +b[3] : 0 : 0x00.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.macosxppc b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.macosxppc new file mode 100644 index 000000000..282f1ed82 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.macosxppc @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.mingw b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.mingw new file mode 100644 index 000000000..b0577147c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.mingw @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 4294934528 : 0x0ffff8000 +a[2] : 4 : 0x000000004 +b[2] : 4294934528 : 0x0ffff8000 +a[3] : 9 : 0x000000009 +b[3] : 4294934528 : 0x0ffff8000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.mingw64 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.mingw64 new file mode 100644 index 000000000..b952b5cc6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.mingw64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc10 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc10 new file mode 100644 index 000000000..7c6723a44 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc10 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc10-x64 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc10-x64 new file mode 100644 index 000000000..7c6723a44 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc10-x64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc11 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc11 new file mode 100644 index 000000000..b952b5cc6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc11 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc11-x64 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc11-x64 new file mode 100644 index 000000000..b952b5cc6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc11-x64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc12 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc12 new file mode 100644 index 000000000..7c6723a44 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc12 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc12-x64 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc12-x64 new file mode 100644 index 000000000..7c6723a44 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc12-x64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+038 : 0x0ffffffe+26 +e : 1.17549435082229e-038 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc14 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc14 new file mode 100644 index 000000000..9381b100a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc14 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc14-x64 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc14-x64 new file mode 100644 index 000000000..9381b100a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.msvc14-x64 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.12345683574677 : 0x1.1f9ade +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.49382734298706 : 0x4.7e6b78 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.1111116409302 : 0x0a.1c71d +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.sparcOS5 b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.sparcOS5 new file mode 100644 index 000000000..282f1ed82 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/golden/test.log.sparcOS5 @@ -0,0 +1,1301 @@ +SystemC Simulation +************** default_constructor for fx_float +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_char +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 5721547 : 0x574dcb +e : -9.04232905262011e-113 : 0x.f21524151e-92 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_constructor for fx_ufix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_char +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 4294967295 : 0x0ffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_constructor for fx_fix +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_char +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 5721547 : 0x00574dcb +e : -1 : 0xffffffff +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_constructor for fx_fixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 11 : 0x0b.0 +e : -0.125 : 0xff.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_sc_fixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_constructor for fx_ufixed +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_char +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 31.875 : 0x1f.e +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixeded_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_float_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** assign_constructor test_fx_ufix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** assign_constructor test_fx_fix_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** assign_constructor test_fx_fixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign_constructor test_fx_ufixed_ +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--assign_constructor-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_float +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 32767 : 0x7fff +e : -32768 : 0x8e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 1 : 0x1 +c : 65535 : 0x0ffff +d : 65535 : 0x0ffff +e : 32768 : 0x08e+3 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x8e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 1 : 0x1 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x08e+7 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 3.40282346638529e+38 : 0x0ffffffe+26 +e : 1.17549435082229e-38 : 0x.4e-31 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : 1 : 0x1 +c : -1 : 0xf +d : 1.79769313486232e+308 : 0x0fffffffffffff8e+242 +e : 2.2250738585072e-308 : 0x.4e-255 +************** default_assign fx_ufix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 32767 : 0x000007fff +e : 4294934528 : 0x0ffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 65535 : 0x00000ffff +d : 65535 : 0x00000ffff +e : 32768 : 0x000008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 2147483647 : 0x07fffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 4294967295 : 0x0ffffffff +e : 2147483648 : 0x080000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 1 : 0x000000001 +c : 4294967295 : 0x0ffffffff +d : 0 : 0x000000000 +e : 0 : 0x000000000 +************** default_assign fx_fix +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 32767 : 0x00007fff +e : -32768 : 0xffff8000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : 65535 : 0x0000ffff +d : 65535 : 0x0000ffff +e : 32768 : 0x00008000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 2147483647 : 0x7fffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : -1 : 0xffffffff +e : -2147483648 : 0x80000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : 1 : 0x00000001 +c : -1 : 0xffffffff +d : 0 : 0x00000000 +e : 0 : 0x00000000 +************** default_assign fx_fixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : -1 : 0xff.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : -1 : 0xff.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** default_assign fx_ufixed +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 31 : 0x1f.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +--default_assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 31 : 0x1f.0 +d : 0 : 0x00.0 +e : 0 : 0x00.0 +************** assign test_fx_float_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a : 0 : 0x0 +b : 65535 : 0x0ffff +c : 65535 : 0x0ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a : 0 : 0x0 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a : 0 : 0x0 +b : -1 : 0xf +c : -1 : 0xf +************** assign test_fx_ufix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a : 0 : 0x000000000 +b : 65535 : 0x00000ffff +c : 65535 : 0x00000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a : 0 : 0x000000000 +b : 4294967295 : 0x0ffffffff +c : 4294967295 : 0x0ffffffff +************** assign test_fx_fix_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a : 0 : 0x00000000 +b : 65535 : 0x0000ffff +c : 65535 : 0x0000ffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a : 0 : 0x00000000 +b : -1 : 0xffffffff +c : -1 : 0xffffffff +************** assign test_fx_fixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a : 0 : 0x00.0 +b : -1 : 0xff.0 +c : -1 : 0xff.0 +************** assign test_fx_ufixed_ +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a : 0 : 0x00.0 +b : 1 : 0x01.0 +c : 1 : 0x01.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +--assign-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a : 0 : 0x00.0 +b : 31 : 0x1f.0 +c : 31 : 0x1f.0 +************** array test_fx_float_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_int +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_uint +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_short +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ushort +a[0] : 0 : 0x0 +b[0] : 65535 : 0x0ffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 65534 : 0x0fffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_long +a[0] : 0 : 0x0 +b[0] : -1 : 0xf +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : -2 : 0xe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_ulong +a[0] : 0 : 0x0 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x1 +b[1] : 1 : 0x1 +a[2] : 4 : 0x4 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x09 +b[3] : 6 : 0x6 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_float +a[0] : 0 : 0x0 +b[0] : -1.98765432834625 : 0xe.032916 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721378326416 : 0x3.8ea59 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.732364654541 : 0xf3.4483c +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595886230469 : 0x44.5c0e +--array-Inf-Inf-Inf-Inf-Inf- test_fx_float_double +a[0] : 0 : 0x0 +b[0] : -1.987654321 : 0xe.0329161f8d4a4 +a[1] : 1.123456789 : 0x1.1f9add3739636 +b[1] : 3.55721375067642 : 0x3.8ea58f7409656 +a[2] : 4.493827156 : 0x4.7e6b74dce58d8 +b[2] : -12.7323645105807 : 0xf3.4483c26a4e0f8 +a[3] : 10.111111101 : 0x0a.1c71c6f1047e8 +b[3] : 68.3595859256988 : 0x44.5c0dd2befa6c +************** array test_fx_ufix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_int +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_uint +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_short +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 0 : 0x000000000 +a[2] : 4 : 0x000000004 +b[2] : 0 : 0x000000000 +a[3] : 9 : 0x000000009 +b[3] : 0 : 0x000000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ushort +a[0] : 0 : 0x000000000 +b[0] : 65535 : 0x00000ffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 65534 : 0x00000fffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_long +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 2147483648 : 0x080000000 +a[2] : 4 : 0x000000004 +b[2] : 2147483648 : 0x080000000 +a[3] : 9 : 0x000000009 +b[3] : 2147483648 : 0x080000000 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_ulong +a[0] : 0 : 0x000000000 +b[0] : 4294967295 : 0x0ffffffff +a[1] : 1 : 0x000000001 +b[1] : 1 : 0x000000001 +a[2] : 4 : 0x000000004 +b[2] : 4294967294 : 0x0fffffffe +a[3] : 9 : 0x000000009 +b[3] : 6 : 0x000000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_float +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428608 : 0x035d93a00 +a[2] : 4 : 0x000000004 +b[2] : 1061317888 : 0x03f426d00 +a[3] : 10 : 0x00000000a +b[3] : 2891758592 : 0x0ac5cbc00 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufix_double +a[0] : 0 : 0x000000000 +b[0] : 4294967294 : 0x0fffffffe +a[1] : 1 : 0x000000001 +b[1] : 903428666 : 0x035d93a3a +a[2] : 4 : 0x000000004 +b[2] : 1061317622 : 0x03f426bf6 +a[3] : 10 : 0x00000000a +b[3] : 2891760217 : 0x0ac5cc259 +************** array test_fx_fix_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_int +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_uint +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_short +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ushort +a[0] : 0 : 0x00000000 +b[0] : 65535 : 0x0000ffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : 65534 : 0x0000fffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_long +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_ulong +a[0] : 0 : 0x00000000 +b[0] : -1 : 0xffffffff +a[1] : 1 : 0x00000001 +b[1] : 1 : 0x00000001 +a[2] : 4 : 0x00000004 +b[2] : -2 : 0xfffffffe +a[3] : 9 : 0x00000009 +b[3] : 6 : 0x00000006 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_float +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fix_double +a[0] : 0 : 0x00000000 +b[0] : -2 : 0xfffffffe +a[1] : 1 : 0x00000001 +b[1] : 3 : 0x00000003 +a[2] : 4 : 0x00000004 +b[2] : -11 : 0xfffffff5 +a[3] : 10 : 0x0000000a +b[3] : 59 : 0x0000003b +************** array test_fx_fixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_int +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_short +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_long +a[0] : 0 : 0x00.0 +b[0] : -1 : 0xff.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : -2 : 0xfe.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : -1 : 0xff.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : -6 : 0xfa.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_float +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +--array-Inf-Inf-Inf-Inf-Inf- test_fx_fixed_double +a[0] : 0 : 0x00.0 +b[0] : -2 : 0xfe.0 +a[1] : 1 : 0x01.0 +b[1] : 3.5 : 0x03.8 +a[2] : 4.375 : 0x04.6 +b[2] : -12.625 : 0xf3.6 +a[3] : 10 : 0x0a.0 +b[3] : 3.75 : 0x03.c +************** array test_fx_ufixed_ +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_int +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_uint +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_short +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ushort +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_long +a[0] : 0 : 0x00.0 +b[0] : 31 : 0x1f.0 +a[1] : 1 : 0x01.0 +b[1] : 1 : 0x01.0 +a[2] : 4 : 0x04.0 +b[2] : 30 : 0x1e.0 +a[3] : 9 : 0x09.0 +b[3] : 6 : 0x06.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_ulong +a[0] : 0 : 0x00.0 +b[0] : 1 : 0x01.0 +a[1] : 1 : 0x01.0 +b[1] : 31 : 0x1f.0 +a[2] : 4 : 0x04.0 +b[2] : 2 : 0x02.0 +a[3] : 9 : 0x09.0 +b[3] : 26 : 0x1a.0 +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_float +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a +--array-Inf-Inf-Inf-Inf-Inf- test_fx_ufixed_double +a[0] : 0 : 0x00.0 +b[0] : 30 : 0x1e.0 +a[1] : 1 : 0x01.0 +b[1] : 10.25 : 0x0a.4 +a[2] : 4.375 : 0x04.6 +b[2] : 27.25 : 0x1b.4 +a[3] : 10 : 0x0a.0 +b[3] : 13.625 : 0x0d.a diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/main.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/main.cpp new file mode 100644 index 000000000..02076d0f1 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/main.cpp @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// 4.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 08:50:50 1998 +// Status : none +// + +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +typedef unsigned int uint; +typedef unsigned short ushort; +typedef unsigned long ulong; + +extern void default_constructor(); +extern void assign_constructor(); +extern void default_assign(); +extern void assign(); +extern void array(); + +int sc_main( int, char** ) +{ + cerr.precision(15); + default_constructor(); + assign_constructor(); + default_assign(); + assign(); + + array(); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_constructors/test.f b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/test.f new file mode 100644 index 000000000..a8a2f0b26 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_constructors/test.f @@ -0,0 +1,6 @@ +fast_constructors/main.cpp +fast_constructors/array.cpp +fast_constructors/assign.cpp +fast_constructors/assign_constructor.cpp +fast_constructors/default_assign.cpp +fast_constructors/default_constructor.cpp diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits.cpp new file mode 100644 index 000000000..4f9268827 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) os << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; os << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + + extern void test_fx_fix_limits_zero(ostream&); + extern void test_fx_fix_limits_inf(ostream&); + extern void test_fx_fix_limits_long(ostream&); + extern void test_fx_fix_limits_double(ostream&); + + +void test_fx_fix_limits(ostream& out) +{ + out << "****************** limits fx_fix\n"; + test_fx_fix_limits_zero(out); + test_fx_fix_limits_inf(out); + test_fx_fix_limits_long(out); + test_fx_fix_limits_double(out); + +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_double.cpp new file mode 100644 index 000000000..cca34221f --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_double.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fix_limits_double(ostream& out) +{ + out << "****************** limits fx_fix_double\n"; + + sc_fix zero_min("-0"); SHOW(zero_min); + sc_fix zero_plus("+0"); SHOW(zero_plus); + sc_fix zero(0); SHOW(zero); + + sc_fix long_max(LONG_MAX); SHOW(long_max); + sc_fix long_min(LONG_MIN); SHOW(long_min); + sc_fix int_max(INT_MAX); SHOW(int_max); + sc_fix int_min(INT_MIN); SHOW(int_min); + sc_fix uint_max(UINT_MAX); SHOW(uint_max); + sc_fix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fix double_min(DBL_MIN); SHOW(double_min); + sc_fix double_max(DBL_MAX); SHOW(double_max); + sc_fix float_min(FLT_MIN); SHOW(float_min); + sc_fix float_max(FLT_MAX); SHOW(float_max); + + // sc_fix res; + + // SHOW_EXPS(double_min); + // SHOW_EXPS(double_max); + // SHOW_EXPS(float_min); + // SHOW_EXPS(float_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_inf.cpp new file mode 100644 index 000000000..28cea60c2 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_inf.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fix_limits_inf(ostream& out) +{ + out << "****************** limits fx_fix_inf\n"; + + sc_fix zero_min("-0"); SHOW(zero_min); + sc_fix zero_plus("+0"); SHOW(zero_plus); + sc_fix zero(0); SHOW(zero); + + sc_fix long_max(LONG_MAX); SHOW(long_max); + sc_fix long_min(LONG_MIN); SHOW(long_min); + sc_fix int_max(INT_MAX); SHOW(int_max); + sc_fix int_min(INT_MIN); SHOW(int_min); + sc_fix uint_max(UINT_MAX); SHOW(uint_max); + sc_fix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fix double_min(DBL_MIN); SHOW(double_min); + sc_fix double_max(DBL_MAX); SHOW(double_max); + sc_fix float_min(FLT_MIN); SHOW(float_min); + sc_fix float_max(FLT_MAX); SHOW(float_max); + + // sc_fix res; +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_long.cpp new file mode 100644 index 000000000..fa4cca874 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_long.cpp @@ -0,0 +1,118 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fix_limits_long(ostream& out) +{ + out << "****************** limits fx_fix_long\n"; + + sc_fix zero_min("-0"); SHOW(zero_min); + sc_fix zero_plus("+0"); SHOW(zero_plus); + sc_fix zero(0); SHOW(zero); + + sc_fix long_max(LONG_MAX); SHOW(long_max); + sc_fix long_min(LONG_MIN); SHOW(long_min); + sc_fix int_max(INT_MAX); SHOW(int_max); + sc_fix int_min(INT_MIN); SHOW(int_min); + sc_fix uint_max(UINT_MAX); SHOW(uint_max); + sc_fix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fix double_min(DBL_MIN); SHOW(double_min); + sc_fix double_max(DBL_MAX); SHOW(double_max); + sc_fix float_min(FLT_MIN); SHOW(float_min); + sc_fix float_max(FLT_MAX); SHOW(float_max); + + // sc_fix res; + + + // SHOW_EXPS(long_max); + // SHOW_EXPS(long_min); + // SHOW_EXPS(int_max); + // SHOW_EXPS(int_min); + // SHOW_EXPS(uint_max); + // SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_zero.cpp new file mode 100644 index 000000000..f1d5debb5 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fix_limits_zero.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fix_limits_zero(ostream& out) +{ + out << "****************** limits fx_fix_zero\n"; + + sc_fix zero_min("-0"); SHOW(zero_min); + sc_fix zero_plus("+0"); SHOW(zero_plus); + sc_fix zero(0); SHOW(zero); + + sc_fix long_max(LONG_MAX); SHOW(long_max); + sc_fix long_min(LONG_MIN); SHOW(long_min); + sc_fix int_max(INT_MAX); SHOW(int_max); + sc_fix int_min(INT_MIN); SHOW(int_min); + sc_fix uint_max(UINT_MAX); SHOW(uint_max); + sc_fix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fix double_min(DBL_MIN); SHOW(double_min); + sc_fix double_max(DBL_MAX); SHOW(double_max); + sc_fix float_min(FLT_MIN); SHOW(float_min); + sc_fix float_max(FLT_MAX); SHOW(float_max); + + // sc_fix res; + + + // SHOW_EXPS(zero_min); + // SHOW_EXPS(zero_plus); + // SHOW_EXPS(zero); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits.cpp new file mode 100644 index 000000000..39b9f01d2 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + + extern void test_fx_fixed_limits_zero(ostream&); + extern void test_fx_fixed_limits_inf(ostream&); + extern void test_fx_fixed_limits_long(ostream&); + extern void test_fx_fixed_limits_double(ostream&); + +void test_fx_fixed_limits(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>\n"; + + test_fx_fixed_limits_zero(out); + test_fx_fixed_limits_inf(out); + test_fx_fixed_limits_long(out); + test_fx_fixed_limits_double(out); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_double.cpp new file mode 100644 index 000000000..84fbe2420 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_double.cpp @@ -0,0 +1,116 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fixed_limits_double(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>_double\n"; + + sc_fixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_fixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_fixed<8, 5> zero(0); SHOW(zero); + + sc_fixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_fixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_fixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_fixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_fixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_fixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_fixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_fixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_fixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_fixed<8, 5> res; + + + // SHOW_EXPS(double_min); + // SHOW_EXPS(double_max); + // SHOW_EXPS(float_min); + // SHOW_EXPS(float_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_inf.cpp new file mode 100644 index 000000000..b3b7047b5 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_inf.cpp @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fixed_limits_inf(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>_inf\n"; + + sc_fixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_fixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_fixed<8, 5> zero(0); SHOW(zero); + + sc_fixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_fixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_fixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_fixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_fixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_fixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_fixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_fixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_fixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_fixed<8, 5> res; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_long.cpp new file mode 100644 index 000000000..d40aab775 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_long.cpp @@ -0,0 +1,117 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fixed_limits_long(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>_long\n"; + + sc_fixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_fixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_fixed<8, 5> zero(0); SHOW(zero); + + sc_fixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_fixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_fixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_fixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_fixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_fixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_fixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_fixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_fixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_fixed<8, 5> res; + + // SHOW_EXPS(long_max); + // SHOW_EXPS(long_min); + // SHOW_EXPS(int_max); + // SHOW_EXPS(int_min); + // SHOW_EXPS(uint_max); + // SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_zero.cpp new file mode 100644 index 000000000..7b234b7bb --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_fixed_limits_zero.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fixed_limits_zero(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>_zero\n"; + + sc_fixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_fixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_fixed<8, 5> zero(0); SHOW(zero); + + sc_fixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_fixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_fixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_fixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_fixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_fixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_fixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_fixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_fixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_fixed<8, 5> res; + + + // SHOW_EXPS(zero_min); + // SHOW_EXPS(zero_plus); + // SHOW_EXPS(zero); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits.cpp new file mode 100644 index 000000000..a09d44130 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits.cpp @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + + extern void test_fx_float_limits_zero(ostream&); + extern void test_fx_float_limits_inf(ostream&); + extern void test_fx_float_limits_long(ostream&); + extern void test_fx_float_limits_double(ostream&); + + +void test_fx_float_limits(ostream& out) +{ + out << "****************** limits fx_float\n"; + + test_fx_float_limits_zero(out); + test_fx_float_limits_inf(out); + test_fx_float_limits_long(out); + test_fx_float_limits_double(out); + +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_double.cpp new file mode 100644 index 000000000..93619dbe4 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_double.cpp @@ -0,0 +1,127 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_float_limits_double(ostream& out) +{ + out << "****************** limits fx_float_double\n"; + + sc_fxval zero_min("-0"); SHOW(zero_min); + sc_fxval zero_plus("+0"); SHOW(zero_plus); + sc_fxval zero(0); SHOW(zero); + + sc_fxval nan("NaN"); SHOW(nan); + sc_fxval inf_plus("+Inf"); SHOW(inf_plus); + sc_fxval inf_min("-Inf"); SHOW(inf_min); + sc_fxval inf("Inf"); SHOW(inf); + + sc_fxval long_max(LONG_MAX); SHOW(long_max); + sc_fxval long_min(LONG_MIN); SHOW(long_min); + sc_fxval int_max(INT_MAX); SHOW(int_max); + sc_fxval int_min(INT_MIN); SHOW(int_min); + sc_fxval uint_max(UINT_MAX); SHOW(uint_max); + sc_fxval ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fxval double_min(DBL_MIN); SHOW(double_min); + sc_fxval double_max(DBL_MAX); SHOW(double_max); + sc_fxval float_min(FLT_MIN); SHOW(float_min); + sc_fxval float_max(FLT_MAX); SHOW(float_max); + + sc_fxval res; + + SHOW_EXPS(double_min); + SHOW_EXPS(double_max); + SHOW_EXPS(float_min); + SHOW_EXPS(float_max); + + + SHOW_EXP(double_min / nan); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_inf.cpp new file mode 100644 index 000000000..271873980 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_inf.cpp @@ -0,0 +1,125 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_float_limits_inf(ostream& out) +{ + cerr << "****************** limits fx_float_inf\n"; + + sc_fxval zero_min("-0"); SHOW(zero_min); + sc_fxval zero_plus("+0"); SHOW(zero_plus); + sc_fxval zero(0); SHOW(zero); + + sc_fxval nan("NaN"); SHOW(nan); + sc_fxval inf_plus("+Inf"); SHOW(inf_plus); + sc_fxval inf_min("-Inf"); SHOW(inf_min); + sc_fxval inf("Inf"); SHOW(inf); + + sc_fxval long_max(LONG_MAX); SHOW(long_max); + sc_fxval long_min(LONG_MIN); SHOW(long_min); + sc_fxval int_max(INT_MAX); SHOW(int_max); + sc_fxval int_min(INT_MIN); SHOW(int_min); + sc_fxval uint_max(UINT_MAX); SHOW(uint_max); + sc_fxval ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fxval double_min(DBL_MIN); SHOW(double_min); + sc_fxval double_max(DBL_MAX); SHOW(double_max); + sc_fxval float_min(FLT_MIN); SHOW(float_min); + sc_fxval float_max(FLT_MAX); SHOW(float_max); + + sc_fxval res; + + + SHOW_EXPS(nan); + SHOW_EXPS(inf_plus); + SHOW_EXPS(inf_min); + SHOW_EXPS(inf); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_long.cpp new file mode 100644 index 000000000..edba14d29 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_long.cpp @@ -0,0 +1,127 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_float_limits_long(ostream& out) +{ + out << "****************** limits fx_float_long\n"; + + sc_fxval zero_min("-0"); SHOW(zero_min); + sc_fxval zero_plus("+0"); SHOW(zero_plus); + sc_fxval zero(0); SHOW(zero); + + sc_fxval nan("NaN"); SHOW(nan); + sc_fxval inf_plus("+Inf"); SHOW(inf_plus); + sc_fxval inf_min("-Inf"); SHOW(inf_min); + sc_fxval inf("Inf"); SHOW(inf); + + sc_fxval long_max(LONG_MAX); SHOW(long_max); + sc_fxval long_min(LONG_MIN); SHOW(long_min); + sc_fxval int_max(INT_MAX); SHOW(int_max); + sc_fxval int_min(INT_MIN); SHOW(int_min); + sc_fxval uint_max(UINT_MAX); SHOW(uint_max); + sc_fxval ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fxval double_min(DBL_MIN); SHOW(double_min); + sc_fxval double_max(DBL_MAX); SHOW(double_max); + sc_fxval float_min(FLT_MIN); SHOW(float_min); + sc_fxval float_max(FLT_MAX); SHOW(float_max); + + sc_fxval res; + + + SHOW_EXPS(long_max); + SHOW_EXPS(long_min); + SHOW_EXPS(int_max); + SHOW_EXPS(int_min); + SHOW_EXPS(uint_max); + SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_zero.cpp new file mode 100644 index 000000000..804066384 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_float_limits_zero.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_float_limits_zero(ostream& out) +{ + cerr << "****************** limits fx_float_zero\n"; + + sc_fxval zero_min("-0"); SHOW(zero_min); + sc_fxval zero_plus("+0"); SHOW(zero_plus); + sc_fxval zero(0); SHOW(zero); + + sc_fxval nan("NaN"); SHOW(nan); + sc_fxval inf_plus("+Inf"); SHOW(inf_plus); + sc_fxval inf_min("-Inf"); SHOW(inf_min); + sc_fxval inf("Inf"); SHOW(inf); + + sc_fxval long_max(LONG_MAX); SHOW(long_max); + sc_fxval long_min(LONG_MIN); SHOW(long_min); + sc_fxval int_max(INT_MAX); SHOW(int_max); + sc_fxval int_min(INT_MIN); SHOW(int_min); + sc_fxval uint_max(UINT_MAX); SHOW(uint_max); + sc_fxval ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fxval double_min(DBL_MIN); SHOW(double_min); + sc_fxval double_max(DBL_MAX); SHOW(double_max); + sc_fxval float_min(FLT_MIN); SHOW(float_min); + sc_fxval float_max(FLT_MAX); SHOW(float_max); + + sc_fxval res; + + + SHOW_EXPS(zero_min); + SHOW_EXPS(zero_plus); + SHOW_EXPS(zero); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_precision_arbitrary.h b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_precision_arbitrary.h new file mode 100644 index 000000000..c5a999e66 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_precision_arbitrary.h @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_precision_arbitrary.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// ============================================================================ +// +// This confidential and proprietary software may be used only +// as authorized by a licensing agreement from Synopsys, Inc. +// In the event of publication, the following notice is applicable: +// +// Copyright (c) 1999 by Synopsys, Inc. +// ALL RIGHTS RESERVED +// +// The entire notice above must be reproduced on all authorized copies. +// +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +// +// File : fx_precision_arbitrary.h +// +// Abstract : Define arbitrary precision. +// +// Author : Martin Janssen +// +// Created : 21-jun-1999 +// +// ============================================================================ + +#ifndef FRIDGE_INTERPOLATOR + +#undef sc_fix +#undef sc_fixed +#undef sc_fxval +#undef sc_ufix +#undef sc_ufixed + +#endif + +// That's all folks! + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_precision_default.h b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_precision_default.h new file mode 100644 index 000000000..4853f0b9a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_precision_default.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_precision_default.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// ============================================================================ +// +// This confidential and proprietary software may be used only +// as authorized by a licensing agreement from Synopsys, Inc. +// In the event of publication, the following notice is applicable: +// +// Copyright (c) 1999 by Synopsys, Inc. +// ALL RIGHTS RESERVED +// +// The entire notice above must be reproduced on all authorized copies. +// +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +// +// File : fx_precision_default.h +// +// Abstract : Define default precision. +// +// Author : Martin Janssen +// +// Created : 21-jun-1999 +// +// ============================================================================ + +#ifdef FX_PRECISION_DOUBLE +# include "fx_precision_double.h" +#else +# include "fx_precision_arbitrary.h" +#endif + +// That's all folks! + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_precision_double.h b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_precision_double.h new file mode 100644 index 000000000..6b7c6df7c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_precision_double.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_precision_double.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// ============================================================================ +// +// This confidential and proprietary software may be used only +// as authorized by a licensing agreement from Synopsys, Inc. +// In the event of publication, the following notice is applicable: +// +// Copyright (c) 1999 by Synopsys, Inc. +// ALL RIGHTS RESERVED +// +// The entire notice above must be reproduced on all authorized copies. +// +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +// +// File : fx_precision_double.h +// +// Abstract : Define double precision. +// +// Author : Martin Janssen +// +// Created : 21-jun-1999 +// +// ============================================================================ + +#include "fx_precision_arbitrary.h" + +#define sc_fix sc_fix_fast +#define sc_fixed sc_fixed_fast +#define sc_fxval sc_fxval_fast +#define sc_ufix sc_ufix_fast +#define sc_ufixed sc_ufixed_fast + +// That's all folks! + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits.cpp new file mode 100644 index 000000000..edeea6adc --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + + extern void test_fx_ufix_limits_zero(ostream&); + extern void test_fx_ufix_limits_inf(ostream&); + extern void test_fx_ufix_limits_long(ostream&); + extern void test_fx_ufix_limits_double(ostream&); + + +void test_fx_ufix_limits(ostream& out) +{ + out << "****************** limits fx_ufix\n"; + + test_fx_ufix_limits_zero(out); + test_fx_ufix_limits_inf(out); + test_fx_ufix_limits_long(out); + test_fx_ufix_limits_double(out); +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_double.cpp new file mode 100644 index 000000000..69025c352 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_double.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufix_limits_double(ostream& out) +{ + out << "****************** limits fx_ufix_double\n"; + + sc_ufix zero_min("-0"); SHOW(zero_min); + sc_ufix zero_plus("+0"); SHOW(zero_plus); + sc_ufix zero(0); SHOW(zero); + + sc_ufix long_max(LONG_MAX); SHOW(long_max); + sc_ufix long_min(LONG_MIN); SHOW(long_min); + sc_ufix int_max(INT_MAX); SHOW(int_max); + sc_ufix int_min(INT_MIN); SHOW(int_min); + sc_ufix uint_max(UINT_MAX); SHOW(uint_max); + sc_ufix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufix double_min(DBL_MIN); SHOW(double_min); + sc_ufix double_max(DBL_MAX); SHOW(double_max); + sc_ufix float_min(FLT_MIN); SHOW(float_min); + sc_ufix float_max(FLT_MAX); SHOW(float_max); + + // sc_ufix res; + + // SHOW_EXPS(double_min); + // SHOW_EXPS(double_max); + // SHOW_EXPS(float_min); + // SHOW_EXPS(float_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_inf.cpp new file mode 100644 index 000000000..2c574b644 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_inf.cpp @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufix_limits_inf(ostream& out) +{ + out << "****************** limits fx_ufix_inf\n"; + + sc_ufix zero_min("-0"); SHOW(zero_min); + sc_ufix zero_plus("+0"); SHOW(zero_plus); + sc_ufix zero(0); SHOW(zero); + + sc_ufix long_max(LONG_MAX); SHOW(long_max); + sc_ufix long_min(LONG_MIN); SHOW(long_min); + sc_ufix int_max(INT_MAX); SHOW(int_max); + sc_ufix int_min(INT_MIN); SHOW(int_min); + sc_ufix uint_max(UINT_MAX); SHOW(uint_max); + sc_ufix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufix double_min(DBL_MIN); SHOW(double_min); + sc_ufix double_max(DBL_MAX); SHOW(double_max); + sc_ufix float_min(FLT_MIN); SHOW(float_min); + sc_ufix float_max(FLT_MAX); SHOW(float_max); + + // sc_ufix res; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_long.cpp new file mode 100644 index 000000000..1e9035847 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_long.cpp @@ -0,0 +1,117 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufix_limits_long(ostream& out) +{ + out << "****************** limits fx_ufix_long\n"; + + sc_ufix zero_min("-0"); SHOW(zero_min); + sc_ufix zero_plus("+0"); SHOW(zero_plus); + sc_ufix zero(0); SHOW(zero); + + sc_ufix long_max(LONG_MAX); SHOW(long_max); + sc_ufix long_min(LONG_MIN); SHOW(long_min); + sc_ufix int_max(INT_MAX); SHOW(int_max); + sc_ufix int_min(INT_MIN); SHOW(int_min); + sc_ufix uint_max(UINT_MAX); SHOW(uint_max); + sc_ufix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufix double_min(DBL_MIN); SHOW(double_min); + sc_ufix double_max(DBL_MAX); SHOW(double_max); + sc_ufix float_min(FLT_MIN); SHOW(float_min); + sc_ufix float_max(FLT_MAX); SHOW(float_max); + + // sc_ufix res; + + // SHOW_EXPS(long_max); + // SHOW_EXPS(long_min); + // SHOW_EXPS(int_max); + // SHOW_EXPS(int_min); + // SHOW_EXPS(uint_max); + // SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_zero.cpp new file mode 100644 index 000000000..3e415aaec --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufix_limits_zero.cpp @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufix_limits_zero(ostream& out) +{ + out << "****************** limits fx_ufix_zero\n"; + + sc_ufix zero_min("-0"); SHOW(zero_min); + sc_ufix zero_plus("+0"); SHOW(zero_plus); + sc_ufix zero(0); SHOW(zero); + + sc_ufix long_max(LONG_MAX); SHOW(long_max); + sc_ufix long_min(LONG_MIN); SHOW(long_min); + sc_ufix int_max(INT_MAX); SHOW(int_max); + sc_ufix int_min(INT_MIN); SHOW(int_min); + sc_ufix uint_max(UINT_MAX); SHOW(uint_max); + sc_ufix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufix double_min(DBL_MIN); SHOW(double_min); + sc_ufix double_max(DBL_MAX); SHOW(double_max); + sc_ufix float_min(FLT_MIN); SHOW(float_min); + sc_ufix float_max(FLT_MAX); SHOW(float_max); + + // sc_ufix res; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits.cpp new file mode 100644 index 000000000..2968baadb --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits.cpp @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + extern void test_fx_ufixed_limits_zero(ostream&); + extern void test_fx_ufixed_limits_inf(ostream&); + extern void test_fx_ufixed_limits_long(ostream&); + extern void test_fx_ufixed_limits_double(ostream&); + + +void test_fx_ufixed_limits(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>\n"; + + test_fx_ufixed_limits_zero(out); + test_fx_ufixed_limits_inf(out); + test_fx_ufixed_limits_long(out); + test_fx_ufixed_limits_double(out); +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_double.cpp new file mode 100644 index 000000000..4722d9954 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_double.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufixed_limits_double(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>_double\n"; + + sc_ufixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_ufixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_ufixed<8, 5> zero(0); SHOW(zero); + + sc_ufixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_ufixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_ufixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_ufixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_ufixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_ufixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_ufixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_ufixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_ufixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_ufixed<8, 5> res; + + // SHOW_EXPS(double_min); + // SHOW_EXPS(double_max); + // SHOW_EXPS(float_min); + // SHOW_EXPS(float_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_inf.cpp new file mode 100644 index 000000000..05d63d1b4 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_inf.cpp @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufixed_limits_inf(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>_inf\n"; + + sc_ufixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_ufixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_ufixed<8, 5> zero(0); SHOW(zero); + + sc_ufixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_ufixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_ufixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_ufixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_ufixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_ufixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_ufixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_ufixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_ufixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_ufixed<8, 5> res; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_long.cpp new file mode 100644 index 000000000..c96842272 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_long.cpp @@ -0,0 +1,117 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufixed_limits_long(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>_long\n"; + + sc_ufixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_ufixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_ufixed<8, 5> zero(0); SHOW(zero); + + sc_ufixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_ufixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_ufixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_ufixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_ufixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_ufixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_ufixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_ufixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_ufixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_ufixed<8, 5> res; + + // SHOW_EXPS(long_max); + // SHOW_EXPS(long_min); + // SHOW_EXPS(int_max); + // SHOW_EXPS(int_min); + // SHOW_EXPS(uint_max); + // SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_zero.cpp new file mode 100644 index 000000000..37fd6a016 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/fx_ufixed_limits_zero.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +#include "fx_precision_double.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufixed_limits_zero(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>_zero\n"; + + sc_ufixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_ufixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_ufixed<8, 5> zero(0); SHOW(zero); + + sc_ufixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_ufixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_ufixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_ufixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_ufixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_ufixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_ufixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_ufixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_ufixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_ufixed<8, 5> res; + + + // SHOW_EXPS(zero_min); + // SHOW_EXPS(zero_plus); + // SHOW_EXPS(zero); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log new file mode 100644 index 000000000..a0a91bb5b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffff +zero_min + long_min : 0x8e+7 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x80000001 +zero_min - long_min : 0x08e+7 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf00000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffff +zero_plus + long_min : 0x8e+7 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x80000001 +zero_plus - long_min : 0x08e+7 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf00000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffff +zero + long_min : 0x8e+7 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x80000001 +zero - long_min : 0x08e+7 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf00000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.00000002 +long_max / int_max : 0x1 +long_max / int_min : 0xf.00000002 +long_max / uint_max : 0x.7fffffff8 +long_max / ulong_max : 0x.7fffffff8 +long_max / double_min : Inf +long_max / double_max : 0x.7fffffff000004e-248 +long_max / float_min : 0x1fffffffce+31 +long_max / float_max : 0x.08000007f00008e-23 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffffe+8 +long_max * long_min : 0xc00000008e+7 +long_max * int_max : 0x3fffffffe+8 +long_max * int_min : 0xc00000008e+7 +long_max * uint_max : 0x7ffffffe8e+7 +long_max * ulong_max : 0x7ffffffe8e+7 +long_max * double_min : 0x.1fffffffce-247 +long_max * double_max : Inf +long_max * float_min : 0x.1fffffffce-23 +long_max * float_max : 0x7fffff7fe+32 +long_max + zero_min : 0x7fffffff +long_max + zero_plus : 0x7fffffff +long_max + zero : 0x7fffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0fffffffe +long_max + int_min : 0xf +long_max + uint_max : 0x17ffffffe +long_max + ulong_max : 0x17ffffffe +long_max + double_min : 0x7fffffff +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x7fffffff +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x7fffffff +long_max - zero_plus : 0x7fffffff +long_max - zero : 0x7fffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffff +long_max - int_max : 0x0 +long_max - int_min : 0x0ffffffff +long_max - uint_max : 0x8e+7 +long_max - ulong_max : 0x8e+7 +long_max - double_min : 0x7fffffff +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x7fffffff +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x0 +long_max > int_min : 0x1 +long_max > uint_max : 0x0 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x1 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x0 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x1 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x1 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x1 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x0 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffff4e+15 +long_max * long_max * long_min : 0xe00000008e+15 +long_max * long_max * int_max : 0x1fffffff4e+15 +long_max * long_max * int_min : 0xe00000008e+15 +long_max * long_max * uint_max : 0x3ffffffece+15 +long_max * long_max * ulong_max : 0x3ffffffece+15 +long_max * long_max * double_min : 0x.0fffffffce-239 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x.0fffffffce-15 +long_max * long_max * float_max : 0x3fffffbfe+40 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffe +long_min / long_min : 0x1 +long_min / int_max : 0xe.fffffffe +long_min / int_min : 0x1 +long_min / uint_max : 0xf.7fffffff8 +long_min / ulong_max : 0xf.7fffffff8 +long_min / double_min : -Inf +long_min / double_max : 0x.f7ffffffffffff8e-247 +long_min / float_min : 0xee+39 +long_min / float_max : 0x.f7fffff7fffff8e-23 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc00000008e+7 +long_min * long_min : 0x4e+15 +long_min * int_max : 0xc00000008e+7 +long_min * int_min : 0x4e+15 +long_min * uint_max : 0x800000008e+7 +long_min * ulong_max : 0x800000008e+7 +long_min * double_min : 0x.ee-247 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-23 +long_min * float_max : 0x8000008e+33 +long_min + zero_min : 0x8e+7 +long_min + zero_plus : 0x8e+7 +long_min + zero : 0x8e+7 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+8 +long_min + int_max : 0xf +long_min + int_min : 0xfe+8 +long_min + uint_max : 0x7fffffff +long_min + ulong_max : 0x7fffffff +long_min + double_min : 0x8e+7 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+7 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+7 +long_min - zero_plus : 0x8e+7 +long_min - zero : 0x8e+7 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf00000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf00000001 +long_min - int_min : 0x0 +long_min - uint_max : 0xe80000001 +long_min - ulong_max : 0xe80000001 +long_min - double_min : 0x8e+7 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+7 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x0 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x1 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x1 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x0 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffce+15 +long_min * long_min * long_min : 0xee+23 +long_min * long_min * int_max : 0x1fffffffce+15 +long_min * long_min * int_min : 0xee+23 +long_min * long_min * uint_max : 0x3fffffffce+15 +long_min * long_min * ulong_max : 0x3fffffffce+15 +long_min * long_min * double_min : 0x.1e-239 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x.1e-15 +long_min * long_min * float_max : 0x3fffffce+41 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x1 +int_max / long_min : 0xf.00000002 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffff8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffffe+8 +int_max * long_min : 0xc00000008e+7 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7ffffffe8e+7 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0fffffffe +int_max + long_min : 0xf +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x17ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x0 +int_max - long_min : 0x0ffffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0x8e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x0 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x1 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x1 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x0 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff4e+15 +int_max * int_max * long_min : 0xe00000008e+15 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3ffffffece+15 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0xe.fffffffe +int_min / long_min : 0x1 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0xf.7fffffff8 +int_min / double_min : -Inf +int_min / double_max : 0x.f7ffffffffffff8e-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc00000008e+7 +int_min * long_min : 0x4e+15 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x800000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0xf +int_min + long_min : 0xfe+8 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf00000001 +int_min - long_min : 0x0 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xe80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x0 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x1 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x1 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x0 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffce+15 +int_min * int_min * long_min : 0xee+23 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x2.00000002 +uint_max / long_min : 0xe.00000002 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x1 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7ffffffe8e+7 +uint_max * long_min : 0x800000008e+7 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0fffffffee+8 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x17ffffffe +uint_max + long_min : 0x7fffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x1fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x08e+7 +uint_max - long_min : 0x17fffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0x0 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x1 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x0 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x0 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x1 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x1 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x0 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x1 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x0 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffee+16 +uint_max * uint_max * long_min : 0x80000001e+16 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffde+16 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.00000002 +ulong_max / long_min : 0xe.00000002 +ulong_max / int_max : 0x2.00000002 +ulong_max / int_min : 0xe.00000002 +ulong_max / uint_max : 0x1 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.0ffffffff000008e-247 +ulong_max / float_min : 0x3fffffffce+31 +ulong_max / float_max : 0x.1000000ff0001e-23 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffe8e+7 +ulong_max * long_min : 0x800000008e+7 +ulong_max * int_max : 0x7ffffffe8e+7 +ulong_max * int_min : 0x800000008e+7 +ulong_max * uint_max : 0x0fffffffee+8 +ulong_max * ulong_max : 0x0fffffffee+8 +ulong_max * double_min : 0x.3fffffffce-247 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.3fffffffce-23 +ulong_max * float_max : 0x0fffffeffe+32 +ulong_max + zero_min : 0x0ffffffff +ulong_max + zero_plus : 0x0ffffffff +ulong_max + zero : 0x0ffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffe +ulong_max + long_min : 0x7fffffff +ulong_max + int_max : 0x17ffffffe +ulong_max + int_min : 0x7fffffff +ulong_max + uint_max : 0x1fffffffe +ulong_max + ulong_max : 0x1fffffffe +ulong_max + double_min : 0x0ffffffff +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x0ffffffff +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x0ffffffff +ulong_max - zero_plus : 0x0ffffffff +ulong_max - zero : 0x0ffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+7 +ulong_max - long_min : 0x17fffffff +ulong_max - int_max : 0x08e+7 +ulong_max - int_min : 0x17fffffff +ulong_max - uint_max : 0x0 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffff +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x0ffffffff +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x0 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x1 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x1 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x0 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffee+16 +ulong_max * ulong_max * long_min : 0x80000001e+16 +ulong_max * ulong_max * int_max : 0x7ffffffee+16 +ulong_max * ulong_max * int_min : 0x80000001e+16 +ulong_max * ulong_max * uint_max : 0x0fffffffde+16 +ulong_max * ulong_max * ulong_max : 0x0fffffffde+16 +ulong_max * ulong_max * double_min : 0x.3fffffff8e-239 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x.3fffffff8e-15 +ulong_max * ulong_max * float_max : 0x0fffffefee+40 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.4e-263 +double_min / long_min : 0x.ce-263 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x.2e-263 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffce-247 +double_min * long_min : 0x.ee-247 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffce-247 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffff +double_min + long_min : 0x8e+7 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x80000001 +double_min - long_min : 0x08e+7 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf00000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x200000004e+240 +double_max / long_min : 0xe0000000000001e+235 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x100000001e+240 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.080000001e-38 +float_min / long_min : 0x.8e-39 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.400000004e-39 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.1fffffffce-23 +float_min * long_min : 0x.ee-23 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.3fffffffce-23 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x7fffffff +float_min + long_min : 0x8e+7 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x0ffffffff +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x80000001 +float_min - long_min : 0x08e+7 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xf00000001 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.7fffffffe-55 +float_min * float_min * long_min : 0x.8e-55 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.0ffffffffe-54 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffe04e+16 +float_max / long_min : 0xe000002e+18 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffff01e+16 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff7fe+32 +float_max * long_min : 0x8000008e+33 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0fffffeffe+32 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7ffffeff00008e+59 +float_max * float_max * long_min : 0x800000ffffff8e+59 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffdff0001e+60 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.bsd64 b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.bsd64 new file mode 100644 index 000000000..ab2c16dd6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.bsd64 @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x08e+15 +zero_min + long_min : 0x8e+15 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x1e+16 +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x8e+15 +zero_min - long_min : 0x08e+15 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xfe+16 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x08e+15 +zero_plus + long_min : 0x8e+15 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x1e+16 +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x8e+15 +zero_plus - long_min : 0x08e+15 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xfe+16 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x08e+15 +zero + long_min : 0x8e+15 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x1e+16 +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x8e+15 +zero - long_min : 0x08e+15 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xfe+16 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf +long_max / int_max : 0x100000002 +long_max / int_min : 0xfe+8 +long_max / uint_max : 0x080000000.8 +long_max / ulong_max : 0x0.8 +long_max / double_min : Inf +long_max / double_max : 0x.080000000000008e-239 +long_max / float_min : 0x2e+47 +long_max / float_max : 0x.08000008000008e-15 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x4e+31 +long_max * long_min : 0xce+31 +long_max * int_max : 0x3fffffff8e+15 +long_max * int_min : 0xce+23 +long_max * uint_max : 0x7fffffff8e+15 +long_max * ulong_max : 0x08e+31 +long_max * double_min : 0x.2e-239 +long_max * double_max : Inf +long_max * float_min : 0x.2e-15 +long_max * float_max : 0x7fffff8e+41 +long_max + zero_min : 0x08e+15 +long_max + zero_plus : 0x08e+15 +long_max + zero : 0x08e+15 +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x1e+16 +long_max + long_min : 0x0 +long_max + int_max : 0x0800000008e+7 +long_max + int_min : 0x7fffffff8e+7 +long_max + uint_max : 0x080000001e+8 +long_max + ulong_max : 0x18e+15 +long_max + double_min : 0x08e+15 +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x08e+15 +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x08e+15 +long_max - zero_plus : 0x08e+15 +long_max - zero : 0x08e+15 +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x1e+16 +long_max - int_max : 0x7fffffff8e+7 +long_max - int_min : 0x0800000008e+7 +long_max - uint_max : 0x7fffffffe+8 +long_max - ulong_max : 0x8e+15 +long_max - double_min : 0x08e+15 +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x08e+15 +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x1 +long_max > int_min : 0x1 +long_max > uint_max : 0x1 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x0 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x1 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x0 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x0 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x0 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x1 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x2e+47 +long_max * long_max * long_min : 0xee+47 +long_max * long_max * int_max : 0x1fffffffce+31 +long_max * long_max * int_min : 0xee+39 +long_max * long_max * uint_max : 0x3fffffffce+31 +long_max * long_max * ulong_max : 0x4e+47 +long_max * long_max * double_min : 0x.1e-223 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x1 +long_max * long_max * float_max : 0x3fffffce+57 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xf +long_min / long_min : 0x1 +long_min / int_max : 0xefffffffe +long_min / int_min : 0x1e+8 +long_min / uint_max : 0xf7fffffff.8 +long_min / ulong_max : 0x.8 +long_min / double_min : -Inf +long_min / double_max : 0x.f7ffffffffffff8e-239 +long_min / float_min : 0xee+47 +long_min / float_max : 0x.f7fffff7fffff8e-15 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xce+31 +long_min * long_min : 0x4e+31 +long_min * int_max : 0xc00000008e+15 +long_min * int_min : 0x4e+23 +long_min * uint_max : 0x800000008e+15 +long_min * ulong_max : 0x8e+31 +long_min * double_min : 0x.ee-239 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-15 +long_min * float_max : 0x8000008e+41 +long_min + zero_min : 0x8e+15 +long_min + zero_plus : 0x8e+15 +long_min + zero : 0x8e+15 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0x0 +long_min + long_min : 0xfe+16 +long_min + int_max : 0x800000008e+7 +long_min + int_min : 0xf7fffffff8e+7 +long_min + uint_max : 0x80000001e+8 +long_min + ulong_max : 0x08e+15 +long_min + double_min : 0x8e+15 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+15 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+15 +long_min - zero_plus : 0x8e+15 +long_min - zero : 0x8e+15 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xfe+16 +long_min - long_min : 0x0 +long_min - int_max : 0xf7fffffff8e+7 +long_min - int_min : 0x800000008e+7 +long_min - uint_max : 0xf7fffffffe+8 +long_min - ulong_max : 0xe8e+15 +long_min - double_min : 0x8e+15 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+15 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x1 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x0 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x0 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x1 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x2e+47 +long_min * long_min * long_min : 0xee+47 +long_min * long_min * int_max : 0x1fffffffce+31 +long_min * long_min * int_min : 0xee+39 +long_min * long_min * uint_max : 0x3fffffffce+31 +long_min * long_min * ulong_max : 0x4e+47 +long_min * long_min * double_min : 0x.1e-223 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x1 +long_min * long_min * float_max : 0x3fffffce+57 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x.0fffffffee-7 +int_max / long_min : 0x.f00000002e-7 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffffe-8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff8e+15 +int_max * long_min : 0xc00000008e+15 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7fffffffe+16 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0800000008e+7 +int_max + long_min : 0x800000008e+7 +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x1000000008e+7 +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x800000008e+7 +int_max - long_min : 0x0800000008e+7 +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0xf000000008e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x1 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x0 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x0 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x1 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff8e+23 +int_max * int_max * long_min : 0xe00000008e+23 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3fffffffe+24 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0x.fe-7 +int_min / long_min : 0x.1e-7 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0x.8e-8 +int_min / double_min : -Inf +int_min / double_max : 0x.f7ffffffffffff8e-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xce+23 +int_min * long_min : 0x4e+23 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x8e+23 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0x7fffffff8e+7 +int_min + long_min : 0xf7fffffff8e+7 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x0ffffffff8e+7 +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf7fffffff8e+7 +int_min - long_min : 0x7fffffff8e+7 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xeffffffff8e+7 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x1 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x0 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x0 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x1 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x2e+31 +int_min * int_min * long_min : 0xee+31 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x4e+31 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x.1fffffffee-7 +uint_max / long_min : 0x.e00000002e-7 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x.0ffffffffe-7 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7fffffff8e+15 +uint_max * long_min : 0x800000008e+15 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0ffffffffe+16 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x080000001e+8 +uint_max + long_min : 0x80000001e+8 +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x100000001e+8 +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x80000001e+8 +uint_max - long_min : 0x080000001e+8 +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0xf00000001e+8 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x0 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x1 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x1 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x0 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x0 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x1 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x0 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x1 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7fffffffe+24 +uint_max * uint_max * long_min : 0x80000001e+24 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffee+24 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2 +ulong_max / long_min : 0xe +ulong_max / int_max : 0x200000004 +ulong_max / int_min : 0xee+8 +ulong_max / uint_max : 0x100000001 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.10000000000001e-239 +ulong_max / float_min : 0x4e+47 +ulong_max / float_max : 0x.1000001000001e-15 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x08e+31 +ulong_max * long_min : 0x8e+31 +ulong_max * int_max : 0x7fffffffe+16 +ulong_max * int_min : 0x8e+23 +ulong_max * uint_max : 0x0ffffffffe+16 +ulong_max * ulong_max : 0x1e+32 +ulong_max * double_min : 0x.4e-239 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.4e-15 +ulong_max * float_max : 0x0ffffffe+42 +ulong_max + zero_min : 0x1e+16 +ulong_max + zero_plus : 0x1e+16 +ulong_max + zero : 0x1e+16 +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x18e+15 +ulong_max + long_min : 0x08e+15 +ulong_max + int_max : 0x1000000008e+7 +ulong_max + int_min : 0x0ffffffff8e+7 +ulong_max + uint_max : 0x100000001e+8 +ulong_max + ulong_max : 0x2e+16 +ulong_max + double_min : 0x1e+16 +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x1e+16 +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x1e+16 +ulong_max - zero_plus : 0x1e+16 +ulong_max - zero : 0x1e+16 +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+15 +ulong_max - long_min : 0x18e+15 +ulong_max - int_max : 0x0ffffffff8e+7 +ulong_max - int_min : 0x1000000008e+7 +ulong_max - uint_max : 0x0ffffffffe+8 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x1e+16 +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x1e+16 +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x1 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x0 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x0 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x1 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x08e+47 +ulong_max * ulong_max * long_min : 0x8e+47 +ulong_max * ulong_max * int_max : 0x7fffffffe+32 +ulong_max * ulong_max * int_min : 0x8e+39 +ulong_max * ulong_max * uint_max : 0x0ffffffffe+32 +ulong_max * ulong_max * ulong_max : 0x1e+48 +ulong_max * ulong_max * double_min : 0x.4e-223 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x4 +ulong_max * ulong_max * float_max : 0x0ffffffe+58 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x0 +double_min / long_min : 0x0 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x0 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.2e-239 +double_min * long_min : 0x.ee-239 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.4e-239 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x08e+15 +double_min + long_min : 0x8e+15 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x1e+16 +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x8e+15 +double_min - long_min : 0x08e+15 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xfe+16 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x1fffffffffffffe+227 +double_max / long_min : 0xe0000000000001e+227 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x0fffffffffffff8e+226 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.08e-46 +float_min / long_min : 0x.8e-47 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.4e-47 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.2e-15 +float_min * long_min : 0x.ee-15 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.4e-15 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x08e+15 +float_min + long_min : 0x8e+15 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x1e+16 +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x8e+15 +float_min - long_min : 0x08e+15 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xfe+16 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.08e-46 +float_min * float_min * long_min : 0x.8e-47 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.1e-46 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffee+10 +float_max / long_min : 0xe000002e+10 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffffe+10 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff8e+41 +float_max * long_min : 0x8000008e+41 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0ffffffe+42 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7fffff0000008e+67 +float_max * float_max * long_min : 0x800000ffffff8e+67 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffe000001e+68 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.cygwin b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.cygwin new file mode 100644 index 000000000..847536547 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.cygwin @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffff +zero_min + long_min : 0x8e+7 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x80000001 +zero_min - long_min : 0x08e+7 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf00000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffff +zero_plus + long_min : 0x8e+7 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x80000001 +zero_plus - long_min : 0x08e+7 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf00000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffff +zero + long_min : 0x8e+7 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x80000001 +zero - long_min : 0x08e+7 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf00000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.00000002 +long_max / int_max : 0x1 +long_max / int_min : 0xf.00000002 +long_max / uint_max : 0x.7fffffff8 +long_max / ulong_max : 0x.7fffffff8 +long_max / double_min : Inf +long_max / double_max : 0x.7fffffff000004e-248 +long_max / float_min : 0x1fffffffce+31 +long_max / float_max : 0x.08000007f00008e-23 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffffe+8 +long_max * long_min : 0xc00000008e+7 +long_max * int_max : 0x3fffffffe+8 +long_max * int_min : 0xc00000008e+7 +long_max * uint_max : 0x7ffffffe8e+7 +long_max * ulong_max : 0x7ffffffe8e+7 +long_max * double_min : 0x.1fffffffce-247 +long_max * double_max : Inf +long_max * float_min : 0x.1fffffffce-23 +long_max * float_max : 0x7fffff7fe+32 +long_max + zero_min : 0x7fffffff +long_max + zero_plus : 0x7fffffff +long_max + zero : 0x7fffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0fffffffe +long_max + int_min : 0xf +long_max + uint_max : 0x17ffffffe +long_max + ulong_max : 0x17ffffffe +long_max + double_min : 0x7fffffff +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x7fffffff +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x7fffffff +long_max - zero_plus : 0x7fffffff +long_max - zero : 0x7fffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffff +long_max - int_max : 0x0 +long_max - int_min : 0x0ffffffff +long_max - uint_max : 0x8e+7 +long_max - ulong_max : 0x8e+7 +long_max - double_min : 0x7fffffff +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x7fffffff +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x0 +long_max > int_min : 0x1 +long_max > uint_max : 0x0 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x1 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x0 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x1 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x1 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x1 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x0 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffff4e+15 +long_max * long_max * long_min : 0xe00000008e+15 +long_max * long_max * int_max : 0x1fffffff4e+15 +long_max * long_max * int_min : 0xe00000008e+15 +long_max * long_max * uint_max : 0x3ffffffece+15 +long_max * long_max * ulong_max : 0x3ffffffece+15 +long_max * long_max * double_min : 0x.0fffffffce-239 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x.0fffffffce-15 +long_max * long_max * float_max : 0x3fffffbfe+40 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffe +long_min / long_min : 0x1 +long_min / int_max : 0xe.fffffffe +long_min / int_min : 0x1 +long_min / uint_max : 0xf.7fffffff8 +long_min / ulong_max : 0xf.7fffffff8 +long_min / double_min : -Inf +long_min / double_max : 0x.8e-248 +long_min / float_min : 0xee+39 +long_min / float_max : 0x.f7fffff7fffff8e-23 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc00000008e+7 +long_min * long_min : 0x4e+15 +long_min * int_max : 0xc00000008e+7 +long_min * int_min : 0x4e+15 +long_min * uint_max : 0x800000008e+7 +long_min * ulong_max : 0x800000008e+7 +long_min * double_min : 0x.ee-247 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-23 +long_min * float_max : 0x8000008e+33 +long_min + zero_min : 0x8e+7 +long_min + zero_plus : 0x8e+7 +long_min + zero : 0x8e+7 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+8 +long_min + int_max : 0xf +long_min + int_min : 0xfe+8 +long_min + uint_max : 0x7fffffff +long_min + ulong_max : 0x7fffffff +long_min + double_min : 0x8e+7 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+7 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+7 +long_min - zero_plus : 0x8e+7 +long_min - zero : 0x8e+7 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf00000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf00000001 +long_min - int_min : 0x0 +long_min - uint_max : 0xe80000001 +long_min - ulong_max : 0xe80000001 +long_min - double_min : 0x8e+7 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+7 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x0 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x1 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x1 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x0 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffce+15 +long_min * long_min * long_min : 0xee+23 +long_min * long_min * int_max : 0x1fffffffce+15 +long_min * long_min * int_min : 0xee+23 +long_min * long_min * uint_max : 0x3fffffffce+15 +long_min * long_min * ulong_max : 0x3fffffffce+15 +long_min * long_min * double_min : 0x.1e-239 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x.1e-15 +long_min * long_min * float_max : 0x3fffffce+41 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x1 +int_max / long_min : 0xf.00000002 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffff8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffffe+8 +int_max * long_min : 0xc00000008e+7 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7ffffffe8e+7 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0fffffffe +int_max + long_min : 0xf +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x17ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x0 +int_max - long_min : 0x0ffffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0x8e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x0 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x1 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x1 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x0 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff4e+15 +int_max * int_max * long_min : 0xe00000008e+15 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3ffffffece+15 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0xe.fffffffe +int_min / long_min : 0x1 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0xf.7fffffff8 +int_min / double_min : -Inf +int_min / double_max : 0x.8e-248 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc00000008e+7 +int_min * long_min : 0x4e+15 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x800000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0xf +int_min + long_min : 0xfe+8 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf00000001 +int_min - long_min : 0x0 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xe80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x0 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x1 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x1 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x0 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffce+15 +int_min * int_min * long_min : 0xee+23 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x2.00000002 +uint_max / long_min : 0xe.00000002 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x1 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7ffffffe8e+7 +uint_max * long_min : 0x800000008e+7 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0fffffffee+8 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x17ffffffe +uint_max + long_min : 0x7fffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x1fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x08e+7 +uint_max - long_min : 0x17fffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0x0 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x1 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x0 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x0 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x1 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x1 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x0 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x1 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x0 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffee+16 +uint_max * uint_max * long_min : 0x80000001e+16 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffde+16 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.00000002 +ulong_max / long_min : 0xe.00000002 +ulong_max / int_max : 0x2.00000002 +ulong_max / int_min : 0xe.00000002 +ulong_max / uint_max : 0x1 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.0ffffffff000008e-247 +ulong_max / float_min : 0x3fffffffce+31 +ulong_max / float_max : 0x.1000000ff0001e-23 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffe8e+7 +ulong_max * long_min : 0x800000008e+7 +ulong_max * int_max : 0x7ffffffe8e+7 +ulong_max * int_min : 0x800000008e+7 +ulong_max * uint_max : 0x0fffffffee+8 +ulong_max * ulong_max : 0x0fffffffee+8 +ulong_max * double_min : 0x.3fffffffce-247 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.3fffffffce-23 +ulong_max * float_max : 0x0fffffeffe+32 +ulong_max + zero_min : 0x0ffffffff +ulong_max + zero_plus : 0x0ffffffff +ulong_max + zero : 0x0ffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffe +ulong_max + long_min : 0x7fffffff +ulong_max + int_max : 0x17ffffffe +ulong_max + int_min : 0x7fffffff +ulong_max + uint_max : 0x1fffffffe +ulong_max + ulong_max : 0x1fffffffe +ulong_max + double_min : 0x0ffffffff +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x0ffffffff +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x0ffffffff +ulong_max - zero_plus : 0x0ffffffff +ulong_max - zero : 0x0ffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+7 +ulong_max - long_min : 0x17fffffff +ulong_max - int_max : 0x08e+7 +ulong_max - int_min : 0x17fffffff +ulong_max - uint_max : 0x0 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffff +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x0ffffffff +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x0 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x1 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x1 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x0 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffee+16 +ulong_max * ulong_max * long_min : 0x80000001e+16 +ulong_max * ulong_max * int_max : 0x7ffffffee+16 +ulong_max * ulong_max * int_min : 0x80000001e+16 +ulong_max * ulong_max * uint_max : 0x0fffffffde+16 +ulong_max * ulong_max * ulong_max : 0x0fffffffde+16 +ulong_max * ulong_max * double_min : 0x.3fffffff8e-239 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x.3fffffff8e-15 +ulong_max * ulong_max * float_max : 0x0fffffefee+40 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.4e-263 +double_min / long_min : 0x.ce-263 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x.2e-263 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffce-247 +double_min * long_min : 0x.ee-247 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffce-247 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffff +double_min + long_min : 0x8e+7 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x80000001 +double_min - long_min : 0x08e+7 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf00000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x200000004e+240 +double_max / long_min : 0xe0000000000001e+235 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x100000001e+240 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.080000001e-38 +float_min / long_min : 0x.8e-39 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.400000004e-39 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.1fffffffce-23 +float_min * long_min : 0x.ee-23 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.3fffffffce-23 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x7fffffff +float_min + long_min : 0x8e+7 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x0ffffffff +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x80000001 +float_min - long_min : 0x08e+7 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xf00000001 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.7fffffffe-55 +float_min * float_min * long_min : 0x.8e-55 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.0ffffffffe-54 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffe04e+16 +float_max / long_min : 0xe000002e+18 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffff01e+16 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff7fe+32 +float_max * long_min : 0x8000008e+33 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0fffffeffe+32 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7ffffeff00008e+59 +float_max * float_max * long_min : 0x800000ffffff8e+59 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffdff0001e+60 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.cygwin64 b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.cygwin64 new file mode 100644 index 000000000..ab2c16dd6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.cygwin64 @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x08e+15 +zero_min + long_min : 0x8e+15 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x1e+16 +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x8e+15 +zero_min - long_min : 0x08e+15 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xfe+16 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x08e+15 +zero_plus + long_min : 0x8e+15 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x1e+16 +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x8e+15 +zero_plus - long_min : 0x08e+15 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xfe+16 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x08e+15 +zero + long_min : 0x8e+15 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x1e+16 +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x8e+15 +zero - long_min : 0x08e+15 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xfe+16 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf +long_max / int_max : 0x100000002 +long_max / int_min : 0xfe+8 +long_max / uint_max : 0x080000000.8 +long_max / ulong_max : 0x0.8 +long_max / double_min : Inf +long_max / double_max : 0x.080000000000008e-239 +long_max / float_min : 0x2e+47 +long_max / float_max : 0x.08000008000008e-15 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x4e+31 +long_max * long_min : 0xce+31 +long_max * int_max : 0x3fffffff8e+15 +long_max * int_min : 0xce+23 +long_max * uint_max : 0x7fffffff8e+15 +long_max * ulong_max : 0x08e+31 +long_max * double_min : 0x.2e-239 +long_max * double_max : Inf +long_max * float_min : 0x.2e-15 +long_max * float_max : 0x7fffff8e+41 +long_max + zero_min : 0x08e+15 +long_max + zero_plus : 0x08e+15 +long_max + zero : 0x08e+15 +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x1e+16 +long_max + long_min : 0x0 +long_max + int_max : 0x0800000008e+7 +long_max + int_min : 0x7fffffff8e+7 +long_max + uint_max : 0x080000001e+8 +long_max + ulong_max : 0x18e+15 +long_max + double_min : 0x08e+15 +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x08e+15 +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x08e+15 +long_max - zero_plus : 0x08e+15 +long_max - zero : 0x08e+15 +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x1e+16 +long_max - int_max : 0x7fffffff8e+7 +long_max - int_min : 0x0800000008e+7 +long_max - uint_max : 0x7fffffffe+8 +long_max - ulong_max : 0x8e+15 +long_max - double_min : 0x08e+15 +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x08e+15 +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x1 +long_max > int_min : 0x1 +long_max > uint_max : 0x1 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x0 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x1 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x0 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x0 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x0 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x1 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x2e+47 +long_max * long_max * long_min : 0xee+47 +long_max * long_max * int_max : 0x1fffffffce+31 +long_max * long_max * int_min : 0xee+39 +long_max * long_max * uint_max : 0x3fffffffce+31 +long_max * long_max * ulong_max : 0x4e+47 +long_max * long_max * double_min : 0x.1e-223 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x1 +long_max * long_max * float_max : 0x3fffffce+57 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xf +long_min / long_min : 0x1 +long_min / int_max : 0xefffffffe +long_min / int_min : 0x1e+8 +long_min / uint_max : 0xf7fffffff.8 +long_min / ulong_max : 0x.8 +long_min / double_min : -Inf +long_min / double_max : 0x.f7ffffffffffff8e-239 +long_min / float_min : 0xee+47 +long_min / float_max : 0x.f7fffff7fffff8e-15 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xce+31 +long_min * long_min : 0x4e+31 +long_min * int_max : 0xc00000008e+15 +long_min * int_min : 0x4e+23 +long_min * uint_max : 0x800000008e+15 +long_min * ulong_max : 0x8e+31 +long_min * double_min : 0x.ee-239 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-15 +long_min * float_max : 0x8000008e+41 +long_min + zero_min : 0x8e+15 +long_min + zero_plus : 0x8e+15 +long_min + zero : 0x8e+15 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0x0 +long_min + long_min : 0xfe+16 +long_min + int_max : 0x800000008e+7 +long_min + int_min : 0xf7fffffff8e+7 +long_min + uint_max : 0x80000001e+8 +long_min + ulong_max : 0x08e+15 +long_min + double_min : 0x8e+15 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+15 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+15 +long_min - zero_plus : 0x8e+15 +long_min - zero : 0x8e+15 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xfe+16 +long_min - long_min : 0x0 +long_min - int_max : 0xf7fffffff8e+7 +long_min - int_min : 0x800000008e+7 +long_min - uint_max : 0xf7fffffffe+8 +long_min - ulong_max : 0xe8e+15 +long_min - double_min : 0x8e+15 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+15 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x1 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x0 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x0 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x1 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x2e+47 +long_min * long_min * long_min : 0xee+47 +long_min * long_min * int_max : 0x1fffffffce+31 +long_min * long_min * int_min : 0xee+39 +long_min * long_min * uint_max : 0x3fffffffce+31 +long_min * long_min * ulong_max : 0x4e+47 +long_min * long_min * double_min : 0x.1e-223 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x1 +long_min * long_min * float_max : 0x3fffffce+57 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x.0fffffffee-7 +int_max / long_min : 0x.f00000002e-7 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffffe-8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff8e+15 +int_max * long_min : 0xc00000008e+15 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7fffffffe+16 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0800000008e+7 +int_max + long_min : 0x800000008e+7 +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x1000000008e+7 +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x800000008e+7 +int_max - long_min : 0x0800000008e+7 +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0xf000000008e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x1 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x0 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x0 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x1 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff8e+23 +int_max * int_max * long_min : 0xe00000008e+23 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3fffffffe+24 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0x.fe-7 +int_min / long_min : 0x.1e-7 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0x.8e-8 +int_min / double_min : -Inf +int_min / double_max : 0x.f7ffffffffffff8e-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xce+23 +int_min * long_min : 0x4e+23 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x8e+23 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0x7fffffff8e+7 +int_min + long_min : 0xf7fffffff8e+7 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x0ffffffff8e+7 +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf7fffffff8e+7 +int_min - long_min : 0x7fffffff8e+7 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xeffffffff8e+7 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x1 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x0 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x0 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x1 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x2e+31 +int_min * int_min * long_min : 0xee+31 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x4e+31 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x.1fffffffee-7 +uint_max / long_min : 0x.e00000002e-7 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x.0ffffffffe-7 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7fffffff8e+15 +uint_max * long_min : 0x800000008e+15 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0ffffffffe+16 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x080000001e+8 +uint_max + long_min : 0x80000001e+8 +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x100000001e+8 +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x80000001e+8 +uint_max - long_min : 0x080000001e+8 +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0xf00000001e+8 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x0 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x1 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x1 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x0 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x0 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x1 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x0 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x1 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7fffffffe+24 +uint_max * uint_max * long_min : 0x80000001e+24 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffee+24 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2 +ulong_max / long_min : 0xe +ulong_max / int_max : 0x200000004 +ulong_max / int_min : 0xee+8 +ulong_max / uint_max : 0x100000001 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.10000000000001e-239 +ulong_max / float_min : 0x4e+47 +ulong_max / float_max : 0x.1000001000001e-15 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x08e+31 +ulong_max * long_min : 0x8e+31 +ulong_max * int_max : 0x7fffffffe+16 +ulong_max * int_min : 0x8e+23 +ulong_max * uint_max : 0x0ffffffffe+16 +ulong_max * ulong_max : 0x1e+32 +ulong_max * double_min : 0x.4e-239 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.4e-15 +ulong_max * float_max : 0x0ffffffe+42 +ulong_max + zero_min : 0x1e+16 +ulong_max + zero_plus : 0x1e+16 +ulong_max + zero : 0x1e+16 +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x18e+15 +ulong_max + long_min : 0x08e+15 +ulong_max + int_max : 0x1000000008e+7 +ulong_max + int_min : 0x0ffffffff8e+7 +ulong_max + uint_max : 0x100000001e+8 +ulong_max + ulong_max : 0x2e+16 +ulong_max + double_min : 0x1e+16 +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x1e+16 +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x1e+16 +ulong_max - zero_plus : 0x1e+16 +ulong_max - zero : 0x1e+16 +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+15 +ulong_max - long_min : 0x18e+15 +ulong_max - int_max : 0x0ffffffff8e+7 +ulong_max - int_min : 0x1000000008e+7 +ulong_max - uint_max : 0x0ffffffffe+8 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x1e+16 +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x1e+16 +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x1 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x0 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x0 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x1 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x08e+47 +ulong_max * ulong_max * long_min : 0x8e+47 +ulong_max * ulong_max * int_max : 0x7fffffffe+32 +ulong_max * ulong_max * int_min : 0x8e+39 +ulong_max * ulong_max * uint_max : 0x0ffffffffe+32 +ulong_max * ulong_max * ulong_max : 0x1e+48 +ulong_max * ulong_max * double_min : 0x.4e-223 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x4 +ulong_max * ulong_max * float_max : 0x0ffffffe+58 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x0 +double_min / long_min : 0x0 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x0 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.2e-239 +double_min * long_min : 0x.ee-239 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.4e-239 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x08e+15 +double_min + long_min : 0x8e+15 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x1e+16 +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x8e+15 +double_min - long_min : 0x08e+15 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xfe+16 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x1fffffffffffffe+227 +double_max / long_min : 0xe0000000000001e+227 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x0fffffffffffff8e+226 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.08e-46 +float_min / long_min : 0x.8e-47 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.4e-47 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.2e-15 +float_min * long_min : 0x.ee-15 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.4e-15 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x08e+15 +float_min + long_min : 0x8e+15 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x1e+16 +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x8e+15 +float_min - long_min : 0x08e+15 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xfe+16 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.08e-46 +float_min * float_min * long_min : 0x.8e-47 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.1e-46 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffee+10 +float_max / long_min : 0xe000002e+10 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffffe+10 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff8e+41 +float_max * long_min : 0x8000008e+41 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0ffffffe+42 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7fffff0000008e+67 +float_max * float_max * long_min : 0x800000ffffff8e+67 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffe000001e+68 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.linux b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.linux new file mode 100644 index 000000000..847536547 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.linux @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffff +zero_min + long_min : 0x8e+7 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x80000001 +zero_min - long_min : 0x08e+7 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf00000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffff +zero_plus + long_min : 0x8e+7 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x80000001 +zero_plus - long_min : 0x08e+7 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf00000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffff +zero + long_min : 0x8e+7 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x80000001 +zero - long_min : 0x08e+7 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf00000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.00000002 +long_max / int_max : 0x1 +long_max / int_min : 0xf.00000002 +long_max / uint_max : 0x.7fffffff8 +long_max / ulong_max : 0x.7fffffff8 +long_max / double_min : Inf +long_max / double_max : 0x.7fffffff000004e-248 +long_max / float_min : 0x1fffffffce+31 +long_max / float_max : 0x.08000007f00008e-23 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffffe+8 +long_max * long_min : 0xc00000008e+7 +long_max * int_max : 0x3fffffffe+8 +long_max * int_min : 0xc00000008e+7 +long_max * uint_max : 0x7ffffffe8e+7 +long_max * ulong_max : 0x7ffffffe8e+7 +long_max * double_min : 0x.1fffffffce-247 +long_max * double_max : Inf +long_max * float_min : 0x.1fffffffce-23 +long_max * float_max : 0x7fffff7fe+32 +long_max + zero_min : 0x7fffffff +long_max + zero_plus : 0x7fffffff +long_max + zero : 0x7fffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0fffffffe +long_max + int_min : 0xf +long_max + uint_max : 0x17ffffffe +long_max + ulong_max : 0x17ffffffe +long_max + double_min : 0x7fffffff +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x7fffffff +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x7fffffff +long_max - zero_plus : 0x7fffffff +long_max - zero : 0x7fffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffff +long_max - int_max : 0x0 +long_max - int_min : 0x0ffffffff +long_max - uint_max : 0x8e+7 +long_max - ulong_max : 0x8e+7 +long_max - double_min : 0x7fffffff +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x7fffffff +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x0 +long_max > int_min : 0x1 +long_max > uint_max : 0x0 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x1 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x0 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x1 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x1 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x1 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x0 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffff4e+15 +long_max * long_max * long_min : 0xe00000008e+15 +long_max * long_max * int_max : 0x1fffffff4e+15 +long_max * long_max * int_min : 0xe00000008e+15 +long_max * long_max * uint_max : 0x3ffffffece+15 +long_max * long_max * ulong_max : 0x3ffffffece+15 +long_max * long_max * double_min : 0x.0fffffffce-239 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x.0fffffffce-15 +long_max * long_max * float_max : 0x3fffffbfe+40 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffe +long_min / long_min : 0x1 +long_min / int_max : 0xe.fffffffe +long_min / int_min : 0x1 +long_min / uint_max : 0xf.7fffffff8 +long_min / ulong_max : 0xf.7fffffff8 +long_min / double_min : -Inf +long_min / double_max : 0x.8e-248 +long_min / float_min : 0xee+39 +long_min / float_max : 0x.f7fffff7fffff8e-23 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc00000008e+7 +long_min * long_min : 0x4e+15 +long_min * int_max : 0xc00000008e+7 +long_min * int_min : 0x4e+15 +long_min * uint_max : 0x800000008e+7 +long_min * ulong_max : 0x800000008e+7 +long_min * double_min : 0x.ee-247 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-23 +long_min * float_max : 0x8000008e+33 +long_min + zero_min : 0x8e+7 +long_min + zero_plus : 0x8e+7 +long_min + zero : 0x8e+7 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+8 +long_min + int_max : 0xf +long_min + int_min : 0xfe+8 +long_min + uint_max : 0x7fffffff +long_min + ulong_max : 0x7fffffff +long_min + double_min : 0x8e+7 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+7 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+7 +long_min - zero_plus : 0x8e+7 +long_min - zero : 0x8e+7 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf00000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf00000001 +long_min - int_min : 0x0 +long_min - uint_max : 0xe80000001 +long_min - ulong_max : 0xe80000001 +long_min - double_min : 0x8e+7 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+7 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x0 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x1 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x1 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x0 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffce+15 +long_min * long_min * long_min : 0xee+23 +long_min * long_min * int_max : 0x1fffffffce+15 +long_min * long_min * int_min : 0xee+23 +long_min * long_min * uint_max : 0x3fffffffce+15 +long_min * long_min * ulong_max : 0x3fffffffce+15 +long_min * long_min * double_min : 0x.1e-239 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x.1e-15 +long_min * long_min * float_max : 0x3fffffce+41 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x1 +int_max / long_min : 0xf.00000002 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffff8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffffe+8 +int_max * long_min : 0xc00000008e+7 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7ffffffe8e+7 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0fffffffe +int_max + long_min : 0xf +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x17ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x0 +int_max - long_min : 0x0ffffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0x8e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x0 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x1 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x1 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x0 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff4e+15 +int_max * int_max * long_min : 0xe00000008e+15 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3ffffffece+15 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0xe.fffffffe +int_min / long_min : 0x1 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0xf.7fffffff8 +int_min / double_min : -Inf +int_min / double_max : 0x.8e-248 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc00000008e+7 +int_min * long_min : 0x4e+15 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x800000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0xf +int_min + long_min : 0xfe+8 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf00000001 +int_min - long_min : 0x0 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xe80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x0 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x1 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x1 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x0 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffce+15 +int_min * int_min * long_min : 0xee+23 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x2.00000002 +uint_max / long_min : 0xe.00000002 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x1 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7ffffffe8e+7 +uint_max * long_min : 0x800000008e+7 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0fffffffee+8 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x17ffffffe +uint_max + long_min : 0x7fffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x1fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x08e+7 +uint_max - long_min : 0x17fffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0x0 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x1 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x0 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x0 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x1 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x1 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x0 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x1 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x0 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffee+16 +uint_max * uint_max * long_min : 0x80000001e+16 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffde+16 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.00000002 +ulong_max / long_min : 0xe.00000002 +ulong_max / int_max : 0x2.00000002 +ulong_max / int_min : 0xe.00000002 +ulong_max / uint_max : 0x1 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.0ffffffff000008e-247 +ulong_max / float_min : 0x3fffffffce+31 +ulong_max / float_max : 0x.1000000ff0001e-23 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffe8e+7 +ulong_max * long_min : 0x800000008e+7 +ulong_max * int_max : 0x7ffffffe8e+7 +ulong_max * int_min : 0x800000008e+7 +ulong_max * uint_max : 0x0fffffffee+8 +ulong_max * ulong_max : 0x0fffffffee+8 +ulong_max * double_min : 0x.3fffffffce-247 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.3fffffffce-23 +ulong_max * float_max : 0x0fffffeffe+32 +ulong_max + zero_min : 0x0ffffffff +ulong_max + zero_plus : 0x0ffffffff +ulong_max + zero : 0x0ffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffe +ulong_max + long_min : 0x7fffffff +ulong_max + int_max : 0x17ffffffe +ulong_max + int_min : 0x7fffffff +ulong_max + uint_max : 0x1fffffffe +ulong_max + ulong_max : 0x1fffffffe +ulong_max + double_min : 0x0ffffffff +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x0ffffffff +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x0ffffffff +ulong_max - zero_plus : 0x0ffffffff +ulong_max - zero : 0x0ffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+7 +ulong_max - long_min : 0x17fffffff +ulong_max - int_max : 0x08e+7 +ulong_max - int_min : 0x17fffffff +ulong_max - uint_max : 0x0 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffff +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x0ffffffff +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x0 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x1 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x1 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x0 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffee+16 +ulong_max * ulong_max * long_min : 0x80000001e+16 +ulong_max * ulong_max * int_max : 0x7ffffffee+16 +ulong_max * ulong_max * int_min : 0x80000001e+16 +ulong_max * ulong_max * uint_max : 0x0fffffffde+16 +ulong_max * ulong_max * ulong_max : 0x0fffffffde+16 +ulong_max * ulong_max * double_min : 0x.3fffffff8e-239 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x.3fffffff8e-15 +ulong_max * ulong_max * float_max : 0x0fffffefee+40 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.4e-263 +double_min / long_min : 0x.ce-263 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x.2e-263 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffce-247 +double_min * long_min : 0x.ee-247 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffce-247 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffff +double_min + long_min : 0x8e+7 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x80000001 +double_min - long_min : 0x08e+7 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf00000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x200000004e+240 +double_max / long_min : 0xe0000000000001e+235 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x100000001e+240 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.080000001e-38 +float_min / long_min : 0x.8e-39 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.400000004e-39 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.1fffffffce-23 +float_min * long_min : 0x.ee-23 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.3fffffffce-23 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x7fffffff +float_min + long_min : 0x8e+7 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x0ffffffff +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x80000001 +float_min - long_min : 0x08e+7 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xf00000001 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.7fffffffe-55 +float_min * float_min * long_min : 0x.8e-55 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.0ffffffffe-54 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffe04e+16 +float_max / long_min : 0xe000002e+18 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffff01e+16 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff7fe+32 +float_max * long_min : 0x8000008e+33 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0fffffeffe+32 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7ffffeff00008e+59 +float_max * float_max * long_min : 0x800000ffffff8e+59 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffdff0001e+60 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.linux64 b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.linux64 new file mode 100644 index 000000000..ab2c16dd6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.linux64 @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x08e+15 +zero_min + long_min : 0x8e+15 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x1e+16 +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x8e+15 +zero_min - long_min : 0x08e+15 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xfe+16 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x08e+15 +zero_plus + long_min : 0x8e+15 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x1e+16 +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x8e+15 +zero_plus - long_min : 0x08e+15 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xfe+16 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x08e+15 +zero + long_min : 0x8e+15 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x1e+16 +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x8e+15 +zero - long_min : 0x08e+15 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xfe+16 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf +long_max / int_max : 0x100000002 +long_max / int_min : 0xfe+8 +long_max / uint_max : 0x080000000.8 +long_max / ulong_max : 0x0.8 +long_max / double_min : Inf +long_max / double_max : 0x.080000000000008e-239 +long_max / float_min : 0x2e+47 +long_max / float_max : 0x.08000008000008e-15 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x4e+31 +long_max * long_min : 0xce+31 +long_max * int_max : 0x3fffffff8e+15 +long_max * int_min : 0xce+23 +long_max * uint_max : 0x7fffffff8e+15 +long_max * ulong_max : 0x08e+31 +long_max * double_min : 0x.2e-239 +long_max * double_max : Inf +long_max * float_min : 0x.2e-15 +long_max * float_max : 0x7fffff8e+41 +long_max + zero_min : 0x08e+15 +long_max + zero_plus : 0x08e+15 +long_max + zero : 0x08e+15 +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x1e+16 +long_max + long_min : 0x0 +long_max + int_max : 0x0800000008e+7 +long_max + int_min : 0x7fffffff8e+7 +long_max + uint_max : 0x080000001e+8 +long_max + ulong_max : 0x18e+15 +long_max + double_min : 0x08e+15 +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x08e+15 +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x08e+15 +long_max - zero_plus : 0x08e+15 +long_max - zero : 0x08e+15 +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x1e+16 +long_max - int_max : 0x7fffffff8e+7 +long_max - int_min : 0x0800000008e+7 +long_max - uint_max : 0x7fffffffe+8 +long_max - ulong_max : 0x8e+15 +long_max - double_min : 0x08e+15 +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x08e+15 +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x1 +long_max > int_min : 0x1 +long_max > uint_max : 0x1 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x0 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x1 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x0 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x0 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x0 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x1 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x2e+47 +long_max * long_max * long_min : 0xee+47 +long_max * long_max * int_max : 0x1fffffffce+31 +long_max * long_max * int_min : 0xee+39 +long_max * long_max * uint_max : 0x3fffffffce+31 +long_max * long_max * ulong_max : 0x4e+47 +long_max * long_max * double_min : 0x.1e-223 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x1 +long_max * long_max * float_max : 0x3fffffce+57 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xf +long_min / long_min : 0x1 +long_min / int_max : 0xefffffffe +long_min / int_min : 0x1e+8 +long_min / uint_max : 0xf7fffffff.8 +long_min / ulong_max : 0x.8 +long_min / double_min : -Inf +long_min / double_max : 0x.f7ffffffffffff8e-239 +long_min / float_min : 0xee+47 +long_min / float_max : 0x.f7fffff7fffff8e-15 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xce+31 +long_min * long_min : 0x4e+31 +long_min * int_max : 0xc00000008e+15 +long_min * int_min : 0x4e+23 +long_min * uint_max : 0x800000008e+15 +long_min * ulong_max : 0x8e+31 +long_min * double_min : 0x.ee-239 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-15 +long_min * float_max : 0x8000008e+41 +long_min + zero_min : 0x8e+15 +long_min + zero_plus : 0x8e+15 +long_min + zero : 0x8e+15 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0x0 +long_min + long_min : 0xfe+16 +long_min + int_max : 0x800000008e+7 +long_min + int_min : 0xf7fffffff8e+7 +long_min + uint_max : 0x80000001e+8 +long_min + ulong_max : 0x08e+15 +long_min + double_min : 0x8e+15 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+15 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+15 +long_min - zero_plus : 0x8e+15 +long_min - zero : 0x8e+15 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xfe+16 +long_min - long_min : 0x0 +long_min - int_max : 0xf7fffffff8e+7 +long_min - int_min : 0x800000008e+7 +long_min - uint_max : 0xf7fffffffe+8 +long_min - ulong_max : 0xe8e+15 +long_min - double_min : 0x8e+15 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+15 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x1 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x0 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x0 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x1 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x2e+47 +long_min * long_min * long_min : 0xee+47 +long_min * long_min * int_max : 0x1fffffffce+31 +long_min * long_min * int_min : 0xee+39 +long_min * long_min * uint_max : 0x3fffffffce+31 +long_min * long_min * ulong_max : 0x4e+47 +long_min * long_min * double_min : 0x.1e-223 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x1 +long_min * long_min * float_max : 0x3fffffce+57 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x.0fffffffee-7 +int_max / long_min : 0x.f00000002e-7 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffffe-8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff8e+15 +int_max * long_min : 0xc00000008e+15 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7fffffffe+16 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0800000008e+7 +int_max + long_min : 0x800000008e+7 +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x1000000008e+7 +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x800000008e+7 +int_max - long_min : 0x0800000008e+7 +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0xf000000008e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x1 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x0 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x0 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x1 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff8e+23 +int_max * int_max * long_min : 0xe00000008e+23 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3fffffffe+24 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0x.fe-7 +int_min / long_min : 0x.1e-7 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0x.8e-8 +int_min / double_min : -Inf +int_min / double_max : 0x.f7ffffffffffff8e-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xce+23 +int_min * long_min : 0x4e+23 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x8e+23 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0x7fffffff8e+7 +int_min + long_min : 0xf7fffffff8e+7 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x0ffffffff8e+7 +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf7fffffff8e+7 +int_min - long_min : 0x7fffffff8e+7 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xeffffffff8e+7 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x1 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x0 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x0 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x1 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x2e+31 +int_min * int_min * long_min : 0xee+31 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x4e+31 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x.1fffffffee-7 +uint_max / long_min : 0x.e00000002e-7 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x.0ffffffffe-7 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7fffffff8e+15 +uint_max * long_min : 0x800000008e+15 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0ffffffffe+16 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x080000001e+8 +uint_max + long_min : 0x80000001e+8 +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x100000001e+8 +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x80000001e+8 +uint_max - long_min : 0x080000001e+8 +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0xf00000001e+8 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x0 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x1 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x1 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x0 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x0 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x1 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x0 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x1 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7fffffffe+24 +uint_max * uint_max * long_min : 0x80000001e+24 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffee+24 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2 +ulong_max / long_min : 0xe +ulong_max / int_max : 0x200000004 +ulong_max / int_min : 0xee+8 +ulong_max / uint_max : 0x100000001 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.10000000000001e-239 +ulong_max / float_min : 0x4e+47 +ulong_max / float_max : 0x.1000001000001e-15 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x08e+31 +ulong_max * long_min : 0x8e+31 +ulong_max * int_max : 0x7fffffffe+16 +ulong_max * int_min : 0x8e+23 +ulong_max * uint_max : 0x0ffffffffe+16 +ulong_max * ulong_max : 0x1e+32 +ulong_max * double_min : 0x.4e-239 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.4e-15 +ulong_max * float_max : 0x0ffffffe+42 +ulong_max + zero_min : 0x1e+16 +ulong_max + zero_plus : 0x1e+16 +ulong_max + zero : 0x1e+16 +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x18e+15 +ulong_max + long_min : 0x08e+15 +ulong_max + int_max : 0x1000000008e+7 +ulong_max + int_min : 0x0ffffffff8e+7 +ulong_max + uint_max : 0x100000001e+8 +ulong_max + ulong_max : 0x2e+16 +ulong_max + double_min : 0x1e+16 +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x1e+16 +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x1e+16 +ulong_max - zero_plus : 0x1e+16 +ulong_max - zero : 0x1e+16 +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+15 +ulong_max - long_min : 0x18e+15 +ulong_max - int_max : 0x0ffffffff8e+7 +ulong_max - int_min : 0x1000000008e+7 +ulong_max - uint_max : 0x0ffffffffe+8 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x1e+16 +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x1e+16 +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x1 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x0 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x0 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x1 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x08e+47 +ulong_max * ulong_max * long_min : 0x8e+47 +ulong_max * ulong_max * int_max : 0x7fffffffe+32 +ulong_max * ulong_max * int_min : 0x8e+39 +ulong_max * ulong_max * uint_max : 0x0ffffffffe+32 +ulong_max * ulong_max * ulong_max : 0x1e+48 +ulong_max * ulong_max * double_min : 0x.4e-223 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x4 +ulong_max * ulong_max * float_max : 0x0ffffffe+58 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x0 +double_min / long_min : 0x0 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x0 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.2e-239 +double_min * long_min : 0x.ee-239 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.4e-239 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x08e+15 +double_min + long_min : 0x8e+15 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x1e+16 +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x8e+15 +double_min - long_min : 0x08e+15 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xfe+16 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x1fffffffffffffe+227 +double_max / long_min : 0xe0000000000001e+227 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x0fffffffffffff8e+226 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.08e-46 +float_min / long_min : 0x.8e-47 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.4e-47 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.2e-15 +float_min * long_min : 0x.ee-15 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.4e-15 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x08e+15 +float_min + long_min : 0x8e+15 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x1e+16 +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x8e+15 +float_min - long_min : 0x08e+15 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xfe+16 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.08e-46 +float_min * float_min * long_min : 0x.8e-47 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.1e-46 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffee+10 +float_max / long_min : 0xe000002e+10 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffffe+10 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff8e+41 +float_max * long_min : 0x8000008e+41 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0ffffffe+42 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7fffff0000008e+67 +float_max * float_max * long_min : 0x800000ffffff8e+67 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffe000001e+68 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.linuxaarch64 b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.linuxaarch64 new file mode 100644 index 000000000..ab2c16dd6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.linuxaarch64 @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x08e+15 +zero_min + long_min : 0x8e+15 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x1e+16 +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x8e+15 +zero_min - long_min : 0x08e+15 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xfe+16 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x08e+15 +zero_plus + long_min : 0x8e+15 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x1e+16 +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x8e+15 +zero_plus - long_min : 0x08e+15 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xfe+16 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x08e+15 +zero + long_min : 0x8e+15 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x1e+16 +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x8e+15 +zero - long_min : 0x08e+15 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xfe+16 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf +long_max / int_max : 0x100000002 +long_max / int_min : 0xfe+8 +long_max / uint_max : 0x080000000.8 +long_max / ulong_max : 0x0.8 +long_max / double_min : Inf +long_max / double_max : 0x.080000000000008e-239 +long_max / float_min : 0x2e+47 +long_max / float_max : 0x.08000008000008e-15 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x4e+31 +long_max * long_min : 0xce+31 +long_max * int_max : 0x3fffffff8e+15 +long_max * int_min : 0xce+23 +long_max * uint_max : 0x7fffffff8e+15 +long_max * ulong_max : 0x08e+31 +long_max * double_min : 0x.2e-239 +long_max * double_max : Inf +long_max * float_min : 0x.2e-15 +long_max * float_max : 0x7fffff8e+41 +long_max + zero_min : 0x08e+15 +long_max + zero_plus : 0x08e+15 +long_max + zero : 0x08e+15 +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x1e+16 +long_max + long_min : 0x0 +long_max + int_max : 0x0800000008e+7 +long_max + int_min : 0x7fffffff8e+7 +long_max + uint_max : 0x080000001e+8 +long_max + ulong_max : 0x18e+15 +long_max + double_min : 0x08e+15 +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x08e+15 +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x08e+15 +long_max - zero_plus : 0x08e+15 +long_max - zero : 0x08e+15 +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x1e+16 +long_max - int_max : 0x7fffffff8e+7 +long_max - int_min : 0x0800000008e+7 +long_max - uint_max : 0x7fffffffe+8 +long_max - ulong_max : 0x8e+15 +long_max - double_min : 0x08e+15 +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x08e+15 +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x1 +long_max > int_min : 0x1 +long_max > uint_max : 0x1 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x0 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x1 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x0 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x0 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x0 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x1 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x2e+47 +long_max * long_max * long_min : 0xee+47 +long_max * long_max * int_max : 0x1fffffffce+31 +long_max * long_max * int_min : 0xee+39 +long_max * long_max * uint_max : 0x3fffffffce+31 +long_max * long_max * ulong_max : 0x4e+47 +long_max * long_max * double_min : 0x.1e-223 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x1 +long_max * long_max * float_max : 0x3fffffce+57 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xf +long_min / long_min : 0x1 +long_min / int_max : 0xefffffffe +long_min / int_min : 0x1e+8 +long_min / uint_max : 0xf7fffffff.8 +long_min / ulong_max : 0x.8 +long_min / double_min : -Inf +long_min / double_max : 0x.f7ffffffffffff8e-239 +long_min / float_min : 0xee+47 +long_min / float_max : 0x.f7fffff7fffff8e-15 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xce+31 +long_min * long_min : 0x4e+31 +long_min * int_max : 0xc00000008e+15 +long_min * int_min : 0x4e+23 +long_min * uint_max : 0x800000008e+15 +long_min * ulong_max : 0x8e+31 +long_min * double_min : 0x.ee-239 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-15 +long_min * float_max : 0x8000008e+41 +long_min + zero_min : 0x8e+15 +long_min + zero_plus : 0x8e+15 +long_min + zero : 0x8e+15 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0x0 +long_min + long_min : 0xfe+16 +long_min + int_max : 0x800000008e+7 +long_min + int_min : 0xf7fffffff8e+7 +long_min + uint_max : 0x80000001e+8 +long_min + ulong_max : 0x08e+15 +long_min + double_min : 0x8e+15 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+15 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+15 +long_min - zero_plus : 0x8e+15 +long_min - zero : 0x8e+15 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xfe+16 +long_min - long_min : 0x0 +long_min - int_max : 0xf7fffffff8e+7 +long_min - int_min : 0x800000008e+7 +long_min - uint_max : 0xf7fffffffe+8 +long_min - ulong_max : 0xe8e+15 +long_min - double_min : 0x8e+15 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+15 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x1 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x0 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x0 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x1 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x2e+47 +long_min * long_min * long_min : 0xee+47 +long_min * long_min * int_max : 0x1fffffffce+31 +long_min * long_min * int_min : 0xee+39 +long_min * long_min * uint_max : 0x3fffffffce+31 +long_min * long_min * ulong_max : 0x4e+47 +long_min * long_min * double_min : 0x.1e-223 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x1 +long_min * long_min * float_max : 0x3fffffce+57 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x.0fffffffee-7 +int_max / long_min : 0x.f00000002e-7 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffffe-8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff8e+15 +int_max * long_min : 0xc00000008e+15 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7fffffffe+16 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0800000008e+7 +int_max + long_min : 0x800000008e+7 +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x1000000008e+7 +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x800000008e+7 +int_max - long_min : 0x0800000008e+7 +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0xf000000008e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x1 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x0 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x0 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x1 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff8e+23 +int_max * int_max * long_min : 0xe00000008e+23 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3fffffffe+24 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0x.fe-7 +int_min / long_min : 0x.1e-7 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0x.8e-8 +int_min / double_min : -Inf +int_min / double_max : 0x.f7ffffffffffff8e-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xce+23 +int_min * long_min : 0x4e+23 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x8e+23 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0x7fffffff8e+7 +int_min + long_min : 0xf7fffffff8e+7 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x0ffffffff8e+7 +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf7fffffff8e+7 +int_min - long_min : 0x7fffffff8e+7 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xeffffffff8e+7 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x1 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x0 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x0 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x1 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x2e+31 +int_min * int_min * long_min : 0xee+31 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x4e+31 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x.1fffffffee-7 +uint_max / long_min : 0x.e00000002e-7 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x.0ffffffffe-7 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7fffffff8e+15 +uint_max * long_min : 0x800000008e+15 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0ffffffffe+16 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x080000001e+8 +uint_max + long_min : 0x80000001e+8 +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x100000001e+8 +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x80000001e+8 +uint_max - long_min : 0x080000001e+8 +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0xf00000001e+8 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x0 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x1 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x1 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x0 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x0 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x1 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x0 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x1 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7fffffffe+24 +uint_max * uint_max * long_min : 0x80000001e+24 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffee+24 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2 +ulong_max / long_min : 0xe +ulong_max / int_max : 0x200000004 +ulong_max / int_min : 0xee+8 +ulong_max / uint_max : 0x100000001 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.10000000000001e-239 +ulong_max / float_min : 0x4e+47 +ulong_max / float_max : 0x.1000001000001e-15 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x08e+31 +ulong_max * long_min : 0x8e+31 +ulong_max * int_max : 0x7fffffffe+16 +ulong_max * int_min : 0x8e+23 +ulong_max * uint_max : 0x0ffffffffe+16 +ulong_max * ulong_max : 0x1e+32 +ulong_max * double_min : 0x.4e-239 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.4e-15 +ulong_max * float_max : 0x0ffffffe+42 +ulong_max + zero_min : 0x1e+16 +ulong_max + zero_plus : 0x1e+16 +ulong_max + zero : 0x1e+16 +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x18e+15 +ulong_max + long_min : 0x08e+15 +ulong_max + int_max : 0x1000000008e+7 +ulong_max + int_min : 0x0ffffffff8e+7 +ulong_max + uint_max : 0x100000001e+8 +ulong_max + ulong_max : 0x2e+16 +ulong_max + double_min : 0x1e+16 +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x1e+16 +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x1e+16 +ulong_max - zero_plus : 0x1e+16 +ulong_max - zero : 0x1e+16 +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+15 +ulong_max - long_min : 0x18e+15 +ulong_max - int_max : 0x0ffffffff8e+7 +ulong_max - int_min : 0x1000000008e+7 +ulong_max - uint_max : 0x0ffffffffe+8 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x1e+16 +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x1e+16 +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x1 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x0 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x0 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x1 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x08e+47 +ulong_max * ulong_max * long_min : 0x8e+47 +ulong_max * ulong_max * int_max : 0x7fffffffe+32 +ulong_max * ulong_max * int_min : 0x8e+39 +ulong_max * ulong_max * uint_max : 0x0ffffffffe+32 +ulong_max * ulong_max * ulong_max : 0x1e+48 +ulong_max * ulong_max * double_min : 0x.4e-223 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x4 +ulong_max * ulong_max * float_max : 0x0ffffffe+58 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x0 +double_min / long_min : 0x0 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x0 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.2e-239 +double_min * long_min : 0x.ee-239 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.4e-239 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x08e+15 +double_min + long_min : 0x8e+15 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x1e+16 +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x8e+15 +double_min - long_min : 0x08e+15 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xfe+16 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x1fffffffffffffe+227 +double_max / long_min : 0xe0000000000001e+227 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x0fffffffffffff8e+226 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.08e-46 +float_min / long_min : 0x.8e-47 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.4e-47 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.2e-15 +float_min * long_min : 0x.ee-15 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.4e-15 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x08e+15 +float_min + long_min : 0x8e+15 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x1e+16 +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x8e+15 +float_min - long_min : 0x08e+15 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xfe+16 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.08e-46 +float_min * float_min * long_min : 0x.8e-47 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.1e-46 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffee+10 +float_max / long_min : 0xe000002e+10 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffffe+10 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff8e+41 +float_max * long_min : 0x8000008e+41 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0ffffffe+42 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7fffff0000008e+67 +float_max * float_max * long_min : 0x800000ffffff8e+67 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffe000001e+68 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.macosx b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.macosx new file mode 100644 index 000000000..847536547 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.macosx @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffff +zero_min + long_min : 0x8e+7 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x80000001 +zero_min - long_min : 0x08e+7 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf00000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffff +zero_plus + long_min : 0x8e+7 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x80000001 +zero_plus - long_min : 0x08e+7 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf00000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffff +zero + long_min : 0x8e+7 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x80000001 +zero - long_min : 0x08e+7 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf00000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.00000002 +long_max / int_max : 0x1 +long_max / int_min : 0xf.00000002 +long_max / uint_max : 0x.7fffffff8 +long_max / ulong_max : 0x.7fffffff8 +long_max / double_min : Inf +long_max / double_max : 0x.7fffffff000004e-248 +long_max / float_min : 0x1fffffffce+31 +long_max / float_max : 0x.08000007f00008e-23 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffffe+8 +long_max * long_min : 0xc00000008e+7 +long_max * int_max : 0x3fffffffe+8 +long_max * int_min : 0xc00000008e+7 +long_max * uint_max : 0x7ffffffe8e+7 +long_max * ulong_max : 0x7ffffffe8e+7 +long_max * double_min : 0x.1fffffffce-247 +long_max * double_max : Inf +long_max * float_min : 0x.1fffffffce-23 +long_max * float_max : 0x7fffff7fe+32 +long_max + zero_min : 0x7fffffff +long_max + zero_plus : 0x7fffffff +long_max + zero : 0x7fffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0fffffffe +long_max + int_min : 0xf +long_max + uint_max : 0x17ffffffe +long_max + ulong_max : 0x17ffffffe +long_max + double_min : 0x7fffffff +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x7fffffff +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x7fffffff +long_max - zero_plus : 0x7fffffff +long_max - zero : 0x7fffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffff +long_max - int_max : 0x0 +long_max - int_min : 0x0ffffffff +long_max - uint_max : 0x8e+7 +long_max - ulong_max : 0x8e+7 +long_max - double_min : 0x7fffffff +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x7fffffff +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x0 +long_max > int_min : 0x1 +long_max > uint_max : 0x0 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x1 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x0 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x1 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x1 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x1 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x0 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffff4e+15 +long_max * long_max * long_min : 0xe00000008e+15 +long_max * long_max * int_max : 0x1fffffff4e+15 +long_max * long_max * int_min : 0xe00000008e+15 +long_max * long_max * uint_max : 0x3ffffffece+15 +long_max * long_max * ulong_max : 0x3ffffffece+15 +long_max * long_max * double_min : 0x.0fffffffce-239 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x.0fffffffce-15 +long_max * long_max * float_max : 0x3fffffbfe+40 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffe +long_min / long_min : 0x1 +long_min / int_max : 0xe.fffffffe +long_min / int_min : 0x1 +long_min / uint_max : 0xf.7fffffff8 +long_min / ulong_max : 0xf.7fffffff8 +long_min / double_min : -Inf +long_min / double_max : 0x.8e-248 +long_min / float_min : 0xee+39 +long_min / float_max : 0x.f7fffff7fffff8e-23 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc00000008e+7 +long_min * long_min : 0x4e+15 +long_min * int_max : 0xc00000008e+7 +long_min * int_min : 0x4e+15 +long_min * uint_max : 0x800000008e+7 +long_min * ulong_max : 0x800000008e+7 +long_min * double_min : 0x.ee-247 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-23 +long_min * float_max : 0x8000008e+33 +long_min + zero_min : 0x8e+7 +long_min + zero_plus : 0x8e+7 +long_min + zero : 0x8e+7 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+8 +long_min + int_max : 0xf +long_min + int_min : 0xfe+8 +long_min + uint_max : 0x7fffffff +long_min + ulong_max : 0x7fffffff +long_min + double_min : 0x8e+7 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+7 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+7 +long_min - zero_plus : 0x8e+7 +long_min - zero : 0x8e+7 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf00000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf00000001 +long_min - int_min : 0x0 +long_min - uint_max : 0xe80000001 +long_min - ulong_max : 0xe80000001 +long_min - double_min : 0x8e+7 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+7 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x0 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x1 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x1 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x0 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffce+15 +long_min * long_min * long_min : 0xee+23 +long_min * long_min * int_max : 0x1fffffffce+15 +long_min * long_min * int_min : 0xee+23 +long_min * long_min * uint_max : 0x3fffffffce+15 +long_min * long_min * ulong_max : 0x3fffffffce+15 +long_min * long_min * double_min : 0x.1e-239 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x.1e-15 +long_min * long_min * float_max : 0x3fffffce+41 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x1 +int_max / long_min : 0xf.00000002 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffff8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffffe+8 +int_max * long_min : 0xc00000008e+7 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7ffffffe8e+7 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0fffffffe +int_max + long_min : 0xf +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x17ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x0 +int_max - long_min : 0x0ffffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0x8e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x0 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x1 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x1 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x0 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff4e+15 +int_max * int_max * long_min : 0xe00000008e+15 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3ffffffece+15 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0xe.fffffffe +int_min / long_min : 0x1 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0xf.7fffffff8 +int_min / double_min : -Inf +int_min / double_max : 0x.8e-248 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc00000008e+7 +int_min * long_min : 0x4e+15 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x800000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0xf +int_min + long_min : 0xfe+8 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf00000001 +int_min - long_min : 0x0 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xe80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x0 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x1 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x1 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x0 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffce+15 +int_min * int_min * long_min : 0xee+23 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x2.00000002 +uint_max / long_min : 0xe.00000002 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x1 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7ffffffe8e+7 +uint_max * long_min : 0x800000008e+7 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0fffffffee+8 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x17ffffffe +uint_max + long_min : 0x7fffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x1fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x08e+7 +uint_max - long_min : 0x17fffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0x0 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x1 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x0 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x0 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x1 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x1 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x0 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x1 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x0 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffee+16 +uint_max * uint_max * long_min : 0x80000001e+16 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffde+16 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.00000002 +ulong_max / long_min : 0xe.00000002 +ulong_max / int_max : 0x2.00000002 +ulong_max / int_min : 0xe.00000002 +ulong_max / uint_max : 0x1 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.0ffffffff000008e-247 +ulong_max / float_min : 0x3fffffffce+31 +ulong_max / float_max : 0x.1000000ff0001e-23 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffe8e+7 +ulong_max * long_min : 0x800000008e+7 +ulong_max * int_max : 0x7ffffffe8e+7 +ulong_max * int_min : 0x800000008e+7 +ulong_max * uint_max : 0x0fffffffee+8 +ulong_max * ulong_max : 0x0fffffffee+8 +ulong_max * double_min : 0x.3fffffffce-247 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.3fffffffce-23 +ulong_max * float_max : 0x0fffffeffe+32 +ulong_max + zero_min : 0x0ffffffff +ulong_max + zero_plus : 0x0ffffffff +ulong_max + zero : 0x0ffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffe +ulong_max + long_min : 0x7fffffff +ulong_max + int_max : 0x17ffffffe +ulong_max + int_min : 0x7fffffff +ulong_max + uint_max : 0x1fffffffe +ulong_max + ulong_max : 0x1fffffffe +ulong_max + double_min : 0x0ffffffff +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x0ffffffff +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x0ffffffff +ulong_max - zero_plus : 0x0ffffffff +ulong_max - zero : 0x0ffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+7 +ulong_max - long_min : 0x17fffffff +ulong_max - int_max : 0x08e+7 +ulong_max - int_min : 0x17fffffff +ulong_max - uint_max : 0x0 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffff +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x0ffffffff +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x0 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x1 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x1 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x0 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffee+16 +ulong_max * ulong_max * long_min : 0x80000001e+16 +ulong_max * ulong_max * int_max : 0x7ffffffee+16 +ulong_max * ulong_max * int_min : 0x80000001e+16 +ulong_max * ulong_max * uint_max : 0x0fffffffde+16 +ulong_max * ulong_max * ulong_max : 0x0fffffffde+16 +ulong_max * ulong_max * double_min : 0x.3fffffff8e-239 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x.3fffffff8e-15 +ulong_max * ulong_max * float_max : 0x0fffffefee+40 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.4e-263 +double_min / long_min : 0x.ce-263 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x.2e-263 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffce-247 +double_min * long_min : 0x.ee-247 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffce-247 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffff +double_min + long_min : 0x8e+7 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x80000001 +double_min - long_min : 0x08e+7 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf00000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x200000004e+240 +double_max / long_min : 0xe0000000000001e+235 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x100000001e+240 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.080000001e-38 +float_min / long_min : 0x.8e-39 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.400000004e-39 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.1fffffffce-23 +float_min * long_min : 0x.ee-23 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.3fffffffce-23 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x7fffffff +float_min + long_min : 0x8e+7 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x0ffffffff +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x80000001 +float_min - long_min : 0x08e+7 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xf00000001 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.7fffffffe-55 +float_min * float_min * long_min : 0x.8e-55 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.0ffffffffe-54 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffe04e+16 +float_max / long_min : 0xe000002e+18 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffff01e+16 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff7fe+32 +float_max * long_min : 0x8000008e+33 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0fffffeffe+32 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7ffffeff00008e+59 +float_max * float_max * long_min : 0x800000ffffff8e+59 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffdff0001e+60 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.macosx64 b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.macosx64 new file mode 100644 index 000000000..ab2c16dd6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.macosx64 @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x08e+15 +zero_min + long_min : 0x8e+15 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x1e+16 +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x8e+15 +zero_min - long_min : 0x08e+15 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xfe+16 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x08e+15 +zero_plus + long_min : 0x8e+15 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x1e+16 +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x8e+15 +zero_plus - long_min : 0x08e+15 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xfe+16 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x08e+15 +zero + long_min : 0x8e+15 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x1e+16 +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x8e+15 +zero - long_min : 0x08e+15 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xfe+16 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf +long_max / int_max : 0x100000002 +long_max / int_min : 0xfe+8 +long_max / uint_max : 0x080000000.8 +long_max / ulong_max : 0x0.8 +long_max / double_min : Inf +long_max / double_max : 0x.080000000000008e-239 +long_max / float_min : 0x2e+47 +long_max / float_max : 0x.08000008000008e-15 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x4e+31 +long_max * long_min : 0xce+31 +long_max * int_max : 0x3fffffff8e+15 +long_max * int_min : 0xce+23 +long_max * uint_max : 0x7fffffff8e+15 +long_max * ulong_max : 0x08e+31 +long_max * double_min : 0x.2e-239 +long_max * double_max : Inf +long_max * float_min : 0x.2e-15 +long_max * float_max : 0x7fffff8e+41 +long_max + zero_min : 0x08e+15 +long_max + zero_plus : 0x08e+15 +long_max + zero : 0x08e+15 +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x1e+16 +long_max + long_min : 0x0 +long_max + int_max : 0x0800000008e+7 +long_max + int_min : 0x7fffffff8e+7 +long_max + uint_max : 0x080000001e+8 +long_max + ulong_max : 0x18e+15 +long_max + double_min : 0x08e+15 +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x08e+15 +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x08e+15 +long_max - zero_plus : 0x08e+15 +long_max - zero : 0x08e+15 +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x1e+16 +long_max - int_max : 0x7fffffff8e+7 +long_max - int_min : 0x0800000008e+7 +long_max - uint_max : 0x7fffffffe+8 +long_max - ulong_max : 0x8e+15 +long_max - double_min : 0x08e+15 +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x08e+15 +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x1 +long_max > int_min : 0x1 +long_max > uint_max : 0x1 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x0 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x1 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x0 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x0 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x0 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x1 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x2e+47 +long_max * long_max * long_min : 0xee+47 +long_max * long_max * int_max : 0x1fffffffce+31 +long_max * long_max * int_min : 0xee+39 +long_max * long_max * uint_max : 0x3fffffffce+31 +long_max * long_max * ulong_max : 0x4e+47 +long_max * long_max * double_min : 0x.1e-223 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x1 +long_max * long_max * float_max : 0x3fffffce+57 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xf +long_min / long_min : 0x1 +long_min / int_max : 0xefffffffe +long_min / int_min : 0x1e+8 +long_min / uint_max : 0xf7fffffff.8 +long_min / ulong_max : 0x.8 +long_min / double_min : -Inf +long_min / double_max : 0x.f7ffffffffffff8e-239 +long_min / float_min : 0xee+47 +long_min / float_max : 0x.f7fffff7fffff8e-15 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xce+31 +long_min * long_min : 0x4e+31 +long_min * int_max : 0xc00000008e+15 +long_min * int_min : 0x4e+23 +long_min * uint_max : 0x800000008e+15 +long_min * ulong_max : 0x8e+31 +long_min * double_min : 0x.ee-239 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-15 +long_min * float_max : 0x8000008e+41 +long_min + zero_min : 0x8e+15 +long_min + zero_plus : 0x8e+15 +long_min + zero : 0x8e+15 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0x0 +long_min + long_min : 0xfe+16 +long_min + int_max : 0x800000008e+7 +long_min + int_min : 0xf7fffffff8e+7 +long_min + uint_max : 0x80000001e+8 +long_min + ulong_max : 0x08e+15 +long_min + double_min : 0x8e+15 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+15 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+15 +long_min - zero_plus : 0x8e+15 +long_min - zero : 0x8e+15 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xfe+16 +long_min - long_min : 0x0 +long_min - int_max : 0xf7fffffff8e+7 +long_min - int_min : 0x800000008e+7 +long_min - uint_max : 0xf7fffffffe+8 +long_min - ulong_max : 0xe8e+15 +long_min - double_min : 0x8e+15 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+15 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x1 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x0 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x0 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x1 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x2e+47 +long_min * long_min * long_min : 0xee+47 +long_min * long_min * int_max : 0x1fffffffce+31 +long_min * long_min * int_min : 0xee+39 +long_min * long_min * uint_max : 0x3fffffffce+31 +long_min * long_min * ulong_max : 0x4e+47 +long_min * long_min * double_min : 0x.1e-223 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x1 +long_min * long_min * float_max : 0x3fffffce+57 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x.0fffffffee-7 +int_max / long_min : 0x.f00000002e-7 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffffe-8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff8e+15 +int_max * long_min : 0xc00000008e+15 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7fffffffe+16 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0800000008e+7 +int_max + long_min : 0x800000008e+7 +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x1000000008e+7 +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x800000008e+7 +int_max - long_min : 0x0800000008e+7 +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0xf000000008e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x1 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x0 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x0 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x1 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff8e+23 +int_max * int_max * long_min : 0xe00000008e+23 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3fffffffe+24 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0x.fe-7 +int_min / long_min : 0x.1e-7 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0x.8e-8 +int_min / double_min : -Inf +int_min / double_max : 0x.f7ffffffffffff8e-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xce+23 +int_min * long_min : 0x4e+23 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x8e+23 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0x7fffffff8e+7 +int_min + long_min : 0xf7fffffff8e+7 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x0ffffffff8e+7 +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf7fffffff8e+7 +int_min - long_min : 0x7fffffff8e+7 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xeffffffff8e+7 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x1 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x0 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x0 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x1 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x2e+31 +int_min * int_min * long_min : 0xee+31 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x4e+31 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x.1fffffffee-7 +uint_max / long_min : 0x.e00000002e-7 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x.0ffffffffe-7 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7fffffff8e+15 +uint_max * long_min : 0x800000008e+15 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0ffffffffe+16 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x080000001e+8 +uint_max + long_min : 0x80000001e+8 +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x100000001e+8 +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x80000001e+8 +uint_max - long_min : 0x080000001e+8 +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0xf00000001e+8 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x0 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x1 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x1 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x0 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x0 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x1 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x0 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x1 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7fffffffe+24 +uint_max * uint_max * long_min : 0x80000001e+24 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffee+24 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2 +ulong_max / long_min : 0xe +ulong_max / int_max : 0x200000004 +ulong_max / int_min : 0xee+8 +ulong_max / uint_max : 0x100000001 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.10000000000001e-239 +ulong_max / float_min : 0x4e+47 +ulong_max / float_max : 0x.1000001000001e-15 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x08e+31 +ulong_max * long_min : 0x8e+31 +ulong_max * int_max : 0x7fffffffe+16 +ulong_max * int_min : 0x8e+23 +ulong_max * uint_max : 0x0ffffffffe+16 +ulong_max * ulong_max : 0x1e+32 +ulong_max * double_min : 0x.4e-239 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.4e-15 +ulong_max * float_max : 0x0ffffffe+42 +ulong_max + zero_min : 0x1e+16 +ulong_max + zero_plus : 0x1e+16 +ulong_max + zero : 0x1e+16 +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x18e+15 +ulong_max + long_min : 0x08e+15 +ulong_max + int_max : 0x1000000008e+7 +ulong_max + int_min : 0x0ffffffff8e+7 +ulong_max + uint_max : 0x100000001e+8 +ulong_max + ulong_max : 0x2e+16 +ulong_max + double_min : 0x1e+16 +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x1e+16 +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x1e+16 +ulong_max - zero_plus : 0x1e+16 +ulong_max - zero : 0x1e+16 +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+15 +ulong_max - long_min : 0x18e+15 +ulong_max - int_max : 0x0ffffffff8e+7 +ulong_max - int_min : 0x1000000008e+7 +ulong_max - uint_max : 0x0ffffffffe+8 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x1e+16 +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x1e+16 +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x1 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x0 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x0 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x1 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x08e+47 +ulong_max * ulong_max * long_min : 0x8e+47 +ulong_max * ulong_max * int_max : 0x7fffffffe+32 +ulong_max * ulong_max * int_min : 0x8e+39 +ulong_max * ulong_max * uint_max : 0x0ffffffffe+32 +ulong_max * ulong_max * ulong_max : 0x1e+48 +ulong_max * ulong_max * double_min : 0x.4e-223 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x4 +ulong_max * ulong_max * float_max : 0x0ffffffe+58 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x08e+15 +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x1e+16 +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x0 +double_min / long_min : 0x0 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x0 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.2e-239 +double_min * long_min : 0x.ee-239 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.4e-239 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x08e+15 +double_min + long_min : 0x8e+15 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x1e+16 +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x8e+15 +double_min - long_min : 0x08e+15 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xfe+16 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x1fffffffffffffe+227 +double_max / long_min : 0xe0000000000001e+227 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x0fffffffffffff8e+226 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.08e-46 +float_min / long_min : 0x.8e-47 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.4e-47 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.2e-15 +float_min * long_min : 0x.ee-15 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.4e-15 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x08e+15 +float_min + long_min : 0x8e+15 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x1e+16 +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x8e+15 +float_min - long_min : 0x08e+15 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xfe+16 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.08e-46 +float_min * float_min * long_min : 0x.8e-47 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.1e-46 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffee+10 +float_max / long_min : 0xe000002e+10 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffffe+10 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff8e+41 +float_max * long_min : 0x8000008e+41 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0ffffffe+42 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7fffff0000008e+67 +float_max * float_max * long_min : 0x800000ffffff8e+67 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffe000001e+68 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x000000000 +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x000000000 +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x00000000 +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0x00000000 +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x00.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x00.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.mingw b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.mingw new file mode 100644 index 000000000..847536547 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/golden/test.log.mingw @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffff +zero_min + long_min : 0x8e+7 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x80000001 +zero_min - long_min : 0x08e+7 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf00000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffff +zero_plus + long_min : 0x8e+7 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x80000001 +zero_plus - long_min : 0x08e+7 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf00000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffff +zero + long_min : 0x8e+7 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x80000001 +zero - long_min : 0x08e+7 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf00000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.00000002 +long_max / int_max : 0x1 +long_max / int_min : 0xf.00000002 +long_max / uint_max : 0x.7fffffff8 +long_max / ulong_max : 0x.7fffffff8 +long_max / double_min : Inf +long_max / double_max : 0x.7fffffff000004e-248 +long_max / float_min : 0x1fffffffce+31 +long_max / float_max : 0x.08000007f00008e-23 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffffe+8 +long_max * long_min : 0xc00000008e+7 +long_max * int_max : 0x3fffffffe+8 +long_max * int_min : 0xc00000008e+7 +long_max * uint_max : 0x7ffffffe8e+7 +long_max * ulong_max : 0x7ffffffe8e+7 +long_max * double_min : 0x.1fffffffce-247 +long_max * double_max : Inf +long_max * float_min : 0x.1fffffffce-23 +long_max * float_max : 0x7fffff7fe+32 +long_max + zero_min : 0x7fffffff +long_max + zero_plus : 0x7fffffff +long_max + zero : 0x7fffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0fffffffe +long_max + int_min : 0xf +long_max + uint_max : 0x17ffffffe +long_max + ulong_max : 0x17ffffffe +long_max + double_min : 0x7fffffff +long_max + double_max : 0x0fffffffffffff8e+242 +long_max + float_min : 0x7fffffff +long_max + float_max : 0x0ffffffe+26 +long_max - zero_min : 0x7fffffff +long_max - zero_plus : 0x7fffffff +long_max - zero : 0x7fffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffff +long_max - int_max : 0x0 +long_max - int_min : 0x0ffffffff +long_max - uint_max : 0x8e+7 +long_max - ulong_max : 0x8e+7 +long_max - double_min : 0x7fffffff +long_max - double_max : 0xf00000000000008e+242 +long_max - float_min : 0x7fffffff +long_max - float_max : 0xf000001e+26 +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x0 +long_max > int_min : 0x1 +long_max > uint_max : 0x0 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x1 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x0 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x1 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x1 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x1 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x0 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffff4e+15 +long_max * long_max * long_min : 0xe00000008e+15 +long_max * long_max * int_max : 0x1fffffff4e+15 +long_max * long_max * int_min : 0xe00000008e+15 +long_max * long_max * uint_max : 0x3ffffffece+15 +long_max * long_max * ulong_max : 0x3ffffffece+15 +long_max * long_max * double_min : 0x.0fffffffce-239 +long_max * long_max * double_max : Inf +long_max * long_max * float_min : 0x.0fffffffce-15 +long_max * long_max * float_max : 0x3fffffbfe+40 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffe +long_min / long_min : 0x1 +long_min / int_max : 0xe.fffffffe +long_min / int_min : 0x1 +long_min / uint_max : 0xf.7fffffff8 +long_min / ulong_max : 0xf.7fffffff8 +long_min / double_min : -Inf +long_min / double_max : 0x.8e-248 +long_min / float_min : 0xee+39 +long_min / float_max : 0x.f7fffff7fffff8e-23 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc00000008e+7 +long_min * long_min : 0x4e+15 +long_min * int_max : 0xc00000008e+7 +long_min * int_min : 0x4e+15 +long_min * uint_max : 0x800000008e+7 +long_min * ulong_max : 0x800000008e+7 +long_min * double_min : 0x.ee-247 +long_min * double_max : -Inf +long_min * float_min : 0x.ee-23 +long_min * float_max : 0x8000008e+33 +long_min + zero_min : 0x8e+7 +long_min + zero_plus : 0x8e+7 +long_min + zero : 0x8e+7 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+8 +long_min + int_max : 0xf +long_min + int_min : 0xfe+8 +long_min + uint_max : 0x7fffffff +long_min + ulong_max : 0x7fffffff +long_min + double_min : 0x8e+7 +long_min + double_max : 0x0fffffffffffff8e+242 +long_min + float_min : 0x8e+7 +long_min + float_max : 0x0ffffffe+26 +long_min - zero_min : 0x8e+7 +long_min - zero_plus : 0x8e+7 +long_min - zero : 0x8e+7 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf00000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf00000001 +long_min - int_min : 0x0 +long_min - uint_max : 0xe80000001 +long_min - ulong_max : 0xe80000001 +long_min - double_min : 0x8e+7 +long_min - double_max : 0xf00000000000008e+242 +long_min - float_min : 0x8e+7 +long_min - float_max : 0xf000001e+26 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x0 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x1 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x1 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x0 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffce+15 +long_min * long_min * long_min : 0xee+23 +long_min * long_min * int_max : 0x1fffffffce+15 +long_min * long_min * int_min : 0xee+23 +long_min * long_min * uint_max : 0x3fffffffce+15 +long_min * long_min * ulong_max : 0x3fffffffce+15 +long_min * long_min * double_min : 0x.1e-239 +long_min * long_min * double_max : Inf +long_min * long_min * float_min : 0x.1e-15 +long_min * long_min * float_max : 0x3fffffce+41 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x1 +int_max / long_min : 0xf.00000002 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff8 +int_max / ulong_max : 0x.7fffffff8 +int_max / double_min : Inf +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00008e-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffffe+8 +int_max * long_min : 0xc00000008e+7 +int_max * int_max : 0x3fffffffe+8 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe8e+7 +int_max * ulong_max : 0x7ffffffe8e+7 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : Inf +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7fe+32 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0fffffffe +int_max + long_min : 0xf +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x17ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff8e+242 +int_max + float_min : 0x7fffffff +int_max + float_max : 0x0ffffffe+26 +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x0 +int_max - long_min : 0x0ffffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0x8e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf00000000000008e+242 +int_max - float_min : 0x7fffffff +int_max - float_max : 0xf000001e+26 +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x0 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x1 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x1 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x0 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff4e+15 +int_max * int_max * long_min : 0xe00000008e+15 +int_max * int_max * int_max : 0x1fffffff4e+15 +int_max * int_max * int_min : 0xe00000008e+15 +int_max * int_max * uint_max : 0x3ffffffece+15 +int_max * int_max * ulong_max : 0x3ffffffece+15 +int_max * int_max * double_min : 0x.0fffffffce-239 +int_max * int_max * double_max : Inf +int_max * int_max * float_min : 0x.0fffffffce-15 +int_max * int_max * float_max : 0x3fffffbfe+40 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0xe.fffffffe +int_min / long_min : 0x1 +int_min / int_max : 0xe.fffffffe +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0xf.7fffffff8 +int_min / double_min : -Inf +int_min / double_max : 0x.8e-248 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc00000008e+7 +int_min * long_min : 0x4e+15 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x800000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : -Inf +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0xf +int_min + long_min : 0xfe+8 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff8e+242 +int_min + float_min : 0x8e+7 +int_min + float_max : 0x0ffffffe+26 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf00000001 +int_min - long_min : 0x0 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xe80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000008e+242 +int_min - float_min : 0x8e+7 +int_min - float_max : 0xf000001e+26 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x0 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x1 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x1 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x0 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffce+15 +int_min * int_min * long_min : 0xee+23 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : Inf +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x2.00000002 +uint_max / long_min : 0xe.00000002 +uint_max / int_max : 0x2.00000002 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x1 +uint_max / double_min : Inf +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0001e-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7ffffffe8e+7 +uint_max * long_min : 0x800000008e+7 +uint_max * int_max : 0x7ffffffe8e+7 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffee+8 +uint_max * ulong_max : 0x0fffffffee+8 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : Inf +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeffe+32 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x17ffffffe +uint_max + long_min : 0x7fffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x1fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8e+242 +uint_max + float_min : 0x0ffffffff +uint_max + float_max : 0x0ffffffe+26 +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x08e+7 +uint_max - long_min : 0x17fffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0x0 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008e+242 +uint_max - float_min : 0x0ffffffff +uint_max - float_max : 0xf000001e+26 +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x1 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x0 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x0 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x1 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x1 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x0 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x1 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x0 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffee+16 +uint_max * uint_max * long_min : 0x80000001e+16 +uint_max * uint_max * int_max : 0x7ffffffee+16 +uint_max * uint_max * int_min : 0x80000001e+16 +uint_max * uint_max * uint_max : 0x0fffffffde+16 +uint_max * uint_max * ulong_max : 0x0fffffffde+16 +uint_max * uint_max * double_min : 0x.3fffffff8e-239 +uint_max * uint_max * double_max : Inf +uint_max * uint_max * float_min : 0x.3fffffff8e-15 +uint_max * uint_max * float_max : 0x0fffffefee+40 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.00000002 +ulong_max / long_min : 0xe.00000002 +ulong_max / int_max : 0x2.00000002 +ulong_max / int_min : 0xe.00000002 +ulong_max / uint_max : 0x1 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : Inf +ulong_max / double_max : 0x.0ffffffff000008e-247 +ulong_max / float_min : 0x3fffffffce+31 +ulong_max / float_max : 0x.1000000ff0001e-23 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffe8e+7 +ulong_max * long_min : 0x800000008e+7 +ulong_max * int_max : 0x7ffffffe8e+7 +ulong_max * int_min : 0x800000008e+7 +ulong_max * uint_max : 0x0fffffffee+8 +ulong_max * ulong_max : 0x0fffffffee+8 +ulong_max * double_min : 0x.3fffffffce-247 +ulong_max * double_max : Inf +ulong_max * float_min : 0x.3fffffffce-23 +ulong_max * float_max : 0x0fffffeffe+32 +ulong_max + zero_min : 0x0ffffffff +ulong_max + zero_plus : 0x0ffffffff +ulong_max + zero : 0x0ffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffe +ulong_max + long_min : 0x7fffffff +ulong_max + int_max : 0x17ffffffe +ulong_max + int_min : 0x7fffffff +ulong_max + uint_max : 0x1fffffffe +ulong_max + ulong_max : 0x1fffffffe +ulong_max + double_min : 0x0ffffffff +ulong_max + double_max : 0x0fffffffffffff8e+242 +ulong_max + float_min : 0x0ffffffff +ulong_max + float_max : 0x0ffffffe+26 +ulong_max - zero_min : 0x0ffffffff +ulong_max - zero_plus : 0x0ffffffff +ulong_max - zero : 0x0ffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+7 +ulong_max - long_min : 0x17fffffff +ulong_max - int_max : 0x08e+7 +ulong_max - int_min : 0x17fffffff +ulong_max - uint_max : 0x0 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffff +ulong_max - double_max : 0xf00000000000008e+242 +ulong_max - float_min : 0x0ffffffff +ulong_max - float_max : 0xf000001e+26 +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x0 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x1 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x1 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x0 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffee+16 +ulong_max * ulong_max * long_min : 0x80000001e+16 +ulong_max * ulong_max * int_max : 0x7ffffffee+16 +ulong_max * ulong_max * int_min : 0x80000001e+16 +ulong_max * ulong_max * uint_max : 0x0fffffffde+16 +ulong_max * ulong_max * ulong_max : 0x0fffffffde+16 +ulong_max * ulong_max * double_min : 0x.3fffffff8e-239 +ulong_max * ulong_max * double_max : Inf +ulong_max * ulong_max * float_min : 0x.3fffffff8e-15 +ulong_max * ulong_max * float_max : 0x0fffffefee+40 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.4e-263 +double_min / long_min : 0x.ce-263 +double_min / int_max : 0x.4e-263 +double_min / int_min : 0x.ce-263 +double_min / uint_max : 0x.2e-263 +double_min / ulong_max : 0x.2e-263 +double_min / double_min : 0x1 +double_min / double_max : 0x0 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x0 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffce-247 +double_min * long_min : 0x.ee-247 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffce-247 +double_min * double_min : 0x0 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x0 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffff +double_min + long_min : 0x8e+7 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.4e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x80000001 +double_min - long_min : 0x08e+7 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf00000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.ce-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : NaN +double_min * double_min * Inf_min : NaN +double_min * double_min * Inf : NaN +double_min * double_min * long_max : 0x0 +double_min * double_min * long_min : 0x0 +double_min * double_min * int_max : 0x0 +double_min * double_min * int_min : 0x0 +double_min * double_min * uint_max : 0x0 +double_min * double_min * ulong_max : 0x0 +double_min * double_min * double_min : 0x0 +double_min * double_min * double_max : 0x0 +double_min * double_min * float_min : 0x0 +double_min * double_min * float_max : 0x0 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x200000004e+240 +double_max / long_min : 0xe0000000000001e+235 +double_max / int_max : 0x200000004e+240 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000001e+240 +double_max / ulong_max : 0x100000001e+240 +double_max / double_min : Inf +double_max / double_max : 0x1 +double_max / float_min : Inf +double_max / float_max : 0x1000001000001e+212 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : Inf +double_max * long_min : -Inf +double_max * int_max : Inf +double_max * int_min : -Inf +double_max * uint_max : Inf +double_max * ulong_max : Inf +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : Inf +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : Inf +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff8e+242 +double_max + long_min : 0x0fffffffffffff8e+242 +double_max + int_max : 0x0fffffffffffff8e+242 +double_max + int_min : 0x0fffffffffffff8e+242 +double_max + uint_max : 0x0fffffffffffff8e+242 +double_max + ulong_max : 0x0fffffffffffff8e+242 +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : Inf +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8e+242 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff8e+242 +double_max - long_min : 0x0fffffffffffff8e+242 +double_max - int_max : 0x0fffffffffffff8e+242 +double_max - int_min : 0x0fffffffffffff8e+242 +double_max - uint_max : 0x0fffffffffffff8e+242 +double_max - ulong_max : 0x0fffffffffffff8e+242 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff8e+242 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : NaN +double_max * double_max * zero_plus : NaN +double_max * double_max * zero : NaN +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : Inf +double_max * double_max * long_min : -Inf +double_max * double_max * int_max : Inf +double_max * double_max * int_min : -Inf +double_max * double_max * uint_max : Inf +double_max * double_max * ulong_max : Inf +double_max * double_max * double_min : Inf +double_max * double_max * double_max : Inf +double_max * double_max * float_min : Inf +double_max * double_max * float_max : Inf +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.080000001e-38 +float_min / long_min : 0x.8e-39 +float_min / int_max : 0x.080000001e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.400000004e-39 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x0 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.1fffffffce-23 +float_min * long_min : 0x.ee-23 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.3fffffffce-23 +float_min * double_min : 0x0 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x7fffffff +float_min + long_min : 0x8e+7 +float_min + int_max : 0x7fffffff +float_min + int_min : 0x8e+7 +float_min + uint_max : 0x0ffffffff +float_min + ulong_max : 0x0ffffffff +float_min + double_min : 0x.4e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffffe+26 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x80000001 +float_min - long_min : 0x08e+7 +float_min - int_max : 0x80000001 +float_min - int_min : 0x08e+7 +float_min - uint_max : 0xf00000001 +float_min - ulong_max : 0xf00000001 +float_min - double_min : 0x.4e-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf000001e+26 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.7fffffffe-55 +float_min * float_min * long_min : 0x.8e-55 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.0ffffffffe-54 +float_min * float_min * double_min : 0x0 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffe04e+16 +float_max / long_min : 0xe000002e+18 +float_max / int_max : 0x1fffffe04e+16 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff01e+16 +float_max / ulong_max : 0x0ffffff01e+16 +float_max / double_min : Inf +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff7fe+32 +float_max * long_min : 0x8000008e+33 +float_max * int_max : 0x7fffff7fe+32 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeffe+32 +float_max * ulong_max : 0x0fffffeffe+32 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : Inf +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffffe+26 +float_max + long_min : 0x0ffffffe+26 +float_max + int_max : 0x0ffffffe+26 +float_max + int_min : 0x0ffffffe+26 +float_max + uint_max : 0x0ffffffe+26 +float_max + ulong_max : 0x0ffffffe+26 +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8e+242 +float_max + float_min : 0x0ffffffe+26 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0ffffffe+26 +float_max - long_min : 0x0ffffffe+26 +float_max - int_max : 0x0ffffffe+26 +float_max - int_min : 0x0ffffffe+26 +float_max - uint_max : 0x0ffffffe+26 +float_max - ulong_max : 0x0ffffffe+26 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008e+242 +float_max - float_min : 0x0ffffffe+26 +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7ffffeff00008e+59 +float_max * float_max * long_min : 0x800000ffffff8e+59 +float_max * float_max * int_max : 0x7ffffeff00008e+59 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff0001e+60 +float_max * float_max * ulong_max : 0x0fffffdff0001e+60 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : Inf +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000003e+84 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/main.cpp b/src/systemc/tests/systemc/datatypes/fx/fast_limits/main.cpp new file mode 100644 index 000000000..d4f24f55b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/main.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// main.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 12:41:10 1998 +// Status : none +// + +#include + +#define SC_INCLUDE_FX +#include "systemc.h" +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) +# include "sstream" +#else +# include "strstream.h" +#endif +#include "fx_precision_double.h" + +extern void test_fx_float_limits(ostream&); +extern void test_fx_ufix_limits(ostream&); +extern void test_fx_fix_limits(ostream&); +extern void test_fx_fixed_limits(ostream&); +extern void test_fx_ufixed_limits(ostream&); + +int sc_main( int, char** ) +{ +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::stringstream out; +# else + strstream out; +# endif + + out.precision(15); + + test_fx_float_limits(out); + test_fx_ufix_limits(out); + test_fx_fix_limits(out); + test_fx_fixed_limits(out); + test_fx_ufixed_limits(out); + +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::string s = out.str(); + for (int i = 0; i < s.length(); i++ ) +# else + out << '\0'; + char* s = out.str(); + for (int i = 0; i < strlen(s); i++ ) +# endif + + { + if (s[i+0] == 'i' && s[i+1] == 'n' && s[i+2] == 'f') + { + s[i+0] = 'I'; + i += 2; + continue; + } + + if (s[i+0] == 'n' && s[i+1] == 'a' && s[i+2] == 'n') + { + s[i+0] = 'N'; + s[i+2] = 'N'; + i += 2; + continue; + } + } + + cout << s; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/fast_limits/test.f b/src/systemc/tests/systemc/datatypes/fx/fast_limits/test.f new file mode 100644 index 000000000..86a6ecf7d --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/fast_limits/test.f @@ -0,0 +1,26 @@ +fast_limits/fx_fix_limits.cpp +fast_limits/fx_fix_limits_double.cpp +fast_limits/fx_fix_limits_inf.cpp +fast_limits/fx_fix_limits_long.cpp +fast_limits/fx_fix_limits_zero.cpp +fast_limits/fx_fixed_limits.cpp +fast_limits/fx_fixed_limits_double.cpp +fast_limits/fx_fixed_limits_inf.cpp +fast_limits/fx_fixed_limits_long.cpp +fast_limits/fx_fixed_limits_zero.cpp +fast_limits/fx_float_limits.cpp +fast_limits/fx_float_limits_double.cpp +fast_limits/fx_float_limits_inf.cpp +fast_limits/fx_float_limits_long.cpp +fast_limits/fx_float_limits_zero.cpp +fast_limits/fx_ufix_limits.cpp +fast_limits/fx_ufix_limits_double.cpp +fast_limits/fx_ufix_limits_inf.cpp +fast_limits/fx_ufix_limits_long.cpp +fast_limits/fx_ufix_limits_zero.cpp +fast_limits/fx_ufixed_limits.cpp +fast_limits/fx_ufixed_limits_double.cpp +fast_limits/fx_ufixed_limits_inf.cpp +fast_limits/fx_ufixed_limits_long.cpp +fast_limits/fx_ufixed_limits_zero.cpp +fast_limits/main.cpp diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits.cpp new file mode 100644 index 000000000..c09978b4b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) os << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; os << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + + extern void test_fx_fix_limits_zero(ostream&); + extern void test_fx_fix_limits_inf(ostream&); + extern void test_fx_fix_limits_long(ostream&); + extern void test_fx_fix_limits_double(ostream&); + + +void test_fx_fix_limits(ostream& out) +{ + out << "****************** limits fx_fix\n"; + test_fx_fix_limits_zero(out); + test_fx_fix_limits_inf(out); + test_fx_fix_limits_long(out); + test_fx_fix_limits_double(out); + +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_double.cpp new file mode 100644 index 000000000..b67d4a46e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_double.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fix_limits_double(ostream& out) +{ + out << "****************** limits fx_fix_double\n"; + + sc_fix zero_min("-0"); SHOW(zero_min); + sc_fix zero_plus("+0"); SHOW(zero_plus); + sc_fix zero(0); SHOW(zero); + + sc_fix long_max(LONG_MAX); SHOW(long_max); + sc_fix long_min(LONG_MIN); SHOW(long_min); + sc_fix int_max(INT_MAX); SHOW(int_max); + sc_fix int_min(INT_MIN); SHOW(int_min); + sc_fix uint_max(UINT_MAX); SHOW(uint_max); + sc_fix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fix double_min(DBL_MIN); SHOW(double_min); + sc_fix double_max(DBL_MAX); SHOW(double_max); + sc_fix float_min(FLT_MIN); SHOW(float_min); + sc_fix float_max(FLT_MAX); SHOW(float_max); + + // sc_fix res; + + // SHOW_EXPS(double_min); + // SHOW_EXPS(double_max); + // SHOW_EXPS(float_min); + // SHOW_EXPS(float_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_inf.cpp new file mode 100644 index 000000000..e18805f50 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_inf.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fix_limits_inf(ostream& out) +{ + out << "****************** limits fx_fix_inf\n"; + + sc_fix zero_min("-0"); SHOW(zero_min); + sc_fix zero_plus("+0"); SHOW(zero_plus); + sc_fix zero(0); SHOW(zero); + + sc_fix long_max(LONG_MAX); SHOW(long_max); + sc_fix long_min(LONG_MIN); SHOW(long_min); + sc_fix int_max(INT_MAX); SHOW(int_max); + sc_fix int_min(INT_MIN); SHOW(int_min); + sc_fix uint_max(UINT_MAX); SHOW(uint_max); + sc_fix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fix double_min(DBL_MIN); SHOW(double_min); + sc_fix double_max(DBL_MAX); SHOW(double_max); + sc_fix float_min(FLT_MIN); SHOW(float_min); + sc_fix float_max(FLT_MAX); SHOW(float_max); + + // sc_fix res; +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_long.cpp new file mode 100644 index 000000000..fe6c21309 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_long.cpp @@ -0,0 +1,116 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fix_limits_long(ostream& out) +{ + out << "****************** limits fx_fix_long\n"; + + sc_fix zero_min("-0"); SHOW(zero_min); + sc_fix zero_plus("+0"); SHOW(zero_plus); + sc_fix zero(0); SHOW(zero); + + sc_fix long_max(LONG_MAX); SHOW(long_max); + sc_fix long_min(LONG_MIN); SHOW(long_min); + sc_fix int_max(INT_MAX); SHOW(int_max); + sc_fix int_min(INT_MIN); SHOW(int_min); + sc_fix uint_max(UINT_MAX); SHOW(uint_max); + sc_fix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fix double_min(DBL_MIN); SHOW(double_min); + sc_fix double_max(DBL_MAX); SHOW(double_max); + sc_fix float_min(FLT_MIN); SHOW(float_min); + sc_fix float_max(FLT_MAX); SHOW(float_max); + + // sc_fix res; + + + // SHOW_EXPS(long_max); + // SHOW_EXPS(long_min); + // SHOW_EXPS(int_max); + // SHOW_EXPS(int_min); + // SHOW_EXPS(uint_max); + // SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_zero.cpp new file mode 100644 index 000000000..813212050 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fix_limits_zero.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fix_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fix_limits_zero(ostream& out) +{ + out << "****************** limits fx_fix_zero\n"; + + sc_fix zero_min("-0"); SHOW(zero_min); + sc_fix zero_plus("+0"); SHOW(zero_plus); + sc_fix zero(0); SHOW(zero); + + sc_fix long_max(LONG_MAX); SHOW(long_max); + sc_fix long_min(LONG_MIN); SHOW(long_min); + sc_fix int_max(INT_MAX); SHOW(int_max); + sc_fix int_min(INT_MIN); SHOW(int_min); + sc_fix uint_max(UINT_MAX); SHOW(uint_max); + sc_fix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fix double_min(DBL_MIN); SHOW(double_min); + sc_fix double_max(DBL_MAX); SHOW(double_max); + sc_fix float_min(FLT_MIN); SHOW(float_min); + sc_fix float_max(FLT_MAX); SHOW(float_max); + + // sc_fix res; + + + // SHOW_EXPS(zero_min); + // SHOW_EXPS(zero_plus); + // SHOW_EXPS(zero); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits.cpp new file mode 100644 index 000000000..76332cb97 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits.cpp @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + + extern void test_fx_fixed_limits_zero(ostream&); + extern void test_fx_fixed_limits_inf(ostream&); + extern void test_fx_fixed_limits_long(ostream&); + extern void test_fx_fixed_limits_double(ostream&); + +void test_fx_fixed_limits(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>\n"; + + test_fx_fixed_limits_zero(out); + test_fx_fixed_limits_inf(out); + test_fx_fixed_limits_long(out); + test_fx_fixed_limits_double(out); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_double.cpp new file mode 100644 index 000000000..4af4fad36 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_double.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fixed_limits_double(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>_double\n"; + + sc_fixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_fixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_fixed<8, 5> zero(0); SHOW(zero); + + sc_fixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_fixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_fixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_fixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_fixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_fixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_fixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_fixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_fixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_fixed<8, 5> res; + + + // SHOW_EXPS(double_min); + // SHOW_EXPS(double_max); + // SHOW_EXPS(float_min); + // SHOW_EXPS(float_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_inf.cpp new file mode 100644 index 000000000..41ffc790f --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_inf.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fixed_limits_inf(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>_inf\n"; + + sc_fixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_fixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_fixed<8, 5> zero(0); SHOW(zero); + + sc_fixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_fixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_fixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_fixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_fixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_fixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_fixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_fixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_fixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_fixed<8, 5> res; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_long.cpp new file mode 100644 index 000000000..ced81f88e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_long.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fixed_limits_long(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>_long\n"; + + sc_fixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_fixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_fixed<8, 5> zero(0); SHOW(zero); + + sc_fixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_fixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_fixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_fixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_fixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_fixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_fixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_fixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_fixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_fixed<8, 5> res; + + // SHOW_EXPS(long_max); + // SHOW_EXPS(long_min); + // SHOW_EXPS(int_max); + // SHOW_EXPS(int_min); + // SHOW_EXPS(uint_max); + // SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_zero.cpp new file mode 100644 index 000000000..2366ea4f8 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_fixed_limits_zero.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_fixed_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_fixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_fixed_limits_zero(ostream& out) +{ + out << "****************** limits fx_fixed<8, 5>_zero\n"; + + sc_fixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_fixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_fixed<8, 5> zero(0); SHOW(zero); + + sc_fixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_fixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_fixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_fixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_fixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_fixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_fixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_fixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_fixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_fixed<8, 5> res; + + + // SHOW_EXPS(zero_min); + // SHOW_EXPS(zero_plus); + // SHOW_EXPS(zero); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits.cpp new file mode 100644 index 000000000..5c1d6e82e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + + extern void test_fx_float_limits_zero(ostream&); + extern void test_fx_float_limits_inf(ostream&); + extern void test_fx_float_limits_long(ostream&); + extern void test_fx_float_limits_double(ostream&); + + +void test_fx_float_limits(ostream& out) +{ + out << "****************** limits fx_float\n"; + + test_fx_float_limits_zero(out); + test_fx_float_limits_inf(out); + test_fx_float_limits_long(out); + test_fx_float_limits_double(out); + +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_double.cpp new file mode 100644 index 000000000..9a5f23a1a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_double.cpp @@ -0,0 +1,125 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_float_limits_double(ostream& out) +{ + out << "****************** limits fx_float_double\n"; + + sc_fxval zero_min("-0"); SHOW(zero_min); + sc_fxval zero_plus("+0"); SHOW(zero_plus); + sc_fxval zero(0); SHOW(zero); + + sc_fxval nan("NaN"); SHOW(nan); + sc_fxval inf_plus("+Inf"); SHOW(inf_plus); + sc_fxval inf_min("-Inf"); SHOW(inf_min); + sc_fxval inf("Inf"); SHOW(inf); + + sc_fxval long_max(LONG_MAX); SHOW(long_max); + sc_fxval long_min(LONG_MIN); SHOW(long_min); + sc_fxval int_max(INT_MAX); SHOW(int_max); + sc_fxval int_min(INT_MIN); SHOW(int_min); + sc_fxval uint_max(UINT_MAX); SHOW(uint_max); + sc_fxval ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fxval double_min(DBL_MIN); SHOW(double_min); + sc_fxval double_max(DBL_MAX); SHOW(double_max); + sc_fxval float_min(FLT_MIN); SHOW(float_min); + sc_fxval float_max(FLT_MAX); SHOW(float_max); + + sc_fxval res; + + SHOW_EXPS(double_min); + SHOW_EXPS(double_max); + SHOW_EXPS(float_min); + SHOW_EXPS(float_max); + + + SHOW_EXP(double_min / nan); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_inf.cpp new file mode 100644 index 000000000..c96095189 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_inf.cpp @@ -0,0 +1,123 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_float_limits_inf(ostream& out) +{ + cerr << "****************** limits fx_float_inf\n"; + + sc_fxval zero_min("-0"); SHOW(zero_min); + sc_fxval zero_plus("+0"); SHOW(zero_plus); + sc_fxval zero(0); SHOW(zero); + + sc_fxval nan("NaN"); SHOW(nan); + sc_fxval inf_plus("+Inf"); SHOW(inf_plus); + sc_fxval inf_min("-Inf"); SHOW(inf_min); + sc_fxval inf("Inf"); SHOW(inf); + + sc_fxval long_max(LONG_MAX); SHOW(long_max); + sc_fxval long_min(LONG_MIN); SHOW(long_min); + sc_fxval int_max(INT_MAX); SHOW(int_max); + sc_fxval int_min(INT_MIN); SHOW(int_min); + sc_fxval uint_max(UINT_MAX); SHOW(uint_max); + sc_fxval ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fxval double_min(DBL_MIN); SHOW(double_min); + sc_fxval double_max(DBL_MAX); SHOW(double_max); + sc_fxval float_min(FLT_MIN); SHOW(float_min); + sc_fxval float_max(FLT_MAX); SHOW(float_max); + + sc_fxval res; + + + SHOW_EXPS(nan); + SHOW_EXPS(inf_plus); + SHOW_EXPS(inf_min); + SHOW_EXPS(inf); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_long.cpp new file mode 100644 index 000000000..026ea845c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_long.cpp @@ -0,0 +1,125 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_float_limits_long(ostream& out) +{ + out << "****************** limits fx_float_long\n"; + + sc_fxval zero_min("-0"); SHOW(zero_min); + sc_fxval zero_plus("+0"); SHOW(zero_plus); + sc_fxval zero(0); SHOW(zero); + + sc_fxval nan("NaN"); SHOW(nan); + sc_fxval inf_plus("+Inf"); SHOW(inf_plus); + sc_fxval inf_min("-Inf"); SHOW(inf_min); + sc_fxval inf("Inf"); SHOW(inf); + + sc_fxval long_max(LONG_MAX); SHOW(long_max); + sc_fxval long_min(LONG_MIN); SHOW(long_min); + sc_fxval int_max(INT_MAX); SHOW(int_max); + sc_fxval int_min(INT_MIN); SHOW(int_min); + sc_fxval uint_max(UINT_MAX); SHOW(uint_max); + sc_fxval ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fxval double_min(DBL_MIN); SHOW(double_min); + sc_fxval double_max(DBL_MAX); SHOW(double_max); + sc_fxval float_min(FLT_MIN); SHOW(float_min); + sc_fxval float_max(FLT_MAX); SHOW(float_max); + + sc_fxval res; + + + SHOW_EXPS(long_max); + SHOW_EXPS(long_min); + SHOW_EXPS(int_max); + SHOW_EXPS(int_min); + SHOW_EXPS(uint_max); + SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_zero.cpp new file mode 100644 index 000000000..20a689f8e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_float_limits_zero.cpp @@ -0,0 +1,122 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_float_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_float_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:31:37 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b nan); \ + SHOW_EXP(a b inf_plus); \ + SHOW_EXP(a b inf_min); \ + SHOW_EXP(a b inf); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_float_limits_zero(ostream& out) +{ + cerr << "****************** limits fx_float_zero\n"; + + sc_fxval zero_min("-0"); SHOW(zero_min); + sc_fxval zero_plus("+0"); SHOW(zero_plus); + sc_fxval zero(0); SHOW(zero); + + sc_fxval nan("NaN"); SHOW(nan); + sc_fxval inf_plus("+Inf"); SHOW(inf_plus); + sc_fxval inf_min("-Inf"); SHOW(inf_min); + sc_fxval inf("Inf"); SHOW(inf); + + sc_fxval long_max(LONG_MAX); SHOW(long_max); + sc_fxval long_min(LONG_MIN); SHOW(long_min); + sc_fxval int_max(INT_MAX); SHOW(int_max); + sc_fxval int_min(INT_MIN); SHOW(int_min); + sc_fxval uint_max(UINT_MAX); SHOW(uint_max); + sc_fxval ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_fxval double_min(DBL_MIN); SHOW(double_min); + sc_fxval double_max(DBL_MAX); SHOW(double_max); + sc_fxval float_min(FLT_MIN); SHOW(float_min); + sc_fxval float_max(FLT_MAX); SHOW(float_max); + + sc_fxval res; + + + SHOW_EXPS(zero_min); + SHOW_EXPS(zero_plus); + SHOW_EXPS(zero); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits.cpp new file mode 100644 index 000000000..de8979668 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + + extern void test_fx_ufix_limits_zero(ostream&); + extern void test_fx_ufix_limits_inf(ostream&); + extern void test_fx_ufix_limits_long(ostream&); + extern void test_fx_ufix_limits_double(ostream&); + + +void test_fx_ufix_limits(ostream& out) +{ + out << "****************** limits fx_ufix\n"; + + test_fx_ufix_limits_zero(out); + test_fx_ufix_limits_inf(out); + test_fx_ufix_limits_long(out); + test_fx_ufix_limits_double(out); +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_double.cpp new file mode 100644 index 000000000..c86b39b2c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_double.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufix_limits_double(ostream& out) +{ + out << "****************** limits fx_ufix_double\n"; + + sc_ufix zero_min("-0"); SHOW(zero_min); + sc_ufix zero_plus("+0"); SHOW(zero_plus); + sc_ufix zero(0); SHOW(zero); + + sc_ufix long_max(LONG_MAX); SHOW(long_max); + sc_ufix long_min(LONG_MIN); SHOW(long_min); + sc_ufix int_max(INT_MAX); SHOW(int_max); + sc_ufix int_min(INT_MIN); SHOW(int_min); + sc_ufix uint_max(UINT_MAX); SHOW(uint_max); + sc_ufix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufix double_min(DBL_MIN); SHOW(double_min); + sc_ufix double_max(DBL_MAX); SHOW(double_max); + sc_ufix float_min(FLT_MIN); SHOW(float_min); + sc_ufix float_max(FLT_MAX); SHOW(float_max); + + // sc_ufix res; + + // SHOW_EXPS(double_min); + // SHOW_EXPS(double_max); + // SHOW_EXPS(float_min); + // SHOW_EXPS(float_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_inf.cpp new file mode 100644 index 000000000..ff1558ea6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_inf.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufix_limits_inf(ostream& out) +{ + out << "****************** limits fx_ufix_inf\n"; + + sc_ufix zero_min("-0"); SHOW(zero_min); + sc_ufix zero_plus("+0"); SHOW(zero_plus); + sc_ufix zero(0); SHOW(zero); + + sc_ufix long_max(LONG_MAX); SHOW(long_max); + sc_ufix long_min(LONG_MIN); SHOW(long_min); + sc_ufix int_max(INT_MAX); SHOW(int_max); + sc_ufix int_min(INT_MIN); SHOW(int_min); + sc_ufix uint_max(UINT_MAX); SHOW(uint_max); + sc_ufix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufix double_min(DBL_MIN); SHOW(double_min); + sc_ufix double_max(DBL_MAX); SHOW(double_max); + sc_ufix float_min(FLT_MIN); SHOW(float_min); + sc_ufix float_max(FLT_MAX); SHOW(float_max); + + // sc_ufix res; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_long.cpp new file mode 100644 index 000000000..e3389548b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_long.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufix_limits_long(ostream& out) +{ + out << "****************** limits fx_ufix_long\n"; + + sc_ufix zero_min("-0"); SHOW(zero_min); + sc_ufix zero_plus("+0"); SHOW(zero_plus); + sc_ufix zero(0); SHOW(zero); + + sc_ufix long_max(LONG_MAX); SHOW(long_max); + sc_ufix long_min(LONG_MIN); SHOW(long_min); + sc_ufix int_max(INT_MAX); SHOW(int_max); + sc_ufix int_min(INT_MIN); SHOW(int_min); + sc_ufix uint_max(UINT_MAX); SHOW(uint_max); + sc_ufix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufix double_min(DBL_MIN); SHOW(double_min); + sc_ufix double_max(DBL_MAX); SHOW(double_max); + sc_ufix float_min(FLT_MIN); SHOW(float_min); + sc_ufix float_max(FLT_MAX); SHOW(float_max); + + // sc_ufix res; + + // SHOW_EXPS(long_max); + // SHOW_EXPS(long_min); + // SHOW_EXPS(int_max); + // SHOW_EXPS(int_min); + // SHOW_EXPS(uint_max); + // SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_zero.cpp new file mode 100644 index 000000000..2028fbe0a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufix_limits_zero.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufix_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufix_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufix_limits_zero(ostream& out) +{ + out << "****************** limits fx_ufix_zero\n"; + + sc_ufix zero_min("-0"); SHOW(zero_min); + sc_ufix zero_plus("+0"); SHOW(zero_plus); + sc_ufix zero(0); SHOW(zero); + + sc_ufix long_max(LONG_MAX); SHOW(long_max); + sc_ufix long_min(LONG_MIN); SHOW(long_min); + sc_ufix int_max(INT_MAX); SHOW(int_max); + sc_ufix int_min(INT_MIN); SHOW(int_min); + sc_ufix uint_max(UINT_MAX); SHOW(uint_max); + sc_ufix ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufix double_min(DBL_MIN); SHOW(double_min); + sc_ufix double_max(DBL_MAX); SHOW(double_max); + sc_ufix float_min(FLT_MIN); SHOW(float_min); + sc_ufix float_max(FLT_MAX); SHOW(float_max); + + // sc_ufix res; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits.cpp new file mode 100644 index 000000000..fe211db11 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits.cpp @@ -0,0 +1,94 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, * a *) + + extern void test_fx_ufixed_limits_zero(ostream&); + extern void test_fx_ufixed_limits_inf(ostream&); + extern void test_fx_ufixed_limits_long(ostream&); + extern void test_fx_ufixed_limits_double(ostream&); + + +void test_fx_ufixed_limits(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>\n"; + + test_fx_ufixed_limits_zero(out); + test_fx_ufixed_limits_inf(out); + test_fx_ufixed_limits_long(out); + test_fx_ufixed_limits_double(out); +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_double.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_double.cpp new file mode 100644 index 000000000..b7305303b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_double.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits_double.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufixed_limits_double(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>_double\n"; + + sc_ufixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_ufixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_ufixed<8, 5> zero(0); SHOW(zero); + + sc_ufixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_ufixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_ufixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_ufixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_ufixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_ufixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_ufixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_ufixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_ufixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_ufixed<8, 5> res; + + // SHOW_EXPS(double_min); + // SHOW_EXPS(double_max); + // SHOW_EXPS(float_min); + // SHOW_EXPS(float_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_inf.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_inf.cpp new file mode 100644 index 000000000..5a2704ee0 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_inf.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits_inf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufixed_limits_inf(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>_inf\n"; + + sc_ufixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_ufixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_ufixed<8, 5> zero(0); SHOW(zero); + + sc_ufixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_ufixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_ufixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_ufixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_ufixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_ufixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_ufixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_ufixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_ufixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_ufixed<8, 5> res; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_long.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_long.cpp new file mode 100644 index 000000000..821afab77 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_long.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits_long.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufixed_limits_long(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>_long\n"; + + sc_ufixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_ufixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_ufixed<8, 5> zero(0); SHOW(zero); + + sc_ufixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_ufixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_ufixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_ufixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_ufixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_ufixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_ufixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_ufixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_ufixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_ufixed<8, 5> res; + + // SHOW_EXPS(long_max); + // SHOW_EXPS(long_min); + // SHOW_EXPS(int_max); + // SHOW_EXPS(int_min); + // SHOW_EXPS(uint_max); + // SHOW_EXPS(ulong_max); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_zero.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_zero.cpp new file mode 100644 index 000000000..ea888ccda --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/fx_ufixed_limits_zero.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_ufixed_limits_zero.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// fx_ufixed<8, 5>_limits.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 8 14:30:41 1999 +// Status : none +// + + +#include +#include +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +#define SHOW(a) out << #a << " : " << a.to_string(SC_HEX) << "\n" +#define SHOW_EXP(a) { res = a; out << #a << " : " << res.to_string(SC_HEX) << "\n"; } + + +#define SHOW_EXPRS(a, b) \ + SHOW_EXP(a b zero_min); \ + SHOW_EXP(a b zero_plus); \ + SHOW_EXP(a b zero); \ + SHOW_EXP(a b long_max); \ + SHOW_EXP(a b long_min); \ + SHOW_EXP(a b int_max); \ + SHOW_EXP(a b int_min); \ + SHOW_EXP(a b uint_max); \ + SHOW_EXP(a b ulong_max); \ + SHOW_EXP(a b double_min); \ + SHOW_EXP(a b double_max); \ + SHOW_EXP(a b float_min); \ + SHOW_EXP(a b float_max); + +#define SHOW_EXPS(a) \ + SHOW_EXPRS(a, /) \ + SHOW_EXPRS(a, *) \ + SHOW_EXPRS(a, +) \ + SHOW_EXPRS(a, -) \ + SHOW_EXPRS(a, >) \ + SHOW_EXPRS(a, <) \ + SHOW_EXPRS(a, >=) \ + SHOW_EXPRS(a, <=) \ + SHOW_EXPRS(a, ==) \ + SHOW_EXPRS(a, !=) \ + SHOW_EXPRS(a, * a *) + + +void test_fx_ufixed_limits_zero(ostream& out) +{ + out << "****************** limits fx_ufixed<8, 5>_zero\n"; + + sc_ufixed<8, 5> zero_min("-0"); SHOW(zero_min); + sc_ufixed<8, 5> zero_plus("+0"); SHOW(zero_plus); + sc_ufixed<8, 5> zero(0); SHOW(zero); + + sc_ufixed<8, 5> long_max(LONG_MAX); SHOW(long_max); + sc_ufixed<8, 5> long_min(LONG_MIN); SHOW(long_min); + sc_ufixed<8, 5> int_max(INT_MAX); SHOW(int_max); + sc_ufixed<8, 5> int_min(INT_MIN); SHOW(int_min); + sc_ufixed<8, 5> uint_max(UINT_MAX); SHOW(uint_max); + sc_ufixed<8, 5> ulong_max(ULONG_MAX); SHOW(ulong_max); + + sc_ufixed<8, 5> double_min(DBL_MIN); SHOW(double_min); + sc_ufixed<8, 5> double_max(DBL_MAX); SHOW(double_max); + sc_ufixed<8, 5> float_min(FLT_MIN); SHOW(float_min); + sc_ufixed<8, 5> float_max(FLT_MAX); SHOW(float_max); + + // sc_ufixed<8, 5> res; + + + // SHOW_EXPS(zero_min); + // SHOW_EXPS(zero_plus); + // SHOW_EXPS(zero); +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log new file mode 100644 index 000000000..1f70e9a3b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffff +zero_min + long_min : 0x8e+7 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x80000001 +zero_min - long_min : 0x08e+7 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf00000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffff +zero_plus + long_min : 0x8e+7 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x80000001 +zero_plus - long_min : 0x08e+7 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf00000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffff +zero + long_min : 0x8e+7 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x80000001 +zero - long_min : 0x08e+7 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf00000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.00000002 +long_max / int_max : 0x1 +long_max / int_min : 0xf.00000002 +long_max / uint_max : 0x.7fffffff7fffffff +long_max / ulong_max : 0x.7fffffff7fffffff +long_max / double_min : 0x1fffffffce+255 +long_max / double_max : 0x.7fffffff000004e-248 +long_max / float_min : 0x1fffffffce+31 +long_max / float_max : 0x.08000007f00007fe-23 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffff00000001 +long_max * long_min : 0xc00000008e+7 +long_max * int_max : 0x3fffffff00000001 +long_max * int_min : 0xc00000008e+7 +long_max * uint_max : 0x7ffffffe80000001 +long_max * ulong_max : 0x7ffffffe80000001 +long_max * double_min : 0x.1fffffffce-247 +long_max * double_max : 0x7ffffffefffffc00000008e+242 +long_max * float_min : 0x.1fffffffce-23 +long_max * float_max : 0x7fffff7f000001e+26 +long_max + zero_min : 0x7fffffff +long_max + zero_plus : 0x7fffffff +long_max + zero : 0x7fffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0fffffffe +long_max + int_min : 0xf +long_max + uint_max : 0x17ffffffe +long_max + ulong_max : 0x17ffffffe +long_max + double_min : 0x7fffffff +long_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +long_max + float_min : 0x7fffffff.00000000000000000000000000000004 +long_max + float_max : 0x0ffffff0000000000000000007fffffff +long_max - zero_min : 0x7fffffff +long_max - zero_plus : 0x7fffffff +long_max - zero : 0x7fffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffff +long_max - int_max : 0x0 +long_max - int_min : 0x0ffffffff +long_max - uint_max : 0x8e+7 +long_max - ulong_max : 0x8e+7 +long_max - double_min : 0x7fffffff +long_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +long_max - float_min : 0x7ffffffe.fffffffffffffffffffffffffffffffc +long_max - float_max : 0xf0000010000000000000000007fffffff +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x0 +long_max > int_min : 0x1 +long_max > uint_max : 0x0 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x1 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x0 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x1 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x1 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x1 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x0 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffff400000017fffffff +long_max * long_max * long_min : 0xe00000007fffffff8e+7 +long_max * long_max * int_max : 0x1fffffff400000017fffffff +long_max * long_max * int_min : 0xe00000007fffffff8e+7 +long_max * long_max * uint_max : 0x3ffffffec0000001ffffffff +long_max * long_max * ulong_max : 0x3ffffffec0000001ffffffff +long_max * long_max * double_min : 0x.0fffffffc00000004e-239 +long_max * long_max * double_max : 0x3ffffffefffffe01000007fffffff8e+242 +long_max * long_max * float_min : 0x.0fffffffc00000004e-15 +long_max * long_max * float_max : 0x3fffffbf00000100ffffffe+26 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffdfffffffc +long_min / long_min : 0x1 +long_min / int_max : 0xe.fffffffdfffffffc +long_min / int_min : 0x1 +long_min / uint_max : 0xf.7fffffff8 +long_min / ulong_max : 0xf.7fffffff8 +long_min / double_min : 0xee+263 +long_min / double_max : 0x.f7ffffffffffffce-247 +long_min / float_min : 0xee+39 +long_min / float_max : 0x.f7fffff7fffff8e-23 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc00000008e+7 +long_min * long_min : 0x4e+15 +long_min * int_max : 0xc00000008e+7 +long_min * int_min : 0x4e+15 +long_min * uint_max : 0x800000008e+7 +long_min * ulong_max : 0x800000008e+7 +long_min * double_min : 0x.ee-247 +long_min * double_max : 0x80000000000004e+250 +long_min * float_min : 0x.ee-23 +long_min * float_max : 0x8000008e+33 +long_min + zero_min : 0x8e+7 +long_min + zero_plus : 0x8e+7 +long_min + zero : 0x8e+7 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+8 +long_min + int_max : 0xf +long_min + int_min : 0xfe+8 +long_min + uint_max : 0x7fffffff +long_min + ulong_max : 0x7fffffff +long_min + double_min : 0x8e+7 +long_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +long_min + float_min : 0x80000000.00000000000000000000000000000004 +long_min + float_max : 0x0fffffeffffffffffffffffff8e+7 +long_min - zero_min : 0x8e+7 +long_min - zero_plus : 0x8e+7 +long_min - zero : 0x8e+7 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf00000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf00000001 +long_min - int_min : 0x0 +long_min - uint_max : 0xe80000001 +long_min - ulong_max : 0xe80000001 +long_min - double_min : 0x8e+7 +long_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +long_min - float_min : 0xf7fffffff.fffffffffffffffffffffffffffffffc +long_min - float_max : 0xf000000ffffffffffffffffff8e+7 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x0 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x1 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x1 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x0 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffce+15 +long_min * long_min * long_min : 0xee+23 +long_min * long_min * int_max : 0x1fffffffce+15 +long_min * long_min * int_min : 0xee+23 +long_min * long_min * uint_max : 0x3fffffffce+15 +long_min * long_min * ulong_max : 0x3fffffffce+15 +long_min * long_min * double_min : 0x.1e-239 +long_min * long_min * double_max : 0x3ffffffffffffee+258 +long_min * long_min * float_min : 0x.1e-15 +long_min * long_min * float_max : 0x3fffffce+41 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x1 +int_max / long_min : 0xf.00000002 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff7fffffff +int_max / ulong_max : 0x.7fffffff7fffffff +int_max / double_min : 0x1fffffffce+255 +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00007fe-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff00000001 +int_max * long_min : 0xc00000008e+7 +int_max * int_max : 0x3fffffff00000001 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe80000001 +int_max * ulong_max : 0x7ffffffe80000001 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : 0x7ffffffefffffc00000008e+242 +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7f000001e+26 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0fffffffe +int_max + long_min : 0xf +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x17ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max + float_min : 0x7fffffff.00000000000000000000000000000004 +int_max + float_max : 0x0ffffff0000000000000000007fffffff +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x0 +int_max - long_min : 0x0ffffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0x8e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max - float_min : 0x7ffffffe.fffffffffffffffffffffffffffffffc +int_max - float_max : 0xf0000010000000000000000007fffffff +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x0 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x1 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x1 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x0 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff400000017fffffff +int_max * int_max * long_min : 0xe00000007fffffff8e+7 +int_max * int_max * int_max : 0x1fffffff400000017fffffff +int_max * int_max * int_min : 0xe00000007fffffff8e+7 +int_max * int_max * uint_max : 0x3ffffffec0000001ffffffff +int_max * int_max * ulong_max : 0x3ffffffec0000001ffffffff +int_max * int_max * double_min : 0x.0fffffffc00000004e-239 +int_max * int_max * double_max : 0x3ffffffefffffe01000007fffffff8e+242 +int_max * int_max * float_min : 0x.0fffffffc00000004e-15 +int_max * int_max * float_max : 0x3fffffbf00000100ffffffe+26 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0xe.fffffffdfffffffc +int_min / long_min : 0x1 +int_min / int_max : 0xe.fffffffdfffffffc +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0xf.7fffffff8 +int_min / double_min : 0xee+263 +int_min / double_max : 0x.f7ffffffffffffce-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc00000008e+7 +int_min * long_min : 0x4e+15 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x800000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : 0x80000000000004e+250 +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0xf +int_min + long_min : 0xfe+8 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min + float_min : 0x80000000.00000000000000000000000000000004 +int_min + float_max : 0x0fffffeffffffffffffffffff8e+7 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf00000001 +int_min - long_min : 0x0 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xe80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min - float_min : 0xf7fffffff.fffffffffffffffffffffffffffffffc +int_min - float_max : 0xf000000ffffffffffffffffff8e+7 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x0 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x1 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x1 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x0 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffce+15 +int_min * int_min * long_min : 0xee+23 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : 0x3ffffffffffffee+258 +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x2.0000000200000004 +uint_max / long_min : 0xe.00000002 +uint_max / int_max : 0x2.0000000200000004 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x1 +uint_max / double_min : 0x3fffffffce+255 +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0000ffe-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7ffffffe80000001 +uint_max * long_min : 0x800000008e+7 +uint_max * int_max : 0x7ffffffe80000001 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffe00000001 +uint_max * ulong_max : 0x0fffffffe00000001 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : 0x0fffffffefffff800000008e+242 +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeff000001e+26 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x17ffffffe +uint_max + long_min : 0x7fffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x1fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max + float_min : 0x0ffffffff.00000000000000000000000000000004 +uint_max + float_max : 0x0ffffff000000000000000000ffffffff +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x08e+7 +uint_max - long_min : 0x17fffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0x0 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max - float_min : 0x0fffffffe.fffffffffffffffffffffffffffffffc +uint_max - float_max : 0xf000001000000000000000000ffffffff +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x1 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x0 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x0 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x1 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x1 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x0 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x1 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x0 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffe000000027fffffff +uint_max * uint_max * long_min : 0x80000000ffffffff8e+7 +uint_max * uint_max * int_max : 0x7ffffffe000000027fffffff +uint_max * uint_max * int_min : 0x80000000ffffffff8e+7 +uint_max * uint_max * uint_max : 0x0fffffffd00000002ffffffff +uint_max * uint_max * ulong_max : 0x0fffffffd00000002ffffffff +uint_max * uint_max * double_min : 0x.3fffffff800000004e-239 +uint_max * uint_max * double_max : 0x0fffffffdfffff80100000ffffffff8e+242 +uint_max * uint_max * float_min : 0x.3fffffff800000004e-15 +uint_max * uint_max * float_max : 0x0fffffefe00000200ffffffe+26 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.0000000200000004 +ulong_max / long_min : 0xe.00000002 +ulong_max / int_max : 0x2.0000000200000004 +ulong_max / int_min : 0xe.00000002 +ulong_max / uint_max : 0x1 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : 0x3fffffffce+255 +ulong_max / double_max : 0x.0ffffffff000008e-247 +ulong_max / float_min : 0x3fffffffce+31 +ulong_max / float_max : 0x.1000000ff0000ffe-23 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffe80000001 +ulong_max * long_min : 0x800000008e+7 +ulong_max * int_max : 0x7ffffffe80000001 +ulong_max * int_min : 0x800000008e+7 +ulong_max * uint_max : 0x0fffffffe00000001 +ulong_max * ulong_max : 0x0fffffffe00000001 +ulong_max * double_min : 0x.3fffffffce-247 +ulong_max * double_max : 0x0fffffffefffff800000008e+242 +ulong_max * float_min : 0x.3fffffffce-23 +ulong_max * float_max : 0x0fffffeff000001e+26 +ulong_max + zero_min : 0x0ffffffff +ulong_max + zero_plus : 0x0ffffffff +ulong_max + zero : 0x0ffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffe +ulong_max + long_min : 0x7fffffff +ulong_max + int_max : 0x17ffffffe +ulong_max + int_min : 0x7fffffff +ulong_max + uint_max : 0x1fffffffe +ulong_max + ulong_max : 0x1fffffffe +ulong_max + double_min : 0x0ffffffff +ulong_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +ulong_max + float_min : 0x0ffffffff.00000000000000000000000000000004 +ulong_max + float_max : 0x0ffffff000000000000000000ffffffff +ulong_max - zero_min : 0x0ffffffff +ulong_max - zero_plus : 0x0ffffffff +ulong_max - zero : 0x0ffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+7 +ulong_max - long_min : 0x17fffffff +ulong_max - int_max : 0x08e+7 +ulong_max - int_min : 0x17fffffff +ulong_max - uint_max : 0x0 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffff +ulong_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +ulong_max - float_min : 0x0fffffffe.fffffffffffffffffffffffffffffffc +ulong_max - float_max : 0xf000001000000000000000000ffffffff +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x0 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x1 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x1 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x0 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffe000000027fffffff +ulong_max * ulong_max * long_min : 0x80000000ffffffff8e+7 +ulong_max * ulong_max * int_max : 0x7ffffffe000000027fffffff +ulong_max * ulong_max * int_min : 0x80000000ffffffff8e+7 +ulong_max * ulong_max * uint_max : 0x0fffffffd00000002ffffffff +ulong_max * ulong_max * ulong_max : 0x0fffffffd00000002ffffffff +ulong_max * ulong_max * double_min : 0x.3fffffff800000004e-239 +ulong_max * ulong_max * double_max : 0x0fffffffdfffff80100000ffffffff8e+242 +ulong_max * ulong_max * float_min : 0x.3fffffff800000004e-15 +ulong_max * ulong_max * float_max : 0x0fffffefe00000200ffffffe+26 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffff +long_min : 0x8e+7 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.08000000100000002e-262 +double_min / long_min : 0x.8e-263 +double_min / int_max : 0x.08000000100000002e-262 +double_min / int_min : 0x.8e-263 +double_min / uint_max : 0x.400000004e-263 +double_min / ulong_max : 0x.400000004e-263 +double_min / double_min : 0x1 +double_min / double_max : 0x.40000000000002e-511 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x.4000004000004e-287 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffce-247 +double_min * long_min : 0x.ee-247 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffce-247 +double_min * double_min : 0x.1e-510 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x.1e-286 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffff +double_min + long_min : 0x8e+7 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x80000001 +double_min - long_min : 0x08e+7 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf00000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 +double_min <= int_max : 0x1 +double_min <= int_min : 0x0 +double_min <= uint_max : 0x1 +double_min <= ulong_max : 0x1 +double_min <= double_min : 0x1 +double_min <= double_max : 0x1 +double_min <= float_min : 0x1 +double_min <= float_max : 0x1 +double_min == zero_min : 0x0 +double_min == zero_plus : 0x0 +double_min == zero : 0x0 +double_min == NaN : 0x0 +double_min == Inf_plus : 0x0 +double_min == Inf_min : 0x0 +double_min == Inf : 0x0 +double_min == long_max : 0x0 +double_min == long_min : 0x0 +double_min == int_max : 0x0 +double_min == int_min : 0x0 +double_min == uint_max : 0x0 +double_min == ulong_max : 0x0 +double_min == double_min : 0x1 +double_min == double_max : 0x0 +double_min == float_min : 0x0 +double_min == float_max : 0x0 +double_min != zero_min : 0x1 +double_min != zero_plus : 0x1 +double_min != zero : 0x1 +double_min != NaN : 0x1 +double_min != Inf_plus : 0x1 +double_min != Inf_min : 0x1 +double_min != Inf : 0x1 +double_min != long_max : 0x1 +double_min != long_min : 0x1 +double_min != int_max : 0x1 +double_min != int_min : 0x1 +double_min != uint_max : 0x1 +double_min != ulong_max : 0x1 +double_min != double_min : 0x0 +double_min != double_max : 0x1 +double_min != float_min : 0x1 +double_min != float_max : 0x1 +double_min * double_min * zero_min : 0x0 +double_min * double_min * zero_plus : 0x0 +double_min * double_min * zero : 0x0 +double_min * double_min * NaN : NaN +double_min * double_min * Inf_plus : Inf +double_min * double_min * Inf_min : -Inf +double_min * double_min * Inf : Inf +double_min * double_min * long_max : 0x.7fffffffe-503 +double_min * double_min * long_min : 0x.8e-503 +double_min * double_min * int_max : 0x.7fffffffe-503 +double_min * double_min * int_min : 0x.8e-503 +double_min * double_min * uint_max : 0x.0ffffffffe-502 +double_min * double_min * ulong_max : 0x.0ffffffffe-502 +double_min * double_min * double_min : 0x.4e-766 +double_min * double_min * double_max : 0x.0fffffffffffff8e-254 +double_min * double_min * float_min : 0x.4e-542 +double_min * double_min * float_max : 0x.0ffffffe-478 +double_max / zero_min : -Inf +double_max / zero_plus : Inf +double_max / zero : Inf +double_max / NaN : NaN +double_max / Inf_plus : 0x0 +double_max / Inf_min : 0x0 +double_max / Inf : 0x0 +double_max / long_max : 0x200000003fffff008e+232 +double_max / long_min : 0xe0000000000001e+235 +double_max / int_max : 0x200000003fffff008e+232 +double_max / int_min : 0xe0000000000001e+235 +double_max / uint_max : 0x100000000fffff8e+234 +double_max / ulong_max : 0x100000000fffff8e+234 +double_max / double_min : 0x3ffffffffffffee+498 +double_max / double_max : 0x1 +double_max / float_min : 0x3ffffffffffffee+274 +double_max / float_max : 0x1000001000000f8e+210 +double_max * zero_min : 0x0 +double_max * zero_plus : 0x0 +double_max * zero : 0x0 +double_max * NaN : NaN +double_max * Inf_plus : Inf +double_max * Inf_min : -Inf +double_max * Inf : Inf +double_max * long_max : 0x7ffffffefffffc00000008e+242 +double_max * long_min : 0x80000000000004e+250 +double_max * int_max : 0x7ffffffefffffc00000008e+242 +double_max * int_min : 0x80000000000004e+250 +double_max * uint_max : 0x0fffffffefffff800000008e+242 +double_max * ulong_max : 0x0fffffffefffff800000008e+242 +double_max * double_min : 0x3.ffffffffffffe +double_max * double_max : 0x0fffffffffffff00000000000004e+485 +double_max * float_min : 0x3ffffffffffffee+211 +double_max * float_max : 0x0fffffefffffff8000008e+268 +double_max + zero_min : 0x0fffffffffffff8e+242 +double_max + zero_plus : 0x0fffffffffffff8e+242 +double_max + zero : 0x0fffffffffffff8e+242 +double_max + NaN : NaN +double_max + Inf_plus : Inf +double_max + Inf_min : -Inf +double_max + Inf : Inf +double_max + long_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +double_max + long_min : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +double_max + int_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +double_max + int_min : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +double_max + uint_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +double_max + ulong_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +double_max + double_min : 0x0fffffffffffff8e+242 +double_max + double_max : 0x1fffffffffffffe+243 +double_max + float_min : 0x0fffffffffffff8e+242 +double_max + float_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +double_max - zero_min : 0x0fffffffffffff8e+242 +double_max - zero_plus : 0x0fffffffffffff8e+242 +double_max - zero : 0x0fffffffffffff8e+242 +double_max - NaN : NaN +double_max - Inf_plus : -Inf +double_max - Inf_min : Inf +double_max - Inf : -Inf +double_max - long_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff80000001 +double_max - long_min : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e+7 +double_max - int_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff80000001 +double_max - int_min : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000008e+7 +double_max - uint_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff00000001 +double_max - ulong_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff00000001 +double_max - double_min : 0x0fffffffffffff8e+242 +double_max - double_max : 0x0 +double_max - float_min : 0x0fffffffffffff8e+242 +double_max - float_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff000001e+26 +double_max > zero_min : 0x1 +double_max > zero_plus : 0x1 +double_max > zero : 0x1 +double_max > NaN : 0x0 +double_max > Inf_plus : 0x0 +double_max > Inf_min : 0x1 +double_max > Inf : 0x0 +double_max > long_max : 0x1 +double_max > long_min : 0x1 +double_max > int_max : 0x1 +double_max > int_min : 0x1 +double_max > uint_max : 0x1 +double_max > ulong_max : 0x1 +double_max > double_min : 0x1 +double_max > double_max : 0x0 +double_max > float_min : 0x1 +double_max > float_max : 0x1 +double_max < zero_min : 0x0 +double_max < zero_plus : 0x0 +double_max < zero : 0x0 +double_max < NaN : 0x0 +double_max < Inf_plus : 0x1 +double_max < Inf_min : 0x0 +double_max < Inf : 0x1 +double_max < long_max : 0x0 +double_max < long_min : 0x0 +double_max < int_max : 0x0 +double_max < int_min : 0x0 +double_max < uint_max : 0x0 +double_max < ulong_max : 0x0 +double_max < double_min : 0x0 +double_max < double_max : 0x0 +double_max < float_min : 0x0 +double_max < float_max : 0x0 +double_max >= zero_min : 0x1 +double_max >= zero_plus : 0x1 +double_max >= zero : 0x1 +double_max >= NaN : 0x0 +double_max >= Inf_plus : 0x0 +double_max >= Inf_min : 0x1 +double_max >= Inf : 0x0 +double_max >= long_max : 0x1 +double_max >= long_min : 0x1 +double_max >= int_max : 0x1 +double_max >= int_min : 0x1 +double_max >= uint_max : 0x1 +double_max >= ulong_max : 0x1 +double_max >= double_min : 0x1 +double_max >= double_max : 0x1 +double_max >= float_min : 0x1 +double_max >= float_max : 0x1 +double_max <= zero_min : 0x0 +double_max <= zero_plus : 0x0 +double_max <= zero : 0x0 +double_max <= NaN : 0x0 +double_max <= Inf_plus : 0x1 +double_max <= Inf_min : 0x0 +double_max <= Inf : 0x1 +double_max <= long_max : 0x0 +double_max <= long_min : 0x0 +double_max <= int_max : 0x0 +double_max <= int_min : 0x0 +double_max <= uint_max : 0x0 +double_max <= ulong_max : 0x0 +double_max <= double_min : 0x0 +double_max <= double_max : 0x1 +double_max <= float_min : 0x0 +double_max <= float_max : 0x0 +double_max == zero_min : 0x0 +double_max == zero_plus : 0x0 +double_max == zero : 0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : 0x0 +double_max * double_max * zero_plus : 0x0 +double_max * double_max * zero : 0x0 +double_max * double_max * NaN : NaN +double_max * double_max * Inf_plus : Inf +double_max * double_max * Inf_min : -Inf +double_max * double_max * Inf : Inf +double_max * double_max * long_max : 0x7ffffffefffff80000001000001fffffffce+485 +double_max * double_max * long_min : 0x80000000000007ffffffffffffee+493 +double_max * double_max * int_max : 0x7ffffffefffff80000001000001fffffffce+485 +double_max * double_max * int_min : 0x80000000000007ffffffffffffee+493 +double_max * double_max * uint_max : 0x0fffffffefffff00000001000003fffffffce+485 +double_max * double_max * ulong_max : 0x0fffffffefffff00000001000003fffffffce+485 +double_max * double_max * double_min : 0x3ffffffffffffc0000000000001e+230 +double_max * double_max * double_max : 0x0ffffffffffffe8000000000000bffffffffffffee+728 +double_max * double_max * float_min : 0x3ffffffffffffc0000000000001e+454 +double_max * double_max * float_max : 0x0fffffefffffff00000100000003fffffce+511 +float_min / zero_min : -Inf +float_min / zero_plus : Inf +float_min / zero : Inf +float_min / NaN : NaN +float_min / Inf_plus : 0x0 +float_min / Inf_min : 0x0 +float_min / Inf : 0x0 +float_min / long_max : 0x.08000000100000002e-38 +float_min / long_min : 0x.8e-39 +float_min / int_max : 0x.08000000100000002e-38 +float_min / int_min : 0x.8e-39 +float_min / uint_max : 0x.400000004e-39 +float_min / ulong_max : 0x.400000004e-39 +float_min / double_min : 0x1e+224 +float_min / double_max : 0x.40000000000002e-287 +float_min / float_min : 0x1 +float_min / float_max : 0x.4000004000004e-63 +float_min * zero_min : 0x0 +float_min * zero_plus : 0x0 +float_min * zero : 0x0 +float_min * NaN : NaN +float_min * Inf_plus : Inf +float_min * Inf_min : -Inf +float_min * Inf : Inf +float_min * long_max : 0x.1fffffffce-23 +float_min * long_min : 0x.ee-23 +float_min * int_max : 0x.1fffffffce-23 +float_min * int_min : 0x.ee-23 +float_min * uint_max : 0x.3fffffffce-23 +float_min * ulong_max : 0x.3fffffffce-23 +float_min * double_min : 0x.1e-286 +float_min * double_max : 0x3ffffffffffffee+211 +float_min * float_min : 0x.1e-62 +float_min * float_max : 0x3.fffffc +float_min + zero_min : 0x.4e-31 +float_min + zero_plus : 0x.4e-31 +float_min + zero : 0x.4e-31 +float_min + NaN : NaN +float_min + Inf_plus : Inf +float_min + Inf_min : -Inf +float_min + Inf : Inf +float_min + long_max : 0x7fffffff.00000000000000000000000000000004 +float_min + long_min : 0x80000000.00000000000000000000000000000004 +float_min + int_max : 0x7fffffff.00000000000000000000000000000004 +float_min + int_min : 0x80000000.00000000000000000000000000000004 +float_min + uint_max : 0x0ffffffff.00000000000000000000000000000004 +float_min + ulong_max : 0x0ffffffff.00000000000000000000000000000004 +float_min + double_min : 0x.400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +float_min + double_max : 0x0fffffffffffff8e+242 +float_min + float_min : 0x.08e-30 +float_min + float_max : 0x0ffffff00000000000000000000000000.00000000000000000000000000000004 +float_min - zero_min : 0x.4e-31 +float_min - zero_plus : 0x.4e-31 +float_min - zero : 0x.4e-31 +float_min - NaN : NaN +float_min - Inf_plus : -Inf +float_min - Inf_min : Inf +float_min - Inf : -Inf +float_min - long_max : 0x80000001.00000000000000000000000000000004 +float_min - long_min : 0x080000000.00000000000000000000000000000004 +float_min - int_max : 0x80000001.00000000000000000000000000000004 +float_min - int_min : 0x080000000.00000000000000000000000000000004 +float_min - uint_max : 0xf00000001.00000000000000000000000000000004 +float_min - ulong_max : 0xf00000001.00000000000000000000000000000004 +float_min - double_min : 0x.3fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffce-31 +float_min - double_max : 0xf00000000000008e+242 +float_min - float_min : 0x0 +float_min - float_max : 0xf00000100000000000000000000000000.00000000000000000000000000000004 +float_min > zero_min : 0x1 +float_min > zero_plus : 0x1 +float_min > zero : 0x1 +float_min > NaN : 0x0 +float_min > Inf_plus : 0x0 +float_min > Inf_min : 0x1 +float_min > Inf : 0x0 +float_min > long_max : 0x0 +float_min > long_min : 0x1 +float_min > int_max : 0x0 +float_min > int_min : 0x1 +float_min > uint_max : 0x0 +float_min > ulong_max : 0x0 +float_min > double_min : 0x1 +float_min > double_max : 0x0 +float_min > float_min : 0x0 +float_min > float_max : 0x0 +float_min < zero_min : 0x0 +float_min < zero_plus : 0x0 +float_min < zero : 0x0 +float_min < NaN : 0x0 +float_min < Inf_plus : 0x1 +float_min < Inf_min : 0x0 +float_min < Inf : 0x1 +float_min < long_max : 0x1 +float_min < long_min : 0x0 +float_min < int_max : 0x1 +float_min < int_min : 0x0 +float_min < uint_max : 0x1 +float_min < ulong_max : 0x1 +float_min < double_min : 0x0 +float_min < double_max : 0x1 +float_min < float_min : 0x0 +float_min < float_max : 0x1 +float_min >= zero_min : 0x1 +float_min >= zero_plus : 0x1 +float_min >= zero : 0x1 +float_min >= NaN : 0x0 +float_min >= Inf_plus : 0x0 +float_min >= Inf_min : 0x1 +float_min >= Inf : 0x0 +float_min >= long_max : 0x0 +float_min >= long_min : 0x1 +float_min >= int_max : 0x0 +float_min >= int_min : 0x1 +float_min >= uint_max : 0x0 +float_min >= ulong_max : 0x0 +float_min >= double_min : 0x1 +float_min >= double_max : 0x0 +float_min >= float_min : 0x1 +float_min >= float_max : 0x0 +float_min <= zero_min : 0x0 +float_min <= zero_plus : 0x0 +float_min <= zero : 0x0 +float_min <= NaN : 0x0 +float_min <= Inf_plus : 0x1 +float_min <= Inf_min : 0x0 +float_min <= Inf : 0x1 +float_min <= long_max : 0x1 +float_min <= long_min : 0x0 +float_min <= int_max : 0x1 +float_min <= int_min : 0x0 +float_min <= uint_max : 0x1 +float_min <= ulong_max : 0x1 +float_min <= double_min : 0x0 +float_min <= double_max : 0x1 +float_min <= float_min : 0x1 +float_min <= float_max : 0x1 +float_min == zero_min : 0x0 +float_min == zero_plus : 0x0 +float_min == zero : 0x0 +float_min == NaN : 0x0 +float_min == Inf_plus : 0x0 +float_min == Inf_min : 0x0 +float_min == Inf : 0x0 +float_min == long_max : 0x0 +float_min == long_min : 0x0 +float_min == int_max : 0x0 +float_min == int_min : 0x0 +float_min == uint_max : 0x0 +float_min == ulong_max : 0x0 +float_min == double_min : 0x0 +float_min == double_max : 0x0 +float_min == float_min : 0x1 +float_min == float_max : 0x0 +float_min != zero_min : 0x1 +float_min != zero_plus : 0x1 +float_min != zero : 0x1 +float_min != NaN : 0x1 +float_min != Inf_plus : 0x1 +float_min != Inf_min : 0x1 +float_min != Inf : 0x1 +float_min != long_max : 0x1 +float_min != long_min : 0x1 +float_min != int_max : 0x1 +float_min != int_min : 0x1 +float_min != uint_max : 0x1 +float_min != ulong_max : 0x1 +float_min != double_min : 0x1 +float_min != double_max : 0x1 +float_min != float_min : 0x0 +float_min != float_max : 0x1 +float_min * float_min * zero_min : 0x0 +float_min * float_min * zero_plus : 0x0 +float_min * float_min * zero : 0x0 +float_min * float_min * NaN : NaN +float_min * float_min * Inf_plus : Inf +float_min * float_min * Inf_min : -Inf +float_min * float_min * Inf : Inf +float_min * float_min * long_max : 0x.7fffffffe-55 +float_min * float_min * long_min : 0x.8e-55 +float_min * float_min * int_max : 0x.7fffffffe-55 +float_min * float_min * int_min : 0x.8e-55 +float_min * float_min * uint_max : 0x.0ffffffffe-54 +float_min * float_min * ulong_max : 0x.0ffffffffe-54 +float_min * float_min * double_min : 0x.4e-318 +float_min * float_min * double_max : 0x0fffffffffffff8e+179 +float_min * float_min * float_min : 0x.4e-94 +float_min * float_min * float_max : 0x.0ffffffe-30 +float_max / zero_min : -Inf +float_max / zero_plus : Inf +float_max / zero : Inf +float_max / NaN : NaN +float_max / Inf_plus : 0x0 +float_max / Inf_min : 0x0 +float_max / Inf : 0x0 +float_max / long_max : 0x1fffffe03fffffc08e+8 +float_max / long_min : 0xe000002e+18 +float_max / int_max : 0x1fffffe03fffffc08e+8 +float_max / int_min : 0xe000002e+18 +float_max / uint_max : 0x0ffffff00ffffffe+10 +float_max / ulong_max : 0x0ffffff00ffffffe+10 +float_max / double_min : 0x3fffffce+281 +float_max / double_max : 0x.0ffffff00000008e-223 +float_max / float_min : 0x3fffffce+57 +float_max / float_max : 0x1 +float_max * zero_min : 0x0 +float_max * zero_plus : 0x0 +float_max * zero : 0x0 +float_max * NaN : NaN +float_max * Inf_plus : Inf +float_max * Inf_min : -Inf +float_max * Inf : Inf +float_max * long_max : 0x7fffff7f000001e+26 +float_max * long_min : 0x8000008e+33 +float_max * int_max : 0x7fffff7f000001e+26 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeff000001e+26 +float_max * ulong_max : 0x0fffffeff000001e+26 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : 0x0fffffefffffff8000008e+268 +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffff0000000000000000007fffffff +float_max + long_min : 0x0fffffeffffffffffffffffff8e+7 +float_max + int_max : 0x0ffffff0000000000000000007fffffff +float_max + int_min : 0x0fffffeffffffffffffffffff8e+7 +float_max + uint_max : 0x0ffffff000000000000000000ffffffff +float_max + ulong_max : 0x0ffffff000000000000000000ffffffff +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max + float_min : 0x0ffffff00000000000000000000000000.00000000000000000000000000000004 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0fffffeffffffffffffffffff80000001 +float_max - long_min : 0x0ffffff0000000000000000008e+7 +float_max - int_max : 0x0fffffeffffffffffffffffff80000001 +float_max - int_min : 0x0ffffff0000000000000000008e+7 +float_max - uint_max : 0x0fffffeffffffffffffffffff00000001 +float_max - ulong_max : 0x0fffffeffffffffffffffffff00000001 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max - float_min : 0x0fffffeffffffffffffffffffffffffff.fffffffffffffffffffffffffffffffc +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7ffffeff000081ffffffe+52 +float_max * float_max * long_min : 0x800000ffffff8e+59 +float_max * float_max * int_max : 0x7ffffeff000081ffffffe+52 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff000101ffffffe+52 +float_max * float_max * ulong_max : 0x0fffffdff000101ffffffe+52 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : 0x0fffffe000000f800000ffffff8e+294 +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000002ffffffe+78 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x07fffffff +long_min : 0x080000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0x7fffffff +long_min : 0x80000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.bsd64 b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.bsd64 new file mode 100644 index 000000000..29e2d7b07 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.bsd64 @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffffffffffff +zero_min + long_min : 0x8e+15 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffffffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x8000000000000001 +zero_min - long_min : 0x08e+15 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf0000000000000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffffffffffff +zero_plus + long_min : 0x8e+15 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffffffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x8000000000000001 +zero_plus - long_min : 0x08e+15 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf0000000000000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffffffffffff +zero + long_min : 0x8e+15 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffffffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x8000000000000001 +zero - long_min : 0x08e+15 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf0000000000000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.0000000000000002 +long_max / int_max : 0x100000002.00000002 +long_max / int_min : 0xf00000000.00000002 +long_max / uint_max : 0x080000000.7fffffff +long_max / ulong_max : 0x.7fffffffffffffff +long_max / double_min : 0x1fffffffffffffffce+255 +long_max / double_max : 0x.080000000000003ffe-239 +long_max / float_min : 0x1fffffffffffffffce+31 +long_max / float_max : 0x.08000008000007fffe-15 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffffffffffff0000000000000001 +long_max * long_min : 0xc0000000000000008e+15 +long_max * int_max : 0x3fffffff7fffffff80000001 +long_max * int_min : 0xc0000000000000008e+7 +long_max * uint_max : 0x7fffffff7fffffff00000001 +long_max * ulong_max : 0x7ffffffffffffffe8000000000000001 +long_max * double_min : 0x.1fffffffffffffffce-239 +long_max * double_max : 0x7ffffffffffffbff00000000000008e+242 +long_max * float_min : 0x.1fffffffffffffffce-15 +long_max * float_max : 0x7fffff7fffffffff000001e+26 +long_max + zero_min : 0x7fffffffffffffff +long_max + zero_plus : 0x7fffffffffffffff +long_max + zero : 0x7fffffffffffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffffffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0800000007ffffffe +long_max + int_min : 0x7fffffff7fffffff +long_max + uint_max : 0x080000000fffffffe +long_max + ulong_max : 0x17ffffffffffffffe +long_max + double_min : 0x7fffffffffffffff +long_max + double_max : 0x0fffffffffffff800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffffffffffff +long_max + float_min : 0x7fffffffffffffff.00000000000000000000000000000004 +long_max + float_max : 0x0ffffff00000000007fffffffffffffff +long_max - zero_min : 0x7fffffffffffffff +long_max - zero_plus : 0x7fffffffffffffff +long_max - zero : 0x7fffffffffffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffffffffffff +long_max - int_max : 0x7fffffff8e+7 +long_max - int_min : 0x0800000007fffffff +long_max - uint_max : 0x7fffffffe+8 +long_max - ulong_max : 0x8e+15 +long_max - double_min : 0x7fffffffffffffff +long_max - double_max : 0xf0000000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffffffffffff +long_max - float_min : 0x7ffffffffffffffe.fffffffffffffffffffffffffffffffc +long_max - float_max : 0xf00000100000000007fffffffffffffff +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x1 +long_max > int_min : 0x1 +long_max > uint_max : 0x1 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x0 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x1 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x0 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x0 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x0 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x1 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffffffffffff40000000000000017fffffffffffffff +long_max * long_max * long_min : 0xe0000000000000007fffffffffffffff8e+15 +long_max * long_max * int_max : 0x1fffffffbfffffff80000001000000007fffffff +long_max * long_max * int_min : 0xe0000000000000007fffffffffffffff8e+7 +long_max * long_max * uint_max : 0x3fffffffbfffffff0000000100000000ffffffff +long_max * long_max * ulong_max : 0x3ffffffffffffffec000000000000001ffffffffffffffff +long_max * long_max * double_min : 0x.0fffffffffffffffc0000000000000004e-223 +long_max * long_max * double_max : 0x3ffffffffffffdff0000000000000800fffffffffffff8e+242 +long_max * long_max * float_min : 0x0.fffffffffffffffc0000000000000004 +long_max * long_max * float_max : 0x3fffffbfffffffff0000010000000000ffffffe+26 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffffffffffe +long_min / long_min : 0x1 +long_min / int_max : 0xefffffffd.fffffffc +long_min / int_min : 0x1e+8 +long_min / uint_max : 0xf7fffffff.8 +long_min / ulong_max : 0x.8 +long_min / double_min : 0xee+271 +long_min / double_max : 0x.f7ffffffffffffce-239 +long_min / float_min : 0xee+47 +long_min / float_max : 0x.f7fffff7fffff8e-15 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc0000000000000008e+15 +long_min * long_min : 0x4e+31 +long_min * int_max : 0xc00000008e+15 +long_min * int_min : 0x4e+23 +long_min * uint_max : 0x800000008e+15 +long_min * ulong_max : 0x80000000000000008e+15 +long_min * double_min : 0x.ee-239 +long_min * double_max : 0x80000000000004e+258 +long_min * float_min : 0x.ee-15 +long_min * float_max : 0x8000008e+41 +long_min + zero_min : 0x8e+15 +long_min + zero_plus : 0x8e+15 +long_min + zero : 0x8e+15 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+16 +long_min + int_max : 0x800000007fffffff +long_min + int_min : 0xf7fffffff8e+7 +long_min + uint_max : 0x80000000ffffffff +long_min + ulong_max : 0x7fffffffffffffff +long_min + double_min : 0x8e+15 +long_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+15 +long_min + float_min : 0x8000000000000000.00000000000000000000000000000004 +long_min + float_max : 0x0fffffeffffffffff8e+15 +long_min - zero_min : 0x8e+15 +long_min - zero_plus : 0x8e+15 +long_min - zero : 0x8e+15 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf0000000000000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf7fffffff80000001 +long_min - int_min : 0x800000008e+7 +long_min - uint_max : 0xf7fffffff00000001 +long_min - ulong_max : 0xe8000000000000001 +long_min - double_min : 0x8e+15 +long_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+15 +long_min - float_min : 0xf7fffffffffffffff.fffffffffffffffffffffffffffffffc +long_min - float_max : 0xf000000ffffffffff8e+15 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x1 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x0 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x0 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x1 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffffffffffce+31 +long_min * long_min * long_min : 0xee+47 +long_min * long_min * int_max : 0x1fffffffce+31 +long_min * long_min * int_min : 0xee+39 +long_min * long_min * uint_max : 0x3fffffffce+31 +long_min * long_min * ulong_max : 0x3fffffffffffffffce+31 +long_min * long_min * double_min : 0x.1e-223 +long_min * long_min * double_max : 0x3ffffffffffffee+274 +long_min * long_min * float_min : 0x1 +long_min * long_min * float_max : 0x3fffffce+57 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x.0fffffffe00000001e-7 +int_max / long_min : 0x.f00000002e-7 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff7fffffff +int_max / ulong_max : 0x.7fffffffe-8 +int_max / double_min : 0x1fffffffce+255 +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00007fe-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff7fffffff80000001 +int_max * long_min : 0xc00000008e+15 +int_max * int_max : 0x3fffffff00000001 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe80000001 +int_max * ulong_max : 0x7ffffffeffffffff80000001 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : 0x7ffffffefffffc00000008e+242 +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7f000001e+26 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0800000007ffffffe +int_max + long_min : 0x800000007fffffff +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x1000000007ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max + float_min : 0x7fffffff.00000000000000000000000000000004 +int_max + float_max : 0x0ffffff0000000000000000007fffffff +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x800000008e+7 +int_max - long_min : 0x0800000007fffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0xf000000008e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max - float_min : 0x7ffffffe.fffffffffffffffffffffffffffffffc +int_max - float_max : 0xf0000010000000000000000007fffffff +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x1 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x0 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x0 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x1 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff8000000040000000ffffffff +int_max * int_max * long_min : 0xe00000007fffffff8e+15 +int_max * int_max * int_max : 0x1fffffff400000017fffffff +int_max * int_max * int_min : 0xe00000007fffffff8e+7 +int_max * int_max * uint_max : 0x3ffffffec0000001ffffffff +int_max * int_max * ulong_max : 0x3fffffff00000000c0000000ffffffff +int_max * int_max * double_min : 0x.0fffffffc00000004e-239 +int_max * int_max * double_max : 0x3ffffffefffffe01000007fffffff8e+242 +int_max * int_max * float_min : 0x.0fffffffc00000004e-15 +int_max * int_max * float_max : 0x3fffffbf00000100ffffffe+26 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0x.efffffffffffffffee-7 +int_min / long_min : 0x.1e-7 +int_min / int_max : 0xe.fffffffdfffffffc +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0x.8e-8 +int_min / double_min : 0xee+263 +int_min / double_max : 0x.f7ffffffffffffce-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc0000000000000008e+7 +int_min * long_min : 0x4e+23 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x80000000000000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : 0x80000000000004e+250 +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0x7fffffff7fffffff +int_min + long_min : 0xf7fffffff8e+7 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x0ffffffff7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min + float_min : 0x80000000.00000000000000000000000000000004 +int_min + float_max : 0x0fffffeffffffffffffffffff8e+7 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf7fffffff80000001 +int_min - long_min : 0x7fffffff8e+7 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xeffffffff80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min - float_min : 0xf7fffffff.fffffffffffffffffffffffffffffffc +int_min - float_max : 0xf000000ffffffffffffffffff8e+7 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x1 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x0 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x0 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x1 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffffffffffce+15 +int_min * int_min * long_min : 0xee+31 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffffffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : 0x3ffffffffffffee+258 +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x.1fffffffe00000002e-7 +uint_max / long_min : 0x.e00000002e-7 +uint_max / int_max : 0x2.0000000200000004 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x.0ffffffffe-7 +uint_max / double_min : 0x3fffffffce+255 +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0000ffe-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7fffffff7fffffff00000001 +uint_max * long_min : 0x800000008e+15 +uint_max * int_max : 0x7ffffffe80000001 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffe00000001 +uint_max * ulong_max : 0x0fffffffeffffffff00000001 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : 0x0fffffffefffff800000008e+242 +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeff000001e+26 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x080000000fffffffe +uint_max + long_min : 0x80000000ffffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x100000000fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max + float_min : 0x0ffffffff.00000000000000000000000000000004 +uint_max + float_max : 0x0ffffff000000000000000000ffffffff +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x80000001e+8 +uint_max - long_min : 0x080000000ffffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0xf00000001e+8 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max - float_min : 0x0fffffffe.fffffffffffffffffffffffffffffffc +uint_max - float_max : 0xf000001000000000000000000ffffffff +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x0 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x1 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x1 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x0 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x0 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x1 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x0 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x1 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffeffffffff80000001ffffffff +uint_max * uint_max * long_min : 0x80000000ffffffff8e+15 +uint_max * uint_max * int_max : 0x7ffffffe000000027fffffff +uint_max * uint_max * int_min : 0x80000000ffffffff8e+7 +uint_max * uint_max * uint_max : 0x0fffffffd00000002ffffffff +uint_max * uint_max * ulong_max : 0x0fffffffe0000000000000001ffffffff +uint_max * uint_max * double_min : 0x.3fffffff800000004e-239 +uint_max * uint_max * double_max : 0x0fffffffdfffff80100000ffffffff8e+242 +uint_max * uint_max * float_min : 0x.3fffffff800000004e-15 +uint_max * uint_max * float_max : 0x0fffffefe00000200ffffffe+26 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.0000000000000002 +ulong_max / long_min : 0xe.0000000000000002 +ulong_max / int_max : 0x200000004.00000008 +ulong_max / int_min : 0xe00000000.00000002 +ulong_max / uint_max : 0x100000001 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : 0x3fffffffffffffffce+255 +ulong_max / double_max : 0x.100000000000008e-239 +ulong_max / float_min : 0x3fffffffffffffffce+31 +ulong_max / float_max : 0x.1000001000001e-15 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffffffffffe8000000000000001 +ulong_max * long_min : 0x80000000000000008e+15 +ulong_max * int_max : 0x7ffffffeffffffff80000001 +ulong_max * int_min : 0x80000000000000008e+7 +ulong_max * uint_max : 0x0fffffffeffffffff00000001 +ulong_max * ulong_max : 0x0fffffffffffffffe0000000000000001 +ulong_max * double_min : 0x.3fffffffffffffffce-239 +ulong_max * double_max : 0x0fffffffffffff7ff00000000000008e+242 +ulong_max * float_min : 0x.3fffffffffffffffce-15 +ulong_max * float_max : 0x0fffffeffffffffff000001e+26 +ulong_max + zero_min : 0x0ffffffffffffffff +ulong_max + zero_plus : 0x0ffffffffffffffff +ulong_max + zero : 0x0ffffffffffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffffffffffe +ulong_max + long_min : 0x7fffffffffffffff +ulong_max + int_max : 0x1000000007ffffffe +ulong_max + int_min : 0x0ffffffff7fffffff +ulong_max + uint_max : 0x100000000fffffffe +ulong_max + ulong_max : 0x1fffffffffffffffe +ulong_max + double_min : 0x0ffffffffffffffff +ulong_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffffffffffff +ulong_max + float_min : 0x0ffffffffffffffff.00000000000000000000000000000004 +ulong_max + float_max : 0x0ffffff0000000000ffffffffffffffff +ulong_max - zero_min : 0x0ffffffffffffffff +ulong_max - zero_plus : 0x0ffffffffffffffff +ulong_max - zero : 0x0ffffffffffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+15 +ulong_max - long_min : 0x17fffffffffffffff +ulong_max - int_max : 0x0ffffffff8e+7 +ulong_max - int_min : 0x1000000007fffffff +ulong_max - uint_max : 0x0ffffffffe+8 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffffffffffff +ulong_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffffffffffff +ulong_max - float_min : 0x0fffffffffffffffe.fffffffffffffffffffffffffffffffc +ulong_max - float_max : 0xf0000010000000000ffffffffffffffff +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x1 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x0 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x0 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x1 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffffffffffe00000000000000027fffffffffffffff +ulong_max * ulong_max * long_min : 0x8000000000000000ffffffffffffffff8e+15 +ulong_max * ulong_max * int_max : 0x7ffffffeffffffff00000002000000007fffffff +ulong_max * ulong_max * int_min : 0x8000000000000000ffffffffffffffff8e+7 +ulong_max * ulong_max * uint_max : 0x0fffffffefffffffe0000000200000000ffffffff +ulong_max * ulong_max * ulong_max : 0x0fffffffffffffffd0000000000000002ffffffffffffffff +ulong_max * ulong_max * double_min : 0x.3fffffffffffffff80000000000000004e-223 +ulong_max * ulong_max * double_max : 0x0fffffffffffff7fe0000000000001000fffffffffffff8e+242 +ulong_max * ulong_max * float_min : 0x3.fffffffffffffff80000000000000004 +ulong_max * ulong_max * float_max : 0x0fffffefffffffffe0000020000000000ffffffe+26 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.08000000000000001e-270 +double_min / long_min : 0x.8e-271 +double_min / int_max : 0x.08000000100000002e-262 +double_min / int_min : 0x.8e-263 +double_min / uint_max : 0x.400000004e-263 +double_min / ulong_max : 0x.4e-271 +double_min / double_min : 0x1 +double_min / double_max : 0x.40000000000002e-511 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x.4000004000004e-287 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffffffffffce-239 +double_min * long_min : 0x.ee-239 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffffffffffce-239 +double_min * double_min : 0x.1e-510 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x.1e-286 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffffffffffff +double_min + long_min : 0x8e+15 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffffffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x8000000000000001 +double_min - long_min : 0x08e+15 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf0000000000000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 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0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : 0x0 +double_max * double_max * zero_plus : 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+float_max * long_min : 0x8000008e+41 +float_max * int_max : 0x7fffff7f000001e+26 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeff000001e+26 +float_max * ulong_max : 0x0fffffeffffffffff000001e+26 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : 0x0fffffefffffff8000008e+268 +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffff00000000007fffffffffffffff +float_max + long_min : 0x0fffffeffffffffff8e+15 +float_max + int_max : 0x0ffffff0000000000000000007fffffff +float_max + int_min : 0x0fffffeffffffffffffffffff8e+7 +float_max + uint_max : 0x0ffffff000000000000000000ffffffff +float_max + ulong_max : 0x0ffffff0000000000ffffffffffffffff +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max + float_min : 0x0ffffff00000000000000000000000000.00000000000000000000000000000004 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0fffffeffffffffff8000000000000001 +float_max - long_min : 0x0ffffff00000000008e+15 +float_max - int_max : 0x0fffffeffffffffffffffffff80000001 +float_max - int_min : 0x0ffffff0000000000000000008e+7 +float_max - uint_max : 0x0fffffeffffffffffffffffff00000001 +float_max - ulong_max : 0x0fffffeffffffffff0000000000000001 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max - float_min : 0x0fffffeffffffffffffffffffffffffff.fffffffffffffffffffffffffffffffc +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7fffff0000007fff000001ffffffe+52 +float_max * float_max * long_min : 0x800000ffffff8e+67 +float_max * float_max * int_max : 0x7ffffeff000081ffffffe+52 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff000101ffffffe+52 +float_max * float_max * ulong_max : 0x0fffffe000000ffff000001ffffffe+52 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : 0x0fffffe000000f800000ffffff8e+294 +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000002ffffffe+78 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.linux64 b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.linux64 new file mode 100644 index 000000000..29e2d7b07 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.linux64 @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffffffffffff +zero_min + long_min : 0x8e+15 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffffffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x8000000000000001 +zero_min - long_min : 0x08e+15 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf0000000000000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffffffffffff +zero_plus + long_min : 0x8e+15 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffffffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x8000000000000001 +zero_plus - long_min : 0x08e+15 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf0000000000000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffffffffffff +zero + long_min : 0x8e+15 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffffffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x8000000000000001 +zero - long_min : 0x08e+15 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf0000000000000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.0000000000000002 +long_max / int_max : 0x100000002.00000002 +long_max / int_min : 0xf00000000.00000002 +long_max / uint_max : 0x080000000.7fffffff +long_max / ulong_max : 0x.7fffffffffffffff +long_max / double_min : 0x1fffffffffffffffce+255 +long_max / double_max : 0x.080000000000003ffe-239 +long_max / float_min : 0x1fffffffffffffffce+31 +long_max / float_max : 0x.08000008000007fffe-15 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffffffffffff0000000000000001 +long_max * long_min : 0xc0000000000000008e+15 +long_max * int_max : 0x3fffffff7fffffff80000001 +long_max * int_min : 0xc0000000000000008e+7 +long_max * uint_max : 0x7fffffff7fffffff00000001 +long_max * ulong_max : 0x7ffffffffffffffe8000000000000001 +long_max * double_min : 0x.1fffffffffffffffce-239 +long_max * double_max : 0x7ffffffffffffbff00000000000008e+242 +long_max * float_min : 0x.1fffffffffffffffce-15 +long_max * float_max : 0x7fffff7fffffffff000001e+26 +long_max + zero_min : 0x7fffffffffffffff +long_max + zero_plus : 0x7fffffffffffffff +long_max + zero : 0x7fffffffffffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffffffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0800000007ffffffe +long_max + int_min : 0x7fffffff7fffffff +long_max + uint_max : 0x080000000fffffffe +long_max + ulong_max : 0x17ffffffffffffffe +long_max + double_min : 0x7fffffffffffffff +long_max + double_max : 0x0fffffffffffff800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffffffffffff +long_max + float_min : 0x7fffffffffffffff.00000000000000000000000000000004 +long_max + float_max : 0x0ffffff00000000007fffffffffffffff +long_max - zero_min : 0x7fffffffffffffff +long_max - zero_plus : 0x7fffffffffffffff +long_max - zero : 0x7fffffffffffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffffffffffff +long_max - int_max : 0x7fffffff8e+7 +long_max - int_min : 0x0800000007fffffff +long_max - uint_max : 0x7fffffffe+8 +long_max - ulong_max : 0x8e+15 +long_max - double_min : 0x7fffffffffffffff +long_max - double_max : 0xf0000000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffffffffffff +long_max - float_min : 0x7ffffffffffffffe.fffffffffffffffffffffffffffffffc +long_max - float_max : 0xf00000100000000007fffffffffffffff +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x1 +long_max > int_min : 0x1 +long_max > uint_max : 0x1 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x0 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x1 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x0 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x0 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x0 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x1 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffffffffffff40000000000000017fffffffffffffff +long_max * long_max * long_min : 0xe0000000000000007fffffffffffffff8e+15 +long_max * long_max * int_max : 0x1fffffffbfffffff80000001000000007fffffff +long_max * long_max * int_min : 0xe0000000000000007fffffffffffffff8e+7 +long_max * long_max * uint_max : 0x3fffffffbfffffff0000000100000000ffffffff +long_max * long_max * ulong_max : 0x3ffffffffffffffec000000000000001ffffffffffffffff +long_max * long_max * double_min : 0x.0fffffffffffffffc0000000000000004e-223 +long_max * long_max * double_max : 0x3ffffffffffffdff0000000000000800fffffffffffff8e+242 +long_max * long_max * float_min : 0x0.fffffffffffffffc0000000000000004 +long_max * long_max * float_max : 0x3fffffbfffffffff0000010000000000ffffffe+26 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffffffffffe +long_min / long_min : 0x1 +long_min / int_max : 0xefffffffd.fffffffc +long_min / int_min : 0x1e+8 +long_min / uint_max : 0xf7fffffff.8 +long_min / ulong_max : 0x.8 +long_min / double_min : 0xee+271 +long_min / double_max : 0x.f7ffffffffffffce-239 +long_min / float_min : 0xee+47 +long_min / float_max : 0x.f7fffff7fffff8e-15 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc0000000000000008e+15 +long_min * long_min : 0x4e+31 +long_min * int_max : 0xc00000008e+15 +long_min * int_min : 0x4e+23 +long_min * uint_max : 0x800000008e+15 +long_min * ulong_max : 0x80000000000000008e+15 +long_min * double_min : 0x.ee-239 +long_min * double_max : 0x80000000000004e+258 +long_min * float_min : 0x.ee-15 +long_min * float_max : 0x8000008e+41 +long_min + zero_min : 0x8e+15 +long_min + zero_plus : 0x8e+15 +long_min + zero : 0x8e+15 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+16 +long_min + int_max : 0x800000007fffffff +long_min + int_min : 0xf7fffffff8e+7 +long_min + uint_max : 0x80000000ffffffff +long_min + ulong_max : 0x7fffffffffffffff +long_min + double_min : 0x8e+15 +long_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+15 +long_min + float_min : 0x8000000000000000.00000000000000000000000000000004 +long_min + float_max : 0x0fffffeffffffffff8e+15 +long_min - zero_min : 0x8e+15 +long_min - zero_plus : 0x8e+15 +long_min - zero : 0x8e+15 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf0000000000000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf7fffffff80000001 +long_min - int_min : 0x800000008e+7 +long_min - uint_max : 0xf7fffffff00000001 +long_min - ulong_max : 0xe8000000000000001 +long_min - double_min : 0x8e+15 +long_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+15 +long_min - float_min : 0xf7fffffffffffffff.fffffffffffffffffffffffffffffffc +long_min - float_max : 0xf000000ffffffffff8e+15 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x1 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x0 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x0 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x1 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffffffffffce+31 +long_min * long_min * long_min : 0xee+47 +long_min * long_min * int_max : 0x1fffffffce+31 +long_min * long_min * int_min : 0xee+39 +long_min * long_min * uint_max : 0x3fffffffce+31 +long_min * long_min * ulong_max : 0x3fffffffffffffffce+31 +long_min * long_min * double_min : 0x.1e-223 +long_min * long_min * double_max : 0x3ffffffffffffee+274 +long_min * long_min * float_min : 0x1 +long_min * long_min * float_max : 0x3fffffce+57 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x.0fffffffe00000001e-7 +int_max / long_min : 0x.f00000002e-7 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff7fffffff +int_max / ulong_max : 0x.7fffffffe-8 +int_max / double_min : 0x1fffffffce+255 +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00007fe-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff7fffffff80000001 +int_max * long_min : 0xc00000008e+15 +int_max * int_max : 0x3fffffff00000001 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe80000001 +int_max * ulong_max : 0x7ffffffeffffffff80000001 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : 0x7ffffffefffffc00000008e+242 +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7f000001e+26 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0800000007ffffffe +int_max + long_min : 0x800000007fffffff +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x1000000007ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max + float_min : 0x7fffffff.00000000000000000000000000000004 +int_max + float_max : 0x0ffffff0000000000000000007fffffff +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x800000008e+7 +int_max - long_min : 0x0800000007fffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0xf000000008e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max - float_min : 0x7ffffffe.fffffffffffffffffffffffffffffffc +int_max - float_max : 0xf0000010000000000000000007fffffff +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x1 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x0 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x0 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x1 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff8000000040000000ffffffff +int_max * int_max * long_min : 0xe00000007fffffff8e+15 +int_max * int_max * int_max : 0x1fffffff400000017fffffff +int_max * int_max * int_min : 0xe00000007fffffff8e+7 +int_max * int_max * uint_max : 0x3ffffffec0000001ffffffff +int_max * int_max * ulong_max : 0x3fffffff00000000c0000000ffffffff +int_max * int_max * double_min : 0x.0fffffffc00000004e-239 +int_max * int_max * double_max : 0x3ffffffefffffe01000007fffffff8e+242 +int_max * int_max * float_min : 0x.0fffffffc00000004e-15 +int_max * int_max * float_max : 0x3fffffbf00000100ffffffe+26 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0x.efffffffffffffffee-7 +int_min / long_min : 0x.1e-7 +int_min / int_max : 0xe.fffffffdfffffffc +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0x.8e-8 +int_min / double_min : 0xee+263 +int_min / double_max : 0x.f7ffffffffffffce-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc0000000000000008e+7 +int_min * long_min : 0x4e+23 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x80000000000000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : 0x80000000000004e+250 +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0x7fffffff7fffffff +int_min + long_min : 0xf7fffffff8e+7 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x0ffffffff7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min + float_min : 0x80000000.00000000000000000000000000000004 +int_min + float_max : 0x0fffffeffffffffffffffffff8e+7 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf7fffffff80000001 +int_min - long_min : 0x7fffffff8e+7 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xeffffffff80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min - float_min : 0xf7fffffff.fffffffffffffffffffffffffffffffc +int_min - float_max : 0xf000000ffffffffffffffffff8e+7 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x1 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x0 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x0 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x1 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffffffffffce+15 +int_min * int_min * long_min : 0xee+31 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffffffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : 0x3ffffffffffffee+258 +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x.1fffffffe00000002e-7 +uint_max / long_min : 0x.e00000002e-7 +uint_max / int_max : 0x2.0000000200000004 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x.0ffffffffe-7 +uint_max / double_min : 0x3fffffffce+255 +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0000ffe-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7fffffff7fffffff00000001 +uint_max * long_min : 0x800000008e+15 +uint_max * int_max : 0x7ffffffe80000001 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffe00000001 +uint_max * ulong_max : 0x0fffffffeffffffff00000001 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : 0x0fffffffefffff800000008e+242 +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeff000001e+26 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x080000000fffffffe +uint_max + long_min : 0x80000000ffffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x100000000fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max + float_min : 0x0ffffffff.00000000000000000000000000000004 +uint_max + float_max : 0x0ffffff000000000000000000ffffffff +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x80000001e+8 +uint_max - long_min : 0x080000000ffffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0xf00000001e+8 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max - float_min : 0x0fffffffe.fffffffffffffffffffffffffffffffc +uint_max - float_max : 0xf000001000000000000000000ffffffff +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x0 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x1 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x1 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x0 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x0 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x1 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x0 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x1 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffeffffffff80000001ffffffff +uint_max * uint_max * long_min : 0x80000000ffffffff8e+15 +uint_max * uint_max * int_max : 0x7ffffffe000000027fffffff +uint_max * uint_max * int_min : 0x80000000ffffffff8e+7 +uint_max * uint_max * uint_max : 0x0fffffffd00000002ffffffff +uint_max * uint_max * ulong_max : 0x0fffffffe0000000000000001ffffffff +uint_max * uint_max * double_min : 0x.3fffffff800000004e-239 +uint_max * uint_max * double_max : 0x0fffffffdfffff80100000ffffffff8e+242 +uint_max * uint_max * float_min : 0x.3fffffff800000004e-15 +uint_max * uint_max * float_max : 0x0fffffefe00000200ffffffe+26 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.0000000000000002 +ulong_max / long_min : 0xe.0000000000000002 +ulong_max / int_max : 0x200000004.00000008 +ulong_max / int_min : 0xe00000000.00000002 +ulong_max / uint_max : 0x100000001 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : 0x3fffffffffffffffce+255 +ulong_max / double_max : 0x.100000000000008e-239 +ulong_max / float_min : 0x3fffffffffffffffce+31 +ulong_max / float_max : 0x.1000001000001e-15 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffffffffffe8000000000000001 +ulong_max * long_min : 0x80000000000000008e+15 +ulong_max * int_max : 0x7ffffffeffffffff80000001 +ulong_max * int_min : 0x80000000000000008e+7 +ulong_max * uint_max : 0x0fffffffeffffffff00000001 +ulong_max * ulong_max : 0x0fffffffffffffffe0000000000000001 +ulong_max * double_min : 0x.3fffffffffffffffce-239 +ulong_max * double_max : 0x0fffffffffffff7ff00000000000008e+242 +ulong_max * float_min : 0x.3fffffffffffffffce-15 +ulong_max * float_max : 0x0fffffeffffffffff000001e+26 +ulong_max + zero_min : 0x0ffffffffffffffff +ulong_max + zero_plus : 0x0ffffffffffffffff +ulong_max + zero : 0x0ffffffffffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffffffffffe +ulong_max + long_min : 0x7fffffffffffffff +ulong_max + int_max : 0x1000000007ffffffe +ulong_max + int_min : 0x0ffffffff7fffffff +ulong_max + uint_max : 0x100000000fffffffe +ulong_max + ulong_max : 0x1fffffffffffffffe +ulong_max + double_min : 0x0ffffffffffffffff +ulong_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffffffffffff +ulong_max + float_min : 0x0ffffffffffffffff.00000000000000000000000000000004 +ulong_max + float_max : 0x0ffffff0000000000ffffffffffffffff +ulong_max - zero_min : 0x0ffffffffffffffff +ulong_max - zero_plus : 0x0ffffffffffffffff +ulong_max - zero : 0x0ffffffffffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+15 +ulong_max - long_min : 0x17fffffffffffffff +ulong_max - int_max : 0x0ffffffff8e+7 +ulong_max - int_min : 0x1000000007fffffff +ulong_max - uint_max : 0x0ffffffffe+8 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffffffffffff +ulong_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffffffffffff +ulong_max - float_min : 0x0fffffffffffffffe.fffffffffffffffffffffffffffffffc +ulong_max - float_max : 0xf0000010000000000ffffffffffffffff +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x1 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x0 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x0 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x1 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffffffffffe00000000000000027fffffffffffffff +ulong_max * ulong_max * long_min : 0x8000000000000000ffffffffffffffff8e+15 +ulong_max * ulong_max * int_max : 0x7ffffffeffffffff00000002000000007fffffff +ulong_max * ulong_max * int_min : 0x8000000000000000ffffffffffffffff8e+7 +ulong_max * ulong_max * uint_max : 0x0fffffffefffffffe0000000200000000ffffffff +ulong_max * ulong_max * ulong_max : 0x0fffffffffffffffd0000000000000002ffffffffffffffff +ulong_max * ulong_max * double_min : 0x.3fffffffffffffff80000000000000004e-223 +ulong_max * ulong_max * double_max : 0x0fffffffffffff7fe0000000000001000fffffffffffff8e+242 +ulong_max * ulong_max * float_min : 0x3.fffffffffffffff80000000000000004 +ulong_max * ulong_max * float_max : 0x0fffffefffffffffe0000020000000000ffffffe+26 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.08000000000000001e-270 +double_min / long_min : 0x.8e-271 +double_min / int_max : 0x.08000000100000002e-262 +double_min / int_min : 0x.8e-263 +double_min / uint_max : 0x.400000004e-263 +double_min / ulong_max : 0x.4e-271 +double_min / double_min : 0x1 +double_min / double_max : 0x.40000000000002e-511 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x.4000004000004e-287 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffffffffffce-239 +double_min * long_min : 0x.ee-239 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffffffffffce-239 +double_min * double_min : 0x.1e-510 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x.1e-286 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffffffffffff +double_min + long_min : 0x8e+15 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffffffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x8000000000000001 +double_min - long_min : 0x08e+15 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf0000000000000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 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0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : 0x0 +double_max * double_max * zero_plus : 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+float_max * long_min : 0x8000008e+41 +float_max * int_max : 0x7fffff7f000001e+26 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeff000001e+26 +float_max * ulong_max : 0x0fffffeffffffffff000001e+26 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : 0x0fffffefffffff8000008e+268 +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffff00000000007fffffffffffffff +float_max + long_min : 0x0fffffeffffffffff8e+15 +float_max + int_max : 0x0ffffff0000000000000000007fffffff +float_max + int_min : 0x0fffffeffffffffffffffffff8e+7 +float_max + uint_max : 0x0ffffff000000000000000000ffffffff +float_max + ulong_max : 0x0ffffff0000000000ffffffffffffffff +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max + float_min : 0x0ffffff00000000000000000000000000.00000000000000000000000000000004 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0fffffeffffffffff8000000000000001 +float_max - long_min : 0x0ffffff00000000008e+15 +float_max - int_max : 0x0fffffeffffffffffffffffff80000001 +float_max - int_min : 0x0ffffff0000000000000000008e+7 +float_max - uint_max : 0x0fffffeffffffffffffffffff00000001 +float_max - ulong_max : 0x0fffffeffffffffff0000000000000001 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max - float_min : 0x0fffffeffffffffffffffffffffffffff.fffffffffffffffffffffffffffffffc +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7fffff0000007fff000001ffffffe+52 +float_max * float_max * long_min : 0x800000ffffff8e+67 +float_max * float_max * int_max : 0x7ffffeff000081ffffffe+52 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff000101ffffffe+52 +float_max * float_max * ulong_max : 0x0fffffe000000ffff000001ffffffe+52 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : 0x0fffffe000000f800000ffffff8e+294 +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000002ffffffe+78 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.linuxaarch64 b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.linuxaarch64 new file mode 100644 index 000000000..29e2d7b07 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.linuxaarch64 @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffffffffffff +zero_min + long_min : 0x8e+15 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffffffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x8000000000000001 +zero_min - long_min : 0x08e+15 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf0000000000000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffffffffffff +zero_plus + long_min : 0x8e+15 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffffffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x8000000000000001 +zero_plus - long_min : 0x08e+15 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf0000000000000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffffffffffff +zero + long_min : 0x8e+15 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffffffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x8000000000000001 +zero - long_min : 0x08e+15 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf0000000000000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.0000000000000002 +long_max / int_max : 0x100000002.00000002 +long_max / int_min : 0xf00000000.00000002 +long_max / uint_max : 0x080000000.7fffffff +long_max / ulong_max : 0x.7fffffffffffffff +long_max / double_min : 0x1fffffffffffffffce+255 +long_max / double_max : 0x.080000000000003ffe-239 +long_max / float_min : 0x1fffffffffffffffce+31 +long_max / float_max : 0x.08000008000007fffe-15 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffffffffffff0000000000000001 +long_max * long_min : 0xc0000000000000008e+15 +long_max * int_max : 0x3fffffff7fffffff80000001 +long_max * int_min : 0xc0000000000000008e+7 +long_max * uint_max : 0x7fffffff7fffffff00000001 +long_max * ulong_max : 0x7ffffffffffffffe8000000000000001 +long_max * double_min : 0x.1fffffffffffffffce-239 +long_max * double_max : 0x7ffffffffffffbff00000000000008e+242 +long_max * float_min : 0x.1fffffffffffffffce-15 +long_max * float_max : 0x7fffff7fffffffff000001e+26 +long_max + zero_min : 0x7fffffffffffffff +long_max + zero_plus : 0x7fffffffffffffff +long_max + zero : 0x7fffffffffffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffffffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0800000007ffffffe +long_max + int_min : 0x7fffffff7fffffff +long_max + uint_max : 0x080000000fffffffe +long_max + ulong_max : 0x17ffffffffffffffe +long_max + double_min : 0x7fffffffffffffff +long_max + double_max : 0x0fffffffffffff800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffffffffffff +long_max + float_min : 0x7fffffffffffffff.00000000000000000000000000000004 +long_max + float_max : 0x0ffffff00000000007fffffffffffffff +long_max - zero_min : 0x7fffffffffffffff +long_max - zero_plus : 0x7fffffffffffffff +long_max - zero : 0x7fffffffffffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffffffffffff +long_max - int_max : 0x7fffffff8e+7 +long_max - int_min : 0x0800000007fffffff +long_max - uint_max : 0x7fffffffe+8 +long_max - ulong_max : 0x8e+15 +long_max - double_min : 0x7fffffffffffffff +long_max - double_max : 0xf0000000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffffffffffff +long_max - float_min : 0x7ffffffffffffffe.fffffffffffffffffffffffffffffffc +long_max - float_max : 0xf00000100000000007fffffffffffffff +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x1 +long_max > int_min : 0x1 +long_max > uint_max : 0x1 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x0 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x1 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x0 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x0 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x0 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x1 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffffffffffff40000000000000017fffffffffffffff +long_max * long_max * long_min : 0xe0000000000000007fffffffffffffff8e+15 +long_max * long_max * int_max : 0x1fffffffbfffffff80000001000000007fffffff +long_max * long_max * int_min : 0xe0000000000000007fffffffffffffff8e+7 +long_max * long_max * uint_max : 0x3fffffffbfffffff0000000100000000ffffffff +long_max * long_max * ulong_max : 0x3ffffffffffffffec000000000000001ffffffffffffffff +long_max * long_max * double_min : 0x.0fffffffffffffffc0000000000000004e-223 +long_max * long_max * double_max : 0x3ffffffffffffdff0000000000000800fffffffffffff8e+242 +long_max * long_max * float_min : 0x0.fffffffffffffffc0000000000000004 +long_max * long_max * float_max : 0x3fffffbfffffffff0000010000000000ffffffe+26 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffffffffffe +long_min / long_min : 0x1 +long_min / int_max : 0xefffffffd.fffffffc +long_min / int_min : 0x1e+8 +long_min / uint_max : 0xf7fffffff.8 +long_min / ulong_max : 0x.8 +long_min / double_min : 0xee+271 +long_min / double_max : 0x.f7ffffffffffffce-239 +long_min / float_min : 0xee+47 +long_min / float_max : 0x.f7fffff7fffff8e-15 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc0000000000000008e+15 +long_min * long_min : 0x4e+31 +long_min * int_max : 0xc00000008e+15 +long_min * int_min : 0x4e+23 +long_min * uint_max : 0x800000008e+15 +long_min * ulong_max : 0x80000000000000008e+15 +long_min * double_min : 0x.ee-239 +long_min * double_max : 0x80000000000004e+258 +long_min * float_min : 0x.ee-15 +long_min * float_max : 0x8000008e+41 +long_min + zero_min : 0x8e+15 +long_min + zero_plus : 0x8e+15 +long_min + zero : 0x8e+15 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+16 +long_min + int_max : 0x800000007fffffff +long_min + int_min : 0xf7fffffff8e+7 +long_min + uint_max : 0x80000000ffffffff +long_min + ulong_max : 0x7fffffffffffffff +long_min + double_min : 0x8e+15 +long_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+15 +long_min + float_min : 0x8000000000000000.00000000000000000000000000000004 +long_min + float_max : 0x0fffffeffffffffff8e+15 +long_min - zero_min : 0x8e+15 +long_min - zero_plus : 0x8e+15 +long_min - zero : 0x8e+15 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf0000000000000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf7fffffff80000001 +long_min - int_min : 0x800000008e+7 +long_min - uint_max : 0xf7fffffff00000001 +long_min - ulong_max : 0xe8000000000000001 +long_min - double_min : 0x8e+15 +long_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+15 +long_min - float_min : 0xf7fffffffffffffff.fffffffffffffffffffffffffffffffc +long_min - float_max : 0xf000000ffffffffff8e+15 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x1 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x0 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x0 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x1 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffffffffffce+31 +long_min * long_min * long_min : 0xee+47 +long_min * long_min * int_max : 0x1fffffffce+31 +long_min * long_min * int_min : 0xee+39 +long_min * long_min * uint_max : 0x3fffffffce+31 +long_min * long_min * ulong_max : 0x3fffffffffffffffce+31 +long_min * long_min * double_min : 0x.1e-223 +long_min * long_min * double_max : 0x3ffffffffffffee+274 +long_min * long_min * float_min : 0x1 +long_min * long_min * float_max : 0x3fffffce+57 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x.0fffffffe00000001e-7 +int_max / long_min : 0x.f00000002e-7 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff7fffffff +int_max / ulong_max : 0x.7fffffffe-8 +int_max / double_min : 0x1fffffffce+255 +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00007fe-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff7fffffff80000001 +int_max * long_min : 0xc00000008e+15 +int_max * int_max : 0x3fffffff00000001 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe80000001 +int_max * ulong_max : 0x7ffffffeffffffff80000001 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : 0x7ffffffefffffc00000008e+242 +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7f000001e+26 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0800000007ffffffe +int_max + long_min : 0x800000007fffffff +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x1000000007ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max + float_min : 0x7fffffff.00000000000000000000000000000004 +int_max + float_max : 0x0ffffff0000000000000000007fffffff +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x800000008e+7 +int_max - long_min : 0x0800000007fffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0xf000000008e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max - float_min : 0x7ffffffe.fffffffffffffffffffffffffffffffc +int_max - float_max : 0xf0000010000000000000000007fffffff +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x1 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x0 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x0 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x1 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff8000000040000000ffffffff +int_max * int_max * long_min : 0xe00000007fffffff8e+15 +int_max * int_max * int_max : 0x1fffffff400000017fffffff +int_max * int_max * int_min : 0xe00000007fffffff8e+7 +int_max * int_max * uint_max : 0x3ffffffec0000001ffffffff +int_max * int_max * ulong_max : 0x3fffffff00000000c0000000ffffffff +int_max * int_max * double_min : 0x.0fffffffc00000004e-239 +int_max * int_max * double_max : 0x3ffffffefffffe01000007fffffff8e+242 +int_max * int_max * float_min : 0x.0fffffffc00000004e-15 +int_max * int_max * float_max : 0x3fffffbf00000100ffffffe+26 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0x.efffffffffffffffee-7 +int_min / long_min : 0x.1e-7 +int_min / int_max : 0xe.fffffffdfffffffc +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0x.8e-8 +int_min / double_min : 0xee+263 +int_min / double_max : 0x.f7ffffffffffffce-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc0000000000000008e+7 +int_min * long_min : 0x4e+23 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x80000000000000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : 0x80000000000004e+250 +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0x7fffffff7fffffff +int_min + long_min : 0xf7fffffff8e+7 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x0ffffffff7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min + float_min : 0x80000000.00000000000000000000000000000004 +int_min + float_max : 0x0fffffeffffffffffffffffff8e+7 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf7fffffff80000001 +int_min - long_min : 0x7fffffff8e+7 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xeffffffff80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min - float_min : 0xf7fffffff.fffffffffffffffffffffffffffffffc +int_min - float_max : 0xf000000ffffffffffffffffff8e+7 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x1 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x0 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x0 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x1 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffffffffffce+15 +int_min * int_min * long_min : 0xee+31 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffffffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : 0x3ffffffffffffee+258 +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x.1fffffffe00000002e-7 +uint_max / long_min : 0x.e00000002e-7 +uint_max / int_max : 0x2.0000000200000004 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x.0ffffffffe-7 +uint_max / double_min : 0x3fffffffce+255 +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0000ffe-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7fffffff7fffffff00000001 +uint_max * long_min : 0x800000008e+15 +uint_max * int_max : 0x7ffffffe80000001 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffe00000001 +uint_max * ulong_max : 0x0fffffffeffffffff00000001 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : 0x0fffffffefffff800000008e+242 +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeff000001e+26 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x080000000fffffffe +uint_max + long_min : 0x80000000ffffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x100000000fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max + float_min : 0x0ffffffff.00000000000000000000000000000004 +uint_max + float_max : 0x0ffffff000000000000000000ffffffff +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x80000001e+8 +uint_max - long_min : 0x080000000ffffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0xf00000001e+8 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max - float_min : 0x0fffffffe.fffffffffffffffffffffffffffffffc +uint_max - float_max : 0xf000001000000000000000000ffffffff +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x0 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x1 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x1 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x0 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x0 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x1 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x0 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x1 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffeffffffff80000001ffffffff +uint_max * uint_max * long_min : 0x80000000ffffffff8e+15 +uint_max * uint_max * int_max : 0x7ffffffe000000027fffffff +uint_max * uint_max * int_min : 0x80000000ffffffff8e+7 +uint_max * uint_max * uint_max : 0x0fffffffd00000002ffffffff +uint_max * uint_max * ulong_max : 0x0fffffffe0000000000000001ffffffff +uint_max * uint_max * double_min : 0x.3fffffff800000004e-239 +uint_max * uint_max * double_max : 0x0fffffffdfffff80100000ffffffff8e+242 +uint_max * uint_max * float_min : 0x.3fffffff800000004e-15 +uint_max * uint_max * float_max : 0x0fffffefe00000200ffffffe+26 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.0000000000000002 +ulong_max / long_min : 0xe.0000000000000002 +ulong_max / int_max : 0x200000004.00000008 +ulong_max / int_min : 0xe00000000.00000002 +ulong_max / uint_max : 0x100000001 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : 0x3fffffffffffffffce+255 +ulong_max / double_max : 0x.100000000000008e-239 +ulong_max / float_min : 0x3fffffffffffffffce+31 +ulong_max / float_max : 0x.1000001000001e-15 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffffffffffe8000000000000001 +ulong_max * long_min : 0x80000000000000008e+15 +ulong_max * int_max : 0x7ffffffeffffffff80000001 +ulong_max * int_min : 0x80000000000000008e+7 +ulong_max * uint_max : 0x0fffffffeffffffff00000001 +ulong_max * ulong_max : 0x0fffffffffffffffe0000000000000001 +ulong_max * double_min : 0x.3fffffffffffffffce-239 +ulong_max * double_max : 0x0fffffffffffff7ff00000000000008e+242 +ulong_max * float_min : 0x.3fffffffffffffffce-15 +ulong_max * float_max : 0x0fffffeffffffffff000001e+26 +ulong_max + zero_min : 0x0ffffffffffffffff +ulong_max + zero_plus : 0x0ffffffffffffffff +ulong_max + zero : 0x0ffffffffffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffffffffffe +ulong_max + long_min : 0x7fffffffffffffff +ulong_max + int_max : 0x1000000007ffffffe +ulong_max + int_min : 0x0ffffffff7fffffff +ulong_max + uint_max : 0x100000000fffffffe +ulong_max + ulong_max : 0x1fffffffffffffffe +ulong_max + double_min : 0x0ffffffffffffffff +ulong_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffffffffffff +ulong_max + float_min : 0x0ffffffffffffffff.00000000000000000000000000000004 +ulong_max + float_max : 0x0ffffff0000000000ffffffffffffffff +ulong_max - zero_min : 0x0ffffffffffffffff +ulong_max - zero_plus : 0x0ffffffffffffffff +ulong_max - zero : 0x0ffffffffffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+15 +ulong_max - long_min : 0x17fffffffffffffff +ulong_max - int_max : 0x0ffffffff8e+7 +ulong_max - int_min : 0x1000000007fffffff +ulong_max - uint_max : 0x0ffffffffe+8 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffffffffffff +ulong_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffffffffffff +ulong_max - float_min : 0x0fffffffffffffffe.fffffffffffffffffffffffffffffffc +ulong_max - float_max : 0xf0000010000000000ffffffffffffffff +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x1 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x0 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x0 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x1 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffffffffffe00000000000000027fffffffffffffff +ulong_max * ulong_max * long_min : 0x8000000000000000ffffffffffffffff8e+15 +ulong_max * ulong_max * int_max : 0x7ffffffeffffffff00000002000000007fffffff +ulong_max * ulong_max * int_min : 0x8000000000000000ffffffffffffffff8e+7 +ulong_max * ulong_max * uint_max : 0x0fffffffefffffffe0000000200000000ffffffff +ulong_max * ulong_max * ulong_max : 0x0fffffffffffffffd0000000000000002ffffffffffffffff +ulong_max * ulong_max * double_min : 0x.3fffffffffffffff80000000000000004e-223 +ulong_max * ulong_max * double_max : 0x0fffffffffffff7fe0000000000001000fffffffffffff8e+242 +ulong_max * ulong_max * float_min : 0x3.fffffffffffffff80000000000000004 +ulong_max * ulong_max * float_max : 0x0fffffefffffffffe0000020000000000ffffffe+26 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.08000000000000001e-270 +double_min / long_min : 0x.8e-271 +double_min / int_max : 0x.08000000100000002e-262 +double_min / int_min : 0x.8e-263 +double_min / uint_max : 0x.400000004e-263 +double_min / ulong_max : 0x.4e-271 +double_min / double_min : 0x1 +double_min / double_max : 0x.40000000000002e-511 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x.4000004000004e-287 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffffffffffce-239 +double_min * long_min : 0x.ee-239 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffffffffffce-239 +double_min * double_min : 0x.1e-510 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x.1e-286 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffffffffffff +double_min + long_min : 0x8e+15 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffffffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x8000000000000001 +double_min - long_min : 0x08e+15 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf0000000000000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 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0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : 0x0 +double_max * double_max * zero_plus : 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+float_max * long_min : 0x8000008e+41 +float_max * int_max : 0x7fffff7f000001e+26 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeff000001e+26 +float_max * ulong_max : 0x0fffffeffffffffff000001e+26 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : 0x0fffffefffffff8000008e+268 +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffff00000000007fffffffffffffff +float_max + long_min : 0x0fffffeffffffffff8e+15 +float_max + int_max : 0x0ffffff0000000000000000007fffffff +float_max + int_min : 0x0fffffeffffffffffffffffff8e+7 +float_max + uint_max : 0x0ffffff000000000000000000ffffffff +float_max + ulong_max : 0x0ffffff0000000000ffffffffffffffff +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max + float_min : 0x0ffffff00000000000000000000000000.00000000000000000000000000000004 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0fffffeffffffffff8000000000000001 +float_max - long_min : 0x0ffffff00000000008e+15 +float_max - int_max : 0x0fffffeffffffffffffffffff80000001 +float_max - int_min : 0x0ffffff0000000000000000008e+7 +float_max - uint_max : 0x0fffffeffffffffffffffffff00000001 +float_max - ulong_max : 0x0fffffeffffffffff0000000000000001 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max - float_min : 0x0fffffeffffffffffffffffffffffffff.fffffffffffffffffffffffffffffffc +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7fffff0000007fff000001ffffffe+52 +float_max * float_max * long_min : 0x800000ffffff8e+67 +float_max * float_max * int_max : 0x7ffffeff000081ffffffe+52 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff000101ffffffe+52 +float_max * float_max * ulong_max : 0x0fffffe000000ffff000001ffffffe+52 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : 0x0fffffe000000f800000ffffff8e+294 +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000002ffffffe+78 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.macosx64 b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.macosx64 new file mode 100644 index 000000000..29e2d7b07 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/golden/test.log.macosx64 @@ -0,0 +1,3482 @@ +SystemC Simulation +****************** limits fx_float_zero +****************** limits fx_float_inf +****************** limits fx_float +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +zero_min / zero_min : NaN +zero_min / zero_plus : NaN +zero_min / zero : NaN +zero_min / NaN : NaN +zero_min / Inf_plus : 0x0 +zero_min / Inf_min : 0x0 +zero_min / Inf : 0x0 +zero_min / long_max : 0x0 +zero_min / long_min : 0x0 +zero_min / int_max : 0x0 +zero_min / int_min : 0x0 +zero_min / uint_max : 0x0 +zero_min / ulong_max : 0x0 +zero_min / double_min : 0x0 +zero_min / double_max : 0x0 +zero_min / float_min : 0x0 +zero_min / float_max : 0x0 +zero_min * zero_min : 0x0 +zero_min * zero_plus : 0x0 +zero_min * zero : 0x0 +zero_min * NaN : NaN +zero_min * Inf_plus : NaN +zero_min * Inf_min : NaN +zero_min * Inf : NaN +zero_min * long_max : 0x0 +zero_min * long_min : 0x0 +zero_min * int_max : 0x0 +zero_min * int_min : 0x0 +zero_min * uint_max : 0x0 +zero_min * ulong_max : 0x0 +zero_min * double_min : 0x0 +zero_min * double_max : 0x0 +zero_min * float_min : 0x0 +zero_min * float_max : 0x0 +zero_min + zero_min : 0x0 +zero_min + zero_plus : 0x0 +zero_min + zero : 0x0 +zero_min + NaN : NaN +zero_min + Inf_plus : Inf +zero_min + Inf_min : -Inf +zero_min + Inf : Inf +zero_min + long_max : 0x7fffffffffffffff +zero_min + long_min : 0x8e+15 +zero_min + int_max : 0x7fffffff +zero_min + int_min : 0x8e+7 +zero_min + uint_max : 0x0ffffffff +zero_min + ulong_max : 0x0ffffffffffffffff +zero_min + double_min : 0x.4e-255 +zero_min + double_max : 0x0fffffffffffff8e+242 +zero_min + float_min : 0x.4e-31 +zero_min + float_max : 0x0ffffffe+26 +zero_min - zero_min : 0x0 +zero_min - zero_plus : 0x0 +zero_min - zero : 0x0 +zero_min - NaN : NaN +zero_min - Inf_plus : -Inf +zero_min - Inf_min : Inf +zero_min - Inf : -Inf +zero_min - long_max : 0x8000000000000001 +zero_min - long_min : 0x08e+15 +zero_min - int_max : 0x80000001 +zero_min - int_min : 0x08e+7 +zero_min - uint_max : 0xf00000001 +zero_min - ulong_max : 0xf0000000000000001 +zero_min - double_min : 0x.ce-255 +zero_min - double_max : 0xf00000000000008e+242 +zero_min - float_min : 0x.ce-31 +zero_min - float_max : 0xf000001e+26 +zero_min > zero_min : 0x0 +zero_min > zero_plus : 0x0 +zero_min > zero : 0x0 +zero_min > NaN : 0x0 +zero_min > Inf_plus : 0x0 +zero_min > Inf_min : 0x1 +zero_min > Inf : 0x0 +zero_min > long_max : 0x0 +zero_min > long_min : 0x1 +zero_min > int_max : 0x0 +zero_min > int_min : 0x1 +zero_min > uint_max : 0x0 +zero_min > ulong_max : 0x0 +zero_min > double_min : 0x0 +zero_min > double_max : 0x0 +zero_min > float_min : 0x0 +zero_min > float_max : 0x0 +zero_min < zero_min : 0x0 +zero_min < zero_plus : 0x0 +zero_min < zero : 0x0 +zero_min < NaN : 0x0 +zero_min < Inf_plus : 0x1 +zero_min < Inf_min : 0x0 +zero_min < Inf : 0x1 +zero_min < long_max : 0x1 +zero_min < long_min : 0x0 +zero_min < int_max : 0x1 +zero_min < int_min : 0x0 +zero_min < uint_max : 0x1 +zero_min < ulong_max : 0x1 +zero_min < double_min : 0x1 +zero_min < double_max : 0x1 +zero_min < float_min : 0x1 +zero_min < float_max : 0x1 +zero_min >= zero_min : 0x1 +zero_min >= zero_plus : 0x1 +zero_min >= zero : 0x1 +zero_min >= NaN : 0x0 +zero_min >= Inf_plus : 0x0 +zero_min >= Inf_min : 0x1 +zero_min >= Inf : 0x0 +zero_min >= long_max : 0x0 +zero_min >= long_min : 0x1 +zero_min >= int_max : 0x0 +zero_min >= int_min : 0x1 +zero_min >= uint_max : 0x0 +zero_min >= ulong_max : 0x0 +zero_min >= double_min : 0x0 +zero_min >= double_max : 0x0 +zero_min >= float_min : 0x0 +zero_min >= float_max : 0x0 +zero_min <= zero_min : 0x1 +zero_min <= zero_plus : 0x1 +zero_min <= zero : 0x1 +zero_min <= NaN : 0x0 +zero_min <= Inf_plus : 0x1 +zero_min <= Inf_min : 0x0 +zero_min <= Inf : 0x1 +zero_min <= long_max : 0x1 +zero_min <= long_min : 0x0 +zero_min <= int_max : 0x1 +zero_min <= int_min : 0x0 +zero_min <= uint_max : 0x1 +zero_min <= ulong_max : 0x1 +zero_min <= double_min : 0x1 +zero_min <= double_max : 0x1 +zero_min <= float_min : 0x1 +zero_min <= float_max : 0x1 +zero_min == zero_min : 0x1 +zero_min == zero_plus : 0x1 +zero_min == zero : 0x1 +zero_min == NaN : 0x0 +zero_min == Inf_plus : 0x0 +zero_min == Inf_min : 0x0 +zero_min == Inf : 0x0 +zero_min == long_max : 0x0 +zero_min == long_min : 0x0 +zero_min == int_max : 0x0 +zero_min == int_min : 0x0 +zero_min == uint_max : 0x0 +zero_min == ulong_max : 0x0 +zero_min == double_min : 0x0 +zero_min == double_max : 0x0 +zero_min == float_min : 0x0 +zero_min == float_max : 0x0 +zero_min != zero_min : 0x0 +zero_min != zero_plus : 0x0 +zero_min != zero : 0x0 +zero_min != NaN : 0x1 +zero_min != Inf_plus : 0x1 +zero_min != Inf_min : 0x1 +zero_min != Inf : 0x1 +zero_min != long_max : 0x1 +zero_min != long_min : 0x1 +zero_min != int_max : 0x1 +zero_min != int_min : 0x1 +zero_min != uint_max : 0x1 +zero_min != ulong_max : 0x1 +zero_min != double_min : 0x1 +zero_min != double_max : 0x1 +zero_min != float_min : 0x1 +zero_min != float_max : 0x1 +zero_min * zero_min * zero_min : 0x0 +zero_min * zero_min * zero_plus : 0x0 +zero_min * zero_min * zero : 0x0 +zero_min * zero_min * NaN : NaN +zero_min * zero_min * Inf_plus : NaN +zero_min * zero_min * Inf_min : NaN +zero_min * zero_min * Inf : NaN +zero_min * zero_min * long_max : 0x0 +zero_min * zero_min * long_min : 0x0 +zero_min * zero_min * int_max : 0x0 +zero_min * zero_min * int_min : 0x0 +zero_min * zero_min * uint_max : 0x0 +zero_min * zero_min * ulong_max : 0x0 +zero_min * zero_min * double_min : 0x0 +zero_min * zero_min * double_max : 0x0 +zero_min * zero_min * float_min : 0x0 +zero_min * zero_min * float_max : 0x0 +zero_plus / zero_min : NaN +zero_plus / zero_plus : NaN +zero_plus / zero : NaN +zero_plus / NaN : NaN +zero_plus / Inf_plus : 0x0 +zero_plus / Inf_min : 0x0 +zero_plus / Inf : 0x0 +zero_plus / long_max : 0x0 +zero_plus / long_min : 0x0 +zero_plus / int_max : 0x0 +zero_plus / int_min : 0x0 +zero_plus / uint_max : 0x0 +zero_plus / ulong_max : 0x0 +zero_plus / double_min : 0x0 +zero_plus / double_max : 0x0 +zero_plus / float_min : 0x0 +zero_plus / float_max : 0x0 +zero_plus * zero_min : 0x0 +zero_plus * zero_plus : 0x0 +zero_plus * zero : 0x0 +zero_plus * NaN : NaN +zero_plus * Inf_plus : NaN +zero_plus * Inf_min : NaN +zero_plus * Inf : NaN +zero_plus * long_max : 0x0 +zero_plus * long_min : 0x0 +zero_plus * int_max : 0x0 +zero_plus * int_min : 0x0 +zero_plus * uint_max : 0x0 +zero_plus * ulong_max : 0x0 +zero_plus * double_min : 0x0 +zero_plus * double_max : 0x0 +zero_plus * float_min : 0x0 +zero_plus * float_max : 0x0 +zero_plus + zero_min : 0x0 +zero_plus + zero_plus : 0x0 +zero_plus + zero : 0x0 +zero_plus + NaN : NaN +zero_plus + Inf_plus : Inf +zero_plus + Inf_min : -Inf +zero_plus + Inf : Inf +zero_plus + long_max : 0x7fffffffffffffff +zero_plus + long_min : 0x8e+15 +zero_plus + int_max : 0x7fffffff +zero_plus + int_min : 0x8e+7 +zero_plus + uint_max : 0x0ffffffff +zero_plus + ulong_max : 0x0ffffffffffffffff +zero_plus + double_min : 0x.4e-255 +zero_plus + double_max : 0x0fffffffffffff8e+242 +zero_plus + float_min : 0x.4e-31 +zero_plus + float_max : 0x0ffffffe+26 +zero_plus - zero_min : 0x0 +zero_plus - zero_plus : 0x0 +zero_plus - zero : 0x0 +zero_plus - NaN : NaN +zero_plus - Inf_plus : -Inf +zero_plus - Inf_min : Inf +zero_plus - Inf : -Inf +zero_plus - long_max : 0x8000000000000001 +zero_plus - long_min : 0x08e+15 +zero_plus - int_max : 0x80000001 +zero_plus - int_min : 0x08e+7 +zero_plus - uint_max : 0xf00000001 +zero_plus - ulong_max : 0xf0000000000000001 +zero_plus - double_min : 0x.ce-255 +zero_plus - double_max : 0xf00000000000008e+242 +zero_plus - float_min : 0x.ce-31 +zero_plus - float_max : 0xf000001e+26 +zero_plus > zero_min : 0x0 +zero_plus > zero_plus : 0x0 +zero_plus > zero : 0x0 +zero_plus > NaN : 0x0 +zero_plus > Inf_plus : 0x0 +zero_plus > Inf_min : 0x1 +zero_plus > Inf : 0x0 +zero_plus > long_max : 0x0 +zero_plus > long_min : 0x1 +zero_plus > int_max : 0x0 +zero_plus > int_min : 0x1 +zero_plus > uint_max : 0x0 +zero_plus > ulong_max : 0x0 +zero_plus > double_min : 0x0 +zero_plus > double_max : 0x0 +zero_plus > float_min : 0x0 +zero_plus > float_max : 0x0 +zero_plus < zero_min : 0x0 +zero_plus < zero_plus : 0x0 +zero_plus < zero : 0x0 +zero_plus < NaN : 0x0 +zero_plus < Inf_plus : 0x1 +zero_plus < Inf_min : 0x0 +zero_plus < Inf : 0x1 +zero_plus < long_max : 0x1 +zero_plus < long_min : 0x0 +zero_plus < int_max : 0x1 +zero_plus < int_min : 0x0 +zero_plus < uint_max : 0x1 +zero_plus < ulong_max : 0x1 +zero_plus < double_min : 0x1 +zero_plus < double_max : 0x1 +zero_plus < float_min : 0x1 +zero_plus < float_max : 0x1 +zero_plus >= zero_min : 0x1 +zero_plus >= zero_plus : 0x1 +zero_plus >= zero : 0x1 +zero_plus >= NaN : 0x0 +zero_plus >= Inf_plus : 0x0 +zero_plus >= Inf_min : 0x1 +zero_plus >= Inf : 0x0 +zero_plus >= long_max : 0x0 +zero_plus >= long_min : 0x1 +zero_plus >= int_max : 0x0 +zero_plus >= int_min : 0x1 +zero_plus >= uint_max : 0x0 +zero_plus >= ulong_max : 0x0 +zero_plus >= double_min : 0x0 +zero_plus >= double_max : 0x0 +zero_plus >= float_min : 0x0 +zero_plus >= float_max : 0x0 +zero_plus <= zero_min : 0x1 +zero_plus <= zero_plus : 0x1 +zero_plus <= zero : 0x1 +zero_plus <= NaN : 0x0 +zero_plus <= Inf_plus : 0x1 +zero_plus <= Inf_min : 0x0 +zero_plus <= Inf : 0x1 +zero_plus <= long_max : 0x1 +zero_plus <= long_min : 0x0 +zero_plus <= int_max : 0x1 +zero_plus <= int_min : 0x0 +zero_plus <= uint_max : 0x1 +zero_plus <= ulong_max : 0x1 +zero_plus <= double_min : 0x1 +zero_plus <= double_max : 0x1 +zero_plus <= float_min : 0x1 +zero_plus <= float_max : 0x1 +zero_plus == zero_min : 0x1 +zero_plus == zero_plus : 0x1 +zero_plus == zero : 0x1 +zero_plus == NaN : 0x0 +zero_plus == Inf_plus : 0x0 +zero_plus == Inf_min : 0x0 +zero_plus == Inf : 0x0 +zero_plus == long_max : 0x0 +zero_plus == long_min : 0x0 +zero_plus == int_max : 0x0 +zero_plus == int_min : 0x0 +zero_plus == uint_max : 0x0 +zero_plus == ulong_max : 0x0 +zero_plus == double_min : 0x0 +zero_plus == double_max : 0x0 +zero_plus == float_min : 0x0 +zero_plus == float_max : 0x0 +zero_plus != zero_min : 0x0 +zero_plus != zero_plus : 0x0 +zero_plus != zero : 0x0 +zero_plus != NaN : 0x1 +zero_plus != Inf_plus : 0x1 +zero_plus != Inf_min : 0x1 +zero_plus != Inf : 0x1 +zero_plus != long_max : 0x1 +zero_plus != long_min : 0x1 +zero_plus != int_max : 0x1 +zero_plus != int_min : 0x1 +zero_plus != uint_max : 0x1 +zero_plus != ulong_max : 0x1 +zero_plus != double_min : 0x1 +zero_plus != double_max : 0x1 +zero_plus != float_min : 0x1 +zero_plus != float_max : 0x1 +zero_plus * zero_plus * zero_min : 0x0 +zero_plus * zero_plus * zero_plus : 0x0 +zero_plus * zero_plus * zero : 0x0 +zero_plus * zero_plus * NaN : NaN +zero_plus * zero_plus * Inf_plus : NaN +zero_plus * zero_plus * Inf_min : NaN +zero_plus * zero_plus * Inf : NaN +zero_plus * zero_plus * long_max : 0x0 +zero_plus * zero_plus * long_min : 0x0 +zero_plus * zero_plus * int_max : 0x0 +zero_plus * zero_plus * int_min : 0x0 +zero_plus * zero_plus * uint_max : 0x0 +zero_plus * zero_plus * ulong_max : 0x0 +zero_plus * zero_plus * double_min : 0x0 +zero_plus * zero_plus * double_max : 0x0 +zero_plus * zero_plus * float_min : 0x0 +zero_plus * zero_plus * float_max : 0x0 +zero / zero_min : NaN +zero / zero_plus : NaN +zero / zero : NaN +zero / NaN : NaN +zero / Inf_plus : 0x0 +zero / Inf_min : 0x0 +zero / Inf : 0x0 +zero / long_max : 0x0 +zero / long_min : 0x0 +zero / int_max : 0x0 +zero / int_min : 0x0 +zero / uint_max : 0x0 +zero / ulong_max : 0x0 +zero / double_min : 0x0 +zero / double_max : 0x0 +zero / float_min : 0x0 +zero / float_max : 0x0 +zero * zero_min : 0x0 +zero * zero_plus : 0x0 +zero * zero : 0x0 +zero * NaN : NaN +zero * Inf_plus : NaN +zero * Inf_min : NaN +zero * Inf : NaN +zero * long_max : 0x0 +zero * long_min : 0x0 +zero * int_max : 0x0 +zero * int_min : 0x0 +zero * uint_max : 0x0 +zero * ulong_max : 0x0 +zero * double_min : 0x0 +zero * double_max : 0x0 +zero * float_min : 0x0 +zero * float_max : 0x0 +zero + zero_min : 0x0 +zero + zero_plus : 0x0 +zero + zero : 0x0 +zero + NaN : NaN +zero + Inf_plus : Inf +zero + Inf_min : -Inf +zero + Inf : Inf +zero + long_max : 0x7fffffffffffffff +zero + long_min : 0x8e+15 +zero + int_max : 0x7fffffff +zero + int_min : 0x8e+7 +zero + uint_max : 0x0ffffffff +zero + ulong_max : 0x0ffffffffffffffff +zero + double_min : 0x.4e-255 +zero + double_max : 0x0fffffffffffff8e+242 +zero + float_min : 0x.4e-31 +zero + float_max : 0x0ffffffe+26 +zero - zero_min : 0x0 +zero - zero_plus : 0x0 +zero - zero : 0x0 +zero - NaN : NaN +zero - Inf_plus : -Inf +zero - Inf_min : Inf +zero - Inf : -Inf +zero - long_max : 0x8000000000000001 +zero - long_min : 0x08e+15 +zero - int_max : 0x80000001 +zero - int_min : 0x08e+7 +zero - uint_max : 0xf00000001 +zero - ulong_max : 0xf0000000000000001 +zero - double_min : 0x.ce-255 +zero - double_max : 0xf00000000000008e+242 +zero - float_min : 0x.ce-31 +zero - float_max : 0xf000001e+26 +zero > zero_min : 0x0 +zero > zero_plus : 0x0 +zero > zero : 0x0 +zero > NaN : 0x0 +zero > Inf_plus : 0x0 +zero > Inf_min : 0x1 +zero > Inf : 0x0 +zero > long_max : 0x0 +zero > long_min : 0x1 +zero > int_max : 0x0 +zero > int_min : 0x1 +zero > uint_max : 0x0 +zero > ulong_max : 0x0 +zero > double_min : 0x0 +zero > double_max : 0x0 +zero > float_min : 0x0 +zero > float_max : 0x0 +zero < zero_min : 0x0 +zero < zero_plus : 0x0 +zero < zero : 0x0 +zero < NaN : 0x0 +zero < Inf_plus : 0x1 +zero < Inf_min : 0x0 +zero < Inf : 0x1 +zero < long_max : 0x1 +zero < long_min : 0x0 +zero < int_max : 0x1 +zero < int_min : 0x0 +zero < uint_max : 0x1 +zero < ulong_max : 0x1 +zero < double_min : 0x1 +zero < double_max : 0x1 +zero < float_min : 0x1 +zero < float_max : 0x1 +zero >= zero_min : 0x1 +zero >= zero_plus : 0x1 +zero >= zero : 0x1 +zero >= NaN : 0x0 +zero >= Inf_plus : 0x0 +zero >= Inf_min : 0x1 +zero >= Inf : 0x0 +zero >= long_max : 0x0 +zero >= long_min : 0x1 +zero >= int_max : 0x0 +zero >= int_min : 0x1 +zero >= uint_max : 0x0 +zero >= ulong_max : 0x0 +zero >= double_min : 0x0 +zero >= double_max : 0x0 +zero >= float_min : 0x0 +zero >= float_max : 0x0 +zero <= zero_min : 0x1 +zero <= zero_plus : 0x1 +zero <= zero : 0x1 +zero <= NaN : 0x0 +zero <= Inf_plus : 0x1 +zero <= Inf_min : 0x0 +zero <= Inf : 0x1 +zero <= long_max : 0x1 +zero <= long_min : 0x0 +zero <= int_max : 0x1 +zero <= int_min : 0x0 +zero <= uint_max : 0x1 +zero <= ulong_max : 0x1 +zero <= double_min : 0x1 +zero <= double_max : 0x1 +zero <= float_min : 0x1 +zero <= float_max : 0x1 +zero == zero_min : 0x1 +zero == zero_plus : 0x1 +zero == zero : 0x1 +zero == NaN : 0x0 +zero == Inf_plus : 0x0 +zero == Inf_min : 0x0 +zero == Inf : 0x0 +zero == long_max : 0x0 +zero == long_min : 0x0 +zero == int_max : 0x0 +zero == int_min : 0x0 +zero == uint_max : 0x0 +zero == ulong_max : 0x0 +zero == double_min : 0x0 +zero == double_max : 0x0 +zero == float_min : 0x0 +zero == float_max : 0x0 +zero != zero_min : 0x0 +zero != zero_plus : 0x0 +zero != zero : 0x0 +zero != NaN : 0x1 +zero != Inf_plus : 0x1 +zero != Inf_min : 0x1 +zero != Inf : 0x1 +zero != long_max : 0x1 +zero != long_min : 0x1 +zero != int_max : 0x1 +zero != int_min : 0x1 +zero != uint_max : 0x1 +zero != ulong_max : 0x1 +zero != double_min : 0x1 +zero != double_max : 0x1 +zero != float_min : 0x1 +zero != float_max : 0x1 +zero * zero * zero_min : 0x0 +zero * zero * zero_plus : 0x0 +zero * zero * zero : 0x0 +zero * zero * NaN : NaN +zero * zero * Inf_plus : NaN +zero * zero * Inf_min : NaN +zero * zero * Inf : NaN +zero * zero * long_max : 0x0 +zero * zero * long_min : 0x0 +zero * zero * int_max : 0x0 +zero * zero * int_min : 0x0 +zero * zero * uint_max : 0x0 +zero * zero * ulong_max : 0x0 +zero * zero * double_min : 0x0 +zero * zero * double_max : 0x0 +zero * zero * float_min : 0x0 +zero * zero * float_max : 0x0 +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +NaN / zero_min : NaN +NaN / zero_plus : NaN +NaN / zero : NaN +NaN / NaN : NaN +NaN / Inf_plus : NaN +NaN / Inf_min : NaN +NaN / Inf : NaN +NaN / long_max : NaN +NaN / long_min : NaN +NaN / int_max : NaN +NaN / int_min : NaN +NaN / uint_max : NaN +NaN / ulong_max : NaN +NaN / double_min : NaN +NaN / double_max : NaN +NaN / float_min : NaN +NaN / float_max : NaN +NaN * zero_min : NaN +NaN * zero_plus : NaN +NaN * zero : NaN +NaN * NaN : NaN +NaN * Inf_plus : NaN +NaN * Inf_min : NaN +NaN * Inf : NaN +NaN * long_max : NaN +NaN * long_min : NaN +NaN * int_max : NaN +NaN * int_min : NaN +NaN * uint_max : NaN +NaN * ulong_max : NaN +NaN * double_min : NaN +NaN * double_max : NaN +NaN * float_min : NaN +NaN * float_max : NaN +NaN + zero_min : NaN +NaN + zero_plus : NaN +NaN + zero : NaN +NaN + NaN : NaN +NaN + Inf_plus : NaN +NaN + Inf_min : NaN +NaN + Inf : NaN +NaN + long_max : NaN +NaN + long_min : NaN +NaN + int_max : NaN +NaN + int_min : NaN +NaN + uint_max : NaN +NaN + ulong_max : NaN +NaN + double_min : NaN +NaN + double_max : NaN +NaN + float_min : NaN +NaN + float_max : NaN +NaN - zero_min : NaN +NaN - zero_plus : NaN +NaN - zero : NaN +NaN - NaN : NaN +NaN - Inf_plus : NaN +NaN - Inf_min : NaN +NaN - Inf : NaN +NaN - long_max : NaN +NaN - long_min : NaN +NaN - int_max : NaN +NaN - int_min : NaN +NaN - uint_max : NaN +NaN - ulong_max : NaN +NaN - double_min : NaN +NaN - double_max : NaN +NaN - float_min : NaN +NaN - float_max : NaN +NaN > zero_min : 0x0 +NaN > zero_plus : 0x0 +NaN > zero : 0x0 +NaN > NaN : 0x0 +NaN > Inf_plus : 0x0 +NaN > Inf_min : 0x0 +NaN > Inf : 0x0 +NaN > long_max : 0x0 +NaN > long_min : 0x0 +NaN > int_max : 0x0 +NaN > int_min : 0x0 +NaN > uint_max : 0x0 +NaN > ulong_max : 0x0 +NaN > double_min : 0x0 +NaN > double_max : 0x0 +NaN > float_min : 0x0 +NaN > float_max : 0x0 +NaN < zero_min : 0x0 +NaN < zero_plus : 0x0 +NaN < zero : 0x0 +NaN < NaN : 0x0 +NaN < Inf_plus : 0x0 +NaN < Inf_min : 0x0 +NaN < Inf : 0x0 +NaN < long_max : 0x0 +NaN < long_min : 0x0 +NaN < int_max : 0x0 +NaN < int_min : 0x0 +NaN < uint_max : 0x0 +NaN < ulong_max : 0x0 +NaN < double_min : 0x0 +NaN < double_max : 0x0 +NaN < float_min : 0x0 +NaN < float_max : 0x0 +NaN >= zero_min : 0x0 +NaN >= zero_plus : 0x0 +NaN >= zero : 0x0 +NaN >= NaN : 0x0 +NaN >= Inf_plus : 0x0 +NaN >= Inf_min : 0x0 +NaN >= Inf : 0x0 +NaN >= long_max : 0x0 +NaN >= long_min : 0x0 +NaN >= int_max : 0x0 +NaN >= int_min : 0x0 +NaN >= uint_max : 0x0 +NaN >= ulong_max : 0x0 +NaN >= double_min : 0x0 +NaN >= double_max : 0x0 +NaN >= float_min : 0x0 +NaN >= float_max : 0x0 +NaN <= zero_min : 0x0 +NaN <= zero_plus : 0x0 +NaN <= zero : 0x0 +NaN <= NaN : 0x0 +NaN <= Inf_plus : 0x0 +NaN <= Inf_min : 0x0 +NaN <= Inf : 0x0 +NaN <= long_max : 0x0 +NaN <= long_min : 0x0 +NaN <= int_max : 0x0 +NaN <= int_min : 0x0 +NaN <= uint_max : 0x0 +NaN <= ulong_max : 0x0 +NaN <= double_min : 0x0 +NaN <= double_max : 0x0 +NaN <= float_min : 0x0 +NaN <= float_max : 0x0 +NaN == zero_min : 0x0 +NaN == zero_plus : 0x0 +NaN == zero : 0x0 +NaN == NaN : 0x0 +NaN == Inf_plus : 0x0 +NaN == Inf_min : 0x0 +NaN == Inf : 0x0 +NaN == long_max : 0x0 +NaN == long_min : 0x0 +NaN == int_max : 0x0 +NaN == int_min : 0x0 +NaN == uint_max : 0x0 +NaN == ulong_max : 0x0 +NaN == double_min : 0x0 +NaN == double_max : 0x0 +NaN == float_min : 0x0 +NaN == float_max : 0x0 +NaN != zero_min : 0x1 +NaN != zero_plus : 0x1 +NaN != zero : 0x1 +NaN != NaN : 0x1 +NaN != Inf_plus : 0x1 +NaN != Inf_min : 0x1 +NaN != Inf : 0x1 +NaN != long_max : 0x1 +NaN != long_min : 0x1 +NaN != int_max : 0x1 +NaN != int_min : 0x1 +NaN != uint_max : 0x1 +NaN != ulong_max : 0x1 +NaN != double_min : 0x1 +NaN != double_max : 0x1 +NaN != float_min : 0x1 +NaN != float_max : 0x1 +NaN * NaN * zero_min : NaN +NaN * NaN * zero_plus : NaN +NaN * NaN * zero : NaN +NaN * NaN * NaN : NaN +NaN * NaN * Inf_plus : NaN +NaN * NaN * Inf_min : NaN +NaN * NaN * Inf : NaN +NaN * NaN * long_max : NaN +NaN * NaN * long_min : NaN +NaN * NaN * int_max : NaN +NaN * NaN * int_min : NaN +NaN * NaN * uint_max : NaN +NaN * NaN * ulong_max : NaN +NaN * NaN * double_min : NaN +NaN * NaN * double_max : NaN +NaN * NaN * float_min : NaN +NaN * NaN * float_max : NaN +Inf_plus / zero_min : -Inf +Inf_plus / zero_plus : Inf +Inf_plus / zero : Inf +Inf_plus / NaN : NaN +Inf_plus / Inf_plus : NaN +Inf_plus / Inf_min : NaN +Inf_plus / Inf : NaN +Inf_plus / long_max : Inf +Inf_plus / long_min : -Inf +Inf_plus / int_max : Inf +Inf_plus / int_min : -Inf +Inf_plus / uint_max : Inf +Inf_plus / ulong_max : Inf +Inf_plus / double_min : Inf +Inf_plus / double_max : Inf +Inf_plus / float_min : Inf +Inf_plus / float_max : Inf +Inf_plus * zero_min : NaN +Inf_plus * zero_plus : NaN +Inf_plus * zero : NaN +Inf_plus * NaN : NaN +Inf_plus * Inf_plus : Inf +Inf_plus * Inf_min : -Inf +Inf_plus * Inf : Inf +Inf_plus * long_max : Inf +Inf_plus * long_min : -Inf +Inf_plus * int_max : Inf +Inf_plus * int_min : -Inf +Inf_plus * uint_max : Inf +Inf_plus * ulong_max : Inf +Inf_plus * double_min : Inf +Inf_plus * double_max : Inf +Inf_plus * float_min : Inf +Inf_plus * float_max : Inf +Inf_plus + zero_min : Inf +Inf_plus + zero_plus : Inf +Inf_plus + zero : Inf +Inf_plus + NaN : NaN +Inf_plus + Inf_plus : Inf +Inf_plus + Inf_min : NaN +Inf_plus + Inf : Inf +Inf_plus + long_max : Inf +Inf_plus + long_min : Inf +Inf_plus + int_max : Inf +Inf_plus + int_min : Inf +Inf_plus + uint_max : Inf +Inf_plus + ulong_max : Inf +Inf_plus + double_min : Inf +Inf_plus + double_max : Inf +Inf_plus + float_min : Inf +Inf_plus + float_max : Inf +Inf_plus - zero_min : Inf +Inf_plus - zero_plus : Inf +Inf_plus - zero : Inf +Inf_plus - NaN : NaN +Inf_plus - Inf_plus : NaN +Inf_plus - Inf_min : Inf +Inf_plus - Inf : NaN +Inf_plus - long_max : Inf +Inf_plus - long_min : Inf +Inf_plus - int_max : Inf +Inf_plus - int_min : Inf +Inf_plus - uint_max : Inf +Inf_plus - ulong_max : Inf +Inf_plus - double_min : Inf +Inf_plus - double_max : Inf +Inf_plus - float_min : Inf +Inf_plus - float_max : Inf +Inf_plus > zero_min : 0x1 +Inf_plus > zero_plus : 0x1 +Inf_plus > zero : 0x1 +Inf_plus > NaN : 0x0 +Inf_plus > Inf_plus : 0x0 +Inf_plus > Inf_min : 0x1 +Inf_plus > Inf : 0x0 +Inf_plus > long_max : 0x1 +Inf_plus > long_min : 0x1 +Inf_plus > int_max : 0x1 +Inf_plus > int_min : 0x1 +Inf_plus > uint_max : 0x1 +Inf_plus > ulong_max : 0x1 +Inf_plus > double_min : 0x1 +Inf_plus > double_max : 0x1 +Inf_plus > float_min : 0x1 +Inf_plus > float_max : 0x1 +Inf_plus < zero_min : 0x0 +Inf_plus < zero_plus : 0x0 +Inf_plus < zero : 0x0 +Inf_plus < NaN : 0x0 +Inf_plus < Inf_plus : 0x0 +Inf_plus < Inf_min : 0x0 +Inf_plus < Inf : 0x0 +Inf_plus < long_max : 0x0 +Inf_plus < long_min : 0x0 +Inf_plus < int_max : 0x0 +Inf_plus < int_min : 0x0 +Inf_plus < uint_max : 0x0 +Inf_plus < ulong_max : 0x0 +Inf_plus < double_min : 0x0 +Inf_plus < double_max : 0x0 +Inf_plus < float_min : 0x0 +Inf_plus < float_max : 0x0 +Inf_plus >= zero_min : 0x1 +Inf_plus >= zero_plus : 0x1 +Inf_plus >= zero : 0x1 +Inf_plus >= NaN : 0x0 +Inf_plus >= Inf_plus : 0x1 +Inf_plus >= Inf_min : 0x1 +Inf_plus >= Inf : 0x1 +Inf_plus >= long_max : 0x1 +Inf_plus >= long_min : 0x1 +Inf_plus >= int_max : 0x1 +Inf_plus >= int_min : 0x1 +Inf_plus >= uint_max : 0x1 +Inf_plus >= ulong_max : 0x1 +Inf_plus >= double_min : 0x1 +Inf_plus >= double_max : 0x1 +Inf_plus >= float_min : 0x1 +Inf_plus >= float_max : 0x1 +Inf_plus <= zero_min : 0x0 +Inf_plus <= zero_plus : 0x0 +Inf_plus <= zero : 0x0 +Inf_plus <= NaN : 0x0 +Inf_plus <= Inf_plus : 0x1 +Inf_plus <= Inf_min : 0x0 +Inf_plus <= Inf : 0x1 +Inf_plus <= long_max : 0x0 +Inf_plus <= long_min : 0x0 +Inf_plus <= int_max : 0x0 +Inf_plus <= int_min : 0x0 +Inf_plus <= uint_max : 0x0 +Inf_plus <= ulong_max : 0x0 +Inf_plus <= double_min : 0x0 +Inf_plus <= double_max : 0x0 +Inf_plus <= float_min : 0x0 +Inf_plus <= float_max : 0x0 +Inf_plus == zero_min : 0x0 +Inf_plus == zero_plus : 0x0 +Inf_plus == zero : 0x0 +Inf_plus == NaN : 0x0 +Inf_plus == Inf_plus : 0x1 +Inf_plus == Inf_min : 0x0 +Inf_plus == Inf : 0x1 +Inf_plus == long_max : 0x0 +Inf_plus == long_min : 0x0 +Inf_plus == int_max : 0x0 +Inf_plus == int_min : 0x0 +Inf_plus == uint_max : 0x0 +Inf_plus == ulong_max : 0x0 +Inf_plus == double_min : 0x0 +Inf_plus == double_max : 0x0 +Inf_plus == float_min : 0x0 +Inf_plus == float_max : 0x0 +Inf_plus != zero_min : 0x1 +Inf_plus != zero_plus : 0x1 +Inf_plus != zero : 0x1 +Inf_plus != NaN : 0x1 +Inf_plus != Inf_plus : 0x0 +Inf_plus != Inf_min : 0x1 +Inf_plus != Inf : 0x0 +Inf_plus != long_max : 0x1 +Inf_plus != long_min : 0x1 +Inf_plus != int_max : 0x1 +Inf_plus != int_min : 0x1 +Inf_plus != uint_max : 0x1 +Inf_plus != ulong_max : 0x1 +Inf_plus != double_min : 0x1 +Inf_plus != double_max : 0x1 +Inf_plus != float_min : 0x1 +Inf_plus != float_max : 0x1 +Inf_plus * Inf_plus * zero_min : NaN +Inf_plus * Inf_plus * zero_plus : NaN +Inf_plus * Inf_plus * zero : NaN +Inf_plus * Inf_plus * NaN : NaN +Inf_plus * Inf_plus * Inf_plus : Inf +Inf_plus * Inf_plus * Inf_min : -Inf +Inf_plus * Inf_plus * Inf : Inf +Inf_plus * Inf_plus * long_max : Inf +Inf_plus * Inf_plus * long_min : -Inf +Inf_plus * Inf_plus * int_max : Inf +Inf_plus * Inf_plus * int_min : -Inf +Inf_plus * Inf_plus * uint_max : Inf +Inf_plus * Inf_plus * ulong_max : Inf +Inf_plus * Inf_plus * double_min : Inf +Inf_plus * Inf_plus * double_max : Inf +Inf_plus * Inf_plus * float_min : Inf +Inf_plus * Inf_plus * float_max : Inf +Inf_min / zero_min : Inf +Inf_min / zero_plus : -Inf +Inf_min / zero : -Inf +Inf_min / NaN : NaN +Inf_min / Inf_plus : NaN +Inf_min / Inf_min : NaN +Inf_min / Inf : NaN +Inf_min / long_max : -Inf +Inf_min / long_min : Inf +Inf_min / int_max : -Inf +Inf_min / int_min : Inf +Inf_min / uint_max : -Inf +Inf_min / ulong_max : -Inf +Inf_min / double_min : -Inf +Inf_min / double_max : -Inf +Inf_min / float_min : -Inf +Inf_min / float_max : -Inf +Inf_min * zero_min : NaN +Inf_min * zero_plus : NaN +Inf_min * zero : NaN +Inf_min * NaN : NaN +Inf_min * Inf_plus : -Inf +Inf_min * Inf_min : Inf +Inf_min * Inf : -Inf +Inf_min * long_max : -Inf +Inf_min * long_min : Inf +Inf_min * int_max : -Inf +Inf_min * int_min : Inf +Inf_min * uint_max : -Inf +Inf_min * ulong_max : -Inf +Inf_min * double_min : -Inf +Inf_min * double_max : -Inf +Inf_min * float_min : -Inf +Inf_min * float_max : -Inf +Inf_min + zero_min : -Inf +Inf_min + zero_plus : -Inf +Inf_min + zero : -Inf +Inf_min + NaN : NaN +Inf_min + Inf_plus : NaN +Inf_min + Inf_min : -Inf +Inf_min + Inf : NaN +Inf_min + long_max : -Inf +Inf_min + long_min : -Inf +Inf_min + int_max : -Inf +Inf_min + int_min : -Inf +Inf_min + uint_max : -Inf +Inf_min + ulong_max : -Inf +Inf_min + double_min : -Inf +Inf_min + double_max : -Inf +Inf_min + float_min : -Inf +Inf_min + float_max : -Inf +Inf_min - zero_min : -Inf +Inf_min - zero_plus : -Inf +Inf_min - zero : -Inf +Inf_min - NaN : NaN +Inf_min - Inf_plus : -Inf +Inf_min - Inf_min : NaN +Inf_min - Inf : -Inf +Inf_min - long_max : -Inf +Inf_min - long_min : -Inf +Inf_min - int_max : -Inf +Inf_min - int_min : -Inf +Inf_min - uint_max : -Inf +Inf_min - ulong_max : -Inf +Inf_min - double_min : -Inf +Inf_min - double_max : -Inf +Inf_min - float_min : -Inf +Inf_min - float_max : -Inf +Inf_min > zero_min : 0x0 +Inf_min > zero_plus : 0x0 +Inf_min > zero : 0x0 +Inf_min > NaN : 0x0 +Inf_min > Inf_plus : 0x0 +Inf_min > Inf_min : 0x0 +Inf_min > Inf : 0x0 +Inf_min > long_max : 0x0 +Inf_min > long_min : 0x0 +Inf_min > int_max : 0x0 +Inf_min > int_min : 0x0 +Inf_min > uint_max : 0x0 +Inf_min > ulong_max : 0x0 +Inf_min > double_min : 0x0 +Inf_min > double_max : 0x0 +Inf_min > float_min : 0x0 +Inf_min > float_max : 0x0 +Inf_min < zero_min : 0x1 +Inf_min < zero_plus : 0x1 +Inf_min < zero : 0x1 +Inf_min < NaN : 0x0 +Inf_min < Inf_plus : 0x1 +Inf_min < Inf_min : 0x0 +Inf_min < Inf : 0x1 +Inf_min < long_max : 0x1 +Inf_min < long_min : 0x1 +Inf_min < int_max : 0x1 +Inf_min < int_min : 0x1 +Inf_min < uint_max : 0x1 +Inf_min < ulong_max : 0x1 +Inf_min < double_min : 0x1 +Inf_min < double_max : 0x1 +Inf_min < float_min : 0x1 +Inf_min < float_max : 0x1 +Inf_min >= zero_min : 0x0 +Inf_min >= zero_plus : 0x0 +Inf_min >= zero : 0x0 +Inf_min >= NaN : 0x0 +Inf_min >= Inf_plus : 0x0 +Inf_min >= Inf_min : 0x1 +Inf_min >= Inf : 0x0 +Inf_min >= long_max : 0x0 +Inf_min >= long_min : 0x0 +Inf_min >= int_max : 0x0 +Inf_min >= int_min : 0x0 +Inf_min >= uint_max : 0x0 +Inf_min >= ulong_max : 0x0 +Inf_min >= double_min : 0x0 +Inf_min >= double_max : 0x0 +Inf_min >= float_min : 0x0 +Inf_min >= float_max : 0x0 +Inf_min <= zero_min : 0x1 +Inf_min <= zero_plus : 0x1 +Inf_min <= zero : 0x1 +Inf_min <= NaN : 0x0 +Inf_min <= Inf_plus : 0x1 +Inf_min <= Inf_min : 0x1 +Inf_min <= Inf : 0x1 +Inf_min <= long_max : 0x1 +Inf_min <= long_min : 0x1 +Inf_min <= int_max : 0x1 +Inf_min <= int_min : 0x1 +Inf_min <= uint_max : 0x1 +Inf_min <= ulong_max : 0x1 +Inf_min <= double_min : 0x1 +Inf_min <= double_max : 0x1 +Inf_min <= float_min : 0x1 +Inf_min <= float_max : 0x1 +Inf_min == zero_min : 0x0 +Inf_min == zero_plus : 0x0 +Inf_min == zero : 0x0 +Inf_min == NaN : 0x0 +Inf_min == Inf_plus : 0x0 +Inf_min == Inf_min : 0x1 +Inf_min == Inf : 0x0 +Inf_min == long_max : 0x0 +Inf_min == long_min : 0x0 +Inf_min == int_max : 0x0 +Inf_min == int_min : 0x0 +Inf_min == uint_max : 0x0 +Inf_min == ulong_max : 0x0 +Inf_min == double_min : 0x0 +Inf_min == double_max : 0x0 +Inf_min == float_min : 0x0 +Inf_min == float_max : 0x0 +Inf_min != zero_min : 0x1 +Inf_min != zero_plus : 0x1 +Inf_min != zero : 0x1 +Inf_min != NaN : 0x1 +Inf_min != Inf_plus : 0x1 +Inf_min != Inf_min : 0x0 +Inf_min != Inf : 0x1 +Inf_min != long_max : 0x1 +Inf_min != long_min : 0x1 +Inf_min != int_max : 0x1 +Inf_min != int_min : 0x1 +Inf_min != uint_max : 0x1 +Inf_min != ulong_max : 0x1 +Inf_min != double_min : 0x1 +Inf_min != double_max : 0x1 +Inf_min != float_min : 0x1 +Inf_min != float_max : 0x1 +Inf_min * Inf_min * zero_min : NaN +Inf_min * Inf_min * zero_plus : NaN +Inf_min * Inf_min * zero : NaN +Inf_min * Inf_min * NaN : NaN +Inf_min * Inf_min * Inf_plus : Inf +Inf_min * Inf_min * Inf_min : -Inf +Inf_min * Inf_min * Inf : Inf +Inf_min * Inf_min * long_max : Inf +Inf_min * Inf_min * long_min : -Inf +Inf_min * Inf_min * int_max : Inf +Inf_min * Inf_min * int_min : -Inf +Inf_min * Inf_min * uint_max : Inf +Inf_min * Inf_min * ulong_max : Inf +Inf_min * Inf_min * double_min : Inf +Inf_min * Inf_min * double_max : Inf +Inf_min * Inf_min * float_min : Inf +Inf_min * Inf_min * float_max : Inf +Inf / zero_min : -Inf +Inf / zero_plus : Inf +Inf / zero : Inf +Inf / NaN : NaN +Inf / Inf_plus : NaN +Inf / Inf_min : NaN +Inf / Inf : NaN +Inf / long_max : Inf +Inf / long_min : -Inf +Inf / int_max : Inf +Inf / int_min : -Inf +Inf / uint_max : Inf +Inf / ulong_max : Inf +Inf / double_min : Inf +Inf / double_max : Inf +Inf / float_min : Inf +Inf / float_max : Inf +Inf * zero_min : NaN +Inf * zero_plus : NaN +Inf * zero : NaN +Inf * NaN : NaN +Inf * Inf_plus : Inf +Inf * Inf_min : -Inf +Inf * Inf : Inf +Inf * long_max : Inf +Inf * long_min : -Inf +Inf * int_max : Inf +Inf * int_min : -Inf +Inf * uint_max : Inf +Inf * ulong_max : Inf +Inf * double_min : Inf +Inf * double_max : Inf +Inf * float_min : Inf +Inf * float_max : Inf +Inf + zero_min : Inf +Inf + zero_plus : Inf +Inf + zero : Inf +Inf + NaN : NaN +Inf + Inf_plus : Inf +Inf + Inf_min : NaN +Inf + Inf : Inf +Inf + long_max : Inf +Inf + long_min : Inf +Inf + int_max : Inf +Inf + int_min : Inf +Inf + uint_max : Inf +Inf + ulong_max : Inf +Inf + double_min : Inf +Inf + double_max : Inf +Inf + float_min : Inf +Inf + float_max : Inf +Inf - zero_min : Inf +Inf - zero_plus : Inf +Inf - zero : Inf +Inf - NaN : NaN +Inf - Inf_plus : NaN +Inf - Inf_min : Inf +Inf - Inf : NaN +Inf - long_max : Inf +Inf - long_min : Inf +Inf - int_max : Inf +Inf - int_min : Inf +Inf - uint_max : Inf +Inf - ulong_max : Inf +Inf - double_min : Inf +Inf - double_max : Inf +Inf - float_min : Inf +Inf - float_max : Inf +Inf > zero_min : 0x1 +Inf > zero_plus : 0x1 +Inf > zero : 0x1 +Inf > NaN : 0x0 +Inf > Inf_plus : 0x0 +Inf > Inf_min : 0x1 +Inf > Inf : 0x0 +Inf > long_max : 0x1 +Inf > long_min : 0x1 +Inf > int_max : 0x1 +Inf > int_min : 0x1 +Inf > uint_max : 0x1 +Inf > ulong_max : 0x1 +Inf > double_min : 0x1 +Inf > double_max : 0x1 +Inf > float_min : 0x1 +Inf > float_max : 0x1 +Inf < zero_min : 0x0 +Inf < zero_plus : 0x0 +Inf < zero : 0x0 +Inf < NaN : 0x0 +Inf < Inf_plus : 0x0 +Inf < Inf_min : 0x0 +Inf < Inf : 0x0 +Inf < long_max : 0x0 +Inf < long_min : 0x0 +Inf < int_max : 0x0 +Inf < int_min : 0x0 +Inf < uint_max : 0x0 +Inf < ulong_max : 0x0 +Inf < double_min : 0x0 +Inf < double_max : 0x0 +Inf < float_min : 0x0 +Inf < float_max : 0x0 +Inf >= zero_min : 0x1 +Inf >= zero_plus : 0x1 +Inf >= zero : 0x1 +Inf >= NaN : 0x0 +Inf >= Inf_plus : 0x1 +Inf >= Inf_min : 0x1 +Inf >= Inf : 0x1 +Inf >= long_max : 0x1 +Inf >= long_min : 0x1 +Inf >= int_max : 0x1 +Inf >= int_min : 0x1 +Inf >= uint_max : 0x1 +Inf >= ulong_max : 0x1 +Inf >= double_min : 0x1 +Inf >= double_max : 0x1 +Inf >= float_min : 0x1 +Inf >= float_max : 0x1 +Inf <= zero_min : 0x0 +Inf <= zero_plus : 0x0 +Inf <= zero : 0x0 +Inf <= NaN : 0x0 +Inf <= Inf_plus : 0x1 +Inf <= Inf_min : 0x0 +Inf <= Inf : 0x1 +Inf <= long_max : 0x0 +Inf <= long_min : 0x0 +Inf <= int_max : 0x0 +Inf <= int_min : 0x0 +Inf <= uint_max : 0x0 +Inf <= ulong_max : 0x0 +Inf <= double_min : 0x0 +Inf <= double_max : 0x0 +Inf <= float_min : 0x0 +Inf <= float_max : 0x0 +Inf == zero_min : 0x0 +Inf == zero_plus : 0x0 +Inf == zero : 0x0 +Inf == NaN : 0x0 +Inf == Inf_plus : 0x1 +Inf == Inf_min : 0x0 +Inf == Inf : 0x1 +Inf == long_max : 0x0 +Inf == long_min : 0x0 +Inf == int_max : 0x0 +Inf == int_min : 0x0 +Inf == uint_max : 0x0 +Inf == ulong_max : 0x0 +Inf == double_min : 0x0 +Inf == double_max : 0x0 +Inf == float_min : 0x0 +Inf == float_max : 0x0 +Inf != zero_min : 0x1 +Inf != zero_plus : 0x1 +Inf != zero : 0x1 +Inf != NaN : 0x1 +Inf != Inf_plus : 0x0 +Inf != Inf_min : 0x1 +Inf != Inf : 0x0 +Inf != long_max : 0x1 +Inf != long_min : 0x1 +Inf != int_max : 0x1 +Inf != int_min : 0x1 +Inf != uint_max : 0x1 +Inf != ulong_max : 0x1 +Inf != double_min : 0x1 +Inf != double_max : 0x1 +Inf != float_min : 0x1 +Inf != float_max : 0x1 +Inf * Inf * zero_min : NaN +Inf * Inf * zero_plus : NaN +Inf * Inf * zero : NaN +Inf * Inf * NaN : NaN +Inf * Inf * Inf_plus : Inf +Inf * Inf * Inf_min : -Inf +Inf * Inf * Inf : Inf +Inf * Inf * long_max : Inf +Inf * Inf * long_min : -Inf +Inf * Inf * int_max : Inf +Inf * Inf * int_min : -Inf +Inf * Inf * uint_max : Inf +Inf * Inf * ulong_max : Inf +Inf * Inf * double_min : Inf +Inf * Inf * double_max : Inf +Inf * Inf * float_min : Inf +Inf * Inf * float_max : Inf +****************** limits fx_float_long +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +long_max / zero_min : -Inf +long_max / zero_plus : Inf +long_max / zero : Inf +long_max / NaN : NaN +long_max / Inf_plus : 0x0 +long_max / Inf_min : 0x0 +long_max / Inf : 0x0 +long_max / long_max : 0x1 +long_max / long_min : 0xf.0000000000000002 +long_max / int_max : 0x100000002.00000002 +long_max / int_min : 0xf00000000.00000002 +long_max / uint_max : 0x080000000.7fffffff +long_max / ulong_max : 0x.7fffffffffffffff +long_max / double_min : 0x1fffffffffffffffce+255 +long_max / double_max : 0x.080000000000003ffe-239 +long_max / float_min : 0x1fffffffffffffffce+31 +long_max / float_max : 0x.08000008000007fffe-15 +long_max * zero_min : 0x0 +long_max * zero_plus : 0x0 +long_max * zero : 0x0 +long_max * NaN : NaN +long_max * Inf_plus : Inf +long_max * Inf_min : -Inf +long_max * Inf : Inf +long_max * long_max : 0x3fffffffffffffff0000000000000001 +long_max * long_min : 0xc0000000000000008e+15 +long_max * int_max : 0x3fffffff7fffffff80000001 +long_max * int_min : 0xc0000000000000008e+7 +long_max * uint_max : 0x7fffffff7fffffff00000001 +long_max * ulong_max : 0x7ffffffffffffffe8000000000000001 +long_max * double_min : 0x.1fffffffffffffffce-239 +long_max * double_max : 0x7ffffffffffffbff00000000000008e+242 +long_max * float_min : 0x.1fffffffffffffffce-15 +long_max * float_max : 0x7fffff7fffffffff000001e+26 +long_max + zero_min : 0x7fffffffffffffff +long_max + zero_plus : 0x7fffffffffffffff +long_max + zero : 0x7fffffffffffffff +long_max + NaN : NaN +long_max + Inf_plus : Inf +long_max + Inf_min : -Inf +long_max + Inf : Inf +long_max + long_max : 0x0fffffffffffffffe +long_max + long_min : 0xf +long_max + int_max : 0x0800000007ffffffe +long_max + int_min : 0x7fffffff7fffffff +long_max + uint_max : 0x080000000fffffffe +long_max + ulong_max : 0x17ffffffffffffffe +long_max + double_min : 0x7fffffffffffffff +long_max + double_max : 0x0fffffffffffff800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffffffffffff +long_max + float_min : 0x7fffffffffffffff.00000000000000000000000000000004 +long_max + float_max : 0x0ffffff00000000007fffffffffffffff +long_max - zero_min : 0x7fffffffffffffff +long_max - zero_plus : 0x7fffffffffffffff +long_max - zero : 0x7fffffffffffffff +long_max - NaN : NaN +long_max - Inf_plus : -Inf +long_max - Inf_min : Inf +long_max - Inf : -Inf +long_max - long_max : 0x0 +long_max - long_min : 0x0ffffffffffffffff +long_max - int_max : 0x7fffffff8e+7 +long_max - int_min : 0x0800000007fffffff +long_max - uint_max : 0x7fffffffe+8 +long_max - ulong_max : 0x8e+15 +long_max - double_min : 0x7fffffffffffffff +long_max - double_max : 0xf0000000000000800000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffffffffffff +long_max - float_min : 0x7ffffffffffffffe.fffffffffffffffffffffffffffffffc +long_max - float_max : 0xf00000100000000007fffffffffffffff +long_max > zero_min : 0x1 +long_max > zero_plus : 0x1 +long_max > zero : 0x1 +long_max > NaN : 0x0 +long_max > Inf_plus : 0x0 +long_max > Inf_min : 0x1 +long_max > Inf : 0x0 +long_max > long_max : 0x0 +long_max > long_min : 0x1 +long_max > int_max : 0x1 +long_max > int_min : 0x1 +long_max > uint_max : 0x1 +long_max > ulong_max : 0x0 +long_max > double_min : 0x1 +long_max > double_max : 0x0 +long_max > float_min : 0x1 +long_max > float_max : 0x0 +long_max < zero_min : 0x0 +long_max < zero_plus : 0x0 +long_max < zero : 0x0 +long_max < NaN : 0x0 +long_max < Inf_plus : 0x1 +long_max < Inf_min : 0x0 +long_max < Inf : 0x1 +long_max < long_max : 0x0 +long_max < long_min : 0x0 +long_max < int_max : 0x0 +long_max < int_min : 0x0 +long_max < uint_max : 0x0 +long_max < ulong_max : 0x1 +long_max < double_min : 0x0 +long_max < double_max : 0x1 +long_max < float_min : 0x0 +long_max < float_max : 0x1 +long_max >= zero_min : 0x1 +long_max >= zero_plus : 0x1 +long_max >= zero : 0x1 +long_max >= NaN : 0x0 +long_max >= Inf_plus : 0x0 +long_max >= Inf_min : 0x1 +long_max >= Inf : 0x0 +long_max >= long_max : 0x1 +long_max >= long_min : 0x1 +long_max >= int_max : 0x1 +long_max >= int_min : 0x1 +long_max >= uint_max : 0x1 +long_max >= ulong_max : 0x0 +long_max >= double_min : 0x1 +long_max >= double_max : 0x0 +long_max >= float_min : 0x1 +long_max >= float_max : 0x0 +long_max <= zero_min : 0x0 +long_max <= zero_plus : 0x0 +long_max <= zero : 0x0 +long_max <= NaN : 0x0 +long_max <= Inf_plus : 0x1 +long_max <= Inf_min : 0x0 +long_max <= Inf : 0x1 +long_max <= long_max : 0x1 +long_max <= long_min : 0x0 +long_max <= int_max : 0x0 +long_max <= int_min : 0x0 +long_max <= uint_max : 0x0 +long_max <= ulong_max : 0x1 +long_max <= double_min : 0x0 +long_max <= double_max : 0x1 +long_max <= float_min : 0x0 +long_max <= float_max : 0x1 +long_max == zero_min : 0x0 +long_max == zero_plus : 0x0 +long_max == zero : 0x0 +long_max == NaN : 0x0 +long_max == Inf_plus : 0x0 +long_max == Inf_min : 0x0 +long_max == Inf : 0x0 +long_max == long_max : 0x1 +long_max == long_min : 0x0 +long_max == int_max : 0x0 +long_max == int_min : 0x0 +long_max == uint_max : 0x0 +long_max == ulong_max : 0x0 +long_max == double_min : 0x0 +long_max == double_max : 0x0 +long_max == float_min : 0x0 +long_max == float_max : 0x0 +long_max != zero_min : 0x1 +long_max != zero_plus : 0x1 +long_max != zero : 0x1 +long_max != NaN : 0x1 +long_max != Inf_plus : 0x1 +long_max != Inf_min : 0x1 +long_max != Inf : 0x1 +long_max != long_max : 0x0 +long_max != long_min : 0x1 +long_max != int_max : 0x1 +long_max != int_min : 0x1 +long_max != uint_max : 0x1 +long_max != ulong_max : 0x1 +long_max != double_min : 0x1 +long_max != double_max : 0x1 +long_max != float_min : 0x1 +long_max != float_max : 0x1 +long_max * long_max * zero_min : 0x0 +long_max * long_max * zero_plus : 0x0 +long_max * long_max * zero : 0x0 +long_max * long_max * NaN : NaN +long_max * long_max * Inf_plus : Inf +long_max * long_max * Inf_min : -Inf +long_max * long_max * Inf : Inf +long_max * long_max * long_max : 0x1fffffffffffffff40000000000000017fffffffffffffff +long_max * long_max * long_min : 0xe0000000000000007fffffffffffffff8e+15 +long_max * long_max * int_max : 0x1fffffffbfffffff80000001000000007fffffff +long_max * long_max * int_min : 0xe0000000000000007fffffffffffffff8e+7 +long_max * long_max * uint_max : 0x3fffffffbfffffff0000000100000000ffffffff +long_max * long_max * ulong_max : 0x3ffffffffffffffec000000000000001ffffffffffffffff +long_max * long_max * double_min : 0x.0fffffffffffffffc0000000000000004e-223 +long_max * long_max * double_max : 0x3ffffffffffffdff0000000000000800fffffffffffff8e+242 +long_max * long_max * float_min : 0x0.fffffffffffffffc0000000000000004 +long_max * long_max * float_max : 0x3fffffbfffffffff0000010000000000ffffffe+26 +long_min / zero_min : Inf +long_min / zero_plus : -Inf +long_min / zero : -Inf +long_min / NaN : NaN +long_min / Inf_plus : 0x0 +long_min / Inf_min : 0x0 +long_min / Inf : 0x0 +long_min / long_max : 0xe.fffffffffffffffe +long_min / long_min : 0x1 +long_min / int_max : 0xefffffffd.fffffffc +long_min / int_min : 0x1e+8 +long_min / uint_max : 0xf7fffffff.8 +long_min / ulong_max : 0x.8 +long_min / double_min : 0xee+271 +long_min / double_max : 0x.f7ffffffffffffce-239 +long_min / float_min : 0xee+47 +long_min / float_max : 0x.f7fffff7fffff8e-15 +long_min * zero_min : 0x0 +long_min * zero_plus : 0x0 +long_min * zero : 0x0 +long_min * NaN : NaN +long_min * Inf_plus : -Inf +long_min * Inf_min : Inf +long_min * Inf : -Inf +long_min * long_max : 0xc0000000000000008e+15 +long_min * long_min : 0x4e+31 +long_min * int_max : 0xc00000008e+15 +long_min * int_min : 0x4e+23 +long_min * uint_max : 0x800000008e+15 +long_min * ulong_max : 0x80000000000000008e+15 +long_min * double_min : 0x.ee-239 +long_min * double_max : 0x80000000000004e+258 +long_min * float_min : 0x.ee-15 +long_min * float_max : 0x8000008e+41 +long_min + zero_min : 0x8e+15 +long_min + zero_plus : 0x8e+15 +long_min + zero : 0x8e+15 +long_min + NaN : NaN +long_min + Inf_plus : Inf +long_min + Inf_min : -Inf +long_min + Inf : Inf +long_min + long_max : 0xf +long_min + long_min : 0xfe+16 +long_min + int_max : 0x800000007fffffff +long_min + int_min : 0xf7fffffff8e+7 +long_min + uint_max : 0x80000000ffffffff +long_min + ulong_max : 0x7fffffffffffffff +long_min + double_min : 0x8e+15 +long_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+15 +long_min + float_min : 0x8000000000000000.00000000000000000000000000000004 +long_min + float_max : 0x0fffffeffffffffff8e+15 +long_min - zero_min : 0x8e+15 +long_min - zero_plus : 0x8e+15 +long_min - zero : 0x8e+15 +long_min - NaN : NaN +long_min - Inf_plus : -Inf +long_min - Inf_min : Inf +long_min - Inf : -Inf +long_min - long_max : 0xf0000000000000001 +long_min - long_min : 0x0 +long_min - int_max : 0xf7fffffff80000001 +long_min - int_min : 0x800000008e+7 +long_min - uint_max : 0xf7fffffff00000001 +long_min - ulong_max : 0xe8000000000000001 +long_min - double_min : 0x8e+15 +long_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+15 +long_min - float_min : 0xf7fffffffffffffff.fffffffffffffffffffffffffffffffc +long_min - float_max : 0xf000000ffffffffff8e+15 +long_min > zero_min : 0x0 +long_min > zero_plus : 0x0 +long_min > zero : 0x0 +long_min > NaN : 0x0 +long_min > Inf_plus : 0x0 +long_min > Inf_min : 0x1 +long_min > Inf : 0x0 +long_min > long_max : 0x0 +long_min > long_min : 0x0 +long_min > int_max : 0x0 +long_min > int_min : 0x0 +long_min > uint_max : 0x0 +long_min > ulong_max : 0x0 +long_min > double_min : 0x0 +long_min > double_max : 0x0 +long_min > float_min : 0x0 +long_min > float_max : 0x0 +long_min < zero_min : 0x1 +long_min < zero_plus : 0x1 +long_min < zero : 0x1 +long_min < NaN : 0x0 +long_min < Inf_plus : 0x1 +long_min < Inf_min : 0x0 +long_min < Inf : 0x1 +long_min < long_max : 0x1 +long_min < long_min : 0x0 +long_min < int_max : 0x1 +long_min < int_min : 0x1 +long_min < uint_max : 0x1 +long_min < ulong_max : 0x1 +long_min < double_min : 0x1 +long_min < double_max : 0x1 +long_min < float_min : 0x1 +long_min < float_max : 0x1 +long_min >= zero_min : 0x0 +long_min >= zero_plus : 0x0 +long_min >= zero : 0x0 +long_min >= NaN : 0x0 +long_min >= Inf_plus : 0x0 +long_min >= Inf_min : 0x1 +long_min >= Inf : 0x0 +long_min >= long_max : 0x0 +long_min >= long_min : 0x1 +long_min >= int_max : 0x0 +long_min >= int_min : 0x0 +long_min >= uint_max : 0x0 +long_min >= ulong_max : 0x0 +long_min >= double_min : 0x0 +long_min >= double_max : 0x0 +long_min >= float_min : 0x0 +long_min >= float_max : 0x0 +long_min <= zero_min : 0x1 +long_min <= zero_plus : 0x1 +long_min <= zero : 0x1 +long_min <= NaN : 0x0 +long_min <= Inf_plus : 0x1 +long_min <= Inf_min : 0x0 +long_min <= Inf : 0x1 +long_min <= long_max : 0x1 +long_min <= long_min : 0x1 +long_min <= int_max : 0x1 +long_min <= int_min : 0x1 +long_min <= uint_max : 0x1 +long_min <= ulong_max : 0x1 +long_min <= double_min : 0x1 +long_min <= double_max : 0x1 +long_min <= float_min : 0x1 +long_min <= float_max : 0x1 +long_min == zero_min : 0x0 +long_min == zero_plus : 0x0 +long_min == zero : 0x0 +long_min == NaN : 0x0 +long_min == Inf_plus : 0x0 +long_min == Inf_min : 0x0 +long_min == Inf : 0x0 +long_min == long_max : 0x0 +long_min == long_min : 0x1 +long_min == int_max : 0x0 +long_min == int_min : 0x0 +long_min == uint_max : 0x0 +long_min == ulong_max : 0x0 +long_min == double_min : 0x0 +long_min == double_max : 0x0 +long_min == float_min : 0x0 +long_min == float_max : 0x0 +long_min != zero_min : 0x1 +long_min != zero_plus : 0x1 +long_min != zero : 0x1 +long_min != NaN : 0x1 +long_min != Inf_plus : 0x1 +long_min != Inf_min : 0x1 +long_min != Inf : 0x1 +long_min != long_max : 0x1 +long_min != long_min : 0x0 +long_min != int_max : 0x1 +long_min != int_min : 0x1 +long_min != uint_max : 0x1 +long_min != ulong_max : 0x1 +long_min != double_min : 0x1 +long_min != double_max : 0x1 +long_min != float_min : 0x1 +long_min != float_max : 0x1 +long_min * long_min * zero_min : 0x0 +long_min * long_min * zero_plus : 0x0 +long_min * long_min * zero : 0x0 +long_min * long_min * NaN : NaN +long_min * long_min * Inf_plus : Inf +long_min * long_min * Inf_min : -Inf +long_min * long_min * Inf : Inf +long_min * long_min * long_max : 0x1fffffffffffffffce+31 +long_min * long_min * long_min : 0xee+47 +long_min * long_min * int_max : 0x1fffffffce+31 +long_min * long_min * int_min : 0xee+39 +long_min * long_min * uint_max : 0x3fffffffce+31 +long_min * long_min * ulong_max : 0x3fffffffffffffffce+31 +long_min * long_min * double_min : 0x.1e-223 +long_min * long_min * double_max : 0x3ffffffffffffee+274 +long_min * long_min * float_min : 0x1 +long_min * long_min * float_max : 0x3fffffce+57 +int_max / zero_min : -Inf +int_max / zero_plus : Inf +int_max / zero : Inf +int_max / NaN : NaN +int_max / Inf_plus : 0x0 +int_max / Inf_min : 0x0 +int_max / Inf : 0x0 +int_max / long_max : 0x.0fffffffe00000001e-7 +int_max / long_min : 0x.f00000002e-7 +int_max / int_max : 0x1 +int_max / int_min : 0xf.00000002 +int_max / uint_max : 0x.7fffffff7fffffff +int_max / ulong_max : 0x.7fffffffe-8 +int_max / double_min : 0x1fffffffce+255 +int_max / double_max : 0x.7fffffff000004e-248 +int_max / float_min : 0x1fffffffce+31 +int_max / float_max : 0x.08000007f00007fe-23 +int_max * zero_min : 0x0 +int_max * zero_plus : 0x0 +int_max * zero : 0x0 +int_max * NaN : NaN +int_max * Inf_plus : Inf +int_max * Inf_min : -Inf +int_max * Inf : Inf +int_max * long_max : 0x3fffffff7fffffff80000001 +int_max * long_min : 0xc00000008e+15 +int_max * int_max : 0x3fffffff00000001 +int_max * int_min : 0xc00000008e+7 +int_max * uint_max : 0x7ffffffe80000001 +int_max * ulong_max : 0x7ffffffeffffffff80000001 +int_max * double_min : 0x.1fffffffce-247 +int_max * double_max : 0x7ffffffefffffc00000008e+242 +int_max * float_min : 0x.1fffffffce-23 +int_max * float_max : 0x7fffff7f000001e+26 +int_max + zero_min : 0x7fffffff +int_max + zero_plus : 0x7fffffff +int_max + zero : 0x7fffffff +int_max + NaN : NaN +int_max + Inf_plus : Inf +int_max + Inf_min : -Inf +int_max + Inf : Inf +int_max + long_max : 0x0800000007ffffffe +int_max + long_min : 0x800000007fffffff +int_max + int_max : 0x0fffffffe +int_max + int_min : 0xf +int_max + uint_max : 0x17ffffffe +int_max + ulong_max : 0x1000000007ffffffe +int_max + double_min : 0x7fffffff +int_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max + float_min : 0x7fffffff.00000000000000000000000000000004 +int_max + float_max : 0x0ffffff0000000000000000007fffffff +int_max - zero_min : 0x7fffffff +int_max - zero_plus : 0x7fffffff +int_max - zero : 0x7fffffff +int_max - NaN : NaN +int_max - Inf_plus : -Inf +int_max - Inf_min : Inf +int_max - Inf : -Inf +int_max - long_max : 0x800000008e+7 +int_max - long_min : 0x0800000007fffffff +int_max - int_max : 0x0 +int_max - int_min : 0x0ffffffff +int_max - uint_max : 0x8e+7 +int_max - ulong_max : 0xf000000008e+7 +int_max - double_min : 0x7fffffff +int_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007fffffff +int_max - float_min : 0x7ffffffe.fffffffffffffffffffffffffffffffc +int_max - float_max : 0xf0000010000000000000000007fffffff +int_max > zero_min : 0x1 +int_max > zero_plus : 0x1 +int_max > zero : 0x1 +int_max > NaN : 0x0 +int_max > Inf_plus : 0x0 +int_max > Inf_min : 0x1 +int_max > Inf : 0x0 +int_max > long_max : 0x0 +int_max > long_min : 0x1 +int_max > int_max : 0x0 +int_max > int_min : 0x1 +int_max > uint_max : 0x0 +int_max > ulong_max : 0x0 +int_max > double_min : 0x1 +int_max > double_max : 0x0 +int_max > float_min : 0x1 +int_max > float_max : 0x0 +int_max < zero_min : 0x0 +int_max < zero_plus : 0x0 +int_max < zero : 0x0 +int_max < NaN : 0x0 +int_max < Inf_plus : 0x1 +int_max < Inf_min : 0x0 +int_max < Inf : 0x1 +int_max < long_max : 0x1 +int_max < long_min : 0x0 +int_max < int_max : 0x0 +int_max < int_min : 0x0 +int_max < uint_max : 0x1 +int_max < ulong_max : 0x1 +int_max < double_min : 0x0 +int_max < double_max : 0x1 +int_max < float_min : 0x0 +int_max < float_max : 0x1 +int_max >= zero_min : 0x1 +int_max >= zero_plus : 0x1 +int_max >= zero : 0x1 +int_max >= NaN : 0x0 +int_max >= Inf_plus : 0x0 +int_max >= Inf_min : 0x1 +int_max >= Inf : 0x0 +int_max >= long_max : 0x0 +int_max >= long_min : 0x1 +int_max >= int_max : 0x1 +int_max >= int_min : 0x1 +int_max >= uint_max : 0x0 +int_max >= ulong_max : 0x0 +int_max >= double_min : 0x1 +int_max >= double_max : 0x0 +int_max >= float_min : 0x1 +int_max >= float_max : 0x0 +int_max <= zero_min : 0x0 +int_max <= zero_plus : 0x0 +int_max <= zero : 0x0 +int_max <= NaN : 0x0 +int_max <= Inf_plus : 0x1 +int_max <= Inf_min : 0x0 +int_max <= Inf : 0x1 +int_max <= long_max : 0x1 +int_max <= long_min : 0x0 +int_max <= int_max : 0x1 +int_max <= int_min : 0x0 +int_max <= uint_max : 0x1 +int_max <= ulong_max : 0x1 +int_max <= double_min : 0x0 +int_max <= double_max : 0x1 +int_max <= float_min : 0x0 +int_max <= float_max : 0x1 +int_max == zero_min : 0x0 +int_max == zero_plus : 0x0 +int_max == zero : 0x0 +int_max == NaN : 0x0 +int_max == Inf_plus : 0x0 +int_max == Inf_min : 0x0 +int_max == Inf : 0x0 +int_max == long_max : 0x0 +int_max == long_min : 0x0 +int_max == int_max : 0x1 +int_max == int_min : 0x0 +int_max == uint_max : 0x0 +int_max == ulong_max : 0x0 +int_max == double_min : 0x0 +int_max == double_max : 0x0 +int_max == float_min : 0x0 +int_max == float_max : 0x0 +int_max != zero_min : 0x1 +int_max != zero_plus : 0x1 +int_max != zero : 0x1 +int_max != NaN : 0x1 +int_max != Inf_plus : 0x1 +int_max != Inf_min : 0x1 +int_max != Inf : 0x1 +int_max != long_max : 0x1 +int_max != long_min : 0x1 +int_max != int_max : 0x0 +int_max != int_min : 0x1 +int_max != uint_max : 0x1 +int_max != ulong_max : 0x1 +int_max != double_min : 0x1 +int_max != double_max : 0x1 +int_max != float_min : 0x1 +int_max != float_max : 0x1 +int_max * int_max * zero_min : 0x0 +int_max * int_max * zero_plus : 0x0 +int_max * int_max * zero : 0x0 +int_max * int_max * NaN : NaN +int_max * int_max * Inf_plus : Inf +int_max * int_max * Inf_min : -Inf +int_max * int_max * Inf : Inf +int_max * int_max * long_max : 0x1fffffff8000000040000000ffffffff +int_max * int_max * long_min : 0xe00000007fffffff8e+15 +int_max * int_max * int_max : 0x1fffffff400000017fffffff +int_max * int_max * int_min : 0xe00000007fffffff8e+7 +int_max * int_max * uint_max : 0x3ffffffec0000001ffffffff +int_max * int_max * ulong_max : 0x3fffffff00000000c0000000ffffffff +int_max * int_max * double_min : 0x.0fffffffc00000004e-239 +int_max * int_max * double_max : 0x3ffffffefffffe01000007fffffff8e+242 +int_max * int_max * float_min : 0x.0fffffffc00000004e-15 +int_max * int_max * float_max : 0x3fffffbf00000100ffffffe+26 +int_min / zero_min : Inf +int_min / zero_plus : -Inf +int_min / zero : -Inf +int_min / NaN : NaN +int_min / Inf_plus : 0x0 +int_min / Inf_min : 0x0 +int_min / Inf : 0x0 +int_min / long_max : 0x.efffffffffffffffee-7 +int_min / long_min : 0x.1e-7 +int_min / int_max : 0xe.fffffffdfffffffc +int_min / int_min : 0x1 +int_min / uint_max : 0xf.7fffffff8 +int_min / ulong_max : 0x.8e-8 +int_min / double_min : 0xee+263 +int_min / double_max : 0x.f7ffffffffffffce-247 +int_min / float_min : 0xee+39 +int_min / float_max : 0x.f7fffff7fffff8e-23 +int_min * zero_min : 0x0 +int_min * zero_plus : 0x0 +int_min * zero : 0x0 +int_min * NaN : NaN +int_min * Inf_plus : -Inf +int_min * Inf_min : Inf +int_min * Inf : -Inf +int_min * long_max : 0xc0000000000000008e+7 +int_min * long_min : 0x4e+23 +int_min * int_max : 0xc00000008e+7 +int_min * int_min : 0x4e+15 +int_min * uint_max : 0x800000008e+7 +int_min * ulong_max : 0x80000000000000008e+7 +int_min * double_min : 0x.ee-247 +int_min * double_max : 0x80000000000004e+250 +int_min * float_min : 0x.ee-23 +int_min * float_max : 0x8000008e+33 +int_min + zero_min : 0x8e+7 +int_min + zero_plus : 0x8e+7 +int_min + zero : 0x8e+7 +int_min + NaN : NaN +int_min + Inf_plus : Inf +int_min + Inf_min : -Inf +int_min + Inf : Inf +int_min + long_max : 0x7fffffff7fffffff +int_min + long_min : 0xf7fffffff8e+7 +int_min + int_max : 0xf +int_min + int_min : 0xfe+8 +int_min + uint_max : 0x7fffffff +int_min + ulong_max : 0x0ffffffff7fffffff +int_min + double_min : 0x8e+7 +int_min + double_max : 0x0fffffffffffff7ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min + float_min : 0x80000000.00000000000000000000000000000004 +int_min + float_max : 0x0fffffeffffffffffffffffff8e+7 +int_min - zero_min : 0x8e+7 +int_min - zero_plus : 0x8e+7 +int_min - zero : 0x8e+7 +int_min - NaN : NaN +int_min - Inf_plus : -Inf +int_min - Inf_min : Inf +int_min - Inf : -Inf +int_min - long_max : 0xf7fffffff80000001 +int_min - long_min : 0x7fffffff8e+7 +int_min - int_max : 0xf00000001 +int_min - int_min : 0x0 +int_min - uint_max : 0xe80000001 +int_min - ulong_max : 0xeffffffff80000001 +int_min - double_min : 0x8e+7 +int_min - double_max : 0xf00000000000007ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8e+7 +int_min - float_min : 0xf7fffffff.fffffffffffffffffffffffffffffffc +int_min - float_max : 0xf000000ffffffffffffffffff8e+7 +int_min > zero_min : 0x0 +int_min > zero_plus : 0x0 +int_min > zero : 0x0 +int_min > NaN : 0x0 +int_min > Inf_plus : 0x0 +int_min > Inf_min : 0x1 +int_min > Inf : 0x0 +int_min > long_max : 0x0 +int_min > long_min : 0x1 +int_min > int_max : 0x0 +int_min > int_min : 0x0 +int_min > uint_max : 0x0 +int_min > ulong_max : 0x0 +int_min > double_min : 0x0 +int_min > double_max : 0x0 +int_min > float_min : 0x0 +int_min > float_max : 0x0 +int_min < zero_min : 0x1 +int_min < zero_plus : 0x1 +int_min < zero : 0x1 +int_min < NaN : 0x0 +int_min < Inf_plus : 0x1 +int_min < Inf_min : 0x0 +int_min < Inf : 0x1 +int_min < long_max : 0x1 +int_min < long_min : 0x0 +int_min < int_max : 0x1 +int_min < int_min : 0x0 +int_min < uint_max : 0x1 +int_min < ulong_max : 0x1 +int_min < double_min : 0x1 +int_min < double_max : 0x1 +int_min < float_min : 0x1 +int_min < float_max : 0x1 +int_min >= zero_min : 0x0 +int_min >= zero_plus : 0x0 +int_min >= zero : 0x0 +int_min >= NaN : 0x0 +int_min >= Inf_plus : 0x0 +int_min >= Inf_min : 0x1 +int_min >= Inf : 0x0 +int_min >= long_max : 0x0 +int_min >= long_min : 0x1 +int_min >= int_max : 0x0 +int_min >= int_min : 0x1 +int_min >= uint_max : 0x0 +int_min >= ulong_max : 0x0 +int_min >= double_min : 0x0 +int_min >= double_max : 0x0 +int_min >= float_min : 0x0 +int_min >= float_max : 0x0 +int_min <= zero_min : 0x1 +int_min <= zero_plus : 0x1 +int_min <= zero : 0x1 +int_min <= NaN : 0x0 +int_min <= Inf_plus : 0x1 +int_min <= Inf_min : 0x0 +int_min <= Inf : 0x1 +int_min <= long_max : 0x1 +int_min <= long_min : 0x0 +int_min <= int_max : 0x1 +int_min <= int_min : 0x1 +int_min <= uint_max : 0x1 +int_min <= ulong_max : 0x1 +int_min <= double_min : 0x1 +int_min <= double_max : 0x1 +int_min <= float_min : 0x1 +int_min <= float_max : 0x1 +int_min == zero_min : 0x0 +int_min == zero_plus : 0x0 +int_min == zero : 0x0 +int_min == NaN : 0x0 +int_min == Inf_plus : 0x0 +int_min == Inf_min : 0x0 +int_min == Inf : 0x0 +int_min == long_max : 0x0 +int_min == long_min : 0x0 +int_min == int_max : 0x0 +int_min == int_min : 0x1 +int_min == uint_max : 0x0 +int_min == ulong_max : 0x0 +int_min == double_min : 0x0 +int_min == double_max : 0x0 +int_min == float_min : 0x0 +int_min == float_max : 0x0 +int_min != zero_min : 0x1 +int_min != zero_plus : 0x1 +int_min != zero : 0x1 +int_min != NaN : 0x1 +int_min != Inf_plus : 0x1 +int_min != Inf_min : 0x1 +int_min != Inf : 0x1 +int_min != long_max : 0x1 +int_min != long_min : 0x1 +int_min != int_max : 0x1 +int_min != int_min : 0x0 +int_min != uint_max : 0x1 +int_min != ulong_max : 0x1 +int_min != double_min : 0x1 +int_min != double_max : 0x1 +int_min != float_min : 0x1 +int_min != float_max : 0x1 +int_min * int_min * zero_min : 0x0 +int_min * int_min * zero_plus : 0x0 +int_min * int_min * zero : 0x0 +int_min * int_min * NaN : NaN +int_min * int_min * Inf_plus : Inf +int_min * int_min * Inf_min : -Inf +int_min * int_min * Inf : Inf +int_min * int_min * long_max : 0x1fffffffffffffffce+15 +int_min * int_min * long_min : 0xee+31 +int_min * int_min * int_max : 0x1fffffffce+15 +int_min * int_min * int_min : 0xee+23 +int_min * int_min * uint_max : 0x3fffffffce+15 +int_min * int_min * ulong_max : 0x3fffffffffffffffce+15 +int_min * int_min * double_min : 0x.1e-239 +int_min * int_min * double_max : 0x3ffffffffffffee+258 +int_min * int_min * float_min : 0x.1e-15 +int_min * int_min * float_max : 0x3fffffce+41 +uint_max / zero_min : -Inf +uint_max / zero_plus : Inf +uint_max / zero : Inf +uint_max / NaN : NaN +uint_max / Inf_plus : 0x0 +uint_max / Inf_min : 0x0 +uint_max / Inf : 0x0 +uint_max / long_max : 0x.1fffffffe00000002e-7 +uint_max / long_min : 0x.e00000002e-7 +uint_max / int_max : 0x2.0000000200000004 +uint_max / int_min : 0xe.00000002 +uint_max / uint_max : 0x1 +uint_max / ulong_max : 0x.0ffffffffe-7 +uint_max / double_min : 0x3fffffffce+255 +uint_max / double_max : 0x.0ffffffff000008e-247 +uint_max / float_min : 0x3fffffffce+31 +uint_max / float_max : 0x.1000000ff0000ffe-23 +uint_max * zero_min : 0x0 +uint_max * zero_plus : 0x0 +uint_max * zero : 0x0 +uint_max * NaN : NaN +uint_max * Inf_plus : Inf +uint_max * Inf_min : -Inf +uint_max * Inf : Inf +uint_max * long_max : 0x7fffffff7fffffff00000001 +uint_max * long_min : 0x800000008e+15 +uint_max * int_max : 0x7ffffffe80000001 +uint_max * int_min : 0x800000008e+7 +uint_max * uint_max : 0x0fffffffe00000001 +uint_max * ulong_max : 0x0fffffffeffffffff00000001 +uint_max * double_min : 0x.3fffffffce-247 +uint_max * double_max : 0x0fffffffefffff800000008e+242 +uint_max * float_min : 0x.3fffffffce-23 +uint_max * float_max : 0x0fffffeff000001e+26 +uint_max + zero_min : 0x0ffffffff +uint_max + zero_plus : 0x0ffffffff +uint_max + zero : 0x0ffffffff +uint_max + NaN : NaN +uint_max + Inf_plus : Inf +uint_max + Inf_min : -Inf +uint_max + Inf : Inf +uint_max + long_max : 0x080000000fffffffe +uint_max + long_min : 0x80000000ffffffff +uint_max + int_max : 0x17ffffffe +uint_max + int_min : 0x7fffffff +uint_max + uint_max : 0x1fffffffe +uint_max + ulong_max : 0x100000000fffffffe +uint_max + double_min : 0x0ffffffff +uint_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max + float_min : 0x0ffffffff.00000000000000000000000000000004 +uint_max + float_max : 0x0ffffff000000000000000000ffffffff +uint_max - zero_min : 0x0ffffffff +uint_max - zero_plus : 0x0ffffffff +uint_max - zero : 0x0ffffffff +uint_max - NaN : NaN +uint_max - Inf_plus : -Inf +uint_max - Inf_min : Inf +uint_max - Inf : -Inf +uint_max - long_max : 0x80000001e+8 +uint_max - long_min : 0x080000000ffffffff +uint_max - int_max : 0x08e+7 +uint_max - int_min : 0x17fffffff +uint_max - uint_max : 0x0 +uint_max - ulong_max : 0xf00000001e+8 +uint_max - double_min : 0x0ffffffff +uint_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffff +uint_max - float_min : 0x0fffffffe.fffffffffffffffffffffffffffffffc +uint_max - float_max : 0xf000001000000000000000000ffffffff +uint_max > zero_min : 0x1 +uint_max > zero_plus : 0x1 +uint_max > zero : 0x1 +uint_max > NaN : 0x0 +uint_max > Inf_plus : 0x0 +uint_max > Inf_min : 0x1 +uint_max > Inf : 0x0 +uint_max > long_max : 0x0 +uint_max > long_min : 0x1 +uint_max > int_max : 0x1 +uint_max > int_min : 0x1 +uint_max > uint_max : 0x0 +uint_max > ulong_max : 0x0 +uint_max > double_min : 0x1 +uint_max > double_max : 0x0 +uint_max > float_min : 0x1 +uint_max > float_max : 0x0 +uint_max < zero_min : 0x0 +uint_max < zero_plus : 0x0 +uint_max < zero : 0x0 +uint_max < NaN : 0x0 +uint_max < Inf_plus : 0x1 +uint_max < Inf_min : 0x0 +uint_max < Inf : 0x1 +uint_max < long_max : 0x1 +uint_max < long_min : 0x0 +uint_max < int_max : 0x0 +uint_max < int_min : 0x0 +uint_max < uint_max : 0x0 +uint_max < ulong_max : 0x1 +uint_max < double_min : 0x0 +uint_max < double_max : 0x1 +uint_max < float_min : 0x0 +uint_max < float_max : 0x1 +uint_max >= zero_min : 0x1 +uint_max >= zero_plus : 0x1 +uint_max >= zero : 0x1 +uint_max >= NaN : 0x0 +uint_max >= Inf_plus : 0x0 +uint_max >= Inf_min : 0x1 +uint_max >= Inf : 0x0 +uint_max >= long_max : 0x0 +uint_max >= long_min : 0x1 +uint_max >= int_max : 0x1 +uint_max >= int_min : 0x1 +uint_max >= uint_max : 0x1 +uint_max >= ulong_max : 0x0 +uint_max >= double_min : 0x1 +uint_max >= double_max : 0x0 +uint_max >= float_min : 0x1 +uint_max >= float_max : 0x0 +uint_max <= zero_min : 0x0 +uint_max <= zero_plus : 0x0 +uint_max <= zero : 0x0 +uint_max <= NaN : 0x0 +uint_max <= Inf_plus : 0x1 +uint_max <= Inf_min : 0x0 +uint_max <= Inf : 0x1 +uint_max <= long_max : 0x1 +uint_max <= long_min : 0x0 +uint_max <= int_max : 0x0 +uint_max <= int_min : 0x0 +uint_max <= uint_max : 0x1 +uint_max <= ulong_max : 0x1 +uint_max <= double_min : 0x0 +uint_max <= double_max : 0x1 +uint_max <= float_min : 0x0 +uint_max <= float_max : 0x1 +uint_max == zero_min : 0x0 +uint_max == zero_plus : 0x0 +uint_max == zero : 0x0 +uint_max == NaN : 0x0 +uint_max == Inf_plus : 0x0 +uint_max == Inf_min : 0x0 +uint_max == Inf : 0x0 +uint_max == long_max : 0x0 +uint_max == long_min : 0x0 +uint_max == int_max : 0x0 +uint_max == int_min : 0x0 +uint_max == uint_max : 0x1 +uint_max == ulong_max : 0x0 +uint_max == double_min : 0x0 +uint_max == double_max : 0x0 +uint_max == float_min : 0x0 +uint_max == float_max : 0x0 +uint_max != zero_min : 0x1 +uint_max != zero_plus : 0x1 +uint_max != zero : 0x1 +uint_max != NaN : 0x1 +uint_max != Inf_plus : 0x1 +uint_max != Inf_min : 0x1 +uint_max != Inf : 0x1 +uint_max != long_max : 0x1 +uint_max != long_min : 0x1 +uint_max != int_max : 0x1 +uint_max != int_min : 0x1 +uint_max != uint_max : 0x0 +uint_max != ulong_max : 0x1 +uint_max != double_min : 0x1 +uint_max != double_max : 0x1 +uint_max != float_min : 0x1 +uint_max != float_max : 0x1 +uint_max * uint_max * zero_min : 0x0 +uint_max * uint_max * zero_plus : 0x0 +uint_max * uint_max * zero : 0x0 +uint_max * uint_max * NaN : NaN +uint_max * uint_max * Inf_plus : Inf +uint_max * uint_max * Inf_min : -Inf +uint_max * uint_max * Inf : Inf +uint_max * uint_max * long_max : 0x7ffffffeffffffff80000001ffffffff +uint_max * uint_max * long_min : 0x80000000ffffffff8e+15 +uint_max * uint_max * int_max : 0x7ffffffe000000027fffffff +uint_max * uint_max * int_min : 0x80000000ffffffff8e+7 +uint_max * uint_max * uint_max : 0x0fffffffd00000002ffffffff +uint_max * uint_max * ulong_max : 0x0fffffffe0000000000000001ffffffff +uint_max * uint_max * double_min : 0x.3fffffff800000004e-239 +uint_max * uint_max * double_max : 0x0fffffffdfffff80100000ffffffff8e+242 +uint_max * uint_max * float_min : 0x.3fffffff800000004e-15 +uint_max * uint_max * float_max : 0x0fffffefe00000200ffffffe+26 +ulong_max / zero_min : -Inf +ulong_max / zero_plus : Inf +ulong_max / zero : Inf +ulong_max / NaN : NaN +ulong_max / Inf_plus : 0x0 +ulong_max / Inf_min : 0x0 +ulong_max / Inf : 0x0 +ulong_max / long_max : 0x2.0000000000000002 +ulong_max / long_min : 0xe.0000000000000002 +ulong_max / int_max : 0x200000004.00000008 +ulong_max / int_min : 0xe00000000.00000002 +ulong_max / uint_max : 0x100000001 +ulong_max / ulong_max : 0x1 +ulong_max / double_min : 0x3fffffffffffffffce+255 +ulong_max / double_max : 0x.100000000000008e-239 +ulong_max / float_min : 0x3fffffffffffffffce+31 +ulong_max / float_max : 0x.1000001000001e-15 +ulong_max * zero_min : 0x0 +ulong_max * zero_plus : 0x0 +ulong_max * zero : 0x0 +ulong_max * NaN : NaN +ulong_max * Inf_plus : Inf +ulong_max * Inf_min : -Inf +ulong_max * Inf : Inf +ulong_max * long_max : 0x7ffffffffffffffe8000000000000001 +ulong_max * long_min : 0x80000000000000008e+15 +ulong_max * int_max : 0x7ffffffeffffffff80000001 +ulong_max * int_min : 0x80000000000000008e+7 +ulong_max * uint_max : 0x0fffffffeffffffff00000001 +ulong_max * ulong_max : 0x0fffffffffffffffe0000000000000001 +ulong_max * double_min : 0x.3fffffffffffffffce-239 +ulong_max * double_max : 0x0fffffffffffff7ff00000000000008e+242 +ulong_max * float_min : 0x.3fffffffffffffffce-15 +ulong_max * float_max : 0x0fffffeffffffffff000001e+26 +ulong_max + zero_min : 0x0ffffffffffffffff +ulong_max + zero_plus : 0x0ffffffffffffffff +ulong_max + zero : 0x0ffffffffffffffff +ulong_max + NaN : NaN +ulong_max + Inf_plus : Inf +ulong_max + Inf_min : -Inf +ulong_max + Inf : Inf +ulong_max + long_max : 0x17ffffffffffffffe +ulong_max + long_min : 0x7fffffffffffffff +ulong_max + int_max : 0x1000000007ffffffe +ulong_max + int_min : 0x0ffffffff7fffffff +ulong_max + uint_max : 0x100000000fffffffe +ulong_max + ulong_max : 0x1fffffffffffffffe +ulong_max + double_min : 0x0ffffffffffffffff +ulong_max + double_max : 0x0fffffffffffff80000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffffffffffff +ulong_max + float_min : 0x0ffffffffffffffff.00000000000000000000000000000004 +ulong_max + float_max : 0x0ffffff0000000000ffffffffffffffff +ulong_max - zero_min : 0x0ffffffffffffffff +ulong_max - zero_plus : 0x0ffffffffffffffff +ulong_max - zero : 0x0ffffffffffffffff +ulong_max - NaN : NaN +ulong_max - Inf_plus : -Inf +ulong_max - Inf_min : Inf +ulong_max - Inf : -Inf +ulong_max - long_max : 0x08e+15 +ulong_max - long_min : 0x17fffffffffffffff +ulong_max - int_max : 0x0ffffffff8e+7 +ulong_max - int_min : 0x1000000007fffffff +ulong_max - uint_max : 0x0ffffffffe+8 +ulong_max - ulong_max : 0x0 +ulong_max - double_min : 0x0ffffffffffffffff +ulong_max - double_max : 0xf000000000000080000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffffffffffff +ulong_max - float_min : 0x0fffffffffffffffe.fffffffffffffffffffffffffffffffc +ulong_max - float_max : 0xf0000010000000000ffffffffffffffff +ulong_max > zero_min : 0x1 +ulong_max > zero_plus : 0x1 +ulong_max > zero : 0x1 +ulong_max > NaN : 0x0 +ulong_max > Inf_plus : 0x0 +ulong_max > Inf_min : 0x1 +ulong_max > Inf : 0x0 +ulong_max > long_max : 0x1 +ulong_max > long_min : 0x1 +ulong_max > int_max : 0x1 +ulong_max > int_min : 0x1 +ulong_max > uint_max : 0x1 +ulong_max > ulong_max : 0x0 +ulong_max > double_min : 0x1 +ulong_max > double_max : 0x0 +ulong_max > float_min : 0x1 +ulong_max > float_max : 0x0 +ulong_max < zero_min : 0x0 +ulong_max < zero_plus : 0x0 +ulong_max < zero : 0x0 +ulong_max < NaN : 0x0 +ulong_max < Inf_plus : 0x1 +ulong_max < Inf_min : 0x0 +ulong_max < Inf : 0x1 +ulong_max < long_max : 0x0 +ulong_max < long_min : 0x0 +ulong_max < int_max : 0x0 +ulong_max < int_min : 0x0 +ulong_max < uint_max : 0x0 +ulong_max < ulong_max : 0x0 +ulong_max < double_min : 0x0 +ulong_max < double_max : 0x1 +ulong_max < float_min : 0x0 +ulong_max < float_max : 0x1 +ulong_max >= zero_min : 0x1 +ulong_max >= zero_plus : 0x1 +ulong_max >= zero : 0x1 +ulong_max >= NaN : 0x0 +ulong_max >= Inf_plus : 0x0 +ulong_max >= Inf_min : 0x1 +ulong_max >= Inf : 0x0 +ulong_max >= long_max : 0x1 +ulong_max >= long_min : 0x1 +ulong_max >= int_max : 0x1 +ulong_max >= int_min : 0x1 +ulong_max >= uint_max : 0x1 +ulong_max >= ulong_max : 0x1 +ulong_max >= double_min : 0x1 +ulong_max >= double_max : 0x0 +ulong_max >= float_min : 0x1 +ulong_max >= float_max : 0x0 +ulong_max <= zero_min : 0x0 +ulong_max <= zero_plus : 0x0 +ulong_max <= zero : 0x0 +ulong_max <= NaN : 0x0 +ulong_max <= Inf_plus : 0x1 +ulong_max <= Inf_min : 0x0 +ulong_max <= Inf : 0x1 +ulong_max <= long_max : 0x0 +ulong_max <= long_min : 0x0 +ulong_max <= int_max : 0x0 +ulong_max <= int_min : 0x0 +ulong_max <= uint_max : 0x0 +ulong_max <= ulong_max : 0x1 +ulong_max <= double_min : 0x0 +ulong_max <= double_max : 0x1 +ulong_max <= float_min : 0x0 +ulong_max <= float_max : 0x1 +ulong_max == zero_min : 0x0 +ulong_max == zero_plus : 0x0 +ulong_max == zero : 0x0 +ulong_max == NaN : 0x0 +ulong_max == Inf_plus : 0x0 +ulong_max == Inf_min : 0x0 +ulong_max == Inf : 0x0 +ulong_max == long_max : 0x0 +ulong_max == long_min : 0x0 +ulong_max == int_max : 0x0 +ulong_max == int_min : 0x0 +ulong_max == uint_max : 0x0 +ulong_max == ulong_max : 0x1 +ulong_max == double_min : 0x0 +ulong_max == double_max : 0x0 +ulong_max == float_min : 0x0 +ulong_max == float_max : 0x0 +ulong_max != zero_min : 0x1 +ulong_max != zero_plus : 0x1 +ulong_max != zero : 0x1 +ulong_max != NaN : 0x1 +ulong_max != Inf_plus : 0x1 +ulong_max != Inf_min : 0x1 +ulong_max != Inf : 0x1 +ulong_max != long_max : 0x1 +ulong_max != long_min : 0x1 +ulong_max != int_max : 0x1 +ulong_max != int_min : 0x1 +ulong_max != uint_max : 0x1 +ulong_max != ulong_max : 0x0 +ulong_max != double_min : 0x1 +ulong_max != double_max : 0x1 +ulong_max != float_min : 0x1 +ulong_max != float_max : 0x1 +ulong_max * ulong_max * zero_min : 0x0 +ulong_max * ulong_max * zero_plus : 0x0 +ulong_max * ulong_max * zero : 0x0 +ulong_max * ulong_max * NaN : NaN +ulong_max * ulong_max * Inf_plus : Inf +ulong_max * ulong_max * Inf_min : -Inf +ulong_max * ulong_max * Inf : Inf +ulong_max * ulong_max * long_max : 0x7ffffffffffffffe00000000000000027fffffffffffffff +ulong_max * ulong_max * long_min : 0x8000000000000000ffffffffffffffff8e+15 +ulong_max * ulong_max * int_max : 0x7ffffffeffffffff00000002000000007fffffff +ulong_max * ulong_max * int_min : 0x8000000000000000ffffffffffffffff8e+7 +ulong_max * ulong_max * uint_max : 0x0fffffffefffffffe0000000200000000ffffffff +ulong_max * ulong_max * ulong_max : 0x0fffffffffffffffd0000000000000002ffffffffffffffff +ulong_max * ulong_max * double_min : 0x.3fffffffffffffff80000000000000004e-223 +ulong_max * ulong_max * double_max : 0x0fffffffffffff7fe0000000000001000fffffffffffff8e+242 +ulong_max * ulong_max * float_min : 0x3.fffffffffffffff80000000000000004 +ulong_max * ulong_max * float_max : 0x0fffffefffffffffe0000020000000000ffffffe+26 +****************** limits fx_float_double +zero_min : 0x0 +zero_plus : 0x0 +zero : 0x0 +NaN : NaN +Inf_plus : Inf +Inf_min : -Inf +Inf : Inf +long_max : 0x7fffffffffffffff +long_min : 0x8e+15 +int_max : 0x7fffffff +int_min : 0x8e+7 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffffffffffff +double_min : 0x.4e-255 +double_max : 0x0fffffffffffff8e+242 +float_min : 0x.4e-31 +float_max : 0x0ffffffe+26 +double_min / zero_min : -Inf +double_min / zero_plus : Inf +double_min / zero : Inf +double_min / NaN : NaN +double_min / Inf_plus : 0x0 +double_min / Inf_min : 0x0 +double_min / Inf : 0x0 +double_min / long_max : 0x.08000000000000001e-270 +double_min / long_min : 0x.8e-271 +double_min / int_max : 0x.08000000100000002e-262 +double_min / int_min : 0x.8e-263 +double_min / uint_max : 0x.400000004e-263 +double_min / ulong_max : 0x.4e-271 +double_min / double_min : 0x1 +double_min / double_max : 0x.40000000000002e-511 +double_min / float_min : 0x.1e-223 +double_min / float_max : 0x.4000004000004e-287 +double_min * zero_min : 0x0 +double_min * zero_plus : 0x0 +double_min * zero : 0x0 +double_min * NaN : NaN +double_min * Inf_plus : Inf +double_min * Inf_min : -Inf +double_min * Inf : Inf +double_min * long_max : 0x.1fffffffffffffffce-239 +double_min * long_min : 0x.ee-239 +double_min * int_max : 0x.1fffffffce-247 +double_min * int_min : 0x.ee-247 +double_min * uint_max : 0x.3fffffffce-247 +double_min * ulong_max : 0x.3fffffffffffffffce-239 +double_min * double_min : 0x.1e-510 +double_min * double_max : 0x3.ffffffffffffe +double_min * float_min : 0x.1e-286 +double_min * float_max : 0x.3fffffce-223 +double_min + zero_min : 0x.4e-255 +double_min + zero_plus : 0x.4e-255 +double_min + zero : 0x.4e-255 +double_min + NaN : NaN +double_min + Inf_plus : Inf +double_min + Inf_min : -Inf +double_min + Inf : Inf +double_min + long_max : 0x7fffffffffffffff +double_min + long_min : 0x8e+15 +double_min + int_max : 0x7fffffff +double_min + int_min : 0x8e+7 +double_min + uint_max : 0x0ffffffff +double_min + ulong_max : 0x0ffffffffffffffff +double_min + double_min : 0x.08e-254 +double_min + double_max : 0x0fffffffffffff8e+242 +double_min + float_min : 0x.400000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min + float_max : 0x0ffffffe+26 +double_min - zero_min : 0x.4e-255 +double_min - zero_plus : 0x.4e-255 +double_min - zero : 0x.4e-255 +double_min - NaN : NaN +double_min - Inf_plus : -Inf +double_min - Inf_min : Inf +double_min - Inf : -Inf +double_min - long_max : 0x8000000000000001 +double_min - long_min : 0x08e+15 +double_min - int_max : 0x80000001 +double_min - int_min : 0x08e+7 +double_min - uint_max : 0xf00000001 +double_min - ulong_max : 0xf0000000000000001 +double_min - double_min : 0x0 +double_min - double_max : 0xf00000000000008e+242 +double_min - float_min : 0x.c00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004e-31 +double_min - float_max : 0xf000001e+26 +double_min > zero_min : 0x1 +double_min > zero_plus : 0x1 +double_min > zero : 0x1 +double_min > NaN : 0x0 +double_min > Inf_plus : 0x0 +double_min > Inf_min : 0x1 +double_min > Inf : 0x0 +double_min > long_max : 0x0 +double_min > long_min : 0x1 +double_min > int_max : 0x0 +double_min > int_min : 0x1 +double_min > uint_max : 0x0 +double_min > ulong_max : 0x0 +double_min > double_min : 0x0 +double_min > double_max : 0x0 +double_min > float_min : 0x0 +double_min > float_max : 0x0 +double_min < zero_min : 0x0 +double_min < zero_plus : 0x0 +double_min < zero : 0x0 +double_min < NaN : 0x0 +double_min < Inf_plus : 0x1 +double_min < Inf_min : 0x0 +double_min < Inf : 0x1 +double_min < long_max : 0x1 +double_min < long_min : 0x0 +double_min < int_max : 0x1 +double_min < int_min : 0x0 +double_min < uint_max : 0x1 +double_min < ulong_max : 0x1 +double_min < double_min : 0x0 +double_min < double_max : 0x1 +double_min < float_min : 0x1 +double_min < float_max : 0x1 +double_min >= zero_min : 0x1 +double_min >= zero_plus : 0x1 +double_min >= zero : 0x1 +double_min >= NaN : 0x0 +double_min >= Inf_plus : 0x0 +double_min >= Inf_min : 0x1 +double_min >= Inf : 0x0 +double_min >= long_max : 0x0 +double_min >= long_min : 0x1 +double_min >= int_max : 0x0 +double_min >= int_min : 0x1 +double_min >= uint_max : 0x0 +double_min >= ulong_max : 0x0 +double_min >= double_min : 0x1 +double_min >= double_max : 0x0 +double_min >= float_min : 0x0 +double_min >= float_max : 0x0 +double_min <= zero_min : 0x0 +double_min <= zero_plus : 0x0 +double_min <= zero : 0x0 +double_min <= NaN : 0x0 +double_min <= Inf_plus : 0x1 +double_min <= Inf_min : 0x0 +double_min <= Inf : 0x1 +double_min <= long_max : 0x1 +double_min <= long_min : 0x0 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0x0 +double_max == NaN : 0x0 +double_max == Inf_plus : 0x0 +double_max == Inf_min : 0x0 +double_max == Inf : 0x0 +double_max == long_max : 0x0 +double_max == long_min : 0x0 +double_max == int_max : 0x0 +double_max == int_min : 0x0 +double_max == uint_max : 0x0 +double_max == ulong_max : 0x0 +double_max == double_min : 0x0 +double_max == double_max : 0x1 +double_max == float_min : 0x0 +double_max == float_max : 0x0 +double_max != zero_min : 0x1 +double_max != zero_plus : 0x1 +double_max != zero : 0x1 +double_max != NaN : 0x1 +double_max != Inf_plus : 0x1 +double_max != Inf_min : 0x1 +double_max != Inf : 0x1 +double_max != long_max : 0x1 +double_max != long_min : 0x1 +double_max != int_max : 0x1 +double_max != int_min : 0x1 +double_max != uint_max : 0x1 +double_max != ulong_max : 0x1 +double_max != double_min : 0x1 +double_max != double_max : 0x0 +double_max != float_min : 0x1 +double_max != float_max : 0x1 +double_max * double_max * zero_min : 0x0 +double_max * double_max * zero_plus : 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+float_max * long_min : 0x8000008e+41 +float_max * int_max : 0x7fffff7f000001e+26 +float_max * int_min : 0x8000008e+33 +float_max * uint_max : 0x0fffffeff000001e+26 +float_max * ulong_max : 0x0fffffeffffffffff000001e+26 +float_max * double_min : 0x.3fffffce-223 +float_max * double_max : 0x0fffffefffffff8000008e+268 +float_max * float_min : 0x3.fffffc +float_max * float_max : 0x0fffffe000001e+52 +float_max + zero_min : 0x0ffffffe+26 +float_max + zero_plus : 0x0ffffffe+26 +float_max + zero : 0x0ffffffe+26 +float_max + NaN : NaN +float_max + Inf_plus : Inf +float_max + Inf_min : -Inf +float_max + Inf : Inf +float_max + long_max : 0x0ffffff00000000007fffffffffffffff +float_max + long_min : 0x0fffffeffffffffff8e+15 +float_max + int_max : 0x0ffffff0000000000000000007fffffff +float_max + int_min : 0x0fffffeffffffffffffffffff8e+7 +float_max + uint_max : 0x0ffffff000000000000000000ffffffff +float_max + ulong_max : 0x0ffffff0000000000ffffffffffffffff +float_max + double_min : 0x0ffffffe+26 +float_max + double_max : 0x0fffffffffffff8000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max + float_min : 0x0ffffff00000000000000000000000000.00000000000000000000000000000004 +float_max + float_max : 0x1fffffee+26 +float_max - zero_min : 0x0ffffffe+26 +float_max - zero_plus : 0x0ffffffe+26 +float_max - zero : 0x0ffffffe+26 +float_max - NaN : NaN +float_max - Inf_plus : -Inf +float_max - Inf_min : Inf +float_max - Inf : -Inf +float_max - long_max : 0x0fffffeffffffffff8000000000000001 +float_max - long_min : 0x0ffffff00000000008e+15 +float_max - int_max : 0x0fffffeffffffffffffffffff80000001 +float_max - int_min : 0x0ffffff0000000000000000008e+7 +float_max - uint_max : 0x0fffffeffffffffffffffffff00000001 +float_max - ulong_max : 0x0fffffeffffffffff0000000000000001 +float_max - double_min : 0x0ffffffe+26 +float_max - double_max : 0xf00000000000008000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000ffffffe+26 +float_max - float_min : 0x0fffffeffffffffffffffffffffffffff.fffffffffffffffffffffffffffffffc +float_max - float_max : 0x0 +float_max > zero_min : 0x1 +float_max > zero_plus : 0x1 +float_max > zero : 0x1 +float_max > NaN : 0x0 +float_max > Inf_plus : 0x0 +float_max > Inf_min : 0x1 +float_max > Inf : 0x0 +float_max > long_max : 0x1 +float_max > long_min : 0x1 +float_max > int_max : 0x1 +float_max > int_min : 0x1 +float_max > uint_max : 0x1 +float_max > ulong_max : 0x1 +float_max > double_min : 0x1 +float_max > double_max : 0x0 +float_max > float_min : 0x1 +float_max > float_max : 0x0 +float_max < zero_min : 0x0 +float_max < zero_plus : 0x0 +float_max < zero : 0x0 +float_max < NaN : 0x0 +float_max < Inf_plus : 0x1 +float_max < Inf_min : 0x0 +float_max < Inf : 0x1 +float_max < long_max : 0x0 +float_max < long_min : 0x0 +float_max < int_max : 0x0 +float_max < int_min : 0x0 +float_max < uint_max : 0x0 +float_max < ulong_max : 0x0 +float_max < double_min : 0x0 +float_max < double_max : 0x1 +float_max < float_min : 0x0 +float_max < float_max : 0x0 +float_max >= zero_min : 0x1 +float_max >= zero_plus : 0x1 +float_max >= zero : 0x1 +float_max >= NaN : 0x0 +float_max >= Inf_plus : 0x0 +float_max >= Inf_min : 0x1 +float_max >= Inf : 0x0 +float_max >= long_max : 0x1 +float_max >= long_min : 0x1 +float_max >= int_max : 0x1 +float_max >= int_min : 0x1 +float_max >= uint_max : 0x1 +float_max >= ulong_max : 0x1 +float_max >= double_min : 0x1 +float_max >= double_max : 0x0 +float_max >= float_min : 0x1 +float_max >= float_max : 0x1 +float_max <= zero_min : 0x0 +float_max <= zero_plus : 0x0 +float_max <= zero : 0x0 +float_max <= NaN : 0x0 +float_max <= Inf_plus : 0x1 +float_max <= Inf_min : 0x0 +float_max <= Inf : 0x1 +float_max <= long_max : 0x0 +float_max <= long_min : 0x0 +float_max <= int_max : 0x0 +float_max <= int_min : 0x0 +float_max <= uint_max : 0x0 +float_max <= ulong_max : 0x0 +float_max <= double_min : 0x0 +float_max <= double_max : 0x1 +float_max <= float_min : 0x0 +float_max <= float_max : 0x1 +float_max == zero_min : 0x0 +float_max == zero_plus : 0x0 +float_max == zero : 0x0 +float_max == NaN : 0x0 +float_max == Inf_plus : 0x0 +float_max == Inf_min : 0x0 +float_max == Inf : 0x0 +float_max == long_max : 0x0 +float_max == long_min : 0x0 +float_max == int_max : 0x0 +float_max == int_min : 0x0 +float_max == uint_max : 0x0 +float_max == ulong_max : 0x0 +float_max == double_min : 0x0 +float_max == double_max : 0x0 +float_max == float_min : 0x0 +float_max == float_max : 0x1 +float_max != zero_min : 0x1 +float_max != zero_plus : 0x1 +float_max != zero : 0x1 +float_max != NaN : 0x1 +float_max != Inf_plus : 0x1 +float_max != Inf_min : 0x1 +float_max != Inf : 0x1 +float_max != long_max : 0x1 +float_max != long_min : 0x1 +float_max != int_max : 0x1 +float_max != int_min : 0x1 +float_max != uint_max : 0x1 +float_max != ulong_max : 0x1 +float_max != double_min : 0x1 +float_max != double_max : 0x1 +float_max != float_min : 0x1 +float_max != float_max : 0x0 +float_max * float_max * zero_min : 0x0 +float_max * float_max * zero_plus : 0x0 +float_max * float_max * zero : 0x0 +float_max * float_max * NaN : NaN +float_max * float_max * Inf_plus : Inf +float_max * float_max * Inf_min : -Inf +float_max * float_max * Inf : Inf +float_max * float_max * long_max : 0x7fffff0000007fff000001ffffffe+52 +float_max * float_max * long_min : 0x800000ffffff8e+67 +float_max * float_max * int_max : 0x7ffffeff000081ffffffe+52 +float_max * float_max * int_min : 0x800000ffffff8e+59 +float_max * float_max * uint_max : 0x0fffffdff000101ffffffe+52 +float_max * float_max * ulong_max : 0x0fffffe000000ffff000001ffffffe+52 +float_max * float_max * double_min : 0x.3fffff8000004e-191 +float_max * float_max * double_max : 0x0fffffe000000f800000ffffff8e+294 +float_max * float_max * float_min : 0x3fffff8000004e+20 +float_max * float_max * float_max : 0x0fffffd000002ffffffe+78 +double_min / NaN : NaN +****************** limits fx_ufix +****************** limits fx_ufix_zero +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_Inf +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_long +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_ufix_double +zero_min : 0x000000000 +zero_plus : 0x000000000 +zero : 0x000000000 +long_max : 0x0ffffffff +long_min : 0x000000000 +int_max : 0x07fffffff +int_min : 0x080000000 +uint_max : 0x0ffffffff +ulong_max : 0x0ffffffff +double_min : 0x000000000 +double_max : 0x000000000 +float_min : 0x000000000 +float_max : 0x000000000 +****************** limits fx_fix +****************** limits fx_fix_zero +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_Inf +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_long +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fix_double +zero_min : 0x00000000 +zero_plus : 0x00000000 +zero : 0x00000000 +long_max : 0xffffffff +long_min : 0x00000000 +int_max : 0x7fffffff +int_min : 0x80000000 +uint_max : 0xffffffff +ulong_max : 0xffffffff +double_min : 0x00000000 +double_max : 0x00000000 +float_min : 0x00000000 +float_max : 0x00000000 +****************** limits fx_fixed<8, 5> +****************** limits fx_fixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_fixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0xff.0 +long_min : 0x00.0 +int_max : 0xff.0 +int_min : 0x00.0 +uint_max : 0xff.0 +ulong_max : 0xff.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5> +****************** limits fx_ufixed<8, 5>_zero +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_Inf +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_long +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 +****************** limits fx_ufixed<8, 5>_double +zero_min : 0x00.0 +zero_plus : 0x00.0 +zero : 0x00.0 +long_max : 0x1f.0 +long_min : 0x00.0 +int_max : 0x1f.0 +int_min : 0x00.0 +uint_max : 0x1f.0 +ulong_max : 0x1f.0 +double_min : 0x00.0 +double_max : 0x00.0 +float_min : 0x00.0 +float_max : 0x00.0 diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/main.cpp b/src/systemc/tests/systemc/datatypes/fx/limits/main.cpp new file mode 100644 index 000000000..512a8a51f --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/main.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// main.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 12:41:10 1998 +// Status : none +// + +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) +# include "sstream" +#else +# include "strstream.h" +#endif + +extern void test_fx_float_limits(ostream&); +extern void test_fx_ufix_limits(ostream&); +extern void test_fx_fix_limits(ostream&); +extern void test_fx_fixed_limits(ostream&); +extern void test_fx_ufixed_limits(ostream&); + +int sc_main( int, char** ) +{ +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::stringstream out; +# else + strstream out; +# endif + + out.precision(15); + + test_fx_float_limits(out); + test_fx_ufix_limits(out); + test_fx_fix_limits(out); + test_fx_fixed_limits(out); + test_fx_ufixed_limits(out); + +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::string s = out.str(); + for (int i = 0; i < s.length(); i++) +# else + out << '\0'; + char* s = out.str(); + for (int i = 0; i < strlen(s); i++) +# endif + + { + if (s[i+0] == 'i' && s[i+1] == 'n' && s[i+2] == 'f') + { + s[i+0] = 'I'; + i += 2; + continue; + } + + if (s[i+0] == 'n' && s[i+1] == 'a' && s[i+2] == 'n') + { + s[i+0] = 'N'; + s[i+2] = 'N'; + i += 2; + continue; + } + } + + cout << s; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/limits/test.f b/src/systemc/tests/systemc/datatypes/fx/limits/test.f new file mode 100644 index 000000000..862b5d1cd --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/limits/test.f @@ -0,0 +1,26 @@ +limits/fx_fix_limits.cpp +limits/fx_fix_limits_double.cpp +limits/fx_fix_limits_inf.cpp +limits/fx_fix_limits_long.cpp +limits/fx_fix_limits_zero.cpp +limits/fx_fixed_limits.cpp +limits/fx_fixed_limits_double.cpp +limits/fx_fixed_limits_inf.cpp +limits/fx_fixed_limits_long.cpp +limits/fx_fixed_limits_zero.cpp +limits/fx_float_limits.cpp +limits/fx_float_limits_double.cpp +limits/fx_float_limits_inf.cpp +limits/fx_float_limits_long.cpp +limits/fx_float_limits_zero.cpp +limits/fx_ufix_limits.cpp +limits/fx_ufix_limits_double.cpp +limits/fx_ufix_limits_inf.cpp +limits/fx_ufix_limits_long.cpp +limits/fx_ufix_limits_zero.cpp +limits/fx_ufixed_limits.cpp +limits/fx_ufixed_limits_double.cpp +limits/fx_ufixed_limits_inf.cpp +limits/fx_ufixed_limits_long.cpp +limits/fx_ufixed_limits_zero.cpp +limits/main.cpp diff --git a/src/systemc/tests/systemc/datatypes/fx/observers/golden/observers.log b/src/systemc/tests/systemc/datatypes/fx/observers/golden/observers.log new file mode 100644 index 000000000..04a36e6d2 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/observers/golden/observers.log @@ -0,0 +1,85 @@ +SystemC Simulation + +sc_fxval +construct +to_short read +to_ushort read +to_int read +to_uint read +to_long read +to_ulong read +to_int64 read +to_uint64 read +to_float read +to_double read +destruct + +sc_fxval_fast +construct +to_short read +to_ushort read +to_int read +to_uint read +to_long read +to_ulong read +to_int64 read +to_uint64 read +to_float read +to_double read +destruct + +sc_fixed +construct +to_short read +to_ushort read +to_int read +to_uint read +to_long read +to_ulong read +to_int64 read +to_uint64 read +to_float read +to_double read +destruct + +sc_fixed_fast +construct +to_short read +to_ushort read +to_int read +to_uint read +to_long read +to_ulong read +to_int64 read +to_uint64 read +to_float read +to_double read +destruct + +sc_ufixed +construct +to_short read +to_ushort read +to_int read +to_uint read +to_long read +to_ulong read +to_int64 read +to_uint64 read +to_float read +to_double read +destruct + +sc_ufixed_fast +construct +to_short read +to_ushort read +to_int read +to_uint read +to_long read +to_ulong read +to_int64 read +to_uint64 read +to_float read +to_double read +destruct diff --git a/src/systemc/tests/systemc/datatypes/fx/observers/observers.cpp b/src/systemc/tests/systemc/datatypes/fx/observers/observers.cpp new file mode 100644 index 000000000..c29de0d22 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/observers/observers.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#define SC_ENABLE_OBSERVERS +#define SC_INCLUDE_FX +#include "systemc.h" + +#if SC_CPLUSPLUS < 201103L +# define override /* empty */ +#endif // SC_CPLUSPLUS >= 201103L + +template +class observer: public Base { + virtual void construct(const Observed&) override { + std::cout << "construct" << std::endl; + } + virtual void destruct(const Observed&) override { + std::cout << "destruct" << std::endl; + } + virtual void read(const Observed&) override { + std::cout << "read" << std::endl; + } + virtual void write(const Observed&) override { + std::cout << "write" << std::endl; + } +}; + +template +void observe(char const *name) { + std::cout << std::endl; + std::cout << name << std::endl; + + observer o; + T value(&o); + + std::cout << "to_short "; value.to_short(); + std::cout << "to_ushort "; value.to_ushort(); + std::cout << "to_int "; value.to_int(); + std::cout << "to_uint "; value.to_uint(); + std::cout << "to_long "; value.to_long(); + std::cout << "to_ulong "; value.to_ulong(); + std::cout << "to_int64 "; value.to_int64(); + std::cout << "to_uint64 "; value.to_uint64(); + std::cout << "to_float "; value.to_float(); + std::cout << "to_double "; value.to_double(); +} + +int sc_main(int, char *[]) { + observe("sc_fxval"); + observe("sc_fxval_fast"); + observe, sc_fxnum, sc_dt::sc_fxnum_observer>("sc_fixed"); + observe, sc_fxnum_fast, sc_dt::sc_fxnum_fast_observer>("sc_fixed_fast"); + observe, sc_fxnum, sc_dt::sc_fxnum_observer>("sc_ufixed"); + observe, sc_fxnum_fast, sc_dt::sc_fxnum_fast_observer>("sc_ufixed_fast"); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/other_types/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/fx/other_types/test01/golden/test01.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/other_types/test01/golden/test01.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/datatypes/fx/other_types/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/fx/other_types/test01/test01.cpp new file mode 100644 index 000000000..0c8b219b2 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/other_types/test01/test01.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define SC_INCLUDE_FX +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_int<9> i; + i = 5; + + sc_uint<9> j; + j = 5; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/ranges/golden/test.log b/src/systemc/tests/systemc/datatypes/fx/ranges/golden/test.log new file mode 100644 index 000000000..ead073fe7 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/ranges/golden/test.log @@ -0,0 +1,7502 @@ +SystemC Simulation +************** range_FX_TTT +0 0.5 1.5 0b01.1 +1 0.25 1.75 0b01.11 +2 0.125 1.875 0b01.111 +3 0.0625 1.9375 0b01.1111 +4 0.03125 1.96875 0b01.11111 +5 0.015625 1.98438 0b01.111111 +6 0.0078125 1.99219 0b01.1111111 +7 0.00390625 1.99609 0b01.11111111 +8 0.00195312 1.99805 0b01.111111111 +9 0.000976562 1.99902 0b01.1111111111 +10 0.000488281 1.99951 0b01.11111111111 +11 0.000244141 1.99976 0b01.111111111111 +12 0.00012207 1.99988 0b01.1111111111111 +13 6.10352e-05 1.99994 0b01.11111111111111 +14 3.05176e-05 1.99997 0b01.111111111111111 +15 1.52588e-05 1.99998 0b01.1111111111111111 +16 7.62939e-06 1.99999 0b01.11111111111111111 +17 3.8147e-06 2 0b01.111111111111111111 +18 1.90735e-06 2 0b01.1111111111111111111 +19 9.53674e-07 2 0b01.11111111111111111111 +20 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a/src/systemc/tests/systemc/datatypes/fx/ranges/main.cpp b/src/systemc/tests/systemc/datatypes/fx/ranges/main.cpp new file mode 100644 index 000000000..acd4ce140 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/ranges/main.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// main.cxx<2> -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Mon Jan 11 12:03:04 1999 +// Status : none +// + + +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +extern void range_fx(ostream&); + +int sc_main( int, char** ) +{ + range_fx(cout); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/ranges/range_fx.cpp b/src/systemc/tests/systemc/datatypes/fx/ranges/range_fx.cpp new file mode 100644 index 000000000..058e1d2fc --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/ranges/range_fx.cpp @@ -0,0 +1,152 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + range_fx.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// range_fx.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Mon Jan 11 13:03:27 1999 +// Status : none +// + + +#include +#define SC_INCLUDE_FX +#define SC_FXVAL_IMPLICIT_FXVAL +#include "systemc.h" + +#define T_FX_FLOAT sc_fxval +#define T_FX_UFIX sc_ufix +#define T_FX_FIX sc_fix +#define T_FX_FIXED sc_fixed<222,111> +#define T_FX_UFIXED sc_ufixed<222,111> + +#define RANGE_TO_MIN(FX_TTT) \ +{ \ + FX_TTT x(1); \ + FX_TTT d(1); \ + \ + int i; \ + for (i = 0; i < 300; ++i) \ + { \ + d = d / 2; \ + x += d; \ + out << i << " " << d.to_double() << " " << x.to_double() << " " << x.to_string(SC_BIN, SC_E) << "\n"; \ + } \ +} + + +#define RANGE_MIN_MAX(FX_TTT) \ +{ \ + FX_TTT x(1); \ + FX_TTT d(4); \ + FX_TTT e(0.125); \ + int i; \ + for (i = 0; i < 300; ++i) \ + { \ + d = d * 2; \ + e = e / 2; \ + x += d + e; \ + out << i << " " << d.to_double() << " " << x.to_double() << " " << x.to_string(SC_BIN, SC_E) << "\n"; \ + } \ + for (i = 0; i < 300; ++i) \ + { \ + x -= (d + e); \ + out << i << " " << d.to_double() << " " << x.to_double() << " " << x.to_string(SC_BIN, SC_E) << "\n"; \ + d = d / 2; \ + e = e * 2; \ + } \ +} + +#define RANGE_TO_MAX(FX_TTT) \ +{ \ + FX_TTT x(1); \ + FX_TTT d(1); \ + int i; \ + for (i = 0; i < 300; ++i) \ + { \ + d = d * 2; \ + x += d; \ + out << i << " " << d.to_double() << " " << x.to_double() << " " << x.to_string(SC_BIN, SC_E) << "\n"; \ + } \ + for (i = 0; i < 300; ++i) \ + { \ + x -= d; \ + out << i << " " << d.to_double() << " " << x.to_double() << " " << x.to_string(SC_BIN, SC_E) << "\n"; \ + d = d / 2; \ + } \ +} + + +static void range_to_min(ostream& out) +{ + RANGE_TO_MIN(T_FX_FLOAT); + RANGE_TO_MIN(T_FX_UFIX); + RANGE_TO_MIN(T_FX_FIX); + RANGE_TO_MIN(T_FX_FIXED); + RANGE_TO_MIN(T_FX_UFIXED); +} + +static void range_to_max(ostream& out) +{ + RANGE_TO_MAX(T_FX_FLOAT); + RANGE_TO_MAX(T_FX_UFIX); + RANGE_TO_MAX(T_FX_FIX); + RANGE_TO_MAX(T_FX_FIXED); + RANGE_TO_MAX(T_FX_UFIXED); +} + +static void range_min_max(ostream& out) +{ + RANGE_MIN_MAX(T_FX_FLOAT); + RANGE_MIN_MAX(T_FX_UFIX); + RANGE_MIN_MAX(T_FX_FIX); + RANGE_MIN_MAX(T_FX_FIXED); + RANGE_MIN_MAX(T_FX_UFIXED); +} + + +void range_fx(ostream& out) +{ + sc_fxtype_params fooCast(222, 111, SC_RND, SC_SAT); + out << "************** range_FX_TTT\n"; + range_to_min(out); + range_to_max(out); + range_min_max(out); +} + diff --git a/src/systemc/tests/systemc/datatypes/fx/ranges/test.f b/src/systemc/tests/systemc/datatypes/fx/ranges/test.f new file mode 100644 index 000000000..22488d20c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/ranges/test.f @@ -0,0 +1,2 @@ +ranges/main.cpp +ranges/range_fx.cpp diff --git a/src/systemc/tests/systemc/datatypes/fx/shift/fx_precision_arbitrary.h b/src/systemc/tests/systemc/datatypes/fx/shift/fx_precision_arbitrary.h new file mode 100644 index 000000000..c5a999e66 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/shift/fx_precision_arbitrary.h @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_precision_arbitrary.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// ============================================================================ +// +// This confidential and proprietary software may be used only +// as authorized by a licensing agreement from Synopsys, Inc. +// In the event of publication, the following notice is applicable: +// +// Copyright (c) 1999 by Synopsys, Inc. +// ALL RIGHTS RESERVED +// +// The entire notice above must be reproduced on all authorized copies. +// +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +// +// File : fx_precision_arbitrary.h +// +// Abstract : Define arbitrary precision. +// +// Author : Martin Janssen +// +// Created : 21-jun-1999 +// +// ============================================================================ + +#ifndef FRIDGE_INTERPOLATOR + +#undef sc_fix +#undef sc_fixed +#undef sc_fxval +#undef sc_ufix +#undef sc_ufixed + +#endif + +// That's all folks! + diff --git a/src/systemc/tests/systemc/datatypes/fx/shift/fx_precision_default.h b/src/systemc/tests/systemc/datatypes/fx/shift/fx_precision_default.h new file mode 100644 index 000000000..4853f0b9a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/shift/fx_precision_default.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_precision_default.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// ============================================================================ +// +// This confidential and proprietary software may be used only +// as authorized by a licensing agreement from Synopsys, Inc. +// In the event of publication, the following notice is applicable: +// +// Copyright (c) 1999 by Synopsys, Inc. +// ALL RIGHTS RESERVED +// +// The entire notice above must be reproduced on all authorized copies. +// +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +// +// File : fx_precision_default.h +// +// Abstract : Define default precision. +// +// Author : Martin Janssen +// +// Created : 21-jun-1999 +// +// ============================================================================ + +#ifdef FX_PRECISION_DOUBLE +# include "fx_precision_double.h" +#else +# include "fx_precision_arbitrary.h" +#endif + +// That's all folks! + diff --git a/src/systemc/tests/systemc/datatypes/fx/shift/fx_precision_double.h b/src/systemc/tests/systemc/datatypes/fx/shift/fx_precision_double.h new file mode 100644 index 000000000..6b7c6df7c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/shift/fx_precision_double.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fx_precision_double.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// ============================================================================ +// +// This confidential and proprietary software may be used only +// as authorized by a licensing agreement from Synopsys, Inc. +// In the event of publication, the following notice is applicable: +// +// Copyright (c) 1999 by Synopsys, Inc. +// ALL RIGHTS RESERVED +// +// The entire notice above must be reproduced on all authorized copies. +// +// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - +// +// File : fx_precision_double.h +// +// Abstract : Define double precision. +// +// Author : Martin Janssen +// +// Created : 21-jun-1999 +// +// ============================================================================ + +#include "fx_precision_arbitrary.h" + +#define sc_fix sc_fix_fast +#define sc_fixed sc_fixed_fast +#define sc_fxval sc_fxval_fast +#define sc_ufix sc_ufix_fast +#define sc_ufixed sc_ufixed_fast + +// That's all folks! + diff --git a/src/systemc/tests/systemc/datatypes/fx/shift/golden/test.log b/src/systemc/tests/systemc/datatypes/fx/shift/golden/test.log new file mode 100644 index 000000000..840f81b33 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/shift/golden/test.log @@ -0,0 +1,10234 @@ +SystemC Simulation +**************** operator << ********** +------------------ T_FX_FLOAT ---- 13, 13 -------------- +0 : 0b0101 +1 : 0b01011 +2 : 0b010111 +3 : 0b0101111 +4 : 0b01011111 +5 : 0b010111111 +6 : 0b0101111111 +7 : 0b01011111111 +8 : 0b010111111111 +9 : 0b0101111111111 +10 : 0b01011111111111 +11 : 0b010111111111111 +12 : 0b0101111111111111 +13 : 0b01011111111111111 +14 : 0b010111111111111111 +15 : 0b0101111111111111111 +16 : 0b01011111111111111111 +17 : 0b010111111111111111111 +18 : 0b0101111111111111111111 +19 : 0b01011111111111111111111 +20 : 0b010111111111111111111111 +21 : 0b0101111111111111111111111 +22 : 0b01011111111111111111111111 +0 : 0b01e+1 +1 : 0b011 +2 : 0b0101 +3 : 0b01001 +4 : 0b010001 +5 : 0b0100001 +6 : 0b01000001 +7 : 0b010000001 +8 : 0b0100000001 +9 : 0b01000000001 +10 : 0b010000000001 +11 : 0b0100000000001 +12 : 0b01000000000001 +13 : 0b010000000000001 +14 : 0b0100000000000001 +15 : 0b01000000000000001 +16 : 0b010000000000000001 +17 : 0b0100000000000000001 +18 : 0b01000000000000000001 +19 : 0b010000000000000000001 +20 : 0b0100000000000000000001 +21 : 0b01000000000000000000001 +22 : 0b010000000000000000000001 +0 : 0b01 +-5 : 0b01 +0 : 0b01011111111111111111111111 +-4 : 0b0101111111111111111111.1111 +0 : 0b0101111111111111111111.1111 +-4 : 0b010111111111111111.11111111 +------------------ T_FX_UFIX ---- 13, 13 -------------- +0 : 0b000000000000000000000000000000101 +1 : 0b000000000000000000000000000001011 +2 : 0b000000000000000000000000000010111 +3 : 0b000000000000000000000000000101111 +4 : 0b000000000000000000000000001011111 +5 : 0b000000000000000000000000010111111 +6 : 0b000000000000000000000000101111111 +7 : 0b000000000000000000000001011111111 +8 : 0b000000000000000000000010111111111 +9 : 0b000000000000000000000101111111111 +10 : 0b000000000000000000001011111111111 +11 : 0b000000000000000000010111111111111 +12 : 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b/src/systemc/tests/systemc/datatypes/fx/shift/main.cpp new file mode 100644 index 000000000..12cbb2ee0 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/shift/main.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// 5.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Wed Dec 30 12:41:10 1998 +// Status : none +// + +#include +#define SC_INCLUDE_FX +#include "systemc.h" + +extern void operator_shift_right(ostream& out); +extern void operator_shift_left(ostream& out); +extern void operator_shift_both(ostream& out); + +int sc_main( int, char** ) +{ + ostream& out = cout; + + out.precision(15); + + out << "**************** operator << **********\n"; + operator_shift_left(out); + out << "**************** operator >> **********\n"; + operator_shift_right(out); + + out << "**************** operator << >> *******\n"; + operator_shift_both(out); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/shift/operator_shift_both.cpp b/src/systemc/tests/systemc/datatypes/fx/shift/operator_shift_both.cpp new file mode 100644 index 000000000..3d3eef3e8 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/shift/operator_shift_both.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + operator_shift_both.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// operator_shift_both.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 15 14:08:43 1999 +// Status : none +// + + +#include +#define SC_INCLUDE_FX +#include "systemc.h" + + + +#define T_FX_FLOAT sc_fxval +#define T_FX_UFIX sc_ufix +#define T_FX_FIX sc_fix +#define T_FX_FIXED sc_fixed +#define T_FX_UFIXED sc_ufixed + +#define SHOW(i, a) \ + out << i << " : " << a.to_string(SC_BIN) << "\n"; + + +#define SHIFT_BOTH_OP(T_op) \ +{ \ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); \ + \ + T_op r(2); \ + int i; \ + for (i = 0; i < T_WL+10; ++i) \ + { \ + r -= 1; \ + r >>= 1; \ + SHOW(i, r); \ + } \ + r *= 1.010203; \ + for (i = 0; i < T_WL+10; ++i) \ + { \ + r -= 1; \ + r <<= 1; \ + SHOW(i, r); \ + } \ +} + +#define SHIFT_BOTH \ +SHIFT_BOTH_OP(T_FX_FLOAT) \ +SHIFT_BOTH_OP(T_FX_UFIX) \ +SHIFT_BOTH_OP(T_FX_FIX) \ +SHIFT_BOTH_OP(T_FX_FIXED) \ +SHIFT_BOTH_OP(T_FX_UFIXED) + + + +void operator_shift_both(ostream& out) +{ +#define T_WL 26 +#define T_IWL 13 + SHIFT_BOTH; +#undef T_WL +#undef T_IWL +#define T_WL 130 +#define T_IWL 65 + SHIFT_BOTH; +#undef T_WL +#undef T_IWL +#define T_WL 300 +#define T_IWL 150 + SHIFT_BOTH; +} diff --git a/src/systemc/tests/systemc/datatypes/fx/shift/operator_shift_left.cpp b/src/systemc/tests/systemc/datatypes/fx/shift/operator_shift_left.cpp new file mode 100644 index 000000000..dea843d10 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/shift/operator_shift_left.cpp @@ -0,0 +1,734 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + operator_shift_left.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// operator_shift_left.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 15 14:08:43 1999 +// Status : none +// + + +#include +#define SC_INCLUDE_FX +#include "systemc.h" + + + +#define T_FX_FLOAT sc_fxval +#define T_FX_UFIX sc_ufix +#define T_FX_FIX sc_fix +#define T_FX_FIXED sc_fixed +#define T_FX_UFIXED sc_ufixed + +#define SHOW(i, a) \ + out << i << " : " << a.to_string(SC_BIN) << "\n"; + + +#if 0 + +#define SHIFT_LEFT_OP(T_op) \ +{ \ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); \ + \ + out << "------------------ " #T_op " ---- " << T_WL << ", " << T_IWL << " --------------\n"; \ + T_op r(2); + int i; \ + for (i = 0; i < T_WL+10; ++i) \ + { \ + r = r << 1; \ + r += 1; \ + SHOW(i, r); \ + } \ + { \ + T_op m(1, FX_off); \ + T_op q(FX_off); \ + for (i = 0; i < T_WL+10; ++i) \ + { \ + q = m << i; \ + q += 1; \ + SHOW(i, q); \ + } \ + q = m << 0; \ + SHOW(0, q); \ + q = m << -5; \ + SHOW(-5, m); \ + } \ + r = r << 0; \ + SHOW(0, r); \ + r = r << -4; \ + SHOW(-4, r); \ + r <<= 0; \ + SHOW(0, r); \ + r <<= -4; \ + SHOW(-4, r); \ +} + +#define SHIFT_LEFT \ +SHIFT_LEFT_OP(T_FX_FLOAT) \ +SHIFT_LEFT_OP(T_FX_UFIX) \ +SHIFT_LEFT_OP(T_FX_FIX) \ +SHIFT_LEFT_OP(T_FX_FIXED) \ +SHIFT_LEFT_OP(T_FX_UFIXED) + + + +void operator_shift_left(ostream& out) +{ +#define T_WL 13 +#define T_IWL 13 + SHIFT_LEFT; +#undef T_WL +#undef T_IWL +#define T_WL 65 +#define T_IWL 65 + SHIFT_LEFT; +#undef T_WL +#undef T_IWL +#define T_WL 150 +#define T_IWL 150 + SHIFT_LEFT; +} + +#else + +#define QUOTE(x) #x + +void operator_shift_left(ostream& out) +{ +#define T_WL 13 +#define T_IWL 13 + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FLOAT) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FLOAT r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_FLOAT m(1); + T_FX_FLOAT q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIX r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_UFIX m(1); + T_FX_UFIX q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIX r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_FIX m(1); + T_FX_FIX q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIXED r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_FIXED m(1); + T_FX_FIXED q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIXED r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_UFIXED m(1); + T_FX_UFIXED q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +#undef T_WL +#undef T_IWL +#define T_WL 65 +#define T_IWL 65 + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FLOAT) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FLOAT r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_FLOAT m(1); + T_FX_FLOAT q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIX r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_UFIX m(1); + T_FX_UFIX q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIX r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_FIX m(1); + T_FX_FIX q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIXED r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_FIXED m(1); + T_FX_FIXED q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIXED r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_UFIXED m(1); + T_FX_UFIXED q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +#undef T_WL +#undef T_IWL +#define T_WL 150 +#define T_IWL 150 + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FLOAT) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FLOAT r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_FLOAT m(1); + T_FX_FLOAT q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIX r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_UFIX m(1); + T_FX_UFIX q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIX r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_FIX m(1); + T_FX_FIX q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIXED r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_FIXED m(1); + T_FX_FIXED q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIXED r(2); + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r << 1; + r += 1; + SHOW(i, r); + } + { +#include "fx_precision_double.h" + T_FX_UFIXED m(1); + T_FX_UFIXED q; +#include "fx_precision_default.h" + for (i = 0; i < T_WL+10; ++i) + { + q = m << i; + q += 1; + SHOW(i, q); + } + q = m << 0; + SHOW(0, q); + q = m << -5; + SHOW(-5, m); + } + r = r << 0; + SHOW(0, r); + r = r << -4; + SHOW(-4, r); + r <<= 0; + SHOW(0, r); + r <<= -4; + SHOW(-4, r); +} +} + +#endif diff --git a/src/systemc/tests/systemc/datatypes/fx/shift/operator_shift_right.cpp b/src/systemc/tests/systemc/datatypes/fx/shift/operator_shift_right.cpp new file mode 100644 index 000000000..75594f892 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/shift/operator_shift_right.cpp @@ -0,0 +1,653 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + operator_shift_right.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// This may look like C code, but it is really -*- C++ -*- +// +// operator_shift_right.cxx -- +// Copyright Synopsys 1998 +// Author : Ric Hilderink +// Created On : Fri Jan 15 14:08:43 1999 +// Status : none +// + + +#include +#define SC_INCLUDE_FX +#include "systemc.h" + + + +#define T_FX_FLOAT sc_fxval +#define T_FX_UFIX sc_ufix +#define T_FX_FIX sc_fix +#define T_FX_FIXED sc_fixed +#define T_FX_UFIXED sc_ufixed + +#define SHOW(i, a) \ + out << i << " : " << a.to_string(SC_BIN) << "\n"; + +#if 0 + +#define SHIFT_RIGHT_OP(T_op) \ +{ \ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); \ + \ + out << "------------------ " #T_op " ---- " << T_WL << ", " << T_IWL << " --------------\n"; \ + T_op r(0x8000); \ + T_op m(0x8000, FX_off); \ + T_op q(FX_off); \ + int i; \ + for (i = 0; i < T_WL+10; ++i) \ + { \ + r = r >> 1; \ + r += 1; \ + q = m << i; \ + q += 1; \ + SHOW(i, r); \ + SHOW(i, q); \ + } \ + r = r >> 0; \ + SHOW(0, r); \ + r = r >> -4; \ + SHOW(-4, r); \ + r >>= 0; \ + SHOW(0, r); \ + r >>= -4; \ + SHOW(-4, r); \ + q = m >> 0; \ + SHOW(0, m); \ + q = m >> -5; \ + SHOW(-5, q); \ +} + +#define SHIFT_RIGHT \ +SHIFT_RIGHT_OP(T_FX_FLOAT) \ +SHIFT_RIGHT_OP(T_FX_UFIX) \ +SHIFT_RIGHT_OP(T_FX_FIX) \ +SHIFT_RIGHT_OP(T_FX_FIXED) \ +SHIFT_RIGHT_OP(T_FX_UFIXED) + + + +void operator_shift_right(ostream& out) +{ +#define T_WL 13 +#define T_IWL 1 + SHIFT_RIGHT; +#undef T_WL +#undef T_IWL +#define T_WL 65 +#define T_IWL 1 + SHIFT_RIGHT; +#undef T_WL +#undef T_IWL +#define T_WL 150 +#define T_IWL 1 + SHIFT_RIGHT; +} + +#else + +#define QUOTE(x) #x + +void operator_shift_right(ostream& out) +{ +#define T_WL 13 +#define T_IWL 1 + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FLOAT) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FLOAT r(0x8000); +#include "fx_precision_double.h" + T_FX_FLOAT m(0x8000); + T_FX_FLOAT q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIX r(0x8000); +#include "fx_precision_double.h" + T_FX_UFIX m(0x8000); + T_FX_UFIX q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIX r(0x8000); +#include "fx_precision_double.h" + T_FX_FIX m(0x8000); + T_FX_FIX q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIXED r(0x8000); +#include "fx_precision_double.h" + T_FX_FIXED m(0x8000); + T_FX_FIXED q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIXED r(0x8000); +#include "fx_precision_double.h" + T_FX_UFIXED m(0x8000); + T_FX_UFIXED q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +#undef T_WL +#undef T_IWL +#define T_WL 65 +#define T_IWL 1 + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FLOAT) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FLOAT r(0x8000); +#include "fx_precision_double.h" + T_FX_FLOAT m(0x8000); + T_FX_FLOAT q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIX r(0x8000); +#include "fx_precision_double.h" + T_FX_UFIX m(0x8000); + T_FX_UFIX q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIX r(0x8000); +#include "fx_precision_double.h" + T_FX_FIX m(0x8000); + T_FX_FIX q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIXED r(0x8000); +#include "fx_precision_double.h" + T_FX_FIXED m(0x8000); + T_FX_FIXED q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIXED r(0x8000); +#include "fx_precision_double.h" + T_FX_UFIXED m(0x8000); + T_FX_UFIXED q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +#undef T_WL +#undef T_IWL +#define T_WL 150 +#define T_IWL 1 + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FLOAT) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FLOAT r(0x8000); +#include "fx_precision_double.h" + T_FX_FLOAT m(0x8000); + T_FX_FLOAT q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIX r(0x8000); +#include "fx_precision_double.h" + T_FX_UFIX m(0x8000); + T_FX_UFIX q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIX) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIX r(0x8000); +#include "fx_precision_double.h" + T_FX_FIX m(0x8000); + T_FX_FIX q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_FIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_FIXED r(0x8000); +#include "fx_precision_double.h" + T_FX_FIXED m(0x8000); + T_FX_FIXED q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} + +{ + sc_fxtype_params fooc(T_WL, T_IWL, SC_TRN, SC_WRAP); + + out << "------------------ " QUOTE(T_FX_UFIXED) " ---- " << T_WL << ", " + << T_IWL << " --------------\n"; + T_FX_UFIXED r(0x8000); +#include "fx_precision_double.h" + T_FX_UFIXED m(0x8000); + T_FX_UFIXED q; +#include "fx_precision_default.h" + int i; + for (i = 0; i < T_WL+10; ++i) + { + r = r >> 1; + r += 1; + q = m << i; + q += 1; + SHOW(i, r); + SHOW(i, q); + } + r = r >> 0; + SHOW(0, r); + r = r >> -4; + SHOW(-4, r); + r >>= 0; + SHOW(0, r); + r >>= -4; + SHOW(-4, r); + q = m >> 0; + SHOW(0, m); + q = m >> -5; + SHOW(-5, q); +} +} + +#endif diff --git a/src/systemc/tests/systemc/datatypes/fx/shift/test.f b/src/systemc/tests/systemc/datatypes/fx/shift/test.f new file mode 100644 index 000000000..05c7ea82f --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/fx/shift/test.f @@ -0,0 +1,4 @@ +shift/operator_shift_both.cpp +shift/operator_shift_left.cpp +shift/operator_shift_right.cpp +shift/main.cpp diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith01/arith01.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith01/arith01.cpp new file mode 100644 index 000000000..36b768e2b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith01/arith01.cpp @@ -0,0 +1,141 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include +#include "systemc.h" + +/* + + int9 x; + + x.q = -256; + + x.q is equal to 256 in Sun's CC, and -256 in gcc. The standard leaves + this issue as implementation dependent unless the definition is + qualified explicitly by signed or unsigned. + + In order to force consistent behavior, I've qualified every int + definition accordingly in all the arith files. + +*/ + +typedef struct int9 { + signed int q : 9; +} int9; + +typedef struct int31 { + signed int q : 31; +} int31; + +void +crunch(sc_signed& z, int31 v31, int u, int v) +{ + for (int i = 0; i < 100000; ++i) { + z *= u; + z += v; + v31.q *= u; + v31.q += v; + sc_assert(z == v31.q); + } +} + +// Function to fix result in int9 struct to correctly under-/overflow +// within its 9 bits range and still ensure the correct sign encoding +// over the full size of the integer variable. Otherwise, compiler +// optimization may lead to spurious assertion errors. +void +fix_int9(int9& v) { + v.q %= 0x200; +} + +int +sc_main( int argc, char* argv[] ) +{ + sc_signed x(31); + sc_signed y(9); + sc_signed z(31); + int9 v; + + y = -256; + v.q = -256; + sc_assert(y == v.q); + cout << y << '\t' << v.q << endl; + for (int i = 0; i < 1000; ++i) { + y++; + v.q++; + fix_int9(v); + cout << y << '\t' << v.q << endl; + sc_assert(y == v.q); + } + for (int i = 0; i < 1000; ++i) { + y--; + v.q--; + fix_int9(v); + cout << y << '\t' << v.q << endl; + sc_assert(y == v.q); + } + for (int i = 0; i < 1000; ++i) { + ++y; + ++v.q; + fix_int9(v); + cout << y << '\t' << v.q << endl; + sc_assert(y == v.q); + } + for (int i = 0; i < 1000; ++i) { + --y; + --v.q; + fix_int9(v); + cout << y << '\t' << v.q << endl; + sc_assert(y == v.q); + } + + z = 129023; + int31 v31; + v31.q = 129023; + crunch(z, v31, 491, 12089); + + x = -129023; + v31.q = -129023; + crunch(x, v31, 109, -426); + + x = -1; + v31.q = -1; + crunch(x, v31, 30941, -1188); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith01/golden/arith01.log b/src/systemc/tests/systemc/datatypes/int/arith/arith01/golden/arith01.log new file mode 100644 index 000000000..23813137d --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith01/golden/arith01.log @@ -0,0 +1,4002 @@ +SystemC Simulation +-256 -256 +-255 -255 +-254 -254 +-253 -253 +-252 -252 +-251 -251 +-250 -250 +-249 -249 +-248 -248 +-247 -247 +-246 -246 +-245 -245 +-244 -244 +-243 -243 +-242 -242 +-241 -241 +-240 -240 +-239 -239 +-238 -238 +-237 -237 +-236 -236 +-235 -235 +-234 -234 +-233 -233 +-232 -232 +-231 -231 +-230 -230 +-229 -229 +-228 -228 +-227 -227 +-226 -226 +-225 -225 +-224 -224 +-223 -223 +-222 -222 +-221 -221 +-220 -220 +-219 -219 +-218 -218 +-217 -217 +-216 -216 +-215 -215 +-214 -214 +-213 -213 +-212 -212 +-211 -211 +-210 -210 +-209 -209 +-208 -208 +-207 -207 +-206 -206 +-205 -205 +-204 -204 +-203 -203 +-202 -202 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diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith02/arith02.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith02/arith02.cpp new file mode 100644 index 000000000..90919bfbd --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith02/arith02.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +void +check_string( const sc_signed& z, int v ) +{ + std::string buf(z.to_string( SC_BIN ) ); + if (z < 0) { + sc_assert(buf[2] == '1'); + } else { + sc_assert(buf[2] == '0'); + } +} + +int +sc_main( int argc, char* argv[] ) +{ + signed int vali[5] = { 0, 1, -1, 7, -8 }; + signed int valj[5] = { 0, 1, -1, 7, -8 }; + + for (int i = 3; i < 32; ++i) { + for (int j = 3; j < 32; ++j) { + cout << "i = " << i << ", j = " << j << endl; + + sc_signed x(i); + sc_signed y(j); + sc_signed z(64); + + vali[3] = (1 << (i - 1)) - 1; + vali[4] = - (1 << (i - 1)); + + valj[3] = (1 << (j - 1)) - 1; + valj[4] = - (1 << (j - 1)); + + /* + // old code - takes too much time. + for (int ii = 0; ii < 100; ++ii) { + for (int jj = 0; jj < 100; ++jj) { + */ + for (int ii = 0; ii < 10; ++ii) { + for (int jj = 0; jj < 10; ++jj) { + signed int qi = (ii < 5) ? vali[ii] : (rng.rand() & ((1 << i) - 1)); + signed int qj = (jj < 5) ? valj[jj] : (rng.rand() & ((1 << j) - 1)); + + if (qi & (1 << (i - 1))) { + qi = (qi << (32 - i)) >> (32 - i); + } + if (qj & (1 << (j - 1))) { + qj = (qj << (32 - j)) >> (32 - j); + } + + x = qi; + sc_assert( x == qi ); + y = qj; + sc_assert( y == qj ); + sc_assert((x == qj) == (qi == qj)); + sc_assert((x == qj) == (qj == x)); + sc_assert((x != qj) == (qi != qj)); + sc_assert((x != qj) == (qj != x)); + sc_assert((x < qj) == (qi < qj)); + sc_assert((x < qj) == (qj > x)); + sc_assert((x <= qj) == (qi <= qj)); + sc_assert((x <= qj) == (qj >= x)); + sc_assert((x > qj) == (qi > qj)); + sc_assert((x > qj) == (qj < x)); + sc_assert((x >= qj) == (qi >= qj)); + sc_assert((x >= qj) == (qj <= x)); + z = x + y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi + qj) ); + check_string( z, qi + qj ); + z = x - y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi - qj) ); + check_string( z, qi - qj ); + z = x * y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi * qj) ); + check_string( z, qi * qj ); + if (y != 0) { + z = x / y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi / qj) ); + check_string( z, qi / qj ); + z = x % y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi % qj) ); + check_string( z, qi % qj ); + } + z = x & y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi & qj) ); + check_string( z, qi & qj ); + z = x | y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi | qj) ); + check_string( z, qi | qj ); + z = x ^ y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi ^ qj) ); + check_string( z, qi ^ qj ); + if (jj < i - 1) { + z = x << jj; + for (int r = 0; r < i; ++r) { + sc_assert( (bool) z[r] == !!((qi << jj) & (1 << r)) ); + } + z = x >> jj; + for (int r = 0; r < i; ++r) { + sc_assert( (bool) z[r] == !!((qi >> jj) & (1 << r)) ); + } + } + } + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith02/golden/arith02.log b/src/systemc/tests/systemc/datatypes/int/arith/arith02/golden/arith02.log new file mode 100644 index 000000000..4e17a8196 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith02/golden/arith02.log @@ -0,0 +1,842 @@ +SystemC Simulation +i = 3, j = 3 +i = 3, j = 4 +i = 3, j = 5 +i = 3, j = 6 +i = 3, j = 7 +i = 3, j = 8 +i = 3, j = 9 +i = 3, j = 10 +i = 3, j = 11 +i = 3, j = 12 +i = 3, j = 13 +i = 3, j = 14 +i = 3, j = 15 +i = 3, j = 16 +i = 3, j = 17 +i = 3, j = 18 +i = 3, j = 19 +i = 3, j = 20 +i = 3, j = 21 +i = 3, j = 22 +i = 3, j = 23 +i = 3, j = 24 +i = 3, j = 25 +i = 3, j = 26 +i = 3, j = 27 +i = 3, j = 28 +i = 3, j = 29 +i = 3, j = 30 +i = 3, j = 31 +i = 4, j = 3 +i = 4, j = 4 +i = 4, j = 5 +i = 4, j = 6 +i = 4, j = 7 +i = 4, j = 8 +i = 4, j = 9 +i = 4, j = 10 +i = 4, j = 11 +i = 4, j = 12 +i = 4, j = 13 +i = 4, j = 14 +i = 4, j = 15 +i = 4, j = 16 +i = 4, j = 17 +i = 4, j = 18 +i = 4, j = 19 +i = 4, j = 20 +i = 4, j = 21 +i = 4, j = 22 +i = 4, j = 23 +i = 4, j = 24 +i = 4, j = 25 +i = 4, j = 26 +i = 4, j = 27 +i = 4, j = 28 +i = 4, j = 29 +i = 4, j = 30 +i = 4, j = 31 +i = 5, j = 3 +i = 5, j = 4 +i = 5, j = 5 +i = 5, j = 6 +i = 5, j = 7 +i = 5, j = 8 +i = 5, j = 9 +i = 5, j = 10 +i = 5, j = 11 +i = 5, j = 12 +i = 5, j = 13 +i = 5, j = 14 +i = 5, j = 15 +i = 5, j = 16 +i = 5, j = 17 +i = 5, j = 18 +i = 5, j = 19 +i = 5, j = 20 +i = 5, j = 21 +i = 5, j = 22 +i = 5, j = 23 +i = 5, j = 24 +i = 5, j = 25 +i = 5, j = 26 +i = 5, j = 27 +i = 5, j = 28 +i = 5, j = 29 +i = 5, j = 30 +i = 5, j = 31 +i = 6, j = 3 +i = 6, j = 4 +i = 6, j = 5 +i = 6, j = 6 +i = 6, j = 7 +i = 6, j = 8 +i = 6, j = 9 +i = 6, j = 10 +i = 6, j = 11 +i = 6, j = 12 +i = 6, j = 13 +i = 6, j = 14 +i = 6, j = 15 +i = 6, j = 16 +i = 6, j = 17 +i = 6, j = 18 +i = 6, j = 19 +i = 6, j = 20 +i = 6, j = 21 +i = 6, j = 22 +i = 6, j = 23 +i = 6, j = 24 +i = 6, j = 25 +i = 6, j = 26 +i = 6, j = 27 +i = 6, j = 28 +i = 6, j = 29 +i = 6, j = 30 +i = 6, j = 31 +i = 7, j = 3 +i = 7, j = 4 +i = 7, j = 5 +i = 7, j = 6 +i = 7, j = 7 +i = 7, j = 8 +i = 7, j = 9 +i = 7, j = 10 +i = 7, j = 11 +i = 7, j = 12 +i = 7, j = 13 +i = 7, j = 14 +i = 7, j = 15 +i = 7, j = 16 +i = 7, j = 17 +i = 7, j = 18 +i = 7, j = 19 +i = 7, j = 20 +i = 7, j = 21 +i = 7, j = 22 +i = 7, j = 23 +i = 7, j = 24 +i = 7, j = 25 +i = 7, j = 26 +i = 7, j = 27 +i = 7, j = 28 +i = 7, j = 29 +i = 7, j = 30 +i = 7, j = 31 +i = 8, j = 3 +i = 8, j = 4 +i = 8, j = 5 +i = 8, j = 6 +i = 8, j = 7 +i = 8, j = 8 +i = 8, j = 9 +i = 8, j = 10 +i = 8, j = 11 +i = 8, j = 12 +i = 8, j = 13 +i = 8, j = 14 +i = 8, j = 15 +i = 8, j = 16 +i = 8, j = 17 +i = 8, j = 18 +i = 8, j = 19 +i = 8, j = 20 +i = 8, j = 21 +i = 8, j = 22 +i = 8, j = 23 +i = 8, j = 24 +i = 8, j = 25 +i = 8, j = 26 +i = 8, j = 27 +i = 8, j = 28 +i = 8, j = 29 +i = 8, j = 30 +i = 8, j = 31 +i = 9, j = 3 +i = 9, j = 4 +i = 9, j = 5 +i = 9, j = 6 +i = 9, j = 7 +i = 9, j = 8 +i = 9, j = 9 +i = 9, j = 10 +i = 9, j = 11 +i = 9, j = 12 +i = 9, j = 13 +i = 9, j = 14 +i = 9, j = 15 +i = 9, j = 16 +i = 9, j = 17 +i = 9, j = 18 +i = 9, j = 19 +i = 9, j = 20 +i = 9, j = 21 +i = 9, j = 22 +i = 9, j = 23 +i = 9, j = 24 +i = 9, j = 25 +i = 9, j = 26 +i = 9, j = 27 +i = 9, j = 28 +i = 9, j = 29 +i = 9, j = 30 +i = 9, j = 31 +i = 10, j = 3 +i = 10, j = 4 +i = 10, j = 5 +i = 10, j = 6 +i = 10, j = 7 +i = 10, j = 8 +i = 10, j = 9 +i = 10, j = 10 +i = 10, j = 11 +i = 10, j = 12 +i = 10, j = 13 +i = 10, j = 14 +i = 10, j = 15 +i = 10, j = 16 +i = 10, j = 17 +i = 10, j = 18 +i = 10, j = 19 +i = 10, j = 20 +i = 10, j = 21 +i = 10, j = 22 +i = 10, j = 23 +i = 10, j = 24 +i = 10, j = 25 +i = 10, j = 26 +i = 10, j = 27 +i = 10, j = 28 +i = 10, j = 29 +i = 10, j = 30 +i = 10, j = 31 +i = 11, j = 3 +i = 11, j = 4 +i = 11, j = 5 +i = 11, j = 6 +i = 11, j = 7 +i = 11, j = 8 +i = 11, j = 9 +i = 11, j = 10 +i = 11, j = 11 +i = 11, j = 12 +i = 11, j = 13 +i = 11, j = 14 +i = 11, j = 15 +i = 11, j = 16 +i = 11, j = 17 +i = 11, j = 18 +i = 11, j = 19 +i = 11, j = 20 +i = 11, j = 21 +i = 11, j = 22 +i = 11, j = 23 +i = 11, j = 24 +i = 11, j = 25 +i = 11, j = 26 +i = 11, j = 27 +i = 11, j = 28 +i = 11, j = 29 +i = 11, j = 30 +i = 11, j = 31 +i = 12, j = 3 +i = 12, j = 4 +i = 12, j = 5 +i = 12, j = 6 +i = 12, j = 7 +i = 12, j = 8 +i = 12, j = 9 +i = 12, j = 10 +i = 12, j = 11 +i = 12, j = 12 +i = 12, j = 13 +i = 12, j = 14 +i = 12, j = 15 +i = 12, j = 16 +i = 12, j = 17 +i = 12, j = 18 +i = 12, j = 19 +i = 12, j = 20 +i = 12, j = 21 +i = 12, j = 22 +i = 12, j = 23 +i = 12, j = 24 +i = 12, j = 25 +i = 12, j = 26 +i = 12, j = 27 +i = 12, j = 28 +i = 12, j = 29 +i = 12, j = 30 +i = 12, j = 31 +i = 13, j = 3 +i = 13, j = 4 +i = 13, j = 5 +i = 13, j = 6 +i = 13, j = 7 +i = 13, j = 8 +i = 13, j = 9 +i = 13, j = 10 +i = 13, j = 11 +i = 13, j = 12 +i = 13, j = 13 +i = 13, j = 14 +i = 13, j = 15 +i = 13, j = 16 +i = 13, j = 17 +i = 13, j = 18 +i = 13, j = 19 +i = 13, j = 20 +i = 13, j = 21 +i = 13, j = 22 +i = 13, j = 23 +i = 13, j = 24 +i = 13, j = 25 +i = 13, j = 26 +i = 13, j = 27 +i = 13, j = 28 +i = 13, j = 29 +i = 13, j = 30 +i = 13, j = 31 +i = 14, j = 3 +i = 14, j = 4 +i = 14, j = 5 +i = 14, j = 6 +i = 14, j = 7 +i = 14, j = 8 +i = 14, j = 9 +i = 14, j = 10 +i = 14, j = 11 +i = 14, j = 12 +i = 14, j = 13 +i = 14, j = 14 +i = 14, j = 15 +i = 14, j = 16 +i = 14, j = 17 +i = 14, j = 18 +i = 14, j = 19 +i = 14, j = 20 +i = 14, j = 21 +i = 14, j = 22 +i = 14, j = 23 +i = 14, j = 24 +i = 14, j = 25 +i = 14, j = 26 +i = 14, j = 27 +i = 14, j = 28 +i = 14, j = 29 +i = 14, j = 30 +i = 14, j = 31 +i = 15, j = 3 +i = 15, j = 4 +i = 15, j = 5 +i = 15, j = 6 +i = 15, j = 7 +i = 15, j = 8 +i = 15, j = 9 +i = 15, j = 10 +i = 15, j = 11 +i = 15, j = 12 +i = 15, j = 13 +i = 15, j = 14 +i = 15, j = 15 +i = 15, j = 16 +i = 15, j = 17 +i = 15, j = 18 +i = 15, j = 19 +i = 15, j = 20 +i = 15, j = 21 +i = 15, j = 22 +i = 15, j = 23 +i = 15, j = 24 +i = 15, j = 25 +i = 15, j = 26 +i = 15, j = 27 +i = 15, j = 28 +i = 15, j = 29 +i = 15, j = 30 +i = 15, j = 31 +i = 16, j = 3 +i = 16, j = 4 +i = 16, j = 5 +i = 16, j = 6 +i = 16, j = 7 +i = 16, j = 8 +i = 16, j = 9 +i = 16, j = 10 +i = 16, j = 11 +i = 16, j = 12 +i = 16, j = 13 +i = 16, j = 14 +i = 16, j = 15 +i = 16, j = 16 +i = 16, j = 17 +i = 16, j = 18 +i = 16, j = 19 +i = 16, j = 20 +i = 16, j = 21 +i = 16, j = 22 +i = 16, j = 23 +i = 16, j = 24 +i = 16, j = 25 +i = 16, j = 26 +i = 16, j = 27 +i = 16, j = 28 +i = 16, j = 29 +i = 16, j = 30 +i = 16, j = 31 +i = 17, j = 3 +i = 17, j = 4 +i = 17, j = 5 +i = 17, j = 6 +i = 17, j = 7 +i = 17, j = 8 +i = 17, j = 9 +i = 17, j = 10 +i = 17, j = 11 +i = 17, j = 12 +i = 17, j = 13 +i = 17, j = 14 +i = 17, j = 15 +i = 17, j = 16 +i = 17, j = 17 +i = 17, j = 18 +i = 17, j = 19 +i = 17, j = 20 +i = 17, j = 21 +i = 17, j = 22 +i = 17, j = 23 +i = 17, j = 24 +i = 17, j = 25 +i = 17, j = 26 +i = 17, j = 27 +i = 17, j = 28 +i = 17, j = 29 +i = 17, j = 30 +i = 17, j = 31 +i = 18, j = 3 +i = 18, j = 4 +i = 18, j = 5 +i = 18, j = 6 +i = 18, j = 7 +i = 18, j = 8 +i = 18, j = 9 +i = 18, j = 10 +i = 18, j = 11 +i = 18, j = 12 +i = 18, j = 13 +i = 18, j = 14 +i = 18, j = 15 +i = 18, j = 16 +i = 18, j = 17 +i = 18, j = 18 +i = 18, j = 19 +i = 18, j = 20 +i = 18, j = 21 +i = 18, j = 22 +i = 18, j = 23 +i = 18, j = 24 +i = 18, j = 25 +i = 18, j = 26 +i = 18, j = 27 +i = 18, j = 28 +i = 18, j = 29 +i = 18, j = 30 +i = 18, j = 31 +i = 19, j = 3 +i = 19, j = 4 +i = 19, j = 5 +i = 19, j = 6 +i = 19, j = 7 +i = 19, j = 8 +i = 19, j = 9 +i = 19, j = 10 +i = 19, j = 11 +i = 19, j = 12 +i = 19, j = 13 +i = 19, j = 14 +i = 19, j = 15 +i = 19, j = 16 +i = 19, j = 17 +i = 19, j = 18 +i = 19, j = 19 +i = 19, j = 20 +i = 19, j = 21 +i = 19, j = 22 +i = 19, j = 23 +i = 19, j = 24 +i = 19, j = 25 +i = 19, j = 26 +i = 19, j = 27 +i = 19, j = 28 +i = 19, j = 29 +i = 19, j = 30 +i = 19, j = 31 +i = 20, j = 3 +i = 20, j = 4 +i = 20, j = 5 +i = 20, j = 6 +i = 20, j = 7 +i = 20, j = 8 +i = 20, j = 9 +i = 20, j = 10 +i = 20, j = 11 +i = 20, j = 12 +i = 20, j = 13 +i = 20, j = 14 +i = 20, j = 15 +i = 20, j = 16 +i = 20, j = 17 +i = 20, j = 18 +i = 20, j = 19 +i = 20, j = 20 +i = 20, j = 21 +i = 20, j = 22 +i = 20, j = 23 +i = 20, j = 24 +i = 20, j = 25 +i = 20, j = 26 +i = 20, j = 27 +i = 20, j = 28 +i = 20, j = 29 +i = 20, j = 30 +i = 20, j = 31 +i = 21, j = 3 +i = 21, j = 4 +i = 21, j = 5 +i = 21, j = 6 +i = 21, j = 7 +i = 21, j = 8 +i = 21, j = 9 +i = 21, j = 10 +i = 21, j = 11 +i = 21, j = 12 +i = 21, j = 13 +i = 21, j = 14 +i = 21, j = 15 +i = 21, j = 16 +i = 21, j = 17 +i = 21, j = 18 +i = 21, j = 19 +i = 21, j = 20 +i = 21, j = 21 +i = 21, j = 22 +i = 21, j = 23 +i = 21, j = 24 +i = 21, j = 25 +i = 21, j = 26 +i = 21, j = 27 +i = 21, j = 28 +i = 21, j = 29 +i = 21, j = 30 +i = 21, j = 31 +i = 22, j = 3 +i = 22, j = 4 +i = 22, j = 5 +i = 22, j = 6 +i = 22, j = 7 +i = 22, j = 8 +i = 22, j = 9 +i = 22, j = 10 +i = 22, j = 11 +i = 22, j = 12 +i = 22, j = 13 +i = 22, j = 14 +i = 22, j = 15 +i = 22, j = 16 +i = 22, j = 17 +i = 22, j = 18 +i = 22, j = 19 +i = 22, j = 20 +i = 22, j = 21 +i = 22, j = 22 +i = 22, j = 23 +i = 22, j = 24 +i = 22, j = 25 +i = 22, j = 26 +i = 22, j = 27 +i = 22, j = 28 +i = 22, j = 29 +i = 22, j = 30 +i = 22, j = 31 +i = 23, j = 3 +i = 23, j = 4 +i = 23, j = 5 +i = 23, j = 6 +i = 23, j = 7 +i = 23, j = 8 +i = 23, j = 9 +i = 23, j = 10 +i = 23, j = 11 +i = 23, j = 12 +i = 23, j = 13 +i = 23, j = 14 +i = 23, j = 15 +i = 23, j = 16 +i = 23, j = 17 +i = 23, j = 18 +i = 23, j = 19 +i = 23, j = 20 +i = 23, j = 21 +i = 23, j = 22 +i = 23, j = 23 +i = 23, j = 24 +i = 23, j = 25 +i = 23, j = 26 +i = 23, j = 27 +i = 23, j = 28 +i = 23, j = 29 +i = 23, j = 30 +i = 23, j = 31 +i = 24, j = 3 +i = 24, j = 4 +i = 24, j = 5 +i = 24, j = 6 +i = 24, j = 7 +i = 24, j = 8 +i = 24, j = 9 +i = 24, j = 10 +i = 24, j = 11 +i = 24, j = 12 +i = 24, j = 13 +i = 24, j = 14 +i = 24, j = 15 +i = 24, j = 16 +i = 24, j = 17 +i = 24, j = 18 +i = 24, j = 19 +i = 24, j = 20 +i = 24, j = 21 +i = 24, j = 22 +i = 24, j = 23 +i = 24, j = 24 +i = 24, j = 25 +i = 24, j = 26 +i = 24, j = 27 +i = 24, j = 28 +i = 24, j = 29 +i = 24, j = 30 +i = 24, j = 31 +i = 25, j = 3 +i = 25, j = 4 +i = 25, j = 5 +i = 25, j = 6 +i = 25, j = 7 +i = 25, j = 8 +i = 25, j = 9 +i = 25, j = 10 +i = 25, j = 11 +i = 25, j = 12 +i = 25, j = 13 +i = 25, j = 14 +i = 25, j = 15 +i = 25, j = 16 +i = 25, j = 17 +i = 25, j = 18 +i = 25, j = 19 +i = 25, j = 20 +i = 25, j = 21 +i = 25, j = 22 +i = 25, j = 23 +i = 25, j = 24 +i = 25, j = 25 +i = 25, j = 26 +i = 25, j = 27 +i = 25, j = 28 +i = 25, j = 29 +i = 25, j = 30 +i = 25, j = 31 +i = 26, j = 3 +i = 26, j = 4 +i = 26, j = 5 +i = 26, j = 6 +i = 26, j = 7 +i = 26, j = 8 +i = 26, j = 9 +i = 26, j = 10 +i = 26, j = 11 +i = 26, j = 12 +i = 26, j = 13 +i = 26, j = 14 +i = 26, j = 15 +i = 26, j = 16 +i = 26, j = 17 +i = 26, j = 18 +i = 26, j = 19 +i = 26, j = 20 +i = 26, j = 21 +i = 26, j = 22 +i = 26, j = 23 +i = 26, j = 24 +i = 26, j = 25 +i = 26, j = 26 +i = 26, j = 27 +i = 26, j = 28 +i = 26, j = 29 +i = 26, j = 30 +i = 26, j = 31 +i = 27, j = 3 +i = 27, j = 4 +i = 27, j = 5 +i = 27, j = 6 +i = 27, j = 7 +i = 27, j = 8 +i = 27, j = 9 +i = 27, j = 10 +i = 27, j = 11 +i = 27, j = 12 +i = 27, j = 13 +i = 27, j = 14 +i = 27, j = 15 +i = 27, j = 16 +i = 27, j = 17 +i = 27, j = 18 +i = 27, j = 19 +i = 27, j = 20 +i = 27, j = 21 +i = 27, j = 22 +i = 27, j = 23 +i = 27, j = 24 +i = 27, j = 25 +i = 27, j = 26 +i = 27, j = 27 +i = 27, j = 28 +i = 27, j = 29 +i = 27, j = 30 +i = 27, j = 31 +i = 28, j = 3 +i = 28, j = 4 +i = 28, j = 5 +i = 28, j = 6 +i = 28, j = 7 +i = 28, j = 8 +i = 28, j = 9 +i = 28, j = 10 +i = 28, j = 11 +i = 28, j = 12 +i = 28, j = 13 +i = 28, j = 14 +i = 28, j = 15 +i = 28, j = 16 +i = 28, j = 17 +i = 28, j = 18 +i = 28, j = 19 +i = 28, j = 20 +i = 28, j = 21 +i = 28, j = 22 +i = 28, j = 23 +i = 28, j = 24 +i = 28, j = 25 +i = 28, j = 26 +i = 28, j = 27 +i = 28, j = 28 +i = 28, j = 29 +i = 28, j = 30 +i = 28, j = 31 +i = 29, j = 3 +i = 29, j = 4 +i = 29, j = 5 +i = 29, j = 6 +i = 29, j = 7 +i = 29, j = 8 +i = 29, j = 9 +i = 29, j = 10 +i = 29, j = 11 +i = 29, j = 12 +i = 29, j = 13 +i = 29, j = 14 +i = 29, j = 15 +i = 29, j = 16 +i = 29, j = 17 +i = 29, j = 18 +i = 29, j = 19 +i = 29, j = 20 +i = 29, j = 21 +i = 29, j = 22 +i = 29, j = 23 +i = 29, j = 24 +i = 29, j = 25 +i = 29, j = 26 +i = 29, j = 27 +i = 29, j = 28 +i = 29, j = 29 +i = 29, j = 30 +i = 29, j = 31 +i = 30, j = 3 +i = 30, j = 4 +i = 30, j = 5 +i = 30, j = 6 +i = 30, j = 7 +i = 30, j = 8 +i = 30, j = 9 +i = 30, j = 10 +i = 30, j = 11 +i = 30, j = 12 +i = 30, j = 13 +i = 30, j = 14 +i = 30, j = 15 +i = 30, j = 16 +i = 30, j = 17 +i = 30, j = 18 +i = 30, j = 19 +i = 30, j = 20 +i = 30, j = 21 +i = 30, j = 22 +i = 30, j = 23 +i = 30, j = 24 +i = 30, j = 25 +i = 30, j = 26 +i = 30, j = 27 +i = 30, j = 28 +i = 30, j = 29 +i = 30, j = 30 +i = 30, j = 31 +i = 31, j = 3 +i = 31, j = 4 +i = 31, j = 5 +i = 31, j = 6 +i = 31, j = 7 +i = 31, j = 8 +i = 31, j = 9 +i = 31, j = 10 +i = 31, j = 11 +i = 31, j = 12 +i = 31, j = 13 +i = 31, j = 14 +i = 31, j = 15 +i = 31, j = 16 +i = 31, j = 17 +i = 31, j = 18 +i = 31, j = 19 +i = 31, j = 20 +i = 31, j = 21 +i = 31, j = 22 +i = 31, j = 23 +i = 31, j = 24 +i = 31, j = 25 +i = 31, j = 26 +i = 31, j = 27 +i = 31, j = 28 +i = 31, j = 29 +i = 31, j = 30 +i = 31, j = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith02/isaac.h b/src/systemc/tests/systemc/datatypes/int/arith/arith02/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith02/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith03/arith03.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith03/arith03.cpp new file mode 100644 index 000000000..a9ee10f3f --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith03/arith03.cpp @@ -0,0 +1,127 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +#define TEST(A,B) \ +{ \ + if ( A != B ) \ + cout << #A << " (" << hex << A << ") != " << #B << "(" << hex << B << ")" << endl; \ +} + +#define TESTA(A,B,C) \ +{ \ + if ( A != (B-C) ) \ + cout << #A << " (" << hex << A << ") != " << hex << B-C << " " << B << " " << C << endl; \ +} + +int +sc_main( int argc, char* argv[] ) +{ + unsigned vali[5] = { 0, 1, (unsigned) -1, 7, (unsigned)-8 }; + unsigned valj[5] = { 0, 1, (unsigned) -1, 7, (unsigned)-8 }; + + for (int i = 3; i < 32; ++i) { + for (int j = 3; j < 32; ++j) { + cout << "i = " << i << ", j = " << j << endl; + + sc_unsigned x(i); + sc_unsigned y(j); + sc_unsigned z(64); + + vali[3] = (1 << (i - 1)) - 1; + vali[4] = - (1 << (i - 1)); + + valj[3] = (1 << (j - 1)) - 1; + valj[4] = - (1 << (j - 1)); + + for (int ii = 0; ii < 100; ++ii) { + for (int jj = 0; jj < 100; ++jj) { + unsigned qi = (ii < 5) ? vali[ii] : (rng.rand() & ((1 << i) - 1)); + unsigned qj = (jj < 5) ? valj[jj] : (rng.rand() & ((1 << j) - 1)); + + if (qi & (1 << (i - 1))) { + qi = (qi << (32 - i)) >> (32 - i); + } + if (qj & (1 << (j - 1))) { + qj = (qj << (32 - j)) >> (32 - j); + } + + x = qi; + TEST(x,qi); + y = qj; + TEST(y,qj); + z = x + y; + TEST((sc_unsigned)( z.range(31,0) ),(qi + qj)); + z = x - y; + // TEST((sc_unsigned)( z.range(31,0) ),(qi - qj)); + TESTA((sc_unsigned)( z.range(31,0) ),qi,qj); + z = x * y; + TEST((sc_unsigned)( z.range(31,0) ), + (qi * qj) ); + if (y != 0) { + z = x / y; + TEST((sc_unsigned)( z.range(31,0) ),(qi/qj)); + z = x % y; + TEST((sc_unsigned)( z.range(31,0) ),(qi%qj)); + } + z = x & y; + TEST( (sc_unsigned)( z.range(31,0) ), (qi & qj) ); + z = x | y; + TEST((sc_unsigned)( z.range(31,0) ), (qi | qj) ); + z = x ^ y; + TEST((sc_unsigned)( z.range(31,0) ), (qi ^ qj) ); + if (jj < i - 1) { + z = x << jj; + for (int r = 0; r < i; ++r) { + TEST((bool) z[r],!!((qi << jj) & (1 << r)) ); + } + z = x >> jj; + for (int r = 0; r < i; ++r) { + TEST((bool) z[r],!!((qi >> jj) & (1 << r)) ); + } + } + } + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith03/golden/arith03.log b/src/systemc/tests/systemc/datatypes/int/arith/arith03/golden/arith03.log new file mode 100644 index 000000000..4e17a8196 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith03/golden/arith03.log @@ -0,0 +1,842 @@ +SystemC Simulation +i = 3, j = 3 +i = 3, j = 4 +i = 3, j = 5 +i = 3, j = 6 +i = 3, j = 7 +i = 3, j = 8 +i = 3, j = 9 +i = 3, j = 10 +i = 3, j = 11 +i = 3, j = 12 +i = 3, j = 13 +i = 3, j = 14 +i = 3, j = 15 +i = 3, j = 16 +i = 3, j = 17 +i = 3, j = 18 +i = 3, j = 19 +i = 3, j = 20 +i = 3, j = 21 +i = 3, j = 22 +i = 3, j = 23 +i = 3, j = 24 +i = 3, j = 25 +i = 3, j = 26 +i = 3, j = 27 +i = 3, j = 28 +i = 3, j = 29 +i = 3, j = 30 +i = 3, j = 31 +i = 4, j = 3 +i = 4, j = 4 +i = 4, j = 5 +i = 4, j = 6 +i = 4, j = 7 +i = 4, j = 8 +i = 4, j = 9 +i = 4, j = 10 +i = 4, j = 11 +i = 4, j = 12 +i = 4, j = 13 +i = 4, j = 14 +i = 4, j = 15 +i = 4, j = 16 +i = 4, j = 17 +i = 4, j = 18 +i = 4, j = 19 +i = 4, j = 20 +i = 4, j = 21 +i = 4, j = 22 +i = 4, j = 23 +i = 4, j = 24 +i = 4, j = 25 +i = 4, j = 26 +i = 4, j = 27 +i = 4, j = 28 +i = 4, j = 29 +i = 4, j = 30 +i = 4, j = 31 +i = 5, j = 3 +i = 5, j = 4 +i = 5, j = 5 +i = 5, j = 6 +i = 5, j = 7 +i = 5, j = 8 +i = 5, j = 9 +i = 5, j = 10 +i = 5, j = 11 +i = 5, j = 12 +i = 5, j = 13 +i = 5, j = 14 +i = 5, j = 15 +i = 5, j = 16 +i = 5, j = 17 +i = 5, j = 18 +i = 5, j = 19 +i = 5, j = 20 +i = 5, j = 21 +i = 5, j = 22 +i = 5, j = 23 +i = 5, j = 24 +i = 5, j = 25 +i = 5, j = 26 +i = 5, j = 27 +i = 5, j = 28 +i = 5, j = 29 +i = 5, j = 30 +i = 5, j = 31 +i = 6, j = 3 +i = 6, j = 4 +i = 6, j = 5 +i = 6, j = 6 +i = 6, j = 7 +i = 6, j = 8 +i = 6, j = 9 +i = 6, j = 10 +i = 6, j = 11 +i = 6, j = 12 +i = 6, j = 13 +i = 6, j = 14 +i = 6, j = 15 +i = 6, j = 16 +i = 6, j = 17 +i = 6, j = 18 +i = 6, j = 19 +i = 6, j = 20 +i = 6, j = 21 +i = 6, j = 22 +i = 6, j = 23 +i = 6, j = 24 +i = 6, j = 25 +i = 6, j = 26 +i = 6, j = 27 +i = 6, j = 28 +i = 6, j = 29 +i = 6, j = 30 +i = 6, j = 31 +i = 7, j = 3 +i = 7, j = 4 +i = 7, j = 5 +i = 7, j = 6 +i = 7, j = 7 +i = 7, j = 8 +i = 7, j = 9 +i = 7, j = 10 +i = 7, j = 11 +i = 7, j = 12 +i = 7, j = 13 +i = 7, j = 14 +i = 7, j = 15 +i = 7, j = 16 +i = 7, j = 17 +i = 7, j = 18 +i = 7, j = 19 +i = 7, j = 20 +i = 7, j = 21 +i = 7, j = 22 +i = 7, j = 23 +i = 7, j = 24 +i = 7, j = 25 +i = 7, j = 26 +i = 7, j = 27 +i = 7, j = 28 +i = 7, j = 29 +i = 7, j = 30 +i = 7, j = 31 +i = 8, j = 3 +i = 8, j = 4 +i = 8, j = 5 +i = 8, j = 6 +i = 8, j = 7 +i = 8, j = 8 +i = 8, j = 9 +i = 8, j = 10 +i = 8, j = 11 +i = 8, j = 12 +i = 8, j = 13 +i = 8, j = 14 +i = 8, j = 15 +i = 8, j = 16 +i = 8, j = 17 +i = 8, j = 18 +i = 8, j = 19 +i = 8, j = 20 +i = 8, j = 21 +i = 8, j = 22 +i = 8, j = 23 +i = 8, j = 24 +i = 8, j = 25 +i = 8, j = 26 +i = 8, j = 27 +i = 8, j = 28 +i = 8, j = 29 +i = 8, j = 30 +i = 8, j = 31 +i = 9, j = 3 +i = 9, j = 4 +i = 9, j = 5 +i = 9, j = 6 +i = 9, j = 7 +i = 9, j = 8 +i = 9, j = 9 +i = 9, j = 10 +i = 9, j = 11 +i = 9, j = 12 +i = 9, j = 13 +i = 9, j = 14 +i = 9, j = 15 +i = 9, j = 16 +i = 9, j = 17 +i = 9, j = 18 +i = 9, j = 19 +i = 9, j = 20 +i = 9, j = 21 +i = 9, j = 22 +i = 9, j = 23 +i = 9, j = 24 +i = 9, j = 25 +i = 9, j = 26 +i = 9, j = 27 +i = 9, j = 28 +i = 9, j = 29 +i = 9, j = 30 +i = 9, j = 31 +i = 10, j = 3 +i = 10, j = 4 +i = 10, j = 5 +i = 10, j = 6 +i = 10, j = 7 +i = 10, j = 8 +i = 10, j = 9 +i = 10, j = 10 +i = 10, j = 11 +i = 10, j = 12 +i = 10, j = 13 +i = 10, j = 14 +i = 10, j = 15 +i = 10, j = 16 +i = 10, j = 17 +i = 10, j = 18 +i = 10, j = 19 +i = 10, j = 20 +i = 10, j = 21 +i = 10, j = 22 +i = 10, j = 23 +i = 10, j = 24 +i = 10, j = 25 +i = 10, j = 26 +i = 10, j = 27 +i = 10, j = 28 +i = 10, j = 29 +i = 10, j = 30 +i = 10, j = 31 +i = 11, j = 3 +i = 11, j = 4 +i = 11, j = 5 +i = 11, j = 6 +i = 11, j = 7 +i = 11, j = 8 +i = 11, j = 9 +i = 11, j = 10 +i = 11, j = 11 +i = 11, j = 12 +i = 11, j = 13 +i = 11, j = 14 +i = 11, j = 15 +i = 11, j = 16 +i = 11, j = 17 +i = 11, j = 18 +i = 11, j = 19 +i = 11, j = 20 +i = 11, j = 21 +i = 11, j = 22 +i = 11, j = 23 +i = 11, j = 24 +i = 11, j = 25 +i = 11, j = 26 +i = 11, j = 27 +i = 11, j = 28 +i = 11, j = 29 +i = 11, j = 30 +i = 11, j = 31 +i = 12, j = 3 +i = 12, j = 4 +i = 12, j = 5 +i = 12, j = 6 +i = 12, j = 7 +i = 12, j = 8 +i = 12, j = 9 +i = 12, j = 10 +i = 12, j = 11 +i = 12, j = 12 +i = 12, j = 13 +i = 12, j = 14 +i = 12, j = 15 +i = 12, j = 16 +i = 12, j = 17 +i = 12, j = 18 +i = 12, j = 19 +i = 12, j = 20 +i = 12, j = 21 +i = 12, j = 22 +i = 12, j = 23 +i = 12, j = 24 +i = 12, j = 25 +i = 12, j = 26 +i = 12, j = 27 +i = 12, j = 28 +i = 12, j = 29 +i = 12, j = 30 +i = 12, j = 31 +i = 13, j = 3 +i = 13, j = 4 +i = 13, j = 5 +i = 13, j = 6 +i = 13, j = 7 +i = 13, j = 8 +i = 13, j = 9 +i = 13, j = 10 +i = 13, j = 11 +i = 13, j = 12 +i = 13, j = 13 +i = 13, j = 14 +i = 13, j = 15 +i = 13, j = 16 +i = 13, j = 17 +i = 13, j = 18 +i = 13, j = 19 +i = 13, j = 20 +i = 13, j = 21 +i = 13, j = 22 +i = 13, j = 23 +i = 13, j = 24 +i = 13, j = 25 +i = 13, j = 26 +i = 13, j = 27 +i = 13, j = 28 +i = 13, j = 29 +i = 13, j = 30 +i = 13, j = 31 +i = 14, j = 3 +i = 14, j = 4 +i = 14, j = 5 +i = 14, j = 6 +i = 14, j = 7 +i = 14, j = 8 +i = 14, j = 9 +i = 14, j = 10 +i = 14, j = 11 +i = 14, j = 12 +i = 14, j = 13 +i = 14, j = 14 +i = 14, j = 15 +i = 14, j = 16 +i = 14, j = 17 +i = 14, j = 18 +i = 14, j = 19 +i = 14, j = 20 +i = 14, j = 21 +i = 14, j = 22 +i = 14, j = 23 +i = 14, j = 24 +i = 14, j = 25 +i = 14, j = 26 +i = 14, j = 27 +i = 14, j = 28 +i = 14, j = 29 +i = 14, j = 30 +i = 14, j = 31 +i = 15, j = 3 +i = 15, j = 4 +i = 15, j = 5 +i = 15, j = 6 +i = 15, j = 7 +i = 15, j = 8 +i = 15, j = 9 +i = 15, j = 10 +i = 15, j = 11 +i = 15, j = 12 +i = 15, j = 13 +i = 15, j = 14 +i = 15, j = 15 +i = 15, j = 16 +i = 15, j = 17 +i = 15, j = 18 +i = 15, j = 19 +i = 15, j = 20 +i = 15, j = 21 +i = 15, j = 22 +i = 15, j = 23 +i = 15, j = 24 +i = 15, j = 25 +i = 15, j = 26 +i = 15, j = 27 +i = 15, j = 28 +i = 15, j = 29 +i = 15, j = 30 +i = 15, j = 31 +i = 16, j = 3 +i = 16, j = 4 +i = 16, j = 5 +i = 16, j = 6 +i = 16, j = 7 +i = 16, j = 8 +i = 16, j = 9 +i = 16, j = 10 +i = 16, j = 11 +i = 16, j = 12 +i = 16, j = 13 +i = 16, j = 14 +i = 16, j = 15 +i = 16, j = 16 +i = 16, j = 17 +i = 16, j = 18 +i = 16, j = 19 +i = 16, j = 20 +i = 16, j = 21 +i = 16, j = 22 +i = 16, j = 23 +i = 16, j = 24 +i = 16, j = 25 +i = 16, j = 26 +i = 16, j = 27 +i = 16, j = 28 +i = 16, j = 29 +i = 16, j = 30 +i = 16, j = 31 +i = 17, j = 3 +i = 17, j = 4 +i = 17, j = 5 +i = 17, j = 6 +i = 17, j = 7 +i = 17, j = 8 +i = 17, j = 9 +i = 17, j = 10 +i = 17, j = 11 +i = 17, j = 12 +i = 17, j = 13 +i = 17, j = 14 +i = 17, j = 15 +i = 17, j = 16 +i = 17, j = 17 +i = 17, j = 18 +i = 17, j = 19 +i = 17, j = 20 +i = 17, j = 21 +i = 17, j = 22 +i = 17, j = 23 +i = 17, j = 24 +i = 17, j = 25 +i = 17, j = 26 +i = 17, j = 27 +i = 17, j = 28 +i = 17, j = 29 +i = 17, j = 30 +i = 17, j = 31 +i = 18, j = 3 +i = 18, j = 4 +i = 18, j = 5 +i = 18, j = 6 +i = 18, j = 7 +i = 18, j = 8 +i = 18, j = 9 +i = 18, j = 10 +i = 18, j = 11 +i = 18, j = 12 +i = 18, j = 13 +i = 18, j = 14 +i = 18, j = 15 +i = 18, j = 16 +i = 18, j = 17 +i = 18, j = 18 +i = 18, j = 19 +i = 18, j = 20 +i = 18, j = 21 +i = 18, j = 22 +i = 18, j = 23 +i = 18, j = 24 +i = 18, j = 25 +i = 18, j = 26 +i = 18, j = 27 +i = 18, j = 28 +i = 18, j = 29 +i = 18, j = 30 +i = 18, j = 31 +i = 19, j = 3 +i = 19, j = 4 +i = 19, j = 5 +i = 19, j = 6 +i = 19, j = 7 +i = 19, j = 8 +i = 19, j = 9 +i = 19, j = 10 +i = 19, j = 11 +i = 19, j = 12 +i = 19, j = 13 +i = 19, j = 14 +i = 19, j = 15 +i = 19, j = 16 +i = 19, j = 17 +i = 19, j = 18 +i = 19, j = 19 +i = 19, j = 20 +i = 19, j = 21 +i = 19, j = 22 +i = 19, j = 23 +i = 19, j = 24 +i = 19, j = 25 +i = 19, j = 26 +i = 19, j = 27 +i = 19, j = 28 +i = 19, j = 29 +i = 19, j = 30 +i = 19, j = 31 +i = 20, j = 3 +i = 20, j = 4 +i = 20, j = 5 +i = 20, j = 6 +i = 20, j = 7 +i = 20, j = 8 +i = 20, j = 9 +i = 20, j = 10 +i = 20, j = 11 +i = 20, j = 12 +i = 20, j = 13 +i = 20, j = 14 +i = 20, j = 15 +i = 20, j = 16 +i = 20, j = 17 +i = 20, j = 18 +i = 20, j = 19 +i = 20, j = 20 +i = 20, j = 21 +i = 20, j = 22 +i = 20, j = 23 +i = 20, j = 24 +i = 20, j = 25 +i = 20, j = 26 +i = 20, j = 27 +i = 20, j = 28 +i = 20, j = 29 +i = 20, j = 30 +i = 20, j = 31 +i = 21, j = 3 +i = 21, j = 4 +i = 21, j = 5 +i = 21, j = 6 +i = 21, j = 7 +i = 21, j = 8 +i = 21, j = 9 +i = 21, j = 10 +i = 21, j = 11 +i = 21, j = 12 +i = 21, j = 13 +i = 21, j = 14 +i = 21, j = 15 +i = 21, j = 16 +i = 21, j = 17 +i = 21, j = 18 +i = 21, j = 19 +i = 21, j = 20 +i = 21, j = 21 +i = 21, j = 22 +i = 21, j = 23 +i = 21, j = 24 +i = 21, j = 25 +i = 21, j = 26 +i = 21, j = 27 +i = 21, j = 28 +i = 21, j = 29 +i = 21, j = 30 +i = 21, j = 31 +i = 22, j = 3 +i = 22, j = 4 +i = 22, j = 5 +i = 22, j = 6 +i = 22, j = 7 +i = 22, j = 8 +i = 22, j = 9 +i = 22, j = 10 +i = 22, j = 11 +i = 22, j = 12 +i = 22, j = 13 +i = 22, j = 14 +i = 22, j = 15 +i = 22, j = 16 +i = 22, j = 17 +i = 22, j = 18 +i = 22, j = 19 +i = 22, j = 20 +i = 22, j = 21 +i = 22, j = 22 +i = 22, j = 23 +i = 22, j = 24 +i = 22, j = 25 +i = 22, j = 26 +i = 22, j = 27 +i = 22, j = 28 +i = 22, j = 29 +i = 22, j = 30 +i = 22, j = 31 +i = 23, j = 3 +i = 23, j = 4 +i = 23, j = 5 +i = 23, j = 6 +i = 23, j = 7 +i = 23, j = 8 +i = 23, j = 9 +i = 23, j = 10 +i = 23, j = 11 +i = 23, j = 12 +i = 23, j = 13 +i = 23, j = 14 +i = 23, j = 15 +i = 23, j = 16 +i = 23, j = 17 +i = 23, j = 18 +i = 23, j = 19 +i = 23, j = 20 +i = 23, j = 21 +i = 23, j = 22 +i = 23, j = 23 +i = 23, j = 24 +i = 23, j = 25 +i = 23, j = 26 +i = 23, j = 27 +i = 23, j = 28 +i = 23, j = 29 +i = 23, j = 30 +i = 23, j = 31 +i = 24, j = 3 +i = 24, j = 4 +i = 24, j = 5 +i = 24, j = 6 +i = 24, j = 7 +i = 24, j = 8 +i = 24, j = 9 +i = 24, j = 10 +i = 24, j = 11 +i = 24, j = 12 +i = 24, j = 13 +i = 24, j = 14 +i = 24, j = 15 +i = 24, j = 16 +i = 24, j = 17 +i = 24, j = 18 +i = 24, j = 19 +i = 24, j = 20 +i = 24, j = 21 +i = 24, j = 22 +i = 24, j = 23 +i = 24, j = 24 +i = 24, j = 25 +i = 24, j = 26 +i = 24, j = 27 +i = 24, j = 28 +i = 24, j = 29 +i = 24, j = 30 +i = 24, j = 31 +i = 25, j = 3 +i = 25, j = 4 +i = 25, j = 5 +i = 25, j = 6 +i = 25, j = 7 +i = 25, j = 8 +i = 25, j = 9 +i = 25, j = 10 +i = 25, j = 11 +i = 25, j = 12 +i = 25, j = 13 +i = 25, j = 14 +i = 25, j = 15 +i = 25, j = 16 +i = 25, j = 17 +i = 25, j = 18 +i = 25, j = 19 +i = 25, j = 20 +i = 25, j = 21 +i = 25, j = 22 +i = 25, j = 23 +i = 25, j = 24 +i = 25, j = 25 +i = 25, j = 26 +i = 25, j = 27 +i = 25, j = 28 +i = 25, j = 29 +i = 25, j = 30 +i = 25, j = 31 +i = 26, j = 3 +i = 26, j = 4 +i = 26, j = 5 +i = 26, j = 6 +i = 26, j = 7 +i = 26, j = 8 +i = 26, j = 9 +i = 26, j = 10 +i = 26, j = 11 +i = 26, j = 12 +i = 26, j = 13 +i = 26, j = 14 +i = 26, j = 15 +i = 26, j = 16 +i = 26, j = 17 +i = 26, j = 18 +i = 26, j = 19 +i = 26, j = 20 +i = 26, j = 21 +i = 26, j = 22 +i = 26, j = 23 +i = 26, j = 24 +i = 26, j = 25 +i = 26, j = 26 +i = 26, j = 27 +i = 26, j = 28 +i = 26, j = 29 +i = 26, j = 30 +i = 26, j = 31 +i = 27, j = 3 +i = 27, j = 4 +i = 27, j = 5 +i = 27, j = 6 +i = 27, j = 7 +i = 27, j = 8 +i = 27, j = 9 +i = 27, j = 10 +i = 27, j = 11 +i = 27, j = 12 +i = 27, j = 13 +i = 27, j = 14 +i = 27, j = 15 +i = 27, j = 16 +i = 27, j = 17 +i = 27, j = 18 +i = 27, j = 19 +i = 27, j = 20 +i = 27, j = 21 +i = 27, j = 22 +i = 27, j = 23 +i = 27, j = 24 +i = 27, j = 25 +i = 27, j = 26 +i = 27, j = 27 +i = 27, j = 28 +i = 27, j = 29 +i = 27, j = 30 +i = 27, j = 31 +i = 28, j = 3 +i = 28, j = 4 +i = 28, j = 5 +i = 28, j = 6 +i = 28, j = 7 +i = 28, j = 8 +i = 28, j = 9 +i = 28, j = 10 +i = 28, j = 11 +i = 28, j = 12 +i = 28, j = 13 +i = 28, j = 14 +i = 28, j = 15 +i = 28, j = 16 +i = 28, j = 17 +i = 28, j = 18 +i = 28, j = 19 +i = 28, j = 20 +i = 28, j = 21 +i = 28, j = 22 +i = 28, j = 23 +i = 28, j = 24 +i = 28, j = 25 +i = 28, j = 26 +i = 28, j = 27 +i = 28, j = 28 +i = 28, j = 29 +i = 28, j = 30 +i = 28, j = 31 +i = 29, j = 3 +i = 29, j = 4 +i = 29, j = 5 +i = 29, j = 6 +i = 29, j = 7 +i = 29, j = 8 +i = 29, j = 9 +i = 29, j = 10 +i = 29, j = 11 +i = 29, j = 12 +i = 29, j = 13 +i = 29, j = 14 +i = 29, j = 15 +i = 29, j = 16 +i = 29, j = 17 +i = 29, j = 18 +i = 29, j = 19 +i = 29, j = 20 +i = 29, j = 21 +i = 29, j = 22 +i = 29, j = 23 +i = 29, j = 24 +i = 29, j = 25 +i = 29, j = 26 +i = 29, j = 27 +i = 29, j = 28 +i = 29, j = 29 +i = 29, j = 30 +i = 29, j = 31 +i = 30, j = 3 +i = 30, j = 4 +i = 30, j = 5 +i = 30, j = 6 +i = 30, j = 7 +i = 30, j = 8 +i = 30, j = 9 +i = 30, j = 10 +i = 30, j = 11 +i = 30, j = 12 +i = 30, j = 13 +i = 30, j = 14 +i = 30, j = 15 +i = 30, j = 16 +i = 30, j = 17 +i = 30, j = 18 +i = 30, j = 19 +i = 30, j = 20 +i = 30, j = 21 +i = 30, j = 22 +i = 30, j = 23 +i = 30, j = 24 +i = 30, j = 25 +i = 30, j = 26 +i = 30, j = 27 +i = 30, j = 28 +i = 30, j = 29 +i = 30, j = 30 +i = 30, j = 31 +i = 31, j = 3 +i = 31, j = 4 +i = 31, j = 5 +i = 31, j = 6 +i = 31, j = 7 +i = 31, j = 8 +i = 31, j = 9 +i = 31, j = 10 +i = 31, j = 11 +i = 31, j = 12 +i = 31, j = 13 +i = 31, j = 14 +i = 31, j = 15 +i = 31, j = 16 +i = 31, j = 17 +i = 31, j = 18 +i = 31, j = 19 +i = 31, j = 20 +i = 31, j = 21 +i = 31, j = 22 +i = 31, j = 23 +i = 31, j = 24 +i = 31, j = 25 +i = 31, j = 26 +i = 31, j = 27 +i = 31, j = 28 +i = 31, j = 29 +i = 31, j = 30 +i = 31, j = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith03/isaac.h b/src/systemc/tests/systemc/datatypes/int/arith/arith03/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith03/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith04/arith04.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith04/arith04.cpp new file mode 100644 index 000000000..587f35f80 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith04/arith04.cpp @@ -0,0 +1,182 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +void +check_string( const sc_signed& z, int v ) +{ + std::string buf( z.to_string( SC_BIN ) ); + if (z < 0) { + sc_assert(buf[2] == '1'); + } else { + sc_assert(buf[2] == '0'); + } +} + +int +sc_main( int argc, char* argv[] ) +{ + signed int vali[5] = { 0, 1, -1, 7, -8 }; + signed int valj[5] = { 0, 1, -1, 7, -8 }; + + for (int i = 3; i < 32; ++i) { + for (int j = 3; j < 32; ++j) { + cout << "i = " << i << ", j = " << j << endl; + + sc_signed x(i); + sc_signed y(j); + sc_signed z(64); + + vali[3] = (1 << (i - 1)) - 1; + vali[4] = - (1 << (i - 1)); + + valj[3] = (1 << (j - 1)) - 1; + valj[4] = - (1 << (j - 1)); + + for (int ii = 0; ii < 100; ++ii) { + for (int jj = 0; jj < 100; ++jj) { + signed int qi = (ii < 5) ? vali[ii] : (rng.rand() & ((1 << i) - 1)); + signed int qj = (jj < 5) ? valj[jj] : (rng.rand() & ((1 << j) - 1)); + signed int tqi; + + if (qi & (1 << (i - 1))) { + qi = (qi << (32 - i)) >> (32 - i); + } + if (qj & (1 << (j - 1))) { + qj = (qj << (32 - j)) >> (32 - j); + } + + x = qi; + tqi = qi; + sc_assert( x == qi ); + y = qj; + sc_assert( y == qj ); + sc_assert((x == qj) == (qi == qj)); + sc_assert((x == qj) == (qj == x)); + sc_assert((x != qj) == (qi != qj)); + sc_assert((x != qj) == (qj != x)); + sc_assert((x < qj) == (qi < qj)); + sc_assert((x < qj) == (qj > x)); + sc_assert((x <= qj) == (qi <= qj)); + sc_assert((x <= qj) == (qj >= x)); + sc_assert((x > qj) == (qi > qj)); + sc_assert((x > qj) == (qj < x)); + sc_assert((x >= qj) == (qi >= qj)); + sc_assert((x >= qj) == (qj <= x)); + + x += y; + tqi += qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x -= y; + tqi -= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x *= y; + tqi *= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + if (y != 0) { + x = qi; + tqi = qi; + x /= y; + tqi /= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x %= y; + tqi %= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + } + + x = qi; + tqi = qi; + x &= y; + tqi &= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x |= y; + tqi |= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x ^= y; + tqi ^= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + if (jj < i - 1) { + x = qi; + tqi = qi; + x <<= jj; + tqi <<= jj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x >>= jj; + tqi >>= jj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + } + } + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith04/golden/arith04.log b/src/systemc/tests/systemc/datatypes/int/arith/arith04/golden/arith04.log new file mode 100644 index 000000000..4e17a8196 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith04/golden/arith04.log @@ -0,0 +1,842 @@ +SystemC Simulation +i = 3, j = 3 +i = 3, j = 4 +i = 3, j = 5 +i = 3, j = 6 +i = 3, j = 7 +i = 3, j = 8 +i = 3, j = 9 +i = 3, j = 10 +i = 3, j = 11 +i = 3, j = 12 +i = 3, j = 13 +i = 3, j = 14 +i = 3, j = 15 +i = 3, j = 16 +i = 3, j = 17 +i = 3, j = 18 +i = 3, j = 19 +i = 3, j = 20 +i = 3, j = 21 +i = 3, j = 22 +i = 3, j = 23 +i = 3, j = 24 +i = 3, j = 25 +i = 3, j = 26 +i = 3, j = 27 +i = 3, j = 28 +i = 3, j = 29 +i = 3, j = 30 +i = 3, j = 31 +i = 4, j = 3 +i = 4, j = 4 +i = 4, j = 5 +i = 4, j = 6 +i = 4, j = 7 +i = 4, j = 8 +i = 4, j = 9 +i = 4, j = 10 +i = 4, j = 11 +i = 4, j = 12 +i = 4, j = 13 +i = 4, j = 14 +i = 4, j = 15 +i = 4, j = 16 +i = 4, j = 17 +i = 4, j = 18 +i = 4, j = 19 +i = 4, j = 20 +i = 4, j = 21 +i = 4, j = 22 +i = 4, j = 23 +i = 4, j = 24 +i = 4, j = 25 +i = 4, j = 26 +i = 4, j = 27 +i = 4, j = 28 +i = 4, j = 29 +i = 4, j = 30 +i = 4, j = 31 +i = 5, j = 3 +i = 5, j = 4 +i = 5, j = 5 +i = 5, j = 6 +i = 5, j = 7 +i = 5, j = 8 +i = 5, j = 9 +i = 5, j = 10 +i = 5, j = 11 +i = 5, j = 12 +i = 5, j = 13 +i = 5, j = 14 +i = 5, j = 15 +i = 5, j = 16 +i = 5, j = 17 +i = 5, j = 18 +i = 5, j = 19 +i = 5, j = 20 +i = 5, j = 21 +i = 5, j = 22 +i = 5, j = 23 +i = 5, j = 24 +i = 5, j = 25 +i = 5, j = 26 +i = 5, j = 27 +i = 5, j = 28 +i = 5, j = 29 +i = 5, j = 30 +i = 5, j = 31 +i = 6, j = 3 +i = 6, j = 4 +i = 6, j = 5 +i = 6, j = 6 +i = 6, j = 7 +i = 6, j = 8 +i = 6, j = 9 +i = 6, j = 10 +i = 6, j = 11 +i = 6, j = 12 +i = 6, j = 13 +i = 6, j = 14 +i = 6, j = 15 +i = 6, j = 16 +i = 6, j = 17 +i = 6, j = 18 +i = 6, j = 19 +i = 6, j = 20 +i = 6, j = 21 +i = 6, j = 22 +i = 6, j = 23 +i = 6, j = 24 +i = 6, j = 25 +i = 6, j = 26 +i = 6, j = 27 +i = 6, j = 28 +i = 6, j = 29 +i = 6, j = 30 +i = 6, j = 31 +i = 7, j = 3 +i = 7, j = 4 +i = 7, j = 5 +i = 7, j = 6 +i = 7, j = 7 +i = 7, j = 8 +i = 7, j = 9 +i = 7, j = 10 +i = 7, j = 11 +i = 7, j = 12 +i = 7, j = 13 +i = 7, j = 14 +i = 7, j = 15 +i = 7, j = 16 +i = 7, j = 17 +i = 7, j = 18 +i = 7, j = 19 +i = 7, j = 20 +i = 7, j = 21 +i = 7, j = 22 +i = 7, j = 23 +i = 7, j = 24 +i = 7, j = 25 +i = 7, j = 26 +i = 7, j = 27 +i = 7, j = 28 +i = 7, j = 29 +i = 7, j = 30 +i = 7, j = 31 +i = 8, j = 3 +i = 8, j = 4 +i = 8, j = 5 +i = 8, j = 6 +i = 8, j = 7 +i = 8, j = 8 +i = 8, j = 9 +i = 8, j = 10 +i = 8, j = 11 +i = 8, j = 12 +i = 8, j = 13 +i = 8, j = 14 +i = 8, j = 15 +i = 8, j = 16 +i = 8, j = 17 +i = 8, j = 18 +i = 8, j = 19 +i = 8, j = 20 +i = 8, j = 21 +i = 8, j = 22 +i = 8, j = 23 +i = 8, j = 24 +i = 8, j = 25 +i = 8, j = 26 +i = 8, j = 27 +i = 8, j = 28 +i = 8, j = 29 +i = 8, j = 30 +i = 8, j = 31 +i = 9, j = 3 +i = 9, j = 4 +i = 9, j = 5 +i = 9, j = 6 +i = 9, j = 7 +i = 9, j = 8 +i = 9, j = 9 +i = 9, j = 10 +i = 9, j = 11 +i = 9, j = 12 +i = 9, j = 13 +i = 9, j = 14 +i = 9, j = 15 +i = 9, j = 16 +i = 9, j = 17 +i = 9, j = 18 +i = 9, j = 19 +i = 9, j = 20 +i = 9, j = 21 +i = 9, j = 22 +i = 9, j = 23 +i = 9, j = 24 +i = 9, j = 25 +i = 9, j = 26 +i = 9, j = 27 +i = 9, j = 28 +i = 9, j = 29 +i = 9, j = 30 +i = 9, j = 31 +i = 10, j = 3 +i = 10, j = 4 +i = 10, j = 5 +i = 10, j = 6 +i = 10, j = 7 +i = 10, j = 8 +i = 10, j = 9 +i = 10, j = 10 +i = 10, j = 11 +i = 10, j = 12 +i = 10, j = 13 +i = 10, j = 14 +i = 10, j = 15 +i = 10, j = 16 +i = 10, j = 17 +i = 10, j = 18 +i = 10, j = 19 +i = 10, j = 20 +i = 10, j = 21 +i = 10, j = 22 +i = 10, j = 23 +i = 10, j = 24 +i = 10, j = 25 +i = 10, j = 26 +i = 10, j = 27 +i = 10, j = 28 +i = 10, j = 29 +i = 10, j = 30 +i = 10, j = 31 +i = 11, j = 3 +i = 11, j = 4 +i = 11, j = 5 +i = 11, j = 6 +i = 11, j = 7 +i = 11, j = 8 +i = 11, j = 9 +i = 11, j = 10 +i = 11, j = 11 +i = 11, j = 12 +i = 11, j = 13 +i = 11, j = 14 +i = 11, j = 15 +i = 11, j = 16 +i = 11, j = 17 +i = 11, j = 18 +i = 11, j = 19 +i = 11, j = 20 +i = 11, j = 21 +i = 11, j = 22 +i = 11, j = 23 +i = 11, j = 24 +i = 11, j = 25 +i = 11, j = 26 +i = 11, j = 27 +i = 11, j = 28 +i = 11, j = 29 +i = 11, j = 30 +i = 11, j = 31 +i = 12, j = 3 +i = 12, j = 4 +i = 12, j = 5 +i = 12, j = 6 +i = 12, j = 7 +i = 12, j = 8 +i = 12, j = 9 +i = 12, j = 10 +i = 12, j = 11 +i = 12, j = 12 +i = 12, j = 13 +i = 12, j = 14 +i = 12, j = 15 +i = 12, j = 16 +i = 12, j = 17 +i = 12, j = 18 +i = 12, j = 19 +i = 12, j = 20 +i = 12, j = 21 +i = 12, j = 22 +i = 12, j = 23 +i = 12, j = 24 +i = 12, j = 25 +i = 12, j = 26 +i = 12, j = 27 +i = 12, j = 28 +i = 12, j = 29 +i = 12, j = 30 +i = 12, j = 31 +i = 13, j = 3 +i = 13, j = 4 +i = 13, j = 5 +i = 13, j = 6 +i = 13, j = 7 +i = 13, j = 8 +i = 13, j = 9 +i = 13, j = 10 +i = 13, j = 11 +i = 13, j = 12 +i = 13, j = 13 +i = 13, j = 14 +i = 13, j = 15 +i = 13, j = 16 +i = 13, j = 17 +i = 13, j = 18 +i = 13, j = 19 +i = 13, j = 20 +i = 13, j = 21 +i = 13, j = 22 +i = 13, j = 23 +i = 13, j = 24 +i = 13, j = 25 +i = 13, j = 26 +i = 13, j = 27 +i = 13, j = 28 +i = 13, j = 29 +i = 13, j = 30 +i = 13, j = 31 +i = 14, j = 3 +i = 14, j = 4 +i = 14, j = 5 +i = 14, j = 6 +i = 14, j = 7 +i = 14, j = 8 +i = 14, j = 9 +i = 14, j = 10 +i = 14, j = 11 +i = 14, j = 12 +i = 14, j = 13 +i = 14, j = 14 +i = 14, j = 15 +i = 14, j = 16 +i = 14, j = 17 +i = 14, j = 18 +i = 14, j = 19 +i = 14, j = 20 +i = 14, j = 21 +i = 14, j = 22 +i = 14, j = 23 +i = 14, j = 24 +i = 14, j = 25 +i = 14, j = 26 +i = 14, j = 27 +i = 14, j = 28 +i = 14, j = 29 +i = 14, j = 30 +i = 14, j = 31 +i = 15, j = 3 +i = 15, j = 4 +i = 15, j = 5 +i = 15, j = 6 +i = 15, j = 7 +i = 15, j = 8 +i = 15, j = 9 +i = 15, j = 10 +i = 15, j = 11 +i = 15, j = 12 +i = 15, j = 13 +i = 15, j = 14 +i = 15, j = 15 +i = 15, j = 16 +i = 15, j = 17 +i = 15, j = 18 +i = 15, j = 19 +i = 15, j = 20 +i = 15, j = 21 +i = 15, j = 22 +i = 15, j = 23 +i = 15, j = 24 +i = 15, j = 25 +i = 15, j = 26 +i = 15, j = 27 +i = 15, j = 28 +i = 15, j = 29 +i = 15, j = 30 +i = 15, j = 31 +i = 16, j = 3 +i = 16, j = 4 +i = 16, j = 5 +i = 16, j = 6 +i = 16, j = 7 +i = 16, j = 8 +i = 16, j = 9 +i = 16, j = 10 +i = 16, j = 11 +i = 16, j = 12 +i = 16, j = 13 +i = 16, j = 14 +i = 16, j = 15 +i = 16, j = 16 +i = 16, j = 17 +i = 16, j = 18 +i = 16, j = 19 +i = 16, j = 20 +i = 16, j = 21 +i = 16, j = 22 +i = 16, j = 23 +i = 16, j = 24 +i = 16, j = 25 +i = 16, j = 26 +i = 16, j = 27 +i = 16, j = 28 +i = 16, j = 29 +i = 16, j = 30 +i = 16, j = 31 +i = 17, j = 3 +i = 17, j = 4 +i = 17, j = 5 +i = 17, j = 6 +i = 17, j = 7 +i = 17, j = 8 +i = 17, j = 9 +i = 17, j = 10 +i = 17, j = 11 +i = 17, j = 12 +i = 17, j = 13 +i = 17, j = 14 +i = 17, j = 15 +i = 17, j = 16 +i = 17, j = 17 +i = 17, j = 18 +i = 17, j = 19 +i = 17, j = 20 +i = 17, j = 21 +i = 17, j = 22 +i = 17, j = 23 +i = 17, j = 24 +i = 17, j = 25 +i = 17, j = 26 +i = 17, j = 27 +i = 17, j = 28 +i = 17, j = 29 +i = 17, j = 30 +i = 17, j = 31 +i = 18, j = 3 +i = 18, j = 4 +i = 18, j = 5 +i = 18, j = 6 +i = 18, j = 7 +i = 18, j = 8 +i = 18, j = 9 +i = 18, j = 10 +i = 18, j = 11 +i = 18, j = 12 +i = 18, j = 13 +i = 18, j = 14 +i = 18, j = 15 +i = 18, j = 16 +i = 18, j = 17 +i = 18, j = 18 +i = 18, j = 19 +i = 18, j = 20 +i = 18, j = 21 +i = 18, j = 22 +i = 18, j = 23 +i = 18, j = 24 +i = 18, j = 25 +i = 18, j = 26 +i = 18, j = 27 +i = 18, j = 28 +i = 18, j = 29 +i = 18, j = 30 +i = 18, j = 31 +i = 19, j = 3 +i = 19, j = 4 +i = 19, j = 5 +i = 19, j = 6 +i = 19, j = 7 +i = 19, j = 8 +i = 19, j = 9 +i = 19, j = 10 +i = 19, j = 11 +i = 19, j = 12 +i = 19, j = 13 +i = 19, j = 14 +i = 19, j = 15 +i = 19, j = 16 +i = 19, j = 17 +i = 19, j = 18 +i = 19, j = 19 +i = 19, j = 20 +i = 19, j = 21 +i = 19, j = 22 +i = 19, j = 23 +i = 19, j = 24 +i = 19, j = 25 +i = 19, j = 26 +i = 19, j = 27 +i = 19, j = 28 +i = 19, j = 29 +i = 19, j = 30 +i = 19, j = 31 +i = 20, j = 3 +i = 20, j = 4 +i = 20, j = 5 +i = 20, j = 6 +i = 20, j = 7 +i = 20, j = 8 +i = 20, j = 9 +i = 20, j = 10 +i = 20, j = 11 +i = 20, j = 12 +i = 20, j = 13 +i = 20, j = 14 +i = 20, j = 15 +i = 20, j = 16 +i = 20, j = 17 +i = 20, j = 18 +i = 20, j = 19 +i = 20, j = 20 +i = 20, j = 21 +i = 20, j = 22 +i = 20, j = 23 +i = 20, j = 24 +i = 20, j = 25 +i = 20, j = 26 +i = 20, j = 27 +i = 20, j = 28 +i = 20, j = 29 +i = 20, j = 30 +i = 20, j = 31 +i = 21, j = 3 +i = 21, j = 4 +i = 21, j = 5 +i = 21, j = 6 +i = 21, j = 7 +i = 21, j = 8 +i = 21, j = 9 +i = 21, j = 10 +i = 21, j = 11 +i = 21, j = 12 +i = 21, j = 13 +i = 21, j = 14 +i = 21, j = 15 +i = 21, j = 16 +i = 21, j = 17 +i = 21, j = 18 +i = 21, j = 19 +i = 21, j = 20 +i = 21, j = 21 +i = 21, j = 22 +i = 21, j = 23 +i = 21, j = 24 +i = 21, j = 25 +i = 21, j = 26 +i = 21, j = 27 +i = 21, j = 28 +i = 21, j = 29 +i = 21, j = 30 +i = 21, j = 31 +i = 22, j = 3 +i = 22, j = 4 +i = 22, j = 5 +i = 22, j = 6 +i = 22, j = 7 +i = 22, j = 8 +i = 22, j = 9 +i = 22, j = 10 +i = 22, j = 11 +i = 22, j = 12 +i = 22, j = 13 +i = 22, j = 14 +i = 22, j = 15 +i = 22, j = 16 +i = 22, j = 17 +i = 22, j = 18 +i = 22, j = 19 +i = 22, j = 20 +i = 22, j = 21 +i = 22, j = 22 +i = 22, j = 23 +i = 22, j = 24 +i = 22, j = 25 +i = 22, j = 26 +i = 22, j = 27 +i = 22, j = 28 +i = 22, j = 29 +i = 22, j = 30 +i = 22, j = 31 +i = 23, j = 3 +i = 23, j = 4 +i = 23, j = 5 +i = 23, j = 6 +i = 23, j = 7 +i = 23, j = 8 +i = 23, j = 9 +i = 23, j = 10 +i = 23, j = 11 +i = 23, j = 12 +i = 23, j = 13 +i = 23, j = 14 +i = 23, j = 15 +i = 23, j = 16 +i = 23, j = 17 +i = 23, j = 18 +i = 23, j = 19 +i = 23, j = 20 +i = 23, j = 21 +i = 23, j = 22 +i = 23, j = 23 +i = 23, j = 24 +i = 23, j = 25 +i = 23, j = 26 +i = 23, j = 27 +i = 23, j = 28 +i = 23, j = 29 +i = 23, j = 30 +i = 23, j = 31 +i = 24, j = 3 +i = 24, j = 4 +i = 24, j = 5 +i = 24, j = 6 +i = 24, j = 7 +i = 24, j = 8 +i = 24, j = 9 +i = 24, j = 10 +i = 24, j = 11 +i = 24, j = 12 +i = 24, j = 13 +i = 24, j = 14 +i = 24, j = 15 +i = 24, j = 16 +i = 24, j = 17 +i = 24, j = 18 +i = 24, j = 19 +i = 24, j = 20 +i = 24, j = 21 +i = 24, j = 22 +i = 24, j = 23 +i = 24, j = 24 +i = 24, j = 25 +i = 24, j = 26 +i = 24, j = 27 +i = 24, j = 28 +i = 24, j = 29 +i = 24, j = 30 +i = 24, j = 31 +i = 25, j = 3 +i = 25, j = 4 +i = 25, j = 5 +i = 25, j = 6 +i = 25, j = 7 +i = 25, j = 8 +i = 25, j = 9 +i = 25, j = 10 +i = 25, j = 11 +i = 25, j = 12 +i = 25, j = 13 +i = 25, j = 14 +i = 25, j = 15 +i = 25, j = 16 +i = 25, j = 17 +i = 25, j = 18 +i = 25, j = 19 +i = 25, j = 20 +i = 25, j = 21 +i = 25, j = 22 +i = 25, j = 23 +i = 25, j = 24 +i = 25, j = 25 +i = 25, j = 26 +i = 25, j = 27 +i = 25, j = 28 +i = 25, j = 29 +i = 25, j = 30 +i = 25, j = 31 +i = 26, j = 3 +i = 26, j = 4 +i = 26, j = 5 +i = 26, j = 6 +i = 26, j = 7 +i = 26, j = 8 +i = 26, j = 9 +i = 26, j = 10 +i = 26, j = 11 +i = 26, j = 12 +i = 26, j = 13 +i = 26, j = 14 +i = 26, j = 15 +i = 26, j = 16 +i = 26, j = 17 +i = 26, j = 18 +i = 26, j = 19 +i = 26, j = 20 +i = 26, j = 21 +i = 26, j = 22 +i = 26, j = 23 +i = 26, j = 24 +i = 26, j = 25 +i = 26, j = 26 +i = 26, j = 27 +i = 26, j = 28 +i = 26, j = 29 +i = 26, j = 30 +i = 26, j = 31 +i = 27, j = 3 +i = 27, j = 4 +i = 27, j = 5 +i = 27, j = 6 +i = 27, j = 7 +i = 27, j = 8 +i = 27, j = 9 +i = 27, j = 10 +i = 27, j = 11 +i = 27, j = 12 +i = 27, j = 13 +i = 27, j = 14 +i = 27, j = 15 +i = 27, j = 16 +i = 27, j = 17 +i = 27, j = 18 +i = 27, j = 19 +i = 27, j = 20 +i = 27, j = 21 +i = 27, j = 22 +i = 27, j = 23 +i = 27, j = 24 +i = 27, j = 25 +i = 27, j = 26 +i = 27, j = 27 +i = 27, j = 28 +i = 27, j = 29 +i = 27, j = 30 +i = 27, j = 31 +i = 28, j = 3 +i = 28, j = 4 +i = 28, j = 5 +i = 28, j = 6 +i = 28, j = 7 +i = 28, j = 8 +i = 28, j = 9 +i = 28, j = 10 +i = 28, j = 11 +i = 28, j = 12 +i = 28, j = 13 +i = 28, j = 14 +i = 28, j = 15 +i = 28, j = 16 +i = 28, j = 17 +i = 28, j = 18 +i = 28, j = 19 +i = 28, j = 20 +i = 28, j = 21 +i = 28, j = 22 +i = 28, j = 23 +i = 28, j = 24 +i = 28, j = 25 +i = 28, j = 26 +i = 28, j = 27 +i = 28, j = 28 +i = 28, j = 29 +i = 28, j = 30 +i = 28, j = 31 +i = 29, j = 3 +i = 29, j = 4 +i = 29, j = 5 +i = 29, j = 6 +i = 29, j = 7 +i = 29, j = 8 +i = 29, j = 9 +i = 29, j = 10 +i = 29, j = 11 +i = 29, j = 12 +i = 29, j = 13 +i = 29, j = 14 +i = 29, j = 15 +i = 29, j = 16 +i = 29, j = 17 +i = 29, j = 18 +i = 29, j = 19 +i = 29, j = 20 +i = 29, j = 21 +i = 29, j = 22 +i = 29, j = 23 +i = 29, j = 24 +i = 29, j = 25 +i = 29, j = 26 +i = 29, j = 27 +i = 29, j = 28 +i = 29, j = 29 +i = 29, j = 30 +i = 29, j = 31 +i = 30, j = 3 +i = 30, j = 4 +i = 30, j = 5 +i = 30, j = 6 +i = 30, j = 7 +i = 30, j = 8 +i = 30, j = 9 +i = 30, j = 10 +i = 30, j = 11 +i = 30, j = 12 +i = 30, j = 13 +i = 30, j = 14 +i = 30, j = 15 +i = 30, j = 16 +i = 30, j = 17 +i = 30, j = 18 +i = 30, j = 19 +i = 30, j = 20 +i = 30, j = 21 +i = 30, j = 22 +i = 30, j = 23 +i = 30, j = 24 +i = 30, j = 25 +i = 30, j = 26 +i = 30, j = 27 +i = 30, j = 28 +i = 30, j = 29 +i = 30, j = 30 +i = 30, j = 31 +i = 31, j = 3 +i = 31, j = 4 +i = 31, j = 5 +i = 31, j = 6 +i = 31, j = 7 +i = 31, j = 8 +i = 31, j = 9 +i = 31, j = 10 +i = 31, j = 11 +i = 31, j = 12 +i = 31, j = 13 +i = 31, j = 14 +i = 31, j = 15 +i = 31, j = 16 +i = 31, j = 17 +i = 31, j = 18 +i = 31, j = 19 +i = 31, j = 20 +i = 31, j = 21 +i = 31, j = 22 +i = 31, j = 23 +i = 31, j = 24 +i = 31, j = 25 +i = 31, j = 26 +i = 31, j = 27 +i = 31, j = 28 +i = 31, j = 29 +i = 31, j = 30 +i = 31, j = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith04/isaac.h b/src/systemc/tests/systemc/datatypes/int/arith/arith04/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith04/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith05/arith05.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith05/arith05.cpp new file mode 100644 index 000000000..7eb83eaff --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith05/arith05.cpp @@ -0,0 +1,182 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +void +check_string( const sc_signed& z, int v ) +{ + std::string buf( z.to_string( SC_BIN ) ); + if (z < 0) { + sc_assert(buf[2] == '1'); + } else { + sc_assert(buf[2] == '0'); + } +} + +int +sc_main( int argc, char* argv[] ) +{ + unsigned vali[5] = { 0, 1, (unsigned)-1, 7, (unsigned)-8 }; + unsigned valj[5] = { 0, 1, (unsigned)-1, 7, (unsigned)-8 }; + + for (unsigned i = 3; i < 32; ++i) { + for (unsigned j = 3; j < 32; ++j) { + cout << "i = " << i << ", j = " << j << endl; + + sc_unsigned x(i); + sc_unsigned y(j); + sc_unsigned z(64); + + vali[3] = (1 << (i - 1)) - 1; + vali[4] = - (1 << (i - 1)); + + valj[3] = (1 << (j - 1)) - 1; + valj[4] = - (1 << (j - 1)); + + for (unsigned ii = 0; ii < 100; ++ii) { + for (unsigned jj = 0; jj < 100; ++jj) { + unsigned qi = (ii < 5) ? vali[ii] : (rng.rand() & ((1 << i) - 1)); + unsigned qj = (jj < 5) ? valj[jj] : (rng.rand() & ((1 << j) - 1)); + unsigned tqi; + + if (qi & (1 << (i - 1))) { + qi = (qi << (32 - i)) >> (32 - i); + } + if (qj & (1 << (j - 1))) { + qj = (qj << (32 - j)) >> (32 - j); + } + + x = qi; + tqi = qi; + sc_assert( x == qi ); + y = qj; + sc_assert( y == qj ); + sc_assert((x == qj) == (qi == qj)); + sc_assert((x == qj) == (qj == x)); + sc_assert((x != qj) == (qi != qj)); + sc_assert((x != qj) == (qj != x)); + sc_assert((x < qj) == (qi < qj)); + sc_assert((x < qj) == (qj > x)); + sc_assert((x <= qj) == (qi <= qj)); + sc_assert((x <= qj) == (qj >= x)); + sc_assert((x > qj) == (qi > qj)); + sc_assert((x > qj) == (qj < x)); + sc_assert((x >= qj) == (qi >= qj)); + sc_assert((x >= qj) == (qj <= x)); + + x += y; + tqi += qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x -= y; + tqi -= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x *= y; + tqi *= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + if (y != 0) { + x = qi; + tqi = qi; + x /= y; + tqi /= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x %= y; + tqi %= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + } + + x = qi; + tqi = qi; + x &= y; + tqi &= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x |= y; + tqi |= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x ^= y; + tqi ^= qj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + if (jj < i - 1) { + x = qi; + tqi = qi; + x <<= jj; + tqi <<= jj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + + x = qi; + tqi = qi; + x >>= jj; + tqi >>= jj; + tqi = (tqi << (32 - i)) >> (32 - i); + sc_assert( x == tqi ); + } + } + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith05/golden/arith05.log b/src/systemc/tests/systemc/datatypes/int/arith/arith05/golden/arith05.log new file mode 100644 index 000000000..4e17a8196 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith05/golden/arith05.log @@ -0,0 +1,842 @@ +SystemC Simulation +i = 3, j = 3 +i = 3, j = 4 +i = 3, j = 5 +i = 3, j = 6 +i = 3, j = 7 +i = 3, j = 8 +i = 3, j = 9 +i = 3, j = 10 +i = 3, j = 11 +i = 3, j = 12 +i = 3, j = 13 +i = 3, j = 14 +i = 3, j = 15 +i = 3, j = 16 +i = 3, j = 17 +i = 3, j = 18 +i = 3, j = 19 +i = 3, j = 20 +i = 3, j = 21 +i = 3, j = 22 +i = 3, j = 23 +i = 3, j = 24 +i = 3, j = 25 +i = 3, j = 26 +i = 3, j = 27 +i = 3, j = 28 +i = 3, j = 29 +i = 3, j = 30 +i = 3, j = 31 +i = 4, j = 3 +i = 4, j = 4 +i = 4, j = 5 +i = 4, j = 6 +i = 4, j = 7 +i = 4, j = 8 +i = 4, j = 9 +i = 4, j = 10 +i = 4, j = 11 +i = 4, j = 12 +i = 4, j = 13 +i = 4, j = 14 +i = 4, j = 15 +i = 4, j = 16 +i = 4, j = 17 +i = 4, j = 18 +i = 4, j = 19 +i = 4, j = 20 +i = 4, j = 21 +i = 4, j = 22 +i = 4, j = 23 +i = 4, j = 24 +i = 4, j = 25 +i = 4, j = 26 +i = 4, j = 27 +i = 4, j = 28 +i = 4, j = 29 +i = 4, j = 30 +i = 4, j = 31 +i = 5, j = 3 +i = 5, j = 4 +i = 5, j = 5 +i = 5, j = 6 +i = 5, j = 7 +i = 5, j = 8 +i = 5, j = 9 +i = 5, j = 10 +i = 5, j = 11 +i = 5, j = 12 +i = 5, j = 13 +i = 5, j = 14 +i = 5, j = 15 +i = 5, j = 16 +i = 5, j = 17 +i = 5, j = 18 +i = 5, j = 19 +i = 5, j = 20 +i = 5, j = 21 +i = 5, j = 22 +i = 5, j = 23 +i = 5, j = 24 +i = 5, j = 25 +i = 5, j = 26 +i = 5, j = 27 +i = 5, j = 28 +i = 5, j = 29 +i = 5, j = 30 +i = 5, j = 31 +i = 6, j = 3 +i = 6, j = 4 +i = 6, j = 5 +i = 6, j = 6 +i = 6, j = 7 +i = 6, j = 8 +i = 6, j = 9 +i = 6, j = 10 +i = 6, j = 11 +i = 6, j = 12 +i = 6, j = 13 +i = 6, j = 14 +i = 6, j = 15 +i = 6, j = 16 +i = 6, j = 17 +i = 6, j = 18 +i = 6, j = 19 +i = 6, j = 20 +i = 6, j = 21 +i = 6, j = 22 +i = 6, j = 23 +i = 6, j = 24 +i = 6, j = 25 +i = 6, j = 26 +i = 6, j = 27 +i = 6, j = 28 +i = 6, j = 29 +i = 6, j = 30 +i = 6, j = 31 +i = 7, j = 3 +i = 7, j = 4 +i = 7, j = 5 +i = 7, j = 6 +i = 7, j = 7 +i = 7, j = 8 +i = 7, j = 9 +i = 7, j = 10 +i = 7, j = 11 +i = 7, j = 12 +i = 7, j = 13 +i = 7, j = 14 +i = 7, j = 15 +i = 7, j = 16 +i = 7, j = 17 +i = 7, j = 18 +i = 7, j = 19 +i = 7, j = 20 +i = 7, j = 21 +i = 7, j = 22 +i = 7, j = 23 +i = 7, j = 24 +i = 7, j = 25 +i = 7, j = 26 +i = 7, j = 27 +i = 7, j = 28 +i = 7, j = 29 +i = 7, j = 30 +i = 7, j = 31 +i = 8, j = 3 +i = 8, j = 4 +i = 8, j = 5 +i = 8, j = 6 +i = 8, j = 7 +i = 8, j = 8 +i = 8, j = 9 +i = 8, j = 10 +i = 8, j = 11 +i = 8, j = 12 +i = 8, j = 13 +i = 8, j = 14 +i = 8, j = 15 +i = 8, j = 16 +i = 8, j = 17 +i = 8, j = 18 +i = 8, j = 19 +i = 8, j = 20 +i = 8, j = 21 +i = 8, j = 22 +i = 8, j = 23 +i = 8, j = 24 +i = 8, j = 25 +i = 8, j = 26 +i = 8, j = 27 +i = 8, j = 28 +i = 8, j = 29 +i = 8, j = 30 +i = 8, j = 31 +i = 9, j = 3 +i = 9, j = 4 +i = 9, j = 5 +i = 9, j = 6 +i = 9, j = 7 +i = 9, j = 8 +i = 9, j = 9 +i = 9, j = 10 +i = 9, j = 11 +i = 9, j = 12 +i = 9, j = 13 +i = 9, j = 14 +i = 9, j = 15 +i = 9, j = 16 +i = 9, j = 17 +i = 9, j = 18 +i = 9, j = 19 +i = 9, j = 20 +i = 9, j = 21 +i = 9, j = 22 +i = 9, j = 23 +i = 9, j = 24 +i = 9, j = 25 +i = 9, j = 26 +i = 9, j = 27 +i = 9, j = 28 +i = 9, j = 29 +i = 9, j = 30 +i = 9, j = 31 +i = 10, j = 3 +i = 10, j = 4 +i = 10, j = 5 +i = 10, j = 6 +i = 10, j = 7 +i = 10, j = 8 +i = 10, j = 9 +i = 10, j = 10 +i = 10, j = 11 +i = 10, j = 12 +i = 10, j = 13 +i = 10, j = 14 +i = 10, j = 15 +i = 10, j = 16 +i = 10, j = 17 +i = 10, j = 18 +i = 10, j = 19 +i = 10, j = 20 +i = 10, j = 21 +i = 10, j = 22 +i = 10, j = 23 +i = 10, j = 24 +i = 10, j = 25 +i = 10, j = 26 +i = 10, j = 27 +i = 10, j = 28 +i = 10, j = 29 +i = 10, j = 30 +i = 10, j = 31 +i = 11, j = 3 +i = 11, j = 4 +i = 11, j = 5 +i = 11, j = 6 +i = 11, j = 7 +i = 11, j = 8 +i = 11, j = 9 +i = 11, j = 10 +i = 11, j = 11 +i = 11, j = 12 +i = 11, j = 13 +i = 11, j = 14 +i = 11, j = 15 +i = 11, j = 16 +i = 11, j = 17 +i = 11, j = 18 +i = 11, j = 19 +i = 11, j = 20 +i = 11, j = 21 +i = 11, j = 22 +i = 11, j = 23 +i = 11, j = 24 +i = 11, j = 25 +i = 11, j = 26 +i = 11, j = 27 +i = 11, j = 28 +i = 11, j = 29 +i = 11, j = 30 +i = 11, j = 31 +i = 12, j = 3 +i = 12, j = 4 +i = 12, j = 5 +i = 12, j = 6 +i = 12, j = 7 +i = 12, j = 8 +i = 12, j = 9 +i = 12, j = 10 +i = 12, j = 11 +i = 12, j = 12 +i = 12, j = 13 +i = 12, j = 14 +i = 12, j = 15 +i = 12, j = 16 +i = 12, j = 17 +i = 12, j = 18 +i = 12, j = 19 +i = 12, j = 20 +i = 12, j = 21 +i = 12, j = 22 +i = 12, j = 23 +i = 12, j = 24 +i = 12, j = 25 +i = 12, j = 26 +i = 12, j = 27 +i = 12, j = 28 +i = 12, j = 29 +i = 12, j = 30 +i = 12, j = 31 +i = 13, j = 3 +i = 13, j = 4 +i = 13, j = 5 +i = 13, j = 6 +i = 13, j = 7 +i = 13, j = 8 +i = 13, j = 9 +i = 13, j = 10 +i = 13, j = 11 +i = 13, j = 12 +i = 13, j = 13 +i = 13, j = 14 +i = 13, j = 15 +i = 13, j = 16 +i = 13, j = 17 +i = 13, j = 18 +i = 13, j = 19 +i = 13, j = 20 +i = 13, j = 21 +i = 13, j = 22 +i = 13, j = 23 +i = 13, j = 24 +i = 13, j = 25 +i = 13, j = 26 +i = 13, j = 27 +i = 13, j = 28 +i = 13, j = 29 +i = 13, j = 30 +i = 13, j = 31 +i = 14, j = 3 +i = 14, j = 4 +i = 14, j = 5 +i = 14, j = 6 +i = 14, j = 7 +i = 14, j = 8 +i = 14, j = 9 +i = 14, j = 10 +i = 14, j = 11 +i = 14, j = 12 +i = 14, j = 13 +i = 14, j = 14 +i = 14, j = 15 +i = 14, j = 16 +i = 14, j = 17 +i = 14, j = 18 +i = 14, j = 19 +i = 14, j = 20 +i = 14, j = 21 +i = 14, j = 22 +i = 14, j = 23 +i = 14, j = 24 +i = 14, j = 25 +i = 14, j = 26 +i = 14, j = 27 +i = 14, j = 28 +i = 14, j = 29 +i = 14, j = 30 +i = 14, j = 31 +i = 15, j = 3 +i = 15, j = 4 +i = 15, j = 5 +i = 15, j = 6 +i = 15, j = 7 +i = 15, j = 8 +i = 15, j = 9 +i = 15, j = 10 +i = 15, j = 11 +i = 15, j = 12 +i = 15, j = 13 +i = 15, j = 14 +i = 15, j = 15 +i = 15, j = 16 +i = 15, j = 17 +i = 15, j = 18 +i = 15, j = 19 +i = 15, j = 20 +i = 15, j = 21 +i = 15, j = 22 +i = 15, j = 23 +i = 15, j = 24 +i = 15, j = 25 +i = 15, j = 26 +i = 15, j = 27 +i = 15, j = 28 +i = 15, j = 29 +i = 15, j = 30 +i = 15, j = 31 +i = 16, j = 3 +i = 16, j = 4 +i = 16, j = 5 +i = 16, j = 6 +i = 16, j = 7 +i = 16, j = 8 +i = 16, j = 9 +i = 16, j = 10 +i = 16, j = 11 +i = 16, j = 12 +i = 16, j = 13 +i = 16, j = 14 +i = 16, j = 15 +i = 16, j = 16 +i = 16, j = 17 +i = 16, j = 18 +i = 16, j = 19 +i = 16, j = 20 +i = 16, j = 21 +i = 16, j = 22 +i = 16, j = 23 +i = 16, j = 24 +i = 16, j = 25 +i = 16, j = 26 +i = 16, j = 27 +i = 16, j = 28 +i = 16, j = 29 +i = 16, j = 30 +i = 16, j = 31 +i = 17, j = 3 +i = 17, j = 4 +i = 17, j = 5 +i = 17, j = 6 +i = 17, j = 7 +i = 17, j = 8 +i = 17, j = 9 +i = 17, j = 10 +i = 17, j = 11 +i = 17, j = 12 +i = 17, j = 13 +i = 17, j = 14 +i = 17, j = 15 +i = 17, j = 16 +i = 17, j = 17 +i = 17, j = 18 +i = 17, j = 19 +i = 17, j = 20 +i = 17, j = 21 +i = 17, j = 22 +i = 17, j = 23 +i = 17, j = 24 +i = 17, j = 25 +i = 17, j = 26 +i = 17, j = 27 +i = 17, j = 28 +i = 17, j = 29 +i = 17, j = 30 +i = 17, j = 31 +i = 18, j = 3 +i = 18, j = 4 +i = 18, j = 5 +i = 18, j = 6 +i = 18, j = 7 +i = 18, j = 8 +i = 18, j = 9 +i = 18, j = 10 +i = 18, j = 11 +i = 18, j = 12 +i = 18, j = 13 +i = 18, j = 14 +i = 18, j = 15 +i = 18, j = 16 +i = 18, j = 17 +i = 18, j = 18 +i = 18, j = 19 +i = 18, j = 20 +i = 18, j = 21 +i = 18, j = 22 +i = 18, j = 23 +i = 18, j = 24 +i = 18, j = 25 +i = 18, j = 26 +i = 18, j = 27 +i = 18, j = 28 +i = 18, j = 29 +i = 18, j = 30 +i = 18, j = 31 +i = 19, j = 3 +i = 19, j = 4 +i = 19, j = 5 +i = 19, j = 6 +i = 19, j = 7 +i = 19, j = 8 +i = 19, j = 9 +i = 19, j = 10 +i = 19, j = 11 +i = 19, j = 12 +i = 19, j = 13 +i = 19, j = 14 +i = 19, j = 15 +i = 19, j = 16 +i = 19, j = 17 +i = 19, j = 18 +i = 19, j = 19 +i = 19, j = 20 +i = 19, j = 21 +i = 19, j = 22 +i = 19, j = 23 +i = 19, j = 24 +i = 19, j = 25 +i = 19, j = 26 +i = 19, j = 27 +i = 19, j = 28 +i = 19, j = 29 +i = 19, j = 30 +i = 19, j = 31 +i = 20, j = 3 +i = 20, j = 4 +i = 20, j = 5 +i = 20, j = 6 +i = 20, j = 7 +i = 20, j = 8 +i = 20, j = 9 +i = 20, j = 10 +i = 20, j = 11 +i = 20, j = 12 +i = 20, j = 13 +i = 20, j = 14 +i = 20, j = 15 +i = 20, j = 16 +i = 20, j = 17 +i = 20, j = 18 +i = 20, j = 19 +i = 20, j = 20 +i = 20, j = 21 +i = 20, j = 22 +i = 20, j = 23 +i = 20, j = 24 +i = 20, j = 25 +i = 20, j = 26 +i = 20, j = 27 +i = 20, j = 28 +i = 20, j = 29 +i = 20, j = 30 +i = 20, j = 31 +i = 21, j = 3 +i = 21, j = 4 +i = 21, j = 5 +i = 21, j = 6 +i = 21, j = 7 +i = 21, j = 8 +i = 21, j = 9 +i = 21, j = 10 +i = 21, j = 11 +i = 21, j = 12 +i = 21, j = 13 +i = 21, j = 14 +i = 21, j = 15 +i = 21, j = 16 +i = 21, j = 17 +i = 21, j = 18 +i = 21, j = 19 +i = 21, j = 20 +i = 21, j = 21 +i = 21, j = 22 +i = 21, j = 23 +i = 21, j = 24 +i = 21, j = 25 +i = 21, j = 26 +i = 21, j = 27 +i = 21, j = 28 +i = 21, j = 29 +i = 21, j = 30 +i = 21, j = 31 +i = 22, j = 3 +i = 22, j = 4 +i = 22, j = 5 +i = 22, j = 6 +i = 22, j = 7 +i = 22, j = 8 +i = 22, j = 9 +i = 22, j = 10 +i = 22, j = 11 +i = 22, j = 12 +i = 22, j = 13 +i = 22, j = 14 +i = 22, j = 15 +i = 22, j = 16 +i = 22, j = 17 +i = 22, j = 18 +i = 22, j = 19 +i = 22, j = 20 +i = 22, j = 21 +i = 22, j = 22 +i = 22, j = 23 +i = 22, j = 24 +i = 22, j = 25 +i = 22, j = 26 +i = 22, j = 27 +i = 22, j = 28 +i = 22, j = 29 +i = 22, j = 30 +i = 22, j = 31 +i = 23, j = 3 +i = 23, j = 4 +i = 23, j = 5 +i = 23, j = 6 +i = 23, j = 7 +i = 23, j = 8 +i = 23, j = 9 +i = 23, j = 10 +i = 23, j = 11 +i = 23, j = 12 +i = 23, j = 13 +i = 23, j = 14 +i = 23, j = 15 +i = 23, j = 16 +i = 23, j = 17 +i = 23, j = 18 +i = 23, j = 19 +i = 23, j = 20 +i = 23, j = 21 +i = 23, j = 22 +i = 23, j = 23 +i = 23, j = 24 +i = 23, j = 25 +i = 23, j = 26 +i = 23, j = 27 +i = 23, j = 28 +i = 23, j = 29 +i = 23, j = 30 +i = 23, j = 31 +i = 24, j = 3 +i = 24, j = 4 +i = 24, j = 5 +i = 24, j = 6 +i = 24, j = 7 +i = 24, j = 8 +i = 24, j = 9 +i = 24, j = 10 +i = 24, j = 11 +i = 24, j = 12 +i = 24, j = 13 +i = 24, j = 14 +i = 24, j = 15 +i = 24, j = 16 +i = 24, j = 17 +i = 24, j = 18 +i = 24, j = 19 +i = 24, j = 20 +i = 24, j = 21 +i = 24, j = 22 +i = 24, j = 23 +i = 24, j = 24 +i = 24, j = 25 +i = 24, j = 26 +i = 24, j = 27 +i = 24, j = 28 +i = 24, j = 29 +i = 24, j = 30 +i = 24, j = 31 +i = 25, j = 3 +i = 25, j = 4 +i = 25, j = 5 +i = 25, j = 6 +i = 25, j = 7 +i = 25, j = 8 +i = 25, j = 9 +i = 25, j = 10 +i = 25, j = 11 +i = 25, j = 12 +i = 25, j = 13 +i = 25, j = 14 +i = 25, j = 15 +i = 25, j = 16 +i = 25, j = 17 +i = 25, j = 18 +i = 25, j = 19 +i = 25, j = 20 +i = 25, j = 21 +i = 25, j = 22 +i = 25, j = 23 +i = 25, j = 24 +i = 25, j = 25 +i = 25, j = 26 +i = 25, j = 27 +i = 25, j = 28 +i = 25, j = 29 +i = 25, j = 30 +i = 25, j = 31 +i = 26, j = 3 +i = 26, j = 4 +i = 26, j = 5 +i = 26, j = 6 +i = 26, j = 7 +i = 26, j = 8 +i = 26, j = 9 +i = 26, j = 10 +i = 26, j = 11 +i = 26, j = 12 +i = 26, j = 13 +i = 26, j = 14 +i = 26, j = 15 +i = 26, j = 16 +i = 26, j = 17 +i = 26, j = 18 +i = 26, j = 19 +i = 26, j = 20 +i = 26, j = 21 +i = 26, j = 22 +i = 26, j = 23 +i = 26, j = 24 +i = 26, j = 25 +i = 26, j = 26 +i = 26, j = 27 +i = 26, j = 28 +i = 26, j = 29 +i = 26, j = 30 +i = 26, j = 31 +i = 27, j = 3 +i = 27, j = 4 +i = 27, j = 5 +i = 27, j = 6 +i = 27, j = 7 +i = 27, j = 8 +i = 27, j = 9 +i = 27, j = 10 +i = 27, j = 11 +i = 27, j = 12 +i = 27, j = 13 +i = 27, j = 14 +i = 27, j = 15 +i = 27, j = 16 +i = 27, j = 17 +i = 27, j = 18 +i = 27, j = 19 +i = 27, j = 20 +i = 27, j = 21 +i = 27, j = 22 +i = 27, j = 23 +i = 27, j = 24 +i = 27, j = 25 +i = 27, j = 26 +i = 27, j = 27 +i = 27, j = 28 +i = 27, j = 29 +i = 27, j = 30 +i = 27, j = 31 +i = 28, j = 3 +i = 28, j = 4 +i = 28, j = 5 +i = 28, j = 6 +i = 28, j = 7 +i = 28, j = 8 +i = 28, j = 9 +i = 28, j = 10 +i = 28, j = 11 +i = 28, j = 12 +i = 28, j = 13 +i = 28, j = 14 +i = 28, j = 15 +i = 28, j = 16 +i = 28, j = 17 +i = 28, j = 18 +i = 28, j = 19 +i = 28, j = 20 +i = 28, j = 21 +i = 28, j = 22 +i = 28, j = 23 +i = 28, j = 24 +i = 28, j = 25 +i = 28, j = 26 +i = 28, j = 27 +i = 28, j = 28 +i = 28, j = 29 +i = 28, j = 30 +i = 28, j = 31 +i = 29, j = 3 +i = 29, j = 4 +i = 29, j = 5 +i = 29, j = 6 +i = 29, j = 7 +i = 29, j = 8 +i = 29, j = 9 +i = 29, j = 10 +i = 29, j = 11 +i = 29, j = 12 +i = 29, j = 13 +i = 29, j = 14 +i = 29, j = 15 +i = 29, j = 16 +i = 29, j = 17 +i = 29, j = 18 +i = 29, j = 19 +i = 29, j = 20 +i = 29, j = 21 +i = 29, j = 22 +i = 29, j = 23 +i = 29, j = 24 +i = 29, j = 25 +i = 29, j = 26 +i = 29, j = 27 +i = 29, j = 28 +i = 29, j = 29 +i = 29, j = 30 +i = 29, j = 31 +i = 30, j = 3 +i = 30, j = 4 +i = 30, j = 5 +i = 30, j = 6 +i = 30, j = 7 +i = 30, j = 8 +i = 30, j = 9 +i = 30, j = 10 +i = 30, j = 11 +i = 30, j = 12 +i = 30, j = 13 +i = 30, j = 14 +i = 30, j = 15 +i = 30, j = 16 +i = 30, j = 17 +i = 30, j = 18 +i = 30, j = 19 +i = 30, j = 20 +i = 30, j = 21 +i = 30, j = 22 +i = 30, j = 23 +i = 30, j = 24 +i = 30, j = 25 +i = 30, j = 26 +i = 30, j = 27 +i = 30, j = 28 +i = 30, j = 29 +i = 30, j = 30 +i = 30, j = 31 +i = 31, j = 3 +i = 31, j = 4 +i = 31, j = 5 +i = 31, j = 6 +i = 31, j = 7 +i = 31, j = 8 +i = 31, j = 9 +i = 31, j = 10 +i = 31, j = 11 +i = 31, j = 12 +i = 31, j = 13 +i = 31, j = 14 +i = 31, j = 15 +i = 31, j = 16 +i = 31, j = 17 +i = 31, j = 18 +i = 31, j = 19 +i = 31, j = 20 +i = 31, j = 21 +i = 31, j = 22 +i = 31, j = 23 +i = 31, j = 24 +i = 31, j = 25 +i = 31, j = 26 +i = 31, j = 27 +i = 31, j = 28 +i = 31, j = 29 +i = 31, j = 30 +i = 31, j = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith05/isaac.h b/src/systemc/tests/systemc/datatypes/int/arith/arith05/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith05/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith06/arith06.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith06/arith06.cpp new file mode 100644 index 000000000..0eebbcd79 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith06/arith06.cpp @@ -0,0 +1,147 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith06.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +int +sc_main( int argc, char* argv[] ) +{ + signed int vali[5] = { 0, 1, -1, 7, -8 }; + signed int valj[5] = { 0, 1, -1, 7, -8 }; + + for (int i = 3; i < 32; ++i) { + for (int j = 3; j < 32; ++j) { + cout << "i = " << i << ", j = " << j << endl; + + sc_signed x(i); + sc_signed y(j); + sc_signed z(64); + + vali[3] = (1 << (i - 1)) - 1; + vali[4] = - (1 << (i - 1)); + + valj[3] = (1 << (j - 1)) - 1; + valj[4] = - (1 << (j - 1)); + + for (int ii = 0; ii < 100; ++ii) { + for (int jj = 0; jj < 100; ++jj) { + signed int qi = (ii < 5) ? vali[ii] : (rng.rand() & ((1 << i) - 1)); + signed int qj = (jj < 5) ? valj[jj] : (rng.rand() & ((1 << j) - 1)); + + if (qi & (1 << (i - 1))) { + qi = (qi << (32 - i)) >> (32 - i); + } + if (qj & (1 << (j - 1))) { + qj = (qj << (32 - j)) >> (32 - j); + } + + x = qi; + sc_assert( x == qi ); + y = qj; + sc_assert( y == qj ); + sc_assert((x == qj) == (qi == qj)); + sc_assert((x == qj) == (qj == x)); + sc_assert((x != qj) == (qi != qj)); + sc_assert((x != qj) == (qj != x)); + sc_assert((x < qj) == (qi < qj)); + sc_assert((x < qj) == (qj > x)); + sc_assert((x <= qj) == (qi <= qj)); + sc_assert((x <= qj) == (qj >= x)); + sc_assert((x > qj) == (qi > qj)); + sc_assert((x > qj) == (qj < x)); + sc_assert((x >= qj) == (qi >= qj)); + sc_assert((x >= qj) == (qj <= x)); + z = x + qj; + sc_assert( static_cast >( z.range(31,0) ) == + (qi + qj) ); + z = qi + y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi + qj) ); + z = x - qj; + sc_assert( static_cast >( z.range(31,0) ) == + (qi - qj) ); + z = qi - y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi - qj) ); + z = x * qj; + sc_assert( static_cast >( z.range(31,0) ) == + (qi * qj) ); + z = qi * y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi * qj) ); + if (qj != 0) { + z = x / qj; + sc_assert( static_cast >( z.range(31,0) ) == + (qi / qj) ); + z = qi / y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi / qj) ); + z = x % qj; + sc_assert( static_cast >( z.range(31,0) ) == + (qi % qj) ); + z = qi % y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi % qj) ); + } + z = x & qj; + sc_assert( static_cast >( z.range(31,0) ) == + (qi & qj) ); + z = qi & y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi & qj) ); + z = x | qj; + sc_assert( static_cast >( z.range(31,0) ) == + (qi | qj) ); + z = qi | y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi | qj) ); + z = x ^ qj; + sc_assert( static_cast >( z.range(31,0) ) == + (qi ^ qj) ); + z = qi ^ y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi ^ qj) ); + } + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith06/golden/arith06.log b/src/systemc/tests/systemc/datatypes/int/arith/arith06/golden/arith06.log new file mode 100644 index 000000000..4e17a8196 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith06/golden/arith06.log @@ -0,0 +1,842 @@ +SystemC Simulation +i = 3, j = 3 +i = 3, j = 4 +i = 3, j = 5 +i = 3, j = 6 +i = 3, j = 7 +i = 3, j = 8 +i = 3, j = 9 +i = 3, j = 10 +i = 3, j = 11 +i = 3, j = 12 +i = 3, j = 13 +i = 3, j = 14 +i = 3, j = 15 +i = 3, j = 16 +i = 3, j = 17 +i = 3, j = 18 +i = 3, j = 19 +i = 3, j = 20 +i = 3, j = 21 +i = 3, j = 22 +i = 3, j = 23 +i = 3, j = 24 +i = 3, j = 25 +i = 3, j = 26 +i = 3, j = 27 +i = 3, j = 28 +i = 3, j = 29 +i = 3, j = 30 +i = 3, j = 31 +i = 4, j = 3 +i = 4, j = 4 +i = 4, j = 5 +i = 4, j = 6 +i = 4, j = 7 +i = 4, j = 8 +i = 4, j = 9 +i = 4, j = 10 +i = 4, j = 11 +i = 4, j = 12 +i = 4, j = 13 +i = 4, j = 14 +i = 4, j = 15 +i = 4, j = 16 +i = 4, j = 17 +i = 4, j = 18 +i = 4, j = 19 +i = 4, j = 20 +i = 4, j = 21 +i = 4, j = 22 +i = 4, j = 23 +i = 4, j = 24 +i = 4, j = 25 +i = 4, j = 26 +i = 4, j = 27 +i = 4, j = 28 +i = 4, j = 29 +i = 4, j = 30 +i = 4, j = 31 +i = 5, j = 3 +i = 5, j = 4 +i = 5, j = 5 +i = 5, j = 6 +i = 5, j = 7 +i = 5, j = 8 +i = 5, j = 9 +i = 5, j = 10 +i = 5, j = 11 +i = 5, j = 12 +i = 5, j = 13 +i = 5, j = 14 +i = 5, j = 15 +i = 5, j = 16 +i = 5, j = 17 +i = 5, j = 18 +i = 5, j = 19 +i = 5, j = 20 +i = 5, j = 21 +i = 5, j = 22 +i = 5, j = 23 +i = 5, j = 24 +i = 5, j = 25 +i = 5, j = 26 +i = 5, j = 27 +i = 5, j = 28 +i = 5, j = 29 +i = 5, j = 30 +i = 5, j = 31 +i = 6, j = 3 +i = 6, j = 4 +i = 6, j = 5 +i = 6, j = 6 +i = 6, j = 7 +i = 6, j = 8 +i = 6, j = 9 +i = 6, j = 10 +i = 6, j = 11 +i = 6, j = 12 +i = 6, j = 13 +i = 6, j = 14 +i = 6, j = 15 +i = 6, j = 16 +i = 6, j = 17 +i = 6, j = 18 +i = 6, j = 19 +i = 6, j = 20 +i = 6, j = 21 +i = 6, j = 22 +i = 6, j = 23 +i = 6, j = 24 +i = 6, j = 25 +i = 6, j = 26 +i = 6, j = 27 +i = 6, j = 28 +i = 6, j = 29 +i = 6, j = 30 +i = 6, j = 31 +i = 7, j = 3 +i = 7, j = 4 +i = 7, j = 5 +i = 7, j = 6 +i = 7, j = 7 +i = 7, j = 8 +i = 7, j = 9 +i = 7, j = 10 +i = 7, j = 11 +i = 7, j = 12 +i = 7, j = 13 +i = 7, j = 14 +i = 7, j = 15 +i = 7, j = 16 +i = 7, j = 17 +i = 7, j = 18 +i = 7, j = 19 +i = 7, j = 20 +i = 7, j = 21 +i = 7, j = 22 +i = 7, j = 23 +i = 7, j = 24 +i = 7, j = 25 +i = 7, j = 26 +i = 7, j = 27 +i = 7, j = 28 +i = 7, j = 29 +i = 7, j = 30 +i = 7, j = 31 +i = 8, j = 3 +i = 8, j = 4 +i = 8, j = 5 +i = 8, j = 6 +i = 8, j = 7 +i = 8, j = 8 +i = 8, j = 9 +i = 8, j = 10 +i = 8, j = 11 +i = 8, j = 12 +i = 8, j = 13 +i = 8, j = 14 +i = 8, j = 15 +i = 8, j = 16 +i = 8, j = 17 +i = 8, j = 18 +i = 8, j = 19 +i = 8, j = 20 +i = 8, j = 21 +i = 8, j = 22 +i = 8, j = 23 +i = 8, j = 24 +i = 8, j = 25 +i = 8, j = 26 +i = 8, j = 27 +i = 8, j = 28 +i = 8, j = 29 +i = 8, j = 30 +i = 8, j = 31 +i = 9, j = 3 +i = 9, j = 4 +i = 9, j = 5 +i = 9, j = 6 +i = 9, j = 7 +i = 9, j = 8 +i = 9, j = 9 +i = 9, j = 10 +i = 9, j = 11 +i = 9, j = 12 +i = 9, j = 13 +i = 9, j = 14 +i = 9, j = 15 +i = 9, j = 16 +i = 9, j = 17 +i = 9, j = 18 +i = 9, j = 19 +i = 9, j = 20 +i = 9, j = 21 +i = 9, j = 22 +i = 9, j = 23 +i = 9, j = 24 +i = 9, j = 25 +i = 9, j = 26 +i = 9, j = 27 +i = 9, j = 28 +i = 9, j = 29 +i = 9, j = 30 +i = 9, j = 31 +i = 10, j = 3 +i = 10, j = 4 +i = 10, j = 5 +i = 10, j = 6 +i = 10, j = 7 +i = 10, j = 8 +i = 10, j = 9 +i = 10, j = 10 +i = 10, j = 11 +i = 10, j = 12 +i = 10, j = 13 +i = 10, j = 14 +i = 10, j = 15 +i = 10, j = 16 +i = 10, j = 17 +i = 10, j = 18 +i = 10, j = 19 +i = 10, j = 20 +i = 10, j = 21 +i = 10, j = 22 +i = 10, j = 23 +i = 10, j = 24 +i = 10, j = 25 +i = 10, j = 26 +i = 10, j = 27 +i = 10, j = 28 +i = 10, j = 29 +i = 10, j = 30 +i = 10, j = 31 +i = 11, j = 3 +i = 11, j = 4 +i = 11, j = 5 +i = 11, j = 6 +i = 11, j = 7 +i = 11, j = 8 +i = 11, j = 9 +i = 11, j = 10 +i = 11, j = 11 +i = 11, j = 12 +i = 11, j = 13 +i = 11, j = 14 +i = 11, j = 15 +i = 11, j = 16 +i = 11, j = 17 +i = 11, j = 18 +i = 11, j = 19 +i = 11, j = 20 +i = 11, j = 21 +i = 11, j = 22 +i = 11, j = 23 +i = 11, j = 24 +i = 11, j = 25 +i = 11, j = 26 +i = 11, j = 27 +i = 11, j = 28 +i = 11, j = 29 +i = 11, j = 30 +i = 11, j = 31 +i = 12, j = 3 +i = 12, j = 4 +i = 12, j = 5 +i = 12, j = 6 +i = 12, j = 7 +i = 12, j = 8 +i = 12, j = 9 +i = 12, j = 10 +i = 12, j = 11 +i = 12, j = 12 +i = 12, j = 13 +i = 12, j = 14 +i = 12, j = 15 +i = 12, j = 16 +i = 12, j = 17 +i = 12, j = 18 +i = 12, j = 19 +i = 12, j = 20 +i = 12, j = 21 +i = 12, j = 22 +i = 12, j = 23 +i = 12, j = 24 +i = 12, j = 25 +i = 12, j = 26 +i = 12, j = 27 +i = 12, j = 28 +i = 12, j = 29 +i = 12, j = 30 +i = 12, j = 31 +i = 13, j = 3 +i = 13, j = 4 +i = 13, j = 5 +i = 13, j = 6 +i = 13, j = 7 +i = 13, j = 8 +i = 13, j = 9 +i = 13, j = 10 +i = 13, j = 11 +i = 13, j = 12 +i = 13, j = 13 +i = 13, j = 14 +i = 13, j = 15 +i = 13, j = 16 +i = 13, j = 17 +i = 13, j = 18 +i = 13, j = 19 +i = 13, j = 20 +i = 13, j = 21 +i = 13, j = 22 +i = 13, j = 23 +i = 13, j = 24 +i = 13, j = 25 +i = 13, j = 26 +i = 13, j = 27 +i = 13, j = 28 +i = 13, j = 29 +i = 13, j = 30 +i = 13, j = 31 +i = 14, j = 3 +i = 14, j = 4 +i = 14, j = 5 +i = 14, j = 6 +i = 14, j = 7 +i = 14, j = 8 +i = 14, j = 9 +i = 14, j = 10 +i = 14, j = 11 +i = 14, j = 12 +i = 14, j = 13 +i = 14, j = 14 +i = 14, j = 15 +i = 14, j = 16 +i = 14, j = 17 +i = 14, j = 18 +i = 14, j = 19 +i = 14, j = 20 +i = 14, j = 21 +i = 14, j = 22 +i = 14, j = 23 +i = 14, j = 24 +i = 14, j = 25 +i = 14, j = 26 +i = 14, j = 27 +i = 14, j = 28 +i = 14, j = 29 +i = 14, j = 30 +i = 14, j = 31 +i = 15, j = 3 +i = 15, j = 4 +i = 15, j = 5 +i = 15, j = 6 +i = 15, j = 7 +i = 15, j = 8 +i = 15, j = 9 +i = 15, j = 10 +i = 15, j = 11 +i = 15, j = 12 +i = 15, j = 13 +i = 15, j = 14 +i = 15, j = 15 +i = 15, j = 16 +i = 15, j = 17 +i = 15, j = 18 +i = 15, j = 19 +i = 15, j = 20 +i = 15, j = 21 +i = 15, j = 22 +i = 15, j = 23 +i = 15, j = 24 +i = 15, j = 25 +i = 15, j = 26 +i = 15, j = 27 +i = 15, j = 28 +i = 15, j = 29 +i = 15, j = 30 +i = 15, j = 31 +i = 16, j = 3 +i = 16, j = 4 +i = 16, j = 5 +i = 16, j = 6 +i = 16, j = 7 +i = 16, j = 8 +i = 16, j = 9 +i = 16, j = 10 +i = 16, j = 11 +i = 16, j = 12 +i = 16, j = 13 +i = 16, j = 14 +i = 16, j = 15 +i = 16, j = 16 +i = 16, j = 17 +i = 16, j = 18 +i = 16, j = 19 +i = 16, j = 20 +i = 16, j = 21 +i = 16, j = 22 +i = 16, j = 23 +i = 16, j = 24 +i = 16, j = 25 +i = 16, j = 26 +i = 16, j = 27 +i = 16, j = 28 +i = 16, j = 29 +i = 16, j = 30 +i = 16, j = 31 +i = 17, j = 3 +i = 17, j = 4 +i = 17, j = 5 +i = 17, j = 6 +i = 17, j = 7 +i = 17, j = 8 +i = 17, j = 9 +i = 17, j = 10 +i = 17, j = 11 +i = 17, j = 12 +i = 17, j = 13 +i = 17, j = 14 +i = 17, j = 15 +i = 17, j = 16 +i = 17, j = 17 +i = 17, j = 18 +i = 17, j = 19 +i = 17, j = 20 +i = 17, j = 21 +i = 17, j = 22 +i = 17, j = 23 +i = 17, j = 24 +i = 17, j = 25 +i = 17, j = 26 +i = 17, j = 27 +i = 17, j = 28 +i = 17, j = 29 +i = 17, j = 30 +i = 17, j = 31 +i = 18, j = 3 +i = 18, j = 4 +i = 18, j = 5 +i = 18, j = 6 +i = 18, j = 7 +i = 18, j = 8 +i = 18, j = 9 +i = 18, j = 10 +i = 18, j = 11 +i = 18, j = 12 +i = 18, j = 13 +i = 18, j = 14 +i = 18, j = 15 +i = 18, j = 16 +i = 18, j = 17 +i = 18, j = 18 +i = 18, j = 19 +i = 18, j = 20 +i = 18, j = 21 +i = 18, j = 22 +i = 18, j = 23 +i = 18, j = 24 +i = 18, j = 25 +i = 18, j = 26 +i = 18, j = 27 +i = 18, j = 28 +i = 18, j = 29 +i = 18, j = 30 +i = 18, j = 31 +i = 19, j = 3 +i = 19, j = 4 +i = 19, j = 5 +i = 19, j = 6 +i = 19, j = 7 +i = 19, j = 8 +i = 19, j = 9 +i = 19, j = 10 +i = 19, j = 11 +i = 19, j = 12 +i = 19, j = 13 +i = 19, j = 14 +i = 19, j = 15 +i = 19, j = 16 +i = 19, j = 17 +i = 19, j = 18 +i = 19, j = 19 +i = 19, j = 20 +i = 19, j = 21 +i = 19, j = 22 +i = 19, j = 23 +i = 19, j = 24 +i = 19, j = 25 +i = 19, j = 26 +i = 19, j = 27 +i = 19, j = 28 +i = 19, j = 29 +i = 19, j = 30 +i = 19, j = 31 +i = 20, j = 3 +i = 20, j = 4 +i = 20, j = 5 +i = 20, j = 6 +i = 20, j = 7 +i = 20, j = 8 +i = 20, j = 9 +i = 20, j = 10 +i = 20, j = 11 +i = 20, j = 12 +i = 20, j = 13 +i = 20, j = 14 +i = 20, j = 15 +i = 20, j = 16 +i = 20, j = 17 +i = 20, j = 18 +i = 20, j = 19 +i = 20, j = 20 +i = 20, j = 21 +i = 20, j = 22 +i = 20, j = 23 +i = 20, j = 24 +i = 20, j = 25 +i = 20, j = 26 +i = 20, j = 27 +i = 20, j = 28 +i = 20, j = 29 +i = 20, j = 30 +i = 20, j = 31 +i = 21, j = 3 +i = 21, j = 4 +i = 21, j = 5 +i = 21, j = 6 +i = 21, j = 7 +i = 21, j = 8 +i = 21, j = 9 +i = 21, j = 10 +i = 21, j = 11 +i = 21, j = 12 +i = 21, j = 13 +i = 21, j = 14 +i = 21, j = 15 +i = 21, j = 16 +i = 21, j = 17 +i = 21, j = 18 +i = 21, j = 19 +i = 21, j = 20 +i = 21, j = 21 +i = 21, j = 22 +i = 21, j = 23 +i = 21, j = 24 +i = 21, j = 25 +i = 21, j = 26 +i = 21, j = 27 +i = 21, j = 28 +i = 21, j = 29 +i = 21, j = 30 +i = 21, j = 31 +i = 22, j = 3 +i = 22, j = 4 +i = 22, j = 5 +i = 22, j = 6 +i = 22, j = 7 +i = 22, j = 8 +i = 22, j = 9 +i = 22, j = 10 +i = 22, j = 11 +i = 22, j = 12 +i = 22, j = 13 +i = 22, j = 14 +i = 22, j = 15 +i = 22, j = 16 +i = 22, j = 17 +i = 22, j = 18 +i = 22, j = 19 +i = 22, j = 20 +i = 22, j = 21 +i = 22, j = 22 +i = 22, j = 23 +i = 22, j = 24 +i = 22, j = 25 +i = 22, j = 26 +i = 22, j = 27 +i = 22, j = 28 +i = 22, j = 29 +i = 22, j = 30 +i = 22, j = 31 +i = 23, j = 3 +i = 23, j = 4 +i = 23, j = 5 +i = 23, j = 6 +i = 23, j = 7 +i = 23, j = 8 +i = 23, j = 9 +i = 23, j = 10 +i = 23, j = 11 +i = 23, j = 12 +i = 23, j = 13 +i = 23, j = 14 +i = 23, j = 15 +i = 23, j = 16 +i = 23, j = 17 +i = 23, j = 18 +i = 23, j = 19 +i = 23, j = 20 +i = 23, j = 21 +i = 23, j = 22 +i = 23, j = 23 +i = 23, j = 24 +i = 23, j = 25 +i = 23, j = 26 +i = 23, j = 27 +i = 23, j = 28 +i = 23, j = 29 +i = 23, j = 30 +i = 23, j = 31 +i = 24, j = 3 +i = 24, j = 4 +i = 24, j = 5 +i = 24, j = 6 +i = 24, j = 7 +i = 24, j = 8 +i = 24, j = 9 +i = 24, j = 10 +i = 24, j = 11 +i = 24, j = 12 +i = 24, j = 13 +i = 24, j = 14 +i = 24, j = 15 +i = 24, j = 16 +i = 24, j = 17 +i = 24, j = 18 +i = 24, j = 19 +i = 24, j = 20 +i = 24, j = 21 +i = 24, j = 22 +i = 24, j = 23 +i = 24, j = 24 +i = 24, j = 25 +i = 24, j = 26 +i = 24, j = 27 +i = 24, j = 28 +i = 24, j = 29 +i = 24, j = 30 +i = 24, j = 31 +i = 25, j = 3 +i = 25, j = 4 +i = 25, j = 5 +i = 25, j = 6 +i = 25, j = 7 +i = 25, j = 8 +i = 25, j = 9 +i = 25, j = 10 +i = 25, j = 11 +i = 25, j = 12 +i = 25, j = 13 +i = 25, j = 14 +i = 25, j = 15 +i = 25, j = 16 +i = 25, j = 17 +i = 25, j = 18 +i = 25, j = 19 +i = 25, j = 20 +i = 25, j = 21 +i = 25, j = 22 +i = 25, j = 23 +i = 25, j = 24 +i = 25, j = 25 +i = 25, j = 26 +i = 25, j = 27 +i = 25, j = 28 +i = 25, j = 29 +i = 25, j = 30 +i = 25, j = 31 +i = 26, j = 3 +i = 26, j = 4 +i = 26, j = 5 +i = 26, j = 6 +i = 26, j = 7 +i = 26, j = 8 +i = 26, j = 9 +i = 26, j = 10 +i = 26, j = 11 +i = 26, j = 12 +i = 26, j = 13 +i = 26, j = 14 +i = 26, j = 15 +i = 26, j = 16 +i = 26, j = 17 +i = 26, j = 18 +i = 26, j = 19 +i = 26, j = 20 +i = 26, j = 21 +i = 26, j = 22 +i = 26, j = 23 +i = 26, j = 24 +i = 26, j = 25 +i = 26, j = 26 +i = 26, j = 27 +i = 26, j = 28 +i = 26, j = 29 +i = 26, j = 30 +i = 26, j = 31 +i = 27, j = 3 +i = 27, j = 4 +i = 27, j = 5 +i = 27, j = 6 +i = 27, j = 7 +i = 27, j = 8 +i = 27, j = 9 +i = 27, j = 10 +i = 27, j = 11 +i = 27, j = 12 +i = 27, j = 13 +i = 27, j = 14 +i = 27, j = 15 +i = 27, j = 16 +i = 27, j = 17 +i = 27, j = 18 +i = 27, j = 19 +i = 27, j = 20 +i = 27, j = 21 +i = 27, j = 22 +i = 27, j = 23 +i = 27, j = 24 +i = 27, j = 25 +i = 27, j = 26 +i = 27, j = 27 +i = 27, j = 28 +i = 27, j = 29 +i = 27, j = 30 +i = 27, j = 31 +i = 28, j = 3 +i = 28, j = 4 +i = 28, j = 5 +i = 28, j = 6 +i = 28, j = 7 +i = 28, j = 8 +i = 28, j = 9 +i = 28, j = 10 +i = 28, j = 11 +i = 28, j = 12 +i = 28, j = 13 +i = 28, j = 14 +i = 28, j = 15 +i = 28, j = 16 +i = 28, j = 17 +i = 28, j = 18 +i = 28, j = 19 +i = 28, j = 20 +i = 28, j = 21 +i = 28, j = 22 +i = 28, j = 23 +i = 28, j = 24 +i = 28, j = 25 +i = 28, j = 26 +i = 28, j = 27 +i = 28, j = 28 +i = 28, j = 29 +i = 28, j = 30 +i = 28, j = 31 +i = 29, j = 3 +i = 29, j = 4 +i = 29, j = 5 +i = 29, j = 6 +i = 29, j = 7 +i = 29, j = 8 +i = 29, j = 9 +i = 29, j = 10 +i = 29, j = 11 +i = 29, j = 12 +i = 29, j = 13 +i = 29, j = 14 +i = 29, j = 15 +i = 29, j = 16 +i = 29, j = 17 +i = 29, j = 18 +i = 29, j = 19 +i = 29, j = 20 +i = 29, j = 21 +i = 29, j = 22 +i = 29, j = 23 +i = 29, j = 24 +i = 29, j = 25 +i = 29, j = 26 +i = 29, j = 27 +i = 29, j = 28 +i = 29, j = 29 +i = 29, j = 30 +i = 29, j = 31 +i = 30, j = 3 +i = 30, j = 4 +i = 30, j = 5 +i = 30, j = 6 +i = 30, j = 7 +i = 30, j = 8 +i = 30, j = 9 +i = 30, j = 10 +i = 30, j = 11 +i = 30, j = 12 +i = 30, j = 13 +i = 30, j = 14 +i = 30, j = 15 +i = 30, j = 16 +i = 30, j = 17 +i = 30, j = 18 +i = 30, j = 19 +i = 30, j = 20 +i = 30, j = 21 +i = 30, j = 22 +i = 30, j = 23 +i = 30, j = 24 +i = 30, j = 25 +i = 30, j = 26 +i = 30, j = 27 +i = 30, j = 28 +i = 30, j = 29 +i = 30, j = 30 +i = 30, j = 31 +i = 31, j = 3 +i = 31, j = 4 +i = 31, j = 5 +i = 31, j = 6 +i = 31, j = 7 +i = 31, j = 8 +i = 31, j = 9 +i = 31, j = 10 +i = 31, j = 11 +i = 31, j = 12 +i = 31, j = 13 +i = 31, j = 14 +i = 31, j = 15 +i = 31, j = 16 +i = 31, j = 17 +i = 31, j = 18 +i = 31, j = 19 +i = 31, j = 20 +i = 31, j = 21 +i = 31, j = 22 +i = 31, j = 23 +i = 31, j = 24 +i = 31, j = 25 +i = 31, j = 26 +i = 31, j = 27 +i = 31, j = 28 +i = 31, j = 29 +i = 31, j = 30 +i = 31, j = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith06/isaac.h b/src/systemc/tests/systemc/datatypes/int/arith/arith06/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith06/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith07/arith07.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith07/arith07.cpp new file mode 100644 index 000000000..977108ea8 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith07/arith07.cpp @@ -0,0 +1,137 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith07.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +#define TEST(A,B) \ +{ \ + if ( A != B ) \ + cout << #A << " (" << A << ") != " << #B << "(" << B << ")" << endl; \ +} + +int +sc_main( int argc, char* argv[] ) +{ + unsigned int vali[5] = { 0, 1, (unsigned)-1, 7, (unsigned)-8 }; + unsigned int valj[5] = { 0, 1, (unsigned)-1, 7, (unsigned)-8 }; + + for (int i = 3; i < 32; ++i) { + for (int j = 3; j < 32; ++j) { + cout << "i = " << i << ", j = " << j << endl; + + sc_unsigned x(i); + sc_unsigned y(j); + sc_unsigned z(64); + + vali[3] = (1 << (i - 1)) - 1; + vali[4] = - (1 << (i - 1)); + + valj[3] = (1 << (j - 1)) - 1; + valj[4] = - (1 << (j - 1)); + + for (int ii = 0; ii < 100; ++ii) { + for (int jj = 0; jj < 100; ++jj) { + unsigned qi = (ii < 5) ? vali[ii] : (rng.rand() & ((1 << i) - 1)); + unsigned qj = (jj < 5) ? valj[jj] : (rng.rand() & ((1 << j) - 1)); + + if (qi & (1 << (i - 1))) { + qi = (qi << (32 - i)) >> (32 - i); + } + if (qj & (1 << (j - 1))) { + qj = (qj << (32 - j)) >> (32 - j); + } + + x = qi; + TEST(x,qi ); + y = qj; + TEST(y,qj ); + TEST((x == qj),(qi == qj)); + TEST((x == qj),(qj == x)); + TEST((x != qj),(qi != qj)); + TEST((x != qj),(qj != x)); + TEST((x < qj),(qi < qj)); + TEST((x < qj),(qj > x)); + TEST((x <= qj),(qi <= qj)); + TEST((x <= qj),(qj >= x)); + TEST((x > qj),(qi > qj)); + TEST((x > qj),(qj < x)); + TEST((x >= qj),(qi >= qj)); + TEST((x >= qj),(qj <= x)); + z = x + qj; + TEST((sc_unsigned)( z.range(31,0) ), (qi + qj) ); + z = qi + y; + TEST((sc_unsigned)( z.range(31,0) ), (qi + qj) ); + z = x - qj; + TEST((sc_unsigned)( z.range(31,0) ), (qi - qj) ); + z = qi - y; + TEST((sc_unsigned)( z.range(31,0) ), (qi - qj) ); + z = x * qj; + TEST((sc_unsigned)( z.range(31,0) ), (qi * qj) ); + z = qi * y; + TEST((sc_unsigned)( z.range(31,0) ), (qi * qj) ); + if (qj != 0) { + z = x / qj; + TEST((sc_unsigned)( z.range(31,0) ),(qi/qj)); + z = qi / y; + TEST((sc_unsigned)( z.range(31,0) ),(qi/qj)); + z = x % qj; + TEST((sc_unsigned)( z.range(31,0) ),(qi%qj)); + z = qi % y; + TEST((sc_unsigned)( z.range(31,0) ),(qi%qj)); + } + z = x & qj; + TEST((sc_unsigned)( z.range(31,0) ), (qi & qj) ); + z = qi & y; + TEST((sc_unsigned)( z.range(31,0) ), (qi & qj) ); + z = x | qj; + TEST((sc_unsigned)( z.range(31,0) ), (qi | qj) ); + z = qi | y; + TEST((sc_unsigned)( z.range(31,0) ), (qi | qj) ); + z = x ^ qj; + TEST((sc_unsigned)( z.range(31,0) ), (qi ^ qj) ); + z = qi ^ y; + TEST((sc_unsigned)( z.range(31,0) ), (qi ^ qj) ); + } + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith07/golden/arith07.log b/src/systemc/tests/systemc/datatypes/int/arith/arith07/golden/arith07.log new file mode 100644 index 000000000..4e17a8196 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith07/golden/arith07.log @@ -0,0 +1,842 @@ +SystemC Simulation +i = 3, j = 3 +i = 3, j = 4 +i = 3, j = 5 +i = 3, j = 6 +i = 3, j = 7 +i = 3, j = 8 +i = 3, j = 9 +i = 3, j = 10 +i = 3, j = 11 +i = 3, j = 12 +i = 3, j = 13 +i = 3, j = 14 +i = 3, j = 15 +i = 3, j = 16 +i = 3, j = 17 +i = 3, j = 18 +i = 3, j = 19 +i = 3, j = 20 +i = 3, j = 21 +i = 3, j = 22 +i = 3, j = 23 +i = 3, j = 24 +i = 3, j = 25 +i = 3, j = 26 +i = 3, j = 27 +i = 3, j = 28 +i = 3, j = 29 +i = 3, j = 30 +i = 3, j = 31 +i = 4, j = 3 +i = 4, j = 4 +i = 4, j = 5 +i = 4, j = 6 +i = 4, j = 7 +i = 4, j = 8 +i = 4, j = 9 +i = 4, j = 10 +i = 4, j = 11 +i = 4, j = 12 +i = 4, j = 13 +i = 4, j = 14 +i = 4, j = 15 +i = 4, j = 16 +i = 4, j = 17 +i = 4, j = 18 +i = 4, j = 19 +i = 4, j = 20 +i = 4, j = 21 +i = 4, j = 22 +i = 4, j = 23 +i = 4, j = 24 +i = 4, j = 25 +i = 4, j = 26 +i = 4, j = 27 +i = 4, j = 28 +i = 4, j = 29 +i = 4, j = 30 +i = 4, j = 31 +i = 5, j = 3 +i = 5, j = 4 +i = 5, j = 5 +i = 5, j = 6 +i = 5, j = 7 +i = 5, j = 8 +i = 5, j = 9 +i = 5, j = 10 +i = 5, j = 11 +i = 5, j = 12 +i = 5, j = 13 +i = 5, j = 14 +i = 5, j = 15 +i = 5, j = 16 +i = 5, j = 17 +i = 5, j = 18 +i = 5, j = 19 +i = 5, j = 20 +i = 5, j = 21 +i = 5, j = 22 +i = 5, j = 23 +i = 5, j = 24 +i = 5, j = 25 +i = 5, j = 26 +i = 5, j = 27 +i = 5, j = 28 +i = 5, j = 29 +i = 5, j = 30 +i = 5, j = 31 +i = 6, j = 3 +i = 6, j = 4 +i = 6, j = 5 +i = 6, j = 6 +i = 6, j = 7 +i = 6, j = 8 +i = 6, j = 9 +i = 6, j = 10 +i = 6, j = 11 +i = 6, j = 12 +i = 6, j = 13 +i = 6, j = 14 +i = 6, j = 15 +i = 6, j = 16 +i = 6, j = 17 +i = 6, j = 18 +i = 6, j = 19 +i = 6, j = 20 +i = 6, j = 21 +i = 6, j = 22 +i = 6, j = 23 +i = 6, j = 24 +i = 6, j = 25 +i = 6, j = 26 +i = 6, j = 27 +i = 6, j = 28 +i = 6, j = 29 +i = 6, j = 30 +i = 6, j = 31 +i = 7, j = 3 +i = 7, j = 4 +i = 7, j = 5 +i = 7, j = 6 +i = 7, j = 7 +i = 7, j = 8 +i = 7, j = 9 +i = 7, j = 10 +i = 7, j = 11 +i = 7, j = 12 +i = 7, j = 13 +i = 7, j = 14 +i = 7, j = 15 +i = 7, j = 16 +i = 7, j = 17 +i = 7, j = 18 +i = 7, j = 19 +i = 7, j = 20 +i = 7, j = 21 +i = 7, j = 22 +i = 7, j = 23 +i = 7, j = 24 +i = 7, j = 25 +i = 7, j = 26 +i = 7, j = 27 +i = 7, j = 28 +i = 7, j = 29 +i = 7, j = 30 +i = 7, j = 31 +i = 8, j = 3 +i = 8, j = 4 +i = 8, j = 5 +i = 8, j = 6 +i = 8, j = 7 +i = 8, j = 8 +i = 8, j = 9 +i = 8, j = 10 +i = 8, j = 11 +i = 8, j = 12 +i = 8, j = 13 +i = 8, j = 14 +i = 8, j = 15 +i = 8, j = 16 +i = 8, j = 17 +i = 8, j = 18 +i = 8, j = 19 +i = 8, j = 20 +i = 8, j = 21 +i = 8, j = 22 +i = 8, j = 23 +i = 8, j = 24 +i = 8, j = 25 +i = 8, j = 26 +i = 8, j = 27 +i = 8, j = 28 +i = 8, j = 29 +i = 8, j = 30 +i = 8, j = 31 +i = 9, j = 3 +i = 9, j = 4 +i = 9, j = 5 +i = 9, j = 6 +i = 9, j = 7 +i = 9, j = 8 +i = 9, j = 9 +i = 9, j = 10 +i = 9, j = 11 +i = 9, j = 12 +i = 9, j = 13 +i = 9, j = 14 +i = 9, j = 15 +i = 9, j = 16 +i = 9, j = 17 +i = 9, j = 18 +i = 9, j = 19 +i = 9, j = 20 +i = 9, j = 21 +i = 9, j = 22 +i = 9, j = 23 +i = 9, j = 24 +i = 9, j = 25 +i = 9, j = 26 +i = 9, j = 27 +i = 9, j = 28 +i = 9, j = 29 +i = 9, j = 30 +i = 9, j = 31 +i = 10, j = 3 +i = 10, j = 4 +i = 10, j = 5 +i = 10, j = 6 +i = 10, j = 7 +i = 10, j = 8 +i = 10, j = 9 +i = 10, j = 10 +i = 10, j = 11 +i = 10, j = 12 +i = 10, j = 13 +i = 10, j = 14 +i = 10, j = 15 +i = 10, j = 16 +i = 10, j = 17 +i = 10, j = 18 +i = 10, j = 19 +i = 10, j = 20 +i = 10, j = 21 +i = 10, j = 22 +i = 10, j = 23 +i = 10, j = 24 +i = 10, j = 25 +i = 10, j = 26 +i = 10, j = 27 +i = 10, j = 28 +i = 10, j = 29 +i = 10, j = 30 +i = 10, j = 31 +i = 11, j = 3 +i = 11, j = 4 +i = 11, j = 5 +i = 11, j = 6 +i = 11, j = 7 +i = 11, j = 8 +i = 11, j = 9 +i = 11, j = 10 +i = 11, j = 11 +i = 11, j = 12 +i = 11, j = 13 +i = 11, j = 14 +i = 11, j = 15 +i = 11, j = 16 +i = 11, j = 17 +i = 11, j = 18 +i = 11, j = 19 +i = 11, j = 20 +i = 11, j = 21 +i = 11, j = 22 +i = 11, j = 23 +i = 11, j = 24 +i = 11, j = 25 +i = 11, j = 26 +i = 11, j = 27 +i = 11, j = 28 +i = 11, j = 29 +i = 11, j = 30 +i = 11, j = 31 +i = 12, j = 3 +i = 12, j = 4 +i = 12, j = 5 +i = 12, j = 6 +i = 12, j = 7 +i = 12, j = 8 +i = 12, j = 9 +i = 12, j = 10 +i = 12, j = 11 +i = 12, j = 12 +i = 12, j = 13 +i = 12, j = 14 +i = 12, j = 15 +i = 12, j = 16 +i = 12, j = 17 +i = 12, j = 18 +i = 12, j = 19 +i = 12, j = 20 +i = 12, j = 21 +i = 12, j = 22 +i = 12, j = 23 +i = 12, j = 24 +i = 12, j = 25 +i = 12, j = 26 +i = 12, j = 27 +i = 12, j = 28 +i = 12, j = 29 +i = 12, j = 30 +i = 12, j = 31 +i = 13, j = 3 +i = 13, j = 4 +i = 13, j = 5 +i = 13, j = 6 +i = 13, j = 7 +i = 13, j = 8 +i = 13, j = 9 +i = 13, j = 10 +i = 13, j = 11 +i = 13, j = 12 +i = 13, j = 13 +i = 13, j = 14 +i = 13, j = 15 +i = 13, j = 16 +i = 13, j = 17 +i = 13, j = 18 +i = 13, j = 19 +i = 13, j = 20 +i = 13, j = 21 +i = 13, j = 22 +i = 13, j = 23 +i = 13, j = 24 +i = 13, j = 25 +i = 13, j = 26 +i = 13, j = 27 +i = 13, j = 28 +i = 13, j = 29 +i = 13, j = 30 +i = 13, j = 31 +i = 14, j = 3 +i = 14, j = 4 +i = 14, j = 5 +i = 14, j = 6 +i = 14, j = 7 +i = 14, j = 8 +i = 14, j = 9 +i = 14, j = 10 +i = 14, j = 11 +i = 14, j = 12 +i = 14, j = 13 +i = 14, j = 14 +i = 14, j = 15 +i = 14, j = 16 +i = 14, j = 17 +i = 14, j = 18 +i = 14, j = 19 +i = 14, j = 20 +i = 14, j = 21 +i = 14, j = 22 +i = 14, j = 23 +i = 14, j = 24 +i = 14, j = 25 +i = 14, j = 26 +i = 14, j = 27 +i = 14, j = 28 +i = 14, j = 29 +i = 14, j = 30 +i = 14, j = 31 +i = 15, j = 3 +i = 15, j = 4 +i = 15, j = 5 +i = 15, j = 6 +i = 15, j = 7 +i = 15, j = 8 +i = 15, j = 9 +i = 15, j = 10 +i = 15, j = 11 +i = 15, j = 12 +i = 15, j = 13 +i = 15, j = 14 +i = 15, j = 15 +i = 15, j = 16 +i = 15, j = 17 +i = 15, j = 18 +i = 15, j = 19 +i = 15, j = 20 +i = 15, j = 21 +i = 15, j = 22 +i = 15, j = 23 +i = 15, j = 24 +i = 15, j = 25 +i = 15, j = 26 +i = 15, j = 27 +i = 15, j = 28 +i = 15, j = 29 +i = 15, j = 30 +i = 15, j = 31 +i = 16, j = 3 +i = 16, j = 4 +i = 16, j = 5 +i = 16, j = 6 +i = 16, j = 7 +i = 16, j = 8 +i = 16, j = 9 +i = 16, j = 10 +i = 16, j = 11 +i = 16, j = 12 +i = 16, j = 13 +i = 16, j = 14 +i = 16, j = 15 +i = 16, j = 16 +i = 16, j = 17 +i = 16, j = 18 +i = 16, j = 19 +i = 16, j = 20 +i = 16, j = 21 +i = 16, j = 22 +i = 16, j = 23 +i = 16, j = 24 +i = 16, j = 25 +i = 16, j = 26 +i = 16, j = 27 +i = 16, j = 28 +i = 16, j = 29 +i = 16, j = 30 +i = 16, j = 31 +i = 17, j = 3 +i = 17, j = 4 +i = 17, j = 5 +i = 17, j = 6 +i = 17, j = 7 +i = 17, j = 8 +i = 17, j = 9 +i = 17, j = 10 +i = 17, j = 11 +i = 17, j = 12 +i = 17, j = 13 +i = 17, j = 14 +i = 17, j = 15 +i = 17, j = 16 +i = 17, j = 17 +i = 17, j = 18 +i = 17, j = 19 +i = 17, j = 20 +i = 17, j = 21 +i = 17, j = 22 +i = 17, j = 23 +i = 17, j = 24 +i = 17, j = 25 +i = 17, j = 26 +i = 17, j = 27 +i = 17, j = 28 +i = 17, j = 29 +i = 17, j = 30 +i = 17, j = 31 +i = 18, j = 3 +i = 18, j = 4 +i = 18, j = 5 +i = 18, j = 6 +i = 18, j = 7 +i = 18, j = 8 +i = 18, j = 9 +i = 18, j = 10 +i = 18, j = 11 +i = 18, j = 12 +i = 18, j = 13 +i = 18, j = 14 +i = 18, j = 15 +i = 18, j = 16 +i = 18, j = 17 +i = 18, j = 18 +i = 18, j = 19 +i = 18, j = 20 +i = 18, j = 21 +i = 18, j = 22 +i = 18, j = 23 +i = 18, j = 24 +i = 18, j = 25 +i = 18, j = 26 +i = 18, j = 27 +i = 18, j = 28 +i = 18, j = 29 +i = 18, j = 30 +i = 18, j = 31 +i = 19, j = 3 +i = 19, j = 4 +i = 19, j = 5 +i = 19, j = 6 +i = 19, j = 7 +i = 19, j = 8 +i = 19, j = 9 +i = 19, j = 10 +i = 19, j = 11 +i = 19, j = 12 +i = 19, j = 13 +i = 19, j = 14 +i = 19, j = 15 +i = 19, j = 16 +i = 19, j = 17 +i = 19, j = 18 +i = 19, j = 19 +i = 19, j = 20 +i = 19, j = 21 +i = 19, j = 22 +i = 19, j = 23 +i = 19, j = 24 +i = 19, j = 25 +i = 19, j = 26 +i = 19, j = 27 +i = 19, j = 28 +i = 19, j = 29 +i = 19, j = 30 +i = 19, j = 31 +i = 20, j = 3 +i = 20, j = 4 +i = 20, j = 5 +i = 20, j = 6 +i = 20, j = 7 +i = 20, j = 8 +i = 20, j = 9 +i = 20, j = 10 +i = 20, j = 11 +i = 20, j = 12 +i = 20, j = 13 +i = 20, j = 14 +i = 20, j = 15 +i = 20, j = 16 +i = 20, j = 17 +i = 20, j = 18 +i = 20, j = 19 +i = 20, j = 20 +i = 20, j = 21 +i = 20, j = 22 +i = 20, j = 23 +i = 20, j = 24 +i = 20, j = 25 +i = 20, j = 26 +i = 20, j = 27 +i = 20, j = 28 +i = 20, j = 29 +i = 20, j = 30 +i = 20, j = 31 +i = 21, j = 3 +i = 21, j = 4 +i = 21, j = 5 +i = 21, j = 6 +i = 21, j = 7 +i = 21, j = 8 +i = 21, j = 9 +i = 21, j = 10 +i = 21, j = 11 +i = 21, j = 12 +i = 21, j = 13 +i = 21, j = 14 +i = 21, j = 15 +i = 21, j = 16 +i = 21, j = 17 +i = 21, j = 18 +i = 21, j = 19 +i = 21, j = 20 +i = 21, j = 21 +i = 21, j = 22 +i = 21, j = 23 +i = 21, j = 24 +i = 21, j = 25 +i = 21, j = 26 +i = 21, j = 27 +i = 21, j = 28 +i = 21, j = 29 +i = 21, j = 30 +i = 21, j = 31 +i = 22, j = 3 +i = 22, j = 4 +i = 22, j = 5 +i = 22, j = 6 +i = 22, j = 7 +i = 22, j = 8 +i = 22, j = 9 +i = 22, j = 10 +i = 22, j = 11 +i = 22, j = 12 +i = 22, j = 13 +i = 22, j = 14 +i = 22, j = 15 +i = 22, j = 16 +i = 22, j = 17 +i = 22, j = 18 +i = 22, j = 19 +i = 22, j = 20 +i = 22, j = 21 +i = 22, j = 22 +i = 22, j = 23 +i = 22, j = 24 +i = 22, j = 25 +i = 22, j = 26 +i = 22, j = 27 +i = 22, j = 28 +i = 22, j = 29 +i = 22, j = 30 +i = 22, j = 31 +i = 23, j = 3 +i = 23, j = 4 +i = 23, j = 5 +i = 23, j = 6 +i = 23, j = 7 +i = 23, j = 8 +i = 23, j = 9 +i = 23, j = 10 +i = 23, j = 11 +i = 23, j = 12 +i = 23, j = 13 +i = 23, j = 14 +i = 23, j = 15 +i = 23, j = 16 +i = 23, j = 17 +i = 23, j = 18 +i = 23, j = 19 +i = 23, j = 20 +i = 23, j = 21 +i = 23, j = 22 +i = 23, j = 23 +i = 23, j = 24 +i = 23, j = 25 +i = 23, j = 26 +i = 23, j = 27 +i = 23, j = 28 +i = 23, j = 29 +i = 23, j = 30 +i = 23, j = 31 +i = 24, j = 3 +i = 24, j = 4 +i = 24, j = 5 +i = 24, j = 6 +i = 24, j = 7 +i = 24, j = 8 +i = 24, j = 9 +i = 24, j = 10 +i = 24, j = 11 +i = 24, j = 12 +i = 24, j = 13 +i = 24, j = 14 +i = 24, j = 15 +i = 24, j = 16 +i = 24, j = 17 +i = 24, j = 18 +i = 24, j = 19 +i = 24, j = 20 +i = 24, j = 21 +i = 24, j = 22 +i = 24, j = 23 +i = 24, j = 24 +i = 24, j = 25 +i = 24, j = 26 +i = 24, j = 27 +i = 24, j = 28 +i = 24, j = 29 +i = 24, j = 30 +i = 24, j = 31 +i = 25, j = 3 +i = 25, j = 4 +i = 25, j = 5 +i = 25, j = 6 +i = 25, j = 7 +i = 25, j = 8 +i = 25, j = 9 +i = 25, j = 10 +i = 25, j = 11 +i = 25, j = 12 +i = 25, j = 13 +i = 25, j = 14 +i = 25, j = 15 +i = 25, j = 16 +i = 25, j = 17 +i = 25, j = 18 +i = 25, j = 19 +i = 25, j = 20 +i = 25, j = 21 +i = 25, j = 22 +i = 25, j = 23 +i = 25, j = 24 +i = 25, j = 25 +i = 25, j = 26 +i = 25, j = 27 +i = 25, j = 28 +i = 25, j = 29 +i = 25, j = 30 +i = 25, j = 31 +i = 26, j = 3 +i = 26, j = 4 +i = 26, j = 5 +i = 26, j = 6 +i = 26, j = 7 +i = 26, j = 8 +i = 26, j = 9 +i = 26, j = 10 +i = 26, j = 11 +i = 26, j = 12 +i = 26, j = 13 +i = 26, j = 14 +i = 26, j = 15 +i = 26, j = 16 +i = 26, j = 17 +i = 26, j = 18 +i = 26, j = 19 +i = 26, j = 20 +i = 26, j = 21 +i = 26, j = 22 +i = 26, j = 23 +i = 26, j = 24 +i = 26, j = 25 +i = 26, j = 26 +i = 26, j = 27 +i = 26, j = 28 +i = 26, j = 29 +i = 26, j = 30 +i = 26, j = 31 +i = 27, j = 3 +i = 27, j = 4 +i = 27, j = 5 +i = 27, j = 6 +i = 27, j = 7 +i = 27, j = 8 +i = 27, j = 9 +i = 27, j = 10 +i = 27, j = 11 +i = 27, j = 12 +i = 27, j = 13 +i = 27, j = 14 +i = 27, j = 15 +i = 27, j = 16 +i = 27, j = 17 +i = 27, j = 18 +i = 27, j = 19 +i = 27, j = 20 +i = 27, j = 21 +i = 27, j = 22 +i = 27, j = 23 +i = 27, j = 24 +i = 27, j = 25 +i = 27, j = 26 +i = 27, j = 27 +i = 27, j = 28 +i = 27, j = 29 +i = 27, j = 30 +i = 27, j = 31 +i = 28, j = 3 +i = 28, j = 4 +i = 28, j = 5 +i = 28, j = 6 +i = 28, j = 7 +i = 28, j = 8 +i = 28, j = 9 +i = 28, j = 10 +i = 28, j = 11 +i = 28, j = 12 +i = 28, j = 13 +i = 28, j = 14 +i = 28, j = 15 +i = 28, j = 16 +i = 28, j = 17 +i = 28, j = 18 +i = 28, j = 19 +i = 28, j = 20 +i = 28, j = 21 +i = 28, j = 22 +i = 28, j = 23 +i = 28, j = 24 +i = 28, j = 25 +i = 28, j = 26 +i = 28, j = 27 +i = 28, j = 28 +i = 28, j = 29 +i = 28, j = 30 +i = 28, j = 31 +i = 29, j = 3 +i = 29, j = 4 +i = 29, j = 5 +i = 29, j = 6 +i = 29, j = 7 +i = 29, j = 8 +i = 29, j = 9 +i = 29, j = 10 +i = 29, j = 11 +i = 29, j = 12 +i = 29, j = 13 +i = 29, j = 14 +i = 29, j = 15 +i = 29, j = 16 +i = 29, j = 17 +i = 29, j = 18 +i = 29, j = 19 +i = 29, j = 20 +i = 29, j = 21 +i = 29, j = 22 +i = 29, j = 23 +i = 29, j = 24 +i = 29, j = 25 +i = 29, j = 26 +i = 29, j = 27 +i = 29, j = 28 +i = 29, j = 29 +i = 29, j = 30 +i = 29, j = 31 +i = 30, j = 3 +i = 30, j = 4 +i = 30, j = 5 +i = 30, j = 6 +i = 30, j = 7 +i = 30, j = 8 +i = 30, j = 9 +i = 30, j = 10 +i = 30, j = 11 +i = 30, j = 12 +i = 30, j = 13 +i = 30, j = 14 +i = 30, j = 15 +i = 30, j = 16 +i = 30, j = 17 +i = 30, j = 18 +i = 30, j = 19 +i = 30, j = 20 +i = 30, j = 21 +i = 30, j = 22 +i = 30, j = 23 +i = 30, j = 24 +i = 30, j = 25 +i = 30, j = 26 +i = 30, j = 27 +i = 30, j = 28 +i = 30, j = 29 +i = 30, j = 30 +i = 30, j = 31 +i = 31, j = 3 +i = 31, j = 4 +i = 31, j = 5 +i = 31, j = 6 +i = 31, j = 7 +i = 31, j = 8 +i = 31, j = 9 +i = 31, j = 10 +i = 31, j = 11 +i = 31, j = 12 +i = 31, j = 13 +i = 31, j = 14 +i = 31, j = 15 +i = 31, j = 16 +i = 31, j = 17 +i = 31, j = 18 +i = 31, j = 19 +i = 31, j = 20 +i = 31, j = 21 +i = 31, j = 22 +i = 31, j = 23 +i = 31, j = 24 +i = 31, j = 25 +i = 31, j = 26 +i = 31, j = 27 +i = 31, j = 28 +i = 31, j = 29 +i = 31, j = 30 +i = 31, j = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith07/isaac.h b/src/systemc/tests/systemc/datatypes/int/arith/arith07/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith07/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith08/arith08.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith08/arith08.cpp new file mode 100644 index 000000000..d44dda816 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith08/arith08.cpp @@ -0,0 +1,123 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith08.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +#define TEST(A,B) \ +{ \ + if ( A != B ) \ + cout << #A << " (" << A << ") != " << #B << "(" << B << ")" << endl; \ +} + +int +sc_main(int, char**) +{ + unsigned vali[5] = { 0, 1, (unsigned)-1, 7, (unsigned)-8 }; + signed int valj[5] = { 0, 1, -1, 7, -8 }; + + for (int i = 3; i < 30; ++i) { + for (int j = 3; j < 30; ++j) { + cout << "i = " << i << ", j = " << j << endl; + sc_unsigned x(i); + sc_signed y(j); + sc_signed z(64); + + vali[3] = (1 << (i - 1)) - 1; + vali[4] = - (1 << (i - 1)); + + valj[3] = (1 << (j - 1)) - 1; + valj[4] = - (1 << (j - 1)); + + for (int ii = 0; ii < 100; ++ii) { + for (int jj = 0; jj < 100; ++jj) { + unsigned qi = (ii < 5) ? vali[ii] : + (rng.rand() & ((1 << i) - 1)); + signed int qj = (jj < 5) ? valj[jj] : + (rng.rand() & ((1 << j) - 1)); + + if (qi & (1 << (i - 1))) { + qi = (qi << (32 - i)) >> (32 - i); + } + if (qj & (1 << (j - 1))) { + qj = (qj << (32 - j)) >> (32 - j); + } + + x = qi; + y = qj; + + sc_signed ty(x); + TEST(x,ty ); + sc_assert( ty >= 0 ); + sc_assert((! x[i-1]) || (ty.length() == i+1) ); + + z = x + y; + TEST(static_cast >( z.range(31,0) ), + int(int(qi) + qj) ); + z = x - y; + TEST(static_cast >( z.range(31,0) ), + int(int(qi) - qj) ); + z = x * y; + TEST(static_cast >( z.range(31,0) ), + int(int(qi) * qj) ); + sc_unsigned xx(i); + xx = x; + xx *= y; + sc_unsigned xx2(i); + xx2 = z.range(i - 1, 0); + TEST(xx,xx2); + + if (y != 0) { + z = x / y; + TEST(static_cast >( z.range(31,0) ), int(int(qi) / qj) ); + z = x % y; + TEST(static_cast >( z.range(31,0) ), int(int(qi) % qj) ); + } + z = x & y; + TEST(static_cast >( z.range(31,0) ), int(int(qi) & qj) ); + z = x | y; + TEST(static_cast >( z.range(31,0) ), int(int(qi) | qj) ); + z = x ^ y; + TEST(static_cast >( z.range(31,0) ), int(int(qi) ^ qj) ); + } + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith08/golden/arith08.log b/src/systemc/tests/systemc/datatypes/int/arith/arith08/golden/arith08.log new file mode 100644 index 000000000..d7f3045b2 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith08/golden/arith08.log @@ -0,0 +1,730 @@ +SystemC Simulation +i = 3, j = 3 +i = 3, j = 4 +i = 3, j = 5 +i = 3, j = 6 +i = 3, j = 7 +i = 3, j = 8 +i = 3, j = 9 +i = 3, j = 10 +i = 3, j = 11 +i = 3, j = 12 +i = 3, j = 13 +i = 3, j = 14 +i = 3, j = 15 +i = 3, j = 16 +i = 3, j = 17 +i = 3, j = 18 +i = 3, j = 19 +i = 3, j = 20 +i = 3, j = 21 +i = 3, j = 22 +i = 3, j = 23 +i = 3, j = 24 +i = 3, j = 25 +i = 3, j = 26 +i = 3, j = 27 +i = 3, j = 28 +i = 3, j = 29 +i = 4, j = 3 +i = 4, j = 4 +i = 4, j = 5 +i = 4, j = 6 +i = 4, j = 7 +i = 4, j = 8 +i = 4, j = 9 +i = 4, j = 10 +i = 4, j = 11 +i = 4, j = 12 +i = 4, j = 13 +i = 4, j = 14 +i = 4, j = 15 +i = 4, j = 16 +i = 4, j = 17 +i = 4, j = 18 +i = 4, j = 19 +i = 4, j = 20 +i = 4, j = 21 +i = 4, j = 22 +i = 4, j = 23 +i = 4, j = 24 +i = 4, j = 25 +i = 4, j = 26 +i = 4, j = 27 +i = 4, j = 28 +i = 4, j = 29 +i = 5, j = 3 +i = 5, j = 4 +i = 5, j = 5 +i = 5, j = 6 +i = 5, j = 7 +i = 5, j = 8 +i = 5, j = 9 +i = 5, j = 10 +i = 5, j = 11 +i = 5, j = 12 +i = 5, j = 13 +i = 5, j = 14 +i = 5, j = 15 +i = 5, j = 16 +i = 5, j = 17 +i = 5, j = 18 +i = 5, j = 19 +i = 5, j = 20 +i = 5, j = 21 +i = 5, j = 22 +i = 5, j = 23 +i = 5, j = 24 +i = 5, j = 25 +i = 5, j = 26 +i = 5, j = 27 +i = 5, j = 28 +i = 5, j = 29 +i = 6, j = 3 +i = 6, j = 4 +i = 6, j = 5 +i = 6, j = 6 +i = 6, j = 7 +i = 6, j = 8 +i = 6, j = 9 +i = 6, j = 10 +i = 6, j = 11 +i = 6, j = 12 +i = 6, j = 13 +i = 6, j = 14 +i = 6, j = 15 +i = 6, j = 16 +i = 6, j = 17 +i = 6, j = 18 +i = 6, j = 19 +i = 6, j = 20 +i = 6, j = 21 +i = 6, j = 22 +i = 6, j = 23 +i = 6, j = 24 +i = 6, j = 25 +i = 6, j = 26 +i = 6, j = 27 +i = 6, j = 28 +i = 6, j = 29 +i = 7, j = 3 +i = 7, j = 4 +i = 7, j = 5 +i = 7, j = 6 +i = 7, j = 7 +i = 7, j = 8 +i = 7, j = 9 +i = 7, j = 10 +i = 7, j = 11 +i = 7, j = 12 +i = 7, j = 13 +i = 7, j = 14 +i = 7, j = 15 +i = 7, j = 16 +i = 7, j = 17 +i = 7, j = 18 +i = 7, j = 19 +i = 7, j = 20 +i = 7, j = 21 +i = 7, j = 22 +i = 7, j = 23 +i = 7, j = 24 +i = 7, j = 25 +i = 7, j = 26 +i = 7, j = 27 +i = 7, j = 28 +i = 7, j = 29 +i = 8, j = 3 +i = 8, j = 4 +i = 8, j = 5 +i = 8, j = 6 +i = 8, j = 7 +i = 8, j = 8 +i = 8, j = 9 +i = 8, j = 10 +i = 8, j = 11 +i = 8, j = 12 +i = 8, j = 13 +i = 8, j = 14 +i = 8, j = 15 +i = 8, j = 16 +i = 8, j = 17 +i = 8, j = 18 +i = 8, j = 19 +i = 8, j = 20 +i = 8, j = 21 +i = 8, j = 22 +i = 8, j = 23 +i = 8, j = 24 +i = 8, j = 25 +i = 8, j = 26 +i = 8, j = 27 +i = 8, j = 28 +i = 8, j = 29 +i = 9, j = 3 +i = 9, j = 4 +i = 9, j = 5 +i = 9, j = 6 +i = 9, j = 7 +i = 9, j = 8 +i = 9, j = 9 +i = 9, j = 10 +i = 9, j = 11 +i = 9, j = 12 +i = 9, j = 13 +i = 9, j = 14 +i = 9, j = 15 +i = 9, j = 16 +i = 9, j = 17 +i = 9, j = 18 +i = 9, j = 19 +i = 9, j = 20 +i = 9, j = 21 +i = 9, j = 22 +i = 9, j = 23 +i = 9, j = 24 +i = 9, j = 25 +i = 9, j = 26 +i = 9, j = 27 +i = 9, j = 28 +i = 9, j = 29 +i = 10, j = 3 +i = 10, j = 4 +i = 10, j = 5 +i = 10, j = 6 +i = 10, j = 7 +i = 10, j = 8 +i = 10, j = 9 +i = 10, j = 10 +i = 10, j = 11 +i = 10, j = 12 +i = 10, j = 13 +i = 10, j = 14 +i = 10, j = 15 +i = 10, j = 16 +i = 10, j = 17 +i = 10, j = 18 +i = 10, j = 19 +i = 10, j = 20 +i = 10, j = 21 +i = 10, j = 22 +i = 10, j = 23 +i = 10, j = 24 +i = 10, j = 25 +i = 10, j = 26 +i = 10, j = 27 +i = 10, j = 28 +i = 10, j = 29 +i = 11, j = 3 +i = 11, j = 4 +i = 11, j = 5 +i = 11, j = 6 +i = 11, j = 7 +i = 11, j = 8 +i = 11, j = 9 +i = 11, j = 10 +i = 11, j = 11 +i = 11, j = 12 +i = 11, j = 13 +i = 11, j = 14 +i = 11, j = 15 +i = 11, j = 16 +i = 11, j = 17 +i = 11, j = 18 +i = 11, j = 19 +i = 11, j = 20 +i = 11, j = 21 +i = 11, j = 22 +i = 11, j = 23 +i = 11, j = 24 +i = 11, j = 25 +i = 11, j = 26 +i = 11, j = 27 +i = 11, j = 28 +i = 11, j = 29 +i = 12, j = 3 +i = 12, j = 4 +i = 12, j = 5 +i = 12, j = 6 +i = 12, j = 7 +i = 12, j = 8 +i = 12, j = 9 +i = 12, j = 10 +i = 12, j = 11 +i = 12, j = 12 +i = 12, j = 13 +i = 12, j = 14 +i = 12, j = 15 +i = 12, j = 16 +i = 12, j = 17 +i = 12, j = 18 +i = 12, j = 19 +i = 12, j = 20 +i = 12, j = 21 +i = 12, j = 22 +i = 12, j = 23 +i = 12, j = 24 +i = 12, j = 25 +i = 12, j = 26 +i = 12, j = 27 +i = 12, j = 28 +i = 12, j = 29 +i = 13, j = 3 +i = 13, j = 4 +i = 13, j = 5 +i = 13, j = 6 +i = 13, j = 7 +i = 13, j = 8 +i = 13, j = 9 +i = 13, j = 10 +i = 13, j = 11 +i = 13, j = 12 +i = 13, j = 13 +i = 13, j = 14 +i = 13, j = 15 +i = 13, j = 16 +i = 13, j = 17 +i = 13, j = 18 +i = 13, j = 19 +i = 13, j = 20 +i = 13, j = 21 +i = 13, j = 22 +i = 13, j = 23 +i = 13, j = 24 +i = 13, j = 25 +i = 13, j = 26 +i = 13, j = 27 +i = 13, j = 28 +i = 13, j = 29 +i = 14, j = 3 +i = 14, j = 4 +i = 14, j = 5 +i = 14, j = 6 +i = 14, j = 7 +i = 14, j = 8 +i = 14, j = 9 +i = 14, j = 10 +i = 14, j = 11 +i = 14, j = 12 +i = 14, j = 13 +i = 14, j = 14 +i = 14, j = 15 +i = 14, j = 16 +i = 14, j = 17 +i = 14, j = 18 +i = 14, j = 19 +i = 14, j = 20 +i = 14, j = 21 +i = 14, j = 22 +i = 14, j = 23 +i = 14, j = 24 +i = 14, j = 25 +i = 14, j = 26 +i = 14, j = 27 +i = 14, j = 28 +i = 14, j = 29 +i = 15, j = 3 +i = 15, j = 4 +i = 15, j = 5 +i = 15, j = 6 +i = 15, j = 7 +i = 15, j = 8 +i = 15, j = 9 +i = 15, j = 10 +i = 15, j = 11 +i = 15, j = 12 +i = 15, j = 13 +i = 15, j = 14 +i = 15, j = 15 +i = 15, j = 16 +i = 15, j = 17 +i = 15, j = 18 +i = 15, j = 19 +i = 15, j = 20 +i = 15, j = 21 +i = 15, j = 22 +i = 15, j = 23 +i = 15, j = 24 +i = 15, j = 25 +i = 15, j = 26 +i = 15, j = 27 +i = 15, j = 28 +i = 15, j = 29 +i = 16, j = 3 +i = 16, j = 4 +i = 16, j = 5 +i = 16, j = 6 +i = 16, j = 7 +i = 16, j = 8 +i = 16, j = 9 +i = 16, j = 10 +i = 16, j = 11 +i = 16, j = 12 +i = 16, j = 13 +i = 16, j = 14 +i = 16, j = 15 +i = 16, j = 16 +i = 16, j = 17 +i = 16, j = 18 +i = 16, j = 19 +i = 16, j = 20 +i = 16, j = 21 +i = 16, j = 22 +i = 16, j = 23 +i = 16, j = 24 +i = 16, j = 25 +i = 16, j = 26 +i = 16, j = 27 +i = 16, j = 28 +i = 16, j = 29 +i = 17, j = 3 +i = 17, j = 4 +i = 17, j = 5 +i = 17, j = 6 +i = 17, j = 7 +i = 17, j = 8 +i = 17, j = 9 +i = 17, j = 10 +i = 17, j = 11 +i = 17, j = 12 +i = 17, j = 13 +i = 17, j = 14 +i = 17, j = 15 +i = 17, j = 16 +i = 17, j = 17 +i = 17, j = 18 +i = 17, j = 19 +i = 17, j = 20 +i = 17, j = 21 +i = 17, j = 22 +i = 17, j = 23 +i = 17, j = 24 +i = 17, j = 25 +i = 17, j = 26 +i = 17, j = 27 +i = 17, j = 28 +i = 17, j = 29 +i = 18, j = 3 +i = 18, j = 4 +i = 18, j = 5 +i = 18, j = 6 +i = 18, j = 7 +i = 18, j = 8 +i = 18, j = 9 +i = 18, j = 10 +i = 18, j = 11 +i = 18, j = 12 +i = 18, j = 13 +i = 18, j = 14 +i = 18, j = 15 +i = 18, j = 16 +i = 18, j = 17 +i = 18, j = 18 +i = 18, j = 19 +i = 18, j = 20 +i = 18, j = 21 +i = 18, j = 22 +i = 18, j = 23 +i = 18, j = 24 +i = 18, j = 25 +i = 18, j = 26 +i = 18, j = 27 +i = 18, j = 28 +i = 18, j = 29 +i = 19, j = 3 +i = 19, j = 4 +i = 19, j = 5 +i = 19, j = 6 +i = 19, j = 7 +i = 19, j = 8 +i = 19, j = 9 +i = 19, j = 10 +i = 19, j = 11 +i = 19, j = 12 +i = 19, j = 13 +i = 19, j = 14 +i = 19, j = 15 +i = 19, j = 16 +i = 19, j = 17 +i = 19, j = 18 +i = 19, j = 19 +i = 19, j = 20 +i = 19, j = 21 +i = 19, j = 22 +i = 19, j = 23 +i = 19, j = 24 +i = 19, j = 25 +i = 19, j = 26 +i = 19, j = 27 +i = 19, j = 28 +i = 19, j = 29 +i = 20, j = 3 +i = 20, j = 4 +i = 20, j = 5 +i = 20, j = 6 +i = 20, j = 7 +i = 20, j = 8 +i = 20, j = 9 +i = 20, j = 10 +i = 20, j = 11 +i = 20, j = 12 +i = 20, j = 13 +i = 20, j = 14 +i = 20, j = 15 +i = 20, j = 16 +i = 20, j = 17 +i = 20, j = 18 +i = 20, j = 19 +i = 20, j = 20 +i = 20, j = 21 +i = 20, j = 22 +i = 20, j = 23 +i = 20, j = 24 +i = 20, j = 25 +i = 20, j = 26 +i = 20, j = 27 +i = 20, j = 28 +i = 20, j = 29 +i = 21, j = 3 +i = 21, j = 4 +i = 21, j = 5 +i = 21, j = 6 +i = 21, j = 7 +i = 21, j = 8 +i = 21, j = 9 +i = 21, j = 10 +i = 21, j = 11 +i = 21, j = 12 +i = 21, j = 13 +i = 21, j = 14 +i = 21, j = 15 +i = 21, j = 16 +i = 21, j = 17 +i = 21, j = 18 +i = 21, j = 19 +i = 21, j = 20 +i = 21, j = 21 +i = 21, j = 22 +i = 21, j = 23 +i = 21, j = 24 +i = 21, j = 25 +i = 21, j = 26 +i = 21, j = 27 +i = 21, j = 28 +i = 21, j = 29 +i = 22, j = 3 +i = 22, j = 4 +i = 22, j = 5 +i = 22, j = 6 +i = 22, j = 7 +i = 22, j = 8 +i = 22, j = 9 +i = 22, j = 10 +i = 22, j = 11 +i = 22, j = 12 +i = 22, j = 13 +i = 22, j = 14 +i = 22, j = 15 +i = 22, j = 16 +i = 22, j = 17 +i = 22, j = 18 +i = 22, j = 19 +i = 22, j = 20 +i = 22, j = 21 +i = 22, j = 22 +i = 22, j = 23 +i = 22, j = 24 +i = 22, j = 25 +i = 22, j = 26 +i = 22, j = 27 +i = 22, j = 28 +i = 22, j = 29 +i = 23, j = 3 +i = 23, j = 4 +i = 23, j = 5 +i = 23, j = 6 +i = 23, j = 7 +i = 23, j = 8 +i = 23, j = 9 +i = 23, j = 10 +i = 23, j = 11 +i = 23, j = 12 +i = 23, j = 13 +i = 23, j = 14 +i = 23, j = 15 +i = 23, j = 16 +i = 23, j = 17 +i = 23, j = 18 +i = 23, j = 19 +i = 23, j = 20 +i = 23, j = 21 +i = 23, j = 22 +i = 23, j = 23 +i = 23, j = 24 +i = 23, j = 25 +i = 23, j = 26 +i = 23, j = 27 +i = 23, j = 28 +i = 23, j = 29 +i = 24, j = 3 +i = 24, j = 4 +i = 24, j = 5 +i = 24, j = 6 +i = 24, j = 7 +i = 24, j = 8 +i = 24, j = 9 +i = 24, j = 10 +i = 24, j = 11 +i = 24, j = 12 +i = 24, j = 13 +i = 24, j = 14 +i = 24, j = 15 +i = 24, j = 16 +i = 24, j = 17 +i = 24, j = 18 +i = 24, j = 19 +i = 24, j = 20 +i = 24, j = 21 +i = 24, j = 22 +i = 24, j = 23 +i = 24, j = 24 +i = 24, j = 25 +i = 24, j = 26 +i = 24, j = 27 +i = 24, j = 28 +i = 24, j = 29 +i = 25, j = 3 +i = 25, j = 4 +i = 25, j = 5 +i = 25, j = 6 +i = 25, j = 7 +i = 25, j = 8 +i = 25, j = 9 +i = 25, j = 10 +i = 25, j = 11 +i = 25, j = 12 +i = 25, j = 13 +i = 25, j = 14 +i = 25, j = 15 +i = 25, j = 16 +i = 25, j = 17 +i = 25, j = 18 +i = 25, j = 19 +i = 25, j = 20 +i = 25, j = 21 +i = 25, j = 22 +i = 25, j = 23 +i = 25, j = 24 +i = 25, j = 25 +i = 25, j = 26 +i = 25, j = 27 +i = 25, j = 28 +i = 25, j = 29 +i = 26, j = 3 +i = 26, j = 4 +i = 26, j = 5 +i = 26, j = 6 +i = 26, j = 7 +i = 26, j = 8 +i = 26, j = 9 +i = 26, j = 10 +i = 26, j = 11 +i = 26, j = 12 +i = 26, j = 13 +i = 26, j = 14 +i = 26, j = 15 +i = 26, j = 16 +i = 26, j = 17 +i = 26, j = 18 +i = 26, j = 19 +i = 26, j = 20 +i = 26, j = 21 +i = 26, j = 22 +i = 26, j = 23 +i = 26, j = 24 +i = 26, j = 25 +i = 26, j = 26 +i = 26, j = 27 +i = 26, j = 28 +i = 26, j = 29 +i = 27, j = 3 +i = 27, j = 4 +i = 27, j = 5 +i = 27, j = 6 +i = 27, j = 7 +i = 27, j = 8 +i = 27, j = 9 +i = 27, j = 10 +i = 27, j = 11 +i = 27, j = 12 +i = 27, j = 13 +i = 27, j = 14 +i = 27, j = 15 +i = 27, j = 16 +i = 27, j = 17 +i = 27, j = 18 +i = 27, j = 19 +i = 27, j = 20 +i = 27, j = 21 +i = 27, j = 22 +i = 27, j = 23 +i = 27, j = 24 +i = 27, j = 25 +i = 27, j = 26 +i = 27, j = 27 +i = 27, j = 28 +i = 27, j = 29 +i = 28, j = 3 +i = 28, j = 4 +i = 28, j = 5 +i = 28, j = 6 +i = 28, j = 7 +i = 28, j = 8 +i = 28, j = 9 +i = 28, j = 10 +i = 28, j = 11 +i = 28, j = 12 +i = 28, j = 13 +i = 28, j = 14 +i = 28, j = 15 +i = 28, j = 16 +i = 28, j = 17 +i = 28, j = 18 +i = 28, j = 19 +i = 28, j = 20 +i = 28, j = 21 +i = 28, j = 22 +i = 28, j = 23 +i = 28, j = 24 +i = 28, j = 25 +i = 28, j = 26 +i = 28, j = 27 +i = 28, j = 28 +i = 28, j = 29 +i = 29, j = 3 +i = 29, j = 4 +i = 29, j = 5 +i = 29, j = 6 +i = 29, j = 7 +i = 29, j = 8 +i = 29, j = 9 +i = 29, j = 10 +i = 29, j = 11 +i = 29, j = 12 +i = 29, j = 13 +i = 29, j = 14 +i = 29, j = 15 +i = 29, j = 16 +i = 29, j = 17 +i = 29, j = 18 +i = 29, j = 19 +i = 29, j = 20 +i = 29, j = 21 +i = 29, j = 22 +i = 29, j = 23 +i = 29, j = 24 +i = 29, j = 25 +i = 29, j = 26 +i = 29, j = 27 +i = 29, j = 28 +i = 29, j = 29 diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith08/isaac.h b/src/systemc/tests/systemc/datatypes/int/arith/arith08/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith08/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith09/arith09.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith09/arith09.cpp new file mode 100644 index 000000000..f918c0506 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith09/arith09.cpp @@ -0,0 +1,122 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith09.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +int +sc_main( int argc, char* argv[] ) +{ + unsigned int vali[5] = { 0, 1, (unsigned)-1, 7, (unsigned)-8 }; + unsigned int valj[5] = { 0, 1, (unsigned)-1, 7, (unsigned)-8 }; + + for (int i = 3; i < 32; ++i) { + for (int j = 3; j < 32; ++j) { + cout << "i = " << i << ", j = " << j << endl; + + sc_unsigned x(i); + sc_unsigned y(j); + sc_unsigned z(64), q(64); + + vali[3] = (1 << (i - 1)) - 1; + vali[4] = - (1 << (i - 1)); + + valj[3] = (1 << (j - 1)) - 1; + valj[4] = - (1 << (j - 1)); + + for (int ii = 0; ii < 100; ++ii) { + for (int jj = 0; jj < 100; ++jj) { + unsigned qi = (ii < 5) ? vali[ii] : + (rng.rand() & ((1 << i) - 1)); + unsigned qj = (jj < 5) ? valj[jj] : + (rng.rand() & ((1 << j) - 1)); + + if (qi & (1 << (i - 1))) { + qi = (qi << (32 - i)) >> (32 - i); + } + if (qj & (1 << (j - 1))) { + qj = (qj << (32 - j)) >> (32 - j); + } + + x = qi; + y = qj; + z = x * y; + sc_assert( (sc_unsigned)( z.range(31,0) ) == + (qi * qj) ); + if ( i < 17 ) + { + if ( j < 17 ) // (i < 17) + { + q = (x.range(i-1,0) * y.range(j-1,0)); + } + else // (j >= 17) (i < 17) + { + q = (x.range(i-1,0) * y.range(15,0)) + + ( x.range(i-1,0) * y.range(j-1,16) ) * 65536; + } + } + else + { + if ( j < 17 ) // (i >= 17) + { + q = (x.range(15,0) * y.range(j-1,0)) + + (x.range(i-1,16) * y.range(j-1,0)) * 65536; + } + else // (j >= 17) (i >= 17) + { + q = (x.range(15,0) * y.range(15,0)) + + (x.range(i-1,16) * y.range(15,0) + + x.range(15,0) * y.range(j-1,16)) * 65536 + + ((x.range(i-1,16) * y.range(j-1,16) * 65536) + * 65536); + } + } + sc_assert(z == q); + + if (y != 0) { + z /= y; + sc_assert(z == x); + } + } + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith09/golden/arith09.log b/src/systemc/tests/systemc/datatypes/int/arith/arith09/golden/arith09.log new file mode 100644 index 000000000..4e17a8196 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith09/golden/arith09.log @@ -0,0 +1,842 @@ +SystemC Simulation +i = 3, j = 3 +i = 3, j = 4 +i = 3, j = 5 +i = 3, j = 6 +i = 3, j = 7 +i = 3, j = 8 +i = 3, j = 9 +i = 3, j = 10 +i = 3, j = 11 +i = 3, j = 12 +i = 3, j = 13 +i = 3, j = 14 +i = 3, j = 15 +i = 3, j = 16 +i = 3, j = 17 +i = 3, j = 18 +i = 3, j = 19 +i = 3, j = 20 +i = 3, j = 21 +i = 3, j = 22 +i = 3, j = 23 +i = 3, j = 24 +i = 3, j = 25 +i = 3, j = 26 +i = 3, j = 27 +i = 3, j = 28 +i = 3, j = 29 +i = 3, j = 30 +i = 3, j = 31 +i = 4, j = 3 +i = 4, j = 4 +i = 4, j = 5 +i = 4, j = 6 +i = 4, j = 7 +i = 4, j = 8 +i = 4, j = 9 +i = 4, j = 10 +i = 4, j = 11 +i = 4, j = 12 +i = 4, j = 13 +i = 4, j = 14 +i = 4, j = 15 +i = 4, j = 16 +i = 4, j = 17 +i = 4, j = 18 +i = 4, j = 19 +i = 4, j = 20 +i = 4, j = 21 +i = 4, j = 22 +i = 4, j = 23 +i = 4, j = 24 +i = 4, j = 25 +i = 4, j = 26 +i = 4, j = 27 +i = 4, j = 28 +i = 4, j = 29 +i = 4, j = 30 +i = 4, j = 31 +i = 5, j = 3 +i = 5, j = 4 +i = 5, j = 5 +i = 5, j = 6 +i = 5, j = 7 +i = 5, j = 8 +i = 5, j = 9 +i = 5, j = 10 +i = 5, j = 11 +i = 5, j = 12 +i = 5, j = 13 +i = 5, j = 14 +i = 5, j = 15 +i = 5, j = 16 +i = 5, j = 17 +i = 5, j = 18 +i = 5, j = 19 +i = 5, j = 20 +i = 5, j = 21 +i = 5, j = 22 +i = 5, j = 23 +i = 5, j = 24 +i = 5, j = 25 +i = 5, j = 26 +i = 5, j = 27 +i = 5, j = 28 +i = 5, j = 29 +i = 5, j = 30 +i = 5, j = 31 +i = 6, j = 3 +i = 6, j = 4 +i = 6, j = 5 +i = 6, j = 6 +i = 6, j = 7 +i = 6, j = 8 +i = 6, j = 9 +i = 6, j = 10 +i = 6, j = 11 +i = 6, j = 12 +i = 6, j = 13 +i = 6, j = 14 +i = 6, j = 15 +i = 6, j = 16 +i = 6, j = 17 +i = 6, j = 18 +i = 6, j = 19 +i = 6, j = 20 +i = 6, j = 21 +i = 6, j = 22 +i = 6, j = 23 +i = 6, j = 24 +i = 6, j = 25 +i = 6, j = 26 +i = 6, j = 27 +i = 6, j = 28 +i = 6, j = 29 +i = 6, j = 30 +i = 6, j = 31 +i = 7, j = 3 +i = 7, j = 4 +i = 7, j = 5 +i = 7, j = 6 +i = 7, j = 7 +i = 7, j = 8 +i = 7, j = 9 +i = 7, j = 10 +i = 7, j = 11 +i = 7, j = 12 +i = 7, j = 13 +i = 7, j = 14 +i = 7, j = 15 +i = 7, j = 16 +i = 7, j = 17 +i = 7, j = 18 +i = 7, j = 19 +i = 7, j = 20 +i = 7, j = 21 +i = 7, j = 22 +i = 7, j = 23 +i = 7, j = 24 +i = 7, j = 25 +i = 7, j = 26 +i = 7, j = 27 +i = 7, j = 28 +i = 7, j = 29 +i = 7, j = 30 +i = 7, j = 31 +i = 8, j = 3 +i = 8, j = 4 +i = 8, j = 5 +i = 8, j = 6 +i = 8, j = 7 +i = 8, j = 8 +i = 8, j = 9 +i = 8, j = 10 +i = 8, j = 11 +i = 8, j = 12 +i = 8, j = 13 +i = 8, j = 14 +i = 8, j = 15 +i = 8, j = 16 +i = 8, j = 17 +i = 8, j = 18 +i = 8, j = 19 +i = 8, j = 20 +i = 8, j = 21 +i = 8, j = 22 +i = 8, j = 23 +i = 8, j = 24 +i = 8, j = 25 +i = 8, j = 26 +i = 8, j = 27 +i = 8, j = 28 +i = 8, j = 29 +i = 8, j = 30 +i = 8, j = 31 +i = 9, j = 3 +i = 9, j = 4 +i = 9, j = 5 +i = 9, j = 6 +i = 9, j = 7 +i = 9, j = 8 +i = 9, j = 9 +i = 9, j = 10 +i = 9, j = 11 +i = 9, j = 12 +i = 9, j = 13 +i = 9, j = 14 +i = 9, j = 15 +i = 9, j = 16 +i = 9, j = 17 +i = 9, j = 18 +i = 9, j = 19 +i = 9, j = 20 +i = 9, j = 21 +i = 9, j = 22 +i = 9, j = 23 +i = 9, j = 24 +i = 9, j = 25 +i = 9, j = 26 +i = 9, j = 27 +i = 9, j = 28 +i = 9, j = 29 +i = 9, j = 30 +i = 9, j = 31 +i = 10, j = 3 +i = 10, j = 4 +i = 10, j = 5 +i = 10, j = 6 +i = 10, j = 7 +i = 10, j = 8 +i = 10, j = 9 +i = 10, j = 10 +i = 10, j = 11 +i = 10, j = 12 +i = 10, j = 13 +i = 10, j = 14 +i = 10, j = 15 +i = 10, j = 16 +i = 10, j = 17 +i = 10, j = 18 +i = 10, j = 19 +i = 10, j = 20 +i = 10, j = 21 +i = 10, j = 22 +i = 10, j = 23 +i = 10, j = 24 +i = 10, j = 25 +i = 10, j = 26 +i = 10, j = 27 +i = 10, j = 28 +i = 10, j = 29 +i = 10, j = 30 +i = 10, j = 31 +i = 11, j = 3 +i = 11, j = 4 +i = 11, j = 5 +i = 11, j = 6 +i = 11, j = 7 +i = 11, j = 8 +i = 11, j = 9 +i = 11, j = 10 +i = 11, j = 11 +i = 11, j = 12 +i = 11, j = 13 +i = 11, j = 14 +i = 11, j = 15 +i = 11, j = 16 +i = 11, j = 17 +i = 11, j = 18 +i = 11, j = 19 +i = 11, j = 20 +i = 11, j = 21 +i = 11, j = 22 +i = 11, j = 23 +i = 11, j = 24 +i = 11, j = 25 +i = 11, j = 26 +i = 11, j = 27 +i = 11, j = 28 +i = 11, j = 29 +i = 11, j = 30 +i = 11, j = 31 +i = 12, j = 3 +i = 12, j = 4 +i = 12, j = 5 +i = 12, j = 6 +i = 12, j = 7 +i = 12, j = 8 +i = 12, j = 9 +i = 12, j = 10 +i = 12, j = 11 +i = 12, j = 12 +i = 12, j = 13 +i = 12, j = 14 +i = 12, j = 15 +i = 12, j = 16 +i = 12, j = 17 +i = 12, j = 18 +i = 12, j = 19 +i = 12, j = 20 +i = 12, j = 21 +i = 12, j = 22 +i = 12, j = 23 +i = 12, j = 24 +i = 12, j = 25 +i = 12, j = 26 +i = 12, j = 27 +i = 12, j = 28 +i = 12, j = 29 +i = 12, j = 30 +i = 12, j = 31 +i = 13, j = 3 +i = 13, j = 4 +i = 13, j = 5 +i = 13, j = 6 +i = 13, j = 7 +i = 13, j = 8 +i = 13, j = 9 +i = 13, j = 10 +i = 13, j = 11 +i = 13, j = 12 +i = 13, j = 13 +i = 13, j = 14 +i = 13, j = 15 +i = 13, j = 16 +i = 13, j = 17 +i = 13, j = 18 +i = 13, j = 19 +i = 13, j = 20 +i = 13, j = 21 +i = 13, j = 22 +i = 13, j = 23 +i = 13, j = 24 +i = 13, j = 25 +i = 13, j = 26 +i = 13, j = 27 +i = 13, j = 28 +i = 13, j = 29 +i = 13, j = 30 +i = 13, j = 31 +i = 14, j = 3 +i = 14, j = 4 +i = 14, j = 5 +i = 14, j = 6 +i = 14, j = 7 +i = 14, j = 8 +i = 14, j = 9 +i = 14, j = 10 +i = 14, j = 11 +i = 14, j = 12 +i = 14, j = 13 +i = 14, j = 14 +i = 14, j = 15 +i = 14, j = 16 +i = 14, j = 17 +i = 14, j = 18 +i = 14, j = 19 +i = 14, j = 20 +i = 14, j = 21 +i = 14, j = 22 +i = 14, j = 23 +i = 14, j = 24 +i = 14, j = 25 +i = 14, j = 26 +i = 14, j = 27 +i = 14, j = 28 +i = 14, j = 29 +i = 14, j = 30 +i = 14, j = 31 +i = 15, j = 3 +i = 15, j = 4 +i = 15, j = 5 +i = 15, j = 6 +i = 15, j = 7 +i = 15, j = 8 +i = 15, j = 9 +i = 15, j = 10 +i = 15, j = 11 +i = 15, j = 12 +i = 15, j = 13 +i = 15, j = 14 +i = 15, j = 15 +i = 15, j = 16 +i = 15, j = 17 +i = 15, j = 18 +i = 15, j = 19 +i = 15, j = 20 +i = 15, j = 21 +i = 15, j = 22 +i = 15, j = 23 +i = 15, j = 24 +i = 15, j = 25 +i = 15, j = 26 +i = 15, j = 27 +i = 15, j = 28 +i = 15, j = 29 +i = 15, j = 30 +i = 15, j = 31 +i = 16, j = 3 +i = 16, j = 4 +i = 16, j = 5 +i = 16, j = 6 +i = 16, j = 7 +i = 16, j = 8 +i = 16, j = 9 +i = 16, j = 10 +i = 16, j = 11 +i = 16, j = 12 +i = 16, j = 13 +i = 16, j = 14 +i = 16, j = 15 +i = 16, j = 16 +i = 16, j = 17 +i = 16, j = 18 +i = 16, j = 19 +i = 16, j = 20 +i = 16, j = 21 +i = 16, j = 22 +i = 16, j = 23 +i = 16, j = 24 +i = 16, j = 25 +i = 16, j = 26 +i = 16, j = 27 +i = 16, j = 28 +i = 16, j = 29 +i = 16, j = 30 +i = 16, j = 31 +i = 17, j = 3 +i = 17, j = 4 +i = 17, j = 5 +i = 17, j = 6 +i = 17, j = 7 +i = 17, j = 8 +i = 17, j = 9 +i = 17, j = 10 +i = 17, j = 11 +i = 17, j = 12 +i = 17, j = 13 +i = 17, j = 14 +i = 17, j = 15 +i = 17, j = 16 +i = 17, j = 17 +i = 17, j = 18 +i = 17, j = 19 +i = 17, j = 20 +i = 17, j = 21 +i = 17, j = 22 +i = 17, j = 23 +i = 17, j = 24 +i = 17, j = 25 +i = 17, j = 26 +i = 17, j = 27 +i = 17, j = 28 +i = 17, j = 29 +i = 17, j = 30 +i = 17, j = 31 +i = 18, j = 3 +i = 18, j = 4 +i = 18, j = 5 +i = 18, j = 6 +i = 18, j = 7 +i = 18, j = 8 +i = 18, j = 9 +i = 18, j = 10 +i = 18, j = 11 +i = 18, j = 12 +i = 18, j = 13 +i = 18, j = 14 +i = 18, j = 15 +i = 18, j = 16 +i = 18, j = 17 +i = 18, j = 18 +i = 18, j = 19 +i = 18, j = 20 +i = 18, j = 21 +i = 18, j = 22 +i = 18, j = 23 +i = 18, j = 24 +i = 18, j = 25 +i = 18, j = 26 +i = 18, j = 27 +i = 18, j = 28 +i = 18, j = 29 +i = 18, j = 30 +i = 18, j = 31 +i = 19, j = 3 +i = 19, j = 4 +i = 19, j = 5 +i = 19, j = 6 +i = 19, j = 7 +i = 19, j = 8 +i = 19, j = 9 +i = 19, j = 10 +i = 19, j = 11 +i = 19, j = 12 +i = 19, j = 13 +i = 19, j = 14 +i = 19, j = 15 +i = 19, j = 16 +i = 19, j = 17 +i = 19, j = 18 +i = 19, j = 19 +i = 19, j = 20 +i = 19, j = 21 +i = 19, j = 22 +i = 19, j = 23 +i = 19, j = 24 +i = 19, j = 25 +i = 19, j = 26 +i = 19, j = 27 +i = 19, j = 28 +i = 19, j = 29 +i = 19, j = 30 +i = 19, j = 31 +i = 20, j = 3 +i = 20, j = 4 +i = 20, j = 5 +i = 20, j = 6 +i = 20, j = 7 +i = 20, j = 8 +i = 20, j = 9 +i = 20, j = 10 +i = 20, j = 11 +i = 20, j = 12 +i = 20, j = 13 +i = 20, j = 14 +i = 20, j = 15 +i = 20, j = 16 +i = 20, j = 17 +i = 20, j = 18 +i = 20, j = 19 +i = 20, j = 20 +i = 20, j = 21 +i = 20, j = 22 +i = 20, j = 23 +i = 20, j = 24 +i = 20, j = 25 +i = 20, j = 26 +i = 20, j = 27 +i = 20, j = 28 +i = 20, j = 29 +i = 20, j = 30 +i = 20, j = 31 +i = 21, j = 3 +i = 21, j = 4 +i = 21, j = 5 +i = 21, j = 6 +i = 21, j = 7 +i = 21, j = 8 +i = 21, j = 9 +i = 21, j = 10 +i = 21, j = 11 +i = 21, j = 12 +i = 21, j = 13 +i = 21, j = 14 +i = 21, j = 15 +i = 21, j = 16 +i = 21, j = 17 +i = 21, j = 18 +i = 21, j = 19 +i = 21, j = 20 +i = 21, j = 21 +i = 21, j = 22 +i = 21, j = 23 +i = 21, j = 24 +i = 21, j = 25 +i = 21, j = 26 +i = 21, j = 27 +i = 21, j = 28 +i = 21, j = 29 +i = 21, j = 30 +i = 21, j = 31 +i = 22, j = 3 +i = 22, j = 4 +i = 22, j = 5 +i = 22, j = 6 +i = 22, j = 7 +i = 22, j = 8 +i = 22, j = 9 +i = 22, j = 10 +i = 22, j = 11 +i = 22, j = 12 +i = 22, j = 13 +i = 22, j = 14 +i = 22, j = 15 +i = 22, j = 16 +i = 22, j = 17 +i = 22, j = 18 +i = 22, j = 19 +i = 22, j = 20 +i = 22, j = 21 +i = 22, j = 22 +i = 22, j = 23 +i = 22, j = 24 +i = 22, j = 25 +i = 22, j = 26 +i = 22, j = 27 +i = 22, j = 28 +i = 22, j = 29 +i = 22, j = 30 +i = 22, j = 31 +i = 23, j = 3 +i = 23, j = 4 +i = 23, j = 5 +i = 23, j = 6 +i = 23, j = 7 +i = 23, j = 8 +i = 23, j = 9 +i = 23, j = 10 +i = 23, j = 11 +i = 23, j = 12 +i = 23, j = 13 +i = 23, j = 14 +i = 23, j = 15 +i = 23, j = 16 +i = 23, j = 17 +i = 23, j = 18 +i = 23, j = 19 +i = 23, j = 20 +i = 23, j = 21 +i = 23, j = 22 +i = 23, j = 23 +i = 23, j = 24 +i = 23, j = 25 +i = 23, j = 26 +i = 23, j = 27 +i = 23, j = 28 +i = 23, j = 29 +i = 23, j = 30 +i = 23, j = 31 +i = 24, j = 3 +i = 24, j = 4 +i = 24, j = 5 +i = 24, j = 6 +i = 24, j = 7 +i = 24, j = 8 +i = 24, j = 9 +i = 24, j = 10 +i = 24, j = 11 +i = 24, j = 12 +i = 24, j = 13 +i = 24, j = 14 +i = 24, j = 15 +i = 24, j = 16 +i = 24, j = 17 +i = 24, j = 18 +i = 24, j = 19 +i = 24, j = 20 +i = 24, j = 21 +i = 24, j = 22 +i = 24, j = 23 +i = 24, j = 24 +i = 24, j = 25 +i = 24, j = 26 +i = 24, j = 27 +i = 24, j = 28 +i = 24, j = 29 +i = 24, j = 30 +i = 24, j = 31 +i = 25, j = 3 +i = 25, j = 4 +i = 25, j = 5 +i = 25, j = 6 +i = 25, j = 7 +i = 25, j = 8 +i = 25, j = 9 +i = 25, j = 10 +i = 25, j = 11 +i = 25, j = 12 +i = 25, j = 13 +i = 25, j = 14 +i = 25, j = 15 +i = 25, j = 16 +i = 25, j = 17 +i = 25, j = 18 +i = 25, j = 19 +i = 25, j = 20 +i = 25, j = 21 +i = 25, j = 22 +i = 25, j = 23 +i = 25, j = 24 +i = 25, j = 25 +i = 25, j = 26 +i = 25, j = 27 +i = 25, j = 28 +i = 25, j = 29 +i = 25, j = 30 +i = 25, j = 31 +i = 26, j = 3 +i = 26, j = 4 +i = 26, j = 5 +i = 26, j = 6 +i = 26, j = 7 +i = 26, j = 8 +i = 26, j = 9 +i = 26, j = 10 +i = 26, j = 11 +i = 26, j = 12 +i = 26, j = 13 +i = 26, j = 14 +i = 26, j = 15 +i = 26, j = 16 +i = 26, j = 17 +i = 26, j = 18 +i = 26, j = 19 +i = 26, j = 20 +i = 26, j = 21 +i = 26, j = 22 +i = 26, j = 23 +i = 26, j = 24 +i = 26, j = 25 +i = 26, j = 26 +i = 26, j = 27 +i = 26, j = 28 +i = 26, j = 29 +i = 26, j = 30 +i = 26, j = 31 +i = 27, j = 3 +i = 27, j = 4 +i = 27, j = 5 +i = 27, j = 6 +i = 27, j = 7 +i = 27, j = 8 +i = 27, j = 9 +i = 27, j = 10 +i = 27, j = 11 +i = 27, j = 12 +i = 27, j = 13 +i = 27, j = 14 +i = 27, j = 15 +i = 27, j = 16 +i = 27, j = 17 +i = 27, j = 18 +i = 27, j = 19 +i = 27, j = 20 +i = 27, j = 21 +i = 27, j = 22 +i = 27, j = 23 +i = 27, j = 24 +i = 27, j = 25 +i = 27, j = 26 +i = 27, j = 27 +i = 27, j = 28 +i = 27, j = 29 +i = 27, j = 30 +i = 27, j = 31 +i = 28, j = 3 +i = 28, j = 4 +i = 28, j = 5 +i = 28, j = 6 +i = 28, j = 7 +i = 28, j = 8 +i = 28, j = 9 +i = 28, j = 10 +i = 28, j = 11 +i = 28, j = 12 +i = 28, j = 13 +i = 28, j = 14 +i = 28, j = 15 +i = 28, j = 16 +i = 28, j = 17 +i = 28, j = 18 +i = 28, j = 19 +i = 28, j = 20 +i = 28, j = 21 +i = 28, j = 22 +i = 28, j = 23 +i = 28, j = 24 +i = 28, j = 25 +i = 28, j = 26 +i = 28, j = 27 +i = 28, j = 28 +i = 28, j = 29 +i = 28, j = 30 +i = 28, j = 31 +i = 29, j = 3 +i = 29, j = 4 +i = 29, j = 5 +i = 29, j = 6 +i = 29, j = 7 +i = 29, j = 8 +i = 29, j = 9 +i = 29, j = 10 +i = 29, j = 11 +i = 29, j = 12 +i = 29, j = 13 +i = 29, j = 14 +i = 29, j = 15 +i = 29, j = 16 +i = 29, j = 17 +i = 29, j = 18 +i = 29, j = 19 +i = 29, j = 20 +i = 29, j = 21 +i = 29, j = 22 +i = 29, j = 23 +i = 29, j = 24 +i = 29, j = 25 +i = 29, j = 26 +i = 29, j = 27 +i = 29, j = 28 +i = 29, j = 29 +i = 29, j = 30 +i = 29, j = 31 +i = 30, j = 3 +i = 30, j = 4 +i = 30, j = 5 +i = 30, j = 6 +i = 30, j = 7 +i = 30, j = 8 +i = 30, j = 9 +i = 30, j = 10 +i = 30, j = 11 +i = 30, j = 12 +i = 30, j = 13 +i = 30, j = 14 +i = 30, j = 15 +i = 30, j = 16 +i = 30, j = 17 +i = 30, j = 18 +i = 30, j = 19 +i = 30, j = 20 +i = 30, j = 21 +i = 30, j = 22 +i = 30, j = 23 +i = 30, j = 24 +i = 30, j = 25 +i = 30, j = 26 +i = 30, j = 27 +i = 30, j = 28 +i = 30, j = 29 +i = 30, j = 30 +i = 30, j = 31 +i = 31, j = 3 +i = 31, j = 4 +i = 31, j = 5 +i = 31, j = 6 +i = 31, j = 7 +i = 31, j = 8 +i = 31, j = 9 +i = 31, j = 10 +i = 31, j = 11 +i = 31, j = 12 +i = 31, j = 13 +i = 31, j = 14 +i = 31, j = 15 +i = 31, j = 16 +i = 31, j = 17 +i = 31, j = 18 +i = 31, j = 19 +i = 31, j = 20 +i = 31, j = 21 +i = 31, j = 22 +i = 31, j = 23 +i = 31, j = 24 +i = 31, j = 25 +i = 31, j = 26 +i = 31, j = 27 +i = 31, j = 28 +i = 31, j = 29 +i = 31, j = 30 +i = 31, j = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith09/isaac.h b/src/systemc/tests/systemc/datatypes/int/arith/arith09/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith09/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith10/arith10.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith10/arith10.cpp new file mode 100644 index 000000000..e649cb2a3 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith10/arith10.cpp @@ -0,0 +1,119 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith10.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +int +sc_main( int argc, char* argv[] ) +{ + signed int vali[5] = { 0, 1, -1, 7, -8 }; + signed int valj[5] = { 0, 1, -1, 7, -8 }; + + for (int i = 3; i < 32; ++i) { + for (int j = 3; j < 32; ++j) { + cout << "i = " << i << ", j = " << j << endl; + + sc_signed x(i); + sc_signed y(j); + sc_signed z(65), q(65); + + vali[3] = (1 << (i - 1)) - 1; + vali[4] = - (1 << (i - 1)); + + valj[3] = (1 << (j - 1)) - 1; + valj[4] = - (1 << (j - 1)); + + for (int ii = 0; ii < 100; ++ii) { + for (int jj = 0; jj < 100; ++jj) { + signed int qi = (ii < 5) ? vali[ii] : (rng.rand() & ((1 << i) - 1)); + signed int qj = (jj < 5) ? valj[jj] : (rng.rand() & ((1 << j) - 1)); + + if (qi & (1 << (i - 1))) { + qi = (qi << (32 - i)) >> (32 - i); + } + if (qj & (1 << (j - 1))) { + qj = (qj << (32 - j)) >> (32 - j); + } + + x = qi; + y = qj; + z = x * y; + sc_assert( static_cast >( z.range(31,0) ) == + (qi * qj) ); + bool s; + s = ((x < 0) != (y < 0)); + sc_signed x2(i+1); + x2 = x; + if (x < 0) { + x2 = - x; + } + sc_signed y2(j+1); + y2 = y; + if (y < 0) { + y2 = - y; + } + + sc_unsigned xhi(16), xlo(16); + sc_unsigned yhi(16), ylo(16); + sc_unsigned zero(16); + zero = 0; + xlo = i > 14 ? x2.range(15,0) : x2.range(i,0); + xhi = i > 15 ? x2.range(i,16) : zero; + ylo = j > 14 ? y2.range(15,0) : y2.range(j,0); + yhi = j > 15 ? y2.range(j,16) : zero; + q = (xlo * ylo) + + (xhi * ylo + xlo * yhi) * 65536 + + ((xhi * yhi) * 65536) * 65536; + if (s) + q = - q; + if (z.range(63,0) != q.range(63,0)) { + cout << "xlo = " << xlo << endl; + cout << "xhi = " << xhi << endl; + cout << "ylo = " << ylo << endl; + cout << "yhi = " << yhi << endl; + sc_assert(false); + } + } + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith10/golden/arith10.log b/src/systemc/tests/systemc/datatypes/int/arith/arith10/golden/arith10.log new file mode 100644 index 000000000..4e17a8196 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith10/golden/arith10.log @@ -0,0 +1,842 @@ +SystemC Simulation +i = 3, j = 3 +i = 3, j = 4 +i = 3, j = 5 +i = 3, j = 6 +i = 3, j = 7 +i = 3, j = 8 +i = 3, j = 9 +i = 3, j = 10 +i = 3, j = 11 +i = 3, j = 12 +i = 3, j = 13 +i = 3, j = 14 +i = 3, j = 15 +i = 3, j = 16 +i = 3, j = 17 +i = 3, j = 18 +i = 3, j = 19 +i = 3, j = 20 +i = 3, j = 21 +i = 3, j = 22 +i = 3, j = 23 +i = 3, j = 24 +i = 3, j = 25 +i = 3, j = 26 +i = 3, j = 27 +i = 3, j = 28 +i = 3, j = 29 +i = 3, j = 30 +i = 3, j = 31 +i = 4, j = 3 +i = 4, j = 4 +i = 4, j = 5 +i = 4, j = 6 +i = 4, j = 7 +i = 4, j = 8 +i = 4, j = 9 +i = 4, j = 10 +i = 4, j = 11 +i = 4, j = 12 +i = 4, j = 13 +i = 4, j = 14 +i = 4, j = 15 +i = 4, j = 16 +i = 4, j = 17 +i = 4, j = 18 +i = 4, j = 19 +i = 4, j = 20 +i = 4, j = 21 +i = 4, j = 22 +i = 4, j = 23 +i = 4, j = 24 +i = 4, j = 25 +i = 4, j = 26 +i = 4, j = 27 +i = 4, j = 28 +i = 4, j = 29 +i = 4, j = 30 +i = 4, j = 31 +i = 5, j = 3 +i = 5, j = 4 +i = 5, j = 5 +i = 5, j = 6 +i = 5, j = 7 +i = 5, j = 8 +i = 5, j = 9 +i = 5, j = 10 +i = 5, j = 11 +i = 5, j = 12 +i = 5, j = 13 +i = 5, j = 14 +i = 5, j = 15 +i = 5, j = 16 +i = 5, j = 17 +i = 5, j = 18 +i = 5, j = 19 +i = 5, j = 20 +i = 5, j = 21 +i = 5, j = 22 +i = 5, j = 23 +i = 5, j = 24 +i = 5, j = 25 +i = 5, j = 26 +i = 5, j = 27 +i = 5, j = 28 +i = 5, j = 29 +i = 5, j = 30 +i = 5, j = 31 +i = 6, j = 3 +i = 6, j = 4 +i = 6, j = 5 +i = 6, j = 6 +i = 6, j = 7 +i = 6, j = 8 +i = 6, j = 9 +i = 6, j = 10 +i = 6, j = 11 +i = 6, j = 12 +i = 6, j = 13 +i = 6, j = 14 +i = 6, j = 15 +i = 6, j = 16 +i = 6, j = 17 +i = 6, j = 18 +i = 6, j = 19 +i = 6, j = 20 +i = 6, j = 21 +i = 6, j = 22 +i = 6, j = 23 +i = 6, j = 24 +i = 6, j = 25 +i = 6, j = 26 +i = 6, j = 27 +i = 6, j = 28 +i = 6, j = 29 +i = 6, j = 30 +i = 6, j = 31 +i = 7, j = 3 +i = 7, j = 4 +i = 7, j = 5 +i = 7, j = 6 +i = 7, j = 7 +i = 7, j = 8 +i = 7, j = 9 +i = 7, j = 10 +i = 7, j = 11 +i = 7, j = 12 +i = 7, j = 13 +i = 7, j = 14 +i = 7, j = 15 +i = 7, j = 16 +i = 7, j = 17 +i = 7, j = 18 +i = 7, j = 19 +i = 7, j = 20 +i = 7, j = 21 +i = 7, j = 22 +i = 7, j = 23 +i = 7, j = 24 +i = 7, j = 25 +i = 7, j = 26 +i = 7, j = 27 +i = 7, j = 28 +i = 7, j = 29 +i = 7, j = 30 +i = 7, j = 31 +i = 8, j = 3 +i = 8, j = 4 +i = 8, j = 5 +i = 8, j = 6 +i = 8, j = 7 +i = 8, j = 8 +i = 8, j = 9 +i = 8, j = 10 +i = 8, j = 11 +i = 8, j = 12 +i = 8, j = 13 +i = 8, j = 14 +i = 8, j = 15 +i = 8, j = 16 +i = 8, j = 17 +i = 8, j = 18 +i = 8, j = 19 +i = 8, j = 20 +i = 8, j = 21 +i = 8, j = 22 +i = 8, j = 23 +i = 8, j = 24 +i = 8, j = 25 +i = 8, j = 26 +i = 8, j = 27 +i = 8, j = 28 +i = 8, j = 29 +i = 8, j = 30 +i = 8, j = 31 +i = 9, j = 3 +i = 9, j = 4 +i = 9, j = 5 +i = 9, j = 6 +i = 9, j = 7 +i = 9, j = 8 +i = 9, j = 9 +i = 9, j = 10 +i = 9, j = 11 +i = 9, j = 12 +i = 9, j = 13 +i = 9, j = 14 +i = 9, j = 15 +i = 9, j = 16 +i = 9, j = 17 +i = 9, j = 18 +i = 9, j = 19 +i = 9, j = 20 +i = 9, j = 21 +i = 9, j = 22 +i = 9, j = 23 +i = 9, j = 24 +i = 9, j = 25 +i = 9, j = 26 +i = 9, j = 27 +i = 9, j = 28 +i = 9, j = 29 +i = 9, j = 30 +i = 9, j = 31 +i = 10, j = 3 +i = 10, j = 4 +i = 10, j = 5 +i = 10, j = 6 +i = 10, j = 7 +i = 10, j = 8 +i = 10, j = 9 +i = 10, j = 10 +i = 10, j = 11 +i = 10, j = 12 +i = 10, j = 13 +i = 10, j = 14 +i = 10, j = 15 +i = 10, j = 16 +i = 10, j = 17 +i = 10, j = 18 +i = 10, j = 19 +i = 10, j = 20 +i = 10, j = 21 +i = 10, j = 22 +i = 10, j = 23 +i = 10, j = 24 +i = 10, j = 25 +i = 10, j = 26 +i = 10, j = 27 +i = 10, j = 28 +i = 10, j = 29 +i = 10, j = 30 +i = 10, j = 31 +i = 11, j = 3 +i = 11, j = 4 +i = 11, j = 5 +i = 11, j = 6 +i = 11, j = 7 +i = 11, j = 8 +i = 11, j = 9 +i = 11, j = 10 +i = 11, j = 11 +i = 11, j = 12 +i = 11, j = 13 +i = 11, j = 14 +i = 11, j = 15 +i = 11, j = 16 +i = 11, j = 17 +i = 11, j = 18 +i = 11, j = 19 +i = 11, j = 20 +i = 11, j = 21 +i = 11, j = 22 +i = 11, j = 23 +i = 11, j = 24 +i = 11, j = 25 +i = 11, j = 26 +i = 11, j = 27 +i = 11, j = 28 +i = 11, j = 29 +i = 11, j = 30 +i = 11, j = 31 +i = 12, j = 3 +i = 12, j = 4 +i = 12, j = 5 +i = 12, j = 6 +i = 12, j = 7 +i = 12, j = 8 +i = 12, j = 9 +i = 12, j = 10 +i = 12, j = 11 +i = 12, j = 12 +i = 12, j = 13 +i = 12, j = 14 +i = 12, j = 15 +i = 12, j = 16 +i = 12, j = 17 +i = 12, j = 18 +i = 12, j = 19 +i = 12, j = 20 +i = 12, j = 21 +i = 12, j = 22 +i = 12, j = 23 +i = 12, j = 24 +i = 12, j = 25 +i = 12, j = 26 +i = 12, j = 27 +i = 12, j = 28 +i = 12, j = 29 +i = 12, j = 30 +i = 12, j = 31 +i = 13, j = 3 +i = 13, j = 4 +i = 13, j = 5 +i = 13, j = 6 +i = 13, j = 7 +i = 13, j = 8 +i = 13, j = 9 +i = 13, j = 10 +i = 13, j = 11 +i = 13, j = 12 +i = 13, j = 13 +i = 13, j = 14 +i = 13, j = 15 +i = 13, j = 16 +i = 13, j = 17 +i = 13, j = 18 +i = 13, j = 19 +i = 13, j = 20 +i = 13, j = 21 +i = 13, j = 22 +i = 13, j = 23 +i = 13, j = 24 +i = 13, j = 25 +i = 13, j = 26 +i = 13, j = 27 +i = 13, j = 28 +i = 13, j = 29 +i = 13, j = 30 +i = 13, j = 31 +i = 14, j = 3 +i = 14, j = 4 +i = 14, j = 5 +i = 14, j = 6 +i = 14, j = 7 +i = 14, j = 8 +i = 14, j = 9 +i = 14, j = 10 +i = 14, j = 11 +i = 14, j = 12 +i = 14, j = 13 +i = 14, j = 14 +i = 14, j = 15 +i = 14, j = 16 +i = 14, j = 17 +i = 14, j = 18 +i = 14, j = 19 +i = 14, j = 20 +i = 14, j = 21 +i = 14, j = 22 +i = 14, j = 23 +i = 14, j = 24 +i = 14, j = 25 +i = 14, j = 26 +i = 14, j = 27 +i = 14, j = 28 +i = 14, j = 29 +i = 14, j = 30 +i = 14, j = 31 +i = 15, j = 3 +i = 15, j = 4 +i = 15, j = 5 +i = 15, j = 6 +i = 15, j = 7 +i = 15, j = 8 +i = 15, j = 9 +i = 15, j = 10 +i = 15, j = 11 +i = 15, j = 12 +i = 15, j = 13 +i = 15, j = 14 +i = 15, j = 15 +i = 15, j = 16 +i = 15, j = 17 +i = 15, j = 18 +i = 15, j = 19 +i = 15, j = 20 +i = 15, j = 21 +i = 15, j = 22 +i = 15, j = 23 +i = 15, j = 24 +i = 15, j = 25 +i = 15, j = 26 +i = 15, j = 27 +i = 15, j = 28 +i = 15, j = 29 +i = 15, j = 30 +i = 15, j = 31 +i = 16, j = 3 +i = 16, j = 4 +i = 16, j = 5 +i = 16, j = 6 +i = 16, j = 7 +i = 16, j = 8 +i = 16, j = 9 +i = 16, j = 10 +i = 16, j = 11 +i = 16, j = 12 +i = 16, j = 13 +i = 16, j = 14 +i = 16, j = 15 +i = 16, j = 16 +i = 16, j = 17 +i = 16, j = 18 +i = 16, j = 19 +i = 16, j = 20 +i = 16, j = 21 +i = 16, j = 22 +i = 16, j = 23 +i = 16, j = 24 +i = 16, j = 25 +i = 16, j = 26 +i = 16, j = 27 +i = 16, j = 28 +i = 16, j = 29 +i = 16, j = 30 +i = 16, j = 31 +i = 17, j = 3 +i = 17, j = 4 +i = 17, j = 5 +i = 17, j = 6 +i = 17, j = 7 +i = 17, j = 8 +i = 17, j = 9 +i = 17, j = 10 +i = 17, j = 11 +i = 17, j = 12 +i = 17, j = 13 +i = 17, j = 14 +i = 17, j = 15 +i = 17, j = 16 +i = 17, j = 17 +i = 17, j = 18 +i = 17, j = 19 +i = 17, j = 20 +i = 17, j = 21 +i = 17, j = 22 +i = 17, j = 23 +i = 17, j = 24 +i = 17, j = 25 +i = 17, j = 26 +i = 17, j = 27 +i = 17, j = 28 +i = 17, j = 29 +i = 17, j = 30 +i = 17, j = 31 +i = 18, j = 3 +i = 18, j = 4 +i = 18, j = 5 +i = 18, j = 6 +i = 18, j = 7 +i = 18, j = 8 +i = 18, j = 9 +i = 18, j = 10 +i = 18, j = 11 +i = 18, j = 12 +i = 18, j = 13 +i = 18, j = 14 +i = 18, j = 15 +i = 18, j = 16 +i = 18, j = 17 +i = 18, j = 18 +i = 18, j = 19 +i = 18, j = 20 +i = 18, j = 21 +i = 18, j = 22 +i = 18, j = 23 +i = 18, j = 24 +i = 18, j = 25 +i = 18, j = 26 +i = 18, j = 27 +i = 18, j = 28 +i = 18, j = 29 +i = 18, j = 30 +i = 18, j = 31 +i = 19, j = 3 +i = 19, j = 4 +i = 19, j = 5 +i = 19, j = 6 +i = 19, j = 7 +i = 19, j = 8 +i = 19, j = 9 +i = 19, j = 10 +i = 19, j = 11 +i = 19, j = 12 +i = 19, j = 13 +i = 19, j = 14 +i = 19, j = 15 +i = 19, j = 16 +i = 19, j = 17 +i = 19, j = 18 +i = 19, j = 19 +i = 19, j = 20 +i = 19, j = 21 +i = 19, j = 22 +i = 19, j = 23 +i = 19, j = 24 +i = 19, j = 25 +i = 19, j = 26 +i = 19, j = 27 +i = 19, j = 28 +i = 19, j = 29 +i = 19, j = 30 +i = 19, j = 31 +i = 20, j = 3 +i = 20, j = 4 +i = 20, j = 5 +i = 20, j = 6 +i = 20, j = 7 +i = 20, j = 8 +i = 20, j = 9 +i = 20, j = 10 +i = 20, j = 11 +i = 20, j = 12 +i = 20, j = 13 +i = 20, j = 14 +i = 20, j = 15 +i = 20, j = 16 +i = 20, j = 17 +i = 20, j = 18 +i = 20, j = 19 +i = 20, j = 20 +i = 20, j = 21 +i = 20, j = 22 +i = 20, j = 23 +i = 20, j = 24 +i = 20, j = 25 +i = 20, j = 26 +i = 20, j = 27 +i = 20, j = 28 +i = 20, j = 29 +i = 20, j = 30 +i = 20, j = 31 +i = 21, j = 3 +i = 21, j = 4 +i = 21, j = 5 +i = 21, j = 6 +i = 21, j = 7 +i = 21, j = 8 +i = 21, j = 9 +i = 21, j = 10 +i = 21, j = 11 +i = 21, j = 12 +i = 21, j = 13 +i = 21, j = 14 +i = 21, j = 15 +i = 21, j = 16 +i = 21, j = 17 +i = 21, j = 18 +i = 21, j = 19 +i = 21, j = 20 +i = 21, j = 21 +i = 21, j = 22 +i = 21, j = 23 +i = 21, j = 24 +i = 21, j = 25 +i = 21, j = 26 +i = 21, j = 27 +i = 21, j = 28 +i = 21, j = 29 +i = 21, j = 30 +i = 21, j = 31 +i = 22, j = 3 +i = 22, j = 4 +i = 22, j = 5 +i = 22, j = 6 +i = 22, j = 7 +i = 22, j = 8 +i = 22, j = 9 +i = 22, j = 10 +i = 22, j = 11 +i = 22, j = 12 +i = 22, j = 13 +i = 22, j = 14 +i = 22, j = 15 +i = 22, j = 16 +i = 22, j = 17 +i = 22, j = 18 +i = 22, j = 19 +i = 22, j = 20 +i = 22, j = 21 +i = 22, j = 22 +i = 22, j = 23 +i = 22, j = 24 +i = 22, j = 25 +i = 22, j = 26 +i = 22, j = 27 +i = 22, j = 28 +i = 22, j = 29 +i = 22, j = 30 +i = 22, j = 31 +i = 23, j = 3 +i = 23, j = 4 +i = 23, j = 5 +i = 23, j = 6 +i = 23, j = 7 +i = 23, j = 8 +i = 23, j = 9 +i = 23, j = 10 +i = 23, j = 11 +i = 23, j = 12 +i = 23, j = 13 +i = 23, j = 14 +i = 23, j = 15 +i = 23, j = 16 +i = 23, j = 17 +i = 23, j = 18 +i = 23, j = 19 +i = 23, j = 20 +i = 23, j = 21 +i = 23, j = 22 +i = 23, j = 23 +i = 23, j = 24 +i = 23, j = 25 +i = 23, j = 26 +i = 23, j = 27 +i = 23, j = 28 +i = 23, j = 29 +i = 23, j = 30 +i = 23, j = 31 +i = 24, j = 3 +i = 24, j = 4 +i = 24, j = 5 +i = 24, j = 6 +i = 24, j = 7 +i = 24, j = 8 +i = 24, j = 9 +i = 24, j = 10 +i = 24, j = 11 +i = 24, j = 12 +i = 24, j = 13 +i = 24, j = 14 +i = 24, j = 15 +i = 24, j = 16 +i = 24, j = 17 +i = 24, j = 18 +i = 24, j = 19 +i = 24, j = 20 +i = 24, j = 21 +i = 24, j = 22 +i = 24, j = 23 +i = 24, j = 24 +i = 24, j = 25 +i = 24, j = 26 +i = 24, j = 27 +i = 24, j = 28 +i = 24, j = 29 +i = 24, j = 30 +i = 24, j = 31 +i = 25, j = 3 +i = 25, j = 4 +i = 25, j = 5 +i = 25, j = 6 +i = 25, j = 7 +i = 25, j = 8 +i = 25, j = 9 +i = 25, j = 10 +i = 25, j = 11 +i = 25, j = 12 +i = 25, j = 13 +i = 25, j = 14 +i = 25, j = 15 +i = 25, j = 16 +i = 25, j = 17 +i = 25, j = 18 +i = 25, j = 19 +i = 25, j = 20 +i = 25, j = 21 +i = 25, j = 22 +i = 25, j = 23 +i = 25, j = 24 +i = 25, j = 25 +i = 25, j = 26 +i = 25, j = 27 +i = 25, j = 28 +i = 25, j = 29 +i = 25, j = 30 +i = 25, j = 31 +i = 26, j = 3 +i = 26, j = 4 +i = 26, j = 5 +i = 26, j = 6 +i = 26, j = 7 +i = 26, j = 8 +i = 26, j = 9 +i = 26, j = 10 +i = 26, j = 11 +i = 26, j = 12 +i = 26, j = 13 +i = 26, j = 14 +i = 26, j = 15 +i = 26, j = 16 +i = 26, j = 17 +i = 26, j = 18 +i = 26, j = 19 +i = 26, j = 20 +i = 26, j = 21 +i = 26, j = 22 +i = 26, j = 23 +i = 26, j = 24 +i = 26, j = 25 +i = 26, j = 26 +i = 26, j = 27 +i = 26, j = 28 +i = 26, j = 29 +i = 26, j = 30 +i = 26, j = 31 +i = 27, j = 3 +i = 27, j = 4 +i = 27, j = 5 +i = 27, j = 6 +i = 27, j = 7 +i = 27, j = 8 +i = 27, j = 9 +i = 27, j = 10 +i = 27, j = 11 +i = 27, j = 12 +i = 27, j = 13 +i = 27, j = 14 +i = 27, j = 15 +i = 27, j = 16 +i = 27, j = 17 +i = 27, j = 18 +i = 27, j = 19 +i = 27, j = 20 +i = 27, j = 21 +i = 27, j = 22 +i = 27, j = 23 +i = 27, j = 24 +i = 27, j = 25 +i = 27, j = 26 +i = 27, j = 27 +i = 27, j = 28 +i = 27, j = 29 +i = 27, j = 30 +i = 27, j = 31 +i = 28, j = 3 +i = 28, j = 4 +i = 28, j = 5 +i = 28, j = 6 +i = 28, j = 7 +i = 28, j = 8 +i = 28, j = 9 +i = 28, j = 10 +i = 28, j = 11 +i = 28, j = 12 +i = 28, j = 13 +i = 28, j = 14 +i = 28, j = 15 +i = 28, j = 16 +i = 28, j = 17 +i = 28, j = 18 +i = 28, j = 19 +i = 28, j = 20 +i = 28, j = 21 +i = 28, j = 22 +i = 28, j = 23 +i = 28, j = 24 +i = 28, j = 25 +i = 28, j = 26 +i = 28, j = 27 +i = 28, j = 28 +i = 28, j = 29 +i = 28, j = 30 +i = 28, j = 31 +i = 29, j = 3 +i = 29, j = 4 +i = 29, j = 5 +i = 29, j = 6 +i = 29, j = 7 +i = 29, j = 8 +i = 29, j = 9 +i = 29, j = 10 +i = 29, j = 11 +i = 29, j = 12 +i = 29, j = 13 +i = 29, j = 14 +i = 29, j = 15 +i = 29, j = 16 +i = 29, j = 17 +i = 29, j = 18 +i = 29, j = 19 +i = 29, j = 20 +i = 29, j = 21 +i = 29, j = 22 +i = 29, j = 23 +i = 29, j = 24 +i = 29, j = 25 +i = 29, j = 26 +i = 29, j = 27 +i = 29, j = 28 +i = 29, j = 29 +i = 29, j = 30 +i = 29, j = 31 +i = 30, j = 3 +i = 30, j = 4 +i = 30, j = 5 +i = 30, j = 6 +i = 30, j = 7 +i = 30, j = 8 +i = 30, j = 9 +i = 30, j = 10 +i = 30, j = 11 +i = 30, j = 12 +i = 30, j = 13 +i = 30, j = 14 +i = 30, j = 15 +i = 30, j = 16 +i = 30, j = 17 +i = 30, j = 18 +i = 30, j = 19 +i = 30, j = 20 +i = 30, j = 21 +i = 30, j = 22 +i = 30, j = 23 +i = 30, j = 24 +i = 30, j = 25 +i = 30, j = 26 +i = 30, j = 27 +i = 30, j = 28 +i = 30, j = 29 +i = 30, j = 30 +i = 30, j = 31 +i = 31, j = 3 +i = 31, j = 4 +i = 31, j = 5 +i = 31, j = 6 +i = 31, j = 7 +i = 31, j = 8 +i = 31, j = 9 +i = 31, j = 10 +i = 31, j = 11 +i = 31, j = 12 +i = 31, j = 13 +i = 31, j = 14 +i = 31, j = 15 +i = 31, j = 16 +i = 31, j = 17 +i = 31, j = 18 +i = 31, j = 19 +i = 31, j = 20 +i = 31, j = 21 +i = 31, j = 22 +i = 31, j = 23 +i = 31, j = 24 +i = 31, j = 25 +i = 31, j = 26 +i = 31, j = 27 +i = 31, j = 28 +i = 31, j = 29 +i = 31, j = 30 +i = 31, j = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith10/isaac.h b/src/systemc/tests/systemc/datatypes/int/arith/arith10/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith10/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith11/arith11.cpp b/src/systemc/tests/systemc/datatypes/int/arith/arith11/arith11.cpp new file mode 100644 index 000000000..341ebf150 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith11/arith11.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arith11.cpp -- test auto increment on sc_bigint and sc_biguint + + Original Author: Andy Goodrich, Forte Design Systems, 24 March 2008 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +int sc_main(int argc, char**argv) +{ + sc_biguint<3> a = 7; + sc_bigint<3> b = 7; + + ++a; + cout << "a is " << a << endl; + cout << "a == 0 is " << (a==0) << endl; + cout << "raw digit: " << *a.get_raw() << endl; + cout << endl; + + ++b; + cout << "b is " << b << endl; + cout << "b == 0 is " << (b==0) << endl; + cout << "raw digit: " << *b.get_raw() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/arith/arith11/golden/arith11.log b/src/systemc/tests/systemc/datatypes/int/arith/arith11/golden/arith11.log new file mode 100644 index 000000000..06a259a10 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/arith/arith11/golden/arith11.log @@ -0,0 +1,8 @@ +SystemC Simulation +a is 0 +a == 0 is 1 +raw digit: 0 + +b is 0 +b == 0 is 1 +raw digit: 0 diff --git a/src/systemc/tests/systemc/datatypes/int/check/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/check/test01/golden/test01.log new file mode 100644 index 000000000..52f7e5605 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/check/test01/golden/test01.log @@ -0,0 +1,19 @@ +SystemC Simulation +caught exception for sc_int<-3> +caught exception for sc_int<0> +caught exception for sc_int<100> +caught exception for sc_int<8>[-1] +caught exception for sc_int<8>[8] +caught exception for sc_int<8>( 3, -1 ) +caught exception for sc_int<8>( 8, 4 ) +caught exception for sc_int<8>( 0, 3 ) +0 +caught exception for sc_uint<-3> +caught exception for sc_uint<0> +caught exception for sc_uint<100> +caught exception for sc_uint<8>[-1] +caught exception for sc_uint<8>[8] +caught exception for sc_uint<8>( 3, -1 ) +caught exception for sc_uint<8>( 8, 4 ) +caught exception for sc_uint<8>( 0, 3 ) +0 diff --git a/src/systemc/tests/systemc/datatypes/int/check/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/check/test01/test01.cpp new file mode 100644 index 000000000..75220fde4 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/check/test01/test01.cpp @@ -0,0 +1,207 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of checks in the sc_[u]int classes + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + // check_length for sc_int_base + + try { + sc_int<-3> a; + } + catch( sc_report ) { + cout << "caught exception for sc_int<-3>\n"; + } + + try { + sc_int<0> a; + } + catch( sc_report ) { + cout << "caught exception for sc_int<0>\n"; + } + + try { + sc_int<100> a; + } + catch( sc_report ) { + cout << "caught exception for sc_int<100>\n"; + } + + + // check_index for sc_int_base + + try { + sc_int<8> a = 42; + cout << a[-1] << "\n"; + } + catch( sc_report ) { + cout << "caught exception for sc_int<8>[-1]\n"; + } + + try { + sc_int<8> a = 42; + cout << a[8] << "\n"; + } + catch( sc_report ) { + cout << "caught exception for sc_int<8>[8]\n"; + } + + + // check_range for sc_int_base + + try { + sc_int<8> a = 42; + cout << a( 3, -1 ) << "\n"; + } + catch( sc_report ) { + cout << "caught exception for sc_int<8>( 3, -1 )\n"; + } + + try { + sc_int<8> a = 42; + cout << a( 8, 4 ) << "\n"; + } + catch( sc_report ) { + cout << "caught exception for sc_int<8>( 8, 4 )\n"; + } + + try { + sc_int<8> a = 42; + cout << a( 0, 3 ) << endl; + } + catch( sc_report ) { + cout << "caught exception for sc_int<8>( 0, 3 )\n"; + } + + + // check_length for sc_int_concref + + try { + sc_int<42> a; + cout << ( a, a ) << "\n"; + } + catch( sc_report ) { + cout << "caught exception for ( sc_int<42>, sc_int<42> )\n"; + } + + + // check_length for sc_uint_base + + try { + sc_uint<-3> a; + } + catch( sc_report ) { + cout << "caught exception for sc_uint<-3>\n"; + } + + try { + sc_uint<0> a; + } + catch( sc_report ) { + cout << "caught exception for sc_uint<0>\n"; + } + + try { + sc_uint<100> a; + } + catch( sc_report ) { + cout << "caught exception for sc_uint<100>\n"; + } + + + // check_index for sc_uint_base + + try { + sc_uint<8> a = 42; + cout << a[-1] << "\n"; + } + catch( sc_report ) { + cout << "caught exception for sc_uint<8>[-1]\n"; + } + + try { + sc_uint<8> a = 42; + cout << a[8] << "\n"; + } + catch( sc_report ) { + cout << "caught exception for sc_uint<8>[8]\n"; + } + + + // check_range for sc_uint_base + + try { + sc_uint<8> a = 42; + cout << a( 3, -1 ) << "\n"; + } + catch( sc_report ) { + cout << "caught exception for sc_uint<8>( 3, -1 )\n"; + } + + try { + sc_uint<8> a = 42; + cout << a( 8, 4 ) << "\n"; + } + catch( sc_report ) { + cout << "caught exception for sc_uint<8>( 8, 4 )\n"; + } + + try { + sc_uint<8> a = 42; + cout << a( 0, 3 ) << endl; + } + catch( sc_report ) { + cout << "caught exception for sc_uint<8>( 0, 3 )\n"; + } + + + // check_length for sc_uint_concref + + try { + sc_uint<42> a; + cout << ( a, a ) << "\n"; + } + catch( sc_report ) { + cout << "caught exception for ( sc_uint<42>, sc_uint<42> )\n"; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/compare/compare.cpp b/src/systemc/tests/systemc/datatypes/int/compare/compare.cpp new file mode 100644 index 000000000..73568faa1 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/compare/compare.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + compare.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + +int sc_main(int argc, char* argv[] ) +{ + sc_bigint<8> a, b; + sc_biguint<8> c; + + a = -5; + b = -1; + c = -1; + sc_assert(a <= b); + sc_assert(a <= c); + + a = -5; + b = 0; + c = 0; + sc_assert(a <= b); + sc_assert(a <= c); + + a = -5; + b = 5; + c = 5; + sc_assert(a <= b); + sc_assert(a <= c); + + a = 0; + b = 5; + c = 5; + sc_assert(a <= b); + sc_assert(a <= c); + + a = 5; + b = 10; + c = 10; + sc_assert(a <= b); + sc_assert(a <= c); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/compare/golden/compare.log b/src/systemc/tests/systemc/datatypes/int/compare/golden/compare.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/compare/golden/compare.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/concat/test01/golden/test01.log new file mode 100644 index 000000000..d2fa0584e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test01/golden/test01.log @@ -0,0 +1,63 @@ +SystemC Simulation +33 +*** sc_int_base +2 +1 +18 +--- +0 +3 +1 +--- +-8 +1 +33 +--- +-8 +2 +33 +*** sc_int_bitref +1 +0 +33 +--- +2 +34 +--- +1 +2 +33 +--- +-8 +40 +*** sc_int_subref +2 +1 +33 +--- +0 +3 +33 +--- +2 +1 +18 +--- +-8 +2 +34 +*** sc_int_concat +-6 +1 +17 +--- +-8 +1 +17 +--- +-6 +1 +17 +--- +-8 +24 diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/concat/test01/test01.cpp new file mode 100644 index 000000000..33229ddb3 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test01/test01.cpp @@ -0,0 +1,201 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_int's concat operators -- basic functionality, operator , () + +#include "systemc.h" + +void +test_concat( const sc_int<8>& a ) +{ + sc_int<8> b; + sc_int<4> c; + sc_int<4> d; + + cout << a << endl; + + cout << "*** sc_int_base" << endl; + + ( c, d ) = a; + cout << c << endl; + cout << d << endl; + + b = ( d, c ); + cout << b << endl; + + cout << "---" << endl; + + ( c, d[1] ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = ( c, d[1] ); + cout << b << endl; + + cout << "---" << endl; + + ( c, d.range( 1, 0 ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( c, d.range( 1, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + ( c, ( d[0], d[1] ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( c, ( d[0], d[1] ) ); + cout << b << endl; + + cout << "*** sc_int_bitref" << endl; + + ( d[1], c ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = ( d[1], c ); + cout << b << endl; + + cout << "---" << endl; + + ( d[0], d[1] ) = a.range( 1,0 ); + cout << d << endl; + + b.range( 1, 0 ) = ( d[1], d[0] ); + cout << b << endl; + + cout << "---" << endl; + + ( d[0], c.range( 3, 0 ) ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = ( d[0], c.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + ( d[0], ( d[1], d[2], d[3] ) ) = a.range( 3, 0 ); + cout << d << endl; + + b.range( 3, 0 ) = ( d[3], ( d[2], d[1], d[0] ) ); + cout << b << endl; + + cout << "*** sc_int_subref" << endl; + + ( c.range( 3, 0 ), d ) = a; + cout << c << endl; + cout << d << endl; + + b = ( c.range( 3, 0 ), d ); + cout << b << endl; + + cout << "---" << endl; + + ( c.range( 3, 0 ), d[1] ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = ( c.range( 3, 0 ), d[1] ); + cout << b << endl; + + cout << "---" << endl; + + ( c.range( 3, 0 ), d.range( 3, 0 ) ) = a; + cout << c << endl; + cout << d << endl; + + b = ( d.range( 3, 0 ), c.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + ( c.range( 3, 0 ), ( d[0], d[1] ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( c.range( 3, 0 ), ( d[1], d[0] ) ); + cout << b << endl; + + cout << "*** sc_int_concat" << endl; + + ( ( c[1], c[0] ), d ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( ( c[0], c[1] ), d ); + cout << b << endl; + + cout << "---" << endl; + + ( ( c[1], c[0] ), d[0] ) = a.range( 2, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 2, 0 ) = ( ( c[0], c[1] ), d[0] ); + cout << b << endl; + + cout << "---" << endl; + + ( ( c[1], c[0] ), d.range( 3, 0 ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( ( c[0], c[1] ), d.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + ( ( c[0], c[1] ), ( c[2], c[3] ) ) = a.range( 3, 0 ); + cout << c << endl; + + b.range( 3, 0 ) = ( ( c[3], c[2] ), ( c[1], c[0] ) ); + cout << b << endl; +} + +int +sc_main( int, char*[] ) +{ + sc_int<8> a( 33 ); + + test_concat( a ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/int/concat/test02/golden/test02.log new file mode 100644 index 000000000..a334a85d4 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test02/golden/test02.log @@ -0,0 +1,63 @@ +SystemC Simulation +33 +*** sc_uint_base +2 +1 +18 +--- +0 +3 +1 +--- +8 +1 +33 +--- +8 +2 +33 +*** sc_uint_bitref +1 +0 +33 +--- +2 +34 +--- +1 +2 +33 +--- +8 +40 +*** sc_uint_subref +2 +1 +33 +--- +0 +3 +33 +--- +2 +1 +18 +--- +8 +2 +34 +*** sc_uint_concat +10 +1 +17 +--- +8 +1 +17 +--- +10 +1 +17 +--- +8 +24 diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/int/concat/test02/test02.cpp new file mode 100644 index 000000000..fa60cb171 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test02/test02.cpp @@ -0,0 +1,201 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_uint's concat operators -- basic functionality, operator , () + +#include "systemc.h" + +void +test_concat( const sc_uint<8>& a ) +{ + sc_uint<8> b; + sc_uint<4> c; + sc_uint<4> d; + + cout << a << endl; + + cout << "*** sc_uint_base" << endl; + + ( c, d ) = a; + cout << c << endl; + cout << d << endl; + + b = ( d, c ); + cout << b << endl; + + cout << "---" << endl; + + ( c, d[1] ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = ( c, d[1] ); + cout << b << endl; + + cout << "---" << endl; + + ( c, d.range( 1, 0 ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( c, d.range( 1, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + ( c, ( d[0], d[1] ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( c, ( d[0], d[1] ) ); + cout << b << endl; + + cout << "*** sc_uint_bitref" << endl; + + ( d[1], c ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = ( d[1], c ); + cout << b << endl; + + cout << "---" << endl; + + ( d[0], d[1] ) = a.range( 1,0 ); + cout << d << endl; + + b.range( 1, 0 ) = ( d[1], d[0] ); + cout << b << endl; + + cout << "---" << endl; + + ( d[0], c.range( 3, 0 ) ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = ( d[0], c.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + ( d[0], ( d[1], d[2], d[3] ) ) = a.range( 3, 0 ); + cout << d << endl; + + b.range( 3, 0 ) = ( d[3], ( d[2], d[1], d[0] ) ); + cout << b << endl; + + cout << "*** sc_uint_subref" << endl; + + ( c.range( 3, 0 ), d ) = a; + cout << c << endl; + cout << d << endl; + + b = ( c.range( 3, 0 ), d ); + cout << b << endl; + + cout << "---" << endl; + + ( c.range( 3, 0 ), d[1] ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = ( c.range( 3, 0 ), d[1] ); + cout << b << endl; + + cout << "---" << endl; + + ( c.range( 3, 0 ), d.range( 3, 0 ) ) = a; + cout << c << endl; + cout << d << endl; + + b = ( d.range( 3, 0 ), c.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + ( c.range( 3, 0 ), ( d[0], d[1] ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( c.range( 3, 0 ), ( d[1], d[0] ) ); + cout << b << endl; + + cout << "*** sc_uint_concat" << endl; + + ( ( c[1], c[0] ), d ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( ( c[0], c[1] ), d ); + cout << b << endl; + + cout << "---" << endl; + + ( ( c[1], c[0] ), d[0] ) = a.range( 2, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 2, 0 ) = ( ( c[0], c[1] ), d[0] ); + cout << b << endl; + + cout << "---" << endl; + + ( ( c[1], c[0] ), d.range( 3, 0 ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = ( ( c[0], c[1] ), d.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + ( ( c[0], c[1] ), ( c[2], c[3] ) ) = a.range( 3, 0 ); + cout << c << endl; + + b.range( 3, 0 ) = ( ( c[3], c[2] ), ( c[1], c[0] ) ); + cout << b << endl; +} + +int +sc_main( int, char*[] ) +{ + sc_uint<8> a( 33 ); + + test_concat( a ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/int/concat/test03/golden/test03.log new file mode 100644 index 000000000..4ab7885d8 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test03/golden/test03.log @@ -0,0 +1,40 @@ +SystemC Simulation +6 +3 +7 +11 + +2 +1 +3 +3 + +2 +1 +3 +3 + +6 +3 +7 +11 + +6 +3 +7 +-5 + +-2 +1 +-1 +-1 + +-2 +1 +-1 +-1 + +6 +3 +7 +-5 diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/int/concat/test03/test03.cpp new file mode 100644 index 000000000..c1431f6f7 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test03/test03.cpp @@ -0,0 +1,190 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_[u]int concatenation with type bool, operator , () + +#include "systemc.h" + +#define WRITE(a) \ + cout << a << endl + +int +sc_main( int, char*[] ) +{ + bool b; + + // ))) sc_uint ((( + + sc_uint<3> ui3 = 3; + sc_uint<4> ui4; + sc_uint<2> ui2; + + // sc_uint_base + + b = false; + ui4 = ( ui3, b ); + WRITE( ui4 ); + ui4 = ( b, ui3 ); + WRITE( ui4 ); + + b = true; + ui4 = ( ui3, b ); + WRITE( ui4 ); + ui4 = ( b, ui3 ); + WRITE( ui4 ); + + // sc_uint_bitref + + cout << endl; + + b = false; + ui2 = ( ui3[0], b ); + WRITE( ui2 ); + ui2 = ( b, ui3[0] ); + WRITE( ui2 ); + + b = true; + ui2 = ( ui3[0], b ); + WRITE( ui2 ); + ui2 = ( b, ui3[0] ); + WRITE( ui2 ); + + // sc_uint_subref + + cout << endl; + + b = false; + ui2 = ( ui3.range( 0, 0 ), b ); + WRITE( ui2 ); + ui2 = ( b, ui3.range( 0, 0 ) ); + WRITE( ui2 ); + + b = true; + ui2 = ( ui3.range( 0, 0 ), b ); + WRITE( ui2 ); + ui2 = ( b, ui3.range( 0, 0 ) ); + WRITE( ui2 ); + + // sc_uint_concat + + cout << endl; + + b = false; + ui4 = ( ( ui3.range( 2, 1 ), ui3[0] ), b ); + WRITE( ui4 ); + ui4 = ( b, ( ui3.range( 2, 1 ), ui3[0] ) ); + WRITE( ui4 ); + + b = true; + ui4 = ( ( ui3.range( 2, 1 ), ui3[0] ), b ); + WRITE( ui4 ); + ui4 = ( b, ( ui3.range( 2, 1 ), ui3[0] ) ); + WRITE( ui4 ); + + + // ))) sc_int ((( + + sc_int<3> i3 = 3; + sc_int<4> i4; + sc_int<2> i2; + + // sc_int_base + + cout << endl; + + b = false; + i4 = ( i3, b ); + WRITE( i4 ); + i4 = ( b, i3 ); + WRITE( i4 ); + + b = true; + i4 = ( i3, b ); + WRITE( i4 ); + i4 = ( b, i3 ); + WRITE( i4 ); + + // sc_int_bitref + + cout << endl; + + b = false; + i2 = ( i3[0], b ); + WRITE( i2 ); + i2 = ( b, i3[0] ); + WRITE( i2 ); + + b = true; + i2 = ( i3[0], b ); + WRITE( i2 ); + i2 = ( b, i3[0] ); + WRITE( i2 ); + + // sc_int_subref + + cout << endl; + + b = false; + i2 = ( i3.range( 0, 0 ), b ); + WRITE( i2 ); + i2 = ( b, i3.range( 0, 0 ) ); + WRITE( i2 ); + + b = true; + i2 = ( i3.range( 0, 0 ), b ); + WRITE( i2 ); + i2 = ( b, i3.range( 0, 0 ) ); + WRITE( i2 ); + + // sc_int_concat + + cout << endl; + + b = false; + i4 = ( ( i3.range( 2, 1 ), i3[0] ), b ); + WRITE( i4 ); + i4 = ( b, ( i3.range( 2, 1 ), i3[0] ) ); + WRITE( i4 ); + + b = true; + i4 = ( ( i3.range( 2, 1 ), i3[0] ), b ); + WRITE( i4 ); + i4 = ( b, ( i3.range( 2, 1 ), i3[0] ) ); + WRITE( i4 ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test04/golden/test04.log b/src/systemc/tests/systemc/datatypes/int/concat/test04/golden/test04.log new file mode 100644 index 000000000..d2fa0584e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test04/golden/test04.log @@ -0,0 +1,63 @@ +SystemC Simulation +33 +*** sc_int_base +2 +1 +18 +--- +0 +3 +1 +--- +-8 +1 +33 +--- +-8 +2 +33 +*** sc_int_bitref +1 +0 +33 +--- +2 +34 +--- +1 +2 +33 +--- +-8 +40 +*** sc_int_subref +2 +1 +33 +--- +0 +3 +33 +--- +2 +1 +18 +--- +-8 +2 +34 +*** sc_int_concat +-6 +1 +17 +--- +-8 +1 +17 +--- +-6 +1 +17 +--- +-8 +24 diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test04/test04.cpp b/src/systemc/tests/systemc/datatypes/int/concat/test04/test04.cpp new file mode 100644 index 000000000..e08ecfa43 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test04/test04.cpp @@ -0,0 +1,201 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_int's concat operators -- basic functionality, concat() + +#include "systemc.h" + +void +test_concat( const sc_int<8>& a ) +{ + sc_int<8> b; + sc_int<4> c; + sc_int<4> d; + + cout << a << endl; + + cout << "*** sc_int_base" << endl; + + concat( c, d ) = a; + cout << c << endl; + cout << d << endl; + + b = concat( d, c ); + cout << b << endl; + + cout << "---" << endl; + + concat( c, d[1] ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = concat( c, d[1] ); + cout << b << endl; + + cout << "---" << endl; + + concat( c, d.range( 1, 0 ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( c, d.range( 1, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + concat( c, ( d[0], d[1] ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( c, ( d[0], d[1] ) ); + cout << b << endl; + + cout << "*** sc_int_bitref" << endl; + + concat( d[1], c ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = concat( d[1], c ); + cout << b << endl; + + cout << "---" << endl; + + concat( d[0], d[1] ) = a.range( 1,0 ); + cout << d << endl; + + b.range( 1, 0 ) = concat( d[1], d[0] ); + cout << b << endl; + + cout << "---" << endl; + + concat( d[0], c.range( 3, 0 ) ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = concat( d[0], c.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + concat( d[0], concat( concat( d[1], d[2] ), d[3] ) ) = a.range( 3, 0 ); + cout << d << endl; + + b.range( 3, 0 ) = concat( d[3], concat( concat( d[2], d[1] ), d[0] ) ); + cout << b << endl; + + cout << "*** sc_int_subref" << endl; + + concat( c.range( 3, 0 ), d ) = a; + cout << c << endl; + cout << d << endl; + + b = concat( c.range( 3, 0 ), d ); + cout << b << endl; + + cout << "---" << endl; + + concat( c.range( 3, 0 ), d[1] ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = concat( c.range( 3, 0 ), d[1] ); + cout << b << endl; + + cout << "---" << endl; + + concat( c.range( 3, 0 ), d.range( 3, 0 ) ) = a; + cout << c << endl; + cout << d << endl; + + b = concat( d.range( 3, 0 ), c.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + concat( c.range( 3, 0 ), concat( d[0], d[1] ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( c.range( 3, 0 ), concat( d[1], d[0] ) ); + cout << b << endl; + + cout << "*** sc_int_concat" << endl; + + concat( concat( c[1], c[0] ), d ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( concat( c[0], c[1] ), d ); + cout << b << endl; + + cout << "---" << endl; + + concat( concat( c[1], c[0] ), d[0] ) = a.range( 2, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 2, 0 ) = concat( concat( c[0], c[1] ), d[0] ); + cout << b << endl; + + cout << "---" << endl; + + concat( concat( c[1], c[0] ), d.range( 3, 0 ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( concat( c[0], c[1] ), d.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + concat( concat( c[0], c[1] ), concat( c[2], c[3] ) ) = a.range( 3, 0 ); + cout << c << endl; + + b.range( 3, 0 ) = concat( concat( c[3], c[2] ), concat( c[1], c[0] ) ); + cout << b << endl; +} + +int +sc_main( int, char*[] ) +{ + sc_int<8> a( 33 ); + + test_concat( a ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test05/golden/test05.log b/src/systemc/tests/systemc/datatypes/int/concat/test05/golden/test05.log new file mode 100644 index 000000000..a334a85d4 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test05/golden/test05.log @@ -0,0 +1,63 @@ +SystemC Simulation +33 +*** sc_uint_base +2 +1 +18 +--- +0 +3 +1 +--- +8 +1 +33 +--- +8 +2 +33 +*** sc_uint_bitref +1 +0 +33 +--- +2 +34 +--- +1 +2 +33 +--- +8 +40 +*** sc_uint_subref +2 +1 +33 +--- +0 +3 +33 +--- +2 +1 +18 +--- +8 +2 +34 +*** sc_uint_concat +10 +1 +17 +--- +8 +1 +17 +--- +10 +1 +17 +--- +8 +24 diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test05/test05.cpp b/src/systemc/tests/systemc/datatypes/int/concat/test05/test05.cpp new file mode 100644 index 000000000..8d1160f80 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test05/test05.cpp @@ -0,0 +1,201 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_uint's concat operators -- basic functionality, concat() + +#include "systemc.h" + +void +test_concat( const sc_uint<8>& a ) +{ + sc_uint<8> b; + sc_uint<4> c; + sc_uint<4> d; + + cout << a << endl; + + cout << "*** sc_uint_base" << endl; + + concat( c, d ) = a; + cout << c << endl; + cout << d << endl; + + b = concat( d, c ); + cout << b << endl; + + cout << "---" << endl; + + concat( c, d[1] ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = concat( c, d[1] ); + cout << b << endl; + + cout << "---" << endl; + + concat( c, d.range( 1, 0 ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( c, d.range( 1, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + concat( c, concat( d[0], d[1] ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( c, concat( d[0], d[1] ) ); + cout << b << endl; + + cout << "*** sc_uint_bitref" << endl; + + concat( d[1], c ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = concat( d[1], c ); + cout << b << endl; + + cout << "---" << endl; + + concat( d[0], d[1] ) = a.range( 1,0 ); + cout << d << endl; + + b.range( 1, 0 ) = concat( d[1], d[0] ); + cout << b << endl; + + cout << "---" << endl; + + concat( d[0], c.range( 3, 0 ) ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = concat( d[0], c.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + concat( d[0], concat( concat( d[1], d[2] ), d[3] ) ) = a.range( 3, 0 ); + cout << d << endl; + + b.range( 3, 0 ) = concat( d[3], concat( concat( d[2], d[1] ), d[0] ) ); + cout << b << endl; + + cout << "*** sc_uint_subref" << endl; + + concat( c.range( 3, 0 ), d ) = a; + cout << c << endl; + cout << d << endl; + + b = concat( c.range( 3, 0 ), d ); + cout << b << endl; + + cout << "---" << endl; + + concat( c.range( 3, 0 ), d[1] ) = a.range( 4, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 4, 0 ) = concat( c.range( 3, 0 ), d[1] ); + cout << b << endl; + + cout << "---" << endl; + + concat( c.range( 3, 0 ), d.range( 3, 0 ) ) = a; + cout << c << endl; + cout << d << endl; + + b = concat( d.range( 3, 0 ), c.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + concat( c.range( 3, 0 ), concat( d[0], d[1] ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( c.range( 3, 0 ), concat( d[1], d[0] ) ); + cout << b << endl; + + cout << "*** sc_uint_concat" << endl; + + concat( concat( c[1], c[0] ), d ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( concat( c[0], c[1] ), d ); + cout << b << endl; + + cout << "---" << endl; + + concat( concat( c[1], c[0] ), d[0] ) = a.range( 2, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 2, 0 ) = concat( concat( c[0], c[1] ), d[0] ); + cout << b << endl; + + cout << "---" << endl; + + concat( concat( c[1], c[0] ), d.range( 3, 0 ) ) = a.range( 5, 0 ); + cout << c << endl; + cout << d << endl; + + b.range( 5, 0 ) = concat( concat( c[0], c[1] ), d.range( 3, 0 ) ); + cout << b << endl; + + cout << "---" << endl; + + concat( concat( c[0], c[1] ), concat( c[2], c[3] ) ) = a.range( 3, 0 ); + cout << c << endl; + + b.range( 3, 0 ) = concat( concat( c[3], c[2] ), concat( c[1], c[0] ) ); + cout << b << endl; +} + +int +sc_main( int, char*[] ) +{ + sc_uint<8> a( 33 ); + + test_concat( a ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test06/golden/test06.log b/src/systemc/tests/systemc/datatypes/int/concat/test06/golden/test06.log new file mode 100644 index 000000000..4ab7885d8 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test06/golden/test06.log @@ -0,0 +1,40 @@ +SystemC Simulation +6 +3 +7 +11 + +2 +1 +3 +3 + +2 +1 +3 +3 + +6 +3 +7 +11 + +6 +3 +7 +-5 + +-2 +1 +-1 +-1 + +-2 +1 +-1 +-1 + +6 +3 +7 +-5 diff --git a/src/systemc/tests/systemc/datatypes/int/concat/test06/test06.cpp b/src/systemc/tests/systemc/datatypes/int/concat/test06/test06.cpp new file mode 100644 index 000000000..ab8f132b7 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/concat/test06/test06.cpp @@ -0,0 +1,190 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_[u]int concatenation with type bool, concat() + +#include "systemc.h" + +#define WRITE(a) \ + cout << a << endl + +int +sc_main( int, char*[] ) +{ + bool b; + + // ))) sc_uint ((( + + sc_uint<3> ui3 = 3; + sc_uint<4> ui4; + sc_uint<2> ui2; + + // sc_uint_base + + b = false; + ui4 = concat( ui3, b ); + WRITE( ui4 ); + ui4 = concat( b, ui3 ); + WRITE( ui4 ); + + b = true; + ui4 = concat( ui3, b ); + WRITE( ui4 ); + ui4 = concat( b, ui3 ); + WRITE( ui4 ); + + // sc_uint_bitref + + cout << endl; + + b = false; + ui2 = concat( ui3[0], b ); + WRITE( ui2 ); + ui2 = concat( b, ui3[0] ); + WRITE( ui2 ); + + b = true; + ui2 = concat( ui3[0], b ); + WRITE( ui2 ); + ui2 = concat( b, ui3[0] ); + WRITE( ui2 ); + + // sc_uint_subref + + cout << endl; + + b = false; + ui2 = concat( ui3.range( 0, 0 ), b ); + WRITE( ui2 ); + ui2 = concat( b, ui3.range( 0, 0 ) ); + WRITE( ui2 ); + + b = true; + ui2 = concat( ui3.range( 0, 0 ), b ); + WRITE( ui2 ); + ui2 = concat( b, ui3.range( 0, 0 ) ); + WRITE( ui2 ); + + // sc_uint_concat + + cout << endl; + + b = false; + ui4 = concat( concat( ui3.range( 2, 1 ), ui3[0] ), b ); + WRITE( ui4 ); + ui4 = concat( b, concat( ui3.range( 2, 1 ), ui3[0] ) ); + WRITE( ui4 ); + + b = true; + ui4 = concat( concat( ui3.range( 2, 1 ), ui3[0] ), b ); + WRITE( ui4 ); + ui4 = concat( b, concat( ui3.range( 2, 1 ), ui3[0] ) ); + WRITE( ui4 ); + + + // ))) sc_int ((( + + sc_int<3> i3 = 3; + sc_int<4> i4; + sc_int<2> i2; + + // sc_int_base + + cout << endl; + + b = false; + i4 = concat( i3, b ); + WRITE( i4 ); + i4 = concat( b, i3 ); + WRITE( i4 ); + + b = true; + i4 = concat( i3, b ); + WRITE( i4 ); + i4 = concat( b, i3 ); + WRITE( i4 ); + + // sc_int_bitref + + cout << endl; + + b = false; + i2 = concat( i3[0], b ); + WRITE( i2 ); + i2 = concat( b, i3[0] ); + WRITE( i2 ); + + b = true; + i2 = concat( i3[0], b ); + WRITE( i2 ); + i2 = concat( b, i3[0] ); + WRITE( i2 ); + + // sc_int_subref + + cout << endl; + + b = false; + i2 = concat( i3.range( 0, 0 ), b ); + WRITE( i2 ); + i2 = concat( b, i3.range( 0, 0 ) ); + WRITE( i2 ); + + b = true; + i2 = concat( i3.range( 0, 0 ), b ); + WRITE( i2 ); + i2 = concat( b, i3.range( 0, 0 ) ); + WRITE( i2 ); + + // sc_int_concat + + cout << endl; + + b = false; + i4 = concat( concat( i3.range( 2, 1 ), i3[0] ), b ); + WRITE( i4 ); + i4 = concat( b, concat( i3.range( 2, 1 ), i3[0] ) ); + WRITE( i4 ); + + b = true; + i4 = concat( concat( i3.range( 2, 1 ), i3[0] ), b ); + WRITE( i4 ); + i4 = concat( b, concat( i3.range( 2, 1 ), i3[0] ) ); + WRITE( i4 ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test01/golden/test01.log new file mode 100644 index 000000000..9a94cc73c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test01/golden/test01.log @@ -0,0 +1,61 @@ +SystemC Simulation +*** smaller *** +5 +10 +5 +10 + +5 +10 +5 +10 + +5 +10 +5 +10 + +5 +10 +5 +10 +*** equal *** +5 +-6 +5 +-6 + +5 +10 +5 +10 + +5 +-6 +5 +-6 + +5 +10 +5 +10 +*** larger *** +1 +-2 +1 +-2 + +1 +2 +1 +2 + +1 +-2 +1 +-2 + +1 +2 +1 +2 diff --git a/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test01/test01.cpp new file mode 100644 index 000000000..362632fc4 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test01/test01.cpp @@ -0,0 +1,224 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of assigning sc_bv_base to the integer types + +#include "systemc.h" + +void +test_smaller( const sc_bv<4>& bv_one, const sc_bv<4>& bv_two ) +{ + cout << "*** smaller ***" << endl; + { + sc_int<8> a( bv_one ); + sc_int<8> b( bv_two ); + sc_int<8> c; + sc_int<8> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_uint<8> a( bv_one ); + sc_uint<8> b( bv_two ); + sc_uint<8> c; + sc_uint<8> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_bigint<8> a( bv_one ); + sc_bigint<8> b( bv_two ); + sc_bigint<8> c; + sc_bigint<8> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_biguint<8> a( bv_one ); + sc_biguint<8> b( bv_two ); + sc_biguint<8> c; + sc_biguint<8> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } +} + +void +test_equal( const sc_bv<4>& bv_one, const sc_bv<4>& bv_two ) +{ + cout << "*** equal ***" << endl; + { + sc_int<4> a( bv_one ); + sc_int<4> b( bv_two ); + sc_int<4> c; + sc_int<4> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_uint<4> a( bv_one ); + sc_uint<4> b( bv_two ); + sc_uint<4> c; + sc_uint<4> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_bigint<4> a( bv_one ); + sc_bigint<4> b( bv_two ); + sc_bigint<4> c; + sc_bigint<4> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_biguint<4> a( bv_one ); + sc_biguint<4> b( bv_two ); + sc_biguint<4> c; + sc_biguint<4> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } +} + +void +test_larger( const sc_bv<4>& bv_one, const sc_bv<4>& bv_two ) +{ + cout << "*** larger ***" << endl; + { + sc_int<2> a( bv_one ); + sc_int<2> b( bv_two ); + sc_int<2> c; + sc_int<2> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_uint<2> a( bv_one ); + sc_uint<2> b( bv_two ); + sc_uint<2> c; + sc_uint<2> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_bigint<2> a( bv_one ); + sc_bigint<2> b( bv_two ); + sc_bigint<2> c; + sc_bigint<2> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_biguint<2> a( bv_one ); + sc_biguint<2> b( bv_two ); + sc_biguint<2> c; + sc_biguint<2> d; + c = bv_one; + d = bv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } +} + +int +sc_main( int, char*[] ) +{ + sc_bv<4> bv_one( "0101" ); + sc_bv<4> bv_two( "1010" ); + + test_smaller( bv_one, bv_two ); + test_equal( bv_one, bv_two ); + test_larger( bv_one, bv_two ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test02/golden/test02.log new file mode 100644 index 000000000..9a94cc73c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test02/golden/test02.log @@ -0,0 +1,61 @@ +SystemC Simulation +*** smaller *** +5 +10 +5 +10 + +5 +10 +5 +10 + +5 +10 +5 +10 + +5 +10 +5 +10 +*** equal *** +5 +-6 +5 +-6 + +5 +10 +5 +10 + +5 +-6 +5 +-6 + +5 +10 +5 +10 +*** larger *** +1 +-2 +1 +-2 + +1 +2 +1 +2 + +1 +-2 +1 +-2 + +1 +2 +1 +2 diff --git a/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test02/test02.cpp new file mode 100644 index 000000000..4b61e5793 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test02/test02.cpp @@ -0,0 +1,224 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of assigning sc_lv_base to the integer types + +#include "systemc.h" + +void +test_smaller( const sc_lv<4>& lv_one, const sc_lv<4>& lv_two ) +{ + cout << "*** smaller ***" << endl; + { + sc_int<8> a( lv_one ); + sc_int<8> b( lv_two ); + sc_int<8> c; + sc_int<8> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_uint<8> a( lv_one ); + sc_uint<8> b( lv_two ); + sc_uint<8> c; + sc_uint<8> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_bigint<8> a( lv_one ); + sc_bigint<8> b( lv_two ); + sc_bigint<8> c; + sc_bigint<8> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_biguint<8> a( lv_one ); + sc_biguint<8> b( lv_two ); + sc_biguint<8> c; + sc_biguint<8> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } +} + +void +test_equal( const sc_lv<4>& lv_one, const sc_lv<4>& lv_two ) +{ + cout << "*** equal ***" << endl; + { + sc_int<4> a( lv_one ); + sc_int<4> b( lv_two ); + sc_int<4> c; + sc_int<4> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_uint<4> a( lv_one ); + sc_uint<4> b( lv_two ); + sc_uint<4> c; + sc_uint<4> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_bigint<4> a( lv_one ); + sc_bigint<4> b( lv_two ); + sc_bigint<4> c; + sc_bigint<4> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_biguint<4> a( lv_one ); + sc_biguint<4> b( lv_two ); + sc_biguint<4> c; + sc_biguint<4> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } +} + +void +test_larger( const sc_lv<4>& lv_one, const sc_lv<4>& lv_two ) +{ + cout << "*** larger ***" << endl; + { + sc_int<2> a( lv_one ); + sc_int<2> b( lv_two ); + sc_int<2> c; + sc_int<2> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_uint<2> a( lv_one ); + sc_uint<2> b( lv_two ); + sc_uint<2> c; + sc_uint<2> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_bigint<2> a( lv_one ); + sc_bigint<2> b( lv_two ); + sc_bigint<2> c; + sc_bigint<2> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_biguint<2> a( lv_one ); + sc_biguint<2> b( lv_two ); + sc_biguint<2> c; + sc_biguint<2> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } +} + +int +sc_main( int, char*[] ) +{ + sc_lv<4> lv_one( "0101" ); + sc_lv<4> lv_two( "1010" ); + + test_smaller( lv_one, lv_two ); + test_equal( lv_one, lv_two ); + test_larger( lv_one, lv_two ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test03/golden/test03.log new file mode 100644 index 000000000..2ecf45e97 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test03/golden/test03.log @@ -0,0 +1,205 @@ +SystemC Simulation +*** smaller *** + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +7 +10 +7 +10 + + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +7 +10 +7 +10 + + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +7 +10 +7 +10 + + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +7 +10 +7 +10 +*** equal *** + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +7 +-6 +7 +-6 + + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +7 +10 +7 +10 + + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +7 +-6 +7 +-6 + + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +7 +10 +7 +10 +*** larger *** + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +-1 +-2 +-1 +-2 + + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +3 +2 +3 +2 + + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +-1 +-2 +-1 +-2 + + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +3 +2 +3 +2 diff --git a/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test03/test03.cpp new file mode 100644 index 000000000..d86284851 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/from_bv_lv/test03/test03.cpp @@ -0,0 +1,224 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of assigning sc_lv_base to the integer types + +#include "systemc.h" + +void +test_smaller( const sc_lv<4>& lv_one, const sc_lv<4>& lv_two ) +{ + cout << "*** smaller ***" << endl; + { + sc_int<8> a( lv_one ); + sc_int<8> b( lv_two ); + sc_int<8> c; + sc_int<8> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_uint<8> a( lv_one ); + sc_uint<8> b( lv_two ); + sc_uint<8> c; + sc_uint<8> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_bigint<8> a( lv_one ); + sc_bigint<8> b( lv_two ); + sc_bigint<8> c; + sc_bigint<8> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_biguint<8> a( lv_one ); + sc_biguint<8> b( lv_two ); + sc_biguint<8> c; + sc_biguint<8> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } +} + +void +test_equal( const sc_lv<4>& lv_one, const sc_lv<4>& lv_two ) +{ + cout << "*** equal ***" << endl; + { + sc_int<4> a( lv_one ); + sc_int<4> b( lv_two ); + sc_int<4> c; + sc_int<4> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_uint<4> a( lv_one ); + sc_uint<4> b( lv_two ); + sc_uint<4> c; + sc_uint<4> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_bigint<4> a( lv_one ); + sc_bigint<4> b( lv_two ); + sc_bigint<4> c; + sc_bigint<4> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_biguint<4> a( lv_one ); + sc_biguint<4> b( lv_two ); + sc_biguint<4> c; + sc_biguint<4> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } +} + +void +test_larger( const sc_lv<4>& lv_one, const sc_lv<4>& lv_two ) +{ + cout << "*** larger ***" << endl; + { + sc_int<2> a( lv_one ); + sc_int<2> b( lv_two ); + sc_int<2> c; + sc_int<2> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_uint<2> a( lv_one ); + sc_uint<2> b( lv_two ); + sc_uint<2> c; + sc_uint<2> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_bigint<2> a( lv_one ); + sc_bigint<2> b( lv_two ); + sc_bigint<2> c; + sc_bigint<2> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } + cout << endl; + { + sc_biguint<2> a( lv_one ); + sc_biguint<2> b( lv_two ); + sc_biguint<2> c; + sc_biguint<2> d; + c = lv_one; + d = lv_two; + cout << a << endl; + cout << b << endl; + cout << c << endl; + cout << d << endl; + } +} + +int +sc_main( int, char*[] ) +{ + sc_lv<4> lv_one( "01ZX" ); + sc_lv<4> lv_two( "1010" ); + + test_smaller( lv_one, lv_two ); + test_equal( lv_one, lv_two ); + test_larger( lv_one, lv_two ); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/misc/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/misc/test01/golden/test01.log new file mode 100644 index 000000000..8201117d0 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/misc/test01/golden/test01.log @@ -0,0 +1,45 @@ +SystemC Simulation + +*** sc_int *** +sc_int_concref = sc_signed +0 +1 +sc_int_concref = sc_unsigned +0 +-2 +sc_int_concref = sc_bv_base +0 +-1 +sc_int_concref = sc_lv_base +1 +0 +sc_int_subref = sc_signed +16 +sc_int_subref = sc_unsigned +32 +sc_int_subref = sc_bv_base +48 +sc_int_subref = sc_lv_base +64 + +*** sc_uint *** +sc_uint_concref = sc_signed +0 +1 +sc_uint_concref = sc_unsigned +0 +2 +sc_uint_concref = sc_bv_base +0 +3 +sc_uint_concref = sc_lv_base +1 +0 +sc_uint_subref = sc_signed +16 +sc_uint_subref = sc_unsigned +32 +sc_uint_subref = sc_bv_base +48 +sc_uint_subref = sc_lv_base +64 diff --git a/src/systemc/tests/systemc/datatypes/int/misc/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/misc/test01/test01.cpp new file mode 100644 index 000000000..dd9f75994 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/misc/test01/test01.cpp @@ -0,0 +1,140 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-24 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_[u]int_(conc|sub)ref assignment from sc_[un]signed and +// sc_(bv|lv)_base + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_bigint<4> a = 1; + sc_biguint<4> b = 2; + sc_bv<4> c = 3; + sc_lv<4> d = 4; + + { + cout << "\n*** sc_int ***" << endl; + + sc_int<2> e = 0; + sc_int<2> f = 0; + sc_int<8> g = 0; + + cout << "sc_int_concref = sc_signed" << endl; + (e, f) = a; + cout << e << endl; + cout << f << endl; + + cout << "sc_int_concref = sc_unsigned" << endl; + (e, f) = b; + cout << e << endl; + cout << f << endl; + + cout << "sc_int_concref = sc_bv_base" << endl; + (e, f) = c; + cout << e << endl; + cout << f << endl; + + cout << "sc_int_concref = sc_lv_base" << endl; + (e, f) = d; + cout << e << endl; + cout << f << endl; + + cout << "sc_int_subref = sc_signed" << endl; + g( 7, 4 ) = a; + cout << g << endl; + + cout << "sc_int_subref = sc_unsigned" << endl; + g( 7, 4 ) = b; + cout << g << endl; + + cout << "sc_int_subref = sc_bv_base" << endl; + g( 7, 4 ) = c; + cout << g << endl; + + cout << "sc_int_subref = sc_lv_base" << endl; + g( 7, 4 ) = d; + cout << g << endl; + } + + { + cout << "\n*** sc_uint ***" << endl; + + sc_uint<2> e = 0; + sc_uint<2> f = 0; + sc_uint<8> g = 0; + + cout << "sc_uint_concref = sc_signed" << endl; + (e, f) = a; + cout << e << endl; + cout << f << endl; + + cout << "sc_uint_concref = sc_unsigned" << endl; + (e, f) = b; + cout << e << endl; + cout << f << endl; + + cout << "sc_uint_concref = sc_bv_base" << endl; + (e, f) = c; + cout << e << endl; + cout << f << endl; + + cout << "sc_uint_concref = sc_lv_base" << endl; + (e, f) = d; + cout << e << endl; + cout << f << endl; + + cout << "sc_uint_subref = sc_signed" << endl; + g( 7, 4 ) = a; + cout << g << endl; + + cout << "sc_uint_subref = sc_unsigned" << endl; + g( 7, 4 ) = b; + cout << g << endl; + + cout << "sc_uint_subref = sc_bv_base" << endl; + g( 7, 4 ) = c; + cout << g << endl; + + cout << "sc_uint_subref = sc_lv_base" << endl; + g( 7, 4 ) = d; + cout << g << endl; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/misc/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/int/misc/test02/golden/test02.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/misc/test02/golden/test02.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/datatypes/int/misc/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/int/misc/test02/test02.cpp new file mode 100644 index 000000000..d27e98062 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/misc/test02/test02.cpp @@ -0,0 +1,128 @@ +#include "systemc.h" + + +inline void dump(sc_signed& value) +{ + sc_digit* ptr = value.get_raw(); + printf(" %08x_%08x_%08x_%08x\n", + (int)ptr[3], (int)ptr[2], (int)ptr[1], (int)ptr[0]); + cout << " " << value << endl; +} + +inline void dump(sc_unsigned& value) +{ + sc_digit* ptr = value.get_raw(); + printf(" %08x_%08x_%08x_%08x\n", + (int)ptr[3], (int)ptr[2], (int)ptr[1], (int)ptr[0]); + cout << " " << value << endl; +} + +#define PARSE( SUBJECT ) \ +{ \ + src_p = SUBJECT; \ + cout << endl << #SUBJECT << ":" << endl; \ + svalue = src_p; \ + dump(svalue); \ + cout << endl; \ + value = src_p; \ + dump(value); \ +} +#define TEST(SUBJECT,EXPECTED) \ +{ \ + value = SUBJECT; \ + if ( value.to_uint64() != EXPECTED ) \ + { \ + printf("%s(%d): %s: %llx != %llx\n", \ + __FILE__, __LINE__, SUBJECT, value.to_uint64(), (uint64)EXPECTED);\ + } \ +} + +#define TESTs64(SUBJECT,EXPECTED) \ +{ \ + svalue64 = SUBJECT; \ + if ( svalue64 != (long long)EXPECTED ) \ + { \ + printf("%s(%d): %s: %llx != %llx\n", \ + __FILE__, __LINE__, SUBJECT, value.to_uint64(), (uint64)EXPECTED);\ + }\ +} + +#define TESTu64(SUBJECT,EXPECTED) \ +{ \ + uvalue64 = SUBJECT; \ + if ( uvalue64 != EXPECTED ) \ + { \ + printf("%s(%d): %s: %llx != %llx\n", \ + __FILE__, __LINE__, SUBJECT, value.to_uint64(), (uint64)EXPECTED);\ + }\ +} + + +int sc_main(int, char**) +{ + char buffer[128]; + unsigned long long expected; + sc_bigint<120> svalue; + sc_int<64> svalue64; + sc_uint<64> uvalue64; + sc_biguint<120> value; + + + TESTs64("0xusffffffff", 0xffffffff); + TESTs64("0xusffffffff", 0xffffffff); + TESTs64("0xusfffffff", 0xfffffff); + TESTs64("0XUSfedcab876543210", 0xfedcab876543210ull); + TESTs64("0ous77777777", 077777777); + TESTs64("0ous77777777", 077777777); + TESTs64("0Ous7654321076543", 07654321076543ull); + TESTs64("55555555555555", 55555555555555ull); + TESTs64("0bus1100110011001100", 0xcccc); + TESTs64("0bus1111111011011100101110101001100001110110010101000011001000010000", + 0xfedcba9876543210ll); + + TESTu64("0xusffffffff", 0xffffffff); + TESTu64("0xusffffffff", 0xffffffff); + TESTu64("0xusfffffff", 0xfffffff); + TESTu64("0XUSfedcab876543210", 0xfedcab876543210ull); + TESTu64("0ous77777777", 077777777); + TESTu64("0ous77777777", 077777777); + TESTu64("0Ous7654321076543", 07654321076543ull); + TESTu64("55555555555555", 55555555555555ull); + TESTu64("0bus1100110011001100", 0xcccc); + TESTu64("0bus1111111011011100101110101001100001110110010101000011001000010000", + 0xfedcba9876543210ll); + for ( int i = 0; i < 60; i++ ) + { + for ( int j = 0; j < 16; j++ ) + { + expected = j; + expected = expected << i; + sprintf(buffer, "0Xus%llx", expected); + TEST(buffer, expected); + TESTs64(buffer, expected); + TESTu64(buffer, expected); + sprintf(buffer, "0ous%llo", expected); + TEST(buffer, expected); + TESTs64(buffer, expected); + TESTu64(buffer, expected); + sprintf(buffer, "%lld", expected); + TEST(buffer, expected); + TESTs64(buffer, expected); + TESTu64(buffer, expected); + } + } + TEST("0xusffffffff", 0xffffffff); + TEST("0xusffffffff", 0xffffffff); + TEST("0xusfffffff", 0xfffffff); + TEST("0XUSfedcab876543210", 0xfedcab876543210ull); + TEST("0ous77777777", 077777777); + TEST("0ous77777777", 077777777); + TEST("0Ous7654321076543", 07654321076543ull); + TEST("55555555555555", 55555555555555ull); + TEST("0bus1100110011001100", 0xcccc); + TEST("0bus1111111011011100101110101001100001110110010101000011001000010000", + 0xfedcba9876543210ll); + + cerr << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/misc/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/int/misc/test03/golden/test03.log new file mode 100644 index 000000000..3d586cecc --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/misc/test03/golden/test03.log @@ -0,0 +1,21 @@ +SystemC Simulation +BI(3,0).to_int() = 15 +BI(3,0).to_uint() = 15 +BI(3,0).to_int64() = 15 +BI(3,0).to_uint64() = 15 +BI(3,0).to_double() = 15 +I(3,0).to_int() = 15 +I(3,0).to_uint() = 15 +I(3,0).to_int64() = 15 +I(3,0).to_uint64() = 15 +I(3,0).to_double() = 15 +UI(3,0).to_int() = 15 +UI(3,0).to_uint() = 15 +UI(3,0).to_int64() = 15 +UI(3,0).to_uint64() = 15 +UI(3,0).to_double() = 15 +UBI(3,0).to_int() = 15 +UBI(3,0).to_uint() = 15 +UBI(3,0).to_int64() = 15 +UBI(3,0).to_uint64() = 15 +UBI(3,0).to_double() = 15 diff --git a/src/systemc/tests/systemc/datatypes/int/misc/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/int/misc/test03/test03.cpp new file mode 100644 index 000000000..13f4af2d9 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/misc/test03/test03.cpp @@ -0,0 +1,34 @@ +#include "systemc.h" + +#define TEST(EXP) cout << #EXP << " = " << EXP << endl; +int +sc_main( int argc, char* argv[] ) +{ + sc_bigint<8> BI = 0xff; + sc_int<8> I = BI; + sc_uint<8> UI = BI; + sc_biguint<8> UBI = BI; + +TEST(BI(3,0).to_int()) +TEST(BI(3,0).to_uint()) +TEST(BI(3,0).to_int64()) +TEST(BI(3,0).to_uint64()) +TEST(BI(3,0).to_double()) +TEST(I(3,0).to_int()) +TEST(I(3,0).to_uint()) +TEST(I(3,0).to_int64()) +TEST(I(3,0).to_uint64()) +TEST(I(3,0).to_double()) +TEST(UI(3,0).to_int()) +TEST(UI(3,0).to_uint()) +TEST(UI(3,0).to_int64()) +TEST(UI(3,0).to_uint64()) +TEST(UI(3,0).to_double()) +TEST(UBI(3,0).to_int()) +TEST(UBI(3,0).to_uint()) +TEST(UBI(3,0).to_int64()) +TEST(UBI(3,0).to_uint64()) +TEST(UBI(3,0).to_double()) + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test01/golden/test01.log new file mode 100644 index 000000000..fc31d05d2 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test01/golden/test01.log @@ -0,0 +1,325 @@ +SystemC Simulation + +bu01 = 101 : 0000000000000000000000000000000000000000000000000000000000000001 : 1 +bu02 = 101 : 0000000000000000000000000000000000000000000000000000000000000001 : 1 +bu03 = 101 : 0000000000000000000000000000000000000000000000000000000000000101 : 5 +bu04 = 101 : 0000000000000000000000000000000000000000000000000000000000000101 : 5 +bu05 = 101 : 0000000000000000000000000000000000000000000000000000000000000101 : 5 +bu06 = 101 : 0000000000000000000000000000000000000000000000000000000000100101 : 25 +bu07 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 +bu08 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 +bu09 = 101 : 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0000000000000000000000000000000000000000000000000000000000000000 : 0 +bu04 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000000000000 : 0 +bu05 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000000010000 : 10 +bu06 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000000010000 : 10 +bu07 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000000010000 : 10 +bu08 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000000010000 : 10 +bu09 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000100010000 : 110 +bu10 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000100010000 : 110 +bu11 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000100010000 : 110 +bu12 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000100010000 : 110 +bu13 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000000000100010000 : 110 +bu14 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000010000100010000 : 2110 +bu15 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000000010000100010000 : 2110 +bu16 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000001010000100010000 : a110 +bu17 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000001010000100010000 : a110 +bu18 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000000101010000100010000 : 2a110 +bu19 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000001101010000100010000 : 6a110 +bu20 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000001101010000100010000 : 6a110 +bu21 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000000001101010000100010000 : 6a110 +bu22 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000001001101010000100010000 : 26a110 +bu23 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000011001101010000100010000 : 66a110 +bu24 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000011001101010000100010000 : 66a110 +bu25 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000001011001101010000100010000 : 166a110 +bu26 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000001011001101010000100010000 : 166a110 +bu27 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000001011001101010000100010000 : 166a110 +bu28 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000001001011001101010000100010000 : 966a110 +bu29 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000011001011001101010000100010000 : 1966a110 +bu30 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000111001011001101010000100010000 : 3966a110 +bu31 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000111001011001101010000100010000 : 3966a110 +bu32 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000111001011001101010000100010000 : 3966a110 +bu33 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000111001011001101010000100010000 : 3966a110 +bu34 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000001000111001011001101010000100010000 : 23966a110 +bu35 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000011000111001011001101010000100010000 : 63966a110 +bu36 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000011000111001011001101010000100010000 : 63966a110 +bu37 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000011000111001011001101010000100010000 : 63966a110 +bu38 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000011000111001011001101010000100010000 : 63966a110 +bu39 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000100011000111001011001101010000100010000 : 463966a110 +bu40 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000100011000111001011001101010000100010000 : 463966a110 +bu41 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000100011000111001011001101010000100010000 : 463966a110 +bu42 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000100100011000111001011001101010000100010000 : 2463966a110 +bu43 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000001100100011000111001011001101010000100010000 : 6463966a110 +bu44 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000001100100011000111001011001101010000100010000 : 6463966a110 +bu45 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000001100100011000111001011001101010000100010000 : 6463966a110 +bu46 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000001001100100011000111001011001101010000100010000 : 26463966a110 +bu47 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000011001100100011000111001011001101010000100010000 : 66463966a110 +bu48 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000011001100100011000111001011001101010000100010000 : 66463966a110 +bu49 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000011001100100011000111001011001101010000100010000 : 66463966a110 +bu50 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000011001100100011000111001011001101010000100010000 : 66463966a110 +bu51 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000100011001100100011000111001011001101010000100010000 : 466463966a110 +bu52 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000100011001100100011000111001011001101010000100010000 : 466463966a110 +bu53 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000100011001100100011000111001011001101010000100010000 : 466463966a110 +bu54 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000100100011001100100011000111001011001101010000100010000 : 2466463966a110 +bu55 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000100100011001100100011000111001011001101010000100010000 : 2466463966a110 +bu56 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000010100100011001100100011000111001011001101010000100010000 : a466463966a110 +bu57 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000110100100011001100100011000111001011001101010000100010000 : 1a466463966a110 +bu58 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000001110100100011001100100011000111001011001101010000100010000 : 3a466463966a110 +bu59 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000001110100100011001100100011000111001011001101010000100010000 : 3a466463966a110 +bu60 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000101110100100011001100100011000111001011001101010000100010000 : ba466463966a110 +bu61 = 1111111011011100101110101001100001110110010101000011001000010000 : 0001101110100100011001100100011000111001011001101010000100010000 : 1ba466463966a110 +bu62 = 1111111011011100101110101001100001110110010101000011001000010000 : 0011101110100100011001100100011000111001011001101010000100010000 : 3ba466463966a110 +bu63 = 1111111011011100101110101001100001110110010101000011001000010000 : 0011101110100100011001100100011000111001011001101010000100010000 : 3ba466463966a110 +bu64 = 1111111011011100101110101001100001110110010101000011001000010000 : 0011101110100100011001100100011000111001011001101010000100010000 : 3ba466463966a110 +bu64 = 1111111011011100101110101001100001110110010101000011001000010000 : 0011101110100100011001100100011000111001011001101010000100010000 : 3ba466463966a110 +bu64 = 111111011011100101110101001100001110110010101000011001000010000 : 1011101110100100011001100100011000111001011001101010000100010000 : bba466463966a110 +bu64 = 11111011011100101110101001100001110110010101000011001000010000 : 0111101110100100011001100100011000111001011001101010000100010000 : 7ba466463966a110 +bu64 = 1111011011100101110101001100001110110010101000011001000010000 : 1101101110100100011001100100011000111001011001101010000100010000 : dba466463966a110 +bu64 = 111011011100101110101001100001110110010101000011001000010000 : 1100101110100100011001100100011000111001011001101010000100010000 : cba466463966a110 +bu64 = 11011011100101110101001100001110110010101000011001000010000 : 1110001110100100011001100100011000111001011001101010000100010000 : e3a466463966a110 +bu64 = 1011011100101110101001100001110110010101000011001000010000 : 1111111110100100011001100100011000111001011001101010000100010000 : ffa466463966a110 +bu64 = 011011100101110101001100001110110010101000011001000010000 : 1011010110100100011001100100011000111001011001101010000100010000 : b5a466463966a110 +bu64 = 11011100101110101001100001110110010101000011001000010000 : 1011010110100100011001100100011000111001011001101010000100010000 : b5a466463966a110 +bu64 = 1011100101110101001100001110110010101000011001000010000 : 1111111100100100011001100100011000111001011001101010000100010000 : ff2466463966a110 +bu64 = 011100101110101001100001110110010101000011001000010000 : 0110110011100100011001100100011000111001011001101010000100010000 : 6ce466463966a110 +bu64 = 11100101110101001100001110110010101000011001000010000 : 0110110011100100011001100100011000111001011001101010000100010000 : 6ce466463966a110 +bu64 = 1100101110101001100001110110010101000011001000010000 : 1001000111010100011001100100011000111001011001101010000100010000 : 91d466463966a110 +bu64 = 100101110101001100001110110010101000011001000010000 : 0111101111101100011001100100011000111001011001101010000100010000 : 7bec66463966a110 +bu64 = 00101110101001100001110110010101000011001000010000 : 1100011010001000011001100100011000111001011001101010000100010000 : c68866463966a110 +bu64 = 0101110101001100001110110010101000011001000010000 : 1100011010001000011001100100011000111001011001101010000100010000 : c68866463966a110 +bu64 = 101110101001100001110110010101000011001000010000 : 1100011010001000011001100100011000111001011001101010000100010000 : c68866463966a110 +bu64 = 01110101001100001110110010101000011001000010000 : 0110110100000001111001100100011000111001011001101010000100010000 : 6d01e6463966a110 +bu64 = 1110101001100001110110010101000011001000010000 : 0110110100000001111001100100011000111001011001101010000100010000 : 6d01e6463966a110 +bu64 = 110101001100001110110010101000011001000010000 : 0110000111011111010001100100011000111001011001101010000100010000 : 61df46463966a110 +bu64 = 10101001100001110110010101000011001000010000 : 0110000011000010001101100100011000111001011001101010000100010000 : 60c236463966a110 +bu64 = 0101001100001110110010101000011001000010000 : 1111101000111111010011100100011000111001011001101010000100010000 : fa3f4e463966a110 +bu64 = 101001100001110110010101000011001000010000 : 1111101000111111010011100100011000111001011001101010000100010000 : fa3f4e463966a110 +bu64 = 01001100001110110010101000011001000010000 : 1011011010101001100001000100011000111001011001101010000100010000 : b6a984463966a110 +bu64 = 1001100001110110010101000011001000010000 : 1011011010101001100001000100011000111001011001101010000100010000 : b6a984463966a110 +bu64 = 001100001110110010101000011001000010000 : 0101011101000100001011011100011000111001011001101010000100010000 : 57442dc63966a110 +bu64 = 01100001110110010101000011001000010000 : 0101011101000100001011011100011000111001011001101010000100010000 : 57442dc63966a110 +bu64 = 1100001110110010101000011001000010000 : 0101011101000100001011011100011000111001011001101010000100010000 : 57442dc63966a110 +bu64 = 100001110110010101000011001000010000 : 1010001111111000100011101011011000111001011001101010000100010000 : a3f88eb63966a110 +bu64 = 00001110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 +bu64 = 0001110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 +bu64 = 001110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 +bu64 = 01110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 +bu64 = 1110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 +bu64 = 110110010101000011001000010000 : 0011000111111100000100001110001111111001011001101010000100010000 : 31fc10e3f966a110 +bu64 = 10110010101000011001000010000 : 1100010010001001111110010001100101011001011001101010000100010000 : c489f9195966a110 +bu64 = 0110010101000011001000010000 : 1000011001100100111101101011100001001001011001101010000100010000 : 8664f6b84966a110 +bu64 = 110010101000011001000010000 : 1000011001100100111101101011100001001001011001101010000100010000 : 8664f6b84966a110 +bu64 = 10010101000011001000010000 : 1010100110011100111010011110010101100101011001101010000100010000 : a99ce9e56566a110 +bu64 = 0010101000011001000010000 : 1001001110001000111010001001110100011011011001101010000100010000 : 9388e89d1b66a110 +bu64 = 010101000011001000010000 : 1001001110001000111010001001110100011011011001101010000100010000 : 9388e89d1b66a110 +bu64 = 10101000011001000010000 : 1001001110001000111010001001110100011011011001101010000100010000 : 9388e89d1b66a110 +bu64 = 0101000011001000010000 : 0111100110101000000111101110001001101001001001101010000100010000 : 79a81ee26926a110 +bu64 = 101000011001000010000 : 0111100110101000000111101110001001101001001001101010000100010000 : 79a81ee26926a110 +bu64 = 01000011001000010000 : 0000110111100000110000001011010100000110000101101010000100010000 : de0c0b50616a110 +bu64 = 1000011001000010000 : 0000110111100000110000001011010100000110000101101010000100010000 : de0c0b50616a110 +bu64 = 000011001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 +bu64 = 00011001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 +bu64 = 0011001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 +bu64 = 011001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 +bu64 = 11001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 +bu64 = 1001000010000 : 0000000000000000000000001110100100010000010000000000000100010000 : e910400110 +bu64 = 001000010000 : 0000000000000000000000000000000000111011100110101111000100010000 : 3b9af110 +bu64 = 01000010000 : 0000000000000000000000000000000000111011100110101111000100010000 : 3b9af110 +bu64 = 1000010000 : 0000000000000000000000000000000000111011100110101111000100010000 : 3b9af110 +bu64 = 000010000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 +bu64 = 00010000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 +bu64 = 0010000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 +bu64 = 010000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 +bu64 = 10000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 +bu64 = 0000 : 0000000000000000000000000000000000000000000000000000000000000000 : 0 +bu64 = 000 : 0000000000000000000000000000000000000000000000000000000000000000 : 0 +bu64 = 00 : 0000000000000000000000000000000000000000000000000000000000000000 : 0 +bu64 = 0 : 0000000000000000000000000000000000000000000000000000000000000000 : 0 diff --git a/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test01/test01.cpp new file mode 100644 index 000000000..8f6e8186c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test01/test01.cpp @@ -0,0 +1,177 @@ +#include "systemc.h" + +#define TEST_VAR(var, v) \ + var = v; \ + sprintf(buffer, "%16llx", var.to_uint64()); \ + bv64 = var; \ + cout << #var << " = " << v << " : " << bv64 << " : " << buffer << endl; + +#define TEST(v) \ + cout << endl; \ + TEST_VAR( bu01, v ); \ + TEST_VAR( bu02, v ); \ + TEST_VAR( bu03, v ); \ + TEST_VAR( bu04, v ); \ + TEST_VAR( bu05, v ); \ + TEST_VAR( bu06, v ); \ + TEST_VAR( bu07, v ); \ + TEST_VAR( bu08, v ); \ + TEST_VAR( bu09, v ); \ + TEST_VAR( bu10, v ); \ + TEST_VAR( bu11, v ); \ + TEST_VAR( bu12, v ); \ + TEST_VAR( bu13, v ); \ + TEST_VAR( bu14, v ); \ + TEST_VAR( bu15, v ); \ + TEST_VAR( bu16, v ); \ + TEST_VAR( bu17, v ); \ + TEST_VAR( bu18, v ); \ + TEST_VAR( bu19, v ); \ + TEST_VAR( bu20, v ); \ + TEST_VAR( bu21, v ); \ + TEST_VAR( bu22, v ); \ + TEST_VAR( bu23, v ); \ + TEST_VAR( bu24, v ); \ + TEST_VAR( bu25, v ); \ + TEST_VAR( bu26, v ); \ + TEST_VAR( bu27, v ); \ + TEST_VAR( bu28, v ); \ + TEST_VAR( bu29, v ); \ + TEST_VAR( bu30, v ); \ + TEST_VAR( bu31, v ); \ + TEST_VAR( bu32, v ); \ + TEST_VAR( bu33, v ); \ + TEST_VAR( bu34, v ); \ + TEST_VAR( bu35, v ); \ + TEST_VAR( bu36, v ); \ + TEST_VAR( bu37, v ); \ + TEST_VAR( bu38, v ); \ + TEST_VAR( bu39, v ); \ + TEST_VAR( bu40, v ); \ + TEST_VAR( bu41, v ); \ + TEST_VAR( bu42, v ); \ + TEST_VAR( bu43, v ); \ + TEST_VAR( bu44, v ); \ + TEST_VAR( bu45, v ); \ + TEST_VAR( bu46, v ); \ + TEST_VAR( bu47, v ); \ + TEST_VAR( bu48, v ); \ + TEST_VAR( bu49, v ); \ + TEST_VAR( bu50, v ); \ + TEST_VAR( bu51, v ); \ + TEST_VAR( bu52, v ); \ + TEST_VAR( bu53, v ); \ + TEST_VAR( bu54, v ); \ + TEST_VAR( bu55, v ); \ + TEST_VAR( bu56, v ); \ + TEST_VAR( bu57, v ); \ + TEST_VAR( bu58, v ); \ + TEST_VAR( bu59, v ); \ + TEST_VAR( bu60, v ); \ + TEST_VAR( bu61, v ); \ + TEST_VAR( bu62, v ); \ + TEST_VAR( bu63, v ); \ + TEST_VAR( bu64, v ); + +int sc_main(int argc, char* argv[]) +{ + char buffer[256]; + sc_biguint<1> bu01; + sc_biguint<2> bu02; + sc_biguint<3> bu03; + sc_biguint<4> bu04; + sc_biguint<5> bu05; + sc_biguint<6> bu06; + sc_biguint<7> bu07; + sc_biguint<8> bu08; + sc_biguint<9> bu09; + sc_biguint<10> bu10; + sc_biguint<11> bu11; + sc_biguint<12> bu12; + sc_biguint<13> bu13; + sc_biguint<14> bu14; + sc_biguint<15> bu15; + sc_biguint<16> bu16; + sc_biguint<17> bu17; + sc_biguint<18> bu18; + sc_biguint<19> bu19; + sc_biguint<20> bu20; + sc_biguint<21> bu21; + sc_biguint<22> bu22; + sc_biguint<23> bu23; + sc_biguint<24> bu24; + sc_biguint<25> bu25; + sc_biguint<26> bu26; + sc_biguint<27> bu27; + sc_biguint<28> bu28; + sc_biguint<29> bu29; + sc_biguint<30> bu30; + sc_biguint<31> bu31; + sc_biguint<32> bu32; + sc_biguint<33> bu33; + sc_biguint<34> bu34; + sc_biguint<35> bu35; + sc_biguint<36> bu36; + sc_biguint<37> bu37; + sc_biguint<38> bu38; + sc_biguint<39> bu39; + sc_biguint<40> bu40; + sc_biguint<41> bu41; + sc_biguint<42> bu42; + sc_biguint<43> bu43; + sc_biguint<44> bu44; + sc_biguint<45> bu45; + sc_biguint<46> bu46; + sc_biguint<47> bu47; + sc_biguint<48> bu48; + sc_biguint<49> bu49; + sc_biguint<50> bu50; + sc_biguint<51> bu51; + sc_biguint<52> bu52; + sc_biguint<53> bu53; + sc_biguint<54> bu54; + sc_biguint<55> bu55; + sc_biguint<56> bu56; + sc_biguint<57> bu57; + sc_biguint<58> bu58; + sc_biguint<59> bu59; + sc_biguint<60> bu60; + sc_biguint<61> bu61; + sc_biguint<62> bu62; + sc_biguint<63> bu63; + sc_biguint<64> bu64; + + sc_bv<64> bv64; + + int i; + + char values[] = "1111" + "1110" + "1101" + "1100" + "1011" + "1010" + "1001" + "1000" + "0111" + "0110" + "0101" + "0100" + "0011" + "0010" + "0001" + "0000"; + TEST("101"); + + TEST( "11111110110111001011101010011000" ); + TEST( "1111111111111111111111111111111111111111111111111111111111111111" ); + + TEST( values ); + + for ( i = 0; i < (int)strlen(values); i++ ) + { + TEST_VAR( bu64, &values[i]); + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test02/golden/test02.log new file mode 100644 index 000000000..3d6d01c1d --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test02/golden/test02.log @@ -0,0 +1,325 @@ +SystemC Simulation + +bi01 = 101 : 1111111111111111111111111111111111111111111111111111111111111111 : ffffffffffffffff : -1 +bi02 = 101 : 0000000000000000000000000000000000000000000000000000000000000001 : 1 : 1 +bi03 = 101 : 1111111111111111111111111111111111111111111111111111111111111101 : fffffffffffffffd : -3 +bi04 = 101 : 0000000000000000000000000000000000000000000000000000000000000101 : 5 : 5 +bi05 = 101 : 0000000000000000000000000000000000000000000000000000000000000101 : 5 : 5 +bi06 = 101 : 1111111111111111111111111111111111111111111111111111111111100101 : ffffffffffffffe5 : -27 +bi07 = 101 : 1111111111111111111111111111111111111111111111111111111111100101 : ffffffffffffffe5 : -27 +bi08 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi09 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi10 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi11 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi12 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi13 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi14 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi15 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi16 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi17 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi18 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi19 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi20 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi21 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi22 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi23 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi24 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi25 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi26 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi27 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi28 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi29 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi30 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi31 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi32 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi33 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi34 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi35 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi36 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi37 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi38 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi39 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi40 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi41 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi42 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi43 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi44 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi45 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi46 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi47 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi48 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi49 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi50 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi51 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi52 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi53 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi54 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi55 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi56 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi57 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi58 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi59 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi60 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi61 = 101 : 0000000000000000000000000000000000000000000000000000000001100101 : 65 : 101 +bi62 = 101 : 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1111111111111111111111111111111111111111111001101010000100010000 : ffffffffffe6a110 : -1662704 +bi24 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000000011001101010000100010000 : 66a110 : 6725904 +bi25 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111111111111111111111111011001101010000100010000 : ffffffffff66a110 : -10051312 +bi26 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000001011001101010000100010000 : 166a110 : 23503120 +bi27 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000000001011001101010000100010000 : 166a110 : 23503120 +bi28 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111111111111111111111001011001101010000100010000 : fffffffff966a110 : -110714608 +bi29 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111111111111111111111001011001101010000100010000 : fffffffff966a110 : -110714608 +bi30 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111111111111111111111001011001101010000100010000 : fffffffff966a110 : -110714608 +bi31 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000111001011001101010000100010000 : 3966a110 : 963027216 +bi32 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000111001011001101010000100010000 : 3966a110 : 963027216 +bi33 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000000000111001011001101010000100010000 : 3966a110 : 963027216 +bi34 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111111111111111000111001011001101010000100010000 : fffffffe3966a110 : -7626907376 +bi35 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111111111111111000111001011001101010000100010000 : fffffffe3966a110 : -7626907376 +bi36 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000011000111001011001101010000100010000 : 63966a110 : 26732830992 +bi37 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000011000111001011001101010000100010000 : 63966a110 : 26732830992 +bi38 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000000011000111001011001101010000100010000 : 63966a110 : 26732830992 +bi39 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111111111100011000111001011001101010000100010000 : ffffffc63966a110 : -248145075952 +bi40 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000100011000111001011001101010000100010000 : 463966a110 : 301610737936 +bi41 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000000000100011000111001011001101010000100010000 : 463966a110 : 301610737936 +bi42 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111111100100011000111001011001101010000100010000 : fffffe463966a110 : -1897412517616 +bi43 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111111100100011000111001011001101010000100010000 : fffffe463966a110 : -1897412517616 +bi44 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000001100100011000111001011001101010000100010000 : 6463966a110 : 6898680504592 +bi45 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000000001100100011000111001011001101010000100010000 : 6463966a110 : 6898680504592 +bi46 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111001100100011000111001011001101010000100010000 : ffffe6463966a110 : -28285691584240 +bi47 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111111111001100100011000111001011001101010000100010000 : ffffe6463966a110 : -28285691584240 +bi48 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000011001100100011000111001011001101010000100010000 : 66463966a110 : 112451796771088 +bi49 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000011001100100011000111001011001101010000100010000 : 66463966a110 : 112451796771088 +bi50 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000000011001100100011000111001011001101010000100010000 : 66463966a110 : 112451796771088 +bi51 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111111100011001100100011000111001011001101010000100010000 : fffc66463966a110 : -1013448110071536 +bi52 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000100011001100100011000111001011001101010000100010000 : 466463966a110 : 1238351703613712 +bi53 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000000100011001100100011000111001011001101010000100010000 : 466463966a110 : 1238351703613712 +bi54 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111111100100011001100100011000111001011001101010000100010000 : ffe466463966a110 : -7768847551127280 +bi55 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000000000100100011001100100011000111001011001101010000100010000 : 2466463966a110 : 10245550958354704 +bi56 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111110100100011001100100011000111001011001101010000100010000 : ffa466463966a110 : -25783246060609264 +bi57 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111110100100011001100100011000111001011001101010000100010000 : ffa466463966a110 : -25783246060609264 +bi58 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111111110100100011001100100011000111001011001101010000100010000 : ffa466463966a110 : -25783246060609264 +bi59 = 1111111011011100101110101001100001110110010101000011001000010000 : 0000001110100100011001100100011000111001011001101010000100010000 : 3a466463966a110 : 262447130091102480 +bi60 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111101110100100011001100100011000111001011001101010000100010000 : fba466463966a110 : -314013622212321008 +bi61 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111101110100100011001100100011000111001011001101010000100010000 : fba466463966a110 : -314013622212321008 +bi62 = 1111111011011100101110101001100001110110010101000011001000010000 : 1111101110100100011001100100011000111001011001101010000100010000 : fba466463966a110 : -314013622212321008 +bi63 = 1111111011011100101110101001100001110110010101000011001000010000 : 0011101110100100011001100100011000111001011001101010000100010000 : 3ba466463966a110 : 4297672396215066896 +bi64 = 1111111011011100101110101001100001110110010101000011001000010000 : 0011101110100100011001100100011000111001011001101010000100010000 : 3ba466463966a110 : 4297672396215066896 +bi64 = 1111111011011100101110101001100001110110010101000011001000010000 : 0011101110100100011001100100011000111001011001101010000100010000 : 3ba466463966a110 : 4297672396215066896 +bi64 = 111111011011100101110101001100001110110010101000011001000010000 : 1011101110100100011001100100011000111001011001101010000100010000 : bba466463966a110 : -4925699640639708912 +bi64 = 11111011011100101110101001100001110110010101000011001000010000 : 0111101110100100011001100100011000111001011001101010000100010000 : 7ba466463966a110 : 8909358414642454800 +bi64 = 1111011011100101110101001100001110110010101000011001000010000 : 1101101110100100011001100100011000111001011001101010000100010000 : dba466463966a110 : -2619856631426014960 +bi64 = 111011011100101110101001100001110110010101000011001000010000 : 1100101110100100011001100100011000111001011001101010000100010000 : cba466463966a110 : -3772778136032861936 +bi64 = 11011011100101110101001100001110110010101000011001000010000 : 1110001110100100011001100100011000111001011001101010000100010000 : e3a466463966a110 : -2043395879122591472 +bi64 = 1011011100101110101001100001110110010101000011001000010000 : 1111111110100100011001100100011000111001011001101010000100010000 : ffa466463966a110 : -25783246060609264 +bi64 = 011011100101110101001100001110110010101000011001000010000 : 1011010110100100011001100100011000111001011001101010000100010000 : b5a466463966a110 : -5358045204867276528 +bi64 = 11011100101110101001100001110110010101000011001000010000 : 1011010110100100011001100100011000111001011001101010000100010000 : b5a466463966a110 : -5358045204867276528 +bi64 = 1011100101110101001100001110110010101000011001000010000 : 1111111100100100011001100100011000111001011001101010000100010000 : ff2466463966a110 : -61812043079573232 +bi64 = 011100101110101001100001110110010101000011001000010000 : 0110110011100100011001100100011000111001011001101010000100010000 : 6ce466463966a110 : 7846508902583017744 +bi64 = 11100101110101001100001110110010101000011001000010000 : 0110110011100100011001100100011000111001011001101010000100010000 : 6ce466463966a110 : 7846508902583017744 +bi64 = 1100101110101001100001110110010101000011001000010000 : 1001000111010100011001100100011000111001011001101010000100010000 : 91d466463966a110 : -7938607791350570736 +bi64 = 100101110101001100001110110010101000011001000010000 : 0111101111101100011001100100011000111001011001101010000100010000 : 7bec66463966a110 : 8929624612965622032 +bi64 = 00101110101001100001110110010101000011001000010000 : 1100011010001000011001100100011000111001011001101010000100010000 : c68866463966a110 : -4140947405570399984 +bi64 = 0101110101001100001110110010101000011001000010000 : 1100011010001000011001100100011000111001011001101010000100010000 : c68866463966a110 : -4140947405570399984 +bi64 = 101110101001100001110110010101000011001000010000 : 1100011010001000011001100100011000111001011001101010000100010000 : c68866463966a110 : -4140947405570399984 +bi64 = 01110101001100001110110010101000011001000010000 : 0110110100000001111001100100011000111001011001101010000100010000 : 6d01e6463966a110 : 7854812414395982096 +bi64 = 1110101001100001110110010101000011001000010000 : 0110110100000001111001100100011000111001011001101010000100010000 : 6d01e6463966a110 : 7854812414395982096 +bi64 = 110101001100001110110010101000011001000010000 : 0110000111011111010001100100011000111001011001101010000100010000 : 61df46463966a110 : 7052432808910168336 +bi64 = 10101001100001110110010101000011001000010000 : 0110000011000010001101100100011000111001011001101010000100010000 : 60c236463966a110 : 6972194848361586960 +bi64 = 0101001100001110110010101000011001000010000 : 1111101000111111010011100100011000111001011001101010000100010000 : fa3f4e463966a110 : -414526577177091824 +bi64 = 101001100001110110010101000011001000010000 : 1111101000111111010011100100011000111001011001101010000100010000 : fa3f4e463966a110 : -414526577177091824 +bi64 = 01001100001110110010101000011001000010000 : 1011011010101001100001000100011000111001011001101010000100010000 : b6a984463966a110 : -5284547250596962032 +bi64 = 1001100001110110010101000011001000010000 : 1011011010101001100001000100011000111001011001101010000100010000 : b6a984463966a110 : -5284547250596962032 +bi64 = 001100001110110010101000011001000010000 : 0101011101000100001011011100011000111001011001101010000100010000 : 57442dc63966a110 : 6288201309105856784 +bi64 = 01100001110110010101000011001000010000 : 0101011101000100001011011100011000111001011001101010000100010000 : 57442dc63966a110 : 6288201309105856784 +bi64 = 1100001110110010101000011001000010000 : 0101011101000100001011011100011000111001011001101010000100010000 : 57442dc63966a110 : 6288201309105856784 +bi64 = 100001110110010101000011001000010000 : 1010001111111000100011101011011000111001011001101010000100010000 : a3f88eb63966a110 : -6631393538004836080 +bi64 = 00001110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 : 8678716643622691088 +bi64 = 0001110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 : 8678716643622691088 +bi64 = 001110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 : 8678716643622691088 +bi64 = 01110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 : 8678716643622691088 +bi64 = 1110110010101000011001000010000 : 0111100001110000111111101100111000111001011001101010000100010000 : 7870fece3966a110 : 8678716643622691088 +bi64 = 110110010101000011001000010000 : 0011000111111100000100001110001111111001011001101010000100010000 : 31fc10e3f966a110 : 3601772373317427472 +bi64 = 10110010101000011001000010000 : 1100010010001001111110010001100101011001011001101010000100010000 : c489f9195966a110 : -4284619683196919536 +bi64 = 0110010101000011001000010000 : 1000011001100100111101101011100001001001011001101010000100010000 : 8664f6b84966a110 : -8762607703590264560 +bi64 = 110010101000011001000010000 : 1000011001100100111101101011100001001001011001101010000100010000 : 8664f6b84966a110 : -8762607703590264560 +bi64 = 10010101000011001000010000 : 1010100110011100111010011110010101100101011001101010000100010000 : a99ce9e56566a110 : -6224843413474860784 +bi64 = 0010101000011001000010000 : 1001001110001000111010001001110100011011011001101010000100010000 : 9388e89d1b66a110 : -7815741391834275568 +bi64 = 010101000011001000010000 : 1001001110001000111010001001110100011011011001101010000100010000 : 9388e89d1b66a110 : -7815741391834275568 +bi64 = 10101000011001000010000 : 1001001110001000111010001001110100011011011001101010000100010000 : 9388e89d1b66a110 : -7815741391834275568 +bi64 = 0101000011001000010000 : 0111100110101000000111101110001001101001001001101010000100010000 : 79a81ee26926a110 : 8766290632452251920 +bi64 = 101000011001000010000 : 0111100110101000000111101110001001101001001001101010000100010000 : 79a81ee26926a110 : 8766290632452251920 +bi64 = 01000011001000010000 : 0000110111100000110000001011010100000110000101101010000100010000 : de0c0b50616a110 : 1000011001000010000 +bi64 = 1000011001000010000 : 0000110111100000110000001011010100000110000101101010000100010000 : de0c0b50616a110 : 1000011001000010000 +bi64 = 000011001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 : 11001000010000 +bi64 = 00011001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 : 11001000010000 +bi64 = 0011001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 : 11001000010000 +bi64 = 011001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 : 11001000010000 +bi64 = 11001000010000 : 0000000000000000000010100000000101011110101100101010000100010000 : a015eb2a110 : 11001000010000 +bi64 = 1001000010000 : 0000000000000000000000001110100100010000010000000000000100010000 : e910400110 : 1001000010000 +bi64 = 001000010000 : 0000000000000000000000000000000000111011100110101111000100010000 : 3b9af110 : 1000010000 +bi64 = 01000010000 : 0000000000000000000000000000000000111011100110101111000100010000 : 3b9af110 : 1000010000 +bi64 = 1000010000 : 0000000000000000000000000000000000111011100110101111000100010000 : 3b9af110 : 1000010000 +bi64 = 000010000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 : 10000 +bi64 = 00010000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 : 10000 +bi64 = 0010000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 : 10000 +bi64 = 010000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 : 10000 +bi64 = 10000 : 0000000000000000000000000000000000000000000000000010011100010000 : 2710 : 10000 +bi64 = 0000 : 0000000000000000000000000000000000000000000000000000000000000000 : 0 : 0 +bi64 = 000 : 0000000000000000000000000000000000000000000000000000000000000000 : 0 : 0 +bi64 = 00 : 0000000000000000000000000000000000000000000000000000000000000000 : 0 : 0 +bi64 = 0 : 0000000000000000000000000000000000000000000000000000000000000000 : 0 : 0 diff --git a/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test02/test02.cpp new file mode 100644 index 000000000..1cbd304f1 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/parse_binary_bits/test02/test02.cpp @@ -0,0 +1,177 @@ +#include "systemc.h" + +#define TEST_VAR(var, v) \ + var = v; \ + sprintf(buffer, "%16llx", var.to_int64()); \ + bv64 = var; \ + cout << #var << " = " << v << " : " << bv64 << " : " << buffer << " : " << var << endl; + +#define TEST(v) \ + cout << endl; \ + TEST_VAR( bi01, v ); \ + TEST_VAR( bi02, v ); \ + TEST_VAR( bi03, v ); \ + TEST_VAR( bi04, v ); \ + TEST_VAR( bi05, v ); \ + TEST_VAR( bi06, v ); \ + TEST_VAR( bi07, v ); \ + TEST_VAR( bi08, v ); \ + TEST_VAR( bi09, v ); \ + TEST_VAR( bi10, v ); \ + TEST_VAR( bi11, v ); \ + TEST_VAR( bi12, v ); \ + TEST_VAR( bi13, v ); \ + TEST_VAR( bi14, v ); \ + TEST_VAR( bi15, v ); \ + TEST_VAR( bi16, v ); \ + TEST_VAR( bi17, v ); \ + TEST_VAR( bi18, v ); \ + TEST_VAR( bi19, v ); \ + TEST_VAR( bi20, v ); \ + TEST_VAR( bi21, v ); \ + TEST_VAR( bi22, v ); \ + TEST_VAR( bi23, v ); \ + TEST_VAR( bi24, v ); \ + TEST_VAR( bi25, v ); \ + TEST_VAR( bi26, v ); \ + TEST_VAR( bi27, v ); \ + TEST_VAR( bi28, v ); \ + TEST_VAR( bi29, v ); \ + TEST_VAR( bi30, v ); \ + TEST_VAR( bi31, v ); \ + TEST_VAR( bi32, v ); \ + TEST_VAR( bi33, v ); \ + TEST_VAR( bi34, v ); \ + TEST_VAR( bi35, v ); \ + TEST_VAR( bi36, v ); \ + TEST_VAR( bi37, v ); \ + TEST_VAR( bi38, v ); \ + TEST_VAR( bi39, v ); \ + TEST_VAR( bi40, v ); \ + TEST_VAR( bi41, v ); \ + TEST_VAR( bi42, v ); \ + TEST_VAR( bi43, v ); \ + TEST_VAR( bi44, v ); \ + TEST_VAR( bi45, v ); \ + TEST_VAR( bi46, v ); \ + TEST_VAR( bi47, v ); \ + TEST_VAR( bi48, v ); \ + TEST_VAR( bi49, v ); \ + TEST_VAR( bi50, v ); \ + TEST_VAR( bi51, v ); \ + TEST_VAR( bi52, v ); \ + TEST_VAR( bi53, v ); \ + TEST_VAR( bi54, v ); \ + TEST_VAR( bi55, v ); \ + TEST_VAR( bi56, v ); \ + TEST_VAR( bi57, v ); \ + TEST_VAR( bi58, v ); \ + TEST_VAR( bi59, v ); \ + TEST_VAR( bi60, v ); \ + TEST_VAR( bi61, v ); \ + TEST_VAR( bi62, v ); \ + TEST_VAR( bi63, v ); \ + TEST_VAR( bi64, v ); + +int sc_main(int argc, char* argv[]) +{ + char buffer[256]; + sc_bigint<1> bi01; + sc_bigint<2> bi02; + sc_bigint<3> bi03; + sc_bigint<4> bi04; + sc_bigint<5> bi05; + sc_bigint<6> bi06; + sc_bigint<7> bi07; + sc_bigint<8> bi08; + sc_bigint<9> bi09; + sc_bigint<10> bi10; + sc_bigint<11> bi11; + sc_bigint<12> bi12; + sc_bigint<13> bi13; + sc_bigint<14> bi14; + sc_bigint<15> bi15; + sc_bigint<16> bi16; + sc_bigint<17> bi17; + sc_bigint<18> bi18; + sc_bigint<19> bi19; + sc_bigint<20> bi20; + sc_bigint<21> bi21; + sc_bigint<22> bi22; + sc_bigint<23> bi23; + sc_bigint<24> bi24; + sc_bigint<25> bi25; + sc_bigint<26> bi26; + sc_bigint<27> bi27; + sc_bigint<28> bi28; + sc_bigint<29> bi29; + sc_bigint<30> bi30; + sc_bigint<31> bi31; + sc_bigint<32> bi32; + sc_bigint<33> bi33; + sc_bigint<34> bi34; + sc_bigint<35> bi35; + sc_bigint<36> bi36; + sc_bigint<37> bi37; + sc_bigint<38> bi38; + sc_bigint<39> bi39; + sc_bigint<40> bi40; + sc_bigint<41> bi41; + sc_bigint<42> bi42; + sc_bigint<43> bi43; + sc_bigint<44> bi44; + sc_bigint<45> bi45; + sc_bigint<46> bi46; + sc_bigint<47> bi47; + sc_bigint<48> bi48; + sc_bigint<49> bi49; + sc_bigint<50> bi50; + sc_bigint<51> bi51; + sc_bigint<52> bi52; + sc_bigint<53> bi53; + sc_bigint<54> bi54; + sc_bigint<55> bi55; + sc_bigint<56> bi56; + sc_bigint<57> bi57; + sc_bigint<58> bi58; + sc_bigint<59> bi59; + sc_bigint<60> bi60; + sc_bigint<61> bi61; + sc_bigint<62> bi62; + sc_bigint<63> bi63; + sc_bigint<64> bi64; + + sc_bv<64> bv64; + + int i; + + char values[] = "1111" + "1110" + "1101" + "1100" + "1011" + "1010" + "1001" + "1000" + "0111" + "0110" + "0101" + "0100" + "0011" + "0010" + "0001" + "0000"; + TEST("101"); + + TEST( "11111110110111001011101010011000" ); + TEST( "1111111111111111111111111111111111111111111111111111111111111111" ); + + TEST( values ); + + for ( i = 0; i < (int)strlen(values); i++ ) + { + TEST_VAR( bi64, &values[i]); + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/reduce/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/reduce/test01/golden/test01.log new file mode 100644 index 000000000..22e74474a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/reduce/test01/golden/test01.log @@ -0,0 +1,78 @@ +SystemC Simulation + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +1 +0 + +1 +1 + +1 +0 + +1 +1 + +0 +0 +0 +0 +1 +1 +1 +1 +0 +0 +1 +1 +0 +0 +0 +0 +1 +1 +1 +1 +0 +0 diff --git a/src/systemc/tests/systemc/datatypes/int/reduce/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/reduce/test01/test01.cpp new file mode 100644 index 000000000..4cb25e5db --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/reduce/test01/test01.cpp @@ -0,0 +1,138 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the reduce methods in the sc_[u]int datatypes -- method notation + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + // 1) check the existence of the reduce methods + + sc_int<42> a = 42; + + // sc_int_base + cout << endl; + cout << a.and_reduce() << endl; + cout << a.or_reduce() << endl; + cout << a.xor_reduce() << endl; + cout << a.nand_reduce() << endl; + cout << a.nor_reduce() << endl; + cout << a.xnor_reduce() << endl; + + // sc_int_subref + cout << endl; + cout << a( 7, 0 ).and_reduce() << endl; + cout << a( 7, 0 ).or_reduce() << endl; + cout << a( 7, 0 ).xor_reduce() << endl; + cout << a( 7, 0 ).nand_reduce() << endl; + cout << a( 7, 0 ).nor_reduce() << endl; + cout << a( 7, 0 ).xnor_reduce() << endl; + + // sc_int_concref + cout << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).and_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).or_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).xor_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).nand_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).nor_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).xnor_reduce() << endl; + + sc_uint<42> b = 42; + + // sc_uint_base + cout << endl; + cout << b.and_reduce() << endl; + cout << b.or_reduce() << endl; + cout << b.xor_reduce() << endl; + cout << b.nand_reduce() << endl; + cout << b.nor_reduce() << endl; + cout << b.xnor_reduce() << endl; + + // sc_uint_subref + cout << endl; + cout << b( 7, 0 ).and_reduce() << endl; + cout << b( 7, 0 ).or_reduce() << endl; + cout << b( 7, 0 ).xor_reduce() << endl; + cout << b( 7, 0 ).nand_reduce() << endl; + cout << b( 7, 0 ).nor_reduce() << endl; + cout << b( 7, 0 ).xnor_reduce() << endl; + + // sc_uint_concref + cout << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).and_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).or_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).xor_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).nand_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).nor_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).xnor_reduce() << endl; + + // 2) check the functionality of the reduce methods + + sc_int<2> c2 = -1; + cout << endl; + cout << c2.and_reduce() << endl; + cout << c2.xor_reduce() << endl; + + sc_int<3> c3 = -1; + cout << endl; + cout << c3.and_reduce() << endl; + cout << c3.xor_reduce() << endl; + + sc_uint<2> d2 = sc_dt::uint_type( -1 ); + cout << endl; + cout << d2.and_reduce() << endl; + cout << d2.xor_reduce() << endl; + + sc_uint<3> d3 = sc_dt::uint_type( -1 ); + cout << endl; + cout << d3.and_reduce() << endl; + cout << d3.xor_reduce() << endl; + + sc_int<6> e; + sc_uint<6> f; + cout << endl; + for( int i = 0; i >= -10; -- i ) { + e = i; + f = i; + cout << e.xor_reduce() << endl; + cout << f.xor_reduce() << endl; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/reduce/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/int/reduce/test02/golden/test02.log new file mode 100644 index 000000000..22e74474a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/reduce/test02/golden/test02.log @@ -0,0 +1,78 @@ +SystemC Simulation + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +1 +0 + +1 +1 + +1 +0 + +1 +1 + +0 +0 +0 +0 +1 +1 +1 +1 +0 +0 +1 +1 +0 +0 +0 +0 +1 +1 +1 +1 +0 +0 diff --git a/src/systemc/tests/systemc/datatypes/int/reduce/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/int/reduce/test02/test02.cpp new file mode 100644 index 000000000..b225fb0e1 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/reduce/test02/test02.cpp @@ -0,0 +1,138 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the reduce methods in the sc_[u]int datatypes -- functional notation + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + // 1) check the existence of the reduce methods + + sc_int<42> a = 42; + + // sc_int_base + cout << endl; + cout << and_reduce( a ) << endl; + cout << or_reduce( a ) << endl; + cout << xor_reduce( a ) << endl; + cout << nand_reduce( a ) << endl; + cout << nor_reduce( a ) << endl; + cout << xnor_reduce( a ) << endl; + + // sc_int_subref + cout << endl; + cout << and_reduce( a( 7, 0 ) ) << endl; + cout << or_reduce( a( 7, 0 ) ) << endl; + cout << xor_reduce( a( 7, 0 ) ) << endl; + cout << nand_reduce( a( 7, 0 ) ) << endl; + cout << nor_reduce( a( 7, 0 ) ) << endl; + cout << xnor_reduce( a( 7, 0 ) ) << endl; + + // sc_int_concref + cout << endl; + cout << and_reduce( ( a( 7, 0 ), a( 15, 8 ) ) ) << endl; + cout << or_reduce( ( a( 7, 0 ), a( 15, 8 ) ) ) << endl; + cout << xor_reduce( ( a( 7, 0 ), a( 15, 8 ) ) ) << endl; + cout << nand_reduce( ( a( 7, 0 ), a( 15, 8 ) ) ) << endl; + cout << nor_reduce( ( a( 7, 0 ), a( 15, 8 ) ) ) << endl; + cout << xnor_reduce( ( a( 7, 0 ), a( 15, 8 ) ) ) << endl; + + sc_uint<42> b = 42; + + // sc_uint_base + cout << endl; + cout << and_reduce( b ) << endl; + cout << or_reduce( b ) << endl; + cout << xor_reduce( b ) << endl; + cout << nand_reduce( b ) << endl; + cout << nor_reduce( b ) << endl; + cout << xnor_reduce( b ) << endl; + + // sc_uint_subref + cout << endl; + cout << and_reduce( b( 7, 0 ) ) << endl; + cout << or_reduce( b( 7, 0 ) ) << endl; + cout << xor_reduce( b( 7, 0 ) ) << endl; + cout << nand_reduce( b( 7, 0 ) ) << endl; + cout << nor_reduce( b( 7, 0 ) ) << endl; + cout << xnor_reduce( b( 7, 0 ) ) << endl; + + // sc_uint_concref + cout << endl; + cout << and_reduce( ( b( 7, 0 ), b( 15, 8 ) ) ) << endl; + cout << or_reduce( ( b( 7, 0 ), b( 15, 8 ) ) ) << endl; + cout << xor_reduce( ( b( 7, 0 ), b( 15, 8 ) ) ) << endl; + cout << nand_reduce( ( b( 7, 0 ), b( 15, 8 ) ) ) << endl; + cout << nor_reduce( ( b( 7, 0 ), b( 15, 8 ) ) ) << endl; + cout << xnor_reduce( ( b( 7, 0 ), b( 15, 8 ) ) ) << endl; + + // 2) check the functionality of the reduce methods + + sc_int<2> c2 = -1; + cout << endl; + cout << and_reduce( c2 ) << endl; + cout << xor_reduce( c2 ) << endl; + + sc_int<3> c3 = -1; + cout << endl; + cout << and_reduce( c3 ) << endl; + cout << xor_reduce( c3 ) << endl; + + sc_uint<2> d2 = sc_dt::uint_type( -1 ); + cout << endl; + cout << and_reduce( d2 ) << endl; + cout << xor_reduce( d2 ) << endl; + + sc_uint<3> d3 = sc_dt::uint_type( -1 ); + cout << endl; + cout << and_reduce( d3 ) << endl; + cout << xor_reduce( d3 ) << endl; + + sc_int<6> e; + sc_uint<6> f; + cout << endl; + for( int i = 0; i >= -10; -- i ) { + e = i; + f = i; + cout << xor_reduce( e ) << endl; + cout << xor_reduce( f ) << endl; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/reduce/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/int/reduce/test03/golden/test03.log new file mode 100644 index 000000000..22e74474a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/reduce/test03/golden/test03.log @@ -0,0 +1,78 @@ +SystemC Simulation + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +0 +1 +1 +1 +0 +0 + +1 +0 + +1 +1 + +1 +0 + +1 +1 + +0 +0 +0 +0 +1 +1 +1 +1 +0 +0 +1 +1 +0 +0 +0 +0 +1 +1 +1 +1 +0 +0 diff --git a/src/systemc/tests/systemc/datatypes/int/reduce/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/int/reduce/test03/test03.cpp new file mode 100644 index 000000000..ae7670d58 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/reduce/test03/test03.cpp @@ -0,0 +1,138 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Andy Goodrich, Forte Design Systems 2006-08-17 + Description of Modification: Converted over to test sc_big types. + + *****************************************************************************/ + +// test of the reduce methods in the sc_big[u]int datatypes -- method notation + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + // 1) check the existence of the reduce methods + + sc_bigint<42> a = 42; + + // sc_signed + cout << endl; + cout << a.and_reduce() << endl; + cout << a.or_reduce() << endl; + cout << a.xor_reduce() << endl; + cout << a.nand_reduce() << endl; + cout << a.nor_reduce() << endl; + cout << a.xnor_reduce() << endl; + + // sc_signed_subref + cout << endl; + cout << a( 7, 0 ).and_reduce() << endl; + cout << a( 7, 0 ).or_reduce() << endl; + cout << a( 7, 0 ).xor_reduce() << endl; + cout << a( 7, 0 ).nand_reduce() << endl; + cout << a( 7, 0 ).nor_reduce() << endl; + cout << a( 7, 0 ).xnor_reduce() << endl; + + // concatenation + cout << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).and_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).or_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).xor_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).nand_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).nor_reduce() << endl; + cout << ( a( 7, 0 ), a( 15, 8 ) ).xnor_reduce() << endl; + + sc_biguint<42> b = 42; + + // sc_unsigned + cout << endl; + cout << b.and_reduce() << endl; + cout << b.or_reduce() << endl; + cout << b.xor_reduce() << endl; + cout << b.nand_reduce() << endl; + cout << b.nor_reduce() << endl; + cout << b.xnor_reduce() << endl; + + // sc_unsigned_subref + cout << endl; + cout << b( 7, 0 ).and_reduce() << endl; + cout << b( 7, 0 ).or_reduce() << endl; + cout << b( 7, 0 ).xor_reduce() << endl; + cout << b( 7, 0 ).nand_reduce() << endl; + cout << b( 7, 0 ).nor_reduce() << endl; + cout << b( 7, 0 ).xnor_reduce() << endl; + + // concatenation + cout << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).and_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).or_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).xor_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).nand_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).nor_reduce() << endl; + cout << ( b( 7, 0 ), b( 15, 8 ) ).xnor_reduce() << endl; + + // 2) check the functionality of the reduce methods + + sc_bigint<2> c2 = -1; + cout << endl; + cout << c2.and_reduce() << endl; + cout << c2.xor_reduce() << endl; + + sc_bigint<3> c3 = -1; + cout << endl; + cout << c3.and_reduce() << endl; + cout << c3.xor_reduce() << endl; + + sc_biguint<2> d2 = sc_dt::uint_type( -1 ); + cout << endl; + cout << d2.and_reduce() << endl; + cout << d2.xor_reduce() << endl; + + sc_biguint<3> d3 = sc_dt::uint_type( -1 ); + cout << endl; + cout << d3.and_reduce() << endl; + cout << d3.xor_reduce() << endl; + + sc_bigint<6> e; + sc_biguint<6> f; + cout << endl; + for( int i = 0; i >= -10; -- i ) { + e = i; + f = i; + cout << e.xor_reduce() << endl; + cout << f.xor_reduce() << endl; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/bitselect/32bit/signed/golden/select.log b/src/systemc/tests/systemc/datatypes/int/sc_int/bitselect/32bit/signed/golden/select.log new file mode 100644 index 000000000..c81b8ffe9 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/bitselect/32bit/signed/golden/select.log @@ -0,0 +1,33 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 +i = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/bitselect/32bit/signed/select.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int/bitselect/32bit/signed/select.cpp new file mode 100644 index 000000000..cb9ee2e68 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/bitselect/32bit/signed/select.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + select.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WIDTH 32 +#define COUNT 100000 + +int sc_main( int ac, char* av[] ) +{ + sc_int Bx, By; + + for(unsigned int i = 0; i < WIDTH; i++){ + cout << "i = " << i << endl; + for(unsigned int j=0; j < COUNT; j++ ){ + + /* ( By.range(WIDTH-1, i+1), By.range(i,0) ) = Bx; + sc_assert( By == Bx ); + */ + + Bx = j; + sc_assert( (bool) Bx[i] == (j & (1< Bx, By; + + for(unsigned int i = 0; i < WIDTH; i++){ + cout << "i = " << i << endl; + for(unsigned int j=0; j < COUNT; j++ ){ + + /* ( By.range(WIDTH-1, i+1), By.range(i,0) ) = Bx; + sc_assert( By == Bx ); + */ + + Bx = j; + sc_assert( (bool) Bx[i] == (j & (1< Bx,By; + + for(unsigned int i = 0; i < WIDTH; i++){ + cout << "i = " << i << endl; + for(uint64 j=0; j < COUNT; j++ ){ + + /* ( By.range(WIDTH-1, i+1), By.range(i,0) ) = Bx; + sc_assert( By == Bx ); + */ + + Bx = j; + sc_assert( (bool) Bx[i] == (j & (uint64(1)< Bx,By; + + for(unsigned int i = 0; i < WIDTH; i++){ + cout << "i = " << i << endl; + for(uint64 j=0; j < COUNT; j++ ){ + + /* ( By.range(WIDTH-1, i+1), By.range(i,0) ) = Bx; + sc_assert( By == Bx ); + */ + + Bx = j; + sc_assert( (bool) Bx[i] == (j & (uint64(1)< a_si32, b_si32; + + for(int i=0; i < WIDTH-1; i++ ){ + cout << "i = " << i << endl; + a_si32 = i; + b_si32 = (a_si32.range(WIDTH-1,i+1), a_si32.range(i,0)); + sc_assert( a_si32 == b_si32 ); + } + + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/concat/signed/32bit/golden/concat.log b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/signed/32bit/golden/concat.log new file mode 100644 index 000000000..31bb32fc5 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/signed/32bit/golden/concat.log @@ -0,0 +1,32 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/concat/signed/64bit/concat.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/signed/64bit/concat.cpp new file mode 100644 index 000000000..a2a7acd1f --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/signed/64bit/concat.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + concat.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WIDTH 64 + +int sc_main(int ac, char* av[] ) +{ + + sc_int a_si64, b_si64; + + for(int i=0; i < WIDTH-1; i++ ){ + cout << "i = " << i << endl; + a_si64 = i; + b_si64 = (a_si64.range(WIDTH-1,i+1), a_si64.range(i,0)); + sc_assert( a_si64 == b_si64 ); + } + + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/concat/signed/64bit/golden/concat.log b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/signed/64bit/golden/concat.log new file mode 100644 index 000000000..e47f7871b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/signed/64bit/golden/concat.log @@ -0,0 +1,64 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 +i = 31 +i = 32 +i = 33 +i = 34 +i = 35 +i = 36 +i = 37 +i = 38 +i = 39 +i = 40 +i = 41 +i = 42 +i = 43 +i = 44 +i = 45 +i = 46 +i = 47 +i = 48 +i = 49 +i = 50 +i = 51 +i = 52 +i = 53 +i = 54 +i = 55 +i = 56 +i = 57 +i = 58 +i = 59 +i = 60 +i = 61 +i = 62 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/32bit/concat.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/32bit/concat.cpp new file mode 100644 index 000000000..2c2a1964b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/32bit/concat.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + concat.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WIDTH 32 + +int sc_main(int ac, char* av[] ) +{ + + sc_uint a_su32, b_su32; + + for(int i=0; i < WIDTH-1; i++ ){ + cout << "i = " << i << endl; + a_su32 = i; + b_su32 = (a_su32.range(WIDTH-1,i+1), a_su32.range(i,0)); + sc_assert( a_su32 == b_su32 ); + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/32bit/golden/concat.log b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/32bit/golden/concat.log new file mode 100644 index 000000000..31bb32fc5 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/32bit/golden/concat.log @@ -0,0 +1,32 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/64bit/concat.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/64bit/concat.cpp new file mode 100644 index 000000000..5bd3abe5e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/64bit/concat.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + concat.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WIDTH 64 + +int sc_main(int ac, char* av[] ) +{ + + sc_uint a_su64, b_su64; + + for(int i=0; i < WIDTH-1; i++ ){ + cout << "i = " << i << endl; + a_su64 = i; + b_su64 = (a_su64.range(WIDTH-1,i+1), a_su64.range(i,0)); + sc_assert( a_su64 == b_su64 ); + } + + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/64bit/golden/concat.log b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/64bit/golden/concat.log new file mode 100644 index 000000000..e47f7871b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/concat/unsigned/64bit/golden/concat.log @@ -0,0 +1,64 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 +i = 31 +i = 32 +i = 33 +i = 34 +i = 35 +i = 36 +i = 37 +i = 38 +i = 39 +i = 40 +i = 41 +i = 42 +i = 43 +i = 44 +i = 45 +i = 46 +i = 47 +i = 48 +i = 49 +i = 50 +i = 51 +i = 52 +i = 53 +i = 54 +i = 55 +i = 56 +i = 57 +i = 58 +i = 59 +i = 60 +i = 61 +i = 62 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/mixed/golden/test_int.log b/src/systemc/tests/systemc/datatypes/int/sc_int/mixed/golden/test_int.log new file mode 100644 index 000000000..6237a8ce1 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/mixed/golden/test_int.log @@ -0,0 +1,38 @@ +SystemC Simulation +x + a = 16 +++a = 9 +a-- = 9 +a = 9 +a[3] = 1 +a.range(4,0) = 9 +a = 9 +c = 9 +a = 15 +a = 23 +a = -121 +a = 19 +sb = 19 +sx = 1 +sy = 1 +sx = 1 +sy = 3 +s5 = 3 +s5 = -15 +sc8 = 16 +sc4 = 1 +u4 = 1 +u4 = 9 +sx = 6 +b = 0 +b = 1 +bva = 00000001 +lva = 00000001 +bva = 00000001 +ss8 = 1 +ss8 = 9 +b = 9 +b = 1 +ei8 = -118 +ei10 = -470 +bs4 = -8 +ds4 = -8 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/mixed/test_int.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int/mixed/test_int.cpp new file mode 100644 index 000000000..ba4cfd254 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/mixed/test_int.cpp @@ -0,0 +1,235 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test_int.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main( int ac, char *av[] ) +{ + sc_int<8> a,b; + int x; + + + + x = 8; + a = 8; + sc_assert( x == a); + + cout << "x + a = " << x + a << endl; + cout << "++a = " << ++a << endl; + cout << "a-- = " << a-- << endl; + + // bit-select on L.H.S. + a[0] = 1; + cout << "a = " << a << endl; + + // bitselect on R.H.S. + cout << "a[3] = " << a[3] << endl; + + + // part-select on R.H.S + cout << "a.range(4,0) = " << a.range(4,0) << endl; + cout << "a = " << a << endl; + + sc_int<5> c = a.range(4,0); + cout << "c = " << c << endl; + + // part-select on L.H.S. + a.range(2,0) = 7; + cout << "a = " << a << endl; + + a.range(4,2) = 5; + cout << "a = " << a << endl; + + a.range(7,4) = 8; + cout << "a = " << a << endl; + + // concat on R.H.S. + sc_int<4> sx = 1; + sc_int<4> sy = 3; + a = ( sx, sy ); + + cout << "a = " << a << endl; + + sc_int<8> sb; + // concat of part-selects + sb = ( a.range(7,4), a.range(3,0) ); + + cout << "sb = " << sb << endl; + + ( sx, sy ) = 17; + + cout << "sx = " << sx << endl; + cout << "sy = " << sy << endl; + + // concat and part-selects + ( sx, sy ) = ( a.range(7,4), a.range(3,0) ); + + cout << "sx = " << sx << endl; + cout << "sy = " << sy << endl; + + sc_int<5> s5; + + s5 = ( sx , a[4] ); + + cout << "s5 = " << s5 << endl; + + s5 = (a[4],sx); + cout << "s5 = " << s5 << endl; + + sc_bv<8> sc8; + sc_bv<4> sc4; + + // ( sc8.range(7,4), sc4 ) = 17; + ( sc8.range(7,4), sc4 ) = "00010001"; + + cout << "sc8 = " << sc8.to_int() << endl; + cout << "sc4 = " << sc4.to_int() << endl; + + sc_int_base sia(8); + + + sc_uint<4> u4; + + // part-select on sc_uint + u4 = sx.range(3,0); + + cout << "u4 = " << u4 << endl; + + u4[3] = sx[0]; + + cout << "u4 = " << u4 << endl; + + sx = (u4.range(1,0), u4.range(3,2)); + + cout << "sx = " << sx << endl; + + sc_bv<8> bva; + sc_lv<8> lva; + + // Mixing bv, lv on the RHS + + bva = "10000000"; + lva = "10000001"; + +// #if ! defined( __GNUC__ ) + b = bva & "1010"; + cout << "b = " << b << endl; +// #endif + + // b = lva ^ bva; + b = sc_lv<8>( lva ^ bva ); + cout << "b = " << b << endl; + + //Mixing bv, lv on the LHS + + bva = b; + lva = b; + + cout << "bva = " << bva << endl; + cout << "lva = " << lva << endl; + + bva = b & lva.to_int(); + + cout << "bva = " << bva << endl; + + + //Mixing sc_signed on LHS + + sc_signed ss8(8); + ss8 = b; + cout << "ss8 = " << ss8 << endl; + + ss8 = u4; + cout << "ss8 = " << ss8 << endl; + + // Mixing sc_signed/sc_unsigned on RHS + sc_unsigned su8(8); + + su8 = 8; + b = su8 + 1; + + cout << "b = " << b << endl; + + b = ss8 * su8; + b = ss8 ^ su8; + su8 = bva.to_int() | ss8; + + cout << "b = " << b << endl; + + // Having more than two concats + + sc_int<2> ai2; + sc_int<4> bi4; + sc_int<2> ci2; + sc_int<2> di2; + sc_int<8> ei8; + sc_int<10> ei10; + + ai2 = 2; + bi4 = 2; + ci2 = 2; + di2 = 2; + + ei8 = (ai2, bi4, ci2 ); + + cout << "ei8 = " << ei8 << endl; + + ei10 = (ai2, bi4, ci2 , di2); + + cout << "ei10 = " << ei10 << endl; + + // bit-true behavior + sc_int<4> bs4; + sc_signed ds4(4); + + bs4[3] = 1; + bs4[2] = 0; + bs4[1] = 0; + bs4[0] = 0; + + ds4[3] = 1; + ds4[2] = 0; + ds4[1] = 0; + ds4[0] = 0; + + + cout << "bs4 = " << bs4 << endl; + cout << "ds4 = " << ds4 << endl; + + return 0; + +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/signed/golden/select.log b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/signed/golden/select.log new file mode 100644 index 000000000..c81b8ffe9 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/signed/golden/select.log @@ -0,0 +1,33 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 +i = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/signed/select.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/signed/select.cpp new file mode 100644 index 000000000..27534579b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/signed/select.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + select.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WIDTH 32 +#define COUNT 10000 + +int sc_main( int ac, char* av[] ) +{ + sc_int Bx,By; + + for(unsigned int i = 0; i < WIDTH; i++){ + cout << "i = " << i << endl; + for(unsigned int j=0; j < COUNT; j++ ){ + + /* ( By.range(WIDTH-1, i+1), By.range(i,0) ) = Bx; + sc_assert( By == Bx ); + */ + + Bx = j; + By.range(WIDTH-1,i) = Bx.range(WIDTH-1,i); + if(i >= 1) + By.range(i-1,0) = Bx.range(i-1,0); + sc_assert( Bx == By ); + } + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/unsigned/golden/select.log b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/unsigned/golden/select.log new file mode 100644 index 000000000..c81b8ffe9 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/unsigned/golden/select.log @@ -0,0 +1,33 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 +i = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/unsigned/select.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/unsigned/select.cpp new file mode 100644 index 000000000..9631a020d --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/32bit/unsigned/select.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + select.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WIDTH 32 +#define COUNT 100000 + +int sc_main( int ac, char* av[] ) +{ + sc_uint Bx,By; + + for(unsigned int i = 0; i < WIDTH; i++){ + cout << "i = " << i << endl; + for(unsigned int j=0; j < COUNT; j++ ){ + + /* ( By.range(WIDTH-1, i+1), By.range(i,0) ) = Bx; + sc_assert( By == Bx ); + */ + + Bx = j; + By.range(WIDTH-1,i) = Bx.range(WIDTH-1,i); + if(i >= 1) + By.range(i-1,0) = Bx.range(i-1,0); + sc_assert( Bx == By ); + } + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/signed/golden/select.log b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/signed/golden/select.log new file mode 100644 index 000000000..c4375f21c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/signed/golden/select.log @@ -0,0 +1,65 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 +i = 31 +i = 32 +i = 33 +i = 34 +i = 35 +i = 36 +i = 37 +i = 38 +i = 39 +i = 40 +i = 41 +i = 42 +i = 43 +i = 44 +i = 45 +i = 46 +i = 47 +i = 48 +i = 49 +i = 50 +i = 51 +i = 52 +i = 53 +i = 54 +i = 55 +i = 56 +i = 57 +i = 58 +i = 59 +i = 60 +i = 61 +i = 62 +i = 63 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/signed/select.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/signed/select.cpp new file mode 100644 index 000000000..e13202d32 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/signed/select.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + select.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WIDTH 64 +#define COUNT 10000 + +int sc_main( int ac, char* av[] ) +{ + sc_int Bx,By; + + for(unsigned int i = 0; i < WIDTH; i++){ + cout << "i = " << i << endl; + for(unsigned int j=0; j < COUNT; j++ ){ + + /* ( By.range(WIDTH-1, i+1), By.range(i,0) ) = Bx; + sc_assert( By == Bx ); + */ + + Bx = j; + By.range(WIDTH-1,i) = Bx.range(WIDTH-1,i); + if(i >= 1) + By.range(i-1,0) = Bx.range(i-1,0); + sc_assert( Bx == By ); + } + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/unsigned/golden/select.log b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/unsigned/golden/select.log new file mode 100644 index 000000000..c4375f21c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/unsigned/golden/select.log @@ -0,0 +1,65 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 +i = 31 +i = 32 +i = 33 +i = 34 +i = 35 +i = 36 +i = 37 +i = 38 +i = 39 +i = 40 +i = 41 +i = 42 +i = 43 +i = 44 +i = 45 +i = 46 +i = 47 +i = 48 +i = 49 +i = 50 +i = 51 +i = 52 +i = 53 +i = 54 +i = 55 +i = 56 +i = 57 +i = 58 +i = 59 +i = 60 +i = 61 +i = 62 +i = 63 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/unsigned/select.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/unsigned/select.cpp new file mode 100644 index 000000000..16701d45c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int/partselect/64bit/unsigned/select.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + select.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WIDTH 64 +#define COUNT 10000 + +int sc_main( int ac, char* av[] ) +{ + sc_uint Bx,By; + + for(unsigned int i = 0; i < WIDTH; i++){ + cout << "i = " << i << endl; + for(unsigned int j=0; j < COUNT; j++ ){ + + /* ( By.range(WIDTH-1, i+1), By.range(i,0) ) = Bx; + sc_assert( By == Bx ); + */ + + Bx = j; + By.range(WIDTH-1,i) = Bx.range(WIDTH-1,i); + if(i >= 1) + By.range(i-1,0) = Bx.range(i-1,0); + sc_assert( Bx == By ); + } + } + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int_base/bitselect/32bit/signed/golden/select.log b/src/systemc/tests/systemc/datatypes/int/sc_int_base/bitselect/32bit/signed/golden/select.log new file mode 100644 index 000000000..c81b8ffe9 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int_base/bitselect/32bit/signed/golden/select.log @@ -0,0 +1,33 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 +i = 11 +i = 12 +i = 13 +i = 14 +i = 15 +i = 16 +i = 17 +i = 18 +i = 19 +i = 20 +i = 21 +i = 22 +i = 23 +i = 24 +i = 25 +i = 26 +i = 27 +i = 28 +i = 29 +i = 30 +i = 31 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_int_base/bitselect/32bit/signed/select.cpp b/src/systemc/tests/systemc/datatypes/int/sc_int_base/bitselect/32bit/signed/select.cpp new file mode 100644 index 000000000..368761f94 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_int_base/bitselect/32bit/signed/select.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + select.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define WIDTH 32 +#define COUNT 100000 + +int sc_main( int ac, char* av[] ) +{ + sc_int_base Bx(WIDTH), By(WIDTH); + + for(unsigned int i = 0; i < WIDTH; i++){ + cout << "i = " << i << endl; + for(unsigned int j=0; j < COUNT; j++ ){ + + /* ( By.range(WIDTH-1, i+1), By.range(i,0) ) = Bx; + sc_assert( By == Bx ); + */ + + Bx = j; + sc_assert( (bool) Bx[i] == (j & (1< bi; + + cout << bi[3] << endl; + + cout << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test01/golden/test01.log new file mode 100644 index 000000000..c5f034b66 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test01/golden/test01.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Error: (E5) out of bounds: sc_bigint part selection: left = 3, right = 2 + violates either (2 >= left >= 0) or (2 >= right >= 0) +In file: diff --git a/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test01/test01.cpp new file mode 100644 index 000000000..f73acc6ac --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test01/test01.cpp @@ -0,0 +1,13 @@ +#define SC_INCLUDE_FX + +#include "systemc.h" +int sc_main(int argc, char** argv) +{ + sc_bigint<3> big; + + cout << big(3,2) << endl; + + cout << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test02/golden/test02.log new file mode 100644 index 000000000..7d77fe55e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test02/golden/test02.log @@ -0,0 +1,3 @@ +SystemC Simulation +0 +Program completed diff --git a/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test02/test02.cpp new file mode 100644 index 000000000..7a53a2ef3 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test02/test02.cpp @@ -0,0 +1,13 @@ +#define SC_INCLUDE_FX + +#include "systemc.h" +int sc_main(int argc, char** argv) +{ + sc_bigint<3> big; + + cout << big(1,2) << endl; + + cout << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test03/golden/test03.log new file mode 100644 index 000000000..fd3a70e1a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test03/golden/test03.log @@ -0,0 +1,7 @@ +SystemC Simulation +0021 0021 +0021 0021 +21 21 +0021 +00021 +00021 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test03/test03.cpp new file mode 100644 index 000000000..abb4b033f --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test03/test03.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03 -- test for unsigned data values + + Original Author: + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int argc, char** argv) { + sc_int<16> a, tmp; + sc_bigint<16> biga, bigtmp; + sc_biguint<6> bigu6; + sc_biguint<16> bigu16; + + a = 97; // 0b1100001 + biga = 97; + bigu6 = 97; + + tmp = a.range( 5,0 ); // results in 33 - 0b100001, not sign extended + bigtmp = biga.range( 5,0 ); // results in 65505, sign extended + cout << hex << tmp << " " << bigtmp << endl; + + tmp = biga.range( 5,0 ); // results in 33 - 0b100001, not sign extended + bigtmp = a.range( 5,0 ); // results in 65505, sign extended + cout << hex << tmp << " " << bigtmp << endl; + + cout << hex << a.range(5,0) << " " << biga.range(5,0) << endl; + + bigtmp = bigu6; + cout << hex << bigtmp << endl; + + bigu16 = biga.range(5,0); + cout << bigu16 << endl; + + bigu16 = a.range(5,0); + cout << hex << bigu16 << endl; + + sc_start(1, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test04/golden/test04.log b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test04/golden/test04.log new file mode 100644 index 000000000..5905e23ba --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test04/golden/test04.log @@ -0,0 +1,5 @@ +SystemC Simulation +1234fa78 +12340a78 +12340a78 +Program completed diff --git a/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test04/test04.cpp b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test04/test04.cpp new file mode 100644 index 000000000..6a595ace1 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_signed/part_select/test04/test04.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- test sign extension in part select assignments. + + Original Author: Andy Goodrich, Forte Design Systems, 29 April 2008 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#define TERM(EXPR) cout << #EXPR << " " << hex << (EXPR) << endl + + +int sc_main(int argc, char* argv[]) +{ + sc_bigint<31> a; + sc_bigint<4> b = 0xa; + sc_bigint<5> c = 0x0a; + sc_biguint<4> d = 0x0a; + a = 0x12345678; + a.range(15,8) = b; + cout << hex << a << endl; + a = 0x12345678; + a.range(15,8) = c; + cout << hex << a << endl; + a = 0x12345678; + a.range(15,8) = d; + cout << hex << a << endl; + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_small/bsps1/bsps1.cpp b/src/systemc/tests/systemc/datatypes/int/sc_small/bsps1/bsps1.cpp new file mode 100644 index 000000000..b11825a62 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_small/bsps1/bsps1.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bsps1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main(int ac, char* av[]) +{ + sc_int<32> x; + + x = 0; + x[1] = 1; + x[2] = 1; + x[3] = 0; + x[4] = 0; + x[5] = 1; + + sc_assert( x == 38 ); + cout << x << endl; + + x[5] = 0; + x[31] = 1; + +#if !defined( _MSC_VER ) + sc_assert((uint64)x == 0xffffffff80000006ULL); +#else + sc_assert((uint64)x == 0xffffffff80000006ui64); +#endif + cout << x << endl; + + x.range(31,5) = 10; + sc_assert(x == 326); + cout << x << endl; + + x = 0; + x.range(21,7) = 9; + sc_assert(x == 1152); + cout << x << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_small/bsps1/golden/bsps1.log b/src/systemc/tests/systemc/datatypes/int/sc_small/bsps1/golden/bsps1.log new file mode 100644 index 000000000..7b20c49d2 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_small/bsps1/golden/bsps1.log @@ -0,0 +1,5 @@ +SystemC Simulation +38 +-2147483642 +326 +1152 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_small/test_small/golden/test_small.log b/src/systemc/tests/systemc/datatypes/int/sc_small/test_small/golden/test_small.log new file mode 100644 index 000000000..3a51f62c9 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_small/test_small/golden/test_small.log @@ -0,0 +1,18 @@ +SystemC Simulation +a = -8 b = 8 +a = -7 b = 9 +a = 7 b = 7 +a = 0 b = 0 +a = 0 b = 0 +a = -4 b = 4 +a = -4 b = 4 +a = 0 b = 0 +a = -4 b = 12 +a = -4 b = 12 +a = -2 b = 2 c = -2 +a = 0 b = 0 +a = -4 b = 4 +a = -8 b = 8 +a = -7 b = 9 +a = -8 b = 8 +a = 7 b = 7 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_small/test_small/test_small.cpp b/src/systemc/tests/systemc/datatypes/int/sc_small/test_small/test_small.cpp new file mode 100644 index 000000000..d40bf8442 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_small/test_small/test_small.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test_small.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + +int sc_main(int argc, char* argv[]) +{ + sc_int<4> a(8); + sc_uint<4> b(8); + + cout << "a = " << a << " " << "b = " << b << endl; + a += 1; + b += 1; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + a -= 1; + b -= 1; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + a *= 2; + b *= 2; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + a = a * 2; + b = b * 2; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + a /= 2; + b /= 2; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + a = a/2; + b = b/2; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + a &= 0x04; + b &= 0x04; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + a |= 0x04; + b |= 0x04; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + a ^= 0x04; + b ^= 0x04; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + int c = -8; + c %= 6; + a %= 6; + b %= 6; + cout << "a = " << a << " " << "b = " << b << " " << "c = " << c << endl; + a = 8; + b = 8; + a <<= 1; + b <<= 1; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + a >>= 1; + b >>= 1; + cout << "a = " << a << " " << "b = " << b << endl; + a = 8; + b = 8; + cout << "a = " << a++ << " " << "b = " << b++ << endl; + a = 8; + b = 8; + cout << "a = " << ++a << " " << "b = " << ++b << endl; + a = 8; + b = 8; + cout << "a = " << a-- << " " << "b = " << b-- << endl; + a = 8; + b = 8; + cout << "a = " << --a << " " << "b = " << --b << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/bit_select/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/bit_select/test01/golden/test01.log new file mode 100644 index 000000000..912f0b58b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/bit_select/test01/golden/test01.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E5) out of bounds: sc_biguint bit selection: index = 3 violates 0 <= index <= 2 +In file: diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/bit_select/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/bit_select/test01/test01.cpp new file mode 100644 index 000000000..7881023b7 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/bit_select/test01/test01.cpp @@ -0,0 +1,11 @@ +#include "systemc.h" +int sc_main(int argc, char** argv) +{ + sc_biguint<3> bi; + + cout << bi[3] << endl; + + cout << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/minus/golden/minus.log b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/minus/golden/minus.log new file mode 100644 index 000000000..db9dc092e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/minus/golden/minus.log @@ -0,0 +1,5 @@ +SystemC Simulation +a = 2 b = 4 +a - b = -2 +a - 4 = -2 +2 - b = -2 diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/minus/minus.cpp b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/minus/minus.cpp new file mode 100644 index 000000000..e6aa7341e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/minus/minus.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + minus.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + +int sc_main(int argc, char* argv[] ) +{ + sc_unsigned a(3); + sc_unsigned b(3); + + + a = 2; + b = 4; + cout << "a = " << a << " " << "b = " << b << endl; + cout << "a - b = " << (a - b) << endl; + cout << "a - 4 = " << (a - 4) << endl; + cout << "2 - b = " << (2 - b) << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test01/golden/test01.log new file mode 100644 index 000000000..ec36436ab --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test01/golden/test01.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Error: (E5) out of bounds: sc_biguint part selection: left = 3, right = 1 + violates either (2 >= left >= 0) or (2 >= right >= 0) +In file: diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test01/test01.cpp new file mode 100644 index 000000000..c4a06e742 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test01/test01.cpp @@ -0,0 +1,13 @@ +#define SC_INCLUDE_FX + +#include "systemc.h" +int sc_main(int argc, char** argv) +{ + sc_biguint<3> big; + + cout << big(3,1) << endl; + + cout << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test02/golden/test02.log new file mode 100644 index 000000000..7d77fe55e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test02/golden/test02.log @@ -0,0 +1,3 @@ +SystemC Simulation +0 +Program completed diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test02/test02.cpp new file mode 100644 index 000000000..2cd2666ff --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test02/test02.cpp @@ -0,0 +1,13 @@ +#define SC_INCLUDE_FX + +#include "systemc.h" +int sc_main(int argc, char** argv) +{ + sc_biguint<3> big; + + cout << big(1,2) << endl; + + cout << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test03/golden/test03.log new file mode 100644 index 000000000..8c59f08ba --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test03/golden/test03.log @@ -0,0 +1,5 @@ +SystemC Simulation +12340a78 +12340a78 +12340a78 +Program completed diff --git a/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test03/test03.cpp new file mode 100644 index 000000000..7d92e3920 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/sc_unsigned/part_select/test03/test03.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- test sign extension in part select assignments. + + Original Author: Andy Goodrich, Forte Design Systems, 29 April 2008 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#define TERM(EXPR) cout << #EXPR << " " << hex << (EXPR) << endl + + +int sc_main(int argc, char* argv[]) +{ + sc_biguint<31> a; + sc_bigint<4> b = 0xa; + sc_bigint<5> c = 0x0a; + sc_biguint<4> d = 0x0a; + a = 0x12345678; + a.range(15,8) = b; + cout << hex << a << endl; + a = 0x12345678; + a.range(15,8) = c; + cout << hex << a << endl; + a = 0x12345678; + a.range(15,8) = d; + cout << hex << a << endl; + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/string_conversion/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/int/string_conversion/test01/golden/test01.log new file mode 100644 index 000000000..414113f5b --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/string_conversion/test01/golden/test01.log @@ -0,0 +1,32 @@ +SystemC Simulation +*** test_string_conversions +sc_int +-1 +0b11111111 +negative +-0bsm00000001 +0o777 +negative +-0osm001 +0xff +negative +-0xsm01 +-1 +0csd0000000- +-1 +255 +sc_uint +255 +0b011111111 +0bus11111111 +0bsm11111111 +0o377 +0ous377 +0osm377 +0x0ff +0xusff +0xsmff +255 +0csd10000000- +255 +255 diff --git a/src/systemc/tests/systemc/datatypes/int/string_conversion/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/int/string_conversion/test01/test01.cpp new file mode 100644 index 000000000..93e6a01cf --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/string_conversion/test01/test01.cpp @@ -0,0 +1,200 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test string conversion of sc_[u]int + +#include "systemc.h" + +void +test_string_conversions() +{ + cout << "*** test_string_conversions" << endl; + { + cout << "sc_int" << endl; + + sc_int<8> a = -1; + sc_int<8> b; + std::string s; + + s = a.to_string(); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN_US ); + cout << s << endl; + // b = s.c_str(); + // sc_assert( b == a ); + + s = a.to_string( SC_BIN_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT_US ); + cout << s << endl; + // b = s.c_str(); + // sc_assert( b == a ); + + s = a.to_string( SC_OCT_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX_US ); + cout << s << endl; + // b = s.c_str(); + // sc_assert( b == a ); + + s = a.to_string( SC_HEX_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_DEC ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_CSD ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + sc_int<8> c( a.to_string().c_str() ); + cout << c.to_string() << endl; + + c.range( 7, 0 ) = a.to_string().c_str(); + cout << c.range( 7, 0 ).to_string() << endl; + } + { + cout << "sc_uint" << endl; + + sc_uint<8> a = -1; + sc_uint<8> b; + std::string s; + + s = a.to_string(); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_DEC ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_CSD ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + sc_uint<8> c( a.to_string().c_str() ); + cout << c.to_string() << endl; + + c.range( 7, 0 ) = a.to_string().c_str(); + cout << c.range( 7, 0 ).to_string() << endl; + } +} + +int +sc_main( int, char*[] ) +{ + test_string_conversions(); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/string_conversion/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/int/string_conversion/test02/golden/test02.log new file mode 100644 index 000000000..569edd142 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/string_conversion/test02/golden/test02.log @@ -0,0 +1,32 @@ +SystemC Simulation +*** test_string_conversions +sc_bigint +-1 +0b11111111 +negative +-0bsm00000001 +0o777 +negative +-0osm001 +0xff +negative +-0xsm01 +-1 +0csd0000000- +-1 +255 +sc_biguint +255 +0b011111111 +0bus11111111 +0bsm11111111 +0o377 +0ous377 +0osm377 +0x0ff +0xusff +0xsmff +255 +0csd10000000- +255 +255 diff --git a/src/systemc/tests/systemc/datatypes/int/string_conversion/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/int/string_conversion/test02/test02.cpp new file mode 100644 index 000000000..3a7e825af --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/string_conversion/test02/test02.cpp @@ -0,0 +1,200 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test string conversion of sc_big[u]int + +#include "systemc.h" + +void +test_string_conversions() +{ + cout << "*** test_string_conversions" << endl; + { + cout << "sc_bigint" << endl; + + sc_bigint<8> a = -1; + sc_bigint<8> b; + std::string s; + + s = a.to_string(); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN_US ); + cout << s << endl; + // b = s.c_str(); + // sc_assert( b == a ); + + s = a.to_string( SC_BIN_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT_US ); + cout << s << endl; + // b = s.c_str(); + // sc_assert( b == a ); + + s = a.to_string( SC_OCT_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX_US ); + cout << s << endl; + // b = s.c_str(); + // sc_assert( b == a ); + + s = a.to_string( SC_HEX_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_DEC ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_CSD ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + sc_bigint<8> c( a.to_string().c_str() ); + cout << c.to_string() << endl; + + c.range( 7, 0 ) = a.to_string().c_str(); + cout << c.range( 7, 0 ).to_string() << endl; + } + { + cout << "sc_biguint" << endl; + + sc_biguint<8> a = -1; + sc_biguint<8> b; + std::string s; + + s = a.to_string(); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_BIN_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_OCT_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX_US ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_HEX_SM ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_DEC ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + s = a.to_string( SC_CSD ); + cout << s << endl; + b = s.c_str(); + sc_assert( b == a ); + + sc_biguint<8> c( a.to_string().c_str() ); + cout << c.to_string() << endl; + + c.range( 7, 0 ) = a.to_string().c_str(); + cout << c.range( 7, 0 ).to_string() << endl; + } +} + +int +sc_main( int, char*[] ) +{ + test_string_conversions(); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/int/string_conversion/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/int/string_conversion/test03/golden/test03.log new file mode 100644 index 000000000..abe5227d3 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/string_conversion/test03/golden/test03.log @@ -0,0 +1,1550 @@ +SystemC Simulation + +sc_bigint<8> + d: 0 o: 000 x: 00 d: 0d0 o: 0o000 x: 0x00 + d: 1 o: 001 x: 01 d: 0d1 o: 0o001 x: 0x01 + d: 2 o: 002 x: 02 d: 0d2 o: 0o002 x: 0x02 + d: 3 o: 003 x: 03 d: 0d3 o: 0o003 x: 0x03 + d: 4 o: 004 x: 04 d: 0d4 o: 0o004 x: 0x04 + d: 5 o: 005 x: 05 d: 0d5 o: 0o005 x: 0x05 + d: 6 o: 006 x: 06 d: 0d6 o: 0o006 x: 0x06 + d: 7 o: 007 x: 07 d: 0d7 o: 0o007 x: 0x07 + d: 8 o: 010 x: 08 d: 0d8 o: 0o010 x: 0x08 + d: 9 o: 011 x: 09 d: 0d9 o: 0o011 x: 0x09 + d: 10 o: 012 x: 0a d: 0d10 o: 0o012 x: 0x0a + d: 11 o: 013 x: 0b d: 0d11 o: 0o013 x: 0x0b + d: 12 o: 014 x: 0c d: 0d12 o: 0o014 x: 0x0c + d: 13 o: 015 x: 0d d: 0d13 o: 0o015 x: 0x0d + d: 14 o: 016 x: 0e d: 0d14 o: 0o016 x: 0x0e + d: 15 o: 017 x: 0f d: 0d15 o: 0o017 x: 0x0f + d: 16 o: 020 x: 10 d: 0d16 o: 0o020 x: 0x10 + d: 17 o: 021 x: 11 d: 0d17 o: 0o021 x: 0x11 + d: 18 o: 022 x: 12 d: 0d18 o: 0o022 x: 0x12 + d: 19 o: 023 x: 13 d: 0d19 o: 0o023 x: 0x13 + d: 20 o: 024 x: 14 d: 0d20 o: 0o024 x: 0x14 + d: 21 o: 025 x: 15 d: 0d21 o: 0o025 x: 0x15 + d: 22 o: 026 x: 16 d: 0d22 o: 0o026 x: 0x16 + d: 23 o: 027 x: 17 d: 0d23 o: 0o027 x: 0x17 + d: 24 o: 030 x: 18 d: 0d24 o: 0o030 x: 0x18 + d: 25 o: 031 x: 19 d: 0d25 o: 0o031 x: 0x19 + d: 26 o: 032 x: 1a d: 0d26 o: 0o032 x: 0x1a + d: 27 o: 033 x: 1b d: 0d27 o: 0o033 x: 0x1b + d: 28 o: 034 x: 1c d: 0d28 o: 0o034 x: 0x1c + d: 29 o: 035 x: 1d d: 0d29 o: 0o035 x: 0x1d + d: 30 o: 036 x: 1e d: 0d30 o: 0o036 x: 0x1e + d: 31 o: 037 x: 1f d: 0d31 o: 0o037 x: 0x1f + d: 32 o: 040 x: 20 d: 0d32 o: 0o040 x: 0x20 + d: 33 o: 041 x: 21 d: 0d33 o: 0o041 x: 0x21 + d: 34 o: 042 x: 22 d: 0d34 o: 0o042 x: 0x22 + d: 35 o: 043 x: 23 d: 0d35 o: 0o043 x: 0x23 + d: 36 o: 044 x: 24 d: 0d36 o: 0o044 x: 0x24 + d: 37 o: 045 x: 25 d: 0d37 o: 0o045 x: 0x25 + d: 38 o: 046 x: 26 d: 0d38 o: 0o046 x: 0x26 + d: 39 o: 047 x: 27 d: 0d39 o: 0o047 x: 0x27 + d: 40 o: 050 x: 28 d: 0d40 o: 0o050 x: 0x28 + d: 41 o: 051 x: 29 d: 0d41 o: 0o051 x: 0x29 + d: 42 o: 052 x: 2a d: 0d42 o: 0o052 x: 0x2a + d: 43 o: 053 x: 2b d: 0d43 o: 0o053 x: 0x2b + d: 44 o: 054 x: 2c d: 0d44 o: 0o054 x: 0x2c + d: 45 o: 055 x: 2d d: 0d45 o: 0o055 x: 0x2d + d: 46 o: 056 x: 2e d: 0d46 o: 0o056 x: 0x2e + d: 47 o: 057 x: 2f d: 0d47 o: 0o057 x: 0x2f + d: 48 o: 060 x: 30 d: 0d48 o: 0o060 x: 0x30 + d: 49 o: 061 x: 31 d: 0d49 o: 0o061 x: 0x31 + d: 50 o: 062 x: 32 d: 0d50 o: 0o062 x: 0x32 + d: 51 o: 063 x: 33 d: 0d51 o: 0o063 x: 0x33 + d: 52 o: 064 x: 34 d: 0d52 o: 0o064 x: 0x34 + d: 53 o: 065 x: 35 d: 0d53 o: 0o065 x: 0x35 + d: 54 o: 066 x: 36 d: 0d54 o: 0o066 x: 0x36 + d: 55 o: 067 x: 37 d: 0d55 o: 0o067 x: 0x37 + d: 56 o: 070 x: 38 d: 0d56 o: 0o070 x: 0x38 + d: 57 o: 071 x: 39 d: 0d57 o: 0o071 x: 0x39 + d: 58 o: 072 x: 3a d: 0d58 o: 0o072 x: 0x3a + d: 59 o: 073 x: 3b d: 0d59 o: 0o073 x: 0x3b + d: 60 o: 074 x: 3c d: 0d60 o: 0o074 x: 0x3c + d: 61 o: 075 x: 3d d: 0d61 o: 0o075 x: 0x3d + d: 62 o: 076 x: 3e d: 0d62 o: 0o076 x: 0x3e + d: 63 o: 077 x: 3f d: 0d63 o: 0o077 x: 0x3f + d: 64 o: 100 x: 40 d: 0d64 o: 0o100 x: 0x40 + d: 65 o: 101 x: 41 d: 0d65 o: 0o101 x: 0x41 + d: 66 o: 102 x: 42 d: 0d66 o: 0o102 x: 0x42 + d: 67 o: 103 x: 43 d: 0d67 o: 0o103 x: 0x43 + d: 68 o: 104 x: 44 d: 0d68 o: 0o104 x: 0x44 + d: 69 o: 105 x: 45 d: 0d69 o: 0o105 x: 0x45 + d: 70 o: 106 x: 46 d: 0d70 o: 0o106 x: 0x46 + d: 71 o: 107 x: 47 d: 0d71 o: 0o107 x: 0x47 + d: 72 o: 110 x: 48 d: 0d72 o: 0o110 x: 0x48 + d: 73 o: 111 x: 49 d: 0d73 o: 0o111 x: 0x49 + d: 74 o: 112 x: 4a d: 0d74 o: 0o112 x: 0x4a + d: 75 o: 113 x: 4b d: 0d75 o: 0o113 x: 0x4b + d: 76 o: 114 x: 4c d: 0d76 o: 0o114 x: 0x4c + d: 77 o: 115 x: 4d d: 0d77 o: 0o115 x: 0x4d + d: 78 o: 116 x: 4e d: 0d78 o: 0o116 x: 0x4e + d: 79 o: 117 x: 4f d: 0d79 o: 0o117 x: 0x4f + d: 80 o: 120 x: 50 d: 0d80 o: 0o120 x: 0x50 + d: 81 o: 121 x: 51 d: 0d81 o: 0o121 x: 0x51 + d: 82 o: 122 x: 52 d: 0d82 o: 0o122 x: 0x52 + d: 83 o: 123 x: 53 d: 0d83 o: 0o123 x: 0x53 + d: 84 o: 124 x: 54 d: 0d84 o: 0o124 x: 0x54 + d: 85 o: 125 x: 55 d: 0d85 o: 0o125 x: 0x55 + d: 86 o: 126 x: 56 d: 0d86 o: 0o126 x: 0x56 + d: 87 o: 127 x: 57 d: 0d87 o: 0o127 x: 0x57 + d: 88 o: 130 x: 58 d: 0d88 o: 0o130 x: 0x58 + d: 89 o: 131 x: 59 d: 0d89 o: 0o131 x: 0x59 + d: 90 o: 132 x: 5a d: 0d90 o: 0o132 x: 0x5a + d: 91 o: 133 x: 5b d: 0d91 o: 0o133 x: 0x5b + d: 92 o: 134 x: 5c d: 0d92 o: 0o134 x: 0x5c + d: 93 o: 135 x: 5d d: 0d93 o: 0o135 x: 0x5d + d: 94 o: 136 x: 5e d: 0d94 o: 0o136 x: 0x5e + d: 95 o: 137 x: 5f d: 0d95 o: 0o137 x: 0x5f + d: 96 o: 140 x: 60 d: 0d96 o: 0o140 x: 0x60 + d: 97 o: 141 x: 61 d: 0d97 o: 0o141 x: 0x61 + d: 98 o: 142 x: 62 d: 0d98 o: 0o142 x: 0x62 + d: 99 o: 143 x: 63 d: 0d99 o: 0o143 x: 0x63 + d: 100 o: 144 x: 64 d: 0d100 o: 0o144 x: 0x64 + d: 101 o: 145 x: 65 d: 0d101 o: 0o145 x: 0x65 + d: 102 o: 146 x: 66 d: 0d102 o: 0o146 x: 0x66 + d: 103 o: 147 x: 67 d: 0d103 o: 0o147 x: 0x67 + d: 104 o: 150 x: 68 d: 0d104 o: 0o150 x: 0x68 + d: 105 o: 151 x: 69 d: 0d105 o: 0o151 x: 0x69 + d: 106 o: 152 x: 6a d: 0d106 o: 0o152 x: 0x6a + d: 107 o: 153 x: 6b d: 0d107 o: 0o153 x: 0x6b + d: 108 o: 154 x: 6c d: 0d108 o: 0o154 x: 0x6c + d: 109 o: 155 x: 6d d: 0d109 o: 0o155 x: 0x6d + d: 110 o: 156 x: 6e d: 0d110 o: 0o156 x: 0x6e + d: 111 o: 157 x: 6f d: 0d111 o: 0o157 x: 0x6f + d: 112 o: 160 x: 70 d: 0d112 o: 0o160 x: 0x70 + d: 113 o: 161 x: 71 d: 0d113 o: 0o161 x: 0x71 + d: 114 o: 162 x: 72 d: 0d114 o: 0o162 x: 0x72 + d: 115 o: 163 x: 73 d: 0d115 o: 0o163 x: 0x73 + d: 116 o: 164 x: 74 d: 0d116 o: 0o164 x: 0x74 + d: 117 o: 165 x: 75 d: 0d117 o: 0o165 x: 0x75 + d: 118 o: 166 x: 76 d: 0d118 o: 0o166 x: 0x76 + d: 119 o: 167 x: 77 d: 0d119 o: 0o167 x: 0x77 + d: 120 o: 170 x: 78 d: 0d120 o: 0o170 x: 0x78 + d: 121 o: 171 x: 79 d: 0d121 o: 0o171 x: 0x79 + d: 122 o: 172 x: 7a d: 0d122 o: 0o172 x: 0x7a + d: 123 o: 173 x: 7b d: 0d123 o: 0o173 x: 0x7b + d: 124 o: 174 x: 7c d: 0d124 o: 0o174 x: 0x7c + d: 125 o: 175 x: 7d d: 0d125 o: 0o175 x: 0x7d + d: 126 o: 176 x: 7e d: 0d126 o: 0o176 x: 0x7e + d: 127 o: 177 x: 7f d: 0d127 o: 0o177 x: 0x7f + d: -128 o: 600 x: 80 d: -0d128 o: 0o600 x: 0x80 + d: -127 o: 601 x: 81 d: -0d127 o: 0o601 x: 0x81 + d: -126 o: 602 x: 82 d: -0d126 o: 0o602 x: 0x82 + d: -125 o: 603 x: 83 d: -0d125 o: 0o603 x: 0x83 + d: -124 o: 604 x: 84 d: -0d124 o: 0o604 x: 0x84 + d: -123 o: 605 x: 85 d: -0d123 o: 0o605 x: 0x85 + d: -122 o: 606 x: 86 d: -0d122 o: 0o606 x: 0x86 + d: -121 o: 607 x: 87 d: -0d121 o: 0o607 x: 0x87 + d: -120 o: 610 x: 88 d: -0d120 o: 0o610 x: 0x88 + d: -119 o: 611 x: 89 d: -0d119 o: 0o611 x: 0x89 + d: -118 o: 612 x: 8a d: -0d118 o: 0o612 x: 0x8a + d: -117 o: 613 x: 8b d: -0d117 o: 0o613 x: 0x8b + d: -116 o: 614 x: 8c d: -0d116 o: 0o614 x: 0x8c + d: -115 o: 615 x: 8d d: -0d115 o: 0o615 x: 0x8d + d: -114 o: 616 x: 8e d: -0d114 o: 0o616 x: 0x8e + d: -113 o: 617 x: 8f d: -0d113 o: 0o617 x: 0x8f + d: -112 o: 620 x: 90 d: -0d112 o: 0o620 x: 0x90 + d: -111 o: 621 x: 91 d: -0d111 o: 0o621 x: 0x91 + d: -110 o: 622 x: 92 d: -0d110 o: 0o622 x: 0x92 + d: -109 o: 623 x: 93 d: -0d109 o: 0o623 x: 0x93 + d: -108 o: 624 x: 94 d: -0d108 o: 0o624 x: 0x94 + d: -107 o: 625 x: 95 d: -0d107 o: 0o625 x: 0x95 + d: -106 o: 626 x: 96 d: -0d106 o: 0o626 x: 0x96 + d: -105 o: 627 x: 97 d: -0d105 o: 0o627 x: 0x97 + d: -104 o: 630 x: 98 d: -0d104 o: 0o630 x: 0x98 + d: -103 o: 631 x: 99 d: -0d103 o: 0o631 x: 0x99 + d: -102 o: 632 x: 9a d: -0d102 o: 0o632 x: 0x9a + d: -101 o: 633 x: 9b d: -0d101 o: 0o633 x: 0x9b + d: -100 o: 634 x: 9c d: -0d100 o: 0o634 x: 0x9c + d: -99 o: 635 x: 9d d: -0d99 o: 0o635 x: 0x9d + d: -98 o: 636 x: 9e d: -0d98 o: 0o636 x: 0x9e + d: -97 o: 637 x: 9f d: -0d97 o: 0o637 x: 0x9f + d: -96 o: 640 x: a0 d: -0d96 o: 0o640 x: 0xa0 + d: -95 o: 641 x: a1 d: -0d95 o: 0o641 x: 0xa1 + d: -94 o: 642 x: a2 d: -0d94 o: 0o642 x: 0xa2 + d: -93 o: 643 x: a3 d: -0d93 o: 0o643 x: 0xa3 + d: -92 o: 644 x: a4 d: -0d92 o: 0o644 x: 0xa4 + d: -91 o: 645 x: a5 d: -0d91 o: 0o645 x: 0xa5 + d: -90 o: 646 x: a6 d: -0d90 o: 0o646 x: 0xa6 + d: -89 o: 647 x: a7 d: -0d89 o: 0o647 x: 0xa7 + d: -88 o: 650 x: a8 d: -0d88 o: 0o650 x: 0xa8 + d: -87 o: 651 x: a9 d: -0d87 o: 0o651 x: 0xa9 + d: -86 o: 652 x: aa d: -0d86 o: 0o652 x: 0xaa + d: -85 o: 653 x: ab d: -0d85 o: 0o653 x: 0xab + d: -84 o: 654 x: ac d: -0d84 o: 0o654 x: 0xac + d: -83 o: 655 x: ad d: -0d83 o: 0o655 x: 0xad + d: -82 o: 656 x: ae d: -0d82 o: 0o656 x: 0xae + d: -81 o: 657 x: af d: -0d81 o: 0o657 x: 0xaf + d: -80 o: 660 x: b0 d: -0d80 o: 0o660 x: 0xb0 + d: -79 o: 661 x: b1 d: -0d79 o: 0o661 x: 0xb1 + d: -78 o: 662 x: b2 d: -0d78 o: 0o662 x: 0xb2 + d: -77 o: 663 x: b3 d: -0d77 o: 0o663 x: 0xb3 + d: -76 o: 664 x: b4 d: -0d76 o: 0o664 x: 0xb4 + d: -75 o: 665 x: b5 d: -0d75 o: 0o665 x: 0xb5 + d: -74 o: 666 x: b6 d: -0d74 o: 0o666 x: 0xb6 + d: -73 o: 667 x: b7 d: -0d73 o: 0o667 x: 0xb7 + d: -72 o: 670 x: b8 d: -0d72 o: 0o670 x: 0xb8 + d: -71 o: 671 x: b9 d: -0d71 o: 0o671 x: 0xb9 + d: -70 o: 672 x: ba d: -0d70 o: 0o672 x: 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0o313 x: 0x0cb + d: 204 o: 314 x: 0cc d: 0d204 o: 0o314 x: 0x0cc + d: 205 o: 315 x: 0cd d: 0d205 o: 0o315 x: 0x0cd + d: 206 o: 316 x: 0ce d: 0d206 o: 0o316 x: 0x0ce + d: 207 o: 317 x: 0cf d: 0d207 o: 0o317 x: 0x0cf + d: 208 o: 320 x: 0d0 d: 0d208 o: 0o320 x: 0x0d0 + d: 209 o: 321 x: 0d1 d: 0d209 o: 0o321 x: 0x0d1 + d: 210 o: 322 x: 0d2 d: 0d210 o: 0o322 x: 0x0d2 + d: 211 o: 323 x: 0d3 d: 0d211 o: 0o323 x: 0x0d3 + d: 212 o: 324 x: 0d4 d: 0d212 o: 0o324 x: 0x0d4 + d: 213 o: 325 x: 0d5 d: 0d213 o: 0o325 x: 0x0d5 + d: 214 o: 326 x: 0d6 d: 0d214 o: 0o326 x: 0x0d6 + d: 215 o: 327 x: 0d7 d: 0d215 o: 0o327 x: 0x0d7 + d: 216 o: 330 x: 0d8 d: 0d216 o: 0o330 x: 0x0d8 + d: 217 o: 331 x: 0d9 d: 0d217 o: 0o331 x: 0x0d9 + d: 218 o: 332 x: 0da d: 0d218 o: 0o332 x: 0x0da + d: 219 o: 333 x: 0db d: 0d219 o: 0o333 x: 0x0db + d: 220 o: 334 x: 0dc d: 0d220 o: 0o334 x: 0x0dc + d: 221 o: 335 x: 0dd d: 0d221 o: 0o335 x: 0x0dd + d: 222 o: 336 x: 0de d: 0d222 o: 0o336 x: 0x0de + d: 223 o: 337 x: 0df d: 0d223 o: 0o337 x: 0x0df + d: 224 o: 340 x: 0e0 d: 0d224 o: 0o340 x: 0x0e0 + d: 225 o: 341 x: 0e1 d: 0d225 o: 0o341 x: 0x0e1 + d: 226 o: 342 x: 0e2 d: 0d226 o: 0o342 x: 0x0e2 + d: 227 o: 343 x: 0e3 d: 0d227 o: 0o343 x: 0x0e3 + d: 228 o: 344 x: 0e4 d: 0d228 o: 0o344 x: 0x0e4 + d: 229 o: 345 x: 0e5 d: 0d229 o: 0o345 x: 0x0e5 + d: 230 o: 346 x: 0e6 d: 0d230 o: 0o346 x: 0x0e6 + d: 231 o: 347 x: 0e7 d: 0d231 o: 0o347 x: 0x0e7 + d: 232 o: 350 x: 0e8 d: 0d232 o: 0o350 x: 0x0e8 + d: 233 o: 351 x: 0e9 d: 0d233 o: 0o351 x: 0x0e9 + d: 234 o: 352 x: 0ea d: 0d234 o: 0o352 x: 0x0ea + d: 235 o: 353 x: 0eb d: 0d235 o: 0o353 x: 0x0eb + d: 236 o: 354 x: 0ec d: 0d236 o: 0o354 x: 0x0ec + d: 237 o: 355 x: 0ed d: 0d237 o: 0o355 x: 0x0ed + d: 238 o: 356 x: 0ee d: 0d238 o: 0o356 x: 0x0ee + d: 239 o: 357 x: 0ef d: 0d239 o: 0o357 x: 0x0ef + d: 240 o: 360 x: 0f0 d: 0d240 o: 0o360 x: 0x0f0 + d: 241 o: 361 x: 0f1 d: 0d241 o: 0o361 x: 0x0f1 + d: 242 o: 362 x: 0f2 d: 0d242 o: 0o362 x: 0x0f2 + d: 243 o: 363 x: 0f3 d: 0d243 o: 0o363 x: 0x0f3 + d: 244 o: 364 x: 0f4 d: 0d244 o: 0o364 x: 0x0f4 + d: 245 o: 365 x: 0f5 d: 0d245 o: 0o365 x: 0x0f5 + d: 246 o: 366 x: 0f6 d: 0d246 o: 0o366 x: 0x0f6 + d: 247 o: 367 x: 0f7 d: 0d247 o: 0o367 x: 0x0f7 + d: 248 o: 370 x: 0f8 d: 0d248 o: 0o370 x: 0x0f8 + d: 249 o: 371 x: 0f9 d: 0d249 o: 0o371 x: 0x0f9 + d: 250 o: 372 x: 0fa d: 0d250 o: 0o372 x: 0x0fa + d: 251 o: 373 x: 0fb d: 0d251 o: 0o373 x: 0x0fb + d: 252 o: 374 x: 0fc d: 0d252 o: 0o374 x: 0x0fc + d: 253 o: 375 x: 0fd d: 0d253 o: 0o375 x: 0x0fd + d: 254 o: 376 x: 0fe d: 0d254 o: 0o376 x: 0x0fe + d: 255 o: 377 x: 0ff d: 0d255 o: 0o377 x: 0x0ff + +sc_lv<8> + d: 00000000 o: 000 x: 000 d: 00000000 o: 0o000 x: 0x000 + d: 00000001 o: 001 x: 001 d: 00000001 o: 0o001 x: 0x001 + d: 00000010 o: 002 x: 002 d: 00000010 o: 0o002 x: 0x002 + d: 00000011 o: 003 x: 003 d: 00000011 o: 0o003 x: 0x003 + d: 00000100 o: 004 x: 004 d: 00000100 o: 0o004 x: 0x004 + d: 00000101 o: 005 x: 005 d: 00000101 o: 0o005 x: 0x005 + d: 00000110 o: 006 x: 006 d: 00000110 o: 0o006 x: 0x006 + d: 00000111 o: 007 x: 007 d: 00000111 o: 0o007 x: 0x007 + d: 00001000 o: 010 x: 008 d: 00001000 o: 0o010 x: 0x008 + d: 00001001 o: 011 x: 009 d: 00001001 o: 0o011 x: 0x009 + d: 00001010 o: 012 x: 00a d: 00001010 o: 0o012 x: 0x00a + d: 00001011 o: 013 x: 00b d: 00001011 o: 0o013 x: 0x00b + d: 00001100 o: 014 x: 00c d: 00001100 o: 0o014 x: 0x00c + d: 00001101 o: 015 x: 00d d: 00001101 o: 0o015 x: 0x00d + d: 00001110 o: 016 x: 00e d: 00001110 o: 0o016 x: 0x00e + d: 00001111 o: 017 x: 00f d: 00001111 o: 0o017 x: 0x00f + d: 00010000 o: 020 x: 010 d: 00010000 o: 0o020 x: 0x010 + d: 00010001 o: 021 x: 011 d: 00010001 o: 0o021 x: 0x011 + d: 00010010 o: 022 x: 012 d: 00010010 o: 0o022 x: 0x012 + d: 00010011 o: 023 x: 013 d: 00010011 o: 0o023 x: 0x013 + d: 00010100 o: 024 x: 014 d: 00010100 o: 0o024 x: 0x014 + d: 00010101 o: 025 x: 015 d: 00010101 o: 0o025 x: 0x015 + d: 00010110 o: 026 x: 016 d: 00010110 o: 0o026 x: 0x016 + d: 00010111 o: 027 x: 017 d: 00010111 o: 0o027 x: 0x017 + d: 00011000 o: 030 x: 018 d: 00011000 o: 0o030 x: 0x018 + d: 00011001 o: 031 x: 019 d: 00011001 o: 0o031 x: 0x019 + d: 00011010 o: 032 x: 01a d: 00011010 o: 0o032 x: 0x01a + d: 00011011 o: 033 x: 01b d: 00011011 o: 0o033 x: 0x01b + d: 00011100 o: 034 x: 01c d: 00011100 o: 0o034 x: 0x01c + d: 00011101 o: 035 x: 01d d: 00011101 o: 0o035 x: 0x01d + d: 00011110 o: 036 x: 01e d: 00011110 o: 0o036 x: 0x01e + d: 00011111 o: 037 x: 01f d: 00011111 o: 0o037 x: 0x01f + d: 00100000 o: 040 x: 020 d: 00100000 o: 0o040 x: 0x020 + d: 00100001 o: 041 x: 021 d: 00100001 o: 0o041 x: 0x021 + d: 00100010 o: 042 x: 022 d: 00100010 o: 0o042 x: 0x022 + d: 00100011 o: 043 x: 023 d: 00100011 o: 0o043 x: 0x023 + d: 00100100 o: 044 x: 024 d: 00100100 o: 0o044 x: 0x024 + d: 00100101 o: 045 x: 025 d: 00100101 o: 0o045 x: 0x025 + d: 00100110 o: 046 x: 026 d: 00100110 o: 0o046 x: 0x026 + d: 00100111 o: 047 x: 027 d: 00100111 o: 0o047 x: 0x027 + d: 00101000 o: 050 x: 028 d: 00101000 o: 0o050 x: 0x028 + d: 00101001 o: 051 x: 029 d: 00101001 o: 0o051 x: 0x029 + d: 00101010 o: 052 x: 02a d: 00101010 o: 0o052 x: 0x02a + d: 00101011 o: 053 x: 02b d: 00101011 o: 0o053 x: 0x02b + d: 00101100 o: 054 x: 02c d: 00101100 o: 0o054 x: 0x02c + d: 00101101 o: 055 x: 02d d: 00101101 o: 0o055 x: 0x02d + d: 00101110 o: 056 x: 02e d: 00101110 o: 0o056 x: 0x02e + d: 00101111 o: 057 x: 02f d: 00101111 o: 0o057 x: 0x02f + d: 00110000 o: 060 x: 030 d: 00110000 o: 0o060 x: 0x030 + d: 00110001 o: 061 x: 031 d: 00110001 o: 0o061 x: 0x031 + d: 00110010 o: 062 x: 032 d: 00110010 o: 0o062 x: 0x032 + d: 00110011 o: 063 x: 033 d: 00110011 o: 0o063 x: 0x033 + d: 00110100 o: 064 x: 034 d: 00110100 o: 0o064 x: 0x034 + d: 00110101 o: 065 x: 035 d: 00110101 o: 0o065 x: 0x035 + d: 00110110 o: 066 x: 036 d: 00110110 o: 0o066 x: 0x036 + d: 00110111 o: 067 x: 037 d: 00110111 o: 0o067 x: 0x037 + d: 00111000 o: 070 x: 038 d: 00111000 o: 0o070 x: 0x038 + d: 00111001 o: 071 x: 039 d: 00111001 o: 0o071 x: 0x039 + d: 00111010 o: 072 x: 03a d: 00111010 o: 0o072 x: 0x03a + d: 00111011 o: 073 x: 03b d: 00111011 o: 0o073 x: 0x03b + d: 00111100 o: 074 x: 03c d: 00111100 o: 0o074 x: 0x03c + d: 00111101 o: 075 x: 03d d: 00111101 o: 0o075 x: 0x03d + d: 00111110 o: 076 x: 03e d: 00111110 o: 0o076 x: 0x03e + d: 00111111 o: 077 x: 03f d: 00111111 o: 0o077 x: 0x03f + d: 01000000 o: 100 x: 040 d: 01000000 o: 0o100 x: 0x040 + d: 01000001 o: 101 x: 041 d: 01000001 o: 0o101 x: 0x041 + d: 01000010 o: 102 x: 042 d: 01000010 o: 0o102 x: 0x042 + d: 01000011 o: 103 x: 043 d: 01000011 o: 0o103 x: 0x043 + d: 01000100 o: 104 x: 044 d: 01000100 o: 0o104 x: 0x044 + d: 01000101 o: 105 x: 045 d: 01000101 o: 0o105 x: 0x045 + d: 01000110 o: 106 x: 046 d: 01000110 o: 0o106 x: 0x046 + d: 01000111 o: 107 x: 047 d: 01000111 o: 0o107 x: 0x047 + d: 01001000 o: 110 x: 048 d: 01001000 o: 0o110 x: 0x048 + d: 01001001 o: 111 x: 049 d: 01001001 o: 0o111 x: 0x049 + d: 01001010 o: 112 x: 04a d: 01001010 o: 0o112 x: 0x04a + d: 01001011 o: 113 x: 04b d: 01001011 o: 0o113 x: 0x04b + d: 01001100 o: 114 x: 04c d: 01001100 o: 0o114 x: 0x04c + d: 01001101 o: 115 x: 04d d: 01001101 o: 0o115 x: 0x04d + d: 01001110 o: 116 x: 04e d: 01001110 o: 0o116 x: 0x04e + d: 01001111 o: 117 x: 04f d: 01001111 o: 0o117 x: 0x04f + d: 01010000 o: 120 x: 050 d: 01010000 o: 0o120 x: 0x050 + d: 01010001 o: 121 x: 051 d: 01010001 o: 0o121 x: 0x051 + d: 01010010 o: 122 x: 052 d: 01010010 o: 0o122 x: 0x052 + d: 01010011 o: 123 x: 053 d: 01010011 o: 0o123 x: 0x053 + d: 01010100 o: 124 x: 054 d: 01010100 o: 0o124 x: 0x054 + d: 01010101 o: 125 x: 055 d: 01010101 o: 0o125 x: 0x055 + d: 01010110 o: 126 x: 056 d: 01010110 o: 0o126 x: 0x056 + d: 01010111 o: 127 x: 057 d: 01010111 o: 0o127 x: 0x057 + d: 01011000 o: 130 x: 058 d: 01011000 o: 0o130 x: 0x058 + d: 01011001 o: 131 x: 059 d: 01011001 o: 0o131 x: 0x059 + d: 01011010 o: 132 x: 05a d: 01011010 o: 0o132 x: 0x05a + d: 01011011 o: 133 x: 05b d: 01011011 o: 0o133 x: 0x05b + d: 01011100 o: 134 x: 05c d: 01011100 o: 0o134 x: 0x05c + d: 01011101 o: 135 x: 05d d: 01011101 o: 0o135 x: 0x05d + d: 01011110 o: 136 x: 05e d: 01011110 o: 0o136 x: 0x05e + d: 01011111 o: 137 x: 05f d: 01011111 o: 0o137 x: 0x05f + d: 01100000 o: 140 x: 060 d: 01100000 o: 0o140 x: 0x060 + d: 01100001 o: 141 x: 061 d: 01100001 o: 0o141 x: 0x061 + d: 01100010 o: 142 x: 062 d: 01100010 o: 0o142 x: 0x062 + d: 01100011 o: 143 x: 063 d: 01100011 o: 0o143 x: 0x063 + d: 01100100 o: 144 x: 064 d: 01100100 o: 0o144 x: 0x064 + d: 01100101 o: 145 x: 065 d: 01100101 o: 0o145 x: 0x065 + d: 01100110 o: 146 x: 066 d: 01100110 o: 0o146 x: 0x066 + d: 01100111 o: 147 x: 067 d: 01100111 o: 0o147 x: 0x067 + d: 01101000 o: 150 x: 068 d: 01101000 o: 0o150 x: 0x068 + d: 01101001 o: 151 x: 069 d: 01101001 o: 0o151 x: 0x069 + d: 01101010 o: 152 x: 06a d: 01101010 o: 0o152 x: 0x06a + d: 01101011 o: 153 x: 06b d: 01101011 o: 0o153 x: 0x06b + d: 01101100 o: 154 x: 06c d: 01101100 o: 0o154 x: 0x06c + d: 01101101 o: 155 x: 06d d: 01101101 o: 0o155 x: 0x06d + d: 01101110 o: 156 x: 06e d: 01101110 o: 0o156 x: 0x06e + d: 01101111 o: 157 x: 06f d: 01101111 o: 0o157 x: 0x06f + d: 01110000 o: 160 x: 070 d: 01110000 o: 0o160 x: 0x070 + d: 01110001 o: 161 x: 071 d: 01110001 o: 0o161 x: 0x071 + d: 01110010 o: 162 x: 072 d: 01110010 o: 0o162 x: 0x072 + d: 01110011 o: 163 x: 073 d: 01110011 o: 0o163 x: 0x073 + d: 01110100 o: 164 x: 074 d: 01110100 o: 0o164 x: 0x074 + d: 01110101 o: 165 x: 075 d: 01110101 o: 0o165 x: 0x075 + d: 01110110 o: 166 x: 076 d: 01110110 o: 0o166 x: 0x076 + d: 01110111 o: 167 x: 077 d: 01110111 o: 0o167 x: 0x077 + d: 01111000 o: 170 x: 078 d: 01111000 o: 0o170 x: 0x078 + d: 01111001 o: 171 x: 079 d: 01111001 o: 0o171 x: 0x079 + d: 01111010 o: 172 x: 07a d: 01111010 o: 0o172 x: 0x07a + d: 01111011 o: 173 x: 07b d: 01111011 o: 0o173 x: 0x07b + d: 01111100 o: 174 x: 07c d: 01111100 o: 0o174 x: 0x07c + d: 01111101 o: 175 x: 07d d: 01111101 o: 0o175 x: 0x07d + d: 01111110 o: 176 x: 07e d: 01111110 o: 0o176 x: 0x07e + d: 01111111 o: 177 x: 07f d: 01111111 o: 0o177 x: 0x07f + d: 10000000 o: 200 x: 080 d: 10000000 o: 0o200 x: 0x080 + d: 10000001 o: 201 x: 081 d: 10000001 o: 0o201 x: 0x081 + d: 10000010 o: 202 x: 082 d: 10000010 o: 0o202 x: 0x082 + d: 10000011 o: 203 x: 083 d: 10000011 o: 0o203 x: 0x083 + d: 10000100 o: 204 x: 084 d: 10000100 o: 0o204 x: 0x084 + d: 10000101 o: 205 x: 085 d: 10000101 o: 0o205 x: 0x085 + d: 10000110 o: 206 x: 086 d: 10000110 o: 0o206 x: 0x086 + d: 10000111 o: 207 x: 087 d: 10000111 o: 0o207 x: 0x087 + d: 10001000 o: 210 x: 088 d: 10001000 o: 0o210 x: 0x088 + d: 10001001 o: 211 x: 089 d: 10001001 o: 0o211 x: 0x089 + d: 10001010 o: 212 x: 08a d: 10001010 o: 0o212 x: 0x08a + d: 10001011 o: 213 x: 08b d: 10001011 o: 0o213 x: 0x08b + d: 10001100 o: 214 x: 08c d: 10001100 o: 0o214 x: 0x08c + d: 10001101 o: 215 x: 08d d: 10001101 o: 0o215 x: 0x08d + d: 10001110 o: 216 x: 08e d: 10001110 o: 0o216 x: 0x08e + d: 10001111 o: 217 x: 08f d: 10001111 o: 0o217 x: 0x08f + d: 10010000 o: 220 x: 090 d: 10010000 o: 0o220 x: 0x090 + d: 10010001 o: 221 x: 091 d: 10010001 o: 0o221 x: 0x091 + d: 10010010 o: 222 x: 092 d: 10010010 o: 0o222 x: 0x092 + d: 10010011 o: 223 x: 093 d: 10010011 o: 0o223 x: 0x093 + d: 10010100 o: 224 x: 094 d: 10010100 o: 0o224 x: 0x094 + d: 10010101 o: 225 x: 095 d: 10010101 o: 0o225 x: 0x095 + d: 10010110 o: 226 x: 096 d: 10010110 o: 0o226 x: 0x096 + d: 10010111 o: 227 x: 097 d: 10010111 o: 0o227 x: 0x097 + d: 10011000 o: 230 x: 098 d: 10011000 o: 0o230 x: 0x098 + d: 10011001 o: 231 x: 099 d: 10011001 o: 0o231 x: 0x099 + d: 10011010 o: 232 x: 09a d: 10011010 o: 0o232 x: 0x09a + d: 10011011 o: 233 x: 09b d: 10011011 o: 0o233 x: 0x09b + d: 10011100 o: 234 x: 09c d: 10011100 o: 0o234 x: 0x09c + d: 10011101 o: 235 x: 09d d: 10011101 o: 0o235 x: 0x09d + d: 10011110 o: 236 x: 09e d: 10011110 o: 0o236 x: 0x09e + d: 10011111 o: 237 x: 09f d: 10011111 o: 0o237 x: 0x09f + d: 10100000 o: 240 x: 0a0 d: 10100000 o: 0o240 x: 0x0a0 + d: 10100001 o: 241 x: 0a1 d: 10100001 o: 0o241 x: 0x0a1 + d: 10100010 o: 242 x: 0a2 d: 10100010 o: 0o242 x: 0x0a2 + d: 10100011 o: 243 x: 0a3 d: 10100011 o: 0o243 x: 0x0a3 + d: 10100100 o: 244 x: 0a4 d: 10100100 o: 0o244 x: 0x0a4 + d: 10100101 o: 245 x: 0a5 d: 10100101 o: 0o245 x: 0x0a5 + d: 10100110 o: 246 x: 0a6 d: 10100110 o: 0o246 x: 0x0a6 + d: 10100111 o: 247 x: 0a7 d: 10100111 o: 0o247 x: 0x0a7 + d: 10101000 o: 250 x: 0a8 d: 10101000 o: 0o250 x: 0x0a8 + d: 10101001 o: 251 x: 0a9 d: 10101001 o: 0o251 x: 0x0a9 + d: 10101010 o: 252 x: 0aa d: 10101010 o: 0o252 x: 0x0aa + d: 10101011 o: 253 x: 0ab d: 10101011 o: 0o253 x: 0x0ab + d: 10101100 o: 254 x: 0ac d: 10101100 o: 0o254 x: 0x0ac + d: 10101101 o: 255 x: 0ad d: 10101101 o: 0o255 x: 0x0ad + d: 10101110 o: 256 x: 0ae d: 10101110 o: 0o256 x: 0x0ae + d: 10101111 o: 257 x: 0af d: 10101111 o: 0o257 x: 0x0af + d: 10110000 o: 260 x: 0b0 d: 10110000 o: 0o260 x: 0x0b0 + d: 10110001 o: 261 x: 0b1 d: 10110001 o: 0o261 x: 0x0b1 + d: 10110010 o: 262 x: 0b2 d: 10110010 o: 0o262 x: 0x0b2 + d: 10110011 o: 263 x: 0b3 d: 10110011 o: 0o263 x: 0x0b3 + d: 10110100 o: 264 x: 0b4 d: 10110100 o: 0o264 x: 0x0b4 + d: 10110101 o: 265 x: 0b5 d: 10110101 o: 0o265 x: 0x0b5 + d: 10110110 o: 266 x: 0b6 d: 10110110 o: 0o266 x: 0x0b6 + d: 10110111 o: 267 x: 0b7 d: 10110111 o: 0o267 x: 0x0b7 + d: 10111000 o: 270 x: 0b8 d: 10111000 o: 0o270 x: 0x0b8 + d: 10111001 o: 271 x: 0b9 d: 10111001 o: 0o271 x: 0x0b9 + d: 10111010 o: 272 x: 0ba d: 10111010 o: 0o272 x: 0x0ba + d: 10111011 o: 273 x: 0bb d: 10111011 o: 0o273 x: 0x0bb + d: 10111100 o: 274 x: 0bc d: 10111100 o: 0o274 x: 0x0bc + d: 10111101 o: 275 x: 0bd d: 10111101 o: 0o275 x: 0x0bd + d: 10111110 o: 276 x: 0be d: 10111110 o: 0o276 x: 0x0be + d: 10111111 o: 277 x: 0bf d: 10111111 o: 0o277 x: 0x0bf + d: 11000000 o: 300 x: 0c0 d: 11000000 o: 0o300 x: 0x0c0 + d: 11000001 o: 301 x: 0c1 d: 11000001 o: 0o301 x: 0x0c1 + d: 11000010 o: 302 x: 0c2 d: 11000010 o: 0o302 x: 0x0c2 + d: 11000011 o: 303 x: 0c3 d: 11000011 o: 0o303 x: 0x0c3 + d: 11000100 o: 304 x: 0c4 d: 11000100 o: 0o304 x: 0x0c4 + d: 11000101 o: 305 x: 0c5 d: 11000101 o: 0o305 x: 0x0c5 + d: 11000110 o: 306 x: 0c6 d: 11000110 o: 0o306 x: 0x0c6 + d: 11000111 o: 307 x: 0c7 d: 11000111 o: 0o307 x: 0x0c7 + d: 11001000 o: 310 x: 0c8 d: 11001000 o: 0o310 x: 0x0c8 + d: 11001001 o: 311 x: 0c9 d: 11001001 o: 0o311 x: 0x0c9 + d: 11001010 o: 312 x: 0ca d: 11001010 o: 0o312 x: 0x0ca + d: 11001011 o: 313 x: 0cb d: 11001011 o: 0o313 x: 0x0cb + d: 11001100 o: 314 x: 0cc d: 11001100 o: 0o314 x: 0x0cc + d: 11001101 o: 315 x: 0cd d: 11001101 o: 0o315 x: 0x0cd + d: 11001110 o: 316 x: 0ce d: 11001110 o: 0o316 x: 0x0ce + d: 11001111 o: 317 x: 0cf d: 11001111 o: 0o317 x: 0x0cf + d: 11010000 o: 320 x: 0d0 d: 11010000 o: 0o320 x: 0x0d0 + d: 11010001 o: 321 x: 0d1 d: 11010001 o: 0o321 x: 0x0d1 + d: 11010010 o: 322 x: 0d2 d: 11010010 o: 0o322 x: 0x0d2 + d: 11010011 o: 323 x: 0d3 d: 11010011 o: 0o323 x: 0x0d3 + d: 11010100 o: 324 x: 0d4 d: 11010100 o: 0o324 x: 0x0d4 + d: 11010101 o: 325 x: 0d5 d: 11010101 o: 0o325 x: 0x0d5 + d: 11010110 o: 326 x: 0d6 d: 11010110 o: 0o326 x: 0x0d6 + d: 11010111 o: 327 x: 0d7 d: 11010111 o: 0o327 x: 0x0d7 + d: 11011000 o: 330 x: 0d8 d: 11011000 o: 0o330 x: 0x0d8 + d: 11011001 o: 331 x: 0d9 d: 11011001 o: 0o331 x: 0x0d9 + d: 11011010 o: 332 x: 0da d: 11011010 o: 0o332 x: 0x0da + d: 11011011 o: 333 x: 0db d: 11011011 o: 0o333 x: 0x0db + d: 11011100 o: 334 x: 0dc d: 11011100 o: 0o334 x: 0x0dc + d: 11011101 o: 335 x: 0dd d: 11011101 o: 0o335 x: 0x0dd + d: 11011110 o: 336 x: 0de d: 11011110 o: 0o336 x: 0x0de + d: 11011111 o: 337 x: 0df d: 11011111 o: 0o337 x: 0x0df + d: 11100000 o: 340 x: 0e0 d: 11100000 o: 0o340 x: 0x0e0 + d: 11100001 o: 341 x: 0e1 d: 11100001 o: 0o341 x: 0x0e1 + d: 11100010 o: 342 x: 0e2 d: 11100010 o: 0o342 x: 0x0e2 + d: 11100011 o: 343 x: 0e3 d: 11100011 o: 0o343 x: 0x0e3 + d: 11100100 o: 344 x: 0e4 d: 11100100 o: 0o344 x: 0x0e4 + d: 11100101 o: 345 x: 0e5 d: 11100101 o: 0o345 x: 0x0e5 + d: 11100110 o: 346 x: 0e6 d: 11100110 o: 0o346 x: 0x0e6 + d: 11100111 o: 347 x: 0e7 d: 11100111 o: 0o347 x: 0x0e7 + d: 11101000 o: 350 x: 0e8 d: 11101000 o: 0o350 x: 0x0e8 + d: 11101001 o: 351 x: 0e9 d: 11101001 o: 0o351 x: 0x0e9 + d: 11101010 o: 352 x: 0ea d: 11101010 o: 0o352 x: 0x0ea + d: 11101011 o: 353 x: 0eb d: 11101011 o: 0o353 x: 0x0eb + d: 11101100 o: 354 x: 0ec d: 11101100 o: 0o354 x: 0x0ec + d: 11101101 o: 355 x: 0ed d: 11101101 o: 0o355 x: 0x0ed + d: 11101110 o: 356 x: 0ee d: 11101110 o: 0o356 x: 0x0ee + d: 11101111 o: 357 x: 0ef d: 11101111 o: 0o357 x: 0x0ef + d: 11110000 o: 360 x: 0f0 d: 11110000 o: 0o360 x: 0x0f0 + d: 11110001 o: 361 x: 0f1 d: 11110001 o: 0o361 x: 0x0f1 + d: 11110010 o: 362 x: 0f2 d: 11110010 o: 0o362 x: 0x0f2 + d: 11110011 o: 363 x: 0f3 d: 11110011 o: 0o363 x: 0x0f3 + d: 11110100 o: 364 x: 0f4 d: 11110100 o: 0o364 x: 0x0f4 + d: 11110101 o: 365 x: 0f5 d: 11110101 o: 0o365 x: 0x0f5 + d: 11110110 o: 366 x: 0f6 d: 11110110 o: 0o366 x: 0x0f6 + d: 11110111 o: 367 x: 0f7 d: 11110111 o: 0o367 x: 0x0f7 + d: 11111000 o: 370 x: 0f8 d: 11111000 o: 0o370 x: 0x0f8 + d: 11111001 o: 371 x: 0f9 d: 11111001 o: 0o371 x: 0x0f9 + d: 11111010 o: 372 x: 0fa d: 11111010 o: 0o372 x: 0x0fa + d: 11111011 o: 373 x: 0fb d: 11111011 o: 0o373 x: 0x0fb + d: 11111100 o: 374 x: 0fc d: 11111100 o: 0o374 x: 0x0fc + d: 11111101 o: 375 x: 0fd d: 11111101 o: 0o375 x: 0x0fd + d: 11111110 o: 376 x: 0fe d: 11111110 o: 0o376 x: 0x0fe + d: 11111111 o: 377 x: 0ff d: 11111111 o: 0o377 x: 0x0ff + +sc_bv<8> + d: 00000000 o: 000 x: 000 d: 00000000 o: 0o000 x: 0x000 + d: 00000001 o: 001 x: 001 d: 00000001 o: 0o001 x: 0x001 + d: 00000010 o: 002 x: 002 d: 00000010 o: 0o002 x: 0x002 + d: 00000011 o: 003 x: 003 d: 00000011 o: 0o003 x: 0x003 + d: 00000100 o: 004 x: 004 d: 00000100 o: 0o004 x: 0x004 + d: 00000101 o: 005 x: 005 d: 00000101 o: 0o005 x: 0x005 + d: 00000110 o: 006 x: 006 d: 00000110 o: 0o006 x: 0x006 + d: 00000111 o: 007 x: 007 d: 00000111 o: 0o007 x: 0x007 + d: 00001000 o: 010 x: 008 d: 00001000 o: 0o010 x: 0x008 + d: 00001001 o: 011 x: 009 d: 00001001 o: 0o011 x: 0x009 + d: 00001010 o: 012 x: 00a d: 00001010 o: 0o012 x: 0x00a + d: 00001011 o: 013 x: 00b d: 00001011 o: 0o013 x: 0x00b + d: 00001100 o: 014 x: 00c d: 00001100 o: 0o014 x: 0x00c + d: 00001101 o: 015 x: 00d d: 00001101 o: 0o015 x: 0x00d + d: 00001110 o: 016 x: 00e d: 00001110 o: 0o016 x: 0x00e + d: 00001111 o: 017 x: 00f d: 00001111 o: 0o017 x: 0x00f + d: 00010000 o: 020 x: 010 d: 00010000 o: 0o020 x: 0x010 + d: 00010001 o: 021 x: 011 d: 00010001 o: 0o021 x: 0x011 + d: 00010010 o: 022 x: 012 d: 00010010 o: 0o022 x: 0x012 + d: 00010011 o: 023 x: 013 d: 00010011 o: 0o023 x: 0x013 + d: 00010100 o: 024 x: 014 d: 00010100 o: 0o024 x: 0x014 + d: 00010101 o: 025 x: 015 d: 00010101 o: 0o025 x: 0x015 + d: 00010110 o: 026 x: 016 d: 00010110 o: 0o026 x: 0x016 + d: 00010111 o: 027 x: 017 d: 00010111 o: 0o027 x: 0x017 + d: 00011000 o: 030 x: 018 d: 00011000 o: 0o030 x: 0x018 + d: 00011001 o: 031 x: 019 d: 00011001 o: 0o031 x: 0x019 + d: 00011010 o: 032 x: 01a d: 00011010 o: 0o032 x: 0x01a + d: 00011011 o: 033 x: 01b d: 00011011 o: 0o033 x: 0x01b + d: 00011100 o: 034 x: 01c d: 00011100 o: 0o034 x: 0x01c + d: 00011101 o: 035 x: 01d d: 00011101 o: 0o035 x: 0x01d + d: 00011110 o: 036 x: 01e d: 00011110 o: 0o036 x: 0x01e + d: 00011111 o: 037 x: 01f d: 00011111 o: 0o037 x: 0x01f + d: 00100000 o: 040 x: 020 d: 00100000 o: 0o040 x: 0x020 + d: 00100001 o: 041 x: 021 d: 00100001 o: 0o041 x: 0x021 + d: 00100010 o: 042 x: 022 d: 00100010 o: 0o042 x: 0x022 + d: 00100011 o: 043 x: 023 d: 00100011 o: 0o043 x: 0x023 + d: 00100100 o: 044 x: 024 d: 00100100 o: 0o044 x: 0x024 + d: 00100101 o: 045 x: 025 d: 00100101 o: 0o045 x: 0x025 + d: 00100110 o: 046 x: 026 d: 00100110 o: 0o046 x: 0x026 + d: 00100111 o: 047 x: 027 d: 00100111 o: 0o047 x: 0x027 + d: 00101000 o: 050 x: 028 d: 00101000 o: 0o050 x: 0x028 + d: 00101001 o: 051 x: 029 d: 00101001 o: 0o051 x: 0x029 + d: 00101010 o: 052 x: 02a d: 00101010 o: 0o052 x: 0x02a + d: 00101011 o: 053 x: 02b d: 00101011 o: 0o053 x: 0x02b + d: 00101100 o: 054 x: 02c d: 00101100 o: 0o054 x: 0x02c + d: 00101101 o: 055 x: 02d d: 00101101 o: 0o055 x: 0x02d + d: 00101110 o: 056 x: 02e d: 00101110 o: 0o056 x: 0x02e + d: 00101111 o: 057 x: 02f d: 00101111 o: 0o057 x: 0x02f + d: 00110000 o: 060 x: 030 d: 00110000 o: 0o060 x: 0x030 + d: 00110001 o: 061 x: 031 d: 00110001 o: 0o061 x: 0x031 + d: 00110010 o: 062 x: 032 d: 00110010 o: 0o062 x: 0x032 + d: 00110011 o: 063 x: 033 d: 00110011 o: 0o063 x: 0x033 + d: 00110100 o: 064 x: 034 d: 00110100 o: 0o064 x: 0x034 + d: 00110101 o: 065 x: 035 d: 00110101 o: 0o065 x: 0x035 + d: 00110110 o: 066 x: 036 d: 00110110 o: 0o066 x: 0x036 + d: 00110111 o: 067 x: 037 d: 00110111 o: 0o067 x: 0x037 + d: 00111000 o: 070 x: 038 d: 00111000 o: 0o070 x: 0x038 + d: 00111001 o: 071 x: 039 d: 00111001 o: 0o071 x: 0x039 + d: 00111010 o: 072 x: 03a d: 00111010 o: 0o072 x: 0x03a + d: 00111011 o: 073 x: 03b d: 00111011 o: 0o073 x: 0x03b + d: 00111100 o: 074 x: 03c d: 00111100 o: 0o074 x: 0x03c + d: 00111101 o: 075 x: 03d d: 00111101 o: 0o075 x: 0x03d + d: 00111110 o: 076 x: 03e d: 00111110 o: 0o076 x: 0x03e + d: 00111111 o: 077 x: 03f d: 00111111 o: 0o077 x: 0x03f + d: 01000000 o: 100 x: 040 d: 01000000 o: 0o100 x: 0x040 + d: 01000001 o: 101 x: 041 d: 01000001 o: 0o101 x: 0x041 + d: 01000010 o: 102 x: 042 d: 01000010 o: 0o102 x: 0x042 + d: 01000011 o: 103 x: 043 d: 01000011 o: 0o103 x: 0x043 + d: 01000100 o: 104 x: 044 d: 01000100 o: 0o104 x: 0x044 + d: 01000101 o: 105 x: 045 d: 01000101 o: 0o105 x: 0x045 + d: 01000110 o: 106 x: 046 d: 01000110 o: 0o106 x: 0x046 + d: 01000111 o: 107 x: 047 d: 01000111 o: 0o107 x: 0x047 + d: 01001000 o: 110 x: 048 d: 01001000 o: 0o110 x: 0x048 + d: 01001001 o: 111 x: 049 d: 01001001 o: 0o111 x: 0x049 + d: 01001010 o: 112 x: 04a d: 01001010 o: 0o112 x: 0x04a + d: 01001011 o: 113 x: 04b d: 01001011 o: 0o113 x: 0x04b + d: 01001100 o: 114 x: 04c d: 01001100 o: 0o114 x: 0x04c + d: 01001101 o: 115 x: 04d d: 01001101 o: 0o115 x: 0x04d + d: 01001110 o: 116 x: 04e d: 01001110 o: 0o116 x: 0x04e + d: 01001111 o: 117 x: 04f d: 01001111 o: 0o117 x: 0x04f + d: 01010000 o: 120 x: 050 d: 01010000 o: 0o120 x: 0x050 + d: 01010001 o: 121 x: 051 d: 01010001 o: 0o121 x: 0x051 + d: 01010010 o: 122 x: 052 d: 01010010 o: 0o122 x: 0x052 + d: 01010011 o: 123 x: 053 d: 01010011 o: 0o123 x: 0x053 + d: 01010100 o: 124 x: 054 d: 01010100 o: 0o124 x: 0x054 + d: 01010101 o: 125 x: 055 d: 01010101 o: 0o125 x: 0x055 + d: 01010110 o: 126 x: 056 d: 01010110 o: 0o126 x: 0x056 + d: 01010111 o: 127 x: 057 d: 01010111 o: 0o127 x: 0x057 + d: 01011000 o: 130 x: 058 d: 01011000 o: 0o130 x: 0x058 + d: 01011001 o: 131 x: 059 d: 01011001 o: 0o131 x: 0x059 + d: 01011010 o: 132 x: 05a d: 01011010 o: 0o132 x: 0x05a + d: 01011011 o: 133 x: 05b d: 01011011 o: 0o133 x: 0x05b + d: 01011100 o: 134 x: 05c d: 01011100 o: 0o134 x: 0x05c + d: 01011101 o: 135 x: 05d d: 01011101 o: 0o135 x: 0x05d + d: 01011110 o: 136 x: 05e d: 01011110 o: 0o136 x: 0x05e + d: 01011111 o: 137 x: 05f d: 01011111 o: 0o137 x: 0x05f + d: 01100000 o: 140 x: 060 d: 01100000 o: 0o140 x: 0x060 + d: 01100001 o: 141 x: 061 d: 01100001 o: 0o141 x: 0x061 + d: 01100010 o: 142 x: 062 d: 01100010 o: 0o142 x: 0x062 + d: 01100011 o: 143 x: 063 d: 01100011 o: 0o143 x: 0x063 + d: 01100100 o: 144 x: 064 d: 01100100 o: 0o144 x: 0x064 + d: 01100101 o: 145 x: 065 d: 01100101 o: 0o145 x: 0x065 + d: 01100110 o: 146 x: 066 d: 01100110 o: 0o146 x: 0x066 + d: 01100111 o: 147 x: 067 d: 01100111 o: 0o147 x: 0x067 + d: 01101000 o: 150 x: 068 d: 01101000 o: 0o150 x: 0x068 + d: 01101001 o: 151 x: 069 d: 01101001 o: 0o151 x: 0x069 + d: 01101010 o: 152 x: 06a d: 01101010 o: 0o152 x: 0x06a + d: 01101011 o: 153 x: 06b d: 01101011 o: 0o153 x: 0x06b + d: 01101100 o: 154 x: 06c d: 01101100 o: 0o154 x: 0x06c + d: 01101101 o: 155 x: 06d d: 01101101 o: 0o155 x: 0x06d + d: 01101110 o: 156 x: 06e d: 01101110 o: 0o156 x: 0x06e + d: 01101111 o: 157 x: 06f d: 01101111 o: 0o157 x: 0x06f + d: 01110000 o: 160 x: 070 d: 01110000 o: 0o160 x: 0x070 + d: 01110001 o: 161 x: 071 d: 01110001 o: 0o161 x: 0x071 + d: 01110010 o: 162 x: 072 d: 01110010 o: 0o162 x: 0x072 + d: 01110011 o: 163 x: 073 d: 01110011 o: 0o163 x: 0x073 + d: 01110100 o: 164 x: 074 d: 01110100 o: 0o164 x: 0x074 + d: 01110101 o: 165 x: 075 d: 01110101 o: 0o165 x: 0x075 + d: 01110110 o: 166 x: 076 d: 01110110 o: 0o166 x: 0x076 + d: 01110111 o: 167 x: 077 d: 01110111 o: 0o167 x: 0x077 + d: 01111000 o: 170 x: 078 d: 01111000 o: 0o170 x: 0x078 + d: 01111001 o: 171 x: 079 d: 01111001 o: 0o171 x: 0x079 + d: 01111010 o: 172 x: 07a d: 01111010 o: 0o172 x: 0x07a + d: 01111011 o: 173 x: 07b d: 01111011 o: 0o173 x: 0x07b + d: 01111100 o: 174 x: 07c d: 01111100 o: 0o174 x: 0x07c + d: 01111101 o: 175 x: 07d d: 01111101 o: 0o175 x: 0x07d + d: 01111110 o: 176 x: 07e d: 01111110 o: 0o176 x: 0x07e + d: 01111111 o: 177 x: 07f d: 01111111 o: 0o177 x: 0x07f + d: 10000000 o: 200 x: 080 d: 10000000 o: 0o200 x: 0x080 + d: 10000001 o: 201 x: 081 d: 10000001 o: 0o201 x: 0x081 + d: 10000010 o: 202 x: 082 d: 10000010 o: 0o202 x: 0x082 + d: 10000011 o: 203 x: 083 d: 10000011 o: 0o203 x: 0x083 + d: 10000100 o: 204 x: 084 d: 10000100 o: 0o204 x: 0x084 + d: 10000101 o: 205 x: 085 d: 10000101 o: 0o205 x: 0x085 + d: 10000110 o: 206 x: 086 d: 10000110 o: 0o206 x: 0x086 + d: 10000111 o: 207 x: 087 d: 10000111 o: 0o207 x: 0x087 + d: 10001000 o: 210 x: 088 d: 10001000 o: 0o210 x: 0x088 + d: 10001001 o: 211 x: 089 d: 10001001 o: 0o211 x: 0x089 + d: 10001010 o: 212 x: 08a d: 10001010 o: 0o212 x: 0x08a + d: 10001011 o: 213 x: 08b d: 10001011 o: 0o213 x: 0x08b + d: 10001100 o: 214 x: 08c d: 10001100 o: 0o214 x: 0x08c + d: 10001101 o: 215 x: 08d d: 10001101 o: 0o215 x: 0x08d + d: 10001110 o: 216 x: 08e d: 10001110 o: 0o216 x: 0x08e + d: 10001111 o: 217 x: 08f d: 10001111 o: 0o217 x: 0x08f + d: 10010000 o: 220 x: 090 d: 10010000 o: 0o220 x: 0x090 + d: 10010001 o: 221 x: 091 d: 10010001 o: 0o221 x: 0x091 + d: 10010010 o: 222 x: 092 d: 10010010 o: 0o222 x: 0x092 + d: 10010011 o: 223 x: 093 d: 10010011 o: 0o223 x: 0x093 + d: 10010100 o: 224 x: 094 d: 10010100 o: 0o224 x: 0x094 + d: 10010101 o: 225 x: 095 d: 10010101 o: 0o225 x: 0x095 + d: 10010110 o: 226 x: 096 d: 10010110 o: 0o226 x: 0x096 + d: 10010111 o: 227 x: 097 d: 10010111 o: 0o227 x: 0x097 + d: 10011000 o: 230 x: 098 d: 10011000 o: 0o230 x: 0x098 + d: 10011001 o: 231 x: 099 d: 10011001 o: 0o231 x: 0x099 + d: 10011010 o: 232 x: 09a d: 10011010 o: 0o232 x: 0x09a + d: 10011011 o: 233 x: 09b d: 10011011 o: 0o233 x: 0x09b + d: 10011100 o: 234 x: 09c d: 10011100 o: 0o234 x: 0x09c + d: 10011101 o: 235 x: 09d d: 10011101 o: 0o235 x: 0x09d + d: 10011110 o: 236 x: 09e d: 10011110 o: 0o236 x: 0x09e + d: 10011111 o: 237 x: 09f d: 10011111 o: 0o237 x: 0x09f + d: 10100000 o: 240 x: 0a0 d: 10100000 o: 0o240 x: 0x0a0 + d: 10100001 o: 241 x: 0a1 d: 10100001 o: 0o241 x: 0x0a1 + d: 10100010 o: 242 x: 0a2 d: 10100010 o: 0o242 x: 0x0a2 + d: 10100011 o: 243 x: 0a3 d: 10100011 o: 0o243 x: 0x0a3 + d: 10100100 o: 244 x: 0a4 d: 10100100 o: 0o244 x: 0x0a4 + d: 10100101 o: 245 x: 0a5 d: 10100101 o: 0o245 x: 0x0a5 + d: 10100110 o: 246 x: 0a6 d: 10100110 o: 0o246 x: 0x0a6 + d: 10100111 o: 247 x: 0a7 d: 10100111 o: 0o247 x: 0x0a7 + d: 10101000 o: 250 x: 0a8 d: 10101000 o: 0o250 x: 0x0a8 + d: 10101001 o: 251 x: 0a9 d: 10101001 o: 0o251 x: 0x0a9 + d: 10101010 o: 252 x: 0aa d: 10101010 o: 0o252 x: 0x0aa + d: 10101011 o: 253 x: 0ab d: 10101011 o: 0o253 x: 0x0ab + d: 10101100 o: 254 x: 0ac d: 10101100 o: 0o254 x: 0x0ac + d: 10101101 o: 255 x: 0ad d: 10101101 o: 0o255 x: 0x0ad + d: 10101110 o: 256 x: 0ae d: 10101110 o: 0o256 x: 0x0ae + d: 10101111 o: 257 x: 0af d: 10101111 o: 0o257 x: 0x0af + d: 10110000 o: 260 x: 0b0 d: 10110000 o: 0o260 x: 0x0b0 + d: 10110001 o: 261 x: 0b1 d: 10110001 o: 0o261 x: 0x0b1 + d: 10110010 o: 262 x: 0b2 d: 10110010 o: 0o262 x: 0x0b2 + d: 10110011 o: 263 x: 0b3 d: 10110011 o: 0o263 x: 0x0b3 + d: 10110100 o: 264 x: 0b4 d: 10110100 o: 0o264 x: 0x0b4 + d: 10110101 o: 265 x: 0b5 d: 10110101 o: 0o265 x: 0x0b5 + d: 10110110 o: 266 x: 0b6 d: 10110110 o: 0o266 x: 0x0b6 + d: 10110111 o: 267 x: 0b7 d: 10110111 o: 0o267 x: 0x0b7 + d: 10111000 o: 270 x: 0b8 d: 10111000 o: 0o270 x: 0x0b8 + d: 10111001 o: 271 x: 0b9 d: 10111001 o: 0o271 x: 0x0b9 + d: 10111010 o: 272 x: 0ba d: 10111010 o: 0o272 x: 0x0ba + d: 10111011 o: 273 x: 0bb d: 10111011 o: 0o273 x: 0x0bb + d: 10111100 o: 274 x: 0bc d: 10111100 o: 0o274 x: 0x0bc + d: 10111101 o: 275 x: 0bd d: 10111101 o: 0o275 x: 0x0bd + d: 10111110 o: 276 x: 0be d: 10111110 o: 0o276 x: 0x0be + d: 10111111 o: 277 x: 0bf d: 10111111 o: 0o277 x: 0x0bf + d: 11000000 o: 300 x: 0c0 d: 11000000 o: 0o300 x: 0x0c0 + d: 11000001 o: 301 x: 0c1 d: 11000001 o: 0o301 x: 0x0c1 + d: 11000010 o: 302 x: 0c2 d: 11000010 o: 0o302 x: 0x0c2 + d: 11000011 o: 303 x: 0c3 d: 11000011 o: 0o303 x: 0x0c3 + d: 11000100 o: 304 x: 0c4 d: 11000100 o: 0o304 x: 0x0c4 + d: 11000101 o: 305 x: 0c5 d: 11000101 o: 0o305 x: 0x0c5 + d: 11000110 o: 306 x: 0c6 d: 11000110 o: 0o306 x: 0x0c6 + d: 11000111 o: 307 x: 0c7 d: 11000111 o: 0o307 x: 0x0c7 + d: 11001000 o: 310 x: 0c8 d: 11001000 o: 0o310 x: 0x0c8 + d: 11001001 o: 311 x: 0c9 d: 11001001 o: 0o311 x: 0x0c9 + d: 11001010 o: 312 x: 0ca d: 11001010 o: 0o312 x: 0x0ca + d: 11001011 o: 313 x: 0cb d: 11001011 o: 0o313 x: 0x0cb + d: 11001100 o: 314 x: 0cc d: 11001100 o: 0o314 x: 0x0cc + d: 11001101 o: 315 x: 0cd d: 11001101 o: 0o315 x: 0x0cd + d: 11001110 o: 316 x: 0ce d: 11001110 o: 0o316 x: 0x0ce + d: 11001111 o: 317 x: 0cf d: 11001111 o: 0o317 x: 0x0cf + d: 11010000 o: 320 x: 0d0 d: 11010000 o: 0o320 x: 0x0d0 + d: 11010001 o: 321 x: 0d1 d: 11010001 o: 0o321 x: 0x0d1 + d: 11010010 o: 322 x: 0d2 d: 11010010 o: 0o322 x: 0x0d2 + d: 11010011 o: 323 x: 0d3 d: 11010011 o: 0o323 x: 0x0d3 + d: 11010100 o: 324 x: 0d4 d: 11010100 o: 0o324 x: 0x0d4 + d: 11010101 o: 325 x: 0d5 d: 11010101 o: 0o325 x: 0x0d5 + d: 11010110 o: 326 x: 0d6 d: 11010110 o: 0o326 x: 0x0d6 + d: 11010111 o: 327 x: 0d7 d: 11010111 o: 0o327 x: 0x0d7 + d: 11011000 o: 330 x: 0d8 d: 11011000 o: 0o330 x: 0x0d8 + d: 11011001 o: 331 x: 0d9 d: 11011001 o: 0o331 x: 0x0d9 + d: 11011010 o: 332 x: 0da d: 11011010 o: 0o332 x: 0x0da + d: 11011011 o: 333 x: 0db d: 11011011 o: 0o333 x: 0x0db + d: 11011100 o: 334 x: 0dc d: 11011100 o: 0o334 x: 0x0dc + d: 11011101 o: 335 x: 0dd d: 11011101 o: 0o335 x: 0x0dd + d: 11011110 o: 336 x: 0de d: 11011110 o: 0o336 x: 0x0de + d: 11011111 o: 337 x: 0df d: 11011111 o: 0o337 x: 0x0df + d: 11100000 o: 340 x: 0e0 d: 11100000 o: 0o340 x: 0x0e0 + d: 11100001 o: 341 x: 0e1 d: 11100001 o: 0o341 x: 0x0e1 + d: 11100010 o: 342 x: 0e2 d: 11100010 o: 0o342 x: 0x0e2 + d: 11100011 o: 343 x: 0e3 d: 11100011 o: 0o343 x: 0x0e3 + d: 11100100 o: 344 x: 0e4 d: 11100100 o: 0o344 x: 0x0e4 + d: 11100101 o: 345 x: 0e5 d: 11100101 o: 0o345 x: 0x0e5 + d: 11100110 o: 346 x: 0e6 d: 11100110 o: 0o346 x: 0x0e6 + d: 11100111 o: 347 x: 0e7 d: 11100111 o: 0o347 x: 0x0e7 + d: 11101000 o: 350 x: 0e8 d: 11101000 o: 0o350 x: 0x0e8 + d: 11101001 o: 351 x: 0e9 d: 11101001 o: 0o351 x: 0x0e9 + d: 11101010 o: 352 x: 0ea d: 11101010 o: 0o352 x: 0x0ea + d: 11101011 o: 353 x: 0eb d: 11101011 o: 0o353 x: 0x0eb + d: 11101100 o: 354 x: 0ec d: 11101100 o: 0o354 x: 0x0ec + d: 11101101 o: 355 x: 0ed d: 11101101 o: 0o355 x: 0x0ed + d: 11101110 o: 356 x: 0ee d: 11101110 o: 0o356 x: 0x0ee + d: 11101111 o: 357 x: 0ef d: 11101111 o: 0o357 x: 0x0ef + d: 11110000 o: 360 x: 0f0 d: 11110000 o: 0o360 x: 0x0f0 + d: 11110001 o: 361 x: 0f1 d: 11110001 o: 0o361 x: 0x0f1 + d: 11110010 o: 362 x: 0f2 d: 11110010 o: 0o362 x: 0x0f2 + d: 11110011 o: 363 x: 0f3 d: 11110011 o: 0o363 x: 0x0f3 + d: 11110100 o: 364 x: 0f4 d: 11110100 o: 0o364 x: 0x0f4 + d: 11110101 o: 365 x: 0f5 d: 11110101 o: 0o365 x: 0x0f5 + d: 11110110 o: 366 x: 0f6 d: 11110110 o: 0o366 x: 0x0f6 + d: 11110111 o: 367 x: 0f7 d: 11110111 o: 0o367 x: 0x0f7 + d: 11111000 o: 370 x: 0f8 d: 11111000 o: 0o370 x: 0x0f8 + d: 11111001 o: 371 x: 0f9 d: 11111001 o: 0o371 x: 0x0f9 + d: 11111010 o: 372 x: 0fa d: 11111010 o: 0o372 x: 0x0fa + d: 11111011 o: 373 x: 0fb d: 11111011 o: 0o373 x: 0x0fb + d: 11111100 o: 374 x: 0fc d: 11111100 o: 0o374 x: 0x0fc + d: 11111101 o: 375 x: 0fd d: 11111101 o: 0o375 x: 0x0fd + d: 11111110 o: 376 x: 0fe d: 11111110 o: 0o376 x: 0x0fe + d: 11111111 o: 377 x: 0ff d: 11111111 o: 0o377 x: 0x0ff +Program completed diff --git a/src/systemc/tests/systemc/datatypes/int/string_conversion/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/int/string_conversion/test03/test03.cpp new file mode 100644 index 000000000..a075ba525 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/int/string_conversion/test03/test03.cpp @@ -0,0 +1,43 @@ +#include "systemc.h" + +inline void flags_value() +{ + ios::fmtflags flags = cout.flags(); + cout << hex << flags << dec << endl; + if ( sc_io_show_base(cout) ) cout << "showbase" << endl; +} + +#define TEST(BASE) \ +{ \ + BASE x; \ + cout << endl << #BASE << endl; \ + for ( i = 0; i < 256; i++ ) \ + { \ + x = i; \ + cout << " "; \ + cout << std::noshowbase; \ + cout << dec << " d: " << x; \ + cout << oct << " o: " << x; \ + cout << hex << " x: " << x; \ + cout << std::showbase; \ + cout << dec << " d: " << x; \ + cout << oct << " o: " << x; \ + cout << hex << " x: " << x; \ + cout << endl; \ + } \ +} +int sc_main(int argc, char* argv[]) +{ + int i; + sc_biguint<8> x; + + TEST(sc_bigint<8>) + TEST(sc_biguint<8>) + TEST(sc_int<8>) + TEST(sc_uint<8>) + TEST(sc_lv<8>) + TEST(sc_bv<8>) + cerr << "Program completed" << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/misc/concat/test01/golden/test01.log new file mode 100644 index 000000000..9a08e8292 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test01/golden/test01.log @@ -0,0 +1,35 @@ +SystemC Simulation +( bv2a, bv2b ) = "0110" +bv2a = 01 +bv2b = 10 +bv4a = ( bv2a, bv2b ) +bv4a = 0110 +bv4a = ( bv2c, bv2d ) +bv4a = 1001 +( bv4a.range( 2, 1 ), bv2a ) = "0110" +bv4a = 1011 +bv2a = 10 +( bv4a.range( 2, 1 ), bv4b.range( 2, 1 ) ) = "1100" +bv4a = 1111 +bv4b = 1001 +( ( bv2a, bv2b ), bv4a ) = "00110011" +bv2a = 00 +bv2b = 11 +bv4a = 0011 +( bv4a, ( bv2a, bv2b ) ) = "11001100" +bv4a = 1100 +bv2a = 11 +bv2b = 00 +( ( bv2a, bv2b ), ( bv4a, bv4b ) ) = "011000001111" +bv2a = 01 +bv2b = 10 +bv4a = 0000 +bv4b = 1111 +( ( bv2a, bv2b ), bv4a.range( 2, 1 ) ) = "001111" +bv2a = 00 +bv2b = 11 +bv4a = 0110 +( bv4a.range( 2, 1 ), ( bv2a, bv2b ) ) = "001100" +bv4a = 0000 +bv2a = 11 +bv2b = 00 diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test01/test01.cpp new file mode 100644 index 000000000..15d932f1c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test01/test01.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 7 Apr 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of l-value concatenation + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_bv<2> bv2a; + sc_bv<2> bv2b; + const sc_bv<2> bv2c( "10" ); + const sc_bv<2> bv2d( "01" ); + sc_bv<4> bv4a; + sc_bv<4> bv4b( "1111" ); + + cout << "( bv2a, bv2b ) = \"0110\"" << endl; + ( bv2a, bv2b ) = "0110"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + + cout << "bv4a = ( bv2a, bv2b )" << endl; + bv4a = ( bv2a, bv2b ); + cout << "bv4a = " << bv4a << endl; + + cout << "bv4a = ( bv2c, bv2d )" << endl; + bv4a = ( bv2c, bv2d ); + cout << "bv4a = " << bv4a << endl; + + cout << "( bv4a.range( 2, 1 ), bv2a ) = \"0110\"" << endl; + ( bv4a.range( 2, 1 ), bv2a ) = "0110"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + +#if 0 + cout << "( bv2a, bv4a.range( 1, 2 ) ) = \"0101\"" << endl; + ( bv2a, bv4a.range( 1, 2 ) ) = "0101"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; +#endif // 0 + + cout << "( bv4a.range( 2, 1 ), bv4b.range( 2, 1 ) ) = \"1100\"" << endl; + ( bv4a.range( 2, 1 ), bv4b.range( 2, 1 ) ) = "1100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv4b = " << bv4b << endl; + + cout << "( ( bv2a, bv2b ), bv4a ) = \"00110011\"" << endl; + ( ( bv2a, bv2b ), bv4a ) = "00110011"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + cout << "bv4a = " << bv4a << endl; + + cout << "( bv4a, ( bv2a, bv2b ) ) = \"11001100\"" << endl; + ( bv4a, ( bv2a, bv2b ) ) = "11001100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + + cout << "( ( bv2a, bv2b ), ( bv4a, bv4b ) ) = \"011000001111\"" << endl; + ( ( bv2a, bv2b ), ( bv4a, bv4b ) ) = "011000001111"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + cout << "bv4a = " << bv4a << endl; + cout << "bv4b = " << bv4b << endl; + + cout << "( ( bv2a, bv2b ), bv4a.range( 2, 1 ) ) = \"001111\"" << endl; + ( ( bv2a, bv2b ), bv4a.range( 2, 1 ) ) = "001111"; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + cout << "bv4a = " << bv4a << endl; + + cout << "( bv4a.range( 2, 1 ), ( bv2a, bv2b ) ) = \"001100\"" << endl; + ( bv4a.range( 2, 1 ), ( bv2a, bv2b ) ) = "001100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + cout << "bv2b = " << bv2b << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/misc/concat/test02/golden/test02.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test02/golden/test02.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test02/test02.cpp new file mode 100644 index 000000000..9fbde6ae6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test02/test02.cpp @@ -0,0 +1,198 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp + + Original Author: Andy Goodrich, Forte Design Systems, 7 Apr 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define GET_UNSIGNED(VALUE,OFFSET,EXPECTED) \ +{ \ + right_sc_biguint32 = 1 << OFFSET; \ + VALUE.concat_get_data( right_sc_biguint32.get_raw(), OFFSET); \ + if ( right_sc_biguint32 != ((EXPECTED)<>1)&1)); \ + GET_UNSIGNED(left_sc_uint12[1],OFFSET,((EXPECTED>>1)&1)); \ + GET_UNSIGNED(left_sc_int12(7,2),OFFSET,((EXPECTED>>2)&0x3f)); \ + GET_UNSIGNED(left_sc_uint12(7,2),OFFSET,((EXPECTED>>2)&0x3f)); \ +} + +#define GET_UINT64(VALUE,EXPECTED) \ +{ \ + uint64 actual = VALUE.concat_get_uint64(); \ + if ( actual != (EXPECTED) ) \ + cout << __FILE__ << "(" << __LINE__ << ") : " << \ + #VALUE << ".const_get_uint64() expected " << (EXPECTED) << " got " \ + << actual << endl; \ +} + +#define GET_UINT64S(EXPECTED) \ +{ \ + GET_UINT64(left_sc_bigint12,EXPECTED) \ + GET_UINT64(left_sc_biguint12,EXPECTED) \ + GET_UINT64(left_sc_int12,EXPECTED) \ + GET_UINT64(left_sc_uint12,EXPECTED) \ + GET_UINT64(left_sc_int12[1], ((EXPECTED>>1)&1)) \ + GET_UINT64(left_sc_uint12[1], ((EXPECTED>>1)&1)) \ + GET_UINT64(left_sc_int12(7,2), ((EXPECTED>>2)&0x3f)) \ + GET_UINT64(left_sc_uint12(7,2),((EXPECTED>>2)&0x3f)) \ +} + +#define LENGTH(LEFT,WIDTH) \ +{ \ + int width = LEFT.concat_length(0); \ + if ( width != (WIDTH) ) \ + cout << __FILE__ << "(" << __LINE__ << ") : " \ + << #LEFT << ".concat_length() expected " << (WIDTH) \ + << " got " << width << endl; \ +} + +#define LENGTHS(WIDTH) \ +{ \ + LENGTH(left_sc_bigint12,WIDTH) \ + LENGTH(left_sc_biguint12,WIDTH) \ + LENGTH(left_sc_int12,WIDTH) \ + LENGTH(left_sc_uint12,WIDTH) \ +} + +#define SET(LEFT,RIGHT,VALUE,OFFSET,EXPECTED) \ +{ \ + LEFT.concat_set(RIGHT,OFFSET); \ + wait(); \ + uint64 actual = LEFT.concat_get_uint64(); \ + if ( actual != (EXPECTED) ) \ + cout << #LEFT << ".const_set_uint64(" << #RIGHT <<", " << VALUE << ") \ + << expected " << (EXPECTED) << " got " << actual << endl; \ +} + +#define SET_SIGNED(VALUE,OFFSET,EXPECTED) \ +{ \ + right_sc_bigint32 = VALUE; \ + SET(left_sc_bigint12,right_sc_bigint32,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_biguint12,right_sc_bigint32,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_int12,right_sc_bigint32,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_uint12,right_sc_bigint32,VALUE,OFFSET,EXPECTED); \ +} + +#define SET_S64(VALUE,OFFSET,EXPECTED) \ +{ \ + right_s64 = VALUE; \ + SET(left_sc_bigint12,right_s64,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_biguint12,right_s64,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_int12,right_s64,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_uint12,right_s64,VALUE,OFFSET,EXPECTED); \ +} + +#define SET_UNSIGNED(VALUE,OFFSET,EXPECTED) \ +{ \ + right_sc_biguint32 = VALUE; \ + SET(left_sc_bigint12,right_sc_biguint32,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_biguint12,right_sc_biguint32,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_int12,right_sc_biguint32,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_uint12,right_sc_biguint32,VALUE,OFFSET,EXPECTED); \ +} + +#define SET_U64(VALUE,OFFSET,EXPECTED) \ +{ \ + right_u64 = VALUE; \ + SET(left_sc_bigint12,right_u64,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_biguint12,right_u64,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_int12,right_u64,VALUE,OFFSET,EXPECTED); \ + SET(left_sc_uint12,right_u64,VALUE,OFFSET,EXPECTED); \ +} + +#define SETS(VALUE,OFFSET,EXPECTED) \ + SET_S64(VALUE,OFFSET,EXPECTED) \ + SET_SIGNED(VALUE,OFFSET,EXPECTED) \ + SET_UNSIGNED(VALUE,OFFSET,EXPECTED) \ + SET_U64(VALUE,OFFSET,EXPECTED) + +SC_MODULE(X) +{ + SC_CTOR(X) + { + SC_CTHREAD(sync, clk.pos()); + } + void sync() + { + // for (;; ) + { + LENGTHS(12); + SETS(0x87654321,0,0x321); + SETS(0x87654321,4,0x432); + GET_UINT64S(0x432); + GET_UNSIGNEDS(0,0x432); + GET_UNSIGNEDS(4,0x432); + } + } + + sc_in_clk clk; + sc_int<12> left_sc_int12; + sc_bigint<12> left_sc_bigint12; + sc_biguint<12> left_sc_biguint12; + sc_uint<12> left_sc_uint12; + + sc_int<32> right_sc_int32; + sc_bigint<32> right_sc_bigint32; + sc_biguint<32> right_sc_biguint32; + sc_uint<32> right_sc_uint32; + int right_si; + long right_sl; + int64 right_s64; + unsigned int right_ui; + unsigned long right_ul; + uint64 right_u64; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + X x("x"); + x.clk(clock); + sc_start(1000, SC_NS); + + cerr << "Program completed\n"; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/misc/concat/test03/golden/test03.log new file mode 100644 index 000000000..9b4de75c6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test03/golden/test03.log @@ -0,0 +1,35 @@ +SystemC Simulation +( uint2a, int2a ) = "0110" +uint2a = 3 +int2a = -2 +biguint4a = ( uint2a, int2a ) +biguint4a = 14 +biguint4a = ( uint2c, uint2d ) +biguint4a = 9 +( biguint4a.range( 2, 1 ), uint2a ) = "0110" +biguint4a = 15 +uint2a = 2 +( biguint4a.range( 2, 1 ), bigint4a.range( 2, 1 ) ) = "1100" +biguint4a = 15 +bigint4a = 1 +( ( uint2a, int2a ), biguint4a ) = "00110011" +uint2a = 2 +int2a = -1 +biguint4a = 11 +( biguint4a, ( uint2a, int2a ) ) = "11001100" +biguint4a = 0 +uint2a = 3 +int2a = 0 +( ( uint2a, int2a ), ( biguint4a, bigint4a ) ) = "011000001111" +uint2a = 0 +int2a = -2 +biguint4a = 5 +bigint4a = 7 +( ( uint2a, int2a ), biguint4a.range( 2, 1 ) ) = "001111" +uint2a = 1 +int2a = 1 +biguint4a = 7 +( biguint4a.range( 2, 1 ), ( uint2a, int2a ) ) = "001100" +biguint4a = 1 +uint2a = 3 +int2a = 0 diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test03/test03.cpp new file mode 100644 index 000000000..f6d5c1553 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test03/test03.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 7 Apr 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of l-value concatenation + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_uint<2> uint2a; + sc_int<2> int2a; + const sc_uint<2> uint2c( "10" ); + const sc_uint<2> uint2d( "01" ); + sc_biguint<4> biguint4a; + sc_bigint<4> bigint4a( "1111" ); + + cout << "( uint2a, int2a ) = \"0110\"" << endl; + ( uint2a, int2a ) = "0110"; + cout << "uint2a = " << uint2a << endl; + cout << "int2a = " << int2a << endl; + + cout << "biguint4a = ( uint2a, int2a )" << endl; + biguint4a = ( uint2a, int2a ); + cout << "biguint4a = " << biguint4a << endl; + + cout << "biguint4a = ( uint2c, uint2d )" << endl; + biguint4a = ( uint2c, uint2d ); + cout << "biguint4a = " << biguint4a << endl; + + cout << "( biguint4a.range( 2, 1 ), uint2a ) = \"0110\"" << endl; + ( biguint4a.range( 2, 1 ), uint2a ) = "0110"; + cout << "biguint4a = " << biguint4a << endl; + cout << "uint2a = " << uint2a << endl; + +#if 0 + cout << "( uint2a, biguint4a.range( 1, 2 ) ) = \"0101\"" << endl; + ( uint2a, biguint4a.range( 1, 2 ) ) = "0101"; + cout << "biguint4a = " << biguint4a << endl; + cout << "uint2a = " << uint2a << endl; +#endif // 0 + + cout << "( biguint4a.range( 2, 1 ), bigint4a.range( 2, 1 ) ) = \"1100\"" << endl; + ( biguint4a.range( 2, 1 ), bigint4a.range( 2, 1 ) ) = "1100"; + cout << "biguint4a = " << biguint4a << endl; + cout << "bigint4a = " << bigint4a << endl; + + cout << "( ( uint2a, int2a ), biguint4a ) = \"00110011\"" << endl; + ( ( uint2a, int2a ), biguint4a ) = "00110011"; + cout << "uint2a = " << uint2a << endl; + cout << "int2a = " << int2a << endl; + cout << "biguint4a = " << biguint4a << endl; + + cout << "( biguint4a, ( uint2a, int2a ) ) = \"11001100\"" << endl; + ( biguint4a, ( uint2a, int2a ) ) = "11001100"; + cout << "biguint4a = " << biguint4a << endl; + cout << "uint2a = " << uint2a << endl; + cout << "int2a = " << int2a << endl; + + cout << "( ( uint2a, int2a ), ( biguint4a, bigint4a ) ) = \"011000001111\"" << endl; + ( ( uint2a, int2a ), ( biguint4a, bigint4a ) ) = "011000001111"; + cout << "uint2a = " << uint2a << endl; + cout << "int2a = " << int2a << endl; + cout << "biguint4a = " << biguint4a << endl; + cout << "bigint4a = " << bigint4a << endl; + + cout << "( ( uint2a, int2a ), biguint4a.range( 2, 1 ) ) = \"001111\"" << endl; + ( ( uint2a, int2a ), biguint4a.range( 2, 1 ) ) = "001111"; + cout << "uint2a = " << uint2a << endl; + cout << "int2a = " << int2a << endl; + cout << "biguint4a = " << biguint4a << endl; + + cout << "( biguint4a.range( 2, 1 ), ( uint2a, int2a ) ) = \"001100\"" << endl; + ( biguint4a.range( 2, 1 ), ( uint2a, int2a ) ) = "001100"; + cout << "biguint4a = " << biguint4a << endl; + cout << "uint2a = " << uint2a << endl; + cout << "int2a = " << int2a << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test04/golden/test04.log b/src/systemc/tests/systemc/datatypes/misc/concat/test04/golden/test04.log new file mode 100644 index 000000000..428dd6500 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test04/golden/test04.log @@ -0,0 +1,21 @@ +SystemC Simulation +bv2a = 01 +lv2b = 10 +bv4a = 0110 +bv4a = 1001 +bv4a = 1011 +bv2a = 10 +bv4a = 1101 +bv2a = 01 +bv2a = 00 +lv2b = 11 +bv4a = 0011 +bv4a = 1100 +bv2a = 11 +lv2b = 00 +bv2a = 00 +lv2b = 11 +bv4a = 1110 +bv4a = 1000 +bv2a = 11 +lv2b = 00 diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test04/test04.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test04/test04.cpp new file mode 100644 index 000000000..ad95e40de --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test04/test04.cpp @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 7 Apr 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of l-value concatenation + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_bv<2> bv2a; + sc_lv<2> lv2b; + const sc_bv<2> bv2c( "10" ); + const sc_bv<2> bv2d( "01" ); + sc_bv<4> bv4a; + + ( bv2a, lv2b ) = "0110"; + cout << "bv2a = " << bv2a << endl; + cout << "lv2b = " << lv2b << endl; + + bv4a = ( bv2a, lv2b ); + cout << "bv4a = " << bv4a << endl; + + bv4a = ( bv2c, bv2d ); + cout << "bv4a = " << bv4a << endl; + + ( bv4a.range( 2, 1 ), bv2a ) = "0110"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + + ( bv2a, bv4a.range( 1, 2 ) ) = "0101"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + + ( ( bv2a, lv2b ), bv4a ) = "00110011"; + cout << "bv2a = " << bv2a << endl; + cout << "lv2b = " << lv2b << endl; + cout << "bv4a = " << bv4a << endl; + + ( bv4a, ( bv2a, lv2b ) ) = "11001100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + cout << "lv2b = " << lv2b << endl; + + ( ( bv2a, lv2b ), bv4a.range( 2, 1 ) ) = "001111"; + cout << "bv2a = " << bv2a << endl; + cout << "lv2b = " << lv2b << endl; + cout << "bv4a = " << bv4a << endl; + + ( bv4a.range( 2, 1 ), ( bv2a, lv2b ) ) = "001100"; + cout << "bv4a = " << bv4a << endl; + cout << "bv2a = " << bv2a << endl; + cout << "lv2b = " << lv2b << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test05/golden/test05.log b/src/systemc/tests/systemc/datatypes/misc/concat/test05/golden/test05.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test05/golden/test05.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test05/test05.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test05/test05.cpp new file mode 100644 index 000000000..8e2559ce9 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test05/test05.cpp @@ -0,0 +1,94 @@ +// test05.cpp - Concatenation test + +#include "systemc.h" +#include "specialized_signals/scx_signal_int.h" +#include "specialized_signals/scx_signal_signed.h" +#include "specialized_signals/scx_signal_uint.h" +#include "specialized_signals/scx_signal_unsigned.h" + +#define COMPARE( a, b ) \ +{ \ + if ( a != b ) \ + { \ + cout << __FILE__ << "(" << __LINE__ << "): " << #a << " = " << \ + a << " " << #b << " = " << b << endl; \ + } \ +} + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + sc_bigint<8> sc_bigint_a; + sc_bigint<8> sc_bigint_b; + sc_biguint<8> sc_biguint_a; + sc_biguint<8> sc_biguint_b; + sc_int<8> sc_int_a; + sc_int<8> sc_int_b; + sc_uint<8> sc_uint_a; + sc_uint<8> sc_uint_b; + sc_signal > sig_sc_bigint_a; + sc_signal > sig_sc_bigint_b; + sc_signal > sig_sc_biguint_a; + sc_signal > sig_sc_biguint_b; + sc_signal > sig_sc_int_a; + sc_signal > sig_sc_int_b; + sc_signal > sig_sc_uint_a; + sc_signal > sig_sc_uint_b; + + sc_bigint_a = "10101111"; + sc_biguint_a = "10101111"; + sc_int_a = "10101111"; + sc_uint_a = "10101111"; + + ( sc_bigint_b, sc_biguint_b, sc_int_b, sc_uint_b ) = + ( sc_bigint_a, sc_biguint_a, sc_int_a, sc_uint_a ); + + COMPARE( sc_bigint_a, sc_bigint_b ) + COMPARE( sc_biguint_a, sc_biguint_b ) + COMPARE( sc_int_a, sc_int_b ) + COMPARE( sc_uint_a, sc_uint_b ) + + ( sig_sc_bigint_b, sig_sc_biguint_b, sig_sc_int_b, sig_sc_uint_b ) = + ( sc_bigint_a, sc_biguint_a, sc_int_a, sc_uint_a ); + + sc_start(1, SC_NS); + COMPARE( sc_bigint_a, sig_sc_bigint_b ) + COMPARE( sc_biguint_a, sig_sc_biguint_b ) + COMPARE( sc_int_a, sig_sc_int_b ) + COMPARE( sc_uint_a, sig_sc_uint_b ) + + sc_bigint_a = 128; + sc_biguint_a = 64; + sc_int_a = 128; + sc_uint_a = 64; + + ( sc_bigint_b, sc_biguint_b, sc_int_b, sc_uint_b ) = + ( sc_int_a, sc_uint_a, sc_bigint_a, sc_biguint_a ); + + COMPARE( sc_bigint_a, sc_bigint_b ) + COMPARE( sc_biguint_a, sc_biguint_b ) + COMPARE( sc_int_a, sc_int_b ) + COMPARE( sc_uint_a, sc_uint_b ) + + sig_sc_bigint_a = 87; + sig_sc_biguint_a = 124; + sig_sc_int_a = 97; + sig_sc_uint_a = 72; + sc_start(1, SC_NS); + + ( sig_sc_bigint_b, sig_sc_biguint_b, sig_sc_int_b, sig_sc_uint_b ) = + ( sig_sc_bigint_a, sig_sc_biguint_a, sig_sc_int_a, sig_sc_uint_a ); + sc_start(1, SC_NS); + COMPARE( sig_sc_bigint_a, sig_sc_bigint_b ) + COMPARE( sig_sc_biguint_a, sig_sc_biguint_b ) + COMPARE( sig_sc_int_a, sig_sc_int_b ) + COMPARE( sig_sc_uint_a, sig_sc_uint_b ) + + COMPARE( 87, sig_sc_bigint_b ) + COMPARE( 124, sig_sc_biguint_b ) + COMPARE( 97, sig_sc_int_b ) + COMPARE( 72, sig_sc_uint_b ) + + cerr << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test06/golden/test06.log b/src/systemc/tests/systemc/datatypes/misc/concat/test06/golden/test06.log new file mode 100644 index 000000000..44a94d332 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test06/golden/test06.log @@ -0,0 +1,22 @@ +SystemC Simulation +0b00 +0b1111111111111111111111111111111111111 + +0b001111111111111111111111111111 +0b111111111111111111111111111100 + +0b001111111111111111111111111111111111111 +0b111111111111111111111111111111111111100 + +0b0001111111111111111111111111111111111111 +0b0111111111111111111111111111111111111100 + +0b111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111100 +0b001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 + +0b0000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 +0b1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000000000000000000000000000000000000000 + +0b1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111000000000000000000000000000000000000000 +0b0000000000000000000000000000000000000001111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111 + diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test06/test06.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test06/test06.cpp new file mode 100644 index 000000000..cd30aae64 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test06/test06.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06 -- test for high order bit concatenation bug. + + Original Author: + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int argc, char** argv) { + sc_bigint<2> bi2; + sc_bigint<28> bi28; + sc_bigint<30> bi30; + sc_bigint<37> bi37; + sc_bigint<39> bi39; + sc_bigint<100> bi100; + sc_bigint<102> bi102; + sc_bigint<139> bi139; + sc_uint<39> bu39; + + bi2 = 0; + bi28 = -1; + bi37 = -1; + cout << bi2.to_string(SC_BIN) << endl + << bi37.to_string(SC_BIN) << endl; + cout << endl; + + bi30 = (bi2,bi28); + cout << bi30.to_string(SC_BIN) << endl; + bi30 = (bi28,bi2); + cout << bi30.to_string(SC_BIN) << endl; + cout << endl; + + bi39 = (bi2,bi37); + cout << bi39.to_string(SC_BIN) << endl; + bi39 = (bi37,bi2); + cout << bi39.to_string(SC_BIN) << endl; + cout << endl; + + bu39 = (bi2,bi37); + cout << bu39.to_string(SC_BIN) << endl; + bu39 = (bi37,bi2); + cout << bu39.to_string(SC_BIN) << endl; + cout << endl; + + bi100 = -1; + bi102 = (bi100,bi2); + cout << bi102.to_string(SC_BIN) << endl; + bi102 = (bi2,bi100); + cout << bi102.to_string(SC_BIN) << endl; + cout << endl; + + bi39 = 0; + bi139 = (bi39,bi100); + cout << bi139.to_string(SC_BIN) << endl; + bi139 = (bi100,bi39); + cout << bi139.to_string(SC_BIN) << endl; + cout << endl; + + bu39 = 0; + bi139 = (bi100,bu39); + cout << bi139.to_string(SC_BIN) << endl; + bi139 = (bu39,bi100); + cout << bi139.to_string(SC_BIN) << endl; + cout << endl; + + sc_start(1, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test07/golden/test07.log b/src/systemc/tests/systemc/datatypes/misc/concat/test07/golden/test07.log new file mode 100644 index 000000000..17d6ba2fb --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test07/golden/test07.log @@ -0,0 +1,36866 @@ +SystemC Simulation + +[64,64]: + int 0fedcba9876543210aaaaaaaa55555555 <- ( fedcba9876543210 , aaaaaaaa55555555 ) + +[64,63]: + int 7f6e5d4c3b2a19082aaaaaaa55555555 <- ( fedcba9876543210 , 2aaaaaaa55555555 ) + +[64,62]: + int 3fb72ea61d950c842aaaaaaa55555555 <- ( fedcba9876543210 , eaaaaaaa55555555 ) + +[64,61]: + int 1fdb97530eca86420aaaaaaa55555555 <- ( fedcba9876543210 , 0aaaaaaa55555555 ) + +[64,60]: + int 0fedcba9876543210aaaaaaa55555555 <- ( fedcba9876543210 , aaaaaaa55555555 ) + +[64,59]: + int 7f6e5d4c3b2a19082aaaaaa55555555 <- ( fedcba9876543210 , 2aaaaaa55555555 ) + +[64,58]: + int 3fb72ea61d950c842aaaaaa55555555 <- ( fedcba9876543210 , eaaaaaa55555555 ) + +[64,57]: + int 1fdb97530eca86420aaaaaa55555555 <- ( fedcba9876543210 , 0aaaaaa55555555 ) + +[64,56]: + int 0fedcba9876543210aaaaaa55555555 <- ( fedcba9876543210 , aaaaaa55555555 ) + +[64,55]: + int 7f6e5d4c3b2a19082aaaaa55555555 <- ( fedcba9876543210 , 2aaaaa55555555 ) + +[64,54]: + int 3fb72ea61d950c842aaaaa55555555 <- ( fedcba9876543210 , eaaaaa55555555 ) + +[64,53]: + int 1fdb97530eca86420aaaaa55555555 <- ( fedcba9876543210 , 0aaaaa55555555 ) + +[64,52]: + int 0fedcba9876543210aaaaa55555555 <- ( fedcba9876543210 , aaaaa55555555 ) + +[64,51]: + int 7f6e5d4c3b2a19082aaaa55555555 <- ( fedcba9876543210 , 2aaaa55555555 ) + +[64,50]: + int 3fb72ea61d950c842aaaa55555555 <- ( fedcba9876543210 , eaaaa55555555 ) + +[64,49]: + int 1fdb97530eca86420aaaa55555555 <- ( fedcba9876543210 , 0aaaa55555555 ) + +[64,48]: + int 0fedcba9876543210aaaa55555555 <- ( fedcba9876543210 , aaaa55555555 ) + +[64,47]: + int 7f6e5d4c3b2a19082aaa55555555 <- ( fedcba9876543210 , 2aaa55555555 ) + +[64,46]: + int 3fb72ea61d950c842aaa55555555 <- ( fedcba9876543210 , eaaa55555555 ) + +[64,45]: + int 1fdb97530eca86420aaa55555555 <- ( fedcba9876543210 , 0aaa55555555 ) + +[64,44]: + int 0fedcba9876543210aaa55555555 <- ( fedcba9876543210 , aaa55555555 ) + +[64,43]: + int 7f6e5d4c3b2a19082aa55555555 <- ( fedcba9876543210 , 2aa55555555 ) + +[64,42]: + int 3fb72ea61d950c842aa55555555 <- ( fedcba9876543210 , eaa55555555 ) + +[64,41]: + int 1fdb97530eca86420aa55555555 <- ( fedcba9876543210 , 0aa55555555 ) + +[64,40]: + int 0fedcba9876543210aa55555555 <- ( fedcba9876543210 , aa55555555 ) + +[64,39]: + int 7f6e5d4c3b2a19082a55555555 <- ( fedcba9876543210 , 2a55555555 ) + +[64,38]: + int 3fb72ea61d950c842a55555555 <- ( fedcba9876543210 , ea55555555 ) + +[64,37]: + int 1fdb97530eca86420a55555555 <- ( fedcba9876543210 , 0a55555555 ) + +[64,36]: + int 0fedcba9876543210a55555555 <- ( fedcba9876543210 , a55555555 ) + +[64,35]: + int 7f6e5d4c3b2a1908255555555 <- ( fedcba9876543210 , 255555555 ) + +[64,34]: + int 3fb72ea61d950c84255555555 <- ( fedcba9876543210 , e55555555 ) + +[64,33]: + int 1fdb97530eca8642055555555 <- ( fedcba9876543210 , 055555555 ) + +[64,32]: + int 0fedcba987654321055555555 <- ( fedcba9876543210 , 55555555 ) + +[64,31]: + int 7f6e5d4c3b2a190855555555 <- ( fedcba9876543210 , d5555555 ) + +[64,30]: + int 3fb72ea61d950c8415555555 <- ( fedcba9876543210 , 15555555 ) + +[64,29]: + int 1fdb97530eca864215555555 <- ( fedcba9876543210 , f5555555 ) + +[64,28]: + int 0fedcba98765432105555555 <- ( fedcba9876543210 , 5555555 ) + +[64,27]: + int 7f6e5d4c3b2a19085555555 <- ( fedcba9876543210 , d555555 ) + +[64,26]: + int 3fb72ea61d950c841555555 <- ( fedcba9876543210 , 1555555 ) + +[64,25]: + int 1fdb97530eca86421555555 <- ( fedcba9876543210 , f555555 ) + +[64,24]: + int 0fedcba9876543210555555 <- ( fedcba9876543210 , 555555 ) + +[64,23]: + int 7f6e5d4c3b2a1908555555 <- ( fedcba9876543210 , d55555 ) + +[64,22]: + int 3fb72ea61d950c84155555 <- ( fedcba9876543210 , 155555 ) + +[64,21]: + int 1fdb97530eca8642155555 <- ( fedcba9876543210 , f55555 ) + +[64,20]: + int 0fedcba987654321055555 <- ( fedcba9876543210 , 55555 ) + +[64,19]: + int 7f6e5d4c3b2a190855555 <- ( fedcba9876543210 , d5555 ) + +[64,18]: + int 3fb72ea61d950c8415555 <- ( fedcba9876543210 , 15555 ) + +[64,17]: + int 1fdb97530eca864215555 <- ( fedcba9876543210 , f5555 ) + +[64,16]: + int 0fedcba98765432105555 <- ( fedcba9876543210 , 5555 ) + +[64,15]: + int 7f6e5d4c3b2a19085555 <- ( fedcba9876543210 , d555 ) + +[64,14]: + int 3fb72ea61d950c841555 <- ( fedcba9876543210 , 1555 ) + +[64,13]: + int 1fdb97530eca86421555 <- ( fedcba9876543210 , f555 ) + +[64,12]: + int 0fedcba9876543210555 <- ( fedcba9876543210 , 555 ) + +[64,11]: + int 7f6e5d4c3b2a1908555 <- ( fedcba9876543210 , d55 ) + +[64,10]: + int 3fb72ea61d950c84155 <- ( fedcba9876543210 , 155 ) + +[64,9]: + int 1fdb97530eca8642155 <- ( fedcba9876543210 , f55 ) + +[64,8]: + int 0fedcba987654321055 <- ( fedcba9876543210 , 55 ) + +[64,7]: + int 7f6e5d4c3b2a190855 <- ( fedcba9876543210 , d5 ) + +[64,6]: + int 3fb72ea61d950c8415 <- ( fedcba9876543210 , 15 ) + +[64,5]: + int 1fdb97530eca864215 <- ( fedcba9876543210 , f5 ) + +[64,4]: + int 0fedcba98765432105 <- ( fedcba9876543210 , 5 ) + +[64,3]: + int 7f6e5d4c3b2a19085 <- ( fedcba9876543210 , d ) + +[64,2]: + int 3fb72ea61d950c841 <- ( fedcba9876543210 , 1 ) + +[64,1]: + int 1fdb97530eca86421 <- ( fedcba9876543210 , f ) + +[63,64]: + int 7edcba9876543210aaaaaaaa55555555 <- ( fedcba9876543210 , aaaaaaaa55555555 ) + +[63,63]: + int 3f6e5d4c3b2a19082aaaaaaa55555555 <- ( fedcba9876543210 , 2aaaaaaa55555555 ) + +[63,62]: + int 1fb72ea61d950c842aaaaaaa55555555 <- ( fedcba9876543210 , eaaaaaaa55555555 ) + +[63,61]: + int 0fdb97530eca86420aaaaaaa55555555 <- ( fedcba9876543210 , 0aaaaaaa55555555 ) + +[63,60]: + int 7edcba9876543210aaaaaaa55555555 <- ( fedcba9876543210 , aaaaaaa55555555 ) + +[63,59]: + int 3f6e5d4c3b2a19082aaaaaa55555555 <- ( fedcba9876543210 , 2aaaaaa55555555 ) + +[63,58]: + int 1fb72ea61d950c842aaaaaa55555555 <- ( fedcba9876543210 , eaaaaaa55555555 ) + +[63,57]: + int 0fdb97530eca86420aaaaaa55555555 <- ( fedcba9876543210 , 0aaaaaa55555555 ) + +[63,56]: + int 7edcba9876543210aaaaaa55555555 <- ( fedcba9876543210 , aaaaaa55555555 ) + +[63,55]: + int 3f6e5d4c3b2a19082aaaaa55555555 <- ( fedcba9876543210 , 2aaaaa55555555 ) + +[63,54]: + int 1fb72ea61d950c842aaaaa55555555 <- ( fedcba9876543210 , eaaaaa55555555 ) + +[63,53]: + int 0fdb97530eca86420aaaaa55555555 <- ( fedcba9876543210 , 0aaaaa55555555 ) + +[63,52]: + int 7edcba9876543210aaaaa55555555 <- ( fedcba9876543210 , aaaaa55555555 ) + +[63,51]: + int 3f6e5d4c3b2a19082aaaa55555555 <- ( fedcba9876543210 , 2aaaa55555555 ) + +[63,50]: + int 1fb72ea61d950c842aaaa55555555 <- ( fedcba9876543210 , eaaaa55555555 ) + +[63,49]: + int 0fdb97530eca86420aaaa55555555 <- ( fedcba9876543210 , 0aaaa55555555 ) + +[63,48]: + int 7edcba9876543210aaaa55555555 <- ( fedcba9876543210 , aaaa55555555 ) + +[63,47]: + int 3f6e5d4c3b2a19082aaa55555555 <- ( fedcba9876543210 , 2aaa55555555 ) + +[63,46]: + int 1fb72ea61d950c842aaa55555555 <- ( fedcba9876543210 , eaaa55555555 ) + +[63,45]: + int 0fdb97530eca86420aaa55555555 <- ( fedcba9876543210 , 0aaa55555555 ) + +[63,44]: + int 7edcba9876543210aaa55555555 <- ( fedcba9876543210 , aaa55555555 ) + +[63,43]: + int 3f6e5d4c3b2a19082aa55555555 <- ( fedcba9876543210 , 2aa55555555 ) + +[63,42]: + int 1fb72ea61d950c842aa55555555 <- ( fedcba9876543210 , eaa55555555 ) + +[63,41]: + int 0fdb97530eca86420aa55555555 <- ( fedcba9876543210 , 0aa55555555 ) + +[63,40]: + int 7edcba9876543210aa55555555 <- ( fedcba9876543210 , aa55555555 ) + +[63,39]: + int 3f6e5d4c3b2a19082a55555555 <- ( fedcba9876543210 , 2a55555555 ) + +[63,38]: + int 1fb72ea61d950c842a55555555 <- ( fedcba9876543210 , ea55555555 ) + +[63,37]: + int 0fdb97530eca86420a55555555 <- ( fedcba9876543210 , 0a55555555 ) + +[63,36]: + int 7edcba9876543210a55555555 <- ( fedcba9876543210 , a55555555 ) + +[63,35]: + int 3f6e5d4c3b2a1908255555555 <- ( fedcba9876543210 , 255555555 ) + +[63,34]: + int 1fb72ea61d950c84255555555 <- ( fedcba9876543210 , e55555555 ) + +[63,33]: + int 0fdb97530eca8642055555555 <- ( fedcba9876543210 , 055555555 ) + +[63,32]: + int 7edcba987654321055555555 <- ( fedcba9876543210 , 55555555 ) + +[63,31]: + int 3f6e5d4c3b2a190855555555 <- ( fedcba9876543210 , d5555555 ) + +[63,30]: + int 1fb72ea61d950c8415555555 <- ( fedcba9876543210 , 15555555 ) + +[63,29]: + int 0fdb97530eca864215555555 <- ( fedcba9876543210 , f5555555 ) + +[63,28]: + int 7edcba98765432105555555 <- ( fedcba9876543210 , 5555555 ) + +[63,27]: + int 3f6e5d4c3b2a19085555555 <- ( fedcba9876543210 , d555555 ) + +[63,26]: + int 1fb72ea61d950c841555555 <- ( fedcba9876543210 , 1555555 ) + +[63,25]: + int 0fdb97530eca86421555555 <- ( fedcba9876543210 , f555555 ) + +[63,24]: + int 7edcba9876543210555555 <- ( fedcba9876543210 , 555555 ) + +[63,23]: + int 3f6e5d4c3b2a1908555555 <- ( fedcba9876543210 , d55555 ) + +[63,22]: + int 1fb72ea61d950c84155555 <- ( fedcba9876543210 , 155555 ) + +[63,21]: + int 0fdb97530eca8642155555 <- ( fedcba9876543210 , f55555 ) + +[63,20]: + int 7edcba987654321055555 <- ( fedcba9876543210 , 55555 ) + +[63,19]: + int 3f6e5d4c3b2a190855555 <- ( fedcba9876543210 , d5555 ) + +[63,18]: + int 1fb72ea61d950c8415555 <- ( fedcba9876543210 , 15555 ) + +[63,17]: + int 0fdb97530eca864215555 <- ( fedcba9876543210 , f5555 ) + +[63,16]: + int 7edcba98765432105555 <- ( fedcba9876543210 , 5555 ) + +[63,15]: + int 3f6e5d4c3b2a19085555 <- ( fedcba9876543210 , d555 ) + +[63,14]: + int 1fb72ea61d950c841555 <- ( fedcba9876543210 , 1555 ) + +[63,13]: + int 0fdb97530eca86421555 <- ( fedcba9876543210 , f555 ) + +[63,12]: + int 7edcba9876543210555 <- ( fedcba9876543210 , 555 ) + +[63,11]: + int 3f6e5d4c3b2a1908555 <- ( fedcba9876543210 , d55 ) + +[63,10]: + int 1fb72ea61d950c84155 <- ( fedcba9876543210 , 155 ) + +[63,9]: + int 0fdb97530eca8642155 <- ( fedcba9876543210 , f55 ) + +[63,8]: + int 7edcba987654321055 <- ( fedcba9876543210 , 55 ) + +[63,7]: + int 3f6e5d4c3b2a190855 <- ( fedcba9876543210 , d5 ) + +[63,6]: + int 1fb72ea61d950c8415 <- ( fedcba9876543210 , 15 ) + +[63,5]: + int 0fdb97530eca864215 <- ( fedcba9876543210 , f5 ) + +[63,4]: + int 7edcba98765432105 <- ( fedcba9876543210 , 5 ) + +[63,3]: + int 3f6e5d4c3b2a19085 <- ( fedcba9876543210 , d ) + +[63,2]: + int 1fb72ea61d950c841 <- ( fedcba9876543210 , 1 ) + +[63,1]: + int 0fdb97530eca86421 <- ( fedcba9876543210 , f ) + +[62,64]: + int 3edcba9876543210aaaaaaaa55555555 <- ( fedcba9876543210 , aaaaaaaa55555555 ) + +[62,63]: + int 1f6e5d4c3b2a19082aaaaaaa55555555 <- ( fedcba9876543210 , 2aaaaaaa55555555 ) + +[62,62]: + int 0fb72ea61d950c842aaaaaaa55555555 <- ( fedcba9876543210 , eaaaaaaa55555555 ) + +[62,61]: + int 7db97530eca86420aaaaaaa55555555 <- ( fedcba9876543210 , 0aaaaaaa55555555 ) + +[62,60]: + int 3edcba9876543210aaaaaaa55555555 <- ( fedcba9876543210 , aaaaaaa55555555 ) + +[62,59]: + int 1f6e5d4c3b2a19082aaaaaa55555555 <- ( fedcba9876543210 , 2aaaaaa55555555 ) + +[62,58]: + int 0fb72ea61d950c842aaaaaa55555555 <- ( fedcba9876543210 , eaaaaaa55555555 ) + +[62,57]: + int 7db97530eca86420aaaaaa55555555 <- ( fedcba9876543210 , 0aaaaaa55555555 ) + +[62,56]: + int 3edcba9876543210aaaaaa55555555 <- ( fedcba9876543210 , aaaaaa55555555 ) + +[62,55]: + int 1f6e5d4c3b2a19082aaaaa55555555 <- ( fedcba9876543210 , 2aaaaa55555555 ) + +[62,54]: + int 0fb72ea61d950c842aaaaa55555555 <- ( fedcba9876543210 , eaaaaa55555555 ) + +[62,53]: + int 7db97530eca86420aaaaa55555555 <- ( fedcba9876543210 , 0aaaaa55555555 ) + +[62,52]: + int 3edcba9876543210aaaaa55555555 <- ( fedcba9876543210 , aaaaa55555555 ) + +[62,51]: + int 1f6e5d4c3b2a19082aaaa55555555 <- ( fedcba9876543210 , 2aaaa55555555 ) + +[62,50]: + int 0fb72ea61d950c842aaaa55555555 <- ( fedcba9876543210 , eaaaa55555555 ) + +[62,49]: + int 7db97530eca86420aaaa55555555 <- ( fedcba9876543210 , 0aaaa55555555 ) + +[62,48]: + int 3edcba9876543210aaaa55555555 <- ( fedcba9876543210 , aaaa55555555 ) + +[62,47]: + int 1f6e5d4c3b2a19082aaa55555555 <- ( fedcba9876543210 , 2aaa55555555 ) + +[62,46]: + int 0fb72ea61d950c842aaa55555555 <- ( fedcba9876543210 , eaaa55555555 ) + +[62,45]: + int 7db97530eca86420aaa55555555 <- ( fedcba9876543210 , 0aaa55555555 ) + +[62,44]: + int 3edcba9876543210aaa55555555 <- ( fedcba9876543210 , aaa55555555 ) + +[62,43]: + int 1f6e5d4c3b2a19082aa55555555 <- ( fedcba9876543210 , 2aa55555555 ) + +[62,42]: + int 0fb72ea61d950c842aa55555555 <- ( fedcba9876543210 , eaa55555555 ) + +[62,41]: + int 7db97530eca86420aa55555555 <- ( fedcba9876543210 , 0aa55555555 ) + +[62,40]: + int 3edcba9876543210aa55555555 <- ( fedcba9876543210 , aa55555555 ) + +[62,39]: + int 1f6e5d4c3b2a19082a55555555 <- ( fedcba9876543210 , 2a55555555 ) + +[62,38]: + int 0fb72ea61d950c842a55555555 <- ( fedcba9876543210 , ea55555555 ) + +[62,37]: + int 7db97530eca86420a55555555 <- ( fedcba9876543210 , 0a55555555 ) + +[62,36]: + int 3edcba9876543210a55555555 <- ( fedcba9876543210 , a55555555 ) + +[62,35]: + int 1f6e5d4c3b2a1908255555555 <- ( fedcba9876543210 , 255555555 ) + +[62,34]: + int 0fb72ea61d950c84255555555 <- ( fedcba9876543210 , e55555555 ) + +[62,33]: + int 7db97530eca8642055555555 <- ( fedcba9876543210 , 055555555 ) + +[62,32]: + int 3edcba987654321055555555 <- ( fedcba9876543210 , 55555555 ) + +[62,31]: + int 1f6e5d4c3b2a190855555555 <- ( fedcba9876543210 , d5555555 ) + +[62,30]: + int 0fb72ea61d950c8415555555 <- ( fedcba9876543210 , 15555555 ) + +[62,29]: + int 7db97530eca864215555555 <- ( fedcba9876543210 , f5555555 ) + +[62,28]: + int 3edcba98765432105555555 <- ( fedcba9876543210 , 5555555 ) + +[62,27]: + int 1f6e5d4c3b2a19085555555 <- ( fedcba9876543210 , d555555 ) + +[62,26]: + int 0fb72ea61d950c841555555 <- ( fedcba9876543210 , 1555555 ) + +[62,25]: + int 7db97530eca86421555555 <- ( fedcba9876543210 , f555555 ) + +[62,24]: + int 3edcba9876543210555555 <- ( fedcba9876543210 , 555555 ) + +[62,23]: + int 1f6e5d4c3b2a1908555555 <- ( fedcba9876543210 , d55555 ) + +[62,22]: + int 0fb72ea61d950c84155555 <- ( fedcba9876543210 , 155555 ) + +[62,21]: + int 7db97530eca8642155555 <- ( fedcba9876543210 , f55555 ) + +[62,20]: + int 3edcba987654321055555 <- ( fedcba9876543210 , 55555 ) + +[62,19]: + int 1f6e5d4c3b2a190855555 <- ( fedcba9876543210 , d5555 ) + +[62,18]: + int 0fb72ea61d950c8415555 <- ( fedcba9876543210 , 15555 ) + +[62,17]: + int 7db97530eca864215555 <- ( fedcba9876543210 , f5555 ) + +[62,16]: + int 3edcba98765432105555 <- ( fedcba9876543210 , 5555 ) + +[62,15]: + int 1f6e5d4c3b2a19085555 <- ( fedcba9876543210 , d555 ) + +[62,14]: + int 0fb72ea61d950c841555 <- ( fedcba9876543210 , 1555 ) + +[62,13]: + int 7db97530eca86421555 <- ( fedcba9876543210 , f555 ) + +[62,12]: + int 3edcba9876543210555 <- ( fedcba9876543210 , 555 ) + +[62,11]: + int 1f6e5d4c3b2a1908555 <- ( fedcba9876543210 , d55 ) + +[62,10]: + int 0fb72ea61d950c84155 <- ( fedcba9876543210 , 155 ) + +[62,9]: + int 7db97530eca8642155 <- ( fedcba9876543210 , f55 ) + +[62,8]: + int 3edcba987654321055 <- ( fedcba9876543210 , 55 ) + +[62,7]: + int 1f6e5d4c3b2a190855 <- ( fedcba9876543210 , d5 ) + +[62,6]: + int 0fb72ea61d950c8415 <- ( fedcba9876543210 , 15 ) + +[62,5]: + int 7db97530eca864215 <- ( fedcba9876543210 , f5 ) + +[62,4]: + int 3edcba98765432105 <- ( fedcba9876543210 , 5 ) + +[62,3]: + int 1f6e5d4c3b2a19085 <- ( fedcba9876543210 , d ) + +[62,2]: + int 0fb72ea61d950c841 <- ( fedcba9876543210 , 1 ) + +[62,1]: + int 7db97530eca86421 <- ( fedcba9876543210 , f ) + +[61,64]: + int 1edcba9876543210aaaaaaaa55555555 <- ( fedcba9876543210 , aaaaaaaa55555555 ) + +[61,63]: + int 0f6e5d4c3b2a19082aaaaaaa55555555 <- ( fedcba9876543210 , 2aaaaaaa55555555 ) + +[61,62]: + int 7b72ea61d950c842aaaaaaa55555555 <- ( fedcba9876543210 , eaaaaaaa55555555 ) + +[61,61]: + int 3db97530eca86420aaaaaaa55555555 <- ( fedcba9876543210 , 0aaaaaaa55555555 ) + +[61,60]: + int 1edcba9876543210aaaaaaa55555555 <- ( fedcba9876543210 , aaaaaaa55555555 ) + +[61,59]: + int 0f6e5d4c3b2a19082aaaaaa55555555 <- ( fedcba9876543210 , 2aaaaaa55555555 ) + +[61,58]: + int 7b72ea61d950c842aaaaaa55555555 <- ( fedcba9876543210 , eaaaaaa55555555 ) + +[61,57]: + int 3db97530eca86420aaaaaa55555555 <- ( fedcba9876543210 , 0aaaaaa55555555 ) + +[61,56]: + int 1edcba9876543210aaaaaa55555555 <- ( fedcba9876543210 , aaaaaa55555555 ) + +[61,55]: + int 0f6e5d4c3b2a19082aaaaa55555555 <- ( fedcba9876543210 , 2aaaaa55555555 ) + +[61,54]: + int 7b72ea61d950c842aaaaa55555555 <- ( fedcba9876543210 , eaaaaa55555555 ) + +[61,53]: + int 3db97530eca86420aaaaa55555555 <- ( fedcba9876543210 , 0aaaaa55555555 ) + +[61,52]: + int 1edcba9876543210aaaaa55555555 <- ( fedcba9876543210 , aaaaa55555555 ) + +[61,51]: + int 0f6e5d4c3b2a19082aaaa55555555 <- ( fedcba9876543210 , 2aaaa55555555 ) + +[61,50]: + int 7b72ea61d950c842aaaa55555555 <- ( fedcba9876543210 , eaaaa55555555 ) + +[61,49]: + int 3db97530eca86420aaaa55555555 <- ( fedcba9876543210 , 0aaaa55555555 ) + +[61,48]: + int 1edcba9876543210aaaa55555555 <- ( fedcba9876543210 , aaaa55555555 ) + +[61,47]: + int 0f6e5d4c3b2a19082aaa55555555 <- ( fedcba9876543210 , 2aaa55555555 ) + +[61,46]: + int 7b72ea61d950c842aaa55555555 <- ( fedcba9876543210 , eaaa55555555 ) + +[61,45]: + int 3db97530eca86420aaa55555555 <- ( fedcba9876543210 , 0aaa55555555 ) + +[61,44]: + int 1edcba9876543210aaa55555555 <- ( fedcba9876543210 , aaa55555555 ) + +[61,43]: + int 0f6e5d4c3b2a19082aa55555555 <- ( fedcba9876543210 , 2aa55555555 ) + +[61,42]: + int 7b72ea61d950c842aa55555555 <- ( fedcba9876543210 , eaa55555555 ) + +[61,41]: + int 3db97530eca86420aa55555555 <- ( fedcba9876543210 , 0aa55555555 ) + +[61,40]: + int 1edcba9876543210aa55555555 <- ( fedcba9876543210 , aa55555555 ) + +[61,39]: + int 0f6e5d4c3b2a19082a55555555 <- ( fedcba9876543210 , 2a55555555 ) + +[61,38]: + int 7b72ea61d950c842a55555555 <- ( fedcba9876543210 , ea55555555 ) + +[61,37]: + int 3db97530eca86420a55555555 <- ( fedcba9876543210 , 0a55555555 ) + +[61,36]: + int 1edcba9876543210a55555555 <- ( fedcba9876543210 , a55555555 ) + +[61,35]: + int 0f6e5d4c3b2a1908255555555 <- ( fedcba9876543210 , 255555555 ) + +[61,34]: + int 7b72ea61d950c84255555555 <- ( fedcba9876543210 , e55555555 ) + +[61,33]: + int 3db97530eca8642055555555 <- ( fedcba9876543210 , 055555555 ) + +[61,32]: + int 1edcba987654321055555555 <- ( fedcba9876543210 , 55555555 ) + +[61,31]: + int 0f6e5d4c3b2a190855555555 <- ( fedcba9876543210 , d5555555 ) + +[61,30]: + int 7b72ea61d950c8415555555 <- ( fedcba9876543210 , 15555555 ) + +[61,29]: + int 3db97530eca864215555555 <- ( fedcba9876543210 , f5555555 ) + +[61,28]: + int 1edcba98765432105555555 <- ( fedcba9876543210 , 5555555 ) + +[61,27]: + int 0f6e5d4c3b2a19085555555 <- ( fedcba9876543210 , d555555 ) + +[61,26]: + int 7b72ea61d950c841555555 <- ( fedcba9876543210 , 1555555 ) + +[61,25]: + int 3db97530eca86421555555 <- ( fedcba9876543210 , f555555 ) + +[61,24]: + int 1edcba9876543210555555 <- ( fedcba9876543210 , 555555 ) + +[61,23]: + int 0f6e5d4c3b2a1908555555 <- ( fedcba9876543210 , d55555 ) + +[61,22]: + int 7b72ea61d950c84155555 <- ( fedcba9876543210 , 155555 ) + +[61,21]: + int 3db97530eca8642155555 <- ( fedcba9876543210 , f55555 ) + +[61,20]: + int 1edcba987654321055555 <- ( fedcba9876543210 , 55555 ) + +[61,19]: + int 0f6e5d4c3b2a190855555 <- ( fedcba9876543210 , d5555 ) + +[61,18]: + int 7b72ea61d950c8415555 <- ( fedcba9876543210 , 15555 ) + +[61,17]: + int 3db97530eca864215555 <- ( fedcba9876543210 , f5555 ) + +[61,16]: + int 1edcba98765432105555 <- ( fedcba9876543210 , 5555 ) + +[61,15]: + int 0f6e5d4c3b2a19085555 <- ( fedcba9876543210 , d555 ) + +[61,14]: + int 7b72ea61d950c841555 <- ( fedcba9876543210 , 1555 ) + +[61,13]: + int 3db97530eca86421555 <- ( fedcba9876543210 , f555 ) + +[61,12]: + int 1edcba9876543210555 <- ( fedcba9876543210 , 555 ) + +[61,11]: + int 0f6e5d4c3b2a1908555 <- ( fedcba9876543210 , d55 ) + +[61,10]: + int 7b72ea61d950c84155 <- ( fedcba9876543210 , 155 ) + +[61,9]: + int 3db97530eca8642155 <- ( fedcba9876543210 , f55 ) + +[61,8]: + int 1edcba987654321055 <- ( fedcba9876543210 , 55 ) + +[61,7]: + int 0f6e5d4c3b2a190855 <- ( fedcba9876543210 , d5 ) + +[61,6]: + int 7b72ea61d950c8415 <- ( fedcba9876543210 , 15 ) + +[61,5]: + int 3db97530eca864215 <- ( fedcba9876543210 , f5 ) + +[61,4]: + int 1edcba98765432105 <- ( fedcba9876543210 , 5 ) + +[61,3]: + int 0f6e5d4c3b2a19085 <- ( fedcba9876543210 , d ) + +[61,2]: + int 7b72ea61d950c841 <- ( fedcba9876543210 , 1 ) + +[61,1]: + int 3db97530eca86421 <- ( fedcba9876543210 , f ) + +[60,64]: + int 0edcba9876543210aaaaaaaa55555555 <- ( edcba9876543210 , aaaaaaaa55555555 ) + +[60,63]: + int 76e5d4c3b2a19082aaaaaaa55555555 <- ( edcba9876543210 , 2aaaaaaa55555555 ) + +[60,62]: + int 3b72ea61d950c842aaaaaaa55555555 <- ( edcba9876543210 , eaaaaaaa55555555 ) + +[60,61]: + int 1db97530eca86420aaaaaaa55555555 <- ( edcba9876543210 , 0aaaaaaa55555555 ) + +[60,60]: + int 0edcba9876543210aaaaaaa55555555 <- ( edcba9876543210 , aaaaaaa55555555 ) + +[60,59]: + int 76e5d4c3b2a19082aaaaaa55555555 <- ( edcba9876543210 , 2aaaaaa55555555 ) + +[60,58]: + int 3b72ea61d950c842aaaaaa55555555 <- ( edcba9876543210 , eaaaaaa55555555 ) + +[60,57]: + int 1db97530eca86420aaaaaa55555555 <- ( edcba9876543210 , 0aaaaaa55555555 ) + +[60,56]: + int 0edcba9876543210aaaaaa55555555 <- ( edcba9876543210 , aaaaaa55555555 ) + +[60,55]: + int 76e5d4c3b2a19082aaaaa55555555 <- ( edcba9876543210 , 2aaaaa55555555 ) + +[60,54]: + int 3b72ea61d950c842aaaaa55555555 <- ( edcba9876543210 , eaaaaa55555555 ) + +[60,53]: + int 1db97530eca86420aaaaa55555555 <- ( edcba9876543210 , 0aaaaa55555555 ) + +[60,52]: + int 0edcba9876543210aaaaa55555555 <- ( edcba9876543210 , aaaaa55555555 ) + +[60,51]: + int 76e5d4c3b2a19082aaaa55555555 <- ( edcba9876543210 , 2aaaa55555555 ) + +[60,50]: + int 3b72ea61d950c842aaaa55555555 <- ( edcba9876543210 , eaaaa55555555 ) + +[60,49]: + int 1db97530eca86420aaaa55555555 <- ( edcba9876543210 , 0aaaa55555555 ) + +[60,48]: + int 0edcba9876543210aaaa55555555 <- ( edcba9876543210 , aaaa55555555 ) + +[60,47]: + int 76e5d4c3b2a19082aaa55555555 <- ( edcba9876543210 , 2aaa55555555 ) + +[60,46]: + int 3b72ea61d950c842aaa55555555 <- ( edcba9876543210 , eaaa55555555 ) + +[60,45]: + int 1db97530eca86420aaa55555555 <- ( edcba9876543210 , 0aaa55555555 ) + +[60,44]: + int 0edcba9876543210aaa55555555 <- ( edcba9876543210 , aaa55555555 ) + +[60,43]: + int 76e5d4c3b2a19082aa55555555 <- ( edcba9876543210 , 2aa55555555 ) + +[60,42]: + int 3b72ea61d950c842aa55555555 <- ( edcba9876543210 , eaa55555555 ) + +[60,41]: + int 1db97530eca86420aa55555555 <- ( edcba9876543210 , 0aa55555555 ) + +[60,40]: + int 0edcba9876543210aa55555555 <- ( edcba9876543210 , aa55555555 ) + +[60,39]: + int 76e5d4c3b2a19082a55555555 <- ( edcba9876543210 , 2a55555555 ) + +[60,38]: + int 3b72ea61d950c842a55555555 <- ( edcba9876543210 , ea55555555 ) + +[60,37]: + int 1db97530eca86420a55555555 <- ( edcba9876543210 , 0a55555555 ) + +[60,36]: + int 0edcba9876543210a55555555 <- ( edcba9876543210 , a55555555 ) + +[60,35]: + int 76e5d4c3b2a1908255555555 <- ( edcba9876543210 , 255555555 ) + +[60,34]: + int 3b72ea61d950c84255555555 <- ( edcba9876543210 , e55555555 ) + +[60,33]: + int 1db97530eca8642055555555 <- ( edcba9876543210 , 055555555 ) + +[60,32]: + int 0edcba987654321055555555 <- ( edcba9876543210 , 55555555 ) + +[60,31]: + int 76e5d4c3b2a190855555555 <- ( edcba9876543210 , d5555555 ) + +[60,30]: + int 3b72ea61d950c8415555555 <- ( edcba9876543210 , 15555555 ) + +[60,29]: + int 1db97530eca864215555555 <- ( edcba9876543210 , f5555555 ) + +[60,28]: + int 0edcba98765432105555555 <- ( edcba9876543210 , 5555555 ) + +[60,27]: + int 76e5d4c3b2a19085555555 <- ( edcba9876543210 , d555555 ) + +[60,26]: + int 3b72ea61d950c841555555 <- ( edcba9876543210 , 1555555 ) + +[60,25]: + int 1db97530eca86421555555 <- ( edcba9876543210 , f555555 ) + +[60,24]: + int 0edcba9876543210555555 <- ( edcba9876543210 , 555555 ) + +[60,23]: + int 76e5d4c3b2a1908555555 <- ( edcba9876543210 , d55555 ) + +[60,22]: + int 3b72ea61d950c84155555 <- ( edcba9876543210 , 155555 ) + +[60,21]: + int 1db97530eca8642155555 <- ( edcba9876543210 , f55555 ) + +[60,20]: + int 0edcba987654321055555 <- ( edcba9876543210 , 55555 ) + +[60,19]: + int 76e5d4c3b2a190855555 <- ( edcba9876543210 , d5555 ) + +[60,18]: + int 3b72ea61d950c8415555 <- ( edcba9876543210 , 15555 ) + +[60,17]: + int 1db97530eca864215555 <- ( edcba9876543210 , f5555 ) + +[60,16]: + int 0edcba98765432105555 <- ( edcba9876543210 , 5555 ) + +[60,15]: + int 76e5d4c3b2a19085555 <- ( edcba9876543210 , d555 ) + +[60,14]: + int 3b72ea61d950c841555 <- ( edcba9876543210 , 1555 ) + +[60,13]: + int 1db97530eca86421555 <- ( edcba9876543210 , f555 ) + +[60,12]: + int 0edcba9876543210555 <- ( edcba9876543210 , 555 ) + +[60,11]: + int 76e5d4c3b2a1908555 <- ( edcba9876543210 , d55 ) + +[60,10]: + int 3b72ea61d950c84155 <- ( edcba9876543210 , 155 ) + +[60,9]: + int 1db97530eca8642155 <- ( edcba9876543210 , f55 ) + +[60,8]: + int 0edcba987654321055 <- ( edcba9876543210 , 55 ) + +[60,7]: + int 76e5d4c3b2a190855 <- ( edcba9876543210 , d5 ) + +[60,6]: + int 3b72ea61d950c8415 <- ( edcba9876543210 , 15 ) + +[60,5]: + int 1db97530eca864215 <- ( edcba9876543210 , f5 ) + +[60,4]: + int 0edcba98765432105 <- ( edcba9876543210 , 5 ) + +[60,3]: + int 76e5d4c3b2a19085 <- ( edcba9876543210 , d ) + +[60,2]: + int 3b72ea61d950c841 <- ( edcba9876543210 , 1 ) + +[60,1]: + int 1db97530eca86421 <- ( edcba9876543210 , f ) + +[59,64]: + int 6dcba9876543210aaaaaaaa55555555 <- ( edcba9876543210 , aaaaaaaa55555555 ) + +[59,63]: + int 36e5d4c3b2a19082aaaaaaa55555555 <- ( edcba9876543210 , 2aaaaaaa55555555 ) + +[59,62]: + int 1b72ea61d950c842aaaaaaa55555555 <- ( edcba9876543210 , eaaaaaaa55555555 ) + +[59,61]: + int 0db97530eca86420aaaaaaa55555555 <- ( edcba9876543210 , 0aaaaaaa55555555 ) + +[59,60]: + int 6dcba9876543210aaaaaaa55555555 <- ( edcba9876543210 , aaaaaaa55555555 ) + +[59,59]: + int 36e5d4c3b2a19082aaaaaa55555555 <- ( edcba9876543210 , 2aaaaaa55555555 ) + +[59,58]: + int 1b72ea61d950c842aaaaaa55555555 <- ( edcba9876543210 , eaaaaaa55555555 ) + +[59,57]: + int 0db97530eca86420aaaaaa55555555 <- ( edcba9876543210 , 0aaaaaa55555555 ) + +[59,56]: + int 6dcba9876543210aaaaaa55555555 <- ( edcba9876543210 , aaaaaa55555555 ) + +[59,55]: + int 36e5d4c3b2a19082aaaaa55555555 <- ( edcba9876543210 , 2aaaaa55555555 ) + +[59,54]: + int 1b72ea61d950c842aaaaa55555555 <- ( edcba9876543210 , eaaaaa55555555 ) + +[59,53]: + int 0db97530eca86420aaaaa55555555 <- ( edcba9876543210 , 0aaaaa55555555 ) + +[59,52]: + int 6dcba9876543210aaaaa55555555 <- ( edcba9876543210 , aaaaa55555555 ) + +[59,51]: + int 36e5d4c3b2a19082aaaa55555555 <- ( edcba9876543210 , 2aaaa55555555 ) + +[59,50]: + int 1b72ea61d950c842aaaa55555555 <- ( edcba9876543210 , eaaaa55555555 ) + +[59,49]: + int 0db97530eca86420aaaa55555555 <- ( edcba9876543210 , 0aaaa55555555 ) + +[59,48]: + int 6dcba9876543210aaaa55555555 <- ( edcba9876543210 , aaaa55555555 ) + +[59,47]: + int 36e5d4c3b2a19082aaa55555555 <- ( edcba9876543210 , 2aaa55555555 ) + +[59,46]: + int 1b72ea61d950c842aaa55555555 <- ( edcba9876543210 , eaaa55555555 ) + +[59,45]: + int 0db97530eca86420aaa55555555 <- ( edcba9876543210 , 0aaa55555555 ) + +[59,44]: + int 6dcba9876543210aaa55555555 <- ( edcba9876543210 , aaa55555555 ) + +[59,43]: + int 36e5d4c3b2a19082aa55555555 <- ( edcba9876543210 , 2aa55555555 ) + +[59,42]: + int 1b72ea61d950c842aa55555555 <- ( edcba9876543210 , eaa55555555 ) + +[59,41]: + int 0db97530eca86420aa55555555 <- ( edcba9876543210 , 0aa55555555 ) + +[59,40]: + int 6dcba9876543210aa55555555 <- ( edcba9876543210 , aa55555555 ) + +[59,39]: + int 36e5d4c3b2a19082a55555555 <- ( edcba9876543210 , 2a55555555 ) + +[59,38]: + int 1b72ea61d950c842a55555555 <- ( edcba9876543210 , ea55555555 ) + +[59,37]: + int 0db97530eca86420a55555555 <- ( edcba9876543210 , 0a55555555 ) + +[59,36]: + int 6dcba9876543210a55555555 <- ( edcba9876543210 , a55555555 ) + +[59,35]: + int 36e5d4c3b2a1908255555555 <- ( edcba9876543210 , 255555555 ) + +[59,34]: + int 1b72ea61d950c84255555555 <- ( edcba9876543210 , e55555555 ) + +[59,33]: + int 0db97530eca8642055555555 <- ( edcba9876543210 , 055555555 ) + +[59,32]: + int 6dcba987654321055555555 <- ( edcba9876543210 , 55555555 ) + +[59,31]: + int 36e5d4c3b2a190855555555 <- ( edcba9876543210 , d5555555 ) + +[59,30]: + int 1b72ea61d950c8415555555 <- ( edcba9876543210 , 15555555 ) + +[59,29]: + int 0db97530eca864215555555 <- ( edcba9876543210 , f5555555 ) + +[59,28]: + int 6dcba98765432105555555 <- ( edcba9876543210 , 5555555 ) + +[59,27]: + int 36e5d4c3b2a19085555555 <- ( edcba9876543210 , d555555 ) + +[59,26]: + int 1b72ea61d950c841555555 <- ( edcba9876543210 , 1555555 ) + +[59,25]: + int 0db97530eca86421555555 <- ( edcba9876543210 , f555555 ) + +[59,24]: + int 6dcba9876543210555555 <- ( edcba9876543210 , 555555 ) + +[59,23]: + int 36e5d4c3b2a1908555555 <- ( edcba9876543210 , d55555 ) + +[59,22]: + int 1b72ea61d950c84155555 <- ( edcba9876543210 , 155555 ) + +[59,21]: + int 0db97530eca8642155555 <- ( edcba9876543210 , f55555 ) + +[59,20]: + int 6dcba987654321055555 <- ( edcba9876543210 , 55555 ) + +[59,19]: + int 36e5d4c3b2a190855555 <- ( edcba9876543210 , d5555 ) + +[59,18]: + int 1b72ea61d950c8415555 <- ( edcba9876543210 , 15555 ) + +[59,17]: + int 0db97530eca864215555 <- ( edcba9876543210 , f5555 ) + +[59,16]: + int 6dcba98765432105555 <- ( edcba9876543210 , 5555 ) + +[59,15]: + int 36e5d4c3b2a19085555 <- ( edcba9876543210 , d555 ) + +[59,14]: + int 1b72ea61d950c841555 <- ( edcba9876543210 , 1555 ) + +[59,13]: + int 0db97530eca86421555 <- ( edcba9876543210 , f555 ) + +[59,12]: + int 6dcba9876543210555 <- ( edcba9876543210 , 555 ) + +[59,11]: + int 36e5d4c3b2a1908555 <- ( edcba9876543210 , d55 ) + +[59,10]: + int 1b72ea61d950c84155 <- ( edcba9876543210 , 155 ) + +[59,9]: + int 0db97530eca8642155 <- ( edcba9876543210 , f55 ) + +[59,8]: + int 6dcba987654321055 <- ( edcba9876543210 , 55 ) + +[59,7]: + int 36e5d4c3b2a190855 <- ( edcba9876543210 , d5 ) + +[59,6]: + int 1b72ea61d950c8415 <- ( edcba9876543210 , 15 ) + +[59,5]: + int 0db97530eca864215 <- ( edcba9876543210 , f5 ) + +[59,4]: + int 6dcba98765432105 <- ( edcba9876543210 , 5 ) + +[59,3]: + int 36e5d4c3b2a19085 <- ( edcba9876543210 , d ) + +[59,2]: + int 1b72ea61d950c841 <- ( edcba9876543210 , 1 ) + +[59,1]: + int 0db97530eca86421 <- ( edcba9876543210 , f ) + +[58,64]: + int 2dcba9876543210aaaaaaaa55555555 <- ( edcba9876543210 , aaaaaaaa55555555 ) + +[58,63]: + int 16e5d4c3b2a19082aaaaaaa55555555 <- ( edcba9876543210 , 2aaaaaaa55555555 ) + +[58,62]: + int 0b72ea61d950c842aaaaaaa55555555 <- ( edcba9876543210 , eaaaaaaa55555555 ) + +[58,61]: + int 5b97530eca86420aaaaaaa55555555 <- ( edcba9876543210 , 0aaaaaaa55555555 ) + +[58,60]: + int 2dcba9876543210aaaaaaa55555555 <- ( edcba9876543210 , aaaaaaa55555555 ) + +[58,59]: + int 16e5d4c3b2a19082aaaaaa55555555 <- ( edcba9876543210 , 2aaaaaa55555555 ) + +[58,58]: + int 0b72ea61d950c842aaaaaa55555555 <- ( edcba9876543210 , eaaaaaa55555555 ) + +[58,57]: + int 5b97530eca86420aaaaaa55555555 <- ( edcba9876543210 , 0aaaaaa55555555 ) + +[58,56]: + int 2dcba9876543210aaaaaa55555555 <- ( edcba9876543210 , aaaaaa55555555 ) + +[58,55]: + int 16e5d4c3b2a19082aaaaa55555555 <- ( edcba9876543210 , 2aaaaa55555555 ) + +[58,54]: + int 0b72ea61d950c842aaaaa55555555 <- ( edcba9876543210 , eaaaaa55555555 ) + +[58,53]: + int 5b97530eca86420aaaaa55555555 <- ( edcba9876543210 , 0aaaaa55555555 ) + +[58,52]: + int 2dcba9876543210aaaaa55555555 <- ( edcba9876543210 , aaaaa55555555 ) + +[58,51]: + int 16e5d4c3b2a19082aaaa55555555 <- ( edcba9876543210 , 2aaaa55555555 ) + +[58,50]: + int 0b72ea61d950c842aaaa55555555 <- ( edcba9876543210 , eaaaa55555555 ) + +[58,49]: + int 5b97530eca86420aaaa55555555 <- ( edcba9876543210 , 0aaaa55555555 ) + +[58,48]: + int 2dcba9876543210aaaa55555555 <- ( edcba9876543210 , aaaa55555555 ) + +[58,47]: + int 16e5d4c3b2a19082aaa55555555 <- ( edcba9876543210 , 2aaa55555555 ) + +[58,46]: + int 0b72ea61d950c842aaa55555555 <- ( edcba9876543210 , eaaa55555555 ) + +[58,45]: + int 5b97530eca86420aaa55555555 <- ( edcba9876543210 , 0aaa55555555 ) + +[58,44]: + int 2dcba9876543210aaa55555555 <- ( edcba9876543210 , aaa55555555 ) + +[58,43]: + int 16e5d4c3b2a19082aa55555555 <- ( edcba9876543210 , 2aa55555555 ) + +[58,42]: + int 0b72ea61d950c842aa55555555 <- ( edcba9876543210 , eaa55555555 ) + +[58,41]: + int 5b97530eca86420aa55555555 <- ( edcba9876543210 , 0aa55555555 ) + +[58,40]: + int 2dcba9876543210aa55555555 <- ( edcba9876543210 , aa55555555 ) + +[58,39]: + int 16e5d4c3b2a19082a55555555 <- ( edcba9876543210 , 2a55555555 ) + +[58,38]: + int 0b72ea61d950c842a55555555 <- ( edcba9876543210 , ea55555555 ) + +[58,37]: + int 5b97530eca86420a55555555 <- ( edcba9876543210 , 0a55555555 ) + +[58,36]: + int 2dcba9876543210a55555555 <- ( edcba9876543210 , a55555555 ) + +[58,35]: + int 16e5d4c3b2a1908255555555 <- ( edcba9876543210 , 255555555 ) + +[58,34]: + int 0b72ea61d950c84255555555 <- ( edcba9876543210 , e55555555 ) + +[58,33]: + int 5b97530eca8642055555555 <- ( edcba9876543210 , 055555555 ) + +[58,32]: + int 2dcba987654321055555555 <- ( edcba9876543210 , 55555555 ) + +[58,31]: + int 16e5d4c3b2a190855555555 <- ( edcba9876543210 , d5555555 ) + +[58,30]: + int 0b72ea61d950c8415555555 <- ( edcba9876543210 , 15555555 ) + +[58,29]: + int 5b97530eca864215555555 <- ( edcba9876543210 , f5555555 ) + +[58,28]: + int 2dcba98765432105555555 <- ( edcba9876543210 , 5555555 ) + +[58,27]: + int 16e5d4c3b2a19085555555 <- ( edcba9876543210 , d555555 ) + +[58,26]: + int 0b72ea61d950c841555555 <- ( edcba9876543210 , 1555555 ) + +[58,25]: + int 5b97530eca86421555555 <- ( edcba9876543210 , f555555 ) + +[58,24]: + int 2dcba9876543210555555 <- ( edcba9876543210 , 555555 ) + +[58,23]: + int 16e5d4c3b2a1908555555 <- ( edcba9876543210 , d55555 ) + +[58,22]: + int 0b72ea61d950c84155555 <- ( edcba9876543210 , 155555 ) + +[58,21]: + int 5b97530eca8642155555 <- ( edcba9876543210 , f55555 ) + +[58,20]: + int 2dcba987654321055555 <- ( edcba9876543210 , 55555 ) + +[58,19]: + int 16e5d4c3b2a190855555 <- ( edcba9876543210 , d5555 ) + +[58,18]: + int 0b72ea61d950c8415555 <- ( edcba9876543210 , 15555 ) + +[58,17]: + int 5b97530eca864215555 <- ( edcba9876543210 , f5555 ) + +[58,16]: + int 2dcba98765432105555 <- ( edcba9876543210 , 5555 ) + +[58,15]: + int 16e5d4c3b2a19085555 <- ( edcba9876543210 , d555 ) + +[58,14]: + int 0b72ea61d950c841555 <- ( edcba9876543210 , 1555 ) + +[58,13]: + int 5b97530eca86421555 <- ( edcba9876543210 , f555 ) + +[58,12]: + int 2dcba9876543210555 <- ( edcba9876543210 , 555 ) + +[58,11]: + int 16e5d4c3b2a1908555 <- ( edcba9876543210 , d55 ) + +[58,10]: + int 0b72ea61d950c84155 <- ( edcba9876543210 , 155 ) + +[58,9]: + int 5b97530eca8642155 <- ( edcba9876543210 , f55 ) + +[58,8]: + int 2dcba987654321055 <- ( edcba9876543210 , 55 ) + +[58,7]: + int 16e5d4c3b2a190855 <- ( edcba9876543210 , d5 ) + +[58,6]: + int 0b72ea61d950c8415 <- ( edcba9876543210 , 15 ) + +[58,5]: + int 5b97530eca864215 <- ( edcba9876543210 , f5 ) + +[58,4]: + int 2dcba98765432105 <- ( edcba9876543210 , 5 ) + +[58,3]: + int 16e5d4c3b2a19085 <- ( edcba9876543210 , d ) + +[58,2]: + int 0b72ea61d950c841 <- ( edcba9876543210 , 1 ) + +[58,1]: + int 5b97530eca86421 <- ( edcba9876543210 , f ) + +[57,64]: + int 0dcba9876543210aaaaaaaa55555555 <- ( 0dcba9876543210 , aaaaaaaa55555555 ) + +[57,63]: + int 06e5d4c3b2a19082aaaaaaa55555555 <- ( 0dcba9876543210 , 2aaaaaaa55555555 ) + +[57,62]: + int 372ea61d950c842aaaaaaa55555555 <- ( 0dcba9876543210 , eaaaaaaa55555555 ) + +[57,61]: + int 1b97530eca86420aaaaaaa55555555 <- ( 0dcba9876543210 , 0aaaaaaa55555555 ) + +[57,60]: + int 0dcba9876543210aaaaaaa55555555 <- ( 0dcba9876543210 , aaaaaaa55555555 ) + +[57,59]: + int 06e5d4c3b2a19082aaaaaa55555555 <- ( 0dcba9876543210 , 2aaaaaa55555555 ) + +[57,58]: + int 372ea61d950c842aaaaaa55555555 <- ( 0dcba9876543210 , eaaaaaa55555555 ) + +[57,57]: + int 1b97530eca86420aaaaaa55555555 <- ( 0dcba9876543210 , 0aaaaaa55555555 ) + +[57,56]: + int 0dcba9876543210aaaaaa55555555 <- ( 0dcba9876543210 , aaaaaa55555555 ) + +[57,55]: + int 06e5d4c3b2a19082aaaaa55555555 <- ( 0dcba9876543210 , 2aaaaa55555555 ) + +[57,54]: + int 372ea61d950c842aaaaa55555555 <- ( 0dcba9876543210 , eaaaaa55555555 ) + +[57,53]: + int 1b97530eca86420aaaaa55555555 <- ( 0dcba9876543210 , 0aaaaa55555555 ) + +[57,52]: + int 0dcba9876543210aaaaa55555555 <- ( 0dcba9876543210 , aaaaa55555555 ) + +[57,51]: + int 06e5d4c3b2a19082aaaa55555555 <- ( 0dcba9876543210 , 2aaaa55555555 ) + +[57,50]: + int 372ea61d950c842aaaa55555555 <- ( 0dcba9876543210 , eaaaa55555555 ) + +[57,49]: + int 1b97530eca86420aaaa55555555 <- ( 0dcba9876543210 , 0aaaa55555555 ) + +[57,48]: + int 0dcba9876543210aaaa55555555 <- ( 0dcba9876543210 , aaaa55555555 ) + +[57,47]: + int 06e5d4c3b2a19082aaa55555555 <- ( 0dcba9876543210 , 2aaa55555555 ) + +[57,46]: + int 372ea61d950c842aaa55555555 <- ( 0dcba9876543210 , eaaa55555555 ) + +[57,45]: + int 1b97530eca86420aaa55555555 <- ( 0dcba9876543210 , 0aaa55555555 ) + +[57,44]: + int 0dcba9876543210aaa55555555 <- ( 0dcba9876543210 , aaa55555555 ) + +[57,43]: + int 06e5d4c3b2a19082aa55555555 <- ( 0dcba9876543210 , 2aa55555555 ) + +[57,42]: + int 372ea61d950c842aa55555555 <- ( 0dcba9876543210 , eaa55555555 ) + +[57,41]: + int 1b97530eca86420aa55555555 <- ( 0dcba9876543210 , 0aa55555555 ) + +[57,40]: + int 0dcba9876543210aa55555555 <- ( 0dcba9876543210 , aa55555555 ) + +[57,39]: + int 06e5d4c3b2a19082a55555555 <- ( 0dcba9876543210 , 2a55555555 ) + +[57,38]: + int 372ea61d950c842a55555555 <- ( 0dcba9876543210 , ea55555555 ) + +[57,37]: + int 1b97530eca86420a55555555 <- ( 0dcba9876543210 , 0a55555555 ) + +[57,36]: + int 0dcba9876543210a55555555 <- ( 0dcba9876543210 , a55555555 ) + +[57,35]: + int 06e5d4c3b2a1908255555555 <- ( 0dcba9876543210 , 255555555 ) + +[57,34]: + int 372ea61d950c84255555555 <- ( 0dcba9876543210 , e55555555 ) + +[57,33]: + int 1b97530eca8642055555555 <- ( 0dcba9876543210 , 055555555 ) + +[57,32]: + int 0dcba987654321055555555 <- ( 0dcba9876543210 , 55555555 ) + +[57,31]: + int 06e5d4c3b2a190855555555 <- ( 0dcba9876543210 , d5555555 ) + +[57,30]: + int 372ea61d950c8415555555 <- ( 0dcba9876543210 , 15555555 ) + +[57,29]: + int 1b97530eca864215555555 <- ( 0dcba9876543210 , f5555555 ) + +[57,28]: + int 0dcba98765432105555555 <- ( 0dcba9876543210 , 5555555 ) + +[57,27]: + int 06e5d4c3b2a19085555555 <- ( 0dcba9876543210 , d555555 ) + +[57,26]: + int 372ea61d950c841555555 <- ( 0dcba9876543210 , 1555555 ) + +[57,25]: + int 1b97530eca86421555555 <- ( 0dcba9876543210 , f555555 ) + +[57,24]: + int 0dcba9876543210555555 <- ( 0dcba9876543210 , 555555 ) + +[57,23]: + int 06e5d4c3b2a1908555555 <- ( 0dcba9876543210 , d55555 ) + +[57,22]: + int 372ea61d950c84155555 <- ( 0dcba9876543210 , 155555 ) + +[57,21]: + int 1b97530eca8642155555 <- ( 0dcba9876543210 , f55555 ) + +[57,20]: + int 0dcba987654321055555 <- ( 0dcba9876543210 , 55555 ) + +[57,19]: + int 06e5d4c3b2a190855555 <- ( 0dcba9876543210 , d5555 ) + +[57,18]: + int 372ea61d950c8415555 <- ( 0dcba9876543210 , 15555 ) + +[57,17]: + int 1b97530eca864215555 <- ( 0dcba9876543210 , f5555 ) + +[57,16]: + int 0dcba98765432105555 <- ( 0dcba9876543210 , 5555 ) + +[57,15]: + int 06e5d4c3b2a19085555 <- ( 0dcba9876543210 , d555 ) + +[57,14]: + int 372ea61d950c841555 <- ( 0dcba9876543210 , 1555 ) + +[57,13]: + int 1b97530eca86421555 <- ( 0dcba9876543210 , f555 ) + +[57,12]: + int 0dcba9876543210555 <- ( 0dcba9876543210 , 555 ) + +[57,11]: + int 06e5d4c3b2a1908555 <- ( 0dcba9876543210 , d55 ) + +[57,10]: + int 372ea61d950c84155 <- ( 0dcba9876543210 , 155 ) + +[57,9]: + int 1b97530eca8642155 <- ( 0dcba9876543210 , f55 ) + +[57,8]: + int 0dcba987654321055 <- ( 0dcba9876543210 , 55 ) + +[57,7]: + int 06e5d4c3b2a190855 <- ( 0dcba9876543210 , d5 ) + +[57,6]: + int 372ea61d950c8415 <- ( 0dcba9876543210 , 15 ) + +[57,5]: + int 1b97530eca864215 <- ( 0dcba9876543210 , f5 ) + +[57,4]: + int 0dcba98765432105 <- ( 0dcba9876543210 , 5 ) + +[57,3]: + int 06e5d4c3b2a19085 <- ( 0dcba9876543210 , d ) + +[57,2]: + int 372ea61d950c841 <- ( 0dcba9876543210 , 1 ) + +[57,1]: + int 1b97530eca86421 <- ( 0dcba9876543210 , f ) + +[56,64]: + int 0dcba9876543210aaaaaaaa55555555 <- ( dcba9876543210 , aaaaaaaa55555555 ) + +[56,63]: + int 6e5d4c3b2a19082aaaaaaa55555555 <- ( dcba9876543210 , 2aaaaaaa55555555 ) + +[56,62]: + int 372ea61d950c842aaaaaaa55555555 <- ( dcba9876543210 , eaaaaaaa55555555 ) + +[56,61]: + int 1b97530eca86420aaaaaaa55555555 <- ( dcba9876543210 , 0aaaaaaa55555555 ) + +[56,60]: + int 0dcba9876543210aaaaaaa55555555 <- ( dcba9876543210 , aaaaaaa55555555 ) + +[56,59]: + int 6e5d4c3b2a19082aaaaaa55555555 <- ( dcba9876543210 , 2aaaaaa55555555 ) + +[56,58]: + int 372ea61d950c842aaaaaa55555555 <- ( dcba9876543210 , eaaaaaa55555555 ) + +[56,57]: + int 1b97530eca86420aaaaaa55555555 <- ( dcba9876543210 , 0aaaaaa55555555 ) + +[56,56]: + int 0dcba9876543210aaaaaa55555555 <- ( dcba9876543210 , aaaaaa55555555 ) + +[56,55]: + int 6e5d4c3b2a19082aaaaa55555555 <- ( dcba9876543210 , 2aaaaa55555555 ) + +[56,54]: + int 372ea61d950c842aaaaa55555555 <- ( dcba9876543210 , eaaaaa55555555 ) + +[56,53]: + int 1b97530eca86420aaaaa55555555 <- ( dcba9876543210 , 0aaaaa55555555 ) + +[56,52]: + int 0dcba9876543210aaaaa55555555 <- ( dcba9876543210 , aaaaa55555555 ) + +[56,51]: + int 6e5d4c3b2a19082aaaa55555555 <- ( dcba9876543210 , 2aaaa55555555 ) + +[56,50]: + int 372ea61d950c842aaaa55555555 <- ( dcba9876543210 , eaaaa55555555 ) + +[56,49]: + int 1b97530eca86420aaaa55555555 <- ( dcba9876543210 , 0aaaa55555555 ) + +[56,48]: + int 0dcba9876543210aaaa55555555 <- ( dcba9876543210 , aaaa55555555 ) + +[56,47]: + int 6e5d4c3b2a19082aaa55555555 <- ( dcba9876543210 , 2aaa55555555 ) + +[56,46]: + int 372ea61d950c842aaa55555555 <- ( dcba9876543210 , eaaa55555555 ) + +[56,45]: + int 1b97530eca86420aaa55555555 <- ( dcba9876543210 , 0aaa55555555 ) + +[56,44]: + int 0dcba9876543210aaa55555555 <- ( dcba9876543210 , aaa55555555 ) + +[56,43]: + int 6e5d4c3b2a19082aa55555555 <- ( dcba9876543210 , 2aa55555555 ) + +[56,42]: + int 372ea61d950c842aa55555555 <- ( dcba9876543210 , eaa55555555 ) + +[56,41]: + int 1b97530eca86420aa55555555 <- ( dcba9876543210 , 0aa55555555 ) + +[56,40]: + int 0dcba9876543210aa55555555 <- ( dcba9876543210 , aa55555555 ) + +[56,39]: + int 6e5d4c3b2a19082a55555555 <- ( dcba9876543210 , 2a55555555 ) + +[56,38]: + int 372ea61d950c842a55555555 <- ( dcba9876543210 , ea55555555 ) + +[56,37]: + int 1b97530eca86420a55555555 <- ( dcba9876543210 , 0a55555555 ) + +[56,36]: + int 0dcba9876543210a55555555 <- ( dcba9876543210 , a55555555 ) + +[56,35]: + int 6e5d4c3b2a1908255555555 <- ( dcba9876543210 , 255555555 ) + +[56,34]: + int 372ea61d950c84255555555 <- ( dcba9876543210 , e55555555 ) + +[56,33]: + int 1b97530eca8642055555555 <- ( dcba9876543210 , 055555555 ) + +[56,32]: + int 0dcba987654321055555555 <- ( dcba9876543210 , 55555555 ) + +[56,31]: + int 6e5d4c3b2a190855555555 <- ( dcba9876543210 , d5555555 ) + +[56,30]: + int 372ea61d950c8415555555 <- ( dcba9876543210 , 15555555 ) + +[56,29]: + int 1b97530eca864215555555 <- ( dcba9876543210 , f5555555 ) + +[56,28]: + int 0dcba98765432105555555 <- ( dcba9876543210 , 5555555 ) + +[56,27]: + int 6e5d4c3b2a19085555555 <- ( dcba9876543210 , d555555 ) + +[56,26]: + int 372ea61d950c841555555 <- ( dcba9876543210 , 1555555 ) + +[56,25]: + int 1b97530eca86421555555 <- ( dcba9876543210 , f555555 ) + +[56,24]: + int 0dcba9876543210555555 <- ( dcba9876543210 , 555555 ) + +[56,23]: + int 6e5d4c3b2a1908555555 <- ( dcba9876543210 , d55555 ) + +[56,22]: + int 372ea61d950c84155555 <- ( dcba9876543210 , 155555 ) + +[56,21]: + int 1b97530eca8642155555 <- ( dcba9876543210 , f55555 ) + +[56,20]: + int 0dcba987654321055555 <- ( dcba9876543210 , 55555 ) + +[56,19]: + int 6e5d4c3b2a190855555 <- ( dcba9876543210 , d5555 ) + +[56,18]: + int 372ea61d950c8415555 <- ( dcba9876543210 , 15555 ) + +[56,17]: + int 1b97530eca864215555 <- ( dcba9876543210 , f5555 ) + +[56,16]: + int 0dcba98765432105555 <- ( dcba9876543210 , 5555 ) + +[56,15]: + int 6e5d4c3b2a19085555 <- ( dcba9876543210 , d555 ) + +[56,14]: + int 372ea61d950c841555 <- ( dcba9876543210 , 1555 ) + +[56,13]: + int 1b97530eca86421555 <- ( dcba9876543210 , f555 ) + +[56,12]: + int 0dcba9876543210555 <- ( dcba9876543210 , 555 ) + +[56,11]: + int 6e5d4c3b2a1908555 <- ( dcba9876543210 , d55 ) + +[56,10]: + int 372ea61d950c84155 <- ( dcba9876543210 , 155 ) + +[56,9]: + int 1b97530eca8642155 <- ( dcba9876543210 , f55 ) + +[56,8]: + int 0dcba987654321055 <- ( dcba9876543210 , 55 ) + +[56,7]: + int 6e5d4c3b2a190855 <- ( dcba9876543210 , d5 ) + +[56,6]: + int 372ea61d950c8415 <- ( dcba9876543210 , 15 ) + +[56,5]: + int 1b97530eca864215 <- ( dcba9876543210 , f5 ) + +[56,4]: + int 0dcba98765432105 <- ( dcba9876543210 , 5 ) + +[56,3]: + int 6e5d4c3b2a19085 <- ( dcba9876543210 , d ) + +[56,2]: + int 372ea61d950c841 <- ( dcba9876543210 , 1 ) + +[56,1]: + int 1b97530eca86421 <- ( dcba9876543210 , f ) + +[55,64]: + int 5cba9876543210aaaaaaaa55555555 <- ( dcba9876543210 , aaaaaaaa55555555 ) + +[55,63]: + int 2e5d4c3b2a19082aaaaaaa55555555 <- ( dcba9876543210 , 2aaaaaaa55555555 ) + +[55,62]: + int 172ea61d950c842aaaaaaa55555555 <- ( dcba9876543210 , eaaaaaaa55555555 ) + +[55,61]: + int 0b97530eca86420aaaaaaa55555555 <- ( dcba9876543210 , 0aaaaaaa55555555 ) + +[55,60]: + int 5cba9876543210aaaaaaa55555555 <- ( dcba9876543210 , aaaaaaa55555555 ) + +[55,59]: + int 2e5d4c3b2a19082aaaaaa55555555 <- ( dcba9876543210 , 2aaaaaa55555555 ) + +[55,58]: + int 172ea61d950c842aaaaaa55555555 <- ( dcba9876543210 , eaaaaaa55555555 ) + +[55,57]: + int 0b97530eca86420aaaaaa55555555 <- ( dcba9876543210 , 0aaaaaa55555555 ) + +[55,56]: + int 5cba9876543210aaaaaa55555555 <- ( dcba9876543210 , aaaaaa55555555 ) + +[55,55]: + int 2e5d4c3b2a19082aaaaa55555555 <- ( dcba9876543210 , 2aaaaa55555555 ) + +[55,54]: + int 172ea61d950c842aaaaa55555555 <- ( dcba9876543210 , eaaaaa55555555 ) + +[55,53]: + int 0b97530eca86420aaaaa55555555 <- ( dcba9876543210 , 0aaaaa55555555 ) + +[55,52]: + int 5cba9876543210aaaaa55555555 <- ( dcba9876543210 , aaaaa55555555 ) + +[55,51]: + int 2e5d4c3b2a19082aaaa55555555 <- ( dcba9876543210 , 2aaaa55555555 ) + +[55,50]: + int 172ea61d950c842aaaa55555555 <- ( dcba9876543210 , eaaaa55555555 ) + +[55,49]: + int 0b97530eca86420aaaa55555555 <- ( dcba9876543210 , 0aaaa55555555 ) + +[55,48]: + int 5cba9876543210aaaa55555555 <- ( dcba9876543210 , aaaa55555555 ) + +[55,47]: + int 2e5d4c3b2a19082aaa55555555 <- ( dcba9876543210 , 2aaa55555555 ) + +[55,46]: + int 172ea61d950c842aaa55555555 <- ( dcba9876543210 , eaaa55555555 ) + +[55,45]: + int 0b97530eca86420aaa55555555 <- ( dcba9876543210 , 0aaa55555555 ) + +[55,44]: + int 5cba9876543210aaa55555555 <- ( dcba9876543210 , aaa55555555 ) + +[55,43]: + int 2e5d4c3b2a19082aa55555555 <- ( dcba9876543210 , 2aa55555555 ) + +[55,42]: + int 172ea61d950c842aa55555555 <- ( dcba9876543210 , eaa55555555 ) + +[55,41]: + int 0b97530eca86420aa55555555 <- ( dcba9876543210 , 0aa55555555 ) + +[55,40]: + int 5cba9876543210aa55555555 <- ( dcba9876543210 , aa55555555 ) + +[55,39]: + int 2e5d4c3b2a19082a55555555 <- ( dcba9876543210 , 2a55555555 ) + +[55,38]: + int 172ea61d950c842a55555555 <- ( dcba9876543210 , ea55555555 ) + +[55,37]: + int 0b97530eca86420a55555555 <- ( dcba9876543210 , 0a55555555 ) + +[55,36]: + int 5cba9876543210a55555555 <- ( dcba9876543210 , a55555555 ) + +[55,35]: + int 2e5d4c3b2a1908255555555 <- ( dcba9876543210 , 255555555 ) + +[55,34]: + int 172ea61d950c84255555555 <- ( dcba9876543210 , e55555555 ) + +[55,33]: + int 0b97530eca8642055555555 <- ( dcba9876543210 , 055555555 ) + +[55,32]: + int 5cba987654321055555555 <- ( dcba9876543210 , 55555555 ) + +[55,31]: + int 2e5d4c3b2a190855555555 <- ( dcba9876543210 , d5555555 ) + +[55,30]: + int 172ea61d950c8415555555 <- ( dcba9876543210 , 15555555 ) + +[55,29]: + int 0b97530eca864215555555 <- ( dcba9876543210 , f5555555 ) + +[55,28]: + int 5cba98765432105555555 <- ( dcba9876543210 , 5555555 ) + +[55,27]: + int 2e5d4c3b2a19085555555 <- ( dcba9876543210 , d555555 ) + +[55,26]: + int 172ea61d950c841555555 <- ( dcba9876543210 , 1555555 ) + +[55,25]: + int 0b97530eca86421555555 <- ( dcba9876543210 , f555555 ) + +[55,24]: + int 5cba9876543210555555 <- ( dcba9876543210 , 555555 ) + +[55,23]: + int 2e5d4c3b2a1908555555 <- ( dcba9876543210 , d55555 ) + +[55,22]: + int 172ea61d950c84155555 <- ( dcba9876543210 , 155555 ) + +[55,21]: + int 0b97530eca8642155555 <- ( dcba9876543210 , f55555 ) + +[55,20]: + int 5cba987654321055555 <- ( dcba9876543210 , 55555 ) + +[55,19]: + int 2e5d4c3b2a190855555 <- ( dcba9876543210 , d5555 ) + +[55,18]: + int 172ea61d950c8415555 <- ( dcba9876543210 , 15555 ) + +[55,17]: + int 0b97530eca864215555 <- ( dcba9876543210 , f5555 ) + +[55,16]: + int 5cba98765432105555 <- ( dcba9876543210 , 5555 ) + +[55,15]: + int 2e5d4c3b2a19085555 <- ( dcba9876543210 , d555 ) + +[55,14]: + int 172ea61d950c841555 <- ( dcba9876543210 , 1555 ) + +[55,13]: + int 0b97530eca86421555 <- ( dcba9876543210 , f555 ) + +[55,12]: + int 5cba9876543210555 <- ( dcba9876543210 , 555 ) + +[55,11]: + int 2e5d4c3b2a1908555 <- ( dcba9876543210 , d55 ) + +[55,10]: + int 172ea61d950c84155 <- ( dcba9876543210 , 155 ) + +[55,9]: + int 0b97530eca8642155 <- ( dcba9876543210 , f55 ) + +[55,8]: + int 5cba987654321055 <- ( dcba9876543210 , 55 ) + +[55,7]: + int 2e5d4c3b2a190855 <- ( dcba9876543210 , d5 ) + +[55,6]: + int 172ea61d950c8415 <- ( dcba9876543210 , 15 ) + +[55,5]: + int 0b97530eca864215 <- ( dcba9876543210 , f5 ) + +[55,4]: + int 5cba98765432105 <- ( dcba9876543210 , 5 ) + +[55,3]: + int 2e5d4c3b2a19085 <- ( dcba9876543210 , d ) + +[55,2]: + int 172ea61d950c841 <- ( dcba9876543210 , 1 ) + +[55,1]: + int 0b97530eca86421 <- ( dcba9876543210 , f ) + +[54,64]: + int 1cba9876543210aaaaaaaa55555555 <- ( 1cba9876543210 , aaaaaaaa55555555 ) + +[54,63]: + int 0e5d4c3b2a19082aaaaaaa55555555 <- ( 1cba9876543210 , 2aaaaaaa55555555 ) + +[54,62]: + int 072ea61d950c842aaaaaaa55555555 <- ( 1cba9876543210 , eaaaaaaa55555555 ) + +[54,61]: + int 397530eca86420aaaaaaa55555555 <- ( 1cba9876543210 , 0aaaaaaa55555555 ) + +[54,60]: + int 1cba9876543210aaaaaaa55555555 <- ( 1cba9876543210 , aaaaaaa55555555 ) + +[54,59]: + int 0e5d4c3b2a19082aaaaaa55555555 <- ( 1cba9876543210 , 2aaaaaa55555555 ) + +[54,58]: + int 072ea61d950c842aaaaaa55555555 <- ( 1cba9876543210 , eaaaaaa55555555 ) + +[54,57]: + int 397530eca86420aaaaaa55555555 <- ( 1cba9876543210 , 0aaaaaa55555555 ) + +[54,56]: + int 1cba9876543210aaaaaa55555555 <- ( 1cba9876543210 , aaaaaa55555555 ) + +[54,55]: + int 0e5d4c3b2a19082aaaaa55555555 <- ( 1cba9876543210 , 2aaaaa55555555 ) + +[54,54]: + int 072ea61d950c842aaaaa55555555 <- ( 1cba9876543210 , eaaaaa55555555 ) + +[54,53]: + int 397530eca86420aaaaa55555555 <- ( 1cba9876543210 , 0aaaaa55555555 ) + +[54,52]: + int 1cba9876543210aaaaa55555555 <- ( 1cba9876543210 , aaaaa55555555 ) + +[54,51]: + int 0e5d4c3b2a19082aaaa55555555 <- ( 1cba9876543210 , 2aaaa55555555 ) + +[54,50]: + int 072ea61d950c842aaaa55555555 <- ( 1cba9876543210 , eaaaa55555555 ) + +[54,49]: + int 397530eca86420aaaa55555555 <- ( 1cba9876543210 , 0aaaa55555555 ) + +[54,48]: + int 1cba9876543210aaaa55555555 <- ( 1cba9876543210 , aaaa55555555 ) + +[54,47]: + int 0e5d4c3b2a19082aaa55555555 <- ( 1cba9876543210 , 2aaa55555555 ) + +[54,46]: + int 072ea61d950c842aaa55555555 <- ( 1cba9876543210 , eaaa55555555 ) + +[54,45]: + int 397530eca86420aaa55555555 <- ( 1cba9876543210 , 0aaa55555555 ) + +[54,44]: + int 1cba9876543210aaa55555555 <- ( 1cba9876543210 , aaa55555555 ) + +[54,43]: + int 0e5d4c3b2a19082aa55555555 <- ( 1cba9876543210 , 2aa55555555 ) + +[54,42]: + int 072ea61d950c842aa55555555 <- ( 1cba9876543210 , eaa55555555 ) + +[54,41]: + int 397530eca86420aa55555555 <- ( 1cba9876543210 , 0aa55555555 ) + +[54,40]: + int 1cba9876543210aa55555555 <- ( 1cba9876543210 , aa55555555 ) + +[54,39]: + int 0e5d4c3b2a19082a55555555 <- ( 1cba9876543210 , 2a55555555 ) + +[54,38]: + int 072ea61d950c842a55555555 <- ( 1cba9876543210 , ea55555555 ) + +[54,37]: + int 397530eca86420a55555555 <- ( 1cba9876543210 , 0a55555555 ) + +[54,36]: + int 1cba9876543210a55555555 <- ( 1cba9876543210 , a55555555 ) + +[54,35]: + int 0e5d4c3b2a1908255555555 <- ( 1cba9876543210 , 255555555 ) + +[54,34]: + int 072ea61d950c84255555555 <- ( 1cba9876543210 , e55555555 ) + +[54,33]: + int 397530eca8642055555555 <- ( 1cba9876543210 , 055555555 ) + +[54,32]: + int 1cba987654321055555555 <- ( 1cba9876543210 , 55555555 ) + +[54,31]: + int 0e5d4c3b2a190855555555 <- ( 1cba9876543210 , d5555555 ) + +[54,30]: + int 072ea61d950c8415555555 <- ( 1cba9876543210 , 15555555 ) + +[54,29]: + int 397530eca864215555555 <- ( 1cba9876543210 , f5555555 ) + +[54,28]: + int 1cba98765432105555555 <- ( 1cba9876543210 , 5555555 ) + +[54,27]: + int 0e5d4c3b2a19085555555 <- ( 1cba9876543210 , d555555 ) + +[54,26]: + int 072ea61d950c841555555 <- ( 1cba9876543210 , 1555555 ) + +[54,25]: + int 397530eca86421555555 <- ( 1cba9876543210 , f555555 ) + +[54,24]: + int 1cba9876543210555555 <- ( 1cba9876543210 , 555555 ) + +[54,23]: + int 0e5d4c3b2a1908555555 <- ( 1cba9876543210 , d55555 ) + +[54,22]: + int 072ea61d950c84155555 <- ( 1cba9876543210 , 155555 ) + +[54,21]: + int 397530eca8642155555 <- ( 1cba9876543210 , f55555 ) + +[54,20]: + int 1cba987654321055555 <- ( 1cba9876543210 , 55555 ) + +[54,19]: + int 0e5d4c3b2a190855555 <- ( 1cba9876543210 , d5555 ) + +[54,18]: + int 072ea61d950c8415555 <- ( 1cba9876543210 , 15555 ) + +[54,17]: + int 397530eca864215555 <- ( 1cba9876543210 , f5555 ) + +[54,16]: + int 1cba98765432105555 <- ( 1cba9876543210 , 5555 ) + +[54,15]: + int 0e5d4c3b2a19085555 <- ( 1cba9876543210 , d555 ) + +[54,14]: + int 072ea61d950c841555 <- ( 1cba9876543210 , 1555 ) + +[54,13]: + int 397530eca86421555 <- ( 1cba9876543210 , f555 ) + +[54,12]: + int 1cba9876543210555 <- ( 1cba9876543210 , 555 ) + +[54,11]: + int 0e5d4c3b2a1908555 <- ( 1cba9876543210 , d55 ) + +[54,10]: + int 072ea61d950c84155 <- ( 1cba9876543210 , 155 ) + +[54,9]: + int 397530eca8642155 <- ( 1cba9876543210 , f55 ) + +[54,8]: + int 1cba987654321055 <- ( 1cba9876543210 , 55 ) + +[54,7]: + int 0e5d4c3b2a190855 <- ( 1cba9876543210 , d5 ) + +[54,6]: + int 072ea61d950c8415 <- ( 1cba9876543210 , 15 ) + +[54,5]: + int 397530eca864215 <- ( 1cba9876543210 , f5 ) + +[54,4]: + int 1cba98765432105 <- ( 1cba9876543210 , 5 ) + +[54,3]: + int 0e5d4c3b2a19085 <- ( 1cba9876543210 , d ) + +[54,2]: + int 072ea61d950c841 <- ( 1cba9876543210 , 1 ) + +[54,1]: + int 397530eca86421 <- ( 1cba9876543210 , f ) + +[53,64]: + int 1cba9876543210aaaaaaaa55555555 <- ( fcba9876543210 , aaaaaaaa55555555 ) + +[53,63]: + int 0e5d4c3b2a19082aaaaaaa55555555 <- ( fcba9876543210 , 2aaaaaaa55555555 ) + +[53,62]: + int 72ea61d950c842aaaaaaa55555555 <- ( fcba9876543210 , eaaaaaaa55555555 ) + +[53,61]: + int 397530eca86420aaaaaaa55555555 <- ( fcba9876543210 , 0aaaaaaa55555555 ) + +[53,60]: + int 1cba9876543210aaaaaaa55555555 <- ( fcba9876543210 , aaaaaaa55555555 ) + +[53,59]: + int 0e5d4c3b2a19082aaaaaa55555555 <- ( fcba9876543210 , 2aaaaaa55555555 ) + +[53,58]: + int 72ea61d950c842aaaaaa55555555 <- ( fcba9876543210 , eaaaaaa55555555 ) + +[53,57]: + int 397530eca86420aaaaaa55555555 <- ( fcba9876543210 , 0aaaaaa55555555 ) + +[53,56]: + int 1cba9876543210aaaaaa55555555 <- ( fcba9876543210 , aaaaaa55555555 ) + +[53,55]: + int 0e5d4c3b2a19082aaaaa55555555 <- ( fcba9876543210 , 2aaaaa55555555 ) + +[53,54]: + int 72ea61d950c842aaaaa55555555 <- ( fcba9876543210 , eaaaaa55555555 ) + +[53,53]: + int 397530eca86420aaaaa55555555 <- ( fcba9876543210 , 0aaaaa55555555 ) + +[53,52]: + int 1cba9876543210aaaaa55555555 <- ( fcba9876543210 , aaaaa55555555 ) + +[53,51]: + int 0e5d4c3b2a19082aaaa55555555 <- ( fcba9876543210 , 2aaaa55555555 ) + +[53,50]: + int 72ea61d950c842aaaa55555555 <- ( fcba9876543210 , eaaaa55555555 ) + +[53,49]: + int 397530eca86420aaaa55555555 <- ( fcba9876543210 , 0aaaa55555555 ) + +[53,48]: + int 1cba9876543210aaaa55555555 <- ( fcba9876543210 , aaaa55555555 ) + +[53,47]: + int 0e5d4c3b2a19082aaa55555555 <- ( fcba9876543210 , 2aaa55555555 ) + +[53,46]: + int 72ea61d950c842aaa55555555 <- ( fcba9876543210 , eaaa55555555 ) + +[53,45]: + int 397530eca86420aaa55555555 <- ( fcba9876543210 , 0aaa55555555 ) + +[53,44]: + int 1cba9876543210aaa55555555 <- ( fcba9876543210 , aaa55555555 ) + +[53,43]: + int 0e5d4c3b2a19082aa55555555 <- ( fcba9876543210 , 2aa55555555 ) + +[53,42]: + int 72ea61d950c842aa55555555 <- ( fcba9876543210 , eaa55555555 ) + +[53,41]: + int 397530eca86420aa55555555 <- ( fcba9876543210 , 0aa55555555 ) + +[53,40]: + int 1cba9876543210aa55555555 <- ( fcba9876543210 , aa55555555 ) + +[53,39]: + int 0e5d4c3b2a19082a55555555 <- ( fcba9876543210 , 2a55555555 ) + +[53,38]: + int 72ea61d950c842a55555555 <- ( fcba9876543210 , ea55555555 ) + +[53,37]: + int 397530eca86420a55555555 <- ( fcba9876543210 , 0a55555555 ) + +[53,36]: + int 1cba9876543210a55555555 <- ( fcba9876543210 , a55555555 ) + +[53,35]: + int 0e5d4c3b2a1908255555555 <- ( fcba9876543210 , 255555555 ) + +[53,34]: + int 72ea61d950c84255555555 <- ( fcba9876543210 , e55555555 ) + +[53,33]: + int 397530eca8642055555555 <- ( fcba9876543210 , 055555555 ) + +[53,32]: + int 1cba987654321055555555 <- ( fcba9876543210 , 55555555 ) + +[53,31]: + int 0e5d4c3b2a190855555555 <- ( fcba9876543210 , d5555555 ) + +[53,30]: + int 72ea61d950c8415555555 <- ( fcba9876543210 , 15555555 ) + +[53,29]: + int 397530eca864215555555 <- ( fcba9876543210 , f5555555 ) + +[53,28]: + int 1cba98765432105555555 <- ( fcba9876543210 , 5555555 ) + +[53,27]: + int 0e5d4c3b2a19085555555 <- ( fcba9876543210 , d555555 ) + +[53,26]: + int 72ea61d950c841555555 <- ( fcba9876543210 , 1555555 ) + +[53,25]: + int 397530eca86421555555 <- ( fcba9876543210 , f555555 ) + +[53,24]: + int 1cba9876543210555555 <- ( fcba9876543210 , 555555 ) + +[53,23]: + int 0e5d4c3b2a1908555555 <- ( fcba9876543210 , d55555 ) + +[53,22]: + int 72ea61d950c84155555 <- ( fcba9876543210 , 155555 ) + +[53,21]: + int 397530eca8642155555 <- ( fcba9876543210 , f55555 ) + +[53,20]: + int 1cba987654321055555 <- ( fcba9876543210 , 55555 ) + +[53,19]: + int 0e5d4c3b2a190855555 <- ( fcba9876543210 , d5555 ) + +[53,18]: + int 72ea61d950c8415555 <- ( fcba9876543210 , 15555 ) + +[53,17]: + int 397530eca864215555 <- ( fcba9876543210 , f5555 ) + +[53,16]: + int 1cba98765432105555 <- ( fcba9876543210 , 5555 ) + +[53,15]: + int 0e5d4c3b2a19085555 <- ( fcba9876543210 , d555 ) + +[53,14]: + int 72ea61d950c841555 <- ( fcba9876543210 , 1555 ) + +[53,13]: + int 397530eca86421555 <- ( fcba9876543210 , f555 ) + +[53,12]: + int 1cba9876543210555 <- ( fcba9876543210 , 555 ) + +[53,11]: + int 0e5d4c3b2a1908555 <- ( fcba9876543210 , d55 ) + +[53,10]: + int 72ea61d950c84155 <- ( fcba9876543210 , 155 ) + +[53,9]: + int 397530eca8642155 <- ( fcba9876543210 , f55 ) + +[53,8]: + int 1cba987654321055 <- ( fcba9876543210 , 55 ) + +[53,7]: + int 0e5d4c3b2a190855 <- ( fcba9876543210 , d5 ) + +[53,6]: + int 72ea61d950c8415 <- ( fcba9876543210 , 15 ) + +[53,5]: + int 397530eca864215 <- ( fcba9876543210 , f5 ) + +[53,4]: + int 1cba98765432105 <- ( fcba9876543210 , 5 ) + +[53,3]: + int 0e5d4c3b2a19085 <- ( fcba9876543210 , d ) + +[53,2]: + int 72ea61d950c841 <- ( fcba9876543210 , 1 ) + +[53,1]: + int 397530eca86421 <- ( fcba9876543210 , f ) + +[52,64]: + int 0cba9876543210aaaaaaaa55555555 <- ( cba9876543210 , aaaaaaaa55555555 ) + +[52,63]: + int 65d4c3b2a19082aaaaaaa55555555 <- ( cba9876543210 , 2aaaaaaa55555555 ) + +[52,62]: + int 32ea61d950c842aaaaaaa55555555 <- ( cba9876543210 , eaaaaaaa55555555 ) + +[52,61]: + int 197530eca86420aaaaaaa55555555 <- ( cba9876543210 , 0aaaaaaa55555555 ) + +[52,60]: + int 0cba9876543210aaaaaaa55555555 <- ( cba9876543210 , aaaaaaa55555555 ) + +[52,59]: + int 65d4c3b2a19082aaaaaa55555555 <- ( cba9876543210 , 2aaaaaa55555555 ) + +[52,58]: + int 32ea61d950c842aaaaaa55555555 <- ( cba9876543210 , eaaaaaa55555555 ) + +[52,57]: + int 197530eca86420aaaaaa55555555 <- ( cba9876543210 , 0aaaaaa55555555 ) + +[52,56]: + int 0cba9876543210aaaaaa55555555 <- ( cba9876543210 , aaaaaa55555555 ) + +[52,55]: + int 65d4c3b2a19082aaaaa55555555 <- ( cba9876543210 , 2aaaaa55555555 ) + +[52,54]: + int 32ea61d950c842aaaaa55555555 <- ( cba9876543210 , eaaaaa55555555 ) + +[52,53]: + int 197530eca86420aaaaa55555555 <- ( cba9876543210 , 0aaaaa55555555 ) + +[52,52]: + int 0cba9876543210aaaaa55555555 <- ( cba9876543210 , aaaaa55555555 ) + +[52,51]: + int 65d4c3b2a19082aaaa55555555 <- ( cba9876543210 , 2aaaa55555555 ) + +[52,50]: + int 32ea61d950c842aaaa55555555 <- ( cba9876543210 , eaaaa55555555 ) + +[52,49]: + int 197530eca86420aaaa55555555 <- ( cba9876543210 , 0aaaa55555555 ) + +[52,48]: + int 0cba9876543210aaaa55555555 <- ( cba9876543210 , aaaa55555555 ) + +[52,47]: + int 65d4c3b2a19082aaa55555555 <- ( cba9876543210 , 2aaa55555555 ) + +[52,46]: + int 32ea61d950c842aaa55555555 <- ( cba9876543210 , eaaa55555555 ) + +[52,45]: + int 197530eca86420aaa55555555 <- ( cba9876543210 , 0aaa55555555 ) + +[52,44]: + int 0cba9876543210aaa55555555 <- ( cba9876543210 , aaa55555555 ) + +[52,43]: + int 65d4c3b2a19082aa55555555 <- ( cba9876543210 , 2aa55555555 ) + +[52,42]: + int 32ea61d950c842aa55555555 <- ( cba9876543210 , eaa55555555 ) + +[52,41]: + int 197530eca86420aa55555555 <- ( cba9876543210 , 0aa55555555 ) + +[52,40]: + int 0cba9876543210aa55555555 <- ( cba9876543210 , aa55555555 ) + +[52,39]: + int 65d4c3b2a19082a55555555 <- ( cba9876543210 , 2a55555555 ) + +[52,38]: + int 32ea61d950c842a55555555 <- ( cba9876543210 , ea55555555 ) + +[52,37]: + int 197530eca86420a55555555 <- ( cba9876543210 , 0a55555555 ) + +[52,36]: + int 0cba9876543210a55555555 <- ( cba9876543210 , a55555555 ) + +[52,35]: + int 65d4c3b2a1908255555555 <- ( cba9876543210 , 255555555 ) + +[52,34]: + int 32ea61d950c84255555555 <- ( cba9876543210 , e55555555 ) + +[52,33]: + int 197530eca8642055555555 <- ( cba9876543210 , 055555555 ) + +[52,32]: + int 0cba987654321055555555 <- ( cba9876543210 , 55555555 ) + +[52,31]: + int 65d4c3b2a190855555555 <- ( cba9876543210 , d5555555 ) + +[52,30]: + int 32ea61d950c8415555555 <- ( cba9876543210 , 15555555 ) + +[52,29]: + int 197530eca864215555555 <- ( cba9876543210 , f5555555 ) + +[52,28]: + int 0cba98765432105555555 <- ( cba9876543210 , 5555555 ) + +[52,27]: + int 65d4c3b2a19085555555 <- ( cba9876543210 , d555555 ) + +[52,26]: + int 32ea61d950c841555555 <- ( cba9876543210 , 1555555 ) + +[52,25]: + int 197530eca86421555555 <- ( cba9876543210 , f555555 ) + +[52,24]: + int 0cba9876543210555555 <- ( cba9876543210 , 555555 ) + +[52,23]: + int 65d4c3b2a1908555555 <- ( cba9876543210 , d55555 ) + +[52,22]: + int 32ea61d950c84155555 <- ( cba9876543210 , 155555 ) + +[52,21]: + int 197530eca8642155555 <- ( cba9876543210 , f55555 ) + +[52,20]: + int 0cba987654321055555 <- ( cba9876543210 , 55555 ) + +[52,19]: + int 65d4c3b2a190855555 <- ( cba9876543210 , d5555 ) + +[52,18]: + int 32ea61d950c8415555 <- ( cba9876543210 , 15555 ) + +[52,17]: + int 197530eca864215555 <- ( cba9876543210 , f5555 ) + +[52,16]: + int 0cba98765432105555 <- ( cba9876543210 , 5555 ) + +[52,15]: + int 65d4c3b2a19085555 <- ( cba9876543210 , d555 ) + +[52,14]: + int 32ea61d950c841555 <- ( cba9876543210 , 1555 ) + +[52,13]: + int 197530eca86421555 <- ( cba9876543210 , f555 ) + +[52,12]: + int 0cba9876543210555 <- ( cba9876543210 , 555 ) + +[52,11]: + int 65d4c3b2a1908555 <- ( cba9876543210 , d55 ) + +[52,10]: + int 32ea61d950c84155 <- ( cba9876543210 , 155 ) + +[52,9]: + int 197530eca8642155 <- ( cba9876543210 , f55 ) + +[52,8]: + int 0cba987654321055 <- ( cba9876543210 , 55 ) + +[52,7]: + int 65d4c3b2a190855 <- ( cba9876543210 , d5 ) + +[52,6]: + int 32ea61d950c8415 <- ( cba9876543210 , 15 ) + +[52,5]: + int 197530eca864215 <- ( cba9876543210 , f5 ) + +[52,4]: + int 0cba98765432105 <- ( cba9876543210 , 5 ) + +[52,3]: + int 65d4c3b2a19085 <- ( cba9876543210 , d ) + +[52,2]: + int 32ea61d950c841 <- ( cba9876543210 , 1 ) + +[52,1]: + int 197530eca86421 <- ( cba9876543210 , f ) + +[51,64]: + int 4ba9876543210aaaaaaaa55555555 <- ( cba9876543210 , aaaaaaaa55555555 ) + +[51,63]: + int 25d4c3b2a19082aaaaaaa55555555 <- ( cba9876543210 , 2aaaaaaa55555555 ) + +[51,62]: + int 12ea61d950c842aaaaaaa55555555 <- ( cba9876543210 , eaaaaaaa55555555 ) + +[51,61]: + int 097530eca86420aaaaaaa55555555 <- ( cba9876543210 , 0aaaaaaa55555555 ) + +[51,60]: + int 4ba9876543210aaaaaaa55555555 <- ( cba9876543210 , aaaaaaa55555555 ) + +[51,59]: + int 25d4c3b2a19082aaaaaa55555555 <- ( cba9876543210 , 2aaaaaa55555555 ) + +[51,58]: + int 12ea61d950c842aaaaaa55555555 <- ( cba9876543210 , eaaaaaa55555555 ) + +[51,57]: + int 097530eca86420aaaaaa55555555 <- ( cba9876543210 , 0aaaaaa55555555 ) + +[51,56]: + int 4ba9876543210aaaaaa55555555 <- ( cba9876543210 , aaaaaa55555555 ) + +[51,55]: + int 25d4c3b2a19082aaaaa55555555 <- ( cba9876543210 , 2aaaaa55555555 ) + +[51,54]: + int 12ea61d950c842aaaaa55555555 <- ( cba9876543210 , eaaaaa55555555 ) + +[51,53]: + int 097530eca86420aaaaa55555555 <- ( cba9876543210 , 0aaaaa55555555 ) + +[51,52]: + int 4ba9876543210aaaaa55555555 <- ( cba9876543210 , aaaaa55555555 ) + +[51,51]: + int 25d4c3b2a19082aaaa55555555 <- ( cba9876543210 , 2aaaa55555555 ) + +[51,50]: + int 12ea61d950c842aaaa55555555 <- ( cba9876543210 , eaaaa55555555 ) + +[51,49]: + int 097530eca86420aaaa55555555 <- ( cba9876543210 , 0aaaa55555555 ) + +[51,48]: + int 4ba9876543210aaaa55555555 <- ( cba9876543210 , aaaa55555555 ) + +[51,47]: + int 25d4c3b2a19082aaa55555555 <- ( cba9876543210 , 2aaa55555555 ) + +[51,46]: + int 12ea61d950c842aaa55555555 <- ( cba9876543210 , eaaa55555555 ) + +[51,45]: + int 097530eca86420aaa55555555 <- ( cba9876543210 , 0aaa55555555 ) + +[51,44]: + int 4ba9876543210aaa55555555 <- ( cba9876543210 , aaa55555555 ) + +[51,43]: + int 25d4c3b2a19082aa55555555 <- ( cba9876543210 , 2aa55555555 ) + +[51,42]: + int 12ea61d950c842aa55555555 <- ( cba9876543210 , eaa55555555 ) + +[51,41]: + int 097530eca86420aa55555555 <- ( cba9876543210 , 0aa55555555 ) + +[51,40]: + int 4ba9876543210aa55555555 <- ( cba9876543210 , aa55555555 ) + +[51,39]: + int 25d4c3b2a19082a55555555 <- ( cba9876543210 , 2a55555555 ) + +[51,38]: + int 12ea61d950c842a55555555 <- ( cba9876543210 , ea55555555 ) + +[51,37]: + int 097530eca86420a55555555 <- ( cba9876543210 , 0a55555555 ) + +[51,36]: + int 4ba9876543210a55555555 <- ( cba9876543210 , a55555555 ) + +[51,35]: + int 25d4c3b2a1908255555555 <- ( cba9876543210 , 255555555 ) + +[51,34]: + int 12ea61d950c84255555555 <- ( cba9876543210 , e55555555 ) + +[51,33]: + int 097530eca8642055555555 <- ( cba9876543210 , 055555555 ) + +[51,32]: + int 4ba987654321055555555 <- ( cba9876543210 , 55555555 ) + +[51,31]: + int 25d4c3b2a190855555555 <- ( cba9876543210 , d5555555 ) + +[51,30]: + int 12ea61d950c8415555555 <- ( cba9876543210 , 15555555 ) + +[51,29]: + int 097530eca864215555555 <- ( cba9876543210 , f5555555 ) + +[51,28]: + int 4ba98765432105555555 <- ( cba9876543210 , 5555555 ) + +[51,27]: + int 25d4c3b2a19085555555 <- ( cba9876543210 , d555555 ) + +[51,26]: + int 12ea61d950c841555555 <- ( cba9876543210 , 1555555 ) + +[51,25]: + int 097530eca86421555555 <- ( cba9876543210 , f555555 ) + +[51,24]: + int 4ba9876543210555555 <- ( cba9876543210 , 555555 ) + +[51,23]: + int 25d4c3b2a1908555555 <- ( cba9876543210 , d55555 ) + +[51,22]: + int 12ea61d950c84155555 <- ( cba9876543210 , 155555 ) + +[51,21]: + int 097530eca8642155555 <- ( cba9876543210 , f55555 ) + +[51,20]: + int 4ba987654321055555 <- ( cba9876543210 , 55555 ) + +[51,19]: + int 25d4c3b2a190855555 <- ( cba9876543210 , d5555 ) + +[51,18]: + int 12ea61d950c8415555 <- ( cba9876543210 , 15555 ) + +[51,17]: + int 097530eca864215555 <- ( cba9876543210 , f5555 ) + +[51,16]: + int 4ba98765432105555 <- ( cba9876543210 , 5555 ) + +[51,15]: + int 25d4c3b2a19085555 <- ( cba9876543210 , d555 ) + +[51,14]: + int 12ea61d950c841555 <- ( cba9876543210 , 1555 ) + +[51,13]: + int 097530eca86421555 <- ( cba9876543210 , f555 ) + +[51,12]: + int 4ba9876543210555 <- ( cba9876543210 , 555 ) + +[51,11]: + int 25d4c3b2a1908555 <- ( cba9876543210 , d55 ) + +[51,10]: + int 12ea61d950c84155 <- ( cba9876543210 , 155 ) + +[51,9]: + int 097530eca8642155 <- ( cba9876543210 , f55 ) + +[51,8]: + int 4ba987654321055 <- ( cba9876543210 , 55 ) + +[51,7]: + int 25d4c3b2a190855 <- ( cba9876543210 , d5 ) + +[51,6]: + int 12ea61d950c8415 <- ( cba9876543210 , 15 ) + +[51,5]: + int 097530eca864215 <- ( cba9876543210 , f5 ) + +[51,4]: + int 4ba98765432105 <- ( cba9876543210 , 5 ) + +[51,3]: + int 25d4c3b2a19085 <- ( cba9876543210 , d ) + +[51,2]: + int 12ea61d950c841 <- ( cba9876543210 , 1 ) + +[51,1]: + int 097530eca86421 <- ( cba9876543210 , f ) + +[50,64]: + int 0ba9876543210aaaaaaaa55555555 <- ( 0ba9876543210 , aaaaaaaa55555555 ) + +[50,63]: + int 05d4c3b2a19082aaaaaaa55555555 <- ( 0ba9876543210 , 2aaaaaaa55555555 ) + +[50,62]: + int 02ea61d950c842aaaaaaa55555555 <- ( 0ba9876543210 , eaaaaaaa55555555 ) + +[50,61]: + int 17530eca86420aaaaaaa55555555 <- ( 0ba9876543210 , 0aaaaaaa55555555 ) + +[50,60]: + int 0ba9876543210aaaaaaa55555555 <- ( 0ba9876543210 , aaaaaaa55555555 ) + +[50,59]: + int 05d4c3b2a19082aaaaaa55555555 <- ( 0ba9876543210 , 2aaaaaa55555555 ) + +[50,58]: + int 02ea61d950c842aaaaaa55555555 <- ( 0ba9876543210 , eaaaaaa55555555 ) + +[50,57]: + int 17530eca86420aaaaaa55555555 <- ( 0ba9876543210 , 0aaaaaa55555555 ) + +[50,56]: + int 0ba9876543210aaaaaa55555555 <- ( 0ba9876543210 , aaaaaa55555555 ) + +[50,55]: + int 05d4c3b2a19082aaaaa55555555 <- ( 0ba9876543210 , 2aaaaa55555555 ) + +[50,54]: + int 02ea61d950c842aaaaa55555555 <- ( 0ba9876543210 , eaaaaa55555555 ) + +[50,53]: + int 17530eca86420aaaaa55555555 <- ( 0ba9876543210 , 0aaaaa55555555 ) + +[50,52]: + int 0ba9876543210aaaaa55555555 <- ( 0ba9876543210 , aaaaa55555555 ) + +[50,51]: + int 05d4c3b2a19082aaaa55555555 <- ( 0ba9876543210 , 2aaaa55555555 ) + +[50,50]: + int 02ea61d950c842aaaa55555555 <- ( 0ba9876543210 , eaaaa55555555 ) + +[50,49]: + int 17530eca86420aaaa55555555 <- ( 0ba9876543210 , 0aaaa55555555 ) + +[50,48]: + int 0ba9876543210aaaa55555555 <- ( 0ba9876543210 , aaaa55555555 ) + +[50,47]: + int 05d4c3b2a19082aaa55555555 <- ( 0ba9876543210 , 2aaa55555555 ) + +[50,46]: + int 02ea61d950c842aaa55555555 <- ( 0ba9876543210 , eaaa55555555 ) + +[50,45]: + int 17530eca86420aaa55555555 <- ( 0ba9876543210 , 0aaa55555555 ) + +[50,44]: + int 0ba9876543210aaa55555555 <- ( 0ba9876543210 , aaa55555555 ) + +[50,43]: + int 05d4c3b2a19082aa55555555 <- ( 0ba9876543210 , 2aa55555555 ) + +[50,42]: + int 02ea61d950c842aa55555555 <- ( 0ba9876543210 , eaa55555555 ) + +[50,41]: + int 17530eca86420aa55555555 <- ( 0ba9876543210 , 0aa55555555 ) + +[50,40]: + int 0ba9876543210aa55555555 <- ( 0ba9876543210 , aa55555555 ) + +[50,39]: + int 05d4c3b2a19082a55555555 <- ( 0ba9876543210 , 2a55555555 ) + +[50,38]: + int 02ea61d950c842a55555555 <- ( 0ba9876543210 , ea55555555 ) + +[50,37]: + int 17530eca86420a55555555 <- ( 0ba9876543210 , 0a55555555 ) + +[50,36]: + int 0ba9876543210a55555555 <- ( 0ba9876543210 , a55555555 ) + +[50,35]: + int 05d4c3b2a1908255555555 <- ( 0ba9876543210 , 255555555 ) + +[50,34]: + int 02ea61d950c84255555555 <- ( 0ba9876543210 , e55555555 ) + +[50,33]: + int 17530eca8642055555555 <- ( 0ba9876543210 , 055555555 ) + +[50,32]: + int 0ba987654321055555555 <- ( 0ba9876543210 , 55555555 ) + +[50,31]: + int 05d4c3b2a190855555555 <- ( 0ba9876543210 , d5555555 ) + +[50,30]: + int 02ea61d950c8415555555 <- ( 0ba9876543210 , 15555555 ) + +[50,29]: + int 17530eca864215555555 <- ( 0ba9876543210 , f5555555 ) + +[50,28]: + int 0ba98765432105555555 <- ( 0ba9876543210 , 5555555 ) + +[50,27]: + int 05d4c3b2a19085555555 <- ( 0ba9876543210 , d555555 ) + +[50,26]: + int 02ea61d950c841555555 <- ( 0ba9876543210 , 1555555 ) + +[50,25]: + int 17530eca86421555555 <- ( 0ba9876543210 , f555555 ) + +[50,24]: + int 0ba9876543210555555 <- ( 0ba9876543210 , 555555 ) + +[50,23]: + int 05d4c3b2a1908555555 <- ( 0ba9876543210 , d55555 ) + +[50,22]: + int 02ea61d950c84155555 <- ( 0ba9876543210 , 155555 ) + +[50,21]: + int 17530eca8642155555 <- ( 0ba9876543210 , f55555 ) + +[50,20]: + int 0ba987654321055555 <- ( 0ba9876543210 , 55555 ) + +[50,19]: + int 05d4c3b2a190855555 <- ( 0ba9876543210 , d5555 ) + +[50,18]: + int 02ea61d950c8415555 <- ( 0ba9876543210 , 15555 ) + +[50,17]: + int 17530eca864215555 <- ( 0ba9876543210 , f5555 ) + +[50,16]: + int 0ba98765432105555 <- ( 0ba9876543210 , 5555 ) + +[50,15]: + int 05d4c3b2a19085555 <- ( 0ba9876543210 , d555 ) + +[50,14]: + int 02ea61d950c841555 <- ( 0ba9876543210 , 1555 ) + +[50,13]: + int 17530eca86421555 <- ( 0ba9876543210 , f555 ) + +[50,12]: + int 0ba9876543210555 <- ( 0ba9876543210 , 555 ) + +[50,11]: + int 05d4c3b2a1908555 <- ( 0ba9876543210 , d55 ) + +[50,10]: + int 02ea61d950c84155 <- ( 0ba9876543210 , 155 ) + +[50,9]: + int 17530eca8642155 <- ( 0ba9876543210 , f55 ) + +[50,8]: + int 0ba987654321055 <- ( 0ba9876543210 , 55 ) + +[50,7]: + int 05d4c3b2a190855 <- ( 0ba9876543210 , d5 ) + +[50,6]: + int 02ea61d950c8415 <- ( 0ba9876543210 , 15 ) + +[50,5]: + int 17530eca864215 <- ( 0ba9876543210 , f5 ) + +[50,4]: + int 0ba98765432105 <- ( 0ba9876543210 , 5 ) + +[50,3]: + int 05d4c3b2a19085 <- ( 0ba9876543210 , d ) + +[50,2]: + int 02ea61d950c841 <- ( 0ba9876543210 , 1 ) + +[50,1]: + int 17530eca86421 <- ( 0ba9876543210 , f ) + +[49,64]: + int 0ba9876543210aaaaaaaa55555555 <- ( 0ba9876543210 , aaaaaaaa55555555 ) + +[49,63]: + int 05d4c3b2a19082aaaaaaa55555555 <- ( 0ba9876543210 , 2aaaaaaa55555555 ) + +[49,62]: + int 2ea61d950c842aaaaaaa55555555 <- ( 0ba9876543210 , eaaaaaaa55555555 ) + +[49,61]: + int 17530eca86420aaaaaaa55555555 <- ( 0ba9876543210 , 0aaaaaaa55555555 ) + +[49,60]: + int 0ba9876543210aaaaaaa55555555 <- ( 0ba9876543210 , aaaaaaa55555555 ) + +[49,59]: + int 05d4c3b2a19082aaaaaa55555555 <- ( 0ba9876543210 , 2aaaaaa55555555 ) + +[49,58]: + int 2ea61d950c842aaaaaa55555555 <- ( 0ba9876543210 , eaaaaaa55555555 ) + +[49,57]: + int 17530eca86420aaaaaa55555555 <- ( 0ba9876543210 , 0aaaaaa55555555 ) + +[49,56]: + int 0ba9876543210aaaaaa55555555 <- ( 0ba9876543210 , aaaaaa55555555 ) + +[49,55]: + int 05d4c3b2a19082aaaaa55555555 <- ( 0ba9876543210 , 2aaaaa55555555 ) + +[49,54]: + int 2ea61d950c842aaaaa55555555 <- ( 0ba9876543210 , eaaaaa55555555 ) + +[49,53]: + int 17530eca86420aaaaa55555555 <- ( 0ba9876543210 , 0aaaaa55555555 ) + +[49,52]: + int 0ba9876543210aaaaa55555555 <- ( 0ba9876543210 , aaaaa55555555 ) + +[49,51]: + int 05d4c3b2a19082aaaa55555555 <- ( 0ba9876543210 , 2aaaa55555555 ) + +[49,50]: + int 2ea61d950c842aaaa55555555 <- ( 0ba9876543210 , eaaaa55555555 ) + +[49,49]: + int 17530eca86420aaaa55555555 <- ( 0ba9876543210 , 0aaaa55555555 ) + +[49,48]: + int 0ba9876543210aaaa55555555 <- ( 0ba9876543210 , aaaa55555555 ) + +[49,47]: + int 05d4c3b2a19082aaa55555555 <- ( 0ba9876543210 , 2aaa55555555 ) + +[49,46]: + int 2ea61d950c842aaa55555555 <- ( 0ba9876543210 , eaaa55555555 ) + +[49,45]: + int 17530eca86420aaa55555555 <- ( 0ba9876543210 , 0aaa55555555 ) + +[49,44]: + int 0ba9876543210aaa55555555 <- ( 0ba9876543210 , aaa55555555 ) + +[49,43]: + int 05d4c3b2a19082aa55555555 <- ( 0ba9876543210 , 2aa55555555 ) + +[49,42]: + int 2ea61d950c842aa55555555 <- ( 0ba9876543210 , eaa55555555 ) + +[49,41]: + int 17530eca86420aa55555555 <- ( 0ba9876543210 , 0aa55555555 ) + +[49,40]: + int 0ba9876543210aa55555555 <- ( 0ba9876543210 , aa55555555 ) + +[49,39]: + int 05d4c3b2a19082a55555555 <- ( 0ba9876543210 , 2a55555555 ) + +[49,38]: + int 2ea61d950c842a55555555 <- ( 0ba9876543210 , ea55555555 ) + +[49,37]: + int 17530eca86420a55555555 <- ( 0ba9876543210 , 0a55555555 ) + +[49,36]: + int 0ba9876543210a55555555 <- ( 0ba9876543210 , a55555555 ) + +[49,35]: + int 05d4c3b2a1908255555555 <- ( 0ba9876543210 , 255555555 ) + +[49,34]: + int 2ea61d950c84255555555 <- ( 0ba9876543210 , e55555555 ) + +[49,33]: + int 17530eca8642055555555 <- ( 0ba9876543210 , 055555555 ) + +[49,32]: + int 0ba987654321055555555 <- ( 0ba9876543210 , 55555555 ) + +[49,31]: + int 05d4c3b2a190855555555 <- ( 0ba9876543210 , d5555555 ) + +[49,30]: + int 2ea61d950c8415555555 <- ( 0ba9876543210 , 15555555 ) + +[49,29]: + int 17530eca864215555555 <- ( 0ba9876543210 , f5555555 ) + +[49,28]: + int 0ba98765432105555555 <- ( 0ba9876543210 , 5555555 ) + +[49,27]: + int 05d4c3b2a19085555555 <- ( 0ba9876543210 , d555555 ) + +[49,26]: + int 2ea61d950c841555555 <- ( 0ba9876543210 , 1555555 ) + +[49,25]: + int 17530eca86421555555 <- ( 0ba9876543210 , f555555 ) + +[49,24]: + int 0ba9876543210555555 <- ( 0ba9876543210 , 555555 ) + +[49,23]: + int 05d4c3b2a1908555555 <- ( 0ba9876543210 , d55555 ) + +[49,22]: + int 2ea61d950c84155555 <- ( 0ba9876543210 , 155555 ) + +[49,21]: + int 17530eca8642155555 <- ( 0ba9876543210 , f55555 ) + +[49,20]: + int 0ba987654321055555 <- ( 0ba9876543210 , 55555 ) + +[49,19]: + int 05d4c3b2a190855555 <- ( 0ba9876543210 , d5555 ) + +[49,18]: + int 2ea61d950c8415555 <- ( 0ba9876543210 , 15555 ) + +[49,17]: + int 17530eca864215555 <- ( 0ba9876543210 , f5555 ) + +[49,16]: + int 0ba98765432105555 <- ( 0ba9876543210 , 5555 ) + +[49,15]: + int 05d4c3b2a19085555 <- ( 0ba9876543210 , d555 ) + +[49,14]: + int 2ea61d950c841555 <- ( 0ba9876543210 , 1555 ) + +[49,13]: + int 17530eca86421555 <- ( 0ba9876543210 , f555 ) + +[49,12]: + int 0ba9876543210555 <- ( 0ba9876543210 , 555 ) + +[49,11]: + int 05d4c3b2a1908555 <- ( 0ba9876543210 , d55 ) + +[49,10]: + int 2ea61d950c84155 <- ( 0ba9876543210 , 155 ) + +[49,9]: + int 17530eca8642155 <- ( 0ba9876543210 , f55 ) + +[49,8]: + int 0ba987654321055 <- ( 0ba9876543210 , 55 ) + +[49,7]: + int 05d4c3b2a190855 <- ( 0ba9876543210 , d5 ) + +[49,6]: + int 2ea61d950c8415 <- ( 0ba9876543210 , 15 ) + +[49,5]: + int 17530eca864215 <- ( 0ba9876543210 , f5 ) + +[49,4]: + int 0ba98765432105 <- ( 0ba9876543210 , 5 ) + +[49,3]: + int 05d4c3b2a19085 <- ( 0ba9876543210 , d ) + +[49,2]: + int 2ea61d950c841 <- ( 0ba9876543210 , 1 ) + +[49,1]: + int 17530eca86421 <- ( 0ba9876543210 , f ) + +[48,64]: + int 0ba9876543210aaaaaaaa55555555 <- ( ba9876543210 , aaaaaaaa55555555 ) + +[48,63]: + int 5d4c3b2a19082aaaaaaa55555555 <- ( ba9876543210 , 2aaaaaaa55555555 ) + +[48,62]: + int 2ea61d950c842aaaaaaa55555555 <- ( ba9876543210 , eaaaaaaa55555555 ) + +[48,61]: + int 17530eca86420aaaaaaa55555555 <- ( ba9876543210 , 0aaaaaaa55555555 ) + +[48,60]: + int 0ba9876543210aaaaaaa55555555 <- ( ba9876543210 , aaaaaaa55555555 ) + +[48,59]: + int 5d4c3b2a19082aaaaaa55555555 <- ( ba9876543210 , 2aaaaaa55555555 ) + +[48,58]: + int 2ea61d950c842aaaaaa55555555 <- ( ba9876543210 , eaaaaaa55555555 ) + +[48,57]: + int 17530eca86420aaaaaa55555555 <- ( ba9876543210 , 0aaaaaa55555555 ) + +[48,56]: + int 0ba9876543210aaaaaa55555555 <- ( ba9876543210 , aaaaaa55555555 ) + +[48,55]: + int 5d4c3b2a19082aaaaa55555555 <- ( ba9876543210 , 2aaaaa55555555 ) + +[48,54]: + int 2ea61d950c842aaaaa55555555 <- ( ba9876543210 , eaaaaa55555555 ) + +[48,53]: + int 17530eca86420aaaaa55555555 <- ( ba9876543210 , 0aaaaa55555555 ) + +[48,52]: + int 0ba9876543210aaaaa55555555 <- ( ba9876543210 , aaaaa55555555 ) + +[48,51]: + int 5d4c3b2a19082aaaa55555555 <- ( ba9876543210 , 2aaaa55555555 ) + +[48,50]: + int 2ea61d950c842aaaa55555555 <- ( ba9876543210 , eaaaa55555555 ) + +[48,49]: + int 17530eca86420aaaa55555555 <- ( ba9876543210 , 0aaaa55555555 ) + +[48,48]: + int 0ba9876543210aaaa55555555 <- ( ba9876543210 , aaaa55555555 ) + +[48,47]: + int 5d4c3b2a19082aaa55555555 <- ( ba9876543210 , 2aaa55555555 ) + +[48,46]: + int 2ea61d950c842aaa55555555 <- ( ba9876543210 , eaaa55555555 ) + +[48,45]: + int 17530eca86420aaa55555555 <- ( ba9876543210 , 0aaa55555555 ) + +[48,44]: + int 0ba9876543210aaa55555555 <- ( ba9876543210 , aaa55555555 ) + +[48,43]: + int 5d4c3b2a19082aa55555555 <- ( ba9876543210 , 2aa55555555 ) + +[48,42]: + int 2ea61d950c842aa55555555 <- ( ba9876543210 , eaa55555555 ) + +[48,41]: + int 17530eca86420aa55555555 <- ( ba9876543210 , 0aa55555555 ) + +[48,40]: + int 0ba9876543210aa55555555 <- ( ba9876543210 , aa55555555 ) + +[48,39]: + int 5d4c3b2a19082a55555555 <- ( ba9876543210 , 2a55555555 ) + +[48,38]: + int 2ea61d950c842a55555555 <- ( ba9876543210 , ea55555555 ) + +[48,37]: + int 17530eca86420a55555555 <- ( ba9876543210 , 0a55555555 ) + +[48,36]: + int 0ba9876543210a55555555 <- ( ba9876543210 , a55555555 ) + +[48,35]: + int 5d4c3b2a1908255555555 <- ( ba9876543210 , 255555555 ) + +[48,34]: + int 2ea61d950c84255555555 <- ( ba9876543210 , e55555555 ) + +[48,33]: + int 17530eca8642055555555 <- ( ba9876543210 , 055555555 ) + +[48,32]: + int 0ba987654321055555555 <- ( ba9876543210 , 55555555 ) + +[48,31]: + int 5d4c3b2a190855555555 <- ( ba9876543210 , d5555555 ) + +[48,30]: + int 2ea61d950c8415555555 <- ( ba9876543210 , 15555555 ) + +[48,29]: + int 17530eca864215555555 <- ( ba9876543210 , f5555555 ) + +[48,28]: + int 0ba98765432105555555 <- ( ba9876543210 , 5555555 ) + +[48,27]: + int 5d4c3b2a19085555555 <- ( ba9876543210 , d555555 ) + +[48,26]: + int 2ea61d950c841555555 <- ( ba9876543210 , 1555555 ) + +[48,25]: + int 17530eca86421555555 <- ( ba9876543210 , f555555 ) + +[48,24]: + int 0ba9876543210555555 <- ( ba9876543210 , 555555 ) + +[48,23]: + int 5d4c3b2a1908555555 <- ( ba9876543210 , d55555 ) + +[48,22]: + int 2ea61d950c84155555 <- ( ba9876543210 , 155555 ) + +[48,21]: + int 17530eca8642155555 <- ( ba9876543210 , f55555 ) + +[48,20]: + int 0ba987654321055555 <- ( ba9876543210 , 55555 ) + +[48,19]: + int 5d4c3b2a190855555 <- ( ba9876543210 , d5555 ) + +[48,18]: + int 2ea61d950c8415555 <- ( ba9876543210 , 15555 ) + +[48,17]: + int 17530eca864215555 <- ( ba9876543210 , f5555 ) + +[48,16]: + int 0ba98765432105555 <- ( ba9876543210 , 5555 ) + +[48,15]: + int 5d4c3b2a19085555 <- ( ba9876543210 , d555 ) + +[48,14]: + int 2ea61d950c841555 <- ( ba9876543210 , 1555 ) + +[48,13]: + int 17530eca86421555 <- ( ba9876543210 , f555 ) + +[48,12]: + int 0ba9876543210555 <- ( ba9876543210 , 555 ) + +[48,11]: + int 5d4c3b2a1908555 <- ( ba9876543210 , d55 ) + +[48,10]: + int 2ea61d950c84155 <- ( ba9876543210 , 155 ) + +[48,9]: + int 17530eca8642155 <- ( ba9876543210 , f55 ) + +[48,8]: + int 0ba987654321055 <- ( ba9876543210 , 55 ) + +[48,7]: + int 5d4c3b2a190855 <- ( ba9876543210 , d5 ) + +[48,6]: + int 2ea61d950c8415 <- ( ba9876543210 , 15 ) + +[48,5]: + int 17530eca864215 <- ( ba9876543210 , f5 ) + +[48,4]: + int 0ba98765432105 <- ( ba9876543210 , 5 ) + +[48,3]: + int 5d4c3b2a19085 <- ( ba9876543210 , d ) + +[48,2]: + int 2ea61d950c841 <- ( ba9876543210 , 1 ) + +[48,1]: + int 17530eca86421 <- ( ba9876543210 , f ) + +[47,64]: + int 3a9876543210aaaaaaaa55555555 <- ( 3a9876543210 , aaaaaaaa55555555 ) + +[47,63]: + int 1d4c3b2a19082aaaaaaa55555555 <- ( 3a9876543210 , 2aaaaaaa55555555 ) + +[47,62]: + int 0ea61d950c842aaaaaaa55555555 <- ( 3a9876543210 , eaaaaaaa55555555 ) + +[47,61]: + int 07530eca86420aaaaaaa55555555 <- ( 3a9876543210 , 0aaaaaaa55555555 ) + +[47,60]: + int 3a9876543210aaaaaaa55555555 <- ( 3a9876543210 , aaaaaaa55555555 ) + +[47,59]: + int 1d4c3b2a19082aaaaaa55555555 <- ( 3a9876543210 , 2aaaaaa55555555 ) + +[47,58]: + int 0ea61d950c842aaaaaa55555555 <- ( 3a9876543210 , eaaaaaa55555555 ) + +[47,57]: + int 07530eca86420aaaaaa55555555 <- ( 3a9876543210 , 0aaaaaa55555555 ) + +[47,56]: + int 3a9876543210aaaaaa55555555 <- ( 3a9876543210 , aaaaaa55555555 ) + +[47,55]: + int 1d4c3b2a19082aaaaa55555555 <- ( 3a9876543210 , 2aaaaa55555555 ) + +[47,54]: + int 0ea61d950c842aaaaa55555555 <- ( 3a9876543210 , eaaaaa55555555 ) + +[47,53]: + int 07530eca86420aaaaa55555555 <- ( 3a9876543210 , 0aaaaa55555555 ) + +[47,52]: + int 3a9876543210aaaaa55555555 <- ( 3a9876543210 , aaaaa55555555 ) + +[47,51]: + int 1d4c3b2a19082aaaa55555555 <- ( 3a9876543210 , 2aaaa55555555 ) + +[47,50]: + int 0ea61d950c842aaaa55555555 <- ( 3a9876543210 , eaaaa55555555 ) + +[47,49]: + int 07530eca86420aaaa55555555 <- ( 3a9876543210 , 0aaaa55555555 ) + +[47,48]: + int 3a9876543210aaaa55555555 <- ( 3a9876543210 , aaaa55555555 ) + +[47,47]: + int 1d4c3b2a19082aaa55555555 <- ( 3a9876543210 , 2aaa55555555 ) + +[47,46]: + int 0ea61d950c842aaa55555555 <- ( 3a9876543210 , eaaa55555555 ) + +[47,45]: + int 07530eca86420aaa55555555 <- ( 3a9876543210 , 0aaa55555555 ) + +[47,44]: + int 3a9876543210aaa55555555 <- ( 3a9876543210 , aaa55555555 ) + +[47,43]: + int 1d4c3b2a19082aa55555555 <- ( 3a9876543210 , 2aa55555555 ) + +[47,42]: + int 0ea61d950c842aa55555555 <- ( 3a9876543210 , eaa55555555 ) + +[47,41]: + int 07530eca86420aa55555555 <- ( 3a9876543210 , 0aa55555555 ) + +[47,40]: + int 3a9876543210aa55555555 <- ( 3a9876543210 , aa55555555 ) + +[47,39]: + int 1d4c3b2a19082a55555555 <- ( 3a9876543210 , 2a55555555 ) + +[47,38]: + int 0ea61d950c842a55555555 <- ( 3a9876543210 , ea55555555 ) + +[47,37]: + int 07530eca86420a55555555 <- ( 3a9876543210 , 0a55555555 ) + +[47,36]: + int 3a9876543210a55555555 <- ( 3a9876543210 , a55555555 ) + +[47,35]: + int 1d4c3b2a1908255555555 <- ( 3a9876543210 , 255555555 ) + +[47,34]: + int 0ea61d950c84255555555 <- ( 3a9876543210 , e55555555 ) + +[47,33]: + int 07530eca8642055555555 <- ( 3a9876543210 , 055555555 ) + +[47,32]: + int 3a987654321055555555 <- ( 3a9876543210 , 55555555 ) + +[47,31]: + int 1d4c3b2a190855555555 <- ( 3a9876543210 , d5555555 ) + +[47,30]: + int 0ea61d950c8415555555 <- ( 3a9876543210 , 15555555 ) + +[47,29]: + int 07530eca864215555555 <- ( 3a9876543210 , f5555555 ) + +[47,28]: + int 3a98765432105555555 <- ( 3a9876543210 , 5555555 ) + +[47,27]: + int 1d4c3b2a19085555555 <- ( 3a9876543210 , d555555 ) + +[47,26]: + int 0ea61d950c841555555 <- ( 3a9876543210 , 1555555 ) + +[47,25]: + int 07530eca86421555555 <- ( 3a9876543210 , f555555 ) + +[47,24]: + int 3a9876543210555555 <- ( 3a9876543210 , 555555 ) + +[47,23]: + int 1d4c3b2a1908555555 <- ( 3a9876543210 , d55555 ) + +[47,22]: + int 0ea61d950c84155555 <- ( 3a9876543210 , 155555 ) + +[47,21]: + int 07530eca8642155555 <- ( 3a9876543210 , f55555 ) + +[47,20]: + int 3a987654321055555 <- ( 3a9876543210 , 55555 ) + +[47,19]: + int 1d4c3b2a190855555 <- ( 3a9876543210 , d5555 ) + +[47,18]: + int 0ea61d950c8415555 <- ( 3a9876543210 , 15555 ) + +[47,17]: + int 07530eca864215555 <- ( 3a9876543210 , f5555 ) + +[47,16]: + int 3a98765432105555 <- ( 3a9876543210 , 5555 ) + +[47,15]: + int 1d4c3b2a19085555 <- ( 3a9876543210 , d555 ) + +[47,14]: + int 0ea61d950c841555 <- ( 3a9876543210 , 1555 ) + +[47,13]: + int 07530eca86421555 <- ( 3a9876543210 , f555 ) + +[47,12]: + int 3a9876543210555 <- ( 3a9876543210 , 555 ) + +[47,11]: + int 1d4c3b2a1908555 <- ( 3a9876543210 , d55 ) + +[47,10]: + int 0ea61d950c84155 <- ( 3a9876543210 , 155 ) + +[47,9]: + int 07530eca8642155 <- ( 3a9876543210 , f55 ) + +[47,8]: + int 3a987654321055 <- ( 3a9876543210 , 55 ) + +[47,7]: + int 1d4c3b2a190855 <- ( 3a9876543210 , d5 ) + +[47,6]: + int 0ea61d950c8415 <- ( 3a9876543210 , 15 ) + +[47,5]: + int 07530eca864215 <- ( 3a9876543210 , f5 ) + +[47,4]: + int 3a98765432105 <- ( 3a9876543210 , 5 ) + +[47,3]: + int 1d4c3b2a19085 <- ( 3a9876543210 , d ) + +[47,2]: + int 0ea61d950c841 <- ( 3a9876543210 , 1 ) + +[47,1]: + int 07530eca86421 <- ( 3a9876543210 , f ) + +[46,64]: + int 3a9876543210aaaaaaaa55555555 <- ( fa9876543210 , aaaaaaaa55555555 ) + +[46,63]: + int 1d4c3b2a19082aaaaaaa55555555 <- ( fa9876543210 , 2aaaaaaa55555555 ) + +[46,62]: + int 0ea61d950c842aaaaaaa55555555 <- ( fa9876543210 , eaaaaaaa55555555 ) + +[46,61]: + int 7530eca86420aaaaaaa55555555 <- ( fa9876543210 , 0aaaaaaa55555555 ) + +[46,60]: + int 3a9876543210aaaaaaa55555555 <- ( fa9876543210 , aaaaaaa55555555 ) + +[46,59]: + int 1d4c3b2a19082aaaaaa55555555 <- ( fa9876543210 , 2aaaaaa55555555 ) + +[46,58]: + int 0ea61d950c842aaaaaa55555555 <- ( fa9876543210 , eaaaaaa55555555 ) + +[46,57]: + int 7530eca86420aaaaaa55555555 <- ( fa9876543210 , 0aaaaaa55555555 ) + +[46,56]: + int 3a9876543210aaaaaa55555555 <- ( fa9876543210 , aaaaaa55555555 ) + +[46,55]: + int 1d4c3b2a19082aaaaa55555555 <- ( fa9876543210 , 2aaaaa55555555 ) + +[46,54]: + int 0ea61d950c842aaaaa55555555 <- ( fa9876543210 , eaaaaa55555555 ) + +[46,53]: + int 7530eca86420aaaaa55555555 <- ( fa9876543210 , 0aaaaa55555555 ) + +[46,52]: + int 3a9876543210aaaaa55555555 <- ( fa9876543210 , aaaaa55555555 ) + +[46,51]: + int 1d4c3b2a19082aaaa55555555 <- ( fa9876543210 , 2aaaa55555555 ) + +[46,50]: + int 0ea61d950c842aaaa55555555 <- ( fa9876543210 , eaaaa55555555 ) + +[46,49]: + int 7530eca86420aaaa55555555 <- ( fa9876543210 , 0aaaa55555555 ) + +[46,48]: + int 3a9876543210aaaa55555555 <- ( fa9876543210 , aaaa55555555 ) + +[46,47]: + int 1d4c3b2a19082aaa55555555 <- ( fa9876543210 , 2aaa55555555 ) + +[46,46]: + int 0ea61d950c842aaa55555555 <- ( fa9876543210 , eaaa55555555 ) + +[46,45]: + int 7530eca86420aaa55555555 <- ( fa9876543210 , 0aaa55555555 ) + +[46,44]: + int 3a9876543210aaa55555555 <- ( fa9876543210 , aaa55555555 ) + +[46,43]: + int 1d4c3b2a19082aa55555555 <- ( fa9876543210 , 2aa55555555 ) + +[46,42]: + int 0ea61d950c842aa55555555 <- ( fa9876543210 , eaa55555555 ) + +[46,41]: + int 7530eca86420aa55555555 <- ( fa9876543210 , 0aa55555555 ) + +[46,40]: + int 3a9876543210aa55555555 <- ( fa9876543210 , aa55555555 ) + +[46,39]: + int 1d4c3b2a19082a55555555 <- ( fa9876543210 , 2a55555555 ) + +[46,38]: + int 0ea61d950c842a55555555 <- ( fa9876543210 , ea55555555 ) + +[46,37]: + int 7530eca86420a55555555 <- ( fa9876543210 , 0a55555555 ) + +[46,36]: + int 3a9876543210a55555555 <- ( fa9876543210 , a55555555 ) + +[46,35]: + int 1d4c3b2a1908255555555 <- ( fa9876543210 , 255555555 ) + +[46,34]: + int 0ea61d950c84255555555 <- ( fa9876543210 , e55555555 ) + +[46,33]: + int 7530eca8642055555555 <- ( fa9876543210 , 055555555 ) + +[46,32]: + int 3a987654321055555555 <- ( fa9876543210 , 55555555 ) + +[46,31]: + int 1d4c3b2a190855555555 <- ( fa9876543210 , d5555555 ) + +[46,30]: + int 0ea61d950c8415555555 <- ( fa9876543210 , 15555555 ) + +[46,29]: + int 7530eca864215555555 <- ( fa9876543210 , f5555555 ) + +[46,28]: + int 3a98765432105555555 <- ( fa9876543210 , 5555555 ) + +[46,27]: + int 1d4c3b2a19085555555 <- ( fa9876543210 , d555555 ) + +[46,26]: + int 0ea61d950c841555555 <- ( fa9876543210 , 1555555 ) + +[46,25]: + int 7530eca86421555555 <- ( fa9876543210 , f555555 ) + +[46,24]: + int 3a9876543210555555 <- ( fa9876543210 , 555555 ) + +[46,23]: + int 1d4c3b2a1908555555 <- ( fa9876543210 , d55555 ) + +[46,22]: + int 0ea61d950c84155555 <- ( fa9876543210 , 155555 ) + +[46,21]: + int 7530eca8642155555 <- ( fa9876543210 , f55555 ) + +[46,20]: + int 3a987654321055555 <- ( fa9876543210 , 55555 ) + +[46,19]: + int 1d4c3b2a190855555 <- ( fa9876543210 , d5555 ) + +[46,18]: + int 0ea61d950c8415555 <- ( fa9876543210 , 15555 ) + +[46,17]: + int 7530eca864215555 <- ( fa9876543210 , f5555 ) + +[46,16]: + int 3a98765432105555 <- ( fa9876543210 , 5555 ) + +[46,15]: + int 1d4c3b2a19085555 <- ( fa9876543210 , d555 ) + +[46,14]: + int 0ea61d950c841555 <- ( fa9876543210 , 1555 ) + +[46,13]: + int 7530eca86421555 <- ( fa9876543210 , f555 ) + +[46,12]: + int 3a9876543210555 <- ( fa9876543210 , 555 ) + +[46,11]: + int 1d4c3b2a1908555 <- ( fa9876543210 , d55 ) + +[46,10]: + int 0ea61d950c84155 <- ( fa9876543210 , 155 ) + +[46,9]: + int 7530eca8642155 <- ( fa9876543210 , f55 ) + +[46,8]: + int 3a987654321055 <- ( fa9876543210 , 55 ) + +[46,7]: + int 1d4c3b2a190855 <- ( fa9876543210 , d5 ) + +[46,6]: + int 0ea61d950c8415 <- ( fa9876543210 , 15 ) + +[46,5]: + int 7530eca864215 <- ( fa9876543210 , f5 ) + +[46,4]: + int 3a98765432105 <- ( fa9876543210 , 5 ) + +[46,3]: + int 1d4c3b2a19085 <- ( fa9876543210 , d ) + +[46,2]: + int 0ea61d950c841 <- ( fa9876543210 , 1 ) + +[46,1]: + int 7530eca86421 <- ( fa9876543210 , f ) + +[45,64]: + int 1a9876543210aaaaaaaa55555555 <- ( fa9876543210 , aaaaaaaa55555555 ) + +[45,63]: + int 0d4c3b2a19082aaaaaaa55555555 <- ( fa9876543210 , 2aaaaaaa55555555 ) + +[45,62]: + int 6a61d950c842aaaaaaa55555555 <- ( fa9876543210 , eaaaaaaa55555555 ) + +[45,61]: + int 3530eca86420aaaaaaa55555555 <- ( fa9876543210 , 0aaaaaaa55555555 ) + +[45,60]: + int 1a9876543210aaaaaaa55555555 <- ( fa9876543210 , aaaaaaa55555555 ) + +[45,59]: + int 0d4c3b2a19082aaaaaa55555555 <- ( fa9876543210 , 2aaaaaa55555555 ) + +[45,58]: + int 6a61d950c842aaaaaa55555555 <- ( fa9876543210 , eaaaaaa55555555 ) + +[45,57]: + int 3530eca86420aaaaaa55555555 <- ( fa9876543210 , 0aaaaaa55555555 ) + +[45,56]: + int 1a9876543210aaaaaa55555555 <- ( fa9876543210 , aaaaaa55555555 ) + +[45,55]: + int 0d4c3b2a19082aaaaa55555555 <- ( fa9876543210 , 2aaaaa55555555 ) + +[45,54]: + int 6a61d950c842aaaaa55555555 <- ( fa9876543210 , eaaaaa55555555 ) + +[45,53]: + int 3530eca86420aaaaa55555555 <- ( fa9876543210 , 0aaaaa55555555 ) + +[45,52]: + int 1a9876543210aaaaa55555555 <- ( fa9876543210 , aaaaa55555555 ) + +[45,51]: + int 0d4c3b2a19082aaaa55555555 <- ( fa9876543210 , 2aaaa55555555 ) + +[45,50]: + int 6a61d950c842aaaa55555555 <- ( fa9876543210 , eaaaa55555555 ) + +[45,49]: + int 3530eca86420aaaa55555555 <- ( fa9876543210 , 0aaaa55555555 ) + +[45,48]: + int 1a9876543210aaaa55555555 <- ( fa9876543210 , aaaa55555555 ) + +[45,47]: + int 0d4c3b2a19082aaa55555555 <- ( fa9876543210 , 2aaa55555555 ) + +[45,46]: + int 6a61d950c842aaa55555555 <- ( fa9876543210 , eaaa55555555 ) + +[45,45]: + int 3530eca86420aaa55555555 <- ( fa9876543210 , 0aaa55555555 ) + +[45,44]: + int 1a9876543210aaa55555555 <- ( fa9876543210 , aaa55555555 ) + +[45,43]: + int 0d4c3b2a19082aa55555555 <- ( fa9876543210 , 2aa55555555 ) + +[45,42]: + int 6a61d950c842aa55555555 <- ( fa9876543210 , eaa55555555 ) + +[45,41]: + int 3530eca86420aa55555555 <- ( fa9876543210 , 0aa55555555 ) + +[45,40]: + int 1a9876543210aa55555555 <- ( fa9876543210 , aa55555555 ) + +[45,39]: + int 0d4c3b2a19082a55555555 <- ( fa9876543210 , 2a55555555 ) + +[45,38]: + int 6a61d950c842a55555555 <- ( fa9876543210 , ea55555555 ) + +[45,37]: + int 3530eca86420a55555555 <- ( fa9876543210 , 0a55555555 ) + +[45,36]: + int 1a9876543210a55555555 <- ( fa9876543210 , a55555555 ) + +[45,35]: + int 0d4c3b2a1908255555555 <- ( fa9876543210 , 255555555 ) + +[45,34]: + int 6a61d950c84255555555 <- ( fa9876543210 , e55555555 ) + +[45,33]: + int 3530eca8642055555555 <- ( fa9876543210 , 055555555 ) + +[45,32]: + int 1a987654321055555555 <- ( fa9876543210 , 55555555 ) + +[45,31]: + int 0d4c3b2a190855555555 <- ( fa9876543210 , d5555555 ) + +[45,30]: + int 6a61d950c8415555555 <- ( fa9876543210 , 15555555 ) + +[45,29]: + int 3530eca864215555555 <- ( fa9876543210 , f5555555 ) + +[45,28]: + int 1a98765432105555555 <- ( fa9876543210 , 5555555 ) + +[45,27]: + int 0d4c3b2a19085555555 <- ( fa9876543210 , d555555 ) + +[45,26]: + int 6a61d950c841555555 <- ( fa9876543210 , 1555555 ) + +[45,25]: + int 3530eca86421555555 <- ( fa9876543210 , f555555 ) + +[45,24]: + int 1a9876543210555555 <- ( fa9876543210 , 555555 ) + +[45,23]: + int 0d4c3b2a1908555555 <- ( fa9876543210 , d55555 ) + +[45,22]: + int 6a61d950c84155555 <- ( fa9876543210 , 155555 ) + +[45,21]: + int 3530eca8642155555 <- ( fa9876543210 , f55555 ) + +[45,20]: + int 1a987654321055555 <- ( fa9876543210 , 55555 ) + +[45,19]: + int 0d4c3b2a190855555 <- ( fa9876543210 , d5555 ) + +[45,18]: + int 6a61d950c8415555 <- ( fa9876543210 , 15555 ) + +[45,17]: + int 3530eca864215555 <- ( fa9876543210 , f5555 ) + +[45,16]: + int 1a98765432105555 <- ( fa9876543210 , 5555 ) + +[45,15]: + int 0d4c3b2a19085555 <- ( fa9876543210 , d555 ) + +[45,14]: + int 6a61d950c841555 <- ( fa9876543210 , 1555 ) + +[45,13]: + int 3530eca86421555 <- ( fa9876543210 , f555 ) + +[45,12]: + int 1a9876543210555 <- ( fa9876543210 , 555 ) + +[45,11]: + int 0d4c3b2a1908555 <- ( fa9876543210 , d55 ) + +[45,10]: + int 6a61d950c84155 <- ( fa9876543210 , 155 ) + +[45,9]: + int 3530eca8642155 <- ( fa9876543210 , f55 ) + +[45,8]: + int 1a987654321055 <- ( fa9876543210 , 55 ) + +[45,7]: + int 0d4c3b2a190855 <- ( fa9876543210 , d5 ) + +[45,6]: + int 6a61d950c8415 <- ( fa9876543210 , 15 ) + +[45,5]: + int 3530eca864215 <- ( fa9876543210 , f5 ) + +[45,4]: + int 1a98765432105 <- ( fa9876543210 , 5 ) + +[45,3]: + int 0d4c3b2a19085 <- ( fa9876543210 , d ) + +[45,2]: + int 6a61d950c841 <- ( fa9876543210 , 1 ) + +[45,1]: + int 3530eca86421 <- ( fa9876543210 , f ) + +[44,64]: + int 0a9876543210aaaaaaaa55555555 <- ( a9876543210 , aaaaaaaa55555555 ) + +[44,63]: + int 54c3b2a19082aaaaaaa55555555 <- ( a9876543210 , 2aaaaaaa55555555 ) + +[44,62]: + int 2a61d950c842aaaaaaa55555555 <- ( a9876543210 , eaaaaaaa55555555 ) + +[44,61]: + int 1530eca86420aaaaaaa55555555 <- ( a9876543210 , 0aaaaaaa55555555 ) + +[44,60]: + int 0a9876543210aaaaaaa55555555 <- ( a9876543210 , aaaaaaa55555555 ) + +[44,59]: + int 54c3b2a19082aaaaaa55555555 <- ( a9876543210 , 2aaaaaa55555555 ) + +[44,58]: + int 2a61d950c842aaaaaa55555555 <- ( a9876543210 , eaaaaaa55555555 ) + +[44,57]: + int 1530eca86420aaaaaa55555555 <- ( a9876543210 , 0aaaaaa55555555 ) + +[44,56]: + int 0a9876543210aaaaaa55555555 <- ( a9876543210 , aaaaaa55555555 ) + +[44,55]: + int 54c3b2a19082aaaaa55555555 <- ( a9876543210 , 2aaaaa55555555 ) + +[44,54]: + int 2a61d950c842aaaaa55555555 <- ( a9876543210 , eaaaaa55555555 ) + +[44,53]: + int 1530eca86420aaaaa55555555 <- ( a9876543210 , 0aaaaa55555555 ) + +[44,52]: + int 0a9876543210aaaaa55555555 <- ( a9876543210 , aaaaa55555555 ) + +[44,51]: + int 54c3b2a19082aaaa55555555 <- ( a9876543210 , 2aaaa55555555 ) + +[44,50]: + int 2a61d950c842aaaa55555555 <- ( a9876543210 , eaaaa55555555 ) + +[44,49]: + int 1530eca86420aaaa55555555 <- ( a9876543210 , 0aaaa55555555 ) + +[44,48]: + int 0a9876543210aaaa55555555 <- ( a9876543210 , aaaa55555555 ) + +[44,47]: + int 54c3b2a19082aaa55555555 <- ( a9876543210 , 2aaa55555555 ) + +[44,46]: + int 2a61d950c842aaa55555555 <- ( a9876543210 , eaaa55555555 ) + +[44,45]: + int 1530eca86420aaa55555555 <- ( a9876543210 , 0aaa55555555 ) + +[44,44]: + int 0a9876543210aaa55555555 <- ( a9876543210 , aaa55555555 ) + +[44,43]: + int 54c3b2a19082aa55555555 <- ( a9876543210 , 2aa55555555 ) + +[44,42]: + int 2a61d950c842aa55555555 <- ( a9876543210 , eaa55555555 ) + +[44,41]: + int 1530eca86420aa55555555 <- ( a9876543210 , 0aa55555555 ) + +[44,40]: + int 0a9876543210aa55555555 <- ( a9876543210 , aa55555555 ) + +[44,39]: + int 54c3b2a19082a55555555 <- ( a9876543210 , 2a55555555 ) + +[44,38]: + int 2a61d950c842a55555555 <- ( a9876543210 , ea55555555 ) + +[44,37]: + int 1530eca86420a55555555 <- ( a9876543210 , 0a55555555 ) + +[44,36]: + int 0a9876543210a55555555 <- ( a9876543210 , a55555555 ) + +[44,35]: + int 54c3b2a1908255555555 <- ( a9876543210 , 255555555 ) + +[44,34]: + int 2a61d950c84255555555 <- ( a9876543210 , e55555555 ) + +[44,33]: + int 1530eca8642055555555 <- ( a9876543210 , 055555555 ) + +[44,32]: + int 0a987654321055555555 <- ( a9876543210 , 55555555 ) + +[44,31]: + int 54c3b2a190855555555 <- ( a9876543210 , d5555555 ) + +[44,30]: + int 2a61d950c8415555555 <- ( a9876543210 , 15555555 ) + +[44,29]: + int 1530eca864215555555 <- ( a9876543210 , f5555555 ) + +[44,28]: + int 0a98765432105555555 <- ( a9876543210 , 5555555 ) + +[44,27]: + int 54c3b2a19085555555 <- ( a9876543210 , d555555 ) + +[44,26]: + int 2a61d950c841555555 <- ( a9876543210 , 1555555 ) + +[44,25]: + int 1530eca86421555555 <- ( a9876543210 , f555555 ) + +[44,24]: + int 0a9876543210555555 <- ( a9876543210 , 555555 ) + +[44,23]: + int 54c3b2a1908555555 <- ( a9876543210 , d55555 ) + +[44,22]: + int 2a61d950c84155555 <- ( a9876543210 , 155555 ) + +[44,21]: + int 1530eca8642155555 <- ( a9876543210 , f55555 ) + +[44,20]: + int 0a987654321055555 <- ( a9876543210 , 55555 ) + +[44,19]: + int 54c3b2a190855555 <- ( a9876543210 , d5555 ) + +[44,18]: + int 2a61d950c8415555 <- ( a9876543210 , 15555 ) + +[44,17]: + int 1530eca864215555 <- ( a9876543210 , f5555 ) + +[44,16]: + int 0a98765432105555 <- ( a9876543210 , 5555 ) + +[44,15]: + int 54c3b2a19085555 <- ( a9876543210 , d555 ) + +[44,14]: + int 2a61d950c841555 <- ( a9876543210 , 1555 ) + +[44,13]: + int 1530eca86421555 <- ( a9876543210 , f555 ) + +[44,12]: + int 0a9876543210555 <- ( a9876543210 , 555 ) + +[44,11]: + int 54c3b2a1908555 <- ( a9876543210 , d55 ) + +[44,10]: + int 2a61d950c84155 <- ( a9876543210 , 155 ) + +[44,9]: + int 1530eca8642155 <- ( a9876543210 , f55 ) + +[44,8]: + int 0a987654321055 <- ( a9876543210 , 55 ) + +[44,7]: + int 54c3b2a190855 <- ( a9876543210 , d5 ) + +[44,6]: + int 2a61d950c8415 <- ( a9876543210 , 15 ) + +[44,5]: + int 1530eca864215 <- ( a9876543210 , f5 ) + +[44,4]: + int 0a98765432105 <- ( a9876543210 , 5 ) + +[44,3]: + int 54c3b2a19085 <- ( a9876543210 , d ) + +[44,2]: + int 2a61d950c841 <- ( a9876543210 , 1 ) + +[44,1]: + int 1530eca86421 <- ( a9876543210 , f ) + +[43,64]: + int 29876543210aaaaaaaa55555555 <- ( 29876543210 , aaaaaaaa55555555 ) + +[43,63]: + int 14c3b2a19082aaaaaaa55555555 <- ( 29876543210 , 2aaaaaaa55555555 ) + +[43,62]: + int 0a61d950c842aaaaaaa55555555 <- ( 29876543210 , eaaaaaaa55555555 ) + +[43,61]: + int 0530eca86420aaaaaaa55555555 <- ( 29876543210 , 0aaaaaaa55555555 ) + +[43,60]: + int 29876543210aaaaaaa55555555 <- ( 29876543210 , aaaaaaa55555555 ) + +[43,59]: + int 14c3b2a19082aaaaaa55555555 <- ( 29876543210 , 2aaaaaa55555555 ) + +[43,58]: + int 0a61d950c842aaaaaa55555555 <- ( 29876543210 , eaaaaaa55555555 ) + +[43,57]: + int 0530eca86420aaaaaa55555555 <- ( 29876543210 , 0aaaaaa55555555 ) + +[43,56]: + int 29876543210aaaaaa55555555 <- ( 29876543210 , aaaaaa55555555 ) + +[43,55]: + int 14c3b2a19082aaaaa55555555 <- ( 29876543210 , 2aaaaa55555555 ) + +[43,54]: + int 0a61d950c842aaaaa55555555 <- ( 29876543210 , eaaaaa55555555 ) + +[43,53]: + int 0530eca86420aaaaa55555555 <- ( 29876543210 , 0aaaaa55555555 ) + +[43,52]: + int 29876543210aaaaa55555555 <- ( 29876543210 , aaaaa55555555 ) + +[43,51]: + int 14c3b2a19082aaaa55555555 <- ( 29876543210 , 2aaaa55555555 ) + +[43,50]: + int 0a61d950c842aaaa55555555 <- ( 29876543210 , eaaaa55555555 ) + +[43,49]: + int 0530eca86420aaaa55555555 <- ( 29876543210 , 0aaaa55555555 ) + +[43,48]: + int 29876543210aaaa55555555 <- ( 29876543210 , aaaa55555555 ) + +[43,47]: + int 14c3b2a19082aaa55555555 <- ( 29876543210 , 2aaa55555555 ) + +[43,46]: + int 0a61d950c842aaa55555555 <- ( 29876543210 , eaaa55555555 ) + +[43,45]: + int 0530eca86420aaa55555555 <- ( 29876543210 , 0aaa55555555 ) + +[43,44]: + int 29876543210aaa55555555 <- ( 29876543210 , aaa55555555 ) + +[43,43]: + int 14c3b2a19082aa55555555 <- ( 29876543210 , 2aa55555555 ) + +[43,42]: + int 0a61d950c842aa55555555 <- ( 29876543210 , eaa55555555 ) + +[43,41]: + int 0530eca86420aa55555555 <- ( 29876543210 , 0aa55555555 ) + +[43,40]: + int 29876543210aa55555555 <- ( 29876543210 , aa55555555 ) + +[43,39]: + int 14c3b2a19082a55555555 <- ( 29876543210 , 2a55555555 ) + +[43,38]: + int 0a61d950c842a55555555 <- ( 29876543210 , ea55555555 ) + +[43,37]: + int 0530eca86420a55555555 <- ( 29876543210 , 0a55555555 ) + +[43,36]: + int 29876543210a55555555 <- ( 29876543210 , a55555555 ) + +[43,35]: + int 14c3b2a1908255555555 <- ( 29876543210 , 255555555 ) + +[43,34]: + int 0a61d950c84255555555 <- ( 29876543210 , e55555555 ) + +[43,33]: + int 0530eca8642055555555 <- ( 29876543210 , 055555555 ) + +[43,32]: + int 2987654321055555555 <- ( 29876543210 , 55555555 ) + +[43,31]: + int 14c3b2a190855555555 <- ( 29876543210 , d5555555 ) + +[43,30]: + int 0a61d950c8415555555 <- ( 29876543210 , 15555555 ) + +[43,29]: + int 0530eca864215555555 <- ( 29876543210 , f5555555 ) + +[43,28]: + int 298765432105555555 <- ( 29876543210 , 5555555 ) + +[43,27]: + int 14c3b2a19085555555 <- ( 29876543210 , d555555 ) + +[43,26]: + int 0a61d950c841555555 <- ( 29876543210 , 1555555 ) + +[43,25]: + int 0530eca86421555555 <- ( 29876543210 , f555555 ) + +[43,24]: + int 29876543210555555 <- ( 29876543210 , 555555 ) + +[43,23]: + int 14c3b2a1908555555 <- ( 29876543210 , d55555 ) + +[43,22]: + int 0a61d950c84155555 <- ( 29876543210 , 155555 ) + +[43,21]: + int 0530eca8642155555 <- ( 29876543210 , f55555 ) + +[43,20]: + int 2987654321055555 <- ( 29876543210 , 55555 ) + +[43,19]: + int 14c3b2a190855555 <- ( 29876543210 , d5555 ) + +[43,18]: + int 0a61d950c8415555 <- ( 29876543210 , 15555 ) + +[43,17]: + int 0530eca864215555 <- ( 29876543210 , f5555 ) + +[43,16]: + int 298765432105555 <- ( 29876543210 , 5555 ) + +[43,15]: + int 14c3b2a19085555 <- ( 29876543210 , d555 ) + +[43,14]: + int 0a61d950c841555 <- ( 29876543210 , 1555 ) + +[43,13]: + int 0530eca86421555 <- ( 29876543210 , f555 ) + +[43,12]: + int 29876543210555 <- ( 29876543210 , 555 ) + +[43,11]: + int 14c3b2a1908555 <- ( 29876543210 , d55 ) + +[43,10]: + int 0a61d950c84155 <- ( 29876543210 , 155 ) + +[43,9]: + int 0530eca8642155 <- ( 29876543210 , f55 ) + +[43,8]: + int 2987654321055 <- ( 29876543210 , 55 ) + +[43,7]: + int 14c3b2a190855 <- ( 29876543210 , d5 ) + +[43,6]: + int 0a61d950c8415 <- ( 29876543210 , 15 ) + +[43,5]: + int 0530eca864215 <- ( 29876543210 , f5 ) + +[43,4]: + int 298765432105 <- ( 29876543210 , 5 ) + +[43,3]: + int 14c3b2a19085 <- ( 29876543210 , d ) + +[43,2]: + int 0a61d950c841 <- ( 29876543210 , 1 ) + +[43,1]: + int 0530eca86421 <- ( 29876543210 , f ) + +[42,64]: + int 29876543210aaaaaaaa55555555 <- ( e9876543210 , aaaaaaaa55555555 ) + +[42,63]: + int 14c3b2a19082aaaaaaa55555555 <- ( e9876543210 , 2aaaaaaa55555555 ) + +[42,62]: + int 0a61d950c842aaaaaaa55555555 <- ( e9876543210 , eaaaaaaa55555555 ) + +[42,61]: + int 530eca86420aaaaaaa55555555 <- ( e9876543210 , 0aaaaaaa55555555 ) + +[42,60]: + int 29876543210aaaaaaa55555555 <- ( e9876543210 , aaaaaaa55555555 ) + +[42,59]: + int 14c3b2a19082aaaaaa55555555 <- ( e9876543210 , 2aaaaaa55555555 ) + +[42,58]: + int 0a61d950c842aaaaaa55555555 <- ( e9876543210 , eaaaaaa55555555 ) + +[42,57]: + int 530eca86420aaaaaa55555555 <- ( e9876543210 , 0aaaaaa55555555 ) + +[42,56]: + int 29876543210aaaaaa55555555 <- ( e9876543210 , aaaaaa55555555 ) + +[42,55]: + int 14c3b2a19082aaaaa55555555 <- ( e9876543210 , 2aaaaa55555555 ) + +[42,54]: + int 0a61d950c842aaaaa55555555 <- ( e9876543210 , eaaaaa55555555 ) + +[42,53]: + int 530eca86420aaaaa55555555 <- ( e9876543210 , 0aaaaa55555555 ) + +[42,52]: + int 29876543210aaaaa55555555 <- ( e9876543210 , aaaaa55555555 ) + +[42,51]: + int 14c3b2a19082aaaa55555555 <- ( e9876543210 , 2aaaa55555555 ) + +[42,50]: + int 0a61d950c842aaaa55555555 <- ( e9876543210 , eaaaa55555555 ) + +[42,49]: + int 530eca86420aaaa55555555 <- ( e9876543210 , 0aaaa55555555 ) + +[42,48]: + int 29876543210aaaa55555555 <- ( e9876543210 , aaaa55555555 ) + +[42,47]: + int 14c3b2a19082aaa55555555 <- ( e9876543210 , 2aaa55555555 ) + +[42,46]: + int 0a61d950c842aaa55555555 <- ( e9876543210 , eaaa55555555 ) + +[42,45]: + int 530eca86420aaa55555555 <- ( e9876543210 , 0aaa55555555 ) + +[42,44]: + int 29876543210aaa55555555 <- ( e9876543210 , aaa55555555 ) + +[42,43]: + int 14c3b2a19082aa55555555 <- ( e9876543210 , 2aa55555555 ) + +[42,42]: + int 0a61d950c842aa55555555 <- ( e9876543210 , eaa55555555 ) + +[42,41]: + int 530eca86420aa55555555 <- ( e9876543210 , 0aa55555555 ) + +[42,40]: + int 29876543210aa55555555 <- ( e9876543210 , aa55555555 ) + +[42,39]: + int 14c3b2a19082a55555555 <- ( e9876543210 , 2a55555555 ) + +[42,38]: + int 0a61d950c842a55555555 <- ( e9876543210 , ea55555555 ) + +[42,37]: + int 530eca86420a55555555 <- ( e9876543210 , 0a55555555 ) + +[42,36]: + int 29876543210a55555555 <- ( e9876543210 , a55555555 ) + +[42,35]: + int 14c3b2a1908255555555 <- ( e9876543210 , 255555555 ) + +[42,34]: + int 0a61d950c84255555555 <- ( e9876543210 , e55555555 ) + +[42,33]: + int 530eca8642055555555 <- ( e9876543210 , 055555555 ) + +[42,32]: + int 2987654321055555555 <- ( e9876543210 , 55555555 ) + +[42,31]: + int 14c3b2a190855555555 <- ( e9876543210 , d5555555 ) + +[42,30]: + int 0a61d950c8415555555 <- ( e9876543210 , 15555555 ) + +[42,29]: + int 530eca864215555555 <- ( e9876543210 , f5555555 ) + +[42,28]: + int 298765432105555555 <- ( e9876543210 , 5555555 ) + +[42,27]: + int 14c3b2a19085555555 <- ( e9876543210 , d555555 ) + +[42,26]: + int 0a61d950c841555555 <- ( e9876543210 , 1555555 ) + +[42,25]: + int 530eca86421555555 <- ( e9876543210 , f555555 ) + +[42,24]: + int 29876543210555555 <- ( e9876543210 , 555555 ) + +[42,23]: + int 14c3b2a1908555555 <- ( e9876543210 , d55555 ) + +[42,22]: + int 0a61d950c84155555 <- ( e9876543210 , 155555 ) + +[42,21]: + int 530eca8642155555 <- ( e9876543210 , f55555 ) + +[42,20]: + int 2987654321055555 <- ( e9876543210 , 55555 ) + +[42,19]: + int 14c3b2a190855555 <- ( e9876543210 , d5555 ) + +[42,18]: + int 0a61d950c8415555 <- ( e9876543210 , 15555 ) + +[42,17]: + int 530eca864215555 <- ( e9876543210 , f5555 ) + +[42,16]: + int 298765432105555 <- ( e9876543210 , 5555 ) + +[42,15]: + int 14c3b2a19085555 <- ( e9876543210 , d555 ) + +[42,14]: + int 0a61d950c841555 <- ( e9876543210 , 1555 ) + +[42,13]: + int 530eca86421555 <- ( e9876543210 , f555 ) + +[42,12]: + int 29876543210555 <- ( e9876543210 , 555 ) + +[42,11]: + int 14c3b2a1908555 <- ( e9876543210 , d55 ) + +[42,10]: + int 0a61d950c84155 <- ( e9876543210 , 155 ) + +[42,9]: + int 530eca8642155 <- ( e9876543210 , f55 ) + +[42,8]: + int 2987654321055 <- ( e9876543210 , 55 ) + +[42,7]: + int 14c3b2a190855 <- ( e9876543210 , d5 ) + +[42,6]: + int 0a61d950c8415 <- ( e9876543210 , 15 ) + +[42,5]: + int 530eca864215 <- ( e9876543210 , f5 ) + +[42,4]: + int 298765432105 <- ( e9876543210 , 5 ) + +[42,3]: + int 14c3b2a19085 <- ( e9876543210 , d ) + +[42,2]: + int 0a61d950c841 <- ( e9876543210 , 1 ) + +[42,1]: + int 530eca86421 <- ( e9876543210 , f ) + +[41,64]: + int 09876543210aaaaaaaa55555555 <- ( 09876543210 , aaaaaaaa55555555 ) + +[41,63]: + int 04c3b2a19082aaaaaaa55555555 <- ( 09876543210 , 2aaaaaaa55555555 ) + +[41,62]: + int 261d950c842aaaaaaa55555555 <- ( 09876543210 , eaaaaaaa55555555 ) + +[41,61]: + int 130eca86420aaaaaaa55555555 <- ( 09876543210 , 0aaaaaaa55555555 ) + +[41,60]: + int 09876543210aaaaaaa55555555 <- ( 09876543210 , aaaaaaa55555555 ) + +[41,59]: + int 04c3b2a19082aaaaaa55555555 <- ( 09876543210 , 2aaaaaa55555555 ) + +[41,58]: + int 261d950c842aaaaaa55555555 <- ( 09876543210 , eaaaaaa55555555 ) + +[41,57]: + int 130eca86420aaaaaa55555555 <- ( 09876543210 , 0aaaaaa55555555 ) + +[41,56]: + int 09876543210aaaaaa55555555 <- ( 09876543210 , aaaaaa55555555 ) + +[41,55]: + int 04c3b2a19082aaaaa55555555 <- ( 09876543210 , 2aaaaa55555555 ) + +[41,54]: + int 261d950c842aaaaa55555555 <- ( 09876543210 , eaaaaa55555555 ) + +[41,53]: + int 130eca86420aaaaa55555555 <- ( 09876543210 , 0aaaaa55555555 ) + +[41,52]: + int 09876543210aaaaa55555555 <- ( 09876543210 , aaaaa55555555 ) + +[41,51]: + int 04c3b2a19082aaaa55555555 <- ( 09876543210 , 2aaaa55555555 ) + +[41,50]: + int 261d950c842aaaa55555555 <- ( 09876543210 , eaaaa55555555 ) + +[41,49]: + int 130eca86420aaaa55555555 <- ( 09876543210 , 0aaaa55555555 ) + +[41,48]: + int 09876543210aaaa55555555 <- ( 09876543210 , aaaa55555555 ) + +[41,47]: + int 04c3b2a19082aaa55555555 <- ( 09876543210 , 2aaa55555555 ) + +[41,46]: + int 261d950c842aaa55555555 <- ( 09876543210 , eaaa55555555 ) + +[41,45]: + int 130eca86420aaa55555555 <- ( 09876543210 , 0aaa55555555 ) + +[41,44]: + int 09876543210aaa55555555 <- ( 09876543210 , aaa55555555 ) + +[41,43]: + int 04c3b2a19082aa55555555 <- ( 09876543210 , 2aa55555555 ) + +[41,42]: + int 261d950c842aa55555555 <- ( 09876543210 , eaa55555555 ) + +[41,41]: + int 130eca86420aa55555555 <- ( 09876543210 , 0aa55555555 ) + +[41,40]: + int 09876543210aa55555555 <- ( 09876543210 , aa55555555 ) + +[41,39]: + int 04c3b2a19082a55555555 <- ( 09876543210 , 2a55555555 ) + +[41,38]: + int 261d950c842a55555555 <- ( 09876543210 , ea55555555 ) + +[41,37]: + int 130eca86420a55555555 <- ( 09876543210 , 0a55555555 ) + +[41,36]: + int 09876543210a55555555 <- ( 09876543210 , a55555555 ) + +[41,35]: + int 04c3b2a1908255555555 <- ( 09876543210 , 255555555 ) + +[41,34]: + int 261d950c84255555555 <- ( 09876543210 , e55555555 ) + +[41,33]: + int 130eca8642055555555 <- ( 09876543210 , 055555555 ) + +[41,32]: + int 0987654321055555555 <- ( 09876543210 , 55555555 ) + +[41,31]: + int 04c3b2a190855555555 <- ( 09876543210 , d5555555 ) + +[41,30]: + int 261d950c8415555555 <- ( 09876543210 , 15555555 ) + +[41,29]: + int 130eca864215555555 <- ( 09876543210 , f5555555 ) + +[41,28]: + int 098765432105555555 <- ( 09876543210 , 5555555 ) + +[41,27]: + int 04c3b2a19085555555 <- ( 09876543210 , d555555 ) + +[41,26]: + int 261d950c841555555 <- ( 09876543210 , 1555555 ) + +[41,25]: + int 130eca86421555555 <- ( 09876543210 , f555555 ) + +[41,24]: + int 09876543210555555 <- ( 09876543210 , 555555 ) + +[41,23]: + int 04c3b2a1908555555 <- ( 09876543210 , d55555 ) + +[41,22]: + int 261d950c84155555 <- ( 09876543210 , 155555 ) + +[41,21]: + int 130eca8642155555 <- ( 09876543210 , f55555 ) + +[41,20]: + int 0987654321055555 <- ( 09876543210 , 55555 ) + +[41,19]: + int 04c3b2a190855555 <- ( 09876543210 , d5555 ) + +[41,18]: + int 261d950c8415555 <- ( 09876543210 , 15555 ) + +[41,17]: + int 130eca864215555 <- ( 09876543210 , f5555 ) + +[41,16]: + int 098765432105555 <- ( 09876543210 , 5555 ) + +[41,15]: + int 04c3b2a19085555 <- ( 09876543210 , d555 ) + +[41,14]: + int 261d950c841555 <- ( 09876543210 , 1555 ) + +[41,13]: + int 130eca86421555 <- ( 09876543210 , f555 ) + +[41,12]: + int 09876543210555 <- ( 09876543210 , 555 ) + +[41,11]: + int 04c3b2a1908555 <- ( 09876543210 , d55 ) + +[41,10]: + int 261d950c84155 <- ( 09876543210 , 155 ) + +[41,9]: + int 130eca8642155 <- ( 09876543210 , f55 ) + +[41,8]: + int 0987654321055 <- ( 09876543210 , 55 ) + +[41,7]: + int 04c3b2a190855 <- ( 09876543210 , d5 ) + +[41,6]: + int 261d950c8415 <- ( 09876543210 , 15 ) + +[41,5]: + int 130eca864215 <- ( 09876543210 , f5 ) + +[41,4]: + int 098765432105 <- ( 09876543210 , 5 ) + +[41,3]: + int 04c3b2a19085 <- ( 09876543210 , d ) + +[41,2]: + int 261d950c841 <- ( 09876543210 , 1 ) + +[41,1]: + int 130eca86421 <- ( 09876543210 , f ) + +[40,64]: + int 09876543210aaaaaaaa55555555 <- ( 9876543210 , aaaaaaaa55555555 ) + +[40,63]: + int 4c3b2a19082aaaaaaa55555555 <- ( 9876543210 , 2aaaaaaa55555555 ) + +[40,62]: + int 261d950c842aaaaaaa55555555 <- ( 9876543210 , eaaaaaaa55555555 ) + +[40,61]: + int 130eca86420aaaaaaa55555555 <- ( 9876543210 , 0aaaaaaa55555555 ) + +[40,60]: + int 09876543210aaaaaaa55555555 <- ( 9876543210 , aaaaaaa55555555 ) + +[40,59]: + int 4c3b2a19082aaaaaa55555555 <- ( 9876543210 , 2aaaaaa55555555 ) + +[40,58]: + int 261d950c842aaaaaa55555555 <- ( 9876543210 , eaaaaaa55555555 ) + +[40,57]: + int 130eca86420aaaaaa55555555 <- ( 9876543210 , 0aaaaaa55555555 ) + +[40,56]: + int 09876543210aaaaaa55555555 <- ( 9876543210 , aaaaaa55555555 ) + +[40,55]: + int 4c3b2a19082aaaaa55555555 <- ( 9876543210 , 2aaaaa55555555 ) + +[40,54]: + int 261d950c842aaaaa55555555 <- ( 9876543210 , eaaaaa55555555 ) + +[40,53]: + int 130eca86420aaaaa55555555 <- ( 9876543210 , 0aaaaa55555555 ) + +[40,52]: + int 09876543210aaaaa55555555 <- ( 9876543210 , aaaaa55555555 ) + +[40,51]: + int 4c3b2a19082aaaa55555555 <- ( 9876543210 , 2aaaa55555555 ) + +[40,50]: + int 261d950c842aaaa55555555 <- ( 9876543210 , eaaaa55555555 ) + +[40,49]: + int 130eca86420aaaa55555555 <- ( 9876543210 , 0aaaa55555555 ) + +[40,48]: + int 09876543210aaaa55555555 <- ( 9876543210 , aaaa55555555 ) + +[40,47]: + int 4c3b2a19082aaa55555555 <- ( 9876543210 , 2aaa55555555 ) + +[40,46]: + int 261d950c842aaa55555555 <- ( 9876543210 , eaaa55555555 ) + +[40,45]: + int 130eca86420aaa55555555 <- ( 9876543210 , 0aaa55555555 ) + +[40,44]: + int 09876543210aaa55555555 <- ( 9876543210 , aaa55555555 ) + +[40,43]: + int 4c3b2a19082aa55555555 <- ( 9876543210 , 2aa55555555 ) + +[40,42]: + int 261d950c842aa55555555 <- ( 9876543210 , eaa55555555 ) + +[40,41]: + int 130eca86420aa55555555 <- ( 9876543210 , 0aa55555555 ) + +[40,40]: + int 09876543210aa55555555 <- ( 9876543210 , aa55555555 ) + +[40,39]: + int 4c3b2a19082a55555555 <- ( 9876543210 , 2a55555555 ) + +[40,38]: + int 261d950c842a55555555 <- ( 9876543210 , ea55555555 ) + +[40,37]: + int 130eca86420a55555555 <- ( 9876543210 , 0a55555555 ) + +[40,36]: + int 09876543210a55555555 <- ( 9876543210 , a55555555 ) + +[40,35]: + int 4c3b2a1908255555555 <- ( 9876543210 , 255555555 ) + +[40,34]: + int 261d950c84255555555 <- ( 9876543210 , e55555555 ) + +[40,33]: + int 130eca8642055555555 <- ( 9876543210 , 055555555 ) + +[40,32]: + int 0987654321055555555 <- ( 9876543210 , 55555555 ) + +[40,31]: + int 4c3b2a190855555555 <- ( 9876543210 , d5555555 ) + +[40,30]: + int 261d950c8415555555 <- ( 9876543210 , 15555555 ) + +[40,29]: + int 130eca864215555555 <- ( 9876543210 , f5555555 ) + +[40,28]: + int 098765432105555555 <- ( 9876543210 , 5555555 ) + +[40,27]: + int 4c3b2a19085555555 <- ( 9876543210 , d555555 ) + +[40,26]: + int 261d950c841555555 <- ( 9876543210 , 1555555 ) + +[40,25]: + int 130eca86421555555 <- ( 9876543210 , f555555 ) + +[40,24]: + int 09876543210555555 <- ( 9876543210 , 555555 ) + +[40,23]: + int 4c3b2a1908555555 <- ( 9876543210 , d55555 ) + +[40,22]: + int 261d950c84155555 <- ( 9876543210 , 155555 ) + +[40,21]: + int 130eca8642155555 <- ( 9876543210 , f55555 ) + +[40,20]: + int 0987654321055555 <- ( 9876543210 , 55555 ) + +[40,19]: + int 4c3b2a190855555 <- ( 9876543210 , d5555 ) + +[40,18]: + int 261d950c8415555 <- ( 9876543210 , 15555 ) + +[40,17]: + int 130eca864215555 <- ( 9876543210 , f5555 ) + +[40,16]: + int 098765432105555 <- ( 9876543210 , 5555 ) + +[40,15]: + int 4c3b2a19085555 <- ( 9876543210 , d555 ) + +[40,14]: + int 261d950c841555 <- ( 9876543210 , 1555 ) + +[40,13]: + int 130eca86421555 <- ( 9876543210 , f555 ) + +[40,12]: + int 09876543210555 <- ( 9876543210 , 555 ) + +[40,11]: + int 4c3b2a1908555 <- ( 9876543210 , d55 ) + +[40,10]: + int 261d950c84155 <- ( 9876543210 , 155 ) + +[40,9]: + int 130eca8642155 <- ( 9876543210 , f55 ) + +[40,8]: + int 0987654321055 <- ( 9876543210 , 55 ) + +[40,7]: + int 4c3b2a190855 <- ( 9876543210 , d5 ) + +[40,6]: + int 261d950c8415 <- ( 9876543210 , 15 ) + +[40,5]: + int 130eca864215 <- ( 9876543210 , f5 ) + +[40,4]: + int 098765432105 <- ( 9876543210 , 5 ) + +[40,3]: + int 4c3b2a19085 <- ( 9876543210 , d ) + +[40,2]: + int 261d950c841 <- ( 9876543210 , 1 ) + +[40,1]: + int 130eca86421 <- ( 9876543210 , f ) + +[39,64]: + int 1876543210aaaaaaaa55555555 <- ( 1876543210 , aaaaaaaa55555555 ) + +[39,63]: + int 0c3b2a19082aaaaaaa55555555 <- ( 1876543210 , 2aaaaaaa55555555 ) + +[39,62]: + int 061d950c842aaaaaaa55555555 <- ( 1876543210 , eaaaaaaa55555555 ) + +[39,61]: + int 030eca86420aaaaaaa55555555 <- ( 1876543210 , 0aaaaaaa55555555 ) + +[39,60]: + int 1876543210aaaaaaa55555555 <- ( 1876543210 , aaaaaaa55555555 ) + +[39,59]: + int 0c3b2a19082aaaaaa55555555 <- ( 1876543210 , 2aaaaaa55555555 ) + +[39,58]: + int 061d950c842aaaaaa55555555 <- ( 1876543210 , eaaaaaa55555555 ) + +[39,57]: + int 030eca86420aaaaaa55555555 <- ( 1876543210 , 0aaaaaa55555555 ) + +[39,56]: + int 1876543210aaaaaa55555555 <- ( 1876543210 , aaaaaa55555555 ) + +[39,55]: + int 0c3b2a19082aaaaa55555555 <- ( 1876543210 , 2aaaaa55555555 ) + +[39,54]: + int 061d950c842aaaaa55555555 <- ( 1876543210 , eaaaaa55555555 ) + +[39,53]: + int 030eca86420aaaaa55555555 <- ( 1876543210 , 0aaaaa55555555 ) + +[39,52]: + int 1876543210aaaaa55555555 <- ( 1876543210 , aaaaa55555555 ) + +[39,51]: + int 0c3b2a19082aaaa55555555 <- ( 1876543210 , 2aaaa55555555 ) + +[39,50]: + int 061d950c842aaaa55555555 <- ( 1876543210 , eaaaa55555555 ) + +[39,49]: + int 030eca86420aaaa55555555 <- ( 1876543210 , 0aaaa55555555 ) + +[39,48]: + int 1876543210aaaa55555555 <- ( 1876543210 , aaaa55555555 ) + +[39,47]: + int 0c3b2a19082aaa55555555 <- ( 1876543210 , 2aaa55555555 ) + +[39,46]: + int 061d950c842aaa55555555 <- ( 1876543210 , eaaa55555555 ) + +[39,45]: + int 030eca86420aaa55555555 <- ( 1876543210 , 0aaa55555555 ) + +[39,44]: + int 1876543210aaa55555555 <- ( 1876543210 , aaa55555555 ) + +[39,43]: + int 0c3b2a19082aa55555555 <- ( 1876543210 , 2aa55555555 ) + +[39,42]: + int 061d950c842aa55555555 <- ( 1876543210 , eaa55555555 ) + +[39,41]: + int 030eca86420aa55555555 <- ( 1876543210 , 0aa55555555 ) + +[39,40]: + int 1876543210aa55555555 <- ( 1876543210 , aa55555555 ) + +[39,39]: + int 0c3b2a19082a55555555 <- ( 1876543210 , 2a55555555 ) + +[39,38]: + int 061d950c842a55555555 <- ( 1876543210 , ea55555555 ) + +[39,37]: + int 030eca86420a55555555 <- ( 1876543210 , 0a55555555 ) + +[39,36]: + int 1876543210a55555555 <- ( 1876543210 , a55555555 ) + +[39,35]: + int 0c3b2a1908255555555 <- ( 1876543210 , 255555555 ) + +[39,34]: + int 061d950c84255555555 <- ( 1876543210 , e55555555 ) + +[39,33]: + int 030eca8642055555555 <- ( 1876543210 , 055555555 ) + +[39,32]: + int 187654321055555555 <- ( 1876543210 , 55555555 ) + +[39,31]: + int 0c3b2a190855555555 <- ( 1876543210 , d5555555 ) + +[39,30]: + int 061d950c8415555555 <- ( 1876543210 , 15555555 ) + +[39,29]: + int 030eca864215555555 <- ( 1876543210 , f5555555 ) + +[39,28]: + int 18765432105555555 <- ( 1876543210 , 5555555 ) + +[39,27]: + int 0c3b2a19085555555 <- ( 1876543210 , d555555 ) + +[39,26]: + int 061d950c841555555 <- ( 1876543210 , 1555555 ) + +[39,25]: + int 030eca86421555555 <- ( 1876543210 , f555555 ) + +[39,24]: + int 1876543210555555 <- ( 1876543210 , 555555 ) + +[39,23]: + int 0c3b2a1908555555 <- ( 1876543210 , d55555 ) + +[39,22]: + int 061d950c84155555 <- ( 1876543210 , 155555 ) + +[39,21]: + int 030eca8642155555 <- ( 1876543210 , f55555 ) + +[39,20]: + int 187654321055555 <- ( 1876543210 , 55555 ) + +[39,19]: + int 0c3b2a190855555 <- ( 1876543210 , d5555 ) + +[39,18]: + int 061d950c8415555 <- ( 1876543210 , 15555 ) + +[39,17]: + int 030eca864215555 <- ( 1876543210 , f5555 ) + +[39,16]: + int 18765432105555 <- ( 1876543210 , 5555 ) + +[39,15]: + int 0c3b2a19085555 <- ( 1876543210 , d555 ) + +[39,14]: + int 061d950c841555 <- ( 1876543210 , 1555 ) + +[39,13]: + int 030eca86421555 <- ( 1876543210 , f555 ) + +[39,12]: + int 1876543210555 <- ( 1876543210 , 555 ) + +[39,11]: + int 0c3b2a1908555 <- ( 1876543210 , d55 ) + +[39,10]: + int 061d950c84155 <- ( 1876543210 , 155 ) + +[39,9]: + int 030eca8642155 <- ( 1876543210 , f55 ) + +[39,8]: + int 187654321055 <- ( 1876543210 , 55 ) + +[39,7]: + int 0c3b2a190855 <- ( 1876543210 , d5 ) + +[39,6]: + int 061d950c8415 <- ( 1876543210 , 15 ) + +[39,5]: + int 030eca864215 <- ( 1876543210 , f5 ) + +[39,4]: + int 18765432105 <- ( 1876543210 , 5 ) + +[39,3]: + int 0c3b2a19085 <- ( 1876543210 , d ) + +[39,2]: + int 061d950c841 <- ( 1876543210 , 1 ) + +[39,1]: + int 030eca86421 <- ( 1876543210 , f ) + +[38,64]: + int 1876543210aaaaaaaa55555555 <- ( 1876543210 , aaaaaaaa55555555 ) + +[38,63]: + int 0c3b2a19082aaaaaaa55555555 <- ( 1876543210 , 2aaaaaaa55555555 ) + +[38,62]: + int 061d950c842aaaaaaa55555555 <- ( 1876543210 , eaaaaaaa55555555 ) + +[38,61]: + int 30eca86420aaaaaaa55555555 <- ( 1876543210 , 0aaaaaaa55555555 ) + +[38,60]: + int 1876543210aaaaaaa55555555 <- ( 1876543210 , aaaaaaa55555555 ) + +[38,59]: + int 0c3b2a19082aaaaaa55555555 <- ( 1876543210 , 2aaaaaa55555555 ) + +[38,58]: + int 061d950c842aaaaaa55555555 <- ( 1876543210 , eaaaaaa55555555 ) + +[38,57]: + int 30eca86420aaaaaa55555555 <- ( 1876543210 , 0aaaaaa55555555 ) + +[38,56]: + int 1876543210aaaaaa55555555 <- ( 1876543210 , aaaaaa55555555 ) + +[38,55]: + int 0c3b2a19082aaaaa55555555 <- ( 1876543210 , 2aaaaa55555555 ) + +[38,54]: + int 061d950c842aaaaa55555555 <- ( 1876543210 , eaaaaa55555555 ) + +[38,53]: + int 30eca86420aaaaa55555555 <- ( 1876543210 , 0aaaaa55555555 ) + +[38,52]: + int 1876543210aaaaa55555555 <- ( 1876543210 , aaaaa55555555 ) + +[38,51]: + int 0c3b2a19082aaaa55555555 <- ( 1876543210 , 2aaaa55555555 ) + +[38,50]: + int 061d950c842aaaa55555555 <- ( 1876543210 , eaaaa55555555 ) + +[38,49]: + int 30eca86420aaaa55555555 <- ( 1876543210 , 0aaaa55555555 ) + +[38,48]: + int 1876543210aaaa55555555 <- ( 1876543210 , aaaa55555555 ) + +[38,47]: + int 0c3b2a19082aaa55555555 <- ( 1876543210 , 2aaa55555555 ) + +[38,46]: + int 061d950c842aaa55555555 <- ( 1876543210 , eaaa55555555 ) + +[38,45]: + int 30eca86420aaa55555555 <- ( 1876543210 , 0aaa55555555 ) + +[38,44]: + int 1876543210aaa55555555 <- ( 1876543210 , aaa55555555 ) + +[38,43]: + int 0c3b2a19082aa55555555 <- ( 1876543210 , 2aa55555555 ) + +[38,42]: + int 061d950c842aa55555555 <- ( 1876543210 , eaa55555555 ) + +[38,41]: + int 30eca86420aa55555555 <- ( 1876543210 , 0aa55555555 ) + +[38,40]: + int 1876543210aa55555555 <- ( 1876543210 , aa55555555 ) + +[38,39]: + int 0c3b2a19082a55555555 <- ( 1876543210 , 2a55555555 ) + +[38,38]: + int 061d950c842a55555555 <- ( 1876543210 , ea55555555 ) + +[38,37]: + int 30eca86420a55555555 <- ( 1876543210 , 0a55555555 ) + +[38,36]: + int 1876543210a55555555 <- ( 1876543210 , a55555555 ) + +[38,35]: + int 0c3b2a1908255555555 <- ( 1876543210 , 255555555 ) + +[38,34]: + int 061d950c84255555555 <- ( 1876543210 , e55555555 ) + +[38,33]: + int 30eca8642055555555 <- ( 1876543210 , 055555555 ) + +[38,32]: + int 187654321055555555 <- ( 1876543210 , 55555555 ) + +[38,31]: + int 0c3b2a190855555555 <- ( 1876543210 , d5555555 ) + +[38,30]: + int 061d950c8415555555 <- ( 1876543210 , 15555555 ) + +[38,29]: + int 30eca864215555555 <- ( 1876543210 , f5555555 ) + +[38,28]: + int 18765432105555555 <- ( 1876543210 , 5555555 ) + +[38,27]: + int 0c3b2a19085555555 <- ( 1876543210 , d555555 ) + +[38,26]: + int 061d950c841555555 <- ( 1876543210 , 1555555 ) + +[38,25]: + int 30eca86421555555 <- ( 1876543210 , f555555 ) + +[38,24]: + int 1876543210555555 <- ( 1876543210 , 555555 ) + +[38,23]: + int 0c3b2a1908555555 <- ( 1876543210 , d55555 ) + +[38,22]: + int 061d950c84155555 <- ( 1876543210 , 155555 ) + +[38,21]: + int 30eca8642155555 <- ( 1876543210 , f55555 ) + +[38,20]: + int 187654321055555 <- ( 1876543210 , 55555 ) + +[38,19]: + int 0c3b2a190855555 <- ( 1876543210 , d5555 ) + +[38,18]: + int 061d950c8415555 <- ( 1876543210 , 15555 ) + +[38,17]: + int 30eca864215555 <- ( 1876543210 , f5555 ) + +[38,16]: + int 18765432105555 <- ( 1876543210 , 5555 ) + +[38,15]: + int 0c3b2a19085555 <- ( 1876543210 , d555 ) + +[38,14]: + int 061d950c841555 <- ( 1876543210 , 1555 ) + +[38,13]: + int 30eca86421555 <- ( 1876543210 , f555 ) + +[38,12]: + int 1876543210555 <- ( 1876543210 , 555 ) + +[38,11]: + int 0c3b2a1908555 <- ( 1876543210 , d55 ) + +[38,10]: + int 061d950c84155 <- ( 1876543210 , 155 ) + +[38,9]: + int 30eca8642155 <- ( 1876543210 , f55 ) + +[38,8]: + int 187654321055 <- ( 1876543210 , 55 ) + +[38,7]: + int 0c3b2a190855 <- ( 1876543210 , d5 ) + +[38,6]: + int 061d950c8415 <- ( 1876543210 , 15 ) + +[38,5]: + int 30eca864215 <- ( 1876543210 , f5 ) + +[38,4]: + int 18765432105 <- ( 1876543210 , 5 ) + +[38,3]: + int 0c3b2a19085 <- ( 1876543210 , d ) + +[38,2]: + int 061d950c841 <- ( 1876543210 , 1 ) + +[38,1]: + int 30eca86421 <- ( 1876543210 , f ) + +[37,64]: + int 1876543210aaaaaaaa55555555 <- ( f876543210 , aaaaaaaa55555555 ) + +[37,63]: + int 0c3b2a19082aaaaaaa55555555 <- ( f876543210 , 2aaaaaaa55555555 ) + +[37,62]: + int 61d950c842aaaaaaa55555555 <- ( f876543210 , eaaaaaaa55555555 ) + +[37,61]: + int 30eca86420aaaaaaa55555555 <- ( f876543210 , 0aaaaaaa55555555 ) + +[37,60]: + int 1876543210aaaaaaa55555555 <- ( f876543210 , aaaaaaa55555555 ) + +[37,59]: + int 0c3b2a19082aaaaaa55555555 <- ( f876543210 , 2aaaaaa55555555 ) + +[37,58]: + int 61d950c842aaaaaa55555555 <- ( f876543210 , eaaaaaa55555555 ) + +[37,57]: + int 30eca86420aaaaaa55555555 <- ( f876543210 , 0aaaaaa55555555 ) + +[37,56]: + int 1876543210aaaaaa55555555 <- ( f876543210 , aaaaaa55555555 ) + +[37,55]: + int 0c3b2a19082aaaaa55555555 <- ( f876543210 , 2aaaaa55555555 ) + +[37,54]: + int 61d950c842aaaaa55555555 <- ( f876543210 , eaaaaa55555555 ) + +[37,53]: + int 30eca86420aaaaa55555555 <- ( f876543210 , 0aaaaa55555555 ) + +[37,52]: + int 1876543210aaaaa55555555 <- ( f876543210 , aaaaa55555555 ) + +[37,51]: + int 0c3b2a19082aaaa55555555 <- ( f876543210 , 2aaaa55555555 ) + +[37,50]: + int 61d950c842aaaa55555555 <- ( f876543210 , eaaaa55555555 ) + +[37,49]: + int 30eca86420aaaa55555555 <- ( f876543210 , 0aaaa55555555 ) + +[37,48]: + int 1876543210aaaa55555555 <- ( f876543210 , aaaa55555555 ) + +[37,47]: + int 0c3b2a19082aaa55555555 <- ( f876543210 , 2aaa55555555 ) + +[37,46]: + int 61d950c842aaa55555555 <- ( f876543210 , eaaa55555555 ) + +[37,45]: + int 30eca86420aaa55555555 <- ( f876543210 , 0aaa55555555 ) + +[37,44]: + int 1876543210aaa55555555 <- ( f876543210 , aaa55555555 ) + +[37,43]: + int 0c3b2a19082aa55555555 <- ( f876543210 , 2aa55555555 ) + +[37,42]: + int 61d950c842aa55555555 <- ( f876543210 , eaa55555555 ) + +[37,41]: + int 30eca86420aa55555555 <- ( f876543210 , 0aa55555555 ) + +[37,40]: + int 1876543210aa55555555 <- ( f876543210 , aa55555555 ) + +[37,39]: + int 0c3b2a19082a55555555 <- ( f876543210 , 2a55555555 ) + +[37,38]: + int 61d950c842a55555555 <- ( f876543210 , ea55555555 ) + +[37,37]: + int 30eca86420a55555555 <- ( f876543210 , 0a55555555 ) + +[37,36]: + int 1876543210a55555555 <- ( f876543210 , a55555555 ) + +[37,35]: + int 0c3b2a1908255555555 <- ( f876543210 , 255555555 ) + +[37,34]: + int 61d950c84255555555 <- ( f876543210 , e55555555 ) + +[37,33]: + int 30eca8642055555555 <- ( f876543210 , 055555555 ) + +[37,32]: + int 187654321055555555 <- ( f876543210 , 55555555 ) + +[37,31]: + int 0c3b2a190855555555 <- ( f876543210 , d5555555 ) + +[37,30]: + int 61d950c8415555555 <- ( f876543210 , 15555555 ) + +[37,29]: + int 30eca864215555555 <- ( f876543210 , f5555555 ) + +[37,28]: + int 18765432105555555 <- ( f876543210 , 5555555 ) + +[37,27]: + int 0c3b2a19085555555 <- ( f876543210 , d555555 ) + +[37,26]: + int 61d950c841555555 <- ( f876543210 , 1555555 ) + +[37,25]: + int 30eca86421555555 <- ( f876543210 , f555555 ) + +[37,24]: + int 1876543210555555 <- ( f876543210 , 555555 ) + +[37,23]: + int 0c3b2a1908555555 <- ( f876543210 , d55555 ) + +[37,22]: + int 61d950c84155555 <- ( f876543210 , 155555 ) + +[37,21]: + int 30eca8642155555 <- ( f876543210 , f55555 ) + +[37,20]: + int 187654321055555 <- ( f876543210 , 55555 ) + +[37,19]: + int 0c3b2a190855555 <- ( f876543210 , d5555 ) + +[37,18]: + int 61d950c8415555 <- ( f876543210 , 15555 ) + +[37,17]: + int 30eca864215555 <- ( f876543210 , f5555 ) + +[37,16]: + int 18765432105555 <- ( f876543210 , 5555 ) + +[37,15]: + int 0c3b2a19085555 <- ( f876543210 , d555 ) + +[37,14]: + int 61d950c841555 <- ( f876543210 , 1555 ) + +[37,13]: + int 30eca86421555 <- ( f876543210 , f555 ) + +[37,12]: + int 1876543210555 <- ( f876543210 , 555 ) + +[37,11]: + int 0c3b2a1908555 <- ( f876543210 , d55 ) + +[37,10]: + int 61d950c84155 <- ( f876543210 , 155 ) + +[37,9]: + int 30eca8642155 <- ( f876543210 , f55 ) + +[37,8]: + int 187654321055 <- ( f876543210 , 55 ) + +[37,7]: + int 0c3b2a190855 <- ( f876543210 , d5 ) + +[37,6]: + int 61d950c8415 <- ( f876543210 , 15 ) + +[37,5]: + int 30eca864215 <- ( f876543210 , f5 ) + +[37,4]: + int 18765432105 <- ( f876543210 , 5 ) + +[37,3]: + int 0c3b2a19085 <- ( f876543210 , d ) + +[37,2]: + int 61d950c841 <- ( f876543210 , 1 ) + +[37,1]: + int 30eca86421 <- ( f876543210 , f ) + +[36,64]: + int 0876543210aaaaaaaa55555555 <- ( 876543210 , aaaaaaaa55555555 ) + +[36,63]: + int 43b2a19082aaaaaaa55555555 <- ( 876543210 , 2aaaaaaa55555555 ) + +[36,62]: + int 21d950c842aaaaaaa55555555 <- ( 876543210 , eaaaaaaa55555555 ) + +[36,61]: + int 10eca86420aaaaaaa55555555 <- ( 876543210 , 0aaaaaaa55555555 ) + +[36,60]: + int 0876543210aaaaaaa55555555 <- ( 876543210 , aaaaaaa55555555 ) + +[36,59]: + int 43b2a19082aaaaaa55555555 <- ( 876543210 , 2aaaaaa55555555 ) + +[36,58]: + int 21d950c842aaaaaa55555555 <- ( 876543210 , eaaaaaa55555555 ) + +[36,57]: + int 10eca86420aaaaaa55555555 <- ( 876543210 , 0aaaaaa55555555 ) + +[36,56]: + int 0876543210aaaaaa55555555 <- ( 876543210 , aaaaaa55555555 ) + +[36,55]: + int 43b2a19082aaaaa55555555 <- ( 876543210 , 2aaaaa55555555 ) + +[36,54]: + int 21d950c842aaaaa55555555 <- ( 876543210 , eaaaaa55555555 ) + +[36,53]: + int 10eca86420aaaaa55555555 <- ( 876543210 , 0aaaaa55555555 ) + +[36,52]: + int 0876543210aaaaa55555555 <- ( 876543210 , aaaaa55555555 ) + +[36,51]: + int 43b2a19082aaaa55555555 <- ( 876543210 , 2aaaa55555555 ) + +[36,50]: + int 21d950c842aaaa55555555 <- ( 876543210 , eaaaa55555555 ) + +[36,49]: + int 10eca86420aaaa55555555 <- ( 876543210 , 0aaaa55555555 ) + +[36,48]: + int 0876543210aaaa55555555 <- ( 876543210 , aaaa55555555 ) + +[36,47]: + int 43b2a19082aaa55555555 <- ( 876543210 , 2aaa55555555 ) + +[36,46]: + int 21d950c842aaa55555555 <- ( 876543210 , eaaa55555555 ) + +[36,45]: + int 10eca86420aaa55555555 <- ( 876543210 , 0aaa55555555 ) + +[36,44]: + int 0876543210aaa55555555 <- ( 876543210 , aaa55555555 ) + +[36,43]: + int 43b2a19082aa55555555 <- ( 876543210 , 2aa55555555 ) + +[36,42]: + int 21d950c842aa55555555 <- ( 876543210 , eaa55555555 ) + +[36,41]: + int 10eca86420aa55555555 <- ( 876543210 , 0aa55555555 ) + +[36,40]: + int 0876543210aa55555555 <- ( 876543210 , aa55555555 ) + +[36,39]: + int 43b2a19082a55555555 <- ( 876543210 , 2a55555555 ) + +[36,38]: + int 21d950c842a55555555 <- ( 876543210 , ea55555555 ) + +[36,37]: + int 10eca86420a55555555 <- ( 876543210 , 0a55555555 ) + +[36,36]: + int 0876543210a55555555 <- ( 876543210 , a55555555 ) + +[36,35]: + int 43b2a1908255555555 <- ( 876543210 , 255555555 ) + +[36,34]: + int 21d950c84255555555 <- ( 876543210 , e55555555 ) + +[36,33]: + int 10eca8642055555555 <- ( 876543210 , 055555555 ) + +[36,32]: + int 087654321055555555 <- ( 876543210 , 55555555 ) + +[36,31]: + int 43b2a190855555555 <- ( 876543210 , d5555555 ) + +[36,30]: + int 21d950c8415555555 <- ( 876543210 , 15555555 ) + +[36,29]: + int 10eca864215555555 <- ( 876543210 , f5555555 ) + +[36,28]: + int 08765432105555555 <- ( 876543210 , 5555555 ) + +[36,27]: + int 43b2a19085555555 <- ( 876543210 , d555555 ) + +[36,26]: + int 21d950c841555555 <- ( 876543210 , 1555555 ) + +[36,25]: + int 10eca86421555555 <- ( 876543210 , f555555 ) + +[36,24]: + int 0876543210555555 <- ( 876543210 , 555555 ) + +[36,23]: + int 43b2a1908555555 <- ( 876543210 , d55555 ) + +[36,22]: + int 21d950c84155555 <- ( 876543210 , 155555 ) + +[36,21]: + int 10eca8642155555 <- ( 876543210 , f55555 ) + +[36,20]: + int 087654321055555 <- ( 876543210 , 55555 ) + +[36,19]: + int 43b2a190855555 <- ( 876543210 , d5555 ) + +[36,18]: + int 21d950c8415555 <- ( 876543210 , 15555 ) + +[36,17]: + int 10eca864215555 <- ( 876543210 , f5555 ) + +[36,16]: + int 08765432105555 <- ( 876543210 , 5555 ) + +[36,15]: + int 43b2a19085555 <- ( 876543210 , d555 ) + +[36,14]: + int 21d950c841555 <- ( 876543210 , 1555 ) + +[36,13]: + int 10eca86421555 <- ( 876543210 , f555 ) + +[36,12]: + int 0876543210555 <- ( 876543210 , 555 ) + +[36,11]: + int 43b2a1908555 <- ( 876543210 , d55 ) + +[36,10]: + int 21d950c84155 <- ( 876543210 , 155 ) + +[36,9]: + int 10eca8642155 <- ( 876543210 , f55 ) + +[36,8]: + int 087654321055 <- ( 876543210 , 55 ) + +[36,7]: + int 43b2a190855 <- ( 876543210 , d5 ) + +[36,6]: + int 21d950c8415 <- ( 876543210 , 15 ) + +[36,5]: + int 10eca864215 <- ( 876543210 , f5 ) + +[36,4]: + int 08765432105 <- ( 876543210 , 5 ) + +[36,3]: + int 43b2a19085 <- ( 876543210 , d ) + +[36,2]: + int 21d950c841 <- ( 876543210 , 1 ) + +[36,1]: + int 10eca86421 <- ( 876543210 , f ) + +[35,64]: + int 076543210aaaaaaaa55555555 <- ( 076543210 , aaaaaaaa55555555 ) + +[35,63]: + int 03b2a19082aaaaaaa55555555 <- ( 076543210 , 2aaaaaaa55555555 ) + +[35,62]: + int 01d950c842aaaaaaa55555555 <- ( 076543210 , eaaaaaaa55555555 ) + +[35,61]: + int 00eca86420aaaaaaa55555555 <- ( 076543210 , 0aaaaaaa55555555 ) + +[35,60]: + int 076543210aaaaaaa55555555 <- ( 076543210 , aaaaaaa55555555 ) + +[35,59]: + int 03b2a19082aaaaaa55555555 <- ( 076543210 , 2aaaaaa55555555 ) + +[35,58]: + int 01d950c842aaaaaa55555555 <- ( 076543210 , eaaaaaa55555555 ) + +[35,57]: + int 00eca86420aaaaaa55555555 <- ( 076543210 , 0aaaaaa55555555 ) + +[35,56]: + int 076543210aaaaaa55555555 <- ( 076543210 , aaaaaa55555555 ) + +[35,55]: + int 03b2a19082aaaaa55555555 <- ( 076543210 , 2aaaaa55555555 ) + +[35,54]: + int 01d950c842aaaaa55555555 <- ( 076543210 , eaaaaa55555555 ) + +[35,53]: + int 00eca86420aaaaa55555555 <- ( 076543210 , 0aaaaa55555555 ) + +[35,52]: + int 076543210aaaaa55555555 <- ( 076543210 , aaaaa55555555 ) + +[35,51]: + int 03b2a19082aaaa55555555 <- ( 076543210 , 2aaaa55555555 ) + +[35,50]: + int 01d950c842aaaa55555555 <- ( 076543210 , eaaaa55555555 ) + +[35,49]: + int 00eca86420aaaa55555555 <- ( 076543210 , 0aaaa55555555 ) + +[35,48]: + int 076543210aaaa55555555 <- ( 076543210 , aaaa55555555 ) + +[35,47]: + int 03b2a19082aaa55555555 <- ( 076543210 , 2aaa55555555 ) + +[35,46]: + int 01d950c842aaa55555555 <- ( 076543210 , eaaa55555555 ) + +[35,45]: + int 00eca86420aaa55555555 <- ( 076543210 , 0aaa55555555 ) + +[35,44]: + int 076543210aaa55555555 <- ( 076543210 , aaa55555555 ) + +[35,43]: + int 03b2a19082aa55555555 <- ( 076543210 , 2aa55555555 ) + +[35,42]: + int 01d950c842aa55555555 <- ( 076543210 , eaa55555555 ) + +[35,41]: + int 00eca86420aa55555555 <- ( 076543210 , 0aa55555555 ) + +[35,40]: + int 076543210aa55555555 <- ( 076543210 , aa55555555 ) + +[35,39]: + int 03b2a19082a55555555 <- ( 076543210 , 2a55555555 ) + +[35,38]: + int 01d950c842a55555555 <- ( 076543210 , ea55555555 ) + +[35,37]: + int 00eca86420a55555555 <- ( 076543210 , 0a55555555 ) + +[35,36]: + int 076543210a55555555 <- ( 076543210 , a55555555 ) + +[35,35]: + int 03b2a1908255555555 <- ( 076543210 , 255555555 ) + +[35,34]: + int 01d950c84255555555 <- ( 076543210 , e55555555 ) + +[35,33]: + int 00eca8642055555555 <- ( 076543210 , 055555555 ) + +[35,32]: + int 07654321055555555 <- ( 076543210 , 55555555 ) + +[35,31]: + int 03b2a190855555555 <- ( 076543210 , d5555555 ) + +[35,30]: + int 01d950c8415555555 <- ( 076543210 , 15555555 ) + +[35,29]: + int 00eca864215555555 <- ( 076543210 , f5555555 ) + +[35,28]: + int 0765432105555555 <- ( 076543210 , 5555555 ) + +[35,27]: + int 03b2a19085555555 <- ( 076543210 , d555555 ) + +[35,26]: + int 01d950c841555555 <- ( 076543210 , 1555555 ) + +[35,25]: + int 00eca86421555555 <- ( 076543210 , f555555 ) + +[35,24]: + int 076543210555555 <- ( 076543210 , 555555 ) + +[35,23]: + int 03b2a1908555555 <- ( 076543210 , d55555 ) + +[35,22]: + int 01d950c84155555 <- ( 076543210 , 155555 ) + +[35,21]: + int 00eca8642155555 <- ( 076543210 , f55555 ) + +[35,20]: + int 07654321055555 <- ( 076543210 , 55555 ) + +[35,19]: + int 03b2a190855555 <- ( 076543210 , d5555 ) + +[35,18]: + int 01d950c8415555 <- ( 076543210 , 15555 ) + +[35,17]: + int 00eca864215555 <- ( 076543210 , f5555 ) + +[35,16]: + int 0765432105555 <- ( 076543210 , 5555 ) + +[35,15]: + int 03b2a19085555 <- ( 076543210 , d555 ) + +[35,14]: + int 01d950c841555 <- ( 076543210 , 1555 ) + +[35,13]: + int 00eca86421555 <- ( 076543210 , f555 ) + +[35,12]: + int 076543210555 <- ( 076543210 , 555 ) + +[35,11]: + int 03b2a1908555 <- ( 076543210 , d55 ) + +[35,10]: + int 01d950c84155 <- ( 076543210 , 155 ) + +[35,9]: + int 00eca8642155 <- ( 076543210 , f55 ) + +[35,8]: + int 07654321055 <- ( 076543210 , 55 ) + +[35,7]: + int 03b2a190855 <- ( 076543210 , d5 ) + +[35,6]: + int 01d950c8415 <- ( 076543210 , 15 ) + +[35,5]: + int 00eca864215 <- ( 076543210 , f5 ) + +[35,4]: + int 0765432105 <- ( 076543210 , 5 ) + +[35,3]: + int 03b2a19085 <- ( 076543210 , d ) + +[35,2]: + int 01d950c841 <- ( 076543210 , 1 ) + +[35,1]: + int 00eca86421 <- ( 076543210 , f ) + +[34,64]: + int 076543210aaaaaaaa55555555 <- ( 076543210 , aaaaaaaa55555555 ) + +[34,63]: + int 03b2a19082aaaaaaa55555555 <- ( 076543210 , 2aaaaaaa55555555 ) + +[34,62]: + int 01d950c842aaaaaaa55555555 <- ( 076543210 , eaaaaaaa55555555 ) + +[34,61]: + int 0eca86420aaaaaaa55555555 <- ( 076543210 , 0aaaaaaa55555555 ) + +[34,60]: + int 076543210aaaaaaa55555555 <- ( 076543210 , aaaaaaa55555555 ) + +[34,59]: + int 03b2a19082aaaaaa55555555 <- ( 076543210 , 2aaaaaa55555555 ) + +[34,58]: + int 01d950c842aaaaaa55555555 <- ( 076543210 , eaaaaaa55555555 ) + +[34,57]: + int 0eca86420aaaaaa55555555 <- ( 076543210 , 0aaaaaa55555555 ) + +[34,56]: + int 076543210aaaaaa55555555 <- ( 076543210 , aaaaaa55555555 ) + +[34,55]: + int 03b2a19082aaaaa55555555 <- ( 076543210 , 2aaaaa55555555 ) + +[34,54]: + int 01d950c842aaaaa55555555 <- ( 076543210 , eaaaaa55555555 ) + +[34,53]: + int 0eca86420aaaaa55555555 <- ( 076543210 , 0aaaaa55555555 ) + +[34,52]: + int 076543210aaaaa55555555 <- ( 076543210 , aaaaa55555555 ) + +[34,51]: + int 03b2a19082aaaa55555555 <- ( 076543210 , 2aaaa55555555 ) + +[34,50]: + int 01d950c842aaaa55555555 <- ( 076543210 , eaaaa55555555 ) + +[34,49]: + int 0eca86420aaaa55555555 <- ( 076543210 , 0aaaa55555555 ) + +[34,48]: + int 076543210aaaa55555555 <- ( 076543210 , aaaa55555555 ) + +[34,47]: + int 03b2a19082aaa55555555 <- ( 076543210 , 2aaa55555555 ) + +[34,46]: + int 01d950c842aaa55555555 <- ( 076543210 , eaaa55555555 ) + +[34,45]: + int 0eca86420aaa55555555 <- ( 076543210 , 0aaa55555555 ) + +[34,44]: + int 076543210aaa55555555 <- ( 076543210 , aaa55555555 ) + +[34,43]: + int 03b2a19082aa55555555 <- ( 076543210 , 2aa55555555 ) + +[34,42]: + int 01d950c842aa55555555 <- ( 076543210 , eaa55555555 ) + +[34,41]: + int 0eca86420aa55555555 <- ( 076543210 , 0aa55555555 ) + +[34,40]: + int 076543210aa55555555 <- ( 076543210 , aa55555555 ) + +[34,39]: + int 03b2a19082a55555555 <- ( 076543210 , 2a55555555 ) + +[34,38]: + int 01d950c842a55555555 <- ( 076543210 , ea55555555 ) + +[34,37]: + int 0eca86420a55555555 <- ( 076543210 , 0a55555555 ) + +[34,36]: + int 076543210a55555555 <- ( 076543210 , a55555555 ) + +[34,35]: + int 03b2a1908255555555 <- ( 076543210 , 255555555 ) + +[34,34]: + int 01d950c84255555555 <- ( 076543210 , e55555555 ) + +[34,33]: + int 0eca8642055555555 <- ( 076543210 , 055555555 ) + +[34,32]: + int 07654321055555555 <- ( 076543210 , 55555555 ) + +[34,31]: + int 03b2a190855555555 <- ( 076543210 , d5555555 ) + +[34,30]: + int 01d950c8415555555 <- ( 076543210 , 15555555 ) + +[34,29]: + int 0eca864215555555 <- ( 076543210 , f5555555 ) + +[34,28]: + int 0765432105555555 <- ( 076543210 , 5555555 ) + +[34,27]: + int 03b2a19085555555 <- ( 076543210 , d555555 ) + +[34,26]: + int 01d950c841555555 <- ( 076543210 , 1555555 ) + +[34,25]: + int 0eca86421555555 <- ( 076543210 , f555555 ) + +[34,24]: + int 076543210555555 <- ( 076543210 , 555555 ) + +[34,23]: + int 03b2a1908555555 <- ( 076543210 , d55555 ) + +[34,22]: + int 01d950c84155555 <- ( 076543210 , 155555 ) + +[34,21]: + int 0eca8642155555 <- ( 076543210 , f55555 ) + +[34,20]: + int 07654321055555 <- ( 076543210 , 55555 ) + +[34,19]: + int 03b2a190855555 <- ( 076543210 , d5555 ) + +[34,18]: + int 01d950c8415555 <- ( 076543210 , 15555 ) + +[34,17]: + int 0eca864215555 <- ( 076543210 , f5555 ) + +[34,16]: + int 0765432105555 <- ( 076543210 , 5555 ) + +[34,15]: + int 03b2a19085555 <- ( 076543210 , d555 ) + +[34,14]: + int 01d950c841555 <- ( 076543210 , 1555 ) + +[34,13]: + int 0eca86421555 <- ( 076543210 , f555 ) + +[34,12]: + int 076543210555 <- ( 076543210 , 555 ) + +[34,11]: + int 03b2a1908555 <- ( 076543210 , d55 ) + +[34,10]: + int 01d950c84155 <- ( 076543210 , 155 ) + +[34,9]: + int 0eca8642155 <- ( 076543210 , f55 ) + +[34,8]: + int 07654321055 <- ( 076543210 , 55 ) + +[34,7]: + int 03b2a190855 <- ( 076543210 , d5 ) + +[34,6]: + int 01d950c8415 <- ( 076543210 , 15 ) + +[34,5]: + int 0eca864215 <- ( 076543210 , f5 ) + +[34,4]: + int 0765432105 <- ( 076543210 , 5 ) + +[34,3]: + int 03b2a19085 <- ( 076543210 , d ) + +[34,2]: + int 01d950c841 <- ( 076543210 , 1 ) + +[34,1]: + int 0eca86421 <- ( 076543210 , f ) + +[33,64]: + int 076543210aaaaaaaa55555555 <- ( 076543210 , aaaaaaaa55555555 ) + +[33,63]: + int 03b2a19082aaaaaaa55555555 <- ( 076543210 , 2aaaaaaa55555555 ) + +[33,62]: + int 1d950c842aaaaaaa55555555 <- ( 076543210 , eaaaaaaa55555555 ) + +[33,61]: + int 0eca86420aaaaaaa55555555 <- ( 076543210 , 0aaaaaaa55555555 ) + +[33,60]: + int 076543210aaaaaaa55555555 <- ( 076543210 , aaaaaaa55555555 ) + +[33,59]: + int 03b2a19082aaaaaa55555555 <- ( 076543210 , 2aaaaaa55555555 ) + +[33,58]: + int 1d950c842aaaaaa55555555 <- ( 076543210 , eaaaaaa55555555 ) + +[33,57]: + int 0eca86420aaaaaa55555555 <- ( 076543210 , 0aaaaaa55555555 ) + +[33,56]: + int 076543210aaaaaa55555555 <- ( 076543210 , aaaaaa55555555 ) + +[33,55]: + int 03b2a19082aaaaa55555555 <- ( 076543210 , 2aaaaa55555555 ) + +[33,54]: + int 1d950c842aaaaa55555555 <- ( 076543210 , eaaaaa55555555 ) + +[33,53]: + int 0eca86420aaaaa55555555 <- ( 076543210 , 0aaaaa55555555 ) + +[33,52]: + int 076543210aaaaa55555555 <- ( 076543210 , aaaaa55555555 ) + +[33,51]: + int 03b2a19082aaaa55555555 <- ( 076543210 , 2aaaa55555555 ) + +[33,50]: + int 1d950c842aaaa55555555 <- ( 076543210 , eaaaa55555555 ) + +[33,49]: + int 0eca86420aaaa55555555 <- ( 076543210 , 0aaaa55555555 ) + +[33,48]: + int 076543210aaaa55555555 <- ( 076543210 , aaaa55555555 ) + +[33,47]: + int 03b2a19082aaa55555555 <- ( 076543210 , 2aaa55555555 ) + +[33,46]: + int 1d950c842aaa55555555 <- ( 076543210 , eaaa55555555 ) + +[33,45]: + int 0eca86420aaa55555555 <- ( 076543210 , 0aaa55555555 ) + +[33,44]: + int 076543210aaa55555555 <- ( 076543210 , aaa55555555 ) + +[33,43]: + int 03b2a19082aa55555555 <- ( 076543210 , 2aa55555555 ) + +[33,42]: + int 1d950c842aa55555555 <- ( 076543210 , eaa55555555 ) + +[33,41]: + int 0eca86420aa55555555 <- ( 076543210 , 0aa55555555 ) + +[33,40]: + int 076543210aa55555555 <- ( 076543210 , aa55555555 ) + +[33,39]: + int 03b2a19082a55555555 <- ( 076543210 , 2a55555555 ) + +[33,38]: + int 1d950c842a55555555 <- ( 076543210 , ea55555555 ) + +[33,37]: + int 0eca86420a55555555 <- ( 076543210 , 0a55555555 ) + +[33,36]: + int 076543210a55555555 <- ( 076543210 , a55555555 ) + +[33,35]: + int 03b2a1908255555555 <- ( 076543210 , 255555555 ) + +[33,34]: + int 1d950c84255555555 <- ( 076543210 , e55555555 ) + +[33,33]: + int 0eca8642055555555 <- ( 076543210 , 055555555 ) + +[33,32]: + int 07654321055555555 <- ( 076543210 , 55555555 ) + +[33,31]: + int 03b2a190855555555 <- ( 076543210 , d5555555 ) + +[33,30]: + int 1d950c8415555555 <- ( 076543210 , 15555555 ) + +[33,29]: + int 0eca864215555555 <- ( 076543210 , f5555555 ) + +[33,28]: + int 0765432105555555 <- ( 076543210 , 5555555 ) + +[33,27]: + int 03b2a19085555555 <- ( 076543210 , d555555 ) + +[33,26]: + int 1d950c841555555 <- ( 076543210 , 1555555 ) + +[33,25]: + int 0eca86421555555 <- ( 076543210 , f555555 ) + +[33,24]: + int 076543210555555 <- ( 076543210 , 555555 ) + +[33,23]: + int 03b2a1908555555 <- ( 076543210 , d55555 ) + +[33,22]: + int 1d950c84155555 <- ( 076543210 , 155555 ) + +[33,21]: + int 0eca8642155555 <- ( 076543210 , f55555 ) + +[33,20]: + int 07654321055555 <- ( 076543210 , 55555 ) + +[33,19]: + int 03b2a190855555 <- ( 076543210 , d5555 ) + +[33,18]: + int 1d950c8415555 <- ( 076543210 , 15555 ) + +[33,17]: + int 0eca864215555 <- ( 076543210 , f5555 ) + +[33,16]: + int 0765432105555 <- ( 076543210 , 5555 ) + +[33,15]: + int 03b2a19085555 <- ( 076543210 , d555 ) + +[33,14]: + int 1d950c841555 <- ( 076543210 , 1555 ) + +[33,13]: + int 0eca86421555 <- ( 076543210 , f555 ) + +[33,12]: + int 076543210555 <- ( 076543210 , 555 ) + +[33,11]: + int 03b2a1908555 <- ( 076543210 , d55 ) + +[33,10]: + int 1d950c84155 <- ( 076543210 , 155 ) + +[33,9]: + int 0eca8642155 <- ( 076543210 , f55 ) + +[33,8]: + int 07654321055 <- ( 076543210 , 55 ) + +[33,7]: + int 03b2a190855 <- ( 076543210 , d5 ) + +[33,6]: + int 1d950c8415 <- ( 076543210 , 15 ) + +[33,5]: + int 0eca864215 <- ( 076543210 , f5 ) + +[33,4]: + int 0765432105 <- ( 076543210 , 5 ) + +[33,3]: + int 03b2a19085 <- ( 076543210 , d ) + +[33,2]: + int 1d950c841 <- ( 076543210 , 1 ) + +[33,1]: + int 0eca86421 <- ( 076543210 , f ) + +[32,64]: + int 076543210aaaaaaaa55555555 <- ( 76543210 , aaaaaaaa55555555 ) + +[32,63]: + int 3b2a19082aaaaaaa55555555 <- ( 76543210 , 2aaaaaaa55555555 ) + +[32,62]: + int 1d950c842aaaaaaa55555555 <- ( 76543210 , eaaaaaaa55555555 ) + +[32,61]: + int 0eca86420aaaaaaa55555555 <- ( 76543210 , 0aaaaaaa55555555 ) + +[32,60]: + int 076543210aaaaaaa55555555 <- ( 76543210 , aaaaaaa55555555 ) + +[32,59]: + int 3b2a19082aaaaaa55555555 <- ( 76543210 , 2aaaaaa55555555 ) + +[32,58]: + int 1d950c842aaaaaa55555555 <- ( 76543210 , eaaaaaa55555555 ) + +[32,57]: + int 0eca86420aaaaaa55555555 <- ( 76543210 , 0aaaaaa55555555 ) + +[32,56]: + int 076543210aaaaaa55555555 <- ( 76543210 , aaaaaa55555555 ) + +[32,55]: + int 3b2a19082aaaaa55555555 <- ( 76543210 , 2aaaaa55555555 ) + +[32,54]: + int 1d950c842aaaaa55555555 <- ( 76543210 , eaaaaa55555555 ) + +[32,53]: + int 0eca86420aaaaa55555555 <- ( 76543210 , 0aaaaa55555555 ) + +[32,52]: + int 076543210aaaaa55555555 <- ( 76543210 , aaaaa55555555 ) + +[32,51]: + int 3b2a19082aaaa55555555 <- ( 76543210 , 2aaaa55555555 ) + +[32,50]: + int 1d950c842aaaa55555555 <- ( 76543210 , eaaaa55555555 ) + +[32,49]: + int 0eca86420aaaa55555555 <- ( 76543210 , 0aaaa55555555 ) + +[32,48]: + int 076543210aaaa55555555 <- ( 76543210 , aaaa55555555 ) + +[32,47]: + int 3b2a19082aaa55555555 <- ( 76543210 , 2aaa55555555 ) + +[32,46]: + int 1d950c842aaa55555555 <- ( 76543210 , eaaa55555555 ) + +[32,45]: + int 0eca86420aaa55555555 <- ( 76543210 , 0aaa55555555 ) + +[32,44]: + int 076543210aaa55555555 <- ( 76543210 , aaa55555555 ) + +[32,43]: + int 3b2a19082aa55555555 <- ( 76543210 , 2aa55555555 ) + +[32,42]: + int 1d950c842aa55555555 <- ( 76543210 , eaa55555555 ) + +[32,41]: + int 0eca86420aa55555555 <- ( 76543210 , 0aa55555555 ) + +[32,40]: + int 076543210aa55555555 <- ( 76543210 , aa55555555 ) + +[32,39]: + int 3b2a19082a55555555 <- ( 76543210 , 2a55555555 ) + +[32,38]: + int 1d950c842a55555555 <- ( 76543210 , ea55555555 ) + +[32,37]: + int 0eca86420a55555555 <- ( 76543210 , 0a55555555 ) + +[32,36]: + int 076543210a55555555 <- ( 76543210 , a55555555 ) + +[32,35]: + int 3b2a1908255555555 <- ( 76543210 , 255555555 ) + +[32,34]: + int 1d950c84255555555 <- ( 76543210 , e55555555 ) + +[32,33]: + int 0eca8642055555555 <- ( 76543210 , 055555555 ) + +[32,32]: + int 07654321055555555 <- ( 76543210 , 55555555 ) + +[32,31]: + int 3b2a190855555555 <- ( 76543210 , d5555555 ) + +[32,30]: + int 1d950c8415555555 <- ( 76543210 , 15555555 ) + +[32,29]: + int 0eca864215555555 <- ( 76543210 , f5555555 ) + +[32,28]: + int 0765432105555555 <- ( 76543210 , 5555555 ) + +[32,27]: + int 3b2a19085555555 <- ( 76543210 , d555555 ) + +[32,26]: + int 1d950c841555555 <- ( 76543210 , 1555555 ) + +[32,25]: + int 0eca86421555555 <- ( 76543210 , f555555 ) + +[32,24]: + int 076543210555555 <- ( 76543210 , 555555 ) + +[32,23]: + int 3b2a1908555555 <- ( 76543210 , d55555 ) + +[32,22]: + int 1d950c84155555 <- ( 76543210 , 155555 ) + +[32,21]: + int 0eca8642155555 <- ( 76543210 , f55555 ) + +[32,20]: + int 07654321055555 <- ( 76543210 , 55555 ) + +[32,19]: + int 3b2a190855555 <- ( 76543210 , d5555 ) + +[32,18]: + int 1d950c8415555 <- ( 76543210 , 15555 ) + +[32,17]: + int 0eca864215555 <- ( 76543210 , f5555 ) + +[32,16]: + int 0765432105555 <- ( 76543210 , 5555 ) + +[32,15]: + int 3b2a19085555 <- ( 76543210 , d555 ) + +[32,14]: + int 1d950c841555 <- ( 76543210 , 1555 ) + +[32,13]: + int 0eca86421555 <- ( 76543210 , f555 ) + +[32,12]: + int 076543210555 <- ( 76543210 , 555 ) + +[32,11]: + int 3b2a1908555 <- ( 76543210 , d55 ) + +[32,10]: + int 1d950c84155 <- ( 76543210 , 155 ) + +[32,9]: + int 0eca8642155 <- ( 76543210 , f55 ) + +[32,8]: + int 07654321055 <- ( 76543210 , 55 ) + +[32,7]: + int 3b2a190855 <- ( 76543210 , d5 ) + +[32,6]: + int 1d950c8415 <- ( 76543210 , 15 ) + +[32,5]: + int 0eca864215 <- ( 76543210 , f5 ) + +[32,4]: + int 0765432105 <- ( 76543210 , 5 ) + +[32,3]: + int 3b2a19085 <- ( 76543210 , d ) + +[32,2]: + int 1d950c841 <- ( 76543210 , 1 ) + +[32,1]: + int 0eca86421 <- ( 76543210 , f ) + +[31,64]: + int 76543210aaaaaaaa55555555 <- ( f6543210 , aaaaaaaa55555555 ) + +[31,63]: + int 3b2a19082aaaaaaa55555555 <- ( f6543210 , 2aaaaaaa55555555 ) + +[31,62]: + int 1d950c842aaaaaaa55555555 <- ( f6543210 , eaaaaaaa55555555 ) + +[31,61]: + int 0eca86420aaaaaaa55555555 <- ( f6543210 , 0aaaaaaa55555555 ) + +[31,60]: + int 76543210aaaaaaa55555555 <- ( f6543210 , aaaaaaa55555555 ) + +[31,59]: + int 3b2a19082aaaaaa55555555 <- ( f6543210 , 2aaaaaa55555555 ) + +[31,58]: + int 1d950c842aaaaaa55555555 <- ( f6543210 , eaaaaaa55555555 ) + +[31,57]: + int 0eca86420aaaaaa55555555 <- ( f6543210 , 0aaaaaa55555555 ) + +[31,56]: + int 76543210aaaaaa55555555 <- ( f6543210 , aaaaaa55555555 ) + +[31,55]: + int 3b2a19082aaaaa55555555 <- ( f6543210 , 2aaaaa55555555 ) + +[31,54]: + int 1d950c842aaaaa55555555 <- ( f6543210 , eaaaaa55555555 ) + +[31,53]: + int 0eca86420aaaaa55555555 <- ( f6543210 , 0aaaaa55555555 ) + +[31,52]: + int 76543210aaaaa55555555 <- ( f6543210 , aaaaa55555555 ) + +[31,51]: + int 3b2a19082aaaa55555555 <- ( f6543210 , 2aaaa55555555 ) + +[31,50]: + int 1d950c842aaaa55555555 <- ( f6543210 , eaaaa55555555 ) + +[31,49]: + int 0eca86420aaaa55555555 <- ( f6543210 , 0aaaa55555555 ) + +[31,48]: + int 76543210aaaa55555555 <- ( f6543210 , aaaa55555555 ) + +[31,47]: + int 3b2a19082aaa55555555 <- ( f6543210 , 2aaa55555555 ) + +[31,46]: + int 1d950c842aaa55555555 <- ( f6543210 , eaaa55555555 ) + +[31,45]: + int 0eca86420aaa55555555 <- ( f6543210 , 0aaa55555555 ) + +[31,44]: + int 76543210aaa55555555 <- ( f6543210 , aaa55555555 ) + +[31,43]: + int 3b2a19082aa55555555 <- ( f6543210 , 2aa55555555 ) + +[31,42]: + int 1d950c842aa55555555 <- ( f6543210 , eaa55555555 ) + +[31,41]: + int 0eca86420aa55555555 <- ( f6543210 , 0aa55555555 ) + +[31,40]: + int 76543210aa55555555 <- ( f6543210 , aa55555555 ) + +[31,39]: + int 3b2a19082a55555555 <- ( f6543210 , 2a55555555 ) + +[31,38]: + int 1d950c842a55555555 <- ( f6543210 , ea55555555 ) + +[31,37]: + int 0eca86420a55555555 <- ( f6543210 , 0a55555555 ) + +[31,36]: + int 76543210a55555555 <- ( f6543210 , a55555555 ) + +[31,35]: + int 3b2a1908255555555 <- ( f6543210 , 255555555 ) + +[31,34]: + int 1d950c84255555555 <- ( f6543210 , e55555555 ) + +[31,33]: + int 0eca8642055555555 <- ( f6543210 , 055555555 ) + +[31,32]: + int 7654321055555555 <- ( f6543210 , 55555555 ) + +[31,31]: + int 3b2a190855555555 <- ( f6543210 , d5555555 ) + +[31,30]: + int 1d950c8415555555 <- ( f6543210 , 15555555 ) + +[31,29]: + int 0eca864215555555 <- ( f6543210 , f5555555 ) + +[31,28]: + int 765432105555555 <- ( f6543210 , 5555555 ) + +[31,27]: + int 3b2a19085555555 <- ( f6543210 , d555555 ) + +[31,26]: + int 1d950c841555555 <- ( f6543210 , 1555555 ) + +[31,25]: + int 0eca86421555555 <- ( f6543210 , f555555 ) + +[31,24]: + int 76543210555555 <- ( f6543210 , 555555 ) + +[31,23]: + int 3b2a1908555555 <- ( f6543210 , d55555 ) + +[31,22]: + int 1d950c84155555 <- ( f6543210 , 155555 ) + +[31,21]: + int 0eca8642155555 <- ( f6543210 , f55555 ) + +[31,20]: + int 7654321055555 <- ( f6543210 , 55555 ) + +[31,19]: + int 3b2a190855555 <- ( f6543210 , d5555 ) + +[31,18]: + int 1d950c8415555 <- ( f6543210 , 15555 ) + +[31,17]: + int 0eca864215555 <- ( f6543210 , f5555 ) + +[31,16]: + int 765432105555 <- ( f6543210 , 5555 ) + +[31,15]: + int 3b2a19085555 <- ( f6543210 , d555 ) + +[31,14]: + int 1d950c841555 <- ( f6543210 , 1555 ) + +[31,13]: + int 0eca86421555 <- ( f6543210 , f555 ) + +[31,12]: + int 76543210555 <- ( f6543210 , 555 ) + +[31,11]: + int 3b2a1908555 <- ( f6543210 , d55 ) + +[31,10]: + int 1d950c84155 <- ( f6543210 , 155 ) + +[31,9]: + int 0eca8642155 <- ( f6543210 , f55 ) + +[31,8]: + int 7654321055 <- ( f6543210 , 55 ) + +[31,7]: + int 3b2a190855 <- ( f6543210 , d5 ) + +[31,6]: + int 1d950c8415 <- ( f6543210 , 15 ) + +[31,5]: + int 0eca864215 <- ( f6543210 , f5 ) + +[31,4]: + int 765432105 <- ( f6543210 , 5 ) + +[31,3]: + int 3b2a19085 <- ( f6543210 , d ) + +[31,2]: + int 1d950c841 <- ( f6543210 , 1 ) + +[31,1]: + int 0eca86421 <- ( f6543210 , f ) + +[30,64]: + int 36543210aaaaaaaa55555555 <- ( f6543210 , aaaaaaaa55555555 ) + +[30,63]: + int 1b2a19082aaaaaaa55555555 <- ( f6543210 , 2aaaaaaa55555555 ) + +[30,62]: + int 0d950c842aaaaaaa55555555 <- ( f6543210 , eaaaaaaa55555555 ) + +[30,61]: + int 6ca86420aaaaaaa55555555 <- ( f6543210 , 0aaaaaaa55555555 ) + +[30,60]: + int 36543210aaaaaaa55555555 <- ( f6543210 , aaaaaaa55555555 ) + +[30,59]: + int 1b2a19082aaaaaa55555555 <- ( f6543210 , 2aaaaaa55555555 ) + +[30,58]: + int 0d950c842aaaaaa55555555 <- ( f6543210 , eaaaaaa55555555 ) + +[30,57]: + int 6ca86420aaaaaa55555555 <- ( f6543210 , 0aaaaaa55555555 ) + +[30,56]: + int 36543210aaaaaa55555555 <- ( f6543210 , aaaaaa55555555 ) + +[30,55]: + int 1b2a19082aaaaa55555555 <- ( f6543210 , 2aaaaa55555555 ) + +[30,54]: + int 0d950c842aaaaa55555555 <- ( f6543210 , eaaaaa55555555 ) + +[30,53]: + int 6ca86420aaaaa55555555 <- ( f6543210 , 0aaaaa55555555 ) + +[30,52]: + int 36543210aaaaa55555555 <- ( f6543210 , aaaaa55555555 ) + +[30,51]: + int 1b2a19082aaaa55555555 <- ( f6543210 , 2aaaa55555555 ) + +[30,50]: + int 0d950c842aaaa55555555 <- ( f6543210 , eaaaa55555555 ) + +[30,49]: + int 6ca86420aaaa55555555 <- ( f6543210 , 0aaaa55555555 ) + +[30,48]: + int 36543210aaaa55555555 <- ( f6543210 , aaaa55555555 ) + +[30,47]: + int 1b2a19082aaa55555555 <- ( f6543210 , 2aaa55555555 ) + +[30,46]: + int 0d950c842aaa55555555 <- ( f6543210 , eaaa55555555 ) + +[30,45]: + int 6ca86420aaa55555555 <- ( f6543210 , 0aaa55555555 ) + +[30,44]: + int 36543210aaa55555555 <- ( f6543210 , aaa55555555 ) + +[30,43]: + int 1b2a19082aa55555555 <- ( f6543210 , 2aa55555555 ) + +[30,42]: + int 0d950c842aa55555555 <- ( f6543210 , eaa55555555 ) + +[30,41]: + int 6ca86420aa55555555 <- ( f6543210 , 0aa55555555 ) + +[30,40]: + int 36543210aa55555555 <- ( f6543210 , aa55555555 ) + +[30,39]: + int 1b2a19082a55555555 <- ( f6543210 , 2a55555555 ) + +[30,38]: + int 0d950c842a55555555 <- ( f6543210 , ea55555555 ) + +[30,37]: + int 6ca86420a55555555 <- ( f6543210 , 0a55555555 ) + +[30,36]: + int 36543210a55555555 <- ( f6543210 , a55555555 ) + +[30,35]: + int 1b2a1908255555555 <- ( f6543210 , 255555555 ) + +[30,34]: + int 0d950c84255555555 <- ( f6543210 , e55555555 ) + +[30,33]: + int 6ca8642055555555 <- ( f6543210 , 055555555 ) + +[30,32]: + int 3654321055555555 <- ( f6543210 , 55555555 ) + +[30,31]: + int 1b2a190855555555 <- ( f6543210 , d5555555 ) + +[30,30]: + int 0d950c8415555555 <- ( f6543210 , 15555555 ) + +[30,29]: + int 6ca864215555555 <- ( f6543210 , f5555555 ) + +[30,28]: + int 365432105555555 <- ( f6543210 , 5555555 ) + +[30,27]: + int 1b2a19085555555 <- ( f6543210 , d555555 ) + +[30,26]: + int 0d950c841555555 <- ( f6543210 , 1555555 ) + +[30,25]: + int 6ca86421555555 <- ( f6543210 , f555555 ) + +[30,24]: + int 36543210555555 <- ( f6543210 , 555555 ) + +[30,23]: + int 1b2a1908555555 <- ( f6543210 , d55555 ) + +[30,22]: + int 0d950c84155555 <- ( f6543210 , 155555 ) + +[30,21]: + int 6ca8642155555 <- ( f6543210 , f55555 ) + +[30,20]: + int 3654321055555 <- ( f6543210 , 55555 ) + +[30,19]: + int 1b2a190855555 <- ( f6543210 , d5555 ) + +[30,18]: + int 0d950c8415555 <- ( f6543210 , 15555 ) + +[30,17]: + int 6ca864215555 <- ( f6543210 , f5555 ) + +[30,16]: + int 365432105555 <- ( f6543210 , 5555 ) + +[30,15]: + int 1b2a19085555 <- ( f6543210 , d555 ) + +[30,14]: + int 0d950c841555 <- ( f6543210 , 1555 ) + +[30,13]: + int 6ca86421555 <- ( f6543210 , f555 ) + +[30,12]: + int 36543210555 <- ( f6543210 , 555 ) + +[30,11]: + int 1b2a1908555 <- ( f6543210 , d55 ) + +[30,10]: + int 0d950c84155 <- ( f6543210 , 155 ) + +[30,9]: + int 6ca8642155 <- ( f6543210 , f55 ) + +[30,8]: + int 3654321055 <- ( f6543210 , 55 ) + +[30,7]: + int 1b2a190855 <- ( f6543210 , d5 ) + +[30,6]: + int 0d950c8415 <- ( f6543210 , 15 ) + +[30,5]: + int 6ca864215 <- ( f6543210 , f5 ) + +[30,4]: + int 365432105 <- ( f6543210 , 5 ) + +[30,3]: + int 1b2a19085 <- ( f6543210 , d ) + +[30,2]: + int 0d950c841 <- ( f6543210 , 1 ) + +[30,1]: + int 6ca86421 <- ( f6543210 , f ) + +[29,64]: + int 16543210aaaaaaaa55555555 <- ( f6543210 , aaaaaaaa55555555 ) + +[29,63]: + int 0b2a19082aaaaaaa55555555 <- ( f6543210 , 2aaaaaaa55555555 ) + +[29,62]: + int 5950c842aaaaaaa55555555 <- ( f6543210 , eaaaaaaa55555555 ) + +[29,61]: + int 2ca86420aaaaaaa55555555 <- ( f6543210 , 0aaaaaaa55555555 ) + +[29,60]: + int 16543210aaaaaaa55555555 <- ( f6543210 , aaaaaaa55555555 ) + +[29,59]: + int 0b2a19082aaaaaa55555555 <- ( f6543210 , 2aaaaaa55555555 ) + +[29,58]: + int 5950c842aaaaaa55555555 <- ( f6543210 , eaaaaaa55555555 ) + +[29,57]: + int 2ca86420aaaaaa55555555 <- ( f6543210 , 0aaaaaa55555555 ) + +[29,56]: + int 16543210aaaaaa55555555 <- ( f6543210 , aaaaaa55555555 ) + +[29,55]: + int 0b2a19082aaaaa55555555 <- ( f6543210 , 2aaaaa55555555 ) + +[29,54]: + int 5950c842aaaaa55555555 <- ( f6543210 , eaaaaa55555555 ) + +[29,53]: + int 2ca86420aaaaa55555555 <- ( f6543210 , 0aaaaa55555555 ) + +[29,52]: + int 16543210aaaaa55555555 <- ( f6543210 , aaaaa55555555 ) + +[29,51]: + int 0b2a19082aaaa55555555 <- ( f6543210 , 2aaaa55555555 ) + +[29,50]: + int 5950c842aaaa55555555 <- ( f6543210 , eaaaa55555555 ) + +[29,49]: + int 2ca86420aaaa55555555 <- ( f6543210 , 0aaaa55555555 ) + +[29,48]: + int 16543210aaaa55555555 <- ( f6543210 , aaaa55555555 ) + +[29,47]: + int 0b2a19082aaa55555555 <- ( f6543210 , 2aaa55555555 ) + +[29,46]: + int 5950c842aaa55555555 <- ( f6543210 , eaaa55555555 ) + +[29,45]: + int 2ca86420aaa55555555 <- ( f6543210 , 0aaa55555555 ) + +[29,44]: + int 16543210aaa55555555 <- ( f6543210 , aaa55555555 ) + +[29,43]: + int 0b2a19082aa55555555 <- ( f6543210 , 2aa55555555 ) + +[29,42]: + int 5950c842aa55555555 <- ( f6543210 , eaa55555555 ) + +[29,41]: + int 2ca86420aa55555555 <- ( f6543210 , 0aa55555555 ) + +[29,40]: + int 16543210aa55555555 <- ( f6543210 , aa55555555 ) + +[29,39]: + int 0b2a19082a55555555 <- ( f6543210 , 2a55555555 ) + +[29,38]: + int 5950c842a55555555 <- ( f6543210 , ea55555555 ) + +[29,37]: + int 2ca86420a55555555 <- ( f6543210 , 0a55555555 ) + +[29,36]: + int 16543210a55555555 <- ( f6543210 , a55555555 ) + +[29,35]: + int 0b2a1908255555555 <- ( f6543210 , 255555555 ) + +[29,34]: + int 5950c84255555555 <- ( f6543210 , e55555555 ) + +[29,33]: + int 2ca8642055555555 <- ( f6543210 , 055555555 ) + +[29,32]: + int 1654321055555555 <- ( f6543210 , 55555555 ) + +[29,31]: + int 0b2a190855555555 <- ( f6543210 , d5555555 ) + +[29,30]: + int 5950c8415555555 <- ( f6543210 , 15555555 ) + +[29,29]: + int 2ca864215555555 <- ( f6543210 , f5555555 ) + +[29,28]: + int 165432105555555 <- ( f6543210 , 5555555 ) + +[29,27]: + int 0b2a19085555555 <- ( f6543210 , d555555 ) + +[29,26]: + int 5950c841555555 <- ( f6543210 , 1555555 ) + +[29,25]: + int 2ca86421555555 <- ( f6543210 , f555555 ) + +[29,24]: + int 16543210555555 <- ( f6543210 , 555555 ) + +[29,23]: + int 0b2a1908555555 <- ( f6543210 , d55555 ) + +[29,22]: + int 5950c84155555 <- ( f6543210 , 155555 ) + +[29,21]: + int 2ca8642155555 <- ( f6543210 , f55555 ) + +[29,20]: + int 1654321055555 <- ( f6543210 , 55555 ) + +[29,19]: + int 0b2a190855555 <- ( f6543210 , d5555 ) + +[29,18]: + int 5950c8415555 <- ( f6543210 , 15555 ) + +[29,17]: + int 2ca864215555 <- ( f6543210 , f5555 ) + +[29,16]: + int 165432105555 <- ( f6543210 , 5555 ) + +[29,15]: + int 0b2a19085555 <- ( f6543210 , d555 ) + +[29,14]: + int 5950c841555 <- ( f6543210 , 1555 ) + +[29,13]: + int 2ca86421555 <- ( f6543210 , f555 ) + +[29,12]: + int 16543210555 <- ( f6543210 , 555 ) + +[29,11]: + int 0b2a1908555 <- ( f6543210 , d55 ) + +[29,10]: + int 5950c84155 <- ( f6543210 , 155 ) + +[29,9]: + int 2ca8642155 <- ( f6543210 , f55 ) + +[29,8]: + int 1654321055 <- ( f6543210 , 55 ) + +[29,7]: + int 0b2a190855 <- ( f6543210 , d5 ) + +[29,6]: + int 5950c8415 <- ( f6543210 , 15 ) + +[29,5]: + int 2ca864215 <- ( f6543210 , f5 ) + +[29,4]: + int 165432105 <- ( f6543210 , 5 ) + +[29,3]: + int 0b2a19085 <- ( f6543210 , d ) + +[29,2]: + int 5950c841 <- ( f6543210 , 1 ) + +[29,1]: + int 2ca86421 <- ( f6543210 , f ) + +[28,64]: + int 06543210aaaaaaaa55555555 <- ( 6543210 , aaaaaaaa55555555 ) + +[28,63]: + int 32a19082aaaaaaa55555555 <- ( 6543210 , 2aaaaaaa55555555 ) + +[28,62]: + int 1950c842aaaaaaa55555555 <- ( 6543210 , eaaaaaaa55555555 ) + +[28,61]: + int 0ca86420aaaaaaa55555555 <- ( 6543210 , 0aaaaaaa55555555 ) + +[28,60]: + int 06543210aaaaaaa55555555 <- ( 6543210 , aaaaaaa55555555 ) + +[28,59]: + int 32a19082aaaaaa55555555 <- ( 6543210 , 2aaaaaa55555555 ) + +[28,58]: + int 1950c842aaaaaa55555555 <- ( 6543210 , eaaaaaa55555555 ) + +[28,57]: + int 0ca86420aaaaaa55555555 <- ( 6543210 , 0aaaaaa55555555 ) + +[28,56]: + int 06543210aaaaaa55555555 <- ( 6543210 , aaaaaa55555555 ) + +[28,55]: + int 32a19082aaaaa55555555 <- ( 6543210 , 2aaaaa55555555 ) + +[28,54]: + int 1950c842aaaaa55555555 <- ( 6543210 , eaaaaa55555555 ) + +[28,53]: + int 0ca86420aaaaa55555555 <- ( 6543210 , 0aaaaa55555555 ) + +[28,52]: + int 06543210aaaaa55555555 <- ( 6543210 , aaaaa55555555 ) + +[28,51]: + int 32a19082aaaa55555555 <- ( 6543210 , 2aaaa55555555 ) + +[28,50]: + int 1950c842aaaa55555555 <- ( 6543210 , eaaaa55555555 ) + +[28,49]: + int 0ca86420aaaa55555555 <- ( 6543210 , 0aaaa55555555 ) + +[28,48]: + int 06543210aaaa55555555 <- ( 6543210 , aaaa55555555 ) + +[28,47]: + int 32a19082aaa55555555 <- ( 6543210 , 2aaa55555555 ) + +[28,46]: + int 1950c842aaa55555555 <- ( 6543210 , eaaa55555555 ) + +[28,45]: + int 0ca86420aaa55555555 <- ( 6543210 , 0aaa55555555 ) + +[28,44]: + int 06543210aaa55555555 <- ( 6543210 , aaa55555555 ) + +[28,43]: + int 32a19082aa55555555 <- ( 6543210 , 2aa55555555 ) + +[28,42]: + int 1950c842aa55555555 <- ( 6543210 , eaa55555555 ) + +[28,41]: + int 0ca86420aa55555555 <- ( 6543210 , 0aa55555555 ) + +[28,40]: + int 06543210aa55555555 <- ( 6543210 , aa55555555 ) + +[28,39]: + int 32a19082a55555555 <- ( 6543210 , 2a55555555 ) + +[28,38]: + int 1950c842a55555555 <- ( 6543210 , ea55555555 ) + +[28,37]: + int 0ca86420a55555555 <- ( 6543210 , 0a55555555 ) + +[28,36]: + int 06543210a55555555 <- ( 6543210 , a55555555 ) + +[28,35]: + int 32a1908255555555 <- ( 6543210 , 255555555 ) + +[28,34]: + int 1950c84255555555 <- ( 6543210 , e55555555 ) + +[28,33]: + int 0ca8642055555555 <- ( 6543210 , 055555555 ) + +[28,32]: + int 0654321055555555 <- ( 6543210 , 55555555 ) + +[28,31]: + int 32a190855555555 <- ( 6543210 , d5555555 ) + +[28,30]: + int 1950c8415555555 <- ( 6543210 , 15555555 ) + +[28,29]: + int 0ca864215555555 <- ( 6543210 , f5555555 ) + +[28,28]: + int 065432105555555 <- ( 6543210 , 5555555 ) + +[28,27]: + int 32a19085555555 <- ( 6543210 , d555555 ) + +[28,26]: + int 1950c841555555 <- ( 6543210 , 1555555 ) + +[28,25]: + int 0ca86421555555 <- ( 6543210 , f555555 ) + +[28,24]: + int 06543210555555 <- ( 6543210 , 555555 ) + +[28,23]: + int 32a1908555555 <- ( 6543210 , d55555 ) + +[28,22]: + int 1950c84155555 <- ( 6543210 , 155555 ) + +[28,21]: + int 0ca8642155555 <- ( 6543210 , f55555 ) + +[28,20]: + int 0654321055555 <- ( 6543210 , 55555 ) + +[28,19]: + int 32a190855555 <- ( 6543210 , d5555 ) + +[28,18]: + int 1950c8415555 <- ( 6543210 , 15555 ) + +[28,17]: + int 0ca864215555 <- ( 6543210 , f5555 ) + +[28,16]: + int 065432105555 <- ( 6543210 , 5555 ) + +[28,15]: + int 32a19085555 <- ( 6543210 , d555 ) + +[28,14]: + int 1950c841555 <- ( 6543210 , 1555 ) + +[28,13]: + int 0ca86421555 <- ( 6543210 , f555 ) + +[28,12]: + int 06543210555 <- ( 6543210 , 555 ) + +[28,11]: + int 32a1908555 <- ( 6543210 , d55 ) + +[28,10]: + int 1950c84155 <- ( 6543210 , 155 ) + +[28,9]: + int 0ca8642155 <- ( 6543210 , f55 ) + +[28,8]: + int 0654321055 <- ( 6543210 , 55 ) + +[28,7]: + int 32a190855 <- ( 6543210 , d5 ) + +[28,6]: + int 1950c8415 <- ( 6543210 , 15 ) + +[28,5]: + int 0ca864215 <- ( 6543210 , f5 ) + +[28,4]: + int 065432105 <- ( 6543210 , 5 ) + +[28,3]: + int 32a19085 <- ( 6543210 , d ) + +[28,2]: + int 1950c841 <- ( 6543210 , 1 ) + +[28,1]: + int 0ca86421 <- ( 6543210 , f ) + +[27,64]: + int 6543210aaaaaaaa55555555 <- ( e543210 , aaaaaaaa55555555 ) + +[27,63]: + int 32a19082aaaaaaa55555555 <- ( e543210 , 2aaaaaaa55555555 ) + +[27,62]: + int 1950c842aaaaaaa55555555 <- ( e543210 , eaaaaaaa55555555 ) + +[27,61]: + int 0ca86420aaaaaaa55555555 <- ( e543210 , 0aaaaaaa55555555 ) + +[27,60]: + int 6543210aaaaaaa55555555 <- ( e543210 , aaaaaaa55555555 ) + +[27,59]: + int 32a19082aaaaaa55555555 <- ( e543210 , 2aaaaaa55555555 ) + +[27,58]: + int 1950c842aaaaaa55555555 <- ( e543210 , eaaaaaa55555555 ) + +[27,57]: + int 0ca86420aaaaaa55555555 <- ( e543210 , 0aaaaaa55555555 ) + +[27,56]: + int 6543210aaaaaa55555555 <- ( e543210 , aaaaaa55555555 ) + +[27,55]: + int 32a19082aaaaa55555555 <- ( e543210 , 2aaaaa55555555 ) + +[27,54]: + int 1950c842aaaaa55555555 <- ( e543210 , eaaaaa55555555 ) + +[27,53]: + int 0ca86420aaaaa55555555 <- ( e543210 , 0aaaaa55555555 ) + +[27,52]: + int 6543210aaaaa55555555 <- ( e543210 , aaaaa55555555 ) + +[27,51]: + int 32a19082aaaa55555555 <- ( e543210 , 2aaaa55555555 ) + +[27,50]: + int 1950c842aaaa55555555 <- ( e543210 , eaaaa55555555 ) + +[27,49]: + int 0ca86420aaaa55555555 <- ( e543210 , 0aaaa55555555 ) + +[27,48]: + int 6543210aaaa55555555 <- ( e543210 , aaaa55555555 ) + +[27,47]: + int 32a19082aaa55555555 <- ( e543210 , 2aaa55555555 ) + +[27,46]: + int 1950c842aaa55555555 <- ( e543210 , eaaa55555555 ) + +[27,45]: + int 0ca86420aaa55555555 <- ( e543210 , 0aaa55555555 ) + +[27,44]: + int 6543210aaa55555555 <- ( e543210 , aaa55555555 ) + +[27,43]: + int 32a19082aa55555555 <- ( e543210 , 2aa55555555 ) + +[27,42]: + int 1950c842aa55555555 <- ( e543210 , eaa55555555 ) + +[27,41]: + int 0ca86420aa55555555 <- ( e543210 , 0aa55555555 ) + +[27,40]: + int 6543210aa55555555 <- ( e543210 , aa55555555 ) + +[27,39]: + int 32a19082a55555555 <- ( e543210 , 2a55555555 ) + +[27,38]: + int 1950c842a55555555 <- ( e543210 , ea55555555 ) + +[27,37]: + int 0ca86420a55555555 <- ( e543210 , 0a55555555 ) + +[27,36]: + int 6543210a55555555 <- ( e543210 , a55555555 ) + +[27,35]: + int 32a1908255555555 <- ( e543210 , 255555555 ) + +[27,34]: + int 1950c84255555555 <- ( e543210 , e55555555 ) + +[27,33]: + int 0ca8642055555555 <- ( e543210 , 055555555 ) + +[27,32]: + int 654321055555555 <- ( e543210 , 55555555 ) + +[27,31]: + int 32a190855555555 <- ( e543210 , d5555555 ) + +[27,30]: + int 1950c8415555555 <- ( e543210 , 15555555 ) + +[27,29]: + int 0ca864215555555 <- ( e543210 , f5555555 ) + +[27,28]: + int 65432105555555 <- ( e543210 , 5555555 ) + +[27,27]: + int 32a19085555555 <- ( e543210 , d555555 ) + +[27,26]: + int 1950c841555555 <- ( e543210 , 1555555 ) + +[27,25]: + int 0ca86421555555 <- ( e543210 , f555555 ) + +[27,24]: + int 6543210555555 <- ( e543210 , 555555 ) + +[27,23]: + int 32a1908555555 <- ( e543210 , d55555 ) + +[27,22]: + int 1950c84155555 <- ( e543210 , 155555 ) + +[27,21]: + int 0ca8642155555 <- ( e543210 , f55555 ) + +[27,20]: + int 654321055555 <- ( e543210 , 55555 ) + +[27,19]: + int 32a190855555 <- ( e543210 , d5555 ) + +[27,18]: + int 1950c8415555 <- ( e543210 , 15555 ) + +[27,17]: + int 0ca864215555 <- ( e543210 , f5555 ) + +[27,16]: + int 65432105555 <- ( e543210 , 5555 ) + +[27,15]: + int 32a19085555 <- ( e543210 , d555 ) + +[27,14]: + int 1950c841555 <- ( e543210 , 1555 ) + +[27,13]: + int 0ca86421555 <- ( e543210 , f555 ) + +[27,12]: + int 6543210555 <- ( e543210 , 555 ) + +[27,11]: + int 32a1908555 <- ( e543210 , d55 ) + +[27,10]: + int 1950c84155 <- ( e543210 , 155 ) + +[27,9]: + int 0ca8642155 <- ( e543210 , f55 ) + +[27,8]: + int 654321055 <- ( e543210 , 55 ) + +[27,7]: + int 32a190855 <- ( e543210 , d5 ) + +[27,6]: + int 1950c8415 <- ( e543210 , 15 ) + +[27,5]: + int 0ca864215 <- ( e543210 , f5 ) + +[27,4]: + int 65432105 <- ( e543210 , 5 ) + +[27,3]: + int 32a19085 <- ( e543210 , d ) + +[27,2]: + int 1950c841 <- ( e543210 , 1 ) + +[27,1]: + int 0ca86421 <- ( e543210 , f ) + +[26,64]: + int 2543210aaaaaaaa55555555 <- ( e543210 , aaaaaaaa55555555 ) + +[26,63]: + int 12a19082aaaaaaa55555555 <- ( e543210 , 2aaaaaaa55555555 ) + +[26,62]: + int 0950c842aaaaaaa55555555 <- ( e543210 , eaaaaaaa55555555 ) + +[26,61]: + int 4a86420aaaaaaa55555555 <- ( e543210 , 0aaaaaaa55555555 ) + +[26,60]: + int 2543210aaaaaaa55555555 <- ( e543210 , aaaaaaa55555555 ) + +[26,59]: + int 12a19082aaaaaa55555555 <- ( e543210 , 2aaaaaa55555555 ) + +[26,58]: + int 0950c842aaaaaa55555555 <- ( e543210 , eaaaaaa55555555 ) + +[26,57]: + int 4a86420aaaaaa55555555 <- ( e543210 , 0aaaaaa55555555 ) + +[26,56]: + int 2543210aaaaaa55555555 <- ( e543210 , aaaaaa55555555 ) + +[26,55]: + int 12a19082aaaaa55555555 <- ( e543210 , 2aaaaa55555555 ) + +[26,54]: + int 0950c842aaaaa55555555 <- ( e543210 , eaaaaa55555555 ) + +[26,53]: + int 4a86420aaaaa55555555 <- ( e543210 , 0aaaaa55555555 ) + +[26,52]: + int 2543210aaaaa55555555 <- ( e543210 , aaaaa55555555 ) + +[26,51]: + int 12a19082aaaa55555555 <- ( e543210 , 2aaaa55555555 ) + +[26,50]: + int 0950c842aaaa55555555 <- ( e543210 , eaaaa55555555 ) + +[26,49]: + int 4a86420aaaa55555555 <- ( e543210 , 0aaaa55555555 ) + +[26,48]: + int 2543210aaaa55555555 <- ( e543210 , aaaa55555555 ) + +[26,47]: + int 12a19082aaa55555555 <- ( e543210 , 2aaa55555555 ) + +[26,46]: + int 0950c842aaa55555555 <- ( e543210 , eaaa55555555 ) + +[26,45]: + int 4a86420aaa55555555 <- ( e543210 , 0aaa55555555 ) + +[26,44]: + int 2543210aaa55555555 <- ( e543210 , aaa55555555 ) + +[26,43]: + int 12a19082aa55555555 <- ( e543210 , 2aa55555555 ) + +[26,42]: + int 0950c842aa55555555 <- ( e543210 , eaa55555555 ) + +[26,41]: + int 4a86420aa55555555 <- ( e543210 , 0aa55555555 ) + +[26,40]: + int 2543210aa55555555 <- ( e543210 , aa55555555 ) + +[26,39]: + int 12a19082a55555555 <- ( e543210 , 2a55555555 ) + +[26,38]: + int 0950c842a55555555 <- ( e543210 , ea55555555 ) + +[26,37]: + int 4a86420a55555555 <- ( e543210 , 0a55555555 ) + +[26,36]: + int 2543210a55555555 <- ( e543210 , a55555555 ) + +[26,35]: + int 12a1908255555555 <- ( e543210 , 255555555 ) + +[26,34]: + int 0950c84255555555 <- ( e543210 , e55555555 ) + +[26,33]: + int 4a8642055555555 <- ( e543210 , 055555555 ) + +[26,32]: + int 254321055555555 <- ( e543210 , 55555555 ) + +[26,31]: + int 12a190855555555 <- ( e543210 , d5555555 ) + +[26,30]: + int 0950c8415555555 <- ( e543210 , 15555555 ) + +[26,29]: + int 4a864215555555 <- ( e543210 , f5555555 ) + +[26,28]: + int 25432105555555 <- ( e543210 , 5555555 ) + +[26,27]: + int 12a19085555555 <- ( e543210 , d555555 ) + +[26,26]: + int 0950c841555555 <- ( e543210 , 1555555 ) + +[26,25]: + int 4a86421555555 <- ( e543210 , f555555 ) + +[26,24]: + int 2543210555555 <- ( e543210 , 555555 ) + +[26,23]: + int 12a1908555555 <- ( e543210 , d55555 ) + +[26,22]: + int 0950c84155555 <- ( e543210 , 155555 ) + +[26,21]: + int 4a8642155555 <- ( e543210 , f55555 ) + +[26,20]: + int 254321055555 <- ( e543210 , 55555 ) + +[26,19]: + int 12a190855555 <- ( e543210 , d5555 ) + +[26,18]: + int 0950c8415555 <- ( e543210 , 15555 ) + +[26,17]: + int 4a864215555 <- ( e543210 , f5555 ) + +[26,16]: + int 25432105555 <- ( e543210 , 5555 ) + +[26,15]: + int 12a19085555 <- ( e543210 , d555 ) + +[26,14]: + int 0950c841555 <- ( e543210 , 1555 ) + +[26,13]: + int 4a86421555 <- ( e543210 , f555 ) + +[26,12]: + int 2543210555 <- ( e543210 , 555 ) + +[26,11]: + int 12a1908555 <- ( e543210 , d55 ) + +[26,10]: + int 0950c84155 <- ( e543210 , 155 ) + +[26,9]: + int 4a8642155 <- ( e543210 , f55 ) + +[26,8]: + int 254321055 <- ( e543210 , 55 ) + +[26,7]: + int 12a190855 <- ( e543210 , d5 ) + +[26,6]: + int 0950c8415 <- ( e543210 , 15 ) + +[26,5]: + int 4a864215 <- ( e543210 , f5 ) + +[26,4]: + int 25432105 <- ( e543210 , 5 ) + +[26,3]: + int 12a19085 <- ( e543210 , d ) + +[26,2]: + int 0950c841 <- ( e543210 , 1 ) + +[26,1]: + int 4a86421 <- ( e543210 , f ) + +[25,64]: + int 0543210aaaaaaaa55555555 <- ( 0543210 , aaaaaaaa55555555 ) + +[25,63]: + int 02a19082aaaaaaa55555555 <- ( 0543210 , 2aaaaaaa55555555 ) + +[25,62]: + int 150c842aaaaaaa55555555 <- ( 0543210 , eaaaaaaa55555555 ) + +[25,61]: + int 0a86420aaaaaaa55555555 <- ( 0543210 , 0aaaaaaa55555555 ) + +[25,60]: + int 0543210aaaaaaa55555555 <- ( 0543210 , aaaaaaa55555555 ) + +[25,59]: + int 02a19082aaaaaa55555555 <- ( 0543210 , 2aaaaaa55555555 ) + +[25,58]: + int 150c842aaaaaa55555555 <- ( 0543210 , eaaaaaa55555555 ) + +[25,57]: + int 0a86420aaaaaa55555555 <- ( 0543210 , 0aaaaaa55555555 ) + +[25,56]: + int 0543210aaaaaa55555555 <- ( 0543210 , aaaaaa55555555 ) + +[25,55]: + int 02a19082aaaaa55555555 <- ( 0543210 , 2aaaaa55555555 ) + +[25,54]: + int 150c842aaaaa55555555 <- ( 0543210 , eaaaaa55555555 ) + +[25,53]: + int 0a86420aaaaa55555555 <- ( 0543210 , 0aaaaa55555555 ) + +[25,52]: + int 0543210aaaaa55555555 <- ( 0543210 , aaaaa55555555 ) + +[25,51]: + int 02a19082aaaa55555555 <- ( 0543210 , 2aaaa55555555 ) + +[25,50]: + int 150c842aaaa55555555 <- ( 0543210 , eaaaa55555555 ) + +[25,49]: + int 0a86420aaaa55555555 <- ( 0543210 , 0aaaa55555555 ) + +[25,48]: + int 0543210aaaa55555555 <- ( 0543210 , aaaa55555555 ) + +[25,47]: + int 02a19082aaa55555555 <- ( 0543210 , 2aaa55555555 ) + +[25,46]: + int 150c842aaa55555555 <- ( 0543210 , eaaa55555555 ) + +[25,45]: + int 0a86420aaa55555555 <- ( 0543210 , 0aaa55555555 ) + +[25,44]: + int 0543210aaa55555555 <- ( 0543210 , aaa55555555 ) + +[25,43]: + int 02a19082aa55555555 <- ( 0543210 , 2aa55555555 ) + +[25,42]: + int 150c842aa55555555 <- ( 0543210 , eaa55555555 ) + +[25,41]: + int 0a86420aa55555555 <- ( 0543210 , 0aa55555555 ) + +[25,40]: + int 0543210aa55555555 <- ( 0543210 , aa55555555 ) + +[25,39]: + int 02a19082a55555555 <- ( 0543210 , 2a55555555 ) + +[25,38]: + int 150c842a55555555 <- ( 0543210 , ea55555555 ) + +[25,37]: + int 0a86420a55555555 <- ( 0543210 , 0a55555555 ) + +[25,36]: + int 0543210a55555555 <- ( 0543210 , a55555555 ) + +[25,35]: + int 02a1908255555555 <- ( 0543210 , 255555555 ) + +[25,34]: + int 150c84255555555 <- ( 0543210 , e55555555 ) + +[25,33]: + int 0a8642055555555 <- ( 0543210 , 055555555 ) + +[25,32]: + int 054321055555555 <- ( 0543210 , 55555555 ) + +[25,31]: + int 02a190855555555 <- ( 0543210 , d5555555 ) + +[25,30]: + int 150c8415555555 <- ( 0543210 , 15555555 ) + +[25,29]: + int 0a864215555555 <- ( 0543210 , f5555555 ) + +[25,28]: + int 05432105555555 <- ( 0543210 , 5555555 ) + +[25,27]: + int 02a19085555555 <- ( 0543210 , d555555 ) + +[25,26]: + int 150c841555555 <- ( 0543210 , 1555555 ) + +[25,25]: + int 0a86421555555 <- ( 0543210 , f555555 ) + +[25,24]: + int 0543210555555 <- ( 0543210 , 555555 ) + +[25,23]: + int 02a1908555555 <- ( 0543210 , d55555 ) + +[25,22]: + int 150c84155555 <- ( 0543210 , 155555 ) + +[25,21]: + int 0a8642155555 <- ( 0543210 , f55555 ) + +[25,20]: + int 054321055555 <- ( 0543210 , 55555 ) + +[25,19]: + int 02a190855555 <- ( 0543210 , d5555 ) + +[25,18]: + int 150c8415555 <- ( 0543210 , 15555 ) + +[25,17]: + int 0a864215555 <- ( 0543210 , f5555 ) + +[25,16]: + int 05432105555 <- ( 0543210 , 5555 ) + +[25,15]: + int 02a19085555 <- ( 0543210 , d555 ) + +[25,14]: + int 150c841555 <- ( 0543210 , 1555 ) + +[25,13]: + int 0a86421555 <- ( 0543210 , f555 ) + +[25,12]: + int 0543210555 <- ( 0543210 , 555 ) + +[25,11]: + int 02a1908555 <- ( 0543210 , d55 ) + +[25,10]: + int 150c84155 <- ( 0543210 , 155 ) + +[25,9]: + int 0a8642155 <- ( 0543210 , f55 ) + +[25,8]: + int 054321055 <- ( 0543210 , 55 ) + +[25,7]: + int 02a190855 <- ( 0543210 , d5 ) + +[25,6]: + int 150c8415 <- ( 0543210 , 15 ) + +[25,5]: + int 0a864215 <- ( 0543210 , f5 ) + +[25,4]: + int 05432105 <- ( 0543210 , 5 ) + +[25,3]: + int 02a19085 <- ( 0543210 , d ) + +[25,2]: + int 150c841 <- ( 0543210 , 1 ) + +[25,1]: + int 0a86421 <- ( 0543210 , f ) + +[24,64]: + int 0543210aaaaaaaa55555555 <- ( 543210 , aaaaaaaa55555555 ) + +[24,63]: + int 2a19082aaaaaaa55555555 <- ( 543210 , 2aaaaaaa55555555 ) + +[24,62]: + int 150c842aaaaaaa55555555 <- ( 543210 , eaaaaaaa55555555 ) + +[24,61]: + int 0a86420aaaaaaa55555555 <- ( 543210 , 0aaaaaaa55555555 ) + +[24,60]: + int 0543210aaaaaaa55555555 <- ( 543210 , aaaaaaa55555555 ) + +[24,59]: + int 2a19082aaaaaa55555555 <- ( 543210 , 2aaaaaa55555555 ) + +[24,58]: + int 150c842aaaaaa55555555 <- ( 543210 , eaaaaaa55555555 ) + +[24,57]: + int 0a86420aaaaaa55555555 <- ( 543210 , 0aaaaaa55555555 ) + +[24,56]: + int 0543210aaaaaa55555555 <- ( 543210 , aaaaaa55555555 ) + +[24,55]: + int 2a19082aaaaa55555555 <- ( 543210 , 2aaaaa55555555 ) + +[24,54]: + int 150c842aaaaa55555555 <- ( 543210 , eaaaaa55555555 ) + +[24,53]: + int 0a86420aaaaa55555555 <- ( 543210 , 0aaaaa55555555 ) + +[24,52]: + int 0543210aaaaa55555555 <- ( 543210 , aaaaa55555555 ) + +[24,51]: + int 2a19082aaaa55555555 <- ( 543210 , 2aaaa55555555 ) + +[24,50]: + int 150c842aaaa55555555 <- ( 543210 , eaaaa55555555 ) + +[24,49]: + int 0a86420aaaa55555555 <- ( 543210 , 0aaaa55555555 ) + +[24,48]: + int 0543210aaaa55555555 <- ( 543210 , aaaa55555555 ) + +[24,47]: + int 2a19082aaa55555555 <- ( 543210 , 2aaa55555555 ) + +[24,46]: + int 150c842aaa55555555 <- ( 543210 , eaaa55555555 ) + +[24,45]: + int 0a86420aaa55555555 <- ( 543210 , 0aaa55555555 ) + +[24,44]: + int 0543210aaa55555555 <- ( 543210 , aaa55555555 ) + +[24,43]: + int 2a19082aa55555555 <- ( 543210 , 2aa55555555 ) + +[24,42]: + int 150c842aa55555555 <- ( 543210 , eaa55555555 ) + +[24,41]: + int 0a86420aa55555555 <- ( 543210 , 0aa55555555 ) + +[24,40]: + int 0543210aa55555555 <- ( 543210 , aa55555555 ) + +[24,39]: + int 2a19082a55555555 <- ( 543210 , 2a55555555 ) + +[24,38]: + int 150c842a55555555 <- ( 543210 , ea55555555 ) + +[24,37]: + int 0a86420a55555555 <- ( 543210 , 0a55555555 ) + +[24,36]: + int 0543210a55555555 <- ( 543210 , a55555555 ) + +[24,35]: + int 2a1908255555555 <- ( 543210 , 255555555 ) + +[24,34]: + int 150c84255555555 <- ( 543210 , e55555555 ) + +[24,33]: + int 0a8642055555555 <- ( 543210 , 055555555 ) + +[24,32]: + int 054321055555555 <- ( 543210 , 55555555 ) + +[24,31]: + int 2a190855555555 <- ( 543210 , d5555555 ) + +[24,30]: + int 150c8415555555 <- ( 543210 , 15555555 ) + +[24,29]: + int 0a864215555555 <- ( 543210 , f5555555 ) + +[24,28]: + int 05432105555555 <- ( 543210 , 5555555 ) + +[24,27]: + int 2a19085555555 <- ( 543210 , d555555 ) + +[24,26]: + int 150c841555555 <- ( 543210 , 1555555 ) + +[24,25]: + int 0a86421555555 <- ( 543210 , f555555 ) + +[24,24]: + int 0543210555555 <- ( 543210 , 555555 ) + +[24,23]: + int 2a1908555555 <- ( 543210 , d55555 ) + +[24,22]: + int 150c84155555 <- ( 543210 , 155555 ) + +[24,21]: + int 0a8642155555 <- ( 543210 , f55555 ) + +[24,20]: + int 054321055555 <- ( 543210 , 55555 ) + +[24,19]: + int 2a190855555 <- ( 543210 , d5555 ) + +[24,18]: + int 150c8415555 <- ( 543210 , 15555 ) + +[24,17]: + int 0a864215555 <- ( 543210 , f5555 ) + +[24,16]: + int 05432105555 <- ( 543210 , 5555 ) + +[24,15]: + int 2a19085555 <- ( 543210 , d555 ) + +[24,14]: + int 150c841555 <- ( 543210 , 1555 ) + +[24,13]: + int 0a86421555 <- ( 543210 , f555 ) + +[24,12]: + int 0543210555 <- ( 543210 , 555 ) + +[24,11]: + int 2a1908555 <- ( 543210 , d55 ) + +[24,10]: + int 150c84155 <- ( 543210 , 155 ) + +[24,9]: + int 0a8642155 <- ( 543210 , f55 ) + +[24,8]: + int 054321055 <- ( 543210 , 55 ) + +[24,7]: + int 2a190855 <- ( 543210 , d5 ) + +[24,6]: + int 150c8415 <- ( 543210 , 15 ) + +[24,5]: + int 0a864215 <- ( 543210 , f5 ) + +[24,4]: + int 05432105 <- ( 543210 , 5 ) + +[24,3]: + int 2a19085 <- ( 543210 , d ) + +[24,2]: + int 150c841 <- ( 543210 , 1 ) + +[24,1]: + int 0a86421 <- ( 543210 , f ) + +[23,64]: + int 543210aaaaaaaa55555555 <- ( d43210 , aaaaaaaa55555555 ) + +[23,63]: + int 2a19082aaaaaaa55555555 <- ( d43210 , 2aaaaaaa55555555 ) + +[23,62]: + int 150c842aaaaaaa55555555 <- ( d43210 , eaaaaaaa55555555 ) + +[23,61]: + int 0a86420aaaaaaa55555555 <- ( d43210 , 0aaaaaaa55555555 ) + +[23,60]: + int 543210aaaaaaa55555555 <- ( d43210 , aaaaaaa55555555 ) + +[23,59]: + int 2a19082aaaaaa55555555 <- ( d43210 , 2aaaaaa55555555 ) + +[23,58]: + int 150c842aaaaaa55555555 <- ( d43210 , eaaaaaa55555555 ) + +[23,57]: + int 0a86420aaaaaa55555555 <- ( d43210 , 0aaaaaa55555555 ) + +[23,56]: + int 543210aaaaaa55555555 <- ( d43210 , aaaaaa55555555 ) + +[23,55]: + int 2a19082aaaaa55555555 <- ( d43210 , 2aaaaa55555555 ) + +[23,54]: + int 150c842aaaaa55555555 <- ( d43210 , eaaaaa55555555 ) + +[23,53]: + int 0a86420aaaaa55555555 <- ( d43210 , 0aaaaa55555555 ) + +[23,52]: + int 543210aaaaa55555555 <- ( d43210 , aaaaa55555555 ) + +[23,51]: + int 2a19082aaaa55555555 <- ( d43210 , 2aaaa55555555 ) + +[23,50]: + int 150c842aaaa55555555 <- ( d43210 , eaaaa55555555 ) + +[23,49]: + int 0a86420aaaa55555555 <- ( d43210 , 0aaaa55555555 ) + +[23,48]: + int 543210aaaa55555555 <- ( d43210 , aaaa55555555 ) + +[23,47]: + int 2a19082aaa55555555 <- ( d43210 , 2aaa55555555 ) + +[23,46]: + int 150c842aaa55555555 <- ( d43210 , eaaa55555555 ) + +[23,45]: + int 0a86420aaa55555555 <- ( d43210 , 0aaa55555555 ) + +[23,44]: + int 543210aaa55555555 <- ( d43210 , aaa55555555 ) + +[23,43]: + int 2a19082aa55555555 <- ( d43210 , 2aa55555555 ) + +[23,42]: + int 150c842aa55555555 <- ( d43210 , eaa55555555 ) + +[23,41]: + int 0a86420aa55555555 <- ( d43210 , 0aa55555555 ) + +[23,40]: + int 543210aa55555555 <- ( d43210 , aa55555555 ) + +[23,39]: + int 2a19082a55555555 <- ( d43210 , 2a55555555 ) + +[23,38]: + int 150c842a55555555 <- ( d43210 , ea55555555 ) + +[23,37]: + int 0a86420a55555555 <- ( d43210 , 0a55555555 ) + +[23,36]: + int 543210a55555555 <- ( d43210 , a55555555 ) + +[23,35]: + int 2a1908255555555 <- ( d43210 , 255555555 ) + +[23,34]: + int 150c84255555555 <- ( d43210 , e55555555 ) + +[23,33]: + int 0a8642055555555 <- ( d43210 , 055555555 ) + +[23,32]: + int 54321055555555 <- ( d43210 , 55555555 ) + +[23,31]: + int 2a190855555555 <- ( d43210 , d5555555 ) + +[23,30]: + int 150c8415555555 <- ( d43210 , 15555555 ) + +[23,29]: + int 0a864215555555 <- ( d43210 , f5555555 ) + +[23,28]: + int 5432105555555 <- ( d43210 , 5555555 ) + +[23,27]: + int 2a19085555555 <- ( d43210 , d555555 ) + +[23,26]: + int 150c841555555 <- ( d43210 , 1555555 ) + +[23,25]: + int 0a86421555555 <- ( d43210 , f555555 ) + +[23,24]: + int 543210555555 <- ( d43210 , 555555 ) + +[23,23]: + int 2a1908555555 <- ( d43210 , d55555 ) + +[23,22]: + int 150c84155555 <- ( d43210 , 155555 ) + +[23,21]: + int 0a8642155555 <- ( d43210 , f55555 ) + +[23,20]: + int 54321055555 <- ( d43210 , 55555 ) + +[23,19]: + int 2a190855555 <- ( d43210 , d5555 ) + +[23,18]: + int 150c8415555 <- ( d43210 , 15555 ) + +[23,17]: + int 0a864215555 <- ( d43210 , f5555 ) + +[23,16]: + int 5432105555 <- ( d43210 , 5555 ) + +[23,15]: + int 2a19085555 <- ( d43210 , d555 ) + +[23,14]: + int 150c841555 <- ( d43210 , 1555 ) + +[23,13]: + int 0a86421555 <- ( d43210 , f555 ) + +[23,12]: + int 543210555 <- ( d43210 , 555 ) + +[23,11]: + int 2a1908555 <- ( d43210 , d55 ) + +[23,10]: + int 150c84155 <- ( d43210 , 155 ) + +[23,9]: + int 0a8642155 <- ( d43210 , f55 ) + +[23,8]: + int 54321055 <- ( d43210 , 55 ) + +[23,7]: + int 2a190855 <- ( d43210 , d5 ) + +[23,6]: + int 150c8415 <- ( d43210 , 15 ) + +[23,5]: + int 0a864215 <- ( d43210 , f5 ) + +[23,4]: + int 5432105 <- ( d43210 , 5 ) + +[23,3]: + int 2a19085 <- ( d43210 , d ) + +[23,2]: + int 150c841 <- ( d43210 , 1 ) + +[23,1]: + int 0a86421 <- ( d43210 , f ) + +[22,64]: + int 143210aaaaaaaa55555555 <- ( 143210 , aaaaaaaa55555555 ) + +[22,63]: + int 0a19082aaaaaaa55555555 <- ( 143210 , 2aaaaaaa55555555 ) + +[22,62]: + int 050c842aaaaaaa55555555 <- ( 143210 , eaaaaaaa55555555 ) + +[22,61]: + int 286420aaaaaaa55555555 <- ( 143210 , 0aaaaaaa55555555 ) + +[22,60]: + int 143210aaaaaaa55555555 <- ( 143210 , aaaaaaa55555555 ) + +[22,59]: + int 0a19082aaaaaa55555555 <- ( 143210 , 2aaaaaa55555555 ) + +[22,58]: + int 050c842aaaaaa55555555 <- ( 143210 , eaaaaaa55555555 ) + +[22,57]: + int 286420aaaaaa55555555 <- ( 143210 , 0aaaaaa55555555 ) + +[22,56]: + int 143210aaaaaa55555555 <- ( 143210 , aaaaaa55555555 ) + +[22,55]: + int 0a19082aaaaa55555555 <- ( 143210 , 2aaaaa55555555 ) + +[22,54]: + int 050c842aaaaa55555555 <- ( 143210 , eaaaaa55555555 ) + +[22,53]: + int 286420aaaaa55555555 <- ( 143210 , 0aaaaa55555555 ) + +[22,52]: + int 143210aaaaa55555555 <- ( 143210 , aaaaa55555555 ) + +[22,51]: + int 0a19082aaaa55555555 <- ( 143210 , 2aaaa55555555 ) + +[22,50]: + int 050c842aaaa55555555 <- ( 143210 , eaaaa55555555 ) + +[22,49]: + int 286420aaaa55555555 <- ( 143210 , 0aaaa55555555 ) + +[22,48]: + int 143210aaaa55555555 <- ( 143210 , aaaa55555555 ) + +[22,47]: + int 0a19082aaa55555555 <- ( 143210 , 2aaa55555555 ) + +[22,46]: + int 050c842aaa55555555 <- ( 143210 , eaaa55555555 ) + +[22,45]: + int 286420aaa55555555 <- ( 143210 , 0aaa55555555 ) + +[22,44]: + int 143210aaa55555555 <- ( 143210 , aaa55555555 ) + +[22,43]: + int 0a19082aa55555555 <- ( 143210 , 2aa55555555 ) + +[22,42]: + int 050c842aa55555555 <- ( 143210 , eaa55555555 ) + +[22,41]: + int 286420aa55555555 <- ( 143210 , 0aa55555555 ) + +[22,40]: + int 143210aa55555555 <- ( 143210 , aa55555555 ) + +[22,39]: + int 0a19082a55555555 <- ( 143210 , 2a55555555 ) + +[22,38]: + int 050c842a55555555 <- ( 143210 , ea55555555 ) + +[22,37]: + int 286420a55555555 <- ( 143210 , 0a55555555 ) + +[22,36]: + int 143210a55555555 <- ( 143210 , a55555555 ) + +[22,35]: + int 0a1908255555555 <- ( 143210 , 255555555 ) + +[22,34]: + int 050c84255555555 <- ( 143210 , e55555555 ) + +[22,33]: + int 28642055555555 <- ( 143210 , 055555555 ) + +[22,32]: + int 14321055555555 <- ( 143210 , 55555555 ) + +[22,31]: + int 0a190855555555 <- ( 143210 , d5555555 ) + +[22,30]: + int 050c8415555555 <- ( 143210 , 15555555 ) + +[22,29]: + int 2864215555555 <- ( 143210 , f5555555 ) + +[22,28]: + int 1432105555555 <- ( 143210 , 5555555 ) + +[22,27]: + int 0a19085555555 <- ( 143210 , d555555 ) + +[22,26]: + int 050c841555555 <- ( 143210 , 1555555 ) + +[22,25]: + int 286421555555 <- ( 143210 , f555555 ) + +[22,24]: + int 143210555555 <- ( 143210 , 555555 ) + +[22,23]: + int 0a1908555555 <- ( 143210 , d55555 ) + +[22,22]: + int 050c84155555 <- ( 143210 , 155555 ) + +[22,21]: + int 28642155555 <- ( 143210 , f55555 ) + +[22,20]: + int 14321055555 <- ( 143210 , 55555 ) + +[22,19]: + int 0a190855555 <- ( 143210 , d5555 ) + +[22,18]: + int 050c8415555 <- ( 143210 , 15555 ) + +[22,17]: + int 2864215555 <- ( 143210 , f5555 ) + +[22,16]: + int 1432105555 <- ( 143210 , 5555 ) + +[22,15]: + int 0a19085555 <- ( 143210 , d555 ) + +[22,14]: + int 050c841555 <- ( 143210 , 1555 ) + +[22,13]: + int 286421555 <- ( 143210 , f555 ) + +[22,12]: + int 143210555 <- ( 143210 , 555 ) + +[22,11]: + int 0a1908555 <- ( 143210 , d55 ) + +[22,10]: + int 050c84155 <- ( 143210 , 155 ) + +[22,9]: + int 28642155 <- ( 143210 , f55 ) + +[22,8]: + int 14321055 <- ( 143210 , 55 ) + +[22,7]: + int 0a190855 <- ( 143210 , d5 ) + +[22,6]: + int 050c8415 <- ( 143210 , 15 ) + +[22,5]: + int 2864215 <- ( 143210 , f5 ) + +[22,4]: + int 1432105 <- ( 143210 , 5 ) + +[22,3]: + int 0a19085 <- ( 143210 , d ) + +[22,2]: + int 050c841 <- ( 143210 , 1 ) + +[22,1]: + int 286421 <- ( 143210 , f ) + +[21,64]: + int 143210aaaaaaaa55555555 <- ( f43210 , aaaaaaaa55555555 ) + +[21,63]: + int 0a19082aaaaaaa55555555 <- ( f43210 , 2aaaaaaa55555555 ) + +[21,62]: + int 50c842aaaaaaa55555555 <- ( f43210 , eaaaaaaa55555555 ) + +[21,61]: + int 286420aaaaaaa55555555 <- ( f43210 , 0aaaaaaa55555555 ) + +[21,60]: + int 143210aaaaaaa55555555 <- ( f43210 , aaaaaaa55555555 ) + +[21,59]: + int 0a19082aaaaaa55555555 <- ( f43210 , 2aaaaaa55555555 ) + +[21,58]: + int 50c842aaaaaa55555555 <- ( f43210 , eaaaaaa55555555 ) + +[21,57]: + int 286420aaaaaa55555555 <- ( f43210 , 0aaaaaa55555555 ) + +[21,56]: + int 143210aaaaaa55555555 <- ( f43210 , aaaaaa55555555 ) + +[21,55]: + int 0a19082aaaaa55555555 <- ( f43210 , 2aaaaa55555555 ) + +[21,54]: + int 50c842aaaaa55555555 <- ( f43210 , eaaaaa55555555 ) + +[21,53]: + int 286420aaaaa55555555 <- ( f43210 , 0aaaaa55555555 ) + +[21,52]: + int 143210aaaaa55555555 <- ( f43210 , aaaaa55555555 ) + +[21,51]: + int 0a19082aaaa55555555 <- ( f43210 , 2aaaa55555555 ) + +[21,50]: + int 50c842aaaa55555555 <- ( f43210 , eaaaa55555555 ) + +[21,49]: + int 286420aaaa55555555 <- ( f43210 , 0aaaa55555555 ) + +[21,48]: + int 143210aaaa55555555 <- ( f43210 , aaaa55555555 ) + +[21,47]: + int 0a19082aaa55555555 <- ( f43210 , 2aaa55555555 ) + +[21,46]: + int 50c842aaa55555555 <- ( f43210 , eaaa55555555 ) + +[21,45]: + int 286420aaa55555555 <- ( f43210 , 0aaa55555555 ) + +[21,44]: + int 143210aaa55555555 <- ( f43210 , aaa55555555 ) + +[21,43]: + int 0a19082aa55555555 <- ( f43210 , 2aa55555555 ) + +[21,42]: + int 50c842aa55555555 <- ( f43210 , eaa55555555 ) + +[21,41]: + int 286420aa55555555 <- ( f43210 , 0aa55555555 ) + +[21,40]: + int 143210aa55555555 <- ( f43210 , aa55555555 ) + +[21,39]: + int 0a19082a55555555 <- ( f43210 , 2a55555555 ) + +[21,38]: + int 50c842a55555555 <- ( f43210 , ea55555555 ) + +[21,37]: + int 286420a55555555 <- ( f43210 , 0a55555555 ) + +[21,36]: + int 143210a55555555 <- ( f43210 , a55555555 ) + +[21,35]: + int 0a1908255555555 <- ( f43210 , 255555555 ) + +[21,34]: + int 50c84255555555 <- ( f43210 , e55555555 ) + +[21,33]: + int 28642055555555 <- ( f43210 , 055555555 ) + +[21,32]: + int 14321055555555 <- ( f43210 , 55555555 ) + +[21,31]: + int 0a190855555555 <- ( f43210 , d5555555 ) + +[21,30]: + int 50c8415555555 <- ( f43210 , 15555555 ) + +[21,29]: + int 2864215555555 <- ( f43210 , f5555555 ) + +[21,28]: + int 1432105555555 <- ( f43210 , 5555555 ) + +[21,27]: + int 0a19085555555 <- ( f43210 , d555555 ) + +[21,26]: + int 50c841555555 <- ( f43210 , 1555555 ) + +[21,25]: + int 286421555555 <- ( f43210 , f555555 ) + +[21,24]: + int 143210555555 <- ( f43210 , 555555 ) + +[21,23]: + int 0a1908555555 <- ( f43210 , d55555 ) + +[21,22]: + int 50c84155555 <- ( f43210 , 155555 ) + +[21,21]: + int 28642155555 <- ( f43210 , f55555 ) + +[21,20]: + int 14321055555 <- ( f43210 , 55555 ) + +[21,19]: + int 0a190855555 <- ( f43210 , d5555 ) + +[21,18]: + int 50c8415555 <- ( f43210 , 15555 ) + +[21,17]: + int 2864215555 <- ( f43210 , f5555 ) + +[21,16]: + int 1432105555 <- ( f43210 , 5555 ) + +[21,15]: + int 0a19085555 <- ( f43210 , d555 ) + +[21,14]: + int 50c841555 <- ( f43210 , 1555 ) + +[21,13]: + int 286421555 <- ( f43210 , f555 ) + +[21,12]: + int 143210555 <- ( f43210 , 555 ) + +[21,11]: + int 0a1908555 <- ( f43210 , d55 ) + +[21,10]: + int 50c84155 <- ( f43210 , 155 ) + +[21,9]: + int 28642155 <- ( f43210 , f55 ) + +[21,8]: + int 14321055 <- ( f43210 , 55 ) + +[21,7]: + int 0a190855 <- ( f43210 , d5 ) + +[21,6]: + int 50c8415 <- ( f43210 , 15 ) + +[21,5]: + int 2864215 <- ( f43210 , f5 ) + +[21,4]: + int 1432105 <- ( f43210 , 5 ) + +[21,3]: + int 0a19085 <- ( f43210 , d ) + +[21,2]: + int 50c841 <- ( f43210 , 1 ) + +[21,1]: + int 286421 <- ( f43210 , f ) + +[20,64]: + int 043210aaaaaaaa55555555 <- ( 43210 , aaaaaaaa55555555 ) + +[20,63]: + int 219082aaaaaaa55555555 <- ( 43210 , 2aaaaaaa55555555 ) + +[20,62]: + int 10c842aaaaaaa55555555 <- ( 43210 , eaaaaaaa55555555 ) + +[20,61]: + int 086420aaaaaaa55555555 <- ( 43210 , 0aaaaaaa55555555 ) + +[20,60]: + int 043210aaaaaaa55555555 <- ( 43210 , aaaaaaa55555555 ) + +[20,59]: + int 219082aaaaaa55555555 <- ( 43210 , 2aaaaaa55555555 ) + +[20,58]: + int 10c842aaaaaa55555555 <- ( 43210 , eaaaaaa55555555 ) + +[20,57]: + int 086420aaaaaa55555555 <- ( 43210 , 0aaaaaa55555555 ) + +[20,56]: + int 043210aaaaaa55555555 <- ( 43210 , aaaaaa55555555 ) + +[20,55]: + int 219082aaaaa55555555 <- ( 43210 , 2aaaaa55555555 ) + +[20,54]: + int 10c842aaaaa55555555 <- ( 43210 , eaaaaa55555555 ) + +[20,53]: + int 086420aaaaa55555555 <- ( 43210 , 0aaaaa55555555 ) + +[20,52]: + int 043210aaaaa55555555 <- ( 43210 , aaaaa55555555 ) + +[20,51]: + int 219082aaaa55555555 <- ( 43210 , 2aaaa55555555 ) + +[20,50]: + int 10c842aaaa55555555 <- ( 43210 , eaaaa55555555 ) + +[20,49]: + int 086420aaaa55555555 <- ( 43210 , 0aaaa55555555 ) + +[20,48]: + int 043210aaaa55555555 <- ( 43210 , aaaa55555555 ) + +[20,47]: + int 219082aaa55555555 <- ( 43210 , 2aaa55555555 ) + +[20,46]: + int 10c842aaa55555555 <- ( 43210 , eaaa55555555 ) + +[20,45]: + int 086420aaa55555555 <- ( 43210 , 0aaa55555555 ) + +[20,44]: + int 043210aaa55555555 <- ( 43210 , aaa55555555 ) + +[20,43]: + int 219082aa55555555 <- ( 43210 , 2aa55555555 ) + +[20,42]: + int 10c842aa55555555 <- ( 43210 , eaa55555555 ) + +[20,41]: + int 086420aa55555555 <- ( 43210 , 0aa55555555 ) + +[20,40]: + int 043210aa55555555 <- ( 43210 , aa55555555 ) + +[20,39]: + int 219082a55555555 <- ( 43210 , 2a55555555 ) + +[20,38]: + int 10c842a55555555 <- ( 43210 , ea55555555 ) + +[20,37]: + int 086420a55555555 <- ( 43210 , 0a55555555 ) + +[20,36]: + int 043210a55555555 <- ( 43210 , a55555555 ) + +[20,35]: + int 21908255555555 <- ( 43210 , 255555555 ) + +[20,34]: + int 10c84255555555 <- ( 43210 , e55555555 ) + +[20,33]: + int 08642055555555 <- ( 43210 , 055555555 ) + +[20,32]: + int 04321055555555 <- ( 43210 , 55555555 ) + +[20,31]: + int 2190855555555 <- ( 43210 , d5555555 ) + +[20,30]: + int 10c8415555555 <- ( 43210 , 15555555 ) + +[20,29]: + int 0864215555555 <- ( 43210 , f5555555 ) + +[20,28]: + int 0432105555555 <- ( 43210 , 5555555 ) + +[20,27]: + int 219085555555 <- ( 43210 , d555555 ) + +[20,26]: + int 10c841555555 <- ( 43210 , 1555555 ) + +[20,25]: + int 086421555555 <- ( 43210 , f555555 ) + +[20,24]: + int 043210555555 <- ( 43210 , 555555 ) + +[20,23]: + int 21908555555 <- ( 43210 , d55555 ) + +[20,22]: + int 10c84155555 <- ( 43210 , 155555 ) + +[20,21]: + int 08642155555 <- ( 43210 , f55555 ) + +[20,20]: + int 04321055555 <- ( 43210 , 55555 ) + +[20,19]: + int 2190855555 <- ( 43210 , d5555 ) + +[20,18]: + int 10c8415555 <- ( 43210 , 15555 ) + +[20,17]: + int 0864215555 <- ( 43210 , f5555 ) + +[20,16]: + int 0432105555 <- ( 43210 , 5555 ) + +[20,15]: + int 219085555 <- ( 43210 , d555 ) + +[20,14]: + int 10c841555 <- ( 43210 , 1555 ) + +[20,13]: + int 086421555 <- ( 43210 , f555 ) + +[20,12]: + int 043210555 <- ( 43210 , 555 ) + +[20,11]: + int 21908555 <- ( 43210 , d55 ) + +[20,10]: + int 10c84155 <- ( 43210 , 155 ) + +[20,9]: + int 08642155 <- ( 43210 , f55 ) + +[20,8]: + int 04321055 <- ( 43210 , 55 ) + +[20,7]: + int 2190855 <- ( 43210 , d5 ) + +[20,6]: + int 10c8415 <- ( 43210 , 15 ) + +[20,5]: + int 0864215 <- ( 43210 , f5 ) + +[20,4]: + int 0432105 <- ( 43210 , 5 ) + +[20,3]: + int 219085 <- ( 43210 , d ) + +[20,2]: + int 10c841 <- ( 43210 , 1 ) + +[20,1]: + int 086421 <- ( 43210 , f ) + +[19,64]: + int 43210aaaaaaaa55555555 <- ( c3210 , aaaaaaaa55555555 ) + +[19,63]: + int 219082aaaaaaa55555555 <- ( c3210 , 2aaaaaaa55555555 ) + +[19,62]: + int 10c842aaaaaaa55555555 <- ( c3210 , eaaaaaaa55555555 ) + +[19,61]: + int 086420aaaaaaa55555555 <- ( c3210 , 0aaaaaaa55555555 ) + +[19,60]: + int 43210aaaaaaa55555555 <- ( c3210 , aaaaaaa55555555 ) + +[19,59]: + int 219082aaaaaa55555555 <- ( c3210 , 2aaaaaa55555555 ) + +[19,58]: + int 10c842aaaaaa55555555 <- ( c3210 , eaaaaaa55555555 ) + +[19,57]: + int 086420aaaaaa55555555 <- ( c3210 , 0aaaaaa55555555 ) + +[19,56]: + int 43210aaaaaa55555555 <- ( c3210 , aaaaaa55555555 ) + +[19,55]: + int 219082aaaaa55555555 <- ( c3210 , 2aaaaa55555555 ) + +[19,54]: + int 10c842aaaaa55555555 <- ( c3210 , eaaaaa55555555 ) + +[19,53]: + int 086420aaaaa55555555 <- ( c3210 , 0aaaaa55555555 ) + +[19,52]: + int 43210aaaaa55555555 <- ( c3210 , aaaaa55555555 ) + +[19,51]: + int 219082aaaa55555555 <- ( c3210 , 2aaaa55555555 ) + +[19,50]: + int 10c842aaaa55555555 <- ( c3210 , eaaaa55555555 ) + +[19,49]: + int 086420aaaa55555555 <- ( c3210 , 0aaaa55555555 ) + +[19,48]: + int 43210aaaa55555555 <- ( c3210 , aaaa55555555 ) + +[19,47]: + int 219082aaa55555555 <- ( c3210 , 2aaa55555555 ) + +[19,46]: + int 10c842aaa55555555 <- ( c3210 , eaaa55555555 ) + +[19,45]: + int 086420aaa55555555 <- ( c3210 , 0aaa55555555 ) + +[19,44]: + int 43210aaa55555555 <- ( c3210 , aaa55555555 ) + +[19,43]: + int 219082aa55555555 <- ( c3210 , 2aa55555555 ) + +[19,42]: + int 10c842aa55555555 <- ( c3210 , eaa55555555 ) + +[19,41]: + int 086420aa55555555 <- ( c3210 , 0aa55555555 ) + +[19,40]: + int 43210aa55555555 <- ( c3210 , aa55555555 ) + +[19,39]: + int 219082a55555555 <- ( c3210 , 2a55555555 ) + +[19,38]: + int 10c842a55555555 <- ( c3210 , ea55555555 ) + +[19,37]: + int 086420a55555555 <- ( c3210 , 0a55555555 ) + +[19,36]: + int 43210a55555555 <- ( c3210 , a55555555 ) + +[19,35]: + int 21908255555555 <- ( c3210 , 255555555 ) + +[19,34]: + int 10c84255555555 <- ( c3210 , e55555555 ) + +[19,33]: + int 08642055555555 <- ( c3210 , 055555555 ) + +[19,32]: + int 4321055555555 <- ( c3210 , 55555555 ) + +[19,31]: + int 2190855555555 <- ( c3210 , d5555555 ) + +[19,30]: + int 10c8415555555 <- ( c3210 , 15555555 ) + +[19,29]: + int 0864215555555 <- ( c3210 , f5555555 ) + +[19,28]: + int 432105555555 <- ( c3210 , 5555555 ) + +[19,27]: + int 219085555555 <- ( c3210 , d555555 ) + +[19,26]: + int 10c841555555 <- ( c3210 , 1555555 ) + +[19,25]: + int 086421555555 <- ( c3210 , f555555 ) + +[19,24]: + int 43210555555 <- ( c3210 , 555555 ) + +[19,23]: + int 21908555555 <- ( c3210 , d55555 ) + +[19,22]: + int 10c84155555 <- ( c3210 , 155555 ) + +[19,21]: + int 08642155555 <- ( c3210 , f55555 ) + +[19,20]: + int 4321055555 <- ( c3210 , 55555 ) + +[19,19]: + int 2190855555 <- ( c3210 , d5555 ) + +[19,18]: + int 10c8415555 <- ( c3210 , 15555 ) + +[19,17]: + int 0864215555 <- ( c3210 , f5555 ) + +[19,16]: + int 432105555 <- ( c3210 , 5555 ) + +[19,15]: + int 219085555 <- ( c3210 , d555 ) + +[19,14]: + int 10c841555 <- ( c3210 , 1555 ) + +[19,13]: + int 086421555 <- ( c3210 , f555 ) + +[19,12]: + int 43210555 <- ( c3210 , 555 ) + +[19,11]: + int 21908555 <- ( c3210 , d55 ) + +[19,10]: + int 10c84155 <- ( c3210 , 155 ) + +[19,9]: + int 08642155 <- ( c3210 , f55 ) + +[19,8]: + int 4321055 <- ( c3210 , 55 ) + +[19,7]: + int 2190855 <- ( c3210 , d5 ) + +[19,6]: + int 10c8415 <- ( c3210 , 15 ) + +[19,5]: + int 0864215 <- ( c3210 , f5 ) + +[19,4]: + int 432105 <- ( c3210 , 5 ) + +[19,3]: + int 219085 <- ( c3210 , d ) + +[19,2]: + int 10c841 <- ( c3210 , 1 ) + +[19,1]: + int 086421 <- ( c3210 , f ) + +[18,64]: + int 03210aaaaaaaa55555555 <- ( 03210 , aaaaaaaa55555555 ) + +[18,63]: + int 019082aaaaaaa55555555 <- ( 03210 , 2aaaaaaa55555555 ) + +[18,62]: + int 00c842aaaaaaa55555555 <- ( 03210 , eaaaaaaa55555555 ) + +[18,61]: + int 06420aaaaaaa55555555 <- ( 03210 , 0aaaaaaa55555555 ) + +[18,60]: + int 03210aaaaaaa55555555 <- ( 03210 , aaaaaaa55555555 ) + +[18,59]: + int 019082aaaaaa55555555 <- ( 03210 , 2aaaaaa55555555 ) + +[18,58]: + int 00c842aaaaaa55555555 <- ( 03210 , eaaaaaa55555555 ) + +[18,57]: + int 06420aaaaaa55555555 <- ( 03210 , 0aaaaaa55555555 ) + +[18,56]: + int 03210aaaaaa55555555 <- ( 03210 , aaaaaa55555555 ) + +[18,55]: + int 019082aaaaa55555555 <- ( 03210 , 2aaaaa55555555 ) + +[18,54]: + int 00c842aaaaa55555555 <- ( 03210 , eaaaaa55555555 ) + +[18,53]: + int 06420aaaaa55555555 <- ( 03210 , 0aaaaa55555555 ) + +[18,52]: + int 03210aaaaa55555555 <- ( 03210 , aaaaa55555555 ) + +[18,51]: + int 019082aaaa55555555 <- ( 03210 , 2aaaa55555555 ) + +[18,50]: + int 00c842aaaa55555555 <- ( 03210 , eaaaa55555555 ) + +[18,49]: + int 06420aaaa55555555 <- ( 03210 , 0aaaa55555555 ) + +[18,48]: + int 03210aaaa55555555 <- ( 03210 , aaaa55555555 ) + +[18,47]: + int 019082aaa55555555 <- ( 03210 , 2aaa55555555 ) + +[18,46]: + int 00c842aaa55555555 <- ( 03210 , eaaa55555555 ) + +[18,45]: + int 06420aaa55555555 <- ( 03210 , 0aaa55555555 ) + +[18,44]: + int 03210aaa55555555 <- ( 03210 , aaa55555555 ) + +[18,43]: + int 019082aa55555555 <- ( 03210 , 2aa55555555 ) + +[18,42]: + int 00c842aa55555555 <- ( 03210 , eaa55555555 ) + +[18,41]: + int 06420aa55555555 <- ( 03210 , 0aa55555555 ) + +[18,40]: + int 03210aa55555555 <- ( 03210 , aa55555555 ) + +[18,39]: + int 019082a55555555 <- ( 03210 , 2a55555555 ) + +[18,38]: + int 00c842a55555555 <- ( 03210 , ea55555555 ) + +[18,37]: + int 06420a55555555 <- ( 03210 , 0a55555555 ) + +[18,36]: + int 03210a55555555 <- ( 03210 , a55555555 ) + +[18,35]: + int 01908255555555 <- ( 03210 , 255555555 ) + +[18,34]: + int 00c84255555555 <- ( 03210 , e55555555 ) + +[18,33]: + int 0642055555555 <- ( 03210 , 055555555 ) + +[18,32]: + int 0321055555555 <- ( 03210 , 55555555 ) + +[18,31]: + int 0190855555555 <- ( 03210 , d5555555 ) + +[18,30]: + int 00c8415555555 <- ( 03210 , 15555555 ) + +[18,29]: + int 064215555555 <- ( 03210 , f5555555 ) + +[18,28]: + int 032105555555 <- ( 03210 , 5555555 ) + +[18,27]: + int 019085555555 <- ( 03210 , d555555 ) + +[18,26]: + int 00c841555555 <- ( 03210 , 1555555 ) + +[18,25]: + int 06421555555 <- ( 03210 , f555555 ) + +[18,24]: + int 03210555555 <- ( 03210 , 555555 ) + +[18,23]: + int 01908555555 <- ( 03210 , d55555 ) + +[18,22]: + int 00c84155555 <- ( 03210 , 155555 ) + +[18,21]: + int 0642155555 <- ( 03210 , f55555 ) + +[18,20]: + int 0321055555 <- ( 03210 , 55555 ) + +[18,19]: + int 0190855555 <- ( 03210 , d5555 ) + +[18,18]: + int 00c8415555 <- ( 03210 , 15555 ) + +[18,17]: + int 064215555 <- ( 03210 , f5555 ) + +[18,16]: + int 032105555 <- ( 03210 , 5555 ) + +[18,15]: + int 019085555 <- ( 03210 , d555 ) + +[18,14]: + int 00c841555 <- ( 03210 , 1555 ) + +[18,13]: + int 06421555 <- ( 03210 , f555 ) + +[18,12]: + int 03210555 <- ( 03210 , 555 ) + +[18,11]: + int 01908555 <- ( 03210 , d55 ) + +[18,10]: + int 00c84155 <- ( 03210 , 155 ) + +[18,9]: + int 0642155 <- ( 03210 , f55 ) + +[18,8]: + int 0321055 <- ( 03210 , 55 ) + +[18,7]: + int 0190855 <- ( 03210 , d5 ) + +[18,6]: + int 00c8415 <- ( 03210 , 15 ) + +[18,5]: + int 064215 <- ( 03210 , f5 ) + +[18,4]: + int 032105 <- ( 03210 , 5 ) + +[18,3]: + int 019085 <- ( 03210 , d ) + +[18,2]: + int 00c841 <- ( 03210 , 1 ) + +[18,1]: + int 06421 <- ( 03210 , f ) + +[17,64]: + int 03210aaaaaaaa55555555 <- ( 03210 , aaaaaaaa55555555 ) + +[17,63]: + int 019082aaaaaaa55555555 <- ( 03210 , 2aaaaaaa55555555 ) + +[17,62]: + int 0c842aaaaaaa55555555 <- ( 03210 , eaaaaaaa55555555 ) + +[17,61]: + int 06420aaaaaaa55555555 <- ( 03210 , 0aaaaaaa55555555 ) + +[17,60]: + int 03210aaaaaaa55555555 <- ( 03210 , aaaaaaa55555555 ) + +[17,59]: + int 019082aaaaaa55555555 <- ( 03210 , 2aaaaaa55555555 ) + +[17,58]: + int 0c842aaaaaa55555555 <- ( 03210 , eaaaaaa55555555 ) + +[17,57]: + int 06420aaaaaa55555555 <- ( 03210 , 0aaaaaa55555555 ) + +[17,56]: + int 03210aaaaaa55555555 <- ( 03210 , aaaaaa55555555 ) + +[17,55]: + int 019082aaaaa55555555 <- ( 03210 , 2aaaaa55555555 ) + +[17,54]: + int 0c842aaaaa55555555 <- ( 03210 , eaaaaa55555555 ) + +[17,53]: + int 06420aaaaa55555555 <- ( 03210 , 0aaaaa55555555 ) + +[17,52]: + int 03210aaaaa55555555 <- ( 03210 , aaaaa55555555 ) + +[17,51]: + int 019082aaaa55555555 <- ( 03210 , 2aaaa55555555 ) + +[17,50]: + int 0c842aaaa55555555 <- ( 03210 , eaaaa55555555 ) + +[17,49]: + int 06420aaaa55555555 <- ( 03210 , 0aaaa55555555 ) + +[17,48]: + int 03210aaaa55555555 <- ( 03210 , aaaa55555555 ) + +[17,47]: + int 019082aaa55555555 <- ( 03210 , 2aaa55555555 ) + +[17,46]: + int 0c842aaa55555555 <- ( 03210 , eaaa55555555 ) + +[17,45]: + int 06420aaa55555555 <- ( 03210 , 0aaa55555555 ) + +[17,44]: + int 03210aaa55555555 <- ( 03210 , aaa55555555 ) + +[17,43]: + int 019082aa55555555 <- ( 03210 , 2aa55555555 ) + +[17,42]: + int 0c842aa55555555 <- ( 03210 , eaa55555555 ) + +[17,41]: + int 06420aa55555555 <- ( 03210 , 0aa55555555 ) + +[17,40]: + int 03210aa55555555 <- ( 03210 , aa55555555 ) + +[17,39]: + int 019082a55555555 <- ( 03210 , 2a55555555 ) + +[17,38]: + int 0c842a55555555 <- ( 03210 , ea55555555 ) + +[17,37]: + int 06420a55555555 <- ( 03210 , 0a55555555 ) + +[17,36]: + int 03210a55555555 <- ( 03210 , a55555555 ) + +[17,35]: + int 01908255555555 <- ( 03210 , 255555555 ) + +[17,34]: + int 0c84255555555 <- ( 03210 , e55555555 ) + +[17,33]: + int 0642055555555 <- ( 03210 , 055555555 ) + +[17,32]: + int 0321055555555 <- ( 03210 , 55555555 ) + +[17,31]: + int 0190855555555 <- ( 03210 , d5555555 ) + +[17,30]: + int 0c8415555555 <- ( 03210 , 15555555 ) + +[17,29]: + int 064215555555 <- ( 03210 , f5555555 ) + +[17,28]: + int 032105555555 <- ( 03210 , 5555555 ) + +[17,27]: + int 019085555555 <- ( 03210 , d555555 ) + +[17,26]: + int 0c841555555 <- ( 03210 , 1555555 ) + +[17,25]: + int 06421555555 <- ( 03210 , f555555 ) + +[17,24]: + int 03210555555 <- ( 03210 , 555555 ) + +[17,23]: + int 01908555555 <- ( 03210 , d55555 ) + +[17,22]: + int 0c84155555 <- ( 03210 , 155555 ) + +[17,21]: + int 0642155555 <- ( 03210 , f55555 ) + +[17,20]: + int 0321055555 <- ( 03210 , 55555 ) + +[17,19]: + int 0190855555 <- ( 03210 , d5555 ) + +[17,18]: + int 0c8415555 <- ( 03210 , 15555 ) + +[17,17]: + int 064215555 <- ( 03210 , f5555 ) + +[17,16]: + int 032105555 <- ( 03210 , 5555 ) + +[17,15]: + int 019085555 <- ( 03210 , d555 ) + +[17,14]: + int 0c841555 <- ( 03210 , 1555 ) + +[17,13]: + int 06421555 <- ( 03210 , f555 ) + +[17,12]: + int 03210555 <- ( 03210 , 555 ) + +[17,11]: + int 01908555 <- ( 03210 , d55 ) + +[17,10]: + int 0c84155 <- ( 03210 , 155 ) + +[17,9]: + int 0642155 <- ( 03210 , f55 ) + +[17,8]: + int 0321055 <- ( 03210 , 55 ) + +[17,7]: + int 0190855 <- ( 03210 , d5 ) + +[17,6]: + int 0c8415 <- ( 03210 , 15 ) + +[17,5]: + int 064215 <- ( 03210 , f5 ) + +[17,4]: + int 032105 <- ( 03210 , 5 ) + +[17,3]: + int 019085 <- ( 03210 , d ) + +[17,2]: + int 0c841 <- ( 03210 , 1 ) + +[17,1]: + int 06421 <- ( 03210 , f ) + +[16,64]: + int 03210aaaaaaaa55555555 <- ( 3210 , aaaaaaaa55555555 ) + +[16,63]: + int 19082aaaaaaa55555555 <- ( 3210 , 2aaaaaaa55555555 ) + +[16,62]: + int 0c842aaaaaaa55555555 <- ( 3210 , eaaaaaaa55555555 ) + +[16,61]: + int 06420aaaaaaa55555555 <- ( 3210 , 0aaaaaaa55555555 ) + +[16,60]: + int 03210aaaaaaa55555555 <- ( 3210 , aaaaaaa55555555 ) + +[16,59]: + int 19082aaaaaa55555555 <- ( 3210 , 2aaaaaa55555555 ) + +[16,58]: + int 0c842aaaaaa55555555 <- ( 3210 , eaaaaaa55555555 ) + +[16,57]: + int 06420aaaaaa55555555 <- ( 3210 , 0aaaaaa55555555 ) + +[16,56]: + int 03210aaaaaa55555555 <- ( 3210 , aaaaaa55555555 ) + +[16,55]: + int 19082aaaaa55555555 <- ( 3210 , 2aaaaa55555555 ) + +[16,54]: + int 0c842aaaaa55555555 <- ( 3210 , eaaaaa55555555 ) + +[16,53]: + int 06420aaaaa55555555 <- ( 3210 , 0aaaaa55555555 ) + +[16,52]: + int 03210aaaaa55555555 <- ( 3210 , aaaaa55555555 ) + +[16,51]: + int 19082aaaa55555555 <- ( 3210 , 2aaaa55555555 ) + +[16,50]: + int 0c842aaaa55555555 <- ( 3210 , eaaaa55555555 ) + +[16,49]: + int 06420aaaa55555555 <- ( 3210 , 0aaaa55555555 ) + +[16,48]: + int 03210aaaa55555555 <- ( 3210 , aaaa55555555 ) + +[16,47]: + int 19082aaa55555555 <- ( 3210 , 2aaa55555555 ) + +[16,46]: + int 0c842aaa55555555 <- ( 3210 , eaaa55555555 ) + +[16,45]: + int 06420aaa55555555 <- ( 3210 , 0aaa55555555 ) + +[16,44]: + int 03210aaa55555555 <- ( 3210 , aaa55555555 ) + +[16,43]: + int 19082aa55555555 <- ( 3210 , 2aa55555555 ) + +[16,42]: + int 0c842aa55555555 <- ( 3210 , eaa55555555 ) + +[16,41]: + int 06420aa55555555 <- ( 3210 , 0aa55555555 ) + +[16,40]: + int 03210aa55555555 <- ( 3210 , aa55555555 ) + +[16,39]: + int 19082a55555555 <- ( 3210 , 2a55555555 ) + +[16,38]: + int 0c842a55555555 <- ( 3210 , ea55555555 ) + +[16,37]: + int 06420a55555555 <- ( 3210 , 0a55555555 ) + +[16,36]: + int 03210a55555555 <- ( 3210 , a55555555 ) + +[16,35]: + int 1908255555555 <- ( 3210 , 255555555 ) + +[16,34]: + int 0c84255555555 <- ( 3210 , e55555555 ) + +[16,33]: + int 0642055555555 <- ( 3210 , 055555555 ) + +[16,32]: + int 0321055555555 <- ( 3210 , 55555555 ) + +[16,31]: + int 190855555555 <- ( 3210 , d5555555 ) + +[16,30]: + int 0c8415555555 <- ( 3210 , 15555555 ) + +[16,29]: + int 064215555555 <- ( 3210 , f5555555 ) + +[16,28]: + int 032105555555 <- ( 3210 , 5555555 ) + +[16,27]: + int 19085555555 <- ( 3210 , d555555 ) + +[16,26]: + int 0c841555555 <- ( 3210 , 1555555 ) + +[16,25]: + int 06421555555 <- ( 3210 , f555555 ) + +[16,24]: + int 03210555555 <- ( 3210 , 555555 ) + +[16,23]: + int 1908555555 <- ( 3210 , d55555 ) + +[16,22]: + int 0c84155555 <- ( 3210 , 155555 ) + +[16,21]: + int 0642155555 <- ( 3210 , f55555 ) + +[16,20]: + int 0321055555 <- ( 3210 , 55555 ) + +[16,19]: + int 190855555 <- ( 3210 , d5555 ) + +[16,18]: + int 0c8415555 <- ( 3210 , 15555 ) + +[16,17]: + int 064215555 <- ( 3210 , f5555 ) + +[16,16]: + int 032105555 <- ( 3210 , 5555 ) + +[16,15]: + int 19085555 <- ( 3210 , d555 ) + +[16,14]: + int 0c841555 <- ( 3210 , 1555 ) + +[16,13]: + int 06421555 <- ( 3210 , f555 ) + +[16,12]: + int 03210555 <- ( 3210 , 555 ) + +[16,11]: + int 1908555 <- ( 3210 , d55 ) + +[16,10]: + int 0c84155 <- ( 3210 , 155 ) + +[16,9]: + int 0642155 <- ( 3210 , f55 ) + +[16,8]: + int 0321055 <- ( 3210 , 55 ) + +[16,7]: + int 190855 <- ( 3210 , d5 ) + +[16,6]: + int 0c8415 <- ( 3210 , 15 ) + +[16,5]: + int 064215 <- ( 3210 , f5 ) + +[16,4]: + int 032105 <- ( 3210 , 5 ) + +[16,3]: + int 19085 <- ( 3210 , d ) + +[16,2]: + int 0c841 <- ( 3210 , 1 ) + +[16,1]: + int 06421 <- ( 3210 , f ) + +[15,64]: + int 3210aaaaaaaa55555555 <- ( 3210 , aaaaaaaa55555555 ) + +[15,63]: + int 19082aaaaaaa55555555 <- ( 3210 , 2aaaaaaa55555555 ) + +[15,62]: + int 0c842aaaaaaa55555555 <- ( 3210 , eaaaaaaa55555555 ) + +[15,61]: + int 06420aaaaaaa55555555 <- ( 3210 , 0aaaaaaa55555555 ) + +[15,60]: + int 3210aaaaaaa55555555 <- ( 3210 , aaaaaaa55555555 ) + +[15,59]: + int 19082aaaaaa55555555 <- ( 3210 , 2aaaaaa55555555 ) + +[15,58]: + int 0c842aaaaaa55555555 <- ( 3210 , eaaaaaa55555555 ) + +[15,57]: + int 06420aaaaaa55555555 <- ( 3210 , 0aaaaaa55555555 ) + +[15,56]: + int 3210aaaaaa55555555 <- ( 3210 , aaaaaa55555555 ) + +[15,55]: + int 19082aaaaa55555555 <- ( 3210 , 2aaaaa55555555 ) + +[15,54]: + int 0c842aaaaa55555555 <- ( 3210 , eaaaaa55555555 ) + +[15,53]: + int 06420aaaaa55555555 <- ( 3210 , 0aaaaa55555555 ) + +[15,52]: + int 3210aaaaa55555555 <- ( 3210 , aaaaa55555555 ) + +[15,51]: + int 19082aaaa55555555 <- ( 3210 , 2aaaa55555555 ) + +[15,50]: + int 0c842aaaa55555555 <- ( 3210 , eaaaa55555555 ) + +[15,49]: + int 06420aaaa55555555 <- ( 3210 , 0aaaa55555555 ) + +[15,48]: + int 3210aaaa55555555 <- ( 3210 , aaaa55555555 ) + +[15,47]: + int 19082aaa55555555 <- ( 3210 , 2aaa55555555 ) + +[15,46]: + int 0c842aaa55555555 <- ( 3210 , eaaa55555555 ) + +[15,45]: + int 06420aaa55555555 <- ( 3210 , 0aaa55555555 ) + +[15,44]: + int 3210aaa55555555 <- ( 3210 , aaa55555555 ) + +[15,43]: + int 19082aa55555555 <- ( 3210 , 2aa55555555 ) + +[15,42]: + int 0c842aa55555555 <- ( 3210 , eaa55555555 ) + +[15,41]: + int 06420aa55555555 <- ( 3210 , 0aa55555555 ) + +[15,40]: + int 3210aa55555555 <- ( 3210 , aa55555555 ) + +[15,39]: + int 19082a55555555 <- ( 3210 , 2a55555555 ) + +[15,38]: + int 0c842a55555555 <- ( 3210 , ea55555555 ) + +[15,37]: + int 06420a55555555 <- ( 3210 , 0a55555555 ) + +[15,36]: + int 3210a55555555 <- ( 3210 , a55555555 ) + +[15,35]: + int 1908255555555 <- ( 3210 , 255555555 ) + +[15,34]: + int 0c84255555555 <- ( 3210 , e55555555 ) + +[15,33]: + int 0642055555555 <- ( 3210 , 055555555 ) + +[15,32]: + int 321055555555 <- ( 3210 , 55555555 ) + +[15,31]: + int 190855555555 <- ( 3210 , d5555555 ) + +[15,30]: + int 0c8415555555 <- ( 3210 , 15555555 ) + +[15,29]: + int 064215555555 <- ( 3210 , f5555555 ) + +[15,28]: + int 32105555555 <- ( 3210 , 5555555 ) + +[15,27]: + int 19085555555 <- ( 3210 , d555555 ) + +[15,26]: + int 0c841555555 <- ( 3210 , 1555555 ) + +[15,25]: + int 06421555555 <- ( 3210 , f555555 ) + +[15,24]: + int 3210555555 <- ( 3210 , 555555 ) + +[15,23]: + int 1908555555 <- ( 3210 , d55555 ) + +[15,22]: + int 0c84155555 <- ( 3210 , 155555 ) + +[15,21]: + int 0642155555 <- ( 3210 , f55555 ) + +[15,20]: + int 321055555 <- ( 3210 , 55555 ) + +[15,19]: + int 190855555 <- ( 3210 , d5555 ) + +[15,18]: + int 0c8415555 <- ( 3210 , 15555 ) + +[15,17]: + int 064215555 <- ( 3210 , f5555 ) + +[15,16]: + int 32105555 <- ( 3210 , 5555 ) + +[15,15]: + int 19085555 <- ( 3210 , d555 ) + +[15,14]: + int 0c841555 <- ( 3210 , 1555 ) + +[15,13]: + int 06421555 <- ( 3210 , f555 ) + +[15,12]: + int 3210555 <- ( 3210 , 555 ) + +[15,11]: + int 1908555 <- ( 3210 , d55 ) + +[15,10]: + int 0c84155 <- ( 3210 , 155 ) + +[15,9]: + int 0642155 <- ( 3210 , f55 ) + +[15,8]: + int 321055 <- ( 3210 , 55 ) + +[15,7]: + int 190855 <- ( 3210 , d5 ) + +[15,6]: + int 0c8415 <- ( 3210 , 15 ) + +[15,5]: + int 064215 <- ( 3210 , f5 ) + +[15,4]: + int 32105 <- ( 3210 , 5 ) + +[15,3]: + int 19085 <- ( 3210 , d ) + +[15,2]: + int 0c841 <- ( 3210 , 1 ) + +[15,1]: + int 06421 <- ( 3210 , f ) + +[14,64]: + int 3210aaaaaaaa55555555 <- ( f210 , aaaaaaaa55555555 ) + +[14,63]: + int 19082aaaaaaa55555555 <- ( f210 , 2aaaaaaa55555555 ) + +[14,62]: + int 0c842aaaaaaa55555555 <- ( f210 , eaaaaaaa55555555 ) + +[14,61]: + int 6420aaaaaaa55555555 <- ( f210 , 0aaaaaaa55555555 ) + +[14,60]: + int 3210aaaaaaa55555555 <- ( f210 , aaaaaaa55555555 ) + +[14,59]: + int 19082aaaaaa55555555 <- ( f210 , 2aaaaaa55555555 ) + +[14,58]: + int 0c842aaaaaa55555555 <- ( f210 , eaaaaaa55555555 ) + +[14,57]: + int 6420aaaaaa55555555 <- ( f210 , 0aaaaaa55555555 ) + +[14,56]: + int 3210aaaaaa55555555 <- ( f210 , aaaaaa55555555 ) + +[14,55]: + int 19082aaaaa55555555 <- ( f210 , 2aaaaa55555555 ) + +[14,54]: + int 0c842aaaaa55555555 <- ( f210 , eaaaaa55555555 ) + +[14,53]: + int 6420aaaaa55555555 <- ( f210 , 0aaaaa55555555 ) + +[14,52]: + int 3210aaaaa55555555 <- ( f210 , aaaaa55555555 ) + +[14,51]: + int 19082aaaa55555555 <- ( f210 , 2aaaa55555555 ) + +[14,50]: + int 0c842aaaa55555555 <- ( f210 , eaaaa55555555 ) + +[14,49]: + int 6420aaaa55555555 <- ( f210 , 0aaaa55555555 ) + +[14,48]: + int 3210aaaa55555555 <- ( f210 , aaaa55555555 ) + +[14,47]: + int 19082aaa55555555 <- ( f210 , 2aaa55555555 ) + +[14,46]: + int 0c842aaa55555555 <- ( f210 , eaaa55555555 ) + +[14,45]: + int 6420aaa55555555 <- ( f210 , 0aaa55555555 ) + +[14,44]: + int 3210aaa55555555 <- ( f210 , aaa55555555 ) + +[14,43]: + int 19082aa55555555 <- ( f210 , 2aa55555555 ) + +[14,42]: + int 0c842aa55555555 <- ( f210 , eaa55555555 ) + +[14,41]: + int 6420aa55555555 <- ( f210 , 0aa55555555 ) + +[14,40]: + int 3210aa55555555 <- ( f210 , aa55555555 ) + +[14,39]: + int 19082a55555555 <- ( f210 , 2a55555555 ) + +[14,38]: + int 0c842a55555555 <- ( f210 , ea55555555 ) + +[14,37]: + int 6420a55555555 <- ( f210 , 0a55555555 ) + +[14,36]: + int 3210a55555555 <- ( f210 , a55555555 ) + +[14,35]: + int 1908255555555 <- ( f210 , 255555555 ) + +[14,34]: + int 0c84255555555 <- ( f210 , e55555555 ) + +[14,33]: + int 642055555555 <- ( f210 , 055555555 ) + +[14,32]: + int 321055555555 <- ( f210 , 55555555 ) + +[14,31]: + int 190855555555 <- ( f210 , d5555555 ) + +[14,30]: + int 0c8415555555 <- ( f210 , 15555555 ) + +[14,29]: + int 64215555555 <- ( f210 , f5555555 ) + +[14,28]: + int 32105555555 <- ( f210 , 5555555 ) + +[14,27]: + int 19085555555 <- ( f210 , d555555 ) + +[14,26]: + int 0c841555555 <- ( f210 , 1555555 ) + +[14,25]: + int 6421555555 <- ( f210 , f555555 ) + +[14,24]: + int 3210555555 <- ( f210 , 555555 ) + +[14,23]: + int 1908555555 <- ( f210 , d55555 ) + +[14,22]: + int 0c84155555 <- ( f210 , 155555 ) + +[14,21]: + int 642155555 <- ( f210 , f55555 ) + +[14,20]: + int 321055555 <- ( f210 , 55555 ) + +[14,19]: + int 190855555 <- ( f210 , d5555 ) + +[14,18]: + int 0c8415555 <- ( f210 , 15555 ) + +[14,17]: + int 64215555 <- ( f210 , f5555 ) + +[14,16]: + int 32105555 <- ( f210 , 5555 ) + +[14,15]: + int 19085555 <- ( f210 , d555 ) + +[14,14]: + int 0c841555 <- ( f210 , 1555 ) + +[14,13]: + int 6421555 <- ( f210 , f555 ) + +[14,12]: + int 3210555 <- ( f210 , 555 ) + +[14,11]: + int 1908555 <- ( f210 , d55 ) + +[14,10]: + int 0c84155 <- ( f210 , 155 ) + +[14,9]: + int 642155 <- ( f210 , f55 ) + +[14,8]: + int 321055 <- ( f210 , 55 ) + +[14,7]: + int 190855 <- ( f210 , d5 ) + +[14,6]: + int 0c8415 <- ( f210 , 15 ) + +[14,5]: + int 64215 <- ( f210 , f5 ) + +[14,4]: + int 32105 <- ( f210 , 5 ) + +[14,3]: + int 19085 <- ( f210 , d ) + +[14,2]: + int 0c841 <- ( f210 , 1 ) + +[14,1]: + int 6421 <- ( f210 , f ) + +[13,64]: + int 1210aaaaaaaa55555555 <- ( f210 , aaaaaaaa55555555 ) + +[13,63]: + int 09082aaaaaaa55555555 <- ( f210 , 2aaaaaaa55555555 ) + +[13,62]: + int 4842aaaaaaa55555555 <- ( f210 , eaaaaaaa55555555 ) + +[13,61]: + int 2420aaaaaaa55555555 <- ( f210 , 0aaaaaaa55555555 ) + +[13,60]: + int 1210aaaaaaa55555555 <- ( f210 , aaaaaaa55555555 ) + +[13,59]: + int 09082aaaaaa55555555 <- ( f210 , 2aaaaaa55555555 ) + +[13,58]: + int 4842aaaaaa55555555 <- ( f210 , eaaaaaa55555555 ) + +[13,57]: + int 2420aaaaaa55555555 <- ( f210 , 0aaaaaa55555555 ) + +[13,56]: + int 1210aaaaaa55555555 <- ( f210 , aaaaaa55555555 ) + +[13,55]: + int 09082aaaaa55555555 <- ( f210 , 2aaaaa55555555 ) + +[13,54]: + int 4842aaaaa55555555 <- ( f210 , eaaaaa55555555 ) + +[13,53]: + int 2420aaaaa55555555 <- ( f210 , 0aaaaa55555555 ) + +[13,52]: + int 1210aaaaa55555555 <- ( f210 , aaaaa55555555 ) + +[13,51]: + int 09082aaaa55555555 <- ( f210 , 2aaaa55555555 ) + +[13,50]: + int 4842aaaa55555555 <- ( f210 , eaaaa55555555 ) + +[13,49]: + int 2420aaaa55555555 <- ( f210 , 0aaaa55555555 ) + +[13,48]: + int 1210aaaa55555555 <- ( f210 , aaaa55555555 ) + +[13,47]: + int 09082aaa55555555 <- ( f210 , 2aaa55555555 ) + +[13,46]: + int 4842aaa55555555 <- ( f210 , eaaa55555555 ) + +[13,45]: + int 2420aaa55555555 <- ( f210 , 0aaa55555555 ) + +[13,44]: + int 1210aaa55555555 <- ( f210 , aaa55555555 ) + +[13,43]: + int 09082aa55555555 <- ( f210 , 2aa55555555 ) + +[13,42]: + int 4842aa55555555 <- ( f210 , eaa55555555 ) + +[13,41]: + int 2420aa55555555 <- ( f210 , 0aa55555555 ) + +[13,40]: + int 1210aa55555555 <- ( f210 , aa55555555 ) + +[13,39]: + int 09082a55555555 <- ( f210 , 2a55555555 ) + +[13,38]: + int 4842a55555555 <- ( f210 , ea55555555 ) + +[13,37]: + int 2420a55555555 <- ( f210 , 0a55555555 ) + +[13,36]: + int 1210a55555555 <- ( f210 , a55555555 ) + +[13,35]: + int 0908255555555 <- ( f210 , 255555555 ) + +[13,34]: + int 484255555555 <- ( f210 , e55555555 ) + +[13,33]: + int 242055555555 <- ( f210 , 055555555 ) + +[13,32]: + int 121055555555 <- ( f210 , 55555555 ) + +[13,31]: + int 090855555555 <- ( f210 , d5555555 ) + +[13,30]: + int 48415555555 <- ( f210 , 15555555 ) + +[13,29]: + int 24215555555 <- ( f210 , f5555555 ) + +[13,28]: + int 12105555555 <- ( f210 , 5555555 ) + +[13,27]: + int 09085555555 <- ( f210 , d555555 ) + +[13,26]: + int 4841555555 <- ( f210 , 1555555 ) + +[13,25]: + int 2421555555 <- ( f210 , f555555 ) + +[13,24]: + int 1210555555 <- ( f210 , 555555 ) + +[13,23]: + int 0908555555 <- ( f210 , d55555 ) + +[13,22]: + int 484155555 <- ( f210 , 155555 ) + +[13,21]: + int 242155555 <- ( f210 , f55555 ) + +[13,20]: + int 121055555 <- ( f210 , 55555 ) + +[13,19]: + int 090855555 <- ( f210 , d5555 ) + +[13,18]: + int 48415555 <- ( f210 , 15555 ) + +[13,17]: + int 24215555 <- ( f210 , f5555 ) + +[13,16]: + int 12105555 <- ( f210 , 5555 ) + +[13,15]: + int 09085555 <- ( f210 , d555 ) + +[13,14]: + int 4841555 <- ( f210 , 1555 ) + +[13,13]: + int 2421555 <- ( f210 , f555 ) + +[13,12]: + int 1210555 <- ( f210 , 555 ) + +[13,11]: + int 0908555 <- ( f210 , d55 ) + +[13,10]: + int 484155 <- ( f210 , 155 ) + +[13,9]: + int 242155 <- ( f210 , f55 ) + +[13,8]: + int 121055 <- ( f210 , 55 ) + +[13,7]: + int 090855 <- ( f210 , d5 ) + +[13,6]: + int 48415 <- ( f210 , 15 ) + +[13,5]: + int 24215 <- ( f210 , f5 ) + +[13,4]: + int 12105 <- ( f210 , 5 ) + +[13,3]: + int 09085 <- ( f210 , d ) + +[13,2]: + int 4841 <- ( f210 , 1 ) + +[13,1]: + int 2421 <- ( f210 , f ) + +[12,64]: + int 0210aaaaaaaa55555555 <- ( 210 , aaaaaaaa55555555 ) + +[12,63]: + int 1082aaaaaaa55555555 <- ( 210 , 2aaaaaaa55555555 ) + +[12,62]: + int 0842aaaaaaa55555555 <- ( 210 , eaaaaaaa55555555 ) + +[12,61]: + int 0420aaaaaaa55555555 <- ( 210 , 0aaaaaaa55555555 ) + +[12,60]: + int 0210aaaaaaa55555555 <- ( 210 , aaaaaaa55555555 ) + +[12,59]: + int 1082aaaaaa55555555 <- ( 210 , 2aaaaaa55555555 ) + +[12,58]: + int 0842aaaaaa55555555 <- ( 210 , eaaaaaa55555555 ) + +[12,57]: + int 0420aaaaaa55555555 <- ( 210 , 0aaaaaa55555555 ) + +[12,56]: + int 0210aaaaaa55555555 <- ( 210 , aaaaaa55555555 ) + +[12,55]: + int 1082aaaaa55555555 <- ( 210 , 2aaaaa55555555 ) + +[12,54]: + int 0842aaaaa55555555 <- ( 210 , eaaaaa55555555 ) + +[12,53]: + int 0420aaaaa55555555 <- ( 210 , 0aaaaa55555555 ) + +[12,52]: + int 0210aaaaa55555555 <- ( 210 , aaaaa55555555 ) + +[12,51]: + int 1082aaaa55555555 <- ( 210 , 2aaaa55555555 ) + +[12,50]: + int 0842aaaa55555555 <- ( 210 , eaaaa55555555 ) + +[12,49]: + int 0420aaaa55555555 <- ( 210 , 0aaaa55555555 ) + +[12,48]: + int 0210aaaa55555555 <- ( 210 , aaaa55555555 ) + +[12,47]: + int 1082aaa55555555 <- ( 210 , 2aaa55555555 ) + +[12,46]: + int 0842aaa55555555 <- ( 210 , eaaa55555555 ) + +[12,45]: + int 0420aaa55555555 <- ( 210 , 0aaa55555555 ) + +[12,44]: + int 0210aaa55555555 <- ( 210 , aaa55555555 ) + +[12,43]: + int 1082aa55555555 <- ( 210 , 2aa55555555 ) + +[12,42]: + int 0842aa55555555 <- ( 210 , eaa55555555 ) + +[12,41]: + int 0420aa55555555 <- ( 210 , 0aa55555555 ) + +[12,40]: + int 0210aa55555555 <- ( 210 , aa55555555 ) + +[12,39]: + int 1082a55555555 <- ( 210 , 2a55555555 ) + +[12,38]: + int 0842a55555555 <- ( 210 , ea55555555 ) + +[12,37]: + int 0420a55555555 <- ( 210 , 0a55555555 ) + +[12,36]: + int 0210a55555555 <- ( 210 , a55555555 ) + +[12,35]: + int 108255555555 <- ( 210 , 255555555 ) + +[12,34]: + int 084255555555 <- ( 210 , e55555555 ) + +[12,33]: + int 042055555555 <- ( 210 , 055555555 ) + +[12,32]: + int 021055555555 <- ( 210 , 55555555 ) + +[12,31]: + int 10855555555 <- ( 210 , d5555555 ) + +[12,30]: + int 08415555555 <- ( 210 , 15555555 ) + +[12,29]: + int 04215555555 <- ( 210 , f5555555 ) + +[12,28]: + int 02105555555 <- ( 210 , 5555555 ) + +[12,27]: + int 1085555555 <- ( 210 , d555555 ) + +[12,26]: + int 0841555555 <- ( 210 , 1555555 ) + +[12,25]: + int 0421555555 <- ( 210 , f555555 ) + +[12,24]: + int 0210555555 <- ( 210 , 555555 ) + +[12,23]: + int 108555555 <- ( 210 , d55555 ) + +[12,22]: + int 084155555 <- ( 210 , 155555 ) + +[12,21]: + int 042155555 <- ( 210 , f55555 ) + +[12,20]: + int 021055555 <- ( 210 , 55555 ) + +[12,19]: + int 10855555 <- ( 210 , d5555 ) + +[12,18]: + int 08415555 <- ( 210 , 15555 ) + +[12,17]: + int 04215555 <- ( 210 , f5555 ) + +[12,16]: + int 02105555 <- ( 210 , 5555 ) + +[12,15]: + int 1085555 <- ( 210 , d555 ) + +[12,14]: + int 0841555 <- ( 210 , 1555 ) + +[12,13]: + int 0421555 <- ( 210 , f555 ) + +[12,12]: + int 0210555 <- ( 210 , 555 ) + +[12,11]: + int 108555 <- ( 210 , d55 ) + +[12,10]: + int 084155 <- ( 210 , 155 ) + +[12,9]: + int 042155 <- ( 210 , f55 ) + +[12,8]: + int 021055 <- ( 210 , 55 ) + +[12,7]: + int 10855 <- ( 210 , d5 ) + +[12,6]: + int 08415 <- ( 210 , 15 ) + +[12,5]: + int 04215 <- ( 210 , f5 ) + +[12,4]: + int 02105 <- ( 210 , 5 ) + +[12,3]: + int 1085 <- ( 210 , d ) + +[12,2]: + int 0841 <- ( 210 , 1 ) + +[12,1]: + int 0421 <- ( 210 , f ) + +[11,64]: + int 210aaaaaaaa55555555 <- ( 210 , aaaaaaaa55555555 ) + +[11,63]: + int 1082aaaaaaa55555555 <- ( 210 , 2aaaaaaa55555555 ) + +[11,62]: + int 0842aaaaaaa55555555 <- ( 210 , eaaaaaaa55555555 ) + +[11,61]: + int 0420aaaaaaa55555555 <- ( 210 , 0aaaaaaa55555555 ) + +[11,60]: + int 210aaaaaaa55555555 <- ( 210 , aaaaaaa55555555 ) + +[11,59]: + int 1082aaaaaa55555555 <- ( 210 , 2aaaaaa55555555 ) + +[11,58]: + int 0842aaaaaa55555555 <- ( 210 , eaaaaaa55555555 ) + +[11,57]: + int 0420aaaaaa55555555 <- ( 210 , 0aaaaaa55555555 ) + +[11,56]: + int 210aaaaaa55555555 <- ( 210 , aaaaaa55555555 ) + +[11,55]: + int 1082aaaaa55555555 <- ( 210 , 2aaaaa55555555 ) + +[11,54]: + int 0842aaaaa55555555 <- ( 210 , eaaaaa55555555 ) + +[11,53]: + int 0420aaaaa55555555 <- ( 210 , 0aaaaa55555555 ) + +[11,52]: + int 210aaaaa55555555 <- ( 210 , aaaaa55555555 ) + +[11,51]: + int 1082aaaa55555555 <- ( 210 , 2aaaa55555555 ) + +[11,50]: + int 0842aaaa55555555 <- ( 210 , eaaaa55555555 ) + +[11,49]: + int 0420aaaa55555555 <- ( 210 , 0aaaa55555555 ) + +[11,48]: + int 210aaaa55555555 <- ( 210 , aaaa55555555 ) + +[11,47]: + int 1082aaa55555555 <- ( 210 , 2aaa55555555 ) + +[11,46]: + int 0842aaa55555555 <- ( 210 , eaaa55555555 ) + +[11,45]: + int 0420aaa55555555 <- ( 210 , 0aaa55555555 ) + +[11,44]: + int 210aaa55555555 <- ( 210 , aaa55555555 ) + +[11,43]: + int 1082aa55555555 <- ( 210 , 2aa55555555 ) + +[11,42]: + int 0842aa55555555 <- ( 210 , eaa55555555 ) + +[11,41]: + int 0420aa55555555 <- ( 210 , 0aa55555555 ) + +[11,40]: + int 210aa55555555 <- ( 210 , aa55555555 ) + +[11,39]: + int 1082a55555555 <- ( 210 , 2a55555555 ) + +[11,38]: + int 0842a55555555 <- ( 210 , ea55555555 ) + +[11,37]: + int 0420a55555555 <- ( 210 , 0a55555555 ) + +[11,36]: + int 210a55555555 <- ( 210 , a55555555 ) + +[11,35]: + int 108255555555 <- ( 210 , 255555555 ) + +[11,34]: + int 084255555555 <- ( 210 , e55555555 ) + +[11,33]: + int 042055555555 <- ( 210 , 055555555 ) + +[11,32]: + int 21055555555 <- ( 210 , 55555555 ) + +[11,31]: + int 10855555555 <- ( 210 , d5555555 ) + +[11,30]: + int 08415555555 <- ( 210 , 15555555 ) + +[11,29]: + int 04215555555 <- ( 210 , f5555555 ) + +[11,28]: + int 2105555555 <- ( 210 , 5555555 ) + +[11,27]: + int 1085555555 <- ( 210 , d555555 ) + +[11,26]: + int 0841555555 <- ( 210 , 1555555 ) + +[11,25]: + int 0421555555 <- ( 210 , f555555 ) + +[11,24]: + int 210555555 <- ( 210 , 555555 ) + +[11,23]: + int 108555555 <- ( 210 , d55555 ) + +[11,22]: + int 084155555 <- ( 210 , 155555 ) + +[11,21]: + int 042155555 <- ( 210 , f55555 ) + +[11,20]: + int 21055555 <- ( 210 , 55555 ) + +[11,19]: + int 10855555 <- ( 210 , d5555 ) + +[11,18]: + int 08415555 <- ( 210 , 15555 ) + +[11,17]: + int 04215555 <- ( 210 , f5555 ) + +[11,16]: + int 2105555 <- ( 210 , 5555 ) + +[11,15]: + int 1085555 <- ( 210 , d555 ) + +[11,14]: + int 0841555 <- ( 210 , 1555 ) + +[11,13]: + int 0421555 <- ( 210 , f555 ) + +[11,12]: + int 210555 <- ( 210 , 555 ) + +[11,11]: + int 108555 <- ( 210 , d55 ) + +[11,10]: + int 084155 <- ( 210 , 155 ) + +[11,9]: + int 042155 <- ( 210 , f55 ) + +[11,8]: + int 21055 <- ( 210 , 55 ) + +[11,7]: + int 10855 <- ( 210 , d5 ) + +[11,6]: + int 08415 <- ( 210 , 15 ) + +[11,5]: + int 04215 <- ( 210 , f5 ) + +[11,4]: + int 2105 <- ( 210 , 5 ) + +[11,3]: + int 1085 <- ( 210 , d ) + +[11,2]: + int 0841 <- ( 210 , 1 ) + +[11,1]: + int 0421 <- ( 210 , f ) + +[10,64]: + int 210aaaaaaaa55555555 <- ( e10 , aaaaaaaa55555555 ) + +[10,63]: + int 1082aaaaaaa55555555 <- ( e10 , 2aaaaaaa55555555 ) + +[10,62]: + int 0842aaaaaaa55555555 <- ( e10 , eaaaaaaa55555555 ) + +[10,61]: + int 420aaaaaaa55555555 <- ( e10 , 0aaaaaaa55555555 ) + +[10,60]: + int 210aaaaaaa55555555 <- ( e10 , aaaaaaa55555555 ) + +[10,59]: + int 1082aaaaaa55555555 <- ( e10 , 2aaaaaa55555555 ) + +[10,58]: + int 0842aaaaaa55555555 <- ( e10 , eaaaaaa55555555 ) + +[10,57]: + int 420aaaaaa55555555 <- ( e10 , 0aaaaaa55555555 ) + +[10,56]: + int 210aaaaaa55555555 <- ( e10 , aaaaaa55555555 ) + +[10,55]: + int 1082aaaaa55555555 <- ( e10 , 2aaaaa55555555 ) + +[10,54]: + int 0842aaaaa55555555 <- ( e10 , eaaaaa55555555 ) + +[10,53]: + int 420aaaaa55555555 <- ( e10 , 0aaaaa55555555 ) + +[10,52]: + int 210aaaaa55555555 <- ( e10 , aaaaa55555555 ) + +[10,51]: + int 1082aaaa55555555 <- ( e10 , 2aaaa55555555 ) + +[10,50]: + int 0842aaaa55555555 <- ( e10 , eaaaa55555555 ) + +[10,49]: + int 420aaaa55555555 <- ( e10 , 0aaaa55555555 ) + +[10,48]: + int 210aaaa55555555 <- ( e10 , aaaa55555555 ) + +[10,47]: + int 1082aaa55555555 <- ( e10 , 2aaa55555555 ) + +[10,46]: + int 0842aaa55555555 <- ( e10 , eaaa55555555 ) + +[10,45]: + int 420aaa55555555 <- ( e10 , 0aaa55555555 ) + +[10,44]: + int 210aaa55555555 <- ( e10 , aaa55555555 ) + +[10,43]: + int 1082aa55555555 <- ( e10 , 2aa55555555 ) + +[10,42]: + int 0842aa55555555 <- ( e10 , eaa55555555 ) + +[10,41]: + int 420aa55555555 <- ( e10 , 0aa55555555 ) + +[10,40]: + int 210aa55555555 <- ( e10 , aa55555555 ) + +[10,39]: + int 1082a55555555 <- ( e10 , 2a55555555 ) + +[10,38]: + int 0842a55555555 <- ( e10 , ea55555555 ) + +[10,37]: + int 420a55555555 <- ( e10 , 0a55555555 ) + +[10,36]: + int 210a55555555 <- ( e10 , a55555555 ) + +[10,35]: + int 108255555555 <- ( e10 , 255555555 ) + +[10,34]: + int 084255555555 <- ( e10 , e55555555 ) + +[10,33]: + int 42055555555 <- ( e10 , 055555555 ) + +[10,32]: + int 21055555555 <- ( e10 , 55555555 ) + +[10,31]: + int 10855555555 <- ( e10 , d5555555 ) + +[10,30]: + int 08415555555 <- ( e10 , 15555555 ) + +[10,29]: + int 4215555555 <- ( e10 , f5555555 ) + +[10,28]: + int 2105555555 <- ( e10 , 5555555 ) + +[10,27]: + int 1085555555 <- ( e10 , d555555 ) + +[10,26]: + int 0841555555 <- ( e10 , 1555555 ) + +[10,25]: + int 421555555 <- ( e10 , f555555 ) + +[10,24]: + int 210555555 <- ( e10 , 555555 ) + +[10,23]: + int 108555555 <- ( e10 , d55555 ) + +[10,22]: + int 084155555 <- ( e10 , 155555 ) + +[10,21]: + int 42155555 <- ( e10 , f55555 ) + +[10,20]: + int 21055555 <- ( e10 , 55555 ) + +[10,19]: + int 10855555 <- ( e10 , d5555 ) + +[10,18]: + int 08415555 <- ( e10 , 15555 ) + +[10,17]: + int 4215555 <- ( e10 , f5555 ) + +[10,16]: + int 2105555 <- ( e10 , 5555 ) + +[10,15]: + int 1085555 <- ( e10 , d555 ) + +[10,14]: + int 0841555 <- ( e10 , 1555 ) + +[10,13]: + int 421555 <- ( e10 , f555 ) + +[10,12]: + int 210555 <- ( e10 , 555 ) + +[10,11]: + int 108555 <- ( e10 , d55 ) + +[10,10]: + int 084155 <- ( e10 , 155 ) + +[10,9]: + int 42155 <- ( e10 , f55 ) + +[10,8]: + int 21055 <- ( e10 , 55 ) + +[10,7]: + int 10855 <- ( e10 , d5 ) + +[10,6]: + int 08415 <- ( e10 , 15 ) + +[10,5]: + int 4215 <- ( e10 , f5 ) + +[10,4]: + int 2105 <- ( e10 , 5 ) + +[10,3]: + int 1085 <- ( e10 , d ) + +[10,2]: + int 0841 <- ( e10 , 1 ) + +[10,1]: + int 421 <- ( e10 , f ) + +[9,64]: + int 010aaaaaaaa55555555 <- ( 010 , aaaaaaaa55555555 ) + +[9,63]: + int 0082aaaaaaa55555555 <- ( 010 , 2aaaaaaa55555555 ) + +[9,62]: + int 042aaaaaaa55555555 <- ( 010 , eaaaaaaa55555555 ) + +[9,61]: + int 020aaaaaaa55555555 <- ( 010 , 0aaaaaaa55555555 ) + +[9,60]: + int 010aaaaaaa55555555 <- ( 010 , aaaaaaa55555555 ) + +[9,59]: + int 0082aaaaaa55555555 <- ( 010 , 2aaaaaa55555555 ) + +[9,58]: + int 042aaaaaa55555555 <- ( 010 , eaaaaaa55555555 ) + +[9,57]: + int 020aaaaaa55555555 <- ( 010 , 0aaaaaa55555555 ) + +[9,56]: + int 010aaaaaa55555555 <- ( 010 , aaaaaa55555555 ) + +[9,55]: + int 0082aaaaa55555555 <- ( 010 , 2aaaaa55555555 ) + +[9,54]: + int 042aaaaa55555555 <- ( 010 , eaaaaa55555555 ) + +[9,53]: + int 020aaaaa55555555 <- ( 010 , 0aaaaa55555555 ) + +[9,52]: + int 010aaaaa55555555 <- ( 010 , aaaaa55555555 ) + +[9,51]: + int 0082aaaa55555555 <- ( 010 , 2aaaa55555555 ) + +[9,50]: + int 042aaaa55555555 <- ( 010 , eaaaa55555555 ) + +[9,49]: + int 020aaaa55555555 <- ( 010 , 0aaaa55555555 ) + +[9,48]: + int 010aaaa55555555 <- ( 010 , aaaa55555555 ) + +[9,47]: + int 0082aaa55555555 <- ( 010 , 2aaa55555555 ) + +[9,46]: + int 042aaa55555555 <- ( 010 , eaaa55555555 ) + +[9,45]: + int 020aaa55555555 <- ( 010 , 0aaa55555555 ) + +[9,44]: + int 010aaa55555555 <- ( 010 , aaa55555555 ) + +[9,43]: + int 0082aa55555555 <- ( 010 , 2aa55555555 ) + +[9,42]: + int 042aa55555555 <- ( 010 , eaa55555555 ) + +[9,41]: + int 020aa55555555 <- ( 010 , 0aa55555555 ) + +[9,40]: + int 010aa55555555 <- ( 010 , aa55555555 ) + +[9,39]: + int 0082a55555555 <- ( 010 , 2a55555555 ) + +[9,38]: + int 042a55555555 <- ( 010 , ea55555555 ) + +[9,37]: + int 020a55555555 <- ( 010 , 0a55555555 ) + +[9,36]: + int 010a55555555 <- ( 010 , a55555555 ) + +[9,35]: + int 008255555555 <- ( 010 , 255555555 ) + +[9,34]: + int 04255555555 <- ( 010 , e55555555 ) + +[9,33]: + int 02055555555 <- ( 010 , 055555555 ) + +[9,32]: + int 01055555555 <- ( 010 , 55555555 ) + +[9,31]: + int 00855555555 <- ( 010 , d5555555 ) + +[9,30]: + int 0415555555 <- ( 010 , 15555555 ) + +[9,29]: + int 0215555555 <- ( 010 , f5555555 ) + +[9,28]: + int 0105555555 <- ( 010 , 5555555 ) + +[9,27]: + int 0085555555 <- ( 010 , d555555 ) + +[9,26]: + int 041555555 <- ( 010 , 1555555 ) + +[9,25]: + int 021555555 <- ( 010 , f555555 ) + +[9,24]: + int 010555555 <- ( 010 , 555555 ) + +[9,23]: + int 008555555 <- ( 010 , d55555 ) + +[9,22]: + int 04155555 <- ( 010 , 155555 ) + +[9,21]: + int 02155555 <- ( 010 , f55555 ) + +[9,20]: + int 01055555 <- ( 010 , 55555 ) + +[9,19]: + int 00855555 <- ( 010 , d5555 ) + +[9,18]: + int 0415555 <- ( 010 , 15555 ) + +[9,17]: + int 0215555 <- ( 010 , f5555 ) + +[9,16]: + int 0105555 <- ( 010 , 5555 ) + +[9,15]: + int 0085555 <- ( 010 , d555 ) + +[9,14]: + int 041555 <- ( 010 , 1555 ) + +[9,13]: + int 021555 <- ( 010 , f555 ) + +[9,12]: + int 010555 <- ( 010 , 555 ) + +[9,11]: + int 008555 <- ( 010 , d55 ) + +[9,10]: + int 04155 <- ( 010 , 155 ) + +[9,9]: + int 02155 <- ( 010 , f55 ) + +[9,8]: + int 01055 <- ( 010 , 55 ) + +[9,7]: + int 00855 <- ( 010 , d5 ) + +[9,6]: + int 0415 <- ( 010 , 15 ) + +[9,5]: + int 0215 <- ( 010 , f5 ) + +[9,4]: + int 0105 <- ( 010 , 5 ) + +[9,3]: + int 0085 <- ( 010 , d ) + +[9,2]: + int 041 <- ( 010 , 1 ) + +[9,1]: + int 021 <- ( 010 , f ) + +[8,64]: + int 010aaaaaaaa55555555 <- ( 10 , aaaaaaaa55555555 ) + +[8,63]: + int 082aaaaaaa55555555 <- ( 10 , 2aaaaaaa55555555 ) + +[8,62]: + int 042aaaaaaa55555555 <- ( 10 , eaaaaaaa55555555 ) + +[8,61]: + int 020aaaaaaa55555555 <- ( 10 , 0aaaaaaa55555555 ) + +[8,60]: + int 010aaaaaaa55555555 <- ( 10 , aaaaaaa55555555 ) + +[8,59]: + int 082aaaaaa55555555 <- ( 10 , 2aaaaaa55555555 ) + +[8,58]: + int 042aaaaaa55555555 <- ( 10 , eaaaaaa55555555 ) + +[8,57]: + int 020aaaaaa55555555 <- ( 10 , 0aaaaaa55555555 ) + +[8,56]: + int 010aaaaaa55555555 <- ( 10 , aaaaaa55555555 ) + +[8,55]: + int 082aaaaa55555555 <- ( 10 , 2aaaaa55555555 ) + +[8,54]: + int 042aaaaa55555555 <- ( 10 , eaaaaa55555555 ) + +[8,53]: + int 020aaaaa55555555 <- ( 10 , 0aaaaa55555555 ) + +[8,52]: + int 010aaaaa55555555 <- ( 10 , aaaaa55555555 ) + +[8,51]: + int 082aaaa55555555 <- ( 10 , 2aaaa55555555 ) + +[8,50]: + int 042aaaa55555555 <- ( 10 , eaaaa55555555 ) + +[8,49]: + int 020aaaa55555555 <- ( 10 , 0aaaa55555555 ) + +[8,48]: + int 010aaaa55555555 <- ( 10 , aaaa55555555 ) + +[8,47]: + int 082aaa55555555 <- ( 10 , 2aaa55555555 ) + +[8,46]: + int 042aaa55555555 <- ( 10 , eaaa55555555 ) + +[8,45]: + int 020aaa55555555 <- ( 10 , 0aaa55555555 ) + +[8,44]: + int 010aaa55555555 <- ( 10 , aaa55555555 ) + +[8,43]: + int 082aa55555555 <- ( 10 , 2aa55555555 ) + +[8,42]: + int 042aa55555555 <- ( 10 , eaa55555555 ) + +[8,41]: + int 020aa55555555 <- ( 10 , 0aa55555555 ) + +[8,40]: + int 010aa55555555 <- ( 10 , aa55555555 ) + +[8,39]: + int 082a55555555 <- ( 10 , 2a55555555 ) + +[8,38]: + int 042a55555555 <- ( 10 , ea55555555 ) + +[8,37]: + int 020a55555555 <- ( 10 , 0a55555555 ) + +[8,36]: + int 010a55555555 <- ( 10 , a55555555 ) + +[8,35]: + int 08255555555 <- ( 10 , 255555555 ) + +[8,34]: + int 04255555555 <- ( 10 , e55555555 ) + +[8,33]: + int 02055555555 <- ( 10 , 055555555 ) + +[8,32]: + int 01055555555 <- ( 10 , 55555555 ) + +[8,31]: + int 0855555555 <- ( 10 , d5555555 ) + +[8,30]: + int 0415555555 <- ( 10 , 15555555 ) + +[8,29]: + int 0215555555 <- ( 10 , f5555555 ) + +[8,28]: + int 0105555555 <- ( 10 , 5555555 ) + +[8,27]: + int 085555555 <- ( 10 , d555555 ) + +[8,26]: + int 041555555 <- ( 10 , 1555555 ) + +[8,25]: + int 021555555 <- ( 10 , f555555 ) + +[8,24]: + int 010555555 <- ( 10 , 555555 ) + +[8,23]: + int 08555555 <- ( 10 , d55555 ) + +[8,22]: + int 04155555 <- ( 10 , 155555 ) + +[8,21]: + int 02155555 <- ( 10 , f55555 ) + +[8,20]: + int 01055555 <- ( 10 , 55555 ) + +[8,19]: + int 0855555 <- ( 10 , d5555 ) + +[8,18]: + int 0415555 <- ( 10 , 15555 ) + +[8,17]: + int 0215555 <- ( 10 , f5555 ) + +[8,16]: + int 0105555 <- ( 10 , 5555 ) + +[8,15]: + int 085555 <- ( 10 , d555 ) + +[8,14]: + int 041555 <- ( 10 , 1555 ) + +[8,13]: + int 021555 <- ( 10 , f555 ) + +[8,12]: + int 010555 <- ( 10 , 555 ) + +[8,11]: + int 08555 <- ( 10 , d55 ) + +[8,10]: + int 04155 <- ( 10 , 155 ) + +[8,9]: + int 02155 <- ( 10 , f55 ) + +[8,8]: + int 01055 <- ( 10 , 55 ) + +[8,7]: + int 0855 <- ( 10 , d5 ) + +[8,6]: + int 0415 <- ( 10 , 15 ) + +[8,5]: + int 0215 <- ( 10 , f5 ) + +[8,4]: + int 0105 <- ( 10 , 5 ) + +[8,3]: + int 085 <- ( 10 , d ) + +[8,2]: + int 041 <- ( 10 , 1 ) + +[8,1]: + int 021 <- ( 10 , f ) + +[7,64]: + int 10aaaaaaaa55555555 <- ( 10 , aaaaaaaa55555555 ) + +[7,63]: + int 082aaaaaaa55555555 <- ( 10 , 2aaaaaaa55555555 ) + +[7,62]: + int 042aaaaaaa55555555 <- ( 10 , eaaaaaaa55555555 ) + +[7,61]: + int 020aaaaaaa55555555 <- ( 10 , 0aaaaaaa55555555 ) + +[7,60]: + int 10aaaaaaa55555555 <- ( 10 , aaaaaaa55555555 ) + +[7,59]: + int 082aaaaaa55555555 <- ( 10 , 2aaaaaa55555555 ) + +[7,58]: + int 042aaaaaa55555555 <- ( 10 , eaaaaaa55555555 ) + +[7,57]: + int 020aaaaaa55555555 <- ( 10 , 0aaaaaa55555555 ) + +[7,56]: + int 10aaaaaa55555555 <- ( 10 , aaaaaa55555555 ) + +[7,55]: + int 082aaaaa55555555 <- ( 10 , 2aaaaa55555555 ) + +[7,54]: + int 042aaaaa55555555 <- ( 10 , eaaaaa55555555 ) + +[7,53]: + int 020aaaaa55555555 <- ( 10 , 0aaaaa55555555 ) + +[7,52]: + int 10aaaaa55555555 <- ( 10 , aaaaa55555555 ) + +[7,51]: + int 082aaaa55555555 <- ( 10 , 2aaaa55555555 ) + +[7,50]: + int 042aaaa55555555 <- ( 10 , eaaaa55555555 ) + +[7,49]: + int 020aaaa55555555 <- ( 10 , 0aaaa55555555 ) + +[7,48]: + int 10aaaa55555555 <- ( 10 , aaaa55555555 ) + +[7,47]: + int 082aaa55555555 <- ( 10 , 2aaa55555555 ) + +[7,46]: + int 042aaa55555555 <- ( 10 , eaaa55555555 ) + +[7,45]: + int 020aaa55555555 <- ( 10 , 0aaa55555555 ) + +[7,44]: + int 10aaa55555555 <- ( 10 , aaa55555555 ) + +[7,43]: + int 082aa55555555 <- ( 10 , 2aa55555555 ) + +[7,42]: + int 042aa55555555 <- ( 10 , eaa55555555 ) + +[7,41]: + int 020aa55555555 <- ( 10 , 0aa55555555 ) + +[7,40]: + int 10aa55555555 <- ( 10 , aa55555555 ) + +[7,39]: + int 082a55555555 <- ( 10 , 2a55555555 ) + +[7,38]: + int 042a55555555 <- ( 10 , ea55555555 ) + +[7,37]: + int 020a55555555 <- ( 10 , 0a55555555 ) + +[7,36]: + int 10a55555555 <- ( 10 , a55555555 ) + +[7,35]: + int 08255555555 <- ( 10 , 255555555 ) + +[7,34]: + int 04255555555 <- ( 10 , e55555555 ) + +[7,33]: + int 02055555555 <- ( 10 , 055555555 ) + +[7,32]: + int 1055555555 <- ( 10 , 55555555 ) + +[7,31]: + int 0855555555 <- ( 10 , d5555555 ) + +[7,30]: + int 0415555555 <- ( 10 , 15555555 ) + +[7,29]: + int 0215555555 <- ( 10 , f5555555 ) + +[7,28]: + int 105555555 <- ( 10 , 5555555 ) + +[7,27]: + int 085555555 <- ( 10 , d555555 ) + +[7,26]: + int 041555555 <- ( 10 , 1555555 ) + +[7,25]: + int 021555555 <- ( 10 , f555555 ) + +[7,24]: + int 10555555 <- ( 10 , 555555 ) + +[7,23]: + int 08555555 <- ( 10 , d55555 ) + +[7,22]: + int 04155555 <- ( 10 , 155555 ) + +[7,21]: + int 02155555 <- ( 10 , f55555 ) + +[7,20]: + int 1055555 <- ( 10 , 55555 ) + +[7,19]: + int 0855555 <- ( 10 , d5555 ) + +[7,18]: + int 0415555 <- ( 10 , 15555 ) + +[7,17]: + int 0215555 <- ( 10 , f5555 ) + +[7,16]: + int 105555 <- ( 10 , 5555 ) + +[7,15]: + int 085555 <- ( 10 , d555 ) + +[7,14]: + int 041555 <- ( 10 , 1555 ) + +[7,13]: + int 021555 <- ( 10 , f555 ) + +[7,12]: + int 10555 <- ( 10 , 555 ) + +[7,11]: + int 08555 <- ( 10 , d55 ) + +[7,10]: + int 04155 <- ( 10 , 155 ) + +[7,9]: + int 02155 <- ( 10 , f55 ) + +[7,8]: + int 1055 <- ( 10 , 55 ) + +[7,7]: + int 0855 <- ( 10 , d5 ) + +[7,6]: + int 0415 <- ( 10 , 15 ) + +[7,5]: + int 0215 <- ( 10 , f5 ) + +[7,4]: + int 105 <- ( 10 , 5 ) + +[7,3]: + int 085 <- ( 10 , d ) + +[7,2]: + int 041 <- ( 10 , 1 ) + +[7,1]: + int 021 <- ( 10 , f ) + +[6,64]: + int 10aaaaaaaa55555555 <- ( 10 , aaaaaaaa55555555 ) + +[6,63]: + int 082aaaaaaa55555555 <- ( 10 , 2aaaaaaa55555555 ) + +[6,62]: + int 042aaaaaaa55555555 <- ( 10 , eaaaaaaa55555555 ) + +[6,61]: + int 20aaaaaaa55555555 <- ( 10 , 0aaaaaaa55555555 ) + +[6,60]: + int 10aaaaaaa55555555 <- ( 10 , aaaaaaa55555555 ) + +[6,59]: + int 082aaaaaa55555555 <- ( 10 , 2aaaaaa55555555 ) + +[6,58]: + int 042aaaaaa55555555 <- ( 10 , eaaaaaa55555555 ) + +[6,57]: + int 20aaaaaa55555555 <- ( 10 , 0aaaaaa55555555 ) + +[6,56]: + int 10aaaaaa55555555 <- ( 10 , aaaaaa55555555 ) + +[6,55]: + int 082aaaaa55555555 <- ( 10 , 2aaaaa55555555 ) + +[6,54]: + int 042aaaaa55555555 <- ( 10 , eaaaaa55555555 ) + +[6,53]: + int 20aaaaa55555555 <- ( 10 , 0aaaaa55555555 ) + +[6,52]: + int 10aaaaa55555555 <- ( 10 , aaaaa55555555 ) + +[6,51]: + int 082aaaa55555555 <- ( 10 , 2aaaa55555555 ) + +[6,50]: + int 042aaaa55555555 <- ( 10 , eaaaa55555555 ) + +[6,49]: + int 20aaaa55555555 <- ( 10 , 0aaaa55555555 ) + +[6,48]: + int 10aaaa55555555 <- ( 10 , aaaa55555555 ) + +[6,47]: + int 082aaa55555555 <- ( 10 , 2aaa55555555 ) + +[6,46]: + int 042aaa55555555 <- ( 10 , eaaa55555555 ) + +[6,45]: + int 20aaa55555555 <- ( 10 , 0aaa55555555 ) + +[6,44]: + int 10aaa55555555 <- ( 10 , aaa55555555 ) + +[6,43]: + int 082aa55555555 <- ( 10 , 2aa55555555 ) + +[6,42]: + int 042aa55555555 <- ( 10 , eaa55555555 ) + +[6,41]: + int 20aa55555555 <- ( 10 , 0aa55555555 ) + +[6,40]: + int 10aa55555555 <- ( 10 , aa55555555 ) + +[6,39]: + int 082a55555555 <- ( 10 , 2a55555555 ) + +[6,38]: + int 042a55555555 <- ( 10 , ea55555555 ) + +[6,37]: + int 20a55555555 <- ( 10 , 0a55555555 ) + +[6,36]: + int 10a55555555 <- ( 10 , a55555555 ) + +[6,35]: + int 08255555555 <- ( 10 , 255555555 ) + +[6,34]: + int 04255555555 <- ( 10 , e55555555 ) + +[6,33]: + int 2055555555 <- ( 10 , 055555555 ) + +[6,32]: + int 1055555555 <- ( 10 , 55555555 ) + +[6,31]: + int 0855555555 <- ( 10 , d5555555 ) + +[6,30]: + int 0415555555 <- ( 10 , 15555555 ) + +[6,29]: + int 215555555 <- ( 10 , f5555555 ) + +[6,28]: + int 105555555 <- ( 10 , 5555555 ) + +[6,27]: + int 085555555 <- ( 10 , d555555 ) + +[6,26]: + int 041555555 <- ( 10 , 1555555 ) + +[6,25]: + int 21555555 <- ( 10 , f555555 ) + +[6,24]: + int 10555555 <- ( 10 , 555555 ) + +[6,23]: + int 08555555 <- ( 10 , d55555 ) + +[6,22]: + int 04155555 <- ( 10 , 155555 ) + +[6,21]: + int 2155555 <- ( 10 , f55555 ) + +[6,20]: + int 1055555 <- ( 10 , 55555 ) + +[6,19]: + int 0855555 <- ( 10 , d5555 ) + +[6,18]: + int 0415555 <- ( 10 , 15555 ) + +[6,17]: + int 215555 <- ( 10 , f5555 ) + +[6,16]: + int 105555 <- ( 10 , 5555 ) + +[6,15]: + int 085555 <- ( 10 , d555 ) + +[6,14]: + int 041555 <- ( 10 , 1555 ) + +[6,13]: + int 21555 <- ( 10 , f555 ) + +[6,12]: + int 10555 <- ( 10 , 555 ) + +[6,11]: + int 08555 <- ( 10 , d55 ) + +[6,10]: + int 04155 <- ( 10 , 155 ) + +[6,9]: + int 2155 <- ( 10 , f55 ) + +[6,8]: + int 1055 <- ( 10 , 55 ) + +[6,7]: + int 0855 <- ( 10 , d5 ) + +[6,6]: + int 0415 <- ( 10 , 15 ) + +[6,5]: + int 215 <- ( 10 , f5 ) + +[6,4]: + int 105 <- ( 10 , 5 ) + +[6,3]: + int 085 <- ( 10 , d ) + +[6,2]: + int 041 <- ( 10 , 1 ) + +[6,1]: + int 21 <- ( 10 , f ) + +[5,64]: + int 10aaaaaaaa55555555 <- ( f0 , aaaaaaaa55555555 ) + +[5,63]: + int 082aaaaaaa55555555 <- ( f0 , 2aaaaaaa55555555 ) + +[5,62]: + int 42aaaaaaa55555555 <- ( f0 , eaaaaaaa55555555 ) + +[5,61]: + int 20aaaaaaa55555555 <- ( f0 , 0aaaaaaa55555555 ) + +[5,60]: + int 10aaaaaaa55555555 <- ( f0 , aaaaaaa55555555 ) + +[5,59]: + int 082aaaaaa55555555 <- ( f0 , 2aaaaaa55555555 ) + +[5,58]: + int 42aaaaaa55555555 <- ( f0 , eaaaaaa55555555 ) + +[5,57]: + int 20aaaaaa55555555 <- ( f0 , 0aaaaaa55555555 ) + +[5,56]: + int 10aaaaaa55555555 <- ( f0 , aaaaaa55555555 ) + +[5,55]: + int 082aaaaa55555555 <- ( f0 , 2aaaaa55555555 ) + +[5,54]: + int 42aaaaa55555555 <- ( f0 , eaaaaa55555555 ) + +[5,53]: + int 20aaaaa55555555 <- ( f0 , 0aaaaa55555555 ) + +[5,52]: + int 10aaaaa55555555 <- ( f0 , aaaaa55555555 ) + +[5,51]: + int 082aaaa55555555 <- ( f0 , 2aaaa55555555 ) + +[5,50]: + int 42aaaa55555555 <- ( f0 , eaaaa55555555 ) + +[5,49]: + int 20aaaa55555555 <- ( f0 , 0aaaa55555555 ) + +[5,48]: + int 10aaaa55555555 <- ( f0 , aaaa55555555 ) + +[5,47]: + int 082aaa55555555 <- ( f0 , 2aaa55555555 ) + +[5,46]: + int 42aaa55555555 <- ( f0 , eaaa55555555 ) + +[5,45]: + int 20aaa55555555 <- ( f0 , 0aaa55555555 ) + +[5,44]: + int 10aaa55555555 <- ( f0 , aaa55555555 ) + +[5,43]: + int 082aa55555555 <- ( f0 , 2aa55555555 ) + +[5,42]: + int 42aa55555555 <- ( f0 , eaa55555555 ) + +[5,41]: + int 20aa55555555 <- ( f0 , 0aa55555555 ) + +[5,40]: + int 10aa55555555 <- ( f0 , aa55555555 ) + +[5,39]: + int 082a55555555 <- ( f0 , 2a55555555 ) + +[5,38]: + int 42a55555555 <- ( f0 , ea55555555 ) + +[5,37]: + int 20a55555555 <- ( f0 , 0a55555555 ) + +[5,36]: + int 10a55555555 <- ( f0 , a55555555 ) + +[5,35]: + int 08255555555 <- ( f0 , 255555555 ) + +[5,34]: + int 4255555555 <- ( f0 , e55555555 ) + +[5,33]: + int 2055555555 <- ( f0 , 055555555 ) + +[5,32]: + int 1055555555 <- ( f0 , 55555555 ) + +[5,31]: + int 0855555555 <- ( f0 , d5555555 ) + +[5,30]: + int 415555555 <- ( f0 , 15555555 ) + +[5,29]: + int 215555555 <- ( f0 , f5555555 ) + +[5,28]: + int 105555555 <- ( f0 , 5555555 ) + +[5,27]: + int 085555555 <- ( f0 , d555555 ) + +[5,26]: + int 41555555 <- ( f0 , 1555555 ) + +[5,25]: + int 21555555 <- ( f0 , f555555 ) + +[5,24]: + int 10555555 <- ( f0 , 555555 ) + +[5,23]: + int 08555555 <- ( f0 , d55555 ) + +[5,22]: + int 4155555 <- ( f0 , 155555 ) + +[5,21]: + int 2155555 <- ( f0 , f55555 ) + +[5,20]: + int 1055555 <- ( f0 , 55555 ) + +[5,19]: + int 0855555 <- ( f0 , d5555 ) + +[5,18]: + int 415555 <- ( f0 , 15555 ) + +[5,17]: + int 215555 <- ( f0 , f5555 ) + +[5,16]: + int 105555 <- ( f0 , 5555 ) + +[5,15]: + int 085555 <- ( f0 , d555 ) + +[5,14]: + int 41555 <- ( f0 , 1555 ) + +[5,13]: + int 21555 <- ( f0 , f555 ) + +[5,12]: + int 10555 <- ( f0 , 555 ) + +[5,11]: + int 08555 <- ( f0 , d55 ) + +[5,10]: + int 4155 <- ( f0 , 155 ) + +[5,9]: + int 2155 <- ( f0 , f55 ) + +[5,8]: + int 1055 <- ( f0 , 55 ) + +[5,7]: + int 0855 <- ( f0 , d5 ) + +[5,6]: + int 415 <- ( f0 , 15 ) + +[5,5]: + int 215 <- ( f0 , f5 ) + +[5,4]: + int 105 <- ( f0 , 5 ) + +[5,3]: + int 085 <- ( f0 , d ) + +[5,2]: + int 41 <- ( f0 , 1 ) + +[5,1]: + int 21 <- ( f0 , f ) + +[4,64]: + int 00aaaaaaaa55555555 <- ( 0 , aaaaaaaa55555555 ) + +[4,63]: + int 02aaaaaaa55555555 <- ( 0 , 2aaaaaaa55555555 ) + +[4,62]: + int 02aaaaaaa55555555 <- ( 0 , eaaaaaaa55555555 ) + +[4,61]: + int 00aaaaaaa55555555 <- ( 0 , 0aaaaaaa55555555 ) + +[4,60]: + int 00aaaaaaa55555555 <- ( 0 , aaaaaaa55555555 ) + +[4,59]: + int 02aaaaaa55555555 <- ( 0 , 2aaaaaa55555555 ) + +[4,58]: + int 02aaaaaa55555555 <- ( 0 , eaaaaaa55555555 ) + +[4,57]: + int 00aaaaaa55555555 <- ( 0 , 0aaaaaa55555555 ) + +[4,56]: + int 00aaaaaa55555555 <- ( 0 , aaaaaa55555555 ) + +[4,55]: + int 02aaaaa55555555 <- ( 0 , 2aaaaa55555555 ) + +[4,54]: + int 02aaaaa55555555 <- ( 0 , eaaaaa55555555 ) + +[4,53]: + int 00aaaaa55555555 <- ( 0 , 0aaaaa55555555 ) + +[4,52]: + int 00aaaaa55555555 <- ( 0 , aaaaa55555555 ) + +[4,51]: + int 02aaaa55555555 <- ( 0 , 2aaaa55555555 ) + +[4,50]: + int 02aaaa55555555 <- ( 0 , eaaaa55555555 ) + +[4,49]: + int 00aaaa55555555 <- ( 0 , 0aaaa55555555 ) + +[4,48]: + int 00aaaa55555555 <- ( 0 , aaaa55555555 ) + +[4,47]: + int 02aaa55555555 <- ( 0 , 2aaa55555555 ) + +[4,46]: + int 02aaa55555555 <- ( 0 , eaaa55555555 ) + +[4,45]: + int 00aaa55555555 <- ( 0 , 0aaa55555555 ) + +[4,44]: + int 00aaa55555555 <- ( 0 , aaa55555555 ) + +[4,43]: + int 02aa55555555 <- ( 0 , 2aa55555555 ) + +[4,42]: + int 02aa55555555 <- ( 0 , eaa55555555 ) + +[4,41]: + int 00aa55555555 <- ( 0 , 0aa55555555 ) + +[4,40]: + int 00aa55555555 <- ( 0 , aa55555555 ) + +[4,39]: + int 02a55555555 <- ( 0 , 2a55555555 ) + +[4,38]: + int 02a55555555 <- ( 0 , ea55555555 ) + +[4,37]: + int 00a55555555 <- ( 0 , 0a55555555 ) + +[4,36]: + int 00a55555555 <- ( 0 , a55555555 ) + +[4,35]: + int 0255555555 <- ( 0 , 255555555 ) + +[4,34]: + int 0255555555 <- ( 0 , e55555555 ) + +[4,33]: + int 0055555555 <- ( 0 , 055555555 ) + +[4,32]: + int 0055555555 <- ( 0 , 55555555 ) + +[4,31]: + int 055555555 <- ( 0 , d5555555 ) + +[4,30]: + int 015555555 <- ( 0 , 15555555 ) + +[4,29]: + int 015555555 <- ( 0 , f5555555 ) + +[4,28]: + int 005555555 <- ( 0 , 5555555 ) + +[4,27]: + int 05555555 <- ( 0 , d555555 ) + +[4,26]: + int 01555555 <- ( 0 , 1555555 ) + +[4,25]: + int 01555555 <- ( 0 , f555555 ) + +[4,24]: + int 00555555 <- ( 0 , 555555 ) + +[4,23]: + int 0555555 <- ( 0 , d55555 ) + +[4,22]: + int 0155555 <- ( 0 , 155555 ) + +[4,21]: + int 0155555 <- ( 0 , f55555 ) + +[4,20]: + int 0055555 <- ( 0 , 55555 ) + +[4,19]: + int 055555 <- ( 0 , d5555 ) + +[4,18]: + int 015555 <- ( 0 , 15555 ) + +[4,17]: + int 015555 <- ( 0 , f5555 ) + +[4,16]: + int 005555 <- ( 0 , 5555 ) + +[4,15]: + int 05555 <- ( 0 , d555 ) + +[4,14]: + int 01555 <- ( 0 , 1555 ) + +[4,13]: + int 01555 <- ( 0 , f555 ) + +[4,12]: + int 00555 <- ( 0 , 555 ) + +[4,11]: + int 0555 <- ( 0 , d55 ) + +[4,10]: + int 0155 <- ( 0 , 155 ) + +[4,9]: + int 0155 <- ( 0 , f55 ) + +[4,8]: + int 0055 <- ( 0 , 55 ) + +[4,7]: + int 055 <- ( 0 , d5 ) + +[4,6]: + int 015 <- ( 0 , 15 ) + +[4,5]: + int 015 <- ( 0 , f5 ) + +[4,4]: + int 005 <- ( 0 , 5 ) + +[4,3]: + int 05 <- ( 0 , d ) + +[4,2]: + int 01 <- ( 0 , 1 ) + +[4,1]: + int 01 <- ( 0 , f ) + +[3,64]: + int 0aaaaaaaa55555555 <- ( 0 , aaaaaaaa55555555 ) + +[3,63]: + int 02aaaaaaa55555555 <- ( 0 , 2aaaaaaa55555555 ) + +[3,62]: + int 02aaaaaaa55555555 <- ( 0 , eaaaaaaa55555555 ) + +[3,61]: + int 00aaaaaaa55555555 <- ( 0 , 0aaaaaaa55555555 ) + +[3,60]: + int 0aaaaaaa55555555 <- ( 0 , aaaaaaa55555555 ) + +[3,59]: + int 02aaaaaa55555555 <- ( 0 , 2aaaaaa55555555 ) + +[3,58]: + int 02aaaaaa55555555 <- ( 0 , eaaaaaa55555555 ) + +[3,57]: + int 00aaaaaa55555555 <- ( 0 , 0aaaaaa55555555 ) + +[3,56]: + int 0aaaaaa55555555 <- ( 0 , aaaaaa55555555 ) + +[3,55]: + int 02aaaaa55555555 <- ( 0 , 2aaaaa55555555 ) + +[3,54]: + int 02aaaaa55555555 <- ( 0 , eaaaaa55555555 ) + +[3,53]: + int 00aaaaa55555555 <- ( 0 , 0aaaaa55555555 ) + +[3,52]: + int 0aaaaa55555555 <- ( 0 , aaaaa55555555 ) + +[3,51]: + int 02aaaa55555555 <- ( 0 , 2aaaa55555555 ) + +[3,50]: + int 02aaaa55555555 <- ( 0 , eaaaa55555555 ) + +[3,49]: + int 00aaaa55555555 <- ( 0 , 0aaaa55555555 ) + +[3,48]: + int 0aaaa55555555 <- ( 0 , aaaa55555555 ) + +[3,47]: + int 02aaa55555555 <- ( 0 , 2aaa55555555 ) + +[3,46]: + int 02aaa55555555 <- ( 0 , eaaa55555555 ) + +[3,45]: + int 00aaa55555555 <- ( 0 , 0aaa55555555 ) + +[3,44]: + int 0aaa55555555 <- ( 0 , aaa55555555 ) + +[3,43]: + int 02aa55555555 <- ( 0 , 2aa55555555 ) + +[3,42]: + int 02aa55555555 <- ( 0 , eaa55555555 ) + +[3,41]: + int 00aa55555555 <- ( 0 , 0aa55555555 ) + +[3,40]: + int 0aa55555555 <- ( 0 , aa55555555 ) + +[3,39]: + int 02a55555555 <- ( 0 , 2a55555555 ) + +[3,38]: + int 02a55555555 <- ( 0 , ea55555555 ) + +[3,37]: + int 00a55555555 <- ( 0 , 0a55555555 ) + +[3,36]: + int 0a55555555 <- ( 0 , a55555555 ) + +[3,35]: + int 0255555555 <- ( 0 , 255555555 ) + +[3,34]: + int 0255555555 <- ( 0 , e55555555 ) + +[3,33]: + int 0055555555 <- ( 0 , 055555555 ) + +[3,32]: + int 055555555 <- ( 0 , 55555555 ) + +[3,31]: + int 055555555 <- ( 0 , d5555555 ) + +[3,30]: + int 015555555 <- ( 0 , 15555555 ) + +[3,29]: + int 015555555 <- ( 0 , f5555555 ) + +[3,28]: + int 05555555 <- ( 0 , 5555555 ) + +[3,27]: + int 05555555 <- ( 0 , d555555 ) + +[3,26]: + int 01555555 <- ( 0 , 1555555 ) + +[3,25]: + int 01555555 <- ( 0 , f555555 ) + +[3,24]: + int 0555555 <- ( 0 , 555555 ) + +[3,23]: + int 0555555 <- ( 0 , d55555 ) + +[3,22]: + int 0155555 <- ( 0 , 155555 ) + +[3,21]: + int 0155555 <- ( 0 , f55555 ) + +[3,20]: + int 055555 <- ( 0 , 55555 ) + +[3,19]: + int 055555 <- ( 0 , d5555 ) + +[3,18]: + int 015555 <- ( 0 , 15555 ) + +[3,17]: + int 015555 <- ( 0 , f5555 ) + +[3,16]: + int 05555 <- ( 0 , 5555 ) + +[3,15]: + int 05555 <- ( 0 , d555 ) + +[3,14]: + int 01555 <- ( 0 , 1555 ) + +[3,13]: + int 01555 <- ( 0 , f555 ) + +[3,12]: + int 0555 <- ( 0 , 555 ) + +[3,11]: + int 0555 <- ( 0 , d55 ) + +[3,10]: + int 0155 <- ( 0 , 155 ) + +[3,9]: + int 0155 <- ( 0 , f55 ) + +[3,8]: + int 055 <- ( 0 , 55 ) + +[3,7]: + int 055 <- ( 0 , d5 ) + +[3,6]: + int 015 <- ( 0 , 15 ) + +[3,5]: + int 015 <- ( 0 , f5 ) + +[3,4]: + int 05 <- ( 0 , 5 ) + +[3,3]: + int 05 <- ( 0 , d ) + +[3,2]: + int 01 <- ( 0 , 1 ) + +[3,1]: + int 01 <- ( 0 , f ) + +[2,64]: + int 0aaaaaaaa55555555 <- ( 0 , aaaaaaaa55555555 ) + +[2,63]: + int 02aaaaaaa55555555 <- ( 0 , 2aaaaaaa55555555 ) + +[2,62]: + int 02aaaaaaa55555555 <- ( 0 , eaaaaaaa55555555 ) + +[2,61]: + int 0aaaaaaa55555555 <- ( 0 , 0aaaaaaa55555555 ) + +[2,60]: + int 0aaaaaaa55555555 <- ( 0 , aaaaaaa55555555 ) + +[2,59]: + int 02aaaaaa55555555 <- ( 0 , 2aaaaaa55555555 ) + +[2,58]: + int 02aaaaaa55555555 <- ( 0 , eaaaaaa55555555 ) + +[2,57]: + int 0aaaaaa55555555 <- ( 0 , 0aaaaaa55555555 ) + +[2,56]: + int 0aaaaaa55555555 <- ( 0 , aaaaaa55555555 ) + +[2,55]: + int 02aaaaa55555555 <- ( 0 , 2aaaaa55555555 ) + +[2,54]: + int 02aaaaa55555555 <- ( 0 , eaaaaa55555555 ) + +[2,53]: + int 0aaaaa55555555 <- ( 0 , 0aaaaa55555555 ) + +[2,52]: + int 0aaaaa55555555 <- ( 0 , aaaaa55555555 ) + +[2,51]: + int 02aaaa55555555 <- ( 0 , 2aaaa55555555 ) + +[2,50]: + int 02aaaa55555555 <- ( 0 , eaaaa55555555 ) + +[2,49]: + int 0aaaa55555555 <- ( 0 , 0aaaa55555555 ) + +[2,48]: + int 0aaaa55555555 <- ( 0 , aaaa55555555 ) + +[2,47]: + int 02aaa55555555 <- ( 0 , 2aaa55555555 ) + +[2,46]: + int 02aaa55555555 <- ( 0 , eaaa55555555 ) + +[2,45]: + int 0aaa55555555 <- ( 0 , 0aaa55555555 ) + +[2,44]: + int 0aaa55555555 <- ( 0 , aaa55555555 ) + +[2,43]: + int 02aa55555555 <- ( 0 , 2aa55555555 ) + +[2,42]: + int 02aa55555555 <- ( 0 , eaa55555555 ) + +[2,41]: + int 0aa55555555 <- ( 0 , 0aa55555555 ) + +[2,40]: + int 0aa55555555 <- ( 0 , aa55555555 ) + +[2,39]: + int 02a55555555 <- ( 0 , 2a55555555 ) + +[2,38]: + int 02a55555555 <- ( 0 , ea55555555 ) + +[2,37]: + int 0a55555555 <- ( 0 , 0a55555555 ) + +[2,36]: + int 0a55555555 <- ( 0 , a55555555 ) + +[2,35]: + int 0255555555 <- ( 0 , 255555555 ) + +[2,34]: + int 0255555555 <- ( 0 , e55555555 ) + +[2,33]: + int 055555555 <- ( 0 , 055555555 ) + +[2,32]: + int 055555555 <- ( 0 , 55555555 ) + +[2,31]: + int 055555555 <- ( 0 , d5555555 ) + +[2,30]: + int 015555555 <- ( 0 , 15555555 ) + +[2,29]: + int 15555555 <- ( 0 , f5555555 ) + +[2,28]: + int 05555555 <- ( 0 , 5555555 ) + +[2,27]: + int 05555555 <- ( 0 , d555555 ) + +[2,26]: + int 01555555 <- ( 0 , 1555555 ) + +[2,25]: + int 1555555 <- ( 0 , f555555 ) + +[2,24]: + int 0555555 <- ( 0 , 555555 ) + +[2,23]: + int 0555555 <- ( 0 , d55555 ) + +[2,22]: + int 0155555 <- ( 0 , 155555 ) + +[2,21]: + int 155555 <- ( 0 , f55555 ) + +[2,20]: + int 055555 <- ( 0 , 55555 ) + +[2,19]: + int 055555 <- ( 0 , d5555 ) + +[2,18]: + int 015555 <- ( 0 , 15555 ) + +[2,17]: + int 15555 <- ( 0 , f5555 ) + +[2,16]: + int 05555 <- ( 0 , 5555 ) + +[2,15]: + int 05555 <- ( 0 , d555 ) + +[2,14]: + int 01555 <- ( 0 , 1555 ) + +[2,13]: + int 1555 <- ( 0 , f555 ) + +[2,12]: + int 0555 <- ( 0 , 555 ) + +[2,11]: + int 0555 <- ( 0 , d55 ) + +[2,10]: + int 0155 <- ( 0 , 155 ) + +[2,9]: + int 155 <- ( 0 , f55 ) + +[2,8]: + int 055 <- ( 0 , 55 ) + +[2,7]: + int 055 <- ( 0 , d5 ) + +[2,6]: + int 015 <- ( 0 , 15 ) + +[2,5]: + int 15 <- ( 0 , f5 ) + +[2,4]: + int 05 <- ( 0 , 5 ) + +[2,3]: + int 05 <- ( 0 , d ) + +[2,2]: + int 01 <- ( 0 , 1 ) + +[2,1]: + int 1 <- ( 0 , f ) + +[1,64]: + int 0aaaaaaaa55555555 <- ( 0 , aaaaaaaa55555555 ) + +[1,63]: + int 02aaaaaaa55555555 <- ( 0 , 2aaaaaaa55555555 ) + +[1,62]: + int 2aaaaaaa55555555 <- ( 0 , eaaaaaaa55555555 ) + +[1,61]: + int 0aaaaaaa55555555 <- ( 0 , 0aaaaaaa55555555 ) + +[1,60]: + int 0aaaaaaa55555555 <- ( 0 , aaaaaaa55555555 ) + +[1,59]: + int 02aaaaaa55555555 <- ( 0 , 2aaaaaa55555555 ) + +[1,58]: + int 2aaaaaa55555555 <- ( 0 , eaaaaaa55555555 ) + +[1,57]: + int 0aaaaaa55555555 <- ( 0 , 0aaaaaa55555555 ) + +[1,56]: + int 0aaaaaa55555555 <- ( 0 , aaaaaa55555555 ) + +[1,55]: + int 02aaaaa55555555 <- ( 0 , 2aaaaa55555555 ) + +[1,54]: + int 2aaaaa55555555 <- ( 0 , eaaaaa55555555 ) + +[1,53]: + int 0aaaaa55555555 <- ( 0 , 0aaaaa55555555 ) + +[1,52]: + int 0aaaaa55555555 <- ( 0 , aaaaa55555555 ) + +[1,51]: + int 02aaaa55555555 <- ( 0 , 2aaaa55555555 ) + +[1,50]: + int 2aaaa55555555 <- ( 0 , eaaaa55555555 ) + +[1,49]: + int 0aaaa55555555 <- ( 0 , 0aaaa55555555 ) + +[1,48]: + int 0aaaa55555555 <- ( 0 , aaaa55555555 ) + +[1,47]: + int 02aaa55555555 <- ( 0 , 2aaa55555555 ) + +[1,46]: + int 2aaa55555555 <- ( 0 , eaaa55555555 ) + +[1,45]: + int 0aaa55555555 <- ( 0 , 0aaa55555555 ) + +[1,44]: + int 0aaa55555555 <- ( 0 , aaa55555555 ) + +[1,43]: + int 02aa55555555 <- ( 0 , 2aa55555555 ) + +[1,42]: + int 2aa55555555 <- ( 0 , eaa55555555 ) + +[1,41]: + int 0aa55555555 <- ( 0 , 0aa55555555 ) + +[1,40]: + int 0aa55555555 <- ( 0 , aa55555555 ) + +[1,39]: + int 02a55555555 <- ( 0 , 2a55555555 ) + +[1,38]: + int 2a55555555 <- ( 0 , ea55555555 ) + +[1,37]: + int 0a55555555 <- ( 0 , 0a55555555 ) + +[1,36]: + int 0a55555555 <- ( 0 , a55555555 ) + +[1,35]: + int 0255555555 <- ( 0 , 255555555 ) + +[1,34]: + int 255555555 <- ( 0 , e55555555 ) + +[1,33]: + int 055555555 <- ( 0 , 055555555 ) + +[1,32]: + int 055555555 <- ( 0 , 55555555 ) + +[1,31]: + int 055555555 <- ( 0 , d5555555 ) + +[1,30]: + int 15555555 <- ( 0 , 15555555 ) + +[1,29]: + int 15555555 <- ( 0 , f5555555 ) + +[1,28]: + int 05555555 <- ( 0 , 5555555 ) + +[1,27]: + int 05555555 <- ( 0 , d555555 ) + +[1,26]: + int 1555555 <- ( 0 , 1555555 ) + +[1,25]: + int 1555555 <- ( 0 , f555555 ) + +[1,24]: + int 0555555 <- ( 0 , 555555 ) + +[1,23]: + int 0555555 <- ( 0 , d55555 ) + +[1,22]: + int 155555 <- ( 0 , 155555 ) + +[1,21]: + int 155555 <- ( 0 , f55555 ) + +[1,20]: + int 055555 <- ( 0 , 55555 ) + +[1,19]: + int 055555 <- ( 0 , d5555 ) + +[1,18]: + int 15555 <- ( 0 , 15555 ) + +[1,17]: + int 15555 <- ( 0 , f5555 ) + +[1,16]: + int 05555 <- ( 0 , 5555 ) + +[1,15]: + int 05555 <- ( 0 , d555 ) + +[1,14]: + int 1555 <- ( 0 , 1555 ) + +[1,13]: + int 1555 <- ( 0 , f555 ) + +[1,12]: + int 0555 <- ( 0 , 555 ) + +[1,11]: + int 0555 <- ( 0 , d55 ) + +[1,10]: + int 155 <- ( 0 , 155 ) + +[1,9]: + int 155 <- ( 0 , f55 ) + +[1,8]: + int 055 <- ( 0 , 55 ) + +[1,7]: + int 055 <- ( 0 , d5 ) + +[1,6]: + int 15 <- ( 0 , 15 ) + +[1,5]: + int 15 <- ( 0 , f5 ) + +[1,4]: + int 05 <- ( 0 , 5 ) + +[1,3]: + int 05 <- ( 0 , d ) + +[1,2]: + int 1 <- ( 0 , 1 ) + +[1,1]: + int 1 <- ( 0 , f ) + +[64,64]: + int 0ffffffffffffffff0000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[64,63]: + int 7fffffffffffffff8000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[64,62]: + int 3fffffffffffffffc000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[64,61]: + int 1fffffffffffffffe000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[64,60]: + int 0ffffffffffffffff000000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[64,59]: + int 7fffffffffffffff800000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[64,58]: + int 3fffffffffffffffc00000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[64,57]: + int 1fffffffffffffffe00000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[64,56]: + int 0ffffffffffffffff00000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[64,55]: + int 7fffffffffffffff80000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[64,54]: + int 3fffffffffffffffc0000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[64,53]: + int 1fffffffffffffffe0000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[64,52]: + int 0ffffffffffffffff0000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[64,51]: + int 7fffffffffffffff8000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[64,50]: + int 3fffffffffffffffc000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[64,49]: + int 1fffffffffffffffe000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[64,48]: + int 0ffffffffffffffff000000000000 <- ( ffffffffffffffff , 000000000000 ) + +[64,47]: + int 7fffffffffffffff800000000000 <- ( ffffffffffffffff , 000000000000 ) + +[64,46]: + int 3fffffffffffffffc00000000000 <- ( ffffffffffffffff , 000000000000 ) + +[64,45]: + int 1fffffffffffffffe00000000000 <- ( ffffffffffffffff , 000000000000 ) + +[64,44]: + int 0ffffffffffffffff00000000000 <- ( ffffffffffffffff , 00000000000 ) + +[64,43]: + int 7fffffffffffffff80000000000 <- ( ffffffffffffffff , 00000000000 ) + +[64,42]: + int 3fffffffffffffffc0000000000 <- ( ffffffffffffffff , 00000000000 ) + +[64,41]: + int 1fffffffffffffffe0000000000 <- ( ffffffffffffffff , 00000000000 ) + +[64,40]: + int 0ffffffffffffffff0000000000 <- ( ffffffffffffffff , 0000000000 ) + +[64,39]: + int 7fffffffffffffff8000000000 <- ( ffffffffffffffff , 0000000000 ) + +[64,38]: + int 3fffffffffffffffc000000000 <- ( ffffffffffffffff , 0000000000 ) + +[64,37]: + int 1fffffffffffffffe000000000 <- ( ffffffffffffffff , 0000000000 ) + +[64,36]: + int 0ffffffffffffffff000000000 <- ( ffffffffffffffff , 000000000 ) + +[64,35]: + int 7fffffffffffffff800000000 <- ( ffffffffffffffff , 000000000 ) + +[64,34]: + int 3fffffffffffffffc00000000 <- ( ffffffffffffffff , 000000000 ) + +[64,33]: + int 1fffffffffffffffe00000000 <- ( ffffffffffffffff , 000000000 ) + +[64,32]: + int 0ffffffffffffffff00000000 <- ( ffffffffffffffff , 00000000 ) + +[64,31]: + int 7fffffffffffffff80000000 <- ( ffffffffffffffff , 00000000 ) + +[64,30]: + int 3fffffffffffffffc0000000 <- ( ffffffffffffffff , 00000000 ) + +[64,29]: + int 1fffffffffffffffe0000000 <- ( ffffffffffffffff , 00000000 ) + +[64,28]: + int 0ffffffffffffffff0000000 <- ( ffffffffffffffff , 0000000 ) + +[64,27]: + int 7fffffffffffffff8000000 <- ( ffffffffffffffff , 0000000 ) + +[64,26]: + int 3fffffffffffffffc000000 <- ( ffffffffffffffff , 0000000 ) + +[64,25]: + int 1fffffffffffffffe000000 <- ( ffffffffffffffff , 0000000 ) + +[64,24]: + int 0ffffffffffffffff000000 <- ( ffffffffffffffff , 000000 ) + +[64,23]: + int 7fffffffffffffff800000 <- ( ffffffffffffffff , 000000 ) + +[64,22]: + int 3fffffffffffffffc00000 <- ( ffffffffffffffff , 000000 ) + +[64,21]: + int 1fffffffffffffffe00000 <- ( ffffffffffffffff , 000000 ) + +[64,20]: + int 0ffffffffffffffff00000 <- ( ffffffffffffffff , 00000 ) + +[64,19]: + int 7fffffffffffffff80000 <- ( ffffffffffffffff , 00000 ) + +[64,18]: + int 3fffffffffffffffc0000 <- ( ffffffffffffffff , 00000 ) + +[64,17]: + int 1fffffffffffffffe0000 <- ( ffffffffffffffff , 00000 ) + +[64,16]: + int 0ffffffffffffffff0000 <- ( ffffffffffffffff , 0000 ) + +[64,15]: + int 7fffffffffffffff8000 <- ( ffffffffffffffff , 0000 ) + +[64,14]: + int 3fffffffffffffffc000 <- ( ffffffffffffffff , 0000 ) + +[64,13]: + int 1fffffffffffffffe000 <- ( ffffffffffffffff , 0000 ) + +[64,12]: + int 0ffffffffffffffff000 <- ( ffffffffffffffff , 000 ) + +[64,11]: + int 7fffffffffffffff800 <- ( ffffffffffffffff , 000 ) + +[64,10]: + int 3fffffffffffffffc00 <- ( ffffffffffffffff , 000 ) + +[64,9]: + int 1fffffffffffffffe00 <- ( ffffffffffffffff , 000 ) + +[64,8]: + int 0ffffffffffffffff00 <- ( ffffffffffffffff , 00 ) + +[64,7]: + int 7fffffffffffffff80 <- ( ffffffffffffffff , 00 ) + +[64,6]: + int 3fffffffffffffffc0 <- ( ffffffffffffffff , 00 ) + +[64,5]: + int 1fffffffffffffffe0 <- ( ffffffffffffffff , 00 ) + +[64,4]: + int 0ffffffffffffffff0 <- ( ffffffffffffffff , 0 ) + +[64,3]: + int 7fffffffffffffff8 <- ( ffffffffffffffff , 0 ) + +[64,2]: + int 3fffffffffffffffc <- ( ffffffffffffffff , 0 ) + +[64,1]: + int 1fffffffffffffffe <- ( ffffffffffffffff , 0 ) + +[63,64]: + int 7fffffffffffffff0000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[63,63]: + int 3fffffffffffffff8000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[63,62]: + int 1fffffffffffffffc000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[63,61]: + int 0fffffffffffffffe000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[63,60]: + int 7fffffffffffffff000000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[63,59]: + int 3fffffffffffffff800000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[63,58]: + int 1fffffffffffffffc00000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[63,57]: + int 0fffffffffffffffe00000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[63,56]: + int 7fffffffffffffff00000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[63,55]: + int 3fffffffffffffff80000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[63,54]: + int 1fffffffffffffffc0000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[63,53]: + int 0fffffffffffffffe0000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[63,52]: + int 7fffffffffffffff0000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[63,51]: + int 3fffffffffffffff8000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[63,50]: + int 1fffffffffffffffc000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[63,49]: + int 0fffffffffffffffe000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[63,48]: + int 7fffffffffffffff000000000000 <- ( ffffffffffffffff , 000000000000 ) + +[63,47]: + int 3fffffffffffffff800000000000 <- ( ffffffffffffffff , 000000000000 ) + +[63,46]: + int 1fffffffffffffffc00000000000 <- ( ffffffffffffffff , 000000000000 ) + +[63,45]: + int 0fffffffffffffffe00000000000 <- ( ffffffffffffffff , 000000000000 ) + +[63,44]: + int 7fffffffffffffff00000000000 <- ( ffffffffffffffff , 00000000000 ) + +[63,43]: + int 3fffffffffffffff80000000000 <- ( ffffffffffffffff , 00000000000 ) + +[63,42]: + int 1fffffffffffffffc0000000000 <- ( ffffffffffffffff , 00000000000 ) + +[63,41]: + int 0fffffffffffffffe0000000000 <- ( ffffffffffffffff , 00000000000 ) + +[63,40]: + int 7fffffffffffffff0000000000 <- ( ffffffffffffffff , 0000000000 ) + +[63,39]: + int 3fffffffffffffff8000000000 <- ( ffffffffffffffff , 0000000000 ) + +[63,38]: + int 1fffffffffffffffc000000000 <- ( ffffffffffffffff , 0000000000 ) + +[63,37]: + int 0fffffffffffffffe000000000 <- ( ffffffffffffffff , 0000000000 ) + +[63,36]: + int 7fffffffffffffff000000000 <- ( ffffffffffffffff , 000000000 ) + +[63,35]: + int 3fffffffffffffff800000000 <- ( ffffffffffffffff , 000000000 ) + +[63,34]: + int 1fffffffffffffffc00000000 <- ( ffffffffffffffff , 000000000 ) + +[63,33]: + int 0fffffffffffffffe00000000 <- ( ffffffffffffffff , 000000000 ) + +[63,32]: + int 7fffffffffffffff00000000 <- ( ffffffffffffffff , 00000000 ) + +[63,31]: + int 3fffffffffffffff80000000 <- ( ffffffffffffffff , 00000000 ) + +[63,30]: + int 1fffffffffffffffc0000000 <- ( ffffffffffffffff , 00000000 ) + +[63,29]: + int 0fffffffffffffffe0000000 <- ( ffffffffffffffff , 00000000 ) + +[63,28]: + int 7fffffffffffffff0000000 <- ( ffffffffffffffff , 0000000 ) + +[63,27]: + int 3fffffffffffffff8000000 <- ( ffffffffffffffff , 0000000 ) + +[63,26]: + int 1fffffffffffffffc000000 <- ( ffffffffffffffff , 0000000 ) + +[63,25]: + int 0fffffffffffffffe000000 <- ( ffffffffffffffff , 0000000 ) + +[63,24]: + int 7fffffffffffffff000000 <- ( ffffffffffffffff , 000000 ) + +[63,23]: + int 3fffffffffffffff800000 <- ( ffffffffffffffff , 000000 ) + +[63,22]: + int 1fffffffffffffffc00000 <- ( ffffffffffffffff , 000000 ) + +[63,21]: + int 0fffffffffffffffe00000 <- ( ffffffffffffffff , 000000 ) + +[63,20]: + int 7fffffffffffffff00000 <- ( ffffffffffffffff , 00000 ) + +[63,19]: + int 3fffffffffffffff80000 <- ( ffffffffffffffff , 00000 ) + +[63,18]: + int 1fffffffffffffffc0000 <- ( ffffffffffffffff , 00000 ) + +[63,17]: + int 0fffffffffffffffe0000 <- ( ffffffffffffffff , 00000 ) + +[63,16]: + int 7fffffffffffffff0000 <- ( ffffffffffffffff , 0000 ) + +[63,15]: + int 3fffffffffffffff8000 <- ( ffffffffffffffff , 0000 ) + +[63,14]: + int 1fffffffffffffffc000 <- ( ffffffffffffffff , 0000 ) + +[63,13]: + int 0fffffffffffffffe000 <- ( ffffffffffffffff , 0000 ) + +[63,12]: + int 7fffffffffffffff000 <- ( ffffffffffffffff , 000 ) + +[63,11]: + int 3fffffffffffffff800 <- ( ffffffffffffffff , 000 ) + +[63,10]: + int 1fffffffffffffffc00 <- ( ffffffffffffffff , 000 ) + +[63,9]: + int 0fffffffffffffffe00 <- ( ffffffffffffffff , 000 ) + +[63,8]: + int 7fffffffffffffff00 <- ( ffffffffffffffff , 00 ) + +[63,7]: + int 3fffffffffffffff80 <- ( ffffffffffffffff , 00 ) + +[63,6]: + int 1fffffffffffffffc0 <- ( ffffffffffffffff , 00 ) + +[63,5]: + int 0fffffffffffffffe0 <- ( ffffffffffffffff , 00 ) + +[63,4]: + int 7fffffffffffffff0 <- ( ffffffffffffffff , 0 ) + +[63,3]: + int 3fffffffffffffff8 <- ( ffffffffffffffff , 0 ) + +[63,2]: + int 1fffffffffffffffc <- ( ffffffffffffffff , 0 ) + +[63,1]: + int 0fffffffffffffffe <- ( ffffffffffffffff , 0 ) + +[62,64]: + int 3fffffffffffffff0000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[62,63]: + int 1fffffffffffffff8000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[62,62]: + int 0fffffffffffffffc000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[62,61]: + int 7ffffffffffffffe000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[62,60]: + int 3fffffffffffffff000000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[62,59]: + int 1fffffffffffffff800000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[62,58]: + int 0fffffffffffffffc00000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[62,57]: + int 7ffffffffffffffe00000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[62,56]: + int 3fffffffffffffff00000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[62,55]: + int 1fffffffffffffff80000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[62,54]: + int 0fffffffffffffffc0000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[62,53]: + int 7ffffffffffffffe0000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[62,52]: + int 3fffffffffffffff0000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[62,51]: + int 1fffffffffffffff8000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[62,50]: + int 0fffffffffffffffc000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[62,49]: + int 7ffffffffffffffe000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[62,48]: + int 3fffffffffffffff000000000000 <- ( ffffffffffffffff , 000000000000 ) + +[62,47]: + int 1fffffffffffffff800000000000 <- ( ffffffffffffffff , 000000000000 ) + +[62,46]: + int 0fffffffffffffffc00000000000 <- ( ffffffffffffffff , 000000000000 ) + +[62,45]: + int 7ffffffffffffffe00000000000 <- ( ffffffffffffffff , 000000000000 ) + +[62,44]: + int 3fffffffffffffff00000000000 <- ( ffffffffffffffff , 00000000000 ) + +[62,43]: + int 1fffffffffffffff80000000000 <- ( ffffffffffffffff , 00000000000 ) + +[62,42]: + int 0fffffffffffffffc0000000000 <- ( ffffffffffffffff , 00000000000 ) + +[62,41]: + int 7ffffffffffffffe0000000000 <- ( ffffffffffffffff , 00000000000 ) + +[62,40]: + int 3fffffffffffffff0000000000 <- ( ffffffffffffffff , 0000000000 ) + +[62,39]: + int 1fffffffffffffff8000000000 <- ( ffffffffffffffff , 0000000000 ) + +[62,38]: + int 0fffffffffffffffc000000000 <- ( ffffffffffffffff , 0000000000 ) + +[62,37]: + int 7ffffffffffffffe000000000 <- ( ffffffffffffffff , 0000000000 ) + +[62,36]: + int 3fffffffffffffff000000000 <- ( ffffffffffffffff , 000000000 ) + +[62,35]: + int 1fffffffffffffff800000000 <- ( ffffffffffffffff , 000000000 ) + +[62,34]: + int 0fffffffffffffffc00000000 <- ( ffffffffffffffff , 000000000 ) + +[62,33]: + int 7ffffffffffffffe00000000 <- ( ffffffffffffffff , 000000000 ) + +[62,32]: + int 3fffffffffffffff00000000 <- ( ffffffffffffffff , 00000000 ) + +[62,31]: + int 1fffffffffffffff80000000 <- ( ffffffffffffffff , 00000000 ) + +[62,30]: + int 0fffffffffffffffc0000000 <- ( ffffffffffffffff , 00000000 ) + +[62,29]: + int 7ffffffffffffffe0000000 <- ( ffffffffffffffff , 00000000 ) + +[62,28]: + int 3fffffffffffffff0000000 <- ( ffffffffffffffff , 0000000 ) + +[62,27]: + int 1fffffffffffffff8000000 <- ( ffffffffffffffff , 0000000 ) + +[62,26]: + int 0fffffffffffffffc000000 <- ( ffffffffffffffff , 0000000 ) + +[62,25]: + int 7ffffffffffffffe000000 <- ( ffffffffffffffff , 0000000 ) + +[62,24]: + int 3fffffffffffffff000000 <- ( ffffffffffffffff , 000000 ) + +[62,23]: + int 1fffffffffffffff800000 <- ( ffffffffffffffff , 000000 ) + +[62,22]: + int 0fffffffffffffffc00000 <- ( ffffffffffffffff , 000000 ) + +[62,21]: + int 7ffffffffffffffe00000 <- ( ffffffffffffffff , 000000 ) + +[62,20]: + int 3fffffffffffffff00000 <- ( ffffffffffffffff , 00000 ) + +[62,19]: + int 1fffffffffffffff80000 <- ( ffffffffffffffff , 00000 ) + +[62,18]: + int 0fffffffffffffffc0000 <- ( ffffffffffffffff , 00000 ) + +[62,17]: + int 7ffffffffffffffe0000 <- ( ffffffffffffffff , 00000 ) + +[62,16]: + int 3fffffffffffffff0000 <- ( ffffffffffffffff , 0000 ) + +[62,15]: + int 1fffffffffffffff8000 <- ( ffffffffffffffff , 0000 ) + +[62,14]: + int 0fffffffffffffffc000 <- ( ffffffffffffffff , 0000 ) + +[62,13]: + int 7ffffffffffffffe000 <- ( ffffffffffffffff , 0000 ) + +[62,12]: + int 3fffffffffffffff000 <- ( ffffffffffffffff , 000 ) + +[62,11]: + int 1fffffffffffffff800 <- ( ffffffffffffffff , 000 ) + +[62,10]: + int 0fffffffffffffffc00 <- ( ffffffffffffffff , 000 ) + +[62,9]: + int 7ffffffffffffffe00 <- ( ffffffffffffffff , 000 ) + +[62,8]: + int 3fffffffffffffff00 <- ( ffffffffffffffff , 00 ) + +[62,7]: + int 1fffffffffffffff80 <- ( ffffffffffffffff , 00 ) + +[62,6]: + int 0fffffffffffffffc0 <- ( ffffffffffffffff , 00 ) + +[62,5]: + int 7ffffffffffffffe0 <- ( ffffffffffffffff , 00 ) + +[62,4]: + int 3fffffffffffffff0 <- ( ffffffffffffffff , 0 ) + +[62,3]: + int 1fffffffffffffff8 <- ( ffffffffffffffff , 0 ) + +[62,2]: + int 0fffffffffffffffc <- ( ffffffffffffffff , 0 ) + +[62,1]: + int 7ffffffffffffffe <- ( ffffffffffffffff , 0 ) + +[61,64]: + int 1fffffffffffffff0000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[61,63]: + int 0fffffffffffffff8000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[61,62]: + int 7ffffffffffffffc000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[61,61]: + int 3ffffffffffffffe000000000000000 <- ( ffffffffffffffff , 0000000000000000 ) + +[61,60]: + int 1fffffffffffffff000000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[61,59]: + int 0fffffffffffffff800000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[61,58]: + int 7ffffffffffffffc00000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[61,57]: + int 3ffffffffffffffe00000000000000 <- ( ffffffffffffffff , 000000000000000 ) + +[61,56]: + int 1fffffffffffffff00000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[61,55]: + int 0fffffffffffffff80000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[61,54]: + int 7ffffffffffffffc0000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[61,53]: + int 3ffffffffffffffe0000000000000 <- ( ffffffffffffffff , 00000000000000 ) + +[61,52]: + int 1fffffffffffffff0000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[61,51]: + int 0fffffffffffffff8000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[61,50]: + int 7ffffffffffffffc000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[61,49]: + int 3ffffffffffffffe000000000000 <- ( ffffffffffffffff , 0000000000000 ) + +[61,48]: + int 1fffffffffffffff000000000000 <- ( ffffffffffffffff , 000000000000 ) + +[61,47]: + int 0fffffffffffffff800000000000 <- ( ffffffffffffffff , 000000000000 ) + +[61,46]: + int 7ffffffffffffffc00000000000 <- ( ffffffffffffffff , 000000000000 ) + +[61,45]: + int 3ffffffffffffffe00000000000 <- ( ffffffffffffffff , 000000000000 ) + +[61,44]: + int 1fffffffffffffff00000000000 <- ( ffffffffffffffff , 00000000000 ) + +[61,43]: + int 0fffffffffffffff80000000000 <- ( ffffffffffffffff , 00000000000 ) + +[61,42]: + int 7ffffffffffffffc0000000000 <- ( ffffffffffffffff , 00000000000 ) + +[61,41]: + int 3ffffffffffffffe0000000000 <- ( ffffffffffffffff , 00000000000 ) + +[61,40]: + int 1fffffffffffffff0000000000 <- ( ffffffffffffffff , 0000000000 ) + +[61,39]: + int 0fffffffffffffff8000000000 <- ( ffffffffffffffff , 0000000000 ) + +[61,38]: + int 7ffffffffffffffc000000000 <- ( ffffffffffffffff , 0000000000 ) + +[61,37]: + int 3ffffffffffffffe000000000 <- ( ffffffffffffffff , 0000000000 ) + +[61,36]: + int 1fffffffffffffff000000000 <- ( ffffffffffffffff , 000000000 ) + +[61,35]: + int 0fffffffffffffff800000000 <- ( ffffffffffffffff , 000000000 ) + +[61,34]: + int 7ffffffffffffffc00000000 <- ( ffffffffffffffff , 000000000 ) + +[61,33]: + int 3ffffffffffffffe00000000 <- ( ffffffffffffffff , 000000000 ) + +[61,32]: + int 1fffffffffffffff00000000 <- ( ffffffffffffffff , 00000000 ) + +[61,31]: + int 0fffffffffffffff80000000 <- ( ffffffffffffffff , 00000000 ) + +[61,30]: + int 7ffffffffffffffc0000000 <- ( ffffffffffffffff , 00000000 ) + +[61,29]: + int 3ffffffffffffffe0000000 <- ( ffffffffffffffff , 00000000 ) + +[61,28]: + int 1fffffffffffffff0000000 <- ( ffffffffffffffff , 0000000 ) + +[61,27]: + int 0fffffffffffffff8000000 <- ( ffffffffffffffff , 0000000 ) + +[61,26]: + int 7ffffffffffffffc000000 <- ( ffffffffffffffff , 0000000 ) + +[61,25]: + int 3ffffffffffffffe000000 <- ( ffffffffffffffff , 0000000 ) + +[61,24]: + int 1fffffffffffffff000000 <- ( ffffffffffffffff , 000000 ) + +[61,23]: + int 0fffffffffffffff800000 <- ( ffffffffffffffff , 000000 ) + +[61,22]: + int 7ffffffffffffffc00000 <- ( ffffffffffffffff , 000000 ) + +[61,21]: + int 3ffffffffffffffe00000 <- ( ffffffffffffffff , 000000 ) + +[61,20]: + int 1fffffffffffffff00000 <- ( ffffffffffffffff , 00000 ) + +[61,19]: + int 0fffffffffffffff80000 <- ( ffffffffffffffff , 00000 ) + +[61,18]: + int 7ffffffffffffffc0000 <- ( ffffffffffffffff , 00000 ) + +[61,17]: + int 3ffffffffffffffe0000 <- ( ffffffffffffffff , 00000 ) + +[61,16]: + int 1fffffffffffffff0000 <- ( ffffffffffffffff , 0000 ) + +[61,15]: + int 0fffffffffffffff8000 <- ( ffffffffffffffff , 0000 ) + +[61,14]: + int 7ffffffffffffffc000 <- ( ffffffffffffffff , 0000 ) + +[61,13]: + int 3ffffffffffffffe000 <- ( ffffffffffffffff , 0000 ) + +[61,12]: + int 1fffffffffffffff000 <- ( ffffffffffffffff , 000 ) + +[61,11]: + int 0fffffffffffffff800 <- ( ffffffffffffffff , 000 ) + +[61,10]: + int 7ffffffffffffffc00 <- ( ffffffffffffffff , 000 ) + +[61,9]: + int 3ffffffffffffffe00 <- ( ffffffffffffffff , 000 ) + +[61,8]: + int 1fffffffffffffff00 <- ( ffffffffffffffff , 00 ) + +[61,7]: + int 0fffffffffffffff80 <- ( ffffffffffffffff , 00 ) + +[61,6]: + int 7ffffffffffffffc0 <- ( ffffffffffffffff , 00 ) + +[61,5]: + int 3ffffffffffffffe0 <- ( ffffffffffffffff , 00 ) + +[61,4]: + int 1fffffffffffffff0 <- ( ffffffffffffffff , 0 ) + +[61,3]: + int 0fffffffffffffff8 <- ( ffffffffffffffff , 0 ) + +[61,2]: + int 7ffffffffffffffc <- ( ffffffffffffffff , 0 ) + +[61,1]: + int 3ffffffffffffffe <- ( ffffffffffffffff , 0 ) + +[60,64]: + int 0fffffffffffffff0000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[60,63]: + int 7ffffffffffffff8000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[60,62]: + int 3ffffffffffffffc000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[60,61]: + int 1ffffffffffffffe000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[60,60]: + int 0fffffffffffffff000000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[60,59]: + int 7ffffffffffffff800000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[60,58]: + int 3ffffffffffffffc00000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[60,57]: + int 1ffffffffffffffe00000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[60,56]: + int 0fffffffffffffff00000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[60,55]: + int 7ffffffffffffff80000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[60,54]: + int 3ffffffffffffffc0000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[60,53]: + int 1ffffffffffffffe0000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[60,52]: + int 0fffffffffffffff0000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[60,51]: + int 7ffffffffffffff8000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[60,50]: + int 3ffffffffffffffc000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[60,49]: + int 1ffffffffffffffe000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[60,48]: + int 0fffffffffffffff000000000000 <- ( fffffffffffffff , 000000000000 ) + +[60,47]: + int 7ffffffffffffff800000000000 <- ( fffffffffffffff , 000000000000 ) + +[60,46]: + int 3ffffffffffffffc00000000000 <- ( fffffffffffffff , 000000000000 ) + +[60,45]: + int 1ffffffffffffffe00000000000 <- ( fffffffffffffff , 000000000000 ) + +[60,44]: + int 0fffffffffffffff00000000000 <- ( fffffffffffffff , 00000000000 ) + +[60,43]: + int 7ffffffffffffff80000000000 <- ( fffffffffffffff , 00000000000 ) + +[60,42]: + int 3ffffffffffffffc0000000000 <- ( fffffffffffffff , 00000000000 ) + +[60,41]: + int 1ffffffffffffffe0000000000 <- ( fffffffffffffff , 00000000000 ) + +[60,40]: + int 0fffffffffffffff0000000000 <- ( fffffffffffffff , 0000000000 ) + +[60,39]: + int 7ffffffffffffff8000000000 <- ( fffffffffffffff , 0000000000 ) + +[60,38]: + int 3ffffffffffffffc000000000 <- ( fffffffffffffff , 0000000000 ) + +[60,37]: + int 1ffffffffffffffe000000000 <- ( fffffffffffffff , 0000000000 ) + +[60,36]: + int 0fffffffffffffff000000000 <- ( fffffffffffffff , 000000000 ) + +[60,35]: + int 7ffffffffffffff800000000 <- ( fffffffffffffff , 000000000 ) + +[60,34]: + int 3ffffffffffffffc00000000 <- ( fffffffffffffff , 000000000 ) + +[60,33]: + int 1ffffffffffffffe00000000 <- ( fffffffffffffff , 000000000 ) + +[60,32]: + int 0fffffffffffffff00000000 <- ( fffffffffffffff , 00000000 ) + +[60,31]: + int 7ffffffffffffff80000000 <- ( fffffffffffffff , 00000000 ) + +[60,30]: + int 3ffffffffffffffc0000000 <- ( fffffffffffffff , 00000000 ) + +[60,29]: + int 1ffffffffffffffe0000000 <- ( fffffffffffffff , 00000000 ) + +[60,28]: + int 0fffffffffffffff0000000 <- ( fffffffffffffff , 0000000 ) + +[60,27]: + int 7ffffffffffffff8000000 <- ( fffffffffffffff , 0000000 ) + +[60,26]: + int 3ffffffffffffffc000000 <- ( fffffffffffffff , 0000000 ) + +[60,25]: + int 1ffffffffffffffe000000 <- ( fffffffffffffff , 0000000 ) + +[60,24]: + int 0fffffffffffffff000000 <- ( fffffffffffffff , 000000 ) + +[60,23]: + int 7ffffffffffffff800000 <- ( fffffffffffffff , 000000 ) + +[60,22]: + int 3ffffffffffffffc00000 <- ( fffffffffffffff , 000000 ) + +[60,21]: + int 1ffffffffffffffe00000 <- ( fffffffffffffff , 000000 ) + +[60,20]: + int 0fffffffffffffff00000 <- ( fffffffffffffff , 00000 ) + +[60,19]: + int 7ffffffffffffff80000 <- ( fffffffffffffff , 00000 ) + +[60,18]: + int 3ffffffffffffffc0000 <- ( fffffffffffffff , 00000 ) + +[60,17]: + int 1ffffffffffffffe0000 <- ( fffffffffffffff , 00000 ) + +[60,16]: + int 0fffffffffffffff0000 <- ( fffffffffffffff , 0000 ) + +[60,15]: + int 7ffffffffffffff8000 <- ( fffffffffffffff , 0000 ) + +[60,14]: + int 3ffffffffffffffc000 <- ( fffffffffffffff , 0000 ) + +[60,13]: + int 1ffffffffffffffe000 <- ( fffffffffffffff , 0000 ) + +[60,12]: + int 0fffffffffffffff000 <- ( fffffffffffffff , 000 ) + +[60,11]: + int 7ffffffffffffff800 <- ( fffffffffffffff , 000 ) + +[60,10]: + int 3ffffffffffffffc00 <- ( fffffffffffffff , 000 ) + +[60,9]: + int 1ffffffffffffffe00 <- ( fffffffffffffff , 000 ) + +[60,8]: + int 0fffffffffffffff00 <- ( fffffffffffffff , 00 ) + +[60,7]: + int 7ffffffffffffff80 <- ( fffffffffffffff , 00 ) + +[60,6]: + int 3ffffffffffffffc0 <- ( fffffffffffffff , 00 ) + +[60,5]: + int 1ffffffffffffffe0 <- ( fffffffffffffff , 00 ) + +[60,4]: + int 0fffffffffffffff0 <- ( fffffffffffffff , 0 ) + +[60,3]: + int 7ffffffffffffff8 <- ( fffffffffffffff , 0 ) + +[60,2]: + int 3ffffffffffffffc <- ( fffffffffffffff , 0 ) + +[60,1]: + int 1ffffffffffffffe <- ( fffffffffffffff , 0 ) + +[59,64]: + int 7ffffffffffffff0000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[59,63]: + int 3ffffffffffffff8000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[59,62]: + int 1ffffffffffffffc000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[59,61]: + int 0ffffffffffffffe000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[59,60]: + int 7ffffffffffffff000000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[59,59]: + int 3ffffffffffffff800000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[59,58]: + int 1ffffffffffffffc00000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[59,57]: + int 0ffffffffffffffe00000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[59,56]: + int 7ffffffffffffff00000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[59,55]: + int 3ffffffffffffff80000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[59,54]: + int 1ffffffffffffffc0000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[59,53]: + int 0ffffffffffffffe0000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[59,52]: + int 7ffffffffffffff0000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[59,51]: + int 3ffffffffffffff8000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[59,50]: + int 1ffffffffffffffc000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[59,49]: + int 0ffffffffffffffe000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[59,48]: + int 7ffffffffffffff000000000000 <- ( fffffffffffffff , 000000000000 ) + +[59,47]: + int 3ffffffffffffff800000000000 <- ( fffffffffffffff , 000000000000 ) + +[59,46]: + int 1ffffffffffffffc00000000000 <- ( fffffffffffffff , 000000000000 ) + +[59,45]: + int 0ffffffffffffffe00000000000 <- ( fffffffffffffff , 000000000000 ) + +[59,44]: + int 7ffffffffffffff00000000000 <- ( fffffffffffffff , 00000000000 ) + +[59,43]: + int 3ffffffffffffff80000000000 <- ( fffffffffffffff , 00000000000 ) + +[59,42]: + int 1ffffffffffffffc0000000000 <- ( fffffffffffffff , 00000000000 ) + +[59,41]: + int 0ffffffffffffffe0000000000 <- ( fffffffffffffff , 00000000000 ) + +[59,40]: + int 7ffffffffffffff0000000000 <- ( fffffffffffffff , 0000000000 ) + +[59,39]: + int 3ffffffffffffff8000000000 <- ( fffffffffffffff , 0000000000 ) + +[59,38]: + int 1ffffffffffffffc000000000 <- ( fffffffffffffff , 0000000000 ) + +[59,37]: + int 0ffffffffffffffe000000000 <- ( fffffffffffffff , 0000000000 ) + +[59,36]: + int 7ffffffffffffff000000000 <- ( fffffffffffffff , 000000000 ) + +[59,35]: + int 3ffffffffffffff800000000 <- ( fffffffffffffff , 000000000 ) + +[59,34]: + int 1ffffffffffffffc00000000 <- ( fffffffffffffff , 000000000 ) + +[59,33]: + int 0ffffffffffffffe00000000 <- ( fffffffffffffff , 000000000 ) + +[59,32]: + int 7ffffffffffffff00000000 <- ( fffffffffffffff , 00000000 ) + +[59,31]: + int 3ffffffffffffff80000000 <- ( fffffffffffffff , 00000000 ) + +[59,30]: + int 1ffffffffffffffc0000000 <- ( fffffffffffffff , 00000000 ) + +[59,29]: + int 0ffffffffffffffe0000000 <- ( fffffffffffffff , 00000000 ) + +[59,28]: + int 7ffffffffffffff0000000 <- ( fffffffffffffff , 0000000 ) + +[59,27]: + int 3ffffffffffffff8000000 <- ( fffffffffffffff , 0000000 ) + +[59,26]: + int 1ffffffffffffffc000000 <- ( fffffffffffffff , 0000000 ) + +[59,25]: + int 0ffffffffffffffe000000 <- ( fffffffffffffff , 0000000 ) + +[59,24]: + int 7ffffffffffffff000000 <- ( fffffffffffffff , 000000 ) + +[59,23]: + int 3ffffffffffffff800000 <- ( fffffffffffffff , 000000 ) + +[59,22]: + int 1ffffffffffffffc00000 <- ( fffffffffffffff , 000000 ) + +[59,21]: + int 0ffffffffffffffe00000 <- ( fffffffffffffff , 000000 ) + +[59,20]: + int 7ffffffffffffff00000 <- ( fffffffffffffff , 00000 ) + +[59,19]: + int 3ffffffffffffff80000 <- ( fffffffffffffff , 00000 ) + +[59,18]: + int 1ffffffffffffffc0000 <- ( fffffffffffffff , 00000 ) + +[59,17]: + int 0ffffffffffffffe0000 <- ( fffffffffffffff , 00000 ) + +[59,16]: + int 7ffffffffffffff0000 <- ( fffffffffffffff , 0000 ) + +[59,15]: + int 3ffffffffffffff8000 <- ( fffffffffffffff , 0000 ) + +[59,14]: + int 1ffffffffffffffc000 <- ( fffffffffffffff , 0000 ) + +[59,13]: + int 0ffffffffffffffe000 <- ( fffffffffffffff , 0000 ) + +[59,12]: + int 7ffffffffffffff000 <- ( fffffffffffffff , 000 ) + +[59,11]: + int 3ffffffffffffff800 <- ( fffffffffffffff , 000 ) + +[59,10]: + int 1ffffffffffffffc00 <- ( fffffffffffffff , 000 ) + +[59,9]: + int 0ffffffffffffffe00 <- ( fffffffffffffff , 000 ) + +[59,8]: + int 7ffffffffffffff00 <- ( fffffffffffffff , 00 ) + +[59,7]: + int 3ffffffffffffff80 <- ( fffffffffffffff , 00 ) + +[59,6]: + int 1ffffffffffffffc0 <- ( fffffffffffffff , 00 ) + +[59,5]: + int 0ffffffffffffffe0 <- ( fffffffffffffff , 00 ) + +[59,4]: + int 7ffffffffffffff0 <- ( fffffffffffffff , 0 ) + +[59,3]: + int 3ffffffffffffff8 <- ( fffffffffffffff , 0 ) + +[59,2]: + int 1ffffffffffffffc <- ( fffffffffffffff , 0 ) + +[59,1]: + int 0ffffffffffffffe <- ( fffffffffffffff , 0 ) + +[58,64]: + int 3ffffffffffffff0000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[58,63]: + int 1ffffffffffffff8000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[58,62]: + int 0ffffffffffffffc000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[58,61]: + int 7fffffffffffffe000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[58,60]: + int 3ffffffffffffff000000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[58,59]: + int 1ffffffffffffff800000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[58,58]: + int 0ffffffffffffffc00000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[58,57]: + int 7fffffffffffffe00000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[58,56]: + int 3ffffffffffffff00000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[58,55]: + int 1ffffffffffffff80000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[58,54]: + int 0ffffffffffffffc0000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[58,53]: + int 7fffffffffffffe0000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[58,52]: + int 3ffffffffffffff0000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[58,51]: + int 1ffffffffffffff8000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[58,50]: + int 0ffffffffffffffc000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[58,49]: + int 7fffffffffffffe000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[58,48]: + int 3ffffffffffffff000000000000 <- ( fffffffffffffff , 000000000000 ) + +[58,47]: + int 1ffffffffffffff800000000000 <- ( fffffffffffffff , 000000000000 ) + +[58,46]: + int 0ffffffffffffffc00000000000 <- ( fffffffffffffff , 000000000000 ) + +[58,45]: + int 7fffffffffffffe00000000000 <- ( fffffffffffffff , 000000000000 ) + +[58,44]: + int 3ffffffffffffff00000000000 <- ( fffffffffffffff , 00000000000 ) + +[58,43]: + int 1ffffffffffffff80000000000 <- ( fffffffffffffff , 00000000000 ) + +[58,42]: + int 0ffffffffffffffc0000000000 <- ( fffffffffffffff , 00000000000 ) + +[58,41]: + int 7fffffffffffffe0000000000 <- ( fffffffffffffff , 00000000000 ) + +[58,40]: + int 3ffffffffffffff0000000000 <- ( fffffffffffffff , 0000000000 ) + +[58,39]: + int 1ffffffffffffff8000000000 <- ( fffffffffffffff , 0000000000 ) + +[58,38]: + int 0ffffffffffffffc000000000 <- ( fffffffffffffff , 0000000000 ) + +[58,37]: + int 7fffffffffffffe000000000 <- ( fffffffffffffff , 0000000000 ) + +[58,36]: + int 3ffffffffffffff000000000 <- ( fffffffffffffff , 000000000 ) + +[58,35]: + int 1ffffffffffffff800000000 <- ( fffffffffffffff , 000000000 ) + +[58,34]: + int 0ffffffffffffffc00000000 <- ( fffffffffffffff , 000000000 ) + +[58,33]: + int 7fffffffffffffe00000000 <- ( fffffffffffffff , 000000000 ) + +[58,32]: + int 3ffffffffffffff00000000 <- ( fffffffffffffff , 00000000 ) + +[58,31]: + int 1ffffffffffffff80000000 <- ( fffffffffffffff , 00000000 ) + +[58,30]: + int 0ffffffffffffffc0000000 <- ( fffffffffffffff , 00000000 ) + +[58,29]: + int 7fffffffffffffe0000000 <- ( fffffffffffffff , 00000000 ) + +[58,28]: + int 3ffffffffffffff0000000 <- ( fffffffffffffff , 0000000 ) + +[58,27]: + int 1ffffffffffffff8000000 <- ( fffffffffffffff , 0000000 ) + +[58,26]: + int 0ffffffffffffffc000000 <- ( fffffffffffffff , 0000000 ) + +[58,25]: + int 7fffffffffffffe000000 <- ( fffffffffffffff , 0000000 ) + +[58,24]: + int 3ffffffffffffff000000 <- ( fffffffffffffff , 000000 ) + +[58,23]: + int 1ffffffffffffff800000 <- ( fffffffffffffff , 000000 ) + +[58,22]: + int 0ffffffffffffffc00000 <- ( fffffffffffffff , 000000 ) + +[58,21]: + int 7fffffffffffffe00000 <- ( fffffffffffffff , 000000 ) + +[58,20]: + int 3ffffffffffffff00000 <- ( fffffffffffffff , 00000 ) + +[58,19]: + int 1ffffffffffffff80000 <- ( fffffffffffffff , 00000 ) + +[58,18]: + int 0ffffffffffffffc0000 <- ( fffffffffffffff , 00000 ) + +[58,17]: + int 7fffffffffffffe0000 <- ( fffffffffffffff , 00000 ) + +[58,16]: + int 3ffffffffffffff0000 <- ( fffffffffffffff , 0000 ) + +[58,15]: + int 1ffffffffffffff8000 <- ( fffffffffffffff , 0000 ) + +[58,14]: + int 0ffffffffffffffc000 <- ( fffffffffffffff , 0000 ) + +[58,13]: + int 7fffffffffffffe000 <- ( fffffffffffffff , 0000 ) + +[58,12]: + int 3ffffffffffffff000 <- ( fffffffffffffff , 000 ) + +[58,11]: + int 1ffffffffffffff800 <- ( fffffffffffffff , 000 ) + +[58,10]: + int 0ffffffffffffffc00 <- ( fffffffffffffff , 000 ) + +[58,9]: + int 7fffffffffffffe00 <- ( fffffffffffffff , 000 ) + +[58,8]: + int 3ffffffffffffff00 <- ( fffffffffffffff , 00 ) + +[58,7]: + int 1ffffffffffffff80 <- ( fffffffffffffff , 00 ) + +[58,6]: + int 0ffffffffffffffc0 <- ( fffffffffffffff , 00 ) + +[58,5]: + int 7fffffffffffffe0 <- ( fffffffffffffff , 00 ) + +[58,4]: + int 3ffffffffffffff0 <- ( fffffffffffffff , 0 ) + +[58,3]: + int 1ffffffffffffff8 <- ( fffffffffffffff , 0 ) + +[58,2]: + int 0ffffffffffffffc <- ( fffffffffffffff , 0 ) + +[58,1]: + int 7fffffffffffffe <- ( fffffffffffffff , 0 ) + +[57,64]: + int 1ffffffffffffff0000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[57,63]: + int 0ffffffffffffff8000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[57,62]: + int 7fffffffffffffc000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[57,61]: + int 3fffffffffffffe000000000000000 <- ( fffffffffffffff , 0000000000000000 ) + +[57,60]: + int 1ffffffffffffff000000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[57,59]: + int 0ffffffffffffff800000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[57,58]: + int 7fffffffffffffc00000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[57,57]: + int 3fffffffffffffe00000000000000 <- ( fffffffffffffff , 000000000000000 ) + +[57,56]: + int 1ffffffffffffff00000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[57,55]: + int 0ffffffffffffff80000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[57,54]: + int 7fffffffffffffc0000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[57,53]: + int 3fffffffffffffe0000000000000 <- ( fffffffffffffff , 00000000000000 ) + +[57,52]: + int 1ffffffffffffff0000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[57,51]: + int 0ffffffffffffff8000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[57,50]: + int 7fffffffffffffc000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[57,49]: + int 3fffffffffffffe000000000000 <- ( fffffffffffffff , 0000000000000 ) + +[57,48]: + int 1ffffffffffffff000000000000 <- ( fffffffffffffff , 000000000000 ) + +[57,47]: + int 0ffffffffffffff800000000000 <- ( fffffffffffffff , 000000000000 ) + +[57,46]: + int 7fffffffffffffc00000000000 <- ( fffffffffffffff , 000000000000 ) + +[57,45]: + int 3fffffffffffffe00000000000 <- ( fffffffffffffff , 000000000000 ) + +[57,44]: + int 1ffffffffffffff00000000000 <- ( fffffffffffffff , 00000000000 ) + +[57,43]: + int 0ffffffffffffff80000000000 <- ( fffffffffffffff , 00000000000 ) + +[57,42]: + int 7fffffffffffffc0000000000 <- ( fffffffffffffff , 00000000000 ) + +[57,41]: + int 3fffffffffffffe0000000000 <- ( fffffffffffffff , 00000000000 ) + +[57,40]: + int 1ffffffffffffff0000000000 <- ( fffffffffffffff , 0000000000 ) + +[57,39]: + int 0ffffffffffffff8000000000 <- ( fffffffffffffff , 0000000000 ) + +[57,38]: + int 7fffffffffffffc000000000 <- ( fffffffffffffff , 0000000000 ) + +[57,37]: + int 3fffffffffffffe000000000 <- ( fffffffffffffff , 0000000000 ) + +[57,36]: + int 1ffffffffffffff000000000 <- ( fffffffffffffff , 000000000 ) + +[57,35]: + int 0ffffffffffffff800000000 <- ( fffffffffffffff , 000000000 ) + +[57,34]: + int 7fffffffffffffc00000000 <- ( fffffffffffffff , 000000000 ) + +[57,33]: + int 3fffffffffffffe00000000 <- ( fffffffffffffff , 000000000 ) + +[57,32]: + int 1ffffffffffffff00000000 <- ( fffffffffffffff , 00000000 ) + +[57,31]: + int 0ffffffffffffff80000000 <- ( fffffffffffffff , 00000000 ) + +[57,30]: + int 7fffffffffffffc0000000 <- ( fffffffffffffff , 00000000 ) + +[57,29]: + int 3fffffffffffffe0000000 <- ( fffffffffffffff , 00000000 ) + +[57,28]: + int 1ffffffffffffff0000000 <- ( fffffffffffffff , 0000000 ) + +[57,27]: + int 0ffffffffffffff8000000 <- ( fffffffffffffff , 0000000 ) + +[57,26]: + int 7fffffffffffffc000000 <- ( fffffffffffffff , 0000000 ) + +[57,25]: + int 3fffffffffffffe000000 <- ( fffffffffffffff , 0000000 ) + +[57,24]: + int 1ffffffffffffff000000 <- ( fffffffffffffff , 000000 ) + +[57,23]: + int 0ffffffffffffff800000 <- ( fffffffffffffff , 000000 ) + +[57,22]: + int 7fffffffffffffc00000 <- ( fffffffffffffff , 000000 ) + +[57,21]: + int 3fffffffffffffe00000 <- ( fffffffffffffff , 000000 ) + +[57,20]: + int 1ffffffffffffff00000 <- ( fffffffffffffff , 00000 ) + +[57,19]: + int 0ffffffffffffff80000 <- ( fffffffffffffff , 00000 ) + +[57,18]: + int 7fffffffffffffc0000 <- ( fffffffffffffff , 00000 ) + +[57,17]: + int 3fffffffffffffe0000 <- ( fffffffffffffff , 00000 ) + +[57,16]: + int 1ffffffffffffff0000 <- ( fffffffffffffff , 0000 ) + +[57,15]: + int 0ffffffffffffff8000 <- ( fffffffffffffff , 0000 ) + +[57,14]: + int 7fffffffffffffc000 <- ( fffffffffffffff , 0000 ) + +[57,13]: + int 3fffffffffffffe000 <- ( fffffffffffffff , 0000 ) + +[57,12]: + int 1ffffffffffffff000 <- ( fffffffffffffff , 000 ) + +[57,11]: + int 0ffffffffffffff800 <- ( fffffffffffffff , 000 ) + +[57,10]: + int 7fffffffffffffc00 <- ( fffffffffffffff , 000 ) + +[57,9]: + int 3fffffffffffffe00 <- ( fffffffffffffff , 000 ) + +[57,8]: + int 1ffffffffffffff00 <- ( fffffffffffffff , 00 ) + +[57,7]: + int 0ffffffffffffff80 <- ( fffffffffffffff , 00 ) + +[57,6]: + int 7fffffffffffffc0 <- ( fffffffffffffff , 00 ) + +[57,5]: + int 3fffffffffffffe0 <- ( fffffffffffffff , 00 ) + +[57,4]: + int 1ffffffffffffff0 <- ( fffffffffffffff , 0 ) + +[57,3]: + int 0ffffffffffffff8 <- ( fffffffffffffff , 0 ) + +[57,2]: + int 7fffffffffffffc <- ( fffffffffffffff , 0 ) + +[57,1]: + int 3fffffffffffffe <- ( fffffffffffffff , 0 ) + +[56,64]: + int 0ffffffffffffff0000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[56,63]: + int 7fffffffffffff8000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[56,62]: + int 3fffffffffffffc000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[56,61]: + int 1fffffffffffffe000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[56,60]: + int 0ffffffffffffff000000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[56,59]: + int 7fffffffffffff800000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[56,58]: + int 3fffffffffffffc00000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[56,57]: + int 1fffffffffffffe00000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[56,56]: + int 0ffffffffffffff00000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[56,55]: + int 7fffffffffffff80000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[56,54]: + int 3fffffffffffffc0000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[56,53]: + int 1fffffffffffffe0000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[56,52]: + int 0ffffffffffffff0000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[56,51]: + int 7fffffffffffff8000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[56,50]: + int 3fffffffffffffc000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[56,49]: + int 1fffffffffffffe000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[56,48]: + int 0ffffffffffffff000000000000 <- ( ffffffffffffff , 000000000000 ) + +[56,47]: + int 7fffffffffffff800000000000 <- ( ffffffffffffff , 000000000000 ) + +[56,46]: + int 3fffffffffffffc00000000000 <- ( ffffffffffffff , 000000000000 ) + +[56,45]: + int 1fffffffffffffe00000000000 <- ( ffffffffffffff , 000000000000 ) + +[56,44]: + int 0ffffffffffffff00000000000 <- ( ffffffffffffff , 00000000000 ) + +[56,43]: + int 7fffffffffffff80000000000 <- ( ffffffffffffff , 00000000000 ) + +[56,42]: + int 3fffffffffffffc0000000000 <- ( ffffffffffffff , 00000000000 ) + +[56,41]: + int 1fffffffffffffe0000000000 <- ( ffffffffffffff , 00000000000 ) + +[56,40]: + int 0ffffffffffffff0000000000 <- ( ffffffffffffff , 0000000000 ) + +[56,39]: + int 7fffffffffffff8000000000 <- ( ffffffffffffff , 0000000000 ) + +[56,38]: + int 3fffffffffffffc000000000 <- ( ffffffffffffff , 0000000000 ) + +[56,37]: + int 1fffffffffffffe000000000 <- ( ffffffffffffff , 0000000000 ) + +[56,36]: + int 0ffffffffffffff000000000 <- ( ffffffffffffff , 000000000 ) + +[56,35]: + int 7fffffffffffff800000000 <- ( ffffffffffffff , 000000000 ) + +[56,34]: + int 3fffffffffffffc00000000 <- ( ffffffffffffff , 000000000 ) + +[56,33]: + int 1fffffffffffffe00000000 <- ( ffffffffffffff , 000000000 ) + +[56,32]: + int 0ffffffffffffff00000000 <- ( ffffffffffffff , 00000000 ) + +[56,31]: + int 7fffffffffffff80000000 <- ( ffffffffffffff , 00000000 ) + +[56,30]: + int 3fffffffffffffc0000000 <- ( ffffffffffffff , 00000000 ) + +[56,29]: + int 1fffffffffffffe0000000 <- ( ffffffffffffff , 00000000 ) + +[56,28]: + int 0ffffffffffffff0000000 <- ( ffffffffffffff , 0000000 ) + +[56,27]: + int 7fffffffffffff8000000 <- ( ffffffffffffff , 0000000 ) + +[56,26]: + int 3fffffffffffffc000000 <- ( ffffffffffffff , 0000000 ) + +[56,25]: + int 1fffffffffffffe000000 <- ( ffffffffffffff , 0000000 ) + +[56,24]: + int 0ffffffffffffff000000 <- ( ffffffffffffff , 000000 ) + +[56,23]: + int 7fffffffffffff800000 <- ( ffffffffffffff , 000000 ) + +[56,22]: + int 3fffffffffffffc00000 <- ( ffffffffffffff , 000000 ) + +[56,21]: + int 1fffffffffffffe00000 <- ( ffffffffffffff , 000000 ) + +[56,20]: + int 0ffffffffffffff00000 <- ( ffffffffffffff , 00000 ) + +[56,19]: + int 7fffffffffffff80000 <- ( ffffffffffffff , 00000 ) + +[56,18]: + int 3fffffffffffffc0000 <- ( ffffffffffffff , 00000 ) + +[56,17]: + int 1fffffffffffffe0000 <- ( ffffffffffffff , 00000 ) + +[56,16]: + int 0ffffffffffffff0000 <- ( ffffffffffffff , 0000 ) + +[56,15]: + int 7fffffffffffff8000 <- ( ffffffffffffff , 0000 ) + +[56,14]: + int 3fffffffffffffc000 <- ( ffffffffffffff , 0000 ) + +[56,13]: + int 1fffffffffffffe000 <- ( ffffffffffffff , 0000 ) + +[56,12]: + int 0ffffffffffffff000 <- ( ffffffffffffff , 000 ) + +[56,11]: + int 7fffffffffffff800 <- ( ffffffffffffff , 000 ) + +[56,10]: + int 3fffffffffffffc00 <- ( ffffffffffffff , 000 ) + +[56,9]: + int 1fffffffffffffe00 <- ( ffffffffffffff , 000 ) + +[56,8]: + int 0ffffffffffffff00 <- ( ffffffffffffff , 00 ) + +[56,7]: + int 7fffffffffffff80 <- ( ffffffffffffff , 00 ) + +[56,6]: + int 3fffffffffffffc0 <- ( ffffffffffffff , 00 ) + +[56,5]: + int 1fffffffffffffe0 <- ( ffffffffffffff , 00 ) + +[56,4]: + int 0ffffffffffffff0 <- ( ffffffffffffff , 0 ) + +[56,3]: + int 7fffffffffffff8 <- ( ffffffffffffff , 0 ) + +[56,2]: + int 3fffffffffffffc <- ( ffffffffffffff , 0 ) + +[56,1]: + int 1fffffffffffffe <- ( ffffffffffffff , 0 ) + +[55,64]: + int 7fffffffffffff0000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[55,63]: + int 3fffffffffffff8000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[55,62]: + int 1fffffffffffffc000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[55,61]: + int 0fffffffffffffe000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[55,60]: + int 7fffffffffffff000000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[55,59]: + int 3fffffffffffff800000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[55,58]: + int 1fffffffffffffc00000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[55,57]: + int 0fffffffffffffe00000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[55,56]: + int 7fffffffffffff00000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[55,55]: + int 3fffffffffffff80000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[55,54]: + int 1fffffffffffffc0000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[55,53]: + int 0fffffffffffffe0000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[55,52]: + int 7fffffffffffff0000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[55,51]: + int 3fffffffffffff8000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[55,50]: + int 1fffffffffffffc000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[55,49]: + int 0fffffffffffffe000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[55,48]: + int 7fffffffffffff000000000000 <- ( ffffffffffffff , 000000000000 ) + +[55,47]: + int 3fffffffffffff800000000000 <- ( ffffffffffffff , 000000000000 ) + +[55,46]: + int 1fffffffffffffc00000000000 <- ( ffffffffffffff , 000000000000 ) + +[55,45]: + int 0fffffffffffffe00000000000 <- ( ffffffffffffff , 000000000000 ) + +[55,44]: + int 7fffffffffffff00000000000 <- ( ffffffffffffff , 00000000000 ) + +[55,43]: + int 3fffffffffffff80000000000 <- ( ffffffffffffff , 00000000000 ) + +[55,42]: + int 1fffffffffffffc0000000000 <- ( ffffffffffffff , 00000000000 ) + +[55,41]: + int 0fffffffffffffe0000000000 <- ( ffffffffffffff , 00000000000 ) + +[55,40]: + int 7fffffffffffff0000000000 <- ( ffffffffffffff , 0000000000 ) + +[55,39]: + int 3fffffffffffff8000000000 <- ( ffffffffffffff , 0000000000 ) + +[55,38]: + int 1fffffffffffffc000000000 <- ( ffffffffffffff , 0000000000 ) + +[55,37]: + int 0fffffffffffffe000000000 <- ( ffffffffffffff , 0000000000 ) + +[55,36]: + int 7fffffffffffff000000000 <- ( ffffffffffffff , 000000000 ) + +[55,35]: + int 3fffffffffffff800000000 <- ( ffffffffffffff , 000000000 ) + +[55,34]: + int 1fffffffffffffc00000000 <- ( ffffffffffffff , 000000000 ) + +[55,33]: + int 0fffffffffffffe00000000 <- ( ffffffffffffff , 000000000 ) + +[55,32]: + int 7fffffffffffff00000000 <- ( ffffffffffffff , 00000000 ) + +[55,31]: + int 3fffffffffffff80000000 <- ( ffffffffffffff , 00000000 ) + +[55,30]: + int 1fffffffffffffc0000000 <- ( ffffffffffffff , 00000000 ) + +[55,29]: + int 0fffffffffffffe0000000 <- ( ffffffffffffff , 00000000 ) + +[55,28]: + int 7fffffffffffff0000000 <- ( ffffffffffffff , 0000000 ) + +[55,27]: + int 3fffffffffffff8000000 <- ( ffffffffffffff , 0000000 ) + +[55,26]: + int 1fffffffffffffc000000 <- ( ffffffffffffff , 0000000 ) + +[55,25]: + int 0fffffffffffffe000000 <- ( ffffffffffffff , 0000000 ) + +[55,24]: + int 7fffffffffffff000000 <- ( ffffffffffffff , 000000 ) + +[55,23]: + int 3fffffffffffff800000 <- ( ffffffffffffff , 000000 ) + +[55,22]: + int 1fffffffffffffc00000 <- ( ffffffffffffff , 000000 ) + +[55,21]: + int 0fffffffffffffe00000 <- ( ffffffffffffff , 000000 ) + +[55,20]: + int 7fffffffffffff00000 <- ( ffffffffffffff , 00000 ) + +[55,19]: + int 3fffffffffffff80000 <- ( ffffffffffffff , 00000 ) + +[55,18]: + int 1fffffffffffffc0000 <- ( ffffffffffffff , 00000 ) + +[55,17]: + int 0fffffffffffffe0000 <- ( ffffffffffffff , 00000 ) + +[55,16]: + int 7fffffffffffff0000 <- ( ffffffffffffff , 0000 ) + +[55,15]: + int 3fffffffffffff8000 <- ( ffffffffffffff , 0000 ) + +[55,14]: + int 1fffffffffffffc000 <- ( ffffffffffffff , 0000 ) + +[55,13]: + int 0fffffffffffffe000 <- ( ffffffffffffff , 0000 ) + +[55,12]: + int 7fffffffffffff000 <- ( ffffffffffffff , 000 ) + +[55,11]: + int 3fffffffffffff800 <- ( ffffffffffffff , 000 ) + +[55,10]: + int 1fffffffffffffc00 <- ( ffffffffffffff , 000 ) + +[55,9]: + int 0fffffffffffffe00 <- ( ffffffffffffff , 000 ) + +[55,8]: + int 7fffffffffffff00 <- ( ffffffffffffff , 00 ) + +[55,7]: + int 3fffffffffffff80 <- ( ffffffffffffff , 00 ) + +[55,6]: + int 1fffffffffffffc0 <- ( ffffffffffffff , 00 ) + +[55,5]: + int 0fffffffffffffe0 <- ( ffffffffffffff , 00 ) + +[55,4]: + int 7fffffffffffff0 <- ( ffffffffffffff , 0 ) + +[55,3]: + int 3fffffffffffff8 <- ( ffffffffffffff , 0 ) + +[55,2]: + int 1fffffffffffffc <- ( ffffffffffffff , 0 ) + +[55,1]: + int 0fffffffffffffe <- ( ffffffffffffff , 0 ) + +[54,64]: + int 3fffffffffffff0000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[54,63]: + int 1fffffffffffff8000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[54,62]: + int 0fffffffffffffc000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[54,61]: + int 7ffffffffffffe000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[54,60]: + int 3fffffffffffff000000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[54,59]: + int 1fffffffffffff800000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[54,58]: + int 0fffffffffffffc00000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[54,57]: + int 7ffffffffffffe00000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[54,56]: + int 3fffffffffffff00000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[54,55]: + int 1fffffffffffff80000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[54,54]: + int 0fffffffffffffc0000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[54,53]: + int 7ffffffffffffe0000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[54,52]: + int 3fffffffffffff0000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[54,51]: + int 1fffffffffffff8000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[54,50]: + int 0fffffffffffffc000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[54,49]: + int 7ffffffffffffe000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[54,48]: + int 3fffffffffffff000000000000 <- ( ffffffffffffff , 000000000000 ) + +[54,47]: + int 1fffffffffffff800000000000 <- ( ffffffffffffff , 000000000000 ) + +[54,46]: + int 0fffffffffffffc00000000000 <- ( ffffffffffffff , 000000000000 ) + +[54,45]: + int 7ffffffffffffe00000000000 <- ( ffffffffffffff , 000000000000 ) + +[54,44]: + int 3fffffffffffff00000000000 <- ( ffffffffffffff , 00000000000 ) + +[54,43]: + int 1fffffffffffff80000000000 <- ( ffffffffffffff , 00000000000 ) + +[54,42]: + int 0fffffffffffffc0000000000 <- ( ffffffffffffff , 00000000000 ) + +[54,41]: + int 7ffffffffffffe0000000000 <- ( ffffffffffffff , 00000000000 ) + +[54,40]: + int 3fffffffffffff0000000000 <- ( ffffffffffffff , 0000000000 ) + +[54,39]: + int 1fffffffffffff8000000000 <- ( ffffffffffffff , 0000000000 ) + +[54,38]: + int 0fffffffffffffc000000000 <- ( ffffffffffffff , 0000000000 ) + +[54,37]: + int 7ffffffffffffe000000000 <- ( ffffffffffffff , 0000000000 ) + +[54,36]: + int 3fffffffffffff000000000 <- ( ffffffffffffff , 000000000 ) + +[54,35]: + int 1fffffffffffff800000000 <- ( ffffffffffffff , 000000000 ) + +[54,34]: + int 0fffffffffffffc00000000 <- ( ffffffffffffff , 000000000 ) + +[54,33]: + int 7ffffffffffffe00000000 <- ( ffffffffffffff , 000000000 ) + +[54,32]: + int 3fffffffffffff00000000 <- ( ffffffffffffff , 00000000 ) + +[54,31]: + int 1fffffffffffff80000000 <- ( ffffffffffffff , 00000000 ) + +[54,30]: + int 0fffffffffffffc0000000 <- ( ffffffffffffff , 00000000 ) + +[54,29]: + int 7ffffffffffffe0000000 <- ( ffffffffffffff , 00000000 ) + +[54,28]: + int 3fffffffffffff0000000 <- ( ffffffffffffff , 0000000 ) + +[54,27]: + int 1fffffffffffff8000000 <- ( ffffffffffffff , 0000000 ) + +[54,26]: + int 0fffffffffffffc000000 <- ( ffffffffffffff , 0000000 ) + +[54,25]: + int 7ffffffffffffe000000 <- ( ffffffffffffff , 0000000 ) + +[54,24]: + int 3fffffffffffff000000 <- ( ffffffffffffff , 000000 ) + +[54,23]: + int 1fffffffffffff800000 <- ( ffffffffffffff , 000000 ) + +[54,22]: + int 0fffffffffffffc00000 <- ( ffffffffffffff , 000000 ) + +[54,21]: + int 7ffffffffffffe00000 <- ( ffffffffffffff , 000000 ) + +[54,20]: + int 3fffffffffffff00000 <- ( ffffffffffffff , 00000 ) + +[54,19]: + int 1fffffffffffff80000 <- ( ffffffffffffff , 00000 ) + +[54,18]: + int 0fffffffffffffc0000 <- ( ffffffffffffff , 00000 ) + +[54,17]: + int 7ffffffffffffe0000 <- ( ffffffffffffff , 00000 ) + +[54,16]: + int 3fffffffffffff0000 <- ( ffffffffffffff , 0000 ) + +[54,15]: + int 1fffffffffffff8000 <- ( ffffffffffffff , 0000 ) + +[54,14]: + int 0fffffffffffffc000 <- ( ffffffffffffff , 0000 ) + +[54,13]: + int 7ffffffffffffe000 <- ( ffffffffffffff , 0000 ) + +[54,12]: + int 3fffffffffffff000 <- ( ffffffffffffff , 000 ) + +[54,11]: + int 1fffffffffffff800 <- ( ffffffffffffff , 000 ) + +[54,10]: + int 0fffffffffffffc00 <- ( ffffffffffffff , 000 ) + +[54,9]: + int 7ffffffffffffe00 <- ( ffffffffffffff , 000 ) + +[54,8]: + int 3fffffffffffff00 <- ( ffffffffffffff , 00 ) + +[54,7]: + int 1fffffffffffff80 <- ( ffffffffffffff , 00 ) + +[54,6]: + int 0fffffffffffffc0 <- ( ffffffffffffff , 00 ) + +[54,5]: + int 7ffffffffffffe0 <- ( ffffffffffffff , 00 ) + +[54,4]: + int 3fffffffffffff0 <- ( ffffffffffffff , 0 ) + +[54,3]: + int 1fffffffffffff8 <- ( ffffffffffffff , 0 ) + +[54,2]: + int 0fffffffffffffc <- ( ffffffffffffff , 0 ) + +[54,1]: + int 7ffffffffffffe <- ( ffffffffffffff , 0 ) + +[53,64]: + int 1fffffffffffff0000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[53,63]: + int 0fffffffffffff8000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[53,62]: + int 7ffffffffffffc000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[53,61]: + int 3ffffffffffffe000000000000000 <- ( ffffffffffffff , 0000000000000000 ) + +[53,60]: + int 1fffffffffffff000000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[53,59]: + int 0fffffffffffff800000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[53,58]: + int 7ffffffffffffc00000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[53,57]: + int 3ffffffffffffe00000000000000 <- ( ffffffffffffff , 000000000000000 ) + +[53,56]: + int 1fffffffffffff00000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[53,55]: + int 0fffffffffffff80000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[53,54]: + int 7ffffffffffffc0000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[53,53]: + int 3ffffffffffffe0000000000000 <- ( ffffffffffffff , 00000000000000 ) + +[53,52]: + int 1fffffffffffff0000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[53,51]: + int 0fffffffffffff8000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[53,50]: + int 7ffffffffffffc000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[53,49]: + int 3ffffffffffffe000000000000 <- ( ffffffffffffff , 0000000000000 ) + +[53,48]: + int 1fffffffffffff000000000000 <- ( ffffffffffffff , 000000000000 ) + +[53,47]: + int 0fffffffffffff800000000000 <- ( ffffffffffffff , 000000000000 ) + +[53,46]: + int 7ffffffffffffc00000000000 <- ( ffffffffffffff , 000000000000 ) + +[53,45]: + int 3ffffffffffffe00000000000 <- ( ffffffffffffff , 000000000000 ) + +[53,44]: + int 1fffffffffffff00000000000 <- ( ffffffffffffff , 00000000000 ) + +[53,43]: + int 0fffffffffffff80000000000 <- ( ffffffffffffff , 00000000000 ) + +[53,42]: + int 7ffffffffffffc0000000000 <- ( ffffffffffffff , 00000000000 ) + +[53,41]: + int 3ffffffffffffe0000000000 <- ( ffffffffffffff , 00000000000 ) + +[53,40]: + int 1fffffffffffff0000000000 <- ( ffffffffffffff , 0000000000 ) + +[53,39]: + int 0fffffffffffff8000000000 <- ( ffffffffffffff , 0000000000 ) + +[53,38]: + int 7ffffffffffffc000000000 <- ( ffffffffffffff , 0000000000 ) + +[53,37]: + int 3ffffffffffffe000000000 <- ( ffffffffffffff , 0000000000 ) + +[53,36]: + int 1fffffffffffff000000000 <- ( ffffffffffffff , 000000000 ) + +[53,35]: + int 0fffffffffffff800000000 <- ( ffffffffffffff , 000000000 ) + +[53,34]: + int 7ffffffffffffc00000000 <- ( ffffffffffffff , 000000000 ) + +[53,33]: + int 3ffffffffffffe00000000 <- ( ffffffffffffff , 000000000 ) + +[53,32]: + int 1fffffffffffff00000000 <- ( ffffffffffffff , 00000000 ) + +[53,31]: + int 0fffffffffffff80000000 <- ( ffffffffffffff , 00000000 ) + +[53,30]: + int 7ffffffffffffc0000000 <- ( ffffffffffffff , 00000000 ) + +[53,29]: + int 3ffffffffffffe0000000 <- ( ffffffffffffff , 00000000 ) + +[53,28]: + int 1fffffffffffff0000000 <- ( ffffffffffffff , 0000000 ) + +[53,27]: + int 0fffffffffffff8000000 <- ( ffffffffffffff , 0000000 ) + +[53,26]: + int 7ffffffffffffc000000 <- ( ffffffffffffff , 0000000 ) + +[53,25]: + int 3ffffffffffffe000000 <- ( ffffffffffffff , 0000000 ) + +[53,24]: + int 1fffffffffffff000000 <- ( ffffffffffffff , 000000 ) + +[53,23]: + int 0fffffffffffff800000 <- ( ffffffffffffff , 000000 ) + +[53,22]: + int 7ffffffffffffc00000 <- ( ffffffffffffff , 000000 ) + +[53,21]: + int 3ffffffffffffe00000 <- ( ffffffffffffff , 000000 ) + +[53,20]: + int 1fffffffffffff00000 <- ( ffffffffffffff , 00000 ) + +[53,19]: + int 0fffffffffffff80000 <- ( ffffffffffffff , 00000 ) + +[53,18]: + int 7ffffffffffffc0000 <- ( ffffffffffffff , 00000 ) + +[53,17]: + int 3ffffffffffffe0000 <- ( ffffffffffffff , 00000 ) + +[53,16]: + int 1fffffffffffff0000 <- ( ffffffffffffff , 0000 ) + +[53,15]: + int 0fffffffffffff8000 <- ( ffffffffffffff , 0000 ) + +[53,14]: + int 7ffffffffffffc000 <- ( ffffffffffffff , 0000 ) + +[53,13]: + int 3ffffffffffffe000 <- ( ffffffffffffff , 0000 ) + +[53,12]: + int 1fffffffffffff000 <- ( ffffffffffffff , 000 ) + +[53,11]: + int 0fffffffffffff800 <- ( ffffffffffffff , 000 ) + +[53,10]: + int 7ffffffffffffc00 <- ( ffffffffffffff , 000 ) + +[53,9]: + int 3ffffffffffffe00 <- ( ffffffffffffff , 000 ) + +[53,8]: + int 1fffffffffffff00 <- ( ffffffffffffff , 00 ) + +[53,7]: + int 0fffffffffffff80 <- ( ffffffffffffff , 00 ) + +[53,6]: + int 7ffffffffffffc0 <- ( ffffffffffffff , 00 ) + +[53,5]: + int 3ffffffffffffe0 <- ( ffffffffffffff , 00 ) + +[53,4]: + int 1fffffffffffff0 <- ( ffffffffffffff , 0 ) + +[53,3]: + int 0fffffffffffff8 <- ( ffffffffffffff , 0 ) + +[53,2]: + int 7ffffffffffffc <- ( ffffffffffffff , 0 ) + +[53,1]: + int 3ffffffffffffe <- ( ffffffffffffff , 0 ) + +[52,64]: + int 0fffffffffffff0000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[52,63]: + int 7ffffffffffff8000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[52,62]: + int 3ffffffffffffc000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[52,61]: + int 1ffffffffffffe000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[52,60]: + int 0fffffffffffff000000000000000 <- ( fffffffffffff , 000000000000000 ) + +[52,59]: + int 7ffffffffffff800000000000000 <- ( fffffffffffff , 000000000000000 ) + +[52,58]: + int 3ffffffffffffc00000000000000 <- ( fffffffffffff , 000000000000000 ) + +[52,57]: + int 1ffffffffffffe00000000000000 <- ( fffffffffffff , 000000000000000 ) + +[52,56]: + int 0fffffffffffff00000000000000 <- ( fffffffffffff , 00000000000000 ) + +[52,55]: + int 7ffffffffffff80000000000000 <- ( fffffffffffff , 00000000000000 ) + +[52,54]: + int 3ffffffffffffc0000000000000 <- ( fffffffffffff , 00000000000000 ) + +[52,53]: + int 1ffffffffffffe0000000000000 <- ( fffffffffffff , 00000000000000 ) + +[52,52]: + int 0fffffffffffff0000000000000 <- ( fffffffffffff , 0000000000000 ) + +[52,51]: + int 7ffffffffffff8000000000000 <- ( fffffffffffff , 0000000000000 ) + +[52,50]: + int 3ffffffffffffc000000000000 <- ( fffffffffffff , 0000000000000 ) + +[52,49]: + int 1ffffffffffffe000000000000 <- ( fffffffffffff , 0000000000000 ) + +[52,48]: + int 0fffffffffffff000000000000 <- ( fffffffffffff , 000000000000 ) + +[52,47]: + int 7ffffffffffff800000000000 <- ( fffffffffffff , 000000000000 ) + +[52,46]: + int 3ffffffffffffc00000000000 <- ( fffffffffffff , 000000000000 ) + +[52,45]: + int 1ffffffffffffe00000000000 <- ( fffffffffffff , 000000000000 ) + +[52,44]: + int 0fffffffffffff00000000000 <- ( fffffffffffff , 00000000000 ) + +[52,43]: + int 7ffffffffffff80000000000 <- ( fffffffffffff , 00000000000 ) + +[52,42]: + int 3ffffffffffffc0000000000 <- ( fffffffffffff , 00000000000 ) + +[52,41]: + int 1ffffffffffffe0000000000 <- ( fffffffffffff , 00000000000 ) + +[52,40]: + int 0fffffffffffff0000000000 <- ( fffffffffffff , 0000000000 ) + +[52,39]: + int 7ffffffffffff8000000000 <- ( fffffffffffff , 0000000000 ) + +[52,38]: + int 3ffffffffffffc000000000 <- ( fffffffffffff , 0000000000 ) + +[52,37]: + int 1ffffffffffffe000000000 <- ( fffffffffffff , 0000000000 ) + +[52,36]: + int 0fffffffffffff000000000 <- ( fffffffffffff , 000000000 ) + +[52,35]: + int 7ffffffffffff800000000 <- ( fffffffffffff , 000000000 ) + +[52,34]: + int 3ffffffffffffc00000000 <- ( fffffffffffff , 000000000 ) + +[52,33]: + int 1ffffffffffffe00000000 <- ( fffffffffffff , 000000000 ) + +[52,32]: + int 0fffffffffffff00000000 <- ( fffffffffffff , 00000000 ) + +[52,31]: + int 7ffffffffffff80000000 <- ( fffffffffffff , 00000000 ) + +[52,30]: + int 3ffffffffffffc0000000 <- ( fffffffffffff , 00000000 ) + +[52,29]: + int 1ffffffffffffe0000000 <- ( fffffffffffff , 00000000 ) + +[52,28]: + int 0fffffffffffff0000000 <- ( fffffffffffff , 0000000 ) + +[52,27]: + int 7ffffffffffff8000000 <- ( fffffffffffff , 0000000 ) + +[52,26]: + int 3ffffffffffffc000000 <- ( fffffffffffff , 0000000 ) + +[52,25]: + int 1ffffffffffffe000000 <- ( fffffffffffff , 0000000 ) + +[52,24]: + int 0fffffffffffff000000 <- ( fffffffffffff , 000000 ) + +[52,23]: + int 7ffffffffffff800000 <- ( fffffffffffff , 000000 ) + +[52,22]: + int 3ffffffffffffc00000 <- ( fffffffffffff , 000000 ) + +[52,21]: + int 1ffffffffffffe00000 <- ( fffffffffffff , 000000 ) + +[52,20]: + int 0fffffffffffff00000 <- ( fffffffffffff , 00000 ) + +[52,19]: + int 7ffffffffffff80000 <- ( fffffffffffff , 00000 ) + +[52,18]: + int 3ffffffffffffc0000 <- ( fffffffffffff , 00000 ) + +[52,17]: + int 1ffffffffffffe0000 <- ( fffffffffffff , 00000 ) + +[52,16]: + int 0fffffffffffff0000 <- ( fffffffffffff , 0000 ) + +[52,15]: + int 7ffffffffffff8000 <- ( fffffffffffff , 0000 ) + +[52,14]: + int 3ffffffffffffc000 <- ( fffffffffffff , 0000 ) + +[52,13]: + int 1ffffffffffffe000 <- ( fffffffffffff , 0000 ) + +[52,12]: + int 0fffffffffffff000 <- ( fffffffffffff , 000 ) + +[52,11]: + int 7ffffffffffff800 <- ( fffffffffffff , 000 ) + +[52,10]: + int 3ffffffffffffc00 <- ( fffffffffffff , 000 ) + +[52,9]: + int 1ffffffffffffe00 <- ( fffffffffffff , 000 ) + +[52,8]: + int 0fffffffffffff00 <- ( fffffffffffff , 00 ) + +[52,7]: + int 7ffffffffffff80 <- ( fffffffffffff , 00 ) + +[52,6]: + int 3ffffffffffffc0 <- ( fffffffffffff , 00 ) + +[52,5]: + int 1ffffffffffffe0 <- ( fffffffffffff , 00 ) + +[52,4]: + int 0fffffffffffff0 <- ( fffffffffffff , 0 ) + +[52,3]: + int 7ffffffffffff8 <- ( fffffffffffff , 0 ) + +[52,2]: + int 3ffffffffffffc <- ( fffffffffffff , 0 ) + +[52,1]: + int 1ffffffffffffe <- ( fffffffffffff , 0 ) + +[51,64]: + int 7ffffffffffff0000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[51,63]: + int 3ffffffffffff8000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[51,62]: + int 1ffffffffffffc000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[51,61]: + int 0ffffffffffffe000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[51,60]: + int 7ffffffffffff000000000000000 <- ( fffffffffffff , 000000000000000 ) + +[51,59]: + int 3ffffffffffff800000000000000 <- ( fffffffffffff , 000000000000000 ) + +[51,58]: + int 1ffffffffffffc00000000000000 <- ( fffffffffffff , 000000000000000 ) + +[51,57]: + int 0ffffffffffffe00000000000000 <- ( fffffffffffff , 000000000000000 ) + +[51,56]: + int 7ffffffffffff00000000000000 <- ( fffffffffffff , 00000000000000 ) + +[51,55]: + int 3ffffffffffff80000000000000 <- ( fffffffffffff , 00000000000000 ) + +[51,54]: + int 1ffffffffffffc0000000000000 <- ( fffffffffffff , 00000000000000 ) + +[51,53]: + int 0ffffffffffffe0000000000000 <- ( fffffffffffff , 00000000000000 ) + +[51,52]: + int 7ffffffffffff0000000000000 <- ( fffffffffffff , 0000000000000 ) + +[51,51]: + int 3ffffffffffff8000000000000 <- ( fffffffffffff , 0000000000000 ) + +[51,50]: + int 1ffffffffffffc000000000000 <- ( fffffffffffff , 0000000000000 ) + +[51,49]: + int 0ffffffffffffe000000000000 <- ( fffffffffffff , 0000000000000 ) + +[51,48]: + int 7ffffffffffff000000000000 <- ( fffffffffffff , 000000000000 ) + +[51,47]: + int 3ffffffffffff800000000000 <- ( fffffffffffff , 000000000000 ) + +[51,46]: + int 1ffffffffffffc00000000000 <- ( fffffffffffff , 000000000000 ) + +[51,45]: + int 0ffffffffffffe00000000000 <- ( fffffffffffff , 000000000000 ) + +[51,44]: + int 7ffffffffffff00000000000 <- ( fffffffffffff , 00000000000 ) + +[51,43]: + int 3ffffffffffff80000000000 <- ( fffffffffffff , 00000000000 ) + +[51,42]: + int 1ffffffffffffc0000000000 <- ( fffffffffffff , 00000000000 ) + +[51,41]: + int 0ffffffffffffe0000000000 <- ( fffffffffffff , 00000000000 ) + +[51,40]: + int 7ffffffffffff0000000000 <- ( fffffffffffff , 0000000000 ) + +[51,39]: + int 3ffffffffffff8000000000 <- ( fffffffffffff , 0000000000 ) + +[51,38]: + int 1ffffffffffffc000000000 <- ( fffffffffffff , 0000000000 ) + +[51,37]: + int 0ffffffffffffe000000000 <- ( fffffffffffff , 0000000000 ) + +[51,36]: + int 7ffffffffffff000000000 <- ( fffffffffffff , 000000000 ) + +[51,35]: + int 3ffffffffffff800000000 <- ( fffffffffffff , 000000000 ) + +[51,34]: + int 1ffffffffffffc00000000 <- ( fffffffffffff , 000000000 ) + +[51,33]: + int 0ffffffffffffe00000000 <- ( fffffffffffff , 000000000 ) + +[51,32]: + int 7ffffffffffff00000000 <- ( fffffffffffff , 00000000 ) + +[51,31]: + int 3ffffffffffff80000000 <- ( fffffffffffff , 00000000 ) + +[51,30]: + int 1ffffffffffffc0000000 <- ( fffffffffffff , 00000000 ) + +[51,29]: + int 0ffffffffffffe0000000 <- ( fffffffffffff , 00000000 ) + +[51,28]: + int 7ffffffffffff0000000 <- ( fffffffffffff , 0000000 ) + +[51,27]: + int 3ffffffffffff8000000 <- ( fffffffffffff , 0000000 ) + +[51,26]: + int 1ffffffffffffc000000 <- ( fffffffffffff , 0000000 ) + +[51,25]: + int 0ffffffffffffe000000 <- ( fffffffffffff , 0000000 ) + +[51,24]: + int 7ffffffffffff000000 <- ( fffffffffffff , 000000 ) + +[51,23]: + int 3ffffffffffff800000 <- ( fffffffffffff , 000000 ) + +[51,22]: + int 1ffffffffffffc00000 <- ( fffffffffffff , 000000 ) + +[51,21]: + int 0ffffffffffffe00000 <- ( fffffffffffff , 000000 ) + +[51,20]: + int 7ffffffffffff00000 <- ( fffffffffffff , 00000 ) + +[51,19]: + int 3ffffffffffff80000 <- ( fffffffffffff , 00000 ) + +[51,18]: + int 1ffffffffffffc0000 <- ( fffffffffffff , 00000 ) + +[51,17]: + int 0ffffffffffffe0000 <- ( fffffffffffff , 00000 ) + +[51,16]: + int 7ffffffffffff0000 <- ( fffffffffffff , 0000 ) + +[51,15]: + int 3ffffffffffff8000 <- ( fffffffffffff , 0000 ) + +[51,14]: + int 1ffffffffffffc000 <- ( fffffffffffff , 0000 ) + +[51,13]: + int 0ffffffffffffe000 <- ( fffffffffffff , 0000 ) + +[51,12]: + int 7ffffffffffff000 <- ( fffffffffffff , 000 ) + +[51,11]: + int 3ffffffffffff800 <- ( fffffffffffff , 000 ) + +[51,10]: + int 1ffffffffffffc00 <- ( fffffffffffff , 000 ) + +[51,9]: + int 0ffffffffffffe00 <- ( fffffffffffff , 000 ) + +[51,8]: + int 7ffffffffffff00 <- ( fffffffffffff , 00 ) + +[51,7]: + int 3ffffffffffff80 <- ( fffffffffffff , 00 ) + +[51,6]: + int 1ffffffffffffc0 <- ( fffffffffffff , 00 ) + +[51,5]: + int 0ffffffffffffe0 <- ( fffffffffffff , 00 ) + +[51,4]: + int 7ffffffffffff0 <- ( fffffffffffff , 0 ) + +[51,3]: + int 3ffffffffffff8 <- ( fffffffffffff , 0 ) + +[51,2]: + int 1ffffffffffffc <- ( fffffffffffff , 0 ) + +[51,1]: + int 0ffffffffffffe <- ( fffffffffffff , 0 ) + +[50,64]: + int 3ffffffffffff0000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[50,63]: + int 1ffffffffffff8000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[50,62]: + int 0ffffffffffffc000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[50,61]: + int 7fffffffffffe000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[50,60]: + int 3ffffffffffff000000000000000 <- ( fffffffffffff , 000000000000000 ) + +[50,59]: + int 1ffffffffffff800000000000000 <- ( fffffffffffff , 000000000000000 ) + +[50,58]: + int 0ffffffffffffc00000000000000 <- ( fffffffffffff , 000000000000000 ) + +[50,57]: + int 7fffffffffffe00000000000000 <- ( fffffffffffff , 000000000000000 ) + +[50,56]: + int 3ffffffffffff00000000000000 <- ( fffffffffffff , 00000000000000 ) + +[50,55]: + int 1ffffffffffff80000000000000 <- ( fffffffffffff , 00000000000000 ) + +[50,54]: + int 0ffffffffffffc0000000000000 <- ( fffffffffffff , 00000000000000 ) + +[50,53]: + int 7fffffffffffe0000000000000 <- ( fffffffffffff , 00000000000000 ) + +[50,52]: + int 3ffffffffffff0000000000000 <- ( fffffffffffff , 0000000000000 ) + +[50,51]: + int 1ffffffffffff8000000000000 <- ( fffffffffffff , 0000000000000 ) + +[50,50]: + int 0ffffffffffffc000000000000 <- ( fffffffffffff , 0000000000000 ) + +[50,49]: + int 7fffffffffffe000000000000 <- ( fffffffffffff , 0000000000000 ) + +[50,48]: + int 3ffffffffffff000000000000 <- ( fffffffffffff , 000000000000 ) + +[50,47]: + int 1ffffffffffff800000000000 <- ( fffffffffffff , 000000000000 ) + +[50,46]: + int 0ffffffffffffc00000000000 <- ( fffffffffffff , 000000000000 ) + +[50,45]: + int 7fffffffffffe00000000000 <- ( fffffffffffff , 000000000000 ) + +[50,44]: + int 3ffffffffffff00000000000 <- ( fffffffffffff , 00000000000 ) + +[50,43]: + int 1ffffffffffff80000000000 <- ( fffffffffffff , 00000000000 ) + +[50,42]: + int 0ffffffffffffc0000000000 <- ( fffffffffffff , 00000000000 ) + +[50,41]: + int 7fffffffffffe0000000000 <- ( fffffffffffff , 00000000000 ) + +[50,40]: + int 3ffffffffffff0000000000 <- ( fffffffffffff , 0000000000 ) + +[50,39]: + int 1ffffffffffff8000000000 <- ( fffffffffffff , 0000000000 ) + +[50,38]: + int 0ffffffffffffc000000000 <- ( fffffffffffff , 0000000000 ) + +[50,37]: + int 7fffffffffffe000000000 <- ( fffffffffffff , 0000000000 ) + +[50,36]: + int 3ffffffffffff000000000 <- ( fffffffffffff , 000000000 ) + +[50,35]: + int 1ffffffffffff800000000 <- ( fffffffffffff , 000000000 ) + +[50,34]: + int 0ffffffffffffc00000000 <- ( fffffffffffff , 000000000 ) + +[50,33]: + int 7fffffffffffe00000000 <- ( fffffffffffff , 000000000 ) + +[50,32]: + int 3ffffffffffff00000000 <- ( fffffffffffff , 00000000 ) + +[50,31]: + int 1ffffffffffff80000000 <- ( fffffffffffff , 00000000 ) + +[50,30]: + int 0ffffffffffffc0000000 <- ( fffffffffffff , 00000000 ) + +[50,29]: + int 7fffffffffffe0000000 <- ( fffffffffffff , 00000000 ) + +[50,28]: + int 3ffffffffffff0000000 <- ( fffffffffffff , 0000000 ) + +[50,27]: + int 1ffffffffffff8000000 <- ( fffffffffffff , 0000000 ) + +[50,26]: + int 0ffffffffffffc000000 <- ( fffffffffffff , 0000000 ) + +[50,25]: + int 7fffffffffffe000000 <- ( fffffffffffff , 0000000 ) + +[50,24]: + int 3ffffffffffff000000 <- ( fffffffffffff , 000000 ) + +[50,23]: + int 1ffffffffffff800000 <- ( fffffffffffff , 000000 ) + +[50,22]: + int 0ffffffffffffc00000 <- ( fffffffffffff , 000000 ) + +[50,21]: + int 7fffffffffffe00000 <- ( fffffffffffff , 000000 ) + +[50,20]: + int 3ffffffffffff00000 <- ( fffffffffffff , 00000 ) + +[50,19]: + int 1ffffffffffff80000 <- ( fffffffffffff , 00000 ) + +[50,18]: + int 0ffffffffffffc0000 <- ( fffffffffffff , 00000 ) + +[50,17]: + int 7fffffffffffe0000 <- ( fffffffffffff , 00000 ) + +[50,16]: + int 3ffffffffffff0000 <- ( fffffffffffff , 0000 ) + +[50,15]: + int 1ffffffffffff8000 <- ( fffffffffffff , 0000 ) + +[50,14]: + int 0ffffffffffffc000 <- ( fffffffffffff , 0000 ) + +[50,13]: + int 7fffffffffffe000 <- ( fffffffffffff , 0000 ) + +[50,12]: + int 3ffffffffffff000 <- ( fffffffffffff , 000 ) + +[50,11]: + int 1ffffffffffff800 <- ( fffffffffffff , 000 ) + +[50,10]: + int 0ffffffffffffc00 <- ( fffffffffffff , 000 ) + +[50,9]: + int 7fffffffffffe00 <- ( fffffffffffff , 000 ) + +[50,8]: + int 3ffffffffffff00 <- ( fffffffffffff , 00 ) + +[50,7]: + int 1ffffffffffff80 <- ( fffffffffffff , 00 ) + +[50,6]: + int 0ffffffffffffc0 <- ( fffffffffffff , 00 ) + +[50,5]: + int 7fffffffffffe0 <- ( fffffffffffff , 00 ) + +[50,4]: + int 3ffffffffffff0 <- ( fffffffffffff , 0 ) + +[50,3]: + int 1ffffffffffff8 <- ( fffffffffffff , 0 ) + +[50,2]: + int 0ffffffffffffc <- ( fffffffffffff , 0 ) + +[50,1]: + int 7fffffffffffe <- ( fffffffffffff , 0 ) + +[49,64]: + int 1ffffffffffff0000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[49,63]: + int 0ffffffffffff8000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[49,62]: + int 7fffffffffffc000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[49,61]: + int 3fffffffffffe000000000000000 <- ( fffffffffffff , 0000000000000000 ) + +[49,60]: + int 1ffffffffffff000000000000000 <- ( fffffffffffff , 000000000000000 ) + +[49,59]: + int 0ffffffffffff800000000000000 <- ( fffffffffffff , 000000000000000 ) + +[49,58]: + int 7fffffffffffc00000000000000 <- ( fffffffffffff , 000000000000000 ) + +[49,57]: + int 3fffffffffffe00000000000000 <- ( fffffffffffff , 000000000000000 ) + +[49,56]: + int 1ffffffffffff00000000000000 <- ( fffffffffffff , 00000000000000 ) + +[49,55]: + int 0ffffffffffff80000000000000 <- ( fffffffffffff , 00000000000000 ) + +[49,54]: + int 7fffffffffffc0000000000000 <- ( fffffffffffff , 00000000000000 ) + +[49,53]: + int 3fffffffffffe0000000000000 <- ( fffffffffffff , 00000000000000 ) + +[49,52]: + int 1ffffffffffff0000000000000 <- ( fffffffffffff , 0000000000000 ) + +[49,51]: + int 0ffffffffffff8000000000000 <- ( fffffffffffff , 0000000000000 ) + +[49,50]: + int 7fffffffffffc000000000000 <- ( fffffffffffff , 0000000000000 ) + +[49,49]: + int 3fffffffffffe000000000000 <- ( fffffffffffff , 0000000000000 ) + +[49,48]: + int 1ffffffffffff000000000000 <- ( fffffffffffff , 000000000000 ) + +[49,47]: + int 0ffffffffffff800000000000 <- ( fffffffffffff , 000000000000 ) + +[49,46]: + int 7fffffffffffc00000000000 <- ( fffffffffffff , 000000000000 ) + +[49,45]: + int 3fffffffffffe00000000000 <- ( fffffffffffff , 000000000000 ) + +[49,44]: + int 1ffffffffffff00000000000 <- ( fffffffffffff , 00000000000 ) + +[49,43]: + int 0ffffffffffff80000000000 <- ( fffffffffffff , 00000000000 ) + +[49,42]: + int 7fffffffffffc0000000000 <- ( fffffffffffff , 00000000000 ) + +[49,41]: + int 3fffffffffffe0000000000 <- ( fffffffffffff , 00000000000 ) + +[49,40]: + int 1ffffffffffff0000000000 <- ( fffffffffffff , 0000000000 ) + +[49,39]: + int 0ffffffffffff8000000000 <- ( fffffffffffff , 0000000000 ) + +[49,38]: + int 7fffffffffffc000000000 <- ( fffffffffffff , 0000000000 ) + +[49,37]: + int 3fffffffffffe000000000 <- ( fffffffffffff , 0000000000 ) + +[49,36]: + int 1ffffffffffff000000000 <- ( fffffffffffff , 000000000 ) + +[49,35]: + int 0ffffffffffff800000000 <- ( fffffffffffff , 000000000 ) + +[49,34]: + int 7fffffffffffc00000000 <- ( fffffffffffff , 000000000 ) + +[49,33]: + int 3fffffffffffe00000000 <- ( fffffffffffff , 000000000 ) + +[49,32]: + int 1ffffffffffff00000000 <- ( fffffffffffff , 00000000 ) + +[49,31]: + int 0ffffffffffff80000000 <- ( fffffffffffff , 00000000 ) + +[49,30]: + int 7fffffffffffc0000000 <- ( fffffffffffff , 00000000 ) + +[49,29]: + int 3fffffffffffe0000000 <- ( fffffffffffff , 00000000 ) + +[49,28]: + int 1ffffffffffff0000000 <- ( fffffffffffff , 0000000 ) + +[49,27]: + int 0ffffffffffff8000000 <- ( fffffffffffff , 0000000 ) + +[49,26]: + int 7fffffffffffc000000 <- ( fffffffffffff , 0000000 ) + +[49,25]: + int 3fffffffffffe000000 <- ( fffffffffffff , 0000000 ) + +[49,24]: + int 1ffffffffffff000000 <- ( fffffffffffff , 000000 ) + +[49,23]: + int 0ffffffffffff800000 <- ( fffffffffffff , 000000 ) + +[49,22]: + int 7fffffffffffc00000 <- ( fffffffffffff , 000000 ) + +[49,21]: + int 3fffffffffffe00000 <- ( fffffffffffff , 000000 ) + +[49,20]: + int 1ffffffffffff00000 <- ( fffffffffffff , 00000 ) + +[49,19]: + int 0ffffffffffff80000 <- ( fffffffffffff , 00000 ) + +[49,18]: + int 7fffffffffffc0000 <- ( fffffffffffff , 00000 ) + +[49,17]: + int 3fffffffffffe0000 <- ( fffffffffffff , 00000 ) + +[49,16]: + int 1ffffffffffff0000 <- ( fffffffffffff , 0000 ) + +[49,15]: + int 0ffffffffffff8000 <- ( fffffffffffff , 0000 ) + +[49,14]: + int 7fffffffffffc000 <- ( fffffffffffff , 0000 ) + +[49,13]: + int 3fffffffffffe000 <- ( fffffffffffff , 0000 ) + +[49,12]: + int 1ffffffffffff000 <- ( fffffffffffff , 000 ) + +[49,11]: + int 0ffffffffffff800 <- ( fffffffffffff , 000 ) + +[49,10]: + int 7fffffffffffc00 <- ( fffffffffffff , 000 ) + +[49,9]: + int 3fffffffffffe00 <- ( fffffffffffff , 000 ) + +[49,8]: + int 1ffffffffffff00 <- ( fffffffffffff , 00 ) + +[49,7]: + int 0ffffffffffff80 <- ( fffffffffffff , 00 ) + +[49,6]: + int 7fffffffffffc0 <- ( fffffffffffff , 00 ) + +[49,5]: + int 3fffffffffffe0 <- ( fffffffffffff , 00 ) + +[49,4]: + int 1ffffffffffff0 <- ( fffffffffffff , 0 ) + +[49,3]: + int 0ffffffffffff8 <- ( fffffffffffff , 0 ) + +[49,2]: + int 7fffffffffffc <- ( fffffffffffff , 0 ) + +[49,1]: + int 3fffffffffffe <- ( fffffffffffff , 0 ) + +[48,64]: + int 0ffffffffffff0000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[48,63]: + int 7fffffffffff8000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[48,62]: + int 3fffffffffffc000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[48,61]: + int 1fffffffffffe000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[48,60]: + int 0ffffffffffff000000000000000 <- ( ffffffffffff , 000000000000000 ) + +[48,59]: + int 7fffffffffff800000000000000 <- ( ffffffffffff , 000000000000000 ) + +[48,58]: + int 3fffffffffffc00000000000000 <- ( ffffffffffff , 000000000000000 ) + +[48,57]: + int 1fffffffffffe00000000000000 <- ( ffffffffffff , 000000000000000 ) + +[48,56]: + int 0ffffffffffff00000000000000 <- ( ffffffffffff , 00000000000000 ) + +[48,55]: + int 7fffffffffff80000000000000 <- ( ffffffffffff , 00000000000000 ) + +[48,54]: + int 3fffffffffffc0000000000000 <- ( ffffffffffff , 00000000000000 ) + +[48,53]: + int 1fffffffffffe0000000000000 <- ( ffffffffffff , 00000000000000 ) + +[48,52]: + int 0ffffffffffff0000000000000 <- ( ffffffffffff , 0000000000000 ) + +[48,51]: + int 7fffffffffff8000000000000 <- ( ffffffffffff , 0000000000000 ) + +[48,50]: + int 3fffffffffffc000000000000 <- ( ffffffffffff , 0000000000000 ) + +[48,49]: + int 1fffffffffffe000000000000 <- ( ffffffffffff , 0000000000000 ) + +[48,48]: + int 0ffffffffffff000000000000 <- ( ffffffffffff , 000000000000 ) + +[48,47]: + int 7fffffffffff800000000000 <- ( ffffffffffff , 000000000000 ) + +[48,46]: + int 3fffffffffffc00000000000 <- ( ffffffffffff , 000000000000 ) + +[48,45]: + int 1fffffffffffe00000000000 <- ( ffffffffffff , 000000000000 ) + +[48,44]: + int 0ffffffffffff00000000000 <- ( ffffffffffff , 00000000000 ) + +[48,43]: + int 7fffffffffff80000000000 <- ( ffffffffffff , 00000000000 ) + +[48,42]: + int 3fffffffffffc0000000000 <- ( ffffffffffff , 00000000000 ) + +[48,41]: + int 1fffffffffffe0000000000 <- ( ffffffffffff , 00000000000 ) + +[48,40]: + int 0ffffffffffff0000000000 <- ( ffffffffffff , 0000000000 ) + +[48,39]: + int 7fffffffffff8000000000 <- ( ffffffffffff , 0000000000 ) + +[48,38]: + int 3fffffffffffc000000000 <- ( ffffffffffff , 0000000000 ) + +[48,37]: + int 1fffffffffffe000000000 <- ( ffffffffffff , 0000000000 ) + +[48,36]: + int 0ffffffffffff000000000 <- ( ffffffffffff , 000000000 ) + +[48,35]: + int 7fffffffffff800000000 <- ( ffffffffffff , 000000000 ) + +[48,34]: + int 3fffffffffffc00000000 <- ( ffffffffffff , 000000000 ) + +[48,33]: + int 1fffffffffffe00000000 <- ( ffffffffffff , 000000000 ) + +[48,32]: + int 0ffffffffffff00000000 <- ( ffffffffffff , 00000000 ) + +[48,31]: + int 7fffffffffff80000000 <- ( ffffffffffff , 00000000 ) + +[48,30]: + int 3fffffffffffc0000000 <- ( ffffffffffff , 00000000 ) + +[48,29]: + int 1fffffffffffe0000000 <- ( ffffffffffff , 00000000 ) + +[48,28]: + int 0ffffffffffff0000000 <- ( ffffffffffff , 0000000 ) + +[48,27]: + int 7fffffffffff8000000 <- ( ffffffffffff , 0000000 ) + +[48,26]: + int 3fffffffffffc000000 <- ( ffffffffffff , 0000000 ) + +[48,25]: + int 1fffffffffffe000000 <- ( ffffffffffff , 0000000 ) + +[48,24]: + int 0ffffffffffff000000 <- ( ffffffffffff , 000000 ) + +[48,23]: + int 7fffffffffff800000 <- ( ffffffffffff , 000000 ) + +[48,22]: + int 3fffffffffffc00000 <- ( ffffffffffff , 000000 ) + +[48,21]: + int 1fffffffffffe00000 <- ( ffffffffffff , 000000 ) + +[48,20]: + int 0ffffffffffff00000 <- ( ffffffffffff , 00000 ) + +[48,19]: + int 7fffffffffff80000 <- ( ffffffffffff , 00000 ) + +[48,18]: + int 3fffffffffffc0000 <- ( ffffffffffff , 00000 ) + +[48,17]: + int 1fffffffffffe0000 <- ( ffffffffffff , 00000 ) + +[48,16]: + int 0ffffffffffff0000 <- ( ffffffffffff , 0000 ) + +[48,15]: + int 7fffffffffff8000 <- ( ffffffffffff , 0000 ) + +[48,14]: + int 3fffffffffffc000 <- ( ffffffffffff , 0000 ) + +[48,13]: + int 1fffffffffffe000 <- ( ffffffffffff , 0000 ) + +[48,12]: + int 0ffffffffffff000 <- ( ffffffffffff , 000 ) + +[48,11]: + int 7fffffffffff800 <- ( ffffffffffff , 000 ) + +[48,10]: + int 3fffffffffffc00 <- ( ffffffffffff , 000 ) + +[48,9]: + int 1fffffffffffe00 <- ( ffffffffffff , 000 ) + +[48,8]: + int 0ffffffffffff00 <- ( ffffffffffff , 00 ) + +[48,7]: + int 7fffffffffff80 <- ( ffffffffffff , 00 ) + +[48,6]: + int 3fffffffffffc0 <- ( ffffffffffff , 00 ) + +[48,5]: + int 1fffffffffffe0 <- ( ffffffffffff , 00 ) + +[48,4]: + int 0ffffffffffff0 <- ( ffffffffffff , 0 ) + +[48,3]: + int 7fffffffffff8 <- ( ffffffffffff , 0 ) + +[48,2]: + int 3fffffffffffc <- ( ffffffffffff , 0 ) + +[48,1]: + int 1fffffffffffe <- ( ffffffffffff , 0 ) + +[47,64]: + int 7fffffffffff0000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[47,63]: + int 3fffffffffff8000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[47,62]: + int 1fffffffffffc000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[47,61]: + int 0fffffffffffe000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[47,60]: + int 7fffffffffff000000000000000 <- ( ffffffffffff , 000000000000000 ) + +[47,59]: + int 3fffffffffff800000000000000 <- ( ffffffffffff , 000000000000000 ) + +[47,58]: + int 1fffffffffffc00000000000000 <- ( ffffffffffff , 000000000000000 ) + +[47,57]: + int 0fffffffffffe00000000000000 <- ( ffffffffffff , 000000000000000 ) + +[47,56]: + int 7fffffffffff00000000000000 <- ( ffffffffffff , 00000000000000 ) + +[47,55]: + int 3fffffffffff80000000000000 <- ( ffffffffffff , 00000000000000 ) + +[47,54]: + int 1fffffffffffc0000000000000 <- ( ffffffffffff , 00000000000000 ) + +[47,53]: + int 0fffffffffffe0000000000000 <- ( ffffffffffff , 00000000000000 ) + +[47,52]: + int 7fffffffffff0000000000000 <- ( ffffffffffff , 0000000000000 ) + +[47,51]: + int 3fffffffffff8000000000000 <- ( ffffffffffff , 0000000000000 ) + +[47,50]: + int 1fffffffffffc000000000000 <- ( ffffffffffff , 0000000000000 ) + +[47,49]: + int 0fffffffffffe000000000000 <- ( ffffffffffff , 0000000000000 ) + +[47,48]: + int 7fffffffffff000000000000 <- ( ffffffffffff , 000000000000 ) + +[47,47]: + int 3fffffffffff800000000000 <- ( ffffffffffff , 000000000000 ) + +[47,46]: + int 1fffffffffffc00000000000 <- ( ffffffffffff , 000000000000 ) + +[47,45]: + int 0fffffffffffe00000000000 <- ( ffffffffffff , 000000000000 ) + +[47,44]: + int 7fffffffffff00000000000 <- ( ffffffffffff , 00000000000 ) + +[47,43]: + int 3fffffffffff80000000000 <- ( ffffffffffff , 00000000000 ) + +[47,42]: + int 1fffffffffffc0000000000 <- ( ffffffffffff , 00000000000 ) + +[47,41]: + int 0fffffffffffe0000000000 <- ( ffffffffffff , 00000000000 ) + +[47,40]: + int 7fffffffffff0000000000 <- ( ffffffffffff , 0000000000 ) + +[47,39]: + int 3fffffffffff8000000000 <- ( ffffffffffff , 0000000000 ) + +[47,38]: + int 1fffffffffffc000000000 <- ( ffffffffffff , 0000000000 ) + +[47,37]: + int 0fffffffffffe000000000 <- ( ffffffffffff , 0000000000 ) + +[47,36]: + int 7fffffffffff000000000 <- ( ffffffffffff , 000000000 ) + +[47,35]: + int 3fffffffffff800000000 <- ( ffffffffffff , 000000000 ) + +[47,34]: + int 1fffffffffffc00000000 <- ( ffffffffffff , 000000000 ) + +[47,33]: + int 0fffffffffffe00000000 <- ( ffffffffffff , 000000000 ) + +[47,32]: + int 7fffffffffff00000000 <- ( ffffffffffff , 00000000 ) + +[47,31]: + int 3fffffffffff80000000 <- ( ffffffffffff , 00000000 ) + +[47,30]: + int 1fffffffffffc0000000 <- ( ffffffffffff , 00000000 ) + +[47,29]: + int 0fffffffffffe0000000 <- ( ffffffffffff , 00000000 ) + +[47,28]: + int 7fffffffffff0000000 <- ( ffffffffffff , 0000000 ) + +[47,27]: + int 3fffffffffff8000000 <- ( ffffffffffff , 0000000 ) + +[47,26]: + int 1fffffffffffc000000 <- ( ffffffffffff , 0000000 ) + +[47,25]: + int 0fffffffffffe000000 <- ( ffffffffffff , 0000000 ) + +[47,24]: + int 7fffffffffff000000 <- ( ffffffffffff , 000000 ) + +[47,23]: + int 3fffffffffff800000 <- ( ffffffffffff , 000000 ) + +[47,22]: + int 1fffffffffffc00000 <- ( ffffffffffff , 000000 ) + +[47,21]: + int 0fffffffffffe00000 <- ( ffffffffffff , 000000 ) + +[47,20]: + int 7fffffffffff00000 <- ( ffffffffffff , 00000 ) + +[47,19]: + int 3fffffffffff80000 <- ( ffffffffffff , 00000 ) + +[47,18]: + int 1fffffffffffc0000 <- ( ffffffffffff , 00000 ) + +[47,17]: + int 0fffffffffffe0000 <- ( ffffffffffff , 00000 ) + +[47,16]: + int 7fffffffffff0000 <- ( ffffffffffff , 0000 ) + +[47,15]: + int 3fffffffffff8000 <- ( ffffffffffff , 0000 ) + +[47,14]: + int 1fffffffffffc000 <- ( ffffffffffff , 0000 ) + +[47,13]: + int 0fffffffffffe000 <- ( ffffffffffff , 0000 ) + +[47,12]: + int 7fffffffffff000 <- ( ffffffffffff , 000 ) + +[47,11]: + int 3fffffffffff800 <- ( ffffffffffff , 000 ) + +[47,10]: + int 1fffffffffffc00 <- ( ffffffffffff , 000 ) + +[47,9]: + int 0fffffffffffe00 <- ( ffffffffffff , 000 ) + +[47,8]: + int 7fffffffffff00 <- ( ffffffffffff , 00 ) + +[47,7]: + int 3fffffffffff80 <- ( ffffffffffff , 00 ) + +[47,6]: + int 1fffffffffffc0 <- ( ffffffffffff , 00 ) + +[47,5]: + int 0fffffffffffe0 <- ( ffffffffffff , 00 ) + +[47,4]: + int 7fffffffffff0 <- ( ffffffffffff , 0 ) + +[47,3]: + int 3fffffffffff8 <- ( ffffffffffff , 0 ) + +[47,2]: + int 1fffffffffffc <- ( ffffffffffff , 0 ) + +[47,1]: + int 0fffffffffffe <- ( ffffffffffff , 0 ) + +[46,64]: + int 3fffffffffff0000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[46,63]: + int 1fffffffffff8000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[46,62]: + int 0fffffffffffc000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[46,61]: + int 7ffffffffffe000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[46,60]: + int 3fffffffffff000000000000000 <- ( ffffffffffff , 000000000000000 ) + +[46,59]: + int 1fffffffffff800000000000000 <- ( ffffffffffff , 000000000000000 ) + +[46,58]: + int 0fffffffffffc00000000000000 <- ( ffffffffffff , 000000000000000 ) + +[46,57]: + int 7ffffffffffe00000000000000 <- ( ffffffffffff , 000000000000000 ) + +[46,56]: + int 3fffffffffff00000000000000 <- ( ffffffffffff , 00000000000000 ) + +[46,55]: + int 1fffffffffff80000000000000 <- ( ffffffffffff , 00000000000000 ) + +[46,54]: + int 0fffffffffffc0000000000000 <- ( ffffffffffff , 00000000000000 ) + +[46,53]: + int 7ffffffffffe0000000000000 <- ( ffffffffffff , 00000000000000 ) + +[46,52]: + int 3fffffffffff0000000000000 <- ( ffffffffffff , 0000000000000 ) + +[46,51]: + int 1fffffffffff8000000000000 <- ( ffffffffffff , 0000000000000 ) + +[46,50]: + int 0fffffffffffc000000000000 <- ( ffffffffffff , 0000000000000 ) + +[46,49]: + int 7ffffffffffe000000000000 <- ( ffffffffffff , 0000000000000 ) + +[46,48]: + int 3fffffffffff000000000000 <- ( ffffffffffff , 000000000000 ) + +[46,47]: + int 1fffffffffff800000000000 <- ( ffffffffffff , 000000000000 ) + +[46,46]: + int 0fffffffffffc00000000000 <- ( ffffffffffff , 000000000000 ) + +[46,45]: + int 7ffffffffffe00000000000 <- ( ffffffffffff , 000000000000 ) + +[46,44]: + int 3fffffffffff00000000000 <- ( ffffffffffff , 00000000000 ) + +[46,43]: + int 1fffffffffff80000000000 <- ( ffffffffffff , 00000000000 ) + +[46,42]: + int 0fffffffffffc0000000000 <- ( ffffffffffff , 00000000000 ) + +[46,41]: + int 7ffffffffffe0000000000 <- ( ffffffffffff , 00000000000 ) + +[46,40]: + int 3fffffffffff0000000000 <- ( ffffffffffff , 0000000000 ) + +[46,39]: + int 1fffffffffff8000000000 <- ( ffffffffffff , 0000000000 ) + +[46,38]: + int 0fffffffffffc000000000 <- ( ffffffffffff , 0000000000 ) + +[46,37]: + int 7ffffffffffe000000000 <- ( ffffffffffff , 0000000000 ) + +[46,36]: + int 3fffffffffff000000000 <- ( ffffffffffff , 000000000 ) + +[46,35]: + int 1fffffffffff800000000 <- ( ffffffffffff , 000000000 ) + +[46,34]: + int 0fffffffffffc00000000 <- ( ffffffffffff , 000000000 ) + +[46,33]: + int 7ffffffffffe00000000 <- ( ffffffffffff , 000000000 ) + +[46,32]: + int 3fffffffffff00000000 <- ( ffffffffffff , 00000000 ) + +[46,31]: + int 1fffffffffff80000000 <- ( ffffffffffff , 00000000 ) + +[46,30]: + int 0fffffffffffc0000000 <- ( ffffffffffff , 00000000 ) + +[46,29]: + int 7ffffffffffe0000000 <- ( ffffffffffff , 00000000 ) + +[46,28]: + int 3fffffffffff0000000 <- ( ffffffffffff , 0000000 ) + +[46,27]: + int 1fffffffffff8000000 <- ( ffffffffffff , 0000000 ) + +[46,26]: + int 0fffffffffffc000000 <- ( ffffffffffff , 0000000 ) + +[46,25]: + int 7ffffffffffe000000 <- ( ffffffffffff , 0000000 ) + +[46,24]: + int 3fffffffffff000000 <- ( ffffffffffff , 000000 ) + +[46,23]: + int 1fffffffffff800000 <- ( ffffffffffff , 000000 ) + +[46,22]: + int 0fffffffffffc00000 <- ( ffffffffffff , 000000 ) + +[46,21]: + int 7ffffffffffe00000 <- ( ffffffffffff , 000000 ) + +[46,20]: + int 3fffffffffff00000 <- ( ffffffffffff , 00000 ) + +[46,19]: + int 1fffffffffff80000 <- ( ffffffffffff , 00000 ) + +[46,18]: + int 0fffffffffffc0000 <- ( ffffffffffff , 00000 ) + +[46,17]: + int 7ffffffffffe0000 <- ( ffffffffffff , 00000 ) + +[46,16]: + int 3fffffffffff0000 <- ( ffffffffffff , 0000 ) + +[46,15]: + int 1fffffffffff8000 <- ( ffffffffffff , 0000 ) + +[46,14]: + int 0fffffffffffc000 <- ( ffffffffffff , 0000 ) + +[46,13]: + int 7ffffffffffe000 <- ( ffffffffffff , 0000 ) + +[46,12]: + int 3fffffffffff000 <- ( ffffffffffff , 000 ) + +[46,11]: + int 1fffffffffff800 <- ( ffffffffffff , 000 ) + +[46,10]: + int 0fffffffffffc00 <- ( ffffffffffff , 000 ) + +[46,9]: + int 7ffffffffffe00 <- ( ffffffffffff , 000 ) + +[46,8]: + int 3fffffffffff00 <- ( ffffffffffff , 00 ) + +[46,7]: + int 1fffffffffff80 <- ( ffffffffffff , 00 ) + +[46,6]: + int 0fffffffffffc0 <- ( ffffffffffff , 00 ) + +[46,5]: + int 7ffffffffffe0 <- ( ffffffffffff , 00 ) + +[46,4]: + int 3fffffffffff0 <- ( ffffffffffff , 0 ) + +[46,3]: + int 1fffffffffff8 <- ( ffffffffffff , 0 ) + +[46,2]: + int 0fffffffffffc <- ( ffffffffffff , 0 ) + +[46,1]: + int 7ffffffffffe <- ( ffffffffffff , 0 ) + +[45,64]: + int 1fffffffffff0000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[45,63]: + int 0fffffffffff8000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[45,62]: + int 7ffffffffffc000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[45,61]: + int 3ffffffffffe000000000000000 <- ( ffffffffffff , 0000000000000000 ) + +[45,60]: + int 1fffffffffff000000000000000 <- ( ffffffffffff , 000000000000000 ) + +[45,59]: + int 0fffffffffff800000000000000 <- ( ffffffffffff , 000000000000000 ) + +[45,58]: + int 7ffffffffffc00000000000000 <- ( ffffffffffff , 000000000000000 ) + +[45,57]: + int 3ffffffffffe00000000000000 <- ( ffffffffffff , 000000000000000 ) + +[45,56]: + int 1fffffffffff00000000000000 <- ( ffffffffffff , 00000000000000 ) + +[45,55]: + int 0fffffffffff80000000000000 <- ( ffffffffffff , 00000000000000 ) + +[45,54]: + int 7ffffffffffc0000000000000 <- ( ffffffffffff , 00000000000000 ) + +[45,53]: + int 3ffffffffffe0000000000000 <- ( ffffffffffff , 00000000000000 ) + +[45,52]: + int 1fffffffffff0000000000000 <- ( ffffffffffff , 0000000000000 ) + +[45,51]: + int 0fffffffffff8000000000000 <- ( ffffffffffff , 0000000000000 ) + +[45,50]: + int 7ffffffffffc000000000000 <- ( ffffffffffff , 0000000000000 ) + +[45,49]: + int 3ffffffffffe000000000000 <- ( ffffffffffff , 0000000000000 ) + +[45,48]: + int 1fffffffffff000000000000 <- ( ffffffffffff , 000000000000 ) + +[45,47]: + int 0fffffffffff800000000000 <- ( ffffffffffff , 000000000000 ) + +[45,46]: + int 7ffffffffffc00000000000 <- ( ffffffffffff , 000000000000 ) + +[45,45]: + int 3ffffffffffe00000000000 <- ( ffffffffffff , 000000000000 ) + +[45,44]: + int 1fffffffffff00000000000 <- ( ffffffffffff , 00000000000 ) + +[45,43]: + int 0fffffffffff80000000000 <- ( ffffffffffff , 00000000000 ) + +[45,42]: + int 7ffffffffffc0000000000 <- ( ffffffffffff , 00000000000 ) + +[45,41]: + int 3ffffffffffe0000000000 <- ( ffffffffffff , 00000000000 ) + +[45,40]: + int 1fffffffffff0000000000 <- ( ffffffffffff , 0000000000 ) + +[45,39]: + int 0fffffffffff8000000000 <- ( ffffffffffff , 0000000000 ) + +[45,38]: + int 7ffffffffffc000000000 <- ( ffffffffffff , 0000000000 ) + +[45,37]: + int 3ffffffffffe000000000 <- ( ffffffffffff , 0000000000 ) + +[45,36]: + int 1fffffffffff000000000 <- ( ffffffffffff , 000000000 ) + +[45,35]: + int 0fffffffffff800000000 <- ( ffffffffffff , 000000000 ) + +[45,34]: + int 7ffffffffffc00000000 <- ( ffffffffffff , 000000000 ) + +[45,33]: + int 3ffffffffffe00000000 <- ( ffffffffffff , 000000000 ) + +[45,32]: + int 1fffffffffff00000000 <- ( ffffffffffff , 00000000 ) + +[45,31]: + int 0fffffffffff80000000 <- ( ffffffffffff , 00000000 ) + +[45,30]: + int 7ffffffffffc0000000 <- ( ffffffffffff , 00000000 ) + +[45,29]: + int 3ffffffffffe0000000 <- ( ffffffffffff , 00000000 ) + +[45,28]: + int 1fffffffffff0000000 <- ( ffffffffffff , 0000000 ) + +[45,27]: + int 0fffffffffff8000000 <- ( ffffffffffff , 0000000 ) + +[45,26]: + int 7ffffffffffc000000 <- ( ffffffffffff , 0000000 ) + +[45,25]: + int 3ffffffffffe000000 <- ( ffffffffffff , 0000000 ) + +[45,24]: + int 1fffffffffff000000 <- ( ffffffffffff , 000000 ) + +[45,23]: + int 0fffffffffff800000 <- ( ffffffffffff , 000000 ) + +[45,22]: + int 7ffffffffffc00000 <- ( ffffffffffff , 000000 ) + +[45,21]: + int 3ffffffffffe00000 <- ( ffffffffffff , 000000 ) + +[45,20]: + int 1fffffffffff00000 <- ( ffffffffffff , 00000 ) + +[45,19]: + int 0fffffffffff80000 <- ( ffffffffffff , 00000 ) + +[45,18]: + int 7ffffffffffc0000 <- ( ffffffffffff , 00000 ) + +[45,17]: + int 3ffffffffffe0000 <- ( ffffffffffff , 00000 ) + +[45,16]: + int 1fffffffffff0000 <- ( ffffffffffff , 0000 ) + +[45,15]: + int 0fffffffffff8000 <- ( ffffffffffff , 0000 ) + +[45,14]: + int 7ffffffffffc000 <- ( ffffffffffff , 0000 ) + +[45,13]: + int 3ffffffffffe000 <- ( ffffffffffff , 0000 ) + +[45,12]: + int 1fffffffffff000 <- ( ffffffffffff , 000 ) + +[45,11]: + int 0fffffffffff800 <- ( ffffffffffff , 000 ) + +[45,10]: + int 7ffffffffffc00 <- ( ffffffffffff , 000 ) + +[45,9]: + int 3ffffffffffe00 <- ( ffffffffffff , 000 ) + +[45,8]: + int 1fffffffffff00 <- ( ffffffffffff , 00 ) + +[45,7]: + int 0fffffffffff80 <- ( ffffffffffff , 00 ) + +[45,6]: + int 7ffffffffffc0 <- ( ffffffffffff , 00 ) + +[45,5]: + int 3ffffffffffe0 <- ( ffffffffffff , 00 ) + +[45,4]: + int 1fffffffffff0 <- ( ffffffffffff , 0 ) + +[45,3]: + int 0fffffffffff8 <- ( ffffffffffff , 0 ) + +[45,2]: + int 7ffffffffffc <- ( ffffffffffff , 0 ) + +[45,1]: + int 3ffffffffffe <- ( ffffffffffff , 0 ) + +[44,64]: + int 0fffffffffff0000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[44,63]: + int 7ffffffffff8000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[44,62]: + int 3ffffffffffc000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[44,61]: + int 1ffffffffffe000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[44,60]: + int 0fffffffffff000000000000000 <- ( fffffffffff , 000000000000000 ) + +[44,59]: + int 7ffffffffff800000000000000 <- ( fffffffffff , 000000000000000 ) + +[44,58]: + int 3ffffffffffc00000000000000 <- ( fffffffffff , 000000000000000 ) + +[44,57]: + int 1ffffffffffe00000000000000 <- ( fffffffffff , 000000000000000 ) + +[44,56]: + int 0fffffffffff00000000000000 <- ( fffffffffff , 00000000000000 ) + +[44,55]: + int 7ffffffffff80000000000000 <- ( fffffffffff , 00000000000000 ) + +[44,54]: + int 3ffffffffffc0000000000000 <- ( fffffffffff , 00000000000000 ) + +[44,53]: + int 1ffffffffffe0000000000000 <- ( fffffffffff , 00000000000000 ) + +[44,52]: + int 0fffffffffff0000000000000 <- ( fffffffffff , 0000000000000 ) + +[44,51]: + int 7ffffffffff8000000000000 <- ( fffffffffff , 0000000000000 ) + +[44,50]: + int 3ffffffffffc000000000000 <- ( fffffffffff , 0000000000000 ) + +[44,49]: + int 1ffffffffffe000000000000 <- ( fffffffffff , 0000000000000 ) + +[44,48]: + int 0fffffffffff000000000000 <- ( fffffffffff , 000000000000 ) + +[44,47]: + int 7ffffffffff800000000000 <- ( fffffffffff , 000000000000 ) + +[44,46]: + int 3ffffffffffc00000000000 <- ( fffffffffff , 000000000000 ) + +[44,45]: + int 1ffffffffffe00000000000 <- ( fffffffffff , 000000000000 ) + +[44,44]: + int 0fffffffffff00000000000 <- ( fffffffffff , 00000000000 ) + +[44,43]: + int 7ffffffffff80000000000 <- ( fffffffffff , 00000000000 ) + +[44,42]: + int 3ffffffffffc0000000000 <- ( fffffffffff , 00000000000 ) + +[44,41]: + int 1ffffffffffe0000000000 <- ( fffffffffff , 00000000000 ) + +[44,40]: + int 0fffffffffff0000000000 <- ( fffffffffff , 0000000000 ) + +[44,39]: + int 7ffffffffff8000000000 <- ( fffffffffff , 0000000000 ) + +[44,38]: + int 3ffffffffffc000000000 <- ( fffffffffff , 0000000000 ) + +[44,37]: + int 1ffffffffffe000000000 <- ( fffffffffff , 0000000000 ) + +[44,36]: + int 0fffffffffff000000000 <- ( fffffffffff , 000000000 ) + +[44,35]: + int 7ffffffffff800000000 <- ( fffffffffff , 000000000 ) + +[44,34]: + int 3ffffffffffc00000000 <- ( fffffffffff , 000000000 ) + +[44,33]: + int 1ffffffffffe00000000 <- ( fffffffffff , 000000000 ) + +[44,32]: + int 0fffffffffff00000000 <- ( fffffffffff , 00000000 ) + +[44,31]: + int 7ffffffffff80000000 <- ( fffffffffff , 00000000 ) + +[44,30]: + int 3ffffffffffc0000000 <- ( fffffffffff , 00000000 ) + +[44,29]: + int 1ffffffffffe0000000 <- ( fffffffffff , 00000000 ) + +[44,28]: + int 0fffffffffff0000000 <- ( fffffffffff , 0000000 ) + +[44,27]: + int 7ffffffffff8000000 <- ( fffffffffff , 0000000 ) + +[44,26]: + int 3ffffffffffc000000 <- ( fffffffffff , 0000000 ) + +[44,25]: + int 1ffffffffffe000000 <- ( fffffffffff , 0000000 ) + +[44,24]: + int 0fffffffffff000000 <- ( fffffffffff , 000000 ) + +[44,23]: + int 7ffffffffff800000 <- ( fffffffffff , 000000 ) + +[44,22]: + int 3ffffffffffc00000 <- ( fffffffffff , 000000 ) + +[44,21]: + int 1ffffffffffe00000 <- ( fffffffffff , 000000 ) + +[44,20]: + int 0fffffffffff00000 <- ( fffffffffff , 00000 ) + +[44,19]: + int 7ffffffffff80000 <- ( fffffffffff , 00000 ) + +[44,18]: + int 3ffffffffffc0000 <- ( fffffffffff , 00000 ) + +[44,17]: + int 1ffffffffffe0000 <- ( fffffffffff , 00000 ) + +[44,16]: + int 0fffffffffff0000 <- ( fffffffffff , 0000 ) + +[44,15]: + int 7ffffffffff8000 <- ( fffffffffff , 0000 ) + +[44,14]: + int 3ffffffffffc000 <- ( fffffffffff , 0000 ) + +[44,13]: + int 1ffffffffffe000 <- ( fffffffffff , 0000 ) + +[44,12]: + int 0fffffffffff000 <- ( fffffffffff , 000 ) + +[44,11]: + int 7ffffffffff800 <- ( fffffffffff , 000 ) + +[44,10]: + int 3ffffffffffc00 <- ( fffffffffff , 000 ) + +[44,9]: + int 1ffffffffffe00 <- ( fffffffffff , 000 ) + +[44,8]: + int 0fffffffffff00 <- ( fffffffffff , 00 ) + +[44,7]: + int 7ffffffffff80 <- ( fffffffffff , 00 ) + +[44,6]: + int 3ffffffffffc0 <- ( fffffffffff , 00 ) + +[44,5]: + int 1ffffffffffe0 <- ( fffffffffff , 00 ) + +[44,4]: + int 0fffffffffff0 <- ( fffffffffff , 0 ) + +[44,3]: + int 7ffffffffff8 <- ( fffffffffff , 0 ) + +[44,2]: + int 3ffffffffffc <- ( fffffffffff , 0 ) + +[44,1]: + int 1ffffffffffe <- ( fffffffffff , 0 ) + +[43,64]: + int 7ffffffffff0000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[43,63]: + int 3ffffffffff8000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[43,62]: + int 1ffffffffffc000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[43,61]: + int 0ffffffffffe000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[43,60]: + int 7ffffffffff000000000000000 <- ( fffffffffff , 000000000000000 ) + +[43,59]: + int 3ffffffffff800000000000000 <- ( fffffffffff , 000000000000000 ) + +[43,58]: + int 1ffffffffffc00000000000000 <- ( fffffffffff , 000000000000000 ) + +[43,57]: + int 0ffffffffffe00000000000000 <- ( fffffffffff , 000000000000000 ) + +[43,56]: + int 7ffffffffff00000000000000 <- ( fffffffffff , 00000000000000 ) + +[43,55]: + int 3ffffffffff80000000000000 <- ( fffffffffff , 00000000000000 ) + +[43,54]: + int 1ffffffffffc0000000000000 <- ( fffffffffff , 00000000000000 ) + +[43,53]: + int 0ffffffffffe0000000000000 <- ( fffffffffff , 00000000000000 ) + +[43,52]: + int 7ffffffffff0000000000000 <- ( fffffffffff , 0000000000000 ) + +[43,51]: + int 3ffffffffff8000000000000 <- ( fffffffffff , 0000000000000 ) + +[43,50]: + int 1ffffffffffc000000000000 <- ( fffffffffff , 0000000000000 ) + +[43,49]: + int 0ffffffffffe000000000000 <- ( fffffffffff , 0000000000000 ) + +[43,48]: + int 7ffffffffff000000000000 <- ( fffffffffff , 000000000000 ) + +[43,47]: + int 3ffffffffff800000000000 <- ( fffffffffff , 000000000000 ) + +[43,46]: + int 1ffffffffffc00000000000 <- ( fffffffffff , 000000000000 ) + +[43,45]: + int 0ffffffffffe00000000000 <- ( fffffffffff , 000000000000 ) + +[43,44]: + int 7ffffffffff00000000000 <- ( fffffffffff , 00000000000 ) + +[43,43]: + int 3ffffffffff80000000000 <- ( fffffffffff , 00000000000 ) + +[43,42]: + int 1ffffffffffc0000000000 <- ( fffffffffff , 00000000000 ) + +[43,41]: + int 0ffffffffffe0000000000 <- ( fffffffffff , 00000000000 ) + +[43,40]: + int 7ffffffffff0000000000 <- ( fffffffffff , 0000000000 ) + +[43,39]: + int 3ffffffffff8000000000 <- ( fffffffffff , 0000000000 ) + +[43,38]: + int 1ffffffffffc000000000 <- ( fffffffffff , 0000000000 ) + +[43,37]: + int 0ffffffffffe000000000 <- ( fffffffffff , 0000000000 ) + +[43,36]: + int 7ffffffffff000000000 <- ( fffffffffff , 000000000 ) + +[43,35]: + int 3ffffffffff800000000 <- ( fffffffffff , 000000000 ) + +[43,34]: + int 1ffffffffffc00000000 <- ( fffffffffff , 000000000 ) + +[43,33]: + int 0ffffffffffe00000000 <- ( fffffffffff , 000000000 ) + +[43,32]: + int 7ffffffffff00000000 <- ( fffffffffff , 00000000 ) + +[43,31]: + int 3ffffffffff80000000 <- ( fffffffffff , 00000000 ) + +[43,30]: + int 1ffffffffffc0000000 <- ( fffffffffff , 00000000 ) + +[43,29]: + int 0ffffffffffe0000000 <- ( fffffffffff , 00000000 ) + +[43,28]: + int 7ffffffffff0000000 <- ( fffffffffff , 0000000 ) + +[43,27]: + int 3ffffffffff8000000 <- ( fffffffffff , 0000000 ) + +[43,26]: + int 1ffffffffffc000000 <- ( fffffffffff , 0000000 ) + +[43,25]: + int 0ffffffffffe000000 <- ( fffffffffff , 0000000 ) + +[43,24]: + int 7ffffffffff000000 <- ( fffffffffff , 000000 ) + +[43,23]: + int 3ffffffffff800000 <- ( fffffffffff , 000000 ) + +[43,22]: + int 1ffffffffffc00000 <- ( fffffffffff , 000000 ) + +[43,21]: + int 0ffffffffffe00000 <- ( fffffffffff , 000000 ) + +[43,20]: + int 7ffffffffff00000 <- ( fffffffffff , 00000 ) + +[43,19]: + int 3ffffffffff80000 <- ( fffffffffff , 00000 ) + +[43,18]: + int 1ffffffffffc0000 <- ( fffffffffff , 00000 ) + +[43,17]: + int 0ffffffffffe0000 <- ( fffffffffff , 00000 ) + +[43,16]: + int 7ffffffffff0000 <- ( fffffffffff , 0000 ) + +[43,15]: + int 3ffffffffff8000 <- ( fffffffffff , 0000 ) + +[43,14]: + int 1ffffffffffc000 <- ( fffffffffff , 0000 ) + +[43,13]: + int 0ffffffffffe000 <- ( fffffffffff , 0000 ) + +[43,12]: + int 7ffffffffff000 <- ( fffffffffff , 000 ) + +[43,11]: + int 3ffffffffff800 <- ( fffffffffff , 000 ) + +[43,10]: + int 1ffffffffffc00 <- ( fffffffffff , 000 ) + +[43,9]: + int 0ffffffffffe00 <- ( fffffffffff , 000 ) + +[43,8]: + int 7ffffffffff00 <- ( fffffffffff , 00 ) + +[43,7]: + int 3ffffffffff80 <- ( fffffffffff , 00 ) + +[43,6]: + int 1ffffffffffc0 <- ( fffffffffff , 00 ) + +[43,5]: + int 0ffffffffffe0 <- ( fffffffffff , 00 ) + +[43,4]: + int 7ffffffffff0 <- ( fffffffffff , 0 ) + +[43,3]: + int 3ffffffffff8 <- ( fffffffffff , 0 ) + +[43,2]: + int 1ffffffffffc <- ( fffffffffff , 0 ) + +[43,1]: + int 0ffffffffffe <- ( fffffffffff , 0 ) + +[42,64]: + int 3ffffffffff0000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[42,63]: + int 1ffffffffff8000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[42,62]: + int 0ffffffffffc000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[42,61]: + int 7fffffffffe000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[42,60]: + int 3ffffffffff000000000000000 <- ( fffffffffff , 000000000000000 ) + +[42,59]: + int 1ffffffffff800000000000000 <- ( fffffffffff , 000000000000000 ) + +[42,58]: + int 0ffffffffffc00000000000000 <- ( fffffffffff , 000000000000000 ) + +[42,57]: + int 7fffffffffe00000000000000 <- ( fffffffffff , 000000000000000 ) + +[42,56]: + int 3ffffffffff00000000000000 <- ( fffffffffff , 00000000000000 ) + +[42,55]: + int 1ffffffffff80000000000000 <- ( fffffffffff , 00000000000000 ) + +[42,54]: + int 0ffffffffffc0000000000000 <- ( fffffffffff , 00000000000000 ) + +[42,53]: + int 7fffffffffe0000000000000 <- ( fffffffffff , 00000000000000 ) + +[42,52]: + int 3ffffffffff0000000000000 <- ( fffffffffff , 0000000000000 ) + +[42,51]: + int 1ffffffffff8000000000000 <- ( fffffffffff , 0000000000000 ) + +[42,50]: + int 0ffffffffffc000000000000 <- ( fffffffffff , 0000000000000 ) + +[42,49]: + int 7fffffffffe000000000000 <- ( fffffffffff , 0000000000000 ) + +[42,48]: + int 3ffffffffff000000000000 <- ( fffffffffff , 000000000000 ) + +[42,47]: + int 1ffffffffff800000000000 <- ( fffffffffff , 000000000000 ) + +[42,46]: + int 0ffffffffffc00000000000 <- ( fffffffffff , 000000000000 ) + +[42,45]: + int 7fffffffffe00000000000 <- ( fffffffffff , 000000000000 ) + +[42,44]: + int 3ffffffffff00000000000 <- ( fffffffffff , 00000000000 ) + +[42,43]: + int 1ffffffffff80000000000 <- ( fffffffffff , 00000000000 ) + +[42,42]: + int 0ffffffffffc0000000000 <- ( fffffffffff , 00000000000 ) + +[42,41]: + int 7fffffffffe0000000000 <- ( fffffffffff , 00000000000 ) + +[42,40]: + int 3ffffffffff0000000000 <- ( fffffffffff , 0000000000 ) + +[42,39]: + int 1ffffffffff8000000000 <- ( fffffffffff , 0000000000 ) + +[42,38]: + int 0ffffffffffc000000000 <- ( fffffffffff , 0000000000 ) + +[42,37]: + int 7fffffffffe000000000 <- ( fffffffffff , 0000000000 ) + +[42,36]: + int 3ffffffffff000000000 <- ( fffffffffff , 000000000 ) + +[42,35]: + int 1ffffffffff800000000 <- ( fffffffffff , 000000000 ) + +[42,34]: + int 0ffffffffffc00000000 <- ( fffffffffff , 000000000 ) + +[42,33]: + int 7fffffffffe00000000 <- ( fffffffffff , 000000000 ) + +[42,32]: + int 3ffffffffff00000000 <- ( fffffffffff , 00000000 ) + +[42,31]: + int 1ffffffffff80000000 <- ( fffffffffff , 00000000 ) + +[42,30]: + int 0ffffffffffc0000000 <- ( fffffffffff , 00000000 ) + +[42,29]: + int 7fffffffffe0000000 <- ( fffffffffff , 00000000 ) + +[42,28]: + int 3ffffffffff0000000 <- ( fffffffffff , 0000000 ) + +[42,27]: + int 1ffffffffff8000000 <- ( fffffffffff , 0000000 ) + +[42,26]: + int 0ffffffffffc000000 <- ( fffffffffff , 0000000 ) + +[42,25]: + int 7fffffffffe000000 <- ( fffffffffff , 0000000 ) + +[42,24]: + int 3ffffffffff000000 <- ( fffffffffff , 000000 ) + +[42,23]: + int 1ffffffffff800000 <- ( fffffffffff , 000000 ) + +[42,22]: + int 0ffffffffffc00000 <- ( fffffffffff , 000000 ) + +[42,21]: + int 7fffffffffe00000 <- ( fffffffffff , 000000 ) + +[42,20]: + int 3ffffffffff00000 <- ( fffffffffff , 00000 ) + +[42,19]: + int 1ffffffffff80000 <- ( fffffffffff , 00000 ) + +[42,18]: + int 0ffffffffffc0000 <- ( fffffffffff , 00000 ) + +[42,17]: + int 7fffffffffe0000 <- ( fffffffffff , 00000 ) + +[42,16]: + int 3ffffffffff0000 <- ( fffffffffff , 0000 ) + +[42,15]: + int 1ffffffffff8000 <- ( fffffffffff , 0000 ) + +[42,14]: + int 0ffffffffffc000 <- ( fffffffffff , 0000 ) + +[42,13]: + int 7fffffffffe000 <- ( fffffffffff , 0000 ) + +[42,12]: + int 3ffffffffff000 <- ( fffffffffff , 000 ) + +[42,11]: + int 1ffffffffff800 <- ( fffffffffff , 000 ) + +[42,10]: + int 0ffffffffffc00 <- ( fffffffffff , 000 ) + +[42,9]: + int 7fffffffffe00 <- ( fffffffffff , 000 ) + +[42,8]: + int 3ffffffffff00 <- ( fffffffffff , 00 ) + +[42,7]: + int 1ffffffffff80 <- ( fffffffffff , 00 ) + +[42,6]: + int 0ffffffffffc0 <- ( fffffffffff , 00 ) + +[42,5]: + int 7fffffffffe0 <- ( fffffffffff , 00 ) + +[42,4]: + int 3ffffffffff0 <- ( fffffffffff , 0 ) + +[42,3]: + int 1ffffffffff8 <- ( fffffffffff , 0 ) + +[42,2]: + int 0ffffffffffc <- ( fffffffffff , 0 ) + +[42,1]: + int 7fffffffffe <- ( fffffffffff , 0 ) + +[41,64]: + int 1ffffffffff0000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[41,63]: + int 0ffffffffff8000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[41,62]: + int 7fffffffffc000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[41,61]: + int 3fffffffffe000000000000000 <- ( fffffffffff , 0000000000000000 ) + +[41,60]: + int 1ffffffffff000000000000000 <- ( fffffffffff , 000000000000000 ) + +[41,59]: + int 0ffffffffff800000000000000 <- ( fffffffffff , 000000000000000 ) + +[41,58]: + int 7fffffffffc00000000000000 <- ( fffffffffff , 000000000000000 ) + +[41,57]: + int 3fffffffffe00000000000000 <- ( fffffffffff , 000000000000000 ) + +[41,56]: + int 1ffffffffff00000000000000 <- ( fffffffffff , 00000000000000 ) + +[41,55]: + int 0ffffffffff80000000000000 <- ( fffffffffff , 00000000000000 ) + +[41,54]: + int 7fffffffffc0000000000000 <- ( fffffffffff , 00000000000000 ) + +[41,53]: + int 3fffffffffe0000000000000 <- ( fffffffffff , 00000000000000 ) + +[41,52]: + int 1ffffffffff0000000000000 <- ( fffffffffff , 0000000000000 ) + +[41,51]: + int 0ffffffffff8000000000000 <- ( fffffffffff , 0000000000000 ) + +[41,50]: + int 7fffffffffc000000000000 <- ( fffffffffff , 0000000000000 ) + +[41,49]: + int 3fffffffffe000000000000 <- ( fffffffffff , 0000000000000 ) + +[41,48]: + int 1ffffffffff000000000000 <- ( fffffffffff , 000000000000 ) + +[41,47]: + int 0ffffffffff800000000000 <- ( fffffffffff , 000000000000 ) + +[41,46]: + int 7fffffffffc00000000000 <- ( fffffffffff , 000000000000 ) + +[41,45]: + int 3fffffffffe00000000000 <- ( fffffffffff , 000000000000 ) + +[41,44]: + int 1ffffffffff00000000000 <- ( fffffffffff , 00000000000 ) + +[41,43]: + int 0ffffffffff80000000000 <- ( fffffffffff , 00000000000 ) + +[41,42]: + int 7fffffffffc0000000000 <- ( fffffffffff , 00000000000 ) + +[41,41]: + int 3fffffffffe0000000000 <- ( fffffffffff , 00000000000 ) + +[41,40]: + int 1ffffffffff0000000000 <- ( fffffffffff , 0000000000 ) + +[41,39]: + int 0ffffffffff8000000000 <- ( fffffffffff , 0000000000 ) + +[41,38]: + int 7fffffffffc000000000 <- ( fffffffffff , 0000000000 ) + +[41,37]: + int 3fffffffffe000000000 <- ( fffffffffff , 0000000000 ) + +[41,36]: + int 1ffffffffff000000000 <- ( fffffffffff , 000000000 ) + +[41,35]: + int 0ffffffffff800000000 <- ( fffffffffff , 000000000 ) + +[41,34]: + int 7fffffffffc00000000 <- ( fffffffffff , 000000000 ) + +[41,33]: + int 3fffffffffe00000000 <- ( fffffffffff , 000000000 ) + +[41,32]: + int 1ffffffffff00000000 <- ( fffffffffff , 00000000 ) + +[41,31]: + int 0ffffffffff80000000 <- ( fffffffffff , 00000000 ) + +[41,30]: + int 7fffffffffc0000000 <- ( fffffffffff , 00000000 ) + +[41,29]: + int 3fffffffffe0000000 <- ( fffffffffff , 00000000 ) + +[41,28]: + int 1ffffffffff0000000 <- ( fffffffffff , 0000000 ) + +[41,27]: + int 0ffffffffff8000000 <- ( fffffffffff , 0000000 ) + +[41,26]: + int 7fffffffffc000000 <- ( fffffffffff , 0000000 ) + +[41,25]: + int 3fffffffffe000000 <- ( fffffffffff , 0000000 ) + +[41,24]: + int 1ffffffffff000000 <- ( fffffffffff , 000000 ) + +[41,23]: + int 0ffffffffff800000 <- ( fffffffffff , 000000 ) + +[41,22]: + int 7fffffffffc00000 <- ( fffffffffff , 000000 ) + +[41,21]: + int 3fffffffffe00000 <- ( fffffffffff , 000000 ) + +[41,20]: + int 1ffffffffff00000 <- ( fffffffffff , 00000 ) + +[41,19]: + int 0ffffffffff80000 <- ( fffffffffff , 00000 ) + +[41,18]: + int 7fffffffffc0000 <- ( fffffffffff , 00000 ) + +[41,17]: + int 3fffffffffe0000 <- ( fffffffffff , 00000 ) + +[41,16]: + int 1ffffffffff0000 <- ( fffffffffff , 0000 ) + +[41,15]: + int 0ffffffffff8000 <- ( fffffffffff , 0000 ) + +[41,14]: + int 7fffffffffc000 <- ( fffffffffff , 0000 ) + +[41,13]: + int 3fffffffffe000 <- ( fffffffffff , 0000 ) + +[41,12]: + int 1ffffffffff000 <- ( fffffffffff , 000 ) + +[41,11]: + int 0ffffffffff800 <- ( fffffffffff , 000 ) + +[41,10]: + int 7fffffffffc00 <- ( fffffffffff , 000 ) + +[41,9]: + int 3fffffffffe00 <- ( fffffffffff , 000 ) + +[41,8]: + int 1ffffffffff00 <- ( fffffffffff , 00 ) + +[41,7]: + int 0ffffffffff80 <- ( fffffffffff , 00 ) + +[41,6]: + int 7fffffffffc0 <- ( fffffffffff , 00 ) + +[41,5]: + int 3fffffffffe0 <- ( fffffffffff , 00 ) + +[41,4]: + int 1ffffffffff0 <- ( fffffffffff , 0 ) + +[41,3]: + int 0ffffffffff8 <- ( fffffffffff , 0 ) + +[41,2]: + int 7fffffffffc <- ( fffffffffff , 0 ) + +[41,1]: + int 3fffffffffe <- ( fffffffffff , 0 ) + +[40,64]: + int 0ffffffffff0000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[40,63]: + int 7fffffffff8000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[40,62]: + int 3fffffffffc000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[40,61]: + int 1fffffffffe000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[40,60]: + int 0ffffffffff000000000000000 <- ( ffffffffff , 000000000000000 ) + +[40,59]: + int 7fffffffff800000000000000 <- ( ffffffffff , 000000000000000 ) + +[40,58]: + int 3fffffffffc00000000000000 <- ( ffffffffff , 000000000000000 ) + +[40,57]: + int 1fffffffffe00000000000000 <- ( ffffffffff , 000000000000000 ) + +[40,56]: + int 0ffffffffff00000000000000 <- ( ffffffffff , 00000000000000 ) + +[40,55]: + int 7fffffffff80000000000000 <- ( ffffffffff , 00000000000000 ) + +[40,54]: + int 3fffffffffc0000000000000 <- ( ffffffffff , 00000000000000 ) + +[40,53]: + int 1fffffffffe0000000000000 <- ( ffffffffff , 00000000000000 ) + +[40,52]: + int 0ffffffffff0000000000000 <- ( ffffffffff , 0000000000000 ) + +[40,51]: + int 7fffffffff8000000000000 <- ( ffffffffff , 0000000000000 ) + +[40,50]: + int 3fffffffffc000000000000 <- ( ffffffffff , 0000000000000 ) + +[40,49]: + int 1fffffffffe000000000000 <- ( ffffffffff , 0000000000000 ) + +[40,48]: + int 0ffffffffff000000000000 <- ( ffffffffff , 000000000000 ) + +[40,47]: + int 7fffffffff800000000000 <- ( ffffffffff , 000000000000 ) + +[40,46]: + int 3fffffffffc00000000000 <- ( ffffffffff , 000000000000 ) + +[40,45]: + int 1fffffffffe00000000000 <- ( ffffffffff , 000000000000 ) + +[40,44]: + int 0ffffffffff00000000000 <- ( ffffffffff , 00000000000 ) + +[40,43]: + int 7fffffffff80000000000 <- ( ffffffffff , 00000000000 ) + +[40,42]: + int 3fffffffffc0000000000 <- ( ffffffffff , 00000000000 ) + +[40,41]: + int 1fffffffffe0000000000 <- ( ffffffffff , 00000000000 ) + +[40,40]: + int 0ffffffffff0000000000 <- ( ffffffffff , 0000000000 ) + +[40,39]: + int 7fffffffff8000000000 <- ( ffffffffff , 0000000000 ) + +[40,38]: + int 3fffffffffc000000000 <- ( ffffffffff , 0000000000 ) + +[40,37]: + int 1fffffffffe000000000 <- ( ffffffffff , 0000000000 ) + +[40,36]: + int 0ffffffffff000000000 <- ( ffffffffff , 000000000 ) + +[40,35]: + int 7fffffffff800000000 <- ( ffffffffff , 000000000 ) + +[40,34]: + int 3fffffffffc00000000 <- ( ffffffffff , 000000000 ) + +[40,33]: + int 1fffffffffe00000000 <- ( ffffffffff , 000000000 ) + +[40,32]: + int 0ffffffffff00000000 <- ( ffffffffff , 00000000 ) + +[40,31]: + int 7fffffffff80000000 <- ( ffffffffff , 00000000 ) + +[40,30]: + int 3fffffffffc0000000 <- ( ffffffffff , 00000000 ) + +[40,29]: + int 1fffffffffe0000000 <- ( ffffffffff , 00000000 ) + +[40,28]: + int 0ffffffffff0000000 <- ( ffffffffff , 0000000 ) + +[40,27]: + int 7fffffffff8000000 <- ( ffffffffff , 0000000 ) + +[40,26]: + int 3fffffffffc000000 <- ( ffffffffff , 0000000 ) + +[40,25]: + int 1fffffffffe000000 <- ( ffffffffff , 0000000 ) + +[40,24]: + int 0ffffffffff000000 <- ( ffffffffff , 000000 ) + +[40,23]: + int 7fffffffff800000 <- ( ffffffffff , 000000 ) + +[40,22]: + int 3fffffffffc00000 <- ( ffffffffff , 000000 ) + +[40,21]: + int 1fffffffffe00000 <- ( ffffffffff , 000000 ) + +[40,20]: + int 0ffffffffff00000 <- ( ffffffffff , 00000 ) + +[40,19]: + int 7fffffffff80000 <- ( ffffffffff , 00000 ) + +[40,18]: + int 3fffffffffc0000 <- ( ffffffffff , 00000 ) + +[40,17]: + int 1fffffffffe0000 <- ( ffffffffff , 00000 ) + +[40,16]: + int 0ffffffffff0000 <- ( ffffffffff , 0000 ) + +[40,15]: + int 7fffffffff8000 <- ( ffffffffff , 0000 ) + +[40,14]: + int 3fffffffffc000 <- ( ffffffffff , 0000 ) + +[40,13]: + int 1fffffffffe000 <- ( ffffffffff , 0000 ) + +[40,12]: + int 0ffffffffff000 <- ( ffffffffff , 000 ) + +[40,11]: + int 7fffffffff800 <- ( ffffffffff , 000 ) + +[40,10]: + int 3fffffffffc00 <- ( ffffffffff , 000 ) + +[40,9]: + int 1fffffffffe00 <- ( ffffffffff , 000 ) + +[40,8]: + int 0ffffffffff00 <- ( ffffffffff , 00 ) + +[40,7]: + int 7fffffffff80 <- ( ffffffffff , 00 ) + +[40,6]: + int 3fffffffffc0 <- ( ffffffffff , 00 ) + +[40,5]: + int 1fffffffffe0 <- ( ffffffffff , 00 ) + +[40,4]: + int 0ffffffffff0 <- ( ffffffffff , 0 ) + +[40,3]: + int 7fffffffff8 <- ( ffffffffff , 0 ) + +[40,2]: + int 3fffffffffc <- ( ffffffffff , 0 ) + +[40,1]: + int 1fffffffffe <- ( ffffffffff , 0 ) + +[39,64]: + int 7fffffffff0000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[39,63]: + int 3fffffffff8000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[39,62]: + int 1fffffffffc000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[39,61]: + int 0fffffffffe000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[39,60]: + int 7fffffffff000000000000000 <- ( ffffffffff , 000000000000000 ) + +[39,59]: + int 3fffffffff800000000000000 <- ( ffffffffff , 000000000000000 ) + +[39,58]: + int 1fffffffffc00000000000000 <- ( ffffffffff , 000000000000000 ) + +[39,57]: + int 0fffffffffe00000000000000 <- ( ffffffffff , 000000000000000 ) + +[39,56]: + int 7fffffffff00000000000000 <- ( ffffffffff , 00000000000000 ) + +[39,55]: + int 3fffffffff80000000000000 <- ( ffffffffff , 00000000000000 ) + +[39,54]: + int 1fffffffffc0000000000000 <- ( ffffffffff , 00000000000000 ) + +[39,53]: + int 0fffffffffe0000000000000 <- ( ffffffffff , 00000000000000 ) + +[39,52]: + int 7fffffffff0000000000000 <- ( ffffffffff , 0000000000000 ) + +[39,51]: + int 3fffffffff8000000000000 <- ( ffffffffff , 0000000000000 ) + +[39,50]: + int 1fffffffffc000000000000 <- ( ffffffffff , 0000000000000 ) + +[39,49]: + int 0fffffffffe000000000000 <- ( ffffffffff , 0000000000000 ) + +[39,48]: + int 7fffffffff000000000000 <- ( ffffffffff , 000000000000 ) + +[39,47]: + int 3fffffffff800000000000 <- ( ffffffffff , 000000000000 ) + +[39,46]: + int 1fffffffffc00000000000 <- ( ffffffffff , 000000000000 ) + +[39,45]: + int 0fffffffffe00000000000 <- ( ffffffffff , 000000000000 ) + +[39,44]: + int 7fffffffff00000000000 <- ( ffffffffff , 00000000000 ) + +[39,43]: + int 3fffffffff80000000000 <- ( ffffffffff , 00000000000 ) + +[39,42]: + int 1fffffffffc0000000000 <- ( ffffffffff , 00000000000 ) + +[39,41]: + int 0fffffffffe0000000000 <- ( ffffffffff , 00000000000 ) + +[39,40]: + int 7fffffffff0000000000 <- ( ffffffffff , 0000000000 ) + +[39,39]: + int 3fffffffff8000000000 <- ( ffffffffff , 0000000000 ) + +[39,38]: + int 1fffffffffc000000000 <- ( ffffffffff , 0000000000 ) + +[39,37]: + int 0fffffffffe000000000 <- ( ffffffffff , 0000000000 ) + +[39,36]: + int 7fffffffff000000000 <- ( ffffffffff , 000000000 ) + +[39,35]: + int 3fffffffff800000000 <- ( ffffffffff , 000000000 ) + +[39,34]: + int 1fffffffffc00000000 <- ( ffffffffff , 000000000 ) + +[39,33]: + int 0fffffffffe00000000 <- ( ffffffffff , 000000000 ) + +[39,32]: + int 7fffffffff00000000 <- ( ffffffffff , 00000000 ) + +[39,31]: + int 3fffffffff80000000 <- ( ffffffffff , 00000000 ) + +[39,30]: + int 1fffffffffc0000000 <- ( ffffffffff , 00000000 ) + +[39,29]: + int 0fffffffffe0000000 <- ( ffffffffff , 00000000 ) + +[39,28]: + int 7fffffffff0000000 <- ( ffffffffff , 0000000 ) + +[39,27]: + int 3fffffffff8000000 <- ( ffffffffff , 0000000 ) + +[39,26]: + int 1fffffffffc000000 <- ( ffffffffff , 0000000 ) + +[39,25]: + int 0fffffffffe000000 <- ( ffffffffff , 0000000 ) + +[39,24]: + int 7fffffffff000000 <- ( ffffffffff , 000000 ) + +[39,23]: + int 3fffffffff800000 <- ( ffffffffff , 000000 ) + +[39,22]: + int 1fffffffffc00000 <- ( ffffffffff , 000000 ) + +[39,21]: + int 0fffffffffe00000 <- ( ffffffffff , 000000 ) + +[39,20]: + int 7fffffffff00000 <- ( ffffffffff , 00000 ) + +[39,19]: + int 3fffffffff80000 <- ( ffffffffff , 00000 ) + +[39,18]: + int 1fffffffffc0000 <- ( ffffffffff , 00000 ) + +[39,17]: + int 0fffffffffe0000 <- ( ffffffffff , 00000 ) + +[39,16]: + int 7fffffffff0000 <- ( ffffffffff , 0000 ) + +[39,15]: + int 3fffffffff8000 <- ( ffffffffff , 0000 ) + +[39,14]: + int 1fffffffffc000 <- ( ffffffffff , 0000 ) + +[39,13]: + int 0fffffffffe000 <- ( ffffffffff , 0000 ) + +[39,12]: + int 7fffffffff000 <- ( ffffffffff , 000 ) + +[39,11]: + int 3fffffffff800 <- ( ffffffffff , 000 ) + +[39,10]: + int 1fffffffffc00 <- ( ffffffffff , 000 ) + +[39,9]: + int 0fffffffffe00 <- ( ffffffffff , 000 ) + +[39,8]: + int 7fffffffff00 <- ( ffffffffff , 00 ) + +[39,7]: + int 3fffffffff80 <- ( ffffffffff , 00 ) + +[39,6]: + int 1fffffffffc0 <- ( ffffffffff , 00 ) + +[39,5]: + int 0fffffffffe0 <- ( ffffffffff , 00 ) + +[39,4]: + int 7fffffffff0 <- ( ffffffffff , 0 ) + +[39,3]: + int 3fffffffff8 <- ( ffffffffff , 0 ) + +[39,2]: + int 1fffffffffc <- ( ffffffffff , 0 ) + +[39,1]: + int 0fffffffffe <- ( ffffffffff , 0 ) + +[38,64]: + int 3fffffffff0000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[38,63]: + int 1fffffffff8000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[38,62]: + int 0fffffffffc000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[38,61]: + int 7ffffffffe000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[38,60]: + int 3fffffffff000000000000000 <- ( ffffffffff , 000000000000000 ) + +[38,59]: + int 1fffffffff800000000000000 <- ( ffffffffff , 000000000000000 ) + +[38,58]: + int 0fffffffffc00000000000000 <- ( ffffffffff , 000000000000000 ) + +[38,57]: + int 7ffffffffe00000000000000 <- ( ffffffffff , 000000000000000 ) + +[38,56]: + int 3fffffffff00000000000000 <- ( ffffffffff , 00000000000000 ) + +[38,55]: + int 1fffffffff80000000000000 <- ( ffffffffff , 00000000000000 ) + +[38,54]: + int 0fffffffffc0000000000000 <- ( ffffffffff , 00000000000000 ) + +[38,53]: + int 7ffffffffe0000000000000 <- ( ffffffffff , 00000000000000 ) + +[38,52]: + int 3fffffffff0000000000000 <- ( ffffffffff , 0000000000000 ) + +[38,51]: + int 1fffffffff8000000000000 <- ( ffffffffff , 0000000000000 ) + +[38,50]: + int 0fffffffffc000000000000 <- ( ffffffffff , 0000000000000 ) + +[38,49]: + int 7ffffffffe000000000000 <- ( ffffffffff , 0000000000000 ) + +[38,48]: + int 3fffffffff000000000000 <- ( ffffffffff , 000000000000 ) + +[38,47]: + int 1fffffffff800000000000 <- ( ffffffffff , 000000000000 ) + +[38,46]: + int 0fffffffffc00000000000 <- ( ffffffffff , 000000000000 ) + +[38,45]: + int 7ffffffffe00000000000 <- ( ffffffffff , 000000000000 ) + +[38,44]: + int 3fffffffff00000000000 <- ( ffffffffff , 00000000000 ) + +[38,43]: + int 1fffffffff80000000000 <- ( ffffffffff , 00000000000 ) + +[38,42]: + int 0fffffffffc0000000000 <- ( ffffffffff , 00000000000 ) + +[38,41]: + int 7ffffffffe0000000000 <- ( ffffffffff , 00000000000 ) + +[38,40]: + int 3fffffffff0000000000 <- ( ffffffffff , 0000000000 ) + +[38,39]: + int 1fffffffff8000000000 <- ( ffffffffff , 0000000000 ) + +[38,38]: + int 0fffffffffc000000000 <- ( ffffffffff , 0000000000 ) + +[38,37]: + int 7ffffffffe000000000 <- ( ffffffffff , 0000000000 ) + +[38,36]: + int 3fffffffff000000000 <- ( ffffffffff , 000000000 ) + +[38,35]: + int 1fffffffff800000000 <- ( ffffffffff , 000000000 ) + +[38,34]: + int 0fffffffffc00000000 <- ( ffffffffff , 000000000 ) + +[38,33]: + int 7ffffffffe00000000 <- ( ffffffffff , 000000000 ) + +[38,32]: + int 3fffffffff00000000 <- ( ffffffffff , 00000000 ) + +[38,31]: + int 1fffffffff80000000 <- ( ffffffffff , 00000000 ) + +[38,30]: + int 0fffffffffc0000000 <- ( ffffffffff , 00000000 ) + +[38,29]: + int 7ffffffffe0000000 <- ( ffffffffff , 00000000 ) + +[38,28]: + int 3fffffffff0000000 <- ( ffffffffff , 0000000 ) + +[38,27]: + int 1fffffffff8000000 <- ( ffffffffff , 0000000 ) + +[38,26]: + int 0fffffffffc000000 <- ( ffffffffff , 0000000 ) + +[38,25]: + int 7ffffffffe000000 <- ( ffffffffff , 0000000 ) + +[38,24]: + int 3fffffffff000000 <- ( ffffffffff , 000000 ) + +[38,23]: + int 1fffffffff800000 <- ( ffffffffff , 000000 ) + +[38,22]: + int 0fffffffffc00000 <- ( ffffffffff , 000000 ) + +[38,21]: + int 7ffffffffe00000 <- ( ffffffffff , 000000 ) + +[38,20]: + int 3fffffffff00000 <- ( ffffffffff , 00000 ) + +[38,19]: + int 1fffffffff80000 <- ( ffffffffff , 00000 ) + +[38,18]: + int 0fffffffffc0000 <- ( ffffffffff , 00000 ) + +[38,17]: + int 7ffffffffe0000 <- ( ffffffffff , 00000 ) + +[38,16]: + int 3fffffffff0000 <- ( ffffffffff , 0000 ) + +[38,15]: + int 1fffffffff8000 <- ( ffffffffff , 0000 ) + +[38,14]: + int 0fffffffffc000 <- ( ffffffffff , 0000 ) + +[38,13]: + int 7ffffffffe000 <- ( ffffffffff , 0000 ) + +[38,12]: + int 3fffffffff000 <- ( ffffffffff , 000 ) + +[38,11]: + int 1fffffffff800 <- ( ffffffffff , 000 ) + +[38,10]: + int 0fffffffffc00 <- ( ffffffffff , 000 ) + +[38,9]: + int 7ffffffffe00 <- ( ffffffffff , 000 ) + +[38,8]: + int 3fffffffff00 <- ( ffffffffff , 00 ) + +[38,7]: + int 1fffffffff80 <- ( ffffffffff , 00 ) + +[38,6]: + int 0fffffffffc0 <- ( ffffffffff , 00 ) + +[38,5]: + int 7ffffffffe0 <- ( ffffffffff , 00 ) + +[38,4]: + int 3fffffffff0 <- ( ffffffffff , 0 ) + +[38,3]: + int 1fffffffff8 <- ( ffffffffff , 0 ) + +[38,2]: + int 0fffffffffc <- ( ffffffffff , 0 ) + +[38,1]: + int 7ffffffffe <- ( ffffffffff , 0 ) + +[37,64]: + int 1fffffffff0000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[37,63]: + int 0fffffffff8000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[37,62]: + int 7ffffffffc000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[37,61]: + int 3ffffffffe000000000000000 <- ( ffffffffff , 0000000000000000 ) + +[37,60]: + int 1fffffffff000000000000000 <- ( ffffffffff , 000000000000000 ) + +[37,59]: + int 0fffffffff800000000000000 <- ( ffffffffff , 000000000000000 ) + +[37,58]: + int 7ffffffffc00000000000000 <- ( ffffffffff , 000000000000000 ) + +[37,57]: + int 3ffffffffe00000000000000 <- ( ffffffffff , 000000000000000 ) + +[37,56]: + int 1fffffffff00000000000000 <- ( ffffffffff , 00000000000000 ) + +[37,55]: + int 0fffffffff80000000000000 <- ( ffffffffff , 00000000000000 ) + +[37,54]: + int 7ffffffffc0000000000000 <- ( ffffffffff , 00000000000000 ) + +[37,53]: + int 3ffffffffe0000000000000 <- ( ffffffffff , 00000000000000 ) + +[37,52]: + int 1fffffffff0000000000000 <- ( ffffffffff , 0000000000000 ) + +[37,51]: + int 0fffffffff8000000000000 <- ( ffffffffff , 0000000000000 ) + +[37,50]: + int 7ffffffffc000000000000 <- ( ffffffffff , 0000000000000 ) + +[37,49]: + int 3ffffffffe000000000000 <- ( ffffffffff , 0000000000000 ) + +[37,48]: + int 1fffffffff000000000000 <- ( ffffffffff , 000000000000 ) + +[37,47]: + int 0fffffffff800000000000 <- ( ffffffffff , 000000000000 ) + +[37,46]: + int 7ffffffffc00000000000 <- ( ffffffffff , 000000000000 ) + +[37,45]: + int 3ffffffffe00000000000 <- ( ffffffffff , 000000000000 ) + +[37,44]: + int 1fffffffff00000000000 <- ( ffffffffff , 00000000000 ) + +[37,43]: + int 0fffffffff80000000000 <- ( ffffffffff , 00000000000 ) + +[37,42]: + int 7ffffffffc0000000000 <- ( ffffffffff , 00000000000 ) + +[37,41]: + int 3ffffffffe0000000000 <- ( ffffffffff , 00000000000 ) + +[37,40]: + int 1fffffffff0000000000 <- ( ffffffffff , 0000000000 ) + +[37,39]: + int 0fffffffff8000000000 <- ( ffffffffff , 0000000000 ) + +[37,38]: + int 7ffffffffc000000000 <- ( ffffffffff , 0000000000 ) + +[37,37]: + int 3ffffffffe000000000 <- ( ffffffffff , 0000000000 ) + +[37,36]: + int 1fffffffff000000000 <- ( ffffffffff , 000000000 ) + +[37,35]: + int 0fffffffff800000000 <- ( ffffffffff , 000000000 ) + +[37,34]: + int 7ffffffffc00000000 <- ( ffffffffff , 000000000 ) + +[37,33]: + int 3ffffffffe00000000 <- ( ffffffffff , 000000000 ) + +[37,32]: + int 1fffffffff00000000 <- ( ffffffffff , 00000000 ) + +[37,31]: + int 0fffffffff80000000 <- ( ffffffffff , 00000000 ) + +[37,30]: + int 7ffffffffc0000000 <- ( ffffffffff , 00000000 ) + +[37,29]: + int 3ffffffffe0000000 <- ( ffffffffff , 00000000 ) + +[37,28]: + int 1fffffffff0000000 <- ( ffffffffff , 0000000 ) + +[37,27]: + int 0fffffffff8000000 <- ( ffffffffff , 0000000 ) + +[37,26]: + int 7ffffffffc000000 <- ( ffffffffff , 0000000 ) + +[37,25]: + int 3ffffffffe000000 <- ( ffffffffff , 0000000 ) + +[37,24]: + int 1fffffffff000000 <- ( ffffffffff , 000000 ) + +[37,23]: + int 0fffffffff800000 <- ( ffffffffff , 000000 ) + +[37,22]: + int 7ffffffffc00000 <- ( ffffffffff , 000000 ) + +[37,21]: + int 3ffffffffe00000 <- ( ffffffffff , 000000 ) + +[37,20]: + int 1fffffffff00000 <- ( ffffffffff , 00000 ) + +[37,19]: + int 0fffffffff80000 <- ( ffffffffff , 00000 ) + +[37,18]: + int 7ffffffffc0000 <- ( ffffffffff , 00000 ) + +[37,17]: + int 3ffffffffe0000 <- ( ffffffffff , 00000 ) + +[37,16]: + int 1fffffffff0000 <- ( ffffffffff , 0000 ) + +[37,15]: + int 0fffffffff8000 <- ( ffffffffff , 0000 ) + +[37,14]: + int 7ffffffffc000 <- ( ffffffffff , 0000 ) + +[37,13]: + int 3ffffffffe000 <- ( ffffffffff , 0000 ) + +[37,12]: + int 1fffffffff000 <- ( ffffffffff , 000 ) + +[37,11]: + int 0fffffffff800 <- ( ffffffffff , 000 ) + +[37,10]: + int 7ffffffffc00 <- ( ffffffffff , 000 ) + +[37,9]: + int 3ffffffffe00 <- ( ffffffffff , 000 ) + +[37,8]: + int 1fffffffff00 <- ( ffffffffff , 00 ) + +[37,7]: + int 0fffffffff80 <- ( ffffffffff , 00 ) + +[37,6]: + int 7ffffffffc0 <- ( ffffffffff , 00 ) + +[37,5]: + int 3ffffffffe0 <- ( ffffffffff , 00 ) + +[37,4]: + int 1fffffffff0 <- ( ffffffffff , 0 ) + +[37,3]: + int 0fffffffff8 <- ( ffffffffff , 0 ) + +[37,2]: + int 7ffffffffc <- ( ffffffffff , 0 ) + +[37,1]: + int 3ffffffffe <- ( ffffffffff , 0 ) + +[36,64]: + int 0fffffffff0000000000000000 <- ( fffffffff , 0000000000000000 ) + +[36,63]: + int 7ffffffff8000000000000000 <- ( fffffffff , 0000000000000000 ) + +[36,62]: + int 3ffffffffc000000000000000 <- ( fffffffff , 0000000000000000 ) + +[36,61]: + int 1ffffffffe000000000000000 <- ( fffffffff , 0000000000000000 ) + +[36,60]: + int 0fffffffff000000000000000 <- ( fffffffff , 000000000000000 ) + +[36,59]: + int 7ffffffff800000000000000 <- ( fffffffff , 000000000000000 ) + +[36,58]: + int 3ffffffffc00000000000000 <- ( fffffffff , 000000000000000 ) + +[36,57]: + int 1ffffffffe00000000000000 <- ( fffffffff , 000000000000000 ) + +[36,56]: + int 0fffffffff00000000000000 <- ( fffffffff , 00000000000000 ) + +[36,55]: + int 7ffffffff80000000000000 <- ( fffffffff , 00000000000000 ) + +[36,54]: + int 3ffffffffc0000000000000 <- ( fffffffff , 00000000000000 ) + +[36,53]: + int 1ffffffffe0000000000000 <- ( fffffffff , 00000000000000 ) + +[36,52]: + int 0fffffffff0000000000000 <- ( fffffffff , 0000000000000 ) + +[36,51]: + int 7ffffffff8000000000000 <- ( fffffffff , 0000000000000 ) + +[36,50]: + int 3ffffffffc000000000000 <- ( fffffffff , 0000000000000 ) + +[36,49]: + int 1ffffffffe000000000000 <- ( fffffffff , 0000000000000 ) + +[36,48]: + int 0fffffffff000000000000 <- ( fffffffff , 000000000000 ) + +[36,47]: + int 7ffffffff800000000000 <- ( fffffffff , 000000000000 ) + +[36,46]: + int 3ffffffffc00000000000 <- ( fffffffff , 000000000000 ) + +[36,45]: + int 1ffffffffe00000000000 <- ( fffffffff , 000000000000 ) + +[36,44]: + int 0fffffffff00000000000 <- ( fffffffff , 00000000000 ) + +[36,43]: + int 7ffffffff80000000000 <- ( fffffffff , 00000000000 ) + +[36,42]: + int 3ffffffffc0000000000 <- ( fffffffff , 00000000000 ) + +[36,41]: + int 1ffffffffe0000000000 <- ( fffffffff , 00000000000 ) + +[36,40]: + int 0fffffffff0000000000 <- ( fffffffff , 0000000000 ) + +[36,39]: + int 7ffffffff8000000000 <- ( fffffffff , 0000000000 ) + +[36,38]: + int 3ffffffffc000000000 <- ( fffffffff , 0000000000 ) + +[36,37]: + int 1ffffffffe000000000 <- ( fffffffff , 0000000000 ) + +[36,36]: + int 0fffffffff000000000 <- ( fffffffff , 000000000 ) + +[36,35]: + int 7ffffffff800000000 <- ( fffffffff , 000000000 ) + +[36,34]: + int 3ffffffffc00000000 <- ( fffffffff , 000000000 ) + +[36,33]: + int 1ffffffffe00000000 <- ( fffffffff , 000000000 ) + +[36,32]: + int 0fffffffff00000000 <- ( fffffffff , 00000000 ) + +[36,31]: + int 7ffffffff80000000 <- ( fffffffff , 00000000 ) + +[36,30]: + int 3ffffffffc0000000 <- ( fffffffff , 00000000 ) + +[36,29]: + int 1ffffffffe0000000 <- ( fffffffff , 00000000 ) + +[36,28]: + int 0fffffffff0000000 <- ( fffffffff , 0000000 ) + +[36,27]: + int 7ffffffff8000000 <- ( fffffffff , 0000000 ) + +[36,26]: + int 3ffffffffc000000 <- ( fffffffff , 0000000 ) + +[36,25]: + int 1ffffffffe000000 <- ( fffffffff , 0000000 ) + +[36,24]: + int 0fffffffff000000 <- ( fffffffff , 000000 ) + +[36,23]: + int 7ffffffff800000 <- ( fffffffff , 000000 ) + +[36,22]: + int 3ffffffffc00000 <- ( fffffffff , 000000 ) + +[36,21]: + int 1ffffffffe00000 <- ( fffffffff , 000000 ) + +[36,20]: + int 0fffffffff00000 <- ( fffffffff , 00000 ) + +[36,19]: + int 7ffffffff80000 <- ( fffffffff , 00000 ) + +[36,18]: + int 3ffffffffc0000 <- ( fffffffff , 00000 ) + +[36,17]: + int 1ffffffffe0000 <- ( fffffffff , 00000 ) + +[36,16]: + int 0fffffffff0000 <- ( fffffffff , 0000 ) + +[36,15]: + int 7ffffffff8000 <- ( fffffffff , 0000 ) + +[36,14]: + int 3ffffffffc000 <- ( fffffffff , 0000 ) + +[36,13]: + int 1ffffffffe000 <- ( fffffffff , 0000 ) + +[36,12]: + int 0fffffffff000 <- ( fffffffff , 000 ) + +[36,11]: + int 7ffffffff800 <- ( fffffffff , 000 ) + +[36,10]: + int 3ffffffffc00 <- ( fffffffff , 000 ) + +[36,9]: + int 1ffffffffe00 <- ( fffffffff , 000 ) + +[36,8]: + int 0fffffffff00 <- ( fffffffff , 00 ) + +[36,7]: + int 7ffffffff80 <- ( fffffffff , 00 ) + +[36,6]: + int 3ffffffffc0 <- ( fffffffff , 00 ) + +[36,5]: + int 1ffffffffe0 <- ( fffffffff , 00 ) + +[36,4]: + int 0fffffffff0 <- ( fffffffff , 0 ) + +[36,3]: + int 7ffffffff8 <- ( fffffffff , 0 ) + +[36,2]: + int 3ffffffffc <- ( fffffffff , 0 ) + +[36,1]: + int 1ffffffffe <- ( fffffffff , 0 ) + +[35,64]: + int 7ffffffff0000000000000000 <- ( fffffffff , 0000000000000000 ) + +[35,63]: + int 3ffffffff8000000000000000 <- ( fffffffff , 0000000000000000 ) + +[35,62]: + int 1ffffffffc000000000000000 <- ( fffffffff , 0000000000000000 ) + +[35,61]: + int 0ffffffffe000000000000000 <- ( fffffffff , 0000000000000000 ) + +[35,60]: + int 7ffffffff000000000000000 <- ( fffffffff , 000000000000000 ) + +[35,59]: + int 3ffffffff800000000000000 <- ( fffffffff , 000000000000000 ) + +[35,58]: + int 1ffffffffc00000000000000 <- ( fffffffff , 000000000000000 ) + +[35,57]: + int 0ffffffffe00000000000000 <- ( fffffffff , 000000000000000 ) + +[35,56]: + int 7ffffffff00000000000000 <- ( fffffffff , 00000000000000 ) + +[35,55]: + int 3ffffffff80000000000000 <- ( fffffffff , 00000000000000 ) + +[35,54]: + int 1ffffffffc0000000000000 <- ( fffffffff , 00000000000000 ) + +[35,53]: + int 0ffffffffe0000000000000 <- ( fffffffff , 00000000000000 ) + +[35,52]: + int 7ffffffff0000000000000 <- ( fffffffff , 0000000000000 ) + +[35,51]: + int 3ffffffff8000000000000 <- ( fffffffff , 0000000000000 ) + +[35,50]: + int 1ffffffffc000000000000 <- ( fffffffff , 0000000000000 ) + +[35,49]: + int 0ffffffffe000000000000 <- ( fffffffff , 0000000000000 ) + +[35,48]: + int 7ffffffff000000000000 <- ( fffffffff , 000000000000 ) + +[35,47]: + int 3ffffffff800000000000 <- ( fffffffff , 000000000000 ) + +[35,46]: + int 1ffffffffc00000000000 <- ( fffffffff , 000000000000 ) + +[35,45]: + int 0ffffffffe00000000000 <- ( fffffffff , 000000000000 ) + +[35,44]: + int 7ffffffff00000000000 <- ( fffffffff , 00000000000 ) + +[35,43]: + int 3ffffffff80000000000 <- ( fffffffff , 00000000000 ) + +[35,42]: + int 1ffffffffc0000000000 <- ( fffffffff , 00000000000 ) + +[35,41]: + int 0ffffffffe0000000000 <- ( fffffffff , 00000000000 ) + +[35,40]: + int 7ffffffff0000000000 <- ( fffffffff , 0000000000 ) + +[35,39]: + int 3ffffffff8000000000 <- ( fffffffff , 0000000000 ) + +[35,38]: + int 1ffffffffc000000000 <- ( fffffffff , 0000000000 ) + +[35,37]: + int 0ffffffffe000000000 <- ( fffffffff , 0000000000 ) + +[35,36]: + int 7ffffffff000000000 <- ( fffffffff , 000000000 ) + +[35,35]: + int 3ffffffff800000000 <- ( fffffffff , 000000000 ) + +[35,34]: + int 1ffffffffc00000000 <- ( fffffffff , 000000000 ) + +[35,33]: + int 0ffffffffe00000000 <- ( fffffffff , 000000000 ) + +[35,32]: + int 7ffffffff00000000 <- ( fffffffff , 00000000 ) + +[35,31]: + int 3ffffffff80000000 <- ( fffffffff , 00000000 ) + +[35,30]: + int 1ffffffffc0000000 <- ( fffffffff , 00000000 ) + +[35,29]: + int 0ffffffffe0000000 <- ( fffffffff , 00000000 ) + +[35,28]: + int 7ffffffff0000000 <- ( fffffffff , 0000000 ) + +[35,27]: + int 3ffffffff8000000 <- ( fffffffff , 0000000 ) + +[35,26]: + int 1ffffffffc000000 <- ( fffffffff , 0000000 ) + +[35,25]: + int 0ffffffffe000000 <- ( fffffffff , 0000000 ) + +[35,24]: + int 7ffffffff000000 <- ( fffffffff , 000000 ) + +[35,23]: + int 3ffffffff800000 <- ( fffffffff , 000000 ) + +[35,22]: + int 1ffffffffc00000 <- ( fffffffff , 000000 ) + +[35,21]: + int 0ffffffffe00000 <- ( fffffffff , 000000 ) + +[35,20]: + int 7ffffffff00000 <- ( fffffffff , 00000 ) + +[35,19]: + int 3ffffffff80000 <- ( fffffffff , 00000 ) + +[35,18]: + int 1ffffffffc0000 <- ( fffffffff , 00000 ) + +[35,17]: + int 0ffffffffe0000 <- ( fffffffff , 00000 ) + +[35,16]: + int 7ffffffff0000 <- ( fffffffff , 0000 ) + +[35,15]: + int 3ffffffff8000 <- ( fffffffff , 0000 ) + +[35,14]: + int 1ffffffffc000 <- ( fffffffff , 0000 ) + +[35,13]: + int 0ffffffffe000 <- ( fffffffff , 0000 ) + +[35,12]: + int 7ffffffff000 <- ( fffffffff , 000 ) + +[35,11]: + int 3ffffffff800 <- ( fffffffff , 000 ) + +[35,10]: + int 1ffffffffc00 <- ( fffffffff , 000 ) + +[35,9]: + int 0ffffffffe00 <- ( fffffffff , 000 ) + +[35,8]: + int 7ffffffff00 <- ( fffffffff , 00 ) + +[35,7]: + int 3ffffffff80 <- ( fffffffff , 00 ) + +[35,6]: + int 1ffffffffc0 <- ( fffffffff , 00 ) + +[35,5]: + int 0ffffffffe0 <- ( fffffffff , 00 ) + +[35,4]: + int 7ffffffff0 <- ( fffffffff , 0 ) + +[35,3]: + int 3ffffffff8 <- ( fffffffff , 0 ) + +[35,2]: + int 1ffffffffc <- ( fffffffff , 0 ) + +[35,1]: + int 0ffffffffe <- ( fffffffff , 0 ) + +[34,64]: + int 3ffffffff0000000000000000 <- ( fffffffff , 0000000000000000 ) + +[34,63]: + int 1ffffffff8000000000000000 <- ( fffffffff , 0000000000000000 ) + +[34,62]: + int 0ffffffffc000000000000000 <- ( fffffffff , 0000000000000000 ) + +[34,61]: + int 7fffffffe000000000000000 <- ( fffffffff , 0000000000000000 ) + +[34,60]: + int 3ffffffff000000000000000 <- ( fffffffff , 000000000000000 ) + +[34,59]: + int 1ffffffff800000000000000 <- ( fffffffff , 000000000000000 ) + +[34,58]: + int 0ffffffffc00000000000000 <- ( fffffffff , 000000000000000 ) + +[34,57]: + int 7fffffffe00000000000000 <- ( fffffffff , 000000000000000 ) + +[34,56]: + int 3ffffffff00000000000000 <- ( fffffffff , 00000000000000 ) + +[34,55]: + int 1ffffffff80000000000000 <- ( fffffffff , 00000000000000 ) + +[34,54]: + int 0ffffffffc0000000000000 <- ( fffffffff , 00000000000000 ) + +[34,53]: + int 7fffffffe0000000000000 <- ( fffffffff , 00000000000000 ) + +[34,52]: + int 3ffffffff0000000000000 <- ( fffffffff , 0000000000000 ) + +[34,51]: + int 1ffffffff8000000000000 <- ( fffffffff , 0000000000000 ) + +[34,50]: + int 0ffffffffc000000000000 <- ( fffffffff , 0000000000000 ) + +[34,49]: + int 7fffffffe000000000000 <- ( fffffffff , 0000000000000 ) + +[34,48]: + int 3ffffffff000000000000 <- ( fffffffff , 000000000000 ) + +[34,47]: + int 1ffffffff800000000000 <- ( fffffffff , 000000000000 ) + +[34,46]: + int 0ffffffffc00000000000 <- ( fffffffff , 000000000000 ) + +[34,45]: + int 7fffffffe00000000000 <- ( fffffffff , 000000000000 ) + +[34,44]: + int 3ffffffff00000000000 <- ( fffffffff , 00000000000 ) + +[34,43]: + int 1ffffffff80000000000 <- ( fffffffff , 00000000000 ) + +[34,42]: + int 0ffffffffc0000000000 <- ( fffffffff , 00000000000 ) + +[34,41]: + int 7fffffffe0000000000 <- ( fffffffff , 00000000000 ) + +[34,40]: + int 3ffffffff0000000000 <- ( fffffffff , 0000000000 ) + +[34,39]: + int 1ffffffff8000000000 <- ( fffffffff , 0000000000 ) + +[34,38]: + int 0ffffffffc000000000 <- ( fffffffff , 0000000000 ) + +[34,37]: + int 7fffffffe000000000 <- ( fffffffff , 0000000000 ) + +[34,36]: + int 3ffffffff000000000 <- ( fffffffff , 000000000 ) + +[34,35]: + int 1ffffffff800000000 <- ( fffffffff , 000000000 ) + +[34,34]: + int 0ffffffffc00000000 <- ( fffffffff , 000000000 ) + +[34,33]: + int 7fffffffe00000000 <- ( fffffffff , 000000000 ) + +[34,32]: + int 3ffffffff00000000 <- ( fffffffff , 00000000 ) + +[34,31]: + int 1ffffffff80000000 <- ( fffffffff , 00000000 ) + +[34,30]: + int 0ffffffffc0000000 <- ( fffffffff , 00000000 ) + +[34,29]: + int 7fffffffe0000000 <- ( fffffffff , 00000000 ) + +[34,28]: + int 3ffffffff0000000 <- ( fffffffff , 0000000 ) + +[34,27]: + int 1ffffffff8000000 <- ( fffffffff , 0000000 ) + +[34,26]: + int 0ffffffffc000000 <- ( fffffffff , 0000000 ) + +[34,25]: + int 7fffffffe000000 <- ( fffffffff , 0000000 ) + +[34,24]: + int 3ffffffff000000 <- ( fffffffff , 000000 ) + +[34,23]: + int 1ffffffff800000 <- ( fffffffff , 000000 ) + +[34,22]: + int 0ffffffffc00000 <- ( fffffffff , 000000 ) + +[34,21]: + int 7fffffffe00000 <- ( fffffffff , 000000 ) + +[34,20]: + int 3ffffffff00000 <- ( fffffffff , 00000 ) + +[34,19]: + int 1ffffffff80000 <- ( fffffffff , 00000 ) + +[34,18]: + int 0ffffffffc0000 <- ( fffffffff , 00000 ) + +[34,17]: + int 7fffffffe0000 <- ( fffffffff , 00000 ) + +[34,16]: + int 3ffffffff0000 <- ( fffffffff , 0000 ) + +[34,15]: + int 1ffffffff8000 <- ( fffffffff , 0000 ) + +[34,14]: + int 0ffffffffc000 <- ( fffffffff , 0000 ) + +[34,13]: + int 7fffffffe000 <- ( fffffffff , 0000 ) + +[34,12]: + int 3ffffffff000 <- ( fffffffff , 000 ) + +[34,11]: + int 1ffffffff800 <- ( fffffffff , 000 ) + +[34,10]: + int 0ffffffffc00 <- ( fffffffff , 000 ) + +[34,9]: + int 7fffffffe00 <- ( fffffffff , 000 ) + +[34,8]: + int 3ffffffff00 <- ( fffffffff , 00 ) + +[34,7]: + int 1ffffffff80 <- ( fffffffff , 00 ) + +[34,6]: + int 0ffffffffc0 <- ( fffffffff , 00 ) + +[34,5]: + int 7fffffffe0 <- ( fffffffff , 00 ) + +[34,4]: + int 3ffffffff0 <- ( fffffffff , 0 ) + +[34,3]: + int 1ffffffff8 <- ( fffffffff , 0 ) + +[34,2]: + int 0ffffffffc <- ( fffffffff , 0 ) + +[34,1]: + int 7fffffffe <- ( fffffffff , 0 ) + +[33,64]: + int 1ffffffff0000000000000000 <- ( fffffffff , 0000000000000000 ) + +[33,63]: + int 0ffffffff8000000000000000 <- ( fffffffff , 0000000000000000 ) + +[33,62]: + int 7fffffffc000000000000000 <- ( fffffffff , 0000000000000000 ) + +[33,61]: + int 3fffffffe000000000000000 <- ( fffffffff , 0000000000000000 ) + +[33,60]: + int 1ffffffff000000000000000 <- ( fffffffff , 000000000000000 ) + +[33,59]: + int 0ffffffff800000000000000 <- ( fffffffff , 000000000000000 ) + +[33,58]: + int 7fffffffc00000000000000 <- ( fffffffff , 000000000000000 ) + +[33,57]: + int 3fffffffe00000000000000 <- ( fffffffff , 000000000000000 ) + +[33,56]: + int 1ffffffff00000000000000 <- ( fffffffff , 00000000000000 ) + +[33,55]: + int 0ffffffff80000000000000 <- ( fffffffff , 00000000000000 ) + +[33,54]: + int 7fffffffc0000000000000 <- ( fffffffff , 00000000000000 ) + +[33,53]: + int 3fffffffe0000000000000 <- ( fffffffff , 00000000000000 ) + +[33,52]: + int 1ffffffff0000000000000 <- ( fffffffff , 0000000000000 ) + +[33,51]: + int 0ffffffff8000000000000 <- ( fffffffff , 0000000000000 ) + +[33,50]: + int 7fffffffc000000000000 <- ( fffffffff , 0000000000000 ) + +[33,49]: + int 3fffffffe000000000000 <- ( fffffffff , 0000000000000 ) + +[33,48]: + int 1ffffffff000000000000 <- ( fffffffff , 000000000000 ) + +[33,47]: + int 0ffffffff800000000000 <- ( fffffffff , 000000000000 ) + +[33,46]: + int 7fffffffc00000000000 <- ( fffffffff , 000000000000 ) + +[33,45]: + int 3fffffffe00000000000 <- ( fffffffff , 000000000000 ) + +[33,44]: + int 1ffffffff00000000000 <- ( fffffffff , 00000000000 ) + +[33,43]: + int 0ffffffff80000000000 <- ( fffffffff , 00000000000 ) + +[33,42]: + int 7fffffffc0000000000 <- ( fffffffff , 00000000000 ) + +[33,41]: + int 3fffffffe0000000000 <- ( fffffffff , 00000000000 ) + +[33,40]: + int 1ffffffff0000000000 <- ( fffffffff , 0000000000 ) + +[33,39]: + int 0ffffffff8000000000 <- ( fffffffff , 0000000000 ) + +[33,38]: + int 7fffffffc000000000 <- ( fffffffff , 0000000000 ) + +[33,37]: + int 3fffffffe000000000 <- ( fffffffff , 0000000000 ) + +[33,36]: + int 1ffffffff000000000 <- ( fffffffff , 000000000 ) + +[33,35]: + int 0ffffffff800000000 <- ( fffffffff , 000000000 ) + +[33,34]: + int 7fffffffc00000000 <- ( fffffffff , 000000000 ) + +[33,33]: + int 3fffffffe00000000 <- ( fffffffff , 000000000 ) + +[33,32]: + int 1ffffffff00000000 <- ( fffffffff , 00000000 ) + +[33,31]: + int 0ffffffff80000000 <- ( fffffffff , 00000000 ) + +[33,30]: + int 7fffffffc0000000 <- ( fffffffff , 00000000 ) + +[33,29]: + int 3fffffffe0000000 <- ( fffffffff , 00000000 ) + +[33,28]: + int 1ffffffff0000000 <- ( fffffffff , 0000000 ) + +[33,27]: + int 0ffffffff8000000 <- ( fffffffff , 0000000 ) + +[33,26]: + int 7fffffffc000000 <- ( fffffffff , 0000000 ) + +[33,25]: + int 3fffffffe000000 <- ( fffffffff , 0000000 ) + +[33,24]: + int 1ffffffff000000 <- ( fffffffff , 000000 ) + +[33,23]: + int 0ffffffff800000 <- ( fffffffff , 000000 ) + +[33,22]: + int 7fffffffc00000 <- ( fffffffff , 000000 ) + +[33,21]: + int 3fffffffe00000 <- ( fffffffff , 000000 ) + +[33,20]: + int 1ffffffff00000 <- ( fffffffff , 00000 ) + +[33,19]: + int 0ffffffff80000 <- ( fffffffff , 00000 ) + +[33,18]: + int 7fffffffc0000 <- ( fffffffff , 00000 ) + +[33,17]: + int 3fffffffe0000 <- ( fffffffff , 00000 ) + +[33,16]: + int 1ffffffff0000 <- ( fffffffff , 0000 ) + +[33,15]: + int 0ffffffff8000 <- ( fffffffff , 0000 ) + +[33,14]: + int 7fffffffc000 <- ( fffffffff , 0000 ) + +[33,13]: + int 3fffffffe000 <- ( fffffffff , 0000 ) + +[33,12]: + int 1ffffffff000 <- ( fffffffff , 000 ) + +[33,11]: + int 0ffffffff800 <- ( fffffffff , 000 ) + +[33,10]: + int 7fffffffc00 <- ( fffffffff , 000 ) + +[33,9]: + int 3fffffffe00 <- ( fffffffff , 000 ) + +[33,8]: + int 1ffffffff00 <- ( fffffffff , 00 ) + +[33,7]: + int 0ffffffff80 <- ( fffffffff , 00 ) + +[33,6]: + int 7fffffffc0 <- ( fffffffff , 00 ) + +[33,5]: + int 3fffffffe0 <- ( fffffffff , 00 ) + +[33,4]: + int 1ffffffff0 <- ( fffffffff , 0 ) + +[33,3]: + int 0ffffffff8 <- ( fffffffff , 0 ) + +[33,2]: + int 7fffffffc <- ( fffffffff , 0 ) + +[33,1]: + int 3fffffffe <- ( fffffffff , 0 ) + +[32,64]: + int 0ffffffff0000000000000000 <- ( ffffffff , 0000000000000000 ) + +[32,63]: + int 7fffffff8000000000000000 <- ( ffffffff , 0000000000000000 ) + +[32,62]: + int 3fffffffc000000000000000 <- ( ffffffff , 0000000000000000 ) + +[32,61]: + int 1fffffffe000000000000000 <- ( ffffffff , 0000000000000000 ) + +[32,60]: + int 0ffffffff000000000000000 <- ( ffffffff , 000000000000000 ) + +[32,59]: + int 7fffffff800000000000000 <- ( ffffffff , 000000000000000 ) + +[32,58]: + int 3fffffffc00000000000000 <- ( ffffffff , 000000000000000 ) + +[32,57]: + int 1fffffffe00000000000000 <- ( ffffffff , 000000000000000 ) + +[32,56]: + int 0ffffffff00000000000000 <- ( ffffffff , 00000000000000 ) + +[32,55]: + int 7fffffff80000000000000 <- ( ffffffff , 00000000000000 ) + +[32,54]: + int 3fffffffc0000000000000 <- ( ffffffff , 00000000000000 ) + +[32,53]: + int 1fffffffe0000000000000 <- ( ffffffff , 00000000000000 ) + +[32,52]: + int 0ffffffff0000000000000 <- ( ffffffff , 0000000000000 ) + +[32,51]: + int 7fffffff8000000000000 <- ( ffffffff , 0000000000000 ) + +[32,50]: + int 3fffffffc000000000000 <- ( ffffffff , 0000000000000 ) + +[32,49]: + int 1fffffffe000000000000 <- ( ffffffff , 0000000000000 ) + +[32,48]: + int 0ffffffff000000000000 <- ( ffffffff , 000000000000 ) + +[32,47]: + int 7fffffff800000000000 <- ( ffffffff , 000000000000 ) + +[32,46]: + int 3fffffffc00000000000 <- ( ffffffff , 000000000000 ) + +[32,45]: + int 1fffffffe00000000000 <- ( ffffffff , 000000000000 ) + +[32,44]: + int 0ffffffff00000000000 <- ( ffffffff , 00000000000 ) + +[32,43]: + int 7fffffff80000000000 <- ( ffffffff , 00000000000 ) + +[32,42]: + int 3fffffffc0000000000 <- ( ffffffff , 00000000000 ) + +[32,41]: + int 1fffffffe0000000000 <- ( ffffffff , 00000000000 ) + +[32,40]: + int 0ffffffff0000000000 <- ( ffffffff , 0000000000 ) + +[32,39]: + int 7fffffff8000000000 <- ( ffffffff , 0000000000 ) + +[32,38]: + int 3fffffffc000000000 <- ( ffffffff , 0000000000 ) + +[32,37]: + int 1fffffffe000000000 <- ( ffffffff , 0000000000 ) + +[32,36]: + int 0ffffffff000000000 <- ( ffffffff , 000000000 ) + +[32,35]: + int 7fffffff800000000 <- ( ffffffff , 000000000 ) + +[32,34]: + int 3fffffffc00000000 <- ( ffffffff , 000000000 ) + +[32,33]: + int 1fffffffe00000000 <- ( ffffffff , 000000000 ) + +[32,32]: + int 0ffffffff00000000 <- ( ffffffff , 00000000 ) + +[32,31]: + int 7fffffff80000000 <- ( ffffffff , 00000000 ) + +[32,30]: + int 3fffffffc0000000 <- ( ffffffff , 00000000 ) + +[32,29]: + int 1fffffffe0000000 <- ( ffffffff , 00000000 ) + +[32,28]: + int 0ffffffff0000000 <- ( ffffffff , 0000000 ) + +[32,27]: + int 7fffffff8000000 <- ( ffffffff , 0000000 ) + +[32,26]: + int 3fffffffc000000 <- ( ffffffff , 0000000 ) + +[32,25]: + int 1fffffffe000000 <- ( ffffffff , 0000000 ) + +[32,24]: + int 0ffffffff000000 <- ( ffffffff , 000000 ) + +[32,23]: + int 7fffffff800000 <- ( ffffffff , 000000 ) + +[32,22]: + int 3fffffffc00000 <- ( ffffffff , 000000 ) + +[32,21]: + int 1fffffffe00000 <- ( ffffffff , 000000 ) + +[32,20]: + int 0ffffffff00000 <- ( ffffffff , 00000 ) + +[32,19]: + int 7fffffff80000 <- ( ffffffff , 00000 ) + +[32,18]: + int 3fffffffc0000 <- ( ffffffff , 00000 ) + +[32,17]: + int 1fffffffe0000 <- ( ffffffff , 00000 ) + +[32,16]: + int 0ffffffff0000 <- ( ffffffff , 0000 ) + +[32,15]: + int 7fffffff8000 <- ( ffffffff , 0000 ) + +[32,14]: + int 3fffffffc000 <- ( ffffffff , 0000 ) + +[32,13]: + int 1fffffffe000 <- ( ffffffff , 0000 ) + +[32,12]: + int 0ffffffff000 <- ( ffffffff , 000 ) + +[32,11]: + int 7fffffff800 <- ( ffffffff , 000 ) + +[32,10]: + int 3fffffffc00 <- ( ffffffff , 000 ) + +[32,9]: + int 1fffffffe00 <- ( ffffffff , 000 ) + +[32,8]: + int 0ffffffff00 <- ( ffffffff , 00 ) + +[32,7]: + int 7fffffff80 <- ( ffffffff , 00 ) + +[32,6]: + int 3fffffffc0 <- ( ffffffff , 00 ) + +[32,5]: + int 1fffffffe0 <- ( ffffffff , 00 ) + +[32,4]: + int 0ffffffff0 <- ( ffffffff , 0 ) + +[32,3]: + int 7fffffff8 <- ( ffffffff , 0 ) + +[32,2]: + int 3fffffffc <- ( ffffffff , 0 ) + +[32,1]: + int 1fffffffe <- ( ffffffff , 0 ) + +[31,64]: + int 7fffffff0000000000000000 <- ( ffffffff , 0000000000000000 ) + +[31,63]: + int 3fffffff8000000000000000 <- ( ffffffff , 0000000000000000 ) + +[31,62]: + int 1fffffffc000000000000000 <- ( ffffffff , 0000000000000000 ) + +[31,61]: + int 0fffffffe000000000000000 <- ( ffffffff , 0000000000000000 ) + +[31,60]: + int 7fffffff000000000000000 <- ( ffffffff , 000000000000000 ) + +[31,59]: + int 3fffffff800000000000000 <- ( ffffffff , 000000000000000 ) + +[31,58]: + int 1fffffffc00000000000000 <- ( ffffffff , 000000000000000 ) + +[31,57]: + int 0fffffffe00000000000000 <- ( ffffffff , 000000000000000 ) + +[31,56]: + int 7fffffff00000000000000 <- ( ffffffff , 00000000000000 ) + +[31,55]: + int 3fffffff80000000000000 <- ( ffffffff , 00000000000000 ) + +[31,54]: + int 1fffffffc0000000000000 <- ( ffffffff , 00000000000000 ) + +[31,53]: + int 0fffffffe0000000000000 <- ( ffffffff , 00000000000000 ) + +[31,52]: + int 7fffffff0000000000000 <- ( ffffffff , 0000000000000 ) + +[31,51]: + int 3fffffff8000000000000 <- ( ffffffff , 0000000000000 ) + +[31,50]: + int 1fffffffc000000000000 <- ( ffffffff , 0000000000000 ) + +[31,49]: + int 0fffffffe000000000000 <- ( ffffffff , 0000000000000 ) + +[31,48]: + int 7fffffff000000000000 <- ( ffffffff , 000000000000 ) + +[31,47]: + int 3fffffff800000000000 <- ( ffffffff , 000000000000 ) + +[31,46]: + int 1fffffffc00000000000 <- ( ffffffff , 000000000000 ) + +[31,45]: + int 0fffffffe00000000000 <- ( ffffffff , 000000000000 ) + +[31,44]: + int 7fffffff00000000000 <- ( ffffffff , 00000000000 ) + +[31,43]: + int 3fffffff80000000000 <- ( ffffffff , 00000000000 ) + +[31,42]: + int 1fffffffc0000000000 <- ( ffffffff , 00000000000 ) + +[31,41]: + int 0fffffffe0000000000 <- ( ffffffff , 00000000000 ) + +[31,40]: + int 7fffffff0000000000 <- ( ffffffff , 0000000000 ) + +[31,39]: + int 3fffffff8000000000 <- ( ffffffff , 0000000000 ) + +[31,38]: + int 1fffffffc000000000 <- ( ffffffff , 0000000000 ) + +[31,37]: + int 0fffffffe000000000 <- ( ffffffff , 0000000000 ) + +[31,36]: + int 7fffffff000000000 <- ( ffffffff , 000000000 ) + +[31,35]: + int 3fffffff800000000 <- ( ffffffff , 000000000 ) + +[31,34]: + int 1fffffffc00000000 <- ( ffffffff , 000000000 ) + +[31,33]: + int 0fffffffe00000000 <- ( ffffffff , 000000000 ) + +[31,32]: + int 7fffffff00000000 <- ( ffffffff , 00000000 ) + +[31,31]: + int 3fffffff80000000 <- ( ffffffff , 00000000 ) + +[31,30]: + int 1fffffffc0000000 <- ( ffffffff , 00000000 ) + +[31,29]: + int 0fffffffe0000000 <- ( ffffffff , 00000000 ) + +[31,28]: + int 7fffffff0000000 <- ( ffffffff , 0000000 ) + +[31,27]: + int 3fffffff8000000 <- ( ffffffff , 0000000 ) + +[31,26]: + int 1fffffffc000000 <- ( ffffffff , 0000000 ) + +[31,25]: + int 0fffffffe000000 <- ( ffffffff , 0000000 ) + +[31,24]: + int 7fffffff000000 <- ( ffffffff , 000000 ) + +[31,23]: + int 3fffffff800000 <- ( ffffffff , 000000 ) + +[31,22]: + int 1fffffffc00000 <- ( ffffffff , 000000 ) + +[31,21]: + int 0fffffffe00000 <- ( ffffffff , 000000 ) + +[31,20]: + int 7fffffff00000 <- ( ffffffff , 00000 ) + +[31,19]: + int 3fffffff80000 <- ( ffffffff , 00000 ) + +[31,18]: + int 1fffffffc0000 <- ( ffffffff , 00000 ) + +[31,17]: + int 0fffffffe0000 <- ( ffffffff , 00000 ) + +[31,16]: + int 7fffffff0000 <- ( ffffffff , 0000 ) + +[31,15]: + int 3fffffff8000 <- ( ffffffff , 0000 ) + +[31,14]: + int 1fffffffc000 <- ( ffffffff , 0000 ) + +[31,13]: + int 0fffffffe000 <- ( ffffffff , 0000 ) + +[31,12]: + int 7fffffff000 <- ( ffffffff , 000 ) + +[31,11]: + int 3fffffff800 <- ( ffffffff , 000 ) + +[31,10]: + int 1fffffffc00 <- ( ffffffff , 000 ) + +[31,9]: + int 0fffffffe00 <- ( ffffffff , 000 ) + +[31,8]: + int 7fffffff00 <- ( ffffffff , 00 ) + +[31,7]: + int 3fffffff80 <- ( ffffffff , 00 ) + +[31,6]: + int 1fffffffc0 <- ( ffffffff , 00 ) + +[31,5]: + int 0fffffffe0 <- ( ffffffff , 00 ) + +[31,4]: + int 7fffffff0 <- ( ffffffff , 0 ) + +[31,3]: + int 3fffffff8 <- ( ffffffff , 0 ) + +[31,2]: + int 1fffffffc <- ( ffffffff , 0 ) + +[31,1]: + int 0fffffffe <- ( ffffffff , 0 ) + +[30,64]: + int 3fffffff0000000000000000 <- ( ffffffff , 0000000000000000 ) + +[30,63]: + int 1fffffff8000000000000000 <- ( ffffffff , 0000000000000000 ) + +[30,62]: + int 0fffffffc000000000000000 <- ( ffffffff , 0000000000000000 ) + +[30,61]: + int 7ffffffe000000000000000 <- ( ffffffff , 0000000000000000 ) + +[30,60]: + int 3fffffff000000000000000 <- ( ffffffff , 000000000000000 ) + +[30,59]: + int 1fffffff800000000000000 <- ( ffffffff , 000000000000000 ) + +[30,58]: + int 0fffffffc00000000000000 <- ( ffffffff , 000000000000000 ) + +[30,57]: + int 7ffffffe00000000000000 <- ( ffffffff , 000000000000000 ) + +[30,56]: + int 3fffffff00000000000000 <- ( ffffffff , 00000000000000 ) + +[30,55]: + int 1fffffff80000000000000 <- ( ffffffff , 00000000000000 ) + +[30,54]: + int 0fffffffc0000000000000 <- ( ffffffff , 00000000000000 ) + +[30,53]: + int 7ffffffe0000000000000 <- ( ffffffff , 00000000000000 ) + +[30,52]: + int 3fffffff0000000000000 <- ( ffffffff , 0000000000000 ) + +[30,51]: + int 1fffffff8000000000000 <- ( ffffffff , 0000000000000 ) + +[30,50]: + int 0fffffffc000000000000 <- ( ffffffff , 0000000000000 ) + +[30,49]: + int 7ffffffe000000000000 <- ( ffffffff , 0000000000000 ) + +[30,48]: + int 3fffffff000000000000 <- ( ffffffff , 000000000000 ) + +[30,47]: + int 1fffffff800000000000 <- ( ffffffff , 000000000000 ) + +[30,46]: + int 0fffffffc00000000000 <- ( ffffffff , 000000000000 ) + +[30,45]: + int 7ffffffe00000000000 <- ( ffffffff , 000000000000 ) + +[30,44]: + int 3fffffff00000000000 <- ( ffffffff , 00000000000 ) + +[30,43]: + int 1fffffff80000000000 <- ( ffffffff , 00000000000 ) + +[30,42]: + int 0fffffffc0000000000 <- ( ffffffff , 00000000000 ) + +[30,41]: + int 7ffffffe0000000000 <- ( ffffffff , 00000000000 ) + +[30,40]: + int 3fffffff0000000000 <- ( ffffffff , 0000000000 ) + +[30,39]: + int 1fffffff8000000000 <- ( ffffffff , 0000000000 ) + +[30,38]: + int 0fffffffc000000000 <- ( ffffffff , 0000000000 ) + +[30,37]: + int 7ffffffe000000000 <- ( ffffffff , 0000000000 ) + +[30,36]: + int 3fffffff000000000 <- ( ffffffff , 000000000 ) + +[30,35]: + int 1fffffff800000000 <- ( ffffffff , 000000000 ) + +[30,34]: + int 0fffffffc00000000 <- ( ffffffff , 000000000 ) + +[30,33]: + int 7ffffffe00000000 <- ( ffffffff , 000000000 ) + +[30,32]: + int 3fffffff00000000 <- ( ffffffff , 00000000 ) + +[30,31]: + int 1fffffff80000000 <- ( ffffffff , 00000000 ) + +[30,30]: + int 0fffffffc0000000 <- ( ffffffff , 00000000 ) + +[30,29]: + int 7ffffffe0000000 <- ( ffffffff , 00000000 ) + +[30,28]: + int 3fffffff0000000 <- ( ffffffff , 0000000 ) + +[30,27]: + int 1fffffff8000000 <- ( ffffffff , 0000000 ) + +[30,26]: + int 0fffffffc000000 <- ( ffffffff , 0000000 ) + +[30,25]: + int 7ffffffe000000 <- ( ffffffff , 0000000 ) + +[30,24]: + int 3fffffff000000 <- ( ffffffff , 000000 ) + +[30,23]: + int 1fffffff800000 <- ( ffffffff , 000000 ) + +[30,22]: + int 0fffffffc00000 <- ( ffffffff , 000000 ) + +[30,21]: + int 7ffffffe00000 <- ( ffffffff , 000000 ) + +[30,20]: + int 3fffffff00000 <- ( ffffffff , 00000 ) + +[30,19]: + int 1fffffff80000 <- ( ffffffff , 00000 ) + +[30,18]: + int 0fffffffc0000 <- ( ffffffff , 00000 ) + +[30,17]: + int 7ffffffe0000 <- ( ffffffff , 00000 ) + +[30,16]: + int 3fffffff0000 <- ( ffffffff , 0000 ) + +[30,15]: + int 1fffffff8000 <- ( ffffffff , 0000 ) + +[30,14]: + int 0fffffffc000 <- ( ffffffff , 0000 ) + +[30,13]: + int 7ffffffe000 <- ( ffffffff , 0000 ) + +[30,12]: + int 3fffffff000 <- ( ffffffff , 000 ) + +[30,11]: + int 1fffffff800 <- ( ffffffff , 000 ) + +[30,10]: + int 0fffffffc00 <- ( ffffffff , 000 ) + +[30,9]: + int 7ffffffe00 <- ( ffffffff , 000 ) + +[30,8]: + int 3fffffff00 <- ( ffffffff , 00 ) + +[30,7]: + int 1fffffff80 <- ( ffffffff , 00 ) + +[30,6]: + int 0fffffffc0 <- ( ffffffff , 00 ) + +[30,5]: + int 7ffffffe0 <- ( ffffffff , 00 ) + +[30,4]: + int 3fffffff0 <- ( ffffffff , 0 ) + +[30,3]: + int 1fffffff8 <- ( ffffffff , 0 ) + +[30,2]: + int 0fffffffc <- ( ffffffff , 0 ) + +[30,1]: + int 7ffffffe <- ( ffffffff , 0 ) + +[29,64]: + int 1fffffff0000000000000000 <- ( ffffffff , 0000000000000000 ) + +[29,63]: + int 0fffffff8000000000000000 <- ( ffffffff , 0000000000000000 ) + +[29,62]: + int 7ffffffc000000000000000 <- ( ffffffff , 0000000000000000 ) + +[29,61]: + int 3ffffffe000000000000000 <- ( ffffffff , 0000000000000000 ) + +[29,60]: + int 1fffffff000000000000000 <- ( ffffffff , 000000000000000 ) + +[29,59]: + int 0fffffff800000000000000 <- ( ffffffff , 000000000000000 ) + +[29,58]: + int 7ffffffc00000000000000 <- ( ffffffff , 000000000000000 ) + +[29,57]: + int 3ffffffe00000000000000 <- ( ffffffff , 000000000000000 ) + +[29,56]: + int 1fffffff00000000000000 <- ( ffffffff , 00000000000000 ) + +[29,55]: + int 0fffffff80000000000000 <- ( ffffffff , 00000000000000 ) + +[29,54]: + int 7ffffffc0000000000000 <- ( ffffffff , 00000000000000 ) + +[29,53]: + int 3ffffffe0000000000000 <- ( ffffffff , 00000000000000 ) + +[29,52]: + int 1fffffff0000000000000 <- ( ffffffff , 0000000000000 ) + +[29,51]: + int 0fffffff8000000000000 <- ( ffffffff , 0000000000000 ) + +[29,50]: + int 7ffffffc000000000000 <- ( ffffffff , 0000000000000 ) + +[29,49]: + int 3ffffffe000000000000 <- ( ffffffff , 0000000000000 ) + +[29,48]: + int 1fffffff000000000000 <- ( ffffffff , 000000000000 ) + +[29,47]: + int 0fffffff800000000000 <- ( ffffffff , 000000000000 ) + +[29,46]: + int 7ffffffc00000000000 <- ( ffffffff , 000000000000 ) + +[29,45]: + int 3ffffffe00000000000 <- ( ffffffff , 000000000000 ) + +[29,44]: + int 1fffffff00000000000 <- ( ffffffff , 00000000000 ) + +[29,43]: + int 0fffffff80000000000 <- ( ffffffff , 00000000000 ) + +[29,42]: + int 7ffffffc0000000000 <- ( ffffffff , 00000000000 ) + +[29,41]: + int 3ffffffe0000000000 <- ( ffffffff , 00000000000 ) + +[29,40]: + int 1fffffff0000000000 <- ( ffffffff , 0000000000 ) + +[29,39]: + int 0fffffff8000000000 <- ( ffffffff , 0000000000 ) + +[29,38]: + int 7ffffffc000000000 <- ( ffffffff , 0000000000 ) + +[29,37]: + int 3ffffffe000000000 <- ( ffffffff , 0000000000 ) + +[29,36]: + int 1fffffff000000000 <- ( ffffffff , 000000000 ) + +[29,35]: + int 0fffffff800000000 <- ( ffffffff , 000000000 ) + +[29,34]: + int 7ffffffc00000000 <- ( ffffffff , 000000000 ) + +[29,33]: + int 3ffffffe00000000 <- ( ffffffff , 000000000 ) + +[29,32]: + int 1fffffff00000000 <- ( ffffffff , 00000000 ) + +[29,31]: + int 0fffffff80000000 <- ( ffffffff , 00000000 ) + +[29,30]: + int 7ffffffc0000000 <- ( ffffffff , 00000000 ) + +[29,29]: + int 3ffffffe0000000 <- ( ffffffff , 00000000 ) + +[29,28]: + int 1fffffff0000000 <- ( ffffffff , 0000000 ) + +[29,27]: + int 0fffffff8000000 <- ( ffffffff , 0000000 ) + +[29,26]: + int 7ffffffc000000 <- ( ffffffff , 0000000 ) + +[29,25]: + int 3ffffffe000000 <- ( ffffffff , 0000000 ) + +[29,24]: + int 1fffffff000000 <- ( ffffffff , 000000 ) + +[29,23]: + int 0fffffff800000 <- ( ffffffff , 000000 ) + +[29,22]: + int 7ffffffc00000 <- ( ffffffff , 000000 ) + +[29,21]: + int 3ffffffe00000 <- ( ffffffff , 000000 ) + +[29,20]: + int 1fffffff00000 <- ( ffffffff , 00000 ) + +[29,19]: + int 0fffffff80000 <- ( ffffffff , 00000 ) + +[29,18]: + int 7ffffffc0000 <- ( ffffffff , 00000 ) + +[29,17]: + int 3ffffffe0000 <- ( ffffffff , 00000 ) + +[29,16]: + int 1fffffff0000 <- ( ffffffff , 0000 ) + +[29,15]: + int 0fffffff8000 <- ( ffffffff , 0000 ) + +[29,14]: + int 7ffffffc000 <- ( ffffffff , 0000 ) + +[29,13]: + int 3ffffffe000 <- ( ffffffff , 0000 ) + +[29,12]: + int 1fffffff000 <- ( ffffffff , 000 ) + +[29,11]: + int 0fffffff800 <- ( ffffffff , 000 ) + +[29,10]: + int 7ffffffc00 <- ( ffffffff , 000 ) + +[29,9]: + int 3ffffffe00 <- ( ffffffff , 000 ) + +[29,8]: + int 1fffffff00 <- ( ffffffff , 00 ) + +[29,7]: + int 0fffffff80 <- ( ffffffff , 00 ) + +[29,6]: + int 7ffffffc0 <- ( ffffffff , 00 ) + +[29,5]: + int 3ffffffe0 <- ( ffffffff , 00 ) + +[29,4]: + int 1fffffff0 <- ( ffffffff , 0 ) + +[29,3]: + int 0fffffff8 <- ( ffffffff , 0 ) + +[29,2]: + int 7ffffffc <- ( ffffffff , 0 ) + +[29,1]: + int 3ffffffe <- ( ffffffff , 0 ) + +[28,64]: + int 0fffffff0000000000000000 <- ( fffffff , 0000000000000000 ) + +[28,63]: + int 7ffffff8000000000000000 <- ( fffffff , 0000000000000000 ) + +[28,62]: + int 3ffffffc000000000000000 <- ( fffffff , 0000000000000000 ) + +[28,61]: + int 1ffffffe000000000000000 <- ( fffffff , 0000000000000000 ) + +[28,60]: + int 0fffffff000000000000000 <- ( fffffff , 000000000000000 ) + +[28,59]: + int 7ffffff800000000000000 <- ( fffffff , 000000000000000 ) + +[28,58]: + int 3ffffffc00000000000000 <- ( fffffff , 000000000000000 ) + +[28,57]: + int 1ffffffe00000000000000 <- ( fffffff , 000000000000000 ) + +[28,56]: + int 0fffffff00000000000000 <- ( fffffff , 00000000000000 ) + +[28,55]: + int 7ffffff80000000000000 <- ( fffffff , 00000000000000 ) + +[28,54]: + int 3ffffffc0000000000000 <- ( fffffff , 00000000000000 ) + +[28,53]: + int 1ffffffe0000000000000 <- ( fffffff , 00000000000000 ) + +[28,52]: + int 0fffffff0000000000000 <- ( fffffff , 0000000000000 ) + +[28,51]: + int 7ffffff8000000000000 <- ( fffffff , 0000000000000 ) + +[28,50]: + int 3ffffffc000000000000 <- ( fffffff , 0000000000000 ) + +[28,49]: + int 1ffffffe000000000000 <- ( fffffff , 0000000000000 ) + +[28,48]: + int 0fffffff000000000000 <- ( fffffff , 000000000000 ) + +[28,47]: + int 7ffffff800000000000 <- ( fffffff , 000000000000 ) + +[28,46]: + int 3ffffffc00000000000 <- ( fffffff , 000000000000 ) + +[28,45]: + int 1ffffffe00000000000 <- ( fffffff , 000000000000 ) + +[28,44]: + int 0fffffff00000000000 <- ( fffffff , 00000000000 ) + +[28,43]: + int 7ffffff80000000000 <- ( fffffff , 00000000000 ) + +[28,42]: + int 3ffffffc0000000000 <- ( fffffff , 00000000000 ) + +[28,41]: + int 1ffffffe0000000000 <- ( fffffff , 00000000000 ) + +[28,40]: + int 0fffffff0000000000 <- ( fffffff , 0000000000 ) + +[28,39]: + int 7ffffff8000000000 <- ( fffffff , 0000000000 ) + +[28,38]: + int 3ffffffc000000000 <- ( fffffff , 0000000000 ) + +[28,37]: + int 1ffffffe000000000 <- ( fffffff , 0000000000 ) + +[28,36]: + int 0fffffff000000000 <- ( fffffff , 000000000 ) + +[28,35]: + int 7ffffff800000000 <- ( fffffff , 000000000 ) + +[28,34]: + int 3ffffffc00000000 <- ( fffffff , 000000000 ) + +[28,33]: + int 1ffffffe00000000 <- ( fffffff , 000000000 ) + +[28,32]: + int 0fffffff00000000 <- ( fffffff , 00000000 ) + +[28,31]: + int 7ffffff80000000 <- ( fffffff , 00000000 ) + +[28,30]: + int 3ffffffc0000000 <- ( fffffff , 00000000 ) + +[28,29]: + int 1ffffffe0000000 <- ( fffffff , 00000000 ) + +[28,28]: + int 0fffffff0000000 <- ( fffffff , 0000000 ) + +[28,27]: + int 7ffffff8000000 <- ( fffffff , 0000000 ) + +[28,26]: + int 3ffffffc000000 <- ( fffffff , 0000000 ) + +[28,25]: + int 1ffffffe000000 <- ( fffffff , 0000000 ) + +[28,24]: + int 0fffffff000000 <- ( fffffff , 000000 ) + +[28,23]: + int 7ffffff800000 <- ( fffffff , 000000 ) + +[28,22]: + int 3ffffffc00000 <- ( fffffff , 000000 ) + +[28,21]: + int 1ffffffe00000 <- ( fffffff , 000000 ) + +[28,20]: + int 0fffffff00000 <- ( fffffff , 00000 ) + +[28,19]: + int 7ffffff80000 <- ( fffffff , 00000 ) + +[28,18]: + int 3ffffffc0000 <- ( fffffff , 00000 ) + +[28,17]: + int 1ffffffe0000 <- ( fffffff , 00000 ) + +[28,16]: + int 0fffffff0000 <- ( fffffff , 0000 ) + +[28,15]: + int 7ffffff8000 <- ( fffffff , 0000 ) + +[28,14]: + int 3ffffffc000 <- ( fffffff , 0000 ) + +[28,13]: + int 1ffffffe000 <- ( fffffff , 0000 ) + +[28,12]: + int 0fffffff000 <- ( fffffff , 000 ) + +[28,11]: + int 7ffffff800 <- ( fffffff , 000 ) + +[28,10]: + int 3ffffffc00 <- ( fffffff , 000 ) + +[28,9]: + int 1ffffffe00 <- ( fffffff , 000 ) + +[28,8]: + int 0fffffff00 <- ( fffffff , 00 ) + +[28,7]: + int 7ffffff80 <- ( fffffff , 00 ) + +[28,6]: + int 3ffffffc0 <- ( fffffff , 00 ) + +[28,5]: + int 1ffffffe0 <- ( fffffff , 00 ) + +[28,4]: + int 0fffffff0 <- ( fffffff , 0 ) + +[28,3]: + int 7ffffff8 <- ( fffffff , 0 ) + +[28,2]: + int 3ffffffc <- ( fffffff , 0 ) + +[28,1]: + int 1ffffffe <- ( fffffff , 0 ) + +[27,64]: + int 7ffffff0000000000000000 <- ( fffffff , 0000000000000000 ) + +[27,63]: + int 3ffffff8000000000000000 <- ( fffffff , 0000000000000000 ) + +[27,62]: + int 1ffffffc000000000000000 <- ( fffffff , 0000000000000000 ) + +[27,61]: + int 0ffffffe000000000000000 <- ( fffffff , 0000000000000000 ) + +[27,60]: + int 7ffffff000000000000000 <- ( fffffff , 000000000000000 ) + +[27,59]: + int 3ffffff800000000000000 <- ( fffffff , 000000000000000 ) + +[27,58]: + int 1ffffffc00000000000000 <- ( fffffff , 000000000000000 ) + +[27,57]: + int 0ffffffe00000000000000 <- ( fffffff , 000000000000000 ) + +[27,56]: + int 7ffffff00000000000000 <- ( fffffff , 00000000000000 ) + +[27,55]: + int 3ffffff80000000000000 <- ( fffffff , 00000000000000 ) + +[27,54]: + int 1ffffffc0000000000000 <- ( fffffff , 00000000000000 ) + +[27,53]: + int 0ffffffe0000000000000 <- ( fffffff , 00000000000000 ) + +[27,52]: + int 7ffffff0000000000000 <- ( fffffff , 0000000000000 ) + +[27,51]: + int 3ffffff8000000000000 <- ( fffffff , 0000000000000 ) + +[27,50]: + int 1ffffffc000000000000 <- ( fffffff , 0000000000000 ) + +[27,49]: + int 0ffffffe000000000000 <- ( fffffff , 0000000000000 ) + +[27,48]: + int 7ffffff000000000000 <- ( fffffff , 000000000000 ) + +[27,47]: + int 3ffffff800000000000 <- ( fffffff , 000000000000 ) + +[27,46]: + int 1ffffffc00000000000 <- ( fffffff , 000000000000 ) + +[27,45]: + int 0ffffffe00000000000 <- ( fffffff , 000000000000 ) + +[27,44]: + int 7ffffff00000000000 <- ( fffffff , 00000000000 ) + +[27,43]: + int 3ffffff80000000000 <- ( fffffff , 00000000000 ) + +[27,42]: + int 1ffffffc0000000000 <- ( fffffff , 00000000000 ) + +[27,41]: + int 0ffffffe0000000000 <- ( fffffff , 00000000000 ) + +[27,40]: + int 7ffffff0000000000 <- ( fffffff , 0000000000 ) + +[27,39]: + int 3ffffff8000000000 <- ( fffffff , 0000000000 ) + +[27,38]: + int 1ffffffc000000000 <- ( fffffff , 0000000000 ) + +[27,37]: + int 0ffffffe000000000 <- ( fffffff , 0000000000 ) + +[27,36]: + int 7ffffff000000000 <- ( fffffff , 000000000 ) + +[27,35]: + int 3ffffff800000000 <- ( fffffff , 000000000 ) + +[27,34]: + int 1ffffffc00000000 <- ( fffffff , 000000000 ) + +[27,33]: + int 0ffffffe00000000 <- ( fffffff , 000000000 ) + +[27,32]: + int 7ffffff00000000 <- ( fffffff , 00000000 ) + +[27,31]: + int 3ffffff80000000 <- ( fffffff , 00000000 ) + +[27,30]: + int 1ffffffc0000000 <- ( fffffff , 00000000 ) + +[27,29]: + int 0ffffffe0000000 <- ( fffffff , 00000000 ) + +[27,28]: + int 7ffffff0000000 <- ( fffffff , 0000000 ) + +[27,27]: + int 3ffffff8000000 <- ( fffffff , 0000000 ) + +[27,26]: + int 1ffffffc000000 <- ( fffffff , 0000000 ) + +[27,25]: + int 0ffffffe000000 <- ( fffffff , 0000000 ) + +[27,24]: + int 7ffffff000000 <- ( fffffff , 000000 ) + +[27,23]: + int 3ffffff800000 <- ( fffffff , 000000 ) + +[27,22]: + int 1ffffffc00000 <- ( fffffff , 000000 ) + +[27,21]: + int 0ffffffe00000 <- ( fffffff , 000000 ) + +[27,20]: + int 7ffffff00000 <- ( fffffff , 00000 ) + +[27,19]: + int 3ffffff80000 <- ( fffffff , 00000 ) + +[27,18]: + int 1ffffffc0000 <- ( fffffff , 00000 ) + +[27,17]: + int 0ffffffe0000 <- ( fffffff , 00000 ) + +[27,16]: + int 7ffffff0000 <- ( fffffff , 0000 ) + +[27,15]: + int 3ffffff8000 <- ( fffffff , 0000 ) + +[27,14]: + int 1ffffffc000 <- ( fffffff , 0000 ) + +[27,13]: + int 0ffffffe000 <- ( fffffff , 0000 ) + +[27,12]: + int 7ffffff000 <- ( fffffff , 000 ) + +[27,11]: + int 3ffffff800 <- ( fffffff , 000 ) + +[27,10]: + int 1ffffffc00 <- ( fffffff , 000 ) + +[27,9]: + int 0ffffffe00 <- ( fffffff , 000 ) + +[27,8]: + int 7ffffff00 <- ( fffffff , 00 ) + +[27,7]: + int 3ffffff80 <- ( fffffff , 00 ) + +[27,6]: + int 1ffffffc0 <- ( fffffff , 00 ) + +[27,5]: + int 0ffffffe0 <- ( fffffff , 00 ) + +[27,4]: + int 7ffffff0 <- ( fffffff , 0 ) + +[27,3]: + int 3ffffff8 <- ( fffffff , 0 ) + +[27,2]: + int 1ffffffc <- ( fffffff , 0 ) + +[27,1]: + int 0ffffffe <- ( fffffff , 0 ) + +[26,64]: + int 3ffffff0000000000000000 <- ( fffffff , 0000000000000000 ) + +[26,63]: + int 1ffffff8000000000000000 <- ( fffffff , 0000000000000000 ) + +[26,62]: + int 0ffffffc000000000000000 <- ( fffffff , 0000000000000000 ) + +[26,61]: + int 7fffffe000000000000000 <- ( fffffff , 0000000000000000 ) + +[26,60]: + int 3ffffff000000000000000 <- ( fffffff , 000000000000000 ) + +[26,59]: + int 1ffffff800000000000000 <- ( fffffff , 000000000000000 ) + +[26,58]: + int 0ffffffc00000000000000 <- ( fffffff , 000000000000000 ) + +[26,57]: + int 7fffffe00000000000000 <- ( fffffff , 000000000000000 ) + +[26,56]: + int 3ffffff00000000000000 <- ( fffffff , 00000000000000 ) + +[26,55]: + int 1ffffff80000000000000 <- ( fffffff , 00000000000000 ) + +[26,54]: + int 0ffffffc0000000000000 <- ( fffffff , 00000000000000 ) + +[26,53]: + int 7fffffe0000000000000 <- ( fffffff , 00000000000000 ) + +[26,52]: + int 3ffffff0000000000000 <- ( fffffff , 0000000000000 ) + +[26,51]: + int 1ffffff8000000000000 <- ( fffffff , 0000000000000 ) + +[26,50]: + int 0ffffffc000000000000 <- ( fffffff , 0000000000000 ) + +[26,49]: + int 7fffffe000000000000 <- ( fffffff , 0000000000000 ) + +[26,48]: + int 3ffffff000000000000 <- ( fffffff , 000000000000 ) + +[26,47]: + int 1ffffff800000000000 <- ( fffffff , 000000000000 ) + +[26,46]: + int 0ffffffc00000000000 <- ( fffffff , 000000000000 ) + +[26,45]: + int 7fffffe00000000000 <- ( fffffff , 000000000000 ) + +[26,44]: + int 3ffffff00000000000 <- ( fffffff , 00000000000 ) + +[26,43]: + int 1ffffff80000000000 <- ( fffffff , 00000000000 ) + +[26,42]: + int 0ffffffc0000000000 <- ( fffffff , 00000000000 ) + +[26,41]: + int 7fffffe0000000000 <- ( fffffff , 00000000000 ) + +[26,40]: + int 3ffffff0000000000 <- ( fffffff , 0000000000 ) + +[26,39]: + int 1ffffff8000000000 <- ( fffffff , 0000000000 ) + +[26,38]: + int 0ffffffc000000000 <- ( fffffff , 0000000000 ) + +[26,37]: + int 7fffffe000000000 <- ( fffffff , 0000000000 ) + +[26,36]: + int 3ffffff000000000 <- ( fffffff , 000000000 ) + +[26,35]: + int 1ffffff800000000 <- ( fffffff , 000000000 ) + +[26,34]: + int 0ffffffc00000000 <- ( fffffff , 000000000 ) + +[26,33]: + int 7fffffe00000000 <- ( fffffff , 000000000 ) + +[26,32]: + int 3ffffff00000000 <- ( fffffff , 00000000 ) + +[26,31]: + int 1ffffff80000000 <- ( fffffff , 00000000 ) + +[26,30]: + int 0ffffffc0000000 <- ( fffffff , 00000000 ) + +[26,29]: + int 7fffffe0000000 <- ( fffffff , 00000000 ) + +[26,28]: + int 3ffffff0000000 <- ( fffffff , 0000000 ) + +[26,27]: + int 1ffffff8000000 <- ( fffffff , 0000000 ) + +[26,26]: + int 0ffffffc000000 <- ( fffffff , 0000000 ) + +[26,25]: + int 7fffffe000000 <- ( fffffff , 0000000 ) + +[26,24]: + int 3ffffff000000 <- ( fffffff , 000000 ) + +[26,23]: + int 1ffffff800000 <- ( fffffff , 000000 ) + +[26,22]: + int 0ffffffc00000 <- ( fffffff , 000000 ) + +[26,21]: + int 7fffffe00000 <- ( fffffff , 000000 ) + +[26,20]: + int 3ffffff00000 <- ( fffffff , 00000 ) + +[26,19]: + int 1ffffff80000 <- ( fffffff , 00000 ) + +[26,18]: + int 0ffffffc0000 <- ( fffffff , 00000 ) + +[26,17]: + int 7fffffe0000 <- ( fffffff , 00000 ) + +[26,16]: + int 3ffffff0000 <- ( fffffff , 0000 ) + +[26,15]: + int 1ffffff8000 <- ( fffffff , 0000 ) + +[26,14]: + int 0ffffffc000 <- ( fffffff , 0000 ) + +[26,13]: + int 7fffffe000 <- ( fffffff , 0000 ) + +[26,12]: + int 3ffffff000 <- ( fffffff , 000 ) + +[26,11]: + int 1ffffff800 <- ( fffffff , 000 ) + +[26,10]: + int 0ffffffc00 <- ( fffffff , 000 ) + +[26,9]: + int 7fffffe00 <- ( fffffff , 000 ) + +[26,8]: + int 3ffffff00 <- ( fffffff , 00 ) + +[26,7]: + int 1ffffff80 <- ( fffffff , 00 ) + +[26,6]: + int 0ffffffc0 <- ( fffffff , 00 ) + +[26,5]: + int 7fffffe0 <- ( fffffff , 00 ) + +[26,4]: + int 3ffffff0 <- ( fffffff , 0 ) + +[26,3]: + int 1ffffff8 <- ( fffffff , 0 ) + +[26,2]: + int 0ffffffc <- ( fffffff , 0 ) + +[26,1]: + int 7fffffe <- ( fffffff , 0 ) + +[25,64]: + int 1ffffff0000000000000000 <- ( fffffff , 0000000000000000 ) + +[25,63]: + int 0ffffff8000000000000000 <- ( fffffff , 0000000000000000 ) + +[25,62]: + int 7fffffc000000000000000 <- ( fffffff , 0000000000000000 ) + +[25,61]: + int 3fffffe000000000000000 <- ( fffffff , 0000000000000000 ) + +[25,60]: + int 1ffffff000000000000000 <- ( fffffff , 000000000000000 ) + +[25,59]: + int 0ffffff800000000000000 <- ( fffffff , 000000000000000 ) + +[25,58]: + int 7fffffc00000000000000 <- ( fffffff , 000000000000000 ) + +[25,57]: + int 3fffffe00000000000000 <- ( fffffff , 000000000000000 ) + +[25,56]: + int 1ffffff00000000000000 <- ( fffffff , 00000000000000 ) + +[25,55]: + int 0ffffff80000000000000 <- ( fffffff , 00000000000000 ) + +[25,54]: + int 7fffffc0000000000000 <- ( fffffff , 00000000000000 ) + +[25,53]: + int 3fffffe0000000000000 <- ( fffffff , 00000000000000 ) + +[25,52]: + int 1ffffff0000000000000 <- ( fffffff , 0000000000000 ) + +[25,51]: + int 0ffffff8000000000000 <- ( fffffff , 0000000000000 ) + +[25,50]: + int 7fffffc000000000000 <- ( fffffff , 0000000000000 ) + +[25,49]: + int 3fffffe000000000000 <- ( fffffff , 0000000000000 ) + +[25,48]: + int 1ffffff000000000000 <- ( fffffff , 000000000000 ) + +[25,47]: + int 0ffffff800000000000 <- ( fffffff , 000000000000 ) + +[25,46]: + int 7fffffc00000000000 <- ( fffffff , 000000000000 ) + +[25,45]: + int 3fffffe00000000000 <- ( fffffff , 000000000000 ) + +[25,44]: + int 1ffffff00000000000 <- ( fffffff , 00000000000 ) + +[25,43]: + int 0ffffff80000000000 <- ( fffffff , 00000000000 ) + +[25,42]: + int 7fffffc0000000000 <- ( fffffff , 00000000000 ) + +[25,41]: + int 3fffffe0000000000 <- ( fffffff , 00000000000 ) + +[25,40]: + int 1ffffff0000000000 <- ( fffffff , 0000000000 ) + +[25,39]: + int 0ffffff8000000000 <- ( fffffff , 0000000000 ) + +[25,38]: + int 7fffffc000000000 <- ( fffffff , 0000000000 ) + +[25,37]: + int 3fffffe000000000 <- ( fffffff , 0000000000 ) + +[25,36]: + int 1ffffff000000000 <- ( fffffff , 000000000 ) + +[25,35]: + int 0ffffff800000000 <- ( fffffff , 000000000 ) + +[25,34]: + int 7fffffc00000000 <- ( fffffff , 000000000 ) + +[25,33]: + int 3fffffe00000000 <- ( fffffff , 000000000 ) + +[25,32]: + int 1ffffff00000000 <- ( fffffff , 00000000 ) + +[25,31]: + int 0ffffff80000000 <- ( fffffff , 00000000 ) + +[25,30]: + int 7fffffc0000000 <- ( fffffff , 00000000 ) + +[25,29]: + int 3fffffe0000000 <- ( fffffff , 00000000 ) + +[25,28]: + int 1ffffff0000000 <- ( fffffff , 0000000 ) + +[25,27]: + int 0ffffff8000000 <- ( fffffff , 0000000 ) + +[25,26]: + int 7fffffc000000 <- ( fffffff , 0000000 ) + +[25,25]: + int 3fffffe000000 <- ( fffffff , 0000000 ) + +[25,24]: + int 1ffffff000000 <- ( fffffff , 000000 ) + +[25,23]: + int 0ffffff800000 <- ( fffffff , 000000 ) + +[25,22]: + int 7fffffc00000 <- ( fffffff , 000000 ) + +[25,21]: + int 3fffffe00000 <- ( fffffff , 000000 ) + +[25,20]: + int 1ffffff00000 <- ( fffffff , 00000 ) + +[25,19]: + int 0ffffff80000 <- ( fffffff , 00000 ) + +[25,18]: + int 7fffffc0000 <- ( fffffff , 00000 ) + +[25,17]: + int 3fffffe0000 <- ( fffffff , 00000 ) + +[25,16]: + int 1ffffff0000 <- ( fffffff , 0000 ) + +[25,15]: + int 0ffffff8000 <- ( fffffff , 0000 ) + +[25,14]: + int 7fffffc000 <- ( fffffff , 0000 ) + +[25,13]: + int 3fffffe000 <- ( fffffff , 0000 ) + +[25,12]: + int 1ffffff000 <- ( fffffff , 000 ) + +[25,11]: + int 0ffffff800 <- ( fffffff , 000 ) + +[25,10]: + int 7fffffc00 <- ( fffffff , 000 ) + +[25,9]: + int 3fffffe00 <- ( fffffff , 000 ) + +[25,8]: + int 1ffffff00 <- ( fffffff , 00 ) + +[25,7]: + int 0ffffff80 <- ( fffffff , 00 ) + +[25,6]: + int 7fffffc0 <- ( fffffff , 00 ) + +[25,5]: + int 3fffffe0 <- ( fffffff , 00 ) + +[25,4]: + int 1ffffff0 <- ( fffffff , 0 ) + +[25,3]: + int 0ffffff8 <- ( fffffff , 0 ) + +[25,2]: + int 7fffffc <- ( fffffff , 0 ) + +[25,1]: + int 3fffffe <- ( fffffff , 0 ) + +[24,64]: + int 0ffffff0000000000000000 <- ( ffffff , 0000000000000000 ) + +[24,63]: + int 7fffff8000000000000000 <- ( ffffff , 0000000000000000 ) + +[24,62]: + int 3fffffc000000000000000 <- ( ffffff , 0000000000000000 ) + +[24,61]: + int 1fffffe000000000000000 <- ( ffffff , 0000000000000000 ) + +[24,60]: + int 0ffffff000000000000000 <- ( ffffff , 000000000000000 ) + +[24,59]: + int 7fffff800000000000000 <- ( ffffff , 000000000000000 ) + +[24,58]: + int 3fffffc00000000000000 <- ( ffffff , 000000000000000 ) + +[24,57]: + int 1fffffe00000000000000 <- ( ffffff , 000000000000000 ) + +[24,56]: + int 0ffffff00000000000000 <- ( ffffff , 00000000000000 ) + +[24,55]: + int 7fffff80000000000000 <- ( ffffff , 00000000000000 ) + +[24,54]: + int 3fffffc0000000000000 <- ( ffffff , 00000000000000 ) + +[24,53]: + int 1fffffe0000000000000 <- ( ffffff , 00000000000000 ) + +[24,52]: + int 0ffffff0000000000000 <- ( ffffff , 0000000000000 ) + +[24,51]: + int 7fffff8000000000000 <- ( ffffff , 0000000000000 ) + +[24,50]: + int 3fffffc000000000000 <- ( ffffff , 0000000000000 ) + +[24,49]: + int 1fffffe000000000000 <- ( ffffff , 0000000000000 ) + +[24,48]: + int 0ffffff000000000000 <- ( ffffff , 000000000000 ) + +[24,47]: + int 7fffff800000000000 <- ( ffffff , 000000000000 ) + +[24,46]: + int 3fffffc00000000000 <- ( ffffff , 000000000000 ) + +[24,45]: + int 1fffffe00000000000 <- ( ffffff , 000000000000 ) + +[24,44]: + int 0ffffff00000000000 <- ( ffffff , 00000000000 ) + +[24,43]: + int 7fffff80000000000 <- ( ffffff , 00000000000 ) + +[24,42]: + int 3fffffc0000000000 <- ( ffffff , 00000000000 ) + +[24,41]: + int 1fffffe0000000000 <- ( ffffff , 00000000000 ) + +[24,40]: + int 0ffffff0000000000 <- ( ffffff , 0000000000 ) + +[24,39]: + int 7fffff8000000000 <- ( ffffff , 0000000000 ) + +[24,38]: + int 3fffffc000000000 <- ( ffffff , 0000000000 ) + +[24,37]: + int 1fffffe000000000 <- ( ffffff , 0000000000 ) + +[24,36]: + int 0ffffff000000000 <- ( ffffff , 000000000 ) + +[24,35]: + int 7fffff800000000 <- ( ffffff , 000000000 ) + +[24,34]: + int 3fffffc00000000 <- ( ffffff , 000000000 ) + +[24,33]: + int 1fffffe00000000 <- ( ffffff , 000000000 ) + +[24,32]: + int 0ffffff00000000 <- ( ffffff , 00000000 ) + +[24,31]: + int 7fffff80000000 <- ( ffffff , 00000000 ) + +[24,30]: + int 3fffffc0000000 <- ( ffffff , 00000000 ) + +[24,29]: + int 1fffffe0000000 <- ( ffffff , 00000000 ) + +[24,28]: + int 0ffffff0000000 <- ( ffffff , 0000000 ) + +[24,27]: + int 7fffff8000000 <- ( ffffff , 0000000 ) + +[24,26]: + int 3fffffc000000 <- ( ffffff , 0000000 ) + +[24,25]: + int 1fffffe000000 <- ( ffffff , 0000000 ) + +[24,24]: + int 0ffffff000000 <- ( ffffff , 000000 ) + +[24,23]: + int 7fffff800000 <- ( ffffff , 000000 ) + +[24,22]: + int 3fffffc00000 <- ( ffffff , 000000 ) + +[24,21]: + int 1fffffe00000 <- ( ffffff , 000000 ) + +[24,20]: + int 0ffffff00000 <- ( ffffff , 00000 ) + +[24,19]: + int 7fffff80000 <- ( ffffff , 00000 ) + +[24,18]: + int 3fffffc0000 <- ( ffffff , 00000 ) + +[24,17]: + int 1fffffe0000 <- ( ffffff , 00000 ) + +[24,16]: + int 0ffffff0000 <- ( ffffff , 0000 ) + +[24,15]: + int 7fffff8000 <- ( ffffff , 0000 ) + +[24,14]: + int 3fffffc000 <- ( ffffff , 0000 ) + +[24,13]: + int 1fffffe000 <- ( ffffff , 0000 ) + +[24,12]: + int 0ffffff000 <- ( ffffff , 000 ) + +[24,11]: + int 7fffff800 <- ( ffffff , 000 ) + +[24,10]: + int 3fffffc00 <- ( ffffff , 000 ) + +[24,9]: + int 1fffffe00 <- ( ffffff , 000 ) + +[24,8]: + int 0ffffff00 <- ( ffffff , 00 ) + +[24,7]: + int 7fffff80 <- ( ffffff , 00 ) + +[24,6]: + int 3fffffc0 <- ( ffffff , 00 ) + +[24,5]: + int 1fffffe0 <- ( ffffff , 00 ) + +[24,4]: + int 0ffffff0 <- ( ffffff , 0 ) + +[24,3]: + int 7fffff8 <- ( ffffff , 0 ) + +[24,2]: + int 3fffffc <- ( ffffff , 0 ) + +[24,1]: + int 1fffffe <- ( ffffff , 0 ) + +[23,64]: + int 7fffff0000000000000000 <- ( ffffff , 0000000000000000 ) + +[23,63]: + int 3fffff8000000000000000 <- ( ffffff , 0000000000000000 ) + +[23,62]: + int 1fffffc000000000000000 <- ( ffffff , 0000000000000000 ) + +[23,61]: + int 0fffffe000000000000000 <- ( ffffff , 0000000000000000 ) + +[23,60]: + int 7fffff000000000000000 <- ( ffffff , 000000000000000 ) + +[23,59]: + int 3fffff800000000000000 <- ( ffffff , 000000000000000 ) + +[23,58]: + int 1fffffc00000000000000 <- ( ffffff , 000000000000000 ) + +[23,57]: + int 0fffffe00000000000000 <- ( ffffff , 000000000000000 ) + +[23,56]: + int 7fffff00000000000000 <- ( ffffff , 00000000000000 ) + +[23,55]: + int 3fffff80000000000000 <- ( ffffff , 00000000000000 ) + +[23,54]: + int 1fffffc0000000000000 <- ( ffffff , 00000000000000 ) + +[23,53]: + int 0fffffe0000000000000 <- ( ffffff , 00000000000000 ) + +[23,52]: + int 7fffff0000000000000 <- ( ffffff , 0000000000000 ) + +[23,51]: + int 3fffff8000000000000 <- ( ffffff , 0000000000000 ) + +[23,50]: + int 1fffffc000000000000 <- ( ffffff , 0000000000000 ) + +[23,49]: + int 0fffffe000000000000 <- ( ffffff , 0000000000000 ) + +[23,48]: + int 7fffff000000000000 <- ( ffffff , 000000000000 ) + +[23,47]: + int 3fffff800000000000 <- ( ffffff , 000000000000 ) + +[23,46]: + int 1fffffc00000000000 <- ( ffffff , 000000000000 ) + +[23,45]: + int 0fffffe00000000000 <- ( ffffff , 000000000000 ) + +[23,44]: + int 7fffff00000000000 <- ( ffffff , 00000000000 ) + +[23,43]: + int 3fffff80000000000 <- ( ffffff , 00000000000 ) + +[23,42]: + int 1fffffc0000000000 <- ( ffffff , 00000000000 ) + +[23,41]: + int 0fffffe0000000000 <- ( ffffff , 00000000000 ) + +[23,40]: + int 7fffff0000000000 <- ( ffffff , 0000000000 ) + +[23,39]: + int 3fffff8000000000 <- ( ffffff , 0000000000 ) + +[23,38]: + int 1fffffc000000000 <- ( ffffff , 0000000000 ) + +[23,37]: + int 0fffffe000000000 <- ( ffffff , 0000000000 ) + +[23,36]: + int 7fffff000000000 <- ( ffffff , 000000000 ) + +[23,35]: + int 3fffff800000000 <- ( ffffff , 000000000 ) + +[23,34]: + int 1fffffc00000000 <- ( ffffff , 000000000 ) + +[23,33]: + int 0fffffe00000000 <- ( ffffff , 000000000 ) + +[23,32]: + int 7fffff00000000 <- ( ffffff , 00000000 ) + +[23,31]: + int 3fffff80000000 <- ( ffffff , 00000000 ) + +[23,30]: + int 1fffffc0000000 <- ( ffffff , 00000000 ) + +[23,29]: + int 0fffffe0000000 <- ( ffffff , 00000000 ) + +[23,28]: + int 7fffff0000000 <- ( ffffff , 0000000 ) + +[23,27]: + int 3fffff8000000 <- ( ffffff , 0000000 ) + +[23,26]: + int 1fffffc000000 <- ( ffffff , 0000000 ) + +[23,25]: + int 0fffffe000000 <- ( ffffff , 0000000 ) + +[23,24]: + int 7fffff000000 <- ( ffffff , 000000 ) + +[23,23]: + int 3fffff800000 <- ( ffffff , 000000 ) + +[23,22]: + int 1fffffc00000 <- ( ffffff , 000000 ) + +[23,21]: + int 0fffffe00000 <- ( ffffff , 000000 ) + +[23,20]: + int 7fffff00000 <- ( ffffff , 00000 ) + +[23,19]: + int 3fffff80000 <- ( ffffff , 00000 ) + +[23,18]: + int 1fffffc0000 <- ( ffffff , 00000 ) + +[23,17]: + int 0fffffe0000 <- ( ffffff , 00000 ) + +[23,16]: + int 7fffff0000 <- ( ffffff , 0000 ) + +[23,15]: + int 3fffff8000 <- ( ffffff , 0000 ) + +[23,14]: + int 1fffffc000 <- ( ffffff , 0000 ) + +[23,13]: + int 0fffffe000 <- ( ffffff , 0000 ) + +[23,12]: + int 7fffff000 <- ( ffffff , 000 ) + +[23,11]: + int 3fffff800 <- ( ffffff , 000 ) + +[23,10]: + int 1fffffc00 <- ( ffffff , 000 ) + +[23,9]: + int 0fffffe00 <- ( ffffff , 000 ) + +[23,8]: + int 7fffff00 <- ( ffffff , 00 ) + +[23,7]: + int 3fffff80 <- ( ffffff , 00 ) + +[23,6]: + int 1fffffc0 <- ( ffffff , 00 ) + +[23,5]: + int 0fffffe0 <- ( ffffff , 00 ) + +[23,4]: + int 7fffff0 <- ( ffffff , 0 ) + +[23,3]: + int 3fffff8 <- ( ffffff , 0 ) + +[23,2]: + int 1fffffc <- ( ffffff , 0 ) + +[23,1]: + int 0fffffe <- ( ffffff , 0 ) + +[22,64]: + int 3fffff0000000000000000 <- ( ffffff , 0000000000000000 ) + +[22,63]: + int 1fffff8000000000000000 <- ( ffffff , 0000000000000000 ) + +[22,62]: + int 0fffffc000000000000000 <- ( ffffff , 0000000000000000 ) + +[22,61]: + int 7ffffe000000000000000 <- ( ffffff , 0000000000000000 ) + +[22,60]: + int 3fffff000000000000000 <- ( ffffff , 000000000000000 ) + +[22,59]: + int 1fffff800000000000000 <- ( ffffff , 000000000000000 ) + +[22,58]: + int 0fffffc00000000000000 <- ( ffffff , 000000000000000 ) + +[22,57]: + int 7ffffe00000000000000 <- ( ffffff , 000000000000000 ) + +[22,56]: + int 3fffff00000000000000 <- ( ffffff , 00000000000000 ) + +[22,55]: + int 1fffff80000000000000 <- ( ffffff , 00000000000000 ) + +[22,54]: + int 0fffffc0000000000000 <- ( ffffff , 00000000000000 ) + +[22,53]: + int 7ffffe0000000000000 <- ( ffffff , 00000000000000 ) + +[22,52]: + int 3fffff0000000000000 <- ( ffffff , 0000000000000 ) + +[22,51]: + int 1fffff8000000000000 <- ( ffffff , 0000000000000 ) + +[22,50]: + int 0fffffc000000000000 <- ( ffffff , 0000000000000 ) + +[22,49]: + int 7ffffe000000000000 <- ( ffffff , 0000000000000 ) + +[22,48]: + int 3fffff000000000000 <- ( ffffff , 000000000000 ) + +[22,47]: + int 1fffff800000000000 <- ( ffffff , 000000000000 ) + +[22,46]: + int 0fffffc00000000000 <- ( ffffff , 000000000000 ) + +[22,45]: + int 7ffffe00000000000 <- ( ffffff , 000000000000 ) + +[22,44]: + int 3fffff00000000000 <- ( ffffff , 00000000000 ) + +[22,43]: + int 1fffff80000000000 <- ( ffffff , 00000000000 ) + +[22,42]: + int 0fffffc0000000000 <- ( ffffff , 00000000000 ) + +[22,41]: + int 7ffffe0000000000 <- ( ffffff , 00000000000 ) + +[22,40]: + int 3fffff0000000000 <- ( ffffff , 0000000000 ) + +[22,39]: + int 1fffff8000000000 <- ( ffffff , 0000000000 ) + +[22,38]: + int 0fffffc000000000 <- ( ffffff , 0000000000 ) + +[22,37]: + int 7ffffe000000000 <- ( ffffff , 0000000000 ) + +[22,36]: + int 3fffff000000000 <- ( ffffff , 000000000 ) + +[22,35]: + int 1fffff800000000 <- ( ffffff , 000000000 ) + +[22,34]: + int 0fffffc00000000 <- ( ffffff , 000000000 ) + +[22,33]: + int 7ffffe00000000 <- ( ffffff , 000000000 ) + +[22,32]: + int 3fffff00000000 <- ( ffffff , 00000000 ) + +[22,31]: + int 1fffff80000000 <- ( ffffff , 00000000 ) + +[22,30]: + int 0fffffc0000000 <- ( ffffff , 00000000 ) + +[22,29]: + int 7ffffe0000000 <- ( ffffff , 00000000 ) + +[22,28]: + int 3fffff0000000 <- ( ffffff , 0000000 ) + +[22,27]: + int 1fffff8000000 <- ( ffffff , 0000000 ) + +[22,26]: + int 0fffffc000000 <- ( ffffff , 0000000 ) + +[22,25]: + int 7ffffe000000 <- ( ffffff , 0000000 ) + +[22,24]: + int 3fffff000000 <- ( ffffff , 000000 ) + +[22,23]: + int 1fffff800000 <- ( ffffff , 000000 ) + +[22,22]: + int 0fffffc00000 <- ( ffffff , 000000 ) + +[22,21]: + int 7ffffe00000 <- ( ffffff , 000000 ) + +[22,20]: + int 3fffff00000 <- ( ffffff , 00000 ) + +[22,19]: + int 1fffff80000 <- ( ffffff , 00000 ) + +[22,18]: + int 0fffffc0000 <- ( ffffff , 00000 ) + +[22,17]: + int 7ffffe0000 <- ( ffffff , 00000 ) + +[22,16]: + int 3fffff0000 <- ( ffffff , 0000 ) + +[22,15]: + int 1fffff8000 <- ( ffffff , 0000 ) + +[22,14]: + int 0fffffc000 <- ( ffffff , 0000 ) + +[22,13]: + int 7ffffe000 <- ( ffffff , 0000 ) + +[22,12]: + int 3fffff000 <- ( ffffff , 000 ) + +[22,11]: + int 1fffff800 <- ( ffffff , 000 ) + +[22,10]: + int 0fffffc00 <- ( ffffff , 000 ) + +[22,9]: + int 7ffffe00 <- ( ffffff , 000 ) + +[22,8]: + int 3fffff00 <- ( ffffff , 00 ) + +[22,7]: + int 1fffff80 <- ( ffffff , 00 ) + +[22,6]: + int 0fffffc0 <- ( ffffff , 00 ) + +[22,5]: + int 7ffffe0 <- ( ffffff , 00 ) + +[22,4]: + int 3fffff0 <- ( ffffff , 0 ) + +[22,3]: + int 1fffff8 <- ( ffffff , 0 ) + +[22,2]: + int 0fffffc <- ( ffffff , 0 ) + +[22,1]: + int 7ffffe <- ( ffffff , 0 ) + +[21,64]: + int 1fffff0000000000000000 <- ( ffffff , 0000000000000000 ) + +[21,63]: + int 0fffff8000000000000000 <- ( ffffff , 0000000000000000 ) + +[21,62]: + int 7ffffc000000000000000 <- ( ffffff , 0000000000000000 ) + +[21,61]: + int 3ffffe000000000000000 <- ( ffffff , 0000000000000000 ) + +[21,60]: + int 1fffff000000000000000 <- ( ffffff , 000000000000000 ) + +[21,59]: + int 0fffff800000000000000 <- ( ffffff , 000000000000000 ) + +[21,58]: + int 7ffffc00000000000000 <- ( ffffff , 000000000000000 ) + +[21,57]: + int 3ffffe00000000000000 <- ( ffffff , 000000000000000 ) + +[21,56]: + int 1fffff00000000000000 <- ( ffffff , 00000000000000 ) + +[21,55]: + int 0fffff80000000000000 <- ( ffffff , 00000000000000 ) + +[21,54]: + int 7ffffc0000000000000 <- ( ffffff , 00000000000000 ) + +[21,53]: + int 3ffffe0000000000000 <- ( ffffff , 00000000000000 ) + +[21,52]: + int 1fffff0000000000000 <- ( ffffff , 0000000000000 ) + +[21,51]: + int 0fffff8000000000000 <- ( ffffff , 0000000000000 ) + +[21,50]: + int 7ffffc000000000000 <- ( ffffff , 0000000000000 ) + +[21,49]: + int 3ffffe000000000000 <- ( ffffff , 0000000000000 ) + +[21,48]: + int 1fffff000000000000 <- ( ffffff , 000000000000 ) + +[21,47]: + int 0fffff800000000000 <- ( ffffff , 000000000000 ) + +[21,46]: + int 7ffffc00000000000 <- ( ffffff , 000000000000 ) + +[21,45]: + int 3ffffe00000000000 <- ( ffffff , 000000000000 ) + +[21,44]: + int 1fffff00000000000 <- ( ffffff , 00000000000 ) + +[21,43]: + int 0fffff80000000000 <- ( ffffff , 00000000000 ) + +[21,42]: + int 7ffffc0000000000 <- ( ffffff , 00000000000 ) + +[21,41]: + int 3ffffe0000000000 <- ( ffffff , 00000000000 ) + +[21,40]: + int 1fffff0000000000 <- ( ffffff , 0000000000 ) + +[21,39]: + int 0fffff8000000000 <- ( ffffff , 0000000000 ) + +[21,38]: + int 7ffffc000000000 <- ( ffffff , 0000000000 ) + +[21,37]: + int 3ffffe000000000 <- ( ffffff , 0000000000 ) + +[21,36]: + int 1fffff000000000 <- ( ffffff , 000000000 ) + +[21,35]: + int 0fffff800000000 <- ( ffffff , 000000000 ) + +[21,34]: + int 7ffffc00000000 <- ( ffffff , 000000000 ) + +[21,33]: + int 3ffffe00000000 <- ( ffffff , 000000000 ) + +[21,32]: + int 1fffff00000000 <- ( ffffff , 00000000 ) + +[21,31]: + int 0fffff80000000 <- ( ffffff , 00000000 ) + +[21,30]: + int 7ffffc0000000 <- ( ffffff , 00000000 ) + +[21,29]: + int 3ffffe0000000 <- ( ffffff , 00000000 ) + +[21,28]: + int 1fffff0000000 <- ( ffffff , 0000000 ) + +[21,27]: + int 0fffff8000000 <- ( ffffff , 0000000 ) + +[21,26]: + int 7ffffc000000 <- ( ffffff , 0000000 ) + +[21,25]: + int 3ffffe000000 <- ( ffffff , 0000000 ) + +[21,24]: + int 1fffff000000 <- ( ffffff , 000000 ) + +[21,23]: + int 0fffff800000 <- ( ffffff , 000000 ) + +[21,22]: + int 7ffffc00000 <- ( ffffff , 000000 ) + +[21,21]: + int 3ffffe00000 <- ( ffffff , 000000 ) + +[21,20]: + int 1fffff00000 <- ( ffffff , 00000 ) + +[21,19]: + int 0fffff80000 <- ( ffffff , 00000 ) + +[21,18]: + int 7ffffc0000 <- ( ffffff , 00000 ) + +[21,17]: + int 3ffffe0000 <- ( ffffff , 00000 ) + +[21,16]: + int 1fffff0000 <- ( ffffff , 0000 ) + +[21,15]: + int 0fffff8000 <- ( ffffff , 0000 ) + +[21,14]: + int 7ffffc000 <- ( ffffff , 0000 ) + +[21,13]: + int 3ffffe000 <- ( ffffff , 0000 ) + +[21,12]: + int 1fffff000 <- ( ffffff , 000 ) + +[21,11]: + int 0fffff800 <- ( ffffff , 000 ) + +[21,10]: + int 7ffffc00 <- ( ffffff , 000 ) + +[21,9]: + int 3ffffe00 <- ( ffffff , 000 ) + +[21,8]: + int 1fffff00 <- ( ffffff , 00 ) + +[21,7]: + int 0fffff80 <- ( ffffff , 00 ) + +[21,6]: + int 7ffffc0 <- ( ffffff , 00 ) + +[21,5]: + int 3ffffe0 <- ( ffffff , 00 ) + +[21,4]: + int 1fffff0 <- ( ffffff , 0 ) + +[21,3]: + int 0fffff8 <- ( ffffff , 0 ) + +[21,2]: + int 7ffffc <- ( ffffff , 0 ) + +[21,1]: + int 3ffffe <- ( ffffff , 0 ) + +[20,64]: + int 0fffff0000000000000000 <- ( fffff , 0000000000000000 ) + +[20,63]: + int 7ffff8000000000000000 <- ( fffff , 0000000000000000 ) + +[20,62]: + int 3ffffc000000000000000 <- ( fffff , 0000000000000000 ) + +[20,61]: + int 1ffffe000000000000000 <- ( fffff , 0000000000000000 ) + +[20,60]: + int 0fffff000000000000000 <- ( fffff , 000000000000000 ) + +[20,59]: + int 7ffff800000000000000 <- ( fffff , 000000000000000 ) + +[20,58]: + int 3ffffc00000000000000 <- ( fffff , 000000000000000 ) + +[20,57]: + int 1ffffe00000000000000 <- ( fffff , 000000000000000 ) + +[20,56]: + int 0fffff00000000000000 <- ( fffff , 00000000000000 ) + +[20,55]: + int 7ffff80000000000000 <- ( fffff , 00000000000000 ) + +[20,54]: + int 3ffffc0000000000000 <- ( fffff , 00000000000000 ) + +[20,53]: + int 1ffffe0000000000000 <- ( fffff , 00000000000000 ) + +[20,52]: + int 0fffff0000000000000 <- ( fffff , 0000000000000 ) + +[20,51]: + int 7ffff8000000000000 <- ( fffff , 0000000000000 ) + +[20,50]: + int 3ffffc000000000000 <- ( fffff , 0000000000000 ) + +[20,49]: + int 1ffffe000000000000 <- ( fffff , 0000000000000 ) + +[20,48]: + int 0fffff000000000000 <- ( fffff , 000000000000 ) + +[20,47]: + int 7ffff800000000000 <- ( fffff , 000000000000 ) + +[20,46]: + int 3ffffc00000000000 <- ( fffff , 000000000000 ) + +[20,45]: + int 1ffffe00000000000 <- ( fffff , 000000000000 ) + +[20,44]: + int 0fffff00000000000 <- ( fffff , 00000000000 ) + +[20,43]: + int 7ffff80000000000 <- ( fffff , 00000000000 ) + +[20,42]: + int 3ffffc0000000000 <- ( fffff , 00000000000 ) + +[20,41]: + int 1ffffe0000000000 <- ( fffff , 00000000000 ) + +[20,40]: + int 0fffff0000000000 <- ( fffff , 0000000000 ) + +[20,39]: + int 7ffff8000000000 <- ( fffff , 0000000000 ) + +[20,38]: + int 3ffffc000000000 <- ( fffff , 0000000000 ) + +[20,37]: + int 1ffffe000000000 <- ( fffff , 0000000000 ) + +[20,36]: + int 0fffff000000000 <- ( fffff , 000000000 ) + +[20,35]: + int 7ffff800000000 <- ( fffff , 000000000 ) + +[20,34]: + int 3ffffc00000000 <- ( fffff , 000000000 ) + +[20,33]: + int 1ffffe00000000 <- ( fffff , 000000000 ) + +[20,32]: + int 0fffff00000000 <- ( fffff , 00000000 ) + +[20,31]: + int 7ffff80000000 <- ( fffff , 00000000 ) + +[20,30]: + int 3ffffc0000000 <- ( fffff , 00000000 ) + +[20,29]: + int 1ffffe0000000 <- ( fffff , 00000000 ) + +[20,28]: + int 0fffff0000000 <- ( fffff , 0000000 ) + +[20,27]: + int 7ffff8000000 <- ( fffff , 0000000 ) + +[20,26]: + int 3ffffc000000 <- ( fffff , 0000000 ) + +[20,25]: + int 1ffffe000000 <- ( fffff , 0000000 ) + +[20,24]: + int 0fffff000000 <- ( fffff , 000000 ) + +[20,23]: + int 7ffff800000 <- ( fffff , 000000 ) + +[20,22]: + int 3ffffc00000 <- ( fffff , 000000 ) + +[20,21]: + int 1ffffe00000 <- ( fffff , 000000 ) + +[20,20]: + int 0fffff00000 <- ( fffff , 00000 ) + +[20,19]: + int 7ffff80000 <- ( fffff , 00000 ) + +[20,18]: + int 3ffffc0000 <- ( fffff , 00000 ) + +[20,17]: + int 1ffffe0000 <- ( fffff , 00000 ) + +[20,16]: + int 0fffff0000 <- ( fffff , 0000 ) + +[20,15]: + int 7ffff8000 <- ( fffff , 0000 ) + +[20,14]: + int 3ffffc000 <- ( fffff , 0000 ) + +[20,13]: + int 1ffffe000 <- ( fffff , 0000 ) + +[20,12]: + int 0fffff000 <- ( fffff , 000 ) + +[20,11]: + int 7ffff800 <- ( fffff , 000 ) + +[20,10]: + int 3ffffc00 <- ( fffff , 000 ) + +[20,9]: + int 1ffffe00 <- ( fffff , 000 ) + +[20,8]: + int 0fffff00 <- ( fffff , 00 ) + +[20,7]: + int 7ffff80 <- ( fffff , 00 ) + +[20,6]: + int 3ffffc0 <- ( fffff , 00 ) + +[20,5]: + int 1ffffe0 <- ( fffff , 00 ) + +[20,4]: + int 0fffff0 <- ( fffff , 0 ) + +[20,3]: + int 7ffff8 <- ( fffff , 0 ) + +[20,2]: + int 3ffffc <- ( fffff , 0 ) + +[20,1]: + int 1ffffe <- ( fffff , 0 ) + +[19,64]: + int 7ffff0000000000000000 <- ( fffff , 0000000000000000 ) + +[19,63]: + int 3ffff8000000000000000 <- ( fffff , 0000000000000000 ) + +[19,62]: + int 1ffffc000000000000000 <- ( fffff , 0000000000000000 ) + +[19,61]: + int 0ffffe000000000000000 <- ( fffff , 0000000000000000 ) + +[19,60]: + int 7ffff000000000000000 <- ( fffff , 000000000000000 ) + +[19,59]: + int 3ffff800000000000000 <- ( fffff , 000000000000000 ) + +[19,58]: + int 1ffffc00000000000000 <- ( fffff , 000000000000000 ) + +[19,57]: + int 0ffffe00000000000000 <- ( fffff , 000000000000000 ) + +[19,56]: + int 7ffff00000000000000 <- ( fffff , 00000000000000 ) + +[19,55]: + int 3ffff80000000000000 <- ( fffff , 00000000000000 ) + +[19,54]: + int 1ffffc0000000000000 <- ( fffff , 00000000000000 ) + +[19,53]: + int 0ffffe0000000000000 <- ( fffff , 00000000000000 ) + +[19,52]: + int 7ffff0000000000000 <- ( fffff , 0000000000000 ) + +[19,51]: + int 3ffff8000000000000 <- ( fffff , 0000000000000 ) + +[19,50]: + int 1ffffc000000000000 <- ( fffff , 0000000000000 ) + +[19,49]: + int 0ffffe000000000000 <- ( fffff , 0000000000000 ) + +[19,48]: + int 7ffff000000000000 <- ( fffff , 000000000000 ) + +[19,47]: + int 3ffff800000000000 <- ( fffff , 000000000000 ) + +[19,46]: + int 1ffffc00000000000 <- ( fffff , 000000000000 ) + +[19,45]: + int 0ffffe00000000000 <- ( fffff , 000000000000 ) + +[19,44]: + int 7ffff00000000000 <- ( fffff , 00000000000 ) + +[19,43]: + int 3ffff80000000000 <- ( fffff , 00000000000 ) + +[19,42]: + int 1ffffc0000000000 <- ( fffff , 00000000000 ) + +[19,41]: + int 0ffffe0000000000 <- ( fffff , 00000000000 ) + +[19,40]: + int 7ffff0000000000 <- ( fffff , 0000000000 ) + +[19,39]: + int 3ffff8000000000 <- ( fffff , 0000000000 ) + +[19,38]: + int 1ffffc000000000 <- ( fffff , 0000000000 ) + +[19,37]: + int 0ffffe000000000 <- ( fffff , 0000000000 ) + +[19,36]: + int 7ffff000000000 <- ( fffff , 000000000 ) + +[19,35]: + int 3ffff800000000 <- ( fffff , 000000000 ) + +[19,34]: + int 1ffffc00000000 <- ( fffff , 000000000 ) + +[19,33]: + int 0ffffe00000000 <- ( fffff , 000000000 ) + +[19,32]: + int 7ffff00000000 <- ( fffff , 00000000 ) + +[19,31]: + int 3ffff80000000 <- ( fffff , 00000000 ) + +[19,30]: + int 1ffffc0000000 <- ( fffff , 00000000 ) + +[19,29]: + int 0ffffe0000000 <- ( fffff , 00000000 ) + +[19,28]: + int 7ffff0000000 <- ( fffff , 0000000 ) + +[19,27]: + int 3ffff8000000 <- ( fffff , 0000000 ) + +[19,26]: + int 1ffffc000000 <- ( fffff , 0000000 ) + +[19,25]: + int 0ffffe000000 <- ( fffff , 0000000 ) + +[19,24]: + int 7ffff000000 <- ( fffff , 000000 ) + +[19,23]: + int 3ffff800000 <- ( fffff , 000000 ) + +[19,22]: + int 1ffffc00000 <- ( fffff , 000000 ) + +[19,21]: + int 0ffffe00000 <- ( fffff , 000000 ) + +[19,20]: + int 7ffff00000 <- ( fffff , 00000 ) + +[19,19]: + int 3ffff80000 <- ( fffff , 00000 ) + +[19,18]: + int 1ffffc0000 <- ( fffff , 00000 ) + +[19,17]: + int 0ffffe0000 <- ( fffff , 00000 ) + +[19,16]: + int 7ffff0000 <- ( fffff , 0000 ) + +[19,15]: + int 3ffff8000 <- ( fffff , 0000 ) + +[19,14]: + int 1ffffc000 <- ( fffff , 0000 ) + +[19,13]: + int 0ffffe000 <- ( fffff , 0000 ) + +[19,12]: + int 7ffff000 <- ( fffff , 000 ) + +[19,11]: + int 3ffff800 <- ( fffff , 000 ) + +[19,10]: + int 1ffffc00 <- ( fffff , 000 ) + +[19,9]: + int 0ffffe00 <- ( fffff , 000 ) + +[19,8]: + int 7ffff00 <- ( fffff , 00 ) + +[19,7]: + int 3ffff80 <- ( fffff , 00 ) + +[19,6]: + int 1ffffc0 <- ( fffff , 00 ) + +[19,5]: + int 0ffffe0 <- ( fffff , 00 ) + +[19,4]: + int 7ffff0 <- ( fffff , 0 ) + +[19,3]: + int 3ffff8 <- ( fffff , 0 ) + +[19,2]: + int 1ffffc <- ( fffff , 0 ) + +[19,1]: + int 0ffffe <- ( fffff , 0 ) + +[18,64]: + int 3ffff0000000000000000 <- ( fffff , 0000000000000000 ) + +[18,63]: + int 1ffff8000000000000000 <- ( fffff , 0000000000000000 ) + +[18,62]: + int 0ffffc000000000000000 <- ( fffff , 0000000000000000 ) + +[18,61]: + int 7fffe000000000000000 <- ( fffff , 0000000000000000 ) + +[18,60]: + int 3ffff000000000000000 <- ( fffff , 000000000000000 ) + +[18,59]: + int 1ffff800000000000000 <- ( fffff , 000000000000000 ) + +[18,58]: + int 0ffffc00000000000000 <- ( fffff , 000000000000000 ) + +[18,57]: + int 7fffe00000000000000 <- ( fffff , 000000000000000 ) + +[18,56]: + int 3ffff00000000000000 <- ( fffff , 00000000000000 ) + +[18,55]: + int 1ffff80000000000000 <- ( fffff , 00000000000000 ) + +[18,54]: + int 0ffffc0000000000000 <- ( fffff , 00000000000000 ) + +[18,53]: + int 7fffe0000000000000 <- ( fffff , 00000000000000 ) + +[18,52]: + int 3ffff0000000000000 <- ( fffff , 0000000000000 ) + +[18,51]: + int 1ffff8000000000000 <- ( fffff , 0000000000000 ) + +[18,50]: + int 0ffffc000000000000 <- ( fffff , 0000000000000 ) + +[18,49]: + int 7fffe000000000000 <- ( fffff , 0000000000000 ) + +[18,48]: + int 3ffff000000000000 <- ( fffff , 000000000000 ) + +[18,47]: + int 1ffff800000000000 <- ( fffff , 000000000000 ) + +[18,46]: + int 0ffffc00000000000 <- ( fffff , 000000000000 ) + +[18,45]: + int 7fffe00000000000 <- ( fffff , 000000000000 ) + +[18,44]: + int 3ffff00000000000 <- ( fffff , 00000000000 ) + +[18,43]: + int 1ffff80000000000 <- ( fffff , 00000000000 ) + +[18,42]: + int 0ffffc0000000000 <- ( fffff , 00000000000 ) + +[18,41]: + int 7fffe0000000000 <- ( fffff , 00000000000 ) + +[18,40]: + int 3ffff0000000000 <- ( fffff , 0000000000 ) + +[18,39]: + int 1ffff8000000000 <- ( fffff , 0000000000 ) + +[18,38]: + int 0ffffc000000000 <- ( fffff , 0000000000 ) + +[18,37]: + int 7fffe000000000 <- ( fffff , 0000000000 ) + +[18,36]: + int 3ffff000000000 <- ( fffff , 000000000 ) + +[18,35]: + int 1ffff800000000 <- ( fffff , 000000000 ) + +[18,34]: + int 0ffffc00000000 <- ( fffff , 000000000 ) + +[18,33]: + int 7fffe00000000 <- ( fffff , 000000000 ) + +[18,32]: + int 3ffff00000000 <- ( fffff , 00000000 ) + +[18,31]: + int 1ffff80000000 <- ( fffff , 00000000 ) + +[18,30]: + int 0ffffc0000000 <- ( fffff , 00000000 ) + +[18,29]: + int 7fffe0000000 <- ( fffff , 00000000 ) + +[18,28]: + int 3ffff0000000 <- ( fffff , 0000000 ) + +[18,27]: + int 1ffff8000000 <- ( fffff , 0000000 ) + +[18,26]: + int 0ffffc000000 <- ( fffff , 0000000 ) + +[18,25]: + int 7fffe000000 <- ( fffff , 0000000 ) + +[18,24]: + int 3ffff000000 <- ( fffff , 000000 ) + +[18,23]: + int 1ffff800000 <- ( fffff , 000000 ) + +[18,22]: + int 0ffffc00000 <- ( fffff , 000000 ) + +[18,21]: + int 7fffe00000 <- ( fffff , 000000 ) + +[18,20]: + int 3ffff00000 <- ( fffff , 00000 ) + +[18,19]: + int 1ffff80000 <- ( fffff , 00000 ) + +[18,18]: + int 0ffffc0000 <- ( fffff , 00000 ) + +[18,17]: + int 7fffe0000 <- ( fffff , 00000 ) + +[18,16]: + int 3ffff0000 <- ( fffff , 0000 ) + +[18,15]: + int 1ffff8000 <- ( fffff , 0000 ) + +[18,14]: + int 0ffffc000 <- ( fffff , 0000 ) + +[18,13]: + int 7fffe000 <- ( fffff , 0000 ) + +[18,12]: + int 3ffff000 <- ( fffff , 000 ) + +[18,11]: + int 1ffff800 <- ( fffff , 000 ) + +[18,10]: + int 0ffffc00 <- ( fffff , 000 ) + +[18,9]: + int 7fffe00 <- ( fffff , 000 ) + +[18,8]: + int 3ffff00 <- ( fffff , 00 ) + +[18,7]: + int 1ffff80 <- ( fffff , 00 ) + +[18,6]: + int 0ffffc0 <- ( fffff , 00 ) + +[18,5]: + int 7fffe0 <- ( fffff , 00 ) + +[18,4]: + int 3ffff0 <- ( fffff , 0 ) + +[18,3]: + int 1ffff8 <- ( fffff , 0 ) + +[18,2]: + int 0ffffc <- ( fffff , 0 ) + +[18,1]: + int 7fffe <- ( fffff , 0 ) + +[17,64]: + int 1ffff0000000000000000 <- ( fffff , 0000000000000000 ) + +[17,63]: + int 0ffff8000000000000000 <- ( fffff , 0000000000000000 ) + +[17,62]: + int 7fffc000000000000000 <- ( fffff , 0000000000000000 ) + +[17,61]: + int 3fffe000000000000000 <- ( fffff , 0000000000000000 ) + +[17,60]: + int 1ffff000000000000000 <- ( fffff , 000000000000000 ) + +[17,59]: + int 0ffff800000000000000 <- ( fffff , 000000000000000 ) + +[17,58]: + int 7fffc00000000000000 <- ( fffff , 000000000000000 ) + +[17,57]: + int 3fffe00000000000000 <- ( fffff , 000000000000000 ) + +[17,56]: + int 1ffff00000000000000 <- ( fffff , 00000000000000 ) + +[17,55]: + int 0ffff80000000000000 <- ( fffff , 00000000000000 ) + +[17,54]: + int 7fffc0000000000000 <- ( fffff , 00000000000000 ) + +[17,53]: + int 3fffe0000000000000 <- ( fffff , 00000000000000 ) + +[17,52]: + int 1ffff0000000000000 <- ( fffff , 0000000000000 ) + +[17,51]: + int 0ffff8000000000000 <- ( fffff , 0000000000000 ) + +[17,50]: + int 7fffc000000000000 <- ( fffff , 0000000000000 ) + +[17,49]: + int 3fffe000000000000 <- ( fffff , 0000000000000 ) + +[17,48]: + int 1ffff000000000000 <- ( fffff , 000000000000 ) + +[17,47]: + int 0ffff800000000000 <- ( fffff , 000000000000 ) + +[17,46]: + int 7fffc00000000000 <- ( fffff , 000000000000 ) + +[17,45]: + int 3fffe00000000000 <- ( fffff , 000000000000 ) + +[17,44]: + int 1ffff00000000000 <- ( fffff , 00000000000 ) + +[17,43]: + int 0ffff80000000000 <- ( fffff , 00000000000 ) + +[17,42]: + int 7fffc0000000000 <- ( fffff , 00000000000 ) + +[17,41]: + int 3fffe0000000000 <- ( fffff , 00000000000 ) + +[17,40]: + int 1ffff0000000000 <- ( fffff , 0000000000 ) + +[17,39]: + int 0ffff8000000000 <- ( fffff , 0000000000 ) + +[17,38]: + int 7fffc000000000 <- ( fffff , 0000000000 ) + +[17,37]: + int 3fffe000000000 <- ( fffff , 0000000000 ) + +[17,36]: + int 1ffff000000000 <- ( fffff , 000000000 ) + +[17,35]: + int 0ffff800000000 <- ( fffff , 000000000 ) + +[17,34]: + int 7fffc00000000 <- ( fffff , 000000000 ) + +[17,33]: + int 3fffe00000000 <- ( fffff , 000000000 ) + +[17,32]: + int 1ffff00000000 <- ( fffff , 00000000 ) + +[17,31]: + int 0ffff80000000 <- ( fffff , 00000000 ) + +[17,30]: + int 7fffc0000000 <- ( fffff , 00000000 ) + +[17,29]: + int 3fffe0000000 <- ( fffff , 00000000 ) + +[17,28]: + int 1ffff0000000 <- ( fffff , 0000000 ) + +[17,27]: + int 0ffff8000000 <- ( fffff , 0000000 ) + +[17,26]: + int 7fffc000000 <- ( fffff , 0000000 ) + +[17,25]: + int 3fffe000000 <- ( fffff , 0000000 ) + +[17,24]: + int 1ffff000000 <- ( fffff , 000000 ) + +[17,23]: + int 0ffff800000 <- ( fffff , 000000 ) + +[17,22]: + int 7fffc00000 <- ( fffff , 000000 ) + +[17,21]: + int 3fffe00000 <- ( fffff , 000000 ) + +[17,20]: + int 1ffff00000 <- ( fffff , 00000 ) + +[17,19]: + int 0ffff80000 <- ( fffff , 00000 ) + +[17,18]: + int 7fffc0000 <- ( fffff , 00000 ) + +[17,17]: + int 3fffe0000 <- ( fffff , 00000 ) + +[17,16]: + int 1ffff0000 <- ( fffff , 0000 ) + +[17,15]: + int 0ffff8000 <- ( fffff , 0000 ) + +[17,14]: + int 7fffc000 <- ( fffff , 0000 ) + +[17,13]: + int 3fffe000 <- ( fffff , 0000 ) + +[17,12]: + int 1ffff000 <- ( fffff , 000 ) + +[17,11]: + int 0ffff800 <- ( fffff , 000 ) + +[17,10]: + int 7fffc00 <- ( fffff , 000 ) + +[17,9]: + int 3fffe00 <- ( fffff , 000 ) + +[17,8]: + int 1ffff00 <- ( fffff , 00 ) + +[17,7]: + int 0ffff80 <- ( fffff , 00 ) + +[17,6]: + int 7fffc0 <- ( fffff , 00 ) + +[17,5]: + int 3fffe0 <- ( fffff , 00 ) + +[17,4]: + int 1ffff0 <- ( fffff , 0 ) + +[17,3]: + int 0ffff8 <- ( fffff , 0 ) + +[17,2]: + int 7fffc <- ( fffff , 0 ) + +[17,1]: + int 3fffe <- ( fffff , 0 ) + +[16,64]: + int 0ffff0000000000000000 <- ( ffff , 0000000000000000 ) + +[16,63]: + int 7fff8000000000000000 <- ( ffff , 0000000000000000 ) + +[16,62]: + int 3fffc000000000000000 <- ( ffff , 0000000000000000 ) + +[16,61]: + int 1fffe000000000000000 <- ( ffff , 0000000000000000 ) + +[16,60]: + int 0ffff000000000000000 <- ( ffff , 000000000000000 ) + +[16,59]: + int 7fff800000000000000 <- ( ffff , 000000000000000 ) + +[16,58]: + int 3fffc00000000000000 <- ( ffff , 000000000000000 ) + +[16,57]: + int 1fffe00000000000000 <- ( ffff , 000000000000000 ) + +[16,56]: + int 0ffff00000000000000 <- ( ffff , 00000000000000 ) + +[16,55]: + int 7fff80000000000000 <- ( ffff , 00000000000000 ) + +[16,54]: + int 3fffc0000000000000 <- ( ffff , 00000000000000 ) + +[16,53]: + int 1fffe0000000000000 <- ( ffff , 00000000000000 ) + +[16,52]: + int 0ffff0000000000000 <- ( ffff , 0000000000000 ) + +[16,51]: + int 7fff8000000000000 <- ( ffff , 0000000000000 ) + +[16,50]: + int 3fffc000000000000 <- ( ffff , 0000000000000 ) + +[16,49]: + int 1fffe000000000000 <- ( ffff , 0000000000000 ) + +[16,48]: + int 0ffff000000000000 <- ( ffff , 000000000000 ) + +[16,47]: + int 7fff800000000000 <- ( ffff , 000000000000 ) + +[16,46]: + int 3fffc00000000000 <- ( ffff , 000000000000 ) + +[16,45]: + int 1fffe00000000000 <- ( ffff , 000000000000 ) + +[16,44]: + int 0ffff00000000000 <- ( ffff , 00000000000 ) + +[16,43]: + int 7fff80000000000 <- ( ffff , 00000000000 ) + +[16,42]: + int 3fffc0000000000 <- ( ffff , 00000000000 ) + +[16,41]: + int 1fffe0000000000 <- ( ffff , 00000000000 ) + +[16,40]: + int 0ffff0000000000 <- ( ffff , 0000000000 ) + +[16,39]: + int 7fff8000000000 <- ( ffff , 0000000000 ) + +[16,38]: + int 3fffc000000000 <- ( ffff , 0000000000 ) + +[16,37]: + int 1fffe000000000 <- ( ffff , 0000000000 ) + +[16,36]: + int 0ffff000000000 <- ( ffff , 000000000 ) + +[16,35]: + int 7fff800000000 <- ( ffff , 000000000 ) + +[16,34]: + int 3fffc00000000 <- ( ffff , 000000000 ) + +[16,33]: + int 1fffe00000000 <- ( ffff , 000000000 ) + +[16,32]: + int 0ffff00000000 <- ( ffff , 00000000 ) + +[16,31]: + int 7fff80000000 <- ( ffff , 00000000 ) + +[16,30]: + int 3fffc0000000 <- ( ffff , 00000000 ) + +[16,29]: + int 1fffe0000000 <- ( ffff , 00000000 ) + +[16,28]: + int 0ffff0000000 <- ( ffff , 0000000 ) + +[16,27]: + int 7fff8000000 <- ( ffff , 0000000 ) + +[16,26]: + int 3fffc000000 <- ( ffff , 0000000 ) + +[16,25]: + int 1fffe000000 <- ( ffff , 0000000 ) + +[16,24]: + int 0ffff000000 <- ( ffff , 000000 ) + +[16,23]: + int 7fff800000 <- ( ffff , 000000 ) + +[16,22]: + int 3fffc00000 <- ( ffff , 000000 ) + +[16,21]: + int 1fffe00000 <- ( ffff , 000000 ) + +[16,20]: + int 0ffff00000 <- ( ffff , 00000 ) + +[16,19]: + int 7fff80000 <- ( ffff , 00000 ) + +[16,18]: + int 3fffc0000 <- ( ffff , 00000 ) + +[16,17]: + int 1fffe0000 <- ( ffff , 00000 ) + +[16,16]: + int 0ffff0000 <- ( ffff , 0000 ) + +[16,15]: + int 7fff8000 <- ( ffff , 0000 ) + +[16,14]: + int 3fffc000 <- ( ffff , 0000 ) + +[16,13]: + int 1fffe000 <- ( ffff , 0000 ) + +[16,12]: + int 0ffff000 <- ( ffff , 000 ) + +[16,11]: + int 7fff800 <- ( ffff , 000 ) + +[16,10]: + int 3fffc00 <- ( ffff , 000 ) + +[16,9]: + int 1fffe00 <- ( ffff , 000 ) + +[16,8]: + int 0ffff00 <- ( ffff , 00 ) + +[16,7]: + int 7fff80 <- ( ffff , 00 ) + +[16,6]: + int 3fffc0 <- ( ffff , 00 ) + +[16,5]: + int 1fffe0 <- ( ffff , 00 ) + +[16,4]: + int 0ffff0 <- ( ffff , 0 ) + +[16,3]: + int 7fff8 <- ( ffff , 0 ) + +[16,2]: + int 3fffc <- ( ffff , 0 ) + +[16,1]: + int 1fffe <- ( ffff , 0 ) + +[15,64]: + int 7fff0000000000000000 <- ( ffff , 0000000000000000 ) + +[15,63]: + int 3fff8000000000000000 <- ( ffff , 0000000000000000 ) + +[15,62]: + int 1fffc000000000000000 <- ( ffff , 0000000000000000 ) + +[15,61]: + int 0fffe000000000000000 <- ( ffff , 0000000000000000 ) + +[15,60]: + int 7fff000000000000000 <- ( ffff , 000000000000000 ) + +[15,59]: + int 3fff800000000000000 <- ( ffff , 000000000000000 ) + +[15,58]: + int 1fffc00000000000000 <- ( ffff , 000000000000000 ) + +[15,57]: + int 0fffe00000000000000 <- ( ffff , 000000000000000 ) + +[15,56]: + int 7fff00000000000000 <- ( ffff , 00000000000000 ) + +[15,55]: + int 3fff80000000000000 <- ( ffff , 00000000000000 ) + +[15,54]: + int 1fffc0000000000000 <- ( ffff , 00000000000000 ) + +[15,53]: + int 0fffe0000000000000 <- ( ffff , 00000000000000 ) + +[15,52]: + int 7fff0000000000000 <- ( ffff , 0000000000000 ) + +[15,51]: + int 3fff8000000000000 <- ( ffff , 0000000000000 ) + +[15,50]: + int 1fffc000000000000 <- ( ffff , 0000000000000 ) + +[15,49]: + int 0fffe000000000000 <- ( ffff , 0000000000000 ) + +[15,48]: + int 7fff000000000000 <- ( ffff , 000000000000 ) + +[15,47]: + int 3fff800000000000 <- ( ffff , 000000000000 ) + +[15,46]: + int 1fffc00000000000 <- ( ffff , 000000000000 ) + +[15,45]: + int 0fffe00000000000 <- ( ffff , 000000000000 ) + +[15,44]: + int 7fff00000000000 <- ( ffff , 00000000000 ) + +[15,43]: + int 3fff80000000000 <- ( ffff , 00000000000 ) + +[15,42]: + int 1fffc0000000000 <- ( ffff , 00000000000 ) + +[15,41]: + int 0fffe0000000000 <- ( ffff , 00000000000 ) + +[15,40]: + int 7fff0000000000 <- ( ffff , 0000000000 ) + +[15,39]: + int 3fff8000000000 <- ( ffff , 0000000000 ) + +[15,38]: + int 1fffc000000000 <- ( ffff , 0000000000 ) + +[15,37]: + int 0fffe000000000 <- ( ffff , 0000000000 ) + +[15,36]: + int 7fff000000000 <- ( ffff , 000000000 ) + +[15,35]: + int 3fff800000000 <- ( ffff , 000000000 ) + +[15,34]: + int 1fffc00000000 <- ( ffff , 000000000 ) + +[15,33]: + int 0fffe00000000 <- ( ffff , 000000000 ) + +[15,32]: + int 7fff00000000 <- ( ffff , 00000000 ) + +[15,31]: + int 3fff80000000 <- ( ffff , 00000000 ) + +[15,30]: + int 1fffc0000000 <- ( ffff , 00000000 ) + +[15,29]: + int 0fffe0000000 <- ( ffff , 00000000 ) + +[15,28]: + int 7fff0000000 <- ( ffff , 0000000 ) + +[15,27]: + int 3fff8000000 <- ( ffff , 0000000 ) + +[15,26]: + int 1fffc000000 <- ( ffff , 0000000 ) + +[15,25]: + int 0fffe000000 <- ( ffff , 0000000 ) + +[15,24]: + int 7fff000000 <- ( ffff , 000000 ) + +[15,23]: + int 3fff800000 <- ( ffff , 000000 ) + +[15,22]: + int 1fffc00000 <- ( ffff , 000000 ) + +[15,21]: + int 0fffe00000 <- ( ffff , 000000 ) + +[15,20]: + int 7fff00000 <- ( ffff , 00000 ) + +[15,19]: + int 3fff80000 <- ( ffff , 00000 ) + +[15,18]: + int 1fffc0000 <- ( ffff , 00000 ) + +[15,17]: + int 0fffe0000 <- ( ffff , 00000 ) + +[15,16]: + int 7fff0000 <- ( ffff , 0000 ) + +[15,15]: + int 3fff8000 <- ( ffff , 0000 ) + +[15,14]: + int 1fffc000 <- ( ffff , 0000 ) + +[15,13]: + int 0fffe000 <- ( ffff , 0000 ) + +[15,12]: + int 7fff000 <- ( ffff , 000 ) + +[15,11]: + int 3fff800 <- ( ffff , 000 ) + +[15,10]: + int 1fffc00 <- ( ffff , 000 ) + +[15,9]: + int 0fffe00 <- ( ffff , 000 ) + +[15,8]: + int 7fff00 <- ( ffff , 00 ) + +[15,7]: + int 3fff80 <- ( ffff , 00 ) + +[15,6]: + int 1fffc0 <- ( ffff , 00 ) + +[15,5]: + int 0fffe0 <- ( ffff , 00 ) + +[15,4]: + int 7fff0 <- ( ffff , 0 ) + +[15,3]: + int 3fff8 <- ( ffff , 0 ) + +[15,2]: + int 1fffc <- ( ffff , 0 ) + +[15,1]: + int 0fffe <- ( ffff , 0 ) + +[14,64]: + int 3fff0000000000000000 <- ( ffff , 0000000000000000 ) + +[14,63]: + int 1fff8000000000000000 <- ( ffff , 0000000000000000 ) + +[14,62]: + int 0fffc000000000000000 <- ( ffff , 0000000000000000 ) + +[14,61]: + int 7ffe000000000000000 <- ( ffff , 0000000000000000 ) + +[14,60]: + int 3fff000000000000000 <- ( ffff , 000000000000000 ) + +[14,59]: + int 1fff800000000000000 <- ( ffff , 000000000000000 ) + +[14,58]: + int 0fffc00000000000000 <- ( ffff , 000000000000000 ) + +[14,57]: + int 7ffe00000000000000 <- ( ffff , 000000000000000 ) + +[14,56]: + int 3fff00000000000000 <- ( ffff , 00000000000000 ) + +[14,55]: + int 1fff80000000000000 <- ( ffff , 00000000000000 ) + +[14,54]: + int 0fffc0000000000000 <- ( ffff , 00000000000000 ) + +[14,53]: + int 7ffe0000000000000 <- ( ffff , 00000000000000 ) + +[14,52]: + int 3fff0000000000000 <- ( ffff , 0000000000000 ) + +[14,51]: + int 1fff8000000000000 <- ( ffff , 0000000000000 ) + +[14,50]: + int 0fffc000000000000 <- ( ffff , 0000000000000 ) + +[14,49]: + int 7ffe000000000000 <- ( ffff , 0000000000000 ) + +[14,48]: + int 3fff000000000000 <- ( ffff , 000000000000 ) + +[14,47]: + int 1fff800000000000 <- ( ffff , 000000000000 ) + +[14,46]: + int 0fffc00000000000 <- ( ffff , 000000000000 ) + +[14,45]: + int 7ffe00000000000 <- ( ffff , 000000000000 ) + +[14,44]: + int 3fff00000000000 <- ( ffff , 00000000000 ) + +[14,43]: + int 1fff80000000000 <- ( ffff , 00000000000 ) + +[14,42]: + int 0fffc0000000000 <- ( ffff , 00000000000 ) + +[14,41]: + int 7ffe0000000000 <- ( ffff , 00000000000 ) + +[14,40]: + int 3fff0000000000 <- ( ffff , 0000000000 ) + +[14,39]: + int 1fff8000000000 <- ( ffff , 0000000000 ) + +[14,38]: + int 0fffc000000000 <- ( ffff , 0000000000 ) + +[14,37]: + int 7ffe000000000 <- ( ffff , 0000000000 ) + +[14,36]: + int 3fff000000000 <- ( ffff , 000000000 ) + +[14,35]: + int 1fff800000000 <- ( ffff , 000000000 ) + +[14,34]: + int 0fffc00000000 <- ( ffff , 000000000 ) + +[14,33]: + int 7ffe00000000 <- ( ffff , 000000000 ) + +[14,32]: + int 3fff00000000 <- ( ffff , 00000000 ) + +[14,31]: + int 1fff80000000 <- ( ffff , 00000000 ) + +[14,30]: + int 0fffc0000000 <- ( ffff , 00000000 ) + +[14,29]: + int 7ffe0000000 <- ( ffff , 00000000 ) + +[14,28]: + int 3fff0000000 <- ( ffff , 0000000 ) + +[14,27]: + int 1fff8000000 <- ( ffff , 0000000 ) + +[14,26]: + int 0fffc000000 <- ( ffff , 0000000 ) + +[14,25]: + int 7ffe000000 <- ( ffff , 0000000 ) + +[14,24]: + int 3fff000000 <- ( ffff , 000000 ) + +[14,23]: + int 1fff800000 <- ( ffff , 000000 ) + +[14,22]: + int 0fffc00000 <- ( ffff , 000000 ) + +[14,21]: + int 7ffe00000 <- ( ffff , 000000 ) + +[14,20]: + int 3fff00000 <- ( ffff , 00000 ) + +[14,19]: + int 1fff80000 <- ( ffff , 00000 ) + +[14,18]: + int 0fffc0000 <- ( ffff , 00000 ) + +[14,17]: + int 7ffe0000 <- ( ffff , 00000 ) + +[14,16]: + int 3fff0000 <- ( ffff , 0000 ) + +[14,15]: + int 1fff8000 <- ( ffff , 0000 ) + +[14,14]: + int 0fffc000 <- ( ffff , 0000 ) + +[14,13]: + int 7ffe000 <- ( ffff , 0000 ) + +[14,12]: + int 3fff000 <- ( ffff , 000 ) + +[14,11]: + int 1fff800 <- ( ffff , 000 ) + +[14,10]: + int 0fffc00 <- ( ffff , 000 ) + +[14,9]: + int 7ffe00 <- ( ffff , 000 ) + +[14,8]: + int 3fff00 <- ( ffff , 00 ) + +[14,7]: + int 1fff80 <- ( ffff , 00 ) + +[14,6]: + int 0fffc0 <- ( ffff , 00 ) + +[14,5]: + int 7ffe0 <- ( ffff , 00 ) + +[14,4]: + int 3fff0 <- ( ffff , 0 ) + +[14,3]: + int 1fff8 <- ( ffff , 0 ) + +[14,2]: + int 0fffc <- ( ffff , 0 ) + +[14,1]: + int 7ffe <- ( ffff , 0 ) + +[13,64]: + int 1fff0000000000000000 <- ( ffff , 0000000000000000 ) + +[13,63]: + int 0fff8000000000000000 <- ( ffff , 0000000000000000 ) + +[13,62]: + int 7ffc000000000000000 <- ( ffff , 0000000000000000 ) + +[13,61]: + int 3ffe000000000000000 <- ( ffff , 0000000000000000 ) + +[13,60]: + int 1fff000000000000000 <- ( ffff , 000000000000000 ) + +[13,59]: + int 0fff800000000000000 <- ( ffff , 000000000000000 ) + +[13,58]: + int 7ffc00000000000000 <- ( ffff , 000000000000000 ) + +[13,57]: + int 3ffe00000000000000 <- ( ffff , 000000000000000 ) + +[13,56]: + int 1fff00000000000000 <- ( ffff , 00000000000000 ) + +[13,55]: + int 0fff80000000000000 <- ( ffff , 00000000000000 ) + +[13,54]: + int 7ffc0000000000000 <- ( ffff , 00000000000000 ) + +[13,53]: + int 3ffe0000000000000 <- ( ffff , 00000000000000 ) + +[13,52]: + int 1fff0000000000000 <- ( ffff , 0000000000000 ) + +[13,51]: + int 0fff8000000000000 <- ( ffff , 0000000000000 ) + +[13,50]: + int 7ffc000000000000 <- ( ffff , 0000000000000 ) + +[13,49]: + int 3ffe000000000000 <- ( ffff , 0000000000000 ) + +[13,48]: + int 1fff000000000000 <- ( ffff , 000000000000 ) + +[13,47]: + int 0fff800000000000 <- ( ffff , 000000000000 ) + +[13,46]: + int 7ffc00000000000 <- ( ffff , 000000000000 ) + +[13,45]: + int 3ffe00000000000 <- ( ffff , 000000000000 ) + +[13,44]: + int 1fff00000000000 <- ( ffff , 00000000000 ) + +[13,43]: + int 0fff80000000000 <- ( ffff , 00000000000 ) + +[13,42]: + int 7ffc0000000000 <- ( ffff , 00000000000 ) + +[13,41]: + int 3ffe0000000000 <- ( ffff , 00000000000 ) + +[13,40]: + int 1fff0000000000 <- ( ffff , 0000000000 ) + +[13,39]: + int 0fff8000000000 <- ( ffff , 0000000000 ) + +[13,38]: + int 7ffc000000000 <- ( ffff , 0000000000 ) + +[13,37]: + int 3ffe000000000 <- ( ffff , 0000000000 ) + +[13,36]: + int 1fff000000000 <- ( ffff , 000000000 ) + +[13,35]: + int 0fff800000000 <- ( ffff , 000000000 ) + +[13,34]: + int 7ffc00000000 <- ( ffff , 000000000 ) + +[13,33]: + int 3ffe00000000 <- ( ffff , 000000000 ) + +[13,32]: + int 1fff00000000 <- ( ffff , 00000000 ) + +[13,31]: + int 0fff80000000 <- ( ffff , 00000000 ) + +[13,30]: + int 7ffc0000000 <- ( ffff , 00000000 ) + +[13,29]: + int 3ffe0000000 <- ( ffff , 00000000 ) + +[13,28]: + int 1fff0000000 <- ( ffff , 0000000 ) + +[13,27]: + int 0fff8000000 <- ( ffff , 0000000 ) + +[13,26]: + int 7ffc000000 <- ( ffff , 0000000 ) + +[13,25]: + int 3ffe000000 <- ( ffff , 0000000 ) + +[13,24]: + int 1fff000000 <- ( ffff , 000000 ) + +[13,23]: + int 0fff800000 <- ( ffff , 000000 ) + +[13,22]: + int 7ffc00000 <- ( ffff , 000000 ) + +[13,21]: + int 3ffe00000 <- ( ffff , 000000 ) + +[13,20]: + int 1fff00000 <- ( ffff , 00000 ) + +[13,19]: + int 0fff80000 <- ( ffff , 00000 ) + +[13,18]: + int 7ffc0000 <- ( ffff , 00000 ) + +[13,17]: + int 3ffe0000 <- ( ffff , 00000 ) + +[13,16]: + int 1fff0000 <- ( ffff , 0000 ) + +[13,15]: + int 0fff8000 <- ( ffff , 0000 ) + +[13,14]: + int 7ffc000 <- ( ffff , 0000 ) + +[13,13]: + int 3ffe000 <- ( ffff , 0000 ) + +[13,12]: + int 1fff000 <- ( ffff , 000 ) + +[13,11]: + int 0fff800 <- ( ffff , 000 ) + +[13,10]: + int 7ffc00 <- ( ffff , 000 ) + +[13,9]: + int 3ffe00 <- ( ffff , 000 ) + +[13,8]: + int 1fff00 <- ( ffff , 00 ) + +[13,7]: + int 0fff80 <- ( ffff , 00 ) + +[13,6]: + int 7ffc0 <- ( ffff , 00 ) + +[13,5]: + int 3ffe0 <- ( ffff , 00 ) + +[13,4]: + int 1fff0 <- ( ffff , 0 ) + +[13,3]: + int 0fff8 <- ( ffff , 0 ) + +[13,2]: + int 7ffc <- ( ffff , 0 ) + +[13,1]: + int 3ffe <- ( ffff , 0 ) + +[12,64]: + int 0fff0000000000000000 <- ( fff , 0000000000000000 ) + +[12,63]: + int 7ff8000000000000000 <- ( fff , 0000000000000000 ) + +[12,62]: + int 3ffc000000000000000 <- ( fff , 0000000000000000 ) + +[12,61]: + int 1ffe000000000000000 <- ( fff , 0000000000000000 ) + +[12,60]: + int 0fff000000000000000 <- ( fff , 000000000000000 ) + +[12,59]: + int 7ff800000000000000 <- ( fff , 000000000000000 ) + +[12,58]: + int 3ffc00000000000000 <- ( fff , 000000000000000 ) + +[12,57]: + int 1ffe00000000000000 <- ( fff , 000000000000000 ) + +[12,56]: + int 0fff00000000000000 <- ( fff , 00000000000000 ) + +[12,55]: + int 7ff80000000000000 <- ( fff , 00000000000000 ) + +[12,54]: + int 3ffc0000000000000 <- ( fff , 00000000000000 ) + +[12,53]: + int 1ffe0000000000000 <- ( fff , 00000000000000 ) + +[12,52]: + int 0fff0000000000000 <- ( fff , 0000000000000 ) + +[12,51]: + int 7ff8000000000000 <- ( fff , 0000000000000 ) + +[12,50]: + int 3ffc000000000000 <- ( fff , 0000000000000 ) + +[12,49]: + int 1ffe000000000000 <- ( fff , 0000000000000 ) + +[12,48]: + int 0fff000000000000 <- ( fff , 000000000000 ) + +[12,47]: + int 7ff800000000000 <- ( fff , 000000000000 ) + +[12,46]: + int 3ffc00000000000 <- ( fff , 000000000000 ) + +[12,45]: + int 1ffe00000000000 <- ( fff , 000000000000 ) + +[12,44]: + int 0fff00000000000 <- ( fff , 00000000000 ) + +[12,43]: + int 7ff80000000000 <- ( fff , 00000000000 ) + +[12,42]: + int 3ffc0000000000 <- ( fff , 00000000000 ) + +[12,41]: + int 1ffe0000000000 <- ( fff , 00000000000 ) + +[12,40]: + int 0fff0000000000 <- ( fff , 0000000000 ) + +[12,39]: + int 7ff8000000000 <- ( fff , 0000000000 ) + +[12,38]: + int 3ffc000000000 <- ( fff , 0000000000 ) + +[12,37]: + int 1ffe000000000 <- ( fff , 0000000000 ) + +[12,36]: + int 0fff000000000 <- ( fff , 000000000 ) + +[12,35]: + int 7ff800000000 <- ( fff , 000000000 ) + +[12,34]: + int 3ffc00000000 <- ( fff , 000000000 ) + +[12,33]: + int 1ffe00000000 <- ( fff , 000000000 ) + +[12,32]: + int 0fff00000000 <- ( fff , 00000000 ) + +[12,31]: + int 7ff80000000 <- ( fff , 00000000 ) + +[12,30]: + int 3ffc0000000 <- ( fff , 00000000 ) + +[12,29]: + int 1ffe0000000 <- ( fff , 00000000 ) + +[12,28]: + int 0fff0000000 <- ( fff , 0000000 ) + +[12,27]: + int 7ff8000000 <- ( fff , 0000000 ) + +[12,26]: + int 3ffc000000 <- ( fff , 0000000 ) + +[12,25]: + int 1ffe000000 <- ( fff , 0000000 ) + +[12,24]: + int 0fff000000 <- ( fff , 000000 ) + +[12,23]: + int 7ff800000 <- ( fff , 000000 ) + +[12,22]: + int 3ffc00000 <- ( fff , 000000 ) + +[12,21]: + int 1ffe00000 <- ( fff , 000000 ) + +[12,20]: + int 0fff00000 <- ( fff , 00000 ) + +[12,19]: + int 7ff80000 <- ( fff , 00000 ) + +[12,18]: + int 3ffc0000 <- ( fff , 00000 ) + +[12,17]: + int 1ffe0000 <- ( fff , 00000 ) + +[12,16]: + int 0fff0000 <- ( fff , 0000 ) + +[12,15]: + int 7ff8000 <- ( fff , 0000 ) + +[12,14]: + int 3ffc000 <- ( fff , 0000 ) + +[12,13]: + int 1ffe000 <- ( fff , 0000 ) + +[12,12]: + int 0fff000 <- ( fff , 000 ) + +[12,11]: + int 7ff800 <- ( fff , 000 ) + +[12,10]: + int 3ffc00 <- ( fff , 000 ) + +[12,9]: + int 1ffe00 <- ( fff , 000 ) + +[12,8]: + int 0fff00 <- ( fff , 00 ) + +[12,7]: + int 7ff80 <- ( fff , 00 ) + +[12,6]: + int 3ffc0 <- ( fff , 00 ) + +[12,5]: + int 1ffe0 <- ( fff , 00 ) + +[12,4]: + int 0fff0 <- ( fff , 0 ) + +[12,3]: + int 7ff8 <- ( fff , 0 ) + +[12,2]: + int 3ffc <- ( fff , 0 ) + +[12,1]: + int 1ffe <- ( fff , 0 ) + +[11,64]: + int 7ff0000000000000000 <- ( fff , 0000000000000000 ) + +[11,63]: + int 3ff8000000000000000 <- ( fff , 0000000000000000 ) + +[11,62]: + int 1ffc000000000000000 <- ( fff , 0000000000000000 ) + +[11,61]: + int 0ffe000000000000000 <- ( fff , 0000000000000000 ) + +[11,60]: + int 7ff000000000000000 <- ( fff , 000000000000000 ) + +[11,59]: + int 3ff800000000000000 <- ( fff , 000000000000000 ) + +[11,58]: + int 1ffc00000000000000 <- ( fff , 000000000000000 ) + +[11,57]: + int 0ffe00000000000000 <- ( fff , 000000000000000 ) + +[11,56]: + int 7ff00000000000000 <- ( fff , 00000000000000 ) + +[11,55]: + int 3ff80000000000000 <- ( fff , 00000000000000 ) + +[11,54]: + int 1ffc0000000000000 <- ( fff , 00000000000000 ) + +[11,53]: + int 0ffe0000000000000 <- ( fff , 00000000000000 ) + +[11,52]: + int 7ff0000000000000 <- ( fff , 0000000000000 ) + +[11,51]: + int 3ff8000000000000 <- ( fff , 0000000000000 ) + +[11,50]: + int 1ffc000000000000 <- ( fff , 0000000000000 ) + +[11,49]: + int 0ffe000000000000 <- ( fff , 0000000000000 ) + +[11,48]: + int 7ff000000000000 <- ( fff , 000000000000 ) + +[11,47]: + int 3ff800000000000 <- ( fff , 000000000000 ) + +[11,46]: + int 1ffc00000000000 <- ( fff , 000000000000 ) + +[11,45]: + int 0ffe00000000000 <- ( fff , 000000000000 ) + +[11,44]: + int 7ff00000000000 <- ( fff , 00000000000 ) + +[11,43]: + int 3ff80000000000 <- ( fff , 00000000000 ) + +[11,42]: + int 1ffc0000000000 <- ( fff , 00000000000 ) + +[11,41]: + int 0ffe0000000000 <- ( fff , 00000000000 ) + +[11,40]: + int 7ff0000000000 <- ( fff , 0000000000 ) + +[11,39]: + int 3ff8000000000 <- ( fff , 0000000000 ) + +[11,38]: + int 1ffc000000000 <- ( fff , 0000000000 ) + +[11,37]: + int 0ffe000000000 <- ( fff , 0000000000 ) + +[11,36]: + int 7ff000000000 <- ( fff , 000000000 ) + +[11,35]: + int 3ff800000000 <- ( fff , 000000000 ) + +[11,34]: + int 1ffc00000000 <- ( fff , 000000000 ) + +[11,33]: + int 0ffe00000000 <- ( fff , 000000000 ) + +[11,32]: + int 7ff00000000 <- ( fff , 00000000 ) + +[11,31]: + int 3ff80000000 <- ( fff , 00000000 ) + +[11,30]: + int 1ffc0000000 <- ( fff , 00000000 ) + +[11,29]: + int 0ffe0000000 <- ( fff , 00000000 ) + +[11,28]: + int 7ff0000000 <- ( fff , 0000000 ) + +[11,27]: + int 3ff8000000 <- ( fff , 0000000 ) + +[11,26]: + int 1ffc000000 <- ( fff , 0000000 ) + +[11,25]: + int 0ffe000000 <- ( fff , 0000000 ) + +[11,24]: + int 7ff000000 <- ( fff , 000000 ) + +[11,23]: + int 3ff800000 <- ( fff , 000000 ) + +[11,22]: + int 1ffc00000 <- ( fff , 000000 ) + +[11,21]: + int 0ffe00000 <- ( fff , 000000 ) + +[11,20]: + int 7ff00000 <- ( fff , 00000 ) + +[11,19]: + int 3ff80000 <- ( fff , 00000 ) + +[11,18]: + int 1ffc0000 <- ( fff , 00000 ) + +[11,17]: + int 0ffe0000 <- ( fff , 00000 ) + +[11,16]: + int 7ff0000 <- ( fff , 0000 ) + +[11,15]: + int 3ff8000 <- ( fff , 0000 ) + +[11,14]: + int 1ffc000 <- ( fff , 0000 ) + +[11,13]: + int 0ffe000 <- ( fff , 0000 ) + +[11,12]: + int 7ff000 <- ( fff , 000 ) + +[11,11]: + int 3ff800 <- ( fff , 000 ) + +[11,10]: + int 1ffc00 <- ( fff , 000 ) + +[11,9]: + int 0ffe00 <- ( fff , 000 ) + +[11,8]: + int 7ff00 <- ( fff , 00 ) + +[11,7]: + int 3ff80 <- ( fff , 00 ) + +[11,6]: + int 1ffc0 <- ( fff , 00 ) + +[11,5]: + int 0ffe0 <- ( fff , 00 ) + +[11,4]: + int 7ff0 <- ( fff , 0 ) + +[11,3]: + int 3ff8 <- ( fff , 0 ) + +[11,2]: + int 1ffc <- ( fff , 0 ) + +[11,1]: + int 0ffe <- ( fff , 0 ) + +[10,64]: + int 3ff0000000000000000 <- ( fff , 0000000000000000 ) + +[10,63]: + int 1ff8000000000000000 <- ( fff , 0000000000000000 ) + +[10,62]: + int 0ffc000000000000000 <- ( fff , 0000000000000000 ) + +[10,61]: + int 7fe000000000000000 <- ( fff , 0000000000000000 ) + +[10,60]: + int 3ff000000000000000 <- ( fff , 000000000000000 ) + +[10,59]: + int 1ff800000000000000 <- ( fff , 000000000000000 ) + +[10,58]: + int 0ffc00000000000000 <- ( fff , 000000000000000 ) + +[10,57]: + int 7fe00000000000000 <- ( fff , 000000000000000 ) + +[10,56]: + int 3ff00000000000000 <- ( fff , 00000000000000 ) + +[10,55]: + int 1ff80000000000000 <- ( fff , 00000000000000 ) + +[10,54]: + int 0ffc0000000000000 <- ( fff , 00000000000000 ) + +[10,53]: + int 7fe0000000000000 <- ( fff , 00000000000000 ) + +[10,52]: + int 3ff0000000000000 <- ( fff , 0000000000000 ) + +[10,51]: + int 1ff8000000000000 <- ( fff , 0000000000000 ) + +[10,50]: + int 0ffc000000000000 <- ( fff , 0000000000000 ) + +[10,49]: + int 7fe000000000000 <- ( fff , 0000000000000 ) + +[10,48]: + int 3ff000000000000 <- ( fff , 000000000000 ) + +[10,47]: + int 1ff800000000000 <- ( fff , 000000000000 ) + +[10,46]: + int 0ffc00000000000 <- ( fff , 000000000000 ) + +[10,45]: + int 7fe00000000000 <- ( fff , 000000000000 ) + +[10,44]: + int 3ff00000000000 <- ( fff , 00000000000 ) + +[10,43]: + int 1ff80000000000 <- ( fff , 00000000000 ) + +[10,42]: + int 0ffc0000000000 <- ( fff , 00000000000 ) + +[10,41]: + int 7fe0000000000 <- ( fff , 00000000000 ) + +[10,40]: + int 3ff0000000000 <- ( fff , 0000000000 ) + +[10,39]: + int 1ff8000000000 <- ( fff , 0000000000 ) + +[10,38]: + int 0ffc000000000 <- ( fff , 0000000000 ) + +[10,37]: + int 7fe000000000 <- ( fff , 0000000000 ) + +[10,36]: + int 3ff000000000 <- ( fff , 000000000 ) + +[10,35]: + int 1ff800000000 <- ( fff , 000000000 ) + +[10,34]: + int 0ffc00000000 <- ( fff , 000000000 ) + +[10,33]: + int 7fe00000000 <- ( fff , 000000000 ) + +[10,32]: + int 3ff00000000 <- ( fff , 00000000 ) + +[10,31]: + int 1ff80000000 <- ( fff , 00000000 ) + +[10,30]: + int 0ffc0000000 <- ( fff , 00000000 ) + +[10,29]: + int 7fe0000000 <- ( fff , 00000000 ) + +[10,28]: + int 3ff0000000 <- ( fff , 0000000 ) + +[10,27]: + int 1ff8000000 <- ( fff , 0000000 ) + +[10,26]: + int 0ffc000000 <- ( fff , 0000000 ) + +[10,25]: + int 7fe000000 <- ( fff , 0000000 ) + +[10,24]: + int 3ff000000 <- ( fff , 000000 ) + +[10,23]: + int 1ff800000 <- ( fff , 000000 ) + +[10,22]: + int 0ffc00000 <- ( fff , 000000 ) + +[10,21]: + int 7fe00000 <- ( fff , 000000 ) + +[10,20]: + int 3ff00000 <- ( fff , 00000 ) + +[10,19]: + int 1ff80000 <- ( fff , 00000 ) + +[10,18]: + int 0ffc0000 <- ( fff , 00000 ) + +[10,17]: + int 7fe0000 <- ( fff , 00000 ) + +[10,16]: + int 3ff0000 <- ( fff , 0000 ) + +[10,15]: + int 1ff8000 <- ( fff , 0000 ) + +[10,14]: + int 0ffc000 <- ( fff , 0000 ) + +[10,13]: + int 7fe000 <- ( fff , 0000 ) + +[10,12]: + int 3ff000 <- ( fff , 000 ) + +[10,11]: + int 1ff800 <- ( fff , 000 ) + +[10,10]: + int 0ffc00 <- ( fff , 000 ) + +[10,9]: + int 7fe00 <- ( fff , 000 ) + +[10,8]: + int 3ff00 <- ( fff , 00 ) + +[10,7]: + int 1ff80 <- ( fff , 00 ) + +[10,6]: + int 0ffc0 <- ( fff , 00 ) + +[10,5]: + int 7fe0 <- ( fff , 00 ) + +[10,4]: + int 3ff0 <- ( fff , 0 ) + +[10,3]: + int 1ff8 <- ( fff , 0 ) + +[10,2]: + int 0ffc <- ( fff , 0 ) + +[10,1]: + int 7fe <- ( fff , 0 ) + +[9,64]: + int 1ff0000000000000000 <- ( fff , 0000000000000000 ) + +[9,63]: + int 0ff8000000000000000 <- ( fff , 0000000000000000 ) + +[9,62]: + int 7fc000000000000000 <- ( fff , 0000000000000000 ) + +[9,61]: + int 3fe000000000000000 <- ( fff , 0000000000000000 ) + +[9,60]: + int 1ff000000000000000 <- ( fff , 000000000000000 ) + +[9,59]: + int 0ff800000000000000 <- ( fff , 000000000000000 ) + +[9,58]: + int 7fc00000000000000 <- ( fff , 000000000000000 ) + +[9,57]: + int 3fe00000000000000 <- ( fff , 000000000000000 ) + +[9,56]: + int 1ff00000000000000 <- ( fff , 00000000000000 ) + +[9,55]: + int 0ff80000000000000 <- ( fff , 00000000000000 ) + +[9,54]: + int 7fc0000000000000 <- ( fff , 00000000000000 ) + +[9,53]: + int 3fe0000000000000 <- ( fff , 00000000000000 ) + +[9,52]: + int 1ff0000000000000 <- ( fff , 0000000000000 ) + +[9,51]: + int 0ff8000000000000 <- ( fff , 0000000000000 ) + +[9,50]: + int 7fc000000000000 <- ( fff , 0000000000000 ) + +[9,49]: + int 3fe000000000000 <- ( fff , 0000000000000 ) + +[9,48]: + int 1ff000000000000 <- ( fff , 000000000000 ) + +[9,47]: + int 0ff800000000000 <- ( fff , 000000000000 ) + +[9,46]: + int 7fc00000000000 <- ( fff , 000000000000 ) + +[9,45]: + int 3fe00000000000 <- ( fff , 000000000000 ) + +[9,44]: + int 1ff00000000000 <- ( fff , 00000000000 ) + +[9,43]: + int 0ff80000000000 <- ( fff , 00000000000 ) + +[9,42]: + int 7fc0000000000 <- ( fff , 00000000000 ) + +[9,41]: + int 3fe0000000000 <- ( fff , 00000000000 ) + +[9,40]: + int 1ff0000000000 <- ( fff , 0000000000 ) + +[9,39]: + int 0ff8000000000 <- ( fff , 0000000000 ) + +[9,38]: + int 7fc000000000 <- ( fff , 0000000000 ) + +[9,37]: + int 3fe000000000 <- ( fff , 0000000000 ) + +[9,36]: + int 1ff000000000 <- ( fff , 000000000 ) + +[9,35]: + int 0ff800000000 <- ( fff , 000000000 ) + +[9,34]: + int 7fc00000000 <- ( fff , 000000000 ) + +[9,33]: + int 3fe00000000 <- ( fff , 000000000 ) + +[9,32]: + int 1ff00000000 <- ( fff , 00000000 ) + +[9,31]: + int 0ff80000000 <- ( fff , 00000000 ) + +[9,30]: + int 7fc0000000 <- ( fff , 00000000 ) + +[9,29]: + int 3fe0000000 <- ( fff , 00000000 ) + +[9,28]: + int 1ff0000000 <- ( fff , 0000000 ) + +[9,27]: + int 0ff8000000 <- ( fff , 0000000 ) + +[9,26]: + int 7fc000000 <- ( fff , 0000000 ) + +[9,25]: + int 3fe000000 <- ( fff , 0000000 ) + +[9,24]: + int 1ff000000 <- ( fff , 000000 ) + +[9,23]: + int 0ff800000 <- ( fff , 000000 ) + +[9,22]: + int 7fc00000 <- ( fff , 000000 ) + +[9,21]: + int 3fe00000 <- ( fff , 000000 ) + +[9,20]: + int 1ff00000 <- ( fff , 00000 ) + +[9,19]: + int 0ff80000 <- ( fff , 00000 ) + +[9,18]: + int 7fc0000 <- ( fff , 00000 ) + +[9,17]: + int 3fe0000 <- ( fff , 00000 ) + +[9,16]: + int 1ff0000 <- ( fff , 0000 ) + +[9,15]: + int 0ff8000 <- ( fff , 0000 ) + +[9,14]: + int 7fc000 <- ( fff , 0000 ) + +[9,13]: + int 3fe000 <- ( fff , 0000 ) + +[9,12]: + int 1ff000 <- ( fff , 000 ) + +[9,11]: + int 0ff800 <- ( fff , 000 ) + +[9,10]: + int 7fc00 <- ( fff , 000 ) + +[9,9]: + int 3fe00 <- ( fff , 000 ) + +[9,8]: + int 1ff00 <- ( fff , 00 ) + +[9,7]: + int 0ff80 <- ( fff , 00 ) + +[9,6]: + int 7fc0 <- ( fff , 00 ) + +[9,5]: + int 3fe0 <- ( fff , 00 ) + +[9,4]: + int 1ff0 <- ( fff , 0 ) + +[9,3]: + int 0ff8 <- ( fff , 0 ) + +[9,2]: + int 7fc <- ( fff , 0 ) + +[9,1]: + int 3fe <- ( fff , 0 ) + +[8,64]: + int 0ff0000000000000000 <- ( ff , 0000000000000000 ) + +[8,63]: + int 7f8000000000000000 <- ( ff , 0000000000000000 ) + +[8,62]: + int 3fc000000000000000 <- ( ff , 0000000000000000 ) + +[8,61]: + int 1fe000000000000000 <- ( ff , 0000000000000000 ) + +[8,60]: + int 0ff000000000000000 <- ( ff , 000000000000000 ) + +[8,59]: + int 7f800000000000000 <- ( ff , 000000000000000 ) + +[8,58]: + int 3fc00000000000000 <- ( ff , 000000000000000 ) + +[8,57]: + int 1fe00000000000000 <- ( ff , 000000000000000 ) + +[8,56]: + int 0ff00000000000000 <- ( ff , 00000000000000 ) + +[8,55]: + int 7f80000000000000 <- ( ff , 00000000000000 ) + +[8,54]: + int 3fc0000000000000 <- ( ff , 00000000000000 ) + +[8,53]: + int 1fe0000000000000 <- ( ff , 00000000000000 ) + +[8,52]: + int 0ff0000000000000 <- ( ff , 0000000000000 ) + +[8,51]: + int 7f8000000000000 <- ( ff , 0000000000000 ) + +[8,50]: + int 3fc000000000000 <- ( ff , 0000000000000 ) + +[8,49]: + int 1fe000000000000 <- ( ff , 0000000000000 ) + +[8,48]: + int 0ff000000000000 <- ( ff , 000000000000 ) + +[8,47]: + int 7f800000000000 <- ( ff , 000000000000 ) + +[8,46]: + int 3fc00000000000 <- ( ff , 000000000000 ) + +[8,45]: + int 1fe00000000000 <- ( ff , 000000000000 ) + +[8,44]: + int 0ff00000000000 <- ( ff , 00000000000 ) + +[8,43]: + int 7f80000000000 <- ( ff , 00000000000 ) + +[8,42]: + int 3fc0000000000 <- ( ff , 00000000000 ) + +[8,41]: + int 1fe0000000000 <- ( ff , 00000000000 ) + +[8,40]: + int 0ff0000000000 <- ( ff , 0000000000 ) + +[8,39]: + int 7f8000000000 <- ( ff , 0000000000 ) + +[8,38]: + int 3fc000000000 <- ( ff , 0000000000 ) + +[8,37]: + int 1fe000000000 <- ( ff , 0000000000 ) + +[8,36]: + int 0ff000000000 <- ( ff , 000000000 ) + +[8,35]: + int 7f800000000 <- ( ff , 000000000 ) + +[8,34]: + int 3fc00000000 <- ( ff , 000000000 ) + +[8,33]: + int 1fe00000000 <- ( ff , 000000000 ) + +[8,32]: + int 0ff00000000 <- ( ff , 00000000 ) + +[8,31]: + int 7f80000000 <- ( ff , 00000000 ) + +[8,30]: + int 3fc0000000 <- ( ff , 00000000 ) + +[8,29]: + int 1fe0000000 <- ( ff , 00000000 ) + +[8,28]: + int 0ff0000000 <- ( ff , 0000000 ) + +[8,27]: + int 7f8000000 <- ( ff , 0000000 ) + +[8,26]: + int 3fc000000 <- ( ff , 0000000 ) + +[8,25]: + int 1fe000000 <- ( ff , 0000000 ) + +[8,24]: + int 0ff000000 <- ( ff , 000000 ) + +[8,23]: + int 7f800000 <- ( ff , 000000 ) + +[8,22]: + int 3fc00000 <- ( ff , 000000 ) + +[8,21]: + int 1fe00000 <- ( ff , 000000 ) + +[8,20]: + int 0ff00000 <- ( ff , 00000 ) + +[8,19]: + int 7f80000 <- ( ff , 00000 ) + +[8,18]: + int 3fc0000 <- ( ff , 00000 ) + +[8,17]: + int 1fe0000 <- ( ff , 00000 ) + +[8,16]: + int 0ff0000 <- ( ff , 0000 ) + +[8,15]: + int 7f8000 <- ( ff , 0000 ) + +[8,14]: + int 3fc000 <- ( ff , 0000 ) + +[8,13]: + int 1fe000 <- ( ff , 0000 ) + +[8,12]: + int 0ff000 <- ( ff , 000 ) + +[8,11]: + int 7f800 <- ( ff , 000 ) + +[8,10]: + int 3fc00 <- ( ff , 000 ) + +[8,9]: + int 1fe00 <- ( ff , 000 ) + +[8,8]: + int 0ff00 <- ( ff , 00 ) + +[8,7]: + int 7f80 <- ( ff , 00 ) + +[8,6]: + int 3fc0 <- ( ff , 00 ) + +[8,5]: + int 1fe0 <- ( ff , 00 ) + +[8,4]: + int 0ff0 <- ( ff , 0 ) + +[8,3]: + int 7f8 <- ( ff , 0 ) + +[8,2]: + int 3fc <- ( ff , 0 ) + +[8,1]: + int 1fe <- ( ff , 0 ) + +[7,64]: + int 7f0000000000000000 <- ( ff , 0000000000000000 ) + +[7,63]: + int 3f8000000000000000 <- ( ff , 0000000000000000 ) + +[7,62]: + int 1fc000000000000000 <- ( ff , 0000000000000000 ) + +[7,61]: + int 0fe000000000000000 <- ( ff , 0000000000000000 ) + +[7,60]: + int 7f000000000000000 <- ( ff , 000000000000000 ) + +[7,59]: + int 3f800000000000000 <- ( ff , 000000000000000 ) + +[7,58]: + int 1fc00000000000000 <- ( ff , 000000000000000 ) + +[7,57]: + int 0fe00000000000000 <- ( ff , 000000000000000 ) + +[7,56]: + int 7f00000000000000 <- ( ff , 00000000000000 ) + +[7,55]: + int 3f80000000000000 <- ( ff , 00000000000000 ) + +[7,54]: + int 1fc0000000000000 <- ( ff , 00000000000000 ) + +[7,53]: + int 0fe0000000000000 <- ( ff , 00000000000000 ) + +[7,52]: + int 7f0000000000000 <- ( ff , 0000000000000 ) + +[7,51]: + int 3f8000000000000 <- ( ff , 0000000000000 ) + +[7,50]: + int 1fc000000000000 <- ( ff , 0000000000000 ) + +[7,49]: + int 0fe000000000000 <- ( ff , 0000000000000 ) + +[7,48]: + int 7f000000000000 <- ( ff , 000000000000 ) + +[7,47]: + int 3f800000000000 <- ( ff , 000000000000 ) + +[7,46]: + int 1fc00000000000 <- ( ff , 000000000000 ) + +[7,45]: + int 0fe00000000000 <- ( ff , 000000000000 ) + +[7,44]: + int 7f00000000000 <- ( ff , 00000000000 ) + +[7,43]: + int 3f80000000000 <- ( ff , 00000000000 ) + +[7,42]: + int 1fc0000000000 <- ( ff , 00000000000 ) + +[7,41]: + int 0fe0000000000 <- ( ff , 00000000000 ) + +[7,40]: + int 7f0000000000 <- ( ff , 0000000000 ) + +[7,39]: + int 3f8000000000 <- ( ff , 0000000000 ) + +[7,38]: + int 1fc000000000 <- ( ff , 0000000000 ) + +[7,37]: + int 0fe000000000 <- ( ff , 0000000000 ) + +[7,36]: + int 7f000000000 <- ( ff , 000000000 ) + +[7,35]: + int 3f800000000 <- ( ff , 000000000 ) + +[7,34]: + int 1fc00000000 <- ( ff , 000000000 ) + +[7,33]: + int 0fe00000000 <- ( ff , 000000000 ) + +[7,32]: + int 7f00000000 <- ( ff , 00000000 ) + +[7,31]: + int 3f80000000 <- ( ff , 00000000 ) + +[7,30]: + int 1fc0000000 <- ( ff , 00000000 ) + +[7,29]: + int 0fe0000000 <- ( ff , 00000000 ) + +[7,28]: + int 7f0000000 <- ( ff , 0000000 ) + +[7,27]: + int 3f8000000 <- ( ff , 0000000 ) + +[7,26]: + int 1fc000000 <- ( ff , 0000000 ) + +[7,25]: + int 0fe000000 <- ( ff , 0000000 ) + +[7,24]: + int 7f000000 <- ( ff , 000000 ) + +[7,23]: + int 3f800000 <- ( ff , 000000 ) + +[7,22]: + int 1fc00000 <- ( ff , 000000 ) + +[7,21]: + int 0fe00000 <- ( ff , 000000 ) + +[7,20]: + int 7f00000 <- ( ff , 00000 ) + +[7,19]: + int 3f80000 <- ( ff , 00000 ) + +[7,18]: + int 1fc0000 <- ( ff , 00000 ) + +[7,17]: + int 0fe0000 <- ( ff , 00000 ) + +[7,16]: + int 7f0000 <- ( ff , 0000 ) + +[7,15]: + int 3f8000 <- ( ff , 0000 ) + +[7,14]: + int 1fc000 <- ( ff , 0000 ) + +[7,13]: + int 0fe000 <- ( ff , 0000 ) + +[7,12]: + int 7f000 <- ( ff , 000 ) + +[7,11]: + int 3f800 <- ( ff , 000 ) + +[7,10]: + int 1fc00 <- ( ff , 000 ) + +[7,9]: + int 0fe00 <- ( ff , 000 ) + +[7,8]: + int 7f00 <- ( ff , 00 ) + +[7,7]: + int 3f80 <- ( ff , 00 ) + +[7,6]: + int 1fc0 <- ( ff , 00 ) + +[7,5]: + int 0fe0 <- ( ff , 00 ) + +[7,4]: + int 7f0 <- ( ff , 0 ) + +[7,3]: + int 3f8 <- ( ff , 0 ) + +[7,2]: + int 1fc <- ( ff , 0 ) + +[7,1]: + int 0fe <- ( ff , 0 ) + +[6,64]: + int 3f0000000000000000 <- ( ff , 0000000000000000 ) + +[6,63]: + int 1f8000000000000000 <- ( ff , 0000000000000000 ) + +[6,62]: + int 0fc000000000000000 <- ( ff , 0000000000000000 ) + +[6,61]: + int 7e000000000000000 <- ( ff , 0000000000000000 ) + +[6,60]: + int 3f000000000000000 <- ( ff , 000000000000000 ) + +[6,59]: + int 1f800000000000000 <- ( ff , 000000000000000 ) + +[6,58]: + int 0fc00000000000000 <- ( ff , 000000000000000 ) + +[6,57]: + int 7e00000000000000 <- ( ff , 000000000000000 ) + +[6,56]: + int 3f00000000000000 <- ( ff , 00000000000000 ) + +[6,55]: + int 1f80000000000000 <- ( ff , 00000000000000 ) + +[6,54]: + int 0fc0000000000000 <- ( ff , 00000000000000 ) + +[6,53]: + int 7e0000000000000 <- ( ff , 00000000000000 ) + +[6,52]: + int 3f0000000000000 <- ( ff , 0000000000000 ) + +[6,51]: + int 1f8000000000000 <- ( ff , 0000000000000 ) + +[6,50]: + int 0fc000000000000 <- ( ff , 0000000000000 ) + +[6,49]: + int 7e000000000000 <- ( ff , 0000000000000 ) + +[6,48]: + int 3f000000000000 <- ( ff , 000000000000 ) + +[6,47]: + int 1f800000000000 <- ( ff , 000000000000 ) + +[6,46]: + int 0fc00000000000 <- ( ff , 000000000000 ) + +[6,45]: + int 7e00000000000 <- ( ff , 000000000000 ) + +[6,44]: + int 3f00000000000 <- ( ff , 00000000000 ) + +[6,43]: + int 1f80000000000 <- ( ff , 00000000000 ) + +[6,42]: + int 0fc0000000000 <- ( ff , 00000000000 ) + +[6,41]: + int 7e0000000000 <- ( ff , 00000000000 ) + +[6,40]: + int 3f0000000000 <- ( ff , 0000000000 ) + +[6,39]: + int 1f8000000000 <- ( ff , 0000000000 ) + +[6,38]: + int 0fc000000000 <- ( ff , 0000000000 ) + +[6,37]: + int 7e000000000 <- ( ff , 0000000000 ) + +[6,36]: + int 3f000000000 <- ( ff , 000000000 ) + +[6,35]: + int 1f800000000 <- ( ff , 000000000 ) + +[6,34]: + int 0fc00000000 <- ( ff , 000000000 ) + +[6,33]: + int 7e00000000 <- ( ff , 000000000 ) + +[6,32]: + int 3f00000000 <- ( ff , 00000000 ) + +[6,31]: + int 1f80000000 <- ( ff , 00000000 ) + +[6,30]: + int 0fc0000000 <- ( ff , 00000000 ) + +[6,29]: + int 7e0000000 <- ( ff , 00000000 ) + +[6,28]: + int 3f0000000 <- ( ff , 0000000 ) + +[6,27]: + int 1f8000000 <- ( ff , 0000000 ) + +[6,26]: + int 0fc000000 <- ( ff , 0000000 ) + +[6,25]: + int 7e000000 <- ( ff , 0000000 ) + +[6,24]: + int 3f000000 <- ( ff , 000000 ) + +[6,23]: + int 1f800000 <- ( ff , 000000 ) + +[6,22]: + int 0fc00000 <- ( ff , 000000 ) + +[6,21]: + int 7e00000 <- ( ff , 000000 ) + +[6,20]: + int 3f00000 <- ( ff , 00000 ) + +[6,19]: + int 1f80000 <- ( ff , 00000 ) + +[6,18]: + int 0fc0000 <- ( ff , 00000 ) + +[6,17]: + int 7e0000 <- ( ff , 00000 ) + +[6,16]: + int 3f0000 <- ( ff , 0000 ) + +[6,15]: + int 1f8000 <- ( ff , 0000 ) + +[6,14]: + int 0fc000 <- ( ff , 0000 ) + +[6,13]: + int 7e000 <- ( ff , 0000 ) + +[6,12]: + int 3f000 <- ( ff , 000 ) + +[6,11]: + int 1f800 <- ( ff , 000 ) + +[6,10]: + int 0fc00 <- ( ff , 000 ) + +[6,9]: + int 7e00 <- ( ff , 000 ) + +[6,8]: + int 3f00 <- ( ff , 00 ) + +[6,7]: + int 1f80 <- ( ff , 00 ) + +[6,6]: + int 0fc0 <- ( ff , 00 ) + +[6,5]: + int 7e0 <- ( ff , 00 ) + +[6,4]: + int 3f0 <- ( ff , 0 ) + +[6,3]: + int 1f8 <- ( ff , 0 ) + +[6,2]: + int 0fc <- ( ff , 0 ) + +[6,1]: + int 7e <- ( ff , 0 ) + +[5,64]: + int 1f0000000000000000 <- ( ff , 0000000000000000 ) + +[5,63]: + int 0f8000000000000000 <- ( ff , 0000000000000000 ) + +[5,62]: + int 7c000000000000000 <- ( ff , 0000000000000000 ) + +[5,61]: + int 3e000000000000000 <- ( ff , 0000000000000000 ) + +[5,60]: + int 1f000000000000000 <- ( ff , 000000000000000 ) + +[5,59]: + int 0f800000000000000 <- ( ff , 000000000000000 ) + +[5,58]: + int 7c00000000000000 <- ( ff , 000000000000000 ) + +[5,57]: + int 3e00000000000000 <- ( ff , 000000000000000 ) + +[5,56]: + int 1f00000000000000 <- ( ff , 00000000000000 ) + +[5,55]: + int 0f80000000000000 <- ( ff , 00000000000000 ) + +[5,54]: + int 7c0000000000000 <- ( ff , 00000000000000 ) + +[5,53]: + int 3e0000000000000 <- ( ff , 00000000000000 ) + +[5,52]: + int 1f0000000000000 <- ( ff , 0000000000000 ) + +[5,51]: + int 0f8000000000000 <- ( ff , 0000000000000 ) + +[5,50]: + int 7c000000000000 <- ( ff , 0000000000000 ) + +[5,49]: + int 3e000000000000 <- ( ff , 0000000000000 ) + +[5,48]: + int 1f000000000000 <- ( ff , 000000000000 ) + +[5,47]: + int 0f800000000000 <- ( ff , 000000000000 ) + +[5,46]: + int 7c00000000000 <- ( ff , 000000000000 ) + +[5,45]: + int 3e00000000000 <- ( ff , 000000000000 ) + +[5,44]: + int 1f00000000000 <- ( ff , 00000000000 ) + +[5,43]: + int 0f80000000000 <- ( ff , 00000000000 ) + +[5,42]: + int 7c0000000000 <- ( ff , 00000000000 ) + +[5,41]: + int 3e0000000000 <- ( ff , 00000000000 ) + +[5,40]: + int 1f0000000000 <- ( ff , 0000000000 ) + +[5,39]: + int 0f8000000000 <- ( ff , 0000000000 ) + +[5,38]: + int 7c000000000 <- ( ff , 0000000000 ) + +[5,37]: + int 3e000000000 <- ( ff , 0000000000 ) + +[5,36]: + int 1f000000000 <- ( ff , 000000000 ) + +[5,35]: + int 0f800000000 <- ( ff , 000000000 ) + +[5,34]: + int 7c00000000 <- ( ff , 000000000 ) + +[5,33]: + int 3e00000000 <- ( ff , 000000000 ) + +[5,32]: + int 1f00000000 <- ( ff , 00000000 ) + +[5,31]: + int 0f80000000 <- ( ff , 00000000 ) + +[5,30]: + int 7c0000000 <- ( ff , 00000000 ) + +[5,29]: + int 3e0000000 <- ( ff , 00000000 ) + +[5,28]: + int 1f0000000 <- ( ff , 0000000 ) + +[5,27]: + int 0f8000000 <- ( ff , 0000000 ) + +[5,26]: + int 7c000000 <- ( ff , 0000000 ) + +[5,25]: + int 3e000000 <- ( ff , 0000000 ) + +[5,24]: + int 1f000000 <- ( ff , 000000 ) + +[5,23]: + int 0f800000 <- ( ff , 000000 ) + +[5,22]: + int 7c00000 <- ( ff , 000000 ) + +[5,21]: + int 3e00000 <- ( ff , 000000 ) + +[5,20]: + int 1f00000 <- ( ff , 00000 ) + +[5,19]: + int 0f80000 <- ( ff , 00000 ) + +[5,18]: + int 7c0000 <- ( ff , 00000 ) + +[5,17]: + int 3e0000 <- ( ff , 00000 ) + +[5,16]: + int 1f0000 <- ( ff , 0000 ) + +[5,15]: + int 0f8000 <- ( ff , 0000 ) + +[5,14]: + int 7c000 <- ( ff , 0000 ) + +[5,13]: + int 3e000 <- ( ff , 0000 ) + +[5,12]: + int 1f000 <- ( ff , 000 ) + +[5,11]: + int 0f800 <- ( ff , 000 ) + +[5,10]: + int 7c00 <- ( ff , 000 ) + +[5,9]: + int 3e00 <- ( ff , 000 ) + +[5,8]: + int 1f00 <- ( ff , 00 ) + +[5,7]: + int 0f80 <- ( ff , 00 ) + +[5,6]: + int 7c0 <- ( ff , 00 ) + +[5,5]: + int 3e0 <- ( ff , 00 ) + +[5,4]: + int 1f0 <- ( ff , 0 ) + +[5,3]: + int 0f8 <- ( ff , 0 ) + +[5,2]: + int 7c <- ( ff , 0 ) + +[5,1]: + int 3e <- ( ff , 0 ) + +[4,64]: + int 0f0000000000000000 <- ( f , 0000000000000000 ) + +[4,63]: + int 78000000000000000 <- ( f , 0000000000000000 ) + +[4,62]: + int 3c000000000000000 <- ( f , 0000000000000000 ) + +[4,61]: + int 1e000000000000000 <- ( f , 0000000000000000 ) + +[4,60]: + int 0f000000000000000 <- ( f , 000000000000000 ) + +[4,59]: + int 7800000000000000 <- ( f , 000000000000000 ) + +[4,58]: + int 3c00000000000000 <- ( f , 000000000000000 ) + +[4,57]: + int 1e00000000000000 <- ( f , 000000000000000 ) + +[4,56]: + int 0f00000000000000 <- ( f , 00000000000000 ) + +[4,55]: + int 780000000000000 <- ( f , 00000000000000 ) + +[4,54]: + int 3c0000000000000 <- ( f , 00000000000000 ) + +[4,53]: + int 1e0000000000000 <- ( f , 00000000000000 ) + +[4,52]: + int 0f0000000000000 <- ( f , 0000000000000 ) + +[4,51]: + int 78000000000000 <- ( f , 0000000000000 ) + +[4,50]: + int 3c000000000000 <- ( f , 0000000000000 ) + +[4,49]: + int 1e000000000000 <- ( f , 0000000000000 ) + +[4,48]: + int 0f000000000000 <- ( f , 000000000000 ) + +[4,47]: + int 7800000000000 <- ( f , 000000000000 ) + +[4,46]: + int 3c00000000000 <- ( f , 000000000000 ) + +[4,45]: + int 1e00000000000 <- ( f , 000000000000 ) + +[4,44]: + int 0f00000000000 <- ( f , 00000000000 ) + +[4,43]: + int 780000000000 <- ( f , 00000000000 ) + +[4,42]: + int 3c0000000000 <- ( f , 00000000000 ) + +[4,41]: + int 1e0000000000 <- ( f , 00000000000 ) + +[4,40]: + int 0f0000000000 <- ( f , 0000000000 ) + +[4,39]: + int 78000000000 <- ( f , 0000000000 ) + +[4,38]: + int 3c000000000 <- ( f , 0000000000 ) + +[4,37]: + int 1e000000000 <- ( f , 0000000000 ) + +[4,36]: + int 0f000000000 <- ( f , 000000000 ) + +[4,35]: + int 7800000000 <- ( f , 000000000 ) + +[4,34]: + int 3c00000000 <- ( f , 000000000 ) + +[4,33]: + int 1e00000000 <- ( f , 000000000 ) + +[4,32]: + int 0f00000000 <- ( f , 00000000 ) + +[4,31]: + int 780000000 <- ( f , 00000000 ) + +[4,30]: + int 3c0000000 <- ( f , 00000000 ) + +[4,29]: + int 1e0000000 <- ( f , 00000000 ) + +[4,28]: + int 0f0000000 <- ( f , 0000000 ) + +[4,27]: + int 78000000 <- ( f , 0000000 ) + +[4,26]: + int 3c000000 <- ( f , 0000000 ) + +[4,25]: + int 1e000000 <- ( f , 0000000 ) + +[4,24]: + int 0f000000 <- ( f , 000000 ) + +[4,23]: + int 7800000 <- ( f , 000000 ) + +[4,22]: + int 3c00000 <- ( f , 000000 ) + +[4,21]: + int 1e00000 <- ( f , 000000 ) + +[4,20]: + int 0f00000 <- ( f , 00000 ) + +[4,19]: + int 780000 <- ( f , 00000 ) + +[4,18]: + int 3c0000 <- ( f , 00000 ) + +[4,17]: + int 1e0000 <- ( f , 00000 ) + +[4,16]: + int 0f0000 <- ( f , 0000 ) + +[4,15]: + int 78000 <- ( f , 0000 ) + +[4,14]: + int 3c000 <- ( f , 0000 ) + +[4,13]: + int 1e000 <- ( f , 0000 ) + +[4,12]: + int 0f000 <- ( f , 000 ) + +[4,11]: + int 7800 <- ( f , 000 ) + +[4,10]: + int 3c00 <- ( f , 000 ) + +[4,9]: + int 1e00 <- ( f , 000 ) + +[4,8]: + int 0f00 <- ( f , 00 ) + +[4,7]: + int 780 <- ( f , 00 ) + +[4,6]: + int 3c0 <- ( f , 00 ) + +[4,5]: + int 1e0 <- ( f , 00 ) + +[4,4]: + int 0f0 <- ( f , 0 ) + +[4,3]: + int 78 <- ( f , 0 ) + +[4,2]: + int 3c <- ( f , 0 ) + +[4,1]: + int 1e <- ( f , 0 ) + +[3,64]: + int 70000000000000000 <- ( f , 0000000000000000 ) + +[3,63]: + int 38000000000000000 <- ( f , 0000000000000000 ) + +[3,62]: + int 1c000000000000000 <- ( f , 0000000000000000 ) + +[3,61]: + int 0e000000000000000 <- ( f , 0000000000000000 ) + +[3,60]: + int 7000000000000000 <- ( f , 000000000000000 ) + +[3,59]: + int 3800000000000000 <- ( f , 000000000000000 ) + +[3,58]: + int 1c00000000000000 <- ( f , 000000000000000 ) + +[3,57]: + int 0e00000000000000 <- ( f , 000000000000000 ) + +[3,56]: + int 700000000000000 <- ( f , 00000000000000 ) + +[3,55]: + int 380000000000000 <- ( f , 00000000000000 ) + +[3,54]: + int 1c0000000000000 <- ( f , 00000000000000 ) + +[3,53]: + int 0e0000000000000 <- ( f , 00000000000000 ) + +[3,52]: + int 70000000000000 <- ( f , 0000000000000 ) + +[3,51]: + int 38000000000000 <- ( f , 0000000000000 ) + +[3,50]: + int 1c000000000000 <- ( f , 0000000000000 ) + +[3,49]: + int 0e000000000000 <- ( f , 0000000000000 ) + +[3,48]: + int 7000000000000 <- ( f , 000000000000 ) + +[3,47]: + int 3800000000000 <- ( f , 000000000000 ) + +[3,46]: + int 1c00000000000 <- ( f , 000000000000 ) + +[3,45]: + int 0e00000000000 <- ( f , 000000000000 ) + +[3,44]: + int 700000000000 <- ( f , 00000000000 ) + +[3,43]: + int 380000000000 <- ( f , 00000000000 ) + +[3,42]: + int 1c0000000000 <- ( f , 00000000000 ) + +[3,41]: + int 0e0000000000 <- ( f , 00000000000 ) + +[3,40]: + int 70000000000 <- ( f , 0000000000 ) + +[3,39]: + int 38000000000 <- ( f , 0000000000 ) + +[3,38]: + int 1c000000000 <- ( f , 0000000000 ) + +[3,37]: + int 0e000000000 <- ( f , 0000000000 ) + +[3,36]: + int 7000000000 <- ( f , 000000000 ) + +[3,35]: + int 3800000000 <- ( f , 000000000 ) + +[3,34]: + int 1c00000000 <- ( f , 000000000 ) + +[3,33]: + int 0e00000000 <- ( f , 000000000 ) + +[3,32]: + int 700000000 <- ( f , 00000000 ) + +[3,31]: + int 380000000 <- ( f , 00000000 ) + +[3,30]: + int 1c0000000 <- ( f , 00000000 ) + +[3,29]: + int 0e0000000 <- ( f , 00000000 ) + +[3,28]: + int 70000000 <- ( f , 0000000 ) + +[3,27]: + int 38000000 <- ( f , 0000000 ) + +[3,26]: + int 1c000000 <- ( f , 0000000 ) + +[3,25]: + int 0e000000 <- ( f , 0000000 ) + +[3,24]: + int 7000000 <- ( f , 000000 ) + +[3,23]: + int 3800000 <- ( f , 000000 ) + +[3,22]: + int 1c00000 <- ( f , 000000 ) + +[3,21]: + int 0e00000 <- ( f , 000000 ) + +[3,20]: + int 700000 <- ( f , 00000 ) + +[3,19]: + int 380000 <- ( f , 00000 ) + +[3,18]: + int 1c0000 <- ( f , 00000 ) + +[3,17]: + int 0e0000 <- ( f , 00000 ) + +[3,16]: + int 70000 <- ( f , 0000 ) + +[3,15]: + int 38000 <- ( f , 0000 ) + +[3,14]: + int 1c000 <- ( f , 0000 ) + +[3,13]: + int 0e000 <- ( f , 0000 ) + +[3,12]: + int 7000 <- ( f , 000 ) + +[3,11]: + int 3800 <- ( f , 000 ) + +[3,10]: + int 1c00 <- ( f , 000 ) + +[3,9]: + int 0e00 <- ( f , 000 ) + +[3,8]: + int 700 <- ( f , 00 ) + +[3,7]: + int 380 <- ( f , 00 ) + +[3,6]: + int 1c0 <- ( f , 00 ) + +[3,5]: + int 0e0 <- ( f , 00 ) + +[3,4]: + int 70 <- ( f , 0 ) + +[3,3]: + int 38 <- ( f , 0 ) + +[3,2]: + int 1c <- ( f , 0 ) + +[3,1]: + int 0e <- ( f , 0 ) + +[2,64]: + int 30000000000000000 <- ( f , 0000000000000000 ) + +[2,63]: + int 18000000000000000 <- ( f , 0000000000000000 ) + +[2,62]: + int 0c000000000000000 <- ( f , 0000000000000000 ) + +[2,61]: + int 6000000000000000 <- ( f , 0000000000000000 ) + +[2,60]: + int 3000000000000000 <- ( f , 000000000000000 ) + +[2,59]: + int 1800000000000000 <- ( f , 000000000000000 ) + +[2,58]: + int 0c00000000000000 <- ( f , 000000000000000 ) + +[2,57]: + int 600000000000000 <- ( f , 000000000000000 ) + +[2,56]: + int 300000000000000 <- ( f , 00000000000000 ) + +[2,55]: + int 180000000000000 <- ( f , 00000000000000 ) + +[2,54]: + int 0c0000000000000 <- ( f , 00000000000000 ) + +[2,53]: + int 60000000000000 <- ( f , 00000000000000 ) + +[2,52]: + int 30000000000000 <- ( f , 0000000000000 ) + +[2,51]: + int 18000000000000 <- ( f , 0000000000000 ) + +[2,50]: + int 0c000000000000 <- ( f , 0000000000000 ) + +[2,49]: + int 6000000000000 <- ( f , 0000000000000 ) + +[2,48]: + int 3000000000000 <- ( f , 000000000000 ) + +[2,47]: + int 1800000000000 <- ( f , 000000000000 ) + +[2,46]: + int 0c00000000000 <- ( f , 000000000000 ) + +[2,45]: + int 600000000000 <- ( f , 000000000000 ) + +[2,44]: + int 300000000000 <- ( f , 00000000000 ) + +[2,43]: + int 180000000000 <- ( f , 00000000000 ) + +[2,42]: + int 0c0000000000 <- ( f , 00000000000 ) + +[2,41]: + int 60000000000 <- ( f , 00000000000 ) + +[2,40]: + int 30000000000 <- ( f , 0000000000 ) + +[2,39]: + int 18000000000 <- ( f , 0000000000 ) + +[2,38]: + int 0c000000000 <- ( f , 0000000000 ) + +[2,37]: + int 6000000000 <- ( f , 0000000000 ) + +[2,36]: + int 3000000000 <- ( f , 000000000 ) + +[2,35]: + int 1800000000 <- ( f , 000000000 ) + +[2,34]: + int 0c00000000 <- ( f , 000000000 ) + +[2,33]: + int 600000000 <- ( f , 000000000 ) + +[2,32]: + int 300000000 <- ( f , 00000000 ) + +[2,31]: + int 180000000 <- ( f , 00000000 ) + +[2,30]: + int 0c0000000 <- ( f , 00000000 ) + +[2,29]: + int 60000000 <- ( f , 00000000 ) + +[2,28]: + int 30000000 <- ( f , 0000000 ) + +[2,27]: + int 18000000 <- ( f , 0000000 ) + +[2,26]: + int 0c000000 <- ( f , 0000000 ) + +[2,25]: + int 6000000 <- ( f , 0000000 ) + +[2,24]: + int 3000000 <- ( f , 000000 ) + +[2,23]: + int 1800000 <- ( f , 000000 ) + +[2,22]: + int 0c00000 <- ( f , 000000 ) + +[2,21]: + int 600000 <- ( f , 000000 ) + +[2,20]: + int 300000 <- ( f , 00000 ) + +[2,19]: + int 180000 <- ( f , 00000 ) + +[2,18]: + int 0c0000 <- ( f , 00000 ) + +[2,17]: + int 60000 <- ( f , 00000 ) + +[2,16]: + int 30000 <- ( f , 0000 ) + +[2,15]: + int 18000 <- ( f , 0000 ) + +[2,14]: + int 0c000 <- ( f , 0000 ) + +[2,13]: + int 6000 <- ( f , 0000 ) + +[2,12]: + int 3000 <- ( f , 000 ) + +[2,11]: + int 1800 <- ( f , 000 ) + +[2,10]: + int 0c00 <- ( f , 000 ) + +[2,9]: + int 600 <- ( f , 000 ) + +[2,8]: + int 300 <- ( f , 00 ) + +[2,7]: + int 180 <- ( f , 00 ) + +[2,6]: + int 0c0 <- ( f , 00 ) + +[2,5]: + int 60 <- ( f , 00 ) + +[2,4]: + int 30 <- ( f , 0 ) + +[2,3]: + int 18 <- ( f , 0 ) + +[2,2]: + int 0c <- ( f , 0 ) + +[2,1]: + int 6 <- ( f , 0 ) + +[1,64]: + int 10000000000000000 <- ( f , 0000000000000000 ) + +[1,63]: + int 08000000000000000 <- ( f , 0000000000000000 ) + +[1,62]: + int 4000000000000000 <- ( f , 0000000000000000 ) + +[1,61]: + int 2000000000000000 <- ( f , 0000000000000000 ) + +[1,60]: + int 1000000000000000 <- ( f , 000000000000000 ) + +[1,59]: + int 0800000000000000 <- ( f , 000000000000000 ) + +[1,58]: + int 400000000000000 <- ( f , 000000000000000 ) + +[1,57]: + int 200000000000000 <- ( f , 000000000000000 ) + +[1,56]: + int 100000000000000 <- ( f , 00000000000000 ) + +[1,55]: + int 080000000000000 <- ( f , 00000000000000 ) + +[1,54]: + int 40000000000000 <- ( f , 00000000000000 ) + +[1,53]: + int 20000000000000 <- ( f , 00000000000000 ) + +[1,52]: + int 10000000000000 <- ( f , 0000000000000 ) + +[1,51]: + int 08000000000000 <- ( f , 0000000000000 ) + +[1,50]: + int 4000000000000 <- ( f , 0000000000000 ) + +[1,49]: + int 2000000000000 <- ( f , 0000000000000 ) + +[1,48]: + int 1000000000000 <- ( f , 000000000000 ) + +[1,47]: + int 0800000000000 <- ( f , 000000000000 ) + +[1,46]: + int 400000000000 <- ( f , 000000000000 ) + +[1,45]: + int 200000000000 <- ( f , 000000000000 ) + +[1,44]: + int 100000000000 <- ( f , 00000000000 ) + +[1,43]: + int 080000000000 <- ( f , 00000000000 ) + +[1,42]: + int 40000000000 <- ( f , 00000000000 ) + +[1,41]: + int 20000000000 <- ( f , 00000000000 ) + +[1,40]: + int 10000000000 <- ( f , 0000000000 ) + +[1,39]: + int 08000000000 <- ( f , 0000000000 ) + +[1,38]: + int 4000000000 <- ( f , 0000000000 ) + +[1,37]: + int 2000000000 <- ( f , 0000000000 ) + +[1,36]: + int 1000000000 <- ( f , 000000000 ) + +[1,35]: + int 0800000000 <- ( f , 000000000 ) + +[1,34]: + int 400000000 <- ( f , 000000000 ) + +[1,33]: + int 200000000 <- ( f , 000000000 ) + +[1,32]: + int 100000000 <- ( f , 00000000 ) + +[1,31]: + int 080000000 <- ( f , 00000000 ) + +[1,30]: + int 40000000 <- ( f , 00000000 ) + +[1,29]: + int 20000000 <- ( f , 00000000 ) + +[1,28]: + int 10000000 <- ( f , 0000000 ) + +[1,27]: + int 08000000 <- ( f , 0000000 ) + +[1,26]: + int 4000000 <- ( f , 0000000 ) + +[1,25]: + int 2000000 <- ( f , 0000000 ) + +[1,24]: + int 1000000 <- ( f , 000000 ) + +[1,23]: + int 0800000 <- ( f , 000000 ) + +[1,22]: + int 400000 <- ( f , 000000 ) + +[1,21]: + int 200000 <- ( f , 000000 ) + +[1,20]: + int 100000 <- ( f , 00000 ) + +[1,19]: + int 080000 <- ( f , 00000 ) + +[1,18]: + int 40000 <- ( f , 00000 ) + +[1,17]: + int 20000 <- ( f , 00000 ) + +[1,16]: + int 10000 <- ( f , 0000 ) + +[1,15]: + int 08000 <- ( f , 0000 ) + +[1,14]: + int 4000 <- ( f , 0000 ) + +[1,13]: + int 2000 <- ( f , 0000 ) + +[1,12]: + int 1000 <- ( f , 000 ) + +[1,11]: + int 0800 <- ( f , 000 ) + +[1,10]: + int 400 <- ( f , 000 ) + +[1,9]: + int 200 <- ( f , 000 ) + +[1,8]: + int 100 <- ( f , 00 ) + +[1,7]: + int 080 <- ( f , 00 ) + +[1,6]: + int 40 <- ( f , 00 ) + +[1,5]: + int 20 <- ( f , 00 ) + +[1,4]: + int 10 <- ( f , 0 ) + +[1,3]: + int 08 <- ( f , 0 ) + +[1,2]: + int 4 <- ( f , 0 ) + +[1,1]: + int 2 <- ( f , 0 ) + +[64,64]: + int 00000000000000000ffffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[64,63]: + int 00000000000000007fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[64,62]: + int 00000000000000003fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[64,61]: + int 00000000000000001fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[64,60]: + int 00000000000000000fffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[64,59]: + int 00000000000000007ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[64,58]: + int 00000000000000003ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[64,57]: + int 00000000000000001ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[64,56]: + int 00000000000000000ffffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[64,55]: + int 00000000000000007fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[64,54]: + int 00000000000000003fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[64,53]: + int 00000000000000001fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[64,52]: + int 00000000000000000fffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[64,51]: + int 00000000000000007ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[64,50]: + int 00000000000000003ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[64,49]: + int 00000000000000001ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[64,48]: + int 00000000000000000ffffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[64,47]: + int 00000000000000007fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[64,46]: + int 00000000000000003fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[64,45]: + int 00000000000000001fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[64,44]: + int 00000000000000000fffffffffff <- ( 0000000000000000 , fffffffffff ) + +[64,43]: + int 00000000000000007ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[64,42]: + int 00000000000000003ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[64,41]: + int 00000000000000001ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[64,40]: + int 00000000000000000ffffffffff <- ( 0000000000000000 , ffffffffff ) + +[64,39]: + int 00000000000000007fffffffff <- ( 0000000000000000 , ffffffffff ) + +[64,38]: + int 00000000000000003fffffffff <- ( 0000000000000000 , ffffffffff ) + +[64,37]: + int 00000000000000001fffffffff <- ( 0000000000000000 , ffffffffff ) + +[64,36]: + int 00000000000000000fffffffff <- ( 0000000000000000 , fffffffff ) + +[64,35]: + int 00000000000000007ffffffff <- ( 0000000000000000 , fffffffff ) + +[64,34]: + int 00000000000000003ffffffff <- ( 0000000000000000 , fffffffff ) + +[64,33]: + int 00000000000000001ffffffff <- ( 0000000000000000 , fffffffff ) + +[64,32]: + int 00000000000000000ffffffff <- ( 0000000000000000 , ffffffff ) + +[64,31]: + int 00000000000000007fffffff <- ( 0000000000000000 , ffffffff ) + +[64,30]: + int 00000000000000003fffffff <- ( 0000000000000000 , ffffffff ) + +[64,29]: + int 00000000000000001fffffff <- ( 0000000000000000 , ffffffff ) + +[64,28]: + int 00000000000000000fffffff <- ( 0000000000000000 , fffffff ) + +[64,27]: + int 00000000000000007ffffff <- ( 0000000000000000 , fffffff ) + +[64,26]: + int 00000000000000003ffffff <- ( 0000000000000000 , fffffff ) + +[64,25]: + int 00000000000000001ffffff <- ( 0000000000000000 , fffffff ) + +[64,24]: + int 00000000000000000ffffff <- ( 0000000000000000 , ffffff ) + +[64,23]: + int 00000000000000007fffff <- ( 0000000000000000 , ffffff ) + +[64,22]: + int 00000000000000003fffff <- ( 0000000000000000 , ffffff ) + +[64,21]: + int 00000000000000001fffff <- ( 0000000000000000 , ffffff ) + +[64,20]: + int 00000000000000000fffff <- ( 0000000000000000 , fffff ) + +[64,19]: + int 00000000000000007ffff <- ( 0000000000000000 , fffff ) + +[64,18]: + int 00000000000000003ffff <- ( 0000000000000000 , fffff ) + +[64,17]: + int 00000000000000001ffff <- ( 0000000000000000 , fffff ) + +[64,16]: + int 00000000000000000ffff <- ( 0000000000000000 , ffff ) + +[64,15]: + int 00000000000000007fff <- ( 0000000000000000 , ffff ) + +[64,14]: + int 00000000000000003fff <- ( 0000000000000000 , ffff ) + +[64,13]: + int 00000000000000001fff <- ( 0000000000000000 , ffff ) + +[64,12]: + int 00000000000000000fff <- ( 0000000000000000 , fff ) + +[64,11]: + int 00000000000000007ff <- ( 0000000000000000 , fff ) + +[64,10]: + int 00000000000000003ff <- ( 0000000000000000 , fff ) + +[64,9]: + int 00000000000000001ff <- ( 0000000000000000 , fff ) + +[64,8]: + int 00000000000000000ff <- ( 0000000000000000 , ff ) + +[64,7]: + int 00000000000000007f <- ( 0000000000000000 , ff ) + +[64,6]: + int 00000000000000003f <- ( 0000000000000000 , ff ) + +[64,5]: + int 00000000000000001f <- ( 0000000000000000 , ff ) + +[64,4]: + int 00000000000000000f <- ( 0000000000000000 , f ) + +[64,3]: + int 00000000000000007 <- ( 0000000000000000 , f ) + +[64,2]: + int 00000000000000003 <- ( 0000000000000000 , f ) + +[64,1]: + int 00000000000000001 <- ( 0000000000000000 , f ) + +[63,64]: + int 0000000000000000ffffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[63,63]: + int 00000000000000007fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[63,62]: + int 00000000000000003fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[63,61]: + int 00000000000000001fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[63,60]: + int 0000000000000000fffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[63,59]: + int 00000000000000007ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[63,58]: + int 00000000000000003ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[63,57]: + int 00000000000000001ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[63,56]: + int 0000000000000000ffffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[63,55]: + int 00000000000000007fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[63,54]: + int 00000000000000003fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[63,53]: + int 00000000000000001fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[63,52]: + int 0000000000000000fffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[63,51]: + int 00000000000000007ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[63,50]: + int 00000000000000003ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[63,49]: + int 00000000000000001ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[63,48]: + int 0000000000000000ffffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[63,47]: + int 00000000000000007fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[63,46]: + int 00000000000000003fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[63,45]: + int 00000000000000001fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[63,44]: + int 0000000000000000fffffffffff <- ( 0000000000000000 , fffffffffff ) + +[63,43]: + int 00000000000000007ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[63,42]: + int 00000000000000003ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[63,41]: + int 00000000000000001ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[63,40]: + int 0000000000000000ffffffffff <- ( 0000000000000000 , ffffffffff ) + +[63,39]: + int 00000000000000007fffffffff <- ( 0000000000000000 , ffffffffff ) + +[63,38]: + int 00000000000000003fffffffff <- ( 0000000000000000 , ffffffffff ) + +[63,37]: + int 00000000000000001fffffffff <- ( 0000000000000000 , ffffffffff ) + +[63,36]: + int 0000000000000000fffffffff <- ( 0000000000000000 , fffffffff ) + +[63,35]: + int 00000000000000007ffffffff <- ( 0000000000000000 , fffffffff ) + +[63,34]: + int 00000000000000003ffffffff <- ( 0000000000000000 , fffffffff ) + +[63,33]: + int 00000000000000001ffffffff <- ( 0000000000000000 , fffffffff ) + +[63,32]: + int 0000000000000000ffffffff <- ( 0000000000000000 , ffffffff ) + +[63,31]: + int 00000000000000007fffffff <- ( 0000000000000000 , ffffffff ) + +[63,30]: + int 00000000000000003fffffff <- ( 0000000000000000 , ffffffff ) + +[63,29]: + int 00000000000000001fffffff <- ( 0000000000000000 , ffffffff ) + +[63,28]: + int 0000000000000000fffffff <- ( 0000000000000000 , fffffff ) + +[63,27]: + int 00000000000000007ffffff <- ( 0000000000000000 , fffffff ) + +[63,26]: + int 00000000000000003ffffff <- ( 0000000000000000 , fffffff ) + +[63,25]: + int 00000000000000001ffffff <- ( 0000000000000000 , fffffff ) + +[63,24]: + int 0000000000000000ffffff <- ( 0000000000000000 , ffffff ) + +[63,23]: + int 00000000000000007fffff <- ( 0000000000000000 , ffffff ) + +[63,22]: + int 00000000000000003fffff <- ( 0000000000000000 , ffffff ) + +[63,21]: + int 00000000000000001fffff <- ( 0000000000000000 , ffffff ) + +[63,20]: + int 0000000000000000fffff <- ( 0000000000000000 , fffff ) + +[63,19]: + int 00000000000000007ffff <- ( 0000000000000000 , fffff ) + +[63,18]: + int 00000000000000003ffff <- ( 0000000000000000 , fffff ) + +[63,17]: + int 00000000000000001ffff <- ( 0000000000000000 , fffff ) + +[63,16]: + int 0000000000000000ffff <- ( 0000000000000000 , ffff ) + +[63,15]: + int 00000000000000007fff <- ( 0000000000000000 , ffff ) + +[63,14]: + int 00000000000000003fff <- ( 0000000000000000 , ffff ) + +[63,13]: + int 00000000000000001fff <- ( 0000000000000000 , ffff ) + +[63,12]: + int 0000000000000000fff <- ( 0000000000000000 , fff ) + +[63,11]: + int 00000000000000007ff <- ( 0000000000000000 , fff ) + +[63,10]: + int 00000000000000003ff <- ( 0000000000000000 , fff ) + +[63,9]: + int 00000000000000001ff <- ( 0000000000000000 , fff ) + +[63,8]: + int 0000000000000000ff <- ( 0000000000000000 , ff ) + +[63,7]: + int 00000000000000007f <- ( 0000000000000000 , ff ) + +[63,6]: + int 00000000000000003f <- ( 0000000000000000 , ff ) + +[63,5]: + int 00000000000000001f <- ( 0000000000000000 , ff ) + +[63,4]: + int 0000000000000000f <- ( 0000000000000000 , f ) + +[63,3]: + int 00000000000000007 <- ( 0000000000000000 , f ) + +[63,2]: + int 00000000000000003 <- ( 0000000000000000 , f ) + +[63,1]: + int 00000000000000001 <- ( 0000000000000000 , f ) + +[62,64]: + int 0000000000000000ffffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[62,63]: + int 00000000000000007fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[62,62]: + int 00000000000000003fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[62,61]: + int 0000000000000001fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[62,60]: + int 0000000000000000fffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[62,59]: + int 00000000000000007ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[62,58]: + int 00000000000000003ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[62,57]: + int 0000000000000001ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[62,56]: + int 0000000000000000ffffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[62,55]: + int 00000000000000007fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[62,54]: + int 00000000000000003fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[62,53]: + int 0000000000000001fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[62,52]: + int 0000000000000000fffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[62,51]: + int 00000000000000007ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[62,50]: + int 00000000000000003ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[62,49]: + int 0000000000000001ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[62,48]: + int 0000000000000000ffffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[62,47]: + int 00000000000000007fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[62,46]: + int 00000000000000003fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[62,45]: + int 0000000000000001fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[62,44]: + int 0000000000000000fffffffffff <- ( 0000000000000000 , fffffffffff ) + +[62,43]: + int 00000000000000007ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[62,42]: + int 00000000000000003ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[62,41]: + int 0000000000000001ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[62,40]: + int 0000000000000000ffffffffff <- ( 0000000000000000 , ffffffffff ) + +[62,39]: + int 00000000000000007fffffffff <- ( 0000000000000000 , ffffffffff ) + +[62,38]: + int 00000000000000003fffffffff <- ( 0000000000000000 , ffffffffff ) + +[62,37]: + int 0000000000000001fffffffff <- ( 0000000000000000 , ffffffffff ) + +[62,36]: + int 0000000000000000fffffffff <- ( 0000000000000000 , fffffffff ) + +[62,35]: + int 00000000000000007ffffffff <- ( 0000000000000000 , fffffffff ) + +[62,34]: + int 00000000000000003ffffffff <- ( 0000000000000000 , fffffffff ) + +[62,33]: + int 0000000000000001ffffffff <- ( 0000000000000000 , fffffffff ) + +[62,32]: + int 0000000000000000ffffffff <- ( 0000000000000000 , ffffffff ) + +[62,31]: + int 00000000000000007fffffff <- ( 0000000000000000 , ffffffff ) + +[62,30]: + int 00000000000000003fffffff <- ( 0000000000000000 , ffffffff ) + +[62,29]: + int 0000000000000001fffffff <- ( 0000000000000000 , ffffffff ) + +[62,28]: + int 0000000000000000fffffff <- ( 0000000000000000 , fffffff ) + +[62,27]: + int 00000000000000007ffffff <- ( 0000000000000000 , fffffff ) + +[62,26]: + int 00000000000000003ffffff <- ( 0000000000000000 , fffffff ) + +[62,25]: + int 0000000000000001ffffff <- ( 0000000000000000 , fffffff ) + +[62,24]: + int 0000000000000000ffffff <- ( 0000000000000000 , ffffff ) + +[62,23]: + int 00000000000000007fffff <- ( 0000000000000000 , ffffff ) + +[62,22]: + int 00000000000000003fffff <- ( 0000000000000000 , ffffff ) + +[62,21]: + int 0000000000000001fffff <- ( 0000000000000000 , ffffff ) + +[62,20]: + int 0000000000000000fffff <- ( 0000000000000000 , fffff ) + +[62,19]: + int 00000000000000007ffff <- ( 0000000000000000 , fffff ) + +[62,18]: + int 00000000000000003ffff <- ( 0000000000000000 , fffff ) + +[62,17]: + int 0000000000000001ffff <- ( 0000000000000000 , fffff ) + +[62,16]: + int 0000000000000000ffff <- ( 0000000000000000 , ffff ) + +[62,15]: + int 00000000000000007fff <- ( 0000000000000000 , ffff ) + +[62,14]: + int 00000000000000003fff <- ( 0000000000000000 , ffff ) + +[62,13]: + int 0000000000000001fff <- ( 0000000000000000 , ffff ) + +[62,12]: + int 0000000000000000fff <- ( 0000000000000000 , fff ) + +[62,11]: + int 00000000000000007ff <- ( 0000000000000000 , fff ) + +[62,10]: + int 00000000000000003ff <- ( 0000000000000000 , fff ) + +[62,9]: + int 0000000000000001ff <- ( 0000000000000000 , fff ) + +[62,8]: + int 0000000000000000ff <- ( 0000000000000000 , ff ) + +[62,7]: + int 00000000000000007f <- ( 0000000000000000 , ff ) + +[62,6]: + int 00000000000000003f <- ( 0000000000000000 , ff ) + +[62,5]: + int 0000000000000001f <- ( 0000000000000000 , ff ) + +[62,4]: + int 0000000000000000f <- ( 0000000000000000 , f ) + +[62,3]: + int 00000000000000007 <- ( 0000000000000000 , f ) + +[62,2]: + int 00000000000000003 <- ( 0000000000000000 , f ) + +[62,1]: + int 0000000000000001 <- ( 0000000000000000 , f ) + +[61,64]: + int 0000000000000000ffffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[61,63]: + int 00000000000000007fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[61,62]: + int 0000000000000003fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[61,61]: + int 0000000000000001fffffffffffffff <- ( 0000000000000000 , ffffffffffffffff ) + +[61,60]: + int 0000000000000000fffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[61,59]: + int 00000000000000007ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[61,58]: + int 0000000000000003ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[61,57]: + int 0000000000000001ffffffffffffff <- ( 0000000000000000 , fffffffffffffff ) + +[61,56]: + int 0000000000000000ffffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[61,55]: + int 00000000000000007fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[61,54]: + int 0000000000000003fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[61,53]: + int 0000000000000001fffffffffffff <- ( 0000000000000000 , ffffffffffffff ) + +[61,52]: + int 0000000000000000fffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[61,51]: + int 00000000000000007ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[61,50]: + int 0000000000000003ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[61,49]: + int 0000000000000001ffffffffffff <- ( 0000000000000000 , fffffffffffff ) + +[61,48]: + int 0000000000000000ffffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[61,47]: + int 00000000000000007fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[61,46]: + int 0000000000000003fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[61,45]: + int 0000000000000001fffffffffff <- ( 0000000000000000 , ffffffffffff ) + +[61,44]: + int 0000000000000000fffffffffff <- ( 0000000000000000 , fffffffffff ) + +[61,43]: + int 00000000000000007ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[61,42]: + int 0000000000000003ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[61,41]: + int 0000000000000001ffffffffff <- ( 0000000000000000 , fffffffffff ) + +[61,40]: + int 0000000000000000ffffffffff <- ( 0000000000000000 , ffffffffff ) + +[61,39]: + int 00000000000000007fffffffff <- ( 0000000000000000 , ffffffffff ) + +[61,38]: + int 0000000000000003fffffffff <- ( 0000000000000000 , ffffffffff ) + +[61,37]: + int 0000000000000001fffffffff <- ( 0000000000000000 , ffffffffff ) + +[61,36]: + int 0000000000000000fffffffff <- ( 0000000000000000 , fffffffff ) + +[61,35]: + int 00000000000000007ffffffff <- ( 0000000000000000 , fffffffff ) + +[61,34]: + int 0000000000000003ffffffff <- ( 0000000000000000 , fffffffff ) + +[61,33]: + int 0000000000000001ffffffff <- ( 0000000000000000 , fffffffff ) + +[61,32]: + int 0000000000000000ffffffff <- ( 0000000000000000 , ffffffff ) + +[61,31]: + int 00000000000000007fffffff <- ( 0000000000000000 , ffffffff ) + +[61,30]: + int 0000000000000003fffffff <- ( 0000000000000000 , ffffffff ) + +[61,29]: + int 0000000000000001fffffff <- ( 0000000000000000 , ffffffff ) + +[61,28]: + int 0000000000000000fffffff <- ( 0000000000000000 , fffffff ) + +[61,27]: + int 00000000000000007ffffff <- ( 0000000000000000 , fffffff ) + +[61,26]: + int 0000000000000003ffffff <- ( 0000000000000000 , fffffff ) + +[61,25]: + int 0000000000000001ffffff <- ( 0000000000000000 , fffffff ) + +[61,24]: + int 0000000000000000ffffff <- ( 0000000000000000 , ffffff ) + +[61,23]: + int 00000000000000007fffff <- ( 0000000000000000 , ffffff ) + +[61,22]: + int 0000000000000003fffff <- ( 0000000000000000 , ffffff ) + +[61,21]: + int 0000000000000001fffff <- ( 0000000000000000 , ffffff ) + +[61,20]: + int 0000000000000000fffff <- ( 0000000000000000 , fffff ) + +[61,19]: + int 00000000000000007ffff <- ( 0000000000000000 , fffff ) + +[61,18]: + int 0000000000000003ffff <- ( 0000000000000000 , fffff ) + +[61,17]: + int 0000000000000001ffff <- ( 0000000000000000 , fffff ) + +[61,16]: + int 0000000000000000ffff <- ( 0000000000000000 , ffff ) + +[61,15]: + int 00000000000000007fff <- ( 0000000000000000 , ffff ) + +[61,14]: + int 0000000000000003fff <- ( 0000000000000000 , ffff ) + +[61,13]: + int 0000000000000001fff <- ( 0000000000000000 , ffff ) + +[61,12]: + int 0000000000000000fff <- ( 0000000000000000 , fff ) + +[61,11]: + int 00000000000000007ff <- ( 0000000000000000 , fff ) + +[61,10]: + int 0000000000000003ff <- ( 0000000000000000 , fff ) + +[61,9]: + int 0000000000000001ff <- ( 0000000000000000 , fff ) + +[61,8]: + int 0000000000000000ff <- ( 0000000000000000 , ff ) + +[61,7]: + int 00000000000000007f <- ( 0000000000000000 , ff ) + +[61,6]: + int 0000000000000003f <- ( 0000000000000000 , ff ) + +[61,5]: + int 0000000000000001f <- ( 0000000000000000 , ff ) + +[61,4]: + int 0000000000000000f <- ( 0000000000000000 , f ) + +[61,3]: + int 00000000000000007 <- ( 0000000000000000 , f ) + +[61,2]: + int 0000000000000003 <- ( 0000000000000000 , f ) + +[61,1]: + int 0000000000000001 <- ( 0000000000000000 , f ) + +[60,64]: + int 0000000000000000ffffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[60,63]: + int 0000000000000007fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[60,62]: + int 0000000000000003fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[60,61]: + int 0000000000000001fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[60,60]: + int 0000000000000000fffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[60,59]: + int 0000000000000007ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[60,58]: + int 0000000000000003ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[60,57]: + int 0000000000000001ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[60,56]: + int 0000000000000000ffffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[60,55]: + int 0000000000000007fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[60,54]: + int 0000000000000003fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[60,53]: + int 0000000000000001fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[60,52]: + int 0000000000000000fffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[60,51]: + int 0000000000000007ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[60,50]: + int 0000000000000003ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[60,49]: + int 0000000000000001ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[60,48]: + int 0000000000000000ffffffffffff <- ( 000000000000000 , ffffffffffff ) + +[60,47]: + int 0000000000000007fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[60,46]: + int 0000000000000003fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[60,45]: + int 0000000000000001fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[60,44]: + int 0000000000000000fffffffffff <- ( 000000000000000 , fffffffffff ) + +[60,43]: + int 0000000000000007ffffffffff <- ( 000000000000000 , fffffffffff ) + +[60,42]: + int 0000000000000003ffffffffff <- ( 000000000000000 , fffffffffff ) + +[60,41]: + int 0000000000000001ffffffffff <- ( 000000000000000 , fffffffffff ) + +[60,40]: + int 0000000000000000ffffffffff <- ( 000000000000000 , ffffffffff ) + +[60,39]: + int 0000000000000007fffffffff <- ( 000000000000000 , ffffffffff ) + +[60,38]: + int 0000000000000003fffffffff <- ( 000000000000000 , ffffffffff ) + +[60,37]: + int 0000000000000001fffffffff <- ( 000000000000000 , ffffffffff ) + +[60,36]: + int 0000000000000000fffffffff <- ( 000000000000000 , fffffffff ) + +[60,35]: + int 0000000000000007ffffffff <- ( 000000000000000 , fffffffff ) + +[60,34]: + int 0000000000000003ffffffff <- ( 000000000000000 , fffffffff ) + +[60,33]: + int 0000000000000001ffffffff <- ( 000000000000000 , fffffffff ) + +[60,32]: + int 0000000000000000ffffffff <- ( 000000000000000 , ffffffff ) + +[60,31]: + int 0000000000000007fffffff <- ( 000000000000000 , ffffffff ) + +[60,30]: + int 0000000000000003fffffff <- ( 000000000000000 , ffffffff ) + +[60,29]: + int 0000000000000001fffffff <- ( 000000000000000 , ffffffff ) + +[60,28]: + int 0000000000000000fffffff <- ( 000000000000000 , fffffff ) + +[60,27]: + int 0000000000000007ffffff <- ( 000000000000000 , fffffff ) + +[60,26]: + int 0000000000000003ffffff <- ( 000000000000000 , fffffff ) + +[60,25]: + int 0000000000000001ffffff <- ( 000000000000000 , fffffff ) + +[60,24]: + int 0000000000000000ffffff <- ( 000000000000000 , ffffff ) + +[60,23]: + int 0000000000000007fffff <- ( 000000000000000 , ffffff ) + +[60,22]: + int 0000000000000003fffff <- ( 000000000000000 , ffffff ) + +[60,21]: + int 0000000000000001fffff <- ( 000000000000000 , ffffff ) + +[60,20]: + int 0000000000000000fffff <- ( 000000000000000 , fffff ) + +[60,19]: + int 0000000000000007ffff <- ( 000000000000000 , fffff ) + +[60,18]: + int 0000000000000003ffff <- ( 000000000000000 , fffff ) + +[60,17]: + int 0000000000000001ffff <- ( 000000000000000 , fffff ) + +[60,16]: + int 0000000000000000ffff <- ( 000000000000000 , ffff ) + +[60,15]: + int 0000000000000007fff <- ( 000000000000000 , ffff ) + +[60,14]: + int 0000000000000003fff <- ( 000000000000000 , ffff ) + +[60,13]: + int 0000000000000001fff <- ( 000000000000000 , ffff ) + +[60,12]: + int 0000000000000000fff <- ( 000000000000000 , fff ) + +[60,11]: + int 0000000000000007ff <- ( 000000000000000 , fff ) + +[60,10]: + int 0000000000000003ff <- ( 000000000000000 , fff ) + +[60,9]: + int 0000000000000001ff <- ( 000000000000000 , fff ) + +[60,8]: + int 0000000000000000ff <- ( 000000000000000 , ff ) + +[60,7]: + int 0000000000000007f <- ( 000000000000000 , ff ) + +[60,6]: + int 0000000000000003f <- ( 000000000000000 , ff ) + +[60,5]: + int 0000000000000001f <- ( 000000000000000 , ff ) + +[60,4]: + int 0000000000000000f <- ( 000000000000000 , f ) + +[60,3]: + int 0000000000000007 <- ( 000000000000000 , f ) + +[60,2]: + int 0000000000000003 <- ( 000000000000000 , f ) + +[60,1]: + int 0000000000000001 <- ( 000000000000000 , f ) + +[59,64]: + int 000000000000000ffffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[59,63]: + int 0000000000000007fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[59,62]: + int 0000000000000003fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[59,61]: + int 0000000000000001fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[59,60]: + int 000000000000000fffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[59,59]: + int 0000000000000007ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[59,58]: + int 0000000000000003ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[59,57]: + int 0000000000000001ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[59,56]: + int 000000000000000ffffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[59,55]: + int 0000000000000007fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[59,54]: + int 0000000000000003fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[59,53]: + int 0000000000000001fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[59,52]: + int 000000000000000fffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[59,51]: + int 0000000000000007ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[59,50]: + int 0000000000000003ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[59,49]: + int 0000000000000001ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[59,48]: + int 000000000000000ffffffffffff <- ( 000000000000000 , ffffffffffff ) + +[59,47]: + int 0000000000000007fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[59,46]: + int 0000000000000003fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[59,45]: + int 0000000000000001fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[59,44]: + int 000000000000000fffffffffff <- ( 000000000000000 , fffffffffff ) + +[59,43]: + int 0000000000000007ffffffffff <- ( 000000000000000 , fffffffffff ) + +[59,42]: + int 0000000000000003ffffffffff <- ( 000000000000000 , fffffffffff ) + +[59,41]: + int 0000000000000001ffffffffff <- ( 000000000000000 , fffffffffff ) + +[59,40]: + int 000000000000000ffffffffff <- ( 000000000000000 , ffffffffff ) + +[59,39]: + int 0000000000000007fffffffff <- ( 000000000000000 , ffffffffff ) + +[59,38]: + int 0000000000000003fffffffff <- ( 000000000000000 , ffffffffff ) + +[59,37]: + int 0000000000000001fffffffff <- ( 000000000000000 , ffffffffff ) + +[59,36]: + int 000000000000000fffffffff <- ( 000000000000000 , fffffffff ) + +[59,35]: + int 0000000000000007ffffffff <- ( 000000000000000 , fffffffff ) + +[59,34]: + int 0000000000000003ffffffff <- ( 000000000000000 , fffffffff ) + +[59,33]: + int 0000000000000001ffffffff <- ( 000000000000000 , fffffffff ) + +[59,32]: + int 000000000000000ffffffff <- ( 000000000000000 , ffffffff ) + +[59,31]: + int 0000000000000007fffffff <- ( 000000000000000 , ffffffff ) + +[59,30]: + int 0000000000000003fffffff <- ( 000000000000000 , ffffffff ) + +[59,29]: + int 0000000000000001fffffff <- ( 000000000000000 , ffffffff ) + +[59,28]: + int 000000000000000fffffff <- ( 000000000000000 , fffffff ) + +[59,27]: + int 0000000000000007ffffff <- ( 000000000000000 , fffffff ) + +[59,26]: + int 0000000000000003ffffff <- ( 000000000000000 , fffffff ) + +[59,25]: + int 0000000000000001ffffff <- ( 000000000000000 , fffffff ) + +[59,24]: + int 000000000000000ffffff <- ( 000000000000000 , ffffff ) + +[59,23]: + int 0000000000000007fffff <- ( 000000000000000 , ffffff ) + +[59,22]: + int 0000000000000003fffff <- ( 000000000000000 , ffffff ) + +[59,21]: + int 0000000000000001fffff <- ( 000000000000000 , ffffff ) + +[59,20]: + int 000000000000000fffff <- ( 000000000000000 , fffff ) + +[59,19]: + int 0000000000000007ffff <- ( 000000000000000 , fffff ) + +[59,18]: + int 0000000000000003ffff <- ( 000000000000000 , fffff ) + +[59,17]: + int 0000000000000001ffff <- ( 000000000000000 , fffff ) + +[59,16]: + int 000000000000000ffff <- ( 000000000000000 , ffff ) + +[59,15]: + int 0000000000000007fff <- ( 000000000000000 , ffff ) + +[59,14]: + int 0000000000000003fff <- ( 000000000000000 , ffff ) + +[59,13]: + int 0000000000000001fff <- ( 000000000000000 , ffff ) + +[59,12]: + int 000000000000000fff <- ( 000000000000000 , fff ) + +[59,11]: + int 0000000000000007ff <- ( 000000000000000 , fff ) + +[59,10]: + int 0000000000000003ff <- ( 000000000000000 , fff ) + +[59,9]: + int 0000000000000001ff <- ( 000000000000000 , fff ) + +[59,8]: + int 000000000000000ff <- ( 000000000000000 , ff ) + +[59,7]: + int 0000000000000007f <- ( 000000000000000 , ff ) + +[59,6]: + int 0000000000000003f <- ( 000000000000000 , ff ) + +[59,5]: + int 0000000000000001f <- ( 000000000000000 , ff ) + +[59,4]: + int 000000000000000f <- ( 000000000000000 , f ) + +[59,3]: + int 0000000000000007 <- ( 000000000000000 , f ) + +[59,2]: + int 0000000000000003 <- ( 000000000000000 , f ) + +[59,1]: + int 0000000000000001 <- ( 000000000000000 , f ) + +[58,64]: + int 000000000000000ffffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[58,63]: + int 0000000000000007fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[58,62]: + int 0000000000000003fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[58,61]: + int 000000000000001fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[58,60]: + int 000000000000000fffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[58,59]: + int 0000000000000007ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[58,58]: + int 0000000000000003ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[58,57]: + int 000000000000001ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[58,56]: + int 000000000000000ffffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[58,55]: + int 0000000000000007fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[58,54]: + int 0000000000000003fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[58,53]: + int 000000000000001fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[58,52]: + int 000000000000000fffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[58,51]: + int 0000000000000007ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[58,50]: + int 0000000000000003ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[58,49]: + int 000000000000001ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[58,48]: + int 000000000000000ffffffffffff <- ( 000000000000000 , ffffffffffff ) + +[58,47]: + int 0000000000000007fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[58,46]: + int 0000000000000003fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[58,45]: + int 000000000000001fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[58,44]: + int 000000000000000fffffffffff <- ( 000000000000000 , fffffffffff ) + +[58,43]: + int 0000000000000007ffffffffff <- ( 000000000000000 , fffffffffff ) + +[58,42]: + int 0000000000000003ffffffffff <- ( 000000000000000 , fffffffffff ) + +[58,41]: + int 000000000000001ffffffffff <- ( 000000000000000 , fffffffffff ) + +[58,40]: + int 000000000000000ffffffffff <- ( 000000000000000 , ffffffffff ) + +[58,39]: + int 0000000000000007fffffffff <- ( 000000000000000 , ffffffffff ) + +[58,38]: + int 0000000000000003fffffffff <- ( 000000000000000 , ffffffffff ) + +[58,37]: + int 000000000000001fffffffff <- ( 000000000000000 , ffffffffff ) + +[58,36]: + int 000000000000000fffffffff <- ( 000000000000000 , fffffffff ) + +[58,35]: + int 0000000000000007ffffffff <- ( 000000000000000 , fffffffff ) + +[58,34]: + int 0000000000000003ffffffff <- ( 000000000000000 , fffffffff ) + +[58,33]: + int 000000000000001ffffffff <- ( 000000000000000 , fffffffff ) + +[58,32]: + int 000000000000000ffffffff <- ( 000000000000000 , ffffffff ) + +[58,31]: + int 0000000000000007fffffff <- ( 000000000000000 , ffffffff ) + +[58,30]: + int 0000000000000003fffffff <- ( 000000000000000 , ffffffff ) + +[58,29]: + int 000000000000001fffffff <- ( 000000000000000 , ffffffff ) + +[58,28]: + int 000000000000000fffffff <- ( 000000000000000 , fffffff ) + +[58,27]: + int 0000000000000007ffffff <- ( 000000000000000 , fffffff ) + +[58,26]: + int 0000000000000003ffffff <- ( 000000000000000 , fffffff ) + +[58,25]: + int 000000000000001ffffff <- ( 000000000000000 , fffffff ) + +[58,24]: + int 000000000000000ffffff <- ( 000000000000000 , ffffff ) + +[58,23]: + int 0000000000000007fffff <- ( 000000000000000 , ffffff ) + +[58,22]: + int 0000000000000003fffff <- ( 000000000000000 , ffffff ) + +[58,21]: + int 000000000000001fffff <- ( 000000000000000 , ffffff ) + +[58,20]: + int 000000000000000fffff <- ( 000000000000000 , fffff ) + +[58,19]: + int 0000000000000007ffff <- ( 000000000000000 , fffff ) + +[58,18]: + int 0000000000000003ffff <- ( 000000000000000 , fffff ) + +[58,17]: + int 000000000000001ffff <- ( 000000000000000 , fffff ) + +[58,16]: + int 000000000000000ffff <- ( 000000000000000 , ffff ) + +[58,15]: + int 0000000000000007fff <- ( 000000000000000 , ffff ) + +[58,14]: + int 0000000000000003fff <- ( 000000000000000 , ffff ) + +[58,13]: + int 000000000000001fff <- ( 000000000000000 , ffff ) + +[58,12]: + int 000000000000000fff <- ( 000000000000000 , fff ) + +[58,11]: + int 0000000000000007ff <- ( 000000000000000 , fff ) + +[58,10]: + int 0000000000000003ff <- ( 000000000000000 , fff ) + +[58,9]: + int 000000000000001ff <- ( 000000000000000 , fff ) + +[58,8]: + int 000000000000000ff <- ( 000000000000000 , ff ) + +[58,7]: + int 0000000000000007f <- ( 000000000000000 , ff ) + +[58,6]: + int 0000000000000003f <- ( 000000000000000 , ff ) + +[58,5]: + int 000000000000001f <- ( 000000000000000 , ff ) + +[58,4]: + int 000000000000000f <- ( 000000000000000 , f ) + +[58,3]: + int 0000000000000007 <- ( 000000000000000 , f ) + +[58,2]: + int 0000000000000003 <- ( 000000000000000 , f ) + +[58,1]: + int 000000000000001 <- ( 000000000000000 , f ) + +[57,64]: + int 000000000000000ffffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[57,63]: + int 0000000000000007fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[57,62]: + int 000000000000003fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[57,61]: + int 000000000000001fffffffffffffff <- ( 000000000000000 , ffffffffffffffff ) + +[57,60]: + int 000000000000000fffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[57,59]: + int 0000000000000007ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[57,58]: + int 000000000000003ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[57,57]: + int 000000000000001ffffffffffffff <- ( 000000000000000 , fffffffffffffff ) + +[57,56]: + int 000000000000000ffffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[57,55]: + int 0000000000000007fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[57,54]: + int 000000000000003fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[57,53]: + int 000000000000001fffffffffffff <- ( 000000000000000 , ffffffffffffff ) + +[57,52]: + int 000000000000000fffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[57,51]: + int 0000000000000007ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[57,50]: + int 000000000000003ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[57,49]: + int 000000000000001ffffffffffff <- ( 000000000000000 , fffffffffffff ) + +[57,48]: + int 000000000000000ffffffffffff <- ( 000000000000000 , ffffffffffff ) + +[57,47]: + int 0000000000000007fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[57,46]: + int 000000000000003fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[57,45]: + int 000000000000001fffffffffff <- ( 000000000000000 , ffffffffffff ) + +[57,44]: + int 000000000000000fffffffffff <- ( 000000000000000 , fffffffffff ) + +[57,43]: + int 0000000000000007ffffffffff <- ( 000000000000000 , fffffffffff ) + +[57,42]: + int 000000000000003ffffffffff <- ( 000000000000000 , fffffffffff ) + +[57,41]: + int 000000000000001ffffffffff <- ( 000000000000000 , fffffffffff ) + +[57,40]: + int 000000000000000ffffffffff <- ( 000000000000000 , ffffffffff ) + +[57,39]: + int 0000000000000007fffffffff <- ( 000000000000000 , ffffffffff ) + +[57,38]: + int 000000000000003fffffffff <- ( 000000000000000 , ffffffffff ) + +[57,37]: + int 000000000000001fffffffff <- ( 000000000000000 , ffffffffff ) + +[57,36]: + int 000000000000000fffffffff <- ( 000000000000000 , fffffffff ) + +[57,35]: + int 0000000000000007ffffffff <- ( 000000000000000 , fffffffff ) + +[57,34]: + int 000000000000003ffffffff <- ( 000000000000000 , fffffffff ) + +[57,33]: + int 000000000000001ffffffff <- ( 000000000000000 , fffffffff ) + +[57,32]: + int 000000000000000ffffffff <- ( 000000000000000 , ffffffff ) + +[57,31]: + int 0000000000000007fffffff <- ( 000000000000000 , ffffffff ) + +[57,30]: + int 000000000000003fffffff <- ( 000000000000000 , ffffffff ) + +[57,29]: + int 000000000000001fffffff <- ( 000000000000000 , ffffffff ) + +[57,28]: + int 000000000000000fffffff <- ( 000000000000000 , fffffff ) + +[57,27]: + int 0000000000000007ffffff <- ( 000000000000000 , fffffff ) + +[57,26]: + int 000000000000003ffffff <- ( 000000000000000 , fffffff ) + +[57,25]: + int 000000000000001ffffff <- ( 000000000000000 , fffffff ) + +[57,24]: + int 000000000000000ffffff <- ( 000000000000000 , ffffff ) + +[57,23]: + int 0000000000000007fffff <- ( 000000000000000 , ffffff ) + +[57,22]: + int 000000000000003fffff <- ( 000000000000000 , ffffff ) + +[57,21]: + int 000000000000001fffff <- ( 000000000000000 , ffffff ) + +[57,20]: + int 000000000000000fffff <- ( 000000000000000 , fffff ) + +[57,19]: + int 0000000000000007ffff <- ( 000000000000000 , fffff ) + +[57,18]: + int 000000000000003ffff <- ( 000000000000000 , fffff ) + +[57,17]: + int 000000000000001ffff <- ( 000000000000000 , fffff ) + +[57,16]: + int 000000000000000ffff <- ( 000000000000000 , ffff ) + +[57,15]: + int 0000000000000007fff <- ( 000000000000000 , ffff ) + +[57,14]: + int 000000000000003fff <- ( 000000000000000 , ffff ) + +[57,13]: + int 000000000000001fff <- ( 000000000000000 , ffff ) + +[57,12]: + int 000000000000000fff <- ( 000000000000000 , fff ) + +[57,11]: + int 0000000000000007ff <- ( 000000000000000 , fff ) + +[57,10]: + int 000000000000003ff <- ( 000000000000000 , fff ) + +[57,9]: + int 000000000000001ff <- ( 000000000000000 , fff ) + +[57,8]: + int 000000000000000ff <- ( 000000000000000 , ff ) + +[57,7]: + int 0000000000000007f <- ( 000000000000000 , ff ) + +[57,6]: + int 000000000000003f <- ( 000000000000000 , ff ) + +[57,5]: + int 000000000000001f <- ( 000000000000000 , ff ) + +[57,4]: + int 000000000000000f <- ( 000000000000000 , f ) + +[57,3]: + int 0000000000000007 <- ( 000000000000000 , f ) + +[57,2]: + int 000000000000003 <- ( 000000000000000 , f ) + +[57,1]: + int 000000000000001 <- ( 000000000000000 , f ) + +[56,64]: + int 000000000000000ffffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[56,63]: + int 000000000000007fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[56,62]: + int 000000000000003fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[56,61]: + int 000000000000001fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[56,60]: + int 000000000000000fffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[56,59]: + int 000000000000007ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[56,58]: + int 000000000000003ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[56,57]: + int 000000000000001ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[56,56]: + int 000000000000000ffffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[56,55]: + int 000000000000007fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[56,54]: + int 000000000000003fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[56,53]: + int 000000000000001fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[56,52]: + int 000000000000000fffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[56,51]: + int 000000000000007ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[56,50]: + int 000000000000003ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[56,49]: + int 000000000000001ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[56,48]: + int 000000000000000ffffffffffff <- ( 00000000000000 , ffffffffffff ) + +[56,47]: + int 000000000000007fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[56,46]: + int 000000000000003fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[56,45]: + int 000000000000001fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[56,44]: + int 000000000000000fffffffffff <- ( 00000000000000 , fffffffffff ) + +[56,43]: + int 000000000000007ffffffffff <- ( 00000000000000 , fffffffffff ) + +[56,42]: + int 000000000000003ffffffffff <- ( 00000000000000 , fffffffffff ) + +[56,41]: + int 000000000000001ffffffffff <- ( 00000000000000 , fffffffffff ) + +[56,40]: + int 000000000000000ffffffffff <- ( 00000000000000 , ffffffffff ) + +[56,39]: + int 000000000000007fffffffff <- ( 00000000000000 , ffffffffff ) + +[56,38]: + int 000000000000003fffffffff <- ( 00000000000000 , ffffffffff ) + +[56,37]: + int 000000000000001fffffffff <- ( 00000000000000 , ffffffffff ) + +[56,36]: + int 000000000000000fffffffff <- ( 00000000000000 , fffffffff ) + +[56,35]: + int 000000000000007ffffffff <- ( 00000000000000 , fffffffff ) + +[56,34]: + int 000000000000003ffffffff <- ( 00000000000000 , fffffffff ) + +[56,33]: + int 000000000000001ffffffff <- ( 00000000000000 , fffffffff ) + +[56,32]: + int 000000000000000ffffffff <- ( 00000000000000 , ffffffff ) + +[56,31]: + int 000000000000007fffffff <- ( 00000000000000 , ffffffff ) + +[56,30]: + int 000000000000003fffffff <- ( 00000000000000 , ffffffff ) + +[56,29]: + int 000000000000001fffffff <- ( 00000000000000 , ffffffff ) + +[56,28]: + int 000000000000000fffffff <- ( 00000000000000 , fffffff ) + +[56,27]: + int 000000000000007ffffff <- ( 00000000000000 , fffffff ) + +[56,26]: + int 000000000000003ffffff <- ( 00000000000000 , fffffff ) + +[56,25]: + int 000000000000001ffffff <- ( 00000000000000 , fffffff ) + +[56,24]: + int 000000000000000ffffff <- ( 00000000000000 , ffffff ) + +[56,23]: + int 000000000000007fffff <- ( 00000000000000 , ffffff ) + +[56,22]: + int 000000000000003fffff <- ( 00000000000000 , ffffff ) + +[56,21]: + int 000000000000001fffff <- ( 00000000000000 , ffffff ) + +[56,20]: + int 000000000000000fffff <- ( 00000000000000 , fffff ) + +[56,19]: + int 000000000000007ffff <- ( 00000000000000 , fffff ) + +[56,18]: + int 000000000000003ffff <- ( 00000000000000 , fffff ) + +[56,17]: + int 000000000000001ffff <- ( 00000000000000 , fffff ) + +[56,16]: + int 000000000000000ffff <- ( 00000000000000 , ffff ) + +[56,15]: + int 000000000000007fff <- ( 00000000000000 , ffff ) + +[56,14]: + int 000000000000003fff <- ( 00000000000000 , ffff ) + +[56,13]: + int 000000000000001fff <- ( 00000000000000 , ffff ) + +[56,12]: + int 000000000000000fff <- ( 00000000000000 , fff ) + +[56,11]: + int 000000000000007ff <- ( 00000000000000 , fff ) + +[56,10]: + int 000000000000003ff <- ( 00000000000000 , fff ) + +[56,9]: + int 000000000000001ff <- ( 00000000000000 , fff ) + +[56,8]: + int 000000000000000ff <- ( 00000000000000 , ff ) + +[56,7]: + int 000000000000007f <- ( 00000000000000 , ff ) + +[56,6]: + int 000000000000003f <- ( 00000000000000 , ff ) + +[56,5]: + int 000000000000001f <- ( 00000000000000 , ff ) + +[56,4]: + int 000000000000000f <- ( 00000000000000 , f ) + +[56,3]: + int 000000000000007 <- ( 00000000000000 , f ) + +[56,2]: + int 000000000000003 <- ( 00000000000000 , f ) + +[56,1]: + int 000000000000001 <- ( 00000000000000 , f ) + +[55,64]: + int 00000000000000ffffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[55,63]: + int 000000000000007fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[55,62]: + int 000000000000003fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[55,61]: + int 000000000000001fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[55,60]: + int 00000000000000fffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[55,59]: + int 000000000000007ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[55,58]: + int 000000000000003ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[55,57]: + int 000000000000001ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[55,56]: + int 00000000000000ffffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[55,55]: + int 000000000000007fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[55,54]: + int 000000000000003fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[55,53]: + int 000000000000001fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[55,52]: + int 00000000000000fffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[55,51]: + int 000000000000007ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[55,50]: + int 000000000000003ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[55,49]: + int 000000000000001ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[55,48]: + int 00000000000000ffffffffffff <- ( 00000000000000 , ffffffffffff ) + +[55,47]: + int 000000000000007fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[55,46]: + int 000000000000003fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[55,45]: + int 000000000000001fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[55,44]: + int 00000000000000fffffffffff <- ( 00000000000000 , fffffffffff ) + +[55,43]: + int 000000000000007ffffffffff <- ( 00000000000000 , fffffffffff ) + +[55,42]: + int 000000000000003ffffffffff <- ( 00000000000000 , fffffffffff ) + +[55,41]: + int 000000000000001ffffffffff <- ( 00000000000000 , fffffffffff ) + +[55,40]: + int 00000000000000ffffffffff <- ( 00000000000000 , ffffffffff ) + +[55,39]: + int 000000000000007fffffffff <- ( 00000000000000 , ffffffffff ) + +[55,38]: + int 000000000000003fffffffff <- ( 00000000000000 , ffffffffff ) + +[55,37]: + int 000000000000001fffffffff <- ( 00000000000000 , ffffffffff ) + +[55,36]: + int 00000000000000fffffffff <- ( 00000000000000 , fffffffff ) + +[55,35]: + int 000000000000007ffffffff <- ( 00000000000000 , fffffffff ) + +[55,34]: + int 000000000000003ffffffff <- ( 00000000000000 , fffffffff ) + +[55,33]: + int 000000000000001ffffffff <- ( 00000000000000 , fffffffff ) + +[55,32]: + int 00000000000000ffffffff <- ( 00000000000000 , ffffffff ) + +[55,31]: + int 000000000000007fffffff <- ( 00000000000000 , ffffffff ) + +[55,30]: + int 000000000000003fffffff <- ( 00000000000000 , ffffffff ) + +[55,29]: + int 000000000000001fffffff <- ( 00000000000000 , ffffffff ) + +[55,28]: + int 00000000000000fffffff <- ( 00000000000000 , fffffff ) + +[55,27]: + int 000000000000007ffffff <- ( 00000000000000 , fffffff ) + +[55,26]: + int 000000000000003ffffff <- ( 00000000000000 , fffffff ) + +[55,25]: + int 000000000000001ffffff <- ( 00000000000000 , fffffff ) + +[55,24]: + int 00000000000000ffffff <- ( 00000000000000 , ffffff ) + +[55,23]: + int 000000000000007fffff <- ( 00000000000000 , ffffff ) + +[55,22]: + int 000000000000003fffff <- ( 00000000000000 , ffffff ) + +[55,21]: + int 000000000000001fffff <- ( 00000000000000 , ffffff ) + +[55,20]: + int 00000000000000fffff <- ( 00000000000000 , fffff ) + +[55,19]: + int 000000000000007ffff <- ( 00000000000000 , fffff ) + +[55,18]: + int 000000000000003ffff <- ( 00000000000000 , fffff ) + +[55,17]: + int 000000000000001ffff <- ( 00000000000000 , fffff ) + +[55,16]: + int 00000000000000ffff <- ( 00000000000000 , ffff ) + +[55,15]: + int 000000000000007fff <- ( 00000000000000 , ffff ) + +[55,14]: + int 000000000000003fff <- ( 00000000000000 , ffff ) + +[55,13]: + int 000000000000001fff <- ( 00000000000000 , ffff ) + +[55,12]: + int 00000000000000fff <- ( 00000000000000 , fff ) + +[55,11]: + int 000000000000007ff <- ( 00000000000000 , fff ) + +[55,10]: + int 000000000000003ff <- ( 00000000000000 , fff ) + +[55,9]: + int 000000000000001ff <- ( 00000000000000 , fff ) + +[55,8]: + int 00000000000000ff <- ( 00000000000000 , ff ) + +[55,7]: + int 000000000000007f <- ( 00000000000000 , ff ) + +[55,6]: + int 000000000000003f <- ( 00000000000000 , ff ) + +[55,5]: + int 000000000000001f <- ( 00000000000000 , ff ) + +[55,4]: + int 00000000000000f <- ( 00000000000000 , f ) + +[55,3]: + int 000000000000007 <- ( 00000000000000 , f ) + +[55,2]: + int 000000000000003 <- ( 00000000000000 , f ) + +[55,1]: + int 000000000000001 <- ( 00000000000000 , f ) + +[54,64]: + int 00000000000000ffffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[54,63]: + int 000000000000007fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[54,62]: + int 000000000000003fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[54,61]: + int 00000000000001fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[54,60]: + int 00000000000000fffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[54,59]: + int 000000000000007ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[54,58]: + int 000000000000003ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[54,57]: + int 00000000000001ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[54,56]: + int 00000000000000ffffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[54,55]: + int 000000000000007fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[54,54]: + int 000000000000003fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[54,53]: + int 00000000000001fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[54,52]: + int 00000000000000fffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[54,51]: + int 000000000000007ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[54,50]: + int 000000000000003ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[54,49]: + int 00000000000001ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[54,48]: + int 00000000000000ffffffffffff <- ( 00000000000000 , ffffffffffff ) + +[54,47]: + int 000000000000007fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[54,46]: + int 000000000000003fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[54,45]: + int 00000000000001fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[54,44]: + int 00000000000000fffffffffff <- ( 00000000000000 , fffffffffff ) + +[54,43]: + int 000000000000007ffffffffff <- ( 00000000000000 , fffffffffff ) + +[54,42]: + int 000000000000003ffffffffff <- ( 00000000000000 , fffffffffff ) + +[54,41]: + int 00000000000001ffffffffff <- ( 00000000000000 , fffffffffff ) + +[54,40]: + int 00000000000000ffffffffff <- ( 00000000000000 , ffffffffff ) + +[54,39]: + int 000000000000007fffffffff <- ( 00000000000000 , ffffffffff ) + +[54,38]: + int 000000000000003fffffffff <- ( 00000000000000 , ffffffffff ) + +[54,37]: + int 00000000000001fffffffff <- ( 00000000000000 , ffffffffff ) + +[54,36]: + int 00000000000000fffffffff <- ( 00000000000000 , fffffffff ) + +[54,35]: + int 000000000000007ffffffff <- ( 00000000000000 , fffffffff ) + +[54,34]: + int 000000000000003ffffffff <- ( 00000000000000 , fffffffff ) + +[54,33]: + int 00000000000001ffffffff <- ( 00000000000000 , fffffffff ) + +[54,32]: + int 00000000000000ffffffff <- ( 00000000000000 , ffffffff ) + +[54,31]: + int 000000000000007fffffff <- ( 00000000000000 , ffffffff ) + +[54,30]: + int 000000000000003fffffff <- ( 00000000000000 , ffffffff ) + +[54,29]: + int 00000000000001fffffff <- ( 00000000000000 , ffffffff ) + +[54,28]: + int 00000000000000fffffff <- ( 00000000000000 , fffffff ) + +[54,27]: + int 000000000000007ffffff <- ( 00000000000000 , fffffff ) + +[54,26]: + int 000000000000003ffffff <- ( 00000000000000 , fffffff ) + +[54,25]: + int 00000000000001ffffff <- ( 00000000000000 , fffffff ) + +[54,24]: + int 00000000000000ffffff <- ( 00000000000000 , ffffff ) + +[54,23]: + int 000000000000007fffff <- ( 00000000000000 , ffffff ) + +[54,22]: + int 000000000000003fffff <- ( 00000000000000 , ffffff ) + +[54,21]: + int 00000000000001fffff <- ( 00000000000000 , ffffff ) + +[54,20]: + int 00000000000000fffff <- ( 00000000000000 , fffff ) + +[54,19]: + int 000000000000007ffff <- ( 00000000000000 , fffff ) + +[54,18]: + int 000000000000003ffff <- ( 00000000000000 , fffff ) + +[54,17]: + int 00000000000001ffff <- ( 00000000000000 , fffff ) + +[54,16]: + int 00000000000000ffff <- ( 00000000000000 , ffff ) + +[54,15]: + int 000000000000007fff <- ( 00000000000000 , ffff ) + +[54,14]: + int 000000000000003fff <- ( 00000000000000 , ffff ) + +[54,13]: + int 00000000000001fff <- ( 00000000000000 , ffff ) + +[54,12]: + int 00000000000000fff <- ( 00000000000000 , fff ) + +[54,11]: + int 000000000000007ff <- ( 00000000000000 , fff ) + +[54,10]: + int 000000000000003ff <- ( 00000000000000 , fff ) + +[54,9]: + int 00000000000001ff <- ( 00000000000000 , fff ) + +[54,8]: + int 00000000000000ff <- ( 00000000000000 , ff ) + +[54,7]: + int 000000000000007f <- ( 00000000000000 , ff ) + +[54,6]: + int 000000000000003f <- ( 00000000000000 , ff ) + +[54,5]: + int 00000000000001f <- ( 00000000000000 , ff ) + +[54,4]: + int 00000000000000f <- ( 00000000000000 , f ) + +[54,3]: + int 000000000000007 <- ( 00000000000000 , f ) + +[54,2]: + int 000000000000003 <- ( 00000000000000 , f ) + +[54,1]: + int 00000000000001 <- ( 00000000000000 , f ) + +[53,64]: + int 00000000000000ffffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[53,63]: + int 000000000000007fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[53,62]: + int 00000000000003fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[53,61]: + int 00000000000001fffffffffffffff <- ( 00000000000000 , ffffffffffffffff ) + +[53,60]: + int 00000000000000fffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[53,59]: + int 000000000000007ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[53,58]: + int 00000000000003ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[53,57]: + int 00000000000001ffffffffffffff <- ( 00000000000000 , fffffffffffffff ) + +[53,56]: + int 00000000000000ffffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[53,55]: + int 000000000000007fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[53,54]: + int 00000000000003fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[53,53]: + int 00000000000001fffffffffffff <- ( 00000000000000 , ffffffffffffff ) + +[53,52]: + int 00000000000000fffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[53,51]: + int 000000000000007ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[53,50]: + int 00000000000003ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[53,49]: + int 00000000000001ffffffffffff <- ( 00000000000000 , fffffffffffff ) + +[53,48]: + int 00000000000000ffffffffffff <- ( 00000000000000 , ffffffffffff ) + +[53,47]: + int 000000000000007fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[53,46]: + int 00000000000003fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[53,45]: + int 00000000000001fffffffffff <- ( 00000000000000 , ffffffffffff ) + +[53,44]: + int 00000000000000fffffffffff <- ( 00000000000000 , fffffffffff ) + +[53,43]: + int 000000000000007ffffffffff <- ( 00000000000000 , fffffffffff ) + +[53,42]: + int 00000000000003ffffffffff <- ( 00000000000000 , fffffffffff ) + +[53,41]: + int 00000000000001ffffffffff <- ( 00000000000000 , fffffffffff ) + +[53,40]: + int 00000000000000ffffffffff <- ( 00000000000000 , ffffffffff ) + +[53,39]: + int 000000000000007fffffffff <- ( 00000000000000 , ffffffffff ) + +[53,38]: + int 00000000000003fffffffff <- ( 00000000000000 , ffffffffff ) + +[53,37]: + int 00000000000001fffffffff <- ( 00000000000000 , ffffffffff ) + +[53,36]: + int 00000000000000fffffffff <- ( 00000000000000 , fffffffff ) + +[53,35]: + int 000000000000007ffffffff <- ( 00000000000000 , fffffffff ) + +[53,34]: + int 00000000000003ffffffff <- ( 00000000000000 , fffffffff ) + +[53,33]: + int 00000000000001ffffffff <- ( 00000000000000 , fffffffff ) + +[53,32]: + int 00000000000000ffffffff <- ( 00000000000000 , ffffffff ) + +[53,31]: + int 000000000000007fffffff <- ( 00000000000000 , ffffffff ) + +[53,30]: + int 00000000000003fffffff <- ( 00000000000000 , ffffffff ) + +[53,29]: + int 00000000000001fffffff <- ( 00000000000000 , ffffffff ) + +[53,28]: + int 00000000000000fffffff <- ( 00000000000000 , fffffff ) + +[53,27]: + int 000000000000007ffffff <- ( 00000000000000 , fffffff ) + +[53,26]: + int 00000000000003ffffff <- ( 00000000000000 , fffffff ) + +[53,25]: + int 00000000000001ffffff <- ( 00000000000000 , fffffff ) + +[53,24]: + int 00000000000000ffffff <- ( 00000000000000 , ffffff ) + +[53,23]: + int 000000000000007fffff <- ( 00000000000000 , ffffff ) + +[53,22]: + int 00000000000003fffff <- ( 00000000000000 , ffffff ) + +[53,21]: + int 00000000000001fffff <- ( 00000000000000 , ffffff ) + +[53,20]: + int 00000000000000fffff <- ( 00000000000000 , fffff ) + +[53,19]: + int 000000000000007ffff <- ( 00000000000000 , fffff ) + +[53,18]: + int 00000000000003ffff <- ( 00000000000000 , fffff ) + +[53,17]: + int 00000000000001ffff <- ( 00000000000000 , fffff ) + +[53,16]: + int 00000000000000ffff <- ( 00000000000000 , ffff ) + +[53,15]: + int 000000000000007fff <- ( 00000000000000 , ffff ) + +[53,14]: + int 00000000000003fff <- ( 00000000000000 , ffff ) + +[53,13]: + int 00000000000001fff <- ( 00000000000000 , ffff ) + +[53,12]: + int 00000000000000fff <- ( 00000000000000 , fff ) + +[53,11]: + int 000000000000007ff <- ( 00000000000000 , fff ) + +[53,10]: + int 00000000000003ff <- ( 00000000000000 , fff ) + +[53,9]: + int 00000000000001ff <- ( 00000000000000 , fff ) + +[53,8]: + int 00000000000000ff <- ( 00000000000000 , ff ) + +[53,7]: + int 000000000000007f <- ( 00000000000000 , ff ) + +[53,6]: + int 00000000000003f <- ( 00000000000000 , ff ) + +[53,5]: + int 00000000000001f <- ( 00000000000000 , ff ) + +[53,4]: + int 00000000000000f <- ( 00000000000000 , f ) + +[53,3]: + int 000000000000007 <- ( 00000000000000 , f ) + +[53,2]: + int 00000000000003 <- ( 00000000000000 , f ) + +[53,1]: + int 00000000000001 <- ( 00000000000000 , f ) + +[52,64]: + int 00000000000000ffffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[52,63]: + int 00000000000007fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[52,62]: + int 00000000000003fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[52,61]: + int 00000000000001fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[52,60]: + int 00000000000000fffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[52,59]: + int 00000000000007ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[52,58]: + int 00000000000003ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[52,57]: + int 00000000000001ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[52,56]: + int 00000000000000ffffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[52,55]: + int 00000000000007fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[52,54]: + int 00000000000003fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[52,53]: + int 00000000000001fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[52,52]: + int 00000000000000fffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[52,51]: + int 00000000000007ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[52,50]: + int 00000000000003ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[52,49]: + int 00000000000001ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[52,48]: + int 00000000000000ffffffffffff <- ( 0000000000000 , ffffffffffff ) + +[52,47]: + int 00000000000007fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[52,46]: + int 00000000000003fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[52,45]: + int 00000000000001fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[52,44]: + int 00000000000000fffffffffff <- ( 0000000000000 , fffffffffff ) + +[52,43]: + int 00000000000007ffffffffff <- ( 0000000000000 , fffffffffff ) + +[52,42]: + int 00000000000003ffffffffff <- ( 0000000000000 , fffffffffff ) + +[52,41]: + int 00000000000001ffffffffff <- ( 0000000000000 , fffffffffff ) + +[52,40]: + int 00000000000000ffffffffff <- ( 0000000000000 , ffffffffff ) + +[52,39]: + int 00000000000007fffffffff <- ( 0000000000000 , ffffffffff ) + +[52,38]: + int 00000000000003fffffffff <- ( 0000000000000 , ffffffffff ) + +[52,37]: + int 00000000000001fffffffff <- ( 0000000000000 , ffffffffff ) + +[52,36]: + int 00000000000000fffffffff <- ( 0000000000000 , fffffffff ) + +[52,35]: + int 00000000000007ffffffff <- ( 0000000000000 , fffffffff ) + +[52,34]: + int 00000000000003ffffffff <- ( 0000000000000 , fffffffff ) + +[52,33]: + int 00000000000001ffffffff <- ( 0000000000000 , fffffffff ) + +[52,32]: + int 00000000000000ffffffff <- ( 0000000000000 , ffffffff ) + +[52,31]: + int 00000000000007fffffff <- ( 0000000000000 , ffffffff ) + +[52,30]: + int 00000000000003fffffff <- ( 0000000000000 , ffffffff ) + +[52,29]: + int 00000000000001fffffff <- ( 0000000000000 , ffffffff ) + +[52,28]: + int 00000000000000fffffff <- ( 0000000000000 , fffffff ) + +[52,27]: + int 00000000000007ffffff <- ( 0000000000000 , fffffff ) + +[52,26]: + int 00000000000003ffffff <- ( 0000000000000 , fffffff ) + +[52,25]: + int 00000000000001ffffff <- ( 0000000000000 , fffffff ) + +[52,24]: + int 00000000000000ffffff <- ( 0000000000000 , ffffff ) + +[52,23]: + int 00000000000007fffff <- ( 0000000000000 , ffffff ) + +[52,22]: + int 00000000000003fffff <- ( 0000000000000 , ffffff ) + +[52,21]: + int 00000000000001fffff <- ( 0000000000000 , ffffff ) + +[52,20]: + int 00000000000000fffff <- ( 0000000000000 , fffff ) + +[52,19]: + int 00000000000007ffff <- ( 0000000000000 , fffff ) + +[52,18]: + int 00000000000003ffff <- ( 0000000000000 , fffff ) + +[52,17]: + int 00000000000001ffff <- ( 0000000000000 , fffff ) + +[52,16]: + int 00000000000000ffff <- ( 0000000000000 , ffff ) + +[52,15]: + int 00000000000007fff <- ( 0000000000000 , ffff ) + +[52,14]: + int 00000000000003fff <- ( 0000000000000 , ffff ) + +[52,13]: + int 00000000000001fff <- ( 0000000000000 , ffff ) + +[52,12]: + int 00000000000000fff <- ( 0000000000000 , fff ) + +[52,11]: + int 00000000000007ff <- ( 0000000000000 , fff ) + +[52,10]: + int 00000000000003ff <- ( 0000000000000 , fff ) + +[52,9]: + int 00000000000001ff <- ( 0000000000000 , fff ) + +[52,8]: + int 00000000000000ff <- ( 0000000000000 , ff ) + +[52,7]: + int 00000000000007f <- ( 0000000000000 , ff ) + +[52,6]: + int 00000000000003f <- ( 0000000000000 , ff ) + +[52,5]: + int 00000000000001f <- ( 0000000000000 , ff ) + +[52,4]: + int 00000000000000f <- ( 0000000000000 , f ) + +[52,3]: + int 00000000000007 <- ( 0000000000000 , f ) + +[52,2]: + int 00000000000003 <- ( 0000000000000 , f ) + +[52,1]: + int 00000000000001 <- ( 0000000000000 , f ) + +[51,64]: + int 0000000000000ffffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[51,63]: + int 00000000000007fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[51,62]: + int 00000000000003fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[51,61]: + int 00000000000001fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[51,60]: + int 0000000000000fffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[51,59]: + int 00000000000007ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[51,58]: + int 00000000000003ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[51,57]: + int 00000000000001ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[51,56]: + int 0000000000000ffffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[51,55]: + int 00000000000007fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[51,54]: + int 00000000000003fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[51,53]: + int 00000000000001fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[51,52]: + int 0000000000000fffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[51,51]: + int 00000000000007ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[51,50]: + int 00000000000003ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[51,49]: + int 00000000000001ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[51,48]: + int 0000000000000ffffffffffff <- ( 0000000000000 , ffffffffffff ) + +[51,47]: + int 00000000000007fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[51,46]: + int 00000000000003fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[51,45]: + int 00000000000001fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[51,44]: + int 0000000000000fffffffffff <- ( 0000000000000 , fffffffffff ) + +[51,43]: + int 00000000000007ffffffffff <- ( 0000000000000 , fffffffffff ) + +[51,42]: + int 00000000000003ffffffffff <- ( 0000000000000 , fffffffffff ) + +[51,41]: + int 00000000000001ffffffffff <- ( 0000000000000 , fffffffffff ) + +[51,40]: + int 0000000000000ffffffffff <- ( 0000000000000 , ffffffffff ) + +[51,39]: + int 00000000000007fffffffff <- ( 0000000000000 , ffffffffff ) + +[51,38]: + int 00000000000003fffffffff <- ( 0000000000000 , ffffffffff ) + +[51,37]: + int 00000000000001fffffffff <- ( 0000000000000 , ffffffffff ) + +[51,36]: + int 0000000000000fffffffff <- ( 0000000000000 , fffffffff ) + +[51,35]: + int 00000000000007ffffffff <- ( 0000000000000 , fffffffff ) + +[51,34]: + int 00000000000003ffffffff <- ( 0000000000000 , fffffffff ) + +[51,33]: + int 00000000000001ffffffff <- ( 0000000000000 , fffffffff ) + +[51,32]: + int 0000000000000ffffffff <- ( 0000000000000 , ffffffff ) + +[51,31]: + int 00000000000007fffffff <- ( 0000000000000 , ffffffff ) + +[51,30]: + int 00000000000003fffffff <- ( 0000000000000 , ffffffff ) + +[51,29]: + int 00000000000001fffffff <- ( 0000000000000 , ffffffff ) + +[51,28]: + int 0000000000000fffffff <- ( 0000000000000 , fffffff ) + +[51,27]: + int 00000000000007ffffff <- ( 0000000000000 , fffffff ) + +[51,26]: + int 00000000000003ffffff <- ( 0000000000000 , fffffff ) + +[51,25]: + int 00000000000001ffffff <- ( 0000000000000 , fffffff ) + +[51,24]: + int 0000000000000ffffff <- ( 0000000000000 , ffffff ) + +[51,23]: + int 00000000000007fffff <- ( 0000000000000 , ffffff ) + +[51,22]: + int 00000000000003fffff <- ( 0000000000000 , ffffff ) + +[51,21]: + int 00000000000001fffff <- ( 0000000000000 , ffffff ) + +[51,20]: + int 0000000000000fffff <- ( 0000000000000 , fffff ) + +[51,19]: + int 00000000000007ffff <- ( 0000000000000 , fffff ) + +[51,18]: + int 00000000000003ffff <- ( 0000000000000 , fffff ) + +[51,17]: + int 00000000000001ffff <- ( 0000000000000 , fffff ) + +[51,16]: + int 0000000000000ffff <- ( 0000000000000 , ffff ) + +[51,15]: + int 00000000000007fff <- ( 0000000000000 , ffff ) + +[51,14]: + int 00000000000003fff <- ( 0000000000000 , ffff ) + +[51,13]: + int 00000000000001fff <- ( 0000000000000 , ffff ) + +[51,12]: + int 0000000000000fff <- ( 0000000000000 , fff ) + +[51,11]: + int 00000000000007ff <- ( 0000000000000 , fff ) + +[51,10]: + int 00000000000003ff <- ( 0000000000000 , fff ) + +[51,9]: + int 00000000000001ff <- ( 0000000000000 , fff ) + +[51,8]: + int 0000000000000ff <- ( 0000000000000 , ff ) + +[51,7]: + int 00000000000007f <- ( 0000000000000 , ff ) + +[51,6]: + int 00000000000003f <- ( 0000000000000 , ff ) + +[51,5]: + int 00000000000001f <- ( 0000000000000 , ff ) + +[51,4]: + int 0000000000000f <- ( 0000000000000 , f ) + +[51,3]: + int 00000000000007 <- ( 0000000000000 , f ) + +[51,2]: + int 00000000000003 <- ( 0000000000000 , f ) + +[51,1]: + int 00000000000001 <- ( 0000000000000 , f ) + +[50,64]: + int 0000000000000ffffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[50,63]: + int 00000000000007fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[50,62]: + int 00000000000003fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[50,61]: + int 0000000000001fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[50,60]: + int 0000000000000fffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[50,59]: + int 00000000000007ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[50,58]: + int 00000000000003ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[50,57]: + int 0000000000001ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[50,56]: + int 0000000000000ffffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[50,55]: + int 00000000000007fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[50,54]: + int 00000000000003fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[50,53]: + int 0000000000001fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[50,52]: + int 0000000000000fffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[50,51]: + int 00000000000007ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[50,50]: + int 00000000000003ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[50,49]: + int 0000000000001ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[50,48]: + int 0000000000000ffffffffffff <- ( 0000000000000 , ffffffffffff ) + +[50,47]: + int 00000000000007fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[50,46]: + int 00000000000003fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[50,45]: + int 0000000000001fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[50,44]: + int 0000000000000fffffffffff <- ( 0000000000000 , fffffffffff ) + +[50,43]: + int 00000000000007ffffffffff <- ( 0000000000000 , fffffffffff ) + +[50,42]: + int 00000000000003ffffffffff <- ( 0000000000000 , fffffffffff ) + +[50,41]: + int 0000000000001ffffffffff <- ( 0000000000000 , fffffffffff ) + +[50,40]: + int 0000000000000ffffffffff <- ( 0000000000000 , ffffffffff ) + +[50,39]: + int 00000000000007fffffffff <- ( 0000000000000 , ffffffffff ) + +[50,38]: + int 00000000000003fffffffff <- ( 0000000000000 , ffffffffff ) + +[50,37]: + int 0000000000001fffffffff <- ( 0000000000000 , ffffffffff ) + +[50,36]: + int 0000000000000fffffffff <- ( 0000000000000 , fffffffff ) + +[50,35]: + int 00000000000007ffffffff <- ( 0000000000000 , fffffffff ) + +[50,34]: + int 00000000000003ffffffff <- ( 0000000000000 , fffffffff ) + +[50,33]: + int 0000000000001ffffffff <- ( 0000000000000 , fffffffff ) + +[50,32]: + int 0000000000000ffffffff <- ( 0000000000000 , ffffffff ) + +[50,31]: + int 00000000000007fffffff <- ( 0000000000000 , ffffffff ) + +[50,30]: + int 00000000000003fffffff <- ( 0000000000000 , ffffffff ) + +[50,29]: + int 0000000000001fffffff <- ( 0000000000000 , ffffffff ) + +[50,28]: + int 0000000000000fffffff <- ( 0000000000000 , fffffff ) + +[50,27]: + int 00000000000007ffffff <- ( 0000000000000 , fffffff ) + +[50,26]: + int 00000000000003ffffff <- ( 0000000000000 , fffffff ) + +[50,25]: + int 0000000000001ffffff <- ( 0000000000000 , fffffff ) + +[50,24]: + int 0000000000000ffffff <- ( 0000000000000 , ffffff ) + +[50,23]: + int 00000000000007fffff <- ( 0000000000000 , ffffff ) + +[50,22]: + int 00000000000003fffff <- ( 0000000000000 , ffffff ) + +[50,21]: + int 0000000000001fffff <- ( 0000000000000 , ffffff ) + +[50,20]: + int 0000000000000fffff <- ( 0000000000000 , fffff ) + +[50,19]: + int 00000000000007ffff <- ( 0000000000000 , fffff ) + +[50,18]: + int 00000000000003ffff <- ( 0000000000000 , fffff ) + +[50,17]: + int 0000000000001ffff <- ( 0000000000000 , fffff ) + +[50,16]: + int 0000000000000ffff <- ( 0000000000000 , ffff ) + +[50,15]: + int 00000000000007fff <- ( 0000000000000 , ffff ) + +[50,14]: + int 00000000000003fff <- ( 0000000000000 , ffff ) + +[50,13]: + int 0000000000001fff <- ( 0000000000000 , ffff ) + +[50,12]: + int 0000000000000fff <- ( 0000000000000 , fff ) + +[50,11]: + int 00000000000007ff <- ( 0000000000000 , fff ) + +[50,10]: + int 00000000000003ff <- ( 0000000000000 , fff ) + +[50,9]: + int 0000000000001ff <- ( 0000000000000 , fff ) + +[50,8]: + int 0000000000000ff <- ( 0000000000000 , ff ) + +[50,7]: + int 00000000000007f <- ( 0000000000000 , ff ) + +[50,6]: + int 00000000000003f <- ( 0000000000000 , ff ) + +[50,5]: + int 0000000000001f <- ( 0000000000000 , ff ) + +[50,4]: + int 0000000000000f <- ( 0000000000000 , f ) + +[50,3]: + int 00000000000007 <- ( 0000000000000 , f ) + +[50,2]: + int 00000000000003 <- ( 0000000000000 , f ) + +[50,1]: + int 0000000000001 <- ( 0000000000000 , f ) + +[49,64]: + int 0000000000000ffffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[49,63]: + int 00000000000007fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[49,62]: + int 0000000000003fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[49,61]: + int 0000000000001fffffffffffffff <- ( 0000000000000 , ffffffffffffffff ) + +[49,60]: + int 0000000000000fffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[49,59]: + int 00000000000007ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[49,58]: + int 0000000000003ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[49,57]: + int 0000000000001ffffffffffffff <- ( 0000000000000 , fffffffffffffff ) + +[49,56]: + int 0000000000000ffffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[49,55]: + int 00000000000007fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[49,54]: + int 0000000000003fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[49,53]: + int 0000000000001fffffffffffff <- ( 0000000000000 , ffffffffffffff ) + +[49,52]: + int 0000000000000fffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[49,51]: + int 00000000000007ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[49,50]: + int 0000000000003ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[49,49]: + int 0000000000001ffffffffffff <- ( 0000000000000 , fffffffffffff ) + +[49,48]: + int 0000000000000ffffffffffff <- ( 0000000000000 , ffffffffffff ) + +[49,47]: + int 00000000000007fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[49,46]: + int 0000000000003fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[49,45]: + int 0000000000001fffffffffff <- ( 0000000000000 , ffffffffffff ) + +[49,44]: + int 0000000000000fffffffffff <- ( 0000000000000 , fffffffffff ) + +[49,43]: + int 00000000000007ffffffffff <- ( 0000000000000 , fffffffffff ) + +[49,42]: + int 0000000000003ffffffffff <- ( 0000000000000 , fffffffffff ) + +[49,41]: + int 0000000000001ffffffffff <- ( 0000000000000 , fffffffffff ) + +[49,40]: + int 0000000000000ffffffffff <- ( 0000000000000 , ffffffffff ) + +[49,39]: + int 00000000000007fffffffff <- ( 0000000000000 , ffffffffff ) + +[49,38]: + int 0000000000003fffffffff <- ( 0000000000000 , ffffffffff ) + +[49,37]: + int 0000000000001fffffffff <- ( 0000000000000 , ffffffffff ) + +[49,36]: + int 0000000000000fffffffff <- ( 0000000000000 , fffffffff ) + +[49,35]: + int 00000000000007ffffffff <- ( 0000000000000 , fffffffff ) + +[49,34]: + int 0000000000003ffffffff <- ( 0000000000000 , fffffffff ) + +[49,33]: + int 0000000000001ffffffff <- ( 0000000000000 , fffffffff ) + +[49,32]: + int 0000000000000ffffffff <- ( 0000000000000 , ffffffff ) + +[49,31]: + int 00000000000007fffffff <- ( 0000000000000 , ffffffff ) + +[49,30]: + int 0000000000003fffffff <- ( 0000000000000 , ffffffff ) + +[49,29]: + int 0000000000001fffffff <- ( 0000000000000 , ffffffff ) + +[49,28]: + int 0000000000000fffffff <- ( 0000000000000 , fffffff ) + +[49,27]: + int 00000000000007ffffff <- ( 0000000000000 , fffffff ) + +[49,26]: + int 0000000000003ffffff <- ( 0000000000000 , fffffff ) + +[49,25]: + int 0000000000001ffffff <- ( 0000000000000 , fffffff ) + +[49,24]: + int 0000000000000ffffff <- ( 0000000000000 , ffffff ) + +[49,23]: + int 00000000000007fffff <- ( 0000000000000 , ffffff ) + +[49,22]: + int 0000000000003fffff <- ( 0000000000000 , ffffff ) + +[49,21]: + int 0000000000001fffff <- ( 0000000000000 , ffffff ) + +[49,20]: + int 0000000000000fffff <- ( 0000000000000 , fffff ) + +[49,19]: + int 00000000000007ffff <- ( 0000000000000 , fffff ) + +[49,18]: + int 0000000000003ffff <- ( 0000000000000 , fffff ) + +[49,17]: + int 0000000000001ffff <- ( 0000000000000 , fffff ) + +[49,16]: + int 0000000000000ffff <- ( 0000000000000 , ffff ) + +[49,15]: + int 00000000000007fff <- ( 0000000000000 , ffff ) + +[49,14]: + int 0000000000003fff <- ( 0000000000000 , ffff ) + +[49,13]: + int 0000000000001fff <- ( 0000000000000 , ffff ) + +[49,12]: + int 0000000000000fff <- ( 0000000000000 , fff ) + +[49,11]: + int 00000000000007ff <- ( 0000000000000 , fff ) + +[49,10]: + int 0000000000003ff <- ( 0000000000000 , fff ) + +[49,9]: + int 0000000000001ff <- ( 0000000000000 , fff ) + +[49,8]: + int 0000000000000ff <- ( 0000000000000 , ff ) + +[49,7]: + int 00000000000007f <- ( 0000000000000 , ff ) + +[49,6]: + int 0000000000003f <- ( 0000000000000 , ff ) + +[49,5]: + int 0000000000001f <- ( 0000000000000 , ff ) + +[49,4]: + int 0000000000000f <- ( 0000000000000 , f ) + +[49,3]: + int 00000000000007 <- ( 0000000000000 , f ) + +[49,2]: + int 0000000000003 <- ( 0000000000000 , f ) + +[49,1]: + int 0000000000001 <- ( 0000000000000 , f ) + +[48,64]: + int 0000000000000ffffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[48,63]: + int 0000000000007fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[48,62]: + int 0000000000003fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[48,61]: + int 0000000000001fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[48,60]: + int 0000000000000fffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[48,59]: + int 0000000000007ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[48,58]: + int 0000000000003ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[48,57]: + int 0000000000001ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[48,56]: + int 0000000000000ffffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[48,55]: + int 0000000000007fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[48,54]: + int 0000000000003fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[48,53]: + int 0000000000001fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[48,52]: + int 0000000000000fffffffffffff <- ( 000000000000 , fffffffffffff ) + +[48,51]: + int 0000000000007ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[48,50]: + int 0000000000003ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[48,49]: + int 0000000000001ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[48,48]: + int 0000000000000ffffffffffff <- ( 000000000000 , ffffffffffff ) + +[48,47]: + int 0000000000007fffffffffff <- ( 000000000000 , ffffffffffff ) + +[48,46]: + int 0000000000003fffffffffff <- ( 000000000000 , ffffffffffff ) + +[48,45]: + int 0000000000001fffffffffff <- ( 000000000000 , ffffffffffff ) + +[48,44]: + int 0000000000000fffffffffff <- ( 000000000000 , fffffffffff ) + +[48,43]: + int 0000000000007ffffffffff <- ( 000000000000 , fffffffffff ) + +[48,42]: + int 0000000000003ffffffffff <- ( 000000000000 , fffffffffff ) + +[48,41]: + int 0000000000001ffffffffff <- ( 000000000000 , fffffffffff ) + +[48,40]: + int 0000000000000ffffffffff <- ( 000000000000 , ffffffffff ) + +[48,39]: + int 0000000000007fffffffff <- ( 000000000000 , ffffffffff ) + +[48,38]: + int 0000000000003fffffffff <- ( 000000000000 , ffffffffff ) + +[48,37]: + int 0000000000001fffffffff <- ( 000000000000 , ffffffffff ) + +[48,36]: + int 0000000000000fffffffff <- ( 000000000000 , fffffffff ) + +[48,35]: + int 0000000000007ffffffff <- ( 000000000000 , fffffffff ) + +[48,34]: + int 0000000000003ffffffff <- ( 000000000000 , fffffffff ) + +[48,33]: + int 0000000000001ffffffff <- ( 000000000000 , fffffffff ) + +[48,32]: + int 0000000000000ffffffff <- ( 000000000000 , ffffffff ) + +[48,31]: + int 0000000000007fffffff <- ( 000000000000 , ffffffff ) + +[48,30]: + int 0000000000003fffffff <- ( 000000000000 , ffffffff ) + +[48,29]: + int 0000000000001fffffff <- ( 000000000000 , ffffffff ) + +[48,28]: + int 0000000000000fffffff <- ( 000000000000 , fffffff ) + +[48,27]: + int 0000000000007ffffff <- ( 000000000000 , fffffff ) + +[48,26]: + int 0000000000003ffffff <- ( 000000000000 , fffffff ) + +[48,25]: + int 0000000000001ffffff <- ( 000000000000 , fffffff ) + +[48,24]: + int 0000000000000ffffff <- ( 000000000000 , ffffff ) + +[48,23]: + int 0000000000007fffff <- ( 000000000000 , ffffff ) + +[48,22]: + int 0000000000003fffff <- ( 000000000000 , ffffff ) + +[48,21]: + int 0000000000001fffff <- ( 000000000000 , ffffff ) + +[48,20]: + int 0000000000000fffff <- ( 000000000000 , fffff ) + +[48,19]: + int 0000000000007ffff <- ( 000000000000 , fffff ) + +[48,18]: + int 0000000000003ffff <- ( 000000000000 , fffff ) + +[48,17]: + int 0000000000001ffff <- ( 000000000000 , fffff ) + +[48,16]: + int 0000000000000ffff <- ( 000000000000 , ffff ) + +[48,15]: + int 0000000000007fff <- ( 000000000000 , ffff ) + +[48,14]: + int 0000000000003fff <- ( 000000000000 , ffff ) + +[48,13]: + int 0000000000001fff <- ( 000000000000 , ffff ) + +[48,12]: + int 0000000000000fff <- ( 000000000000 , fff ) + +[48,11]: + int 0000000000007ff <- ( 000000000000 , fff ) + +[48,10]: + int 0000000000003ff <- ( 000000000000 , fff ) + +[48,9]: + int 0000000000001ff <- ( 000000000000 , fff ) + +[48,8]: + int 0000000000000ff <- ( 000000000000 , ff ) + +[48,7]: + int 0000000000007f <- ( 000000000000 , ff ) + +[48,6]: + int 0000000000003f <- ( 000000000000 , ff ) + +[48,5]: + int 0000000000001f <- ( 000000000000 , ff ) + +[48,4]: + int 0000000000000f <- ( 000000000000 , f ) + +[48,3]: + int 0000000000007 <- ( 000000000000 , f ) + +[48,2]: + int 0000000000003 <- ( 000000000000 , f ) + +[48,1]: + int 0000000000001 <- ( 000000000000 , f ) + +[47,64]: + int 000000000000ffffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[47,63]: + int 0000000000007fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[47,62]: + int 0000000000003fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[47,61]: + int 0000000000001fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[47,60]: + int 000000000000fffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[47,59]: + int 0000000000007ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[47,58]: + int 0000000000003ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[47,57]: + int 0000000000001ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[47,56]: + int 000000000000ffffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[47,55]: + int 0000000000007fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[47,54]: + int 0000000000003fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[47,53]: + int 0000000000001fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[47,52]: + int 000000000000fffffffffffff <- ( 000000000000 , fffffffffffff ) + +[47,51]: + int 0000000000007ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[47,50]: + int 0000000000003ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[47,49]: + int 0000000000001ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[47,48]: + int 000000000000ffffffffffff <- ( 000000000000 , ffffffffffff ) + +[47,47]: + int 0000000000007fffffffffff <- ( 000000000000 , ffffffffffff ) + +[47,46]: + int 0000000000003fffffffffff <- ( 000000000000 , ffffffffffff ) + +[47,45]: + int 0000000000001fffffffffff <- ( 000000000000 , ffffffffffff ) + +[47,44]: + int 000000000000fffffffffff <- ( 000000000000 , fffffffffff ) + +[47,43]: + int 0000000000007ffffffffff <- ( 000000000000 , fffffffffff ) + +[47,42]: + int 0000000000003ffffffffff <- ( 000000000000 , fffffffffff ) + +[47,41]: + int 0000000000001ffffffffff <- ( 000000000000 , fffffffffff ) + +[47,40]: + int 000000000000ffffffffff <- ( 000000000000 , ffffffffff ) + +[47,39]: + int 0000000000007fffffffff <- ( 000000000000 , ffffffffff ) + +[47,38]: + int 0000000000003fffffffff <- ( 000000000000 , ffffffffff ) + +[47,37]: + int 0000000000001fffffffff <- ( 000000000000 , ffffffffff ) + +[47,36]: + int 000000000000fffffffff <- ( 000000000000 , fffffffff ) + +[47,35]: + int 0000000000007ffffffff <- ( 000000000000 , fffffffff ) + +[47,34]: + int 0000000000003ffffffff <- ( 000000000000 , fffffffff ) + +[47,33]: + int 0000000000001ffffffff <- ( 000000000000 , fffffffff ) + +[47,32]: + int 000000000000ffffffff <- ( 000000000000 , ffffffff ) + +[47,31]: + int 0000000000007fffffff <- ( 000000000000 , ffffffff ) + +[47,30]: + int 0000000000003fffffff <- ( 000000000000 , ffffffff ) + +[47,29]: + int 0000000000001fffffff <- ( 000000000000 , ffffffff ) + +[47,28]: + int 000000000000fffffff <- ( 000000000000 , fffffff ) + +[47,27]: + int 0000000000007ffffff <- ( 000000000000 , fffffff ) + +[47,26]: + int 0000000000003ffffff <- ( 000000000000 , fffffff ) + +[47,25]: + int 0000000000001ffffff <- ( 000000000000 , fffffff ) + +[47,24]: + int 000000000000ffffff <- ( 000000000000 , ffffff ) + +[47,23]: + int 0000000000007fffff <- ( 000000000000 , ffffff ) + +[47,22]: + int 0000000000003fffff <- ( 000000000000 , ffffff ) + +[47,21]: + int 0000000000001fffff <- ( 000000000000 , ffffff ) + +[47,20]: + int 000000000000fffff <- ( 000000000000 , fffff ) + +[47,19]: + int 0000000000007ffff <- ( 000000000000 , fffff ) + +[47,18]: + int 0000000000003ffff <- ( 000000000000 , fffff ) + +[47,17]: + int 0000000000001ffff <- ( 000000000000 , fffff ) + +[47,16]: + int 000000000000ffff <- ( 000000000000 , ffff ) + +[47,15]: + int 0000000000007fff <- ( 000000000000 , ffff ) + +[47,14]: + int 0000000000003fff <- ( 000000000000 , ffff ) + +[47,13]: + int 0000000000001fff <- ( 000000000000 , ffff ) + +[47,12]: + int 000000000000fff <- ( 000000000000 , fff ) + +[47,11]: + int 0000000000007ff <- ( 000000000000 , fff ) + +[47,10]: + int 0000000000003ff <- ( 000000000000 , fff ) + +[47,9]: + int 0000000000001ff <- ( 000000000000 , fff ) + +[47,8]: + int 000000000000ff <- ( 000000000000 , ff ) + +[47,7]: + int 0000000000007f <- ( 000000000000 , ff ) + +[47,6]: + int 0000000000003f <- ( 000000000000 , ff ) + +[47,5]: + int 0000000000001f <- ( 000000000000 , ff ) + +[47,4]: + int 000000000000f <- ( 000000000000 , f ) + +[47,3]: + int 0000000000007 <- ( 000000000000 , f ) + +[47,2]: + int 0000000000003 <- ( 000000000000 , f ) + +[47,1]: + int 0000000000001 <- ( 000000000000 , f ) + +[46,64]: + int 000000000000ffffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[46,63]: + int 0000000000007fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[46,62]: + int 0000000000003fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[46,61]: + int 000000000001fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[46,60]: + int 000000000000fffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[46,59]: + int 0000000000007ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[46,58]: + int 0000000000003ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[46,57]: + int 000000000001ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[46,56]: + int 000000000000ffffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[46,55]: + int 0000000000007fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[46,54]: + int 0000000000003fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[46,53]: + int 000000000001fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[46,52]: + int 000000000000fffffffffffff <- ( 000000000000 , fffffffffffff ) + +[46,51]: + int 0000000000007ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[46,50]: + int 0000000000003ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[46,49]: + int 000000000001ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[46,48]: + int 000000000000ffffffffffff <- ( 000000000000 , ffffffffffff ) + +[46,47]: + int 0000000000007fffffffffff <- ( 000000000000 , ffffffffffff ) + +[46,46]: + int 0000000000003fffffffffff <- ( 000000000000 , ffffffffffff ) + +[46,45]: + int 000000000001fffffffffff <- ( 000000000000 , ffffffffffff ) + +[46,44]: + int 000000000000fffffffffff <- ( 000000000000 , fffffffffff ) + +[46,43]: + int 0000000000007ffffffffff <- ( 000000000000 , fffffffffff ) + +[46,42]: + int 0000000000003ffffffffff <- ( 000000000000 , fffffffffff ) + +[46,41]: + int 000000000001ffffffffff <- ( 000000000000 , fffffffffff ) + +[46,40]: + int 000000000000ffffffffff <- ( 000000000000 , ffffffffff ) + +[46,39]: + int 0000000000007fffffffff <- ( 000000000000 , ffffffffff ) + +[46,38]: + int 0000000000003fffffffff <- ( 000000000000 , ffffffffff ) + +[46,37]: + int 000000000001fffffffff <- ( 000000000000 , ffffffffff ) + +[46,36]: + int 000000000000fffffffff <- ( 000000000000 , fffffffff ) + +[46,35]: + int 0000000000007ffffffff <- ( 000000000000 , fffffffff ) + +[46,34]: + int 0000000000003ffffffff <- ( 000000000000 , fffffffff ) + +[46,33]: + int 000000000001ffffffff <- ( 000000000000 , fffffffff ) + +[46,32]: + int 000000000000ffffffff <- ( 000000000000 , ffffffff ) + +[46,31]: + int 0000000000007fffffff <- ( 000000000000 , ffffffff ) + +[46,30]: + int 0000000000003fffffff <- ( 000000000000 , ffffffff ) + +[46,29]: + int 000000000001fffffff <- ( 000000000000 , ffffffff ) + +[46,28]: + int 000000000000fffffff <- ( 000000000000 , fffffff ) + +[46,27]: + int 0000000000007ffffff <- ( 000000000000 , fffffff ) + +[46,26]: + int 0000000000003ffffff <- ( 000000000000 , fffffff ) + +[46,25]: + int 000000000001ffffff <- ( 000000000000 , fffffff ) + +[46,24]: + int 000000000000ffffff <- ( 000000000000 , ffffff ) + +[46,23]: + int 0000000000007fffff <- ( 000000000000 , ffffff ) + +[46,22]: + int 0000000000003fffff <- ( 000000000000 , ffffff ) + +[46,21]: + int 000000000001fffff <- ( 000000000000 , ffffff ) + +[46,20]: + int 000000000000fffff <- ( 000000000000 , fffff ) + +[46,19]: + int 0000000000007ffff <- ( 000000000000 , fffff ) + +[46,18]: + int 0000000000003ffff <- ( 000000000000 , fffff ) + +[46,17]: + int 000000000001ffff <- ( 000000000000 , fffff ) + +[46,16]: + int 000000000000ffff <- ( 000000000000 , ffff ) + +[46,15]: + int 0000000000007fff <- ( 000000000000 , ffff ) + +[46,14]: + int 0000000000003fff <- ( 000000000000 , ffff ) + +[46,13]: + int 000000000001fff <- ( 000000000000 , ffff ) + +[46,12]: + int 000000000000fff <- ( 000000000000 , fff ) + +[46,11]: + int 0000000000007ff <- ( 000000000000 , fff ) + +[46,10]: + int 0000000000003ff <- ( 000000000000 , fff ) + +[46,9]: + int 000000000001ff <- ( 000000000000 , fff ) + +[46,8]: + int 000000000000ff <- ( 000000000000 , ff ) + +[46,7]: + int 0000000000007f <- ( 000000000000 , ff ) + +[46,6]: + int 0000000000003f <- ( 000000000000 , ff ) + +[46,5]: + int 000000000001f <- ( 000000000000 , ff ) + +[46,4]: + int 000000000000f <- ( 000000000000 , f ) + +[46,3]: + int 0000000000007 <- ( 000000000000 , f ) + +[46,2]: + int 0000000000003 <- ( 000000000000 , f ) + +[46,1]: + int 000000000001 <- ( 000000000000 , f ) + +[45,64]: + int 000000000000ffffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[45,63]: + int 0000000000007fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[45,62]: + int 000000000003fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[45,61]: + int 000000000001fffffffffffffff <- ( 000000000000 , ffffffffffffffff ) + +[45,60]: + int 000000000000fffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[45,59]: + int 0000000000007ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[45,58]: + int 000000000003ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[45,57]: + int 000000000001ffffffffffffff <- ( 000000000000 , fffffffffffffff ) + +[45,56]: + int 000000000000ffffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[45,55]: + int 0000000000007fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[45,54]: + int 000000000003fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[45,53]: + int 000000000001fffffffffffff <- ( 000000000000 , ffffffffffffff ) + +[45,52]: + int 000000000000fffffffffffff <- ( 000000000000 , fffffffffffff ) + +[45,51]: + int 0000000000007ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[45,50]: + int 000000000003ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[45,49]: + int 000000000001ffffffffffff <- ( 000000000000 , fffffffffffff ) + +[45,48]: + int 000000000000ffffffffffff <- ( 000000000000 , ffffffffffff ) + +[45,47]: + int 0000000000007fffffffffff <- ( 000000000000 , ffffffffffff ) + +[45,46]: + int 000000000003fffffffffff <- ( 000000000000 , ffffffffffff ) + +[45,45]: + int 000000000001fffffffffff <- ( 000000000000 , ffffffffffff ) + +[45,44]: + int 000000000000fffffffffff <- ( 000000000000 , fffffffffff ) + +[45,43]: + int 0000000000007ffffffffff <- ( 000000000000 , fffffffffff ) + +[45,42]: + int 000000000003ffffffffff <- ( 000000000000 , fffffffffff ) + +[45,41]: + int 000000000001ffffffffff <- ( 000000000000 , fffffffffff ) + +[45,40]: + int 000000000000ffffffffff <- ( 000000000000 , ffffffffff ) + +[45,39]: + int 0000000000007fffffffff <- ( 000000000000 , ffffffffff ) + +[45,38]: + int 000000000003fffffffff <- ( 000000000000 , ffffffffff ) + +[45,37]: + int 000000000001fffffffff <- ( 000000000000 , ffffffffff ) + +[45,36]: + int 000000000000fffffffff <- ( 000000000000 , fffffffff ) + +[45,35]: + int 0000000000007ffffffff <- ( 000000000000 , fffffffff ) + +[45,34]: + int 000000000003ffffffff <- ( 000000000000 , fffffffff ) + +[45,33]: + int 000000000001ffffffff <- ( 000000000000 , fffffffff ) + +[45,32]: + int 000000000000ffffffff <- ( 000000000000 , ffffffff ) + +[45,31]: + int 0000000000007fffffff <- ( 000000000000 , ffffffff ) + +[45,30]: + int 000000000003fffffff <- ( 000000000000 , ffffffff ) + +[45,29]: + int 000000000001fffffff <- ( 000000000000 , ffffffff ) + +[45,28]: + int 000000000000fffffff <- ( 000000000000 , fffffff ) + +[45,27]: + int 0000000000007ffffff <- ( 000000000000 , fffffff ) + +[45,26]: + int 000000000003ffffff <- ( 000000000000 , fffffff ) + +[45,25]: + int 000000000001ffffff <- ( 000000000000 , fffffff ) + +[45,24]: + int 000000000000ffffff <- ( 000000000000 , ffffff ) + +[45,23]: + int 0000000000007fffff <- ( 000000000000 , ffffff ) + +[45,22]: + int 000000000003fffff <- ( 000000000000 , ffffff ) + +[45,21]: + int 000000000001fffff <- ( 000000000000 , ffffff ) + +[45,20]: + int 000000000000fffff <- ( 000000000000 , fffff ) + +[45,19]: + int 0000000000007ffff <- ( 000000000000 , fffff ) + +[45,18]: + int 000000000003ffff <- ( 000000000000 , fffff ) + +[45,17]: + int 000000000001ffff <- ( 000000000000 , fffff ) + +[45,16]: + int 000000000000ffff <- ( 000000000000 , ffff ) + +[45,15]: + int 0000000000007fff <- ( 000000000000 , ffff ) + +[45,14]: + int 000000000003fff <- ( 000000000000 , ffff ) + +[45,13]: + int 000000000001fff <- ( 000000000000 , ffff ) + +[45,12]: + int 000000000000fff <- ( 000000000000 , fff ) + +[45,11]: + int 0000000000007ff <- ( 000000000000 , fff ) + +[45,10]: + int 000000000003ff <- ( 000000000000 , fff ) + +[45,9]: + int 000000000001ff <- ( 000000000000 , fff ) + +[45,8]: + int 000000000000ff <- ( 000000000000 , ff ) + +[45,7]: + int 0000000000007f <- ( 000000000000 , ff ) + +[45,6]: + int 000000000003f <- ( 000000000000 , ff ) + +[45,5]: + int 000000000001f <- ( 000000000000 , ff ) + +[45,4]: + int 000000000000f <- ( 000000000000 , f ) + +[45,3]: + int 0000000000007 <- ( 000000000000 , f ) + +[45,2]: + int 000000000003 <- ( 000000000000 , f ) + +[45,1]: + int 000000000001 <- ( 000000000000 , f ) + +[44,64]: + int 000000000000ffffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[44,63]: + int 000000000007fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[44,62]: + int 000000000003fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[44,61]: + int 000000000001fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[44,60]: + int 000000000000fffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[44,59]: + int 000000000007ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[44,58]: + int 000000000003ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[44,57]: + int 000000000001ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[44,56]: + int 000000000000ffffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[44,55]: + int 000000000007fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[44,54]: + int 000000000003fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[44,53]: + int 000000000001fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[44,52]: + int 000000000000fffffffffffff <- ( 00000000000 , fffffffffffff ) + +[44,51]: + int 000000000007ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[44,50]: + int 000000000003ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[44,49]: + int 000000000001ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[44,48]: + int 000000000000ffffffffffff <- ( 00000000000 , ffffffffffff ) + +[44,47]: + int 000000000007fffffffffff <- ( 00000000000 , ffffffffffff ) + +[44,46]: + int 000000000003fffffffffff <- ( 00000000000 , ffffffffffff ) + +[44,45]: + int 000000000001fffffffffff <- ( 00000000000 , ffffffffffff ) + +[44,44]: + int 000000000000fffffffffff <- ( 00000000000 , fffffffffff ) + +[44,43]: + int 000000000007ffffffffff <- ( 00000000000 , fffffffffff ) + +[44,42]: + int 000000000003ffffffffff <- ( 00000000000 , fffffffffff ) + +[44,41]: + int 000000000001ffffffffff <- ( 00000000000 , fffffffffff ) + +[44,40]: + int 000000000000ffffffffff <- ( 00000000000 , ffffffffff ) + +[44,39]: + int 000000000007fffffffff <- ( 00000000000 , ffffffffff ) + +[44,38]: + int 000000000003fffffffff <- ( 00000000000 , ffffffffff ) + +[44,37]: + int 000000000001fffffffff <- ( 00000000000 , ffffffffff ) + +[44,36]: + int 000000000000fffffffff <- ( 00000000000 , fffffffff ) + +[44,35]: + int 000000000007ffffffff <- ( 00000000000 , fffffffff ) + +[44,34]: + int 000000000003ffffffff <- ( 00000000000 , fffffffff ) + +[44,33]: + int 000000000001ffffffff <- ( 00000000000 , fffffffff ) + +[44,32]: + int 000000000000ffffffff <- ( 00000000000 , ffffffff ) + +[44,31]: + int 000000000007fffffff <- ( 00000000000 , ffffffff ) + +[44,30]: + int 000000000003fffffff <- ( 00000000000 , ffffffff ) + +[44,29]: + int 000000000001fffffff <- ( 00000000000 , ffffffff ) + +[44,28]: + int 000000000000fffffff <- ( 00000000000 , fffffff ) + +[44,27]: + int 000000000007ffffff <- ( 00000000000 , fffffff ) + +[44,26]: + int 000000000003ffffff <- ( 00000000000 , fffffff ) + +[44,25]: + int 000000000001ffffff <- ( 00000000000 , fffffff ) + +[44,24]: + int 000000000000ffffff <- ( 00000000000 , ffffff ) + +[44,23]: + int 000000000007fffff <- ( 00000000000 , ffffff ) + +[44,22]: + int 000000000003fffff <- ( 00000000000 , ffffff ) + +[44,21]: + int 000000000001fffff <- ( 00000000000 , ffffff ) + +[44,20]: + int 000000000000fffff <- ( 00000000000 , fffff ) + +[44,19]: + int 000000000007ffff <- ( 00000000000 , fffff ) + +[44,18]: + int 000000000003ffff <- ( 00000000000 , fffff ) + +[44,17]: + int 000000000001ffff <- ( 00000000000 , fffff ) + +[44,16]: + int 000000000000ffff <- ( 00000000000 , ffff ) + +[44,15]: + int 000000000007fff <- ( 00000000000 , ffff ) + +[44,14]: + int 000000000003fff <- ( 00000000000 , ffff ) + +[44,13]: + int 000000000001fff <- ( 00000000000 , ffff ) + +[44,12]: + int 000000000000fff <- ( 00000000000 , fff ) + +[44,11]: + int 000000000007ff <- ( 00000000000 , fff ) + +[44,10]: + int 000000000003ff <- ( 00000000000 , fff ) + +[44,9]: + int 000000000001ff <- ( 00000000000 , fff ) + +[44,8]: + int 000000000000ff <- ( 00000000000 , ff ) + +[44,7]: + int 000000000007f <- ( 00000000000 , ff ) + +[44,6]: + int 000000000003f <- ( 00000000000 , ff ) + +[44,5]: + int 000000000001f <- ( 00000000000 , ff ) + +[44,4]: + int 000000000000f <- ( 00000000000 , f ) + +[44,3]: + int 000000000007 <- ( 00000000000 , f ) + +[44,2]: + int 000000000003 <- ( 00000000000 , f ) + +[44,1]: + int 000000000001 <- ( 00000000000 , f ) + +[43,64]: + int 00000000000ffffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[43,63]: + int 000000000007fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[43,62]: + int 000000000003fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[43,61]: + int 000000000001fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[43,60]: + int 00000000000fffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[43,59]: + int 000000000007ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[43,58]: + int 000000000003ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[43,57]: + int 000000000001ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[43,56]: + int 00000000000ffffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[43,55]: + int 000000000007fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[43,54]: + int 000000000003fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[43,53]: + int 000000000001fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[43,52]: + int 00000000000fffffffffffff <- ( 00000000000 , fffffffffffff ) + +[43,51]: + int 000000000007ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[43,50]: + int 000000000003ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[43,49]: + int 000000000001ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[43,48]: + int 00000000000ffffffffffff <- ( 00000000000 , ffffffffffff ) + +[43,47]: + int 000000000007fffffffffff <- ( 00000000000 , ffffffffffff ) + +[43,46]: + int 000000000003fffffffffff <- ( 00000000000 , ffffffffffff ) + +[43,45]: + int 000000000001fffffffffff <- ( 00000000000 , ffffffffffff ) + +[43,44]: + int 00000000000fffffffffff <- ( 00000000000 , fffffffffff ) + +[43,43]: + int 000000000007ffffffffff <- ( 00000000000 , fffffffffff ) + +[43,42]: + int 000000000003ffffffffff <- ( 00000000000 , fffffffffff ) + +[43,41]: + int 000000000001ffffffffff <- ( 00000000000 , fffffffffff ) + +[43,40]: + int 00000000000ffffffffff <- ( 00000000000 , ffffffffff ) + +[43,39]: + int 000000000007fffffffff <- ( 00000000000 , ffffffffff ) + +[43,38]: + int 000000000003fffffffff <- ( 00000000000 , ffffffffff ) + +[43,37]: + int 000000000001fffffffff <- ( 00000000000 , ffffffffff ) + +[43,36]: + int 00000000000fffffffff <- ( 00000000000 , fffffffff ) + +[43,35]: + int 000000000007ffffffff <- ( 00000000000 , fffffffff ) + +[43,34]: + int 000000000003ffffffff <- ( 00000000000 , fffffffff ) + +[43,33]: + int 000000000001ffffffff <- ( 00000000000 , fffffffff ) + +[43,32]: + int 00000000000ffffffff <- ( 00000000000 , ffffffff ) + +[43,31]: + int 000000000007fffffff <- ( 00000000000 , ffffffff ) + +[43,30]: + int 000000000003fffffff <- ( 00000000000 , ffffffff ) + +[43,29]: + int 000000000001fffffff <- ( 00000000000 , ffffffff ) + +[43,28]: + int 00000000000fffffff <- ( 00000000000 , fffffff ) + +[43,27]: + int 000000000007ffffff <- ( 00000000000 , fffffff ) + +[43,26]: + int 000000000003ffffff <- ( 00000000000 , fffffff ) + +[43,25]: + int 000000000001ffffff <- ( 00000000000 , fffffff ) + +[43,24]: + int 00000000000ffffff <- ( 00000000000 , ffffff ) + +[43,23]: + int 000000000007fffff <- ( 00000000000 , ffffff ) + +[43,22]: + int 000000000003fffff <- ( 00000000000 , ffffff ) + +[43,21]: + int 000000000001fffff <- ( 00000000000 , ffffff ) + +[43,20]: + int 00000000000fffff <- ( 00000000000 , fffff ) + +[43,19]: + int 000000000007ffff <- ( 00000000000 , fffff ) + +[43,18]: + int 000000000003ffff <- ( 00000000000 , fffff ) + +[43,17]: + int 000000000001ffff <- ( 00000000000 , fffff ) + +[43,16]: + int 00000000000ffff <- ( 00000000000 , ffff ) + +[43,15]: + int 000000000007fff <- ( 00000000000 , ffff ) + +[43,14]: + int 000000000003fff <- ( 00000000000 , ffff ) + +[43,13]: + int 000000000001fff <- ( 00000000000 , ffff ) + +[43,12]: + int 00000000000fff <- ( 00000000000 , fff ) + +[43,11]: + int 000000000007ff <- ( 00000000000 , fff ) + +[43,10]: + int 000000000003ff <- ( 00000000000 , fff ) + +[43,9]: + int 000000000001ff <- ( 00000000000 , fff ) + +[43,8]: + int 00000000000ff <- ( 00000000000 , ff ) + +[43,7]: + int 000000000007f <- ( 00000000000 , ff ) + +[43,6]: + int 000000000003f <- ( 00000000000 , ff ) + +[43,5]: + int 000000000001f <- ( 00000000000 , ff ) + +[43,4]: + int 00000000000f <- ( 00000000000 , f ) + +[43,3]: + int 000000000007 <- ( 00000000000 , f ) + +[43,2]: + int 000000000003 <- ( 00000000000 , f ) + +[43,1]: + int 000000000001 <- ( 00000000000 , f ) + +[42,64]: + int 00000000000ffffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[42,63]: + int 000000000007fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[42,62]: + int 000000000003fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[42,61]: + int 00000000001fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[42,60]: + int 00000000000fffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[42,59]: + int 000000000007ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[42,58]: + int 000000000003ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[42,57]: + int 00000000001ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[42,56]: + int 00000000000ffffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[42,55]: + int 000000000007fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[42,54]: + int 000000000003fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[42,53]: + int 00000000001fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[42,52]: + int 00000000000fffffffffffff <- ( 00000000000 , fffffffffffff ) + +[42,51]: + int 000000000007ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[42,50]: + int 000000000003ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[42,49]: + int 00000000001ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[42,48]: + int 00000000000ffffffffffff <- ( 00000000000 , ffffffffffff ) + +[42,47]: + int 000000000007fffffffffff <- ( 00000000000 , ffffffffffff ) + +[42,46]: + int 000000000003fffffffffff <- ( 00000000000 , ffffffffffff ) + +[42,45]: + int 00000000001fffffffffff <- ( 00000000000 , ffffffffffff ) + +[42,44]: + int 00000000000fffffffffff <- ( 00000000000 , fffffffffff ) + +[42,43]: + int 000000000007ffffffffff <- ( 00000000000 , fffffffffff ) + +[42,42]: + int 000000000003ffffffffff <- ( 00000000000 , fffffffffff ) + +[42,41]: + int 00000000001ffffffffff <- ( 00000000000 , fffffffffff ) + +[42,40]: + int 00000000000ffffffffff <- ( 00000000000 , ffffffffff ) + +[42,39]: + int 000000000007fffffffff <- ( 00000000000 , ffffffffff ) + +[42,38]: + int 000000000003fffffffff <- ( 00000000000 , ffffffffff ) + +[42,37]: + int 00000000001fffffffff <- ( 00000000000 , ffffffffff ) + +[42,36]: + int 00000000000fffffffff <- ( 00000000000 , fffffffff ) + +[42,35]: + int 000000000007ffffffff <- ( 00000000000 , fffffffff ) + +[42,34]: + int 000000000003ffffffff <- ( 00000000000 , fffffffff ) + +[42,33]: + int 00000000001ffffffff <- ( 00000000000 , fffffffff ) + +[42,32]: + int 00000000000ffffffff <- ( 00000000000 , ffffffff ) + +[42,31]: + int 000000000007fffffff <- ( 00000000000 , ffffffff ) + +[42,30]: + int 000000000003fffffff <- ( 00000000000 , ffffffff ) + +[42,29]: + int 00000000001fffffff <- ( 00000000000 , ffffffff ) + +[42,28]: + int 00000000000fffffff <- ( 00000000000 , fffffff ) + +[42,27]: + int 000000000007ffffff <- ( 00000000000 , fffffff ) + +[42,26]: + int 000000000003ffffff <- ( 00000000000 , fffffff ) + +[42,25]: + int 00000000001ffffff <- ( 00000000000 , fffffff ) + +[42,24]: + int 00000000000ffffff <- ( 00000000000 , ffffff ) + +[42,23]: + int 000000000007fffff <- ( 00000000000 , ffffff ) + +[42,22]: + int 000000000003fffff <- ( 00000000000 , ffffff ) + +[42,21]: + int 00000000001fffff <- ( 00000000000 , ffffff ) + +[42,20]: + int 00000000000fffff <- ( 00000000000 , fffff ) + +[42,19]: + int 000000000007ffff <- ( 00000000000 , fffff ) + +[42,18]: + int 000000000003ffff <- ( 00000000000 , fffff ) + +[42,17]: + int 00000000001ffff <- ( 00000000000 , fffff ) + +[42,16]: + int 00000000000ffff <- ( 00000000000 , ffff ) + +[42,15]: + int 000000000007fff <- ( 00000000000 , ffff ) + +[42,14]: + int 000000000003fff <- ( 00000000000 , ffff ) + +[42,13]: + int 00000000001fff <- ( 00000000000 , ffff ) + +[42,12]: + int 00000000000fff <- ( 00000000000 , fff ) + +[42,11]: + int 000000000007ff <- ( 00000000000 , fff ) + +[42,10]: + int 000000000003ff <- ( 00000000000 , fff ) + +[42,9]: + int 00000000001ff <- ( 00000000000 , fff ) + +[42,8]: + int 00000000000ff <- ( 00000000000 , ff ) + +[42,7]: + int 000000000007f <- ( 00000000000 , ff ) + +[42,6]: + int 000000000003f <- ( 00000000000 , ff ) + +[42,5]: + int 00000000001f <- ( 00000000000 , ff ) + +[42,4]: + int 00000000000f <- ( 00000000000 , f ) + +[42,3]: + int 000000000007 <- ( 00000000000 , f ) + +[42,2]: + int 000000000003 <- ( 00000000000 , f ) + +[42,1]: + int 00000000001 <- ( 00000000000 , f ) + +[41,64]: + int 00000000000ffffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[41,63]: + int 000000000007fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[41,62]: + int 00000000003fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[41,61]: + int 00000000001fffffffffffffff <- ( 00000000000 , ffffffffffffffff ) + +[41,60]: + int 00000000000fffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[41,59]: + int 000000000007ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[41,58]: + int 00000000003ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[41,57]: + int 00000000001ffffffffffffff <- ( 00000000000 , fffffffffffffff ) + +[41,56]: + int 00000000000ffffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[41,55]: + int 000000000007fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[41,54]: + int 00000000003fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[41,53]: + int 00000000001fffffffffffff <- ( 00000000000 , ffffffffffffff ) + +[41,52]: + int 00000000000fffffffffffff <- ( 00000000000 , fffffffffffff ) + +[41,51]: + int 000000000007ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[41,50]: + int 00000000003ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[41,49]: + int 00000000001ffffffffffff <- ( 00000000000 , fffffffffffff ) + +[41,48]: + int 00000000000ffffffffffff <- ( 00000000000 , ffffffffffff ) + +[41,47]: + int 000000000007fffffffffff <- ( 00000000000 , ffffffffffff ) + +[41,46]: + int 00000000003fffffffffff <- ( 00000000000 , ffffffffffff ) + +[41,45]: + int 00000000001fffffffffff <- ( 00000000000 , ffffffffffff ) + +[41,44]: + int 00000000000fffffffffff <- ( 00000000000 , fffffffffff ) + +[41,43]: + int 000000000007ffffffffff <- ( 00000000000 , fffffffffff ) + +[41,42]: + int 00000000003ffffffffff <- ( 00000000000 , fffffffffff ) + +[41,41]: + int 00000000001ffffffffff <- ( 00000000000 , fffffffffff ) + +[41,40]: + int 00000000000ffffffffff <- ( 00000000000 , ffffffffff ) + +[41,39]: + int 000000000007fffffffff <- ( 00000000000 , ffffffffff ) + +[41,38]: + int 00000000003fffffffff <- ( 00000000000 , ffffffffff ) + +[41,37]: + int 00000000001fffffffff <- ( 00000000000 , ffffffffff ) + +[41,36]: + int 00000000000fffffffff <- ( 00000000000 , fffffffff ) + +[41,35]: + int 000000000007ffffffff <- ( 00000000000 , fffffffff ) + +[41,34]: + int 00000000003ffffffff <- ( 00000000000 , fffffffff ) + +[41,33]: + int 00000000001ffffffff <- ( 00000000000 , fffffffff ) + +[41,32]: + int 00000000000ffffffff <- ( 00000000000 , ffffffff ) + +[41,31]: + int 000000000007fffffff <- ( 00000000000 , ffffffff ) + +[41,30]: + int 00000000003fffffff <- ( 00000000000 , ffffffff ) + +[41,29]: + int 00000000001fffffff <- ( 00000000000 , ffffffff ) + +[41,28]: + int 00000000000fffffff <- ( 00000000000 , fffffff ) + +[41,27]: + int 000000000007ffffff <- ( 00000000000 , fffffff ) + +[41,26]: + int 00000000003ffffff <- ( 00000000000 , fffffff ) + +[41,25]: + int 00000000001ffffff <- ( 00000000000 , fffffff ) + +[41,24]: + int 00000000000ffffff <- ( 00000000000 , ffffff ) + +[41,23]: + int 000000000007fffff <- ( 00000000000 , ffffff ) + +[41,22]: + int 00000000003fffff <- ( 00000000000 , ffffff ) + +[41,21]: + int 00000000001fffff <- ( 00000000000 , ffffff ) + +[41,20]: + int 00000000000fffff <- ( 00000000000 , fffff ) + +[41,19]: + int 000000000007ffff <- ( 00000000000 , fffff ) + +[41,18]: + int 00000000003ffff <- ( 00000000000 , fffff ) + +[41,17]: + int 00000000001ffff <- ( 00000000000 , fffff ) + +[41,16]: + int 00000000000ffff <- ( 00000000000 , ffff ) + +[41,15]: + int 000000000007fff <- ( 00000000000 , ffff ) + +[41,14]: + int 00000000003fff <- ( 00000000000 , ffff ) + +[41,13]: + int 00000000001fff <- ( 00000000000 , ffff ) + +[41,12]: + int 00000000000fff <- ( 00000000000 , fff ) + +[41,11]: + int 000000000007ff <- ( 00000000000 , fff ) + +[41,10]: + int 00000000003ff <- ( 00000000000 , fff ) + +[41,9]: + int 00000000001ff <- ( 00000000000 , fff ) + +[41,8]: + int 00000000000ff <- ( 00000000000 , ff ) + +[41,7]: + int 000000000007f <- ( 00000000000 , ff ) + +[41,6]: + int 00000000003f <- ( 00000000000 , ff ) + +[41,5]: + int 00000000001f <- ( 00000000000 , ff ) + +[41,4]: + int 00000000000f <- ( 00000000000 , f ) + +[41,3]: + int 000000000007 <- ( 00000000000 , f ) + +[41,2]: + int 00000000003 <- ( 00000000000 , f ) + +[41,1]: + int 00000000001 <- ( 00000000000 , f ) + +[40,64]: + int 00000000000ffffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[40,63]: + int 00000000007fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[40,62]: + int 00000000003fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[40,61]: + int 00000000001fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[40,60]: + int 00000000000fffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[40,59]: + int 00000000007ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[40,58]: + int 00000000003ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[40,57]: + int 00000000001ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[40,56]: + int 00000000000ffffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[40,55]: + int 00000000007fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[40,54]: + int 00000000003fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[40,53]: + int 00000000001fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[40,52]: + int 00000000000fffffffffffff <- ( 0000000000 , fffffffffffff ) + +[40,51]: + int 00000000007ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[40,50]: + int 00000000003ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[40,49]: + int 00000000001ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[40,48]: + int 00000000000ffffffffffff <- ( 0000000000 , ffffffffffff ) + +[40,47]: + int 00000000007fffffffffff <- ( 0000000000 , ffffffffffff ) + +[40,46]: + int 00000000003fffffffffff <- ( 0000000000 , ffffffffffff ) + +[40,45]: + int 00000000001fffffffffff <- ( 0000000000 , ffffffffffff ) + +[40,44]: + int 00000000000fffffffffff <- ( 0000000000 , fffffffffff ) + +[40,43]: + int 00000000007ffffffffff <- ( 0000000000 , fffffffffff ) + +[40,42]: + int 00000000003ffffffffff <- ( 0000000000 , fffffffffff ) + +[40,41]: + int 00000000001ffffffffff <- ( 0000000000 , fffffffffff ) + +[40,40]: + int 00000000000ffffffffff <- ( 0000000000 , ffffffffff ) + +[40,39]: + int 00000000007fffffffff <- ( 0000000000 , ffffffffff ) + +[40,38]: + int 00000000003fffffffff <- ( 0000000000 , ffffffffff ) + +[40,37]: + int 00000000001fffffffff <- ( 0000000000 , ffffffffff ) + +[40,36]: + int 00000000000fffffffff <- ( 0000000000 , fffffffff ) + +[40,35]: + int 00000000007ffffffff <- ( 0000000000 , fffffffff ) + +[40,34]: + int 00000000003ffffffff <- ( 0000000000 , fffffffff ) + +[40,33]: + int 00000000001ffffffff <- ( 0000000000 , fffffffff ) + +[40,32]: + int 00000000000ffffffff <- ( 0000000000 , ffffffff ) + +[40,31]: + int 00000000007fffffff <- ( 0000000000 , ffffffff ) + +[40,30]: + int 00000000003fffffff <- ( 0000000000 , ffffffff ) + +[40,29]: + int 00000000001fffffff <- ( 0000000000 , ffffffff ) + +[40,28]: + int 00000000000fffffff <- ( 0000000000 , fffffff ) + +[40,27]: + int 00000000007ffffff <- ( 0000000000 , fffffff ) + +[40,26]: + int 00000000003ffffff <- ( 0000000000 , fffffff ) + +[40,25]: + int 00000000001ffffff <- ( 0000000000 , fffffff ) + +[40,24]: + int 00000000000ffffff <- ( 0000000000 , ffffff ) + +[40,23]: + int 00000000007fffff <- ( 0000000000 , ffffff ) + +[40,22]: + int 00000000003fffff <- ( 0000000000 , ffffff ) + +[40,21]: + int 00000000001fffff <- ( 0000000000 , ffffff ) + +[40,20]: + int 00000000000fffff <- ( 0000000000 , fffff ) + +[40,19]: + int 00000000007ffff <- ( 0000000000 , fffff ) + +[40,18]: + int 00000000003ffff <- ( 0000000000 , fffff ) + +[40,17]: + int 00000000001ffff <- ( 0000000000 , fffff ) + +[40,16]: + int 00000000000ffff <- ( 0000000000 , ffff ) + +[40,15]: + int 00000000007fff <- ( 0000000000 , ffff ) + +[40,14]: + int 00000000003fff <- ( 0000000000 , ffff ) + +[40,13]: + int 00000000001fff <- ( 0000000000 , ffff ) + +[40,12]: + int 00000000000fff <- ( 0000000000 , fff ) + +[40,11]: + int 00000000007ff <- ( 0000000000 , fff ) + +[40,10]: + int 00000000003ff <- ( 0000000000 , fff ) + +[40,9]: + int 00000000001ff <- ( 0000000000 , fff ) + +[40,8]: + int 00000000000ff <- ( 0000000000 , ff ) + +[40,7]: + int 00000000007f <- ( 0000000000 , ff ) + +[40,6]: + int 00000000003f <- ( 0000000000 , ff ) + +[40,5]: + int 00000000001f <- ( 0000000000 , ff ) + +[40,4]: + int 00000000000f <- ( 0000000000 , f ) + +[40,3]: + int 00000000007 <- ( 0000000000 , f ) + +[40,2]: + int 00000000003 <- ( 0000000000 , f ) + +[40,1]: + int 00000000001 <- ( 0000000000 , f ) + +[39,64]: + int 0000000000ffffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[39,63]: + int 00000000007fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[39,62]: + int 00000000003fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[39,61]: + int 00000000001fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[39,60]: + int 0000000000fffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[39,59]: + int 00000000007ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[39,58]: + int 00000000003ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[39,57]: + int 00000000001ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[39,56]: + int 0000000000ffffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[39,55]: + int 00000000007fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[39,54]: + int 00000000003fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[39,53]: + int 00000000001fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[39,52]: + int 0000000000fffffffffffff <- ( 0000000000 , fffffffffffff ) + +[39,51]: + int 00000000007ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[39,50]: + int 00000000003ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[39,49]: + int 00000000001ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[39,48]: + int 0000000000ffffffffffff <- ( 0000000000 , ffffffffffff ) + +[39,47]: + int 00000000007fffffffffff <- ( 0000000000 , ffffffffffff ) + +[39,46]: + int 00000000003fffffffffff <- ( 0000000000 , ffffffffffff ) + +[39,45]: + int 00000000001fffffffffff <- ( 0000000000 , ffffffffffff ) + +[39,44]: + int 0000000000fffffffffff <- ( 0000000000 , fffffffffff ) + +[39,43]: + int 00000000007ffffffffff <- ( 0000000000 , fffffffffff ) + +[39,42]: + int 00000000003ffffffffff <- ( 0000000000 , fffffffffff ) + +[39,41]: + int 00000000001ffffffffff <- ( 0000000000 , fffffffffff ) + +[39,40]: + int 0000000000ffffffffff <- ( 0000000000 , ffffffffff ) + +[39,39]: + int 00000000007fffffffff <- ( 0000000000 , ffffffffff ) + +[39,38]: + int 00000000003fffffffff <- ( 0000000000 , ffffffffff ) + +[39,37]: + int 00000000001fffffffff <- ( 0000000000 , ffffffffff ) + +[39,36]: + int 0000000000fffffffff <- ( 0000000000 , fffffffff ) + +[39,35]: + int 00000000007ffffffff <- ( 0000000000 , fffffffff ) + +[39,34]: + int 00000000003ffffffff <- ( 0000000000 , fffffffff ) + +[39,33]: + int 00000000001ffffffff <- ( 0000000000 , fffffffff ) + +[39,32]: + int 0000000000ffffffff <- ( 0000000000 , ffffffff ) + +[39,31]: + int 00000000007fffffff <- ( 0000000000 , ffffffff ) + +[39,30]: + int 00000000003fffffff <- ( 0000000000 , ffffffff ) + +[39,29]: + int 00000000001fffffff <- ( 0000000000 , ffffffff ) + +[39,28]: + int 0000000000fffffff <- ( 0000000000 , fffffff ) + +[39,27]: + int 00000000007ffffff <- ( 0000000000 , fffffff ) + +[39,26]: + int 00000000003ffffff <- ( 0000000000 , fffffff ) + +[39,25]: + int 00000000001ffffff <- ( 0000000000 , fffffff ) + +[39,24]: + int 0000000000ffffff <- ( 0000000000 , ffffff ) + +[39,23]: + int 00000000007fffff <- ( 0000000000 , ffffff ) + +[39,22]: + int 00000000003fffff <- ( 0000000000 , ffffff ) + +[39,21]: + int 00000000001fffff <- ( 0000000000 , ffffff ) + +[39,20]: + int 0000000000fffff <- ( 0000000000 , fffff ) + +[39,19]: + int 00000000007ffff <- ( 0000000000 , fffff ) + +[39,18]: + int 00000000003ffff <- ( 0000000000 , fffff ) + +[39,17]: + int 00000000001ffff <- ( 0000000000 , fffff ) + +[39,16]: + int 0000000000ffff <- ( 0000000000 , ffff ) + +[39,15]: + int 00000000007fff <- ( 0000000000 , ffff ) + +[39,14]: + int 00000000003fff <- ( 0000000000 , ffff ) + +[39,13]: + int 00000000001fff <- ( 0000000000 , ffff ) + +[39,12]: + int 0000000000fff <- ( 0000000000 , fff ) + +[39,11]: + int 00000000007ff <- ( 0000000000 , fff ) + +[39,10]: + int 00000000003ff <- ( 0000000000 , fff ) + +[39,9]: + int 00000000001ff <- ( 0000000000 , fff ) + +[39,8]: + int 0000000000ff <- ( 0000000000 , ff ) + +[39,7]: + int 00000000007f <- ( 0000000000 , ff ) + +[39,6]: + int 00000000003f <- ( 0000000000 , ff ) + +[39,5]: + int 00000000001f <- ( 0000000000 , ff ) + +[39,4]: + int 0000000000f <- ( 0000000000 , f ) + +[39,3]: + int 00000000007 <- ( 0000000000 , f ) + +[39,2]: + int 00000000003 <- ( 0000000000 , f ) + +[39,1]: + int 00000000001 <- ( 0000000000 , f ) + +[38,64]: + int 0000000000ffffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[38,63]: + int 00000000007fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[38,62]: + int 00000000003fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[38,61]: + int 0000000001fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[38,60]: + int 0000000000fffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[38,59]: + int 00000000007ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[38,58]: + int 00000000003ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[38,57]: + int 0000000001ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[38,56]: + int 0000000000ffffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[38,55]: + int 00000000007fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[38,54]: + int 00000000003fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[38,53]: + int 0000000001fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[38,52]: + int 0000000000fffffffffffff <- ( 0000000000 , fffffffffffff ) + +[38,51]: + int 00000000007ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[38,50]: + int 00000000003ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[38,49]: + int 0000000001ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[38,48]: + int 0000000000ffffffffffff <- ( 0000000000 , ffffffffffff ) + +[38,47]: + int 00000000007fffffffffff <- ( 0000000000 , ffffffffffff ) + +[38,46]: + int 00000000003fffffffffff <- ( 0000000000 , ffffffffffff ) + +[38,45]: + int 0000000001fffffffffff <- ( 0000000000 , ffffffffffff ) + +[38,44]: + int 0000000000fffffffffff <- ( 0000000000 , fffffffffff ) + +[38,43]: + int 00000000007ffffffffff <- ( 0000000000 , fffffffffff ) + +[38,42]: + int 00000000003ffffffffff <- ( 0000000000 , fffffffffff ) + +[38,41]: + int 0000000001ffffffffff <- ( 0000000000 , fffffffffff ) + +[38,40]: + int 0000000000ffffffffff <- ( 0000000000 , ffffffffff ) + +[38,39]: + int 00000000007fffffffff <- ( 0000000000 , ffffffffff ) + +[38,38]: + int 00000000003fffffffff <- ( 0000000000 , ffffffffff ) + +[38,37]: + int 0000000001fffffffff <- ( 0000000000 , ffffffffff ) + +[38,36]: + int 0000000000fffffffff <- ( 0000000000 , fffffffff ) + +[38,35]: + int 00000000007ffffffff <- ( 0000000000 , fffffffff ) + +[38,34]: + int 00000000003ffffffff <- ( 0000000000 , fffffffff ) + +[38,33]: + int 0000000001ffffffff <- ( 0000000000 , fffffffff ) + +[38,32]: + int 0000000000ffffffff <- ( 0000000000 , ffffffff ) + +[38,31]: + int 00000000007fffffff <- ( 0000000000 , ffffffff ) + +[38,30]: + int 00000000003fffffff <- ( 0000000000 , ffffffff ) + +[38,29]: + int 0000000001fffffff <- ( 0000000000 , ffffffff ) + +[38,28]: + int 0000000000fffffff <- ( 0000000000 , fffffff ) + +[38,27]: + int 00000000007ffffff <- ( 0000000000 , fffffff ) + +[38,26]: + int 00000000003ffffff <- ( 0000000000 , fffffff ) + +[38,25]: + int 0000000001ffffff <- ( 0000000000 , fffffff ) + +[38,24]: + int 0000000000ffffff <- ( 0000000000 , ffffff ) + +[38,23]: + int 00000000007fffff <- ( 0000000000 , ffffff ) + +[38,22]: + int 00000000003fffff <- ( 0000000000 , ffffff ) + +[38,21]: + int 0000000001fffff <- ( 0000000000 , ffffff ) + +[38,20]: + int 0000000000fffff <- ( 0000000000 , fffff ) + +[38,19]: + int 00000000007ffff <- ( 0000000000 , fffff ) + +[38,18]: + int 00000000003ffff <- ( 0000000000 , fffff ) + +[38,17]: + int 0000000001ffff <- ( 0000000000 , fffff ) + +[38,16]: + int 0000000000ffff <- ( 0000000000 , ffff ) + +[38,15]: + int 00000000007fff <- ( 0000000000 , ffff ) + +[38,14]: + int 00000000003fff <- ( 0000000000 , ffff ) + +[38,13]: + int 0000000001fff <- ( 0000000000 , ffff ) + +[38,12]: + int 0000000000fff <- ( 0000000000 , fff ) + +[38,11]: + int 00000000007ff <- ( 0000000000 , fff ) + +[38,10]: + int 00000000003ff <- ( 0000000000 , fff ) + +[38,9]: + int 0000000001ff <- ( 0000000000 , fff ) + +[38,8]: + int 0000000000ff <- ( 0000000000 , ff ) + +[38,7]: + int 00000000007f <- ( 0000000000 , ff ) + +[38,6]: + int 00000000003f <- ( 0000000000 , ff ) + +[38,5]: + int 0000000001f <- ( 0000000000 , ff ) + +[38,4]: + int 0000000000f <- ( 0000000000 , f ) + +[38,3]: + int 00000000007 <- ( 0000000000 , f ) + +[38,2]: + int 00000000003 <- ( 0000000000 , f ) + +[38,1]: + int 0000000001 <- ( 0000000000 , f ) + +[37,64]: + int 0000000000ffffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[37,63]: + int 00000000007fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[37,62]: + int 0000000003fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[37,61]: + int 0000000001fffffffffffffff <- ( 0000000000 , ffffffffffffffff ) + +[37,60]: + int 0000000000fffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[37,59]: + int 00000000007ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[37,58]: + int 0000000003ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[37,57]: + int 0000000001ffffffffffffff <- ( 0000000000 , fffffffffffffff ) + +[37,56]: + int 0000000000ffffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[37,55]: + int 00000000007fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[37,54]: + int 0000000003fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[37,53]: + int 0000000001fffffffffffff <- ( 0000000000 , ffffffffffffff ) + +[37,52]: + int 0000000000fffffffffffff <- ( 0000000000 , fffffffffffff ) + +[37,51]: + int 00000000007ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[37,50]: + int 0000000003ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[37,49]: + int 0000000001ffffffffffff <- ( 0000000000 , fffffffffffff ) + +[37,48]: + int 0000000000ffffffffffff <- ( 0000000000 , ffffffffffff ) + +[37,47]: + int 00000000007fffffffffff <- ( 0000000000 , ffffffffffff ) + +[37,46]: + int 0000000003fffffffffff <- ( 0000000000 , ffffffffffff ) + +[37,45]: + int 0000000001fffffffffff <- ( 0000000000 , ffffffffffff ) + +[37,44]: + int 0000000000fffffffffff <- ( 0000000000 , fffffffffff ) + +[37,43]: + int 00000000007ffffffffff <- ( 0000000000 , fffffffffff ) + +[37,42]: + int 0000000003ffffffffff <- ( 0000000000 , fffffffffff ) + +[37,41]: + int 0000000001ffffffffff <- ( 0000000000 , fffffffffff ) + +[37,40]: + int 0000000000ffffffffff <- ( 0000000000 , ffffffffff ) + +[37,39]: + int 00000000007fffffffff <- ( 0000000000 , ffffffffff ) + +[37,38]: + int 0000000003fffffffff <- ( 0000000000 , ffffffffff ) + +[37,37]: + int 0000000001fffffffff <- ( 0000000000 , ffffffffff ) + +[37,36]: + int 0000000000fffffffff <- ( 0000000000 , fffffffff ) + +[37,35]: + int 00000000007ffffffff <- ( 0000000000 , fffffffff ) + +[37,34]: + int 0000000003ffffffff <- ( 0000000000 , fffffffff ) + +[37,33]: + int 0000000001ffffffff <- ( 0000000000 , fffffffff ) + +[37,32]: + int 0000000000ffffffff <- ( 0000000000 , ffffffff ) + +[37,31]: + int 00000000007fffffff <- ( 0000000000 , ffffffff ) + +[37,30]: + int 0000000003fffffff <- ( 0000000000 , ffffffff ) + +[37,29]: + int 0000000001fffffff <- ( 0000000000 , ffffffff ) + +[37,28]: + int 0000000000fffffff <- ( 0000000000 , fffffff ) + +[37,27]: + int 00000000007ffffff <- ( 0000000000 , fffffff ) + +[37,26]: + int 0000000003ffffff <- ( 0000000000 , fffffff ) + +[37,25]: + int 0000000001ffffff <- ( 0000000000 , fffffff ) + +[37,24]: + int 0000000000ffffff <- ( 0000000000 , ffffff ) + +[37,23]: + int 00000000007fffff <- ( 0000000000 , ffffff ) + +[37,22]: + int 0000000003fffff <- ( 0000000000 , ffffff ) + +[37,21]: + int 0000000001fffff <- ( 0000000000 , ffffff ) + +[37,20]: + int 0000000000fffff <- ( 0000000000 , fffff ) + +[37,19]: + int 00000000007ffff <- ( 0000000000 , fffff ) + +[37,18]: + int 0000000003ffff <- ( 0000000000 , fffff ) + +[37,17]: + int 0000000001ffff <- ( 0000000000 , fffff ) + +[37,16]: + int 0000000000ffff <- ( 0000000000 , ffff ) + +[37,15]: + int 00000000007fff <- ( 0000000000 , ffff ) + +[37,14]: + int 0000000003fff <- ( 0000000000 , ffff ) + +[37,13]: + int 0000000001fff <- ( 0000000000 , ffff ) + +[37,12]: + int 0000000000fff <- ( 0000000000 , fff ) + +[37,11]: + int 00000000007ff <- ( 0000000000 , fff ) + +[37,10]: + int 0000000003ff <- ( 0000000000 , fff ) + +[37,9]: + int 0000000001ff <- ( 0000000000 , fff ) + +[37,8]: + int 0000000000ff <- ( 0000000000 , ff ) + +[37,7]: + int 00000000007f <- ( 0000000000 , ff ) + +[37,6]: + int 0000000003f <- ( 0000000000 , ff ) + +[37,5]: + int 0000000001f <- ( 0000000000 , ff ) + +[37,4]: + int 0000000000f <- ( 0000000000 , f ) + +[37,3]: + int 00000000007 <- ( 0000000000 , f ) + +[37,2]: + int 0000000003 <- ( 0000000000 , f ) + +[37,1]: + int 0000000001 <- ( 0000000000 , f ) + +[36,64]: + int 0000000000ffffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[36,63]: + int 0000000007fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[36,62]: + int 0000000003fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[36,61]: + int 0000000001fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[36,60]: + int 0000000000fffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[36,59]: + int 0000000007ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[36,58]: + int 0000000003ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[36,57]: + int 0000000001ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[36,56]: + int 0000000000ffffffffffffff <- ( 000000000 , ffffffffffffff ) + +[36,55]: + int 0000000007fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[36,54]: + int 0000000003fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[36,53]: + int 0000000001fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[36,52]: + int 0000000000fffffffffffff <- ( 000000000 , fffffffffffff ) + +[36,51]: + int 0000000007ffffffffffff <- ( 000000000 , fffffffffffff ) + +[36,50]: + int 0000000003ffffffffffff <- ( 000000000 , fffffffffffff ) + +[36,49]: + int 0000000001ffffffffffff <- ( 000000000 , fffffffffffff ) + +[36,48]: + int 0000000000ffffffffffff <- ( 000000000 , ffffffffffff ) + +[36,47]: + int 0000000007fffffffffff <- ( 000000000 , ffffffffffff ) + +[36,46]: + int 0000000003fffffffffff <- ( 000000000 , ffffffffffff ) + +[36,45]: + int 0000000001fffffffffff <- ( 000000000 , ffffffffffff ) + +[36,44]: + int 0000000000fffffffffff <- ( 000000000 , fffffffffff ) + +[36,43]: + int 0000000007ffffffffff <- ( 000000000 , fffffffffff ) + +[36,42]: + int 0000000003ffffffffff <- ( 000000000 , fffffffffff ) + +[36,41]: + int 0000000001ffffffffff <- ( 000000000 , fffffffffff ) + +[36,40]: + int 0000000000ffffffffff <- ( 000000000 , ffffffffff ) + +[36,39]: + int 0000000007fffffffff <- ( 000000000 , ffffffffff ) + +[36,38]: + int 0000000003fffffffff <- ( 000000000 , ffffffffff ) + +[36,37]: + int 0000000001fffffffff <- ( 000000000 , ffffffffff ) + +[36,36]: + int 0000000000fffffffff <- ( 000000000 , fffffffff ) + +[36,35]: + int 0000000007ffffffff <- ( 000000000 , fffffffff ) + +[36,34]: + int 0000000003ffffffff <- ( 000000000 , fffffffff ) + +[36,33]: + int 0000000001ffffffff <- ( 000000000 , fffffffff ) + +[36,32]: + int 0000000000ffffffff <- ( 000000000 , ffffffff ) + +[36,31]: + int 0000000007fffffff <- ( 000000000 , ffffffff ) + +[36,30]: + int 0000000003fffffff <- ( 000000000 , ffffffff ) + +[36,29]: + int 0000000001fffffff <- ( 000000000 , ffffffff ) + +[36,28]: + int 0000000000fffffff <- ( 000000000 , fffffff ) + +[36,27]: + int 0000000007ffffff <- ( 000000000 , fffffff ) + +[36,26]: + int 0000000003ffffff <- ( 000000000 , fffffff ) + +[36,25]: + int 0000000001ffffff <- ( 000000000 , fffffff ) + +[36,24]: + int 0000000000ffffff <- ( 000000000 , ffffff ) + +[36,23]: + int 0000000007fffff <- ( 000000000 , ffffff ) + +[36,22]: + int 0000000003fffff <- ( 000000000 , ffffff ) + +[36,21]: + int 0000000001fffff <- ( 000000000 , ffffff ) + +[36,20]: + int 0000000000fffff <- ( 000000000 , fffff ) + +[36,19]: + int 0000000007ffff <- ( 000000000 , fffff ) + +[36,18]: + int 0000000003ffff <- ( 000000000 , fffff ) + +[36,17]: + int 0000000001ffff <- ( 000000000 , fffff ) + +[36,16]: + int 0000000000ffff <- ( 000000000 , ffff ) + +[36,15]: + int 0000000007fff <- ( 000000000 , ffff ) + +[36,14]: + int 0000000003fff <- ( 000000000 , ffff ) + +[36,13]: + int 0000000001fff <- ( 000000000 , ffff ) + +[36,12]: + int 0000000000fff <- ( 000000000 , fff ) + +[36,11]: + int 0000000007ff <- ( 000000000 , fff ) + +[36,10]: + int 0000000003ff <- ( 000000000 , fff ) + +[36,9]: + int 0000000001ff <- ( 000000000 , fff ) + +[36,8]: + int 0000000000ff <- ( 000000000 , ff ) + +[36,7]: + int 0000000007f <- ( 000000000 , ff ) + +[36,6]: + int 0000000003f <- ( 000000000 , ff ) + +[36,5]: + int 0000000001f <- ( 000000000 , ff ) + +[36,4]: + int 0000000000f <- ( 000000000 , f ) + +[36,3]: + int 0000000007 <- ( 000000000 , f ) + +[36,2]: + int 0000000003 <- ( 000000000 , f ) + +[36,1]: + int 0000000001 <- ( 000000000 , f ) + +[35,64]: + int 000000000ffffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[35,63]: + int 0000000007fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[35,62]: + int 0000000003fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[35,61]: + int 0000000001fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[35,60]: + int 000000000fffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[35,59]: + int 0000000007ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[35,58]: + int 0000000003ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[35,57]: + int 0000000001ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[35,56]: + int 000000000ffffffffffffff <- ( 000000000 , ffffffffffffff ) + +[35,55]: + int 0000000007fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[35,54]: + int 0000000003fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[35,53]: + int 0000000001fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[35,52]: + int 000000000fffffffffffff <- ( 000000000 , fffffffffffff ) + +[35,51]: + int 0000000007ffffffffffff <- ( 000000000 , fffffffffffff ) + +[35,50]: + int 0000000003ffffffffffff <- ( 000000000 , fffffffffffff ) + +[35,49]: + int 0000000001ffffffffffff <- ( 000000000 , fffffffffffff ) + +[35,48]: + int 000000000ffffffffffff <- ( 000000000 , ffffffffffff ) + +[35,47]: + int 0000000007fffffffffff <- ( 000000000 , ffffffffffff ) + +[35,46]: + int 0000000003fffffffffff <- ( 000000000 , ffffffffffff ) + +[35,45]: + int 0000000001fffffffffff <- ( 000000000 , ffffffffffff ) + +[35,44]: + int 000000000fffffffffff <- ( 000000000 , fffffffffff ) + +[35,43]: + int 0000000007ffffffffff <- ( 000000000 , fffffffffff ) + +[35,42]: + int 0000000003ffffffffff <- ( 000000000 , fffffffffff ) + +[35,41]: + int 0000000001ffffffffff <- ( 000000000 , fffffffffff ) + +[35,40]: + int 000000000ffffffffff <- ( 000000000 , ffffffffff ) + +[35,39]: + int 0000000007fffffffff <- ( 000000000 , ffffffffff ) + +[35,38]: + int 0000000003fffffffff <- ( 000000000 , ffffffffff ) + +[35,37]: + int 0000000001fffffffff <- ( 000000000 , ffffffffff ) + +[35,36]: + int 000000000fffffffff <- ( 000000000 , fffffffff ) + +[35,35]: + int 0000000007ffffffff <- ( 000000000 , fffffffff ) + +[35,34]: + int 0000000003ffffffff <- ( 000000000 , fffffffff ) + +[35,33]: + int 0000000001ffffffff <- ( 000000000 , fffffffff ) + +[35,32]: + int 000000000ffffffff <- ( 000000000 , ffffffff ) + +[35,31]: + int 0000000007fffffff <- ( 000000000 , ffffffff ) + +[35,30]: + int 0000000003fffffff <- ( 000000000 , ffffffff ) + +[35,29]: + int 0000000001fffffff <- ( 000000000 , ffffffff ) + +[35,28]: + int 000000000fffffff <- ( 000000000 , fffffff ) + +[35,27]: + int 0000000007ffffff <- ( 000000000 , fffffff ) + +[35,26]: + int 0000000003ffffff <- ( 000000000 , fffffff ) + +[35,25]: + int 0000000001ffffff <- ( 000000000 , fffffff ) + +[35,24]: + int 000000000ffffff <- ( 000000000 , ffffff ) + +[35,23]: + int 0000000007fffff <- ( 000000000 , ffffff ) + +[35,22]: + int 0000000003fffff <- ( 000000000 , ffffff ) + +[35,21]: + int 0000000001fffff <- ( 000000000 , ffffff ) + +[35,20]: + int 000000000fffff <- ( 000000000 , fffff ) + +[35,19]: + int 0000000007ffff <- ( 000000000 , fffff ) + +[35,18]: + int 0000000003ffff <- ( 000000000 , fffff ) + +[35,17]: + int 0000000001ffff <- ( 000000000 , fffff ) + +[35,16]: + int 000000000ffff <- ( 000000000 , ffff ) + +[35,15]: + int 0000000007fff <- ( 000000000 , ffff ) + +[35,14]: + int 0000000003fff <- ( 000000000 , ffff ) + +[35,13]: + int 0000000001fff <- ( 000000000 , ffff ) + +[35,12]: + int 000000000fff <- ( 000000000 , fff ) + +[35,11]: + int 0000000007ff <- ( 000000000 , fff ) + +[35,10]: + int 0000000003ff <- ( 000000000 , fff ) + +[35,9]: + int 0000000001ff <- ( 000000000 , fff ) + +[35,8]: + int 000000000ff <- ( 000000000 , ff ) + +[35,7]: + int 0000000007f <- ( 000000000 , ff ) + +[35,6]: + int 0000000003f <- ( 000000000 , ff ) + +[35,5]: + int 0000000001f <- ( 000000000 , ff ) + +[35,4]: + int 000000000f <- ( 000000000 , f ) + +[35,3]: + int 0000000007 <- ( 000000000 , f ) + +[35,2]: + int 0000000003 <- ( 000000000 , f ) + +[35,1]: + int 0000000001 <- ( 000000000 , f ) + +[34,64]: + int 000000000ffffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[34,63]: + int 0000000007fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[34,62]: + int 0000000003fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[34,61]: + int 000000001fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[34,60]: + int 000000000fffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[34,59]: + int 0000000007ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[34,58]: + int 0000000003ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[34,57]: + int 000000001ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[34,56]: + int 000000000ffffffffffffff <- ( 000000000 , ffffffffffffff ) + +[34,55]: + int 0000000007fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[34,54]: + int 0000000003fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[34,53]: + int 000000001fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[34,52]: + int 000000000fffffffffffff <- ( 000000000 , fffffffffffff ) + +[34,51]: + int 0000000007ffffffffffff <- ( 000000000 , fffffffffffff ) + +[34,50]: + int 0000000003ffffffffffff <- ( 000000000 , fffffffffffff ) + +[34,49]: + int 000000001ffffffffffff <- ( 000000000 , fffffffffffff ) + +[34,48]: + int 000000000ffffffffffff <- ( 000000000 , ffffffffffff ) + +[34,47]: + int 0000000007fffffffffff <- ( 000000000 , ffffffffffff ) + +[34,46]: + int 0000000003fffffffffff <- ( 000000000 , ffffffffffff ) + +[34,45]: + int 000000001fffffffffff <- ( 000000000 , ffffffffffff ) + +[34,44]: + int 000000000fffffffffff <- ( 000000000 , fffffffffff ) + +[34,43]: + int 0000000007ffffffffff <- ( 000000000 , fffffffffff ) + +[34,42]: + int 0000000003ffffffffff <- ( 000000000 , fffffffffff ) + +[34,41]: + int 000000001ffffffffff <- ( 000000000 , fffffffffff ) + +[34,40]: + int 000000000ffffffffff <- ( 000000000 , ffffffffff ) + +[34,39]: + int 0000000007fffffffff <- ( 000000000 , ffffffffff ) + +[34,38]: + int 0000000003fffffffff <- ( 000000000 , ffffffffff ) + +[34,37]: + int 000000001fffffffff <- ( 000000000 , ffffffffff ) + +[34,36]: + int 000000000fffffffff <- ( 000000000 , fffffffff ) + +[34,35]: + int 0000000007ffffffff <- ( 000000000 , fffffffff ) + +[34,34]: + int 0000000003ffffffff <- ( 000000000 , fffffffff ) + +[34,33]: + int 000000001ffffffff <- ( 000000000 , fffffffff ) + +[34,32]: + int 000000000ffffffff <- ( 000000000 , ffffffff ) + +[34,31]: + int 0000000007fffffff <- ( 000000000 , ffffffff ) + +[34,30]: + int 0000000003fffffff <- ( 000000000 , ffffffff ) + +[34,29]: + int 000000001fffffff <- ( 000000000 , ffffffff ) + +[34,28]: + int 000000000fffffff <- ( 000000000 , fffffff ) + +[34,27]: + int 0000000007ffffff <- ( 000000000 , fffffff ) + +[34,26]: + int 0000000003ffffff <- ( 000000000 , fffffff ) + +[34,25]: + int 000000001ffffff <- ( 000000000 , fffffff ) + +[34,24]: + int 000000000ffffff <- ( 000000000 , ffffff ) + +[34,23]: + int 0000000007fffff <- ( 000000000 , ffffff ) + +[34,22]: + int 0000000003fffff <- ( 000000000 , ffffff ) + +[34,21]: + int 000000001fffff <- ( 000000000 , ffffff ) + +[34,20]: + int 000000000fffff <- ( 000000000 , fffff ) + +[34,19]: + int 0000000007ffff <- ( 000000000 , fffff ) + +[34,18]: + int 0000000003ffff <- ( 000000000 , fffff ) + +[34,17]: + int 000000001ffff <- ( 000000000 , fffff ) + +[34,16]: + int 000000000ffff <- ( 000000000 , ffff ) + +[34,15]: + int 0000000007fff <- ( 000000000 , ffff ) + +[34,14]: + int 0000000003fff <- ( 000000000 , ffff ) + +[34,13]: + int 000000001fff <- ( 000000000 , ffff ) + +[34,12]: + int 000000000fff <- ( 000000000 , fff ) + +[34,11]: + int 0000000007ff <- ( 000000000 , fff ) + +[34,10]: + int 0000000003ff <- ( 000000000 , fff ) + +[34,9]: + int 000000001ff <- ( 000000000 , fff ) + +[34,8]: + int 000000000ff <- ( 000000000 , ff ) + +[34,7]: + int 0000000007f <- ( 000000000 , ff ) + +[34,6]: + int 0000000003f <- ( 000000000 , ff ) + +[34,5]: + int 000000001f <- ( 000000000 , ff ) + +[34,4]: + int 000000000f <- ( 000000000 , f ) + +[34,3]: + int 0000000007 <- ( 000000000 , f ) + +[34,2]: + int 0000000003 <- ( 000000000 , f ) + +[34,1]: + int 000000001 <- ( 000000000 , f ) + +[33,64]: + int 000000000ffffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[33,63]: + int 0000000007fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[33,62]: + int 000000003fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[33,61]: + int 000000001fffffffffffffff <- ( 000000000 , ffffffffffffffff ) + +[33,60]: + int 000000000fffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[33,59]: + int 0000000007ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[33,58]: + int 000000003ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[33,57]: + int 000000001ffffffffffffff <- ( 000000000 , fffffffffffffff ) + +[33,56]: + int 000000000ffffffffffffff <- ( 000000000 , ffffffffffffff ) + +[33,55]: + int 0000000007fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[33,54]: + int 000000003fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[33,53]: + int 000000001fffffffffffff <- ( 000000000 , ffffffffffffff ) + +[33,52]: + int 000000000fffffffffffff <- ( 000000000 , fffffffffffff ) + +[33,51]: + int 0000000007ffffffffffff <- ( 000000000 , fffffffffffff ) + +[33,50]: + int 000000003ffffffffffff <- ( 000000000 , fffffffffffff ) + +[33,49]: + int 000000001ffffffffffff <- ( 000000000 , fffffffffffff ) + +[33,48]: + int 000000000ffffffffffff <- ( 000000000 , ffffffffffff ) + +[33,47]: + int 0000000007fffffffffff <- ( 000000000 , ffffffffffff ) + +[33,46]: + int 000000003fffffffffff <- ( 000000000 , ffffffffffff ) + +[33,45]: + int 000000001fffffffffff <- ( 000000000 , ffffffffffff ) + +[33,44]: + int 000000000fffffffffff <- ( 000000000 , fffffffffff ) + +[33,43]: + int 0000000007ffffffffff <- ( 000000000 , fffffffffff ) + +[33,42]: + int 000000003ffffffffff <- ( 000000000 , fffffffffff ) + +[33,41]: + int 000000001ffffffffff <- ( 000000000 , fffffffffff ) + +[33,40]: + int 000000000ffffffffff <- ( 000000000 , ffffffffff ) + +[33,39]: + int 0000000007fffffffff <- ( 000000000 , ffffffffff ) + +[33,38]: + int 000000003fffffffff <- ( 000000000 , ffffffffff ) + +[33,37]: + int 000000001fffffffff <- ( 000000000 , ffffffffff ) + +[33,36]: + int 000000000fffffffff <- ( 000000000 , fffffffff ) + +[33,35]: + int 0000000007ffffffff <- ( 000000000 , fffffffff ) + +[33,34]: + int 000000003ffffffff <- ( 000000000 , fffffffff ) + +[33,33]: + int 000000001ffffffff <- ( 000000000 , fffffffff ) + +[33,32]: + int 000000000ffffffff <- ( 000000000 , ffffffff ) + +[33,31]: + int 0000000007fffffff <- ( 000000000 , ffffffff ) + +[33,30]: + int 000000003fffffff <- ( 000000000 , ffffffff ) + +[33,29]: + int 000000001fffffff <- ( 000000000 , ffffffff ) + +[33,28]: + int 000000000fffffff <- ( 000000000 , fffffff ) + +[33,27]: + int 0000000007ffffff <- ( 000000000 , fffffff ) + +[33,26]: + int 000000003ffffff <- ( 000000000 , fffffff ) + +[33,25]: + int 000000001ffffff <- ( 000000000 , fffffff ) + +[33,24]: + int 000000000ffffff <- ( 000000000 , ffffff ) + +[33,23]: + int 0000000007fffff <- ( 000000000 , ffffff ) + +[33,22]: + int 000000003fffff <- ( 000000000 , ffffff ) + +[33,21]: + int 000000001fffff <- ( 000000000 , ffffff ) + +[33,20]: + int 000000000fffff <- ( 000000000 , fffff ) + +[33,19]: + int 0000000007ffff <- ( 000000000 , fffff ) + +[33,18]: + int 000000003ffff <- ( 000000000 , fffff ) + +[33,17]: + int 000000001ffff <- ( 000000000 , fffff ) + +[33,16]: + int 000000000ffff <- ( 000000000 , ffff ) + +[33,15]: + int 0000000007fff <- ( 000000000 , ffff ) + +[33,14]: + int 000000003fff <- ( 000000000 , ffff ) + +[33,13]: + int 000000001fff <- ( 000000000 , ffff ) + +[33,12]: + int 000000000fff <- ( 000000000 , fff ) + +[33,11]: + int 0000000007ff <- ( 000000000 , fff ) + +[33,10]: + int 000000003ff <- ( 000000000 , fff ) + +[33,9]: + int 000000001ff <- ( 000000000 , fff ) + +[33,8]: + int 000000000ff <- ( 000000000 , ff ) + +[33,7]: + int 0000000007f <- ( 000000000 , ff ) + +[33,6]: + int 000000003f <- ( 000000000 , ff ) + +[33,5]: + int 000000001f <- ( 000000000 , ff ) + +[33,4]: + int 000000000f <- ( 000000000 , f ) + +[33,3]: + int 0000000007 <- ( 000000000 , f ) + +[33,2]: + int 000000003 <- ( 000000000 , f ) + +[33,1]: + int 000000001 <- ( 000000000 , f ) + +[32,64]: + int 000000000ffffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[32,63]: + int 000000007fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[32,62]: + int 000000003fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[32,61]: + int 000000001fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[32,60]: + int 000000000fffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[32,59]: + int 000000007ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[32,58]: + int 000000003ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[32,57]: + int 000000001ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[32,56]: + int 000000000ffffffffffffff <- ( 00000000 , ffffffffffffff ) + +[32,55]: + int 000000007fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[32,54]: + int 000000003fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[32,53]: + int 000000001fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[32,52]: + int 000000000fffffffffffff <- ( 00000000 , fffffffffffff ) + +[32,51]: + int 000000007ffffffffffff <- ( 00000000 , fffffffffffff ) + +[32,50]: + int 000000003ffffffffffff <- ( 00000000 , fffffffffffff ) + +[32,49]: + int 000000001ffffffffffff <- ( 00000000 , fffffffffffff ) + +[32,48]: + int 000000000ffffffffffff <- ( 00000000 , ffffffffffff ) + +[32,47]: + int 000000007fffffffffff <- ( 00000000 , ffffffffffff ) + +[32,46]: + int 000000003fffffffffff <- ( 00000000 , ffffffffffff ) + +[32,45]: + int 000000001fffffffffff <- ( 00000000 , ffffffffffff ) + +[32,44]: + int 000000000fffffffffff <- ( 00000000 , fffffffffff ) + +[32,43]: + int 000000007ffffffffff <- ( 00000000 , fffffffffff ) + +[32,42]: + int 000000003ffffffffff <- ( 00000000 , fffffffffff ) + +[32,41]: + int 000000001ffffffffff <- ( 00000000 , fffffffffff ) + +[32,40]: + int 000000000ffffffffff <- ( 00000000 , ffffffffff ) + +[32,39]: + int 000000007fffffffff <- ( 00000000 , ffffffffff ) + +[32,38]: + int 000000003fffffffff <- ( 00000000 , ffffffffff ) + +[32,37]: + int 000000001fffffffff <- ( 00000000 , ffffffffff ) + +[32,36]: + int 000000000fffffffff <- ( 00000000 , fffffffff ) + +[32,35]: + int 000000007ffffffff <- ( 00000000 , fffffffff ) + +[32,34]: + int 000000003ffffffff <- ( 00000000 , fffffffff ) + +[32,33]: + int 000000001ffffffff <- ( 00000000 , fffffffff ) + +[32,32]: + int 000000000ffffffff <- ( 00000000 , ffffffff ) + +[32,31]: + int 000000007fffffff <- ( 00000000 , ffffffff ) + +[32,30]: + int 000000003fffffff <- ( 00000000 , ffffffff ) + +[32,29]: + int 000000001fffffff <- ( 00000000 , ffffffff ) + +[32,28]: + int 000000000fffffff <- ( 00000000 , fffffff ) + +[32,27]: + int 000000007ffffff <- ( 00000000 , fffffff ) + +[32,26]: + int 000000003ffffff <- ( 00000000 , fffffff ) + +[32,25]: + int 000000001ffffff <- ( 00000000 , fffffff ) + +[32,24]: + int 000000000ffffff <- ( 00000000 , ffffff ) + +[32,23]: + int 000000007fffff <- ( 00000000 , ffffff ) + +[32,22]: + int 000000003fffff <- ( 00000000 , ffffff ) + +[32,21]: + int 000000001fffff <- ( 00000000 , ffffff ) + +[32,20]: + int 000000000fffff <- ( 00000000 , fffff ) + +[32,19]: + int 000000007ffff <- ( 00000000 , fffff ) + +[32,18]: + int 000000003ffff <- ( 00000000 , fffff ) + +[32,17]: + int 000000001ffff <- ( 00000000 , fffff ) + +[32,16]: + int 000000000ffff <- ( 00000000 , ffff ) + +[32,15]: + int 000000007fff <- ( 00000000 , ffff ) + +[32,14]: + int 000000003fff <- ( 00000000 , ffff ) + +[32,13]: + int 000000001fff <- ( 00000000 , ffff ) + +[32,12]: + int 000000000fff <- ( 00000000 , fff ) + +[32,11]: + int 000000007ff <- ( 00000000 , fff ) + +[32,10]: + int 000000003ff <- ( 00000000 , fff ) + +[32,9]: + int 000000001ff <- ( 00000000 , fff ) + +[32,8]: + int 000000000ff <- ( 00000000 , ff ) + +[32,7]: + int 000000007f <- ( 00000000 , ff ) + +[32,6]: + int 000000003f <- ( 00000000 , ff ) + +[32,5]: + int 000000001f <- ( 00000000 , ff ) + +[32,4]: + int 000000000f <- ( 00000000 , f ) + +[32,3]: + int 000000007 <- ( 00000000 , f ) + +[32,2]: + int 000000003 <- ( 00000000 , f ) + +[32,1]: + int 000000001 <- ( 00000000 , f ) + +[31,64]: + int 00000000ffffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[31,63]: + int 000000007fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[31,62]: + int 000000003fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[31,61]: + int 000000001fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[31,60]: + int 00000000fffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[31,59]: + int 000000007ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[31,58]: + int 000000003ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[31,57]: + int 000000001ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[31,56]: + int 00000000ffffffffffffff <- ( 00000000 , ffffffffffffff ) + +[31,55]: + int 000000007fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[31,54]: + int 000000003fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[31,53]: + int 000000001fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[31,52]: + int 00000000fffffffffffff <- ( 00000000 , fffffffffffff ) + +[31,51]: + int 000000007ffffffffffff <- ( 00000000 , fffffffffffff ) + +[31,50]: + int 000000003ffffffffffff <- ( 00000000 , fffffffffffff ) + +[31,49]: + int 000000001ffffffffffff <- ( 00000000 , fffffffffffff ) + +[31,48]: + int 00000000ffffffffffff <- ( 00000000 , ffffffffffff ) + +[31,47]: + int 000000007fffffffffff <- ( 00000000 , ffffffffffff ) + +[31,46]: + int 000000003fffffffffff <- ( 00000000 , ffffffffffff ) + +[31,45]: + int 000000001fffffffffff <- ( 00000000 , ffffffffffff ) + +[31,44]: + int 00000000fffffffffff <- ( 00000000 , fffffffffff ) + +[31,43]: + int 000000007ffffffffff <- ( 00000000 , fffffffffff ) + +[31,42]: + int 000000003ffffffffff <- ( 00000000 , fffffffffff ) + +[31,41]: + int 000000001ffffffffff <- ( 00000000 , fffffffffff ) + +[31,40]: + int 00000000ffffffffff <- ( 00000000 , ffffffffff ) + +[31,39]: + int 000000007fffffffff <- ( 00000000 , ffffffffff ) + +[31,38]: + int 000000003fffffffff <- ( 00000000 , ffffffffff ) + +[31,37]: + int 000000001fffffffff <- ( 00000000 , ffffffffff ) + +[31,36]: + int 00000000fffffffff <- ( 00000000 , fffffffff ) + +[31,35]: + int 000000007ffffffff <- ( 00000000 , fffffffff ) + +[31,34]: + int 000000003ffffffff <- ( 00000000 , fffffffff ) + +[31,33]: + int 000000001ffffffff <- ( 00000000 , fffffffff ) + +[31,32]: + int 00000000ffffffff <- ( 00000000 , ffffffff ) + +[31,31]: + int 000000007fffffff <- ( 00000000 , ffffffff ) + +[31,30]: + int 000000003fffffff <- ( 00000000 , ffffffff ) + +[31,29]: + int 000000001fffffff <- ( 00000000 , ffffffff ) + +[31,28]: + int 00000000fffffff <- ( 00000000 , fffffff ) + +[31,27]: + int 000000007ffffff <- ( 00000000 , fffffff ) + +[31,26]: + int 000000003ffffff <- ( 00000000 , fffffff ) + +[31,25]: + int 000000001ffffff <- ( 00000000 , fffffff ) + +[31,24]: + int 00000000ffffff <- ( 00000000 , ffffff ) + +[31,23]: + int 000000007fffff <- ( 00000000 , ffffff ) + +[31,22]: + int 000000003fffff <- ( 00000000 , ffffff ) + +[31,21]: + int 000000001fffff <- ( 00000000 , ffffff ) + +[31,20]: + int 00000000fffff <- ( 00000000 , fffff ) + +[31,19]: + int 000000007ffff <- ( 00000000 , fffff ) + +[31,18]: + int 000000003ffff <- ( 00000000 , fffff ) + +[31,17]: + int 000000001ffff <- ( 00000000 , fffff ) + +[31,16]: + int 00000000ffff <- ( 00000000 , ffff ) + +[31,15]: + int 000000007fff <- ( 00000000 , ffff ) + +[31,14]: + int 000000003fff <- ( 00000000 , ffff ) + +[31,13]: + int 000000001fff <- ( 00000000 , ffff ) + +[31,12]: + int 00000000fff <- ( 00000000 , fff ) + +[31,11]: + int 000000007ff <- ( 00000000 , fff ) + +[31,10]: + int 000000003ff <- ( 00000000 , fff ) + +[31,9]: + int 000000001ff <- ( 00000000 , fff ) + +[31,8]: + int 00000000ff <- ( 00000000 , ff ) + +[31,7]: + int 000000007f <- ( 00000000 , ff ) + +[31,6]: + int 000000003f <- ( 00000000 , ff ) + +[31,5]: + int 000000001f <- ( 00000000 , ff ) + +[31,4]: + int 00000000f <- ( 00000000 , f ) + +[31,3]: + int 000000007 <- ( 00000000 , f ) + +[31,2]: + int 000000003 <- ( 00000000 , f ) + +[31,1]: + int 000000001 <- ( 00000000 , f ) + +[30,64]: + int 00000000ffffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[30,63]: + int 000000007fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[30,62]: + int 000000003fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[30,61]: + int 00000001fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[30,60]: + int 00000000fffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[30,59]: + int 000000007ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[30,58]: + int 000000003ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[30,57]: + int 00000001ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[30,56]: + int 00000000ffffffffffffff <- ( 00000000 , ffffffffffffff ) + +[30,55]: + int 000000007fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[30,54]: + int 000000003fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[30,53]: + int 00000001fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[30,52]: + int 00000000fffffffffffff <- ( 00000000 , fffffffffffff ) + +[30,51]: + int 000000007ffffffffffff <- ( 00000000 , fffffffffffff ) + +[30,50]: + int 000000003ffffffffffff <- ( 00000000 , fffffffffffff ) + +[30,49]: + int 00000001ffffffffffff <- ( 00000000 , fffffffffffff ) + +[30,48]: + int 00000000ffffffffffff <- ( 00000000 , ffffffffffff ) + +[30,47]: + int 000000007fffffffffff <- ( 00000000 , ffffffffffff ) + +[30,46]: + int 000000003fffffffffff <- ( 00000000 , ffffffffffff ) + +[30,45]: + int 00000001fffffffffff <- ( 00000000 , ffffffffffff ) + +[30,44]: + int 00000000fffffffffff <- ( 00000000 , fffffffffff ) + +[30,43]: + int 000000007ffffffffff <- ( 00000000 , fffffffffff ) + +[30,42]: + int 000000003ffffffffff <- ( 00000000 , fffffffffff ) + +[30,41]: + int 00000001ffffffffff <- ( 00000000 , fffffffffff ) + +[30,40]: + int 00000000ffffffffff <- ( 00000000 , ffffffffff ) + +[30,39]: + int 000000007fffffffff <- ( 00000000 , ffffffffff ) + +[30,38]: + int 000000003fffffffff <- ( 00000000 , ffffffffff ) + +[30,37]: + int 00000001fffffffff <- ( 00000000 , ffffffffff ) + +[30,36]: + int 00000000fffffffff <- ( 00000000 , fffffffff ) + +[30,35]: + int 000000007ffffffff <- ( 00000000 , fffffffff ) + +[30,34]: + int 000000003ffffffff <- ( 00000000 , fffffffff ) + +[30,33]: + int 00000001ffffffff <- ( 00000000 , fffffffff ) + +[30,32]: + int 00000000ffffffff <- ( 00000000 , ffffffff ) + +[30,31]: + int 000000007fffffff <- ( 00000000 , ffffffff ) + +[30,30]: + int 000000003fffffff <- ( 00000000 , ffffffff ) + +[30,29]: + int 00000001fffffff <- ( 00000000 , ffffffff ) + +[30,28]: + int 00000000fffffff <- ( 00000000 , fffffff ) + +[30,27]: + int 000000007ffffff <- ( 00000000 , fffffff ) + +[30,26]: + int 000000003ffffff <- ( 00000000 , fffffff ) + +[30,25]: + int 00000001ffffff <- ( 00000000 , fffffff ) + +[30,24]: + int 00000000ffffff <- ( 00000000 , ffffff ) + +[30,23]: + int 000000007fffff <- ( 00000000 , ffffff ) + +[30,22]: + int 000000003fffff <- ( 00000000 , ffffff ) + +[30,21]: + int 00000001fffff <- ( 00000000 , ffffff ) + +[30,20]: + int 00000000fffff <- ( 00000000 , fffff ) + +[30,19]: + int 000000007ffff <- ( 00000000 , fffff ) + +[30,18]: + int 000000003ffff <- ( 00000000 , fffff ) + +[30,17]: + int 00000001ffff <- ( 00000000 , fffff ) + +[30,16]: + int 00000000ffff <- ( 00000000 , ffff ) + +[30,15]: + int 000000007fff <- ( 00000000 , ffff ) + +[30,14]: + int 000000003fff <- ( 00000000 , ffff ) + +[30,13]: + int 00000001fff <- ( 00000000 , ffff ) + +[30,12]: + int 00000000fff <- ( 00000000 , fff ) + +[30,11]: + int 000000007ff <- ( 00000000 , fff ) + +[30,10]: + int 000000003ff <- ( 00000000 , fff ) + +[30,9]: + int 00000001ff <- ( 00000000 , fff ) + +[30,8]: + int 00000000ff <- ( 00000000 , ff ) + +[30,7]: + int 000000007f <- ( 00000000 , ff ) + +[30,6]: + int 000000003f <- ( 00000000 , ff ) + +[30,5]: + int 00000001f <- ( 00000000 , ff ) + +[30,4]: + int 00000000f <- ( 00000000 , f ) + +[30,3]: + int 000000007 <- ( 00000000 , f ) + +[30,2]: + int 000000003 <- ( 00000000 , f ) + +[30,1]: + int 00000001 <- ( 00000000 , f ) + +[29,64]: + int 00000000ffffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[29,63]: + int 000000007fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[29,62]: + int 00000003fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[29,61]: + int 00000001fffffffffffffff <- ( 00000000 , ffffffffffffffff ) + +[29,60]: + int 00000000fffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[29,59]: + int 000000007ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[29,58]: + int 00000003ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[29,57]: + int 00000001ffffffffffffff <- ( 00000000 , fffffffffffffff ) + +[29,56]: + int 00000000ffffffffffffff <- ( 00000000 , ffffffffffffff ) + +[29,55]: + int 000000007fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[29,54]: + int 00000003fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[29,53]: + int 00000001fffffffffffff <- ( 00000000 , ffffffffffffff ) + +[29,52]: + int 00000000fffffffffffff <- ( 00000000 , fffffffffffff ) + +[29,51]: + int 000000007ffffffffffff <- ( 00000000 , fffffffffffff ) + +[29,50]: + int 00000003ffffffffffff <- ( 00000000 , fffffffffffff ) + +[29,49]: + int 00000001ffffffffffff <- ( 00000000 , fffffffffffff ) + +[29,48]: + int 00000000ffffffffffff <- ( 00000000 , ffffffffffff ) + +[29,47]: + int 000000007fffffffffff <- ( 00000000 , ffffffffffff ) + +[29,46]: + int 00000003fffffffffff <- ( 00000000 , ffffffffffff ) + +[29,45]: + int 00000001fffffffffff <- ( 00000000 , ffffffffffff ) + +[29,44]: + int 00000000fffffffffff <- ( 00000000 , fffffffffff ) + +[29,43]: + int 000000007ffffffffff <- ( 00000000 , fffffffffff ) + +[29,42]: + int 00000003ffffffffff <- ( 00000000 , fffffffffff ) + +[29,41]: + int 00000001ffffffffff <- ( 00000000 , fffffffffff ) + +[29,40]: + int 00000000ffffffffff <- ( 00000000 , ffffffffff ) + +[29,39]: + int 000000007fffffffff <- ( 00000000 , ffffffffff ) + +[29,38]: + int 00000003fffffffff <- ( 00000000 , ffffffffff ) + +[29,37]: + int 00000001fffffffff <- ( 00000000 , ffffffffff ) + +[29,36]: + int 00000000fffffffff <- ( 00000000 , fffffffff ) + +[29,35]: + int 000000007ffffffff <- ( 00000000 , fffffffff ) + +[29,34]: + int 00000003ffffffff <- ( 00000000 , fffffffff ) + +[29,33]: + int 00000001ffffffff <- ( 00000000 , fffffffff ) + +[29,32]: + int 00000000ffffffff <- ( 00000000 , ffffffff ) + +[29,31]: + int 000000007fffffff <- ( 00000000 , ffffffff ) + +[29,30]: + int 00000003fffffff <- ( 00000000 , ffffffff ) + +[29,29]: + int 00000001fffffff <- ( 00000000 , ffffffff ) + +[29,28]: + int 00000000fffffff <- ( 00000000 , fffffff ) + +[29,27]: + int 000000007ffffff <- ( 00000000 , fffffff ) + +[29,26]: + int 00000003ffffff <- ( 00000000 , fffffff ) + +[29,25]: + int 00000001ffffff <- ( 00000000 , fffffff ) + +[29,24]: + int 00000000ffffff <- ( 00000000 , ffffff ) + +[29,23]: + int 000000007fffff <- ( 00000000 , ffffff ) + +[29,22]: + int 00000003fffff <- ( 00000000 , ffffff ) + +[29,21]: + int 00000001fffff <- ( 00000000 , ffffff ) + +[29,20]: + int 00000000fffff <- ( 00000000 , fffff ) + +[29,19]: + int 000000007ffff <- ( 00000000 , fffff ) + +[29,18]: + int 00000003ffff <- ( 00000000 , fffff ) + +[29,17]: + int 00000001ffff <- ( 00000000 , fffff ) + +[29,16]: + int 00000000ffff <- ( 00000000 , ffff ) + +[29,15]: + int 000000007fff <- ( 00000000 , ffff ) + +[29,14]: + int 00000003fff <- ( 00000000 , ffff ) + +[29,13]: + int 00000001fff <- ( 00000000 , ffff ) + +[29,12]: + int 00000000fff <- ( 00000000 , fff ) + +[29,11]: + int 000000007ff <- ( 00000000 , fff ) + +[29,10]: + int 00000003ff <- ( 00000000 , fff ) + +[29,9]: + int 00000001ff <- ( 00000000 , fff ) + +[29,8]: + int 00000000ff <- ( 00000000 , ff ) + +[29,7]: + int 000000007f <- ( 00000000 , ff ) + +[29,6]: + int 00000003f <- ( 00000000 , ff ) + +[29,5]: + int 00000001f <- ( 00000000 , ff ) + +[29,4]: + int 00000000f <- ( 00000000 , f ) + +[29,3]: + int 000000007 <- ( 00000000 , f ) + +[29,2]: + int 00000003 <- ( 00000000 , f ) + +[29,1]: + int 00000001 <- ( 00000000 , f ) + +[28,64]: + int 00000000ffffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[28,63]: + int 00000007fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[28,62]: + int 00000003fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[28,61]: + int 00000001fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[28,60]: + int 00000000fffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[28,59]: + int 00000007ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[28,58]: + int 00000003ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[28,57]: + int 00000001ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[28,56]: + int 00000000ffffffffffffff <- ( 0000000 , ffffffffffffff ) + +[28,55]: + int 00000007fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[28,54]: + int 00000003fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[28,53]: + int 00000001fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[28,52]: + int 00000000fffffffffffff <- ( 0000000 , fffffffffffff ) + +[28,51]: + int 00000007ffffffffffff <- ( 0000000 , fffffffffffff ) + +[28,50]: + int 00000003ffffffffffff <- ( 0000000 , fffffffffffff ) + +[28,49]: + int 00000001ffffffffffff <- ( 0000000 , fffffffffffff ) + +[28,48]: + int 00000000ffffffffffff <- ( 0000000 , ffffffffffff ) + +[28,47]: + int 00000007fffffffffff <- ( 0000000 , ffffffffffff ) + +[28,46]: + int 00000003fffffffffff <- ( 0000000 , ffffffffffff ) + +[28,45]: + int 00000001fffffffffff <- ( 0000000 , ffffffffffff ) + +[28,44]: + int 00000000fffffffffff <- ( 0000000 , fffffffffff ) + +[28,43]: + int 00000007ffffffffff <- ( 0000000 , fffffffffff ) + +[28,42]: + int 00000003ffffffffff <- ( 0000000 , fffffffffff ) + +[28,41]: + int 00000001ffffffffff <- ( 0000000 , fffffffffff ) + +[28,40]: + int 00000000ffffffffff <- ( 0000000 , ffffffffff ) + +[28,39]: + int 00000007fffffffff <- ( 0000000 , ffffffffff ) + +[28,38]: + int 00000003fffffffff <- ( 0000000 , ffffffffff ) + +[28,37]: + int 00000001fffffffff <- ( 0000000 , ffffffffff ) + +[28,36]: + int 00000000fffffffff <- ( 0000000 , fffffffff ) + +[28,35]: + int 00000007ffffffff <- ( 0000000 , fffffffff ) + +[28,34]: + int 00000003ffffffff <- ( 0000000 , fffffffff ) + +[28,33]: + int 00000001ffffffff <- ( 0000000 , fffffffff ) + +[28,32]: + int 00000000ffffffff <- ( 0000000 , ffffffff ) + +[28,31]: + int 00000007fffffff <- ( 0000000 , ffffffff ) + +[28,30]: + int 00000003fffffff <- ( 0000000 , ffffffff ) + +[28,29]: + int 00000001fffffff <- ( 0000000 , ffffffff ) + +[28,28]: + int 00000000fffffff <- ( 0000000 , fffffff ) + +[28,27]: + int 00000007ffffff <- ( 0000000 , fffffff ) + +[28,26]: + int 00000003ffffff <- ( 0000000 , fffffff ) + +[28,25]: + int 00000001ffffff <- ( 0000000 , fffffff ) + +[28,24]: + int 00000000ffffff <- ( 0000000 , ffffff ) + +[28,23]: + int 00000007fffff <- ( 0000000 , ffffff ) + +[28,22]: + int 00000003fffff <- ( 0000000 , ffffff ) + +[28,21]: + int 00000001fffff <- ( 0000000 , ffffff ) + +[28,20]: + int 00000000fffff <- ( 0000000 , fffff ) + +[28,19]: + int 00000007ffff <- ( 0000000 , fffff ) + +[28,18]: + int 00000003ffff <- ( 0000000 , fffff ) + +[28,17]: + int 00000001ffff <- ( 0000000 , fffff ) + +[28,16]: + int 00000000ffff <- ( 0000000 , ffff ) + +[28,15]: + int 00000007fff <- ( 0000000 , ffff ) + +[28,14]: + int 00000003fff <- ( 0000000 , ffff ) + +[28,13]: + int 00000001fff <- ( 0000000 , ffff ) + +[28,12]: + int 00000000fff <- ( 0000000 , fff ) + +[28,11]: + int 00000007ff <- ( 0000000 , fff ) + +[28,10]: + int 00000003ff <- ( 0000000 , fff ) + +[28,9]: + int 00000001ff <- ( 0000000 , fff ) + +[28,8]: + int 00000000ff <- ( 0000000 , ff ) + +[28,7]: + int 00000007f <- ( 0000000 , ff ) + +[28,6]: + int 00000003f <- ( 0000000 , ff ) + +[28,5]: + int 00000001f <- ( 0000000 , ff ) + +[28,4]: + int 00000000f <- ( 0000000 , f ) + +[28,3]: + int 00000007 <- ( 0000000 , f ) + +[28,2]: + int 00000003 <- ( 0000000 , f ) + +[28,1]: + int 00000001 <- ( 0000000 , f ) + +[27,64]: + int 0000000ffffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[27,63]: + int 00000007fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[27,62]: + int 00000003fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[27,61]: + int 00000001fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[27,60]: + int 0000000fffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[27,59]: + int 00000007ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[27,58]: + int 00000003ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[27,57]: + int 00000001ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[27,56]: + int 0000000ffffffffffffff <- ( 0000000 , ffffffffffffff ) + +[27,55]: + int 00000007fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[27,54]: + int 00000003fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[27,53]: + int 00000001fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[27,52]: + int 0000000fffffffffffff <- ( 0000000 , fffffffffffff ) + +[27,51]: + int 00000007ffffffffffff <- ( 0000000 , fffffffffffff ) + +[27,50]: + int 00000003ffffffffffff <- ( 0000000 , fffffffffffff ) + +[27,49]: + int 00000001ffffffffffff <- ( 0000000 , fffffffffffff ) + +[27,48]: + int 0000000ffffffffffff <- ( 0000000 , ffffffffffff ) + +[27,47]: + int 00000007fffffffffff <- ( 0000000 , ffffffffffff ) + +[27,46]: + int 00000003fffffffffff <- ( 0000000 , ffffffffffff ) + +[27,45]: + int 00000001fffffffffff <- ( 0000000 , ffffffffffff ) + +[27,44]: + int 0000000fffffffffff <- ( 0000000 , fffffffffff ) + +[27,43]: + int 00000007ffffffffff <- ( 0000000 , fffffffffff ) + +[27,42]: + int 00000003ffffffffff <- ( 0000000 , fffffffffff ) + +[27,41]: + int 00000001ffffffffff <- ( 0000000 , fffffffffff ) + +[27,40]: + int 0000000ffffffffff <- ( 0000000 , ffffffffff ) + +[27,39]: + int 00000007fffffffff <- ( 0000000 , ffffffffff ) + +[27,38]: + int 00000003fffffffff <- ( 0000000 , ffffffffff ) + +[27,37]: + int 00000001fffffffff <- ( 0000000 , ffffffffff ) + +[27,36]: + int 0000000fffffffff <- ( 0000000 , fffffffff ) + +[27,35]: + int 00000007ffffffff <- ( 0000000 , fffffffff ) + +[27,34]: + int 00000003ffffffff <- ( 0000000 , fffffffff ) + +[27,33]: + int 00000001ffffffff <- ( 0000000 , fffffffff ) + +[27,32]: + int 0000000ffffffff <- ( 0000000 , ffffffff ) + +[27,31]: + int 00000007fffffff <- ( 0000000 , ffffffff ) + +[27,30]: + int 00000003fffffff <- ( 0000000 , ffffffff ) + +[27,29]: + int 00000001fffffff <- ( 0000000 , ffffffff ) + +[27,28]: + int 0000000fffffff <- ( 0000000 , fffffff ) + +[27,27]: + int 00000007ffffff <- ( 0000000 , fffffff ) + +[27,26]: + int 00000003ffffff <- ( 0000000 , fffffff ) + +[27,25]: + int 00000001ffffff <- ( 0000000 , fffffff ) + +[27,24]: + int 0000000ffffff <- ( 0000000 , ffffff ) + +[27,23]: + int 00000007fffff <- ( 0000000 , ffffff ) + +[27,22]: + int 00000003fffff <- ( 0000000 , ffffff ) + +[27,21]: + int 00000001fffff <- ( 0000000 , ffffff ) + +[27,20]: + int 0000000fffff <- ( 0000000 , fffff ) + +[27,19]: + int 00000007ffff <- ( 0000000 , fffff ) + +[27,18]: + int 00000003ffff <- ( 0000000 , fffff ) + +[27,17]: + int 00000001ffff <- ( 0000000 , fffff ) + +[27,16]: + int 0000000ffff <- ( 0000000 , ffff ) + +[27,15]: + int 00000007fff <- ( 0000000 , ffff ) + +[27,14]: + int 00000003fff <- ( 0000000 , ffff ) + +[27,13]: + int 00000001fff <- ( 0000000 , ffff ) + +[27,12]: + int 0000000fff <- ( 0000000 , fff ) + +[27,11]: + int 00000007ff <- ( 0000000 , fff ) + +[27,10]: + int 00000003ff <- ( 0000000 , fff ) + +[27,9]: + int 00000001ff <- ( 0000000 , fff ) + +[27,8]: + int 0000000ff <- ( 0000000 , ff ) + +[27,7]: + int 00000007f <- ( 0000000 , ff ) + +[27,6]: + int 00000003f <- ( 0000000 , ff ) + +[27,5]: + int 00000001f <- ( 0000000 , ff ) + +[27,4]: + int 0000000f <- ( 0000000 , f ) + +[27,3]: + int 00000007 <- ( 0000000 , f ) + +[27,2]: + int 00000003 <- ( 0000000 , f ) + +[27,1]: + int 00000001 <- ( 0000000 , f ) + +[26,64]: + int 0000000ffffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[26,63]: + int 00000007fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[26,62]: + int 00000003fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[26,61]: + int 0000001fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[26,60]: + int 0000000fffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[26,59]: + int 00000007ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[26,58]: + int 00000003ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[26,57]: + int 0000001ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[26,56]: + int 0000000ffffffffffffff <- ( 0000000 , ffffffffffffff ) + +[26,55]: + int 00000007fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[26,54]: + int 00000003fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[26,53]: + int 0000001fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[26,52]: + int 0000000fffffffffffff <- ( 0000000 , fffffffffffff ) + +[26,51]: + int 00000007ffffffffffff <- ( 0000000 , fffffffffffff ) + +[26,50]: + int 00000003ffffffffffff <- ( 0000000 , fffffffffffff ) + +[26,49]: + int 0000001ffffffffffff <- ( 0000000 , fffffffffffff ) + +[26,48]: + int 0000000ffffffffffff <- ( 0000000 , ffffffffffff ) + +[26,47]: + int 00000007fffffffffff <- ( 0000000 , ffffffffffff ) + +[26,46]: + int 00000003fffffffffff <- ( 0000000 , ffffffffffff ) + +[26,45]: + int 0000001fffffffffff <- ( 0000000 , ffffffffffff ) + +[26,44]: + int 0000000fffffffffff <- ( 0000000 , fffffffffff ) + +[26,43]: + int 00000007ffffffffff <- ( 0000000 , fffffffffff ) + +[26,42]: + int 00000003ffffffffff <- ( 0000000 , fffffffffff ) + +[26,41]: + int 0000001ffffffffff <- ( 0000000 , fffffffffff ) + +[26,40]: + int 0000000ffffffffff <- ( 0000000 , ffffffffff ) + +[26,39]: + int 00000007fffffffff <- ( 0000000 , ffffffffff ) + +[26,38]: + int 00000003fffffffff <- ( 0000000 , ffffffffff ) + +[26,37]: + int 0000001fffffffff <- ( 0000000 , ffffffffff ) + +[26,36]: + int 0000000fffffffff <- ( 0000000 , fffffffff ) + +[26,35]: + int 00000007ffffffff <- ( 0000000 , fffffffff ) + +[26,34]: + int 00000003ffffffff <- ( 0000000 , fffffffff ) + +[26,33]: + int 0000001ffffffff <- ( 0000000 , fffffffff ) + +[26,32]: + int 0000000ffffffff <- ( 0000000 , ffffffff ) + +[26,31]: + int 00000007fffffff <- ( 0000000 , ffffffff ) + +[26,30]: + int 00000003fffffff <- ( 0000000 , ffffffff ) + +[26,29]: + int 0000001fffffff <- ( 0000000 , ffffffff ) + +[26,28]: + int 0000000fffffff <- ( 0000000 , fffffff ) + +[26,27]: + int 00000007ffffff <- ( 0000000 , fffffff ) + +[26,26]: + int 00000003ffffff <- ( 0000000 , fffffff ) + +[26,25]: + int 0000001ffffff <- ( 0000000 , fffffff ) + +[26,24]: + int 0000000ffffff <- ( 0000000 , ffffff ) + +[26,23]: + int 00000007fffff <- ( 0000000 , ffffff ) + +[26,22]: + int 00000003fffff <- ( 0000000 , ffffff ) + +[26,21]: + int 0000001fffff <- ( 0000000 , ffffff ) + +[26,20]: + int 0000000fffff <- ( 0000000 , fffff ) + +[26,19]: + int 00000007ffff <- ( 0000000 , fffff ) + +[26,18]: + int 00000003ffff <- ( 0000000 , fffff ) + +[26,17]: + int 0000001ffff <- ( 0000000 , fffff ) + +[26,16]: + int 0000000ffff <- ( 0000000 , ffff ) + +[26,15]: + int 00000007fff <- ( 0000000 , ffff ) + +[26,14]: + int 00000003fff <- ( 0000000 , ffff ) + +[26,13]: + int 0000001fff <- ( 0000000 , ffff ) + +[26,12]: + int 0000000fff <- ( 0000000 , fff ) + +[26,11]: + int 00000007ff <- ( 0000000 , fff ) + +[26,10]: + int 00000003ff <- ( 0000000 , fff ) + +[26,9]: + int 0000001ff <- ( 0000000 , fff ) + +[26,8]: + int 0000000ff <- ( 0000000 , ff ) + +[26,7]: + int 00000007f <- ( 0000000 , ff ) + +[26,6]: + int 00000003f <- ( 0000000 , ff ) + +[26,5]: + int 0000001f <- ( 0000000 , ff ) + +[26,4]: + int 0000000f <- ( 0000000 , f ) + +[26,3]: + int 00000007 <- ( 0000000 , f ) + +[26,2]: + int 00000003 <- ( 0000000 , f ) + +[26,1]: + int 0000001 <- ( 0000000 , f ) + +[25,64]: + int 0000000ffffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[25,63]: + int 00000007fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[25,62]: + int 0000003fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[25,61]: + int 0000001fffffffffffffff <- ( 0000000 , ffffffffffffffff ) + +[25,60]: + int 0000000fffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[25,59]: + int 00000007ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[25,58]: + int 0000003ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[25,57]: + int 0000001ffffffffffffff <- ( 0000000 , fffffffffffffff ) + +[25,56]: + int 0000000ffffffffffffff <- ( 0000000 , ffffffffffffff ) + +[25,55]: + int 00000007fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[25,54]: + int 0000003fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[25,53]: + int 0000001fffffffffffff <- ( 0000000 , ffffffffffffff ) + +[25,52]: + int 0000000fffffffffffff <- ( 0000000 , fffffffffffff ) + +[25,51]: + int 00000007ffffffffffff <- ( 0000000 , fffffffffffff ) + +[25,50]: + int 0000003ffffffffffff <- ( 0000000 , fffffffffffff ) + +[25,49]: + int 0000001ffffffffffff <- ( 0000000 , fffffffffffff ) + +[25,48]: + int 0000000ffffffffffff <- ( 0000000 , ffffffffffff ) + +[25,47]: + int 00000007fffffffffff <- ( 0000000 , ffffffffffff ) + +[25,46]: + int 0000003fffffffffff <- ( 0000000 , ffffffffffff ) + +[25,45]: + int 0000001fffffffffff <- ( 0000000 , ffffffffffff ) + +[25,44]: + int 0000000fffffffffff <- ( 0000000 , fffffffffff ) + +[25,43]: + int 00000007ffffffffff <- ( 0000000 , fffffffffff ) + +[25,42]: + int 0000003ffffffffff <- ( 0000000 , fffffffffff ) + +[25,41]: + int 0000001ffffffffff <- ( 0000000 , fffffffffff ) + +[25,40]: + int 0000000ffffffffff <- ( 0000000 , ffffffffff ) + +[25,39]: + int 00000007fffffffff <- ( 0000000 , ffffffffff ) + +[25,38]: + int 0000003fffffffff <- ( 0000000 , ffffffffff ) + +[25,37]: + int 0000001fffffffff <- ( 0000000 , ffffffffff ) + +[25,36]: + int 0000000fffffffff <- ( 0000000 , fffffffff ) + +[25,35]: + int 00000007ffffffff <- ( 0000000 , fffffffff ) + +[25,34]: + int 0000003ffffffff <- ( 0000000 , fffffffff ) + +[25,33]: + int 0000001ffffffff <- ( 0000000 , fffffffff ) + +[25,32]: + int 0000000ffffffff <- ( 0000000 , ffffffff ) + +[25,31]: + int 00000007fffffff <- ( 0000000 , ffffffff ) + +[25,30]: + int 0000003fffffff <- ( 0000000 , ffffffff ) + +[25,29]: + int 0000001fffffff <- ( 0000000 , ffffffff ) + +[25,28]: + int 0000000fffffff <- ( 0000000 , fffffff ) + +[25,27]: + int 00000007ffffff <- ( 0000000 , fffffff ) + +[25,26]: + int 0000003ffffff <- ( 0000000 , fffffff ) + +[25,25]: + int 0000001ffffff <- ( 0000000 , fffffff ) + +[25,24]: + int 0000000ffffff <- ( 0000000 , ffffff ) + +[25,23]: + int 00000007fffff <- ( 0000000 , ffffff ) + +[25,22]: + int 0000003fffff <- ( 0000000 , ffffff ) + +[25,21]: + int 0000001fffff <- ( 0000000 , ffffff ) + +[25,20]: + int 0000000fffff <- ( 0000000 , fffff ) + +[25,19]: + int 00000007ffff <- ( 0000000 , fffff ) + +[25,18]: + int 0000003ffff <- ( 0000000 , fffff ) + +[25,17]: + int 0000001ffff <- ( 0000000 , fffff ) + +[25,16]: + int 0000000ffff <- ( 0000000 , ffff ) + +[25,15]: + int 00000007fff <- ( 0000000 , ffff ) + +[25,14]: + int 0000003fff <- ( 0000000 , ffff ) + +[25,13]: + int 0000001fff <- ( 0000000 , ffff ) + +[25,12]: + int 0000000fff <- ( 0000000 , fff ) + +[25,11]: + int 00000007ff <- ( 0000000 , fff ) + +[25,10]: + int 0000003ff <- ( 0000000 , fff ) + +[25,9]: + int 0000001ff <- ( 0000000 , fff ) + +[25,8]: + int 0000000ff <- ( 0000000 , ff ) + +[25,7]: + int 00000007f <- ( 0000000 , ff ) + +[25,6]: + int 0000003f <- ( 0000000 , ff ) + +[25,5]: + int 0000001f <- ( 0000000 , ff ) + +[25,4]: + int 0000000f <- ( 0000000 , f ) + +[25,3]: + int 00000007 <- ( 0000000 , f ) + +[25,2]: + int 0000003 <- ( 0000000 , f ) + +[25,1]: + int 0000001 <- ( 0000000 , f ) + +[24,64]: + int 0000000ffffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[24,63]: + int 0000007fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[24,62]: + int 0000003fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[24,61]: + int 0000001fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[24,60]: + int 0000000fffffffffffffff <- ( 000000 , fffffffffffffff ) + +[24,59]: + int 0000007ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[24,58]: + int 0000003ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[24,57]: + int 0000001ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[24,56]: + int 0000000ffffffffffffff <- ( 000000 , ffffffffffffff ) + +[24,55]: + int 0000007fffffffffffff <- ( 000000 , ffffffffffffff ) + +[24,54]: + int 0000003fffffffffffff <- ( 000000 , ffffffffffffff ) + +[24,53]: + int 0000001fffffffffffff <- ( 000000 , ffffffffffffff ) + +[24,52]: + int 0000000fffffffffffff <- ( 000000 , fffffffffffff ) + +[24,51]: + int 0000007ffffffffffff <- ( 000000 , fffffffffffff ) + +[24,50]: + int 0000003ffffffffffff <- ( 000000 , fffffffffffff ) + +[24,49]: + int 0000001ffffffffffff <- ( 000000 , fffffffffffff ) + +[24,48]: + int 0000000ffffffffffff <- ( 000000 , ffffffffffff ) + +[24,47]: + int 0000007fffffffffff <- ( 000000 , ffffffffffff ) + +[24,46]: + int 0000003fffffffffff <- ( 000000 , ffffffffffff ) + +[24,45]: + int 0000001fffffffffff <- ( 000000 , ffffffffffff ) + +[24,44]: + int 0000000fffffffffff <- ( 000000 , fffffffffff ) + +[24,43]: + int 0000007ffffffffff <- ( 000000 , fffffffffff ) + +[24,42]: + int 0000003ffffffffff <- ( 000000 , fffffffffff ) + +[24,41]: + int 0000001ffffffffff <- ( 000000 , fffffffffff ) + +[24,40]: + int 0000000ffffffffff <- ( 000000 , ffffffffff ) + +[24,39]: + int 0000007fffffffff <- ( 000000 , ffffffffff ) + +[24,38]: + int 0000003fffffffff <- ( 000000 , ffffffffff ) + +[24,37]: + int 0000001fffffffff <- ( 000000 , ffffffffff ) + +[24,36]: + int 0000000fffffffff <- ( 000000 , fffffffff ) + +[24,35]: + int 0000007ffffffff <- ( 000000 , fffffffff ) + +[24,34]: + int 0000003ffffffff <- ( 000000 , fffffffff ) + +[24,33]: + int 0000001ffffffff <- ( 000000 , fffffffff ) + +[24,32]: + int 0000000ffffffff <- ( 000000 , ffffffff ) + +[24,31]: + int 0000007fffffff <- ( 000000 , ffffffff ) + +[24,30]: + int 0000003fffffff <- ( 000000 , ffffffff ) + +[24,29]: + int 0000001fffffff <- ( 000000 , ffffffff ) + +[24,28]: + int 0000000fffffff <- ( 000000 , fffffff ) + +[24,27]: + int 0000007ffffff <- ( 000000 , fffffff ) + +[24,26]: + int 0000003ffffff <- ( 000000 , fffffff ) + +[24,25]: + int 0000001ffffff <- ( 000000 , fffffff ) + +[24,24]: + int 0000000ffffff <- ( 000000 , ffffff ) + +[24,23]: + int 0000007fffff <- ( 000000 , ffffff ) + +[24,22]: + int 0000003fffff <- ( 000000 , ffffff ) + +[24,21]: + int 0000001fffff <- ( 000000 , ffffff ) + +[24,20]: + int 0000000fffff <- ( 000000 , fffff ) + +[24,19]: + int 0000007ffff <- ( 000000 , fffff ) + +[24,18]: + int 0000003ffff <- ( 000000 , fffff ) + +[24,17]: + int 0000001ffff <- ( 000000 , fffff ) + +[24,16]: + int 0000000ffff <- ( 000000 , ffff ) + +[24,15]: + int 0000007fff <- ( 000000 , ffff ) + +[24,14]: + int 0000003fff <- ( 000000 , ffff ) + +[24,13]: + int 0000001fff <- ( 000000 , ffff ) + +[24,12]: + int 0000000fff <- ( 000000 , fff ) + +[24,11]: + int 0000007ff <- ( 000000 , fff ) + +[24,10]: + int 0000003ff <- ( 000000 , fff ) + +[24,9]: + int 0000001ff <- ( 000000 , fff ) + +[24,8]: + int 0000000ff <- ( 000000 , ff ) + +[24,7]: + int 0000007f <- ( 000000 , ff ) + +[24,6]: + int 0000003f <- ( 000000 , ff ) + +[24,5]: + int 0000001f <- ( 000000 , ff ) + +[24,4]: + int 0000000f <- ( 000000 , f ) + +[24,3]: + int 0000007 <- ( 000000 , f ) + +[24,2]: + int 0000003 <- ( 000000 , f ) + +[24,1]: + int 0000001 <- ( 000000 , f ) + +[23,64]: + int 000000ffffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[23,63]: + int 0000007fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[23,62]: + int 0000003fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[23,61]: + int 0000001fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[23,60]: + int 000000fffffffffffffff <- ( 000000 , fffffffffffffff ) + +[23,59]: + int 0000007ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[23,58]: + int 0000003ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[23,57]: + int 0000001ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[23,56]: + int 000000ffffffffffffff <- ( 000000 , ffffffffffffff ) + +[23,55]: + int 0000007fffffffffffff <- ( 000000 , ffffffffffffff ) + +[23,54]: + int 0000003fffffffffffff <- ( 000000 , ffffffffffffff ) + +[23,53]: + int 0000001fffffffffffff <- ( 000000 , ffffffffffffff ) + +[23,52]: + int 000000fffffffffffff <- ( 000000 , fffffffffffff ) + +[23,51]: + int 0000007ffffffffffff <- ( 000000 , fffffffffffff ) + +[23,50]: + int 0000003ffffffffffff <- ( 000000 , fffffffffffff ) + +[23,49]: + int 0000001ffffffffffff <- ( 000000 , fffffffffffff ) + +[23,48]: + int 000000ffffffffffff <- ( 000000 , ffffffffffff ) + +[23,47]: + int 0000007fffffffffff <- ( 000000 , ffffffffffff ) + +[23,46]: + int 0000003fffffffffff <- ( 000000 , ffffffffffff ) + +[23,45]: + int 0000001fffffffffff <- ( 000000 , ffffffffffff ) + +[23,44]: + int 000000fffffffffff <- ( 000000 , fffffffffff ) + +[23,43]: + int 0000007ffffffffff <- ( 000000 , fffffffffff ) + +[23,42]: + int 0000003ffffffffff <- ( 000000 , fffffffffff ) + +[23,41]: + int 0000001ffffffffff <- ( 000000 , fffffffffff ) + +[23,40]: + int 000000ffffffffff <- ( 000000 , ffffffffff ) + +[23,39]: + int 0000007fffffffff <- ( 000000 , ffffffffff ) + +[23,38]: + int 0000003fffffffff <- ( 000000 , ffffffffff ) + +[23,37]: + int 0000001fffffffff <- ( 000000 , ffffffffff ) + +[23,36]: + int 000000fffffffff <- ( 000000 , fffffffff ) + +[23,35]: + int 0000007ffffffff <- ( 000000 , fffffffff ) + +[23,34]: + int 0000003ffffffff <- ( 000000 , fffffffff ) + +[23,33]: + int 0000001ffffffff <- ( 000000 , fffffffff ) + +[23,32]: + int 000000ffffffff <- ( 000000 , ffffffff ) + +[23,31]: + int 0000007fffffff <- ( 000000 , ffffffff ) + +[23,30]: + int 0000003fffffff <- ( 000000 , ffffffff ) + +[23,29]: + int 0000001fffffff <- ( 000000 , ffffffff ) + +[23,28]: + int 000000fffffff <- ( 000000 , fffffff ) + +[23,27]: + int 0000007ffffff <- ( 000000 , fffffff ) + +[23,26]: + int 0000003ffffff <- ( 000000 , fffffff ) + +[23,25]: + int 0000001ffffff <- ( 000000 , fffffff ) + +[23,24]: + int 000000ffffff <- ( 000000 , ffffff ) + +[23,23]: + int 0000007fffff <- ( 000000 , ffffff ) + +[23,22]: + int 0000003fffff <- ( 000000 , ffffff ) + +[23,21]: + int 0000001fffff <- ( 000000 , ffffff ) + +[23,20]: + int 000000fffff <- ( 000000 , fffff ) + +[23,19]: + int 0000007ffff <- ( 000000 , fffff ) + +[23,18]: + int 0000003ffff <- ( 000000 , fffff ) + +[23,17]: + int 0000001ffff <- ( 000000 , fffff ) + +[23,16]: + int 000000ffff <- ( 000000 , ffff ) + +[23,15]: + int 0000007fff <- ( 000000 , ffff ) + +[23,14]: + int 0000003fff <- ( 000000 , ffff ) + +[23,13]: + int 0000001fff <- ( 000000 , ffff ) + +[23,12]: + int 000000fff <- ( 000000 , fff ) + +[23,11]: + int 0000007ff <- ( 000000 , fff ) + +[23,10]: + int 0000003ff <- ( 000000 , fff ) + +[23,9]: + int 0000001ff <- ( 000000 , fff ) + +[23,8]: + int 000000ff <- ( 000000 , ff ) + +[23,7]: + int 0000007f <- ( 000000 , ff ) + +[23,6]: + int 0000003f <- ( 000000 , ff ) + +[23,5]: + int 0000001f <- ( 000000 , ff ) + +[23,4]: + int 000000f <- ( 000000 , f ) + +[23,3]: + int 0000007 <- ( 000000 , f ) + +[23,2]: + int 0000003 <- ( 000000 , f ) + +[23,1]: + int 0000001 <- ( 000000 , f ) + +[22,64]: + int 000000ffffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[22,63]: + int 0000007fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[22,62]: + int 0000003fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[22,61]: + int 000001fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[22,60]: + int 000000fffffffffffffff <- ( 000000 , fffffffffffffff ) + +[22,59]: + int 0000007ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[22,58]: + int 0000003ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[22,57]: + int 000001ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[22,56]: + int 000000ffffffffffffff <- ( 000000 , ffffffffffffff ) + +[22,55]: + int 0000007fffffffffffff <- ( 000000 , ffffffffffffff ) + +[22,54]: + int 0000003fffffffffffff <- ( 000000 , ffffffffffffff ) + +[22,53]: + int 000001fffffffffffff <- ( 000000 , ffffffffffffff ) + +[22,52]: + int 000000fffffffffffff <- ( 000000 , fffffffffffff ) + +[22,51]: + int 0000007ffffffffffff <- ( 000000 , fffffffffffff ) + +[22,50]: + int 0000003ffffffffffff <- ( 000000 , fffffffffffff ) + +[22,49]: + int 000001ffffffffffff <- ( 000000 , fffffffffffff ) + +[22,48]: + int 000000ffffffffffff <- ( 000000 , ffffffffffff ) + +[22,47]: + int 0000007fffffffffff <- ( 000000 , ffffffffffff ) + +[22,46]: + int 0000003fffffffffff <- ( 000000 , ffffffffffff ) + +[22,45]: + int 000001fffffffffff <- ( 000000 , ffffffffffff ) + +[22,44]: + int 000000fffffffffff <- ( 000000 , fffffffffff ) + +[22,43]: + int 0000007ffffffffff <- ( 000000 , fffffffffff ) + +[22,42]: + int 0000003ffffffffff <- ( 000000 , fffffffffff ) + +[22,41]: + int 000001ffffffffff <- ( 000000 , fffffffffff ) + +[22,40]: + int 000000ffffffffff <- ( 000000 , ffffffffff ) + +[22,39]: + int 0000007fffffffff <- ( 000000 , ffffffffff ) + +[22,38]: + int 0000003fffffffff <- ( 000000 , ffffffffff ) + +[22,37]: + int 000001fffffffff <- ( 000000 , ffffffffff ) + +[22,36]: + int 000000fffffffff <- ( 000000 , fffffffff ) + +[22,35]: + int 0000007ffffffff <- ( 000000 , fffffffff ) + +[22,34]: + int 0000003ffffffff <- ( 000000 , fffffffff ) + +[22,33]: + int 000001ffffffff <- ( 000000 , fffffffff ) + +[22,32]: + int 000000ffffffff <- ( 000000 , ffffffff ) + +[22,31]: + int 0000007fffffff <- ( 000000 , ffffffff ) + +[22,30]: + int 0000003fffffff <- ( 000000 , ffffffff ) + +[22,29]: + int 000001fffffff <- ( 000000 , ffffffff ) + +[22,28]: + int 000000fffffff <- ( 000000 , fffffff ) + +[22,27]: + int 0000007ffffff <- ( 000000 , fffffff ) + +[22,26]: + int 0000003ffffff <- ( 000000 , fffffff ) + +[22,25]: + int 000001ffffff <- ( 000000 , fffffff ) + +[22,24]: + int 000000ffffff <- ( 000000 , ffffff ) + +[22,23]: + int 0000007fffff <- ( 000000 , ffffff ) + +[22,22]: + int 0000003fffff <- ( 000000 , ffffff ) + +[22,21]: + int 000001fffff <- ( 000000 , ffffff ) + +[22,20]: + int 000000fffff <- ( 000000 , fffff ) + +[22,19]: + int 0000007ffff <- ( 000000 , fffff ) + +[22,18]: + int 0000003ffff <- ( 000000 , fffff ) + +[22,17]: + int 000001ffff <- ( 000000 , fffff ) + +[22,16]: + int 000000ffff <- ( 000000 , ffff ) + +[22,15]: + int 0000007fff <- ( 000000 , ffff ) + +[22,14]: + int 0000003fff <- ( 000000 , ffff ) + +[22,13]: + int 000001fff <- ( 000000 , ffff ) + +[22,12]: + int 000000fff <- ( 000000 , fff ) + +[22,11]: + int 0000007ff <- ( 000000 , fff ) + +[22,10]: + int 0000003ff <- ( 000000 , fff ) + +[22,9]: + int 000001ff <- ( 000000 , fff ) + +[22,8]: + int 000000ff <- ( 000000 , ff ) + +[22,7]: + int 0000007f <- ( 000000 , ff ) + +[22,6]: + int 0000003f <- ( 000000 , ff ) + +[22,5]: + int 000001f <- ( 000000 , ff ) + +[22,4]: + int 000000f <- ( 000000 , f ) + +[22,3]: + int 0000007 <- ( 000000 , f ) + +[22,2]: + int 0000003 <- ( 000000 , f ) + +[22,1]: + int 000001 <- ( 000000 , f ) + +[21,64]: + int 000000ffffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[21,63]: + int 0000007fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[21,62]: + int 000003fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[21,61]: + int 000001fffffffffffffff <- ( 000000 , ffffffffffffffff ) + +[21,60]: + int 000000fffffffffffffff <- ( 000000 , fffffffffffffff ) + +[21,59]: + int 0000007ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[21,58]: + int 000003ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[21,57]: + int 000001ffffffffffffff <- ( 000000 , fffffffffffffff ) + +[21,56]: + int 000000ffffffffffffff <- ( 000000 , ffffffffffffff ) + +[21,55]: + int 0000007fffffffffffff <- ( 000000 , ffffffffffffff ) + +[21,54]: + int 000003fffffffffffff <- ( 000000 , ffffffffffffff ) + +[21,53]: + int 000001fffffffffffff <- ( 000000 , ffffffffffffff ) + +[21,52]: + int 000000fffffffffffff <- ( 000000 , fffffffffffff ) + +[21,51]: + int 0000007ffffffffffff <- ( 000000 , fffffffffffff ) + +[21,50]: + int 000003ffffffffffff <- ( 000000 , fffffffffffff ) + +[21,49]: + int 000001ffffffffffff <- ( 000000 , fffffffffffff ) + +[21,48]: + int 000000ffffffffffff <- ( 000000 , ffffffffffff ) + +[21,47]: + int 0000007fffffffffff <- ( 000000 , ffffffffffff ) + +[21,46]: + int 000003fffffffffff <- ( 000000 , ffffffffffff ) + +[21,45]: + int 000001fffffffffff <- ( 000000 , ffffffffffff ) + +[21,44]: + int 000000fffffffffff <- ( 000000 , fffffffffff ) + +[21,43]: + int 0000007ffffffffff <- ( 000000 , fffffffffff ) + +[21,42]: + int 000003ffffffffff <- ( 000000 , fffffffffff ) + +[21,41]: + int 000001ffffffffff <- ( 000000 , fffffffffff ) + +[21,40]: + int 000000ffffffffff <- ( 000000 , ffffffffff ) + +[21,39]: + int 0000007fffffffff <- ( 000000 , ffffffffff ) + +[21,38]: + int 000003fffffffff <- ( 000000 , ffffffffff ) + +[21,37]: + int 000001fffffffff <- ( 000000 , ffffffffff ) + +[21,36]: + int 000000fffffffff <- ( 000000 , fffffffff ) + +[21,35]: + int 0000007ffffffff <- ( 000000 , fffffffff ) + +[21,34]: + int 000003ffffffff <- ( 000000 , fffffffff ) + +[21,33]: + int 000001ffffffff <- ( 000000 , fffffffff ) + +[21,32]: + int 000000ffffffff <- ( 000000 , ffffffff ) + +[21,31]: + int 0000007fffffff <- ( 000000 , ffffffff ) + +[21,30]: + int 000003fffffff <- ( 000000 , ffffffff ) + +[21,29]: + int 000001fffffff <- ( 000000 , ffffffff ) + +[21,28]: + int 000000fffffff <- ( 000000 , fffffff ) + +[21,27]: + int 0000007ffffff <- ( 000000 , fffffff ) + +[21,26]: + int 000003ffffff <- ( 000000 , fffffff ) + +[21,25]: + int 000001ffffff <- ( 000000 , fffffff ) + +[21,24]: + int 000000ffffff <- ( 000000 , ffffff ) + +[21,23]: + int 0000007fffff <- ( 000000 , ffffff ) + +[21,22]: + int 000003fffff <- ( 000000 , ffffff ) + +[21,21]: + int 000001fffff <- ( 000000 , ffffff ) + +[21,20]: + int 000000fffff <- ( 000000 , fffff ) + +[21,19]: + int 0000007ffff <- ( 000000 , fffff ) + +[21,18]: + int 000003ffff <- ( 000000 , fffff ) + +[21,17]: + int 000001ffff <- ( 000000 , fffff ) + +[21,16]: + int 000000ffff <- ( 000000 , ffff ) + +[21,15]: + int 0000007fff <- ( 000000 , ffff ) + +[21,14]: + int 000003fff <- ( 000000 , ffff ) + +[21,13]: + int 000001fff <- ( 000000 , ffff ) + +[21,12]: + int 000000fff <- ( 000000 , fff ) + +[21,11]: + int 0000007ff <- ( 000000 , fff ) + +[21,10]: + int 000003ff <- ( 000000 , fff ) + +[21,9]: + int 000001ff <- ( 000000 , fff ) + +[21,8]: + int 000000ff <- ( 000000 , ff ) + +[21,7]: + int 0000007f <- ( 000000 , ff ) + +[21,6]: + int 000003f <- ( 000000 , ff ) + +[21,5]: + int 000001f <- ( 000000 , ff ) + +[21,4]: + int 000000f <- ( 000000 , f ) + +[21,3]: + int 0000007 <- ( 000000 , f ) + +[21,2]: + int 000003 <- ( 000000 , f ) + +[21,1]: + int 000001 <- ( 000000 , f ) + +[20,64]: + int 000000ffffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[20,63]: + int 000007fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[20,62]: + int 000003fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[20,61]: + int 000001fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[20,60]: + int 000000fffffffffffffff <- ( 00000 , fffffffffffffff ) + +[20,59]: + int 000007ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[20,58]: + int 000003ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[20,57]: + int 000001ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[20,56]: + int 000000ffffffffffffff <- ( 00000 , ffffffffffffff ) + +[20,55]: + int 000007fffffffffffff <- ( 00000 , ffffffffffffff ) + +[20,54]: + int 000003fffffffffffff <- ( 00000 , ffffffffffffff ) + +[20,53]: + int 000001fffffffffffff <- ( 00000 , ffffffffffffff ) + +[20,52]: + int 000000fffffffffffff <- ( 00000 , fffffffffffff ) + +[20,51]: + int 000007ffffffffffff <- ( 00000 , fffffffffffff ) + +[20,50]: + int 000003ffffffffffff <- ( 00000 , fffffffffffff ) + +[20,49]: + int 000001ffffffffffff <- ( 00000 , fffffffffffff ) + +[20,48]: + int 000000ffffffffffff <- ( 00000 , ffffffffffff ) + +[20,47]: + int 000007fffffffffff <- ( 00000 , ffffffffffff ) + +[20,46]: + int 000003fffffffffff <- ( 00000 , ffffffffffff ) + +[20,45]: + int 000001fffffffffff <- ( 00000 , ffffffffffff ) + +[20,44]: + int 000000fffffffffff <- ( 00000 , fffffffffff ) + +[20,43]: + int 000007ffffffffff <- ( 00000 , fffffffffff ) + +[20,42]: + int 000003ffffffffff <- ( 00000 , fffffffffff ) + +[20,41]: + int 000001ffffffffff <- ( 00000 , fffffffffff ) + +[20,40]: + int 000000ffffffffff <- ( 00000 , ffffffffff ) + +[20,39]: + int 000007fffffffff <- ( 00000 , ffffffffff ) + +[20,38]: + int 000003fffffffff <- ( 00000 , ffffffffff ) + +[20,37]: + int 000001fffffffff <- ( 00000 , ffffffffff ) + +[20,36]: + int 000000fffffffff <- ( 00000 , fffffffff ) + +[20,35]: + int 000007ffffffff <- ( 00000 , fffffffff ) + +[20,34]: + int 000003ffffffff <- ( 00000 , fffffffff ) + +[20,33]: + int 000001ffffffff <- ( 00000 , fffffffff ) + +[20,32]: + int 000000ffffffff <- ( 00000 , ffffffff ) + +[20,31]: + int 000007fffffff <- ( 00000 , ffffffff ) + +[20,30]: + int 000003fffffff <- ( 00000 , ffffffff ) + +[20,29]: + int 000001fffffff <- ( 00000 , ffffffff ) + +[20,28]: + int 000000fffffff <- ( 00000 , fffffff ) + +[20,27]: + int 000007ffffff <- ( 00000 , fffffff ) + +[20,26]: + int 000003ffffff <- ( 00000 , fffffff ) + +[20,25]: + int 000001ffffff <- ( 00000 , fffffff ) + +[20,24]: + int 000000ffffff <- ( 00000 , ffffff ) + +[20,23]: + int 000007fffff <- ( 00000 , ffffff ) + +[20,22]: + int 000003fffff <- ( 00000 , ffffff ) + +[20,21]: + int 000001fffff <- ( 00000 , ffffff ) + +[20,20]: + int 000000fffff <- ( 00000 , fffff ) + +[20,19]: + int 000007ffff <- ( 00000 , fffff ) + +[20,18]: + int 000003ffff <- ( 00000 , fffff ) + +[20,17]: + int 000001ffff <- ( 00000 , fffff ) + +[20,16]: + int 000000ffff <- ( 00000 , ffff ) + +[20,15]: + int 000007fff <- ( 00000 , ffff ) + +[20,14]: + int 000003fff <- ( 00000 , ffff ) + +[20,13]: + int 000001fff <- ( 00000 , ffff ) + +[20,12]: + int 000000fff <- ( 00000 , fff ) + +[20,11]: + int 000007ff <- ( 00000 , fff ) + +[20,10]: + int 000003ff <- ( 00000 , fff ) + +[20,9]: + int 000001ff <- ( 00000 , fff ) + +[20,8]: + int 000000ff <- ( 00000 , ff ) + +[20,7]: + int 000007f <- ( 00000 , ff ) + +[20,6]: + int 000003f <- ( 00000 , ff ) + +[20,5]: + int 000001f <- ( 00000 , ff ) + +[20,4]: + int 000000f <- ( 00000 , f ) + +[20,3]: + int 000007 <- ( 00000 , f ) + +[20,2]: + int 000003 <- ( 00000 , f ) + +[20,1]: + int 000001 <- ( 00000 , f ) + +[19,64]: + int 00000ffffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[19,63]: + int 000007fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[19,62]: + int 000003fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[19,61]: + int 000001fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[19,60]: + int 00000fffffffffffffff <- ( 00000 , fffffffffffffff ) + +[19,59]: + int 000007ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[19,58]: + int 000003ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[19,57]: + int 000001ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[19,56]: + int 00000ffffffffffffff <- ( 00000 , ffffffffffffff ) + +[19,55]: + int 000007fffffffffffff <- ( 00000 , ffffffffffffff ) + +[19,54]: + int 000003fffffffffffff <- ( 00000 , ffffffffffffff ) + +[19,53]: + int 000001fffffffffffff <- ( 00000 , ffffffffffffff ) + +[19,52]: + int 00000fffffffffffff <- ( 00000 , fffffffffffff ) + +[19,51]: + int 000007ffffffffffff <- ( 00000 , fffffffffffff ) + +[19,50]: + int 000003ffffffffffff <- ( 00000 , fffffffffffff ) + +[19,49]: + int 000001ffffffffffff <- ( 00000 , fffffffffffff ) + +[19,48]: + int 00000ffffffffffff <- ( 00000 , ffffffffffff ) + +[19,47]: + int 000007fffffffffff <- ( 00000 , ffffffffffff ) + +[19,46]: + int 000003fffffffffff <- ( 00000 , ffffffffffff ) + +[19,45]: + int 000001fffffffffff <- ( 00000 , ffffffffffff ) + +[19,44]: + int 00000fffffffffff <- ( 00000 , fffffffffff ) + +[19,43]: + int 000007ffffffffff <- ( 00000 , fffffffffff ) + +[19,42]: + int 000003ffffffffff <- ( 00000 , fffffffffff ) + +[19,41]: + int 000001ffffffffff <- ( 00000 , fffffffffff ) + +[19,40]: + int 00000ffffffffff <- ( 00000 , ffffffffff ) + +[19,39]: + int 000007fffffffff <- ( 00000 , ffffffffff ) + +[19,38]: + int 000003fffffffff <- ( 00000 , ffffffffff ) + +[19,37]: + int 000001fffffffff <- ( 00000 , ffffffffff ) + +[19,36]: + int 00000fffffffff <- ( 00000 , fffffffff ) + +[19,35]: + int 000007ffffffff <- ( 00000 , fffffffff ) + +[19,34]: + int 000003ffffffff <- ( 00000 , fffffffff ) + +[19,33]: + int 000001ffffffff <- ( 00000 , fffffffff ) + +[19,32]: + int 00000ffffffff <- ( 00000 , ffffffff ) + +[19,31]: + int 000007fffffff <- ( 00000 , ffffffff ) + +[19,30]: + int 000003fffffff <- ( 00000 , ffffffff ) + +[19,29]: + int 000001fffffff <- ( 00000 , ffffffff ) + +[19,28]: + int 00000fffffff <- ( 00000 , fffffff ) + +[19,27]: + int 000007ffffff <- ( 00000 , fffffff ) + +[19,26]: + int 000003ffffff <- ( 00000 , fffffff ) + +[19,25]: + int 000001ffffff <- ( 00000 , fffffff ) + +[19,24]: + int 00000ffffff <- ( 00000 , ffffff ) + +[19,23]: + int 000007fffff <- ( 00000 , ffffff ) + +[19,22]: + int 000003fffff <- ( 00000 , ffffff ) + +[19,21]: + int 000001fffff <- ( 00000 , ffffff ) + +[19,20]: + int 00000fffff <- ( 00000 , fffff ) + +[19,19]: + int 000007ffff <- ( 00000 , fffff ) + +[19,18]: + int 000003ffff <- ( 00000 , fffff ) + +[19,17]: + int 000001ffff <- ( 00000 , fffff ) + +[19,16]: + int 00000ffff <- ( 00000 , ffff ) + +[19,15]: + int 000007fff <- ( 00000 , ffff ) + +[19,14]: + int 000003fff <- ( 00000 , ffff ) + +[19,13]: + int 000001fff <- ( 00000 , ffff ) + +[19,12]: + int 00000fff <- ( 00000 , fff ) + +[19,11]: + int 000007ff <- ( 00000 , fff ) + +[19,10]: + int 000003ff <- ( 00000 , fff ) + +[19,9]: + int 000001ff <- ( 00000 , fff ) + +[19,8]: + int 00000ff <- ( 00000 , ff ) + +[19,7]: + int 000007f <- ( 00000 , ff ) + +[19,6]: + int 000003f <- ( 00000 , ff ) + +[19,5]: + int 000001f <- ( 00000 , ff ) + +[19,4]: + int 00000f <- ( 00000 , f ) + +[19,3]: + int 000007 <- ( 00000 , f ) + +[19,2]: + int 000003 <- ( 00000 , f ) + +[19,1]: + int 000001 <- ( 00000 , f ) + +[18,64]: + int 00000ffffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[18,63]: + int 000007fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[18,62]: + int 000003fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[18,61]: + int 00001fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[18,60]: + int 00000fffffffffffffff <- ( 00000 , fffffffffffffff ) + +[18,59]: + int 000007ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[18,58]: + int 000003ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[18,57]: + int 00001ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[18,56]: + int 00000ffffffffffffff <- ( 00000 , ffffffffffffff ) + +[18,55]: + int 000007fffffffffffff <- ( 00000 , ffffffffffffff ) + +[18,54]: + int 000003fffffffffffff <- ( 00000 , ffffffffffffff ) + +[18,53]: + int 00001fffffffffffff <- ( 00000 , ffffffffffffff ) + +[18,52]: + int 00000fffffffffffff <- ( 00000 , fffffffffffff ) + +[18,51]: + int 000007ffffffffffff <- ( 00000 , fffffffffffff ) + +[18,50]: + int 000003ffffffffffff <- ( 00000 , fffffffffffff ) + +[18,49]: + int 00001ffffffffffff <- ( 00000 , fffffffffffff ) + +[18,48]: + int 00000ffffffffffff <- ( 00000 , ffffffffffff ) + +[18,47]: + int 000007fffffffffff <- ( 00000 , ffffffffffff ) + +[18,46]: + int 000003fffffffffff <- ( 00000 , ffffffffffff ) + +[18,45]: + int 00001fffffffffff <- ( 00000 , ffffffffffff ) + +[18,44]: + int 00000fffffffffff <- ( 00000 , fffffffffff ) + +[18,43]: + int 000007ffffffffff <- ( 00000 , fffffffffff ) + +[18,42]: + int 000003ffffffffff <- ( 00000 , fffffffffff ) + +[18,41]: + int 00001ffffffffff <- ( 00000 , fffffffffff ) + +[18,40]: + int 00000ffffffffff <- ( 00000 , ffffffffff ) + +[18,39]: + int 000007fffffffff <- ( 00000 , ffffffffff ) + +[18,38]: + int 000003fffffffff <- ( 00000 , ffffffffff ) + +[18,37]: + int 00001fffffffff <- ( 00000 , ffffffffff ) + +[18,36]: + int 00000fffffffff <- ( 00000 , fffffffff ) + +[18,35]: + int 000007ffffffff <- ( 00000 , fffffffff ) + +[18,34]: + int 000003ffffffff <- ( 00000 , fffffffff ) + +[18,33]: + int 00001ffffffff <- ( 00000 , fffffffff ) + +[18,32]: + int 00000ffffffff <- ( 00000 , ffffffff ) + +[18,31]: + int 000007fffffff <- ( 00000 , ffffffff ) + +[18,30]: + int 000003fffffff <- ( 00000 , ffffffff ) + +[18,29]: + int 00001fffffff <- ( 00000 , ffffffff ) + +[18,28]: + int 00000fffffff <- ( 00000 , fffffff ) + +[18,27]: + int 000007ffffff <- ( 00000 , fffffff ) + +[18,26]: + int 000003ffffff <- ( 00000 , fffffff ) + +[18,25]: + int 00001ffffff <- ( 00000 , fffffff ) + +[18,24]: + int 00000ffffff <- ( 00000 , ffffff ) + +[18,23]: + int 000007fffff <- ( 00000 , ffffff ) + +[18,22]: + int 000003fffff <- ( 00000 , ffffff ) + +[18,21]: + int 00001fffff <- ( 00000 , ffffff ) + +[18,20]: + int 00000fffff <- ( 00000 , fffff ) + +[18,19]: + int 000007ffff <- ( 00000 , fffff ) + +[18,18]: + int 000003ffff <- ( 00000 , fffff ) + +[18,17]: + int 00001ffff <- ( 00000 , fffff ) + +[18,16]: + int 00000ffff <- ( 00000 , ffff ) + +[18,15]: + int 000007fff <- ( 00000 , ffff ) + +[18,14]: + int 000003fff <- ( 00000 , ffff ) + +[18,13]: + int 00001fff <- ( 00000 , ffff ) + +[18,12]: + int 00000fff <- ( 00000 , fff ) + +[18,11]: + int 000007ff <- ( 00000 , fff ) + +[18,10]: + int 000003ff <- ( 00000 , fff ) + +[18,9]: + int 00001ff <- ( 00000 , fff ) + +[18,8]: + int 00000ff <- ( 00000 , ff ) + +[18,7]: + int 000007f <- ( 00000 , ff ) + +[18,6]: + int 000003f <- ( 00000 , ff ) + +[18,5]: + int 00001f <- ( 00000 , ff ) + +[18,4]: + int 00000f <- ( 00000 , f ) + +[18,3]: + int 000007 <- ( 00000 , f ) + +[18,2]: + int 000003 <- ( 00000 , f ) + +[18,1]: + int 00001 <- ( 00000 , f ) + +[17,64]: + int 00000ffffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[17,63]: + int 000007fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[17,62]: + int 00003fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[17,61]: + int 00001fffffffffffffff <- ( 00000 , ffffffffffffffff ) + +[17,60]: + int 00000fffffffffffffff <- ( 00000 , fffffffffffffff ) + +[17,59]: + int 000007ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[17,58]: + int 00003ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[17,57]: + int 00001ffffffffffffff <- ( 00000 , fffffffffffffff ) + +[17,56]: + int 00000ffffffffffffff <- ( 00000 , ffffffffffffff ) + +[17,55]: + int 000007fffffffffffff <- ( 00000 , ffffffffffffff ) + +[17,54]: + int 00003fffffffffffff <- ( 00000 , ffffffffffffff ) + +[17,53]: + int 00001fffffffffffff <- ( 00000 , ffffffffffffff ) + +[17,52]: + int 00000fffffffffffff <- ( 00000 , fffffffffffff ) + +[17,51]: + int 000007ffffffffffff <- ( 00000 , fffffffffffff ) + +[17,50]: + int 00003ffffffffffff <- ( 00000 , fffffffffffff ) + +[17,49]: + int 00001ffffffffffff <- ( 00000 , fffffffffffff ) + +[17,48]: + int 00000ffffffffffff <- ( 00000 , ffffffffffff ) + +[17,47]: + int 000007fffffffffff <- ( 00000 , ffffffffffff ) + +[17,46]: + int 00003fffffffffff <- ( 00000 , ffffffffffff ) + +[17,45]: + int 00001fffffffffff <- ( 00000 , ffffffffffff ) + +[17,44]: + int 00000fffffffffff <- ( 00000 , fffffffffff ) + +[17,43]: + int 000007ffffffffff <- ( 00000 , fffffffffff ) + +[17,42]: + int 00003ffffffffff <- ( 00000 , fffffffffff ) + +[17,41]: + int 00001ffffffffff <- ( 00000 , fffffffffff ) + +[17,40]: + int 00000ffffffffff <- ( 00000 , ffffffffff ) + +[17,39]: + int 000007fffffffff <- ( 00000 , ffffffffff ) + +[17,38]: + int 00003fffffffff <- ( 00000 , ffffffffff ) + +[17,37]: + int 00001fffffffff <- ( 00000 , ffffffffff ) + +[17,36]: + int 00000fffffffff <- ( 00000 , fffffffff ) + +[17,35]: + int 000007ffffffff <- ( 00000 , fffffffff ) + +[17,34]: + int 00003ffffffff <- ( 00000 , fffffffff ) + +[17,33]: + int 00001ffffffff <- ( 00000 , fffffffff ) + +[17,32]: + int 00000ffffffff <- ( 00000 , ffffffff ) + +[17,31]: + int 000007fffffff <- ( 00000 , ffffffff ) + +[17,30]: + int 00003fffffff <- ( 00000 , ffffffff ) + +[17,29]: + int 00001fffffff <- ( 00000 , ffffffff ) + +[17,28]: + int 00000fffffff <- ( 00000 , fffffff ) + +[17,27]: + int 000007ffffff <- ( 00000 , fffffff ) + +[17,26]: + int 00003ffffff <- ( 00000 , fffffff ) + +[17,25]: + int 00001ffffff <- ( 00000 , fffffff ) + +[17,24]: + int 00000ffffff <- ( 00000 , ffffff ) + +[17,23]: + int 000007fffff <- ( 00000 , ffffff ) + +[17,22]: + int 00003fffff <- ( 00000 , ffffff ) + +[17,21]: + int 00001fffff <- ( 00000 , ffffff ) + +[17,20]: + int 00000fffff <- ( 00000 , fffff ) + +[17,19]: + int 000007ffff <- ( 00000 , fffff ) + +[17,18]: + int 00003ffff <- ( 00000 , fffff ) + +[17,17]: + int 00001ffff <- ( 00000 , fffff ) + +[17,16]: + int 00000ffff <- ( 00000 , ffff ) + +[17,15]: + int 000007fff <- ( 00000 , ffff ) + +[17,14]: + int 00003fff <- ( 00000 , ffff ) + +[17,13]: + int 00001fff <- ( 00000 , ffff ) + +[17,12]: + int 00000fff <- ( 00000 , fff ) + +[17,11]: + int 000007ff <- ( 00000 , fff ) + +[17,10]: + int 00003ff <- ( 00000 , fff ) + +[17,9]: + int 00001ff <- ( 00000 , fff ) + +[17,8]: + int 00000ff <- ( 00000 , ff ) + +[17,7]: + int 000007f <- ( 00000 , ff ) + +[17,6]: + int 00003f <- ( 00000 , ff ) + +[17,5]: + int 00001f <- ( 00000 , ff ) + +[17,4]: + int 00000f <- ( 00000 , f ) + +[17,3]: + int 000007 <- ( 00000 , f ) + +[17,2]: + int 00003 <- ( 00000 , f ) + +[17,1]: + int 00001 <- ( 00000 , f ) + +[16,64]: + int 00000ffffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[16,63]: + int 00007fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[16,62]: + int 00003fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[16,61]: + int 00001fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[16,60]: + int 00000fffffffffffffff <- ( 0000 , fffffffffffffff ) + +[16,59]: + int 00007ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[16,58]: + int 00003ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[16,57]: + int 00001ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[16,56]: + int 00000ffffffffffffff <- ( 0000 , ffffffffffffff ) + +[16,55]: + int 00007fffffffffffff <- ( 0000 , ffffffffffffff ) + +[16,54]: + int 00003fffffffffffff <- ( 0000 , ffffffffffffff ) + +[16,53]: + int 00001fffffffffffff <- ( 0000 , ffffffffffffff ) + +[16,52]: + int 00000fffffffffffff <- ( 0000 , fffffffffffff ) + +[16,51]: + int 00007ffffffffffff <- ( 0000 , fffffffffffff ) + +[16,50]: + int 00003ffffffffffff <- ( 0000 , fffffffffffff ) + +[16,49]: + int 00001ffffffffffff <- ( 0000 , fffffffffffff ) + +[16,48]: + int 00000ffffffffffff <- ( 0000 , ffffffffffff ) + +[16,47]: + int 00007fffffffffff <- ( 0000 , ffffffffffff ) + +[16,46]: + int 00003fffffffffff <- ( 0000 , ffffffffffff ) + +[16,45]: + int 00001fffffffffff <- ( 0000 , ffffffffffff ) + +[16,44]: + int 00000fffffffffff <- ( 0000 , fffffffffff ) + +[16,43]: + int 00007ffffffffff <- ( 0000 , fffffffffff ) + +[16,42]: + int 00003ffffffffff <- ( 0000 , fffffffffff ) + +[16,41]: + int 00001ffffffffff <- ( 0000 , fffffffffff ) + +[16,40]: + int 00000ffffffffff <- ( 0000 , ffffffffff ) + +[16,39]: + int 00007fffffffff <- ( 0000 , ffffffffff ) + +[16,38]: + int 00003fffffffff <- ( 0000 , ffffffffff ) + +[16,37]: + int 00001fffffffff <- ( 0000 , ffffffffff ) + +[16,36]: + int 00000fffffffff <- ( 0000 , fffffffff ) + +[16,35]: + int 00007ffffffff <- ( 0000 , fffffffff ) + +[16,34]: + int 00003ffffffff <- ( 0000 , fffffffff ) + +[16,33]: + int 00001ffffffff <- ( 0000 , fffffffff ) + +[16,32]: + int 00000ffffffff <- ( 0000 , ffffffff ) + +[16,31]: + int 00007fffffff <- ( 0000 , ffffffff ) + +[16,30]: + int 00003fffffff <- ( 0000 , ffffffff ) + +[16,29]: + int 00001fffffff <- ( 0000 , ffffffff ) + +[16,28]: + int 00000fffffff <- ( 0000 , fffffff ) + +[16,27]: + int 00007ffffff <- ( 0000 , fffffff ) + +[16,26]: + int 00003ffffff <- ( 0000 , fffffff ) + +[16,25]: + int 00001ffffff <- ( 0000 , fffffff ) + +[16,24]: + int 00000ffffff <- ( 0000 , ffffff ) + +[16,23]: + int 00007fffff <- ( 0000 , ffffff ) + +[16,22]: + int 00003fffff <- ( 0000 , ffffff ) + +[16,21]: + int 00001fffff <- ( 0000 , ffffff ) + +[16,20]: + int 00000fffff <- ( 0000 , fffff ) + +[16,19]: + int 00007ffff <- ( 0000 , fffff ) + +[16,18]: + int 00003ffff <- ( 0000 , fffff ) + +[16,17]: + int 00001ffff <- ( 0000 , fffff ) + +[16,16]: + int 00000ffff <- ( 0000 , ffff ) + +[16,15]: + int 00007fff <- ( 0000 , ffff ) + +[16,14]: + int 00003fff <- ( 0000 , ffff ) + +[16,13]: + int 00001fff <- ( 0000 , ffff ) + +[16,12]: + int 00000fff <- ( 0000 , fff ) + +[16,11]: + int 00007ff <- ( 0000 , fff ) + +[16,10]: + int 00003ff <- ( 0000 , fff ) + +[16,9]: + int 00001ff <- ( 0000 , fff ) + +[16,8]: + int 00000ff <- ( 0000 , ff ) + +[16,7]: + int 00007f <- ( 0000 , ff ) + +[16,6]: + int 00003f <- ( 0000 , ff ) + +[16,5]: + int 00001f <- ( 0000 , ff ) + +[16,4]: + int 00000f <- ( 0000 , f ) + +[16,3]: + int 00007 <- ( 0000 , f ) + +[16,2]: + int 00003 <- ( 0000 , f ) + +[16,1]: + int 00001 <- ( 0000 , f ) + +[15,64]: + int 0000ffffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[15,63]: + int 00007fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[15,62]: + int 00003fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[15,61]: + int 00001fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[15,60]: + int 0000fffffffffffffff <- ( 0000 , fffffffffffffff ) + +[15,59]: + int 00007ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[15,58]: + int 00003ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[15,57]: + int 00001ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[15,56]: + int 0000ffffffffffffff <- ( 0000 , ffffffffffffff ) + +[15,55]: + int 00007fffffffffffff <- ( 0000 , ffffffffffffff ) + +[15,54]: + int 00003fffffffffffff <- ( 0000 , ffffffffffffff ) + +[15,53]: + int 00001fffffffffffff <- ( 0000 , ffffffffffffff ) + +[15,52]: + int 0000fffffffffffff <- ( 0000 , fffffffffffff ) + +[15,51]: + int 00007ffffffffffff <- ( 0000 , fffffffffffff ) + +[15,50]: + int 00003ffffffffffff <- ( 0000 , fffffffffffff ) + +[15,49]: + int 00001ffffffffffff <- ( 0000 , fffffffffffff ) + +[15,48]: + int 0000ffffffffffff <- ( 0000 , ffffffffffff ) + +[15,47]: + int 00007fffffffffff <- ( 0000 , ffffffffffff ) + +[15,46]: + int 00003fffffffffff <- ( 0000 , ffffffffffff ) + +[15,45]: + int 00001fffffffffff <- ( 0000 , ffffffffffff ) + +[15,44]: + int 0000fffffffffff <- ( 0000 , fffffffffff ) + +[15,43]: + int 00007ffffffffff <- ( 0000 , fffffffffff ) + +[15,42]: + int 00003ffffffffff <- ( 0000 , fffffffffff ) + +[15,41]: + int 00001ffffffffff <- ( 0000 , fffffffffff ) + +[15,40]: + int 0000ffffffffff <- ( 0000 , ffffffffff ) + +[15,39]: + int 00007fffffffff <- ( 0000 , ffffffffff ) + +[15,38]: + int 00003fffffffff <- ( 0000 , ffffffffff ) + +[15,37]: + int 00001fffffffff <- ( 0000 , ffffffffff ) + +[15,36]: + int 0000fffffffff <- ( 0000 , fffffffff ) + +[15,35]: + int 00007ffffffff <- ( 0000 , fffffffff ) + +[15,34]: + int 00003ffffffff <- ( 0000 , fffffffff ) + +[15,33]: + int 00001ffffffff <- ( 0000 , fffffffff ) + +[15,32]: + int 0000ffffffff <- ( 0000 , ffffffff ) + +[15,31]: + int 00007fffffff <- ( 0000 , ffffffff ) + +[15,30]: + int 00003fffffff <- ( 0000 , ffffffff ) + +[15,29]: + int 00001fffffff <- ( 0000 , ffffffff ) + +[15,28]: + int 0000fffffff <- ( 0000 , fffffff ) + +[15,27]: + int 00007ffffff <- ( 0000 , fffffff ) + +[15,26]: + int 00003ffffff <- ( 0000 , fffffff ) + +[15,25]: + int 00001ffffff <- ( 0000 , fffffff ) + +[15,24]: + int 0000ffffff <- ( 0000 , ffffff ) + +[15,23]: + int 00007fffff <- ( 0000 , ffffff ) + +[15,22]: + int 00003fffff <- ( 0000 , ffffff ) + +[15,21]: + int 00001fffff <- ( 0000 , ffffff ) + +[15,20]: + int 0000fffff <- ( 0000 , fffff ) + +[15,19]: + int 00007ffff <- ( 0000 , fffff ) + +[15,18]: + int 00003ffff <- ( 0000 , fffff ) + +[15,17]: + int 00001ffff <- ( 0000 , fffff ) + +[15,16]: + int 0000ffff <- ( 0000 , ffff ) + +[15,15]: + int 00007fff <- ( 0000 , ffff ) + +[15,14]: + int 00003fff <- ( 0000 , ffff ) + +[15,13]: + int 00001fff <- ( 0000 , ffff ) + +[15,12]: + int 0000fff <- ( 0000 , fff ) + +[15,11]: + int 00007ff <- ( 0000 , fff ) + +[15,10]: + int 00003ff <- ( 0000 , fff ) + +[15,9]: + int 00001ff <- ( 0000 , fff ) + +[15,8]: + int 0000ff <- ( 0000 , ff ) + +[15,7]: + int 00007f <- ( 0000 , ff ) + +[15,6]: + int 00003f <- ( 0000 , ff ) + +[15,5]: + int 00001f <- ( 0000 , ff ) + +[15,4]: + int 0000f <- ( 0000 , f ) + +[15,3]: + int 00007 <- ( 0000 , f ) + +[15,2]: + int 00003 <- ( 0000 , f ) + +[15,1]: + int 00001 <- ( 0000 , f ) + +[14,64]: + int 0000ffffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[14,63]: + int 00007fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[14,62]: + int 00003fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[14,61]: + int 0001fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[14,60]: + int 0000fffffffffffffff <- ( 0000 , fffffffffffffff ) + +[14,59]: + int 00007ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[14,58]: + int 00003ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[14,57]: + int 0001ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[14,56]: + int 0000ffffffffffffff <- ( 0000 , ffffffffffffff ) + +[14,55]: + int 00007fffffffffffff <- ( 0000 , ffffffffffffff ) + +[14,54]: + int 00003fffffffffffff <- ( 0000 , ffffffffffffff ) + +[14,53]: + int 0001fffffffffffff <- ( 0000 , ffffffffffffff ) + +[14,52]: + int 0000fffffffffffff <- ( 0000 , fffffffffffff ) + +[14,51]: + int 00007ffffffffffff <- ( 0000 , fffffffffffff ) + +[14,50]: + int 00003ffffffffffff <- ( 0000 , fffffffffffff ) + +[14,49]: + int 0001ffffffffffff <- ( 0000 , fffffffffffff ) + +[14,48]: + int 0000ffffffffffff <- ( 0000 , ffffffffffff ) + +[14,47]: + int 00007fffffffffff <- ( 0000 , ffffffffffff ) + +[14,46]: + int 00003fffffffffff <- ( 0000 , ffffffffffff ) + +[14,45]: + int 0001fffffffffff <- ( 0000 , ffffffffffff ) + +[14,44]: + int 0000fffffffffff <- ( 0000 , fffffffffff ) + +[14,43]: + int 00007ffffffffff <- ( 0000 , fffffffffff ) + +[14,42]: + int 00003ffffffffff <- ( 0000 , fffffffffff ) + +[14,41]: + int 0001ffffffffff <- ( 0000 , fffffffffff ) + +[14,40]: + int 0000ffffffffff <- ( 0000 , ffffffffff ) + +[14,39]: + int 00007fffffffff <- ( 0000 , ffffffffff ) + +[14,38]: + int 00003fffffffff <- ( 0000 , ffffffffff ) + +[14,37]: + int 0001fffffffff <- ( 0000 , ffffffffff ) + +[14,36]: + int 0000fffffffff <- ( 0000 , fffffffff ) + +[14,35]: + int 00007ffffffff <- ( 0000 , fffffffff ) + +[14,34]: + int 00003ffffffff <- ( 0000 , fffffffff ) + +[14,33]: + int 0001ffffffff <- ( 0000 , fffffffff ) + +[14,32]: + int 0000ffffffff <- ( 0000 , ffffffff ) + +[14,31]: + int 00007fffffff <- ( 0000 , ffffffff ) + +[14,30]: + int 00003fffffff <- ( 0000 , ffffffff ) + +[14,29]: + int 0001fffffff <- ( 0000 , ffffffff ) + +[14,28]: + int 0000fffffff <- ( 0000 , fffffff ) + +[14,27]: + int 00007ffffff <- ( 0000 , fffffff ) + +[14,26]: + int 00003ffffff <- ( 0000 , fffffff ) + +[14,25]: + int 0001ffffff <- ( 0000 , fffffff ) + +[14,24]: + int 0000ffffff <- ( 0000 , ffffff ) + +[14,23]: + int 00007fffff <- ( 0000 , ffffff ) + +[14,22]: + int 00003fffff <- ( 0000 , ffffff ) + +[14,21]: + int 0001fffff <- ( 0000 , ffffff ) + +[14,20]: + int 0000fffff <- ( 0000 , fffff ) + +[14,19]: + int 00007ffff <- ( 0000 , fffff ) + +[14,18]: + int 00003ffff <- ( 0000 , fffff ) + +[14,17]: + int 0001ffff <- ( 0000 , fffff ) + +[14,16]: + int 0000ffff <- ( 0000 , ffff ) + +[14,15]: + int 00007fff <- ( 0000 , ffff ) + +[14,14]: + int 00003fff <- ( 0000 , ffff ) + +[14,13]: + int 0001fff <- ( 0000 , ffff ) + +[14,12]: + int 0000fff <- ( 0000 , fff ) + +[14,11]: + int 00007ff <- ( 0000 , fff ) + +[14,10]: + int 00003ff <- ( 0000 , fff ) + +[14,9]: + int 0001ff <- ( 0000 , fff ) + +[14,8]: + int 0000ff <- ( 0000 , ff ) + +[14,7]: + int 00007f <- ( 0000 , ff ) + +[14,6]: + int 00003f <- ( 0000 , ff ) + +[14,5]: + int 0001f <- ( 0000 , ff ) + +[14,4]: + int 0000f <- ( 0000 , f ) + +[14,3]: + int 00007 <- ( 0000 , f ) + +[14,2]: + int 00003 <- ( 0000 , f ) + +[14,1]: + int 0001 <- ( 0000 , f ) + +[13,64]: + int 0000ffffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[13,63]: + int 00007fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[13,62]: + int 0003fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[13,61]: + int 0001fffffffffffffff <- ( 0000 , ffffffffffffffff ) + +[13,60]: + int 0000fffffffffffffff <- ( 0000 , fffffffffffffff ) + +[13,59]: + int 00007ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[13,58]: + int 0003ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[13,57]: + int 0001ffffffffffffff <- ( 0000 , fffffffffffffff ) + +[13,56]: + int 0000ffffffffffffff <- ( 0000 , ffffffffffffff ) + +[13,55]: + int 00007fffffffffffff <- ( 0000 , ffffffffffffff ) + +[13,54]: + int 0003fffffffffffff <- ( 0000 , ffffffffffffff ) + +[13,53]: + int 0001fffffffffffff <- ( 0000 , ffffffffffffff ) + +[13,52]: + int 0000fffffffffffff <- ( 0000 , fffffffffffff ) + +[13,51]: + int 00007ffffffffffff <- ( 0000 , fffffffffffff ) + +[13,50]: + int 0003ffffffffffff <- ( 0000 , fffffffffffff ) + +[13,49]: + int 0001ffffffffffff <- ( 0000 , fffffffffffff ) + +[13,48]: + int 0000ffffffffffff <- ( 0000 , ffffffffffff ) + +[13,47]: + int 00007fffffffffff <- ( 0000 , ffffffffffff ) + +[13,46]: + int 0003fffffffffff <- ( 0000 , ffffffffffff ) + +[13,45]: + int 0001fffffffffff <- ( 0000 , ffffffffffff ) + +[13,44]: + int 0000fffffffffff <- ( 0000 , fffffffffff ) + +[13,43]: + int 00007ffffffffff <- ( 0000 , fffffffffff ) + +[13,42]: + int 0003ffffffffff <- ( 0000 , fffffffffff ) + +[13,41]: + int 0001ffffffffff <- ( 0000 , fffffffffff ) + +[13,40]: + int 0000ffffffffff <- ( 0000 , ffffffffff ) + +[13,39]: + int 00007fffffffff <- ( 0000 , ffffffffff ) + +[13,38]: + int 0003fffffffff <- ( 0000 , ffffffffff ) + +[13,37]: + int 0001fffffffff <- ( 0000 , ffffffffff ) + +[13,36]: + int 0000fffffffff <- ( 0000 , fffffffff ) + +[13,35]: + int 00007ffffffff <- ( 0000 , fffffffff ) + +[13,34]: + int 0003ffffffff <- ( 0000 , fffffffff ) + +[13,33]: + int 0001ffffffff <- ( 0000 , fffffffff ) + +[13,32]: + int 0000ffffffff <- ( 0000 , ffffffff ) + +[13,31]: + int 00007fffffff <- ( 0000 , ffffffff ) + +[13,30]: + int 0003fffffff <- ( 0000 , ffffffff ) + +[13,29]: + int 0001fffffff <- ( 0000 , ffffffff ) + +[13,28]: + int 0000fffffff <- ( 0000 , fffffff ) + +[13,27]: + int 00007ffffff <- ( 0000 , fffffff ) + +[13,26]: + int 0003ffffff <- ( 0000 , fffffff ) + +[13,25]: + int 0001ffffff <- ( 0000 , fffffff ) + +[13,24]: + int 0000ffffff <- ( 0000 , ffffff ) + +[13,23]: + int 00007fffff <- ( 0000 , ffffff ) + +[13,22]: + int 0003fffff <- ( 0000 , ffffff ) + +[13,21]: + int 0001fffff <- ( 0000 , ffffff ) + +[13,20]: + int 0000fffff <- ( 0000 , fffff ) + +[13,19]: + int 00007ffff <- ( 0000 , fffff ) + +[13,18]: + int 0003ffff <- ( 0000 , fffff ) + +[13,17]: + int 0001ffff <- ( 0000 , fffff ) + +[13,16]: + int 0000ffff <- ( 0000 , ffff ) + +[13,15]: + int 00007fff <- ( 0000 , ffff ) + +[13,14]: + int 0003fff <- ( 0000 , ffff ) + +[13,13]: + int 0001fff <- ( 0000 , ffff ) + +[13,12]: + int 0000fff <- ( 0000 , fff ) + +[13,11]: + int 00007ff <- ( 0000 , fff ) + +[13,10]: + int 0003ff <- ( 0000 , fff ) + +[13,9]: + int 0001ff <- ( 0000 , fff ) + +[13,8]: + int 0000ff <- ( 0000 , ff ) + +[13,7]: + int 00007f <- ( 0000 , ff ) + +[13,6]: + int 0003f <- ( 0000 , ff ) + +[13,5]: + int 0001f <- ( 0000 , ff ) + +[13,4]: + int 0000f <- ( 0000 , f ) + +[13,3]: + int 00007 <- ( 0000 , f ) + +[13,2]: + int 0003 <- ( 0000 , f ) + +[13,1]: + int 0001 <- ( 0000 , f ) + +[12,64]: + int 0000ffffffffffffffff <- ( 000 , ffffffffffffffff ) + +[12,63]: + int 0007fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[12,62]: + int 0003fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[12,61]: + int 0001fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[12,60]: + int 0000fffffffffffffff <- ( 000 , fffffffffffffff ) + +[12,59]: + int 0007ffffffffffffff <- ( 000 , fffffffffffffff ) + +[12,58]: + int 0003ffffffffffffff <- ( 000 , fffffffffffffff ) + +[12,57]: + int 0001ffffffffffffff <- ( 000 , fffffffffffffff ) + +[12,56]: + int 0000ffffffffffffff <- ( 000 , ffffffffffffff ) + +[12,55]: + int 0007fffffffffffff <- ( 000 , ffffffffffffff ) + +[12,54]: + int 0003fffffffffffff <- ( 000 , ffffffffffffff ) + +[12,53]: + int 0001fffffffffffff <- ( 000 , ffffffffffffff ) + +[12,52]: + int 0000fffffffffffff <- ( 000 , fffffffffffff ) + +[12,51]: + int 0007ffffffffffff <- ( 000 , fffffffffffff ) + +[12,50]: + int 0003ffffffffffff <- ( 000 , fffffffffffff ) + +[12,49]: + int 0001ffffffffffff <- ( 000 , fffffffffffff ) + +[12,48]: + int 0000ffffffffffff <- ( 000 , ffffffffffff ) + +[12,47]: + int 0007fffffffffff <- ( 000 , ffffffffffff ) + +[12,46]: + int 0003fffffffffff <- ( 000 , ffffffffffff ) + +[12,45]: + int 0001fffffffffff <- ( 000 , ffffffffffff ) + +[12,44]: + int 0000fffffffffff <- ( 000 , fffffffffff ) + +[12,43]: + int 0007ffffffffff <- ( 000 , fffffffffff ) + +[12,42]: + int 0003ffffffffff <- ( 000 , fffffffffff ) + +[12,41]: + int 0001ffffffffff <- ( 000 , fffffffffff ) + +[12,40]: + int 0000ffffffffff <- ( 000 , ffffffffff ) + +[12,39]: + int 0007fffffffff <- ( 000 , ffffffffff ) + +[12,38]: + int 0003fffffffff <- ( 000 , ffffffffff ) + +[12,37]: + int 0001fffffffff <- ( 000 , ffffffffff ) + +[12,36]: + int 0000fffffffff <- ( 000 , fffffffff ) + +[12,35]: + int 0007ffffffff <- ( 000 , fffffffff ) + +[12,34]: + int 0003ffffffff <- ( 000 , fffffffff ) + +[12,33]: + int 0001ffffffff <- ( 000 , fffffffff ) + +[12,32]: + int 0000ffffffff <- ( 000 , ffffffff ) + +[12,31]: + int 0007fffffff <- ( 000 , ffffffff ) + +[12,30]: + int 0003fffffff <- ( 000 , ffffffff ) + +[12,29]: + int 0001fffffff <- ( 000 , ffffffff ) + +[12,28]: + int 0000fffffff <- ( 000 , fffffff ) + +[12,27]: + int 0007ffffff <- ( 000 , fffffff ) + +[12,26]: + int 0003ffffff <- ( 000 , fffffff ) + +[12,25]: + int 0001ffffff <- ( 000 , fffffff ) + +[12,24]: + int 0000ffffff <- ( 000 , ffffff ) + +[12,23]: + int 0007fffff <- ( 000 , ffffff ) + +[12,22]: + int 0003fffff <- ( 000 , ffffff ) + +[12,21]: + int 0001fffff <- ( 000 , ffffff ) + +[12,20]: + int 0000fffff <- ( 000 , fffff ) + +[12,19]: + int 0007ffff <- ( 000 , fffff ) + +[12,18]: + int 0003ffff <- ( 000 , fffff ) + +[12,17]: + int 0001ffff <- ( 000 , fffff ) + +[12,16]: + int 0000ffff <- ( 000 , ffff ) + +[12,15]: + int 0007fff <- ( 000 , ffff ) + +[12,14]: + int 0003fff <- ( 000 , ffff ) + +[12,13]: + int 0001fff <- ( 000 , ffff ) + +[12,12]: + int 0000fff <- ( 000 , fff ) + +[12,11]: + int 0007ff <- ( 000 , fff ) + +[12,10]: + int 0003ff <- ( 000 , fff ) + +[12,9]: + int 0001ff <- ( 000 , fff ) + +[12,8]: + int 0000ff <- ( 000 , ff ) + +[12,7]: + int 0007f <- ( 000 , ff ) + +[12,6]: + int 0003f <- ( 000 , ff ) + +[12,5]: + int 0001f <- ( 000 , ff ) + +[12,4]: + int 0000f <- ( 000 , f ) + +[12,3]: + int 0007 <- ( 000 , f ) + +[12,2]: + int 0003 <- ( 000 , f ) + +[12,1]: + int 0001 <- ( 000 , f ) + +[11,64]: + int 000ffffffffffffffff <- ( 000 , ffffffffffffffff ) + +[11,63]: + int 0007fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[11,62]: + int 0003fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[11,61]: + int 0001fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[11,60]: + int 000fffffffffffffff <- ( 000 , fffffffffffffff ) + +[11,59]: + int 0007ffffffffffffff <- ( 000 , fffffffffffffff ) + +[11,58]: + int 0003ffffffffffffff <- ( 000 , fffffffffffffff ) + +[11,57]: + int 0001ffffffffffffff <- ( 000 , fffffffffffffff ) + +[11,56]: + int 000ffffffffffffff <- ( 000 , ffffffffffffff ) + +[11,55]: + int 0007fffffffffffff <- ( 000 , ffffffffffffff ) + +[11,54]: + int 0003fffffffffffff <- ( 000 , ffffffffffffff ) + +[11,53]: + int 0001fffffffffffff <- ( 000 , ffffffffffffff ) + +[11,52]: + int 000fffffffffffff <- ( 000 , fffffffffffff ) + +[11,51]: + int 0007ffffffffffff <- ( 000 , fffffffffffff ) + +[11,50]: + int 0003ffffffffffff <- ( 000 , fffffffffffff ) + +[11,49]: + int 0001ffffffffffff <- ( 000 , fffffffffffff ) + +[11,48]: + int 000ffffffffffff <- ( 000 , ffffffffffff ) + +[11,47]: + int 0007fffffffffff <- ( 000 , ffffffffffff ) + +[11,46]: + int 0003fffffffffff <- ( 000 , ffffffffffff ) + +[11,45]: + int 0001fffffffffff <- ( 000 , ffffffffffff ) + +[11,44]: + int 000fffffffffff <- ( 000 , fffffffffff ) + +[11,43]: + int 0007ffffffffff <- ( 000 , fffffffffff ) + +[11,42]: + int 0003ffffffffff <- ( 000 , fffffffffff ) + +[11,41]: + int 0001ffffffffff <- ( 000 , fffffffffff ) + +[11,40]: + int 000ffffffffff <- ( 000 , ffffffffff ) + +[11,39]: + int 0007fffffffff <- ( 000 , ffffffffff ) + +[11,38]: + int 0003fffffffff <- ( 000 , ffffffffff ) + +[11,37]: + int 0001fffffffff <- ( 000 , ffffffffff ) + +[11,36]: + int 000fffffffff <- ( 000 , fffffffff ) + +[11,35]: + int 0007ffffffff <- ( 000 , fffffffff ) + +[11,34]: + int 0003ffffffff <- ( 000 , fffffffff ) + +[11,33]: + int 0001ffffffff <- ( 000 , fffffffff ) + +[11,32]: + int 000ffffffff <- ( 000 , ffffffff ) + +[11,31]: + int 0007fffffff <- ( 000 , ffffffff ) + +[11,30]: + int 0003fffffff <- ( 000 , ffffffff ) + +[11,29]: + int 0001fffffff <- ( 000 , ffffffff ) + +[11,28]: + int 000fffffff <- ( 000 , fffffff ) + +[11,27]: + int 0007ffffff <- ( 000 , fffffff ) + +[11,26]: + int 0003ffffff <- ( 000 , fffffff ) + +[11,25]: + int 0001ffffff <- ( 000 , fffffff ) + +[11,24]: + int 000ffffff <- ( 000 , ffffff ) + +[11,23]: + int 0007fffff <- ( 000 , ffffff ) + +[11,22]: + int 0003fffff <- ( 000 , ffffff ) + +[11,21]: + int 0001fffff <- ( 000 , ffffff ) + +[11,20]: + int 000fffff <- ( 000 , fffff ) + +[11,19]: + int 0007ffff <- ( 000 , fffff ) + +[11,18]: + int 0003ffff <- ( 000 , fffff ) + +[11,17]: + int 0001ffff <- ( 000 , fffff ) + +[11,16]: + int 000ffff <- ( 000 , ffff ) + +[11,15]: + int 0007fff <- ( 000 , ffff ) + +[11,14]: + int 0003fff <- ( 000 , ffff ) + +[11,13]: + int 0001fff <- ( 000 , ffff ) + +[11,12]: + int 000fff <- ( 000 , fff ) + +[11,11]: + int 0007ff <- ( 000 , fff ) + +[11,10]: + int 0003ff <- ( 000 , fff ) + +[11,9]: + int 0001ff <- ( 000 , fff ) + +[11,8]: + int 000ff <- ( 000 , ff ) + +[11,7]: + int 0007f <- ( 000 , ff ) + +[11,6]: + int 0003f <- ( 000 , ff ) + +[11,5]: + int 0001f <- ( 000 , ff ) + +[11,4]: + int 000f <- ( 000 , f ) + +[11,3]: + int 0007 <- ( 000 , f ) + +[11,2]: + int 0003 <- ( 000 , f ) + +[11,1]: + int 0001 <- ( 000 , f ) + +[10,64]: + int 000ffffffffffffffff <- ( 000 , ffffffffffffffff ) + +[10,63]: + int 0007fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[10,62]: + int 0003fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[10,61]: + int 001fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[10,60]: + int 000fffffffffffffff <- ( 000 , fffffffffffffff ) + +[10,59]: + int 0007ffffffffffffff <- ( 000 , fffffffffffffff ) + +[10,58]: + int 0003ffffffffffffff <- ( 000 , fffffffffffffff ) + +[10,57]: + int 001ffffffffffffff <- ( 000 , fffffffffffffff ) + +[10,56]: + int 000ffffffffffffff <- ( 000 , ffffffffffffff ) + +[10,55]: + int 0007fffffffffffff <- ( 000 , ffffffffffffff ) + +[10,54]: + int 0003fffffffffffff <- ( 000 , ffffffffffffff ) + +[10,53]: + int 001fffffffffffff <- ( 000 , ffffffffffffff ) + +[10,52]: + int 000fffffffffffff <- ( 000 , fffffffffffff ) + +[10,51]: + int 0007ffffffffffff <- ( 000 , fffffffffffff ) + +[10,50]: + int 0003ffffffffffff <- ( 000 , fffffffffffff ) + +[10,49]: + int 001ffffffffffff <- ( 000 , fffffffffffff ) + +[10,48]: + int 000ffffffffffff <- ( 000 , ffffffffffff ) + +[10,47]: + int 0007fffffffffff <- ( 000 , ffffffffffff ) + +[10,46]: + int 0003fffffffffff <- ( 000 , ffffffffffff ) + +[10,45]: + int 001fffffffffff <- ( 000 , ffffffffffff ) + +[10,44]: + int 000fffffffffff <- ( 000 , fffffffffff ) + +[10,43]: + int 0007ffffffffff <- ( 000 , fffffffffff ) + +[10,42]: + int 0003ffffffffff <- ( 000 , fffffffffff ) + +[10,41]: + int 001ffffffffff <- ( 000 , fffffffffff ) + +[10,40]: + int 000ffffffffff <- ( 000 , ffffffffff ) + +[10,39]: + int 0007fffffffff <- ( 000 , ffffffffff ) + +[10,38]: + int 0003fffffffff <- ( 000 , ffffffffff ) + +[10,37]: + int 001fffffffff <- ( 000 , ffffffffff ) + +[10,36]: + int 000fffffffff <- ( 000 , fffffffff ) + +[10,35]: + int 0007ffffffff <- ( 000 , fffffffff ) + +[10,34]: + int 0003ffffffff <- ( 000 , fffffffff ) + +[10,33]: + int 001ffffffff <- ( 000 , fffffffff ) + +[10,32]: + int 000ffffffff <- ( 000 , ffffffff ) + +[10,31]: + int 0007fffffff <- ( 000 , ffffffff ) + +[10,30]: + int 0003fffffff <- ( 000 , ffffffff ) + +[10,29]: + int 001fffffff <- ( 000 , ffffffff ) + +[10,28]: + int 000fffffff <- ( 000 , fffffff ) + +[10,27]: + int 0007ffffff <- ( 000 , fffffff ) + +[10,26]: + int 0003ffffff <- ( 000 , fffffff ) + +[10,25]: + int 001ffffff <- ( 000 , fffffff ) + +[10,24]: + int 000ffffff <- ( 000 , ffffff ) + +[10,23]: + int 0007fffff <- ( 000 , ffffff ) + +[10,22]: + int 0003fffff <- ( 000 , ffffff ) + +[10,21]: + int 001fffff <- ( 000 , ffffff ) + +[10,20]: + int 000fffff <- ( 000 , fffff ) + +[10,19]: + int 0007ffff <- ( 000 , fffff ) + +[10,18]: + int 0003ffff <- ( 000 , fffff ) + +[10,17]: + int 001ffff <- ( 000 , fffff ) + +[10,16]: + int 000ffff <- ( 000 , ffff ) + +[10,15]: + int 0007fff <- ( 000 , ffff ) + +[10,14]: + int 0003fff <- ( 000 , ffff ) + +[10,13]: + int 001fff <- ( 000 , ffff ) + +[10,12]: + int 000fff <- ( 000 , fff ) + +[10,11]: + int 0007ff <- ( 000 , fff ) + +[10,10]: + int 0003ff <- ( 000 , fff ) + +[10,9]: + int 001ff <- ( 000 , fff ) + +[10,8]: + int 000ff <- ( 000 , ff ) + +[10,7]: + int 0007f <- ( 000 , ff ) + +[10,6]: + int 0003f <- ( 000 , ff ) + +[10,5]: + int 001f <- ( 000 , ff ) + +[10,4]: + int 000f <- ( 000 , f ) + +[10,3]: + int 0007 <- ( 000 , f ) + +[10,2]: + int 0003 <- ( 000 , f ) + +[10,1]: + int 001 <- ( 000 , f ) + +[9,64]: + int 000ffffffffffffffff <- ( 000 , ffffffffffffffff ) + +[9,63]: + int 0007fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[9,62]: + int 003fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[9,61]: + int 001fffffffffffffff <- ( 000 , ffffffffffffffff ) + +[9,60]: + int 000fffffffffffffff <- ( 000 , fffffffffffffff ) + +[9,59]: + int 0007ffffffffffffff <- ( 000 , fffffffffffffff ) + +[9,58]: + int 003ffffffffffffff <- ( 000 , fffffffffffffff ) + +[9,57]: + int 001ffffffffffffff <- ( 000 , fffffffffffffff ) + +[9,56]: + int 000ffffffffffffff <- ( 000 , ffffffffffffff ) + +[9,55]: + int 0007fffffffffffff <- ( 000 , ffffffffffffff ) + +[9,54]: + int 003fffffffffffff <- ( 000 , ffffffffffffff ) + +[9,53]: + int 001fffffffffffff <- ( 000 , ffffffffffffff ) + +[9,52]: + int 000fffffffffffff <- ( 000 , fffffffffffff ) + +[9,51]: + int 0007ffffffffffff <- ( 000 , fffffffffffff ) + +[9,50]: + int 003ffffffffffff <- ( 000 , fffffffffffff ) + +[9,49]: + int 001ffffffffffff <- ( 000 , fffffffffffff ) + +[9,48]: + int 000ffffffffffff <- ( 000 , ffffffffffff ) + +[9,47]: + int 0007fffffffffff <- ( 000 , ffffffffffff ) + +[9,46]: + int 003fffffffffff <- ( 000 , ffffffffffff ) + +[9,45]: + int 001fffffffffff <- ( 000 , ffffffffffff ) + +[9,44]: + int 000fffffffffff <- ( 000 , fffffffffff ) + +[9,43]: + int 0007ffffffffff <- ( 000 , fffffffffff ) + +[9,42]: + int 003ffffffffff <- ( 000 , fffffffffff ) + +[9,41]: + int 001ffffffffff <- ( 000 , fffffffffff ) + +[9,40]: + int 000ffffffffff <- ( 000 , ffffffffff ) + +[9,39]: + int 0007fffffffff <- ( 000 , ffffffffff ) + +[9,38]: + int 003fffffffff <- ( 000 , ffffffffff ) + +[9,37]: + int 001fffffffff <- ( 000 , ffffffffff ) + +[9,36]: + int 000fffffffff <- ( 000 , fffffffff ) + +[9,35]: + int 0007ffffffff <- ( 000 , fffffffff ) + +[9,34]: + int 003ffffffff <- ( 000 , fffffffff ) + +[9,33]: + int 001ffffffff <- ( 000 , fffffffff ) + +[9,32]: + int 000ffffffff <- ( 000 , ffffffff ) + +[9,31]: + int 0007fffffff <- ( 000 , ffffffff ) + +[9,30]: + int 003fffffff <- ( 000 , ffffffff ) + +[9,29]: + int 001fffffff <- ( 000 , ffffffff ) + +[9,28]: + int 000fffffff <- ( 000 , fffffff ) + +[9,27]: + int 0007ffffff <- ( 000 , fffffff ) + +[9,26]: + int 003ffffff <- ( 000 , fffffff ) + +[9,25]: + int 001ffffff <- ( 000 , fffffff ) + +[9,24]: + int 000ffffff <- ( 000 , ffffff ) + +[9,23]: + int 0007fffff <- ( 000 , ffffff ) + +[9,22]: + int 003fffff <- ( 000 , ffffff ) + +[9,21]: + int 001fffff <- ( 000 , ffffff ) + +[9,20]: + int 000fffff <- ( 000 , fffff ) + +[9,19]: + int 0007ffff <- ( 000 , fffff ) + +[9,18]: + int 003ffff <- ( 000 , fffff ) + +[9,17]: + int 001ffff <- ( 000 , fffff ) + +[9,16]: + int 000ffff <- ( 000 , ffff ) + +[9,15]: + int 0007fff <- ( 000 , ffff ) + +[9,14]: + int 003fff <- ( 000 , ffff ) + +[9,13]: + int 001fff <- ( 000 , ffff ) + +[9,12]: + int 000fff <- ( 000 , fff ) + +[9,11]: + int 0007ff <- ( 000 , fff ) + +[9,10]: + int 003ff <- ( 000 , fff ) + +[9,9]: + int 001ff <- ( 000 , fff ) + +[9,8]: + int 000ff <- ( 000 , ff ) + +[9,7]: + int 0007f <- ( 000 , ff ) + +[9,6]: + int 003f <- ( 000 , ff ) + +[9,5]: + int 001f <- ( 000 , ff ) + +[9,4]: + int 000f <- ( 000 , f ) + +[9,3]: + int 0007 <- ( 000 , f ) + +[9,2]: + int 003 <- ( 000 , f ) + +[9,1]: + int 001 <- ( 000 , f ) + +[8,64]: + int 000ffffffffffffffff <- ( 00 , ffffffffffffffff ) + +[8,63]: + int 007fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[8,62]: + int 003fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[8,61]: + int 001fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[8,60]: + int 000fffffffffffffff <- ( 00 , fffffffffffffff ) + +[8,59]: + int 007ffffffffffffff <- ( 00 , fffffffffffffff ) + +[8,58]: + int 003ffffffffffffff <- ( 00 , fffffffffffffff ) + +[8,57]: + int 001ffffffffffffff <- ( 00 , fffffffffffffff ) + +[8,56]: + int 000ffffffffffffff <- ( 00 , ffffffffffffff ) + +[8,55]: + int 007fffffffffffff <- ( 00 , ffffffffffffff ) + +[8,54]: + int 003fffffffffffff <- ( 00 , ffffffffffffff ) + +[8,53]: + int 001fffffffffffff <- ( 00 , ffffffffffffff ) + +[8,52]: + int 000fffffffffffff <- ( 00 , fffffffffffff ) + +[8,51]: + int 007ffffffffffff <- ( 00 , fffffffffffff ) + +[8,50]: + int 003ffffffffffff <- ( 00 , fffffffffffff ) + +[8,49]: + int 001ffffffffffff <- ( 00 , fffffffffffff ) + +[8,48]: + int 000ffffffffffff <- ( 00 , ffffffffffff ) + +[8,47]: + int 007fffffffffff <- ( 00 , ffffffffffff ) + +[8,46]: + int 003fffffffffff <- ( 00 , ffffffffffff ) + +[8,45]: + int 001fffffffffff <- ( 00 , ffffffffffff ) + +[8,44]: + int 000fffffffffff <- ( 00 , fffffffffff ) + +[8,43]: + int 007ffffffffff <- ( 00 , fffffffffff ) + +[8,42]: + int 003ffffffffff <- ( 00 , fffffffffff ) + +[8,41]: + int 001ffffffffff <- ( 00 , fffffffffff ) + +[8,40]: + int 000ffffffffff <- ( 00 , ffffffffff ) + +[8,39]: + int 007fffffffff <- ( 00 , ffffffffff ) + +[8,38]: + int 003fffffffff <- ( 00 , ffffffffff ) + +[8,37]: + int 001fffffffff <- ( 00 , ffffffffff ) + +[8,36]: + int 000fffffffff <- ( 00 , fffffffff ) + +[8,35]: + int 007ffffffff <- ( 00 , fffffffff ) + +[8,34]: + int 003ffffffff <- ( 00 , fffffffff ) + +[8,33]: + int 001ffffffff <- ( 00 , fffffffff ) + +[8,32]: + int 000ffffffff <- ( 00 , ffffffff ) + +[8,31]: + int 007fffffff <- ( 00 , ffffffff ) + +[8,30]: + int 003fffffff <- ( 00 , ffffffff ) + +[8,29]: + int 001fffffff <- ( 00 , ffffffff ) + +[8,28]: + int 000fffffff <- ( 00 , fffffff ) + +[8,27]: + int 007ffffff <- ( 00 , fffffff ) + +[8,26]: + int 003ffffff <- ( 00 , fffffff ) + +[8,25]: + int 001ffffff <- ( 00 , fffffff ) + +[8,24]: + int 000ffffff <- ( 00 , ffffff ) + +[8,23]: + int 007fffff <- ( 00 , ffffff ) + +[8,22]: + int 003fffff <- ( 00 , ffffff ) + +[8,21]: + int 001fffff <- ( 00 , ffffff ) + +[8,20]: + int 000fffff <- ( 00 , fffff ) + +[8,19]: + int 007ffff <- ( 00 , fffff ) + +[8,18]: + int 003ffff <- ( 00 , fffff ) + +[8,17]: + int 001ffff <- ( 00 , fffff ) + +[8,16]: + int 000ffff <- ( 00 , ffff ) + +[8,15]: + int 007fff <- ( 00 , ffff ) + +[8,14]: + int 003fff <- ( 00 , ffff ) + +[8,13]: + int 001fff <- ( 00 , ffff ) + +[8,12]: + int 000fff <- ( 00 , fff ) + +[8,11]: + int 007ff <- ( 00 , fff ) + +[8,10]: + int 003ff <- ( 00 , fff ) + +[8,9]: + int 001ff <- ( 00 , fff ) + +[8,8]: + int 000ff <- ( 00 , ff ) + +[8,7]: + int 007f <- ( 00 , ff ) + +[8,6]: + int 003f <- ( 00 , ff ) + +[8,5]: + int 001f <- ( 00 , ff ) + +[8,4]: + int 000f <- ( 00 , f ) + +[8,3]: + int 007 <- ( 00 , f ) + +[8,2]: + int 003 <- ( 00 , f ) + +[8,1]: + int 001 <- ( 00 , f ) + +[7,64]: + int 00ffffffffffffffff <- ( 00 , ffffffffffffffff ) + +[7,63]: + int 007fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[7,62]: + int 003fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[7,61]: + int 001fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[7,60]: + int 00fffffffffffffff <- ( 00 , fffffffffffffff ) + +[7,59]: + int 007ffffffffffffff <- ( 00 , fffffffffffffff ) + +[7,58]: + int 003ffffffffffffff <- ( 00 , fffffffffffffff ) + +[7,57]: + int 001ffffffffffffff <- ( 00 , fffffffffffffff ) + +[7,56]: + int 00ffffffffffffff <- ( 00 , ffffffffffffff ) + +[7,55]: + int 007fffffffffffff <- ( 00 , ffffffffffffff ) + +[7,54]: + int 003fffffffffffff <- ( 00 , ffffffffffffff ) + +[7,53]: + int 001fffffffffffff <- ( 00 , ffffffffffffff ) + +[7,52]: + int 00fffffffffffff <- ( 00 , fffffffffffff ) + +[7,51]: + int 007ffffffffffff <- ( 00 , fffffffffffff ) + +[7,50]: + int 003ffffffffffff <- ( 00 , fffffffffffff ) + +[7,49]: + int 001ffffffffffff <- ( 00 , fffffffffffff ) + +[7,48]: + int 00ffffffffffff <- ( 00 , ffffffffffff ) + +[7,47]: + int 007fffffffffff <- ( 00 , ffffffffffff ) + +[7,46]: + int 003fffffffffff <- ( 00 , ffffffffffff ) + +[7,45]: + int 001fffffffffff <- ( 00 , ffffffffffff ) + +[7,44]: + int 00fffffffffff <- ( 00 , fffffffffff ) + +[7,43]: + int 007ffffffffff <- ( 00 , fffffffffff ) + +[7,42]: + int 003ffffffffff <- ( 00 , fffffffffff ) + +[7,41]: + int 001ffffffffff <- ( 00 , fffffffffff ) + +[7,40]: + int 00ffffffffff <- ( 00 , ffffffffff ) + +[7,39]: + int 007fffffffff <- ( 00 , ffffffffff ) + +[7,38]: + int 003fffffffff <- ( 00 , ffffffffff ) + +[7,37]: + int 001fffffffff <- ( 00 , ffffffffff ) + +[7,36]: + int 00fffffffff <- ( 00 , fffffffff ) + +[7,35]: + int 007ffffffff <- ( 00 , fffffffff ) + +[7,34]: + int 003ffffffff <- ( 00 , fffffffff ) + +[7,33]: + int 001ffffffff <- ( 00 , fffffffff ) + +[7,32]: + int 00ffffffff <- ( 00 , ffffffff ) + +[7,31]: + int 007fffffff <- ( 00 , ffffffff ) + +[7,30]: + int 003fffffff <- ( 00 , ffffffff ) + +[7,29]: + int 001fffffff <- ( 00 , ffffffff ) + +[7,28]: + int 00fffffff <- ( 00 , fffffff ) + +[7,27]: + int 007ffffff <- ( 00 , fffffff ) + +[7,26]: + int 003ffffff <- ( 00 , fffffff ) + +[7,25]: + int 001ffffff <- ( 00 , fffffff ) + +[7,24]: + int 00ffffff <- ( 00 , ffffff ) + +[7,23]: + int 007fffff <- ( 00 , ffffff ) + +[7,22]: + int 003fffff <- ( 00 , ffffff ) + +[7,21]: + int 001fffff <- ( 00 , ffffff ) + +[7,20]: + int 00fffff <- ( 00 , fffff ) + +[7,19]: + int 007ffff <- ( 00 , fffff ) + +[7,18]: + int 003ffff <- ( 00 , fffff ) + +[7,17]: + int 001ffff <- ( 00 , fffff ) + +[7,16]: + int 00ffff <- ( 00 , ffff ) + +[7,15]: + int 007fff <- ( 00 , ffff ) + +[7,14]: + int 003fff <- ( 00 , ffff ) + +[7,13]: + int 001fff <- ( 00 , ffff ) + +[7,12]: + int 00fff <- ( 00 , fff ) + +[7,11]: + int 007ff <- ( 00 , fff ) + +[7,10]: + int 003ff <- ( 00 , fff ) + +[7,9]: + int 001ff <- ( 00 , fff ) + +[7,8]: + int 00ff <- ( 00 , ff ) + +[7,7]: + int 007f <- ( 00 , ff ) + +[7,6]: + int 003f <- ( 00 , ff ) + +[7,5]: + int 001f <- ( 00 , ff ) + +[7,4]: + int 00f <- ( 00 , f ) + +[7,3]: + int 007 <- ( 00 , f ) + +[7,2]: + int 003 <- ( 00 , f ) + +[7,1]: + int 001 <- ( 00 , f ) + +[6,64]: + int 00ffffffffffffffff <- ( 00 , ffffffffffffffff ) + +[6,63]: + int 007fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[6,62]: + int 003fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[6,61]: + int 01fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[6,60]: + int 00fffffffffffffff <- ( 00 , fffffffffffffff ) + +[6,59]: + int 007ffffffffffffff <- ( 00 , fffffffffffffff ) + +[6,58]: + int 003ffffffffffffff <- ( 00 , fffffffffffffff ) + +[6,57]: + int 01ffffffffffffff <- ( 00 , fffffffffffffff ) + +[6,56]: + int 00ffffffffffffff <- ( 00 , ffffffffffffff ) + +[6,55]: + int 007fffffffffffff <- ( 00 , ffffffffffffff ) + +[6,54]: + int 003fffffffffffff <- ( 00 , ffffffffffffff ) + +[6,53]: + int 01fffffffffffff <- ( 00 , ffffffffffffff ) + +[6,52]: + int 00fffffffffffff <- ( 00 , fffffffffffff ) + +[6,51]: + int 007ffffffffffff <- ( 00 , fffffffffffff ) + +[6,50]: + int 003ffffffffffff <- ( 00 , fffffffffffff ) + +[6,49]: + int 01ffffffffffff <- ( 00 , fffffffffffff ) + +[6,48]: + int 00ffffffffffff <- ( 00 , ffffffffffff ) + +[6,47]: + int 007fffffffffff <- ( 00 , ffffffffffff ) + +[6,46]: + int 003fffffffffff <- ( 00 , ffffffffffff ) + +[6,45]: + int 01fffffffffff <- ( 00 , ffffffffffff ) + +[6,44]: + int 00fffffffffff <- ( 00 , fffffffffff ) + +[6,43]: + int 007ffffffffff <- ( 00 , fffffffffff ) + +[6,42]: + int 003ffffffffff <- ( 00 , fffffffffff ) + +[6,41]: + int 01ffffffffff <- ( 00 , fffffffffff ) + +[6,40]: + int 00ffffffffff <- ( 00 , ffffffffff ) + +[6,39]: + int 007fffffffff <- ( 00 , ffffffffff ) + +[6,38]: + int 003fffffffff <- ( 00 , ffffffffff ) + +[6,37]: + int 01fffffffff <- ( 00 , ffffffffff ) + +[6,36]: + int 00fffffffff <- ( 00 , fffffffff ) + +[6,35]: + int 007ffffffff <- ( 00 , fffffffff ) + +[6,34]: + int 003ffffffff <- ( 00 , fffffffff ) + +[6,33]: + int 01ffffffff <- ( 00 , fffffffff ) + +[6,32]: + int 00ffffffff <- ( 00 , ffffffff ) + +[6,31]: + int 007fffffff <- ( 00 , ffffffff ) + +[6,30]: + int 003fffffff <- ( 00 , ffffffff ) + +[6,29]: + int 01fffffff <- ( 00 , ffffffff ) + +[6,28]: + int 00fffffff <- ( 00 , fffffff ) + +[6,27]: + int 007ffffff <- ( 00 , fffffff ) + +[6,26]: + int 003ffffff <- ( 00 , fffffff ) + +[6,25]: + int 01ffffff <- ( 00 , fffffff ) + +[6,24]: + int 00ffffff <- ( 00 , ffffff ) + +[6,23]: + int 007fffff <- ( 00 , ffffff ) + +[6,22]: + int 003fffff <- ( 00 , ffffff ) + +[6,21]: + int 01fffff <- ( 00 , ffffff ) + +[6,20]: + int 00fffff <- ( 00 , fffff ) + +[6,19]: + int 007ffff <- ( 00 , fffff ) + +[6,18]: + int 003ffff <- ( 00 , fffff ) + +[6,17]: + int 01ffff <- ( 00 , fffff ) + +[6,16]: + int 00ffff <- ( 00 , ffff ) + +[6,15]: + int 007fff <- ( 00 , ffff ) + +[6,14]: + int 003fff <- ( 00 , ffff ) + +[6,13]: + int 01fff <- ( 00 , ffff ) + +[6,12]: + int 00fff <- ( 00 , fff ) + +[6,11]: + int 007ff <- ( 00 , fff ) + +[6,10]: + int 003ff <- ( 00 , fff ) + +[6,9]: + int 01ff <- ( 00 , fff ) + +[6,8]: + int 00ff <- ( 00 , ff ) + +[6,7]: + int 007f <- ( 00 , ff ) + +[6,6]: + int 003f <- ( 00 , ff ) + +[6,5]: + int 01f <- ( 00 , ff ) + +[6,4]: + int 00f <- ( 00 , f ) + +[6,3]: + int 007 <- ( 00 , f ) + +[6,2]: + int 003 <- ( 00 , f ) + +[6,1]: + int 01 <- ( 00 , f ) + +[5,64]: + int 00ffffffffffffffff <- ( 00 , ffffffffffffffff ) + +[5,63]: + int 007fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[5,62]: + int 03fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[5,61]: + int 01fffffffffffffff <- ( 00 , ffffffffffffffff ) + +[5,60]: + int 00fffffffffffffff <- ( 00 , fffffffffffffff ) + +[5,59]: + int 007ffffffffffffff <- ( 00 , fffffffffffffff ) + +[5,58]: + int 03ffffffffffffff <- ( 00 , fffffffffffffff ) + +[5,57]: + int 01ffffffffffffff <- ( 00 , fffffffffffffff ) + +[5,56]: + int 00ffffffffffffff <- ( 00 , ffffffffffffff ) + +[5,55]: + int 007fffffffffffff <- ( 00 , ffffffffffffff ) + +[5,54]: + int 03fffffffffffff <- ( 00 , ffffffffffffff ) + +[5,53]: + int 01fffffffffffff <- ( 00 , ffffffffffffff ) + +[5,52]: + int 00fffffffffffff <- ( 00 , fffffffffffff ) + +[5,51]: + int 007ffffffffffff <- ( 00 , fffffffffffff ) + +[5,50]: + int 03ffffffffffff <- ( 00 , fffffffffffff ) + +[5,49]: + int 01ffffffffffff <- ( 00 , fffffffffffff ) + +[5,48]: + int 00ffffffffffff <- ( 00 , ffffffffffff ) + +[5,47]: + int 007fffffffffff <- ( 00 , ffffffffffff ) + +[5,46]: + int 03fffffffffff <- ( 00 , ffffffffffff ) + +[5,45]: + int 01fffffffffff <- ( 00 , ffffffffffff ) + +[5,44]: + int 00fffffffffff <- ( 00 , fffffffffff ) + +[5,43]: + int 007ffffffffff <- ( 00 , fffffffffff ) + +[5,42]: + int 03ffffffffff <- ( 00 , fffffffffff ) + +[5,41]: + int 01ffffffffff <- ( 00 , fffffffffff ) + +[5,40]: + int 00ffffffffff <- ( 00 , ffffffffff ) + +[5,39]: + int 007fffffffff <- ( 00 , ffffffffff ) + +[5,38]: + int 03fffffffff <- ( 00 , ffffffffff ) + +[5,37]: + int 01fffffffff <- ( 00 , ffffffffff ) + +[5,36]: + int 00fffffffff <- ( 00 , fffffffff ) + +[5,35]: + int 007ffffffff <- ( 00 , fffffffff ) + +[5,34]: + int 03ffffffff <- ( 00 , fffffffff ) + +[5,33]: + int 01ffffffff <- ( 00 , fffffffff ) + +[5,32]: + int 00ffffffff <- ( 00 , ffffffff ) + +[5,31]: + int 007fffffff <- ( 00 , ffffffff ) + +[5,30]: + int 03fffffff <- ( 00 , ffffffff ) + +[5,29]: + int 01fffffff <- ( 00 , ffffffff ) + +[5,28]: + int 00fffffff <- ( 00 , fffffff ) + +[5,27]: + int 007ffffff <- ( 00 , fffffff ) + +[5,26]: + int 03ffffff <- ( 00 , fffffff ) + +[5,25]: + int 01ffffff <- ( 00 , fffffff ) + +[5,24]: + int 00ffffff <- ( 00 , ffffff ) + +[5,23]: + int 007fffff <- ( 00 , ffffff ) + +[5,22]: + int 03fffff <- ( 00 , ffffff ) + +[5,21]: + int 01fffff <- ( 00 , ffffff ) + +[5,20]: + int 00fffff <- ( 00 , fffff ) + +[5,19]: + int 007ffff <- ( 00 , fffff ) + +[5,18]: + int 03ffff <- ( 00 , fffff ) + +[5,17]: + int 01ffff <- ( 00 , fffff ) + +[5,16]: + int 00ffff <- ( 00 , ffff ) + +[5,15]: + int 007fff <- ( 00 , ffff ) + +[5,14]: + int 03fff <- ( 00 , ffff ) + +[5,13]: + int 01fff <- ( 00 , ffff ) + +[5,12]: + int 00fff <- ( 00 , fff ) + +[5,11]: + int 007ff <- ( 00 , fff ) + +[5,10]: + int 03ff <- ( 00 , fff ) + +[5,9]: + int 01ff <- ( 00 , fff ) + +[5,8]: + int 00ff <- ( 00 , ff ) + +[5,7]: + int 007f <- ( 00 , ff ) + +[5,6]: + int 03f <- ( 00 , ff ) + +[5,5]: + int 01f <- ( 00 , ff ) + +[5,4]: + int 00f <- ( 00 , f ) + +[5,3]: + int 007 <- ( 00 , f ) + +[5,2]: + int 03 <- ( 00 , f ) + +[5,1]: + int 01 <- ( 00 , f ) + +[4,64]: + int 00ffffffffffffffff <- ( 0 , ffffffffffffffff ) + +[4,63]: + int 07fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[4,62]: + int 03fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[4,61]: + int 01fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[4,60]: + int 00fffffffffffffff <- ( 0 , fffffffffffffff ) + +[4,59]: + int 07ffffffffffffff <- ( 0 , fffffffffffffff ) + +[4,58]: + int 03ffffffffffffff <- ( 0 , fffffffffffffff ) + +[4,57]: + int 01ffffffffffffff <- ( 0 , fffffffffffffff ) + +[4,56]: + int 00ffffffffffffff <- ( 0 , ffffffffffffff ) + +[4,55]: + int 07fffffffffffff <- ( 0 , ffffffffffffff ) + +[4,54]: + int 03fffffffffffff <- ( 0 , ffffffffffffff ) + +[4,53]: + int 01fffffffffffff <- ( 0 , ffffffffffffff ) + +[4,52]: + int 00fffffffffffff <- ( 0 , fffffffffffff ) + +[4,51]: + int 07ffffffffffff <- ( 0 , fffffffffffff ) + +[4,50]: + int 03ffffffffffff <- ( 0 , fffffffffffff ) + +[4,49]: + int 01ffffffffffff <- ( 0 , fffffffffffff ) + +[4,48]: + int 00ffffffffffff <- ( 0 , ffffffffffff ) + +[4,47]: + int 07fffffffffff <- ( 0 , ffffffffffff ) + +[4,46]: + int 03fffffffffff <- ( 0 , ffffffffffff ) + +[4,45]: + int 01fffffffffff <- ( 0 , ffffffffffff ) + +[4,44]: + int 00fffffffffff <- ( 0 , fffffffffff ) + +[4,43]: + int 07ffffffffff <- ( 0 , fffffffffff ) + +[4,42]: + int 03ffffffffff <- ( 0 , fffffffffff ) + +[4,41]: + int 01ffffffffff <- ( 0 , fffffffffff ) + +[4,40]: + int 00ffffffffff <- ( 0 , ffffffffff ) + +[4,39]: + int 07fffffffff <- ( 0 , ffffffffff ) + +[4,38]: + int 03fffffffff <- ( 0 , ffffffffff ) + +[4,37]: + int 01fffffffff <- ( 0 , ffffffffff ) + +[4,36]: + int 00fffffffff <- ( 0 , fffffffff ) + +[4,35]: + int 07ffffffff <- ( 0 , fffffffff ) + +[4,34]: + int 03ffffffff <- ( 0 , fffffffff ) + +[4,33]: + int 01ffffffff <- ( 0 , fffffffff ) + +[4,32]: + int 00ffffffff <- ( 0 , ffffffff ) + +[4,31]: + int 07fffffff <- ( 0 , ffffffff ) + +[4,30]: + int 03fffffff <- ( 0 , ffffffff ) + +[4,29]: + int 01fffffff <- ( 0 , ffffffff ) + +[4,28]: + int 00fffffff <- ( 0 , fffffff ) + +[4,27]: + int 07ffffff <- ( 0 , fffffff ) + +[4,26]: + int 03ffffff <- ( 0 , fffffff ) + +[4,25]: + int 01ffffff <- ( 0 , fffffff ) + +[4,24]: + int 00ffffff <- ( 0 , ffffff ) + +[4,23]: + int 07fffff <- ( 0 , ffffff ) + +[4,22]: + int 03fffff <- ( 0 , ffffff ) + +[4,21]: + int 01fffff <- ( 0 , ffffff ) + +[4,20]: + int 00fffff <- ( 0 , fffff ) + +[4,19]: + int 07ffff <- ( 0 , fffff ) + +[4,18]: + int 03ffff <- ( 0 , fffff ) + +[4,17]: + int 01ffff <- ( 0 , fffff ) + +[4,16]: + int 00ffff <- ( 0 , ffff ) + +[4,15]: + int 07fff <- ( 0 , ffff ) + +[4,14]: + int 03fff <- ( 0 , ffff ) + +[4,13]: + int 01fff <- ( 0 , ffff ) + +[4,12]: + int 00fff <- ( 0 , fff ) + +[4,11]: + int 07ff <- ( 0 , fff ) + +[4,10]: + int 03ff <- ( 0 , fff ) + +[4,9]: + int 01ff <- ( 0 , fff ) + +[4,8]: + int 00ff <- ( 0 , ff ) + +[4,7]: + int 07f <- ( 0 , ff ) + +[4,6]: + int 03f <- ( 0 , ff ) + +[4,5]: + int 01f <- ( 0 , ff ) + +[4,4]: + int 00f <- ( 0 , f ) + +[4,3]: + int 07 <- ( 0 , f ) + +[4,2]: + int 03 <- ( 0 , f ) + +[4,1]: + int 01 <- ( 0 , f ) + +[3,64]: + int 0ffffffffffffffff <- ( 0 , ffffffffffffffff ) + +[3,63]: + int 07fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[3,62]: + int 03fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[3,61]: + int 01fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[3,60]: + int 0fffffffffffffff <- ( 0 , fffffffffffffff ) + +[3,59]: + int 07ffffffffffffff <- ( 0 , fffffffffffffff ) + +[3,58]: + int 03ffffffffffffff <- ( 0 , fffffffffffffff ) + +[3,57]: + int 01ffffffffffffff <- ( 0 , fffffffffffffff ) + +[3,56]: + int 0ffffffffffffff <- ( 0 , ffffffffffffff ) + +[3,55]: + int 07fffffffffffff <- ( 0 , ffffffffffffff ) + +[3,54]: + int 03fffffffffffff <- ( 0 , ffffffffffffff ) + +[3,53]: + int 01fffffffffffff <- ( 0 , ffffffffffffff ) + +[3,52]: + int 0fffffffffffff <- ( 0 , fffffffffffff ) + +[3,51]: + int 07ffffffffffff <- ( 0 , fffffffffffff ) + +[3,50]: + int 03ffffffffffff <- ( 0 , fffffffffffff ) + +[3,49]: + int 01ffffffffffff <- ( 0 , fffffffffffff ) + +[3,48]: + int 0ffffffffffff <- ( 0 , ffffffffffff ) + +[3,47]: + int 07fffffffffff <- ( 0 , ffffffffffff ) + +[3,46]: + int 03fffffffffff <- ( 0 , ffffffffffff ) + +[3,45]: + int 01fffffffffff <- ( 0 , ffffffffffff ) + +[3,44]: + int 0fffffffffff <- ( 0 , fffffffffff ) + +[3,43]: + int 07ffffffffff <- ( 0 , fffffffffff ) + +[3,42]: + int 03ffffffffff <- ( 0 , fffffffffff ) + +[3,41]: + int 01ffffffffff <- ( 0 , fffffffffff ) + +[3,40]: + int 0ffffffffff <- ( 0 , ffffffffff ) + +[3,39]: + int 07fffffffff <- ( 0 , ffffffffff ) + +[3,38]: + int 03fffffffff <- ( 0 , ffffffffff ) + +[3,37]: + int 01fffffffff <- ( 0 , ffffffffff ) + +[3,36]: + int 0fffffffff <- ( 0 , fffffffff ) + +[3,35]: + int 07ffffffff <- ( 0 , fffffffff ) + +[3,34]: + int 03ffffffff <- ( 0 , fffffffff ) + +[3,33]: + int 01ffffffff <- ( 0 , fffffffff ) + +[3,32]: + int 0ffffffff <- ( 0 , ffffffff ) + +[3,31]: + int 07fffffff <- ( 0 , ffffffff ) + +[3,30]: + int 03fffffff <- ( 0 , ffffffff ) + +[3,29]: + int 01fffffff <- ( 0 , ffffffff ) + +[3,28]: + int 0fffffff <- ( 0 , fffffff ) + +[3,27]: + int 07ffffff <- ( 0 , fffffff ) + +[3,26]: + int 03ffffff <- ( 0 , fffffff ) + +[3,25]: + int 01ffffff <- ( 0 , fffffff ) + +[3,24]: + int 0ffffff <- ( 0 , ffffff ) + +[3,23]: + int 07fffff <- ( 0 , ffffff ) + +[3,22]: + int 03fffff <- ( 0 , ffffff ) + +[3,21]: + int 01fffff <- ( 0 , ffffff ) + +[3,20]: + int 0fffff <- ( 0 , fffff ) + +[3,19]: + int 07ffff <- ( 0 , fffff ) + +[3,18]: + int 03ffff <- ( 0 , fffff ) + +[3,17]: + int 01ffff <- ( 0 , fffff ) + +[3,16]: + int 0ffff <- ( 0 , ffff ) + +[3,15]: + int 07fff <- ( 0 , ffff ) + +[3,14]: + int 03fff <- ( 0 , ffff ) + +[3,13]: + int 01fff <- ( 0 , ffff ) + +[3,12]: + int 0fff <- ( 0 , fff ) + +[3,11]: + int 07ff <- ( 0 , fff ) + +[3,10]: + int 03ff <- ( 0 , fff ) + +[3,9]: + int 01ff <- ( 0 , fff ) + +[3,8]: + int 0ff <- ( 0 , ff ) + +[3,7]: + int 07f <- ( 0 , ff ) + +[3,6]: + int 03f <- ( 0 , ff ) + +[3,5]: + int 01f <- ( 0 , ff ) + +[3,4]: + int 0f <- ( 0 , f ) + +[3,3]: + int 07 <- ( 0 , f ) + +[3,2]: + int 03 <- ( 0 , f ) + +[3,1]: + int 01 <- ( 0 , f ) + +[2,64]: + int 0ffffffffffffffff <- ( 0 , ffffffffffffffff ) + +[2,63]: + int 07fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[2,62]: + int 03fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[2,61]: + int 1fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[2,60]: + int 0fffffffffffffff <- ( 0 , fffffffffffffff ) + +[2,59]: + int 07ffffffffffffff <- ( 0 , fffffffffffffff ) + +[2,58]: + int 03ffffffffffffff <- ( 0 , fffffffffffffff ) + +[2,57]: + int 1ffffffffffffff <- ( 0 , fffffffffffffff ) + +[2,56]: + int 0ffffffffffffff <- ( 0 , ffffffffffffff ) + +[2,55]: + int 07fffffffffffff <- ( 0 , ffffffffffffff ) + +[2,54]: + int 03fffffffffffff <- ( 0 , ffffffffffffff ) + +[2,53]: + int 1fffffffffffff <- ( 0 , ffffffffffffff ) + +[2,52]: + int 0fffffffffffff <- ( 0 , fffffffffffff ) + +[2,51]: + int 07ffffffffffff <- ( 0 , fffffffffffff ) + +[2,50]: + int 03ffffffffffff <- ( 0 , fffffffffffff ) + +[2,49]: + int 1ffffffffffff <- ( 0 , fffffffffffff ) + +[2,48]: + int 0ffffffffffff <- ( 0 , ffffffffffff ) + +[2,47]: + int 07fffffffffff <- ( 0 , ffffffffffff ) + +[2,46]: + int 03fffffffffff <- ( 0 , ffffffffffff ) + +[2,45]: + int 1fffffffffff <- ( 0 , ffffffffffff ) + +[2,44]: + int 0fffffffffff <- ( 0 , fffffffffff ) + +[2,43]: + int 07ffffffffff <- ( 0 , fffffffffff ) + +[2,42]: + int 03ffffffffff <- ( 0 , fffffffffff ) + +[2,41]: + int 1ffffffffff <- ( 0 , fffffffffff ) + +[2,40]: + int 0ffffffffff <- ( 0 , ffffffffff ) + +[2,39]: + int 07fffffffff <- ( 0 , ffffffffff ) + +[2,38]: + int 03fffffffff <- ( 0 , ffffffffff ) + +[2,37]: + int 1fffffffff <- ( 0 , ffffffffff ) + +[2,36]: + int 0fffffffff <- ( 0 , fffffffff ) + +[2,35]: + int 07ffffffff <- ( 0 , fffffffff ) + +[2,34]: + int 03ffffffff <- ( 0 , fffffffff ) + +[2,33]: + int 1ffffffff <- ( 0 , fffffffff ) + +[2,32]: + int 0ffffffff <- ( 0 , ffffffff ) + +[2,31]: + int 07fffffff <- ( 0 , ffffffff ) + +[2,30]: + int 03fffffff <- ( 0 , ffffffff ) + +[2,29]: + int 1fffffff <- ( 0 , ffffffff ) + +[2,28]: + int 0fffffff <- ( 0 , fffffff ) + +[2,27]: + int 07ffffff <- ( 0 , fffffff ) + +[2,26]: + int 03ffffff <- ( 0 , fffffff ) + +[2,25]: + int 1ffffff <- ( 0 , fffffff ) + +[2,24]: + int 0ffffff <- ( 0 , ffffff ) + +[2,23]: + int 07fffff <- ( 0 , ffffff ) + +[2,22]: + int 03fffff <- ( 0 , ffffff ) + +[2,21]: + int 1fffff <- ( 0 , ffffff ) + +[2,20]: + int 0fffff <- ( 0 , fffff ) + +[2,19]: + int 07ffff <- ( 0 , fffff ) + +[2,18]: + int 03ffff <- ( 0 , fffff ) + +[2,17]: + int 1ffff <- ( 0 , fffff ) + +[2,16]: + int 0ffff <- ( 0 , ffff ) + +[2,15]: + int 07fff <- ( 0 , ffff ) + +[2,14]: + int 03fff <- ( 0 , ffff ) + +[2,13]: + int 1fff <- ( 0 , ffff ) + +[2,12]: + int 0fff <- ( 0 , fff ) + +[2,11]: + int 07ff <- ( 0 , fff ) + +[2,10]: + int 03ff <- ( 0 , fff ) + +[2,9]: + int 1ff <- ( 0 , fff ) + +[2,8]: + int 0ff <- ( 0 , ff ) + +[2,7]: + int 07f <- ( 0 , ff ) + +[2,6]: + int 03f <- ( 0 , ff ) + +[2,5]: + int 1f <- ( 0 , ff ) + +[2,4]: + int 0f <- ( 0 , f ) + +[2,3]: + int 07 <- ( 0 , f ) + +[2,2]: + int 03 <- ( 0 , f ) + +[2,1]: + int 1 <- ( 0 , f ) + +[1,64]: + int 0ffffffffffffffff <- ( 0 , ffffffffffffffff ) + +[1,63]: + int 07fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[1,62]: + int 3fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[1,61]: + int 1fffffffffffffff <- ( 0 , ffffffffffffffff ) + +[1,60]: + int 0fffffffffffffff <- ( 0 , fffffffffffffff ) + +[1,59]: + int 07ffffffffffffff <- ( 0 , fffffffffffffff ) + +[1,58]: + int 3ffffffffffffff <- ( 0 , fffffffffffffff ) + +[1,57]: + int 1ffffffffffffff <- ( 0 , fffffffffffffff ) + +[1,56]: + int 0ffffffffffffff <- ( 0 , ffffffffffffff ) + +[1,55]: + int 07fffffffffffff <- ( 0 , ffffffffffffff ) + +[1,54]: + int 3fffffffffffff <- ( 0 , ffffffffffffff ) + +[1,53]: + int 1fffffffffffff <- ( 0 , ffffffffffffff ) + +[1,52]: + int 0fffffffffffff <- ( 0 , fffffffffffff ) + +[1,51]: + int 07ffffffffffff <- ( 0 , fffffffffffff ) + +[1,50]: + int 3ffffffffffff <- ( 0 , fffffffffffff ) + +[1,49]: + int 1ffffffffffff <- ( 0 , fffffffffffff ) + +[1,48]: + int 0ffffffffffff <- ( 0 , ffffffffffff ) + +[1,47]: + int 07fffffffffff <- ( 0 , ffffffffffff ) + +[1,46]: + int 3fffffffffff <- ( 0 , ffffffffffff ) + +[1,45]: + int 1fffffffffff <- ( 0 , ffffffffffff ) + +[1,44]: + int 0fffffffffff <- ( 0 , fffffffffff ) + +[1,43]: + int 07ffffffffff <- ( 0 , fffffffffff ) + +[1,42]: + int 3ffffffffff <- ( 0 , fffffffffff ) + +[1,41]: + int 1ffffffffff <- ( 0 , fffffffffff ) + +[1,40]: + int 0ffffffffff <- ( 0 , ffffffffff ) + +[1,39]: + int 07fffffffff <- ( 0 , ffffffffff ) + +[1,38]: + int 3fffffffff <- ( 0 , ffffffffff ) + +[1,37]: + int 1fffffffff <- ( 0 , ffffffffff ) + +[1,36]: + int 0fffffffff <- ( 0 , fffffffff ) + +[1,35]: + int 07ffffffff <- ( 0 , fffffffff ) + +[1,34]: + int 3ffffffff <- ( 0 , fffffffff ) + +[1,33]: + int 1ffffffff <- ( 0 , fffffffff ) + +[1,32]: + int 0ffffffff <- ( 0 , ffffffff ) + +[1,31]: + int 07fffffff <- ( 0 , ffffffff ) + +[1,30]: + int 3fffffff <- ( 0 , ffffffff ) + +[1,29]: + int 1fffffff <- ( 0 , ffffffff ) + +[1,28]: + int 0fffffff <- ( 0 , fffffff ) + +[1,27]: + int 07ffffff <- ( 0 , fffffff ) + +[1,26]: + int 3ffffff <- ( 0 , fffffff ) + +[1,25]: + int 1ffffff <- ( 0 , fffffff ) + +[1,24]: + int 0ffffff <- ( 0 , ffffff ) + +[1,23]: + int 07fffff <- ( 0 , ffffff ) + +[1,22]: + int 3fffff <- ( 0 , ffffff ) + +[1,21]: + int 1fffff <- ( 0 , ffffff ) + +[1,20]: + int 0fffff <- ( 0 , fffff ) + +[1,19]: + int 07ffff <- ( 0 , fffff ) + +[1,18]: + int 3ffff <- ( 0 , fffff ) + +[1,17]: + int 1ffff <- ( 0 , fffff ) + +[1,16]: + int 0ffff <- ( 0 , ffff ) + +[1,15]: + int 07fff <- ( 0 , ffff ) + +[1,14]: + int 3fff <- ( 0 , ffff ) + +[1,13]: + int 1fff <- ( 0 , ffff ) + +[1,12]: + int 0fff <- ( 0 , fff ) + +[1,11]: + int 07ff <- ( 0 , fff ) + +[1,10]: + int 3ff <- ( 0 , fff ) + +[1,9]: + int 1ff <- ( 0 , fff ) + +[1,8]: + int 0ff <- ( 0 , ff ) + +[1,7]: + int 07f <- ( 0 , ff ) + +[1,6]: + int 3f <- ( 0 , ff ) + +[1,5]: + int 1f <- ( 0 , ff ) + +[1,4]: + int 0f <- ( 0 , f ) + +[1,3]: + int 07 <- ( 0 , f ) + +[1,2]: + int 3 <- ( 0 , f ) + +[1,1]: + int 1 <- ( 0 , f ) +Program completed diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test07/test07.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test07/test07.cpp new file mode 100644 index 000000000..e4ff7e279 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test07/test07.cpp @@ -0,0 +1,143 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 29 October 2007 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test various width concatenations for each major base type. + +#include "systemc.h" + +void checkout( const sc_unsigned* actual_p, const sc_unsigned* expected_p ) +{ + cout << *actual_p <<" " << *expected_p << endl; + cout <<"another line" << endl; +} + +#define TEST(LEFT,RIGHT) \ +{ \ + const sc_unsigned* actual_p = &(LEFT,RIGHT).value(); \ + const sc_unsigned* expected_p = &(high_int,low_int).value(); \ + if ( *actual_p != *expected_p ) \ + { \ + checkout(actual_p, expected_p); \ + cout << "!!! ERROR (" << #LEFT << "," << #RIGHT << "):" << endl; \ + cout << " expected: " << hex << *expected_p << endl; \ + cout << " actual: " << hex << *actual_p << endl; \ + cout << " diff mask: " << hex << ((high_int,low_int) ^ (LEFT,RIGHT)) << endl; \ + } \ +} + +int sc_main(int argc, char* argv[]) +{ + for ( int cycle_i = 0; cycle_i < 3; cycle_i++ ) + { + for ( int high_i = 64; high_i > 0; high_i-- ) + { + for ( int low_i = 64; low_i > 0; --low_i ) + { + sc_int_base high_int(high_i); + sc_int_base low_int(low_i); + sc_signed high_signed(high_i); + sc_signed low_signed(low_i); + sc_uint_base high_uint(high_i); + sc_uint_base low_uint(low_i); + sc_unsigned high_unsigned(high_i); + sc_unsigned low_unsigned(low_i); + + switch ( cycle_i ) + { + case 0: + low_int = "0xaaaaaaaa55555555"; + low_signed = "0xaaaaaaaa55555555"; + low_uint = "0xaaaaaaaa55555555"; + low_unsigned = "0xaaaaaaaa55555555"; + high_int = "0xfedcba9876543210"; + high_signed = "0xfedcba9876543210"; + high_uint = "0xfedcba9876543210"; + high_unsigned = "0xfedcba9876543210"; + break; + case 1: + low_int = "0x0000000000000000"; + low_signed = "0x0000000000000000"; + low_uint = "0x0000000000000000"; + low_unsigned = "0x0000000000000000"; + high_int = "0xffffffffffffffff"; + high_signed = "0xffffffffffffffff"; + high_uint = "0xffffffffffffffff"; + high_unsigned = "0xffffffffffffffff"; + break; + case 2: + low_int = "0xffffffffffffffff"; + low_signed = "0xffffffffffffffff"; + low_uint = "0xffffffffffffffff"; + low_unsigned = "0xffffffffffffffff"; + high_int = "0x0000000000000000"; + high_signed = "0x0000000000000000"; + high_uint = "0x0000000000000000"; + high_unsigned = "0x0000000000000000"; + break; + } + + cout << endl << dec << "[" << high_i << "," << low_i << "]:" + << endl; + + cout << hex << " int " << (high_int,low_int) << " <- ( " + << high_int << " , " << low_int << " )" << endl; + + TEST(high_int,low_signed); + TEST(high_int,low_uint); + TEST(high_int,low_unsigned); + + TEST(high_signed,low_int); + TEST(high_signed,low_signed); + TEST(high_signed,low_uint); + TEST(high_signed,low_unsigned); + + TEST(high_uint,low_int); + TEST(high_uint,low_signed); + TEST(high_uint,low_uint); + TEST(high_uint,low_unsigned); + + TEST(high_unsigned,low_int); + TEST(high_unsigned,low_signed); + TEST(high_unsigned,low_uint); + TEST(high_unsigned,low_unsigned); + } + } + } + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test08/golden/test08.log b/src/systemc/tests/systemc/datatypes/misc/concat/test08/golden/test08.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test08/golden/test08.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test08/test08.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test08/test08.cpp new file mode 100644 index 000000000..9d132629e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test08/test08.cpp @@ -0,0 +1,135 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 9 November 2007 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test concatenation uses that were reported not to work with SystemC 2.1.v1 + +#include "systemc.h" + +int sc_main(int argc, char* argv[]) +{ + { + sc_uint<2> a = 1; + sc_uint<2> b = 2; + sc_uint<10> f = 0 - (a,b); + + // subtraction of a concat from 0. + + if ( f != 0x3fa ) + { + cout << __FILE__ << " " << __LINE__ << ": expected " << 0x3fa + << " actual " << f << dec << endl; + } + + // subtraction of a concat from a concat if left < right. + + f = (a,b) - (b,a); + if ( f != 0x3fd ) + { + cout << __FILE__ << " " << __LINE__ << ": expected " << 0x3fd + << " actual " << f << dec << endl; + } + + } + { // multiplication times a negative integer. + + sc_uint<4> a = 10; + int b = 0xdd6283e4; + sc_uint<2> c = 1; + sc_uint<40> e("0xfc7c016528"); + sc_uint<40> f = (c,a)*b; + if ( f != e ) + { + cout << __FILE__ << " " << __LINE__ << ": expected " << hex << e + << " actual " << f << dec << endl; + } + } + + { // divsion where dividend negative and of type int/long + sc_uint<4> a = 14; + int b = 0xb292b9fe; + sc_uint<2> c = 3; + sc_uint<50> e = b / sc_biguint<6>(0x3e); + sc_uint<50> f = b / (c,a); + + if ( f != e ) + { + cout << __FILE__ << " " << __LINE__ << ": expected " << hex << e + << " actual " << f << dec << endl; + } + + } + { // modulo for negative int % concat + + sc_uint<4> a = 10; + int b = 0xbb6283e4; + sc_uint<2> c = 1; + sc_uint<50> e = b % sc_biguint<6>(0x1a); + sc_uint<50> f = b %(c,a); + if ( f != e ) + { + cout << __FILE__ << " " << __LINE__ << ": expected " << hex << e + << " actual " << f << dec << endl; + } + } + + { // Bitwise or and xor, when operands are concat and unsigned int + + sc_uint<4> a = 6; + unsigned int b = 0xcc6690e6; + sc_uint<2> c = 3; + sc_uint<34> e; + sc_uint<34> f; + e = b | 0x36; + f = b | (c,a); + if ( f != e ) + { + cout << __FILE__ << " " << __LINE__ << ": expected " << hex << e + << " actual " << f << dec << endl; + } + + e = b ^ 0x36; + f = b ^ (c,a); + if ( f != e ) + { + cout << __FILE__ << " " << __LINE__ << ": expected " << hex << e + << " actual " << f << dec << endl; + } + } + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test09/golden/test09.log b/src/systemc/tests/systemc/datatypes/misc/concat/test09/golden/test09.log new file mode 100644 index 000000000..6b856fa18 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test09/golden/test09.log @@ -0,0 +1,3 @@ +SystemC Simulation +15 9 +Program completed diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test09/test09.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test09/test09.cpp new file mode 100644 index 000000000..d089309e5 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test09/test09.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test09.cpp -- Test assignments to concatenation from a string. + + Original Author: Andy Goodrich, Forte Design Systems, 29 April 2008 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int argc, char* argv[]) +{ + sc_uint<4> a, b; + (a,b) = "0x9"; + cout << a << " " << b << endl; // prints 0 1 instead of 15 9 + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test10/golden/test10.log b/src/systemc/tests/systemc/datatypes/misc/concat/test10/golden/test10.log new file mode 100644 index 000000000..af00fa217 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test10/golden/test10.log @@ -0,0 +1,10 @@ +SystemC Simulation +x = 0b000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 + +hi = fffffe47b00000000 +lo = 00000001 +x = fffff23d8000000000000001 +hi = 0b11111111111111111111001000111101100000000000000000000000000000000 +lo = 0b0000000000000000000000000000001 +x = 0b111111111111111111110010001111011000000000000000000000000000000000000000000000000000000000000001 +Program completed diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test10/test10.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test10/test10.cpp new file mode 100644 index 000000000..ff3eeecd6 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test10/test10.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- Test that low order word of negative sc_signed value is + properly masked when used in sc_signed::concat_get_data() + + Original Author: Andy Goodrich, Forte Design Systems, 29 April 2008 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int argc, char* argv[]) +{ + + sc_bigint<65> hi; + hi[64] = 1; hi(63,32) = 0xffffe47b; + hi[64] = 1; hi(63,32) = 0xffffe47b; + sc_bigint<31> lo(1); + sc_bigint<96> x; + cout << "x = " << x.to_string(SC_BIN) << endl << endl; + x = (hi,lo); + cout << hex << "hi = " << hi << endl + << "lo = " << lo << endl + << "x = " << x << endl; + cout << dec << "hi = " << hi.to_string(SC_BIN) << endl + << "lo = " << lo.to_string(SC_BIN) << endl + << "x = " << x.to_string(SC_BIN) << endl; + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test11/golden/test11.log b/src/systemc/tests/systemc/datatypes/misc/concat/test11/golden/test11.log new file mode 100644 index 000000000..233e94a4a --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test11/golden/test11.log @@ -0,0 +1,10 @@ +SystemC Simulation +sc_signed 1 3ffffffe +sc_unsigned 1 3ffffffe +sc_signed -1 3ff00000 +sc_unsigned -1 3ff00000 +sc_signed 0x800000 3ff7ffff +sc_unsigned 0x800000 3ff7ffff +sc_signed 0 3fffffff +sc_unsigned 0 3fffffff +Program completed diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test11/test11.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test11/test11.cpp new file mode 100644 index 000000000..fa04b8d31 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test11/test11.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test11.cpp -- Test that sign extension and bit inversion works for the + ~ operator when used in sc_XXsigned::concat_get_data() + + Original Author: Andy Goodrich, Forte Design Systems, 29 April 2008 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +int sc_main(int argc, char* argv[]) +{ + sc_bigint<20> w; + sc_biguint<20> x; + sc_biguint<30> y; + + w = 1; + x = 1; + y = (sc_bigint<21>)(sc_uint<1>(1),~w); + cout << "sc_signed 1 " << hex << y << endl; + y = (sc_bigint<21>)(sc_uint<1>(1),~x); + cout << "sc_unsigned 1 " << hex << y << endl; + + w = -1; + x = -1; + y = (sc_bigint<21>)(sc_uint<1>(1),~w); + cout << "sc_signed -1 " << hex << y << endl; + y = (sc_bigint<21>)(sc_uint<1>(1),~x); + cout << "sc_unsigned -1 " << hex << y << endl; + + w = 0x80000; + x = 0x80000; + y = (sc_bigint<21>)(sc_uint<1>(1),~w); + cout << "sc_signed 0x800000 " << hex << y << endl; + y = (sc_bigint<21>)(sc_uint<1>(1),~x); + cout << "sc_unsigned 0x800000 " << hex << y << endl; + + w = 0; + x = 0; + y = (sc_bigint<21>)(sc_uint<1>(1),~w); + cout << "sc_signed 0 " << hex << y << endl; + y = (sc_bigint<21>)(sc_uint<1>(1),~x); + cout << "sc_unsigned 0 " << hex << y << endl; + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test12/golden/test12.log b/src/systemc/tests/systemc/datatypes/misc/concat/test12/golden/test12.log new file mode 100644 index 000000000..9ba73a193 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test12/golden/test12.log @@ -0,0 +1,23 @@ +SystemC Simulation + +sc_int test +i37 = 01fc070000 +i37(33,0) = 1fc070000 +(sc_uint<6>(0),i37(33,0)) = 001fc070000 + +sc_uint test +u37 = 01fc070000 +u37(33,0) = 1fc070000 +(sc_uint<6>(0),u37(33,0)) = 001fc070000 + +sc_bigint test +bi37 = 01fc070000 +bi37(33,0) = 1fc070000 +(sc_uint<6>(0),bi37(33,0)) = 001fc070000 + +sc_biguint test +bu37 = 01fc070000 +bu37(33,0) = 1fc070000 +(sc_uint<6>(0),bu37(33,0)) = 001fc070000 + +Program completed diff --git a/src/systemc/tests/systemc/datatypes/misc/concat/test12/test12.cpp b/src/systemc/tests/systemc/datatypes/misc/concat/test12/test12.cpp new file mode 100644 index 000000000..abb4a21f8 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/concat/test12/test12.cpp @@ -0,0 +1,160 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test12.cpp -- Test that part selections are returning the proper values + when they are part of a concatenation. This tests is here + because the wrong width mask was being used in the 2.2 + source. + + Original Author: Andy Goodrich, Forte Design Systems, 03 Feb 2010 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +#define TEST(TARGET) \ + expected = TARGET(high,low); \ + result = (sc_uint<6>(0),TARGET(high,low)); \ + if ( result != expected ) \ + { \ + cout << dec; \ + cout << "Mismatch for " << #TARGET << "(" << high << "," << low << "):"\ + << endl; \ + cout << "Expected " << hex << expected << " got " << result \ + << dec << endl; \ + } + +int sc_main(int argc, char* argv[]) +{ + sc_bigint<37> bi37; + sc_biguint<37> bu37; + sc_int<37> i37; + sc_uint<37> u37; + + bi37 = 0x1fc070000ULL; + bu37 = 0x1fc070000ULL; + i37 = 0x1fc070000ULL; + u37 = 0x1fc070000ULL; + + // Test sc_int: + + cout << endl << "sc_int test" << endl; + cout << "i37 = " << hex << i37 << endl; + cout << "i37(33,0) = " << hex << i37(33,0) << endl; + cout << "(sc_uint<6>(0),i37(33,0)) = " + << hex << (sc_uint<6>(0),i37(33,0)) + << endl; + + // Test sc_uint: + + cout << endl << "sc_uint test" << endl; + cout << "u37 = " << hex << u37 << endl; + cout << "u37(33,0) = " << hex << u37(33,0) << endl; + cout << "(sc_uint<6>(0),u37(33,0)) = " + << hex << (sc_uint<6>(0),u37(33,0)) + << endl; + + // Test sc_bigint: + + cout << endl << "sc_bigint test" << endl; + cout << "bi37 = " << hex << bi37 << endl; + cout << "bi37(33,0) = " << hex << bi37(33,0) << endl; + cout << "(sc_uint<6>(0),bi37(33,0)) = " + << hex << (sc_uint<6>(0),bi37(33,0)) + << endl; + + // Test sc_biguint: + + cout << endl << "sc_biguint test" << endl; + cout << "bu37 = " << hex << bu37 << endl; + cout << "bu37(33,0) = " << hex << bu37(33,0) << endl; + cout << "(sc_uint<6>(0),bu37(33,0)) = " + << hex << (sc_uint<6>(0),bu37(33,0)) + << endl; + + sc_bigint<64> bi64; + sc_biguint<64> bu64; + sc_uint<64> expected; + sc_int<64> i64; + sc_uint<64> result; + sc_uint<64> u64; + + bi64 = -1; + bu64 = -1; + i64 = -1; + u64 = -1; + for ( size_t low = 0; low < 64; low++ ) + { + for ( size_t high = low; high < 64; high++ ) + { + TEST(bi64); + TEST(bu64); + TEST(i64); + TEST(u64); + } + } + + bi64 = 0x6666666666666666ULL; + bu64 = 0x6aaaaaaaaaaaaaaaULL; + i64 = 0x6aaaaaaaaaaaaaaaULL; + u64 = 0x6aaaaaaaaaaaaaaaULL; + for ( size_t low = 0; low < 64; low++ ) + { + for ( size_t high = low; high < 64; high++ ) + { + TEST(bi64); + TEST(bu64); + TEST(i64); + TEST(u64); + } + } + + bi64 = 0xaaaaaaaaaaaaaaaaULL; + bu64 = 0xaaaaaaaaaaaaaaaaULL; + i64 = 0xaaaaaaaaaaaaaaaaULL; + u64 = 0xaaaaaaaaaaaaaaaaULL; + for ( size_t low = 0; low < 64; low++ ) + { + for ( size_t high = low; high < 64; high++ ) + { + TEST(bi64); + TEST(bu64); + TEST(i64); + TEST(u64); + } + } + + + cout << endl << "Program completed" << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/sign_propagation/golden/sign_propagation.log b/src/systemc/tests/systemc/datatypes/misc/sign_propagation/golden/sign_propagation.log new file mode 100644 index 000000000..e515e3eee --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/sign_propagation/golden/sign_propagation.log @@ -0,0 +1,26 @@ +SystemC Simulation +int = 8 +I = 0b0000000000000000000000000000000000000000000000000000000000001000 1 +UI = 0b00000000000000000000000000000000000000000000000000000000000001000 1 +BI = 0b0000000000000000000000000000000000000000000000000000000000001000 1 +BUI = 0b00000000000000000000000000000000000000000000000000000000000001000 1 +BV = 0b00000000000000000000000000000000000000000000000000000000000001000 1 +BBI = 0b0000000000000000000000000000000000000000000000000000000000000000001000 1 +BBUI = 0b00000000000000000000000000000000000000000000000000000000000000000001000 1 +int = -1 +I = 0b1111111111111111111111111111111111111111111111111111111111111111 7 +UI = 0b01111111111111111111111111111111111111111111111111111111111111111 7 +BI = 0b1111111111111111111111111111111111111111111111111111111111111111 7 +BUI = 0b01111111111111111111111111111111111111111111111111111111111111111 7 +BV = 0b01111111111111111111111111111111111111111111111111111111111111111 7 +BBI = 0b1111111111111111111111111111111111111111111111111111111111111111111111 7 +BBUI = 0b01111111111111111111111111111111111111111111111111111111111111111111111 7 + +int64 = -2 +I = 0b1111111111111111111111111111111111111111111111111111111111111110 7 +UI = 0b01111111111111111111111111111111111111111111111111111111111111110 7 +BI = 0b1111111111111111111111111111111111111111111111111111111111111110 7 +BUI = 0b01111111111111111111111111111111111111111111111111111111111111110 7 +BV = 0b01111111111111111111111111111111111111111111111111111111111111110 7 +BBI = 0b1111111111111111111111111111111111111111111111111111111111111111111110 7 +BBUI = 0b01111111111111111111111111111111111111111111111111111111111111111111110 7 diff --git a/src/systemc/tests/systemc/datatypes/misc/sign_propagation/sign_propagation.cpp b/src/systemc/tests/systemc/datatypes/misc/sign_propagation/sign_propagation.cpp new file mode 100644 index 000000000..471de3edd --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/sign_propagation/sign_propagation.cpp @@ -0,0 +1,126 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: David Long, Doulos + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Andy Goodrich, Forte Design Systems + Description of Modification: Expanded number of tests and added part + selection to make sure internal representation + works. + + *****************************************************************************/ + +#include + +int sc_main(int,char**) { + int i; + int64 j; + sc_int<64> I; + sc_uint<64> UI; + sc_bigint<64> BI; + sc_biguint<64> BUI; + sc_bv<64> BV; + sc_bigint<70> BBI; + sc_biguint<70> BBUI; + + cout << "int = 8 " << endl; + i = 8; + I = i; + cout << "I = " << I.to_string(SC_BIN) << " " << I(5,3) << endl; + + UI = i; + cout << "UI = " << UI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BI= i; + cout << "BI = " << BI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BUI = i; + cout << "BUI = " << BUI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BV = i; + cout << "BV = " << BV.to_string(SC_BIN) << " " << I(5,3) << endl; + + BBI= i; + cout << "BBI = " << BBI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BBUI = i; + cout << "BBUI = " << BBUI.to_string(SC_BIN) << " " << I(5,3) << endl; + + cout << "int = -1 " << endl; + i = -1; + I = i; + cout << "I = " << I.to_string(SC_BIN) << " " << I(5,3) << endl; + + UI = i; + cout << "UI = " << UI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BI= i; + cout << "BI = " << BI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BUI = i; + cout << "BUI = " << BUI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BV = i; + cout << "BV = " << BV.to_string(SC_BIN) << " " << I(5,3) << endl; + + BBI= i; + cout << "BBI = " << BBI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BBUI = i; + cout << "BBUI = " << BBUI.to_string(SC_BIN) << " " << I(5,3) << endl; + + cout << endl; + cout << "int64 = -2 " << endl; + j = -2; + + I = j; + cout << "I = " << I.to_string(SC_BIN) << " " << I(5,3) << endl; + + UI = j; + cout << "UI = " << UI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BI= j; + cout << "BI = " << BI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BUI = j; + cout << "BUI = " << BUI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BV = j; + cout << "BV = " << BV.to_string(SC_BIN) << " " << I(5,3) << endl; + + BBI= j; + cout << "BBI = " << BBI.to_string(SC_BIN) << " " << I(5,3) << endl; + + BBUI = j; + cout << "BBUI = " << BBUI.to_string(SC_BIN) << " " << I(5,3) << endl; + + return 0; +} + diff --git a/src/systemc/tests/systemc/datatypes/misc/signless_conversion/golden/signless_conversion.log b/src/systemc/tests/systemc/datatypes/misc/signless_conversion/golden/signless_conversion.log new file mode 100644 index 000000000..4ec7181be --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/signless_conversion/golden/signless_conversion.log @@ -0,0 +1,111 @@ +SystemC Simulation +sc_int_base(bi(3,0)) = -6 +sc_uint_base(bi(3,0)) = 10 +sc_signed(bi(3,0)) = -6 +sc_unsigned(bi(3,0)) = 10 + +sc_int_base(bui(3,0)) = -6 +sc_uint_base(bui(3,0)) = 10 +sc_signed(bui(3,0)) = -6 +sc_unsigned(bui(3,0)) = 10 + +sc_int_base(bv) = -6 +sc_uint_base(bv) = 10 +sc_signed(bv) = -6 +sc_unsigned(bv) = 10 + +sc_int_base(i(3,0)) = -6 +sc_uint_base(i(3,0)) = 10 +sc_signed(i(3,0)) = -6 +sc_unsigned(i(3,0)) = 10 + +sc_int_base(lv) = -6 +sc_uint_base(lv) = 10 +sc_signed(lv) = -6 +sc_unsigned(lv) = 10 + +sc_int_base(ui(3,0)) = -6 +sc_uint_base(ui(3,0)) = 10 +sc_signed(ui(3,0)) = -6 +sc_unsigned(ui(3,0)) = 10 + +sc_int_base((bi(3,2),i(1,0))) = -6 +sc_uint_base((bi(3,2),i(1,0))) = 10 +sc_signed((bi(3,2),i(1,0))) = -6 +sc_unsigned((bi(3,2),i(1,0))) = 10 + +sc_int_base((bi(3,2),ui(1,0))) = -6 +sc_uint_base((bi(3,2),ui(1,0))) = 10 +sc_signed((bi(3,2),ui(1,0))) = -6 +sc_unsigned((bi(3,2),ui(1,0))) = 10 + +sc_int_base((bi(3,2),bui(1,0))) = -6 +sc_uint_base((bi(3,2),bui(1,0))) = 10 +sc_signed((bi(3,2),bui(1,0))) = -6 +sc_unsigned((bi(3,2),bui(1,0))) = 10 + +sc_int_base((bi(3,2),bi(1,0))) = -6 +sc_uint_base((bi(3,2),bi(1,0))) = 10 +sc_signed((bi(3,2),bi(1,0))) = -6 +sc_unsigned((bi(3,2),bi(1,0))) = 10 + +sc_int_base((bui(3,2),i(1,0))) = -6 +sc_uint_base((bui(3,2),i(1,0))) = 10 +sc_signed((bui(3,2),i(1,0))) = -6 +sc_unsigned((bui(3,2),i(1,0))) = 10 + +sc_int_base((bui(3,2),ui(1,0))) = -6 +sc_uint_base((bui(3,2),ui(1,0))) = 10 +sc_signed((bui(3,2),ui(1,0))) = -6 +sc_unsigned((bui(3,2),ui(1,0))) = 10 + +sc_int_base((bui(3,2),bui(1,0))) = -6 +sc_uint_base((bui(3,2),bui(1,0))) = 10 +sc_signed((bui(3,2),bui(1,0))) = -6 +sc_unsigned((bui(3,2),bui(1,0))) = 10 + +sc_int_base((bui(3,2),bi(1,0))) = -6 +sc_uint_base((bui(3,2),bi(1,0))) = 10 +sc_signed((bui(3,2),bi(1,0))) = -6 +sc_unsigned((bui(3,2),bi(1,0))) = 10 + +sc_int_base((i(3,2),i(1,0))) = -6 +sc_uint_base((i(3,2),i(1,0))) = 10 +sc_signed((i(3,2),i(1,0))) = -6 +sc_unsigned((i(3,2),i(1,0))) = 10 + +sc_int_base((i(3,2),ui(1,0))) = -6 +sc_uint_base((i(3,2),ui(1,0))) = 10 +sc_signed((i(3,2),ui(1,0))) = -6 +sc_unsigned((i(3,2),ui(1,0))) = 10 + +sc_int_base((i(3,2),bui(1,0))) = -6 +sc_uint_base((i(3,2),bui(1,0))) = 10 +sc_signed((i(3,2),bui(1,0))) = -6 +sc_unsigned((i(3,2),bui(1,0))) = 10 + +sc_int_base((i(3,2),bi(1,0))) = -6 +sc_uint_base((i(3,2),bi(1,0))) = 10 +sc_signed((i(3,2),bi(1,0))) = -6 +sc_unsigned((i(3,2),bi(1,0))) = 10 + +sc_int_base((ui(3,2),i(1,0))) = -6 +sc_uint_base((ui(3,2),i(1,0))) = 10 +sc_signed((ui(3,2),i(1,0))) = -6 +sc_unsigned((ui(3,2),i(1,0))) = 10 + +sc_int_base((ui(3,2),ui(1,0))) = -6 +sc_uint_base((ui(3,2),ui(1,0))) = 10 +sc_signed((ui(3,2),ui(1,0))) = -6 +sc_unsigned((ui(3,2),ui(1,0))) = 10 + +sc_int_base((ui(3,2),bui(1,0))) = -6 +sc_uint_base((ui(3,2),bui(1,0))) = 10 +sc_signed((ui(3,2),bui(1,0))) = -6 +sc_unsigned((ui(3,2),bui(1,0))) = 10 + +sc_int_base((ui(3,2),bi(1,0))) = -6 +sc_uint_base((ui(3,2),bi(1,0))) = 10 +sc_signed((ui(3,2),bi(1,0))) = -6 +sc_unsigned((ui(3,2),bi(1,0))) = 10 + diff --git a/src/systemc/tests/systemc/datatypes/misc/signless_conversion/signless_conversion.cpp b/src/systemc/tests/systemc/datatypes/misc/signless_conversion/signless_conversion.cpp new file mode 100644 index 000000000..9b1d169cf --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/signless_conversion/signless_conversion.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + signless_conversions.cpp -- Test Casts Of Sign-Less Values + + Original Author: Andy Goodrich, Forte Design Systems, 7 Apr 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define DISP(exp) \ +{ \ + cout << #exp << " = " << exp << endl; \ +} + +#define DISPLAY(var) \ +{ \ + DISP( sc_int_base(var) ) \ + DISP( sc_uint_base(var) ) \ + DISP( sc_signed(var) ) \ + DISP( sc_unsigned(var) ) \ + cout << endl; \ +} + +int +sc_main( int argc, char* argv[] ) +{ + sc_bigint<6> bi; + sc_biguint<6> bui; + sc_bv<4> bv; + sc_int<6> i; + sc_lv<4> lv; + sc_int<6> ui; + + bi = 10; + bui = 10; + bv = "1010"; + i = 10; + lv = "1010"; + ui = 10; + + DISPLAY(bi(3,0)) + DISPLAY(bui(3,0)) + DISPLAY(bv) + DISPLAY(i(3,0)) + DISPLAY(lv) + DISPLAY(ui(3,0)) + + DISPLAY((bi(3,2),i(1,0))) + DISPLAY((bi(3,2),ui(1,0))) + DISPLAY((bi(3,2),bui(1,0))) + DISPLAY((bi(3,2),bi(1,0))) + + DISPLAY((bui(3,2),i(1,0))) + DISPLAY((bui(3,2),ui(1,0))) + DISPLAY((bui(3,2),bui(1,0))) + DISPLAY((bui(3,2),bi(1,0))) + + DISPLAY((i(3,2),i(1,0))) + DISPLAY((i(3,2),ui(1,0))) + DISPLAY((i(3,2),bui(1,0))) + DISPLAY((i(3,2),bi(1,0))) + + DISPLAY((ui(3,2),i(1,0))) + DISPLAY((ui(3,2),ui(1,0))) + DISPLAY((ui(3,2),bui(1,0))) + DISPLAY((ui(3,2),bi(1,0))) + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/test01/golden/test01.log b/src/systemc/tests/systemc/datatypes/misc/test01/golden/test01.log new file mode 100644 index 000000000..f5e17034e --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test01/golden/test01.log @@ -0,0 +1,199 @@ +SystemC Simulation + +*** test_bit *** + +sc_bit + +Info: (I804) /IEEE_Std_1666/deprecated: sc_bit is deprecated, use bool instead +1 +1 +0 +0 + +sc_logic +0 +0 +1 +1 +Z +Z +X +X + +sc_bv +0101 +0101 +11110000 +11110000 + +sc_lv +01ZX +01ZX +XXZZ1100 +XXZZ1100 + +sc_bitref +1 +1 +X +X + +sc_subref +01 +01 +ZX +ZX + +sc_concref + +*** test_int *** + +sc_int +-7 +-7 +15 +15 + +sc_int_bitref +1 +1 +1 +1 + +sc_int_subref +9 +9 +15 +15 + +sc_int_concref +1 +1 +3 +3 + +sc_uint +9 +9 +15 +15 + +sc_uint_bitref +1 +1 +1 +1 + +sc_uint_subref +9 +9 +15 +15 + +sc_uint_concref +1 +1 +3 +3 + +sc_bigint +-7 +-7 +15 +15 + +sc_signed_bitref +1 +1 +1 +1 + +sc_signed_subref +9 +9 +15 +15 +1 +1 +3 +3 + +sc_biguint +9 +9 +15 +15 + +sc_unsigned_bitref +1 +1 +1 +1 + +sc_unsigned_subref +9 +9 +15 +15 +1 +1 +3 +3 + +*** test_fx *** + +sc_fxnum +-7 +-7 +15 +15 + +sc_fxnum_fast +-7 +-7 +15 +15 + +sc_fxnum_bitref +1 +1 +1 +1 + +sc_fxnum_fast_bitref +1 +1 +1 +1 + +sc_fxnum_subref +1001 +1001 +1111 +1111 + +sc_fxnum_fast_subref +1001 +1001 +1111 +1111 + +sc_fxval +-7 +-7 +15 +15 + +sc_fxval_fast +-7 +-7 +15 +15 + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/datatypes/misc/test01/test01.cpp b/src/systemc/tests/systemc/datatypes/misc/test01/test01.cpp new file mode 100644 index 000000000..6130986db --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test01/test01.cpp @@ -0,0 +1,470 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of i/o streaming of the datatypes + +#define SC_INCLUDE_FX +#include "systemc.h" +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) +# include "sstream" +#else +# include "strstream.h" +#endif + +// THE FOLLOWING SPECIALIZATIONS FOR sc_bitref AND sc_subref GO AWAY +// WHEN sc_bv and sc_lv ARE INTEGRATED INTO THE NORMAL CONCATENATION SCHEME: + +template +void +test( sc_dt::sc_bitref a ) +{ +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::stringstream ss; +# else + strstream ss; +# endif + + cout << a << endl; + ss << a; + ss >> a; + cout << a << endl; +} + +template +void +test( sc_dt::sc_subref a ) +{ +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::stringstream ss; +# else + strstream ss; +# endif + + cout << a << endl; + ss << a; + ss >> a; + cout << a << endl; +} + + +void +test( sc_dt::sc_fxnum_bitref a ) +{ +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::stringstream ss; +# else + strstream ss; +# endif + + cout << a << endl; + ss << a; + ss >> a; + cout << a << endl; +} + +void +test( sc_dt::sc_fxnum_fast_bitref a ) +{ +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::stringstream ss; +# else + strstream ss; +# endif + + cout << a << endl; + ss << a; + ss >> a; + cout << a << endl; +} + + +void +test( sc_dt::sc_fxnum_subref a ) +{ +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::stringstream ss; +# else + strstream ss; +# endif + + cout << a << endl; + ss << a; + ss >> a; + cout << a << endl; +} + +void +test( sc_dt::sc_fxnum_fast_subref a ) +{ +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::stringstream ss; +# else + strstream ss; +# endif + + cout << a << endl; + ss << a; + ss >> a; + cout << a << endl; +} + +template +void +test( T& a ) +{ +# if (defined(__GNUC__) && (__GNUC__ >= 3))|| (defined(_MSC_VER) && (_MSC_VER >= 1300)) + std::stringstream ss; +# else + strstream ss; +# endif + + cout << a << endl; + ss << a; + ss >> a; + cout << a << endl; +} + +void +test_bit() +{ + cout << "\n*** test_bit ***" << endl; + + // sc_bit + { + cout << "\nsc_bit" << endl; + sc_bit a( true ); + sc_bit b( false ); + test( a ); + test( b ); + } + + // sc_logic + { + cout << "\nsc_logic" << endl; + sc_logic a( SC_LOGIC_0 ); + sc_logic b( SC_LOGIC_1 ); + sc_logic c( SC_LOGIC_Z ); + sc_logic d( SC_LOGIC_X ); + test( a ); + test( b ); + test( c ); + test( d ); + } + + // sc_bv + { + cout << "\nsc_bv" << endl; + sc_bv<4> a( "0101" ); + sc_bv<8> b( "11110000" ); + test( a ); + test( b ); + } + + // sc_lv + { + cout << "\nsc_lv" << endl; + sc_lv<4> a( "01ZX" ); + sc_lv<8> b( "XXZZ1100" ); + test( a ); + test( b ); + } + + // sc_bitref + { + cout << "\nsc_bitref" << endl; + sc_bv<4> a( "0101" ); + sc_lv<4> b( "01ZX" ); + test( a[0] ); + test( b[0] ); + } + + // sc_subref + { + cout << "\nsc_subref" << endl; + sc_bv<4> a( "0101" ); + sc_lv<4> b( "01ZX" ); + test( a( 1, 0 ) ); + test( b( 1, 0 ) ); + } + + // sc_concref + { + cout << "\nsc_concref" << endl; + sc_bv<4> a( "0101" ); + sc_lv<4> b( "01ZX" ); +#if 0 // #### re-enable when concatenation support is homogenous. + test( ( a[1], a[0] ) ); + test( ( b[1], b[0] ) ); +#endif // 0 + } +} + +void +test_int() +{ + cout << "\n*** test_int ***" << endl; + + // sc_int + { + cout << "\nsc_int" << endl; + sc_int<4> a = -7; + sc_int<8> b = 15; + test( a ); + test( b ); + } + + // sc_int_bitref + { + cout << "\nsc_int_bitref" << endl; + sc_int<4> a = -7; + sc_int<8> b = 15; + test( a[0] ); + test( b[0] ); + } + + // sc_int_subref + { + cout << "\nsc_int_subref" << endl; + sc_int<4> a = -7; + sc_int<8> b = 15; + test( a( 3, 0 ) ); + test( b( 3, 0 ) ); + } + + // sc_int_concref + { + cout << "\nsc_int_concref" << endl; + sc_int<4> a = -7; + sc_int<8> b = 15; + test( (a[1], a[0]) ); + test( (b[1], b[0]) ); + } + + // sc_uint + { + cout << "\nsc_uint" << endl; + sc_uint<4> a = -7; + sc_uint<8> b = 15; + test( a ); + test( b ); + } + + // sc_uint_bitref + { + cout << "\nsc_uint_bitref" << endl; + sc_uint<4> a = -7; + sc_uint<8> b = 15; + test( a[0] ); + test( b[0] ); + } + + // sc_uint_subref + { + cout << "\nsc_uint_subref" << endl; + sc_uint<4> a = -7; + sc_uint<8> b = 15; + test( a( 3, 0 ) ); + test( b( 3, 0 ) ); + } + + // sc_uint_concref + { + cout << "\nsc_uint_concref" << endl; + sc_uint<4> a = -7; + sc_uint<8> b = 15; + test( (a[1], a[0]) ); + test( (b[1], b[0]) ); + } + + // sc_bigint + { + cout << "\nsc_bigint" << endl; + sc_bigint<4> a = -7; + sc_bigint<8> b = 15; + test( a ); + test( b ); + } + + // sc_signed_bitref + { + cout << "\nsc_signed_bitref" << endl; + sc_bigint<4> a = -7; + sc_bigint<8> b = 15; + test( a[0] ); + test( b[0] ); + } + + // sc_signed_subref + { + cout << "\nsc_signed_subref" << endl; + sc_bigint<4> a = -7; + sc_bigint<8> b = 15; + test( a( 3, 0 ) ); + test( b( 3, 0 ) ); + } + + // sc_signed_concref + { + sc_bigint<4> a = -7; + sc_bigint<8> b = 15; + test( (a[1], a[0]) ); + test( (b[1], b[0]) ); + } + + // sc_biguint + { + cout << "\nsc_biguint" << endl; + sc_biguint<4> a = -7; + sc_biguint<8> b = 15; + test( a ); + test( b ); + } + + // sc_unsigned_bitref + { + cout << "\nsc_unsigned_bitref" << endl; + sc_biguint<4> a = -7; + sc_biguint<8> b = 15; + test( a[0] ); + test( b[0] ); + } + + // sc_unsigned_subref + { + cout << "\nsc_unsigned_subref" << endl; + sc_biguint<4> a = -7; + sc_biguint<8> b = 15; + test( a( 3, 0 ) ); + test( b( 3, 0 ) ); + } + + // sc_unsigned_concref + { + sc_biguint<4> a = -7; + sc_biguint<8> b = 15; + test( (a[1], a[0]) ); + test( (b[1], b[0]) ); + } +} + +void +test_fx() +{ + cout << "\n*** test_fx ***" << endl; + + // sc_fxnum + { + cout << "\nsc_fxnum" << endl; + sc_fixed<4,4> a = -7; + sc_fixed<8,8> b = 15; + test( a ); + test( b ); + } + + // sc_fxnum_fast + { + cout << "\nsc_fxnum_fast" << endl; + sc_fixed_fast<4,4> a = -7; + sc_fixed_fast<8,8> b = 15; + test( a ); + test( b ); + } + + // sc_fxnum_bitref + { + cout << "\nsc_fxnum_bitref" << endl; + sc_fixed<4,4> a = -7; + sc_fixed<8,8> b = 15; + test( a[0] ); + test( b[0] ); + } + + // sc_fxnum_fast_bitref + { + cout << "\nsc_fxnum_fast_bitref" << endl; + sc_fixed_fast<4,4> a = -7; + sc_fixed_fast<8,8> b = 15; + test( a[0] ); + test( b[0] ); + } + + // sc_fxnum_subref + { + cout << "\nsc_fxnum_subref" << endl; + sc_fixed<4,4> a = -7; + sc_fixed<8,8> b = 15; + test( a( 3, 0 ) ); + test( b( 3, 0 ) ); + } + + // sc_fxnum_fast_subref + { + cout << "\nsc_fxnum_fast_subref" << endl; + sc_fixed_fast<4,4> a = -7; + sc_fixed_fast<8,8> b = 15; + test( a( 3, 0 ) ); + test( b( 3, 0 ) ); + } + + // sc_fxval + { + cout << "\nsc_fxval" << endl; + sc_fxval a(-7); + sc_fxval b(15); + test( a ); + test( b ); + } + + // sc_fxval_fast + { + cout << "\nsc_fxval_fast" << endl; + sc_fxval_fast a(-7); + sc_fxval_fast b(15); + test( a ); + test( b ); + } +} + +int +sc_main( int, char*[] ) +{ + test_bit(); + test_int(); + test_fx(); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log new file mode 100644 index 000000000..97c12cad1 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log @@ -0,0 +1,156 @@ +SystemC Simulation + +*** test_bit() + +-86 +170 +-86 +170 + +-6 +10 +-6 +10 + +-52 +204 +-52 +204 + +-4 +12 +-4 +12 + +-84 +172 +-84 +172 + +*** test_fx() + +-5 +4294967291 +-5 +4294967291 +-5.375 + +-6 +10 +-6 +10 + +-5 +4294967291 +-5 +4294967291 +-5.375 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +*** test_int() + +-86 +170 +-86 +170 +-86 +-86 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +-86 +4294967210 +-86 +4294967210 +-86 +-86 +18446744073709551530 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 diff --git a/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.bsd64 b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.bsd64 new file mode 100644 index 000000000..126a4fc9c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.bsd64 @@ -0,0 +1,156 @@ +SystemC Simulation + +*** test_bit() + +-86 +170 +-86 +170 + +-6 +10 +-6 +10 + +-52 +204 +-52 +204 + +-4 +12 +-4 +12 + +-84 +172 +-84 +172 + +*** test_fx() + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +*** test_int() + +-86 +170 +-86 +170 +-86 +-86 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +-86 +4294967210 +-86 +18446744073709551530 +-86 +-86 +18446744073709551530 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 diff --git a/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.cygwin64 b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.cygwin64 new file mode 100644 index 000000000..126a4fc9c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.cygwin64 @@ -0,0 +1,156 @@ +SystemC Simulation + +*** test_bit() + +-86 +170 +-86 +170 + +-6 +10 +-6 +10 + +-52 +204 +-52 +204 + +-4 +12 +-4 +12 + +-84 +172 +-84 +172 + +*** test_fx() + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +*** test_int() + +-86 +170 +-86 +170 +-86 +-86 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +-86 +4294967210 +-86 +18446744073709551530 +-86 +-86 +18446744073709551530 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 diff --git a/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.linux64 b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.linux64 new file mode 100644 index 000000000..126a4fc9c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.linux64 @@ -0,0 +1,156 @@ +SystemC Simulation + +*** test_bit() + +-86 +170 +-86 +170 + +-6 +10 +-6 +10 + +-52 +204 +-52 +204 + +-4 +12 +-4 +12 + +-84 +172 +-84 +172 + +*** test_fx() + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +*** test_int() + +-86 +170 +-86 +170 +-86 +-86 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +-86 +4294967210 +-86 +18446744073709551530 +-86 +-86 +18446744073709551530 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 diff --git a/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.linuxaarch64 b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.linuxaarch64 new file mode 100644 index 000000000..126a4fc9c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.linuxaarch64 @@ -0,0 +1,156 @@ +SystemC Simulation + +*** test_bit() + +-86 +170 +-86 +170 + +-6 +10 +-6 +10 + +-52 +204 +-52 +204 + +-4 +12 +-4 +12 + +-84 +172 +-84 +172 + +*** test_fx() + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +*** test_int() + +-86 +170 +-86 +170 +-86 +-86 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +-86 +4294967210 +-86 +18446744073709551530 +-86 +-86 +18446744073709551530 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 diff --git a/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.macosx64 b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.macosx64 new file mode 100644 index 000000000..126a4fc9c --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test02/golden/test02.log.macosx64 @@ -0,0 +1,156 @@ +SystemC Simulation + +*** test_bit() + +-86 +170 +-86 +170 + +-6 +10 +-6 +10 + +-52 +204 +-52 +204 + +-4 +12 +-4 +12 + +-84 +172 +-84 +172 + +*** test_fx() + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +-5 +4294967291 +-5 +18446744073709551611 +-5.375 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +10 +10 +10 +10 +10.625 + +-6 +10 +-6 +10 + +*** test_int() + +-86 +170 +-86 +170 +-86 +-86 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +-86 +4294967210 +-86 +18446744073709551530 +-86 +-86 +18446744073709551530 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 + +170 +170 +170 +170 +170 +170 +170 + +10 +10 +10 +10 +10 +10 +10 + +170 +170 +170 +170 +170 +170 +170 diff --git a/src/systemc/tests/systemc/datatypes/misc/test02/test02.cpp b/src/systemc/tests/systemc/datatypes/misc/test02/test02.cpp new file mode 100644 index 000000000..433159c83 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test02/test02.cpp @@ -0,0 +1,143 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of explicit conversions of the datatypes + +#define SC_INCLUDE_FX +#include "systemc.h" + + +template +void +write1( const T& a ) +{ + cout << endl; + cout << a.to_int() << endl; + cout << a.to_uint() << endl; + cout << a.to_long() << endl; + cout << a.to_ulong() << endl; +} + +template +void +write2( const T& a ) +{ + write1( a ); + cout << a.to_double() << endl; +} + +template +void +write3( const T& a ) +{ + write2( a ); + cout << a.to_int64() << endl; + cout << a.to_uint64() << endl; +} + + +void +test_bit() +{ + cout << "\n*** test_bit()" << endl; + + sc_bv<8> a( "10101010" ); + write1( a ); + write1( a.range( 3, 0 ) ); + + sc_lv<8> b( "11001100" ); + write1( b ); + write1( b.range( 3, 0 ) ); + + write1( ( a.range( 3, 0 ), b.range( 3, 0 ) ) ); +} + +void +test_fx() +{ + cout << "\n*** test_fx()" << endl; + + sc_fixed<8,4> a( "0b1010.1010" ); + write2( a ); + write1( a.range( 3, 0 ) ); + + sc_fixed_fast<8,4> b( "0b1010.1010" ); + write2( b ); + write1( b.range( 3, 0 ) ); + + sc_ufixed<8,4> c( "0b1010.1010" ); + write2( c ); + write1( c.range( 3, 0 ) ); + + sc_ufixed_fast<8,4> d( "0b1010.1010" ); + write2( d ); + write1( d.range( 3, 0 ) ); +} + +void +test_int() +{ + cout << "\n*** test_int()" << endl; + + sc_bigint<8> a( "0b10101010" ); + write3( a ); + write3( a.range( 3, 0 ) ); + + sc_biguint<8> b( "0b10101010" ); + write3( b ); + write3( b.range( 3, 0 ) ); + + sc_int<8> c( -86 ); + write3( c ); + write3( c.range( 3, 0 ) ); + write3( ( c.range( 7, 4 ), c.range( 3, 0 ) ) ); + + sc_uint<8> d( 170 ); + write3( d ); + write3( d.range( 3, 0 ) ); + write3( ( d.range( 7, 4 ), d.range( 3, 0 ) ) ); +} + +int +sc_main( int, char*[] ) +{ + test_bit(); + test_fx(); + test_int(); + + return 0; +} diff --git a/src/systemc/tests/systemc/datatypes/misc/test03/golden/test03.log b/src/systemc/tests/systemc/datatypes/misc/test03/golden/test03.log new file mode 100644 index 000000000..460b208ea --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test03/golden/test03.log @@ -0,0 +1,66 @@ +SystemC Simulation + +*** test_sc_length_param *** +(32) +(5) + +Exception caught +Error: (E300) total wordlength <= 0 is not valid +In file: +(5) +(32) +(5) +1 +0 +5 +42 +(42) +(42) +sc_length_param +( +len = 42 +) + +*** test_default_ctors *** + +sc_bv_base +32 +5 +42 +5 +32 + +sc_lv_base +32 +5 +42 +5 +32 + +sc_int_base +32 +5 +42 +5 +32 + +sc_uint_base +32 +5 +42 +5 +32 + +sc_signed +32 +5 +42 +5 +32 + +sc_unsigned +32 +5 +42 +5 +32 diff --git a/src/systemc/tests/systemc/datatypes/misc/test03/test03.cpp b/src/systemc/tests/systemc/datatypes/misc/test03/test03.cpp new file mode 100644 index 000000000..b7f916347 --- /dev/null +++ b/src/systemc/tests/systemc/datatypes/misc/test03/test03.cpp @@ -0,0 +1,131 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-19 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_length_param and sc_length_context and their use in the datatype +// base classes. + +#include "systemc.h" + +void +test_sc_length_param() +{ + cout << "\n*** test_sc_length_param ***" << endl; + + sc_length_param a; + cout << a << endl; + + sc_length_param b( 5 ); + cout << b << endl; + + try { + sc_length_param c( -1 ); + cout << c << endl; + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + sc_length_param d( b ); + cout << d << endl; + + sc_dt::sc_without_context foo; + sc_length_param e( foo ); + cout << e << endl; + + e = b; + cout << e << endl; + + cout << (e == b) << endl; + cout << (e != b) << endl; + + cout << e.len() << endl; + e.len( 42 ); + cout << e.len() << endl; + + cout << e.to_string() << endl; + + e.print(); + cout << endl; + e.dump(); +} + +#define TEST_DEFAULT_CTOR(tp) \ +{ \ + cout << "\n" << #tp << endl; \ + \ + tp a; \ + cout << a.length() << endl; \ + \ + sc_length_context con1( sc_length_param( 5 ) ); \ + tp b; \ + cout << b.length() << endl; \ + \ + sc_length_context con2( sc_length_param( 42 ) ); \ + tp c; \ + cout << c.length() << endl; \ + \ + con2.end(); \ + tp d; \ + cout << d.length() << endl; \ + \ + con1.end(); \ + tp e; \ + cout << e.length() << endl; \ +} + +void +test_default_ctors() +{ + cout << "\n*** test_default_ctors ***" << endl; + + TEST_DEFAULT_CTOR(sc_bv_base); + TEST_DEFAULT_CTOR(sc_lv_base); + + TEST_DEFAULT_CTOR(sc_int_base); + TEST_DEFAULT_CTOR(sc_uint_base); + TEST_DEFAULT_CTOR(sc_signed); + TEST_DEFAULT_CTOR(sc_unsigned); +} + +int +sc_main( int, char*[] ) +{ + test_sc_length_param(); + test_default_ctors(); + + return 0; +} diff --git a/src/systemc/tests/systemc/examples/aes/aes.cpp b/src/systemc/tests/systemc/examples/aes/aes.cpp new file mode 100644 index 000000000..45fc3f869 --- /dev/null +++ b/src/systemc/tests/systemc/examples/aes/aes.cpp @@ -0,0 +1,1164 @@ +#include + +#define USE_TABLE 1 + +#if DEBUG +void +Dump_R(char *s, sc_uint<8> X[4][4]) +{ + printf("%s R\n", s); + for(int i = 0; i < 4; i++){ + printf("|"); + for(int j = 0; j < 4; j++){ + printf("%02x|", (int)X[i][j]); + } + printf("\n"); + } +} + +void +Dump_rk(char *s, sc_uint<8> X[11][4][4]) +{ + printf("%s rk\n", s); + for(int i = 0; i < 11; i++){ + printf("%2d: ", (int)i); + for(int j = 0; j < 4; j++){ + printf("|"); + for(int k = 0; k < 4; k++){ + printf("%02x|", (int)X[i][j][k]); + } + printf(" "); + } + printf("\n"); + } +} +#endif + +SC_MODULE(AES_Base) +{ + SC_CTOR(AES_Base) {} + + void AddRoundKey(sc_uint<8> a[4][4], const sc_uint<8> rk[4][4]); + sc_uint<8> S_Table(sc_uint<8> a); + void SchedKey(sc_uint<8> k[4][4], sc_uint<8> W[11][4][4]); +}; + +sc_uint<8> +AES_Base::S_Table(sc_uint<8> a) +{ + sc_uint<8> t; +#if USE_TABLE + { + static sc_uint<8> S[256] = { + 99, 124, 119, 123, 242, 107, 111, 197, + 48, 1, 103, 43, 254, 215, 171, 118, + 202, 130, 201, 125, 250, 89, 71, 240, + 173, 212, 162, 175, 156, 164, 114, 192, + 183, 253, 147, 38, 54, 63, 247, 204, + 52, 165, 229, 241, 113, 216, 49, 21, + 4, 199, 35, 195, 24, 150, 5, 154, + 7, 18, 128, 226, 235, 39, 178, 117, + 9, 131, 44, 26, 27, 110, 90, 160, + 82, 59, 214, 179, 41, 227, 47, 132, + 83, 209, 0, 237, 32, 252, 177, 91, + 106, 203, 190, 57, 74, 76, 88, 207, + 208, 239, 170, 251, 67, 77, 51, 133, + 69, 249, 2, 127, 80, 60, 159, 168, + 81, 163, 64, 143, 146, 157, 56, 245, + 188, 182, 218, 33, 16, 255, 243, 210, + 205, 12, 19, 236, 95, 151, 68, 23, + 196, 167, 126, 61, 100, 93, 25, 115, + 96, 129, 79, 220, 34, 42, 144, 136, + 70, 238, 184, 20, 222, 94, 11, 219, + 224, 50, 58, 10, 73, 6, 36, 92, + 194, 211, 172, 98, 145, 149, 228, 121, + 231, 200, 55, 109, 141, 213, 78, 169, + 108, 86, 244, 234, 101, 122, 174, 8, + 186, 120, 37, 46, 28, 166, 180, 198, + 232, 221, 116, 31, 75, 189, 139, 138, + 112, 62, 181, 102, 72, 3, 246, 14, + 97, 53, 87, 185, 134, 193, 29, 158, + 225, 248, 152, 17, 105, 217, 142, 148, + 155, 30, 135, 233, 206, 85, 40, 223, + 140, 161, 137, 13, 191, 230, 66, 104, + 65, 153, 45, 15, 176, 84, 187, 22, + }; + t = S[a]; + } +#else +#define E(A,B) case A: t = B; break + switch(a){ + E( 0, 99); E( 1,124); E( 2,119); E( 3,123); E( 4,242); E( 5,107); + E( 6,111); E( 7,197); E( 8, 48); E( 9, 1); E( 10,103); E( 11, 43); + E( 12,254); E( 13,215); E( 14,171); E( 15,118); E( 16,202); E( 17,130); + E( 18,201); E( 19,125); E( 20,250); E( 21, 89); E( 22, 71); E( 23,240); + E( 24,173); E( 25,212); E( 26,162); E( 27,175); E( 28,156); E( 29,164); + E( 30,114); E( 31,192); E( 32,183); E( 33,253); E( 34,147); E( 35, 38); + E( 36, 54); E( 37, 63); E( 38,247); E( 39,204); E( 40, 52); E( 41,165); + E( 42,229); E( 43,241); E( 44,113); E( 45,216); E( 46, 49); E( 47, 21); + E( 48, 4); E( 49,199); E( 50, 35); E( 51,195); E( 52, 24); E( 53,150); + E( 54, 5); E( 55,154); E( 56, 7); E( 57, 18); E( 58,128); E( 59,226); + E( 60,235); E( 61, 39); E( 62,178); E( 63,117); E( 64, 9); E( 65,131); + E( 66, 44); E( 67, 26); E( 68, 27); E( 69,110); E( 70, 90); E( 71,160); + E( 72, 82); E( 73, 59); E( 74,214); E( 75,179); E( 76, 41); E( 77,227); + E( 78, 47); E( 79,132); E( 80, 83); E( 81,209); E( 82, 0); E( 83,237); + E( 84, 32); E( 85,252); E( 86,177); E( 87, 91); E( 88,106); E( 89,203); + E( 90,190); E( 91, 57); E( 92, 74); E( 93, 76); E( 94, 88); E( 95,207); + E( 96,208); E( 97,239); E( 98,170); E( 99,251); E(100, 67); E(101, 77); + E(102, 51); E(103,133); E(104, 69); E(105,249); E(106, 2); E(107,127); + E(108, 80); E(109, 60); E(110,159); E(111,168); E(112, 81); E(113,163); + E(114, 64); E(115,143); E(116,146); E(117,157); E(118, 56); E(119,245); + E(120,188); E(121,182); E(122,218); E(123, 33); E(124, 16); E(125,255); + E(126,243); E(127,210); E(128,205); E(129, 12); E(130, 19); E(131,236); + E(132, 95); E(133,151); E(134, 68); E(135, 23); E(136,196); E(137,167); + E(138,126); E(139, 61); E(140,100); E(141, 93); E(142, 25); E(143,115); + E(144, 96); E(145,129); E(146, 79); E(147,220); E(148, 34); E(149, 42); + E(150,144); E(151,136); E(152, 70); E(153,238); E(154,184); E(155, 20); + E(156,222); E(157, 94); E(158, 11); E(159,219); E(160,224); E(161, 50); + E(162, 58); E(163, 10); E(164, 73); E(165, 6); E(166, 36); E(167, 92); + E(168,194); E(169,211); E(170,172); E(171, 98); E(172,145); E(173,149); + E(174,228); E(175,121); E(176,231); E(177,200); E(178, 55); E(179,109); + E(180,141); E(181,213); E(182, 78); E(183,169); E(184,108); E(185, 86); + E(186,244); E(187,234); E(188,101); E(189,122); E(190,174); E(191, 8); + E(192,186); E(193,120); E(194, 37); E(195, 46); E(196, 28); E(197,166); + E(198,180); E(199,198); E(200,232); E(201,221); E(202,116); E(203, 31); + E(204, 75); E(205,189); E(206,139); E(207,138); E(208,112); E(209, 62); + E(210,181); E(211,102); E(212, 72); E(213, 3); E(214,246); E(215, 14); + E(216, 97); E(217, 53); E(218, 87); E(219,185); E(220,134); E(221,193); + E(222, 29); E(223,158); E(224,225); E(225,248); E(226,152); E(227, 17); + E(228,105); E(229,217); E(230,142); E(231,148); E(232,155); E(233, 30); + E(234,135); E(235,233); E(236,206); E(237, 85); E(238, 40); E(239,223); + E(240,140); E(241,161); E(242,137); E(243, 13); E(244,191); E(245,230); + E(246, 66); E(247,104); E(248, 65); E(249,153); E(250, 45); E(251, 15); + E(252,176); E(253, 84); E(254,187); E(255, 22); + } +#undef E +#endif + return(t); +} + + +void +AES_Base::AddRoundKey(sc_uint<8> a[4][4], const sc_uint<8> rk[4][4]) +{ + for( sc_uint<3> i = 0; i < 4; i++){ + for( sc_uint<3> j = 0; j < 4; j++){ + a[i][j] = a[i][j] ^ rk[i][j]; + } + } +} + +void +AES_Base::SchedKey(sc_uint<8> k[4][4], sc_uint<8> W[11][4][4]) +{ + sc_uint<3> i, j; + sc_uint<8> tk[4][4]; + sc_uint<8> tt; + sc_uint<4> t; + + for(j = 0; j < 4; j++){ + for(i = 0; i < 4; i++){ + tk[i][j] = k[i][j]; + } + } + + for(j = 0; j < 4; j++){ + for(i = 0; i < 4; i++){ + W[0][i][j] = tk[i][j]; + } + } + + for( t = 1; t < 11; t++){ + for(i = 0; i < 4; i++){ + tk[i][0] ^= S_Table(tk[(i+1)&3][3]); + } + +#if USE_TABLE + { static sc_uint<8> rcon[11] = { + 0x0, /* dummy entry to lineup with t's value */ + 0x01, + 0x02, + 0x04, + 0x08, + 0x10, + 0x20, + 0x40, + 0x80, + 0x1b, + 0x36 + }; + tt = rcon[t]; + } +#else + switch(t){ + case 1: tt = 0x01; break; /* 0000 0001 */ + case 2: tt = 0x02; break; /* 0000 0010 */ + case 3: tt = 0x04; break; /* 0000 0100 */ + case 4: tt = 0x08; break; /* 0000 1000 */ + case 5: tt = 0x10; break; /* 0001 0000 */ + case 6: tt = 0x20; break; /* 0010 0000 */ + case 7: tt = 0x40; break; /* 0100 0000 */ + case 8: tt = 0x80; break; /* 1000 0000 */ + case 9: tt = 0x1b; break; /* 0001 1011 */ + case 10: tt = 0x36; break; /* 0011 0110 */ + } +#endif + + tk[0][0] ^= tt; + + for(j = 1; j < 4; j++){ + for(i = 0; i < 4; i++){ + tk[i][j] ^= tk[i][j-1]; + } + } + + for(j = 0; j < 4; j++){ + for(i = 0; i < 4; i++){ + W[t][i][j] = tk[i][j]; + } + } + } +} + +class AES_Decrypt : public AES_Base { +public: + SC_HAS_PROCESS(AES_Decrypt); + AES_Decrypt(sc_module_name name, + sc_clock& pCLK, + sc_signal& pRST_X, + sc_signal& pIn_req, + sc_signal& pIn_ack, + sc_signal& pIn_cmd, + sc_signal >& pIn_wire, + sc_signal& pOut_req, + sc_signal& pOut_ack, + sc_signal >& pOut_wire + ) : AES_Base(name) + { + CLK(pCLK); RST_X(pRST_X); + In_req(pIn_req); In_ack(pIn_ack); In_cmd(pIn_cmd); In_wire(pIn_wire); + Out_req(pOut_req); Out_ack(pOut_ack); Out_wire(pOut_wire); + SC_CTHREAD(MainThread, this->CLK.pos()); + reset_signal_is(RST_X,false); + } + + sc_in_clk CLK; + sc_in RST_X; + + sc_in > In_wire; + sc_out In_req; + sc_in In_ack; + sc_in In_cmd; + + sc_out > Out_wire; + sc_in Out_req; + sc_out Out_ack; + +#define LOAD_KEY 0 +#define DECRYPT 1 + sc_uint<1> cmd; + + sc_uint<8> rk[11][4][4]; + sc_uint<8> R[4][4]; + + void MainThread(void); + void Reset(void); + + void Input(void); + void Output(void); + + void Decrypt(void); + + void InvMixColumns(sc_uint<8> a[4][4]); + void ShiftRows_Right_Rotate(sc_uint<8> a[4][4]); + void Substitution_Si(sc_uint<8> a[4][4]); + sc_uint<8> Si_Table(sc_uint<8> a); + + sc_uint<8> dmul9(const sc_uint<8> B); + sc_uint<8> dmulb(const sc_uint<8> B); + sc_uint<8> dmuld(const sc_uint<8> B); + sc_uint<8> dmule(const sc_uint<8> B); +}; + +void +AES_Decrypt::Reset(void) +{ + In_req = false; + Out_ack = false; +} + +void +AES_Decrypt::Input(void) +{ + sc_uint<8> t; + sc_biguint<128> t_In_wire; + + (void)wait(); + In_req = true; + + do { wait(); } while(!In_ack); + + cmd = In_cmd; + t_In_wire = In_wire.read(); + + /* + * no matter whether it's a decrypt + * or a key_schedule, get the input pins + * into R[][]. + */ + for(int i = 0; i < 4; i++){ + for(int j = 0; j < 4; j++){ + for( int k = 0; k < 8; k++){ + t[k] = t_In_wire[(i*4+j)*8+k]; + } + R[i][j] = t; + } + } + + In_req = false; + + //Dump_R("AES_Descrypt::Input R", R); +} + +void +AES_Decrypt::Output(void) +{ + sc_uint<8> t; + sc_biguint<128> t_Out_wire; + + do { (void)wait(); } while(!Out_req); + + /* + * if it's a decrypt, drive R[][] onto output pins + */ + if( cmd == DECRYPT){ + for(int i = 0; i < 4; i++){ + for(int j = 0; j < 4; j++){ + t = R[i][j]; + for( int k = 0; k < 8; k++){ + t_Out_wire[(i*4+j)*8+k] = t[k]; + } + } + } + Out_wire.write(t_Out_wire); + + //Dump_R("AES_Descrypt::Output R", R); + } + + Out_ack = true; + (void)wait(); + Out_ack = false; + +} + +void +AES_Decrypt::MainThread(void) +{ + (void)Reset(); + + { + while(!RST_X) + (void)wait(); + } + + for(;;){ + (void)Input(); + + if( cmd == LOAD_KEY ){ + /* + * take R[][] and expand + * it into rk[][][] + */ + (void)SchedKey(R, rk); + (void)wait(3); + + //Dump_rk("AES_Descrypt::MainThread rk", rk); + } else { + /* + * take R[][] and rk[][][] + * and decrypt the data inplace + * into R[][] + */ + (void)Decrypt(); + (void)wait(12); + (void)Output(); + } + + } +} + +void +AES_Decrypt::Decrypt(void) +{ + (void)AddRoundKey(R,rk[10]); + //Dump_R("10: AES_Decrypt::AddRoundKey", R); + + (void)Substitution_Si(R); + //printf("%d: ", 10); Dump_R("AES_Decrypt::Substitution_Si", R); + + (void)ShiftRows_Right_Rotate(R); + //printf("%d: ", 10); Dump_R("AES_Decrypt::ShiftRows_Right_Rotate", R); + + for(sc_uint<4> i = 9; i > 0; i--){ + (void)AddRoundKey(R, rk[i]); + //printf("%d: ", (int)i); Dump_R("AES_Decrypt::AddRoundKey", R); + + (void)InvMixColumns(R); + //printf("%d: ", (int)i); Dump_R("AES_Decrypt::InvMixColums", R); + + (void)Substitution_Si(R); + //printf("%d: ", (int)i); Dump_R("AES_Decrypt::Substitution_Si", R); + + (void)ShiftRows_Right_Rotate(R); + //printf("%d: ", (int)i); Dump_R("AES_Decrypt::ShiftRows_Right_Rotate", R); + } + + (void)AddRoundKey(R, rk[0]); + //Dump_R("0: AES_Decrypt::AddRoundKey", R); +} + +sc_uint<8> +AES_Decrypt::Si_Table(sc_uint<8> a) +{ + sc_uint<8> t; +#if USE_TABLE + { + static sc_uint<8> Si[256] = { + 82, 9, 106, 213, 48, 54, 165, 56, + 191, 64, 163, 158, 129, 243, 215, 251, + 124, 227, 57, 130, 155, 47, 255, 135, + 52, 142, 67, 68, 196, 222, 233, 203, + 84, 123, 148, 50, 166, 194, 35, 61, + 238, 76, 149, 11, 66, 250, 195, 78, + 8, 46, 161, 102, 40, 217, 36, 178, + 118, 91, 162, 73, 109, 139, 209, 37, + 114, 248, 246, 100, 134, 104, 152, 22, + 212, 164, 92, 204, 93, 101, 182, 146, + 108, 112, 72, 80, 253, 237, 185, 218, + 94, 21, 70, 87, 167, 141, 157, 132, + 144, 216, 171, 0, 140, 188, 211, 10, + 247, 228, 88, 5, 184, 179, 69, 6, + 208, 44, 30, 143, 202, 63, 15, 2, + 193, 175, 189, 3, 1, 19, 138, 107, + 58, 145, 17, 65, 79, 103, 220, 234, + 151, 242, 207, 206, 240, 180, 230, 115, + 150, 172, 116, 34, 231, 173, 53, 133, + 226, 249, 55, 232, 28, 117, 223, 110, + 71, 241, 26, 113, 29, 41, 197, 137, + 111, 183, 98, 14, 170, 24, 190, 27, + 252, 86, 62, 75, 198, 210, 121, 32, + 154, 219, 192, 254, 120, 205, 90, 244, + 31, 221, 168, 51, 136, 7, 199, 49, + 177, 18, 16, 89, 39, 128, 236, 95, + 96, 81, 127, 169, 25, 181, 74, 13, + 45, 229, 122, 159, 147, 201, 156, 239, + 160, 224, 59, 77, 174, 42, 245, 176, + 200, 235, 187, 60, 131, 83, 153, 97, + 23, 43, 4, 126, 186, 119, 214, 38, + 225, 105, 20, 99, 85, 33, 12, 125, + }; + t = Si[a]; + } +#else +#define E(A,B) case A: t = B; break + switch(a){ + E( 0, 82); E( 1, 9); E( 2,106); E( 3,213); E( 4, 48); E( 5, 54); + E( 6,165); E( 7, 56); E( 8,191); E( 9, 64); E( 10,163); E( 11,158); + E( 12,129); E( 13,243); E( 14,215); E( 15,251); E( 16,124); E( 17,227); + E( 18, 57); E( 19,130); E( 20,155); E( 21, 47); E( 22,255); E( 23,135); + E( 24, 52); E( 25,142); E( 26, 67); E( 27, 68); E( 28,196); E( 29,222); + E( 30,233); E( 31,203); E( 32, 84); E( 33,123); E( 34,148); E( 35, 50); + E( 36,166); E( 37,194); E( 38, 35); E( 39, 61); E( 40,238); E( 41, 76); + E( 42,149); E( 43, 11); E( 44, 66); E( 45,250); E( 46,195); E( 47, 78); + E( 48, 8); E( 49, 46); E( 50,161); E( 51,102); E( 52, 40); E( 53,217); + E( 54, 36); E( 55,178); E( 56,118); E( 57, 91); E( 58,162); E( 59, 73); + E( 60,109); E( 61,139); E( 62,209); E( 63, 37); E( 64,114); E( 65,248); + E( 66,246); E( 67,100); E( 68,134); E( 69,104); E( 70,152); E( 71, 22); + E( 72,212); E( 73,164); E( 74, 92); E( 75,204); E( 76, 93); E( 77,101); + E( 78,182); E( 79,146); E( 80,108); E( 81,112); E( 82, 72); E( 83, 80); + E( 84,253); E( 85,237); E( 86,185); E( 87,218); E( 88, 94); E( 89, 21); + E( 90, 70); E( 91, 87); E( 92,167); E( 93,141); E( 94,157); E( 95,132); + E( 96,144); E( 97,216); E( 98,171); E( 99, 0); E(100,140); E(101,188); + E(102,211); E(103, 10); E(104,247); E(105,228); E(106, 88); E(107, 5); + E(108,184); E(109,179); E(110, 69); E(111, 6); E(112,208); E(113, 44); + E(114, 30); E(115,143); E(116,202); E(117, 63); E(118, 15); E(119, 2); + E(120,193); E(121,175); E(122,189); E(123, 3); E(124, 1); E(125, 19); + E(126,138); E(127,107); E(128, 58); E(129,145); E(130, 17); E(131, 65); + E(132, 79); E(133,103); E(134,220); E(135,234); E(136,151); E(137,242); + E(138,207); E(139,206); E(140,240); E(141,180); E(142,230); E(143,115); + E(144,150); E(145,172); E(146,116); E(147, 34); E(148,231); E(149,173); + E(150, 53); E(151,133); E(152,226); E(153,249); E(154, 55); E(155,232); + E(156, 28); E(157,117); E(158,223); E(159,110); E(160, 71); E(161,241); + E(162, 26); E(163,113); E(164, 29); E(165, 41); E(166,197); E(167,137); + E(168,111); E(169,183); E(170, 98); E(171, 14); E(172,170); E(173, 24); + E(174,190); E(175, 27); E(176,252); E(177, 86); E(178, 62); E(179, 75); + E(180,198); E(181,210); E(182,121); E(183, 32); E(184,154); E(185,219); + E(186,192); E(187,254); E(188,120); E(189,205); E(190, 90); E(191,244); + E(192, 31); E(193,221); E(194,168); E(195, 51); E(196,136); E(197, 7); + E(198,199); E(199, 49); E(200,177); E(201, 18); E(202, 16); E(203, 89); + E(204, 39); E(205,128); E(206,236); E(207, 95); E(208, 96); E(209, 81); + E(210,127); E(211,169); E(212, 25); E(213,181); E(214, 74); E(215, 13); + E(216, 45); E(217,229); E(218,122); E(219,159); E(220,147); E(221,201); + E(222,156); E(223,239); E(224,160); E(225,224); E(226, 59); E(227, 77); + E(228,174); E(229, 42); E(230,245); E(231,176); E(232,200); E(233,235); + E(234,187); E(235, 60); E(236,131); E(237, 83); E(238,153); E(239, 97); + E(240, 23); E(241, 43); E(242, 4); E(243,126); E(244,186); E(245,119); + E(246,214); E(247, 38); E(248,225); E(249,105); E(250, 20); E(251, 99); + E(252, 85); E(253, 33); E(254, 12); E(255,125); + } +#undef E +#endif + return(t); +} +void +AES_Decrypt::Substitution_Si(sc_uint<8> a[4][4]) +{ + for(sc_uint<3> j = 0; j < 4; j++){ + for( sc_uint<3> i = 0; i < 4; i++){ + a[i][j] = Si_Table(a[i][j]); + } + } +} + +/* + * this routine does a rotate right + * on each row. the first is rotated 0, + * ie, nothing is done. the second row + * is roatated by 1, the third row by 2 + * and the finally row by 3. + * ie: + * + * row0 row1 row2 row3 + * 0123 0123 0123 0123 + * |||| |||| |||| |||| + * 0123 3012 2301 1230 + * + * this is equivalent to ShiftRows(1,...) + * code in the reference C code. it + * has been expanded to get rid of the + * shifts[][][] array used at run time. + */ +void +AES_Decrypt::ShiftRows_Right_Rotate(sc_uint<8> a[4][4]) +{ + sc_uint<8> t; + + t = a[1][3]; + a[1][3] = a[1][2]; + a[1][2] = a[1][1]; + a[1][1] = a[1][0]; + a[1][0] = t; + + t = a[2][0]; + a[2][0] = a[2][2]; + a[2][2] = t; + t = a[2][1]; + a[2][1] = a[2][3]; + a[2][3] = t; + + t = a[3][0]; + a[3][0] = a[3][1]; + a[3][1] = a[3][2]; + a[3][2] = a[3][3]; + a[3][3] = t; + +} + +void +AES_Decrypt::InvMixColumns(sc_uint<8> a[4][4]) +{ + sc_uint<8> t[4][4]; + + for(sc_uint<3> j = 0; j < 4; j++){ + for( sc_uint<3> i = 0; i < 4; i++){ + t[i][j] = dmule(a[i][j]) + ^ dmulb(a[(i + 1) & 3][j]) + ^ dmuld(a[(i + 2) & 3][j]) + ^ dmul9(a[(i + 3) & 3][j]); + } + } + + for(sc_uint<3> j = 0; j < 4; j++){ + for( sc_uint<3> i = 0; i < 4; i++){ + a[i][j] = t[i][j]; + } + } +} + +sc_uint<8> +AES_Decrypt::dmul9(const sc_uint<8> B) +{ + sc_uint<8> O; + + O[0] = B[5] ^B[0]; + O[1] = B[5]^B[6] ^B[1]; + O[2] = B[6]^B[7] ^B[2]; + O[3] = B[0]^B[7]^B[5]^B[3]; + O[4] = B[1]^B[6]^B[5]^B[4]; + O[5] = B[7]^B[2]^B[6]^B[5]; + O[6] = B[7]^B[3] ^B[6]; + O[7] = B[4] ^B[7]; + + return(O); +} + +sc_uint<8> +AES_Decrypt::dmulb(const sc_uint<8> B) +{ + sc_uint<8> O; + + O[0] = B[5] ^B[7] ^B[0]; + O[1] = B[5]^B[6] ^B[0]^B[7] ^B[1]; + O[2] = B[6]^B[7] ^B[1] ^B[2]; + O[3] = B[0]^B[5] ^B[2] ^B[3]; + O[4] = B[1]^B[6]^B[5] ^B[3]^B[7] ^B[4]; + O[5] = B[7]^B[2]^B[6] ^B[4] ^B[5]; + O[6] = B[7]^B[3] ^B[5] ^B[6]; + O[7] = B[4] ^B[6] ^B[7]; + + return(O); +} + +sc_uint<8> +AES_Decrypt::dmuld(const sc_uint<8> B) +{ + sc_uint<8> O; + + O[0] = B[5] ^B[6] ^B[0]; + O[1] = B[5] ^B[7] ^B[1]; + O[2] = B[6] ^B[0] ^B[2]; + O[3] = B[0]^B[7]^B[5] ^B[1]^B[6] ^B[3]; + O[4] = B[1]^B[5] ^B[2]^B[7] ^B[4]; + O[5] = B[2]^B[6] ^B[3] ^B[5]; + O[6] = B[7]^B[3] ^B[4] ^B[6]; + O[7] = B[4] ^B[5] ^B[7]; + + return(O); +} + +sc_uint<8> +AES_Decrypt::dmule(const sc_uint<8> B) +{ + sc_uint<8> O; + + O[0] = B[5] ^B[6] ^B[7]; + O[1] = B[5] ^B[7] ^B[0]^B[7]; + O[2] = B[6] ^B[0] ^B[1]; + O[3] = B[0]^B[7]^B[5] ^B[1]^B[6] ^B[2]^B[7]; + O[4] = B[1]^B[5] ^B[2]^B[7] ^B[3]^B[7]; + O[5] = B[2]^B[6] ^B[3] ^B[4]; + O[6] = B[7]^B[3] ^B[4] ^B[5]; + O[7] = B[4] ^B[5] ^B[6]; + + return(O); +} + +class AES_Encrypt : public AES_Base { +public: + SC_HAS_PROCESS(AES_Encrypt); + AES_Encrypt(sc_module_name name, + sc_clock& pCLK, + sc_signal& pRST_X, + sc_signal& pIn_req, + sc_signal& pIn_ack, + sc_signal& pIn_cmd, + sc_signal >& pIn_wire, + sc_signal& pOut_req, + sc_signal& pOut_ack, + sc_signal >& pOut_wire + ) : AES_Base(name) + { + CLK(pCLK); RST_X(pRST_X); + In_req(pIn_req); In_ack(pIn_ack); In_cmd(pIn_cmd); In_wire(pIn_wire); + Out_req(pOut_req); Out_ack(pOut_ack); Out_wire(pOut_wire); + SC_CTHREAD(MainThread, this->CLK.pos()); + reset_signal_is(RST_X,false); + } + + sc_in_clk CLK; + sc_in RST_X; + + sc_in > In_wire; + sc_out In_req; + sc_in In_ack; + sc_in In_cmd; + + sc_out > Out_wire; + sc_in Out_req; + sc_out Out_ack; + +#define LOAD_KEY 0 +#define ENCRYPT 1 + sc_uint<1> cmd; + sc_uint<8> rk[11][4][4]; + sc_uint<8> R[4][4]; + + void MainThread(void); + void Reset(void); + + void Input(void); + void Output(void); + + void Encrypt(void); + + void MixColumns(sc_uint<8> a[4][4]); + void ShiftRows_Left_Rotate(sc_uint<8> a[4][4]); + void Substitution_S(sc_uint<8> a[4][4]); + + sc_uint<8> dmul2(const sc_uint<8> B); + sc_uint<8> dmul3(const sc_uint<8> B); +}; + + +void +AES_Encrypt::Reset(void) +{ + In_req = false; + Out_ack = false; +} + +void +AES_Encrypt::Input(void) +{ + sc_biguint<128> t_In_wire; + sc_uint<8> t; + + (void)wait(); + In_req = true; + + do { wait(); } while(!In_ack); + + cmd = In_cmd; + t_In_wire = In_wire.read(); + + /* + * no matter whether it's a decrypt + * or a key_schedule, get the input pins + * into R[][]. + */ + for(int i = 0; i < 4; i++){ + for(int j = 0; j < 4; j++){ + for( int k = 0; k < 8; k++){ + t[k] = t_In_wire[(i*4+j)*8+k]; + } + R[i][j] = t; + } + } + + In_req = false; + + //Dump_R("AES_Encrypt::Input R", R); +} + +void +AES_Encrypt::Output(void) +{ + sc_biguint<128> t_Out_wire; + sc_uint<8> t; + + do { (void)wait(); } while(!Out_req); + + /* + * if it's a encrypt, drive R[][] onto output pins + */ + if( cmd == ENCRYPT){ + for(int i = 0; i < 4; i++){ + for(int j = 0; j < 4; j++){ + t = R[i][j]; + for( int k = 0; k < 8; k++){ + t_Out_wire[(i*4+j)*8+k] = t[k]; + } + } + } + + (void)Out_wire.write(t_Out_wire); + + //Dump_R("AES_Encrypt::Output R", R); + } + + Out_ack = true; + wait(); + Out_ack = false; + +} + +void +AES_Encrypt::MainThread(void) +{ + (void)Reset(); + + { + while(!RST_X) + (void)wait(); + } + + for(;;){ + (void)Input(); + + if( cmd == LOAD_KEY){ + /* + * take R[][] and expand + * it into rk[][][] + */ + (void)SchedKey(R, rk); + (void)wait(3); + //Dump_rk("AES_Encrypt::MainThread rk", rk); + } else { + /* + * take R[][] and rk[][][] + * and encrypt the data inplace + * into R[][] + */ + (void)Encrypt(); + (void)wait(12); + (void)Output(); + } + } +} + +void +AES_Encrypt::Encrypt(void) +{ + (void)AddRoundKey(R, rk[0]); + //Dump_R("0: AES_Encrypt::AddRoundKey", R); + + for(sc_uint<4> i = 1; i < 10; i++){ + (void)Substitution_S(R); + //printf("%d: ", (int)i); Dump_R("AES_Encrypt::Substitution_S", R); + + (void)ShiftRows_Left_Rotate(R); + //printf("%d: ", (int)i); Dump_R("AES_Encrypt::ShiftRows_Left_Rotate", R); + + (void)MixColumns(R); + //printf("%d: ", (int)i); Dump_R("AES_Encrypt::MixColums", R); + + (void)AddRoundKey(R, rk[i]); + //printf("%d: ", (int)i); Dump_R("AES_Encrypt::AddRoundKey", R); + } + + (void)Substitution_S(R); + //printf("%d: ", 10); Dump_R("AES_Encrypt::Substitution_S", R); + + (void)ShiftRows_Left_Rotate(R); + //printf("%d: ", 10); Dump_R("AES_Encrypt::ShiftRows_Left_Rotate", R); + + (void)AddRoundKey(R,rk[10]); + //printf("%d: ", 10); Dump_R("AES_Encrypt::AddRoundKey", R); +} + + +void +AES_Encrypt::Substitution_S(sc_uint<8> a[4][4]) +{ + for(sc_uint<3> j = 0; j < 4; j++){ + for( sc_uint<3> i = 0; i < 4; i++){ + a[i][j] = S_Table(a[i][j]); + } + } +} + +/* + * this routine does a rotate left + * on each row. the first is rotated 0, + * ie, nothing is done. the second row + * is roatated by 1, the third row by 2 + * and the finally row by 3. + * ie: + * + * row0 row1 row2 row3 + * 0123 0123 0123 0123 + * |||| |||| |||| |||| + * 0123 1230 2301 3012 + * + * this is equivalent to ShiftRows(0,...) + * code in the reference C code. it + * has been expanded to get rid of the + * shifts[][][] array used at run time. + */ +void +AES_Encrypt::ShiftRows_Left_Rotate(sc_uint<8> a[4][4]) +{ + sc_uint<8> t; + + t = a[1][0]; + a[1][0] = a[1][1]; + a[1][1] = a[1][2]; + a[1][2] = a[1][3]; + a[1][3] = t; + + t = a[2][0]; + a[2][0] = a[2][2]; + a[2][2] = t; + t = a[2][1]; + a[2][1] = a[2][3]; + a[2][3] = t; + + t = a[3][3]; + a[3][3] = a[3][2]; + a[3][2] = a[3][1]; + a[3][1] = a[3][0]; + a[3][0] = t; +} + +void +AES_Encrypt::MixColumns(sc_uint<8> a[4][4]) +{ + sc_uint<8> t[4][4]; + + for(sc_uint<3> j = 0; j < 4; j++){ + for( sc_uint<3> i = 0; i < 4; i++){ + t[i][j] = dmul2(a[i][j]) + ^ dmul3(a[(i + 1) & 3][j]) + ^ a[(i + 2) & 3][j] + ^ a[(i + 3) & 3][j]; + + } + } + + for(sc_uint<3> j = 0; j < 4; j++){ + for( sc_uint<3> i = 0; i < 4; i++){ + a[i][j] = t[i][j]; + } + } +} + + + +sc_uint<8> +AES_Encrypt::dmul2(const sc_uint<8> B) +{ + sc_uint<8> O; + + O[0] = B[7]; + O[1] = B[0]^B[7]; + O[2] = B[1]; + O[3] = B[2]^B[7]; + O[4] = B[3]^B[7]; + O[5] = B[4]; + O[6] = B[5]; + O[7] = B[6]; + + return(O); +} + +sc_uint<8> +AES_Encrypt::dmul3(const sc_uint<8> B) +{ + sc_uint<8> O; + + O[0] = B[7] ^B[0]; + O[1] = B[0]^B[7]^B[1]; + O[2] = B[1] ^B[2]; + O[3] = B[2]^B[7]^B[3]; + O[4] = B[3]^B[7]^B[4]; + O[5] = B[4] ^B[5]; + O[6] = B[5] ^B[6]; + O[7] = B[6] ^B[7]; + + return(O); +} + +#define TESTBENCH 1 +#if TESTBENCH + +sc_biguint<128> +str2biguint(char *s) +{ + static sc_biguint<128> a; + char str[16]; + int i, c; + + for(i = 0; i < 16 && *s != '\0'; i++, s++) + str[i] = *s; + + while( i < 16) + str[i++] = ' '; + + for(i = 0; i < 16; i++){ + c = str[i]; + a[(i*8)+0] = (c&1); + a[(i*8)+1] = ((c>>1)&1); + a[(i*8)+2] = ((c>>2)&1); + a[(i*8)+3] = ((c>>3)&1); + a[(i*8)+4] = ((c>>4)&1); + a[(i*8)+5] = ((c>>5)&1); + a[(i*8)+6] = ((c>>6)&1); + a[(i*8)+7] = ((c>>7)&1); + } + + return(a); +} + +char * +biguint2str(sc_biguint<128> a) +{ + static char str[17]; + int i; + char c; + + str[16] = '\0'; + + for( i = 0; i < 128; i += 8){ + c = 0; + c |= a[i+0] ? 1 : 0; + c |= a[i+1] ? 1<<1 : 0; + c |= a[i+2] ? 1<<2 : 0; + c |= a[i+3] ? 1<<3 : 0; + c |= a[i+4] ? 1<<4 : 0; + c |= a[i+5] ? 1<<5 : 0; + c |= a[i+6] ? 1<<6 : 0; + c |= a[i+7] ? 1<<7 : 0; + str[i/8] = c; + + } + + return(&str[0]); +} + +sc_biguint<128> +makekey(char *keyMaterial) +{ + int i, j, t, k; + sc_uint<8> R[4][4]; + sc_uint<8> tt; + sc_biguint<128> key; + + for(i = 0; i < 128/8; i++) { + t = keyMaterial[2*i]; + if ((t >= '0') && (t <= '9')) j = (t - '0') << 4; + else if ((t >= 'a') && (t <= 'f')) j = (t - 'a' + 10) << 4; + else if ((t >= 'A') && (t <= 'F')) j = (t - 'A' + 10) << 4; + else abort(); + + t = keyMaterial[2*i+1]; + if ((t >= '0') && (t <= '9')) j ^= (t - '0'); + else if ((t >= 'a') && (t <= 'f')) j ^= (t - 'a' + 10); + else if ((t >= 'A') && (t <= 'F')) j ^= (t - 'A' + 10); + else abort(); + + R[i % 4][i / 4] = j; + } + + for(i = 0; i < 4; i++){ + for(j = 0; j < 4; j++){ + tt = R[i][j]; + for(k = 0; k < 8; k++){ + key[(i*4+j)*8+k] = tt[k]; + } + } + } + return(key); +} + + +int +sc_main(int argc, char *argv[]) +{ + sc_clock clock; + sc_signal reset; + sc_signal D_In_req; + sc_signal D_In_ack; + sc_signal D_In_cmd; + sc_signal D_Out_req; + sc_signal D_Out_ack; + sc_signal > D_In_wire; + sc_signal > D_Out_wire; + sc_signal E_In_req; + sc_signal E_In_ack; + sc_signal E_In_cmd; + sc_signal E_Out_req; + sc_signal E_Out_ack; + sc_signal > E_In_wire; + sc_signal > E_Out_wire; + sc_biguint<128> key; + sc_biguint<128> t; + char *s; + char key_string[33] = "deadbeef0123456776543210beefdead"; + char in[17] = "abcdefghijklmnop"; + char *out; + bool err; + int i; + + AES_Encrypt E("AES_Encrypt", + clock, + reset, + E_In_req, + E_In_ack, + E_In_cmd, + E_In_wire, + E_Out_req, + E_Out_ack, + E_Out_wire); + + AES_Decrypt D("AES_Decrypt", + clock, + reset, + D_In_req, + D_In_ack, + D_In_cmd, + D_In_wire, + D_Out_req, + D_Out_ack, + D_Out_wire); + + + key = makekey(key_string); + + reset = 0; + sc_start(2, SC_NS); + reset = 1; + sc_start(2, SC_NS); + + while( !E_In_req) sc_start(1, SC_NS); + E_In_cmd = LOAD_KEY; + E_In_ack = 1; + E_In_wire = key; + do { sc_start(1, SC_NS); E_In_ack = 0; } while( !E_In_req); + + while( !D_In_req) sc_start(1, SC_NS); + D_In_cmd = LOAD_KEY; + D_In_ack = 1; + D_In_wire = key; + do { sc_start(1, SC_NS); D_In_ack = 0; } while( !D_In_req); + + + while( !E_In_req) sc_start(1, SC_NS); + E_Out_req = 1; + E_In_cmd = ENCRYPT; + E_In_ack = 1; + E_In_wire = str2biguint((char*)"abcdefghijklmnop"); + do { sc_start(1, SC_NS); E_In_ack = 0; } while(!E_Out_ack); + E_Out_req = 0; + sc_start(1, SC_NS); + + while( !D_In_req) sc_start(1, SC_NS); + D_Out_req = 1; + D_In_cmd = DECRYPT; + D_In_ack = 1; + D_In_wire = E_Out_wire; + do { sc_start(1, SC_NS); D_In_ack = 0; } while(!D_Out_ack); + out = biguint2str(D_Out_wire); + D_Out_req = 0; + sc_start(1, SC_NS); + + err = false; + for(i = 0; i < 16; i++){ + if( in[i] != out[i]){ + err = true; + break; + } + } + + if( err){ + cout << "mismatch error at index " << i << endl; + cout << "key:" << key_string << " in:" << in + << " out:" << out << endl; + } else { + cout << "program complete" << endl; + } + + return(0); +} +#endif + + diff --git a/src/systemc/tests/systemc/examples/aes/golden/aes.log b/src/systemc/tests/systemc/examples/aes/golden/aes.log new file mode 100644 index 000000000..f0fa7a911 --- /dev/null +++ b/src/systemc/tests/systemc/examples/aes/golden/aes.log @@ -0,0 +1,2 @@ +SystemC Simulation +program complete diff --git a/src/systemc/tests/systemc/examples/isqrt/golden/isqrt.log b/src/systemc/tests/systemc/examples/isqrt/golden/isqrt.log new file mode 100644 index 000000000..2fd694f12 --- /dev/null +++ b/src/systemc/tests/systemc/examples/isqrt/golden/isqrt.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed. diff --git a/src/systemc/tests/systemc/examples/isqrt/isqrt.cpp b/src/systemc/tests/systemc/examples/isqrt/isqrt.cpp new file mode 100644 index 000000000..925c7f181 --- /dev/null +++ b/src/systemc/tests/systemc/examples/isqrt/isqrt.cpp @@ -0,0 +1,247 @@ +//#include +#include "systemc.h" + +SC_MODULE(isq) +{ + sc_in RSTN; + sc_in_clk CLK; + + sc_out DIN_rdy; + sc_in DIN_vld; + sc_in > DIN_value; + sc_in DOUT_rdy; + sc_out DOUT_vld; + sc_out > DOUT_value; + + void thread(); + sc_uint<10> isqrt5(sc_uint<18>); + + SC_CTOR(isq){ + SC_CTHREAD(thread, CLK.pos()); + reset_signal_is(RSTN,false); + } +}; + +void +isq::thread() +{ + if( !RSTN){ + DIN_rdy = 1; + DOUT_vld = 0; + wait(1); + } + + for(;;){ + sc_uint<18> in_value; + sc_uint<10> out_value; + + in_value = DIN_value.read(); + while( !DIN_vld.read()){ + wait(1); + in_value = DIN_value.read(); + } + DIN_rdy = 0; + wait(1); + + out_value = isqrt5(in_value); + + while( !DOUT_rdy.read()){ + wait(1); + } + DOUT_vld = 1; + DOUT_value.write(out_value); + DIN_rdy = 1; + wait(1); + DOUT_vld = 0; + } +} + + +sc_uint<10> +isq::isqrt5(sc_uint<18> x) { + sc_uint<18> m, y, b; + sc_int<18> t; + + y = 0; + for( m = 0x10000; m != 0; m >>= 2){ + b = y | m; + y = y >> 1; + t = (sc_int<18>)(x | ~(x - b)) >> 16; + x = x - (b & t); + y = y | (m & t); + } + return y; +} + +struct stimuli { + unsigned it; + unsigned is; +} S[] = { +{1,1}, {332,18}, {663,25}, {994,31}, {1325,36}, {1656,40}, {1987,44}, {2318,48}, +{2649,51}, {2980,54}, {3311,57}, {3642,60}, {3973,63}, {4304,65}, {4635,68}, {4966,70}, +{5297,72}, {5628,75}, {5959,77}, {6290,79}, {6621,81}, {6952,83}, {7283,85}, {7614,87}, +{7945,89}, {8276,90}, {8607,92}, {8938,94}, {9269,96}, {9600,97}, {9931,99}, {10262,101}, +{10593,102}, {10924,104}, {11255,106}, {11586,107}, {11917,109}, {12248,110}, {12579,112}, +{12910,113}, {13241,115}, {13572,116}, {13903,117}, {14234,119}, {14565,120}, {14896,122}, +{15227,123}, {15558,124}, {15889,126}, {16220,127}, {16551,128}, {16882,129}, {17213,131}, +{17544,132}, {17875,133}, {18206,134}, {18537,136}, {18868,137}, {19199,138}, {19530,139}, +{19861,140}, {20192,142}, {20523,143}, {20854,144}, {21185,145}, {21516,146}, {21847,147}, +{22178,148}, {22509,150}, {22840,151}, {23171,152}, {23502,153}, {23833,154}, {24164,155}, +{24495,156}, {24826,157}, {25157,158}, {25488,159}, {25819,160}, {26150,161}, {26481,162}, +{26812,163}, {27143,164}, {27474,165}, {27805,166}, {28136,167}, {28467,168}, {28798,169}, +{29129,170}, {29460,171}, {29791,172}, {30122,173}, {30453,174}, {30784,175}, {31115,176}, +{31446,177}, {31777,178}, {32108,179}, {32439,180}, {32770,181}, {33101,181}, {33432,182}, +{33763,183}, {34094,184}, {34425,185}, {34756,186}, {35087,187}, {35418,188}, {35749,189}, +{36080,189}, {36411,190}, {36742,191}, {37073,192}, {37404,193}, {37735,194}, {38066,195}, +{38397,195}, {38728,196}, {39059,197}, {39390,198}, {39721,199}, {40052,200}, {40383,200}, +{40714,201}, {41045,202}, {41376,203}, {41707,204}, {42038,205}, {42369,205}, {42700,206}, +{43031,207}, {43362,208}, {43693,209}, {44024,209}, {44355,210}, {44686,211}, {45017,212}, +{45348,212}, {45679,213}, {46010,214}, {46341,215}, {46672,216}, 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{97315,311}, {97646,312}, {97977,313}, {98308,313}, +{98639,314}, {98970,314}, {99301,315}, {99632,315}, {99963,316}, {100294,316}, {100625,317}, +{100956,317}, {101287,318}, {101618,318}, {101949,319}, {102280,319}, {102611,320}, {102942,320}, +{103273,321}, {103604,321}, {103935,322}, {104266,322}, {104597,323}, {104928,323}, {105259,324}, +{105590,324}, {105921,325}, {106252,325}, {106583,326}, {106914,326}, {107245,327}, {107576,327}, +{107907,328}, {108238,328}, {108569,329}, {108900,330}, {109231,330}, {109562,331}, {109893,331}, +{110224,332}, {110555,332}, {110886,332}, {111217,333}, {111548,333}, {111879,334}, {112210,334}, +{112541,335}, {112872,335}, {113203,336}, {113534,336}, {113865,337}, {114196,337}, {114527,338}, +{114858,338}, {115189,339}, {115520,339}, {115851,340}, {116182,340}, {116513,341}, {116844,341}, +{117175,342}, {117506,342}, {117837,343}, {118168,343}, {118499,344}, {118830,344}, {119161,345}, +{119492,345}, {119823,346}, {120154,346}, {120485,347}, {120816,347}, {121147,348}, {121478,348}, +{121809,349}, {122140,349}, {122471,349}, {122802,350}, {123133,350}, {123464,351}, {123795,351}, +{124126,352}, {124457,352}, {124788,353}, {125119,353}, {125450,354}, {125781,354}, {126112,355}, +{126443,355}, {126774,356}, {127105,356}, {127436,356}, {127767,357}, {128098,357}, {128429,358}, +{128760,358}, {129091,359}, {129422,359}, {129753,360}, {130084,360}, {130415,361}, {130746,361}, +{131077,362}, {131408,362}, {131739,362}, {132070,363}, {132401,363}, {132732,364}, {133063,364}, +{133394,365}, {133725,365}, {134056,366}, {134387,366}, {134718,367}, {135049,367}, {135380,367}, +{135711,368}, {136042,368}, {136373,369}, {136704,369}, {137035,370}, {137366,370}, {137697,371}, +{138028,371}, {138359,371}, {138690,372}, {139021,372}, {139352,373}, {139683,373}, {140014,374}, +{140345,374}, {140676,375}, {141007,375}, {141338,375}, {141669,376}, {142000,376}, {142331,377}, +{142662,377}, {142993,378}, {143324,378}, {143655,379}, {143986,379}, {144317,379}, {144648,380}, +{144979,380}, {145310,381}, {145641,381}, {145972,382}, {146303,382}, {146634,382}, {146965,383}, +{147296,383}, {147627,384}, {147958,384}, {148289,385}, {148620,385}, {148951,385}, {149282,386}, +{149613,386}, {149944,387}, {150275,387}, {150606,388}, {150937,388}, {151268,388}, {151599,389}, +{151930,389}, {152261,390}, {152592,390}, {152923,391}, {153254,391}, {153585,391}, {153916,392}, +{154247,392}, {154578,393}, {154909,393}, {155240,394}, {155571,394}, {155902,394}, {156233,395}, +{156564,395}, {156895,396}, {157226,396}, {157557,396}, {157888,397}, {158219,397}, {158550,398}, +{158881,398}, {159212,399}, {159543,399}, {159874,399}, {160205,400}, {160536,400}, {160867,401}, +{161198,401}, {161529,401}, {161860,402}, {162191,402}, {162522,403}, {162853,403}, {163184,403}, +{163515,404}, {163846,404}, {164177,405}, {164508,405}, {164839,406}, {165170,406}, {165501,406}, +{165832,407}, {166163,407}, {166494,408}, {166825,408}, {167156,408}, {167487,409}, {167818,409}, +{168149,410}, {168480,410}, {168811,410}, {169142,411}, {169473,411}, {169804,412}, {170135,412}, +{170466,412}, {170797,413}, {171128,413}, {171459,414}, {171790,414}, {172121,414}, {172452,415}, +{172783,415}, {173114,416}, {173445,416}, {173776,416}, {174107,417}, {174438,417}, {174769,418}, +{175100,418}, {175431,418}, {175762,419}, {176093,419}, {176424,420}, {176755,420}, {177086,420}, +{177417,421}, {177748,421}, {178079,421}, {178410,422}, {178741,422}, {179072,423}, {179403,423}, +{179734,423}, {180065,424}, {180396,424}, {180727,425}, {181058,425}, {181389,425}, {181720,426}, +{182051,426}, {182382,427}, {182713,427}, {183044,427}, {183375,428}, {183706,428}, {184037,428}, +{184368,429}, {184699,429}, {185030,430}, {185361,430}, {185692,430}, {186023,431}, {186354,431}, +{186685,432}, {187016,432}, {187347,432}, {187678,433}, {188009,433}, {188340,433}, {188671,434}, +{189002,434}, {189333,435}, {189664,435}, {189995,435}, {190326,436}, {190657,436}, {190988,437}, +{191319,437}, {191650,437}, {191981,438}, {192312,438}, {192643,438}, {192974,439}, {193305,439}, +{193636,440}, {193967,440}, {194298,440}, {194629,441}, {194960,441}, {195291,441}, {195622,442}, +{195953,442}, {196284,443}, {196615,443}, {196946,443}, {197277,444}, {197608,444}, {197939,444}, +{198270,445}, {198601,445}, {198932,446}, {199263,446}, {199594,446}, {199925,447}, {200256,447}, +{200587,447}, {200918,448}, {201249,448}, {201580,448}, {201911,449}, {202242,449}, {202573,450}, +{202904,450}, {203235,450}, {203566,451}, {203897,451}, {204228,451}, {204559,452}, {204890,452}, +{205221,453}, {205552,453}, {205883,453}, {206214,454}, {206545,454}, {206876,454}, {207207,455}, +{207538,455}, {207869,455}, {208200,456}, {208531,456}, {208862,457}, {209193,457}, {209524,457}, +{209855,458}, {210186,458}, {210517,458}, {210848,459}, {211179,459}, {211510,459}, {211841,460}, +{212172,460}, {212503,460}, {212834,461}, {213165,461}, {213496,462}, {213827,462}, {214158,462}, +{214489,463}, {214820,463}, {215151,463}, {215482,464}, {215813,464}, {216144,464}, {216475,465}, +{216806,465}, {217137,465}, {217468,466}, {217799,466}, {218130,467}, {218461,467}, {218792,467}, +{219123,468}, {219454,468}, {219785,468}, {220116,469}, {220447,469}, {220778,469}, {221109,470}, +{221440,470}, {221771,470}, {222102,471}, {222433,471}, {222764,471}, {223095,472}, {223426,472}, +{223757,473}, {224088,473}, {224419,473}, {224750,474}, {225081,474}, {225412,474}, {225743,475}, +{226074,475}, {226405,475}, {226736,476}, {227067,476}, {227398,476}, {227729,477}, {228060,477}, +{228391,477}, {228722,478}, {229053,478}, {229384,478}, {229715,479}, {230046,479}, {230377,479}, +{230708,480}, {231039,480}, {231370,481}, {231701,481}, {232032,481}, {232363,482}, {232694,482}, +{233025,482}, {233356,483}, {233687,483}, {234018,483}, {234349,484}, {234680,484}, {235011,484}, +{235342,485}, {235673,485}, {236004,485}, {236335,486}, {236666,486}, {236997,486}, {237328,487}, +{237659,487}, {237990,487}, {238321,488}, {238652,488}, {238983,488}, {239314,489}, {239645,489}, +{239976,489}, {240307,490}, {240638,490}, {240969,490}, {241300,491}, {241631,491}, {241962,491}, +{242293,492}, {242624,492}, {242955,492}, {243286,493}, {243617,493}, {243948,493}, {244279,494}, +{244610,494}, {244941,494}, {245272,495}, {245603,495}, {245934,495}, {246265,496}, {246596,496}, +{246927,496}, {247258,497}, {247589,497}, {247920,497}, {248251,498}, {248582,498}, {248913,498}, +{249244,499}, {249575,499}, {249906,499}, {250237,500}, {250568,500}, {250899,500}, {251230,501}, +{251561,501}, {251892,501}, {252223,502}, {252554,502}, {252885,502}, {253216,503}, {253547,503}, +{253878,503}, {254209,504}, {254540,504}, {254871,504}, {255202,505}, {255533,505}, {255864,505}, +{256195,506}, {256526,506}, {256857,506}, {257188,507}, {257519,507}, {257850,507}, {258181,508}, +{258512,508}, {258843,508}, {259174,509}, {259505,509}, {259836,509} +}; + +int +sc_main(int argc, char *argv[]) +{ + sc_clock clk; + sc_signal reset; + sc_signal in_rdy; + sc_signal in_vld; + sc_signal out_vld; + sc_signal out_rdy; + sc_signal > it; + sc_signal > is; + int errors; + isq *isqp; + + isqp = new isq("isq0"); + (*isqp)(reset, clk, + in_rdy, in_vld, it, + out_rdy, out_vld, is); + + reset = 0; + sc_start(2, SC_NS); + reset = 1; + sc_start(2, SC_NS); + out_rdy = 1; + + sc_start(1, SC_NS); + errors = 0; + for(int i = 0; i < sizeof S/sizeof(struct stimuli); i++){ + while( !in_rdy) + sc_start(1, SC_NS); + + in_vld = 1; + it.write(S[i].it); + do { sc_start(1, SC_NS); in_vld = 0; } while(!out_vld); + + if( is.read() != S[i].is){ + printf("error it:%d expected is:%d received is:%d\n", + (int)S[i].it, (int)S[i].is, + (int)is.read()); + errors++; + } + } + + if( errors) + cout << "Program completed with " << errors << " errors" << endl; + else + cout << "Program completed." << endl; + + return(0); + +} + + + diff --git a/src/systemc/tests/systemc/examples/trie/golden/trie.log b/src/systemc/tests/systemc/examples/trie/golden/trie.log new file mode 100644 index 000000000..f0fa7a911 --- /dev/null +++ b/src/systemc/tests/systemc/examples/trie/golden/trie.log @@ -0,0 +1,2 @@ +SystemC Simulation +program complete diff --git a/src/systemc/tests/systemc/examples/trie/trie.cpp b/src/systemc/tests/systemc/examples/trie/trie.cpp new file mode 100644 index 000000000..7714ce657 --- /dev/null +++ b/src/systemc/tests/systemc/examples/trie/trie.cpp @@ -0,0 +1,308 @@ +#include +#include "systemc.h" + +SC_MODULE(lc) +{ + sc_out DIN_rdy; + sc_in DIN_vld; +#define LOAD_ADDR 0 +#define LOAD_DATA 1 +#define LOOKUP 2 // really op(1) == 1 and op(0) - don't care + sc_in > DIN_op; + sc_in > DIN_data_in; + sc_in DOUT_rdy; + sc_out DOUT_vld; + sc_out > DOUT_hop; + sc_in RSTN; + sc_in_clk CLK; + + void thread(); + sc_uint<20> extract(sc_uint<32>, sc_uint<7>, sc_uint<5>); + sc_uint<10> lookup(sc_uint<32>); + + sc_uint<32> M[1024]; + sc_uint<32> addr; // latched addr for loading memory + + SC_CTOR(lc){ + SC_CTHREAD(thread, CLK.pos()); + reset_signal_is(RSTN,false); + } +}; + +// +// this implements the level-compressed trie +// ip routing algorithm that is proposed in: +// +// "Fast Address Lookup for Internet Routers" +// Stefan Nilsson and Gunnar Karlsson +// Proc IFIP 4th International Conference on BroadBand Communication +// pp. 11-22, 1998 +// +// +void +lc::thread() +{ + if( !RSTN){ + DIN_rdy = 1; + DOUT_vld = 0; + wait(1); + } + + for(;;){ + bool tmp_vld; + bool tmp_rdy; + sc_uint<2> op; + sc_uint<32> data_in; + sc_uint<32> hop; + + { + do { + tmp_vld = DIN_vld.read(); + op = DIN_op.read(); + data_in = DIN_data_in.read(); + wait(1); + } while( !tmp_vld); + } + + if( op == 0){ + // latch address + addr = data_in; + wait(1); + } else if(op == 1){ + // load memory + M[addr] = data_in; + wait(1); + } else if( op[1] == 1){ + // do the ip lookup to next hop + hop = lookup(data_in); + { + DIN_rdy = 0; + do { + tmp_rdy = DOUT_rdy.read(); + wait(1); + } while( !tmp_rdy); + DOUT_vld = 1; + DOUT_hop.write(hop); + DIN_rdy = 1; + wait(1); + DOUT_vld = 0; + } + } + } + +} + +sc_uint<20> +lc::extract(sc_uint<32> x, sc_uint<7> p, sc_uint<5> w) +{ + return( (x>>(p-w+1)) & ~(~0< +lc::lookup(sc_uint<32> ip) +{ + sc_uint<7> pos; + sc_uint<5> branch; + sc_uint<20> addr; + sc_uint<32> t; + sc_uint<32> ip_prefix; + sc_uint<10> next_hop; + sc_uint<32> mask; + + t = M[0]; + pos = SKIP(t); + branch = BRANCH(t); + addr = ADDR(t); + while(branch != 0){ + addr = addr + extract(ip, pos, branch); + t = M[addr]; + pos = pos - (branch + SKIP(t)); + branch = BRANCH(t); + addr = ADDR(t); + } + + + next_hop = 0; + for(;;) { + addr <<= 1; + + ip_prefix = M[addr]; + t = M[addr|1]; + mask = ~0 << (32-LEN(t)); + if( (ip_prefix&mask) == (ip&mask)){ + next_hop = NEXT_HOP(t); + break; + } + addr = NEXT_PREFIX(t); + if( addr == 0) + break; + } + + return(next_hop); +} + + +/* + * hop prefix(bits 31 .. 0) + * 1 0000* + * 2 0001* + * 3 00101* + * 4 010* + * 5 0110* + * 6 0111* + * 7 100* + * 8 101000* + * 9 101001* + * 10 10101* + * 11 10110* + * 12 10111* + * 13 110* + * 14 11101000* + * 15 11101001* + * + * "not in table" produces a hop of 0 + */ + +#define TRIE(LN, SK, AD) \ + ((((LN)&0x1f)<<27) | (((SK)&0x7f)<<20) | ((AD)&0xfffff)) +#define E(LN, NHP, NPX) \ + ((((LN)&0x7f)<<25) | (((NHP)&0x3ff)<<15) | ((((NPX))&0x7fff))) + + +#define M_SIZE 52 +sc_uint<32> M[M_SIZE] = { +/* TRIE */ +/* 00 */ TRIE(3, 31, 1), +/* 01 */ TRIE(1, 0, 9), +/* 02 */ TRIE(0, 2, 2+11), +/* 03 */ TRIE(0, 0, 3+11), +/* 04 */ TRIE(1, 0, 11), +/* 05 */ TRIE(0, 0, 6+11), +/* 06 */ TRIE(2, 0, 13), +/* 07 */ TRIE(0, 0, 12+11), +/* 08 */ TRIE(1, 4, 17), +/* 09 */ TRIE(0, 0, 0+11), +/* 10 */ TRIE(0, 0, 1+11), +/* 11 */ TRIE(0, 0, 4+11), +/* 12 */ TRIE(0, 0, 5+11), +/* 13 */ TRIE(1, 0, 19), +/* 14 */ TRIE(0, 0, 9+11), +/* 15 */ TRIE(0, 0, 10+11), +/* 16 */ TRIE(0, 0, 11+11), +/* 17 */ TRIE(0, 0, 13+11), +/* 18 */ TRIE(0, 0, 14+11), +/* 19 */ TRIE(0, 0, 7+11), +/* 20 */ TRIE(0, 0, 8+11), +/* 21 */ 0, /* pad */ +/* BASE + PREFIX */ +/* 22 */ 0x00000000, E(4, 1, 0), +/* 24 */ 0x10000000, E(4, 2, 0), +/* 26 */ 0x28000000, E(5, 3, 0), +/* 28 */ 0x40000000, E(3, 4, 0), +/* 31 */ 0x60000000, E(4, 5, 0), +/* 32 */ 0x70000000, E(4, 6, 0), +/* 34 */ 0x80000000, E(3, 7, 0), +/* 36 */ 0xa0000000, E(6, 8, 0), +/* 38 */ 0xa4000000, E(6, 9, 0), +/* 40 */ 0xa8000000, E(5, 10, 0), +/* 42 */ 0xb0000000, E(5, 11, 0), +/* 44 */ 0xb8000000, E(5, 12, 0), +/* 46 */ 0xc0000000, E(3, 13, 0), +/* 48 */ 0xe8000000, E(8, 14, 0), +/* 50 */ 0xe9000000, E(8, 15, 0) +}; + + +struct stimuli { + unsigned int ip; + int hop; +} S[] = { + { 0xf0000000, 0 }, + { 0x10000000, 2 }, + { 0x7c000000, 6 }, + { 0x7c001000, 6 }, + { 0x7c000070, 6 }, +}; + +int +sc_main(int argc, char *argv[]) +{ + sc_clock clk; + sc_signal reset; + sc_signal in_rdy; + sc_signal in_vld; + sc_signal out_vld; + sc_signal out_rdy; + sc_signal > op; + sc_signal > data; + sc_signal > hop; + int i; + int m_addr; + lc *lcp; + + lcp = new lc("lc0"); + (*lcp)(in_rdy, in_vld, + op, data, + out_rdy, out_vld, + hop, + reset, clk); + + reset = 0; + sc_start(2, SC_NS); + reset = 1; + sc_start(2, SC_NS); + out_rdy = 1; + + /* + * download the RAM containing + * the routing data + */ + for(i = 0, m_addr = 0; i < M_SIZE; i++, m_addr++){ + while(!in_rdy) sc_start(1, SC_NS); + in_vld = 1; + op.write(LOAD_ADDR); + data.write(m_addr); + do { sc_start(1, SC_NS); in_vld = 0; } while(!in_rdy); + sc_start(1, SC_NS); + in_vld = 1; + op.write(LOAD_DATA); + data.write(M[m_addr]); + do { sc_start(1, SC_NS); in_vld = 0; } while(!in_rdy); + sc_start(1, SC_NS); + } + + /* + * apply some ip's and see what + * comes back as next-hops + */ + for(i = 0; i < sizeof S/sizeof(struct stimuli); i++){ + while(!in_rdy) sc_start(1, SC_NS); + in_vld = 1; + op.write(LOOKUP); + data.write(S[i].ip); + do { sc_start(1, SC_NS); in_vld = 0; } while(!out_vld); + unsigned int h = hop.read(); + if( h != S[i].hop){ + cout << S[i].ip << " should be hop " << S[i].hop + << " got hop " << h << endl; + } + } + cout << "program complete" << endl; + return 0; + +} + + + + + + + + diff --git a/src/systemc/tests/systemc/examples/updown/golden/updown.log b/src/systemc/tests/systemc/examples/updown/golden/updown.log new file mode 100644 index 000000000..983d78412 --- /dev/null +++ b/src/systemc/tests/systemc/examples/updown/golden/updown.log @@ -0,0 +1,20 @@ +SystemC Simulation +clock up down data_in parity_out carry_out borrow_out count_out + 1 0 0 200 1 0 0 200 + 2 1 0 0 1 0 0 203 + 3 1 0 0 1 0 0 206 + 4 0 1 0 0 0 0 201 + 5 0 1 0 1 0 0 196 + 6 0 1 0 1 0 0 191 + 7 1 1 0 1 0 0 191 + 8 1 1 0 1 0 0 191 + 9 1 1 0 1 0 0 191 + 10 0 0 200 1 0 0 200 + 11 1 1 0 1 0 0 200 + 12 1 1 0 1 0 0 200 + 13 0 1 0 0 0 0 195 + 14 0 0 2 1 0 0 2 + 15 0 1 0 0 0 1 509 + 16 0 0 511 1 0 0 511 + 17 1 0 0 1 1 0 2 + 17 1 0 0 1 1 0 2 diff --git a/src/systemc/tests/systemc/examples/updown/updown.cpp b/src/systemc/tests/systemc/examples/updown/updown.cpp new file mode 100644 index 000000000..f6c6046cb --- /dev/null +++ b/src/systemc/tests/systemc/examples/updown/updown.cpp @@ -0,0 +1,134 @@ +#include "systemc.h" +#include "specialized_signals/scx_signal_int.h" +#include "specialized_signals/scx_signal_signed.h" +#include "specialized_signals/scx_signal_uint.h" +#include "specialized_signals/scx_signal_unsigned.h" + +SC_MODULE(up_down) +{ + sc_in_clk clk; + sc_in > up; + sc_in > down; + sc_in > data_in; + sc_inout > parity_out; + sc_inout > carry_out; + sc_inout > borrow_out; + sc_inout > count_out; + + sc_uint<10> cnt_dn; + sc_uint<10> cnt_up; + sc_uint<9> count_nxt; + sc_uint<1> load; + + SC_CTOR(up_down) + { + SC_METHOD(run); + sensitive << clk.pos(); + } + + void run() + { + cnt_dn = count_out - 5; + cnt_up = count_out + 3; + + load = 1; + switch( (unsigned int )(up,down) ) { + case(0): + count_nxt = data_in; + break; + case(1): + count_nxt = cnt_dn; + break; + case(2): + count_nxt = cnt_up; + break; + case(3): + load = 0; + break; + } + + if( load) { + parity_out = count_nxt.xor_reduce(); + carry_out = up&cnt_up[9]; + borrow_out = down&cnt_dn[9]; + count_out = count_nxt; + } + } +}; + + +#define UP_DOWN(up, down) up, down + +struct stimulus { + int up; + int down; + int data_in; +} s[] = { + { UP_DOWN(0, 0), 200 }, /* load 200 */ + { UP_DOWN(1, 0), 0 }, /* inc */ + { UP_DOWN(1, 0), 0 }, /* inc */ + { UP_DOWN(0, 1), 0 }, /* dec */ + { UP_DOWN(0, 1), 0 }, /* dec */ + { UP_DOWN(0, 1), 0 }, /* dec */ + { UP_DOWN(1, 1), 0 }, /* hold */ + { UP_DOWN(1, 1), 0 }, /* hold */ + { UP_DOWN(1, 1), 0 }, /* hold */ + { UP_DOWN(0, 0), 200 }, /* load 200 */ + { UP_DOWN(1, 1), 0 }, /* hold */ + { UP_DOWN(1, 1), 0 }, /* hold */ + { UP_DOWN(0, 1), 0 }, /* dec */ + { UP_DOWN(0, 0), 2 }, /* load 2 */ + { UP_DOWN(0, 1), 0 }, /* dec */ + { UP_DOWN(0, 0), 0x1ff},/* load 0x1ff */ + { UP_DOWN(1, 0), 0 }, /* inc */ +}; + + +int sc_main(int argc, char* argv[]) +{ + sc_signal > borrow_out; + sc_signal > carry_out; + sc_clock clock; + sc_signal > count_out; + sc_signal > data_in; + sc_signal > down; + unsigned int i; + sc_signal > parity_out; + sc_signal > up; + + up_down up_down_0("up_down_0"); + up_down_0.borrow_out(borrow_out); + up_down_0.carry_out(carry_out); + up_down_0.data_in(data_in); + up_down_0.clk(clock); + up_down_0.count_out(count_out); + up_down_0.down(down); + up_down_0.parity_out(parity_out); + up_down_0.up(up); + + printf("%5s %2s %4s %7s %10s %8s %10s %9s\n", + "clock", "up", "down", "data_in", "parity_out", + "carry_out", "borrow_out", "count_out"); + + for( i = 0; i < sizeof s/sizeof(struct stimulus); i++) { + up = s[i].up; + down = s[i].down; + data_in = s[i].data_in; + + sc_start(1, SC_NS); + + printf("%5d %2d %4d %7d %10d %8d %10d %9d\n", + (int)sc_time_stamp().to_double()/1000, (int)up, (int)down, + (int)data_in, (int)parity_out, (int)carry_out, (int)borrow_out, + (int)count_out); + } + + /* get last register values */ + printf("%5d %2d %4d %7d %10d %8d %10d %9d\n", + (int)sc_time_stamp().to_double()/1000, (int)up, (int)down, + (int)data_in, (int)parity_out, (int)carry_out, (int)borrow_out, + (int)count_out); + + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_barrier/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_barrier/test01/golden/test01.log new file mode 100644 index 000000000..145f99c5e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_barrier/test01/golden/test01.log @@ -0,0 +1,5 @@ +SystemC Simulation +11 ns - c +11 ns - b +11 ns - a +Program completed diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_barrier/test01/sc_barrier.h b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_barrier/test01/sc_barrier.h new file mode 100644 index 000000000..c2773e97e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_barrier/test01/sc_barrier.h @@ -0,0 +1,88 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_barrier.h -- Barrier Process Synchronization Definition + + Original Author: Andy Goodrich, Forte Design Systems, 5 May 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: sc_barrier.h,v $ +// Revision 1.1.1.1 2006/12/15 20:26:03 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/24 21:04:52 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// + +#ifndef SC_BARRIER_H +#define SC_BARRIER_H + +namespace sc_dp { + +// ----------------------------------------------------------------------------- +// CLASS sc_barrier +// +// This class provides a way of synchronising a set of processes. Each process +// calls the wait() method and one all processes have called that method they +// will all be released for execution. +// ----------------------------------------------------------------------------- + +class sc_barrier { + public: + void initialize( int thread_n ) + { + m_thread_n = thread_n; + } + + void wait() + { + m_thread_n--; + if ( m_thread_n ) + { + ::sc_core::wait(m_barrier_event); + } + else + { + m_barrier_event.notify(SC_ZERO_TIME); + ::sc_core::wait(m_barrier_event); + } + } + + protected: + sc_event m_barrier_event; // Event to wait on. + int m_thread_n; // # of threads left to wait. +}; + +} // namespace sc_dp + +#endif // SC_BARRIER_H diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_barrier/test01/test01.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_barrier/test01/test01.cpp new file mode 100644 index 000000000..5b8c8a8fe --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_barrier/test01/test01.cpp @@ -0,0 +1,47 @@ +#include "systemc.h" +#include "sc_barrier.h" +using sc_dp::sc_barrier; + +SC_MODULE(X) +{ + SC_CTOR(X) + { + sc_thread_handle last_thread; + + SC_THREAD(a); + SC_THREAD(b); + SC_THREAD(c); + + m_barrier.initialize(3); + } + void a() + { + wait(5.0, SC_NS); + m_barrier.wait(); + cout << sc_time_stamp() << " - a" << endl; + } + void b() + { + wait(11.0, SC_NS); + m_barrier.wait(); + cout << sc_time_stamp() << " - b" << endl; + } + void c() + { + m_barrier.wait(); + cout << sc_time_stamp() << " - c" << endl; + } + sc_barrier m_barrier; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + X x("x"); + + sc_start(1000, SC_NS); + + cerr << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test01/golden/sc_join.log b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test01/golden/sc_join.log new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test01/golden/test01.log new file mode 100644 index 000000000..a7237caa7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test01/golden/test01.log @@ -0,0 +1,10 @@ +SystemC Simulation +2 ns: sync(3) terminating +3 ns: sync(4) terminating +4 ns: sync(5) terminating +4 ns: sync(5) terminating +6 ns: sync(7) terminating +10 ns: sync(11) terminating +20 ns: sync(21) terminating +20 ns: waiting waking +Program completed diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test01/test01.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test01/test01.cpp new file mode 100644 index 000000000..f82344bb4 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test01/test01.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- Test using sc_join as barrier mechanism. + + Original Author: Andy Goodrich, Forte Design Systems, 10 October 2004 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "sysc/kernel/sc_dynamic_processes.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 3 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 4 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 5 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 5 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 7 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 11 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 21 ) ) ); + + SC_THREAD(waiting); + } + void sync(int context) + { + for ( int i = 0; i < context; i++ ) + { + wait(m_clk.posedge_event()); + } + cout << sc_time_stamp() << ": sync(" << context << ") terminating" << endl; + } + void waiting() + { + m_join.wait(); + cout << sc_time_stamp() << ": waiting waking" << endl; + } + + sc_in_clk m_clk; + sc_join m_join; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + X x("x"); + x.m_clk(clock); + + sc_start(1000, SC_NS); + + cerr << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test02/golden/test02.log new file mode 100644 index 000000000..a7237caa7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test02/golden/test02.log @@ -0,0 +1,10 @@ +SystemC Simulation +2 ns: sync(3) terminating +3 ns: sync(4) terminating +4 ns: sync(5) terminating +4 ns: sync(5) terminating +6 ns: sync(7) terminating +10 ns: sync(11) terminating +20 ns: sync(21) terminating +20 ns: waiting waking +Program completed diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test02/test02.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test02/test02.cpp new file mode 100644 index 000000000..8eba90a5e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test02/test02.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- Test SC_FORK and SC_JOIN macros. + + Original Author: Andy Goodrich, Forte Design Systems, 10 October 2004 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "sysc/kernel/sc_dynamic_processes.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + + SC_THREAD(waiting); + } + void sync(int context) + { + for ( int i = 0; i < context; i++ ) + { + wait(m_clk.posedge_event()); + } + cout << sc_time_stamp() << ": sync(" << context << ") terminating"<< endl; + } + void waiting() + { + SC_FORK + sc_spawn( sc_bind( &X::sync, this, 3 ) ), + sc_spawn( sc_bind( &X::sync, this, 4 ) ), + sc_spawn( sc_bind( &X::sync, this, 5 ) ), + sc_spawn( sc_bind( &X::sync, this, 5 ) ), + sc_spawn( sc_bind( &X::sync, this, 7 ) ), + sc_spawn( sc_bind( &X::sync, this, 11) ), + sc_spawn( sc_bind( &X::sync, this, 21) ) + SC_JOIN + cout << sc_time_stamp() << ": waiting waking" << endl; + } + + sc_in_clk m_clk; + sc_join m_join; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + X x("x"); + x.m_clk(clock); + + sc_start(1000, SC_NS); + + cerr << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test03/golden/test03.log new file mode 100644 index 000000000..68285dfd4 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test03/golden/test03.log @@ -0,0 +1,86 @@ +SystemC Simulation +Time Spawn Start Stop +----- ----- ----- ---- +0 s 0 +0 s 0 +1 ns 1 +1 ns 1 +3 ns 2 +3 ns 2 +5 ns 0 +5 ns 3 +5 ns 3 +7 ns 1 +7 ns 4 +7 ns 4 +9 ns 2 +9 ns 5 +9 ns 5 +11 ns 3 +11 ns 6 +11 ns 6 +13 ns 4 +13 ns 7 +13 ns 7 +15 ns 5 +15 ns waiting for termination of 2 processes +17 ns 6 +19 ns 7 +19 ns back from termination wait +Time Spawn Start Stop +----- ----- ----- ---- +19 ns 8 +19 ns 8 +21 ns 9 +21 ns 9 +23 ns 10 +23 ns 10 +25 ns 8 +25 ns 11 +25 ns 11 +27 ns 9 +27 ns 12 +27 ns 12 +29 ns 10 +29 ns 13 +29 ns 13 +31 ns 11 +31 ns 14 +31 ns 14 +33 ns 12 +33 ns 15 +33 ns 15 +35 ns 13 +35 ns waiting for termination of 2 processes +37 ns 14 +39 ns 15 +39 ns back from termination wait +Time Spawn Start Stop +----- ----- ----- ---- +39 ns 16 +39 ns 16 +41 ns 17 +41 ns 17 +43 ns 18 +43 ns 18 +45 ns 16 +45 ns 19 +45 ns 19 +47 ns 17 +47 ns 20 +47 ns 20 +49 ns 18 +49 ns 21 +49 ns 21 +51 ns 19 +51 ns 22 +51 ns 22 +53 ns 20 +53 ns 23 +53 ns 23 +55 ns 21 +55 ns waiting for termination of 2 processes +57 ns 22 +59 ns 23 +59 ns back from termination wait +Program completed. diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test03/test03.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test03/test03.cpp new file mode 100644 index 000000000..d783150e3 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test03/test03.cpp @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- Test sc_join as gating mechanism for a process awaiting the + demise of its child processes. + + Original Author: Andy Goodrich, Forte Design Systems, 18 April 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" + +SC_MODULE(TB) +{ + SC_CTOR(TB) + { + SC_THREAD(abc); + sensitive << m_clk.pos(); + } + void abc() + { + for ( int i = 0; i < 3; i++ ) + { + cout << "Time Spawn Start Stop " << endl; + cout << "----- ----- ----- ----" << endl; + int ii = 2; + int spawn_i; + int spawn_n = 8; + sc_spawn_options options; + sc_join join; + options.set_sensitivity(&m_clk.pos()); + for ( spawn_i = 0; spawn_i < spawn_n; spawn_i++ ) + { + int process_i = spawn_i + i * spawn_n; + cout << sc_time_stamp() << " " << process_i << endl; + join.add_process(sc_spawn( + sc_bind(&TB::process, this, sc_ref(process_i)), + sc_gen_unique_name("pipe"), &options ) ); + sc_core::wait(ii); + } + cout << sc_time_stamp() << " waiting for termination of " + << join.process_count() << " processes" << endl; + join.wait(); + cout << sc_time_stamp() << " back from termination wait " << endl; + } + } + void process( int& instance ) + { + int i = instance; + cout << sc_time_stamp() << " " << i << endl; + wait(6); + cout << sc_time_stamp() << " " << i << endl; + } + sc_in m_clk; +}; + + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + TB tb("tb"); + + tb.m_clk(clock); + sc_start(100, SC_NS); + cout << "Program completed." << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test04/golden/test04.log b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test04/golden/test04.log new file mode 100644 index 000000000..0d1660025 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test04/golden/test04.log @@ -0,0 +1,11 @@ +SystemC Simulation +2 ns: sync(3) terminating +3 ns: sync(4) terminating +4 ns: sync(5) terminating +4 ns: sync(5) terminating +6 ns: sync(7) terminating +10 ns: sync(11) terminating +20 ns: sync(21) terminating +20 ns: asynchronous wait waking +21 ns: clocked wait waking +Program completed diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test04/test04.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test04/test04.cpp new file mode 100644 index 000000000..e9aa9efd0 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test04/test04.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- Test using sc_join as barrier mechanism with clocked and + asynchronous thread waits. + + Original Author: Andy Goodrich, Forte Design Systems, 10 October 2004 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "sysc/kernel/sc_dynamic_processes.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 3 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 4 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 5 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 5 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 7 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 11 ) ) ); + m_join.add_process( sc_spawn( sc_bind(&X::sync, this, 21 ) ) ); + + SC_CTHREAD(cwaiting,m_clk.pos()); + SC_THREAD(waiting); + } + void cwaiting() + { + m_join.wait_clocked(); + cout << sc_time_stamp() << ": clocked wait waking" << endl; + } + + void sync(int context) + { + for ( int i = 0; i < context; i++ ) + { + wait(m_clk.posedge_event()); + } + cout << sc_time_stamp() << ": sync(" << context << ") terminating" << endl; + } + void waiting() + { + m_join.wait(); + cout << sc_time_stamp() << ": asynchronous wait waking" << endl; + } + + sc_in_clk m_clk; + sc_join m_join; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + X x("x"); + x.m_clk(clock); + + sc_start(1000, SC_NS); + + cerr << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test05/golden/test05.log b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test05/golden/test05.log new file mode 100644 index 000000000..13684b960 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test05/golden/test05.log @@ -0,0 +1,10 @@ +SystemC Simulation +3 ns: sync(3) terminating +4 ns: sync(4) terminating +5 ns: sync(5) terminating +5 ns: sync(5) terminating +7 ns: sync(7) terminating +11 ns: sync(11) terminating +21 ns: sync(21) terminating +22 ns: clocked wait waking +Program completed diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test05/test05.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test05/test05.cpp new file mode 100644 index 000000000..9a7f0242d --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_join/test05/test05.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- Test using SC_FORK and SC_CJOIN macros. + + Original Author: Andy Goodrich, Forte Design Systems, 29 April 2004 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "sysc/kernel/sc_dynamic_processes.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + SC_CTHREAD(cwaiting,m_clk.pos()); + } + void cwaiting() + { + SC_FORK + sc_spawn( sc_bind(&X::sync, this, 3 ) ) , + sc_spawn( sc_bind(&X::sync, this, 4 ) ) , + sc_spawn( sc_bind(&X::sync, this, 5 ) ) , + sc_spawn( sc_bind(&X::sync, this, 5 ) ) , + sc_spawn( sc_bind(&X::sync, this, 7 ) ) , + sc_spawn( sc_bind(&X::sync, this, 11 ) ) , + sc_spawn( sc_bind(&X::sync, this, 21 ) ) + SC_CJOIN + cout << sc_time_stamp() << ": clocked wait waking" << endl; + } + + void sync(int context) + { + for ( int i = 0; i < context; i++ ) + { + wait(m_clk.posedge_event()); + } + cout << sc_time_stamp() << ": sync(" << context << ") terminating" << endl; + } + sc_in_clk m_clk; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + X x("x"); + x.m_clk(clock); + + sc_start(1000, SC_NS); + + cerr << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_spawn_options/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_spawn_options/test01/golden/test01.log new file mode 100644 index 000000000..1df950f86 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_spawn_options/test01/golden/test01.log @@ -0,0 +1,26 @@ +SystemC Simulation + +Round robin method 1 at time 100 ns +Round robin method 2 at time 110 ns +Round robin method 3 at time 120 ns +Round robin method 4 at time 130 ns +Round robin method 1 at time 140 ns +Round robin method 2 at time 150 ns +Round robin method 3 at time 160 ns +Round robin method 4 at time 170 ns +Round robin method 1 at time 180 ns +Round robin method 2 at time 190 ns +Round robin method 3 at time 200 ns +Round robin method 4 at time 210 ns +Round robin method 1 at time 220 ns +Round robin method 2 at time 230 ns +Round robin method 3 at time 240 ns +Round robin method 4 at time 250 ns +Round robin method 1 at time 260 ns +Round robin method 2 at time 270 ns +Round robin method 3 at time 280 ns +Round robin method 4 at time 290 ns + +Done. + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/sc_spawn_options/test01/test01.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_spawn_options/test01/test01.cpp new file mode 100644 index 000000000..67d18e210 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/sc_spawn_options/test01/test01.cpp @@ -0,0 +1,139 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- Demo "new" dynamic method support. + + + See the README file for a description of these capabilities. This demo + excercises all of the major capabilities. + + Original Author: Stuart Swan, Cadence Design Systems, Inc., 2002-10-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Andy Goodrich, Forte Design Systems, 30 July 03 + Description of Modification: Converted thread demo to method demo. + + *****************************************************************************/ + + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + + +int test_function(double d) +{ + cout << endl << "Test_function sees " << d << endl; + return int(d); +} + +void void_function(double d) +{ + cout << endl << "void_function sees " << d << endl; +} + +int ref_function(const double& d) +{ + cout << endl << "ref_function sees " << d << endl; + return int(d); +} + + +class top : public sc_module +{ +public: + SC_HAS_PROCESS(top); + + top(sc_module_name name) : sc_module(name) + { + SC_THREAD(main); + } + + void main() + { + sc_event e1, e2, e3, e4; + sc_spawn_options options1, options2, options3, options4; + int r; + + cout << endl; + + e1.notify(100, SC_NS); + + // Spawn several methods that co-operatively execute in round robin order + + options1.spawn_method(); + options1.dont_initialize(); + options1.set_sensitivity(&e1); + sc_spawn(&r, + sc_bind(&top::round_robin, this, "1", sc_ref(e1), sc_ref(e2), 3), + "1", &options1 + ); + + options2.spawn_method(); + options2.dont_initialize(); + options2.set_sensitivity(&e2); + sc_spawn(&r, + sc_bind(&top::round_robin, this, "2", sc_ref(e2), sc_ref(e3), 3), + "2", &options2 + ); + + options3.spawn_method(); + options3.dont_initialize(); + options3.set_sensitivity(&e3); + sc_spawn(&r, + sc_bind(&top::round_robin, this, "3", sc_ref(e3), sc_ref(e4), 3), + "3", &options3 + ); + + options4.spawn_method(); + options4.dont_initialize(); + options4.set_sensitivity(&e4); + sc_spawn(&r, + sc_bind(&top::round_robin, this, "4", sc_ref(e4), sc_ref(e1), 3), + "4", &options4 + ); + wait(295, SC_NS); + cout << endl << "Done." << endl; + sc_stop(); + } + + int round_robin(const char *str, sc_event& receive, sc_event& send, int cnt) + { + cout << "Round robin method " << str << + " at time " << sc_time_stamp() << endl; + next_trigger(receive); + send.notify(10, SC_NS); + return 0; + } +}; + +int sc_main (int argc , char *argv[]) +{ + top top1("Top1"); + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test01/golden/test01.log new file mode 100644 index 000000000..c585cabd3 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test01/golden/test01.log @@ -0,0 +1,47 @@ +SystemC Simulation + +100 ns: Top1.main.t1: Round robin thread 1 +110 ns: Top1.main.t2: Round robin thread 2 +120 ns: Top1.main.t3: Round robin thread 3 +130 ns: Top1.main.t4: Round robin thread 4 +140 ns: Top1.main.t1: Round robin thread 1 +150 ns: Top1.main.t2: Round robin thread 2 +160 ns: Top1.main.t3: Round robin thread 3 +170 ns: Top1.main.t4: Round robin thread 4 +180 ns: Top1.main.t1: Round robin thread 1 +190 ns: Top1.main.t2: Round robin thread 2 +200 ns: Top1.main.t3: Round robin thread 3 +210 ns: Top1.main.t4: Round robin thread 4 +Returned int is 0 + + +221 ns: Top1.main.thread_p_0: Thread 0 ending. +222 ns: Top1.main.thread_p_1: Thread 1 ending. +223 ns: Top1.main.thread_p_2: Thread 2 ending. +224 ns: Top1.main.thread_p_3: Thread 3 ending. +225 ns: Top1.main.thread_p_4: Thread 4 ending. +226 ns: Top1.main.thread_p_5: Thread 5 ending. +227 ns: Top1.main.thread_p_6: Thread 6 ending. +228 ns: Top1.main.thread_p_7: Thread 7 ending. +229 ns: Top1.main.thread_p_8: Thread 8 ending. +230 ns: Top1.main.thread_p_9: Thread 9 ending. +241 ns: Top1.main.thread_p_10: Thread 0 ending. +242 ns: Top1.main.thread_p_11: Thread 1 ending. +243 ns: Top1.main.thread_p_12: Thread 2 ending. +244 ns: Top1.main.thread_p_13: Thread 3 ending. +245 ns: Top1.main.thread_p_14: Thread 4 ending. +246 ns: Top1.main.thread_p_15: Thread 5 ending. +247 ns: Top1.main.thread_p_16: Thread 6 ending. +248 ns: Top1.main.thread_p_17: Thread 7 ending. +249 ns: Top1.main.thread_p_18: Thread 8 ending. +250 ns: Top1.main.thread_p_19: Thread 9 ending. + +260 ns: Top1.main.thread_p_20: Test_function sees 3.14159 +Returned int is 3 + +260 ns: Top1.main.void_function: void_function sees 1.2345 + +260 ns: Top1.main.thread_p_21: ref_function sees 9.8765 +Returned int is 9 + +Done. diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test01/test01.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test01/test01.cpp new file mode 100644 index 000000000..098057691 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test01/test01.cpp @@ -0,0 +1,169 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + Original Author: Stuart Swan, Cadence Design Systems, Inc., 2002-10-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test01.cpp,v $ +// Revision 1.3 2011/02/08 06:49:37 acg +// Andy Goodrich: removed carriage returns. +// +// Revision 1.2 2011/02/01 17:17:37 acg +// Andy Goodrich: update of copyright notice, added visible CVS logging. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + + +int test_function(double d) +{ + cout << endl << sc_time_stamp() << ": " << sc_get_current_process_handle().name() + << ": Test_function sees " << d << endl; + return int(d); +} + +void void_function(double d) +{ + cout << endl << sc_time_stamp() << ": " << sc_get_current_process_handle().name() + << ": void_function sees " << d << endl; +} + +int ref_function(const double& d) +{ + cout << endl << sc_time_stamp() << ": " << sc_get_current_process_handle().name() + << ": ref_function sees " << d << endl; + return int(d); +} + + +class top : public sc_module +{ +public: + SC_HAS_PROCESS(top); + + top(sc_module_name name) : sc_module(name) + { + SC_THREAD(main); + } + + void main() + { + int r; + sc_event e1, e2, e3, e4; + + cout << endl; + + e1.notify(100, SC_NS); + + // Spawn several threads that co-operatively execute in round robin order + + SC_FORK + sc_spawn(&r, + sc_bind(&top::round_robin, this, "1", sc_ref(e1), sc_ref(e2), 3), "t1") , + sc_spawn(&r, + sc_bind(&top::round_robin, this, "2", sc_ref(e2), sc_ref(e3), 3), "t2") , + sc_spawn(&r, + sc_bind(&top::round_robin, this, "3", sc_ref(e3), sc_ref(e4), 3), "t3") , + sc_spawn(&r, + sc_bind(&top::round_robin, this, "4", sc_ref(e4), sc_ref(e1), 3), "t4") , + SC_JOIN + + cout << "Returned int is " << r << endl; + cout << endl << endl; + + // Test that threads in thread pool are successfully reused ... + + for (int i = 0 ; i < 10; i++) + sc_spawn(&r, sc_bind(&top::wait_and_end, this, i)); + + wait(20, SC_NS); + + // Test thread reuse + + for (int i = 0 ; i < 10; i++) + sc_spawn(&r, sc_bind(&top::wait_and_end, this, i)); + + wait(20, SC_NS); + + // Demo of a function rather than method call, & use return value ... + + wait( sc_spawn(&r, sc_bind(&test_function, 3.14159)).terminated_event() ); + + cout << "Returned int is " << r << endl; + + // demo sc_spawn_options usage + + sc_spawn_options ops; + ops.set_stack_size(0); + sc_process_handle handle1 = sc_spawn( + sc_bind(&void_function, 1.2345), "void_function", &ops + ); + wait(handle1.terminated_event()); + + double d = 9.8765; + wait( sc_spawn(&r, sc_bind(&ref_function, sc_cref(d))).terminated_event() ); + + cout << "Returned int is " << r << endl; + + cout << endl << "Done." << endl; + } + + int round_robin(const char *str, sc_event& receive, sc_event& send, int cnt) + { + while (--cnt >= 0) + { + wait(receive); + cout << sc_time_stamp() << ": " << sc_get_current_process_handle().name() + << ": Round robin thread " << str << endl; + wait(10, SC_NS); + send.notify(); + } + + return 0; + } + + int wait_and_end(int i) + { + wait( i + 1, SC_NS); + cout << sc_time_stamp() << ": " << sc_get_current_process_handle().name() + << ": Thread " << i << " ending." << endl; + return 0; + } +}; + +int sc_main (int argc , char *argv[]) +{ + top top1("Top1"); + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test02/golden/test02.log new file mode 100644 index 000000000..8264ba823 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test02/golden/test02.log @@ -0,0 +1,25 @@ +SystemC Simulation + +0 s: CTOR, Before spawning function_method + +0 s, mod1.main: main thread, Before spawning round robin methods + + +0 s, mod1.main: main thread, Issuing wait(60, SC_NS) +0 s, mod1.main.method1: In Round robin method 1. Issued next_trigger. +0 s, mod1.main.method2: In Round robin method 2. Issued next_trigger. +0 s, mod1.main.method3: In Round robin method 3. Issued next_trigger. +0 s, mod1.main.method4: In Round robin method 4. Issued next_trigger. +15 ns, mod1.main.method1: In Round robin method 1. Notified. Ending Round robin method 1 +25 ns, mod1.main.method2: In Round robin method 2. Notified. Ending Round robin method 2 +35 ns, mod1.main.method3: In Round robin method 3. Notified. Ending Round robin method 3 +45 ns, mod1.main.method4: In Round robin method 4. Notified. Ending Round robin method 4 + +55 ns, mod1.event_sensitive_method: function_method sees 1.2345 + +60 ns, mod1.main: Done main thread. + +100 ns: sc_main, Before spawning function_thread + +100 ns, thread_p_0: function_thread sees 6.789 +110 ns, thread_p_0: ending thread diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test02/test02.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test02/test02.cpp new file mode 100644 index 000000000..44af1bbf2 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test02/test02.cpp @@ -0,0 +1,161 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + Original Author: Bishnupriya Bhattacharya, Cadence Design Systems, + September 5, 2003 + + *****************************************************************************/ + +// test dynamic method processes and hierarchical dynamic process naming + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test02.cpp,v $ +// Revision 1.3 2011/03/06 06:55:19 acg +// Andy Goodrich: removed carriage returns. +// +// Revision 1.2 2011/02/01 17:17:40 acg +// Andy Goodrich: update of copyright notice, added visible CVS logging. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +int function_method(double d) +{ + cout << endl << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": function_method sees " << d << endl; + return int(d); +} + +void function_thread(double d) +{ + cout << endl << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": function_thread sees " << d << endl; + sc_core::wait(10, SC_NS); + cout << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": ending thread" << endl; +} + +class module1 : public sc_module +{ +private: + sc_event& ev; + int method_count; + int r; +public: + + SC_HAS_PROCESS(module1); + + module1(sc_module_name name, sc_event& event) : sc_module(name), + ev(event), method_count(0), r(0) + { + SC_THREAD(main); + cout << endl << sc_time_stamp() << ": CTOR, Before spawning function_method " << endl; + sc_spawn_options o1; + o1.spawn_method(); + o1.dont_initialize(); + o1.set_sensitivity(&ev); + sc_process_handle h4 = sc_spawn(&r, sc_bind(&function_method, 1.2345), "event_sensitive_method", &o1); + + } + + void main() + { + int r; + sc_event e1, e2, e3, e4; + sc_spawn_options o1, o2, o3, o4; + + cout << endl << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": main thread, Before spawning round robin methods " + << endl << endl; + + e1.notify(15, SC_NS); + o1.spawn_method(); + o2.spawn_method(); + o3.spawn_method(); + o4.spawn_method(); + + // Spawn several methods that co-operatively execute in round robin order + + sc_spawn( + sc_bind(&module1::round_robin, this, "1", sc_ref(e1), sc_ref(e2), 1), "method1", &o1); + sc_spawn( + sc_bind(&module1::round_robin, this, "2", sc_ref(e2), sc_ref(e3), 1), "method2", &o2); + sc_spawn( + sc_bind(&module1::round_robin, this, "3", sc_ref(e3), sc_ref(e4), 1), "method3", &o3); + sc_spawn( + sc_bind(&module1::round_robin, this, "4", sc_ref(e4), sc_ref(e1), 1), "method4", &o4); + + + cout << endl << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": main thread, Issuing wait(60, SC_NS)" << endl; + + sc_core::wait(60, SC_NS); + + cout << endl << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": Done main thread." << endl; + } + + void round_robin(const char *str, sc_event& receive, sc_event& send, int cnt) + { + cout << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": In Round robin method " << str; + + if (method_count < 4) { + method_count++; + next_trigger(receive); + cout << ". Issued next_trigger. " << endl; + } else { + send.notify(10, SC_NS); + cout << ". Notified. Ending Round robin method " << str << endl; + } + + } + +}; + +int sc_main (int argc , char *argv[]) +{ + sc_event event1; + event1.notify(55, SC_NS); + + module1 mod1("mod1", event1); + sc_start(100, SC_NS); + cout << endl << sc_time_stamp() << ": sc_main, Before spawning function_thread " << endl; + sc_process_handle h4 = sc_spawn(sc_bind(&function_thread, 6.789)); + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test03/golden/test03.log new file mode 100644 index 000000000..1131d3324 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test03/golden/test03.log @@ -0,0 +1,8 @@ +SystemC Simulation + +0 s: static_method, Before spawning function_method + +Error: (E519) wait() is only allowed in SC_THREADs and SC_CTHREADs: + in SC_METHODs use next_trigger() instead +In file: +In process: mod1.static_method @ 0 s diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test03/test03.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test03/test03.cpp new file mode 100644 index 000000000..08040d299 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test03/test03.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + Original Author: Bishnupriya Bhattacharya, Cadence Design Systems, + September 5, 2003 + + *****************************************************************************/ + +// test error message for wait() on dynamic method process handle's event. + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Andy Goodrich, Forte Design Systems, 26 Jul 2005 + Description of Modification: Changed waits to use the new terminated_event + support. + + *****************************************************************************/ +// $Log: test03.cpp,v $ +// Revision 1.2 2011/02/01 17:17:40 acg +// Andy Goodrich: update of copyright notice, added visible CVS logging. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +int function_method(double d) +{ + cout << endl << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": function_method sees " << d << endl; + return int(d); +} + +class module1 : public sc_module +{ +private: + sc_event& ev; +public: + + SC_HAS_PROCESS(module1); + + module1(sc_module_name name, sc_event& event) : sc_module(name), + ev(event) + { + SC_METHOD(static_method); + } + + void static_method() { + int r; + cout << endl << sc_time_stamp() << ": static_method, Before spawning function_method " << endl; + sc_spawn_options o1; + o1.spawn_method(); + o1.dont_initialize(); + o1.set_sensitivity(&ev); + sc_process_handle h4 = sc_spawn(&r, sc_bind(&function_method, 1.2345), "event_sensitive_method", &o1); + wait(h4.terminated_event()); + } +}; + +int sc_main (int argc , char *argv[]) +{ + sc_event event1; + event1.notify(55, SC_NS); + + module1 mod1("mod1", event1); + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test04/golden/test04.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test04/golden/test04.log new file mode 100644 index 000000000..3535d567f --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test04/golden/test04.log @@ -0,0 +1,8 @@ +SystemC Simulation + +0 s, mod1.main: main thread, Before spawning round robin methods + + +Error: (E561) Attempt to register method process with sc_join object +In file: +In process: mod1.main @ 0 s diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test04/test04.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test04/test04.cpp new file mode 100644 index 000000000..f1a55e653 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test04/test04.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + Original Author: Bishnupriya Bhattacharya, Cadence Design Systems, + September 5, 2003 + + *****************************************************************************/ + +// test error message for SC_FORK-SC_JOIN on dynamic method process handles + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test04.cpp,v $ +// Revision 1.2 2011/02/01 17:17:40 acg +// Andy Goodrich: update of copyright notice, added visible CVS logging. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + + +class module1 : public sc_module +{ +private: + int method_count; +public: + + SC_HAS_PROCESS(module1); + + module1(sc_module_name name) : sc_module(name), + method_count(0) + { + SC_THREAD(main); + } + + void main() + { + int r; + sc_event e1, e2, e3, e4; + sc_spawn_options o1, o2, o3, o4; + + cout << endl << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": main thread, Before spawning round robin methods " + << endl << endl; + + e1.notify(15, SC_NS); + o1.spawn_method(); + o2.spawn_method(); + o3.spawn_method(); + o4.spawn_method(); + + // Spawn several threads that co-operatively execute in round robin order + + SC_FORK + sc_spawn(&r, + sc_bind(&module1::round_robin, this, "1", sc_ref(e1), sc_ref(e2), 1), "mth1", &o1), + sc_spawn(&r, + sc_bind(&module1::round_robin, this, "2", sc_ref(e2), sc_ref(e3), 1), "mth2", &o2), + sc_spawn(&r, + sc_bind(&module1::round_robin, this, "3", sc_ref(e3), sc_ref(e4), 1), "mth3", &o3), + sc_spawn(&r, + sc_bind(&module1::round_robin, this, "4", sc_ref(e4), sc_ref(e1), 1), "mth4", &o4), + SC_JOIN + + cout << endl << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": main thread, Issuing wait(60, SC_NS)" << endl; + + wait(60, SC_NS); + + cout << endl << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": Done main thread." << endl; + } + + int round_robin(const char *str, sc_event& receive, sc_event& send, int cnt) + { + cout << sc_time_stamp() << ", " + << sc_get_current_process_handle().name() + << ": In Round robin method " << str; + + if (method_count < 4) { + method_count++; + next_trigger(receive); + cout << ". Issued next_trigger. " << endl; + } else { + send.notify(10, SC_NS); + cout << ". Notified. Ending Round robin method " << str << endl; + } + + return 0; + } + +}; +int sc_main (int argc , char *argv[]) +{ + module1 mod1("mod1"); + + sc_start(100, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test05/golden/test05.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test05/golden/test05.log new file mode 100644 index 000000000..f38eaee80 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test05/golden/test05.log @@ -0,0 +1,5 @@ +SystemC Simulation +spawn thetest +in thetest() + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test05/test05.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test05/test05.cpp new file mode 100644 index 000000000..c22a81385 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test05/test05.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + Original Author: John Rose, Cadence Design Systems, Inc., 2004-02-15 + + *****************************************************************************/ + +// tests sc_spawn() in start_of_simulation() + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test05.cpp,v $ +// Revision 1.2 2011/02/01 17:17:40 acg +// Andy Goodrich: update of copyright notice, added visible CVS logging. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" +SC_MODULE(mod) +{ + void start_of_simulation() + { + cout << "spawn thetest" << endl; + sc_spawn(sc_bind(&mod::thetest, this)); + } + void thetest() + { + cout << "in thetest()" << endl; + wait(10,SC_NS); + sc_stop(); + } + SC_CTOR(mod) { + } +}; + +int sc_main(int, char**) { + mod m1("m1"); + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test06/golden/test06.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test06/golden/test06.log new file mode 100644 index 000000000..ab7d58f54 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test06/golden/test06.log @@ -0,0 +1,9 @@ +SystemC Simulation +10 ns:entering p0, spawning p1 +10 ns:exiting p0 +10 ns:entering p1, spawning p2 +10 ns:entering p2, spawning p3 +10 ns:entering p3 +20 ns:exiting p1 +30 ns:exiting p2 +40 ns:exiting p3 diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test06/test06.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test06/test06.cpp new file mode 100644 index 000000000..4f581df61 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test06/test06.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + Original Author: Bishnupriya Bhattacharya, Cadence Design Systems, Inc., 2004-03-10 + + *****************************************************************************/ + +// tests parent spawning process dying before child spawned process. + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test06.cpp,v $ +// Revision 1.2 2011/02/01 17:17:40 acg +// Andy Goodrich: update of copyright notice, added visible CVS logging. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +void p3() { + cerr << sc_time_stamp() << ":entering p3" << endl; + wait(30, SC_NS); + cerr << sc_time_stamp() << ":exiting p3" << endl; +} + +void p2() { + cerr << sc_time_stamp() << ":entering p2, spawning p3" << endl; + sc_spawn(sc_bind(&p3)); + wait(20, SC_NS); + cerr << sc_time_stamp() << ":exiting p2" << endl; +} + +void p1() { + cerr << sc_time_stamp() << ":entering p1, spawning p2" << endl; + sc_spawn(sc_bind(&p2)); + wait(10, SC_NS); + cerr << sc_time_stamp() << ":exiting p1" << endl; +} + +void p0() { + cerr << sc_time_stamp() << ":entering p0, spawning p1" << endl; + sc_spawn(sc_bind(&p1)); + cerr << sc_time_stamp() << ":exiting p0" << endl; +} + +int sc_main(int, char**) { + + sc_start(10, SC_NS); + p0(); + sc_start(50, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test07/golden/test07.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test07/golden/test07.log new file mode 100644 index 000000000..06e667695 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test07/golden/test07.log @@ -0,0 +1,100 @@ +SystemC Simulation +1 ns setting m_a +1 ns callback +2 ns setting m_b +2 ns callback +3 ns setting m_c +3 ns callback +4 ns setting m_a +4 ns callback +5 ns setting m_b +5 ns callback +6 ns setting m_c +6 ns callback +7 ns setting m_a +7 ns callback +8 ns setting m_b +8 ns callback +9 ns setting m_c +9 ns callback +10 ns setting m_a +10 ns callback +11 ns setting m_b +11 ns callback +12 ns setting m_c +12 ns callback +13 ns setting m_a +13 ns callback +14 ns setting m_b +14 ns callback +15 ns setting m_c +15 ns callback +16 ns setting m_a +16 ns callback +17 ns setting m_b +17 ns callback +18 ns setting m_c +18 ns callback +19 ns setting m_a +19 ns callback +20 ns setting m_b +20 ns callback +21 ns setting m_c +21 ns callback +22 ns setting m_a +22 ns callback +23 ns setting m_b +23 ns callback +24 ns setting m_c +24 ns callback +25 ns setting m_a +25 ns callback +26 ns setting m_b +26 ns callback +27 ns setting m_c +27 ns callback +28 ns setting m_a +28 ns callback +29 ns setting m_b +29 ns callback +30 ns setting m_c +30 ns callback +31 ns setting m_a +31 ns callback +32 ns setting m_b +32 ns callback +33 ns setting m_c +33 ns callback +34 ns setting m_a +34 ns callback +35 ns setting m_b +35 ns callback +36 ns setting m_c +36 ns callback +37 ns setting m_a +37 ns callback +38 ns setting m_b +38 ns callback +39 ns setting m_c +39 ns callback +40 ns setting m_a +40 ns callback +41 ns setting m_b +41 ns callback +42 ns setting m_c +42 ns callback +43 ns setting m_a +43 ns callback +44 ns setting m_b +44 ns callback +45 ns setting m_c +45 ns callback +46 ns setting m_a +46 ns callback +47 ns setting m_b +47 ns callback +48 ns setting m_c +48 ns callback +49 ns setting m_a +49 ns callback +Program completed diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test07/test07.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test07/test07.cpp new file mode 100644 index 000000000..5b4975045 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test07/test07.cpp @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- Test that for all the interfaces of a port a callback occurs + for a dynamic process created after the beginning of simulation. + + Original Author: Andy Goodrich, Forte Design Systems + + *****************************************************************************/ + + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test07.cpp,v $ +// Revision 1.2 2011/02/01 17:17:40 acg +// Andy Goodrich: update of copyright notice, added visible CVS logging. +// + + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(thread,m_clk.pos()); + + // Set up interfaces for m_port. + + m_port(m_a); + m_port(m_b); + m_port(m_c); + } + void method() + { + cout << sc_time_stamp() << " callback" << endl; + } + void thread() + { + sc_spawn_options options; + options.spawn_method(); + options.set_sensitivity( &m_port ); + options.dont_initialize(); + sc_spawn( sc_bind(&DUT::method,this), "method", &options ); + for ( bool value=true;; value = !value) + { + wait(); + cout << sc_time_stamp() << " setting m_a " << endl; + m_a = value; + wait(); + cout << sc_time_stamp() << " setting m_b " << endl; + m_b = value; + wait(); + cout << sc_time_stamp() << " setting m_c " << endl; + m_c = value; + } + } + sc_signal m_a; + sc_signal m_b; + sc_signal m_c; + sc_in m_clk; + sc_port,3> m_port; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(50, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test08/golden/test08.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test08/golden/test08.log new file mode 100644 index 000000000..818ef6e87 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test08/golden/test08.log @@ -0,0 +1,7 @@ +SystemC Simulation +update called... +thread here... +update called... + +Info: /OSCI/SystemC: Simulation stopped by user. +Program completed diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test08/test08.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test08/test08.cpp new file mode 100644 index 000000000..5374ff859 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test08/test08.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- Test for sc_spawn during update phase, including after stop. + + Original Author: Andy Goodrich + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test08.cpp,v $ +// Revision 1.4 2011/02/20 13:43:44 acg +// Andy Goodrich: updates for IEEE 1666 2011. +// +// Revision 1.3 2011/02/18 21:11:07 acg +// Philipp A. Hartmann: rename ABC class to eliminate class with wingdi.h. +// +// Revision 1.2 2011/02/01 17:17:40 acg +// Andy Goodrich: update of copyright notice, added visible CVS logging. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" + +class prim_channel : public sc_prim_channel { + public: + prim_channel(const char* name = sc_gen_unique_name("prim_channel") ) + : sc_prim_channel(name) + {} + void thread() + { + cout << "thread here..." << endl; + } + void update() + { + cout << "update called..." << endl; + sc_spawn( sc_bind(&prim_channel::thread,this), + sc_gen_unique_name("thread")); + } + void write( int i ) + { + request_update(); + } +}; + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(thread,m_clk.pos()); + } + void thread() + { + for (;;) + { + wait(); + m_chan.write(0); + wait(); + m_chan.write(0); + sc_stop(); + } + } + sc_in m_clk; + prim_channel m_chan; +}; +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(10, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test09/golden/test09.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test09/golden/test09.log new file mode 100644 index 000000000..fe9a4a428 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test09/golden/test09.log @@ -0,0 +1,102 @@ +SystemC Simulation +0 s dut.grand_parent initialization + +0 s dut.grand_parent.parent1 initialization +0 s dut.grand_parent.parent2 initialization +0 s dut.grand_parent.parent1.child1 initialization +0 s dut.grand_parent.parent1.child2 initialization +0 s dut.grand_parent.parent1.child3 initialization +0 s dut.grand_parent.parent2.child1 initialization +0 s dut.grand_parent.parent2.child2 initialization +0 s dut.grand_parent.parent2.child3 initialization +4 ns stimulus issuing reset +4 ns dut.grand_parent.parent1.child1 initialization +4 ns dut.grand_parent.parent1.child2 initialization +4 ns dut.grand_parent.parent1.child3 initialization +4 ns dut.grand_parent.parent1 initialization +4 ns dut.grand_parent.parent2.child1 initialization +4 ns dut.grand_parent.parent2.child2 initialization +4 ns dut.grand_parent.parent2.child3 initialization +4 ns dut.grand_parent.parent2 removing children +4 ns dut.grand_parent.parent2.child1 got kill +4 ns dut.grand_parent.parent2.child2 got kill +4 ns dut.grand_parent.parent2.child3 got kill +4 ns dut.grand_parent.parent2 initialization +4 ns dut.grand_parent initialization + +4 ns dut.grand_parent.parent2.child1 initialization +4 ns dut.grand_parent.parent2.child2 initialization +4 ns dut.grand_parent.parent2.child3 initialization +8 ns stimulus issuing reset +8 ns dut.grand_parent.parent1.child1 initialization +8 ns dut.grand_parent.parent1.child2 initialization +8 ns dut.grand_parent.parent1.child3 initialization +8 ns dut.grand_parent.parent1 initialization +8 ns dut.grand_parent.parent2.child1 initialization +8 ns dut.grand_parent.parent2.child2 initialization +8 ns dut.grand_parent.parent2.child3 initialization +8 ns dut.grand_parent.parent2 removing children +8 ns dut.grand_parent.parent2.child1 got kill +8 ns dut.grand_parent.parent2.child2 got kill +8 ns dut.grand_parent.parent2.child3 got kill +8 ns dut.grand_parent.parent2 initialization +8 ns dut.grand_parent initialization + +8 ns dut.grand_parent.parent2.child1 initialization +8 ns dut.grand_parent.parent2.child2 initialization +8 ns dut.grand_parent.parent2.child3 initialization +12 ns stimulus issuing reset +12 ns dut.grand_parent.parent1.child1 initialization +12 ns dut.grand_parent.parent1.child2 initialization +12 ns dut.grand_parent.parent1.child3 initialization +12 ns dut.grand_parent.parent1 initialization +12 ns dut.grand_parent.parent2.child1 initialization +12 ns dut.grand_parent.parent2.child2 initialization +12 ns dut.grand_parent.parent2.child3 initialization +12 ns dut.grand_parent.parent2 removing children +12 ns dut.grand_parent.parent2.child1 got kill +12 ns dut.grand_parent.parent2.child2 got kill +12 ns dut.grand_parent.parent2.child3 got kill +12 ns dut.grand_parent.parent2 initialization +12 ns dut.grand_parent initialization + +12 ns dut.grand_parent.parent2.child1 initialization +12 ns dut.grand_parent.parent2.child2 initialization +12 ns dut.grand_parent.parent2.child3 initialization +16 ns stimulus issuing reset +16 ns dut.grand_parent.parent1.child1 initialization +16 ns dut.grand_parent.parent1.child2 initialization +16 ns dut.grand_parent.parent1.child3 initialization +16 ns dut.grand_parent.parent1 initialization +16 ns dut.grand_parent.parent2.child1 initialization +16 ns dut.grand_parent.parent2.child2 initialization +16 ns dut.grand_parent.parent2.child3 initialization +16 ns dut.grand_parent.parent2 removing children +16 ns dut.grand_parent.parent2.child1 got kill +16 ns dut.grand_parent.parent2.child2 got kill +16 ns dut.grand_parent.parent2.child3 got kill +16 ns dut.grand_parent.parent2 initialization +16 ns dut.grand_parent initialization + +16 ns dut.grand_parent.parent2.child1 initialization +16 ns dut.grand_parent.parent2.child2 initialization +16 ns dut.grand_parent.parent2.child3 initialization +20 ns stimulus issuing reset +20 ns dut.grand_parent.parent1.child1 initialization +20 ns dut.grand_parent.parent1.child2 initialization +20 ns dut.grand_parent.parent1.child3 initialization +20 ns dut.grand_parent.parent1 initialization +20 ns dut.grand_parent.parent2.child1 initialization +20 ns dut.grand_parent.parent2.child2 initialization +20 ns dut.grand_parent.parent2.child3 initialization +20 ns dut.grand_parent.parent2 removing children +20 ns dut.grand_parent.parent2.child1 got kill +20 ns dut.grand_parent.parent2.child2 got kill +20 ns dut.grand_parent.parent2.child3 got kill +20 ns dut.grand_parent.parent2 initialization +20 ns dut.grand_parent initialization + +20 ns dut.grand_parent.parent2.child1 initialization +20 ns dut.grand_parent.parent2.child2 initialization +20 ns dut.grand_parent.parent2.child3 initialization +Program completed diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test09/test09.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test09/test09.cpp new file mode 100644 index 000000000..437628142 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test09/test09.cpp @@ -0,0 +1,205 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test09.cpp -- Test for hierarchical reset, try/catch and individual kill + processes + + Original Author: Andy Goodrich + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test09.cpp,v $ +// Revision 1.4 2011/02/01 17:17:40 acg +// Andy Goodrich: update of copyright notice, added visible CVS logging. +// +// Revision 1.3 2011/01/14 14:23:46 acg +// Andy Goodrich: Fixes for 1666_2011 +// +// Revision 1.2 2009/10/14 19:13:27 acg +// Andy Goodrich: changes for SystemC 2.3 +// +// Revision 1.1.1.1 2006/12/15 20:26:03 acg +// systemc_tests-2.3 +// +// Revision 1.1 2006/04/17 20:10:04 acg +// Andy Goodrich: first inclusion of test for expanded process support. +// + + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(stimulus,m_clk.pos()); + reset_signal_is(m_reset, true); + SC_THREAD(grand_parent); + sensitive << m_clk.pos(); + } + + void child() + { + sc_process_handle my_handle = sc_get_current_process_handle(); + cout << sc_time_stamp() << " " << my_handle.name() + << " initialization" << endl; + try { + for (;;) + { + wait(); + } + } + catch(sc_core::sc_unwind_exception& ex) + { + if ( !ex.is_reset() ) + { + cout << sc_time_stamp() << " " << my_handle.name() + << " got kill" << endl; + } + throw ex; + } + } + + void grand_parent() + { + static bool initialize = true; + cout << sc_time_stamp() << " " << "dut.grand_parent initialization" + << endl; + cout << endl; + if ( initialize ) + { + m_grand_parent_handle = sc_get_current_process_handle(); + sc_spawn( sc_bind(&DUT::parent1, this), "parent1" ); + sc_spawn( sc_bind(&DUT::parent2, this), "parent2" ); + initialize = false; + } + + for (;;) + { + wait(); + } + } + + void parent1() + { + static bool initialize = true; + sc_process_handle m_child1; + sc_process_handle m_child2; + sc_process_handle m_child3; + sc_process_handle my_handle = sc_get_current_process_handle(); + cout << sc_time_stamp() << " " << my_handle.name() + << " initialization" << endl; + if ( initialize ) + { + m_child1 = sc_spawn( sc_bind(&DUT::child, this), "child1" ); + m_child2 = sc_spawn( sc_bind(&DUT::child, this), "child2" ); + m_child3 = sc_spawn( sc_bind(&DUT::child, this), "child3" ); + initialize = false; + } + + for (;;) + { + wait(); + } + } + + void parent2() + { + sc_process_handle m_child1; + sc_process_handle m_child2; + sc_process_handle m_child3; + sc_process_handle my_handle; + for (;;) + { + try + { + my_handle = sc_get_current_process_handle(); + cout << sc_time_stamp() << " " << my_handle.name() + << " initialization" << endl; + m_child1 = sc_spawn( sc_bind(&DUT::child, this), "child1" ); + m_child2 = sc_spawn( sc_bind(&DUT::child, this), "child2" ); + m_child3 = sc_spawn( sc_bind(&DUT::child, this), "child3" ); + + for (;;) + { + wait(); + } + } + catch ( sc_core::sc_unwind_exception& ex ) + { + if ( ex.is_reset() ) + { + cout << sc_time_stamp() << " " << my_handle.name() + << " removing children" << endl; + m_child1.kill(); + m_child2.kill(); + m_child3.kill(); + } + throw ex; + } + } + } + + void stimulus() + { + for (;;) + { + wait(); + wait(); + wait(); + wait(); + cout << sc_time_stamp() << " stimulus issuing reset" << endl; + m_grand_parent_handle.reset(SC_INCLUDE_DESCENDANTS); + } + } + + sc_in m_clk; + sc_process_handle m_grand_parent_handle; + sc_in m_reset; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + sc_signal reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + reset = true; + sc_start(1, SC_NS); + reset = false; + sc_start(20, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test10/golden/test10.log b/src/systemc/tests/systemc/kernel/dynamic_processes/test10/golden/test10.log new file mode 100644 index 000000000..d7d8a9de4 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test10/golden/test10.log @@ -0,0 +1,15 @@ +SystemC Simulation +0 s thread 0: initialization +0 s thread 1: initialization +0 s thread 2: initialization +4 ns stimulus setting kill +5 ns killer: killing thread0 +5 ns thread0: received kill +5 ns thread1: received kill +5 ns thread0: after killing thread1 +5 ns killer: after killing thread0 +5 ns thread2: received kill +5 ns killer: after killing thread2 + +Info: /OSCI/SystemC: Simulation stopped by user. +Program completed diff --git a/src/systemc/tests/systemc/kernel/dynamic_processes/test10/test10.cpp b/src/systemc/tests/systemc/kernel/dynamic_processes/test10/test10.cpp new file mode 100644 index 000000000..2c2dd74eb --- /dev/null +++ b/src/systemc/tests/systemc/kernel/dynamic_processes/test10/test10.cpp @@ -0,0 +1,175 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- Testing proper process execution order for SC_METHOD murderer. + + Original Author: Andy Goodrich + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test10.cpp,v $ +// Revision 1.2 2011/02/01 20:00:37 acg +// Andy Goodrich: better messaging for output. +// +// Revision 1.1 2011/02/01 17:16:48 acg +// Andy Goodrich: first check-in. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_METHOD(killer); + sensitive << m_clk.pos(); + SC_CTHREAD(stimulus,m_clk.pos()); + SC_THREAD(thread0); + sensitive << m_clk.pos(); + m_thread0 = sc_get_current_process_handle(); + SC_THREAD(thread1); + sensitive << m_clk.pos(); + m_thread1 = sc_get_current_process_handle(); + SC_THREAD(thread2); + sensitive << m_clk.pos(); + m_thread2 = sc_get_current_process_handle(); + m_kill = false; + } + + void killer() + { + if ( m_kill ) + { + cout << sc_time_stamp() << " killer: killing thread0 " << endl; + m_thread0.kill(); + cout << sc_time_stamp() << " killer: after killing thread0" << endl; + m_thread2.kill(); + cout << sc_time_stamp() << " killer: after killing thread2" << endl; + } + } + + void thread0() + { + cout << sc_time_stamp() << " thread 0: initialization" << endl; + try { + for (;;) + { + wait(); + } + } + catch(sc_core::sc_unwind_exception& ex) + { + if ( !ex.is_reset() ) + { + cout << sc_time_stamp() << " thread0: received kill" << endl; + m_thread1.kill(); + cout << sc_time_stamp() << " thread0: after killing thread1" + << endl; + } + throw ex; + } + } + + void thread1() + { + cout << sc_time_stamp() << " thread 1: initialization" << endl; + try { + for (;;) + { + wait(); + } + } + catch(sc_core::sc_unwind_exception& ex) + { + if ( !ex.is_reset() ) + { + cout << sc_time_stamp() << " thread1: received kill" << endl; + } + throw ex; + } + } + + void thread2() + { + cout << sc_time_stamp() << " thread 2: initialization" << endl; + try { + for (;;) + { + wait(); + } + } + catch(sc_core::sc_unwind_exception& ex) + { + if ( !ex.is_reset() ) + { + cout << sc_time_stamp() << " thread2: received kill" << endl; + } + throw ex; + } + } + + void stimulus() + { + for (;;) + { + wait(); + wait(); + wait(); + wait(); + cout << sc_time_stamp() << " stimulus setting kill" << endl; + m_kill = true; + wait(); + m_kill = false; + wait(); + wait(); + sc_stop(); + } + } + + sc_in m_clk; + bool m_kill; + sc_process_handle m_thread0; + sc_process_handle m_thread1; + sc_process_handle m_thread2; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/kind_string/test01/foo.cpp b/src/systemc/tests/systemc/kernel/kind_string/test01/foo.cpp new file mode 100644 index 000000000..579eb47c8 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/kind_string/test01/foo.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + foo.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +void +foo( const sc_signal& sig_ ) +{ + sc_signal sig; + + if( std::string(sig_.kind()) == std::string(sig.kind()) ) { + cout << "kind() the same\n"; + } else { + cout << "kind() different: '" << sig_.kind() << "' ~= ' " + << sig.kind() << "'\n"; + } +} diff --git a/src/systemc/tests/systemc/kernel/kind_string/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/kind_string/test01/golden/test01.log new file mode 100644 index 000000000..96dd0c997 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/kind_string/test01/golden/test01.log @@ -0,0 +1,26 @@ +SystemC Simulation +sc_method_process +sc_method_process +sc_thread_process +sc_thread_process +sc_cthread_process +sc_cthread_process +sc_module +sc_module +sc_clock +sc_clock +sc_fifo +sc_fifo +sc_mutex +sc_mutex +sc_signal +sc_signal +sc_signal +sc_signal +sc_signal +sc_signal +sc_signal_resolved +sc_signal_resolved +sc_signal_rv +sc_signal_rv +kind() the same diff --git a/src/systemc/tests/systemc/kernel/kind_string/test01/main.cpp b/src/systemc/tests/systemc/kernel/kind_string/test01/main.cpp new file mode 100644 index 000000000..ab74f1059 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/kind_string/test01/main.cpp @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Bishnupriya Bhattacharya, Cadence Design Systems, + September 5, 2003 + Description of Modification: change sc_get_curr_proc_handle() to + sc_get_last_created_process_handle() + + *****************************************************************************/ + +// test the kind string of objects + +#include "systemc.h" + +#define WRITE(a) \ +{ \ + cout << (a).kind() << endl; \ + const sc_object* obj = &(a); \ + cout << obj->kind() << endl; \ +} + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + void method_action() + {} + + void thread_action() + {} + + void cthread_action() + {} + + SC_CTOR( mod_a ) + { + SC_METHOD( method_action ); + WRITE( *sc_get_current_process_handle().get_process_object() ); + SC_THREAD( thread_action ); + WRITE( *sc_get_current_process_handle().get_process_object() ); + SC_CTHREAD( cthread_action, clk.pos() ); + WRITE( *sc_get_current_process_handle().get_process_object() ); + } +}; + +extern void foo( const sc_signal& ); + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + WRITE( a ); + + sc_clock clk; + WRITE( clk ); + + sc_fifo fifo; + WRITE( fifo ); + + sc_mutex mutex; + WRITE( mutex ); + + sc_signal signal; + WRITE( signal ); + + sc_signal signal_bool; + WRITE( signal_bool ); + + sc_signal signal_logic; + WRITE( signal_logic ); + + sc_signal_resolved signal_resolved; + WRITE( signal_resolved ); + + sc_signal_rv<8> signal_rv; + WRITE( signal_rv ); + + foo( signal ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/kind_string/test01/test01.f b/src/systemc/tests/systemc/kernel/kind_string/test01/test01.f new file mode 100644 index 000000000..86ce61a67 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/kind_string/test01/test01.f @@ -0,0 +1,2 @@ +test01/foo.cpp +test01/main.cpp diff --git a/src/systemc/tests/systemc/kernel/module_method_after_sc_start/golden/module_method_after_sc_start.log b/src/systemc/tests/systemc/kernel/module_method_after_sc_start/golden/module_method_after_sc_start.log new file mode 100644 index 000000000..88037e592 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/module_method_after_sc_start/golden/module_method_after_sc_start.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Error: (E541) call to SC_METHOD in sc_module while simulation running: y.comb.dork +In file: +In process: y.comb @ 0 s diff --git a/src/systemc/tests/systemc/kernel/module_method_after_sc_start/module_method_after_sc_start.cpp b/src/systemc/tests/systemc/kernel/module_method_after_sc_start/module_method_after_sc_start.cpp new file mode 100644 index 000000000..d39696b46 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/module_method_after_sc_start/module_method_after_sc_start.cpp @@ -0,0 +1,40 @@ +#include "systemc.h" + +SC_MODULE(Y) +{ +public: + sc_in in; + SC_CTOR(Y) : in("in") + { + SC_METHOD(comb); + sensitive << in; + init = 1; + } + int init; + void comb() + { + if ( init ) + { + init = 0; + SC_METHOD(dork); + } + } + void dork() + { + cout << "dork" << endl; + } +}; + +int sc_main(int argc, char* arg[]) +{ + sc_clock clock; + Y y("y"); + y.in(clock); + + + sc_start(10, SC_NS); + cerr << "Program completed" << endl; + + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/module_thread_after_sc_start/golden/module_thread_after_sc_start.log b/src/systemc/tests/systemc/kernel/module_thread_after_sc_start/golden/module_thread_after_sc_start.log new file mode 100644 index 000000000..3c3227a91 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/module_thread_after_sc_start/golden/module_thread_after_sc_start.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Error: (E542) call to SC_THREAD in sc_module while simulation running: y.comb.dork +In file: +In process: y.comb @ 0 s diff --git a/src/systemc/tests/systemc/kernel/module_thread_after_sc_start/module_thread_after_sc_start.cpp b/src/systemc/tests/systemc/kernel/module_thread_after_sc_start/module_thread_after_sc_start.cpp new file mode 100644 index 000000000..4891b991d --- /dev/null +++ b/src/systemc/tests/systemc/kernel/module_thread_after_sc_start/module_thread_after_sc_start.cpp @@ -0,0 +1,40 @@ +#include "systemc.h" + +SC_MODULE(Y) +{ +public: + sc_in in; + SC_CTOR(Y) : in("in") + { + SC_METHOD(comb); + sensitive << in; + init = 1; + } + int init; + void comb() + { + if ( init ) + { + init = 0; + SC_THREAD(dork); + } + } + void dork() + { + cout << "dork" << endl; + } +}; + +int sc_main(int argc, char* arg[]) +{ + sc_clock clock; + Y y("y"); + y.in(clock); + + + sc_start(10, SC_NS); + cerr << "Program completed" << endl; + + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/phase_callbacks/test01/golden/test01.log new file mode 100644 index 000000000..9e42301d0 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test01/golden/test01.log @@ -0,0 +1,7 @@ +SystemC Simulation +prim_channel: before end of elaboration +prim_channel: start of simulation + +Info: /OSCI/SystemC: Simulation stopped by user. +prim_channel: end of simulation +Program completed diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test01/test01.cpp b/src/systemc/tests/systemc/kernel/phase_callbacks/test01/test01.cpp new file mode 100644 index 000000000..c4095aae3 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test01/test01.cpp @@ -0,0 +1,57 @@ +#include "systemc.h" + +class Sig : public sc_prim_channel { + public: + virtual void before_end_of_elaboration() + { + cout << "prim_channel: before end of elaboration" << endl; + } + virtual void end_of_simulation() + { + cout << "prim_channel: end of simulation" << endl; + } + virtual void start_of_simulation() + { + cout << "prim_channel: start of simulation" << endl; + } +}; + +SC_MODULE(X) +{ + SC_CTOR(X) + { + SC_CTHREAD(y, clk.pos()); + } + void y() + { + wait(); + sc_stop(); + } + sc_in_clk clk; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + Sig signal; + X x("x"); + + x.clk(clock); + + if ( sc_start_of_simulation_invoked() ) + cout << __FILE__ << "(" << __LINE__ << "): bad start flag should be false" << endl; + if ( sc_end_of_simulation_invoked() ) + cout << __FILE__ << "(" << __LINE__ << "): bad end flag should be false" << endl; + + sc_start(2, SC_NS); + if ( !sc_start_of_simulation_invoked() ) + cout << __FILE__ << "(" << __LINE__ << "): bad start flag should be true" << endl; + + if ( !sc_end_of_simulation_invoked() ) + cout << __FILE__ << "(" << __LINE__ << "): bad end flag should be true" << endl; + + cerr << "Program completed" << endl; + + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/phase_callbacks/test02/golden/test02.log new file mode 100644 index 000000000..9e42301d0 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test02/golden/test02.log @@ -0,0 +1,7 @@ +SystemC Simulation +prim_channel: before end of elaboration +prim_channel: start of simulation + +Info: /OSCI/SystemC: Simulation stopped by user. +prim_channel: end of simulation +Program completed diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test02/test02.cpp b/src/systemc/tests/systemc/kernel/phase_callbacks/test02/test02.cpp new file mode 100644 index 000000000..2f4f3c285 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test02/test02.cpp @@ -0,0 +1,57 @@ +#include "systemc.h" + +class Sig : public sc_prim_channel { + public: + virtual void before_end_of_elaboration() + { + cout << "prim_channel: before end of elaboration" << endl; + } + virtual void end_of_simulation() + { + cout << "prim_channel: end of simulation" << endl; + } + virtual void start_of_simulation() + { + cout << "prim_channel: start of simulation" << endl; + } +}; + +SC_MODULE(X) +{ + SC_CTOR(X) + { + SC_CTHREAD(y, clk.pos()); + } + void y() + { + wait(); + } + sc_in_clk clk; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + Sig signal; + X x("x"); + + x.clk(clock); + + if ( sc_start_of_simulation_invoked() ) + cout << __FILE__ << "(" << __LINE__ << "): bad start flag should be false" << endl; + if ( sc_end_of_simulation_invoked() ) + cout << __FILE__ << "(" << __LINE__ << "): bad end flag should be false" << endl; + + sc_start(2, SC_NS); + if ( !sc_start_of_simulation_invoked() ) + cout << __FILE__ << "(" << __LINE__ << "): bad start flag should be true" << endl; + + sc_stop(); + if ( !sc_end_of_simulation_invoked() ) + cout << __FILE__ << "(" << __LINE__ << "): bad end flag should be true" << endl; + + cerr << "Program completed" << endl; + + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/phase_callbacks/test03/golden/test03.log new file mode 100644 index 000000000..29f67481e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test03/golden/test03.log @@ -0,0 +1,22 @@ +SystemC Simulation +top.delayed_mod.delayed_port->before_end_of_elaboration() called +top.direct_mod.delayed_port->before_end_of_elaboration() called +top.delayed_mod.direct_port->before_end_of_elaboration() called +top.delayed_port->before_end_of_elaboration() called +top.direct_port->before_end_of_elaboration() called +top.direct_mod.direct_port->before_end_of_elaboration() called +top->before_end_of_elaboration() called +top.direct_mod->before_end_of_elaboration() called +top.direct_mod.direct_port_direct_mod->before_end_of_elaboration() called +top.direct_port_direct_mod->before_end_of_elaboration() called +top.direct_port_delayed_mod->before_end_of_elaboration() called +top.direct_mod.direct_port_delayed_mod->before_end_of_elaboration() called +top.delayed_port_direct_mod->before_end_of_elaboration() called +top.delayed_mod->before_end_of_elaboration() called +top.delayed_mod.direct_port_direct_mod->before_end_of_elaboration() called +top.direct_mod.delayed_port_direct_mod->before_end_of_elaboration() called +top.delayed_mod.delayed_port_direct_mod->before_end_of_elaboration() called +top.delayed_mod.delayed_port_delayed_mod->before_end_of_elaboration() called +top.direct_mod.delayed_port_delayed_mod->before_end_of_elaboration() called +top.delayed_mod.direct_port_delayed_mod->before_end_of_elaboration() called +top.delayed_port_delayed_mod->before_end_of_elaboration() called diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test03/test03.cpp b/src/systemc/tests/systemc/kernel/phase_callbacks/test03/test03.cpp new file mode 100644 index 000000000..d34109cb7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test03/test03.cpp @@ -0,0 +1,148 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// test03.cpp -- test for delayed before end of elaboration. +// +// Original Author: Philipp A. Hartmann, OFFIS Institute for Information +// Technology +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: test03.cpp,v $ +// Revision 1.2 2011/07/24 13:05:30 acg +// Alan Fitch: added return 0 to sc_main that was missing. +// +// Revision 1.1 2011/05/08 17:55:36 acg +// Philipp A. Hartmann: first check in of test. +// + +#include + +using namespace sc_core; + +#define PRINT_CALL( CallBack, Condition ) \ + std::cout << this->name() \ + << "->" #CallBack "()" \ + << ( ( Condition ) ? " " : " NOT " ) \ + << "called" \ + << std::endl + +SC_MODULE(in_port_module) +{ + SC_CTOR(in_port_module) : beoe_called(false) {} + + void before_end_of_elaboration() + { beoe_called = true; } + + void end_of_elaboration() + { PRINT_CALL(before_end_of_elaboration,beoe_called); } + + bool beoe_called; +}; + +struct my_port : sc_in +{ + typedef sc_in base_type; + + explicit my_port( const char* nm ) + : base_type(nm) + , direct_mod( (std::string(nm)+"_direct_mod").c_str() ) + , beoe_called(false) {} + + void before_end_of_elaboration() + { + beoe_called = true; + std::string nm = std::string(basename()) + "_delayed_mod"; + delayed_mod = new in_port_module( nm.c_str() ); + } + + void end_of_elaboration() + { PRINT_CALL(before_end_of_elaboration,beoe_called); } + + in_port_module direct_mod; + in_port_module* delayed_mod; + bool beoe_called; +}; + +SC_MODULE(sub_module) +{ + my_port direct_port; + my_port* delayed_port; + + SC_CTOR(sub_module) + : direct_port("direct_port") + , delayed_port(0) + , beoe_called(false) + {} + + void before_end_of_elaboration() + { + delayed_port = new my_port( "delayed_port" ); + (*delayed_port)( direct_port ); + beoe_called = true; + } + + void end_of_elaboration() + { PRINT_CALL(before_end_of_elaboration,beoe_called); } + + bool beoe_called; +}; + +SC_MODULE(module) +{ + sub_module direct_mod; + my_port direct_port; + sub_module* delayed_mod; + my_port* delayed_port; + + SC_CTOR(module) + : direct_mod("direct_mod") + , direct_port("direct_port") + , delayed_mod(0) + , delayed_port(0) + , beoe_called(false) + { + direct_mod.direct_port( direct_port ); + } + + void before_end_of_elaboration() + { + delayed_port = new my_port( "delayed_port" ); + (*delayed_port)( direct_port ); + + delayed_mod = new sub_module( "delayed_mod" ); + delayed_mod->direct_port( *delayed_port ); + beoe_called = true; + } + + void end_of_elaboration() + { PRINT_CALL(before_end_of_elaboration,beoe_called); } + + bool beoe_called; +}; + +int sc_main( int, char*[] ) +{ + module mod("top"); + sc_signal sig("sig"); + mod.direct_port( sig ); + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test04/golden/register_phase_callbacks.log b/src/systemc/tests/systemc/kernel/phase_callbacks/test04/golden/register_phase_callbacks.log new file mode 100644 index 000000000..5915a8821 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test04/golden/register_phase_callbacks.log @@ -0,0 +1,80 @@ +SystemC Simulation + +Warning: (W552) register simulation phase callback: phase_tracer_0: SC_ELABORATION: + substituted by (SC_BEFORE_END_OF_ELABORATION|SC_END_OF_ELABORATION) +In file: + +Warning: (W552) register simulation phase callback: phase_tracer_0: SC_RUNNING: + substituted by (SC_END_OF_INITIALIZATION|SC_END_OF_UPDATE|SC_BEFORE_TIMESTEP) +In file: + +Warning: (W552) register simulation phase callback: phase_tracer_0: SC_RUNNING: + substituted by (SC_END_OF_INITIALIZATION|SC_END_OF_UPDATE|SC_BEFORE_TIMESTEP) +In file: + +Warning: (W552) register simulation phase callback: phase_tracer_0: SC_ELABORATION: + substituted by (SC_BEFORE_END_OF_ELABORATION|SC_END_OF_ELABORATION) +In file: + +Warning: (W552) register simulation phase callback: phase_tracer_0: SC_RUNNING: + substituted by (SC_END_OF_INITIALIZATION|SC_END_OF_UPDATE|SC_BEFORE_TIMESTEP) +In file: +phase_tracer_0: before_end_of_elaboration: 0 callbacks called. +phase_tracer_0: phase callback SC_BEFORE_END_OF_ELABORATION: 0 s -> pending activity: MAX +phase_tracer_0: end_of_elaboration: 1 callbacks called. +phase_tracer_0: phase callback SC_END_OF_ELABORATION: 0 s -> pending activity: MAX +phase_tracer_0: start_of_simulation: 2 callbacks called. + +Warning: (W552) register simulation phase callback: phase_tracer_0: elaboration done + SC_ELABORATION callback(s) ignored +In file: +phase_tracer_0: phase callback SC_START_OF_SIMULATION: 0 s -> pending activity: MAX +phase_tracer_0: phase callback SC_END_OF_INITIALIZATION: 0 s -> pending activity: 0 s +phase_tracer_0.timed: 0 s: 0 +phase_tracer_0.delta: 0 s: 0 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 0 s -> pending activity: 0 s +phase_tracer_0.delta: 0 s: 1 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 0 s -> pending activity: 100 ns + +Warning: (W553) forbidden action in simulation phase callback: SC_END_OF_UPDATE: + delta notification of `phase_tracer_0.event_0' ignored +In file: +phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 0 s -> pending activity: 100 ns + +Warning: (W553) forbidden action in simulation phase callback: SC_BEFORE_TIMESTEP: + delta notification of `phase_tracer_0.event_0' ignored +In file: +phase_tracer_0.timed: 100 ns: 1 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 100 ns -> pending activity: 0 s +phase_tracer_0.delta: 100 ns: 2 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 100 ns -> pending activity: 100 ns + +Warning: (W553) forbidden action in simulation phase callback: SC_END_OF_UPDATE: + timed notification of `phase_tracer_0.event_0' ignored +In file: +phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 100 ns -> pending activity: 100 ns + +Warning: (W553) forbidden action in simulation phase callback: SC_BEFORE_TIMESTEP: + timed notification of `phase_tracer_0.event_0' ignored +In file: +phase_tracer_0.timed: 200 ns: 2 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 200 ns -> pending activity: 0 s +phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 200 ns -> pending activity: 100 ns +phase_tracer_0.timed: 300 ns: 3 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 300 ns -> pending activity: 0 s +phase_tracer_0.delta: 300 ns: 3 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 300 ns -> pending activity: 100 ns +phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 300 ns -> pending activity: 100 ns +phase_tracer_0.timed: 400 ns: 4 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 400 ns -> pending activity: 0 s +phase_tracer_0.delta: 400 ns: 4 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 400 ns -> pending activity: 100 ns +phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 400 ns -> pending activity: 100 ns +phase_tracer_0.timed: 500 ns: 5 +phase_tracer_0: phase callback SC_END_OF_UPDATE: 500 ns -> pending activity: MAX + +Info: /OSCI/SystemC: Simulation stopped by user. +phase_tracer_0: end_of_simulation: 19 callbacks called. +phase_tracer_0: phase callback SC_END_OF_SIMULATION: 500 ns -> pending activity: MAX +phase_tracer_0: phase callback SC_STOPPED: 500 ns -> pending activity: MAX +phase_tracer_0: [destructor]: 21 callbacks called. diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test04/register_phase_callbacks.cpp b/src/systemc/tests/systemc/kernel/phase_callbacks/test04/register_phase_callbacks.cpp new file mode 100644 index 000000000..5ed6dd4f9 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test04/register_phase_callbacks.cpp @@ -0,0 +1,221 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + register_phase_callbacks.cpp -- Test for (un)registering dynamic callbacks + + Note: requires simulation phase callback support enabled in the kernel + SC_ENABLE_SIMULATION_PHASE_CALLBACKS / --enable-phase-callbacks + + Original Author: Philipp A. Hartmann, OFFIS, 2013-05-17 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +#define VERBOSE 1 + +SC_MODULE(phase_tracer) +{ + SC_HAS_PROCESS(phase_tracer); + phase_tracer( sc_module_name nm + = sc_core::sc_gen_unique_name("phase_tracer") ) + : cb_count(0), timed_count(), delta_count() + { + SC_METHOD(timed); + SC_METHOD(delta); + sensitive << ev; + + old_mask = SC_STATUS_ANY; + cb_mask = register_simulation_phase_callback( SC_STATUS_ANY ); + sc_assert( cb_mask == (old_mask & ~SC_ELABORATION & ~SC_RUNNING) ); + old_mask = cb_mask; + + cb_mask = unregister_simulation_phase_callback(SC_STOPPED); + sc_assert( cb_mask == (old_mask & ~SC_STOPPED) ); + old_mask = cb_mask; + + cb_mask = register_simulation_phase_callback( SC_UNITIALIZED ); + sc_assert( cb_mask == old_mask ); + + cb_mask = unregister_simulation_phase_callback(SC_UNITIALIZED); + sc_assert( cb_mask == old_mask ); + + cb_mask = unregister_simulation_phase_callback(SC_RUNNING); + sc_assert( cb_mask == (old_mask & ~SC_END_OF_INITIALIZATION +// & ~SC_END_OF_EVALUATION + & ~SC_END_OF_UPDATE + & ~SC_BEFORE_TIMESTEP) ); + old_mask = cb_mask; + + cb_mask = unregister_simulation_phase_callback(SC_ELABORATION); + sc_assert( cb_mask == (old_mask & ~SC_BEFORE_END_OF_ELABORATION + & ~SC_END_OF_ELABORATION ) ); + old_mask = cb_mask; + + cb_mask = unregister_simulation_phase_callback( SC_STATUS_ANY ); + sc_assert( cb_mask == SC_UNITIALIZED ); + old_mask = cb_mask; + + cb_mask = register_simulation_phase_callback( SC_RUNNING ); + sc_assert( cb_mask == ( SC_END_OF_INITIALIZATION +// | SC_END_OF_EVALUATION + | SC_END_OF_UPDATE | SC_BEFORE_TIMESTEP ) ); + + cb_mask = register_simulation_phase_callback( SC_STATUS_ANY ); + sc_assert( cb_mask == (SC_STATUS_ANY & ~SC_ELABORATION & ~SC_RUNNING) ); + } + + void timed() + { + std::cout + << sc_get_current_process_handle().name() + << ": " << sc_time_stamp() + << ": " << timed_count + << std::endl; + if( timed_count++ < 5 ) { + next_trigger( 100, SC_NS ); + } + if( delta_count < 5 ) + ev.notify( SC_ZERO_TIME ); + + if( timed_count>=6 ) + sc_stop(); + } + void delta() + { + std::cout + << sc_get_current_process_handle().name() + << ": " << sc_time_stamp() + << ": " << delta_count + << std::endl; + delta_count++; + } + + virtual void simulation_phase_callback() + { + cb_count++; + +# if VERBOSE + { + std::string ttp; + if( !sc_pending_activity() ) { + ttp = "MAX"; + } else { + ttp = sc_time_to_pending_activity().to_string(); + } + std::cout << name() + << ": phase callback " + << sc_get_status() + << ": " << sc_time_stamp() + << " -> pending activity: " << ttp + << std::endl; + } +# endif + sc_assert( cb_mask & sc_get_status() ); + + switch( sc_get_status() ) + { + case SC_END_OF_UPDATE: + case SC_BEFORE_TIMESTEP: + if( timed_count == 3 ) + ev.cancel(); + if( delta_count == 2 ) + ev.notify(SC_ZERO_TIME); + if( timed_count == 2 ) + ev.notify( 1, SC_NS ); + break; + default: + // do nothing + break; + } + } + + ~phase_tracer() + { print_static_phase_stats( "[destructor]" ); } + + void print_static_phase_stats( const char* phase ) + { +#if VERBOSE + std::cout << name() + << ": " << phase << ": " + << cb_count << " callbacks called." + << std::endl; +#endif + } + +private: + + virtual void before_end_of_elaboration() + { + sc_assert( sc_get_status() == SC_BEFORE_END_OF_ELABORATION ); + print_static_phase_stats( "before_end_of_elaboration" ); + } + + virtual void end_of_elaboration() + { + sc_assert( sc_get_status() == SC_END_OF_ELABORATION ); + print_static_phase_stats( "end_of_elaboration" ); + } + + virtual void start_of_simulation() + { + sc_assert( sc_get_status() == SC_START_OF_SIMULATION ); + print_static_phase_stats( "start_of_simulation" ); + + // ignored - issues warning + register_simulation_phase_callback( SC_ELABORATION ); + } + + virtual void end_of_simulation() + { + sc_assert( sc_get_status() == SC_END_OF_SIMULATION ); + print_static_phase_stats( "end_of_simulation" ); + } + + + +private: + phase_cb_mask cb_mask, old_mask; + sc_dt::uint64 cb_count, timed_count, delta_count; + sc_event ev; +}; + + +int sc_main(int, char*[]) +{ + // don't run without callbacks enabled + sc_report_handler::set_actions( SC_ID_PHASE_CALLBACKS_UNSUPPORTED_ + , SC_DEFAULT_ERROR_ACTIONS ); + + phase_tracer pt; + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test05/golden/simulation_callbacks.log b/src/systemc/tests/systemc/kernel/phase_callbacks/test05/golden/simulation_callbacks.log new file mode 100644 index 000000000..85fefc217 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test05/golden/simulation_callbacks.log @@ -0,0 +1,109 @@ +SystemC Simulation +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 0 s -> pending activity: MAX +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 0 s -> pending activity: 0 s +top.timed: 0 s: 0/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 0 s -> pending activity: 0 s +top.delta: 0 s: 1/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 0 s -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 0 s -> pending activity: 1 ns +top.timed: 1 ns: 1/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 1 ns -> pending activity: 0 s +top.delta: 1 ns: 2/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 1 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 1 ns -> pending activity: 1 ns +top.timed: 2 ns: 2/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 2 ns -> pending activity: 0 s +top.delta: 2 ns: 3/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 2 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 2 ns -> pending activity: 1 ns +top.timed: 3 ns: 3/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 3 ns -> pending activity: 0 s +top.delta: 3 ns: 4/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 3 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 3 ns -> pending activity: 1 ns +top.timed: 4 ns: 4/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 4 ns -> pending activity: 0 s +top.delta: 4 ns: 5/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 4 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 4 ns -> pending activity: 1 ns +top.timed: 5 ns: 5/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 5 ns -> pending activity: 0 s +top.delta: 5 ns: 6/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 5 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 5 ns -> pending activity: 1 ns +top.timed: 6 ns: 6/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 6 ns -> pending activity: 0 s +top.delta: 6 ns: 7/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 6 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 6 ns -> pending activity: 1 ns +top.timed: 7 ns: 7/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 7 ns -> pending activity: 0 s +top.delta: 7 ns: 8/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 7 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 7 ns -> pending activity: 1 ns +top.timed: 8 ns: 8/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 8 ns -> pending activity: 0 s +top.delta: 8 ns: 9/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 8 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 8 ns -> pending activity: 1 ns +top.timed: 9 ns: 9/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 9 ns -> pending activity: 0 s +top.delta: 9 ns: 10/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 9 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 9 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 10 ns -> pending activity: MAX +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 10 ns -> pending activity: 0 s +top.timed: 10 ns: 0/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 10 ns -> pending activity: 0 s +top.delta: 10 ns: 1/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 10 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 10 ns -> pending activity: 1 ns +top.timed: 11 ns: 1/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 11 ns -> pending activity: 0 s +top.delta: 11 ns: 2/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 11 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 11 ns -> pending activity: 1 ns +top.timed: 12 ns: 2/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 12 ns -> pending activity: 0 s +top.delta: 12 ns: 3/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 12 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 12 ns -> pending activity: 1 ns +top.timed: 13 ns: 3/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 13 ns -> pending activity: 0 s +top.delta: 13 ns: 4/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 13 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 13 ns -> pending activity: 1 ns +top.timed: 14 ns: 4/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 14 ns -> pending activity: 0 s +top.delta: 14 ns: 5/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 14 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 14 ns -> pending activity: 1 ns +top.timed: 15 ns: 5/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 15 ns -> pending activity: 0 s +top.delta: 15 ns: 6/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 15 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 15 ns -> pending activity: 1 ns +top.timed: 16 ns: 6/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 16 ns -> pending activity: 0 s +top.delta: 16 ns: 7/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 16 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 16 ns -> pending activity: 1 ns +top.timed: 17 ns: 7/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 17 ns -> pending activity: 0 s +top.delta: 17 ns: 8/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 17 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 17 ns -> pending activity: 1 ns +top.timed: 18 ns: 8/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 18 ns -> pending activity: 0 s +top.delta: 18 ns: 9/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 18 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 18 ns -> pending activity: 1 ns +top.timed: 19 ns: 9/0 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 19 ns -> pending activity: 0 s +top.delta: 19 ns: 10/1 +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 19 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_BEFORE_TIMESTEP: 19 ns -> pending activity: 1 ns +top.phase_tracer_0: phase callback SC_END_OF_UPDATE: 20 ns -> pending activity: MAX + +Info: /OSCI/SystemC: Simulation stopped by user. +top.phase_tracer_0: [destructor]: 65 callbacks called. diff --git a/src/systemc/tests/systemc/kernel/phase_callbacks/test05/simulation_callbacks.cpp b/src/systemc/tests/systemc/kernel/phase_callbacks/test05/simulation_callbacks.cpp new file mode 100644 index 000000000..03dde6ccc --- /dev/null +++ b/src/systemc/tests/systemc/kernel/phase_callbacks/test05/simulation_callbacks.cpp @@ -0,0 +1,242 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + simulation_callbacks.cpp -- Test of simulation phase callbacks + + Note: requires simulation phase callback support enabled in the kernel + SC_ENABLE_SIMULATION_PHASE_CALLBACKS / --enable-phase-callbacks + + Original Author: Philipp A. Hartmann, OFFIS, 2013-05-17 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +#ifdef BENCHMARK +# include "rusage_timer.h" +# define ROUNDS 20 +# define NUM_TIMED_TRIGGERS 2000000 +# define NUM_DELTA_TRIGGERS 50 +# define VERBOSE 0 +#else +# define ROUNDS 2 +# define NUM_TIMED_TRIGGERS 10 +# define NUM_DELTA_TRIGGERS 1 +# define VERBOSE 1 +#endif + +#ifndef REGISTER_CALLBACKS +# define REGISTER_CALLBACKS 1 +#endif +#ifndef EXTRA_METHOD +# define EXTRA_METHOD 0 +#endif + +#define TIMED_THREAD 1 + +#if TIMED_THREAD +# define TIMED_WAIT wait +# define TIMED_PROCESS SC_THREAD +#else +# define TIMED_WAIT next_trigger +# define TIMED_PROCESS SC_METHOD +#endif + +#if REGISTER_CALLBACKS +//# define CALLBACK_MASK ( SC_END_OF_EVALUATION ) +//# define CALLBACK_MASK ( SC_END_OF_UPDATE ) +//# define CALLBACK_MASK ( SC_BEFORE_TIMESTEP ) +# define CALLBACK_MASK ( SC_END_OF_UPDATE | SC_BEFORE_TIMESTEP ) +#else +// SC_RUNNING (for EXTRA_METHOD) +# define CALLBACK_MASK ( SC_RUNNING ) +#endif + +static const sc_dt::uint64 max_rounds = ROUNDS; +static const sc_dt::uint64 max_timed_triggers = NUM_TIMED_TRIGGERS; +static const sc_dt::uint64 max_delta_triggers = NUM_DELTA_TRIGGERS; +static const sc_time delay(1, SC_NS); + +SC_MODULE(phase_tracer) +{ + SC_HAS_PROCESS(phase_tracer); + phase_tracer( sc_module_name = sc_core::sc_gen_unique_name("phase_tracer") ) + : cb_mask(CALLBACK_MASK), cb_count(0) + { +#if REGISTER_CALLBACKS + cb_mask = register_simulation_phase_callback( CALLBACK_MASK ); +#endif + } + + virtual void simulation_phase_callback() + { + cb_count++; + +# if VERBOSE + { + std::string ttp; + if( !sc_pending_activity() ) { + ttp = "MAX"; + } else { + ttp = sc_time_to_pending_activity().to_string(); + } + std::cout << name() + << ": phase callback " + << sc_get_status() + << ": " << sc_time_stamp() + << " -> pending activity: " << ttp + << std::endl; + } +# endif + sc_assert( cb_mask & sc_get_status() ); + } + + ~phase_tracer() + { print_static_phase_stats( "[destructor]" ); } + + void print_static_phase_stats( const char* phase ) + { +#if VERBOSE + std::cout << name() + << ": " << phase << ": " + << cb_count << " callbacks called." + << std::endl; +#endif + } + +private: + unsigned cb_mask; + sc_dt::uint64 cb_count; +}; + +SC_MODULE(activities) +{ + SC_CTOR(activities) + : timed_count(), delta_count() + { + TIMED_PROCESS(timed); + sensitive << timed_ev; + dont_initialize(); + SC_METHOD(delta); + sensitive << delta_ev; + dont_initialize(); +#if EXTRA_METHOD + SC_METHOD(extra); + sensitive << timed_ev; + dont_initialize(); +#endif + } + + void notify_round() + { timed_ev.notify(SC_ZERO_TIME); } + +private: + void timed() + { +# if TIMED_THREAD + while(1) +# endif + { + if( timed_count >= max_timed_triggers ) { + timed_count = 0; + TIMED_WAIT(); + } else { + verbose(); + ++timed_count; + if( max_delta_triggers ) + delta_ev.notify(SC_ZERO_TIME); + timed_ev.notify(delay); + TIMED_WAIT(); + } + } + } + + void delta() + { + ++delta_count; + verbose(); + if( delta_count >= max_delta_triggers ) { + delta_count = 0; + } else { + delta_ev.notify(SC_ZERO_TIME); + } + } + + void extra() + { + if( sc_pending_activity_at_current_time() ) { + pt.simulation_phase_callback(); + next_trigger(SC_ZERO_TIME); + } else if (sc_time_to_pending_activity()== sc_max_time()-sc_time_stamp() ) { + next_trigger(); + } else { + pt.simulation_phase_callback(); + next_trigger(sc_time_to_pending_activity()); + } + } + + void verbose() + { +#if VERBOSE + std::cout + << sc_get_current_process_handle().name() + << ": " << sc_time_stamp() + << ": " << timed_count << "/" << delta_count + << std::endl; +#endif + } + +private: + phase_tracer pt; + sc_dt::uint64 timed_count, delta_count; + sc_event timed_ev, delta_ev; +}; + + +int sc_main(int, char*[]) +{ + activities top("top"); + + sc_start(SC_ZERO_TIME); + for(unsigned i=0; i m_clk; + int m_state_cthread0; + int m_state_method0; + int m_state_thread0; + sc_process_handle m_target_cthread0; + sc_process_handle m_target_method0; + sc_process_handle m_target_thread0; +}; + +void top::stimulator0() +{ + const char* name = "stimulator"; + wait(10, SC_NS); + cout << endl; + time_stamp(cout) << name << ": enabling target_cthread0" << endl; + cout << endl; + m_state_cthread0 = ST_NORMAL; + m_target_cthread0.enable(); + wait(10, SC_NS); + + cout << endl; + time_stamp(cout) << name << ": enabling target_method0" << endl; + cout << endl; + m_state_method0 = ST_NORMAL; + m_target_method0.enable(); + wait(10, SC_NS); + + cout << endl; + time_stamp(cout) << name << ": enabling target_thread0" << endl; + cout << endl; + m_state_thread0 = ST_NORMAL; + m_target_thread0.enable(); + ::sc_core::wait(1000, SC_NS); + + cout << endl; + time_stamp(cout) << name << ": terminating" << endl; + sc_stop(); +} + +void top::target_cthread0() +{ + int i; + const char* name = "target_cthread0"; + + time_stamp(cout) << name << ": starting" << endl; + time_stamp(cout) << name << ": issuing self disable" << endl; + m_state_cthread0 = ST_DISABLED; + m_target_cthread0.disable(); + time_stamp(cout) << name << ": after issuing self disable" << endl; + cout << endl; + for ( i = 0; i < 100; i++ ) + { + wait(); + if ( m_state_cthread0 == ST_DISABLED ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + } + time_stamp(cout) << name << ": terminating" << endl; +} + +void top::target_method0() +{ + const char* name = "target_method0"; + static int state = 0; + switch( state ) + { + case 0: + time_stamp(cout) << name << ": starting" << endl; + time_stamp(cout) << name << ": issuing self disable" << endl; + m_state_method0 = ST_DISABLED; + m_target_method0.disable(); + time_stamp(cout) << name << ": after issuing self disable" << endl; + cout << endl; + break; + default: + if ( m_state_method0 == ST_DISABLED ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + break; + case 99: + time_stamp(cout) << name << ": terminating" << endl; + break; + } + state++; +} + +void top::target_thread0() +{ + const char* name = "target_thread0"; + + time_stamp(cout) << name << ": starting" << endl; + time_stamp(cout) << name << ": issuing self disable" << endl; + m_state_thread0 = ST_DISABLED; + m_target_thread0.disable(); + time_stamp(cout) << name << ": after issuing self disable" << endl; + cout << endl; + + // We wait a long enough time that our event will not occur until + // after we are re-enabled. Otherwise this thread will just go away + // quietly when the disable cancels the event. + + ::sc_core::wait(80, SC_NS); + if ( m_state_thread0 == ST_DISABLED ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + time_stamp(cout) << name << ": terminating" << endl; +} + +int sc_main (int argc, char *argv[]) +{ + sc_clock clock( "clock", 1.0, SC_NS ); + + top* top_p = new top("top"); + top_p->m_clk(clock); + + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/process_control/disable_enable/test2/golden/test2.log b/src/systemc/tests/systemc/kernel/process_control/disable_enable/test2/golden/test2.log new file mode 100644 index 000000000..6a5b9bd77 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/disable_enable/test2/golden/test2.log @@ -0,0 +1,84 @@ +SystemC Simulation +0 s[0]: target_method0: starting +0 s[0]: target_thread0: starting +0 s[1]: target_method0: active +0 s[1]: target_cthread0: starting +1 ns[3]: target_thread0: active + +2 ns[4]: stimulator: disabling target_cthread0 + +2 ns[5]: target_method0: active +3 ns[7]: target_thread0: active +4 ns[9]: target_method0: active + +5 ns[10]: stimulator: disabling target_method0 + +5 ns[11]: target_thread0: active +7 ns[14]: target_thread0: active + +8 ns[15]: stimulator: disabling target_thread0 + + +11 ns[18]: stimulator: enabling target_cthread0 + +12 ns[20]: target_cthread0: active + +14 ns[22]: stimulator: enabling target_method0 + +14 ns[23]: target_method0: active +14 ns[23]: target_cthread0: active +16 ns[26]: target_method0: active +16 ns[26]: target_cthread0: active + +17 ns[27]: stimulator: enabling target_thread0 + +17 ns[28]: target_thread0: active +18 ns[30]: target_method0: active +18 ns[30]: target_cthread0: active +19 ns[32]: target_thread0: active + +20 ns[33]: stimulator: disabling target_cthread0 + +20 ns[34]: target_method0: active +21 ns[36]: target_thread0: active +22 ns[38]: target_method0: active + +23 ns[39]: stimulator: disabling target_method0 + +23 ns[40]: target_thread0: active +25 ns[43]: target_thread0: active + +26 ns[44]: stimulator: disabling target_thread0 + + +29 ns[47]: stimulator: enabling target_cthread0 + +30 ns[49]: target_cthread0: active + +32 ns[51]: stimulator: enabling target_method0 + +32 ns[52]: target_method0: active +32 ns[52]: target_cthread0: active +34 ns[55]: target_method0: active +34 ns[55]: target_cthread0: active + +35 ns[56]: stimulator: enabling target_thread0 + +35 ns[57]: target_thread0: active +35 ns[57]: target_thread0: terminating +36 ns[59]: target_method0: active +36 ns[59]: target_cthread0: active +38 ns[62]: target_method0: active +38 ns[62]: target_cthread0: active +40 ns[65]: target_method0: active +40 ns[65]: target_cthread0: active +40 ns[65]: target_cthread0: terminating +42 ns[68]: target_method0: active +44 ns[71]: target_method0: active +46 ns[74]: target_method0: active +48 ns[77]: target_method0: active +52 ns[83]: target_method0: terminating + +1038 ns[1561]: stimulator: terminating + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/process_control/disable_enable/test2/test2.cpp b/src/systemc/tests/systemc/kernel/process_control/disable_enable/test2/test2.cpp new file mode 100644 index 000000000..f42d9bc98 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/disable_enable/test2/test2.cpp @@ -0,0 +1,222 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +//***************************************************************************** +// +// test02.cpp -- test that disabled processes with static sensitivity +// wake up when enabled. +// +// Original Author: Andy Goodrich, Forte Design Systems, Inc. +// +// CVS MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// changes you are making here. +// +// $Log: test2.cpp,v $ +// Revision 1.2 2009/07/28 01:10:19 acg +// Andy Goodrich: replacement test using standardized test bench. +// +//***************************************************************************** + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" + +enum my_process_states { + ST_DISABLED, + ST_NORMAL, + ST_SUSPENDED +}; + +inline ostream& time_stamp( ostream& os ) +{ + os << dec << sc_time_stamp() << "[" << sc_delta_count() << "]: "; + return os; +} + +SC_MODULE(top) { + // constructor: + + SC_CTOR(top) + { + m_state_cthread0 = ST_NORMAL; + m_state_method0 = ST_NORMAL; + m_state_thread0 = ST_NORMAL; + + SC_THREAD(stimulator0); + + SC_CTHREAD( target_cthread0, m_clk.pos() ); + m_target_cthread0 = sc_get_current_process_handle(); + + SC_METHOD(target_method0); + sensitive << m_clk.pos(); + m_target_method0 = sc_get_current_process_handle(); + + SC_THREAD(target_thread0); + sensitive << m_clk.neg(); + m_target_thread0 = sc_get_current_process_handle(); + } + + // processes: + + void stimulator0(); + void target_cthread0(); + void target_method0(); + void target_thread0(); + + // Storage: + + sc_in m_clk; + sc_signal m_state_cthread0; + sc_signal m_state_method0; + sc_signal m_state_thread0; + sc_process_handle m_target_cthread0; + sc_process_handle m_target_method0; + sc_process_handle m_target_thread0; +}; + +#define DISABLE(TARGET) \ + cout << endl; \ + time_stamp(cout) << name << ": disabling target_" << #TARGET << endl; \ + m_state_##TARGET = ST_DISABLED; \ + m_target_##TARGET.disable(); \ + cout << endl; + +#define ENABLE(TARGET) \ + cout << endl; \ + time_stamp(cout) << name << ": enabling target_" << #TARGET << endl; \ + m_state_##TARGET = ST_NORMAL; \ + m_target_##TARGET.enable(); \ + cout << endl; + +void top::stimulator0() +{ + const char* name = "stimulator"; + + wait(2, SC_NS); + + DISABLE(cthread0) + wait(3, SC_NS); + DISABLE(method0) + wait(3, SC_NS); + DISABLE(thread0) + wait(3, SC_NS); + + ENABLE(cthread0) + wait(3, SC_NS); + ENABLE(method0) + wait(3, SC_NS); + ENABLE(thread0) + wait(3, SC_NS); + + DISABLE(cthread0) + wait(3, SC_NS); + DISABLE(method0) + wait(3, SC_NS); + DISABLE(thread0) + wait(3, SC_NS); + + ENABLE(cthread0) + wait(3, SC_NS); + ENABLE(method0) + wait(3, SC_NS); + ENABLE(thread0) + wait(3, SC_NS); + + ::sc_core::wait(1000, SC_NS); + cout << endl; + time_stamp(cout) << name << ": terminating" << endl; + sc_stop(); +} + +void top::target_cthread0() +{ + const char* name = "target_cthread0"; + + time_stamp(cout) << name << ": starting" << endl; + for (int i = 0; i < 10; i++) + { + wait(); + if ( m_state_cthread0 == ST_DISABLED ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + else + { + time_stamp(cout) << name << ": active" << endl; + } + } + time_stamp(cout) << name << ": terminating" << endl; +} + +void top::target_method0() +{ + const char* name = "target_method0"; + static int state = 0; + switch( state ) + { + case 0: + time_stamp(cout) << name << ": starting" << endl; + break; + default: + if ( m_state_method0 == ST_DISABLED ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + else if ( state < 18 ) + { + time_stamp(cout) << name << ": active" << endl; + } + break; + case 19: + time_stamp(cout) << name << ": terminating" << endl; + break; + } + state++; +} + +void top::target_thread0() +{ + const char* name = "target_thread0"; + + time_stamp(cout) << name << ": starting" << endl; + for (int i = 0; i < 10; i++) + { + wait(); + if ( m_state_thread0 == ST_DISABLED ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + else + { + time_stamp(cout) << name << ": active" << endl; + } + } + time_stamp(cout) << name << ": terminating" << endl; +} + +int sc_main (int argc, char *argv[]) +{ + sc_clock clock( "clock", 2.0, SC_NS ); + + top* top_p = new top("top"); + top_p->m_clk(clock); + + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/process_control/reset/method_reset_throw/golden/sc_method_reset_throw.log b/src/systemc/tests/systemc/kernel/process_control/reset/method_reset_throw/golden/sc_method_reset_throw.log new file mode 100644 index 000000000..31efd2c64 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/reset/method_reset_throw/golden/sc_method_reset_throw.log @@ -0,0 +1,7 @@ +SystemC Simulation +5 ns: reset method m1 +5 ns: in m1 +5 ns: in m1() throwing exception in throwee1 +5 ns: in throwee1, caught exception +5 ns: in m1() after throwing exception in throwee1 +5 ns: after reset of method m1 diff --git a/src/systemc/tests/systemc/kernel/process_control/reset/method_reset_throw/sc_method_reset_throw.cpp b/src/systemc/tests/systemc/kernel/process_control/reset/method_reset_throw/sc_method_reset_throw.cpp new file mode 100644 index 000000000..c6596f0c7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/reset/method_reset_throw/sc_method_reset_throw.cpp @@ -0,0 +1,100 @@ + +/***************************************************************************** + + The following code is derived, directly or indirectly, from the SystemC + source code Copyright (c) 1996-2014 by all Contributors. + All Rights reserved. + + The contents of this file are subject to the restrictions and limitations + set forth in the SystemC Open Source License (the "License"); + You may not use this file except in compliance with such restrictions and + limitations. You may obtain instructions on how to receive a copy of the + License at http://www.accellera.org/. Software distributed by Contributors + under the License is distributed on an "AS IS" basis, WITHOUT WARRANTY OF + ANY KIND, either express or implied. See the License for the specific + language governing rights and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_method_reset_throw.cpp -- + + Original Author: Bishnupriya Bhattacharya, Cadence Design Systems, 2012-08-07 + + *****************************************************************************/ + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +class my_exception +{ +public: + explicit my_exception(const char* s) : s_(s) { } + const char* message() const { return s_.c_str(); } +protected: + std::string s_; +}; + +SC_MODULE(sctop) +{ +public: + SC_CTOR(sctop) + { + SC_THREAD(run); + SC_METHOD(m1); dont_initialize(); + method_handle = sc_get_current_process_handle(); + SC_THREAD(throwee1); + throwee1_h = sc_get_current_process_handle(); + } + + void run() { + wait (5, SC_NS); + cout << sc_time_stamp() << ": reset method m1" << endl; + method_handle.reset(); + cout << sc_time_stamp() << ": after reset of method m1" << endl; + } + + void m1() + { + cout << sc_time_stamp() << ": in m1" << endl; + cout << sc_time_stamp() << ": in m1() " + << "throwing exception in throwee1" << endl; + + throwee1_h.throw_it( + my_exception("thrown in throwee1 from m1()") + ); + + cout << sc_time_stamp() << ": in m1() " + << "after throwing exception in throwee1" << endl; + } + + void throwee1() + { + // catch exception and exit + while (1) { + try { + wait(50, SC_NS); + cerr << sc_time_stamp() << ": in throwee1, normal flow" << endl; + } + catch (my_exception const & x) { + cerr << sc_time_stamp() << ": in throwee1, caught exception " + << endl; + return; + } + } + } + +protected: + sc_process_handle method_handle; + sc_process_handle throwee1_h; +}; + + +int sc_main (int, char*[]) +{ + sc_report_handler::set_actions( SC_ID_DISABLE_WILL_ORPHAN_PROCESS_, SC_DO_NOTHING ); + sctop top1("Top1"); + sc_start(10, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/process_control/reset/method_self_reset/golden/method_self_reset.log b/src/systemc/tests/systemc/kernel/process_control/reset/method_self_reset/golden/method_self_reset.log new file mode 100644 index 000000000..f5f0d3ebe --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/reset/method_self_reset/golden/method_self_reset.log @@ -0,0 +1,14 @@ +SystemC Simulation +Entry +Issuing self reset +Entry +Exit +Entry +Exit +Entry +Issuing self reset +Entry +Exit +Entry +Exit +Program completed diff --git a/src/systemc/tests/systemc/kernel/process_control/reset/method_self_reset/method_self_reset.cpp b/src/systemc/tests/systemc/kernel/process_control/reset/method_self_reset/method_self_reset.cpp new file mode 100644 index 000000000..8b5da09b4 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/reset/method_self_reset/method_self_reset.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + method_self_reset.cpp -- Test of method self reset. + + Original Author: Andy Goodrich + + *****************************************************************************/ +// $Log: method_self_reset.cpp,v $ +// Revision 1.4 2011/07/24 15:59:53 acg +// Andy Goodrich: add statement I missed installing Philipp's patch. +// +// Revision 1.3 2011/07/24 15:58:39 acg +// Philipp A. Hartmann: convert first time toggle to counter since need 3 +// states. +// +// Revision 1.2 2011/02/04 15:26:33 acg +// Andy Goodrich: regolden for proper process control semantics. +// +// Revision 1.1 2011/01/28 19:48:36 acg +// Andy Goodrich: first check in. +// + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_METHOD(method); + sensitive << m_clk.pos(); + } + void method() + { + static int trigger = 0; + cout << "Entry " << endl; + switch( trigger++ ) + { + case 0: + cout << "Issuing self reset " << endl; + sc_get_current_process_handle().reset(); + sc_assert( false ); + case 1: + break; + default: + trigger = 0; + } + cout << "Exit " << endl; + } + sc_in m_clk; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(3, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test1/golden/test1.log b/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test1/golden/test1.log new file mode 100644 index 000000000..f32038842 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test1/golden/test1.log @@ -0,0 +1,30 @@ +SystemC Simulation +0 s[0]: target_method0: starting +0 s[0]: target_method0: issuing self suspend +0 s[0]: target_method0: after issuing self suspend + +0 s[0]: target_thread0: starting +0 s[0]: target_thread0: issuing self suspend + +0 s[1]: target_cthread0: starting +0 s[1]: target_cthread0: issuing self suspend + + +10 ns[21]: stimulator: resuming target_cthread0 + +10 ns[21]: target_cthread0: back from self suspend + +20 ns[51]: stimulator: resuming target_method0 + +20 ns[51]: target_method0: back from self suspend + +30 ns[81]: stimulator: resuming target_thread0 + +30 ns[81]: target_thread0: back from self suspend +109 ns[319]: target_cthread0: terminating +110 ns[321]: target_thread0: terminating +117 ns[343]: target_method0: terminating + +1030 ns[3081]: stimulator: terminating + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test1/test1.cpp b/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test1/test1.cpp new file mode 100644 index 000000000..af361436b --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test1/test1.cpp @@ -0,0 +1,216 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +//***************************************************************************** +// +// test01.cpp -- test self suspends on processes +// +// Original Author: Andy Goodrich, Forte Design Systems, Inc. +// +// CVS MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// changes you are making here. +// +// $Log: test1.cpp,v $ +// Revision 1.4 2011/04/02 00:07:44 acg +// Andy Goodrich: new message format. +// +// Revision 1.3 2011/03/07 19:32:07 acg +// Andy Goodrich: addition to set sc_core::sc_allow_process_control_corners +// to true so that this test avoids corner case error messages. +// +// Revision 1.2 2009/07/28 18:43:50 acg +// Andy Goodrich: new standard test bench version of this test. +// +// Revision 1.2 2009/07/28 01:09:48 acg +// Andy Goodrich: replacement test using standardized environment. +// +//***************************************************************************** + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" + +enum my_process_states { + ST_DISABLED, + ST_NORMAL, + ST_SUSPENDED +}; + +inline ostream& time_stamp( ostream& os ) +{ + os << dec << sc_time_stamp() << "[" << sc_delta_count() << "]: "; + return os; +} + +SC_MODULE(top) { + // constructor: + + SC_CTOR(top) : + m_state_cthread0(ST_NORMAL), + m_state_method0(ST_NORMAL), + m_state_thread0(ST_NORMAL) + { + SC_THREAD(stimulator0); + + SC_CTHREAD( target_cthread0, m_clk.pos() ); + m_target_cthread0 = sc_get_current_process_handle(); + + SC_METHOD(target_method0); + sensitive << m_clk.pos(); + m_target_method0 = sc_get_current_process_handle(); + + SC_THREAD(target_thread0); + m_target_thread0 = sc_get_current_process_handle(); + } + + // processes: + + void stimulator0(); + void target_cthread0(); + void target_method0(); + void target_thread0(); + + // Storage: + + sc_in m_clk; + int m_state_cthread0; + int m_state_method0; + int m_state_thread0; + sc_process_handle m_target_cthread0; + sc_process_handle m_target_method0; + sc_process_handle m_target_thread0; +}; + +void top::stimulator0() +{ + const char* name = "stimulator"; + wait(10, SC_NS); + cout << endl; + time_stamp(cout) << name << ": resuming target_cthread0" << endl; + cout << endl; + m_state_cthread0 = ST_NORMAL; + m_target_cthread0.resume(); + wait(10, SC_NS); + + cout << endl; + time_stamp(cout) << name << ": resuming target_method0" << endl; + cout << endl; + m_state_method0 = ST_NORMAL; + m_target_method0.resume(); + wait(10, SC_NS); + + cout << endl; + time_stamp(cout) << name << ": resuming target_thread0" << endl; + cout << endl; + m_state_thread0 = ST_NORMAL; + m_target_thread0.resume(); + ::sc_core::wait(1000, SC_NS); + + cout << endl; + time_stamp(cout) << name << ": terminating" << endl; + sc_stop(); +} + +void top::target_cthread0() +{ + int i; + const char* name = "target_cthread0"; + + time_stamp(cout) << name << ": starting" << endl; + time_stamp(cout) << name << ": issuing self suspend" << endl; + cout << endl; + m_state_cthread0 = ST_SUSPENDED; + m_target_cthread0.suspend(); + time_stamp(cout) << name << ": back from self suspend" << endl; + for ( i = 0; i < 100; i++ ) + { + if ( m_state_cthread0 == ST_SUSPENDED ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + wait(); + } + time_stamp(cout) << name << ": terminating" << endl; +} + +void top::target_method0() +{ + const char* name = "target_method0"; + static int state = 0; + switch( state ) + { + case 0: + time_stamp(cout) << name << ": starting" << endl; + time_stamp(cout) << name << ": issuing self suspend" << endl; + m_state_method0 = ST_SUSPENDED; + m_target_method0.suspend(); + time_stamp(cout) << name << ": after issuing self suspend" << endl; + cout << endl; + break; + case 1: + time_stamp(cout) << name << ": back from self suspend" << endl; + // fall through + default: + if ( m_state_method0 == ST_SUSPENDED ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + break; + case 99: + time_stamp(cout) << name << ": terminating" << endl; + break; + } + state++; +} + +void top::target_thread0() +{ + const char* name = "target_thread0"; + + time_stamp(cout) << name << ": starting" << endl; + time_stamp(cout) << name << ": issuing self suspend" << endl; + cout << endl; + m_state_thread0 = ST_SUSPENDED; + m_target_thread0.suspend(); + time_stamp(cout) << name << ": back from self suspend" << endl; + + // We wait a long enough time that our event will not occur until + // after we are resumed. Otherwise this thread will just go away + // quietly when the suspend cancels the event. + + ::sc_core::wait(80, SC_NS); + if ( m_state_thread0 == ST_SUSPENDED ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + time_stamp(cout) << name << ": terminating" << endl; +} + +int sc_main (int argc, char *argv[]) +{ + sc_core::sc_allow_process_control_corners = true; + sc_clock clock( "clock", 1.0, SC_NS ); + + top* top_p = new top("top"); + top_p->m_clk(clock); + + sc_core::sc_allow_process_control_corners = true; + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test2/golden/test2.log b/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test2/golden/test2.log new file mode 100644 index 000000000..64627e16a --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test2/golden/test2.log @@ -0,0 +1,90 @@ +SystemC Simulation +0 s[0]: target_method0: starting +0 s[0]: target_thread0: starting +0 s[1]: target_method0: active +0 s[1]: target_cthread0: starting +1 ns[3]: target_thread0: active + +2 ns[4]: stimulator: suspending target_cthread0 + +2 ns[5]: target_method0: active +3 ns[7]: target_thread0: active +4 ns[9]: target_method0: active + +5 ns[10]: stimulator: suspending target_method0 + +5 ns[11]: target_thread0: active +7 ns[14]: target_thread0: active + +8 ns[15]: stimulator: suspending target_thread0 + + +11 ns[18]: stimulator: resuming target_cthread0 + +11 ns[18]: target_cthread0: active +12 ns[20]: target_cthread0: active + +14 ns[22]: stimulator: resuming target_method0 + +14 ns[22]: target_method0: active +14 ns[23]: target_method0: active +14 ns[23]: target_cthread0: active +16 ns[26]: target_method0: active +16 ns[26]: target_cthread0: active + +17 ns[27]: stimulator: resuming target_thread0 + +17 ns[27]: target_thread0: active +17 ns[28]: target_thread0: active +18 ns[30]: target_method0: active +18 ns[30]: target_cthread0: active +19 ns[32]: target_thread0: active + +20 ns[33]: stimulator: suspending target_cthread0 + +20 ns[34]: target_method0: active +21 ns[36]: target_thread0: active +22 ns[38]: target_method0: active + +23 ns[39]: stimulator: suspending target_method0 + +23 ns[40]: target_thread0: active +25 ns[43]: target_thread0: active + +26 ns[44]: stimulator: suspending target_thread0 + + +29 ns[47]: stimulator: resuming target_cthread0 + +29 ns[47]: target_cthread0: active +30 ns[49]: target_cthread0: active + +32 ns[51]: stimulator: resuming target_method0 + +32 ns[51]: target_method0: active +32 ns[52]: target_method0: active +32 ns[52]: target_cthread0: active +34 ns[55]: target_method0: active +34 ns[55]: target_cthread0: active + +35 ns[56]: stimulator: resuming target_thread0 + +35 ns[56]: target_thread0: active +35 ns[57]: target_thread0: active +35 ns[57]: target_thread0: terminating +36 ns[59]: target_method0: active +36 ns[59]: target_cthread0: active +38 ns[62]: target_method0: active +38 ns[62]: target_cthread0: active +40 ns[65]: target_method0: active +40 ns[65]: target_cthread0: active +40 ns[65]: target_cthread0: terminating +42 ns[68]: target_method0: active +44 ns[71]: target_method0: active +46 ns[74]: target_method0: active +48 ns[77]: target_method0: active +52 ns[83]: target_method0: terminating + +1038 ns[1561]: stimulator: terminating + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test2/test2.cpp b/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test2/test2.cpp new file mode 100644 index 000000000..2e4f8997b --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/suspend_resume/test2/test2.cpp @@ -0,0 +1,237 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +//***************************************************************************** +// +// test02.cpp -- test that suspended processes with static sensitivity +// wake up when resumed. +// +// Original Author: Andy Goodrich, Forte Design Systems, Inc. +// +// CVS MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// changes you are making here. +// +// $Log: test2.cpp,v $ +// Revision 1.5 2011/04/02 00:08:19 acg +// Andy Goodrich: turn off corner case error checking. +// +// Revision 1.4 2011/03/07 19:32:09 acg +// Andy Goodrich: addition to set sc_core::sc_allow_process_control_corners +// to true so that this test avoids corner case error messages. +// +// Revision 1.3 2011/02/20 13:43:49 acg +// Andy Goodrich: updates for IEEE 1666 2011. +// +// Revision 1.2 2011/02/04 15:26:52 acg +// Andy Goodrich: changes for process control semantics. +// +// Revision 1.1 2009/07/28 18:43:55 acg +// Andy Goodrich: new standard test bench version of this test. +// +//***************************************************************************** + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" + +enum my_process_states { + ST_SUSPENDD, + ST_NORMAL, + ST_SUSPENDED +}; + +inline ostream& time_stamp( ostream& os ) +{ + os << dec << sc_time_stamp() << "[" << sc_delta_count() << "]: "; + return os; +} + +SC_MODULE(top) { + // constructor: + + SC_CTOR(top) + { + m_state_cthread0 = ST_NORMAL; + m_state_method0 = ST_NORMAL; + m_state_thread0 = ST_NORMAL; + + SC_THREAD(stimulator0); + + SC_CTHREAD( target_cthread0, m_clk.pos() ); + m_target_cthread0 = sc_get_current_process_handle(); + + SC_METHOD(target_method0); + sensitive << m_clk.pos(); + m_target_method0 = sc_get_current_process_handle(); + + SC_THREAD(target_thread0); + sensitive << m_clk.neg(); + m_target_thread0 = sc_get_current_process_handle(); + } + + // processes: + + void stimulator0(); + void target_cthread0(); + void target_method0(); + void target_thread0(); + + // Storage: + + sc_in m_clk; + int m_state_cthread0; + int m_state_method0; + int m_state_thread0; + sc_process_handle m_target_cthread0; + sc_process_handle m_target_method0; + sc_process_handle m_target_thread0; +}; + +#define SUSPEND(TARGET) \ + cout << endl; \ + time_stamp(cout) << name << ": suspending target_" << #TARGET << endl; \ + m_state_##TARGET = ST_SUSPENDD; \ + m_target_##TARGET.suspend(); \ + cout << endl; + +#define RESUME(TARGET) \ + cout << endl; \ + time_stamp(cout) << name << ": resuming target_" << #TARGET << endl; \ + m_state_##TARGET = ST_NORMAL; \ + m_target_##TARGET.resume(); \ + cout << endl; + +void top::stimulator0() +{ + const char* name = "stimulator"; + + wait(2, SC_NS); + + SUSPEND(cthread0) + wait(3, SC_NS); + SUSPEND(method0) + wait(3, SC_NS); + SUSPEND(thread0) + wait(3, SC_NS); + + RESUME(cthread0) + wait(3, SC_NS); + RESUME(method0) + wait(3, SC_NS); + RESUME(thread0) + wait(3, SC_NS); + + SUSPEND(cthread0) + wait(3, SC_NS); + SUSPEND(method0) + wait(3, SC_NS); + SUSPEND(thread0) + wait(3, SC_NS); + + RESUME(cthread0) + wait(3, SC_NS); + RESUME(method0) + wait(3, SC_NS); + RESUME(thread0) + wait(3, SC_NS); + + ::sc_core::wait(1000, SC_NS); + cout << endl; + time_stamp(cout) << name << ": terminating" << endl; + sc_stop(); +} + +void top::target_cthread0() +{ + const char* name = "target_cthread0"; + + time_stamp(cout) << name << ": starting" << endl; + for (int i = 0; i < 12; i++) + { + wait(); + if ( m_state_cthread0 == ST_SUSPENDD ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + else + { + time_stamp(cout) << name << ": active" << endl; + } + } + time_stamp(cout) << name << ": terminating" << endl; +} + +void top::target_method0() +{ + const char* name = "target_method0"; + static int state = 0; + switch( state ) + { + case 0: + time_stamp(cout) << name << ": starting" << endl; + break; + default: + if ( m_state_method0 == ST_SUSPENDD ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + else if ( state < 20 ) + { + time_stamp(cout) << name << ": active" << endl; + } + break; + case 21: + time_stamp(cout) << name << ": terminating" << endl; + break; + } + state++; +} + +void top::target_thread0() +{ + const char* name = "target_thread0"; + + time_stamp(cout) << name << ": starting" << endl; + for (int i = 0; i < 12; i++) + { + wait(); + if ( m_state_thread0 == ST_SUSPENDD ) + { + time_stamp(cout) << name << ": ERROR should not see this" << endl; + } + else + { + time_stamp(cout) << name << ": active" << endl; + } + } + time_stamp(cout) << name << ": terminating" << endl; +} + +int sc_main (int argc, char *argv[]) +{ + sc_core::sc_allow_process_control_corners = true; + sc_clock clock( "clock", 2.0, SC_NS ); + + top* top_p = new top("top"); + top_p->m_clk(clock); + + sc_core::sc_allow_process_control_corners = true; + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/process_control/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/process_control/test01/golden/test01.log new file mode 100644 index 000000000..824523a11 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test01/golden/test01.log @@ -0,0 +1,76 @@ +SystemC Simulation +0 s: dynamic method (75,0) initialization call +0 s: static method (136) +0 s: dynamic thread (114) initialization call +0 s: static method (136) +0 s: dynamic method (80,1) after wait on m_clk.posedge_event() +0 s: static thread (145) +0 s: dynamic thread (119) after wait on m_clk.posedge_event() +1 ns: static method (136) +1 ns: dynamic method (86,2) after wait on m_clk.posedge_event() +1 ns: static thread (145) +1 ns: cthread (63) +1 ns: dynamic thread (122) after wait on m_clk.posedge_event() +1500 ps: dynamic method (92,3) after wait on m_clk.negedge() +1500 ps: dynamic thread (125) after wait on m_clk.negedge_event() +2 ns: static method (136) +2 ns: stimulus (156) - suspending all processes + +5 ns: stimulus (171) - resuming all processes +5 ns: static method (136) +5 ns: cthread (63) +5 ns: static thread (145) +6 ns: static method (136) +6 ns: stimulus (174) - suspending all processes +7 ns: stimulus (183) - firing event1 + +8 ns: stimulus (191) - resuming all processes +8 ns: static method (136) +8 ns: cthread (63) +8 ns: static thread (145) +9 ns: static method (136) +9 ns: stimulus (195) - firing event2 +9 ns: static thread (145) +9 ns: cthread (63) +9 ns: dynamic method (97,4) after wait on m_event1 & m_event2 +9 ns: dynamic thread (128) after wait on m_event1 & m_event2 +10 ns: static method (136) +10 ns: dynamic method (80,1) after wait on m_clk.posedge_event() +10 ns: static thread (145) +10 ns: cthread (63) +10 ns: dynamic thread (119) after wait on m_clk.posedge_event() +11 ns: static method (136) +11 ns: dynamic method (86,2) after wait on m_clk.posedge_event() +11 ns: static thread (145) +11 ns: cthread (63) +11 ns: dynamic thread (122) after wait on m_clk.posedge_event() +11500 ps: dynamic method (92,3) after wait on m_clk.negedge() +11500 ps: dynamic thread (125) after wait on m_clk.negedge_event() +12 ns: static method (136) +12 ns: static thread (145) +12 ns: cthread (63) +13 ns: static method (136) +13 ns: static thread (145) +13 ns: cthread (63) +14 ns: static method (136) +14 ns: stimulus (156) - suspending all processes + +17 ns: stimulus (171) - resuming all processes +17 ns: static method (136) +17 ns: cthread (63) +17 ns: static thread (145) +18 ns: static method (136) +18 ns: stimulus (174) - suspending all processes +19 ns: stimulus (183) - firing event1 + +20 ns: stimulus (191) - resuming all processes +20 ns: static method (136) +20 ns: cthread (63) +20 ns: static thread (145) +21 ns: static method (136) +21 ns: stimulus (195) - firing event2 +21 ns: static thread (145) +21 ns: cthread (63) +21 ns: dynamic method (97,4) after wait on m_event1 & m_event2 +21 ns: dynamic thread (128) after wait on m_event1 & m_event2 +Program completed diff --git a/src/systemc/tests/systemc/kernel/process_control/test01/test01.cpp b/src/systemc/tests/systemc/kernel/process_control/test01/test01.cpp new file mode 100644 index 000000000..f391bb75e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test01/test01.cpp @@ -0,0 +1,260 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- Test of suspend resume on processes + + Original Author: Andy Goodrich + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + Revision log at end of the file to let __LINE__ give the same results + after a check-in. + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(cthread,m_clk.pos()); + SC_METHOD(dynamic_method); + SC_THREAD(dynamic_thread); + SC_METHOD(static_method); + sensitive << m_clk.pos(); + SC_THREAD(static_thread); + sensitive << m_clk.pos(); + SC_CTHREAD(stimulus,m_clk.pos()); + reset_signal_is(m_reset, true); + } + void cthread() + { + m_cthread = sc_get_current_process_handle(); + for (;;) + { + wait(); + cout << sc_time_stamp() << ": cthread (" << __LINE__ << ")" + << endl; + } + } + void dynamic_method() + { + static int state = 0; + switch ( state ) + { + case 0: + m_dynamic_method = sc_get_current_process_handle(); + next_trigger( m_clk.posedge_event() ); + cout << sc_time_stamp() << ": dynamic method (" << __LINE__ + << "," << state << ") initialization call " << endl; + break; + case 1: + next_trigger( m_clk.posedge_event() ); + cout << sc_time_stamp() << ": dynamic method (" << __LINE__ + << "," << state << ") after wait on m_clk.posedge_event() " + << endl; + break; + case 2: + next_trigger( m_clk.negedge_event() ); + cout << sc_time_stamp() << ": dynamic method (" << __LINE__ + << "," << state << ") after wait on m_clk.posedge_event() " + << endl; + break; + case 3: + next_trigger( m_event1 & m_event2 ); + cout << sc_time_stamp() << ": dynamic method (" << __LINE__ + << "," << state << ") after wait on m_clk.negedge() " << endl; + break; + case 4: + next_trigger( m_clk.posedge_event() ); + cout << sc_time_stamp() << ": dynamic method (" << __LINE__ + << "," << state << ") after wait on m_event1 & m_event2 " + << endl; + break; + default: + next_trigger( m_clk.posedge_event() ); + cout << sc_time_stamp() << ": dynamic method (" << __LINE__ + << "," << state << ") after wait on m_clk.posedge_event() " + << endl; + break; + } + state = state + 1; + if ( state == 5 ) state = 1; + } + void dynamic_thread() + { + m_dynamic_thread = sc_get_current_process_handle(); + cout << sc_time_stamp() << ": dynamic thread (" << __LINE__ << ")" + << " initialization call " << endl; + wait(m_clk.posedge_event()); + for (;;) + { + cout << sc_time_stamp() << ": dynamic thread (" << __LINE__ + << ") after wait on m_clk.posedge_event() " << endl; + wait(m_clk.posedge_event()); + cout << sc_time_stamp() << ": dynamic thread (" << __LINE__ + << ") after wait on m_clk.posedge_event() " << endl; + wait(m_clk.negedge_event()); + cout << sc_time_stamp() << ": dynamic thread (" << __LINE__ + << ") after wait on m_clk.negedge_event() " << endl; + wait(m_event1 & m_event2 ); + cout << sc_time_stamp() << ": dynamic thread (" << __LINE__ + << ") after wait on m_event1 & m_event2 " << endl; + wait(m_clk.posedge_event()); + } + } + void static_method() + { + m_static_method = sc_get_current_process_handle(); + cout << sc_time_stamp() << ": static method (" << __LINE__ << ")" + << endl; + } + void static_thread() + { + m_static_thread = sc_get_current_process_handle(); + for (;;) + { + wait(); + cout << sc_time_stamp() << ": static thread (" << __LINE__ + << ")" << endl; + } + } + void stimulus() + { + for (;;) + { + wait(); + wait(); + cout << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - suspending all processes" << endl; + m_cthread.suspend(); + m_dynamic_method.suspend(); + m_dynamic_thread.suspend(); + m_static_method.suspend(); + m_static_thread.suspend(); + wait(); + wait(); + wait(); + m_cthread.resume(); + m_dynamic_method.resume(); + m_dynamic_thread.resume(); + m_static_method.resume(); + m_static_thread.resume(); + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - resuming all processes" << endl; + wait(); + cout << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - suspending all processes" << endl; + m_cthread.suspend(); + m_dynamic_method.suspend(); + m_dynamic_thread.suspend(); + m_static_method.suspend(); + m_static_thread.suspend(); + wait(); + m_event1.notify(SC_ZERO_TIME); + cout << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - firing event1 " << endl; + wait(); + m_cthread.resume(); + m_dynamic_method.resume(); + m_dynamic_thread.resume(); + m_static_method.resume(); + m_static_thread.resume(); + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - resuming all processes" << endl; + wait(); + m_event2.notify(SC_ZERO_TIME); + cout << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - firing event2 " << endl; + wait(); + wait(); + wait(); + } + } + sc_in m_clk; + sc_process_handle m_cthread; + sc_process_handle m_dynamic_method; + sc_process_handle m_dynamic_thread; + sc_event m_event1; + sc_event m_event2; + sc_event m_event3; + sc_event m_event4; + sc_in m_reset; + sc_process_handle m_static_method; + sc_process_handle m_static_thread; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_core::sc_allow_process_control_corners = true; + sc_clock clock; + DUT dut("dut"); + sc_signal reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + sc_core::sc_allow_process_control_corners = true; + reset = true; + sc_start(1, SC_NS); + reset = false; + sc_start(21, SC_NS); + + cout << "Program completed" << endl; + return 0; +} + +// $Log: test01.cpp,v $ +// Revision 1.5 2011/04/02 00:08:23 acg +// Andy Goodrich: turn off corner case error checking. +// +// Revision 1.4 2011/03/07 19:32:10 acg +// Andy Goodrich: addition to set sc_core::sc_allow_process_control_corners +// to true so that this test avoids corner case error messages. +// +// Revision 1.3 2011/02/20 13:43:54 acg +// Andy Goodrich: updates for IEEE 1666 2011. +// +// Revision 1.2 2011/02/14 16:59:58 acg +// Andy Goodrich: updated copyright and added cvs logging information inline. +// +// Revision 1.1.1.1 2006/12/15 20:26:03 acg +// systemc_tests-2.3 +// +// Revision 1.1 2006/12/14 21:39:59 acg +// Andy Goodrich: moving test to new directory. +// +// Revision 1.2 2006/04/20 19:43:31 acg +// Andy Goodrich: moved CVS log to end of file so that __LINE__ does not +// change when a checkin is done. +// +// Revision 1.1 2006/04/17 20:10:55 acg +// Andy Goodrich: First inclusion of test for suspend and resume support. +// diff --git a/src/systemc/tests/systemc/kernel/process_control/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/process_control/test02/golden/test02.log new file mode 100644 index 000000000..c24196a29 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test02/golden/test02.log @@ -0,0 +1,24 @@ +SystemC Simulation +0 s: dynamic method (83,0) initialization call +0 s: static method (115) initialization call +0 s: dynamic thread (97) initialization call +0 s: static thread (126) initialization call +0 s: dynamic method (90,1) after wait on m_clk.posedge() +0 s: dynamic thread (100) after wait on m_clk.posedge_event() +1 ns: clocked thread (72) after wait on m_clk.pos() +2 ns: stimulus (143) - suspending all processes +3 ns: stimulus (153) - firing event1 +4 ns: stimulus (157) - firing event2 + +6 ns: stimulus (167) - resuming all processes +6 ns: dynamic method (90,1) after wait on m_clk.posedge() +6 ns: static method (120) after wait on m_event1 | m_event2 +6 ns: clocked thread (72) after wait on m_clk.pos() +6 ns: dynamic thread (105) after wait on m_event1 & m_event2 +6 ns: static thread (131) after wait on m_event1 | m_event2 +7 ns: clocked thread (72) after wait on m_clk.pos() +8 ns: clocked thread (72) after wait on m_clk.pos() +9 ns: clocked thread (72) after wait on m_clk.pos() + +Info: /OSCI/SystemC: Simulation stopped by user. +Program completed diff --git a/src/systemc/tests/systemc/kernel/process_control/test02/test02.cpp b/src/systemc/tests/systemc/kernel/process_control/test02/test02.cpp new file mode 100644 index 000000000..d770e43a4 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test02/test02.cpp @@ -0,0 +1,237 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- Test of resume after dynamic event completion + + Original Author: Andy Goodrich + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + Revision log at end of the file to let __LINE__ give the same results + after a check-in. + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(cthread,m_clk.pos()); + reset_signal_is(m_reset, true); + m_cthread = sc_get_current_process_handle(); + + SC_METHOD(dynamic_method); + m_dynamic_method = sc_get_current_process_handle(); + + SC_THREAD(dynamic_thread); + m_dynamic_thread = sc_get_current_process_handle(); + + SC_METHOD(static_method); + sensitive << m_event1 << m_event2; + m_static_method = sc_get_current_process_handle(); + + SC_THREAD(static_thread); + sensitive << m_event1 << m_event2; + m_static_thread = sc_get_current_process_handle(); + + SC_CTHREAD(stimulus,m_clk.pos()); + reset_signal_is(m_reset, true); + } + void cthread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ": clocked thread (" << __LINE__ + << ") after wait on m_clk.pos() " << endl; + } + } + void dynamic_method() + { + static int state = 0; + switch ( state ) + { + case 0: + next_trigger( m_clk.posedge_event() ); + cout << sc_time_stamp() << ": dynamic method (" << __LINE__ + << "," << state << ") initialization call " << endl; + state = 1; + break; + default: + case 1: + next_trigger( m_event1 & m_event2 ); + cout << sc_time_stamp() << ": dynamic method (" << __LINE__ + << "," << state << ") after wait on m_clk.posedge() " << endl; + break; + } + } + void dynamic_thread() + { + cout << sc_time_stamp() << ": dynamic thread (" << __LINE__ << ")" + << " initialization call " << endl; + wait(m_clk.posedge_event()); + cout << sc_time_stamp() << ": dynamic thread (" << __LINE__ + << ") after wait on m_clk.posedge_event() " << endl; + for (;;) + { + wait(m_event1 & m_event2 ); + cout << sc_time_stamp() << ": dynamic thread (" << __LINE__ + << ") after wait on m_event1 & m_event2 " << endl; + } + } + void static_method() + { + static bool initialized = false; + if ( !initialized ) + { + initialized = true; + cout << sc_time_stamp() << ": static method (" << __LINE__ + << ")" << " initialization call " << endl; + } + else + { + cout << sc_time_stamp() << ": static method (" << __LINE__ + << ") after wait on m_event1 | m_event2 " << endl; + } + } + void static_thread() + { + cout << sc_time_stamp() << ": static thread (" << __LINE__ << ")" + << " initialization call " << endl; + for (;;) + { + wait(); + cout << sc_time_stamp() << ": static thread (" << __LINE__ + << ") after wait on m_event1 | m_event2 " << endl; + } + + } + void stimulus() + { + for (;;) + { + wait(); + wait(); + cout << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - suspending all processes" << endl; + m_cthread.suspend(); + m_dynamic_method.suspend(); + m_dynamic_thread.suspend(); + m_static_method.suspend(); + m_static_thread.suspend(); + wait(); + + m_event1.notify(SC_ZERO_TIME); + cout << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - firing event1 " << endl; + wait(); + m_event2.notify(SC_ZERO_TIME); + cout << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - firing event2 " << endl; + wait(); + wait(); + + m_cthread.resume(); + m_dynamic_method.resume(); + m_dynamic_thread.resume(); + m_static_method.resume(); + m_static_thread.resume(); + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - resuming all processes" << endl; + wait(); + wait(); + wait(); + sc_stop(); + } + } + sc_in m_clk; + sc_process_handle m_cthread; + sc_process_handle m_dynamic_method; + sc_process_handle m_dynamic_thread; + sc_event m_event1; + sc_event m_event2; + sc_event m_event3; + sc_event m_event4; + sc_in m_reset; + sc_process_handle m_static_method; + sc_process_handle m_static_thread; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_core::sc_allow_process_control_corners = true; + sc_clock clock; + DUT dut("dut"); + sc_signal reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + sc_core::sc_allow_process_control_corners = true; + reset = true; + sc_start(1, SC_NS); + reset = false; + sc_start(21, SC_NS); + + cout << "Program completed" << endl; + return 0; +} + +// $Log: test02.cpp,v $ +// Revision 1.6 2011/04/02 00:08:27 acg +// Andy Goodrich: turn off corner case error checking. +// +// Revision 1.5 2011/03/07 19:32:11 acg +// Andy Goodrich: addition to set sc_core::sc_allow_process_control_corners +// to true so that this test avoids corner case error messages. +// +// Revision 1.4 2011/02/20 13:43:58 acg +// Andy Goodrich: updates for IEEE 1666 2011. +// +// Revision 1.3 2011/02/14 17:00:00 acg +// Andy Goodrich: updated copyright and added cvs logging information inline. +// +// Revision 1.2 2011/01/20 16:55:23 acg +// Andy Goodrich: changes for IEEE 1666 2011. +// +// Revision 1.1.1.1 2006/12/15 20:26:03 acg +// systemc_tests-2.3 +// +// Revision 1.1 2006/12/14 21:40:06 acg +// Andy Goodrich: moving test to new directory. +// +// Revision 1.2 2006/04/20 19:43:34 acg +// Andy Goodrich: moved CVS log to end of file so that __LINE__ does not +// change when a checkin is done. +// +// Revision 1.1 2006/04/17 20:11:02 acg +// Andy Goodrich: First inclusion of test for suspend and resume support. +// + diff --git a/src/systemc/tests/systemc/kernel/process_control/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/process_control/test03/golden/test03.log new file mode 100644 index 000000000..9bb03d038 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test03/golden/test03.log @@ -0,0 +1,73 @@ +SystemC Simulation +Status before sc_start(1,SC_NS) = SC_ELABORATION +0 s dynamic_method_and_events: initialization call +0 s dynamic_method_negedge: initialization call +0 s dynamic_method_posedge: initialization call +Status during sc_start(1,SC_NS) = SC_RUNNING +0 s: stimulus (205) - disabling all processes +0 s dynamic_thread_and_events: initialization call +0 s dynamic_thread_negedge: initialization call +0 s dynamic_thread_posedge: initialization call +Status after sc_start(1,SC_NS) = SC_PAUSED + +3 ns: stimulus (238) - enabling all processes +3500 ps dynamic_method_negedge: awakened +3500 ps dynamic_thread_negedge: awakened +4 ns: static method awakened +4 ns dynamic_method_posedge: awakened + +4 ns: stimulus (244) - disabling all processes +4 ns: static thread awakened +4 ns dynamic_thread_posedge: awakened + +5 ns: stimulus (259) - enabling all processes +5500 ps dynamic_method_negedge: awakened +5500 ps dynamic_thread_negedge: awakened +6 ns: static method awakened +6 ns dynamic_method_posedge: awakened + +6 ns: stimulus (273) - firing event1 +6 ns: static thread awakened +6 ns: cthread awakened +6 ns dynamic_thread_posedge: awakened +6500 ps dynamic_method_negedge: awakened +6500 ps dynamic_thread_negedge: awakened +7 ns: static method awakened +7 ns dynamic_method_posedge: awakened + +7 ns: stimulus (278) - disabling all processes +7 ns: static thread awakened +7 ns: cthread awakened +7 ns dynamic_thread_posedge: awakened + +8 ns: stimulus (295) - firing event2 + +11 ns: stimulus (303) - enabling all processes +11500 ps dynamic_method_negedge: awakened +11500 ps dynamic_thread_negedge: awakened +12 ns: static method awakened +12 ns dynamic_method_posedge: awakened + +12 ns: stimulus (317) - firing event2 +12 ns: static thread awakened +12 ns: cthread awakened +12 ns dynamic_thread_posedge: awakened +12 ns dynamic_method_and_events: awakened +12 ns dynamic_thread_and_events: awakened +12500 ps dynamic_method_negedge: awakened +12500 ps dynamic_thread_negedge: awakened +13 ns: static method awakened +13 ns dynamic_method_posedge: awakened +13 ns: static thread awakened +13 ns: cthread awakened +13 ns dynamic_thread_posedge: awakened +13500 ps dynamic_method_negedge: awakened +13500 ps dynamic_thread_negedge: awakened +14 ns: static method awakened +14 ns dynamic_method_posedge: awakened +14 ns: static thread awakened +14 ns: cthread awakened +14 ns dynamic_thread_posedge: awakened + +Info: /OSCI/SystemC: Simulation stopped by user. +Program completed diff --git a/src/systemc/tests/systemc/kernel/process_control/test03/test03.cpp b/src/systemc/tests/systemc/kernel/process_control/test03/test03.cpp new file mode 100644 index 000000000..45e84c828 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test03/test03.cpp @@ -0,0 +1,385 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- Test of disable enable on processes + + Original Author: Andy Goodrich + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + Revision log at end of the file to let __LINE__ give the same results + after a check-in. + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(cthread,m_clk.pos()); + m_cthread = sc_get_current_process_handle(); + SC_METHOD(dynamic_method_and_events); + + m_dynamic_method_and_events = sc_get_current_process_handle(); + SC_METHOD(dynamic_method_negedge); + m_dynamic_method_negedge = sc_get_current_process_handle(); + SC_METHOD(dynamic_method_posedge); + m_dynamic_method_posedge = sc_get_current_process_handle(); + + SC_THREAD(dynamic_thread_and_events); + m_dynamic_thread_and_events = sc_get_current_process_handle(); + SC_THREAD(dynamic_thread_negedge); + m_dynamic_thread_negedge = sc_get_current_process_handle(); + SC_THREAD(dynamic_thread_posedge); + m_dynamic_thread_posedge = sc_get_current_process_handle(); + + SC_METHOD(static_method); + sensitive << m_clk.pos(); + dont_initialize(); + m_static_method = sc_get_current_process_handle(); + SC_THREAD(static_thread); + sensitive << m_clk.pos(); + m_static_thread = sc_get_current_process_handle(); + SC_METHOD(stimulus_method); + + SC_CTHREAD(stimulus,m_clk.pos()); + reset_signal_is(m_reset, true); + } + + void cthread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ": cthread awakened" << endl; + } + } + + // dynamic_method_and_events - dynamic method waiting on the and of + // two events: + + void dynamic_method_and_events() + { + static int state = 0; + switch( state ) + { + case 0: + cout << sc_time_stamp() + << " dynamic_method_and_events: initialization call" << endl; + break; + case 1: + cout << sc_time_stamp() << " dynamic_method_and_events: awakened" + << endl; + break; + } + next_trigger( m_event1 & m_event2 ); + state = 1; + } + + // dynamic_method_negedge - dynamic method waiting on negedge events: + + void dynamic_method_negedge() + { + static int state = 0; + switch( state ) + { + case 0: + cout << sc_time_stamp() + << " dynamic_method_negedge: initialization call" << endl; + break; + case 1: + cout << sc_time_stamp() << " dynamic_method_negedge: awakened" + << endl; + break; + } + next_trigger( m_clk.negedge_event() ); + state = 1; + } + + // dynamic_method_posedge - dynamic method waiting on posedge events: + + void dynamic_method_posedge() + { + static int state = 0; + switch( state ) + { + case 0: + cout << sc_time_stamp() + << " dynamic_method_posedge: initialization call" << endl; + break; + default: + cout << sc_time_stamp() << " dynamic_method_posedge: awakened" + << endl; + } + next_trigger( m_clk.posedge_event() ); + state = 1; + } + + // dynamic_thread_and_events - dynamic thread waiting on the and of + // two events: + + void dynamic_thread_and_events() + { + cout << sc_time_stamp() + << " dynamic_thread_and_events: initialization call" << endl; + for (;;) + { + wait( m_event1 & m_event2 ); + cout << sc_time_stamp() << " dynamic_thread_and_events: awakened" + << endl; + } + } + + // dynamic_thread_negedge - dynamic thread waiting on negedge events: + + void dynamic_thread_negedge() + { + cout << sc_time_stamp() + << " dynamic_thread_negedge: initialization call" << endl; + for (;;) + { + wait( m_clk.negedge_event() ); + cout << sc_time_stamp() << " dynamic_thread_negedge: awakened" + << endl; + } + } + + // dynamic_thread_posedge - dynamic thread waiting on posedge events: + + void dynamic_thread_posedge() + { + cout << sc_time_stamp() + << " dynamic_thread_posedge: initialization call" << endl; + for (;;) + { + wait( m_clk.posedge_event() ); + cout << sc_time_stamp() << " dynamic_thread_posedge: awakened" + << endl; + } + } + + void static_method() + { + cout << sc_time_stamp() << ": static method awakened" << endl; + } + void static_thread() + { + for (;;) + { + wait(); + cout << sc_time_stamp() << ": static thread awakened" << endl; + } + } + void stimulus_method() + { + cout << "Status during sc_start(1,SC_NS) = " << sc_get_status() << endl; + cout << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - disabling all processes" << endl; + m_cthread.disable(); + m_dynamic_method_and_events.disable(); + m_dynamic_method_negedge.disable(); + m_dynamic_method_posedge.disable(); + m_dynamic_thread_and_events.disable(); + m_dynamic_thread_negedge.disable(); + m_dynamic_thread_posedge.disable(); + m_static_method.disable(); + m_static_thread.disable(); + } + void stimulus() + { + for (;;) + { + // START OUT BY WAITING ON THE DISABLE FROM THE stimulus_method. + + wait(); + wait(); + wait(); + + // PROCEED WITH AN ENABLE ON EVERYONE - EXPECTING posedge WAKES: + + m_cthread.enable(); + m_dynamic_method_and_events.enable(); + m_dynamic_method_negedge.enable(); + m_dynamic_method_posedge.enable(); + m_dynamic_thread_and_events.enable(); + m_dynamic_thread_negedge.enable(); + m_dynamic_thread_posedge.enable(); + m_static_method.enable(); + m_static_thread.enable(); + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - enabling all processes" << endl; + wait(); + + // DISABLE EVERYONE AGAIN: + + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - disabling all processes" << endl; + m_cthread.disable(); + m_dynamic_method_and_events.disable(); + m_dynamic_method_negedge.disable(); + m_dynamic_method_posedge.disable(); + m_dynamic_thread_and_events.disable(); + m_dynamic_thread_negedge.disable(); + m_dynamic_thread_posedge.disable(); + m_static_method.disable(); + m_static_thread.disable(); + wait(); + + // PROCEED WITH AN ENABLE ON EVERYONE - EXPECTING negedge WAKES: + + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - enabling all processes" << endl; + m_cthread.enable(); + m_dynamic_method_and_events.enable(); + m_dynamic_method_negedge.enable(); + m_dynamic_method_posedge.enable(); + m_dynamic_thread_and_events.enable(); + m_dynamic_thread_negedge.enable(); + m_dynamic_thread_posedge.enable(); + m_static_method.enable(); + m_static_thread.enable(); + wait(); + + // FIRE OFF EVENT 1: + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - firing event1 " << endl; + m_event1.notify(SC_ZERO_TIME); + wait(); + + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - disabling all processes" << endl; + m_cthread.disable(); + m_dynamic_method_and_events.disable(); + m_dynamic_method_negedge.disable(); + m_dynamic_method_posedge.disable(); + m_dynamic_thread_and_events.disable(); + m_dynamic_thread_negedge.disable(); + m_dynamic_thread_posedge.disable(); + m_static_method.disable(); + m_static_thread.disable(); + wait(); + + + // FIRE OFF EVENT 2: WITH EVERYONE DISABLED: + + m_event2.notify(SC_ZERO_TIME); + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - firing event2 " << endl; + wait(); + wait(); + wait(); + + // FIRE OFF EVENT 2: WITH EVERYONE ENABLED: + + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - enabling all processes" << endl; + m_cthread.enable(); + m_dynamic_method_and_events.enable(); + m_dynamic_method_negedge.enable(); + m_dynamic_method_posedge.enable(); + m_dynamic_thread_and_events.enable(); + m_dynamic_thread_negedge.enable(); + m_dynamic_thread_posedge.enable(); + m_static_method.enable(); + m_static_thread.enable(); + wait(); + + m_event2.notify(SC_ZERO_TIME); + cout << endl << sc_time_stamp() << ": stimulus (" + << __LINE__ << ") - firing event2 " << endl; + wait(); + wait(); + sc_stop(); + } + } + sc_in m_clk; + sc_process_handle m_cthread; + sc_process_handle m_dynamic_method_and_events; + sc_process_handle m_dynamic_method_negedge; + sc_process_handle m_dynamic_method_posedge; + sc_process_handle m_dynamic_thread_and_events; + sc_process_handle m_dynamic_thread_negedge; + sc_process_handle m_dynamic_thread_posedge; + sc_event m_event1; + sc_event m_event2; + sc_event m_event3; + sc_event m_event4; + sc_in m_reset; + sc_process_handle m_static_method; + sc_process_handle m_static_thread; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + sc_signal reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + reset = true; + cout << "Status before sc_start(1,SC_NS) = " << sc_get_status() << endl; + sc_start(1, SC_NS); + cout << "Status after sc_start(1,SC_NS) = " << sc_get_status() << endl; + reset = false; + sc_start(); + + cout << "Program completed" << endl; + return 0; +} + +// $Log: test03.cpp,v $ +// Revision 1.5 2011/02/20 13:44:06 acg +// Andy Goodrich: updates for IEEE 1666 2011. +// +// Revision 1.4 2011/02/14 17:00:00 acg +// Andy Goodrich: updated copyright and added cvs logging information inline. +// +// Revision 1.3 2011/01/14 14:23:58 acg +// Andy Goodrich: Fixes for 1666_2011 +// +// Revision 1.2 2009/05/22 16:07:26 acg +// Andy Goodrich: process control updates. +// +// Revision 1.1.1.1 2006/12/15 20:26:03 acg +// systemc_tests-2.3 +// +// Revision 1.1 2006/12/14 21:40:10 acg +// Andy Goodrich: moving test to new directory. +// +// Revision 1.2 2006/04/20 19:43:31 acg +// Andy Goodrich: moved CVS log to end of file so that __LINE__ does not +// change when a checkin is done. +// +// Revision 1.1 2006/04/17 20:10:55 acg +// Andy Goodrich: First inclusion of test for suspend and resume support. +// diff --git a/src/systemc/tests/systemc/kernel/process_control/test04/golden/test04.log b/src/systemc/tests/systemc/kernel/process_control/test04/golden/test04.log new file mode 100644 index 000000000..e6b84c69a --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test04/golden/test04.log @@ -0,0 +1,20 @@ +SystemC Simulation +0 s:slave - in reset +1 ns:slave - self-suspend... +3 ns:master - resuming slave +3 ns:slave - ... resumed +4 ns:slave - self-disable ... +4 ns:slave - ... executing ... +6 ns:master - enabling slave +7 ns:slave - ... enabled +7 ns:master - sync reset on slave +8 ns:slave - in reset +9 ns:slave - in reset +10 ns:slave - in reset +10 ns:master - sync reset off slave +11 ns:slave - self-suspend... +13 ns:master - async reset on slave +13 ns:slave - in reset + +Info: /OSCI/SystemC: Simulation stopped by user. +Program completed diff --git a/src/systemc/tests/systemc/kernel/process_control/test04/test04.cpp b/src/systemc/tests/systemc/kernel/process_control/test04/test04.cpp new file mode 100644 index 000000000..c8e744c2b --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test04/test04.cpp @@ -0,0 +1,137 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- Test of interaction of suspend-resume, disable-enable, and + resets on processes + + Original Author: Andy Goodrich + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + Revision log at end of the file to let __LINE__ give the same results + after a check-in. + *****************************************************************************/ +// $Log: test04.cpp,v $ +// Revision 1.5 2011/04/02 00:08:29 acg +// Andy Goodrich: turn off corner case error checking. +// +// Revision 1.4 2011/03/07 19:32:14 acg +// Andy Goodrich: addition to set sc_core::sc_allow_process_control_corners +// to true so that this test avoids corner case error messages. +// +// Revision 1.3 2011/02/14 17:00:00 acg +// Andy Goodrich: updated copyright and added cvs logging information inline. +// + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(master,m_clk.pos()); + SC_CTHREAD(slave,m_clk.pos()); + } + void slave() + { + m_handle0 = sc_get_current_process_handle(); + cout << sc_time_stamp() << ":slave - in reset" << endl; + for (;;) + { + wait(); + cout << sc_time_stamp() << ":slave - self-suspend..." << endl; + m_handle0.suspend(); + cout << sc_time_stamp() << ":slave - ... resumed" << endl; + wait(); + cout << sc_time_stamp() << ":slave - self-disable ..." << endl; + m_handle0.disable(); + cout << sc_time_stamp() << ":slave - ... executing ..." << endl; + wait(); + cout << sc_time_stamp() << ":slave - ... enabled" << endl; + wait(); + wait(); + wait(); + } + } + void master() + { + m_handle1 = sc_get_current_process_handle(); + for (;;) + { + wait(); + wait(); + wait(); + cout << sc_time_stamp() + << ":master - resuming slave" << endl; + m_handle0.resume(); + wait(); + wait(); + wait(); + cout << sc_time_stamp() + << ":master - enabling slave" << endl; + m_handle0.enable(); + wait(); + cout << sc_time_stamp() + << ":master - sync reset on slave" << endl; + m_handle0.sync_reset_on(); + wait(); + wait(); + wait(); + cout << sc_time_stamp() + << ":master - sync reset off slave" << endl; + m_handle0.sync_reset_off(); + wait(); + wait(); + wait(); + cout << sc_time_stamp() + << ":master - async reset on slave" << endl; + m_handle0.reset(); + wait(20); + sc_stop(); + } + } + sc_in m_clk; + sc_process_handle m_handle0; + sc_process_handle m_handle1; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_core::sc_allow_process_control_corners = true; + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_core::sc_allow_process_control_corners = true; + sc_start(); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/process_control/test05/golden/test05.log b/src/systemc/tests/systemc/kernel/process_control/test05/golden/test05.log new file mode 100644 index 000000000..dd5bbfcbb --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test05/golden/test05.log @@ -0,0 +1,10 @@ +SystemC Simulation +3 ns throwing my exception +3 ns caught my exception +4 ns throwing my exception +4 ns caught my exception +4 ns throwing your exception +4 ns caught your exception + +Info: /OSCI/SystemC: Simulation stopped by user. +Program completed diff --git a/src/systemc/tests/systemc/kernel/process_control/test05/test05.cpp b/src/systemc/tests/systemc/kernel/process_control/test05/test05.cpp new file mode 100644 index 000000000..5fe76c345 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test05/test05.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- Test user exception throws. + + Original Author: Andy Goodrich, Forte Design Systems, 15 December 2006 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test05.cpp,v $ +// Revision 1.3 2011/02/14 17:00:00 acg +// Andy Goodrich: updated copyright and added cvs logging information inline. +// + +#include "systemc.h" + +class my_exception {}; +class your_exception {}; + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(thread,m_clk.pos()); + SC_THREAD(monitor); + } + void monitor() + { + m_monitor_handle = sc_get_current_process_handle(); + for (;;) + { + try + { + wait(m_never_event); + } + catch (my_exception& except) + { + cout << sc_time_stamp() << " caught my exception " << endl; + } + catch (your_exception& except) + { + cout << sc_time_stamp() << " caught your exception " << endl; + } + } + } + void thread() + { + my_exception exception; + your_exception other_exception; + for (;;) + { + wait(3); + cout << sc_time_stamp() << " throwing my exception " << endl; + m_monitor_handle.throw_it(exception); + wait(); + + // test that both exceptions appear. + + cout << sc_time_stamp() << " throwing my exception " << endl; + m_monitor_handle.throw_it(exception); + cout << sc_time_stamp() << " throwing your exception " << endl; + m_monitor_handle.throw_it(other_exception); + wait(); + wait(); + sc_stop(); + } + } + sc_in m_clk; + sc_process_handle m_monitor_handle; + sc_event m_never_event; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/process_control/test06/golden/test06.log b/src/systemc/tests/systemc/kernel/process_control/test06/golden/test06.log new file mode 100644 index 000000000..01aaf232f --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test06/golden/test06.log @@ -0,0 +1,21 @@ +SystemC Simulation +top.parent.method_0 triggered (0 s @ 1) +top.parent.thread_0 triggered (0 s @ 1) +top.parent.method_0.thread_0 triggered (0 s @ 1) +top.parent.thread_0.method_0 triggered (0 s @ 1) +top.parent.method_0.thread_0.method_0 triggered (0 s @ 1) +top.parent.thread_0.method_0.thread_0 triggered (0 s @ 1) +top.parent.method_0.thread_0.method_0 triggered (10 ns @ 4) +top.parent.thread_0.method_0 triggered (10 ns @ 4) +top.parent.method_0 triggered (10 ns @ 4) +top.parent.thread_0.method_0.thread_0 triggered (10 ns @ 4) +top.parent.method_0.thread_0 triggered (10 ns @ 4) +top.parent.thread_0 triggered (10 ns @ 4) +top.parent.thread_0 kill requested (sc_thread_process) (10 ns @ 4) +top.parent.thread_0.method_0.thread_0 local deleted (10 ns @ 4) +top.parent.thread_0 local deleted (10 ns @ 4) +top.parent.method_0 kill requested (sc_method_process) (10 ns @ 4) +top.parent.method_0.thread_0 local deleted (10 ns @ 4) +top.parent ended (20 ns @ 7) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/process_control/test06/test06.cpp b/src/systemc/tests/systemc/kernel/process_control/test06/test06.cpp new file mode 100644 index 000000000..616e3acf7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test06/test06.cpp @@ -0,0 +1,130 @@ +//---------------------------------------------------------------------- +// Copyright 2009 Cadence Design Systems, Inc. +// All Rights Reserved Worldwide +// Copyright 2009 Forte Design Systems, Inc. +// Copyright 2010 OFFIS Institute for Information technology +// +// test06: test hierarchical kills +//---------------------------------------------------------------------- + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +SC_MODULE(top) { +public: + SC_CTOR(top) { + SC_THREAD(parent); + sensitive << clk.pos(); + dont_initialize(); + } + + void proc_tree( unsigned depth, unsigned width, bool as_method, bool spawn_only ) + { + unsigned w = width; + if (sc_time_stamp() == SC_ZERO_TIME || spawn_only ) + while( depth && w --> 0 ) + { + sc_spawn_options sp; + sp.set_sensitivity( &clk.pos() ); + + if(as_method) // we are spawned as method, spawn a thread + { + sc_spawn( sc_bind( &top::proc_tree, this, depth-1, width, !as_method, false ) + , sc_gen_unique_name("thread"), &sp ); + } + else // we are spawned as thread, spawn a method + { + sp.spawn_method(); + sc_spawn( sc_bind( &top::proc_tree, this, depth-1, width, !as_method, false ) + , sc_gen_unique_name("method"), &sp ); + } + } + + if(spawn_only) return; + + std::cout << sc_get_current_process_handle().name() + << " triggered " + << "(" << sc_time_stamp() << " @ " << sc_delta_count() << ")" + << std::endl; + + // start thread + if( !as_method ) thread_loop(); + } + + void thread_loop() + { + struct local_ { + ~local_(){ + std::cout + << sc_get_current_process_handle().name() + << " local deleted " + << "(" << sc_time_stamp() << " @ " << sc_delta_count() << ")" + << std::endl; + } + } l; l=l; + + unsigned rounds = 5; + while( rounds --> 0 ) + { + wait(); + std::cout << sc_get_current_process_handle().name() + << " triggered " + << "(" << sc_time_stamp() << " @ " << sc_delta_count() << ")" + << std::endl; + } + std::cout << sc_get_current_process_handle().name() + << " ended " + << "(" << sc_time_stamp() << " @ " << sc_delta_count() << ")" + << std::endl; + } + + void parent() + { + proc_tree( 3, 1, true , true ); + proc_tree( 3, 1, false, true ); + + wait(); + + // copy children (needed, since children may get reordered) + std::vector< sc_object* > children = + sc_get_current_process_handle().get_child_objects(); + + std::vector< sc_object* >::const_iterator it = children.begin(); + + while( it != children.end() ) + { + sc_process_handle h( *it++ ); + sc_assert( h.valid() ); + + std::cout << h.name() << " " + << "kill requested " + << "(" << h.get_process_object()->kind() << ") " + << "(" << sc_time_stamp() << " @ " << sc_delta_count() << ")" + << std::endl; + + h.kill( SC_INCLUDE_DESCENDANTS ); + } + + wait(); + + std::cout << sc_get_current_process_handle().name() + << " ended " + << "(" << sc_time_stamp() << " @ " << sc_delta_count() << ")" + << std::endl; + + wait(); + sc_stop(); + while(true) wait(); + } + + sc_in clk; +}; + +int sc_main (int argc, char *argv[]) +{ + sc_clock clk("clk", 10, SC_NS, 0.5); + top t("top"); + t.clk(clk); + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/process_control/test07/golden/test07.log b/src/systemc/tests/systemc/kernel/process_control/test07/golden/test07.log new file mode 100644 index 000000000..015022982 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test07/golden/test07.log @@ -0,0 +1,90 @@ +SystemC Simulation +------ (50 ns) ------ + dut (sc_module) + dut.parent (sc_thread_process) (running) +---------------------- ++++ dut.parent.child0 starting (50 ns) ++++ dut.parent.child1 starting (50 ns) +------ (100 ns) ------ + dut (sc_module) + dut.parent (sc_thread_process) (running) + dut.parent.child0 (sc_thread_process) (running) + dut.parent.child0.local (sc_object) + dut.parent.child1 (sc_thread_process) (running) + dut.parent.child1.local (sc_object) + dut.parent.child1.dyn_obj (sc_object) +---------------------- ++++ dut.parent.child1.grandchild starting (150 ns) ++++ dut.parent.child0.grandchild starting (150 ns) +------ (200 ns) ------ + dut (sc_module) + dut.parent (sc_thread_process) (running) + dut.parent.child0 (sc_thread_process) (running) + dut.parent.child0.local (sc_object) + dut.parent.child0.grandchild (sc_thread_process) (running) + dut.parent.child0.grandchild.local (sc_object) + dut.parent.child1 (sc_thread_process) (running) + dut.parent.child1.local (sc_object) + dut.parent.child1.dyn_obj (sc_object) + dut.parent.child1.grandchild (sc_thread_process) (running) + dut.parent.child1.grandchild.local (sc_object) +---------------------- ++++ dut.parent.child1 exiting (250 ns) ++++ dut.parent.child1.local deleted ++++ dut.parent.child0 exiting (250 ns) ++++ dut.parent.child0.local deleted +------ (300 ns) ------ + dut (sc_module) + dut.parent (sc_thread_process) (running) + dut.parent.child0 (sc_thread_process) (terminated) + dut.parent.child0.grandchild (sc_thread_process) (running) + dut.parent.child0.grandchild.local (sc_object) + dut.parent.child1 (sc_thread_process) (terminated) + dut.parent.child1.grandchild (sc_thread_process) (running) + dut.parent.child1.grandchild.local (sc_object) + dut.parent.child1.dyn_obj (sc_object) +---------------------- ++++ dut.parent.child1.grandchild exiting (350 ns) ++++ dut.parent.child1.grandchild.local deleted ++++ dut.parent.child0.grandchild exiting (350 ns) ++++ dut.parent.child0.grandchild.local deleted +------ (400 ns) ------ + dut (sc_module) + dut.parent (sc_thread_process) (running) + dut.parent.child1 (sc_thread_process) (terminated) + dut.parent.child1.dyn_obj (sc_object) +---------------------- ++++ dut.parent.child1.dyn_obj deleted +------ (500 ns) ------ + dut (sc_module) + dut.parent (sc_thread_process) (running) +---------------------- ++++ dut.parent.child0 starting (500 ns) ++++ dut.parent.child1 starting (500 ns) +------ (600 ns) ------ + dut (sc_module) + dut.parent (sc_thread_process) (running) + dut.parent.child0 (sc_thread_process) (running) + dut.parent.child0.local (sc_object) + dut.parent.child1 (sc_thread_process) (running) + dut.parent.child1.local (sc_object) +---------------------- ++++ dut.parent.child1.grandchild starting (600 ns) ++++ dut.parent.child0.grandchild starting (600 ns) ++++ dut.parent.child0.local deleted ++++ dut.parent.child1.grandchild.local deleted ++++ dut.parent.child1.local deleted ++++ kills sent ... (650 ns) +------ (700 ns) ------ + dut (sc_module) + dut.parent (sc_thread_process) (running) + dut.parent.child0 (sc_thread_process) (terminated) + dut.parent.child0.grandchild (sc_thread_process) (running) + dut.parent.child0.grandchild.local (sc_object) +---------------------- ++++ dut.parent exiting (700 ns) ++++ dut.parent.child0.grandchild exiting (800 ns) ++++ dut.parent.child0.grandchild.local deleted +------ (900 ns) ------ + dut (sc_module) +---------------------- diff --git a/src/systemc/tests/systemc/kernel/process_control/test07/test07.cpp b/src/systemc/tests/systemc/kernel/process_control/test07/test07.cpp new file mode 100644 index 000000000..5478d6d7d --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test07/test07.cpp @@ -0,0 +1,204 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +/***************************************************************************** + + test07.cpp -- Test handling of process objects with living descendants + + Original Author: Philipp A. Hartmann, OFFIS + + *****************************************************************************/ +/***************************************************************************** + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test07.cpp,v $ +// Revision 1.2 2011/02/14 17:00:00 acg +// Andy Goodrich: updated copyright and added cvs logging information inline. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +void +dump_hierarchy( + std::vector< sc_object* > const & objs = sc_get_top_level_objects() + , unsigned level = 0 +) +{ + if (!level) + std::cout << "------ " << "(" << sc_time_stamp() << ")" << " ------" + << std::endl; + + std::vector::const_iterator it = objs.begin(); + for( ; it != objs.end(); it++ ) + { + std::cout << std::string( level + 1, ' ' ) + << (*it)->name() << " (" << (*it)->kind() << ")"; + + sc_process_handle h(*it); + + std::cout << ( h.valid() // is it a process? -> print state + ? (! h.terminated() ? " (running)" : " (terminated)" ) + : "" ) + << std::endl; + + dump_hierarchy( (*it)->get_child_objects(), level+1 ); + } + + if (!level) + std::cout << "---------------------- " << std::endl; +} + +struct my_object : sc_object { + my_object( const char* name ) : sc_object( name ) {} + ~my_object() + { + std::cout << "+++ " << this->name() << " deleted" << std::endl; + } +}; + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + : leaf_(0) + { + SC_THREAD(parent); + } + + enum start_options + { + no_children = 0, + start_child_proc = 1, + create_child_obj = 2, + both_children = 3 + }; + + void child( start_options opt ){ + start(); + + my_object local( "local" ); + + if( opt & create_child_obj ) + leaf_=new my_object("dyn_obj"); + + wait( 100, SC_NS ); + + if( opt & start_child_proc ) + sc_spawn( sc_bind( &DUT::child, this, no_children ) + , "grandchild" ); + + wait( 100, SC_NS ); + end(); + } + + void parent() + { + // only parent alive + wait( 50, SC_NS ); + dump_hierarchy(); + + sc_spawn( sc_bind( &DUT::child, this, start_child_proc ), "child0" ); + sc_spawn( sc_bind( &DUT::child, this, both_children ), "child1" ); + + // direct children up and running + wait( 50, SC_NS ); + dump_hierarchy(); + + // grandchildren started, child object created + wait( 100, SC_NS ); + dump_hierarchy(); + + // direct children ended (zombies kept) + wait( 100, SC_NS ); + dump_hierarchy(); + + // grandhildren ended (zombie with child object kept) + wait( 100, SC_NS ); + dump_hierarchy(); + + // child object removed, zombies deleted + delete leaf_; leaf_ = 0; + wait( 100, SC_NS ); + dump_hierarchy(); + + { + // create another pair of children + sc_process_handle + h0 = sc_spawn( sc_bind( &DUT::child, this, start_child_proc ), "child0" ), + h1 = sc_spawn( sc_bind( &DUT::child, this, start_child_proc ), "child1" ); + + wait( 100, SC_NS ); + dump_hierarchy(); + + // and kill them, after it has spawned its grandchild + wait( 50, SC_NS ); + h0.kill(); + h1.kill( SC_INCLUDE_DESCENDANTS ); + + std::cout << "+++ kills sent ... " + << "(" << sc_time_stamp() << ")" + << std::endl; + + // needed to avoid segfault + //wait(SC_ZERO_TIME); + + } // drop handles + + wait( 50, SC_NS ); + dump_hierarchy(); + + end(); + } + + void start() + { + std::cout + << "+++ " + << sc_get_current_process_handle().name() + << " starting " + << "(" << sc_time_stamp() << ")" + << std::endl; + } + void end() + { + std::cout + << "+++ " + << sc_get_current_process_handle().name() + << " exiting " + << "(" << sc_time_stamp() << ")" + << std::endl; + } + + my_object* leaf_; +}; + + +int sc_main( int, char*[] ) +{ + DUT dut("dut"); + sc_start(900, SC_NS ); + // everything cleaned up (only module still alive) + dump_hierarchy(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/process_control/test08/golden/test08.log b/src/systemc/tests/systemc/kernel/process_control/test08/golden/test08.log new file mode 100644 index 000000000..c08a26aec --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test08/golden/test08.log @@ -0,0 +1,16 @@ +SystemC Simulation +0 s target: initializing +10 ns tb: firing event +10 ns target: awoke +20 ns tb: suspending target +30 ns tb: firing event while target suspended +40 ns tb: resetting target +40 ns target: initializing +50 ns tb: resuming target +60 ns tb: 10ns after resume +70 ns tb: firing event again +70 ns target: awoke +80 ns tb: stopping + +Info: /OSCI/SystemC: Simulation stopped by user. +Program completed diff --git a/src/systemc/tests/systemc/kernel/process_control/test08/test08.cpp b/src/systemc/tests/systemc/kernel/process_control/test08/test08.cpp new file mode 100644 index 000000000..8e5a91599 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/test08/test08.cpp @@ -0,0 +1,127 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- Test of suspend and asynchronous reset interaction + + Original Author: Andy Goodrich, 14 Februrary 2011 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +// $Log: test08.cpp,v $ +// Revision 1.4 2011/04/02 00:08:36 acg +// Andy Goodrich: turn off corner case error checking. +// +// Revision 1.3 2011/03/07 19:32:16 acg +// Andy Goodrich: addition to set sc_core::sc_allow_process_control_corners +// to true so that this test avoids corner case error messages. +// +// Revision 1.2 2011/02/20 13:44:06 acg +// Andy Goodrich: updates for IEEE 1666 2011. +// +// Revision 1.1 2011/02/14 16:59:29 acg +// Andy Goodrich: first check in. +// + +#include "systemc.h" + +sc_event event1; +sc_process_handle t; +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_THREAD(thread); + t = sc_get_current_process_handle(); + } + void thread() + { + cout << sc_time_stamp() << " target: initializing" << endl; + for (;;) + { + wait(event1); + cout << sc_time_stamp() << " target: awoke" << endl; + } + } +}; + +SC_MODULE(TB) +{ + SC_CTOR(TB) + { + SC_THREAD(tb_thread); + } + void tb_thread() + { + wait( 10, SC_NS ); + cout << sc_time_stamp() << " tb: firing event " << endl; + event1.notify(); + wait( 10, SC_NS ); + + cout << sc_time_stamp() << " tb: suspending target " << endl; + t.suspend(); + wait( 10, SC_NS ); + + cout << sc_time_stamp() << " tb: firing event while target suspended" + << endl; + event1.notify(); + wait( 10, SC_NS ); + + cout << sc_time_stamp() << " tb: resetting target " << endl; + t.reset(); + wait( 10, SC_NS ); + + cout << sc_time_stamp() << " tb: resuming target" << endl; + t.resume(); + wait( 10, SC_NS ); + + cout << sc_time_stamp() << " tb: 10ns after resume" << endl; + wait( 10, SC_NS ); + + cout << sc_time_stamp() << " tb: firing event again" << endl; + event1.notify(); + wait( 10, SC_NS ); + + cout << sc_time_stamp() << " tb: stopping" << endl; + sc_stop(); + } +}; + +int sc_main(int argc, char* argv[]) +{ + sc_core::sc_allow_process_control_corners = true; + DUT dut("dut"); + TB tb("tb"); + + sc_core::sc_allow_process_control_corners = true; + sc_start(); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/process_control/throw_it/test1/golden/test1.log b/src/systemc/tests/systemc/kernel/process_control/throw_it/test1/golden/test1.log new file mode 100644 index 000000000..18c914736 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/throw_it/test1/golden/test1.log @@ -0,0 +1,5 @@ +SystemC Simulation +0 s: starting victim thread +10 ns: in perpetrator throwing exception in victim +10 ns: in victim thread, caught exception from pepetrator, exiting +10 ns: in perpetrator after throwing exception in victim diff --git a/src/systemc/tests/systemc/kernel/process_control/throw_it/test1/test1.cpp b/src/systemc/tests/systemc/kernel/process_control/throw_it/test1/test1.cpp new file mode 100644 index 000000000..1a3ceb192 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/process_control/throw_it/test1/test1.cpp @@ -0,0 +1,57 @@ +//---------------------------------------------------------------------- +// Copyright 2009 Cadence Design Systems, Inc. +// All Rights Reserved Worldwide +//---------------------------------------------------------------------- + +#include + +class my_exception { +public: + my_exception(const char* s) : s_(s) { } + const char* message() { return s_.c_str(); } +protected: + std::string s_; +}; + +SC_MODULE(top) { +public: + SC_CTOR(top) { + SC_THREAD(victim); + h = sc_get_current_process_handle(); + SC_THREAD(perpetrator); + } + + void victim() { + try { + cerr << sc_time_stamp() << ": starting victim thread" << endl; + ::sc_core::wait(100, SC_NS); + } + catch (my_exception& x) { + cerr << sc_time_stamp() << ": in victim thread, caught exception " + << x.message() << ", exiting" << endl; + return; + } + } + + void perpetrator() { + wait(10, SC_NS); + cerr << sc_time_stamp() + << ": in perpetrator throwing exception in victim " + << endl; + h.throw_it(my_exception("from pepetrator")); + cerr << sc_time_stamp() + << ": in perpetrator after throwing exception in victim " + << endl; + } + +protected: + sc_process_handle h; +}; + +int sc_main (int argc, char *argv[]) +{ + top t("top"); + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/reset_signal_is/test01/golden/test01.log new file mode 100644 index 000000000..2fdc2c177 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test01/golden/test01.log @@ -0,0 +1,8 @@ +SystemC Simulation +Before start +A: reset +B: reset +A: reset +B: reset +After reset true +Ending diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test01/test01.cpp b/src/systemc/tests/systemc/kernel/reset_signal_is/test01/test01.cpp new file mode 100644 index 000000000..af0ca999e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test01/test01.cpp @@ -0,0 +1,106 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- Test for reset_signal_is support. + + Original Author: Andy Goodrich + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + +SC_MODULE(A) +{ + SC_CTOR(A) + { + SC_CTHREAD(test,m_clk.pos()); + reset_signal_is( m_reset, false ); + } + void test() + { + { + cout << "A: reset" << endl; + wait(); + } + for (;;) + { + wait(); + } + } + sc_in_clk m_clk; + sc_in m_reset; +}; + +SC_MODULE(B) +{ + B(sc_module_name name, sc_signal* reset_p ): + sc_module(name), m_reset_p(reset_p) + { + SC_HAS_PROCESS(B); + SC_CTHREAD(test,m_clk.pos()); + reset_signal_is( *m_reset_p, false ); + } + void test() + { + { + cout << "B: reset" << endl; + wait(); + } + for (;;) + { + wait(); + } + } + sc_in_clk m_clk; + sc_signal* m_reset_p; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clk; + sc_signal reset; + A a("a"); + B b("b",&reset); + + a.m_clk(clk); + a.m_reset(reset); + b.m_clk(clk); + + cout << "Before start" << endl; + sc_start(2, SC_NS); + reset = true; + cout << "After reset true" << endl; + sc_start(3, SC_NS); + cout << "Ending" << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/reset_signal_is/test02/golden/test02.log new file mode 100644 index 000000000..4d9276f04 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test02/golden/test02.log @@ -0,0 +1,10 @@ +SystemC Simulation +0 s: initializing +3 ns: waited 3 +4 ns: initializing +7 ns: waited 3 +10 ns: waited 3 +12 ns: initializing +15 ns: initializing + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test02/test02.cpp b/src/systemc/tests/systemc/kernel/reset_signal_is/test02/test02.cpp new file mode 100644 index 000000000..2fc27a1f7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test02/test02.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- Test reset_signal_is() usage with SC_CTHREAD processes. + + Original Author: Andy Goodrich, Forte Design Systems, 12 August 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(cthread,m_clk.pos()); + reset_signal_is(m_reset,true); + SC_CTHREAD(resetter,m_clk.pos()); + } + void cthread() + { + cout << sc_time_stamp() << ": initializing" << endl; + for (;;) + { + wait(3); + cout << sc_time_stamp() << ": waited 3" << endl; + } + } + void resetter() + { + m_reset = false; + wait(3); + m_reset = true; + wait(2); + m_reset = false; + wait(6); + m_reset = true; + wait(5); + sc_stop(); + } + sc_in m_clk; + sc_inout m_reset; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + DUT dut("dut"); + sc_signal reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/reset_signal_is/test03/golden/test03.log new file mode 100644 index 000000000..41347fb58 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test03/golden/test03.log @@ -0,0 +1,9 @@ +SystemC Simulation +0 s: initializing +3 ns: initializing +6 ns: waited 3 +9 ns: waited 3 +11 ns: initializing +14 ns: initializing +17 ns: waited 3 +20 ns: waited 3 diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test03/test03.cpp b/src/systemc/tests/systemc/kernel/reset_signal_is/test03/test03.cpp new file mode 100644 index 000000000..e0cf86131 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test03/test03.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- Test reset_signal_is() usage with SC_CTHREAD processes. + + Original Author: Andy Goodrich, Forte Design Systems, 12 August 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(cthread,m_clk.pos()); + reset_signal_is(m_reset,true); + } + void cthread() + { + cout << sc_time_stamp() << ": initializing" << endl; + for (;;) + { + wait(3); + cout << sc_time_stamp() << ": waited 3" << endl; + } + } + sc_in m_clk; + sc_in m_reset; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + DUT dut("dut"); + sc_signal reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + reset = false; + sc_start(3, SC_NS); + reset = true; + sc_start(2, SC_NS); + reset = false; + sc_start(6, SC_NS); + reset = true; + sc_start(5, SC_NS); + reset = false; + sc_start(5, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test04/golden/test04.log b/src/systemc/tests/systemc/kernel/reset_signal_is/test04/golden/test04.log new file mode 100644 index 000000000..4d9276f04 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test04/golden/test04.log @@ -0,0 +1,10 @@ +SystemC Simulation +0 s: initializing +3 ns: waited 3 +4 ns: initializing +7 ns: waited 3 +10 ns: waited 3 +12 ns: initializing +15 ns: initializing + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test04/test04.cpp b/src/systemc/tests/systemc/kernel/reset_signal_is/test04/test04.cpp new file mode 100644 index 000000000..00b6676e2 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test04/test04.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- Test reset_signal_is() with SC_CTHREAD processes and sc_out. + + Original Author: Andy Goodrich, Forte Design Systems, 12 August 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(cthread,m_clk.pos()); + reset_signal_is(m_reset,true); + SC_CTHREAD(resetter,m_clk.pos()); + } + void cthread() + { + cout << sc_time_stamp() << ": initializing" << endl; + for (;;) + { + wait(3); + cout << sc_time_stamp() << ": waited 3" << endl; + } + } + void resetter() + { + m_reset = false; + wait(3); + m_reset = true; + wait(2); + m_reset = false; + wait(6); + m_reset = true; + wait(5); + sc_stop(); + } + sc_in m_clk; + sc_out m_reset; +}; + +int sc_main( int argc, char* argv[] ) +{ + sc_clock clock; + DUT dut("dut"); + sc_signal reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test05/golden/test05.log b/src/systemc/tests/systemc/kernel/reset_signal_is/test05/golden/test05.log new file mode 100644 index 000000000..efb2d4750 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test05/golden/test05.log @@ -0,0 +1,63 @@ +SystemC Simulation +0 s ... static method +0 s ... static thread event wait +0 s ... static thread timed wait +0 s ... static thread clocked +0 s ... static cthread +1 ns ... dynamic method +1 ns ... dynamic thread clocked +1 ns ... dynamic thread event wait +1 ns ... dynamic thread timed wait + +2500 ps asserting asynchronous reset +2500 ps ... dynamic thread timed wait +2500 ps ... dynamic thread event wait +2500 ps ... dynamic thread clocked +2500 ps ... static thread timed wait +2500 ps ... static thread event wait +2500 ps ... static thread clocked +2500 ps ... static cthread +3 ns ... static thread clocked +3 ns ... static cthread +3 ns ... dynamic thread clocked + +3500 ps clearing asynchronous reset + +5500 ps asserting synchronous reset +6 ns ... static thread clocked +6 ns ... static cthread +6 ns ... dynamic thread clocked + +6500 ps clearing synchronous reset + +13500 ps asserting asynchronous reset +13500 ps ... dynamic thread timed wait +13500 ps ... dynamic thread event wait +13500 ps ... dynamic thread clocked +13500 ps ... static thread timed wait +13500 ps ... static thread event wait +13500 ps ... static thread clocked +13500 ps ... static cthread +14 ns ... static thread clocked +14 ns ... static cthread +14 ns ... dynamic thread clocked +15 ns ... static thread clocked +15 ns ... static cthread +15 ns ... dynamic thread clocked + +15500 ps clearing asynchronous reset + +17500 ps asserting synchronous reset +18 ns ... static thread clocked +18 ns ... static cthread +18 ns ... dynamic thread clocked +19 ns ... static thread clocked +19 ns ... static cthread +19 ns ... dynamic thread clocked + +19500 ps clearing synchronous reset + +24500 ps terminating simulation + +Info: /OSCI/SystemC: Simulation stopped by user. +Program completed diff --git a/src/systemc/tests/systemc/kernel/reset_signal_is/test05/test05.cpp b/src/systemc/tests/systemc/kernel/reset_signal_is/test05/test05.cpp new file mode 100644 index 000000000..d811a109e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/reset_signal_is/test05/test05.cpp @@ -0,0 +1,220 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- Test reset_signal_is() and async_reset_signal_is() usage. + + Original Author: Andy Goodrich, Forte Design Systems, 14 December 2006 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(creator,m_clk.pos()); + SC_CTHREAD(resetter,m_clk.neg()); + + // SET UP STATICALLY DEFINED PROCESSES: + + SC_CTHREAD(static_cthread,m_clk.pos()); + async_reset_signal_is(m_areset,true); + reset_signal_is(m_sreset,true); + SC_METHOD(static_method); + reset_signal_is(m_areset,true); + SC_THREAD(static_thread_clocked); + sensitive << m_clk.pos(); + dont_initialize(); + async_reset_signal_is(m_areset,true); + reset_signal_is(m_sreset,true); + SC_THREAD(static_thread_event); + async_reset_signal_is(m_areset,true); + reset_signal_is(m_sreset,true); + SC_THREAD(static_thread_timed); + async_reset_signal_is(m_areset,true); + reset_signal_is(m_sreset,true); + } + + // creator - create the dynamic processes after the start of simulation: + void creator() + { + sc_spawn_options options_method; + sc_spawn_options options_thread_clocked; + sc_spawn_options options_thread_event; + sc_spawn_options options_thread_timed; + + wait(1); + + options_method.reset_signal_is( m_areset, true ); + options_method.spawn_method(); + sc_spawn( sc_bind(&DUT::dynamic_method, this), "dynamic_method", + &options_method); + + options_thread_clocked.async_reset_signal_is( m_areset, true ); + options_thread_clocked.reset_signal_is( m_sreset, true ); + options_thread_clocked.set_sensitivity( &m_clk.posedge_event() ); + sc_spawn( sc_bind(&DUT::dynamic_thread_clocked, this), + "dynamic_thread_clocked", &options_thread_clocked); + + options_thread_event.async_reset_signal_is( m_areset, true ); + options_thread_event.reset_signal_is( m_sreset, true ); + sc_spawn( sc_bind(&DUT::dynamic_thread_event, this), + "dynamic_thread_event", &options_thread_event); + + options_thread_timed.async_reset_signal_is( m_areset, true ); + options_thread_timed.reset_signal_is( m_sreset, true ); + sc_spawn( sc_bind(&DUT::dynamic_thread_timed, this), + "dynamic_thread_timed", &options_thread_timed); + + } + + void dynamic_method() + { + cout << sc_time_stamp() << " ... dynamic method" << endl; + next_trigger(m_non_event); + } + + void dynamic_thread_clocked() + { + cout << sc_time_stamp() << " ... dynamic thread clocked" << endl; + for (;;) + { + wait(); + } + } + + void dynamic_thread_event() + { + cout << sc_time_stamp() << " ... dynamic thread event wait" << endl; + for (;;) + { + wait(m_non_event); + } + } + + void dynamic_thread_timed() + { + cout << sc_time_stamp() << " ... dynamic thread timed wait" << endl; + for (;;) + { + wait(1000, SC_NS); + } + } + + + void resetter() + { + for ( int wait_i = 1; wait_i < 3; wait_i++ ) + { + wait(2); + cout << endl << sc_time_stamp() << " asserting asynchronous reset" + << endl; + m_areset = true; + wait(wait_i); + cout << endl << sc_time_stamp() << " clearing asynchronous reset" + << endl; + m_areset = false; + wait(2); + cout << endl << sc_time_stamp() << " asserting synchronous reset" + << endl; + m_sreset = true; + wait(wait_i); + cout << endl << sc_time_stamp() << " clearing synchronous reset" + << endl; + m_sreset = false; + wait(5); + } + cout << endl << sc_time_stamp() << " terminating simulation" << endl; + sc_stop(); + } + + void static_cthread() + { + cout << sc_time_stamp() << " ... static cthread" << endl; + for (;;) + { + wait(); + } + } + + void static_method() + { + cout << sc_time_stamp() << " ... static method" << endl; + next_trigger(m_non_event); + } + + void static_thread_clocked() + { + cout << sc_time_stamp() << " ... static thread clocked" << endl; + for (;;) + { + wait(); + } + } + + void static_thread_event() + { + cout << sc_time_stamp() << " ... static thread event wait " << endl; + for (;;) + { + wait(m_non_event); + } + } + + void static_thread_timed() + { + cout << sc_time_stamp() << " ... static thread timed wait " << endl; + for (;;) + { + wait(1000, SC_NS); + } + } + + sc_signal m_areset; + sc_in m_clk; + sc_event m_non_event; + sc_signal m_sreset; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_attribute/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_attribute/test01/golden/test01.log new file mode 100644 index 000000000..f62393491 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_attribute/test01/golden/test01.log @@ -0,0 +1,5 @@ +SystemC Simulation +a1 +42 +a1 +a2 diff --git a/src/systemc/tests/systemc/kernel/sc_attribute/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_attribute/test01/test01.cpp new file mode 100644 index 000000000..99bd4b473 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_attribute/test01/test01.cpp @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_attribute - general test + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_attribute a1( "a1", 42 ); + sc_attribute a2( "a2", "foobar" ); + + clk.add_attribute( a1 ); + clk.add_attribute( a2 ); + + sc_attr_base* p = clk.get_attribute( "a1" ); + cout << p->name() << endl; + sc_attribute* pi = dynamic_cast*>( p ); + if( pi != 0 ) { + cout << pi->value << endl; + } + sc_attribute* ps = dynamic_cast*>( p ); + if( ps != 0 ) { + cout << ps->value << endl; + } + + const sc_attr_cltn& attrs = clk.attr_cltn(); + sc_attr_cltn::const_iterator it = attrs.begin(); + for( ; it != attrs.end(); ++ it ) { + cout << (*it)->name() << endl; + } + + clk.remove_attribute( "a1" ); + clk.remove_attribute( "a2" ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_attribute/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_attribute/test02/golden/test02.log new file mode 100644 index 000000000..b5133c9f1 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_attribute/test02/golden/test02.log @@ -0,0 +1,21 @@ +SystemC Simulation +a1 +clock +a1 +clock + +added attributes to the attribute collection class +a1 clock +a3 24 +a4 casio + +size of the class +3 + +looking whether the name is in collection class +a3 exists +a5 does not exist + +removing names +a1 is removed +a5 does not exist diff --git a/src/systemc/tests/systemc/kernel/sc_attribute/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_attribute/test02/test02.cpp new file mode 100644 index 000000000..6bd979657 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_attribute/test02/test02.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_attribute + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + sc_attr_cltn att_cltn; + sc_attr_cltn att_cln(att_cltn); + sc_attribute a1( "a1", "clock" ); + sc_attribute a2( a1 ); + sc_attribute a3( "a3", 24 ); + sc_attribute a4( "a4", "casio" ); + sc_attribute a5("a5"); + + cout << a2.name() << endl; + cout << a2.value << endl; + + clk.add_attribute( a2 ); + + sc_attr_base* p = clk.get_attribute("a1"); + cout << p->name() << endl; + sc_attribute* pi = dynamic_cast*>( p ); + if( pi != 0 ) { + cout << pi->value << endl; + } + + cout << endl; + cout << "added attributes to the attribute collection class" << endl; + + if(att_cltn.push_back(&a1) == true) { + cout << a1.name() << " "; + cout << a1.value << endl; + } + + if(att_cltn.push_back(&a3) == true) { + cout << a3.name() << " "; + cout << a3.value << endl; + } + + if(att_cltn.push_back(&a4) == true) { + cout << a4.name() << " "; + cout << a4.value << endl << endl; + } + + cout << "size of the class\n"; + cout << att_cltn.size()<< endl<< endl; + + cout << "looking whether the name is in collection class\n"; + sc_attr_base *pr = att_cltn.operator []("a3"); + if(pr != 0) + cout << pr->name() << " exists" << endl; + else + cout << "a3 does not exist\n"; + + sc_attr_base *pm = att_cltn.operator []("a5"); + if(pm != 0) + cout << pm->name() << " exists" << endl; + else + cout << "a5 does not exist\n" << endl; + + cout << "removing names \n"; + sc_attr_base *pk = att_cltn.remove("a1"); + if(pk != 0) + cout << "a1 is removed \n"; + else + cout << "a1 does not exist\n"; + sc_attr_base *pn = att_cltn.remove("a5"); + if(pn != 0) + cout << "a5 is removed \n"; + else + cout << "a5 does not exist\n"; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_elab_and_sim/golden/sc_elab_and_sim.log b/src/systemc/tests/systemc/kernel/sc_elab_and_sim/golden/sc_elab_and_sim.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_elab_and_sim/golden/sc_elab_and_sim.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_elab_and_sim/sc_elab_and_sim.cpp b/src/systemc/tests/systemc/kernel/sc_elab_and_sim/sc_elab_and_sim.cpp new file mode 100644 index 000000000..e5cd39efe --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_elab_and_sim/sc_elab_and_sim.cpp @@ -0,0 +1,30 @@ +#include "systemc.h" + + +int main() +{ + char* argv[] = { "0", "1", "2", "3", "4" }; + return sc_elab_and_sim( sizeof(argv)/sizeof(char*), argv ); +} + +int sc_main(int argc, char* argv[]) +{ + if ( argc != sc_argc() ) + { + cout << "sc_argc mismatch: expected " << argc << " got " << sc_argc() + << endl; + } + for ( int argi = 0; argi < argc; argi++ ) + { + if ( strcmp( argv[argi], sc_argv()[argi] ) ) + { + cout << "sc_argv()[" << argi << "] mismatch: expected: '" + << argv[argi] << "' got: '" << sc_argv()[argi] << "'" << endl; + } + } + + cerr << "Program completed" << endl; + + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/sc_event/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_event/test01/golden/test01.log new file mode 100644 index 000000000..b4230bf13 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test01/golden/test01.log @@ -0,0 +1,43 @@ +SystemC Simulation +1 1 +Triggered by event e_b +1 2 +Triggered by event e_b +1 3 +Triggered by event e_b +1 4 +Triggered by event e_b +1 5 +Triggered by event e_b +1 6 +Triggered by event e_b +1 7 +Triggered by event e_b +1 8 +Triggered by event e_b +1 9 +Triggered by event e_b +1 10 +Triggered by event e_b +1 11 +Triggered by event e_b +1 12 +Triggered by event e_b +1 13 +Triggered by event e_b +1 14 +Triggered by event e_b +1 15 +Triggered by event e_b +1 16 +Triggered by event e_b +1 17 +Triggered by event e_b +1 18 +Triggered by event e_b +1 19 +Triggered by event e_b +1 20 +Issuing sc_stop() + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_event/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_event/test01/test01.cpp new file mode 100644 index 000000000..81c9bc445 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test01/test01.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Bishnupriya Bhattacharya, Cadence Design Systems, + September 5, 2003 + Description of Modification: - set stop mode to SC_STOP_IMMEDIATE; + - add more output printout to make sure that + the immdiate event notification of "e_b" after + issuing sc_stop() does not make the + sensitive process "thread_a" run + + *****************************************************************************/ + +// test of immediate event notification + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e_a; + sc_event e_b; + + int n; + + void thread_a() + { + wait( SC_ZERO_TIME ); + n = 0; + while( true ) { + n ++; + e_a.notify(); + wait( e_b ); + cout << "Triggered by event e_b" << endl; + } + } + + void thread_b() + { + while( true ) { + wait( e_a ); + cout << sc_delta_count() << " " << n << endl; + if( n == 20 ) { + cout << "Issuing sc_stop() " << endl; + sc_stop(); + } + e_b.notify(); + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( thread_a ); + SC_THREAD( thread_b ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_set_stop_mode(SC_STOP_IMMEDIATE); + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_event/test02/golden/test02.log new file mode 100644 index 000000000..4608d4fd4 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test02/golden/test02.log @@ -0,0 +1,140 @@ +SystemC Simulation +1 -- 0 +1 AA 0 +4 -- 0 +4 BB 0 +7 -- 1 +10 -- 2 +13 -- 3 +13 CC 3 +16 -- 4 +19 -- 5 +22 -- 6 +22 DD 6 +25 -- 7 +28 -- 8 +31 -- 9 +31 EE 9 +34 -- 10 +37 -- 11 +40 -- 12 +40 FF 12 +42 GG 13 +44 -- 13 +47 -- 14 +50 -- 15 +50 AA 15 +53 -- 16 +56 -- 17 +59 -- 18 +59 BB 18 +62 -- 19 +65 -- 20 +68 -- 21 +68 CC 21 +71 -- 22 +74 -- 23 +77 -- 24 +77 DD 24 +80 -- 25 +83 -- 26 +86 -- 27 +86 EE 27 +89 -- 28 +92 -- 29 +95 -- 30 +95 FF 30 +97 GG 31 +99 -- 31 +102 -- 32 +105 -- 33 +105 AA 33 +108 -- 34 +111 -- 35 +114 -- 36 +114 BB 36 +117 -- 37 +120 -- 38 +123 -- 39 +123 CC 39 +126 -- 40 +129 -- 41 +132 -- 42 +132 DD 42 +135 -- 43 +138 -- 44 +141 -- 45 +141 EE 45 +144 -- 46 +147 -- 47 +150 -- 48 +150 FF 48 +152 GG 49 +154 -- 49 +157 -- 50 +160 -- 51 +160 AA 51 +163 -- 52 +166 -- 53 +169 -- 54 +169 BB 54 +172 -- 55 +175 -- 56 +178 -- 57 +178 CC 57 +181 -- 58 +184 -- 59 +187 -- 60 +187 DD 60 +190 -- 61 +193 -- 62 +196 -- 63 +196 EE 63 +199 -- 64 +202 -- 65 +205 -- 66 +205 FF 66 +207 GG 67 +209 -- 67 +212 -- 68 +215 -- 69 +215 AA 69 +218 -- 70 +221 -- 71 +224 -- 72 +224 BB 72 +227 -- 73 +230 -- 74 +233 -- 75 +233 CC 75 +236 -- 76 +239 -- 77 +242 -- 78 +242 DD 78 +245 -- 79 +248 -- 80 +251 -- 81 +251 EE 81 +254 -- 82 +257 -- 83 +260 -- 84 +260 FF 84 +262 GG 85 +264 -- 85 +267 -- 86 +270 -- 87 +270 AA 87 +273 -- 88 +276 -- 89 +279 -- 90 +279 BB 90 +282 -- 91 +285 -- 92 +288 -- 93 +288 CC 93 +291 -- 94 +294 -- 95 +297 -- 96 +297 DD 96 +300 -- 97 +303 -- 98 diff --git a/src/systemc/tests/systemc/kernel/sc_event/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_event/test02/test02.cpp new file mode 100644 index 000000000..0137a0012 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test02/test02.cpp @@ -0,0 +1,127 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of immediate event notification + +#include "systemc.h" + +SC_MODULE( source ) +{ + sc_in_clk clk; + sc_out out; + + void main_action() + { + int a = 0; + while( true ) { + wait(); + out = a ++; + } + } + + SC_CTOR( source ) + { + SC_THREAD( main_action ); + sensitive << clk.pos(); + } +}; + +SC_MODULE( sink ) +{ + sc_in_clk clk; + sc_in in; + + sc_event e; + + void main_action() + { + int a; + while( true ) { + wait(); + cout << sc_delta_count() << " -- " << in.read() << endl; + a = in.read(); + if( ( a % 3 ) == 0 ) { + e.notify(); + } + } + } + + void other_action() + { + while( true ) { + wait( e ); + cout << sc_delta_count() << " AA " << in.read() << endl; + wait( e | e ); // same as wait( e ) + cout << sc_delta_count() << " BB " << in.read() << endl; + wait( e & e ); // same as wait( e ) + cout << sc_delta_count() << " CC " << in.read() << endl; + wait( e | e | e ); // same as wait( e ) + cout << sc_delta_count() << " DD " << in.read() << endl; + wait( e & e & e ); // same as wait( e ) + cout << sc_delta_count() << " EE " << in.read() << endl; + wait( e & clk->negedge_event() ); + cout << sc_delta_count() << " FF " << in.read() << endl; + wait( e | clk->negedge_event() ); + cout << sc_delta_count() << " GG " << in.read() << endl; + } + } + + SC_CTOR( sink ) + { + SC_THREAD( main_action ); + sensitive << clk.pos(); + SC_THREAD( other_action ); + } +}; + +int sc_main( int, char** ) +{ + sc_clock clk; + + sc_signal sig; + source src( "src" ); + sink snk( "snk" ); + + src.clk( clk ); + src.out( sig ); + snk.clk( clk ); + snk.in( sig ); + + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/sc_event/test03/golden/test03.log new file mode 100644 index 000000000..6c3f9583b --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E521) immediate notification is not allowed during update phase or elaboration +In file: diff --git a/src/systemc/tests/systemc/kernel/sc_event/test03/test03.cpp b/src/systemc/tests/systemc/kernel/sc_event/test03/test03.cpp new file mode 100644 index 000000000..6a9c655de --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test03/test03.cpp @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of immediate notification check in the update phase + +#include "systemc.h" + +class my_signal +: public sc_signal +{ +public: + + my_signal() + : sc_signal() + {} + +protected: + + virtual void update() + { + if( m_new_val != m_cur_val ) { + m_cur_val = m_new_val; + ((sc_event&)value_changed_event()).notify(); // immediate notification!? + } + } +}; + +int +sc_main( int, char*[] ) +{ + my_signal sig; + + sig.write( 1 ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test04/golden/test04.log b/src/systemc/tests/systemc/kernel/sc_event/test04/golden/test04.log new file mode 100644 index 000000000..645451b18 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test04/golden/test04.log @@ -0,0 +1,43 @@ +SystemC Simulation +*** cancel() +1:0 s sender - immediate +1:0 s receiver +2:0 s sender - immediate +2:0 s sender - canceled +2:0 s receiver +3:0 s sender - delta +4:0 s receiver +5:0 s sender - delta +5:0 s sender - canceled +7:0 s sender - timed 1 ns +8:1 ns receiver +9:1 ns sender - timed 1 ns +9:1 ns sender - canceled +11:2 ns sender - timed 2 ns +12:3 ns sender - canceled +*** notify() +14:4 ns sender - delta +14:4 ns sender - immediate +14:4 ns receiver +16:4 ns sender - timed 1 ns +16:4 ns sender - immediate +16:4 ns receiver +18:5 ns sender - timed 2 ns +19:6 ns sender - immediate +19:6 ns receiver +*** notify(t) +21:7 ns sender - delta +21:7 ns sender - timed 1 ns +22:7 ns receiver +24:8 ns sender - timed 1 ns +24:8 ns sender - delta +25:8 ns receiver +27:9 ns sender - timed 2 ns +27:9 ns sender - timed 1 ns +28:10 ns receiver +30:11 ns sender - timed 1 ns +30:11 ns sender - timed 2 ns +31:12 ns receiver +33:13 ns sender - stop + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_event/test04/test04.cpp b/src/systemc/tests/systemc/kernel/sc_event/test04/test04.cpp new file mode 100644 index 000000000..2fbf6cc24 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test04/test04.cpp @@ -0,0 +1,199 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_event's methods; with dynamic thread receiver + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e; + + void write( const char* msg ) + { + cout << sc_delta_count() << ":" << sc_time_stamp() + << " " << msg << "\n"; + } + + void sender() + { + // wait one delta cycle + wait( SC_ZERO_TIME ); + + while( true ) { + + // test cancel() + cout << "*** cancel()\n"; + + // immediate notification + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + + // immediate notification -- canceled (no effect) + e.notify(); + write( "sender - immediate" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + + // delta notification + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // delta notification -- canceled + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- canceled + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notifiation -- canceled + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify() -- the exception test is in test03.cpp + cout << "*** notify()\n"; + + // delta notification -- made immediate + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify(t) + cout << "*** notify(t)\n"; + + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + sc_stop(); + write( "sender - stop" ); + wait( SC_ZERO_TIME ); + } + } + + void receiver() + { + while( true ) { + wait( e ); + write( "receiver" ); + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( sender ); + SC_THREAD( receiver ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test05/golden/test05.log b/src/systemc/tests/systemc/kernel/sc_event/test05/golden/test05.log new file mode 100644 index 000000000..645451b18 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test05/golden/test05.log @@ -0,0 +1,43 @@ +SystemC Simulation +*** cancel() +1:0 s sender - immediate +1:0 s receiver +2:0 s sender - immediate +2:0 s sender - canceled +2:0 s receiver +3:0 s sender - delta +4:0 s receiver +5:0 s sender - delta +5:0 s sender - canceled +7:0 s sender - timed 1 ns +8:1 ns receiver +9:1 ns sender - timed 1 ns +9:1 ns sender - canceled +11:2 ns sender - timed 2 ns +12:3 ns sender - canceled +*** notify() +14:4 ns sender - delta +14:4 ns sender - immediate +14:4 ns receiver +16:4 ns sender - timed 1 ns +16:4 ns sender - immediate +16:4 ns receiver +18:5 ns sender - timed 2 ns +19:6 ns sender - immediate +19:6 ns receiver +*** notify(t) +21:7 ns sender - delta +21:7 ns sender - timed 1 ns +22:7 ns receiver +24:8 ns sender - timed 1 ns +24:8 ns sender - delta +25:8 ns receiver +27:9 ns sender - timed 2 ns +27:9 ns sender - timed 1 ns +28:10 ns receiver +30:11 ns sender - timed 1 ns +30:11 ns sender - timed 2 ns +31:12 ns receiver +33:13 ns sender - stop + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_event/test05/test05.cpp b/src/systemc/tests/systemc/kernel/sc_event/test05/test05.cpp new file mode 100644 index 000000000..3d3e8c8ed --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test05/test05.cpp @@ -0,0 +1,204 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_event's methods; with dynamic method receiver + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e; + + void write( const char* msg ) + { + cout << sc_delta_count() << ":" << sc_time_stamp() + << " " << msg << "\n"; + } + + void sender() + { + // wait one delta cycle + wait( SC_ZERO_TIME ); + + while( true ) { + + // test cancel() + cout << "*** cancel()\n"; + + // immediate notification + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + + // immediate notification -- canceled (no effect) + e.notify(); + write( "sender - immediate" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + + // delta notification + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // delta notification -- canceled + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- canceled + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notifiation -- canceled + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify() -- the exception test is in test03.cpp + cout << "*** notify()\n"; + + // delta notification -- made immediate + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify(t) + cout << "*** notify(t)\n"; + + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + sc_stop(); + write( "sender - stop" ); + wait( SC_ZERO_TIME ); + } + } + + bool receiver_first; + + void receiver() + { + next_trigger( e ); + if( receiver_first ) { + receiver_first = false; + return; + } + write( "receiver" ); + } + + SC_CTOR( mod_a ) + { + SC_THREAD( sender ); + SC_METHOD( receiver ); + receiver_first = true; + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test06/golden/test06.log b/src/systemc/tests/systemc/kernel/sc_event/test06/golden/test06.log new file mode 100644 index 000000000..645451b18 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test06/golden/test06.log @@ -0,0 +1,43 @@ +SystemC Simulation +*** cancel() +1:0 s sender - immediate +1:0 s receiver +2:0 s sender - immediate +2:0 s sender - canceled +2:0 s receiver +3:0 s sender - delta +4:0 s receiver +5:0 s sender - delta +5:0 s sender - canceled +7:0 s sender - timed 1 ns +8:1 ns receiver +9:1 ns sender - timed 1 ns +9:1 ns sender - canceled +11:2 ns sender - timed 2 ns +12:3 ns sender - canceled +*** notify() +14:4 ns sender - delta +14:4 ns sender - immediate +14:4 ns receiver +16:4 ns sender - timed 1 ns +16:4 ns sender - immediate +16:4 ns receiver +18:5 ns sender - timed 2 ns +19:6 ns sender - immediate +19:6 ns receiver +*** notify(t) +21:7 ns sender - delta +21:7 ns sender - timed 1 ns +22:7 ns receiver +24:8 ns sender - timed 1 ns +24:8 ns sender - delta +25:8 ns receiver +27:9 ns sender - timed 2 ns +27:9 ns sender - timed 1 ns +28:10 ns receiver +30:11 ns sender - timed 1 ns +30:11 ns sender - timed 2 ns +31:12 ns receiver +33:13 ns sender - stop + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_event/test06/test06.cpp b/src/systemc/tests/systemc/kernel/sc_event/test06/test06.cpp new file mode 100644 index 000000000..5bc975557 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test06/test06.cpp @@ -0,0 +1,200 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_event's methods; with static thread receiver + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e; + + void write( const char* msg ) + { + cout << sc_delta_count() << ":" << sc_time_stamp() + << " " << msg << "\n"; + } + + void sender() + { + // wait one delta cycle + wait( SC_ZERO_TIME ); + + while( true ) { + + // test cancel() + cout << "*** cancel()\n"; + + // immediate notification + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + + // immediate notification -- canceled (no effect) + e.notify(); + write( "sender - immediate" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + + // delta notification + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // delta notification -- canceled + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- canceled + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notifiation -- canceled + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify() -- the exception test is in test03.cpp + cout << "*** notify()\n"; + + // delta notification -- made immediate + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify(t) + cout << "*** notify(t)\n"; + + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + sc_stop(); + write( "sender - stop" ); + wait( SC_ZERO_TIME ); + } + } + + void receiver() + { + while( true ) { + wait(); + write( "receiver" ); + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( sender ); + SC_THREAD( receiver ); + sensitive << e; + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test07/golden/test07.log b/src/systemc/tests/systemc/kernel/sc_event/test07/golden/test07.log new file mode 100644 index 000000000..645451b18 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test07/golden/test07.log @@ -0,0 +1,43 @@ +SystemC Simulation +*** cancel() +1:0 s sender - immediate +1:0 s receiver +2:0 s sender - immediate +2:0 s sender - canceled +2:0 s receiver +3:0 s sender - delta +4:0 s receiver +5:0 s sender - delta +5:0 s sender - canceled +7:0 s sender - timed 1 ns +8:1 ns receiver +9:1 ns sender - timed 1 ns +9:1 ns sender - canceled +11:2 ns sender - timed 2 ns +12:3 ns sender - canceled +*** notify() +14:4 ns sender - delta +14:4 ns sender - immediate +14:4 ns receiver +16:4 ns sender - timed 1 ns +16:4 ns sender - immediate +16:4 ns receiver +18:5 ns sender - timed 2 ns +19:6 ns sender - immediate +19:6 ns receiver +*** notify(t) +21:7 ns sender - delta +21:7 ns sender - timed 1 ns +22:7 ns receiver +24:8 ns sender - timed 1 ns +24:8 ns sender - delta +25:8 ns receiver +27:9 ns sender - timed 2 ns +27:9 ns sender - timed 1 ns +28:10 ns receiver +30:11 ns sender - timed 1 ns +30:11 ns sender - timed 2 ns +31:12 ns receiver +33:13 ns sender - stop + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_event/test07/test07.cpp b/src/systemc/tests/systemc/kernel/sc_event/test07/test07.cpp new file mode 100644 index 000000000..5827a3340 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test07/test07.cpp @@ -0,0 +1,204 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_event's methods; with static method receiver + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e; + + void write( const char* msg ) + { + cout << sc_delta_count() << ":" << sc_time_stamp() + << " " << msg << "\n"; + } + + void sender() + { + // wait one delta cycle + wait( SC_ZERO_TIME ); + + while( true ) { + + // test cancel() + cout << "*** cancel()\n"; + + // immediate notification + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + + // immediate notification -- canceled (no effect) + e.notify(); + write( "sender - immediate" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + + // delta notification + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // delta notification -- canceled + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- canceled + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notifiation -- canceled + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify() -- the exception test is in test03.cpp + cout << "*** notify()\n"; + + // delta notification -- made immediate + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify(t) + cout << "*** notify(t)\n"; + + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + sc_stop(); + write( "sender - stop" ); + wait( SC_ZERO_TIME ); + } + } + + bool receiver_first; + + void receiver() + { + if( receiver_first ) { + receiver_first = false; + return; + } + write( "receiver" ); + } + + SC_CTOR( mod_a ) + { + SC_THREAD( sender ); + SC_METHOD( receiver ); + sensitive << e; + receiver_first = true; + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test08/golden/test08.log b/src/systemc/tests/systemc/kernel/sc_event/test08/golden/test08.log new file mode 100644 index 000000000..0a7d55583 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test08/golden/test08.log @@ -0,0 +1,76 @@ +SystemC Simulation +*** cancel() +1:0 s sender - immediate +1:0 s receiver_static_method +1:0 s receiver_dynamic_method +1:0 s receiver_static_thread +1:0 s receiver_dynamic_thread +2:0 s sender - immediate +2:0 s sender - canceled +2:0 s receiver_static_method +2:0 s receiver_dynamic_method +2:0 s receiver_static_thread +2:0 s receiver_dynamic_thread +3:0 s sender - delta +4:0 s receiver_static_method +4:0 s receiver_dynamic_method +4:0 s receiver_static_thread +4:0 s receiver_dynamic_thread +5:0 s sender - delta +5:0 s sender - canceled +7:0 s sender - timed 1 ns +8:1 ns receiver_static_method +8:1 ns receiver_dynamic_method +8:1 ns receiver_static_thread +8:1 ns receiver_dynamic_thread +9:1 ns sender - timed 1 ns +9:1 ns sender - canceled +11:2 ns sender - timed 2 ns +12:3 ns sender - canceled +*** notify() +14:4 ns sender - delta +14:4 ns sender - immediate +14:4 ns receiver_static_method +14:4 ns receiver_dynamic_method +14:4 ns receiver_static_thread +14:4 ns receiver_dynamic_thread +16:4 ns sender - timed 1 ns +16:4 ns sender - immediate +16:4 ns receiver_static_method +16:4 ns receiver_dynamic_method +16:4 ns receiver_static_thread +16:4 ns receiver_dynamic_thread +18:5 ns sender - timed 2 ns +19:6 ns sender - immediate +19:6 ns receiver_static_method +19:6 ns receiver_dynamic_method +19:6 ns receiver_static_thread +19:6 ns receiver_dynamic_thread +*** notify(t) +21:7 ns sender - delta +21:7 ns sender - timed 1 ns +22:7 ns receiver_static_method +22:7 ns receiver_dynamic_method +22:7 ns receiver_static_thread +22:7 ns receiver_dynamic_thread +24:8 ns sender - timed 1 ns +24:8 ns sender - delta +25:8 ns receiver_static_method +25:8 ns receiver_dynamic_method +25:8 ns receiver_static_thread +25:8 ns receiver_dynamic_thread +27:9 ns sender - timed 2 ns +27:9 ns sender - timed 1 ns +28:10 ns receiver_static_method +28:10 ns receiver_dynamic_method +28:10 ns receiver_static_thread +28:10 ns receiver_dynamic_thread +30:11 ns sender - timed 1 ns +30:11 ns sender - timed 2 ns +31:12 ns receiver_static_method +31:12 ns receiver_dynamic_method +31:12 ns receiver_static_thread +31:12 ns receiver_dynamic_thread +33:13 ns sender - stop + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_event/test08/test08.cpp b/src/systemc/tests/systemc/kernel/sc_event/test08/test08.cpp new file mode 100644 index 000000000..a1843adfe --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test08/test08.cpp @@ -0,0 +1,240 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_event's methods; with four different receivers + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e; + + void write( const char* msg ) + { + cout << sc_delta_count() << ":" << sc_time_stamp() + << " " << msg << "\n"; + } + + void sender() + { + // wait one delta cycle + wait( SC_ZERO_TIME ); + + while( true ) { + + // test cancel() + cout << "*** cancel()\n"; + + // immediate notification + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + + // immediate notification -- canceled (no effect) + e.notify(); + write( "sender - immediate" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + + // delta notification + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // delta notification -- canceled + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- canceled + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notifiation -- canceled + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify() -- the exception test is in test03.cpp + cout << "*** notify()\n"; + + // delta notification -- made immediate + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify(t) + cout << "*** notify(t)\n"; + + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + sc_stop(); + write( "sender - stop" ); + wait( SC_ZERO_TIME ); + } + } + + bool receiver_static_method_first; + bool receiver_dynamic_method_first; + + void receiver_static_method() + { + if( receiver_static_method_first ) { + receiver_static_method_first = false; + return; + } + write( "receiver_static_method" ); + } + + void receiver_dynamic_method() + { + next_trigger( e ); + if( receiver_dynamic_method_first ) { + receiver_dynamic_method_first = false; + return; + } + write( "receiver_dynamic_method" ); + } + + void receiver_static_thread() + { + while( true ) { + wait(); + write( "receiver_static_thread" ); + } + } + + void receiver_dynamic_thread() + { + while( true ) { + wait( e ); + write( "receiver_dynamic_thread" ); + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( sender ); + + SC_METHOD( receiver_static_method ); + sensitive << e; + receiver_static_method_first = true; + + SC_METHOD( receiver_dynamic_method ); + receiver_dynamic_method_first = true; + + SC_THREAD( receiver_static_thread ); + sensitive << e; + + SC_THREAD( receiver_dynamic_thread ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test09/golden/test09.log b/src/systemc/tests/systemc/kernel/sc_event/test09/golden/test09.log new file mode 100644 index 000000000..645451b18 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test09/golden/test09.log @@ -0,0 +1,43 @@ +SystemC Simulation +*** cancel() +1:0 s sender - immediate +1:0 s receiver +2:0 s sender - immediate +2:0 s sender - canceled +2:0 s receiver +3:0 s sender - delta +4:0 s receiver +5:0 s sender - delta +5:0 s sender - canceled +7:0 s sender - timed 1 ns +8:1 ns receiver +9:1 ns sender - timed 1 ns +9:1 ns sender - canceled +11:2 ns sender - timed 2 ns +12:3 ns sender - canceled +*** notify() +14:4 ns sender - delta +14:4 ns sender - immediate +14:4 ns receiver +16:4 ns sender - timed 1 ns +16:4 ns sender - immediate +16:4 ns receiver +18:5 ns sender - timed 2 ns +19:6 ns sender - immediate +19:6 ns receiver +*** notify(t) +21:7 ns sender - delta +21:7 ns sender - timed 1 ns +22:7 ns receiver +24:8 ns sender - timed 1 ns +24:8 ns sender - delta +25:8 ns receiver +27:9 ns sender - timed 2 ns +27:9 ns sender - timed 1 ns +28:10 ns receiver +30:11 ns sender - timed 1 ns +30:11 ns sender - timed 2 ns +31:12 ns receiver +33:13 ns sender - stop + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_event/test09/test09.cpp b/src/systemc/tests/systemc/kernel/sc_event/test09/test09.cpp new file mode 100644 index 000000000..6d2307a97 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test09/test09.cpp @@ -0,0 +1,199 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test09.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_event's methods; with functional notation for notifying events. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e; + + void write( const char* msg ) + { + cout << sc_delta_count() << ":" << sc_time_stamp() + << " " << msg << "\n"; + } + + void sender() + { + // wait one delta cycle + wait( SC_ZERO_TIME ); + + while( true ) { + + // test cancel() + cout << "*** cancel()\n"; + + // immediate notification + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + + // immediate notification -- canceled (no effect) + e.notify(); + write( "sender - immediate" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + + // delta notification + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // delta notification -- canceled + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.cancel(); + write( "sender - canceled" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- canceled + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notifiation -- canceled + e.notify(2, SC_NS); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.cancel(); + write( "sender - canceled" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify() -- the exception test is in test03.cpp + cout << "*** notify()\n"; + + // delta notification -- made immediate + e.notify(SC_ZERO_TIME); + write( "sender - delta" ); + e.notify(); + write( "sender - immediate" ); + wait( SC_ZERO_TIME ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // timed notification -- made immediate + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 1, SC_NS ); + e.notify(); + write( "sender - immediate" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + // test notify(t) + cout << "*** notify(t)\n"; + + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( SC_ZERO_TIME ); + write( "sender - delta" ); + wait( 1, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + e.notify( 1, SC_NS ); + write( "sender - timed 1 ns" ); + e.notify( 2, SC_NS ); + write( "sender - timed 2 ns" ); + wait( 2, SC_NS ); + wait( SC_ZERO_TIME ); + + sc_stop(); + write( "sender - stop" ); + wait( SC_ZERO_TIME ); + } + } + + void receiver() + { + while( true ) { + wait( e ); + write( "receiver" ); + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( sender ); + SC_THREAD( receiver ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test10/golden/test10.log b/src/systemc/tests/systemc/kernel/sc_event/test10/golden/test10.log new file mode 100644 index 000000000..735ad78b8 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test10/golden/test10.log @@ -0,0 +1,60 @@ +SystemC Simulation +*** wait(e) + +Info: (I804) /IEEE_Std_1666/deprecated: timed_out() function is deprecated +1:0 s sender +1:0 s receiver - e1 +1:0 s sender +2:0 s receiver - e2 +2:0 s sender +3:2 ns receiver - e3 +*** wait(or_list) +3:2 ns sender +3:2 ns receiver - e1 | e1 | e1 +3:2 ns sender +4:2 ns receiver - e2 | e2 | e2 +4:2 ns sender +5:4 ns receiver - e3 | e3 | e3 +5:4 ns sender +5:4 ns receiver - e1 | e2 | e3 +5:4 ns sender +5:4 ns receiver - e3 | e2 | e1 +*** wait(and_list) +5:4 ns sender +5:4 ns receiver - e1 & e1 & e1 +5:4 ns sender +6:4 ns receiver - e2 & e2 & e2 +6:4 ns sender +7:6 ns receiver - e3 & e3 & e3 +7:6 ns sender +8:8 ns receiver - e1 & e2 & e3 +8:8 ns sender +9:10 ns receiver - e3 & e2 & e1 +*** wait(t) +10:10 ns receiver - 0 ns +11:11 ns sender - timed out +11:11 ns receiver - 1 ns +*** wait(t,e) +11:11 ns sender +11:11 ns receiver - 1 ns | e1 +11:11 ns sender +12:11 ns receiver - 1 ns | e2 +12:11 ns sender +13:12 ns receiver - 1 ns | e3 - timed out +*** wait(t,or_list) +13:12 ns sender +13:12 ns receiver - 1 ns | e1 | e2 | e3 +*** wait(t,and_list) +13:12 ns sender +14:13 ns receiver - 1 ns | e1 & e2 & e3 - timed out +14:13 ns receiver - stop + +Info: /OSCI/SystemC: Simulation stopped by user. + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_event/test10/test10.cpp b/src/systemc/tests/systemc/kernel/sc_event/test10/test10.cpp new file mode 100644 index 000000000..14828d75f --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test10/test10.cpp @@ -0,0 +1,190 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of wait() for dynamic sensitivity + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e1; + sc_event e2; + sc_event e3; + sc_event e_ack; + + void write( const char* msg ) + { + cout << sc_delta_count() << ":" << sc_time_stamp() + << " " << msg << "\n"; + } + + void sender() + { + // wait one delta cycle + wait( SC_ZERO_TIME ); + + while( true ) { + e1.notify(); + e2.notify( SC_ZERO_TIME ); + e3.notify( 2, SC_NS ); + timed_out() ? write( "sender - timed out" ) + : write( "sender" ); + wait( 3, SC_NS, e_ack ); + e2.cancel(); + e3.cancel(); + } + } + + void receiver() + { + sc_time t1( 1, SC_NS ); + + while( true ) { + + // test wait(e) + cout << "*** wait(e)\n"; + + wait( e1 ); + write( "receiver - e1" ); + e_ack.notify(); + wait( e2 ); + write( "receiver - e2" ); + e_ack.notify(); + wait( e3 ); + write( "receiver - e3" ); + e_ack.notify(); + + // test wait(or_list) + cout << "*** wait(or_list)\n"; + + wait( e1 | e1 | e1 ); + write( "receiver - e1 | e1 | e1" ); + e_ack.notify(); + wait( e2 | e2 | e2 ); + write( "receiver - e2 | e2 | e2" ); + e_ack.notify(); + wait( e3 | e3 | e3 ); + write( "receiver - e3 | e3 | e3" ); + e_ack.notify(); + wait( e1 | e2 | e3 ); + write( "receiver - e1 | e2 | e3" ); + e_ack.notify(); + wait( e3 | e2 | e1 ); + write( "receiver - e3 | e2 | e1" ); + e_ack.notify(); + + // test wait(and_list) + cout << "*** wait(and_list)\n"; + + wait( e1 & e1 & e1 ); + write( "receiver - e1 & e1 & e1" ); + e_ack.notify(); + wait( e2 & e2 & e2 ); + write( "receiver - e2 & e2 & e2" ); + e_ack.notify(); + wait( e3 & e3 & e3 ); + write( "receiver - e3 & e3 & e3" ); + e_ack.notify(); + wait( e1 & e2 & e3 ); + write( "receiver - e1 & e2 & e3" ); + e_ack.notify(); + wait( e3 & e2 & e1 ); + write( "receiver - e3 & e2 & e1" ); + + // test wait(t) + cout << "*** wait(t)\n"; + + wait( 0, SC_NS ); + write( "receiver - 0 ns" ); + wait( 1, SC_NS ); + write( "receiver - 1 ns" ); + + e_ack.notify(); + + // test wait(t,e) + cout << "*** wait(t,e)\n"; + + wait( 1, SC_NS, e1 ); + timed_out() ? write( "receiver - 1 ns | e1 - timed out" ) + : write( "receiver - 1 ns | e1" ); + e_ack.notify(); + wait( t1, e2 ); + timed_out() ? write( "receiver - 1 ns | e2 - timed out" ) + : write( "receiver - 1 ns | e2" ); + e_ack.notify(); + wait( 1, SC_NS, e3 ); + timed_out() ? write( "receiver - 1 ns | e3 - timed out" ) + : write( "receiver - 1 ns | e3" ); + e_ack.notify(); + + // test wait(t,or_list) + cout << "*** wait(t,or_list)\n"; + + wait( t1, e1 | e2 | e3 ); + timed_out() ? write( "receiver - 1 ns | e1 | e2 | e3 - timed out" ) + : write( "receiver - 1 ns | e1 | e2 | e3" ); + e_ack.notify(); + + // test wait(t,and_list) + cout << "*** wait(t,and_list)\n"; + + wait( t1, e1 & e2 & e3 ); + timed_out() ? write( "receiver - 1 ns | e1 & e2 & e3 - timed out" ) + : write( "receiver - 1 ns | e1 & e2 & e3" ); + + sc_stop(); + write( "receiver - stop" ); + wait( SC_ZERO_TIME ); + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( sender ); + SC_THREAD( receiver ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test11/golden/test11.log b/src/systemc/tests/systemc/kernel/sc_event/test11/golden/test11.log new file mode 100644 index 000000000..3d7d9352d --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test11/golden/test11.log @@ -0,0 +1,60 @@ +SystemC Simulation +*** next_trigger(e) + +Info: (I804) /IEEE_Std_1666/deprecated: timed_out() function is deprecated +1:0 s sender +1:0 s receiver - e1 +1:0 s sender +2:0 s receiver - e2 +2:0 s sender +3:2 ns receiver - e3 +*** next_trigger(or_list) +3:2 ns sender +3:2 ns receiver - e1 | e1 | e1 +3:2 ns sender +4:2 ns receiver - e2 | e2 | e2 +4:2 ns sender +5:4 ns receiver - e3 | e3 | e3 +5:4 ns sender +5:4 ns receiver - e1 | e2 | e3 +5:4 ns sender +5:4 ns receiver - e3 | e2 | e1 +*** next_trigger(and_list) +5:4 ns sender +5:4 ns receiver - e1 & e1 & e1 +5:4 ns sender +6:4 ns receiver - e2 & e2 & e2 +6:4 ns sender +7:6 ns receiver - e3 & e3 & e3 +7:6 ns sender +8:8 ns receiver - e1 & e2 & e3 +8:8 ns sender +9:10 ns receiver - e3 & e2 & e1 +*** next_trigger(t) +10:10 ns receiver - 0 ns +11:11 ns sender - timed out +11:11 ns receiver - 1 ns +*** next_trigger(t,e) +11:11 ns sender +11:11 ns receiver - 1 ns | e1 +11:11 ns sender +12:11 ns receiver - 1 ns | e2 +12:11 ns sender +13:12 ns receiver - 1 ns | e3 - timed out +*** next_trigger(t,or_list) +13:12 ns sender +13:12 ns receiver - 1 ns | e1 | e2 | e3 +*** next_trigger(t,and_list) +13:12 ns sender +14:13 ns receiver - 1 ns | e1 & e2 & e3 - timed out +14:13 ns receiver - stop + +Info: /OSCI/SystemC: Simulation stopped by user. + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_event/test11/test11.cpp b/src/systemc/tests/systemc/kernel/sc_event/test11/test11.cpp new file mode 100644 index 000000000..ec52c39db --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test11/test11.cpp @@ -0,0 +1,241 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test11.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of next_trigger() for dynamic sensitivity + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e1; + sc_event e2; + sc_event e3; + sc_event e_ack; + + void write( const char* msg ) + { + cout << sc_delta_count() << ":" << sc_time_stamp() + << " " << msg << "\n"; + } + + bool sender_first; + + void sender() + { + if( sender_first ) { + next_trigger( SC_ZERO_TIME ); + sender_first = false; + return; + } + + e2.cancel(); + e3.cancel(); + e1.notify(); + e2.notify( SC_ZERO_TIME ); + e3.notify( 2, SC_NS ); + timed_out() ? write( "sender - timed out" ) + : write( "sender" ); + next_trigger( 3, SC_NS, e_ack ); + } + + int receiver_state; + + void receiver() + { + sc_time t1( 1, SC_NS ); + + switch( receiver_state ) { + case 0: + // test next_trigger(e) + cout << "*** next_trigger(e)\n"; + + next_trigger( e1 ); + break; + case 1: + write( "receiver - e1" ); + e_ack.notify(); + next_trigger( e2 ); + break; + case 2: + write( "receiver - e2" ); + e_ack.notify(); + next_trigger( e3 ); + break; + case 3: + write( "receiver - e3" ); + e_ack.notify(); + + // test next_trigger(or_list) + cout << "*** next_trigger(or_list)\n"; + + next_trigger( e1 | e1 | e1 ); + break; + case 4: + write( "receiver - e1 | e1 | e1" ); + e_ack.notify(); + next_trigger( e2 | e2 | e2 ); + break; + case 5: + write( "receiver - e2 | e2 | e2" ); + e_ack.notify(); + next_trigger( e3 | e3 | e3 ); + break; + case 6: + write( "receiver - e3 | e3 | e3" ); + e_ack.notify(); + next_trigger( e1 | e2 | e3 ); + break; + case 7: + write( "receiver - e1 | e2 | e3" ); + e_ack.notify(); + next_trigger( e3 | e2 | e1 ); + break; + case 8: + write( "receiver - e3 | e2 | e1" ); + e_ack.notify(); + + // test next_trigger(and_list) + cout << "*** next_trigger(and_list)\n"; + + next_trigger( e1 & e1 & e1 ); + break; + case 9: + write( "receiver - e1 & e1 & e1" ); + e_ack.notify(); + next_trigger( e2 & e2 & e2 ); + break; + case 10: + write( "receiver - e2 & e2 & e2" ); + e_ack.notify(); + next_trigger( e3 & e3 & e3 ); + break; + case 11: + write( "receiver - e3 & e3 & e3" ); + e_ack.notify(); + next_trigger( e1 & e2 & e3 ); + break; + case 12: + write( "receiver - e1 & e2 & e3" ); + e_ack.notify(); + next_trigger( e3 & e2 & e1 ); + break; + case 13: + write( "receiver - e3 & e2 & e1" ); + + // test next_trigger(t) + cout << "*** next_trigger(t)\n"; + + next_trigger( 0, SC_NS ); + break; + case 14: + write( "receiver - 0 ns" ); + next_trigger( 1, SC_NS ); + break; + case 15: + write( "receiver - 1 ns" ); + + e_ack.notify(); + + // test next_trigger(t,e) + cout << "*** next_trigger(t,e)\n"; + + next_trigger( 1, SC_NS, e1 ); + break; + case 16: + timed_out() ? write( "receiver - 1 ns | e1 - timed out" ) + : write( "receiver - 1 ns | e1" ); + e_ack.notify(); + next_trigger( t1, e2 ); + break; + case 17: + timed_out() ? write( "receiver - 1 ns | e2 - timed out" ) + : write( "receiver - 1 ns | e2" ); + e_ack.notify(); + next_trigger( 1, SC_NS, e3 ); + break; + case 18: + timed_out() ? write( "receiver - 1 ns | e3 - timed out" ) + : write( "receiver - 1 ns | e3" ); + e_ack.notify(); + + // test next_trigger(t,or_list) + cout << "*** next_trigger(t,or_list)\n"; + + next_trigger( t1, e1 | e2 | e3 ); + break; + case 19: + timed_out() ? write( "receiver - 1 ns | e1 | e2 | e3 - timed out" ) + : write( "receiver - 1 ns | e1 | e2 | e3" ); + e_ack.notify(); + + // test next_trigger(t,and_list) + cout << "*** next_trigger(t,and_list)\n"; + + next_trigger( t1, e1 & e2 & e3 ); + break; + case 20: + timed_out() ? write( "receiver - 1 ns | e1 & e2 & e3 - timed out" ) + : write( "receiver - 1 ns | e1 & e2 & e3" ); + + sc_stop(); + write( "receiver - stop" ); + next_trigger( SC_ZERO_TIME ); + break; + default: + sc_assert( false ); + } + receiver_state ++; + } + + SC_CTOR( mod_a ) + { + SC_METHOD( sender ); + sender_first = true; + SC_METHOD( receiver ); + receiver_state = 0; + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test12/golden/test12.log b/src/systemc/tests/systemc/kernel/sc_event/test12/golden/test12.log new file mode 100644 index 000000000..3d7d9352d --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test12/golden/test12.log @@ -0,0 +1,60 @@ +SystemC Simulation +*** next_trigger(e) + +Info: (I804) /IEEE_Std_1666/deprecated: timed_out() function is deprecated +1:0 s sender +1:0 s receiver - e1 +1:0 s sender +2:0 s receiver - e2 +2:0 s sender +3:2 ns receiver - e3 +*** next_trigger(or_list) +3:2 ns sender +3:2 ns receiver - e1 | e1 | e1 +3:2 ns sender +4:2 ns receiver - e2 | e2 | e2 +4:2 ns sender +5:4 ns receiver - e3 | e3 | e3 +5:4 ns sender +5:4 ns receiver - e1 | e2 | e3 +5:4 ns sender +5:4 ns receiver - e3 | e2 | e1 +*** next_trigger(and_list) +5:4 ns sender +5:4 ns receiver - e1 & e1 & e1 +5:4 ns sender +6:4 ns receiver - e2 & e2 & e2 +6:4 ns sender +7:6 ns receiver - e3 & e3 & e3 +7:6 ns sender +8:8 ns receiver - e1 & e2 & e3 +8:8 ns sender +9:10 ns receiver - e3 & e2 & e1 +*** next_trigger(t) +10:10 ns receiver - 0 ns +11:11 ns sender - timed out +11:11 ns receiver - 1 ns +*** next_trigger(t,e) +11:11 ns sender +11:11 ns receiver - 1 ns | e1 +11:11 ns sender +12:11 ns receiver - 1 ns | e2 +12:11 ns sender +13:12 ns receiver - 1 ns | e3 - timed out +*** next_trigger(t,or_list) +13:12 ns sender +13:12 ns receiver - 1 ns | e1 | e2 | e3 +*** next_trigger(t,and_list) +13:12 ns sender +14:13 ns receiver - 1 ns | e1 & e2 & e3 - timed out +14:13 ns receiver - stop + +Info: /OSCI/SystemC: Simulation stopped by user. + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_event/test12/test12.cpp b/src/systemc/tests/systemc/kernel/sc_event/test12/test12.cpp new file mode 100644 index 000000000..0d9bdafb7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test12/test12.cpp @@ -0,0 +1,261 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test12.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of next_trigger() for dynamic sensitivity; last call counts + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e1; + sc_event e2; + sc_event e3; + sc_event e_ack; + + void write( const char* msg ) + { + cout << sc_delta_count() << ":" << sc_time_stamp() + << " " << msg << "\n"; + } + + bool sender_first; + + void sender() + { + next_trigger( SC_ZERO_TIME ); + if( sender_first ) { + sender_first = false; + return; + } + + e2.cancel(); + e3.cancel(); + e1.notify(); + e2.notify( SC_ZERO_TIME ); + e3.notify( 2, SC_NS ); + timed_out() ? write( "sender - timed out" ) + : write( "sender" ); + next_trigger( 3, SC_NS, e_ack ); + } + + int receiver_state; + + void receiver() + { + sc_time t1( 1, SC_NS ); + + switch( receiver_state ) { + case 0: + // test next_trigger(e) + cout << "*** next_trigger(e)\n"; + + next_trigger( e1 ); + break; + case 1: + write( "receiver - e1" ); + e_ack.notify(); + next_trigger( e1 ); + next_trigger( e2 ); + break; + case 2: + write( "receiver - e2" ); + e_ack.notify(); + next_trigger( e2 ); + next_trigger( e3 ); + break; + case 3: + write( "receiver - e3" ); + e_ack.notify(); + + // test next_trigger(or_list) + cout << "*** next_trigger(or_list)\n"; + + next_trigger( e3 ); + next_trigger( e1 | e1 | e1 ); + break; + case 4: + write( "receiver - e1 | e1 | e1" ); + e_ack.notify(); + next_trigger( e1 | e1 | e1 ); + next_trigger( e2 | e2 | e2 ); + break; + case 5: + write( "receiver - e2 | e2 | e2" ); + e_ack.notify(); + next_trigger( e2 | e2 | e2 ); + next_trigger( e3 | e3 | e3 ); + break; + case 6: + write( "receiver - e3 | e3 | e3" ); + e_ack.notify(); + next_trigger( e3 | e3 | e3 ); + next_trigger( e1 | e2 | e3 ); + break; + case 7: + write( "receiver - e1 | e2 | e3" ); + e_ack.notify(); + next_trigger( e1 | e2 | e3 ); + next_trigger( e3 | e2 | e1 ); + break; + case 8: + write( "receiver - e3 | e2 | e1" ); + e_ack.notify(); + + // test next_trigger(and_list) + cout << "*** next_trigger(and_list)\n"; + + next_trigger( e3 | e2 | e1 ); + next_trigger( e1 & e1 & e1 ); + break; + case 9: + write( "receiver - e1 & e1 & e1" ); + e_ack.notify(); + next_trigger( e1 & e1 & e1 ); + next_trigger( e2 & e2 & e2 ); + break; + case 10: + write( "receiver - e2 & e2 & e2" ); + e_ack.notify(); + next_trigger( e2 & e2 & e2 ); + next_trigger( e3 & e3 & e3 ); + break; + case 11: + write( "receiver - e3 & e3 & e3" ); + e_ack.notify(); + next_trigger( e3 & e3 & e3 ); + next_trigger( e1 & e2 & e3 ); + break; + case 12: + write( "receiver - e1 & e2 & e3" ); + e_ack.notify(); + next_trigger( e1 & e2 & e3 ); + next_trigger( e3 & e2 & e1 ); + break; + case 13: + write( "receiver - e3 & e2 & e1" ); + + // test next_trigger(t) + cout << "*** next_trigger(t)\n"; + + next_trigger( e3 & e2 & e1 ); + next_trigger( 0, SC_NS ); + break; + case 14: + write( "receiver - 0 ns" ); + next_trigger( 0, SC_NS ); + next_trigger( 1, SC_NS ); + break; + case 15: + write( "receiver - 1 ns" ); + + e_ack.notify(); + + // test next_trigger(t,e) + cout << "*** next_trigger(t,e)\n"; + + next_trigger( 1, SC_NS ); + next_trigger( 1, SC_NS, e1 ); + break; + case 16: + timed_out() ? write( "receiver - 1 ns | e1 - timed out" ) + : write( "receiver - 1 ns | e1" ); + e_ack.notify(); + next_trigger( 1, SC_NS, e1 ); + next_trigger( t1, e2 ); + break; + case 17: + timed_out() ? write( "receiver - 1 ns | e2 - timed out" ) + : write( "receiver - 1 ns | e2" ); + e_ack.notify(); + next_trigger( t1, e2 ); + next_trigger( 1, SC_NS, e3 ); + break; + case 18: + timed_out() ? write( "receiver - 1 ns | e3 - timed out" ) + : write( "receiver - 1 ns | e3" ); + e_ack.notify(); + + // test next_trigger(t,or_list) + cout << "*** next_trigger(t,or_list)\n"; + + next_trigger( 1, SC_NS, e3 ); + next_trigger( t1, e1 | e2 | e3 ); + break; + case 19: + timed_out() ? write( "receiver - 1 ns | e1 | e2 | e3 - timed out" ) + : write( "receiver - 1 ns | e1 | e2 | e3" ); + e_ack.notify(); + + // test next_trigger(t,and_list) + cout << "*** next_trigger(t,and_list)\n"; + + next_trigger( t1, e1 | e2 | e3 ); + next_trigger( t1, e1 & e2 & e3 ); + break; + case 20: + timed_out() ? write( "receiver - 1 ns | e1 & e2 & e3 - timed out" ) + : write( "receiver - 1 ns | e1 & e2 & e3" ); + + sc_stop(); + write( "receiver - stop" ); + next_trigger( t1, e1 & e2 & e3 ); + next_trigger( SC_ZERO_TIME ); + break; + default: + sc_assert( false ); + } + receiver_state ++; + } + + SC_CTOR( mod_a ) + { + SC_METHOD( sender ); + sender_first = true; + SC_METHOD( receiver ); + receiver_state = 0; + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test13/golden/test13.log b/src/systemc/tests/systemc/kernel/sc_event/test13/golden/test13.log new file mode 100644 index 000000000..d243d6ae2 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test13/golden/test13.log @@ -0,0 +1,13 @@ +SystemC Simulation +sender notifies e2 after 10 ns, receiver e1 at zero time +simulation time:0 s sender - e2 +simulation time:0 s receiver - e1 +simulation time:0 s sender - e2 +simulation time:10 ns receiver - e1 +simulation time:10 ns sender - e2 +simulation time:20 ns receiver - e1 +simulation time:20 ns sender - e2 +simulation time:30 ns receiver - e1 +simulation time:30 ns sender - e2 +simulation time:40 ns receiver - e1 +simulation time:40 ns sender - e2 diff --git a/src/systemc/tests/systemc/kernel/sc_event/test13/test13.cpp b/src/systemc/tests/systemc/kernel/sc_event/test13/test13.cpp new file mode 100644 index 000000000..144b46e94 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test13/test13.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test13.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of next_trigger() for static sensitivity + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e1; + sc_event e2; + + void write( const char* msg ) + { + cout <<"simulation time" << ":" << sc_time_stamp() + << " " << msg << endl; + + } + + void sender() + { + write( "sender - e2" ); + e2.notify(10, SC_NS ); + next_trigger(); + } + + + void receiver() + { + next_trigger(); + write( "receiver - e1" ); + e1.notify(SC_ZERO_TIME ); + } + + + SC_CTOR( mod_a ) + { + SC_METHOD( sender ); + sensitive << e1; + SC_METHOD( receiver ); + sensitive << e2; + } +}; + + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + cout<<"sender notifies e2 after 10 ns, receiver e1 at zero time" << endl; + sc_start(50,SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test14/golden/test14.log b/src/systemc/tests/systemc/kernel/sc_event/test14/golden/test14.log new file mode 100644 index 000000000..bdb5a2660 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test14/golden/test14.log @@ -0,0 +1,36 @@ +SystemC Simulation + +sender_1 notifies e1 after 10 ns, e2 after 20 ns +sender_2 notifies e3 after 10 ns, e4 after 15 ns +receiver_1 notifies e5 after 10 ns +receiver_2 notifies e6 after 10 ns + +simulation time:0 s sender_1 -e1 -e2 +simulation time:0 s sender_2 -e3 -e4 +simulation time:10 ns receiver_1 -e5 +simulation time:15 ns sender_1 -e1 -e2 +simulation time:15 ns receiver_2 -e6 +simulation time:20 ns receiver_2 -e6 +simulation time:20 ns sender_2 -e3 -e4 +simulation time:25 ns sender_1 -e1 -e2 +simulation time:30 ns receiver_1 -e5 +simulation time:35 ns receiver_2 -e6 +simulation time:35 ns sender_1 -e1 -e2 +simulation time:40 ns sender_2 -e3 -e4 +simulation time:45 ns sender_1 -e1 -e2 +simulation time:45 ns receiver_2 -e6 +simulation time:50 ns receiver_1 -e5 +simulation time:55 ns sender_1 -e1 -e2 +simulation time:55 ns receiver_2 -e6 +simulation time:60 ns sender_2 -e3 -e4 +simulation time:65 ns sender_1 -e1 -e2 +simulation time:65 ns receiver_2 -e6 +simulation time:70 ns receiver_1 -e5 +simulation time:75 ns sender_1 -e1 -e2 +simulation time:75 ns receiver_2 -e6 +simulation time:80 ns sender_2 -e3 -e4 +simulation time:85 ns sender_1 -e1 -e2 +simulation time:85 ns receiver_2 -e6 +simulation time:90 ns receiver_1 -e5 +simulation time:95 ns sender_1 -e1 -e2 +simulation time:95 ns receiver_2 -e6 diff --git a/src/systemc/tests/systemc/kernel/sc_event/test14/test14.cpp b/src/systemc/tests/systemc/kernel/sc_event/test14/test14.cpp new file mode 100644 index 000000000..544a8d046 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test14/test14.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test14.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of wait(..) for dynamic sensitivity + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_event e1; + sc_event e2; + sc_event e3; + sc_event e4; + sc_event e5; + sc_event e6; + + void write( const char* msg ) + { + cout <<"simulation time" << ":" << sc_time_stamp() + << " " << msg << endl; + + } + + void sender1() + { + while(true){ + write( "sender_1 -e1 -e2" ); + e1.notify(10, SC_NS); + e2.notify(20, SC_NS); + wait(15, SC_NS, e4 | e6); + } + } + + void sender2() + { + while(true){ + write( "sender_2 -e3 -e4" ); + e3.notify(10, SC_NS); + e4.notify(15, SC_NS); + wait(20, SC_NS, e2 & e5); + } + } + + void receiver1() + { + while(true){ + wait(e1 & e3); + write( "receiver_1 -e5" ); + e5.notify(10,SC_NS ); + } + } + + void receiver2() + { + while(true){ + wait(e2 | e4); + write( "receiver_2 -e6" ); + e6.notify(10,SC_NS ); + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD(sender1); + SC_THREAD(sender2); + SC_THREAD(receiver1); + SC_THREAD(receiver2); + } +}; + + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + cout< +#include + +#ifdef BENCHMARK + static const sc_dt::uint64 num_events = 128; + static const sc_dt::uint64 num_triggers = 4; + static const sc_dt::uint64 num_iterations = 10000000; +# define CHECK(expr) ((void)0) +#else + static const sc_dt::uint64 num_events = 16; + static const sc_dt::uint64 num_triggers = 4; + static const sc_dt::uint64 num_iterations = 4; +# define CHECK(expr) sc_assert(expr) +#endif + +#ifndef UINT64_C +#if defined(_WIN32) && !defined(__MINGW32__) +# define UINT64_C(v) v ## ui64 +#else +# define UINT64_C(v) v ## ULL +#endif +#endif // UINT64_C + +using namespace sc_core; + +SC_MODULE( module ) +{ + sc_vector events; + sc_event event_return; + + SC_CTOR( module ) + : events("ev", num_events) + , m_rng_state() + { + SC_THREAD(driver); + + SC_THREAD(consumer_dynamic); + SC_THREAD(consumer_static); // odd events only + for(unsigned i = 1; i> 48 ); + } + + sc_dt::uint64 m_rng_state; +}; + + +int +sc_main( int, char*[] ) +{ + module m("m"); + sc_start(); + sc_stop(); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_event/test15/golden/event_triggered.log b/src/systemc/tests/systemc/kernel/sc_event/test15/golden/event_triggered.log new file mode 100644 index 000000000..911cbc94f --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_event/test15/golden/event_triggered.log @@ -0,0 +1,48 @@ +SystemC Simulation + 1 ns (1): m.driver: ev_0.notify() + 1 ns (1): m.driver: ev_6.notify() + 1 ns (1): m.consumer_dynamic: ev_0 ev_6 + 1 ns (1): m.driver: ev_1.notify(0 s) + 1 ns (1): m.driver: ev_15.notify(0 s) + 1 ns (2): m.consumer_static: ev_1 ev_15 + 1 ns (2): m.driver: ev_8.notify(1 ns) + 1 ns (2): m.driver: ev_7.notify(1 ns) + 2 ns (3): m.consumer_dynamic: ev_7 ev_8 + 2 ns (3): m.consumer_static: ev_7 ev_8 + 4 ns (4): m.driver: ev_5.notify() + 4 ns (4): m.driver: ev_9.notify() + 4 ns (4): m.driver: ev_13.notify() + 4 ns (4): m.driver: ev_2.notify() + 4 ns (4): m.consumer_static: ev_2 ev_5 ev_9 ev_13 + 4 ns (4): m.consumer_dynamic: ev_2 ev_5 ev_9 ev_13 + 4 ns (4): m.driver: ev_9.notify(0 s) + 4 ns (4): m.driver: ev_5.notify(0 s) + 4 ns (4): m.driver: ev_12.notify(0 s) + 4 ns (4): m.driver: ev_8.notify(0 s) + 4 ns (5): m.consumer_dynamic: ev_5 ev_8 ev_9 ev_12 + 4 ns (5): m.consumer_static: ev_5 ev_8 ev_9 ev_12 + 4 ns (5): m.driver: ev_14.notify(1 ns) + 4 ns (5): m.driver: ev_2.notify(1 ns) + 4 ns (5): m.driver: ev_5.notify(1 ns) + 4 ns (5): m.driver: ev_0.notify(1 ns) + 5 ns (6): m.consumer_dynamic: ev_0 ev_2 ev_5 ev_14 + 5 ns (6): m.consumer_static: ev_0 ev_2 ev_5 ev_14 + 5 ns (6): m.driver: ev_11.notify(1 ns) + 5 ns (6): m.driver: ev_14.notify(1 ns) + 5 ns (6): m.driver: ev_12.notify(1 ns) + 5 ns (6): m.driver: ev_5.notify(1 ns) + 6 ns (7): m.consumer_static: ev_5 ev_11 ev_12 ev_14 + 6 ns (7): m.consumer_dynamic: ev_5 ev_11 ev_12 ev_14 + 6 ns (7): m.driver: ev_0.notify(1 ns) + 6 ns (7): m.driver: ev_4.notify(1 ns) + 6 ns (7): m.driver: ev_8.notify(1 ns) + 6 ns (7): m.driver: ev_12.notify(1 ns) + 7 ns (8): m.consumer_dynamic: ev_0 ev_4 ev_8 ev_12 + 7 ns (8): m.driver: ev_12.notify(1 ns) + 7 ns (8): m.driver: ev_6.notify(1 ns) + 7 ns (8): m.driver: ev_11.notify(1 ns) + 7 ns (8): m.driver: ev_13.notify(1 ns) + 8 ns (9): m.consumer_dynamic: ev_6 ev_11 ev_12 ev_13 + 8 ns (9): m.consumer_static: ev_6 ev_11 ev_12 ev_13 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_lambda/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_lambda/test01/golden/test01.log new file mode 100644 index 000000000..680d78ed8 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_lambda/test01/golden/test01.log @@ -0,0 +1,12 @@ +SystemC Simulation +i = 0 +i = 1 +i = 2 +i = 3 +i = 4 +i = 5 +i = 6 +i = 7 +i = 8 +i = 9 +i = 10 diff --git a/src/systemc/tests/systemc/kernel/sc_lambda/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_lambda/test01/test01.cpp new file mode 100644 index 000000000..99cfdc747 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_lambda/test01/test01.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-22 + Ucar Aziz, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Andy Goodrich, Forte Design Systems, 2005-11-10 + Description of Modification: Removal of Lambda exressions + + *****************************************************************************/ +// $Log: test01.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:04 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/24 21:04:54 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// + +// test of sc_lambda-style wait_until w/normal loop. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk1; + sc_in clk2; + + void main_action() + { + int i = 0; + + while( true ) { + do { wait(); } while ( !(clk2 == true) ); + cout << "i = " << i << endl; + i ++; + wait(); + } + } + + SC_CTOR( mod_a ) + { + SC_CTHREAD( main_action, clk1.pos() ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + sc_clock clk1( "clk1", 0.1, SC_NS ); + sc_clock clk2( "clk2", 0.5, SC_NS ); + a.clk1( clk1 ); + a.clk2( clk2 ); + + sc_start( 3, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_macros/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_macros/test01/golden/test01.log new file mode 100644 index 000000000..d2d9af1f2 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_macros/test01/golden/test01.log @@ -0,0 +1,59 @@ +SystemC Simulation + +*** fx + +1 +1 + +1 +1 + +1 +1 + +1 +1 + +1 +4294967295 + +1 +4294967295 + +1 +1 + +1 +1 + +1 +4294967295 + +1 +4294967295 + +*** int + +1 +1 + +1 +4294967295 + +1 +1 + +1 +4294967295 + +1 +1 + +1 +4294967295 + +1 +1 + +1 +4294967295 diff --git a/src/systemc/tests/systemc/kernel/sc_macros/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_macros/test01/test01.cpp new file mode 100644 index 000000000..7ce7aa58c --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_macros/test01/test01.cpp @@ -0,0 +1,239 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_abs for all SystemC arithmetic datatypes + +#define SC_INCLUDE_FX +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + cout << "\n*** fx" << endl; + + // sc_fxval + { + sc_fxval a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_fxval_fast + { + sc_fxval_fast a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_fix + { + sc_fix a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_fix_fast + { + sc_fix_fast a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_ufix + { + sc_ufix a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_ufix_fast + { + sc_ufix_fast a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_fixed + { + sc_fixed<32,32> a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_fixed_fast + { + sc_fixed_fast<32,32> a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_ufixed + { + sc_ufixed<32,32> a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_ufixed_fast + { + sc_ufixed_fast<32,32> a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + cout << "\n*** int" << endl; + + // sc_signed + { + sc_signed a( 32 ); + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_unsigned + { + sc_unsigned a( 32 ); + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_bigint + { + sc_bigint<32> a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_biguint + { + sc_biguint<32> a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_signed_subref + // sc_unsigned_subref + + // sc_int_base + { + sc_int_base a( 32 ); + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_uint_base + { + sc_uint_base a( 32 ); + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_int + { + sc_int<32> a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_uint + { + sc_uint<32> a; + cout << endl; + a = 1; + cout << sc_abs( a ) << endl; + a = -1; + cout << sc_abs( a ) << endl; + } + + // sc_int_subref + // sc_uint_subref + // sc_int_concref + // sc_uint_concref + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_main_main/golden/sc_main_main.log b/src/systemc/tests/systemc/kernel/sc_main_main/golden/sc_main_main.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_main_main/golden/sc_main_main.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_main_main/sc_main_main.cpp b/src/systemc/tests/systemc/kernel/sc_main_main/sc_main_main.cpp new file mode 100644 index 000000000..4937b27ff --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_main_main/sc_main_main.cpp @@ -0,0 +1,42 @@ +#include "systemc.h" + +int main() +{ + char *argv[] = { strdup("0"), strdup("1"), strdup("2"), strdup("3"), + strdup("4"), NULL }; + int argc = sizeof argv / sizeof argv[0] - 1; + sc_elab_and_sim( argc, argv ); + for (int i = 0; i < argc; ++i) { + free(argv[i]); + } +} + +int sc_main(int argc, char* argv[]) +{ + // Number of arguments should be the same + sc_assert(argc == sc_argc()); + + // Ensure all arguments are the same as sc_argv + for ( int argi = 0; argi < argc; argi++ ) { + if ( strcmp( argv[argi], sc_argv()[argi] ) != 0 ) { + cout << "sc_argv()[" << argi << "] mismatch: expected: '" + << argv[argi] << "' got: '" << sc_argv()[argi] << "'" << endl; + } + } + + // This check will most likely not do anything since we are likely to have + // zeros on the stack, but let's add it anyway. + sc_assert(argv[argc] == NULL); + sc_assert(sc_argv()[argc] == NULL); + + // Ensure that modifying argv does not alter sc_argv + argv[1][0] = '9'; + free(argv[2]); + argv[2] = strdup("new-2"); + sc_assert(strcmp(sc_argv()[2], "2") == 0); + sc_assert(strcmp(sc_argv()[1], "1") == 0); + + cerr << "Program completed" << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_module/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_module/test01/golden/test01.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test01/golden/test01.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/kernel/sc_module/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_module/test01/test01.cpp new file mode 100644 index 000000000..156ada47f --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test01/test01.cpp @@ -0,0 +1,179 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of positional binding + +#include "systemc.h" + +template +SC_MODULE( prim_source ) +{ + sc_out out; + sc_port > port_out; + + SC_CTOR( prim_source ) {} +}; + +template +SC_MODULE( prim_transfer ) +{ + sc_in in; + sc_port > port_in; + sc_out out; + sc_port > port_out; + + + SC_CTOR( prim_transfer ) {} +}; + +template +SC_MODULE( prim_sink ) +{ + sc_in in; + sc_port > port_in; + + SC_CTOR( prim_sink ) {} +}; + +template +SC_MODULE( hier_source ) +{ + sc_out out; + sc_port > port_out; + + prim_source prim_source1; + + SC_CTOR( hier_source ) + : prim_source1( "prim_source1" ) + { + prim_source1( out, port_out); + } +}; + +template +SC_MODULE( hier_transfer ) +{ + sc_in in; + sc_port > port_in; + sc_out out; + sc_port > port_out; + + prim_transfer prim_transfer1; + + SC_CTOR( hier_transfer ) + : prim_transfer1( "prim_transfer1" ) + { + prim_transfer1( in, port_in, out, port_out); + } +}; + +template +SC_MODULE( hier_sink ) +{ + sc_in in; + sc_port > port_in; + + prim_sink prim_sink1; + + SC_CTOR( hier_sink ) + : prim_sink1( "prim_sink1" ) + { + prim_sink1( in, port_in ); + } +}; + +template +SC_MODULE( hier1 ) +{ + sc_signal sig1; + sc_signal sig2; + sc_signal sig3; + sc_signal sig4; + + prim_source prim_source1; + prim_transfer prim_transfer1; + prim_sink prim_sink1; + + SC_CTOR( hier1 ) + : prim_source1( "prim_source1" ), + prim_transfer1( "prim_transfer1" ), + prim_sink1( "prim_sink1" ) + { + prim_source1( sig1, sig2); + prim_transfer1( sig1, sig2, sig3, sig4); + prim_sink1( sig3, sig4); + } +}; + +template +SC_MODULE( hier2 ) +{ + sc_signal sig1; + sc_signal sig2; + sc_signal sig3; + sc_signal sig4; + + hier_source hier_source1; + hier_transfer hier_transfer1; + hier_sink hier_sink1; + + SC_CTOR( hier2 ) + : hier_source1( "hier_source1" ), + hier_transfer1( "hier_transfer1" ), + hier_sink1( "hier_sink1" ) + { + hier_source1( sig1, sig2); + hier_transfer1( sig1, sig2, sig3, sig4); + hier_sink1( sig3, sig4); + } +}; + +int +sc_main( int, char*[] ) +{ + hier1 hier1_int( "hier1_int" ); + hier1 hier1_bool( "hier1_bool" ); + hier1 hier1_logic( "hier1_logic" ); + + hier2 hier2_int( "hier2_int" ); + hier2 hier2_bool( "hier2_bool" ); + hier2 hier2_logic( "hier2_logic" ); + + sc_start(0, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_module/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_module/test02/golden/test02.log new file mode 100644 index 000000000..642bb49f7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test02/golden/test02.log @@ -0,0 +1,11 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: positional binding using << or , is deprecated, use () instead. + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_module/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_module/test02/test02.cpp new file mode 100644 index 000000000..8ff9f9072 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test02/test02.cpp @@ -0,0 +1,179 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of positional binding -- general test of operator , + +#include "systemc.h" + +template +SC_MODULE( prim_source ) +{ + sc_out out; + sc_port > port_out; + + SC_CTOR( prim_source ) {} +}; + +template +SC_MODULE( prim_transfer ) +{ + sc_in in; + sc_port > port_in; + sc_out out; + sc_port > port_out; + + + SC_CTOR( prim_transfer ) {} +}; + +template +SC_MODULE( prim_sink ) +{ + sc_in in; + sc_port > port_in; + + SC_CTOR( prim_sink ) {} +}; + +template +SC_MODULE( hier_source ) +{ + sc_out out; + sc_port > port_out; + + prim_source prim_source1; + + SC_CTOR( hier_source ) + : prim_source1( "prim_source1" ) + { + prim_source1, out, port_out; + } +}; + +template +SC_MODULE( hier_transfer ) +{ + sc_in in; + sc_port > port_in; + sc_out out; + sc_port > port_out; + + prim_transfer prim_transfer1; + + SC_CTOR( hier_transfer ) + : prim_transfer1( "prim_transfer1" ) + { + prim_transfer1, in, port_in, out, port_out; + } +}; + +template +SC_MODULE( hier_sink ) +{ + sc_in in; + sc_port > port_in; + + prim_sink prim_sink1; + + SC_CTOR( hier_sink ) + : prim_sink1( "prim_sink1" ) + { + prim_sink1, in, port_in; + } +}; + +template +SC_MODULE( hier1 ) +{ + sc_signal sig1; + sc_signal sig2; + sc_signal sig3; + sc_signal sig4; + + prim_source prim_source1; + prim_transfer prim_transfer1; + prim_sink prim_sink1; + + SC_CTOR( hier1 ) + : prim_source1( "prim_source1" ), + prim_transfer1( "prim_transfer1" ), + prim_sink1( "prim_sink1" ) + { + prim_source1, sig1, sig2; + prim_transfer1, sig1, sig2, sig3, sig4; + prim_sink1, sig3, sig4; + } +}; + +template +SC_MODULE( hier2 ) +{ + sc_signal sig1; + sc_signal sig2; + sc_signal sig3; + sc_signal sig4; + + hier_source hier_source1; + hier_transfer hier_transfer1; + hier_sink hier_sink1; + + SC_CTOR( hier2 ) + : hier_source1( "hier_source1" ), + hier_transfer1( "hier_transfer1" ), + hier_sink1( "hier_sink1" ) + { + hier_source1, sig1, sig2; + hier_transfer1, sig1, sig2, sig3, sig4; + hier_sink1, sig3, sig4; + } +}; + +int +sc_main( int, char*[] ) +{ + hier1 hier1_int( "hier1_int" ); + hier1 hier1_bool( "hier1_bool" ); + hier1 hier1_logic( "hier1_logic" ); + + hier2 hier2_int( "hier2_int" ); + hier2 hier2_bool( "hier2_bool" ); + hier2 hier2_logic( "hier2_logic" ); + + sc_start(0, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_module/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/sc_module/test03/golden/test03.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test03/golden/test03.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/kernel/sc_module/test03/test03.cpp b/src/systemc/tests/systemc/kernel/sc_module/test03/test03.cpp new file mode 100644 index 000000000..e6c34483d --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test03/test03.cpp @@ -0,0 +1,179 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of positional binding -- general test of operator () + +#include "systemc.h" + +template +SC_MODULE( prim_source ) +{ + sc_out out; + sc_port > port_out; + + SC_CTOR( prim_source ) {} +}; + +template +SC_MODULE( prim_transfer ) +{ + sc_in in; + sc_port > port_in; + sc_out out; + sc_port > port_out; + + + SC_CTOR( prim_transfer ) {} +}; + +template +SC_MODULE( prim_sink ) +{ + sc_in in; + sc_port > port_in; + + SC_CTOR( prim_sink ) {} +}; + +template +SC_MODULE( hier_source ) +{ + sc_out out; + sc_port > port_out; + + prim_source prim_source1; + + SC_CTOR( hier_source ) + : prim_source1( "prim_source1" ) + { + prim_source1( out, port_out ); + } +}; + +template +SC_MODULE( hier_transfer ) +{ + sc_in in; + sc_port > port_in; + sc_out out; + sc_port > port_out; + + prim_transfer prim_transfer1; + + SC_CTOR( hier_transfer ) + : prim_transfer1( "prim_transfer1" ) + { + prim_transfer1( in, port_in, out, port_out ); + } +}; + +template +SC_MODULE( hier_sink ) +{ + sc_in in; + sc_port > port_in; + + prim_sink prim_sink1; + + SC_CTOR( hier_sink ) + : prim_sink1( "prim_sink1" ) + { + prim_sink1( in, port_in ); + } +}; + +template +SC_MODULE( hier1 ) +{ + sc_signal sig1; + sc_signal sig2; + sc_signal sig3; + sc_signal sig4; + + prim_source prim_source1; + prim_transfer prim_transfer1; + prim_sink prim_sink1; + + SC_CTOR( hier1 ) + : prim_source1( "prim_source1" ), + prim_transfer1( "prim_transfer1" ), + prim_sink1( "prim_sink1" ) + { + prim_source1( sig1, sig2 ); + prim_transfer1( sig1, sig2, sig3, sig4 ); + prim_sink1( sig3, sig4 ); + } +}; + +template +SC_MODULE( hier2 ) +{ + sc_signal sig1; + sc_signal sig2; + sc_signal sig3; + sc_signal sig4; + + hier_source hier_source1; + hier_transfer hier_transfer1; + hier_sink hier_sink1; + + SC_CTOR( hier2 ) + : hier_source1( "hier_source1" ), + hier_transfer1( "hier_transfer1" ), + hier_sink1( "hier_sink1" ) + { + hier_source1( sig1, sig2 ); + hier_transfer1( sig1, sig2, sig3, sig4 ); + hier_sink1( sig3, sig4 ); + } +}; + +int +sc_main( int, char*[] ) +{ + hier1 hier1_int( "hier1_int" ); + hier1 hier1_bool( "hier1_bool" ); + hier1 hier1_logic( "hier1_logic" ); + + hier2 hier2_int( "hier2_int" ); + hier2 hier2_bool( "hier2_bool" ); + hier2 hier2_logic( "hier2_logic" ); + + sc_start(0, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_module/test04/golden/test04.log b/src/systemc/tests/systemc/kernel/sc_module/test04/golden/test04.log new file mode 100644 index 000000000..17539c402 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test04/golden/test04.log @@ -0,0 +1,18 @@ +SystemC Simulation +signal_0 +signal_1 +a +b +c +a.port_0 +a.port_1 +b.port_0 +b.port_1 +c.a +c.b +c.signal_0 +c.signal_1 +c.a.port_0 +c.a.port_1 +c.b.port_0 +c.b.port_1 diff --git a/src/systemc/tests/systemc/kernel/sc_module/test04/test04.cpp b/src/systemc/tests/systemc/kernel/sc_module/test04/test04.cpp new file mode 100644 index 000000000..14b7970c7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test04/test04.cpp @@ -0,0 +1,105 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the unique name generation for objects + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in in; + sc_out out; + SC_CTOR( mod_a ) {} +}; + +SC_MODULE( mod_b ) +{ + sc_out out; + sc_in in; + SC_CTOR( mod_b ) {} +}; + +SC_MODULE( mod_c ) +{ + mod_a a; + mod_b b; + sc_signal sig1; + sc_signal sig2; + SC_CTOR( mod_c ) : a("a"), b("b") + { + a.in( sig1 ); + a.out( sig2 ); + b.out( sig1 ); + b.in( sig2 ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal sig1; + sc_signal sig2; + mod_a a("a"); + mod_b b("b"); + mod_c c("c"); + a.in( sig1 ); + a.out( sig2 ); + b.out( sig1 ); + b.in( sig2 ); + + sc_start(0, SC_NS); + + cout << sig1.name() << endl; + cout << sig2.name() << endl; + cout << a.name() << endl; + cout << b.name() << endl; + cout << c.name() << endl; + cout << a.in.name() << endl; + cout << a.out.name() << endl; + cout << b.out.name() << endl; + cout << b.in.name() << endl; + cout << c.a.name() << endl; + cout << c.b.name() << endl; + cout << c.sig1.name() << endl; + cout << c.sig2.name() << endl; + cout << c.a.in.name() << endl; + cout << c.a.out.name() << endl; + cout << c.b.out.name() << endl; + cout << c.b.in.name() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_module/test05/golden/test05.log b/src/systemc/tests/systemc/kernel/sc_module/test05/golden/test05.log new file mode 100644 index 000000000..d923779ad --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test05/golden/test05.log @@ -0,0 +1,34 @@ +SystemC Simulation +1 +1 +2 +2 +500 ps +*** +sc_module a +sc_module b +sc_clock clock_0 +sc_signal signal_0 +sc_module c +sc_method_process clock_0_posedge_action_0 +sc_method_process clock_0_negedge_action_0 +*** +sc_in a.port_0 +sc_out a.port_1 +sc_method_process a.main_action +*** +sc_in b.port_0 +sc_thread_process b.main_action +*** +sc_in c.port_0 +sc_module c.a +sc_module c.b +sc_signal c.signal_0 +sc_cthread_process c.main_action +*** +sc_in c.a.port_0 +sc_out c.a.port_1 +sc_method_process c.a.main_action +*** +sc_in c.b.port_0 +sc_thread_process c.b.main_action diff --git a/src/systemc/tests/systemc/kernel/sc_module/test05/test05.cpp b/src/systemc/tests/systemc/kernel/sc_module/test05/test05.cpp new file mode 100644 index 000000000..8bdad10ea --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test05/test05.cpp @@ -0,0 +1,143 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the child objects of a module and the simcontext + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + sc_out out; + + int a; + + void main_action() + { + out = ++ a; + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action ); + sensitive << clk.pos(); + a = 0; + } +}; + +SC_MODULE( mod_b ) +{ + sc_in in; + + void main_action() + { + while( true ) { + wait(); + cout << in.read() << endl; + } + } + + SC_CTOR( mod_b ) + { + SC_THREAD( main_action ); + sensitive << in; + } +}; + +SC_MODULE( mod_c ) +{ + sc_in_clk clk; + + void main_action() + { + while( true ) { + cout << sc_time_stamp() << endl; + wait(); + } + } + + mod_a a; + mod_b b; + sc_signal sig; + + SC_CTOR( mod_c ) + : a( "a" ), b( "b" ) + { + SC_CTHREAD( main_action, clk.neg() ); + a.clk( clk ); + a.out( sig ); + b.in( sig ); + } +}; + +void +print_child_objects( const ::std::vector& child_objects_ ) +{ + int size = child_objects_.size(); + cout << "***\n"; + for( int i = 0; i < size; ++ i ) { + sc_object* object = child_objects_[i]; + cout << object->kind() << " " << object->name() << endl; + } +} + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + mod_b b( "b" ); + sc_clock clk; + sc_signal sig; + + a.clk( clk ); + a.out( sig ); + b.in( sig ); + + mod_c c( "c" ); + c.clk( clk ); + + sc_start(1, SC_NS); + + print_child_objects( sc_get_top_level_objects() ); + print_child_objects( a.get_child_objects() ); + print_child_objects( b.get_child_objects() ); + print_child_objects( c.get_child_objects() ); + print_child_objects( c.a.get_child_objects() ); + print_child_objects( c.b.get_child_objects() ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_module/test06/golden/test06.log b/src/systemc/tests/systemc/kernel/sc_module/test06/golden/test06.log new file mode 100644 index 000000000..015bf7741 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test06/golden/test06.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Warning: (W569) sc_module(const char*), sc_module(const std::string&) have been deprecated, use sc_module(const sc_module_name&): module_a +In file: +module_a diff --git a/src/systemc/tests/systemc/kernel/sc_module/test06/test06.cpp b/src/systemc/tests/systemc/kernel/sc_module/test06/test06.cpp new file mode 100644 index 000000000..9abf0ea0b --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test06/test06.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of the sc_module::sc_module(const std::string&) + +#include "systemc.h" + + +SC_MODULE( mod_a ) +{ + + mod_a(const std::string &m) : sc_module(m) + { end_module(); } + +}; + + +int +sc_main( int, char*[] ) +{ + const std::string nm = "module_a"; + mod_a a(nm ); + cout< + +Warning: (W509) module construction not properly completed: did you forget to add a sc_module_name parameter to your module constructor?: module 'm' +In file: diff --git a/src/systemc/tests/systemc/kernel/sc_module/test07/test07.cpp b/src/systemc/tests/systemc/kernel/sc_module/test07/test07.cpp new file mode 100644 index 000000000..f6ed8aa54 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test07/test07.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of missing sc_module_name ctor parameter warning + +#include "systemc.h" + +SC_MODULE( my_mod ) +{ + my_mod( const char* nm ) : sc_module( nm ) {} +}; + +int +sc_main( int, char*[] ) +{ + my_mod m( "m" ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_module/test08/golden/test08.log b/src/systemc/tests/systemc/kernel/sc_module/test08/golden/test08.log new file mode 100644 index 000000000..be94b9e0f --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test08/golden/test08.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E533) module name stack is empty: did you forget to add a sc_module_name parameter to your module constructor? +In file: diff --git a/src/systemc/tests/systemc/kernel/sc_module/test08/test08.cpp b/src/systemc/tests/systemc/kernel/sc_module/test08/test08.cpp new file mode 100644 index 000000000..cea5c11d7 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test08/test08.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of missing sc_module_name ctor parameter error + +#include "systemc.h" + +SC_MODULE( my_mod ) +{ + my_mod() {} +}; + +int +sc_main( int, char*[] ) +{ + my_mod m; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_module/test09/golden/test09.log b/src/systemc/tests/systemc/kernel/sc_module/test09/golden/test09.log new file mode 100644 index 000000000..f428ebc24 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test09/golden/test09.log @@ -0,0 +1,124 @@ +SystemC Simulation +0 s: ModuleBase +0 s: NonModuleDerived +0 s: ModuleDerived +0 s: NonModuleDerived +0 s: ModuleBase +0 s: ModuleDerived +500 ps: NonModuleDerived +500 ps: ModuleBase +500 ps: ModuleDerived +1 ns: NonModuleDerived +1 ns: ModuleBase +1 ns: ModuleDerived +1500 ps: NonModuleDerived +1500 ps: ModuleBase +1500 ps: ModuleDerived +2 ns: NonModuleDerived +2 ns: ModuleBase +2 ns: ModuleDerived +2500 ps: NonModuleDerived +2500 ps: ModuleBase +2500 ps: ModuleDerived +3 ns: NonModuleDerived +3 ns: ModuleBase +3 ns: ModuleDerived +3500 ps: NonModuleDerived +3500 ps: ModuleBase +3500 ps: ModuleDerived +4 ns: NonModuleDerived +4 ns: ModuleBase +4 ns: ModuleDerived +4500 ps: NonModuleDerived +4500 ps: ModuleBase +4500 ps: ModuleDerived +5 ns: NonModuleDerived +5 ns: ModuleBase +5 ns: ModuleDerived +5500 ps: NonModuleDerived +5500 ps: ModuleBase +5500 ps: ModuleDerived +6 ns: NonModuleDerived +6 ns: ModuleBase +6 ns: ModuleDerived +6500 ps: NonModuleDerived +6500 ps: ModuleBase +6500 ps: ModuleDerived +7 ns: NonModuleDerived +7 ns: ModuleBase +7 ns: ModuleDerived +7500 ps: NonModuleDerived +7500 ps: ModuleBase +7500 ps: ModuleDerived +8 ns: NonModuleDerived +8 ns: ModuleBase +8 ns: ModuleDerived +8500 ps: NonModuleDerived +8500 ps: ModuleBase +8500 ps: ModuleDerived +9 ns: NonModuleDerived +9 ns: ModuleBase +9 ns: ModuleDerived +9500 ps: NonModuleDerived +9500 ps: ModuleBase +9500 ps: ModuleDerived +10 ns: NonModuleDerived +10 ns: ModuleBase +10 ns: ModuleDerived +10500 ps: NonModuleDerived +10500 ps: ModuleBase +10500 ps: ModuleDerived +11 ns: NonModuleDerived +11 ns: ModuleBase +11 ns: ModuleDerived +11500 ps: NonModuleDerived +11500 ps: ModuleBase +11500 ps: ModuleDerived +12 ns: NonModuleDerived +12 ns: ModuleBase +12 ns: ModuleDerived +12500 ps: NonModuleDerived +12500 ps: ModuleBase +12500 ps: ModuleDerived +13 ns: NonModuleDerived +13 ns: ModuleBase +13 ns: ModuleDerived +13500 ps: NonModuleDerived +13500 ps: ModuleBase +13500 ps: ModuleDerived +14 ns: NonModuleDerived +14 ns: ModuleBase +14 ns: ModuleDerived +14500 ps: NonModuleDerived +14500 ps: ModuleBase +14500 ps: ModuleDerived +15 ns: NonModuleDerived +15 ns: ModuleBase +15 ns: ModuleDerived +15500 ps: NonModuleDerived +15500 ps: ModuleBase +15500 ps: ModuleDerived +16 ns: NonModuleDerived +16 ns: ModuleBase +16 ns: ModuleDerived +16500 ps: NonModuleDerived +16500 ps: ModuleBase +16500 ps: ModuleDerived +17 ns: NonModuleDerived +17 ns: ModuleBase +17 ns: ModuleDerived +17500 ps: NonModuleDerived +17500 ps: ModuleBase +17500 ps: ModuleDerived +18 ns: NonModuleDerived +18 ns: ModuleBase +18 ns: ModuleDerived +18500 ps: NonModuleDerived +18500 ps: ModuleBase +18500 ps: ModuleDerived +19 ns: NonModuleDerived +19 ns: ModuleBase +19 ns: ModuleDerived +19500 ps: NonModuleDerived +19500 ps: ModuleBase +19500 ps: ModuleDerived diff --git a/src/systemc/tests/systemc/kernel/sc_module/test09/test09.cpp b/src/systemc/tests/systemc/kernel/sc_module/test09/test09.cpp new file mode 100644 index 000000000..a0f1b1b74 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test09/test09.cpp @@ -0,0 +1,106 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test09.cpp -- Test derivation from and to sc_module instances. + + Original Author: Andy Goodrich, Forte Design Systemc, Inc. 2003-10-01 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +// sc_module ---> non-sc_module + +SC_MODULE(ModuleBase) +{ + public: + SC_CTOR(ModuleBase) + { + } + void base_method() + { + cout << sc_time_stamp() << ": ModuleBase" << endl; + } + sc_in_clk m_clk; +}; + +class NonModuleDerived : public ModuleBase +{ + public: + SC_HAS_PROCESS(NonModuleDerived); + NonModuleDerived(sc_module_name name_) : ModuleBase(name_) + { + SC_METHOD(base_method) + sensitive << m_clk; + SC_METHOD(derived_method) + sensitive << m_clk; + } + void derived_method() + { + cout << sc_time_stamp() << ": NonModuleDerived" << endl; + } +}; + +// non-sc_module ---> sc_module + +class NonModuleBase +{ + public: + sc_in_clk m_clk; +}; + +SC_MODULE(ModuleDerived), public NonModuleBase +{ + SC_CTOR(ModuleDerived) : NonModuleBase() + { + SC_METHOD(derived_method) + sensitive << m_clk; + } + void derived_method() + { + cout << sc_time_stamp() << ": ModuleDerived" << endl; + } +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + NonModuleDerived non_derived("nonderived"); + ModuleDerived derived("derived"); + non_derived.m_clk(clock); + derived.m_clk(clock); + + sc_start(20, SC_NS); + return 0; +} + + + diff --git a/src/systemc/tests/systemc/kernel/sc_module/test10/golden/test10.log b/src/systemc/tests/systemc/kernel/sc_module/test10/golden/test10.log new file mode 100644 index 000000000..9f139851e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test10/golden/test10.log @@ -0,0 +1,6 @@ +SystemC Simulation +0 s +0 s +500 ps +1 ns +1500 ps diff --git a/src/systemc/tests/systemc/kernel/sc_module/test10/test10.cpp b/src/systemc/tests/systemc/kernel/sc_module/test10/test10.cpp new file mode 100644 index 000000000..87716b7fb --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module/test10/test10.cpp @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- Test sc_module::set_stack_size + + Original Author: Andy Goodrich, Forte Design Systemc, Inc. 2003-10-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE(A) +{ + SC_CTOR(A) + { + SC_THREAD(thread); + sensitive << m_clk; + set_stack_size(0x600000); + } + void thread() + { + int x[0x100000]; // Grab a lot of stack... + x[0x100000-1] = 42; // ... and then modify the last location` + + for (;;) + { + cout << sc_time_stamp() << endl; + wait(); + } + } + sc_in_clk m_clk; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + A a("a"); + a.m_clk(clock); + + sc_start(2, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_module_name/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_module_name/test01/golden/test01.log new file mode 100644 index 000000000..e0851dcd1 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module_name/test01/golden/test01.log @@ -0,0 +1,3 @@ +SystemC Simulation +m1 +m2 diff --git a/src/systemc/tests/systemc/kernel/sc_module_name/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_module_name/test01/test01.cpp new file mode 100644 index 000000000..48ea7cb63 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_module_name/test01/test01.cpp @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of module inheritance and sc_module_name + +#include "systemc.h" + +class base_mod +: public sc_module +{ +public: + base_mod( sc_module_name name_ ) + : sc_module( name_ ) + {} +}; + +class derived_mod +: public base_mod +{ +public: + derived_mod( sc_module_name name_ ) + : base_mod( name_ ) + {} +}; + +int +sc_main( int, char*[] ) +{ + base_mod m1( "m1" ); + derived_mod m2( "m2" ); + + sc_start(0, SC_NS); + + cout << m1.name() << endl; + cout << m2.name() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_name_gen/test1/golden/test1.log b/src/systemc/tests/systemc/kernel/sc_name_gen/test1/golden/test1.log new file mode 100644 index 000000000..dc1ce1ff0 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_name_gen/test1/golden/test1.log @@ -0,0 +1,20 @@ +SystemC Simulation + +Warning: (W505) object already exists: a.abc. Latter declaration will be renamed to a.abc_0 +In file: + +Warning: (W505) object already exists: a.def. Latter declaration will be renamed to a.def_0 +In file: + +Warning: (W505) object already exists: a.def. Latter declaration will be renamed to a.def_1 +In file: + +Warning: (W505) object already exists: a.ghi. Latter declaration will be renamed to a.ghi_0 +In file: +a.def +a.def_0 +a.def_1 +a.ghi +a.ghi_0 +a.abc_0 +a.abc diff --git a/src/systemc/tests/systemc/kernel/sc_name_gen/test1/test1.cpp b/src/systemc/tests/systemc/kernel/sc_name_gen/test1/test1.cpp new file mode 100644 index 000000000..9604a37d6 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_name_gen/test1/test1.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems 16 July 2004 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// TEST THAT sc_gen_unique_user_name() GENERATES THE CORRECT NAMING. + +#include "systemc.h" + +SC_MODULE(A) +{ + SC_CTOR(A) + { + SC_CTHREAD(abc, m_clk.pos()); + SC_CTHREAD(abc, m_clk.pos()); + SC_METHOD(def); + SC_METHOD(def); + SC_METHOD(def); + SC_THREAD(ghi); + SC_THREAD(ghi); + } + void abc() + { + sc_curr_proc_handle cpi = sc_get_curr_simcontext()->get_curr_proc_info(); + cout << cpi->process_handle->name() << endl; + } + void def() + { + sc_curr_proc_handle cpi = sc_get_curr_simcontext()->get_curr_proc_info(); + cout << cpi->process_handle->name() << endl; + } + void ghi() + { + sc_curr_proc_handle cpi = sc_get_curr_simcontext()->get_curr_proc_info(); + cout << cpi->process_handle->name() << endl; + } + sc_in_clk m_clk; +}; + +int sc_main(int argc, char* argv[]) +{ + A a("a"); + sc_clock clock; + a.m_clk(clock); + + sc_start(10, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_object/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_object/test01/golden/test01.log new file mode 100644 index 000000000..a2b78ddf0 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_object/test01/golden/test01.log @@ -0,0 +1,20 @@ +SystemC Simulation +attributes of object: +a1 +a2 +a3 + +name = module +kind = sc_module +name = module +kind = sc_module + +module + +Module base name: module +number of attributes: 3 +after removing attribute a1 +number of attributes: 2 +removing all attributes +number of attributes: 0 + diff --git a/src/systemc/tests/systemc/kernel/sc_object/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_object/test01/test01.cpp new file mode 100644 index 000000000..6f14dcd11 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_object/test01/test01.cpp @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Ucar Aziz, Synopsys, Inc., 2002-02-15 + Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//test of attributes +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + + + SC_CTOR( mod_a ) + {} +}; + + +int +sc_main( int, char*[] ) +{ + mod_a module("module"); + mod_a module_1(); + + sc_attr_base a1("a1"); + sc_attr_base a2("a2"); + sc_attr_base a3("a3"); + + module.add_attribute(a1); + module.add_attribute(a2); + module.add_attribute(a3); + + cout<<"attributes of object:\n"; + sc_attr_cltn& att_cltn = module.attr_cltn(); + sc_attr_cltn::const_iterator it = att_cltn.begin(); + for( ; it != att_cltn.end(); ++ it ) { + cout << (*it)->name() << endl; + } + + cout<first_object(); obj_p; obj_p=c_p->next_object()) + { + obj_name_p = obj_p->name(); + if ( strlen(obj_name_p) > mod_name_len && + !strncmp(obj_p->name(),module_name, mod_name_len) && + !strcmp(obj_p->kind(),"sc_signal") ) + { + cout << " " << obj_p->name() << ": " << obj_p->kind() << endl; + } + } + cout << endl; +} + +SC_MODULE(A) +{ + SC_CTOR(A) : a("a"), b("b"), c("c") + { + } + sc_signal a, b, c; + sc_in_clk m_clk; + sc_signal x, y, z; +}; + + +SC_MODULE(TB) +{ + SC_CTOR(TB) + { + SC_METHOD(sync); + sensitive << m_clk.pos(); + dont_initialize(); + } + void sync() + { + cout << "Internal: " << endl; + dump_signals("a"); + } + sc_in_clk m_clk; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + sc_signal dummy; + A module_a("a"); + TB tb("tb"); + module_a.m_clk(clock); + tb.m_clk(clock); + + cout << "External: " << endl; + dump_signals(module_a.name()); + sc_start(1, SC_NS); + + + cerr << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_object_manager/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_object_manager/test02/golden/test02.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_object_manager/test02/golden/test02.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_object_manager/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_object_manager/test02/test02.cpp new file mode 100644 index 000000000..9a94d134a --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_object_manager/test02/test02.cpp @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +/***************************************************************************** + + test02.cpp -- + Original Author: Andy Goodrich, Forte Design Systems + + *****************************************************************************/ +/***************************************************************************** + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// TEST THAT THE CORRECT PARENT POINTER IS SET FOR THE before_end_of_elaboration +// and end_of_elaboration CALLBACKS + +#include "systemc.h" + +class my_object : public sc_object +{ + public: + my_object() {} + virtual ~my_object() {} +}; + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(thread,m_clk.pos()); + reset_signal_is(m_reset, true); + } + void before_end_of_elaboration() + { + m_before_p = new my_object; + } + void end_of_elaboration() + { + m_end_p = new my_object; + } + void thread() + { + for (;;) + { + wait(); + if ( m_before_p->get_parent_object() == 0 ) + cout << "before_end_of_elaboration parent is 0!" <get_parent_object() == 0 ) + cout << "end_of_elaboration parent is 0!" < m_clk; + my_object* m_end_p; + sc_in m_reset; +}; +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + sc_signal reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + reset = true; + sc_start(1, SC_NS); + reset = false; + sc_start(1, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_process_b/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_process_b/test01/golden/test01.log new file mode 100644 index 000000000..573bc27a1 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_b/test01/golden/test01.log @@ -0,0 +1,2 @@ +SystemC Simulation +main action sc_method_process diff --git a/src/systemc/tests/systemc/kernel/sc_process_b/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_process_b/test01/test01.cpp new file mode 100644 index 000000000..b8d6642db --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_b/test01/test01.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-22 + Ucar Aziz, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: Andy Goodrich, Forte Design Systems, 10 Aug 05 + Description of Modification: Rewrite to use sc_process_handle::kind(). + + *****************************************************************************/ + +// test of sc_process_b::kind() + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + void main_action() + { + cout << "main action "; + cout << sc_get_current_process_b()->kind() << endl; + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action ); + } +}; + +int +sc_main( int, char*[] ) +{ + mod_a a( "a" ); + + sc_start( 5, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_process_b/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_process_b/test02/golden/test02.log new file mode 100644 index 000000000..754880b32 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_b/test02/golden/test02.log @@ -0,0 +1,11 @@ +SystemC Simulation + +Warning: (W505) object already exists: tb.sync. Latter declaration will be renamed to tb.sync_0 +In file: +0 s: tb.sync +0 s: tb.sync_0 +0 s: tb.sync_0 +0 s: tb.sync +1 ns: tb.sync_0 +1 ns: tb.sync +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_process_b/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_process_b/test02/test02.cpp new file mode 100644 index 000000000..1da5cefd1 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_b/test02/test02.cpp @@ -0,0 +1,31 @@ +#include "systemc.h" + +SC_MODULE(TB) +{ + SC_CTOR(TB) + { + SC_METHOD(sync); + sensitive << m_clk.pos(); + SC_METHOD(sync); + sensitive << m_clk.pos(); + } + void sync() + { + sc_curr_proc_handle cpi = + sc_get_curr_simcontext()->get_curr_proc_info(); + cout << sc_time_stamp() << ": " << cpi->process_handle->name() << endl; + } + sc_in_clk m_clk; +}; + +int sc_main(int argc,char **argv) +{ + sc_clock clock; + TB tb("tb"); + + tb.m_clk(clock); + sc_start(2, SC_NS); + + cerr << "Program completed" << endl; + return (0); +} diff --git a/src/systemc/tests/systemc/kernel/sc_process_b/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/sc_process_b/test03/golden/test03.log new file mode 100644 index 000000000..e489be005 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_b/test03/golden/test03.log @@ -0,0 +1,13 @@ +SystemC Simulation +t1.method 1 +t1.thread 3 +t1.method 1 +t1.method 1 +t1.thread 3 +t1.method 1 +t1.thread 3 +t1.method 1 +t1.thread 3 +t1.method 1 +t1.thread 3 +t1.method 1 diff --git a/src/systemc/tests/systemc/kernel/sc_process_b/test03/test03.cpp b/src/systemc/tests/systemc/kernel/sc_process_b/test03/test03.cpp new file mode 100644 index 000000000..9bc8b29cb --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_b/test03/test03.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 27 July 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// This tests that one can get process handles on static processes. + +#include "systemc.h" + + +SC_MODULE(Test) { + sc_in m_clk; + + void method() { + sc_process_handle handle = sc_get_current_process_handle(); + cout << handle.name() << " " << handle.proc_kind() << endl; + } + void thread() { + for (;;) + { + wait(); + sc_process_handle handle = sc_get_current_process_handle(); + cout << handle.name() << " " << handle.proc_kind() << endl; + } + } + SC_CTOR(Test) { + SC_METHOD(method); + sensitive << m_clk.neg(); + sc_process_handle method_handle = sc_get_current_process_handle(); + cout << name() << ".method " << method_handle.proc_kind() << endl; + SC_CTHREAD(thread,m_clk.pos()); + sc_process_handle thread_handle = sc_get_current_process_handle(); + cout << name() << ".thread " << thread_handle.proc_kind() << endl; + } +}; + + +int sc_main(int argc,char *argv[]) { + + Test t1("t1"); + sc_clock clk("clk",10,SC_NS); + + t1.m_clk(clk); + + sc_start(50,SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_process_handle/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_process_handle/test01/golden/test01.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_handle/test01/golden/test01.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_process_handle/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_process_handle/test01/test01.cpp new file mode 100644 index 000000000..5c2730d2c --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_handle/test01/test01.cpp @@ -0,0 +1,205 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, 8 December 2005 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Test of return values for sc_process handle instances, along with +// comparison operators. + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(process_a, m_clk.pos()); + SC_THREAD(process_b) + sensitive << m_clk.pos(); + } + void process_a() + { + m_a = sc_get_current_process_handle(); + sc_process_handle b; + sc_process_handle c = sc_get_current_process_handle(); + + // TEST COMPARISONS: + + if ( m_a == b ) + { + cout << __FILE__ << " " << __LINE__ + << " non-null process handle == null process handle" << endl; + } + if ( m_a != c ) + { + cout << __FILE__ << " " << __LINE__ + << " process handles for same process not equal" << endl; + } + wait(1); + + // TEST RETURN VALUES: + + const std::vector& objects = m_a.get_child_objects(); + if ( objects.size() != 0 ) + { + cout << __FILE__ << " " << __LINE__ + << "get_child_objects() returned non-null vector" << endl; + } + if ( m_a.get_parent_object() == 0 ) + { + cout << __FILE__ << " " << __LINE__ + << " get_parent_object() returned null value" << endl; + } + if ( !strcmp( m_a.name(), "") ) + { + cout << __FILE__ << " " << __LINE__ + << "name() returned empty string" << endl; + } + if ( m_a.proc_kind() != SC_CTHREAD_PROC_ ) + { + cout << __FILE__ << " " << __LINE__ + << "proc_kind() returned " << m_a.proc_kind() + << " not " << SC_CTHREAD_PROC_ << endl; + } + if ( m_a.terminated() ) + { + cout << __FILE__ << " " << __LINE__ + << "terminated() returned true" << endl; + } + if ( !m_a.valid() ) + { + cout << __FILE__ << " " << __LINE__ + << "valid() returned false" << endl; + } + } + void process_b() + { + wait(1); + sc_process_handle b = sc_get_current_process_handle(); + if ( m_a == b ) + { + cout << __FILE__ << " " << __LINE__ + << " process handles for two different processes were equal" + << endl; + } + if ( b.get_parent_object() == 0 ) + { + cout << __FILE__ << " " << __LINE__ + << " get_parent_object() returned null value" << endl; + } + if ( b.proc_kind() != SC_THREAD_PROC_ ) + { + cout << __FILE__ << " " << __LINE__ + << "proc_kind() returned " << b.proc_kind() + << " not " << SC_THREAD_PROC_ << endl; + } + wait(2); + if ( m_a.valid() ) + { + if ( !m_a.terminated() ) + { + cout << __FILE__ << " " << __LINE__ + << "terminated() returned false" << endl; + } + } + else + { + if ( m_a.terminated() ) + { + cout << __FILE__ << " " << __LINE__ + << "terminated() returned true" << endl; + } + } + } + + sc_process_handle m_a; + sc_in m_clk; +}; + + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + sc_process_handle handle; + sc_process_handle handle2; + + dut.m_clk(clock); + if ( handle == handle2 ) + { + cout << __FILE__ << " " << __LINE__ + << " == operator returned true" << endl; + } + if ( !(handle != handle2) ) + { + cout << __FILE__ << " " << __LINE__ + << " != operator returned true" << endl; + } + const std::vector& objects = handle.get_child_objects(); + if ( objects.size() != 0 ) + { + cout << __FILE__ << " " << __LINE__ + << " get_child_objects() returned non-null vector" << endl; + } + if ( handle.get_parent_object() != 0 ) + { + cout << __FILE__ << " " << __LINE__ + << " get_parent_object() returned non-null value" << endl; + } + if ( strcmp( handle.name(), "") ) + { + cout << __FILE__ << " " << __LINE__ + << " name() returned non-empty string" << endl; + } + if ( handle.proc_kind() != SC_NO_PROC_ ) + { + cout << __FILE__ << " " << __LINE__ + << " proc_kind() returned " << handle.proc_kind() + << " not " << SC_NO_PROC_ << endl; + } + if ( handle.terminated() ) + { + cout << __FILE__ << " " << __LINE__ + << " terminated() returned true" << endl; + } + if ( handle.valid() ) + { + cout << __FILE__ << " " << __LINE__ + << " valid() returned true" << endl; + } + + sc_start(10, SC_NS); + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_process_handle/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_process_handle/test02/golden/test02.log new file mode 100644 index 000000000..0d934d401 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_handle/test02/golden/test02.log @@ -0,0 +1,2 @@ +SystemC Simulation +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_process_handle/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_process_handle/test02/test02.cpp new file mode 100644 index 000000000..6d3edb2a6 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_process_handle/test02/test02.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +/***************************************************************************** + + test02.cpp -- Test proper process type for terminated processes + + Original Author: Andy Goodrich, Forte Design Systems + + *****************************************************************************/ +/***************************************************************************** + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// TEST THAT THE CORRECT PROCESS TYPE IS MAINTAINED FOR TERMINATED PROCESSES + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(cthread_target,m_clk.pos()); + SC_THREAD(thread_target) + sensitive << m_clk.pos(); + SC_CTHREAD(watcher,m_clk.pos()); + } + void cthread_target() + { + m_cthread_handle = sc_get_current_process_handle(); + wait(); + } + void thread_target() + { + m_thread_handle = sc_get_current_process_handle(); + wait(); + } + void watcher() + { + wait(); + wait(); + if ( m_cthread_handle.valid() ) + { + if ( m_cthread_handle.proc_kind() == SC_NO_PROC_ ) + cout << "Cthread process handle kind not maintained" << endl; + if ( m_cthread_handle.terminated() == false ) + cout<< "Cthread process handle doesn't show terminated" << endl; + } + if ( m_thread_handle.valid() ) + { + if ( m_thread_handle.proc_kind() == SC_NO_PROC_ ) + cout << "Thread process handle kind not maintained" << endl; + if ( m_thread_handle.terminated() == false ) + cout<< "Thread process handle does not show terminated" << endl; + } + } + sc_in m_clk; + sc_process_handle m_cthread_handle; + sc_process_handle m_thread_handle; +}; +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(5, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_sensitive/test01/golden/test01.log new file mode 100644 index 000000000..e0a49dc03 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test01/golden/test01.log @@ -0,0 +1,19 @@ +SystemC Simulation +i = 0 +j = 0 +i = 1 +j = 1 +i = 2 +j = 2 +i = 3 +j = 3 +i = 4 +j = 4 +i = 5 +j = 5 +i = 6 +j = 6 +i = 7 +j = 7 +i = 8 +j = 8 diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_sensitive/test01/test01.cpp new file mode 100644 index 000000000..c6e1e52f5 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test01/test01.cpp @@ -0,0 +1,122 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-22 + Ucar Aziz, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test01.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:04 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/19 00:46:58 acg +// Andy Goodrich: Added CVS logging. +// + +// test of sc_sensitive::operator()(sc_cthread_process*, sc_in(inout)) + +#include "systemc.h" + + +SC_MODULE( mod_a ) +{ + sc_in clk; + sc_in in1; + + void main_action1() + { + int i = 0; + while( true ) { + wait(); + cout << "i = " << i << endl; + i ++; + } + } + + void main_action2() + { + int j = 0; + while( true ) { + wait(); + cout << "j = " << j << endl; + j ++; + } + } + + SC_CTOR(mod_a) + { + SC_CTHREAD( main_action1, clk ); + SC_CTHREAD( main_action2, in1 ); + } +}; + +SC_MODULE( mod_b ) +{ + sc_in clk; + sc_inout in1; + + void main_action() + { + bool j = true; + while( true ) { + wait(); + in1->write( j ); + j = !j; + } + } + + SC_CTOR( mod_b ) + { + SC_CTHREAD( main_action, clk ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "clk", 10, SC_NS ); + sc_clock clk1( "clk1", 5, SC_NS ); + sc_signal channel; + mod_a a( "a" ); + mod_b b( "b" ); + + b.clk( clk1 ); + b.in1( channel ); + a.clk( clk ); + a.in1( channel ); + + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_sensitive/test02/golden/test02.log new file mode 100644 index 000000000..358509035 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test02/golden/test02.log @@ -0,0 +1,31 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: use of () to specify sensitivity is deprecated, use << instead + +Info: (I804) /IEEE_Std_1666/deprecated: sc_sensitive_neg is deprecated use sc_sensitive << with neg() instead +j = 0 +i = 0 +j = 1 +i = 1 +j = 2 +i = 2 +j = 3 +i = 3 +j = 4 +i = 4 +j = 5 +i = 5 +j = 6 +i = 6 +j = 7 +i = 7 +j = 8 +i = 8 + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_sensitive/test02/test02.cpp new file mode 100644 index 000000000..1607be024 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test02/test02.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-22 + Ucar Aziz, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test02.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:04 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/19 00:47:01 acg +// Andy Goodrich: Added CVS logging. +// + +// test of sc_sensitive_neg::operator(<<)()(sc_inout) + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in in1; + sc_in in2; + + void main_action1() + { + int i = 0; + while( true ) { + wait(); + cout << "i = " << i << endl; + i ++; + } + } + + void main_action2() + { + int j = 0; + while( true ) { + wait(); + cout << "j = " << j << endl; + j ++; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( main_action1 ); + sensitive_neg( in1 ); + SC_THREAD( main_action2 ); + sensitive_neg << in2; + } +}; + +SC_MODULE( mod_b ) +{ + sc_in clk; + sc_inout in1; + + void main_action() + { + bool j = true; + while( true ) { + wait(); + in1->write( j ); + j = !j; + } + } + + SC_CTOR( mod_b ) + { + SC_CTHREAD( main_action, clk ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk1( "clk", 5, SC_NS ); + sc_clock clk2( "clk1", 5, SC_NS ); + sc_signal sig_1; + sc_signal sig_2; + mod_a a( "a" ); + mod_b b1( "b1" ); + mod_b b2( "b2" ); + + b1.clk( clk1 ); + b1.in1( sig_1 ); + b2.clk( clk2 ); + b2.in1( sig_2 ); + + a.in1( sig_1 ); + a.in2( sig_2 ); + + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/sc_sensitive/test03/golden/test03.log new file mode 100644 index 000000000..9523bdb62 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test03/golden/test03.log @@ -0,0 +1,33 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: use of () to specify sensitivity is deprecated, use << instead + +Info: (I804) /IEEE_Std_1666/deprecated: sc_sensitive_pos is deprecated use sc_sensitive << with pos() instead +j = 0 +i = 0 +j = 1 +i = 1 +j = 2 +i = 2 +j = 3 +i = 3 +j = 4 +i = 4 +j = 5 +i = 5 +j = 6 +i = 6 +j = 7 +i = 7 +j = 8 +i = 8 +j = 9 +i = 9 + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test03/test03.cpp b/src/systemc/tests/systemc/kernel/sc_sensitive/test03/test03.cpp new file mode 100644 index 000000000..5eca3d7a2 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test03/test03.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-22 + Ucar Aziz, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test03.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:04 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/19 00:47:04 acg +// Andy Goodrich: Added CVS logging. +// + +// test of sc_sensitive_pos::operator(<<)()(sc_inout) + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in in1; + sc_in in2; + + void main_action1() + { + int i = 0; + while( true ) { + wait(); + cout << "i = " << i << endl; + i ++; + } + } + + void main_action2() + { + int j = 0; + while( true ) { + wait(); + cout << "j = " << j << endl; + j ++; + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( main_action1 ); + sensitive_pos( in1 ); + SC_THREAD( main_action2 ); + sensitive_pos << in2; + } +}; + +SC_MODULE( mod_b ) +{ + sc_in clk; + sc_inout in1; + + void main_action() + { + bool j = true; + while( true ) { + wait(); + in1->write( j ); + j = !j; + } + } + + SC_CTOR( mod_b ) + { + SC_CTHREAD( main_action, clk ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk1( "clk", 5, SC_NS ); + sc_clock clk2( "clk1", 5, SC_NS ); + sc_signal sig_1; + sc_signal sig_2; + mod_a a( "a" ); + mod_b b1( "b1" ); + mod_b b2( "b2" ); + + b1.clk( clk1 ); + b1.in1( sig_1 ); + b2.clk( clk2 ); + b2.in1( sig_2 ); + + a.in1( sig_1 ); + a.in2( sig_2 ); + + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test04/golden/test04.log b/src/systemc/tests/systemc/kernel/sc_sensitive/test04/golden/test04.log new file mode 100644 index 000000000..00de35f19 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test04/golden/test04.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Error: (E526) make sensitive failed: simulation running +In file: +In process: x.able @ 0 s diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test04/test04.cpp b/src/systemc/tests/systemc/kernel/sc_sensitive/test04/test04.cpp new file mode 100644 index 000000000..7892cd28a --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test04/test04.cpp @@ -0,0 +1,31 @@ +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + SC_THREAD(able); + sensitive << clk.pos(); + } + + void able() + { + for (;;) + { + wait(); + sensitive << clk.posedge_event(); + cout << "able: " << sc_time_stamp() << endl; + } + } + sc_in_clk clk; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + X x("x"); + x.clk(clock); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test05/golden/test05.log b/src/systemc/tests/systemc/kernel/sc_sensitive/test05/golden/test05.log new file mode 100644 index 000000000..252bd31f1 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test05/golden/test05.log @@ -0,0 +1,7 @@ +SystemC Simulation +1 ns +5 ns +6 ns +1006 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_sensitive/test05/test05.cpp b/src/systemc/tests/systemc/kernel/sc_sensitive/test05/test05.cpp new file mode 100644 index 000000000..fc2a8b21d --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_sensitive/test05/test05.cpp @@ -0,0 +1,37 @@ +#include "systemc.h" + +SC_MODULE(TB) +{ + SC_CTOR(TB) + { + SC_THREAD(exec); + sensitive << m_clk.pos(); + } + void exec() + { + for (;;) + { + wait(2); + cout << sc_time_stamp() << endl; + wait(4); + cout << sc_time_stamp() << endl; + wait(1); + cout << sc_time_stamp() << endl; + wait(1000); + cout << sc_time_stamp() << endl; + sc_stop(); + } + } + sc_in_clk m_clk; +}; + +int sc_main( int, char*[] ) +{ + sc_clock clock; + TB tb("tb"); + + tb.m_clk(clock); + sc_start(2000, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_simcontext/sc_delta_count/golden/sc_delta_count.log b/src/systemc/tests/systemc/kernel/sc_simcontext/sc_delta_count/golden/sc_delta_count.log new file mode 100644 index 000000000..bb953300a --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_simcontext/sc_delta_count/golden/sc_delta_count.log @@ -0,0 +1,6 @@ +SystemC Simulation +2 +4 + +Info: /OSCI/SystemC: Simulation stopped by user. +Program completed after 5 ns diff --git a/src/systemc/tests/systemc/kernel/sc_simcontext/sc_delta_count/sc_delta_count.cpp b/src/systemc/tests/systemc/kernel/sc_simcontext/sc_delta_count/sc_delta_count.cpp new file mode 100644 index 000000000..087e7157e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_simcontext/sc_delta_count/sc_delta_count.cpp @@ -0,0 +1,33 @@ +#include "systemc.h" + +SC_MODULE(TB) +{ + SC_CTOR(TB) + { + SC_METHOD(method) + sensitive << m_flipper; + SC_THREAD(thread) + } + void method() + { + } + void thread() + { + m_flipper = !m_flipper; + wait(2, SC_NS); + cout << sc_delta_count() << endl; + m_flipper = !m_flipper; + wait(3, SC_NS); + cout << sc_delta_count() << endl; + sc_stop(); + } + sc_signal m_flipper; +}; + +int sc_main(int argc, char* argv[]) +{ + TB tb("tb"); + sc_start(); + cout << "Program completed after " << sc_time_stamp() << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_simcontext/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_simcontext/test01/golden/test01.log new file mode 100644 index 000000000..3db91fdf5 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_simcontext/test01/golden/test01.log @@ -0,0 +1,4 @@ +SystemC Simulation +0 main_action_method called +0 main_action_thread called +1 main_action_cthread called diff --git a/src/systemc/tests/systemc/kernel/sc_simcontext/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_simcontext/test01/test01.cpp new file mode 100644 index 000000000..bbe48deb5 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_simcontext/test01/test01.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of SC_METHOD and SC_THREAD (but not SC_CTHREAD) initialization + +#include "systemc.h" + +SC_MODULE( mod_a ) { + + sc_in_clk clk; + + void main_action_method() + { + cout << sc_delta_count() + << " main_action_method called" << endl; + } + + void main_action_thread() + { + while( true ) { + cout << sc_delta_count() + << " main_action_thread called" << endl; + wait(); // for what? + } + } + + void main_action_cthread() + { + while( true ) { + cout << sc_delta_count() + << " main_action_cthread called" << endl; + wait(); + } + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action_method ); + SC_THREAD( main_action_thread ); + SC_CTHREAD( main_action_cthread, clk.pos() ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + mod_a a( "a" ); + a.clk( clk ); + + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_simcontext/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_simcontext/test02/golden/test02.log new file mode 100644 index 000000000..df6c708dc --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_simcontext/test02/golden/test02.log @@ -0,0 +1,24 @@ +SystemC Simulation + +Warning: (W524) dont_initialize() has no effect for SC_CTHREADs +In file: +0 s method_a +0 s thread_a +500 ps method_a +500 ps method_b +500 ps cthread_a +500 ps thread_a +500 ps cthread_b +500 ps thread_b +1500 ps method_a +1500 ps method_b +1500 ps cthread_a +1500 ps thread_a +1500 ps cthread_b +1500 ps thread_b +2500 ps method_a +2500 ps method_b +2500 ps cthread_a +2500 ps thread_a +2500 ps cthread_b +2500 ps thread_b diff --git a/src/systemc/tests/systemc/kernel/sc_simcontext/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_simcontext/test02/test02.cpp new file mode 100644 index 000000000..f168c6829 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_simcontext/test02/test02.cpp @@ -0,0 +1,139 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of process initialization -- the dont_initialize() method + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void method_a() + { + write( "method_a" ); + } + + void thread_a() + { + while( true ) { + write( "thread_a" ); + wait(); + } + } + + void cthread_a() + { + while( true ) { + write( "cthread_a" ); + wait(); + } + } + + SC_CTOR( mod_a ) + { + SC_METHOD( method_a ); + sensitive << clk.neg(); + SC_THREAD( thread_a ); + sensitive << clk.neg(); + SC_CTHREAD( cthread_a, clk.neg() ); + } +}; + +SC_MODULE( mod_b ) +{ + sc_in_clk clk; + + void write( const char* msg ) + { + cout << sc_time_stamp() << " " << msg << endl; + } + + void method_b() + { + write( "method_b" ); + } + + void thread_b() + { + while( true ) { + write( "thread_b" ); + wait(); + } + } + + void cthread_b() + { + while( true ) { + write( "cthread_b" ); + wait(); + } + } + + SC_CTOR( mod_b ) + { + SC_METHOD( method_b ); + sensitive << clk.neg(); + dont_initialize(); + SC_THREAD( thread_b ); + sensitive << clk.neg(); + dont_initialize(); + SC_CTHREAD( cthread_b, clk.neg() ); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + mod_a a( "a" ); + mod_b b( "b" ); + + a.clk( clk ); + b.clk( clk ); + + sc_start( 3, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test1/golden/test1.log b/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test1/golden/test1.log new file mode 100644 index 000000000..8cb9086ca --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test1/golden/test1.log @@ -0,0 +1,50 @@ +SystemC Simulation +Event Start Parameters End Parameters +------------- ---------------- -------------- + +sc_start(1, SC_NS) - 0 s 0 + X::comb() - 0 s 0 + 1 ns 0 +~tweak - 1 ns 0 + 1 ns 0 +sc_start(0, SC_NS) - 1 ns 0 + 1 ns 1 +sc_start(0, SC_NS) - 1 ns 1 + X::comb() - 1 ns 1 + X::sync() - 1 ns 1 + 1 ns 1 +sc_start(1, SC_NS) - 1 ns 1 + 2 ns 1 +sc_start(0, SC_NS) - 2 ns 1 + 2 ns 1 +sc_start(0, SC_NS) - 2 ns 1 + X::sync() - 2 ns 1 + 2 ns 1 +~tweak - 2 ns 1 + 2 ns 1 +sc_start(0, SC_NS) - 2 ns 1 + 2 ns 0 +~tweak - 2 ns 0 + 2 ns 0 +sc_start(0, SC_NS) - 2 ns 0 + X::comb() - 2 ns 0 + 2 ns 1 +sc_start(0, SC_NS) - 2 ns 1 + X::comb() - 2 ns 1 + 2 ns 1 +sc_start(1, SC_NS) - 2 ns 1 + 3 ns 1 +sc_start(1, SC_NS) - 3 ns 1 + X::sync() - 3 ns 1 + 4 ns 1 +sc_start(0, SC_NS) - 4 ns 1 + 4 ns 1 +~tweak - 4 ns 1 + 4 ns 1 +sc_start(0, SC_NS) - 4 ns 1 + X::sync() - 4 ns 1 + 4 ns 0 +sc_start(0, SC_NS) - 4 ns 0 + X::comb() - 4 ns 0 + 4 ns 0 +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test1/test1.cpp b/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test1/test1.cpp new file mode 100644 index 000000000..7b2502d04 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test1/test1.cpp @@ -0,0 +1,117 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- Test alternations of sc_start(0, SC_NS) and sc_start(1, SC_NS). + + Original Author: Andy Goodrich, Forte Design Systems, 18 August 2006 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: - + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + SC_METHOD(comb); + sensitive << tweak; + SC_CTHREAD(sync, clk.pos()); + } + void comb() + { + cout << " X::comb() - " << + sc_time_stamp() << " " << + tweak.read() << endl; + } + void sync() + { + for (;;) + { + wait(); + cout << " X::sync() - " << + sc_time_stamp() << " " << + tweak.read() << endl; + } + } + sc_in_clk clk; + sc_in tweak; +}; + +#define ACTION(action,descr) \ +{ \ + cout << descr << " - " << \ + sc_time_stamp() << " " << \ + tweak.read() << endl; \ + action ; \ + cout << " " << \ + sc_time_stamp() << " " << \ + tweak.read() << endl; \ +} + + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + sc_signal tweak; + X x("x"); + x.clk(clock); + x.tweak(tweak); + + cout << "Event Start Parameters End Parameters" << endl; + cout << "------------- ---------------- --------------\n" << endl; + + ACTION(sc_start(1, SC_NS),"sc_start(1, SC_NS)") + ACTION(tweak = !tweak,"~tweak ") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + ACTION(sc_start(1, SC_NS),"sc_start(1, SC_NS)") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + + ACTION(tweak = !tweak,"~tweak ") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + + ACTION(tweak = !tweak,"~tweak ") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + + ACTION(sc_start(1, SC_NS),"sc_start(1, SC_NS)") + ACTION(sc_start(1, SC_NS),"sc_start(1, SC_NS)") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + ACTION(tweak = !tweak,"~tweak ") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + ACTION(sc_start(0, SC_NS),"sc_start(0, SC_NS)") + + cerr << "Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test2/golden/test2.log b/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test2/golden/test2.log new file mode 100644 index 000000000..d3ee758f2 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test2/golden/test2.log @@ -0,0 +1,16 @@ +SystemC Simulation +0 s 1 thread +0 s 2 cascade0 +0 s 3 cascade1 +0 s 4 cascade2 + +1 ns 7 thread +1 ns 8 cascade0 +1 ns 9 cascade1 +1 ns 10 cascade2 + +2 ns 13 thread +2 ns 14 cascade0 +2 ns 15 cascade1 +2 ns 16 cascade2 +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test2/test2.cpp b/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test2/test2.cpp new file mode 100644 index 000000000..8b701d1da --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_start/sc_start_0/test2/test2.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- Test use of sc_pending_activity_at_current_time() + + Original Author: Andy Goodrich, Forte Design Systems, 18 August 2006 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: - + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_THREAD(thread) + sensitive << m_clk.pos(); + dont_initialize(); + SC_METHOD(cascade0_monitor); + sensitive << m_cascade0; + dont_initialize(); + SC_METHOD(cascade1_monitor); + sensitive << m_cascade1; + dont_initialize(); + SC_METHOD(cascade2_monitor); + sensitive << m_cascade2; + dont_initialize(); + } + + void cascade0_monitor() + { + cout << sc_time_stamp() << " " << sc_delta_count() << " cascade0" + << endl; + m_cascade1 = m_cascade0; + } + + void cascade1_monitor() + { + cout << sc_time_stamp() << " " << sc_delta_count() << " cascade1" + << endl; + m_cascade2 = m_cascade1; + } + + void cascade2_monitor() + { + cout << sc_time_stamp() << " " << sc_delta_count() << " cascade2" + << endl; + } + + void thread() + { + for (;;) + { + cout << sc_time_stamp() << " " << sc_delta_count() << " thread" + << endl; + m_cascade0 = !m_cascade0.read(); + wait(); + } + } + sc_signal m_cascade0; + sc_signal m_cascade1; + sc_signal m_cascade2; + sc_in m_clk; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + + do { sc_start(0, SC_NS); } while (sc_pending_activity_at_current_time()); + cout << endl; + sc_start(1, SC_NS); + do { sc_start(0, SC_NS); } while (sc_pending_activity_at_current_time()); + cout << endl; + sc_start(1, SC_NS); + do { sc_start(0, SC_NS); } while (sc_pending_activity_at_current_time()); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_start/time_overflow/golden/time_overflow.log b/src/systemc/tests/systemc/kernel/sc_start/time_overflow/golden/time_overflow.log new file mode 100644 index 000000000..cedb62065 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_start/time_overflow/golden/time_overflow.log @@ -0,0 +1,11 @@ +SystemC Simulation +0 s: Issuing sc_start(10, SC_NS) +10 ns: Issuing sc_start() +18446744073709551615 ps: Issuing sc_start() + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: +18446744073709551615 ps: Issuing sc_start(10, SC_NS) + +Error: (E544) simulation time value overflow, simulation aborted +In file: diff --git a/src/systemc/tests/systemc/kernel/sc_start/time_overflow/time_overflow.cpp b/src/systemc/tests/systemc/kernel/sc_start/time_overflow/time_overflow.cpp new file mode 100644 index 000000000..e02fae353 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_start/time_overflow/time_overflow.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + Original Author: Bishnupriya Bhattacharya, Cadence Design Systems, + Spetember 5, 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ +#include "systemc.h" + +int sc_main(int argc, char* argv[]) +{ + cout << sc_time_stamp() << ": Issuing sc_start(10, SC_NS)" << endl; + sc_start(10, SC_NS); + cout << sc_time_stamp() << ": Issuing sc_start()" << endl; + sc_start(sc_max_time() - sc_time(10,SC_NS) ); + cout << sc_time_stamp() << ": Issuing sc_start()" << endl; + sc_start(); + cout << sc_time_stamp() << ": Issuing sc_start(10, SC_NS)" << endl; + sc_start(10, SC_NS); + cerr << sc_time_stamp() << ": Program completed" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/kernel/sc_stop/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_stop/test01/golden/test01.log new file mode 100644 index 000000000..f23521c69 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_stop/test01/golden/test01.log @@ -0,0 +1,7 @@ +SystemC Simulation +Creating able... +Creating baker... +Creating charlie... +charlie: 0 s + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_stop/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_stop/test01/test01.cpp new file mode 100644 index 000000000..90a1405c9 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_stop/test01/test01.cpp @@ -0,0 +1,94 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + cout << "Creating able..." << endl; + SC_THREAD(able); + sensitive << clk.pos(); + cout << "Creating baker..." << endl; + SC_THREAD(baker); + sensitive << clk.pos(); + cout << "Creating charlie..." << endl; + SC_THREAD(charlie); + sensitive << clk.pos(); + } + + void able() + { + for (;;) + { + wait(); + cout << "able: " << sc_time_stamp() << endl; + sc_stop(); + } + } + void baker() + { + for (;;) + { + wait(); + cout << "baker: " << sc_time_stamp() << endl; + sc_stop(); + } + } + void charlie() + { + for (;;) + { + wait(); + cout << "charlie: " << sc_time_stamp() << endl; + sc_stop(); + } + } + sc_in_clk clk; +}; + +int sc_main(int argc, char* argv[] ) +{ + sc_clock clock; + X x("x"); + x.clk(clock); + + sc_set_stop_mode(SC_STOP_IMMEDIATE); + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_stop/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_stop/test02/golden/test02.log new file mode 100644 index 000000000..c62642dbc --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_stop/test02/golden/test02.log @@ -0,0 +1,13 @@ +SystemC Simulation +Creating able... +Creating baker... +Creating charlie... +charlie: 0 s +baker: 0 s + +Warning: (W545) sc_stop has already been called +In file: +In process: x.baker @ 0 s +able: 0 s + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_stop/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_stop/test02/test02.cpp new file mode 100644 index 000000000..b5b1c0c38 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_stop/test02/test02.cpp @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + cout << "Creating able..." << endl; + SC_THREAD(able); + sensitive << clk.pos(); + cout << "Creating baker..." << endl; + SC_THREAD(baker); + sensitive << clk.pos(); + cout << "Creating charlie..." << endl; + SC_THREAD(charlie); + sensitive << clk.pos(); + } + + void able() + { + for (;;) + { + wait(); + cout << "able: " << sc_time_stamp() << endl; + sc_stop(); + } + } + void baker() + { + for (;;) + { + wait(); + cout << "baker: " << sc_time_stamp() << endl; + sc_stop(); + } + } + void charlie() + { + for (;;) + { + wait(); + cout << "charlie: " << sc_time_stamp() << endl; + sc_stop(); + } + } + sc_in_clk clk; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + X x("x"); + x.clk(clock); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_stop/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/sc_stop/test03/golden/test03.log new file mode 100644 index 000000000..0904f9740 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_stop/test03/golden/test03.log @@ -0,0 +1,7 @@ +SystemC Simulation +Creating able... +Creating baker... +baker: 0 s: issuing sc_stop() +able: 0 s + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/kernel/sc_stop/test03/test03.cpp b/src/systemc/tests/systemc/kernel/sc_stop/test03/test03.cpp new file mode 100644 index 000000000..0489ab963 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_stop/test03/test03.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Andy Goodrich, Forte Design Systems + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(X) +{ + SC_CTOR(X) + { + cout << "Creating able..." << endl; + SC_THREAD(able); + sensitive << immediate_event; + cout << "Creating baker..." << endl; + SC_THREAD(baker); + } + + void able() + { + wait(); + cout << "able: " << sc_time_stamp() << endl; + } + void baker() + { + cout << "baker: " << sc_time_stamp() + << ": issuing sc_stop()" << endl; + sc_stop(); + immediate_event.notify(); + } + sc_event immediate_event; +}; + +int sc_main(int argc, char* argv[] ) +{ + X x("x"); + + //sc_set_stop_mode(SC_STOP_IMMEDIATE); + sc_start(100, SC_NS); + return 0; +} + + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_time/test01/golden/test01.log new file mode 100644 index 000000000..05f57cbfb --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test01/golden/test01.log @@ -0,0 +1,115 @@ +SystemC Simulation +test_print +0 s +1230 ps +12300 ns +1230 us +12300 ms +1230 s +12300000 s +test_constructors +0 s +0 s +1235 ps +1234 ps +0 s +18446744073709550382 ps +18446744073709550383 ps +1 ns +2 ns +3 ns +4 ns +5 ns +6 ns +7 ns +8 ns +9 ns +10 ns +11 ns +0 s + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated constructor: sc_time(double,bool) +1234 ps +1235 ps +18446744073709550383 ps +18446744073709550382 ps +1 ps +2 ps +0 s +18446744073709551615 ps + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated constructor: sc_time(uint64,bool) +0 s +25 ns +25 ps +25 ps +test_assignment +0 s +1235 ps +18446744073709550074 ps +test_conversion +0 +0 +0 s +0 +1234500 +1.2345e+06 +1234500 ps +1.2345e-06 +18446744073709550074 +1.84467e+19 +18446744073709550074 ps +1.84467e+07 +test_relational +1 +0 +0 +1 +0 +1 +0 +1 +0 +0 +1 +1 +0 +1 +1 +1 +0 +0 +test_arithmetic +0 s +1235 ps +18446744073709550074 ps +1235 ps +2469 ps +18446744073709551309 ps +18446744073709548532 ps +0 s +18446744073709550381 ps +1542 ps +1 ps +2777 ps +0 s +0 s +1525 ps +2468 ps +0 s +617 ps +1.00081 +1235 ps +1 ps +1 ps +1 ps +test_SC_ZERO_TIME +0 s + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test01/golden/test01.log.mingw b/src/systemc/tests/systemc/kernel/sc_time/test01/golden/test01.log.mingw new file mode 100644 index 000000000..c61cc7857 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test01/golden/test01.log.mingw @@ -0,0 +1,115 @@ +SystemC Simulation +test_print +0 s +1230 ps +12300 ns +1230 us +12300 ms +1230 s +12300000 s +test_constructors +0 s +0 s +1235 ps +1234 ps +0 s +18446744073709550382 ps +18446744073709550383 ps +1 ns +2 ns +3 ns +4 ns +5 ns +6 ns +7 ns +8 ns +9 ns +10 ns +11 ns +0 s + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated constructor: sc_time(double,bool) +1234 ps +1235 ps +18446744073709550383 ps +18446744073709550382 ps +1 ps +2 ps +0 s +18446744073709551615 ps + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated constructor: sc_time(uint64,bool) +0 s +25 ns +25 ps +25 ps +test_assignment +0 s +1235 ps +18446744073709550074 ps +test_conversion +0 +0 +0 s +0 +1234500 +1.2345e+006 +1234500 ps +1.2345e-006 +18446744073709550074 +1.84467e+019 +18446744073709550074 ps +1.84467e+007 +test_relational +1 +0 +0 +1 +0 +1 +0 +1 +0 +0 +1 +1 +0 +1 +1 +1 +0 +0 +test_arithmetic +0 s +1235 ps +18446744073709550074 ps +1235 ps +2469 ps +18446744073709551309 ps +18446744073709548532 ps +0 s +18446744073709550381 ps +1542 ps +1 ps +2777 ps +0 s +0 s +1525 ps +2468 ps +0 s +617 ps +1.00081 +1235 ps +1 ps +1 ps +1 ps +test_SC_ZERO_TIME +0 s + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test01/golden/test01.log.mingw64 b/src/systemc/tests/systemc/kernel/sc_time/test01/golden/test01.log.mingw64 new file mode 100644 index 000000000..c61cc7857 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test01/golden/test01.log.mingw64 @@ -0,0 +1,115 @@ +SystemC Simulation +test_print +0 s +1230 ps +12300 ns +1230 us +12300 ms +1230 s +12300000 s +test_constructors +0 s +0 s +1235 ps +1234 ps +0 s +18446744073709550382 ps +18446744073709550383 ps +1 ns +2 ns +3 ns +4 ns +5 ns +6 ns +7 ns +8 ns +9 ns +10 ns +11 ns +0 s + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated constructor: sc_time(double,bool) +1234 ps +1235 ps +18446744073709550383 ps +18446744073709550382 ps +1 ps +2 ps +0 s +18446744073709551615 ps + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated constructor: sc_time(uint64,bool) +0 s +25 ns +25 ps +25 ps +test_assignment +0 s +1235 ps +18446744073709550074 ps +test_conversion +0 +0 +0 s +0 +1234500 +1.2345e+006 +1234500 ps +1.2345e-006 +18446744073709550074 +1.84467e+019 +18446744073709550074 ps +1.84467e+007 +test_relational +1 +0 +0 +1 +0 +1 +0 +1 +0 +0 +1 +1 +0 +1 +1 +1 +0 +0 +test_arithmetic +0 s +1235 ps +18446744073709550074 ps +1235 ps +2469 ps +18446744073709551309 ps +18446744073709548532 ps +0 s +18446744073709550381 ps +1542 ps +1 ps +2777 ps +0 s +0 s +1525 ps +2468 ps +0 s +617 ps +1.00081 +1235 ps +1 ps +1 ps +1 ps +test_SC_ZERO_TIME +0 s + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test01/test01.cpp b/src/systemc/tests/systemc/kernel/sc_time/test01/test01.cpp new file mode 100644 index 000000000..31d8e8e8f --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test01/test01.cpp @@ -0,0 +1,315 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_time's methods + +#include "systemc.h" + +void +test_print() +{ + cout << "test_print" << endl; + + sc_time t1; + cout << t1 << endl; + + uint64 v = 1230; + sc_time t2 = sc_time::from_value( v ); + cout << t2 << endl; + + v *= 10000; + sc_time t3 = sc_time::from_value( v ); + cout << t3 << endl; + + v *= 100; + sc_time t4 = sc_time::from_value( v ); + cout << t4 << endl; + + v *= 10000; + sc_time t5 = sc_time::from_value( v ); + cout << t5 << endl; + + v *= 100; + sc_time t6 = sc_time::from_value( v ); + cout << t6 << endl; + + v *= 10000; + sc_time t7 = sc_time::from_value( v ); + cout << t7 << endl; +} + +void +test_constructors() +{ + cout << "test_constructors" << endl; + + sc_time t1; + cout << t1 << endl; + + sc_time t2a( 0, SC_SEC ); + cout << t2a << endl; + + sc_time t2b( 1.2345, SC_NS ); + cout << t2b << endl; + sc_time t2c( 1.2341, SC_NS ); + cout << t2c << endl; + + sc_time t2d( 1, SC_FS ); + cout << t2d << endl; + + sc_time t2e( -1.2345, SC_NS ); + cout << t2e << endl; + sc_time t2f( -1.2341, SC_NS ); + cout << t2f << endl; + + char v1 = 1; + signed char v2 = 2; + unsigned char v3 = 3; + short v4 = 4; + unsigned short v5 = 5; + int v6 = 6; + unsigned int v7 = 7; + long v8 = 8; + unsigned long v9 = 9; + float v10 = 10; + double v11 = 11; + + sc_time t2g( v1, SC_NS ); + cout << t2g << endl; + sc_time t2h( v2, SC_NS ); + cout << t2h << endl; + sc_time t2i( v3, SC_NS ); + cout << t2i << endl; + sc_time t2j( v4, SC_NS ); + cout << t2j << endl; + sc_time t2k( v5, SC_NS ); + cout << t2k << endl; + sc_time t2l( v6, SC_NS ); + cout << t2l << endl; + sc_time t2m( v7, SC_NS ); + cout << t2m << endl; + sc_time t2n( v8, SC_NS ); + cout << t2n << endl; + sc_time t2o( v9, SC_NS ); + cout << t2o << endl; + sc_time t2p( v10, SC_NS ); + cout << t2p << endl; + sc_time t2q( v11, SC_NS ); + cout << t2q << endl; + + sc_time t3a( 0, SC_SEC ); + cout << t3a << endl; + + sc_time t3b( 1.2341, true ); + cout << t3b << endl; + sc_time t3c( 1.2345, true ); + cout << t3c << endl; + sc_time t3d( -1.2341, true ); + cout << t3d << endl; + sc_time t3e( -1.2345, true ); + cout << t3e << endl; + + sc_time t3f( 1.2345, false ); + cout << t3f << endl; + sc_time t3g( 1.5432, false ); + cout << t3g << endl; + sc_time t3h( -1.2345, false ); + cout << t3h << endl; + sc_time t3i( -1.5432, false ); + cout << t3i << endl; + +#if !defined( _MSC_VER ) + sc_time t4a( 0ull, true ); + cout << t4a << endl; + sc_time t4b( 25ull, true ); + cout << t4b << endl; + sc_time t4c( 25ull, false ); + cout << t4c << endl; +#else + sc_time t4a( 0ui64, true ); + cout << t4a << endl; + sc_time t4b( 25ui64, true ); + cout << t4b << endl; + sc_time t4c( 25ui64, false ); + cout << t4c << endl; +#endif + + sc_time t5( t4c ); + cout << t5 << endl; +} + +void +test_assignment() +{ + cout << "test_assignment" << endl; + + sc_time t1; + + sc_time t2; + t1 = t2; + cout << t1 << endl; + + sc_time t3( 1.2345, SC_NS ); + t1 = t3; + cout << t1 << endl; + + sc_time t4( -1.5432, SC_NS ); + t1 = t4; + cout << t1 << endl; +} + +void +test_conversion() +{ + cout << "test_conversion" << endl; + + sc_time t1; + cout << t1.value() << endl; + cout << t1.to_double() << endl; + cout << t1 << endl; + cout << t1.to_seconds() << endl; + + sc_time t2( 1.2345, SC_US ); + cout << t2.value() << endl; + cout << t2.to_double() << endl; + cout << t2 << endl; + cout << t2.to_seconds() << endl; + + sc_time t3( -1.5432, SC_NS ); + cout << t3.value() << endl; + cout << t3.to_double() << endl; + cout << t3 << endl; + cout << t3.to_seconds() << endl; +} + +void +test_relational() +{ + cout << "test_relational" << endl; + + sc_time t1; + sc_time t2( 1, SC_FS ); + sc_time t3( 1.2345, SC_NS ); + sc_time t4( 1.2341, SC_NS ); + sc_time t5( -1.5432, SC_NS ); + + cout << ( t1 == t2 ) << endl; + cout << ( t1 != t2 ) << endl; + cout << ( t1 < t2 ) << endl; + cout << ( t1 <= t2 ) << endl; + cout << ( t1 > t2 ) << endl; + cout << ( t1 >= t2 ) << endl; + + cout << ( t3 == t4 ) << endl; + cout << ( t3 != t4 ) << endl; + cout << ( t3 < t4 ) << endl; + cout << ( t3 <= t4 ) << endl; + cout << ( t3 > t4 ) << endl; + cout << ( t3 >= t4 ) << endl; + + cout << ( t1 == t5 ) << endl; + cout << ( t1 != t5 ) << endl; + cout << ( t1 < t5 ) << endl; + cout << ( t1 <= t5 ) << endl; + cout << ( t1 > t5 ) << endl; + cout << ( t1 >= t5 ) << endl; +} + +void +test_arithmetic() +{ + cout << "test_arithmetic" << endl; + + sc_time t1; + sc_time t2( 1, SC_FS ); + sc_time t3( 1.2345, SC_NS ); + sc_time t4( 1.2341, SC_NS ); + sc_time t5( -1.5432, SC_NS ); + + cout << ( t1 + t2 ) << endl; + cout << ( t1 + t3 ) << endl; + cout << ( t1 + t5 ) << endl; + cout << ( t3 + t2 ) << endl; + cout << ( t3 + t4 ) << endl; + cout << ( t3 + t5 ) << endl; + cout << ( t5 + t5 ) << endl; + + cout << ( t1 - t2 ) << endl; + cout << ( t1 - t3 ) << endl; + cout << ( t1 - t5 ) << endl; + cout << ( t3 - t4 ) << endl; + cout << ( t3 - t5 ) << endl; + cout << ( t5 - t5 ) << endl; + + cout << ( t1 * 1.2345 ) << endl; + cout << ( 1.2345 * t3 ) << endl; + cout << ( t4 * 2 ) << endl; + + cout << ( t1 / 1.2345 ) << endl; + cout << ( t4 / 2 ) << endl; + cout << ( t3 / t4 ) << endl; + + cout << ( t2 += t3 ) << endl; + cout << ( t2 -= t4 ) << endl; + cout << ( t2 *= 1.2345 ) << endl; + cout << ( t2 /= 2 ) << endl; +} + +void +test_SC_ZERO_TIME() +{ + cout << "test_SC_ZERO_TIME" << endl; + + cout << SC_ZERO_TIME << endl; +} + +int +sc_main( int, char*[] ) +{ +#if defined(_MSC_VER) && _MSC_VER < 1900 + _set_output_format(_TWO_DIGIT_EXPONENT); +#endif + test_print(); + test_constructors(); + test_assignment(); + test_conversion(); + test_relational(); + test_arithmetic(); + test_SC_ZERO_TIME(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test02/golden/test02.log b/src/systemc/tests/systemc/kernel/sc_time/test02/golden/test02.log new file mode 100644 index 000000000..8bfeddd7c --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test02/golden/test02.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E514) set time resolution failed: value not positive +In file: diff --git a/src/systemc/tests/systemc/kernel/sc_time/test02/test02.cpp b/src/systemc/tests/systemc/kernel/sc_time/test02/test02.cpp new file mode 100644 index 000000000..d078bae2f --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test02/test02.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_time_resolution + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_time_resolution( -1, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test03/golden/test03.log b/src/systemc/tests/systemc/kernel/sc_time/test03/golden/test03.log new file mode 100644 index 000000000..146dd4c2e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test03/golden/test03.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E514) set time resolution failed: value not a power of ten +In file: diff --git a/src/systemc/tests/systemc/kernel/sc_time/test03/test03.cpp b/src/systemc/tests/systemc/kernel/sc_time/test03/test03.cpp new file mode 100644 index 000000000..925fa543a --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test03/test03.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_time_resolution + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_time_resolution( 15, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test04/golden/test04.log b/src/systemc/tests/systemc/kernel/sc_time/test04/golden/test04.log new file mode 100644 index 000000000..2338c8de5 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test04/golden/test04.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Error: (E514) set time resolution failed: simulation running +In file: +In process: src.main_action @ 0 s diff --git a/src/systemc/tests/systemc/kernel/sc_time/test04/test04.cpp b/src/systemc/tests/systemc/kernel/sc_time/test04/test04.cpp new file mode 100644 index 000000000..fd71d60d5 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test04/test04.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_time_resolution + +#include "systemc.h" + +SC_MODULE( source ) +{ + sc_in_clk clk; + sc_out out; + + void main_action() + { + sc_set_time_resolution( 10, SC_PS ); + int a = 0; + while( true ) { + wait(); + out = ++ a; + } + } + + SC_CTOR( source ) + { + SC_THREAD( main_action ); + sensitive << clk.pos(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "clk" ); + sc_signal sig( "sig" ); + + source src( "src" ); + src.clk( clk ); + src.out( sig ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test05/golden/test05.log b/src/systemc/tests/systemc/kernel/sc_time/test05/golden/test05.log new file mode 100644 index 000000000..2338c8de5 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test05/golden/test05.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Error: (E514) set time resolution failed: simulation running +In file: +In process: src.main_action @ 0 s diff --git a/src/systemc/tests/systemc/kernel/sc_time/test05/test05.cpp b/src/systemc/tests/systemc/kernel/sc_time/test05/test05.cpp new file mode 100644 index 000000000..c517afcc6 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test05/test05.cpp @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_time_resolution + +#include "systemc.h" + +SC_MODULE( source ) +{ + sc_in_clk clk; + sc_out out; + + void main_action() + { + sc_set_time_resolution( 10, SC_PS ); + int a = 0; + while( true ) { + wait(); + out = ++ a; + } + } + + SC_CTOR( source ) + { + SC_CTHREAD( main_action, clk.pos() ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "clk" ); + sc_signal sig( "sig" ); + + source src( "src" ); + src.clk( clk ); + src.out( sig ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test06/golden/test06.log b/src/systemc/tests/systemc/kernel/sc_time/test06/golden/test06.log new file mode 100644 index 000000000..2338c8de5 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test06/golden/test06.log @@ -0,0 +1,5 @@ +SystemC Simulation + +Error: (E514) set time resolution failed: simulation running +In file: +In process: src.main_action @ 0 s diff --git a/src/systemc/tests/systemc/kernel/sc_time/test06/test06.cpp b/src/systemc/tests/systemc/kernel/sc_time/test06/test06.cpp new file mode 100644 index 000000000..b2db9d513 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test06/test06.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_time_resolution + +#include "systemc.h" + +SC_MODULE( source ) +{ + sc_in_clk clk; + sc_out out; + + int a; + + void main_action() + { + if( m_first_time ) { + sc_set_time_resolution( 10, SC_PS ); + a = 0; + m_first_time = false; + } else { + out = ++ a; + } + } + + SC_CTOR( source ) + : m_first_time( true ) + { + SC_METHOD( main_action ); + sensitive << clk.pos(); + } + +private: + + bool m_first_time; +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "clk" ); + sc_signal sig( "sig" ); + + source src( "src" ); + src.clk( clk ); + src.out( sig ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test07/golden/test07.log b/src/systemc/tests/systemc/kernel/sc_time/test07/golden/test07.log new file mode 100644 index 000000000..cc032fff1 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test07/golden/test07.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E514) set time resolution failed: already specified +In file: diff --git a/src/systemc/tests/systemc/kernel/sc_time/test07/test07.cpp b/src/systemc/tests/systemc/kernel/sc_time/test07/test07.cpp new file mode 100644 index 000000000..ea9f8efb3 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test07/test07.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_time_resolution + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_time_resolution( 1, SC_NS ); + sc_set_time_resolution( 10, SC_FS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test08/golden/test08.log b/src/systemc/tests/systemc/kernel/sc_time/test08/golden/test08.log new file mode 100644 index 000000000..0465b8580 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test08/golden/test08.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E514) set time resolution failed: sc_time object(s) constructed +In file: diff --git a/src/systemc/tests/systemc/kernel/sc_time/test08/test08.cpp b/src/systemc/tests/systemc/kernel/sc_time/test08/test08.cpp new file mode 100644 index 000000000..982acd6cb --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test08/test08.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_time_resolution + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_time t1( 1.2345, SC_NS ); + sc_set_time_resolution( 10, SC_FS ); + cout << t1; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test09/golden/test09.log b/src/systemc/tests/systemc/kernel/sc_time/test09/golden/test09.log new file mode 100644 index 000000000..baf367a10 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test09/golden/test09.log @@ -0,0 +1,4 @@ +SystemC Simulation + +Error: (E514) set time resolution failed: value smaller than 1 fs +In file: diff --git a/src/systemc/tests/systemc/kernel/sc_time/test09/test09.cpp b/src/systemc/tests/systemc/kernel/sc_time/test09/test09.cpp new file mode 100644 index 000000000..108f71cd2 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test09/test09.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test09.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_time_resolution + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_time_resolution( 0.1, SC_FS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test10/golden/test10.log b/src/systemc/tests/systemc/kernel/sc_time/test10/golden/test10.log new file mode 100644 index 000000000..22116047d --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test10/golden/test10.log @@ -0,0 +1,13 @@ +SystemC Simulation +1 fs + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_get_default_time_unit +1 ns + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test10/test10.cpp b/src/systemc/tests/systemc/kernel/sc_time/test10/test10.cpp new file mode 100644 index 000000000..55f7ed908 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test10/test10.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of functions sc_set_time_resolution and sc_get_time_resolution + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_time_resolution( 1, SC_FS ); + cout << sc_get_time_resolution() << endl; + cout << sc_get_default_time_unit() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test11/golden/test11.log b/src/systemc/tests/systemc/kernel/sc_time/test11/golden/test11.log new file mode 100644 index 000000000..2286a20df --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test11/golden/test11.log @@ -0,0 +1,16 @@ +SystemC Simulation + +Warning: (W516) default time unit changed to time resolution +In file: +10 ns + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_get_default_time_unit +10 ns + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test11/test11.cpp b/src/systemc/tests/systemc/kernel/sc_time/test11/test11.cpp new file mode 100644 index 000000000..1828c6928 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test11/test11.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test11.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of functions sc_set_time_resolution and sc_get_time_resolution + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_time_resolution( 10, SC_NS ); + cout << sc_get_time_resolution() << endl; + cout << sc_get_default_time_unit() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test12/golden/test12.log b/src/systemc/tests/systemc/kernel/sc_time/test12/golden/test12.log new file mode 100644 index 000000000..427796f5c --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test12/golden/test12.log @@ -0,0 +1,14 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_set_default_time_unit + +Error: (E515) set default time unit failed: value not positive +In file: + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test12/test12.cpp b/src/systemc/tests/systemc/kernel/sc_time/test12/test12.cpp new file mode 100644 index 000000000..cd9b0296a --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test12/test12.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test12.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_default_time_unit + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_default_time_unit( -1, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test13/golden/test13.log b/src/systemc/tests/systemc/kernel/sc_time/test13/golden/test13.log new file mode 100644 index 000000000..891bf5731 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test13/golden/test13.log @@ -0,0 +1,14 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_set_default_time_unit + +Error: (E515) set default time unit failed: value not a power of ten +In file: + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test13/test13.cpp b/src/systemc/tests/systemc/kernel/sc_time/test13/test13.cpp new file mode 100644 index 000000000..6dacb61b3 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test13/test13.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test13.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_default_time_unit + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_default_time_unit( 15, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test14/golden/test14.log b/src/systemc/tests/systemc/kernel/sc_time/test14/golden/test14.log new file mode 100644 index 000000000..91366709d --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test14/golden/test14.log @@ -0,0 +1,15 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_set_default_time_unit + +Error: (E515) set default time unit failed: simulation running +In file: +In process: src.main_action @ 0 s + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test14/test14.cpp b/src/systemc/tests/systemc/kernel/sc_time/test14/test14.cpp new file mode 100644 index 000000000..d05f8a41c --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test14/test14.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test14.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_default_time_unit + +#include "systemc.h" + +SC_MODULE( source ) +{ + sc_in_clk clk; + sc_out out; + + void main_action() + { + sc_set_default_time_unit( 10, SC_PS ); + int a = 0; + while( true ) { + wait(); + out = ++ a; + } + } + + SC_CTOR( source ) + { + SC_THREAD( main_action ); + sensitive << clk.pos(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "clk" ); + sc_signal sig( "sig" ); + + source src( "src" ); + src.clk( clk ); + src.out( sig ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test15/golden/test15.log b/src/systemc/tests/systemc/kernel/sc_time/test15/golden/test15.log new file mode 100644 index 000000000..ed48a2b5e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test15/golden/test15.log @@ -0,0 +1,14 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_set_default_time_unit + +Error: (E515) set default time unit failed: already specified +In file: + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test15/test15.cpp b/src/systemc/tests/systemc/kernel/sc_time/test15/test15.cpp new file mode 100644 index 000000000..03be11a37 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test15/test15.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test15.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_default_time_unit + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_default_time_unit( 1, SC_NS ); + sc_set_default_time_unit( 10, SC_FS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test16/golden/test16.log b/src/systemc/tests/systemc/kernel/sc_time/test16/golden/test16.log new file mode 100644 index 000000000..775681584 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test16/golden/test16.log @@ -0,0 +1,14 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_set_default_time_unit + +Error: (E515) set default time unit failed: value smaller than time resolution +In file: + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test16/test16.cpp b/src/systemc/tests/systemc/kernel/sc_time/test16/test16.cpp new file mode 100644 index 000000000..89a0cd638 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test16/test16.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test16.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of function sc_set_default_time_unit + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_default_time_unit( 10, SC_FS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test17/golden/test17.log b/src/systemc/tests/systemc/kernel/sc_time/test17/golden/test17.log new file mode 100644 index 000000000..8bda9c5a4 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test17/golden/test17.log @@ -0,0 +1,14 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_set_default_time_unit + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_get_default_time_unit +10 ms + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/kernel/sc_time/test17/test17.cpp b/src/systemc/tests/systemc/kernel/sc_time/test17/test17.cpp new file mode 100644 index 000000000..7bcf3d385 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test17/test17.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test17.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of functions sc_set_default_time_unit and sc_get_default_time_unit + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_set_default_time_unit( 10, SC_MS ); + cout << sc_get_default_time_unit() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test18/golden/test18.log b/src/systemc/tests/systemc/kernel/sc_time/test18/golden/test18.log new file mode 100644 index 000000000..4c1985e07 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test18/golden/test18.log @@ -0,0 +1,8 @@ +SystemC Simulation +8 ns throwing +8 ns caught +9 ns throwing +9 ns caught +10 ns throwing +10 ns caught +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_time/test18/test18.cpp b/src/systemc/tests/systemc/kernel/sc_time/test18/test18.cpp new file mode 100644 index 000000000..18a723d0e --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test18/test18.cpp @@ -0,0 +1,88 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test18.cpp -- Test that time cannot go backwards in simulator + + Original Author: Andy Goodrich, Forte Design Systems, 2006-05-03 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test18.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:06 acg +// systemc_tests-2.3 +// +// Revision 1.1 2006/05/03 19:37:10 acg +// Andy Goodrich: new test to check that time will not run backward if a +// negative value is given to sc_event::notify() +// + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_METHOD(catcher); + sensitive << m_event; + dont_initialize(); + SC_CTHREAD(thrower,m_clk.pos()); + } + void catcher() + { + cout << sc_time_stamp() << " caught" << endl; + } + void thrower() + { + sc_time minus_four(-4.0, SC_NS); + wait(7); + for (;;) + { + wait(); + cout << sc_time_stamp() << " throwing" << endl; + m_event.notify(minus_four); + } + } + sc_in m_clk; + sc_event m_event; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + + sc_start(11, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_time/test19/golden/test19.log b/src/systemc/tests/systemc/kernel/sc_time/test19/golden/test19.log new file mode 100644 index 000000000..20d4fe0a1 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test19/golden/test19.log @@ -0,0 +1,83 @@ +SystemC Simulation + +Resolution = 1 ps +10 ns, value=10000 + t.value=10, t.unit=ns +100 ns, value=100000 + t.value=100, t.unit=ns +1 us, value=1000000 + t.value=1, t.unit=us +100 ns, value=100000 + t.value=100, t.unit=ns +1 us, value=1000000 + t.value=1, t.unit=us +10 us, value=10000000 + t.value=10, t.unit=us +100 us, value=100000000 + t.value=100, t.unit=us +1 ms, value=1000000000 + t.value=1, t.unit=ms +100 s, value=100000000000000 + t.value=100, t.unit=s + +Resolution = 100 fs +10 ns, value=100000 + t.value=10, t.unit=ns +100 ns, value=1000000 + t.value=100, t.unit=ns +1 us, value=10000000 + t.value=1, t.unit=us +100 ns, value=1000000 + t.value=100, t.unit=ns +1 us, value=10000000 + t.value=1, t.unit=us +10 us, value=100000000 + t.value=10, t.unit=us +100 us, value=1000000000 + t.value=100, t.unit=us +1 ms, value=10000000000 + t.value=1, t.unit=ms +100 s, value=1000000000000000 + t.value=100, t.unit=s + +Resolution = 10 fs +10 ns, value=1000000 + t.value=10, t.unit=ns +100 ns, value=10000000 + t.value=100, t.unit=ns +1 us, value=100000000 + t.value=1, t.unit=us +100 ns, value=10000000 + t.value=100, t.unit=ns +1 us, value=100000000 + t.value=1, t.unit=us +10 us, value=1000000000 + t.value=10, t.unit=us +100 us, value=10000000000 + t.value=100, t.unit=us +1 ms, value=100000000000 + t.value=1, t.unit=ms +100 s, value=10000000000000000 + t.value=100, t.unit=s + +Resolution = 1 fs +10 ns, value=10000000 + t.value=10, t.unit=ns +100 ns, value=100000000 + t.value=100, t.unit=ns +1 us, value=1000000000 + t.value=1, t.unit=us +100 ns, value=100000000 + t.value=100, t.unit=ns +1 us, value=1000000000 + t.value=1, t.unit=us +10 us, value=10000000000 + t.value=10, t.unit=us +100 us, value=100000000000 + t.value=100, t.unit=us +1 ms, value=1000000000000 + t.value=1, t.unit=ms +100 s, value=100000000000000000 + t.value=100, t.unit=s + +Program completed diff --git a/src/systemc/tests/systemc/kernel/sc_time/test19/test19.cpp b/src/systemc/tests/systemc/kernel/sc_time/test19/test19.cpp new file mode 100644 index 000000000..c7a7f357c --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_time/test19/test19.cpp @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test19.cpp -- Test sc_time string/tuple conversions + + Original Author: Philipp A. Hartmann, OFFIS + + *****************************************************************************/ + + +#include "systemc.h" + +void check_time( const sc_time& t, sc_time_unit tu, const std::string & str ) +{ + sc_time_tuple tp = t; + + std::cout << t.to_string() << ", value=" << t.value() << std::endl; + std::cout << " "; + if( tp.has_value() ) + std::cout << "t.value=" << tp.value(); + else + std::cout << "t.double=" << tp.to_double(); + std::cout << ", t.unit=" << tp.unit_symbol() + << std::endl; + + sc_assert( tp.has_value() ); + sc_assert( t.to_string() == str ); + sc_assert( tp.to_string() == t.to_string() ); + sc_assert( tp.unit() == tu ); + + sc_time u = sc_time::from_string( str.c_str() ); + sc_assert( t == u ); + sc_assert( u == tp ); + sc_assert( tp.unit() == sc_time_tuple(u).unit() ); + + u = sc_time( tp.to_double(), tp.unit_symbol() ); + sc_assert( t == u ); + sc_assert( u == tp ); + sc_assert( tp.unit() == sc_time_tuple(u).unit() ); +} + +int sc_main( int, char*[] ) +{ + sc_report_handler::set_actions( SC_ID_SET_TIME_RESOLUTION_, SC_DO_NOTHING ); + sc_report_handler::set_actions( SC_ID_TIME_CONVERSION_FAILED_, SC_DISPLAY ); + + unsigned resolutions[] = { 100, 10, 1 }; + sc_time_unit resunit = SC_FS; + unsigned* res = resolutions; + + while( true ) + { + std::cout << "\nResolution = " << sc_get_time_resolution() << std::endl; + + check_time( sc_time( 10, SC_NS), SC_NS, "10 ns" ); + check_time( sc_time( 100, SC_NS), SC_NS, "100 ns" ); + check_time( sc_time(1000, SC_NS), SC_US, "1 us" ); + check_time( sc_time( 0.1, SC_US), SC_NS, "100 ns" ); + check_time( sc_time( 1, SC_US), SC_US, "1 us" ); + check_time( sc_time( 10, SC_US), SC_US, "10 us" ); + check_time( sc_time( 100, SC_US), SC_US, "100 us" ); + check_time( sc_time(1000, SC_US), SC_MS, "1 ms" ); + check_time( sc_time( 100, SC_SEC), SC_SEC, "100 s" ); + + // exit loop before final resolution update + if (res == resolutions + (sizeof(resolutions)/sizeof(*resolutions))) + break; + + sc_set_time_resolution( *res, resunit ); + res++; + } + + cout << "\nProgram completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_ver/test01/golden/test01.log b/src/systemc/tests/systemc/kernel/sc_ver/test01/golden/test01.log new file mode 100644 index 000000000..edb2082ee --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_ver/test01/golden/test01.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Info: sc_api_version: in sc_main diff --git a/src/systemc/tests/systemc/kernel/sc_ver/test01/main.cpp b/src/systemc/tests/systemc/kernel/sc_ver/test01/main.cpp new file mode 100644 index 000000000..31191736a --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_ver/test01/main.cpp @@ -0,0 +1,38 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Test consistency check of SC_DEFAULT_WRITER_POLICY setting + (see test-unchecked.cpp) + + Original Author: Philipp A. Hartmann, OFFIS, 2013-11-05 + +*****************************************************************************/ + +#ifndef SC_DEFAULT_WRITER_POLICY +# define SC_DEFAULT_WRITER_POLICY SC_MANY_WRITERS +#endif +#include + +int sc_main(int,char*[]) +{ + SC_REPORT_INFO( "sc_api_version", "in sc_main" ); + return 0; +} diff --git a/src/systemc/tests/systemc/kernel/sc_ver/test01/test-unchecked.cpp b/src/systemc/tests/systemc/kernel/sc_ver/test01/test-unchecked.cpp new file mode 100644 index 000000000..e9e3b4a59 --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_ver/test01/test-unchecked.cpp @@ -0,0 +1,33 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test-unchecked.cpp -- force SC_DEFAULT_WRITER_POLICY to SC_MANY_WRITERS + (for consistency checking) + + Original Author: Philipp A. Hartmann, OFFIS, 2013-11-05 + +*****************************************************************************/ + +#ifdef SC_DEFAULT_WRITER_POLICY +# undef SC_DEFAULT_WRITER_POLICY +#endif +#define SC_DEFAULT_WRITER_POLICY SC_MANY_WRITERS +#include diff --git a/src/systemc/tests/systemc/kernel/sc_ver/test01/test01.f b/src/systemc/tests/systemc/kernel/sc_ver/test01/test01.f new file mode 100644 index 000000000..215a2ebff --- /dev/null +++ b/src/systemc/tests/systemc/kernel/sc_ver/test01/test01.f @@ -0,0 +1,2 @@ +test01/main.cpp +test01/test-unchecked.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.cpp new file mode 100644 index 000000000..10eb25125 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.cpp @@ -0,0 +1,165 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + addition.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "addition.h" + +void addition::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 1; + tmp5 = tmp5 + 1; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + // execute increment post-operation and write outputs + out_value1.write(tmp1++); + out_value2.write(tmp2++); + out_value3.write(tmp3++); + out_value4.write(tmp4++); + out_value5.write(tmp5++); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + // execute increment pre-operation and write outputs + out_value1.write(++tmp1); + out_value2.write(++tmp2); + out_value3.write(++tmp3); + out_value4.write(++tmp4); + out_value5.write(++tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations with overflow + tmp1 = tmp1 + 254; + tmp2 = tmp2 + 254; + tmp3 = tmp3 + 254; + tmp4 = tmp4 + 254; + tmp5 = tmp5 + 254; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations with self assignment + tmp1 += 254; + tmp2 += 254; + tmp3 += 254; + tmp4 += 254; + tmp5 += 254; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations with signed and unsigned mix and mixed bit width + tmp1 = (tmp3 + tmp2).to_int(); + tmp2 = tmp2 + tmp4; + tmp3 = tmp3 + tmp5; + tmp4 = tmp4 + tmp5; + tmp5 = tmp4 + tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.f new file mode 100644 index 000000000..b4ba6bd0f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.f @@ -0,0 +1,4 @@ +addition/stimulus.cpp +addition/display.cpp +addition/addition.cpp +addition/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.h new file mode 100644 index 000000000..899bc9983 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/addition.h @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + addition.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( addition ) +{ + SC_HAS_PROCESS( addition ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal& in_value1; + const sc_signal_bool_vector4& in_value2; + const sc_signal_bool_vector4& in_value3; + const sc_signal_bool_vector8& in_value4; + const sc_signal_bool_vector8& in_value5; + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal_bool_vector4& out_value2; + sc_signal_bool_vector4& out_value3; + sc_signal_bool_vector8& out_value4; + sc_signal_bool_vector8& out_value5; + sc_signal& out_valid; + + // + // Constructor + // + + addition( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), // connection definition + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.cpp new file mode 100644 index 000000000..38e5c8b61 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data3.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.h new file mode 100644 index 000000000..4c20196ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/display.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/golden/addition.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/golden/addition.log new file mode 100644 index 000000000..ee6b81b72 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/golden/addition.log @@ -0,0 +1,31 @@ +SystemC Simulation +Stimuli : 0 0 0 0 0 at 23 ns +Display : 1 0001 0001 00000001 00000001 at 27 ns +Display : 1 0001 0001 00000001 00000001 at 29 ns +Display : 3 0011 0011 00000011 00000011 at 31 ns +Display : 257 0001 0001 00000001 00000001 at 34 ns +Display : 511 1111 1111 11111111 11111111 at 37 ns +Display : 14 1110 1110 11111110 11111101 at 40 ns +Stimuli : 1 1 1 1 1 at 44 ns +Display : 2 0010 0010 00000010 00000010 at 48 ns +Display : 2 0010 0010 00000010 00000010 at 50 ns +Display : 4 0100 0100 00000100 00000100 at 52 ns +Display : 258 0010 0010 00000010 00000010 at 55 ns +Display : 512 0000 0000 00000000 00000000 at 58 ns +Display : 0 0000 0000 00000000 00000000 at 61 ns +Stimuli : 2 2 2 2 2 at 65 ns +Display : 3 0011 0011 00000011 00000011 at 69 ns +Display : 3 0011 0011 00000011 00000011 at 71 ns +Display : 5 0101 0101 00000101 00000101 at 73 ns +Display : 259 0011 0011 00000011 00000011 at 76 ns +Display : 513 0001 0001 00000001 00000001 at 79 ns +Display : 2 0010 0010 00000010 00000011 at 82 ns +Stimuli : 3 3 3 3 3 at 86 ns +Display : 4 0100 0100 00000100 00000100 at 90 ns +Display : 4 0100 0100 00000100 00000100 at 92 ns +Display : 6 0110 0110 00000110 00000110 at 94 ns +Display : 260 0100 0100 00000100 00000100 at 97 ns +Display : 514 0010 0010 00000010 00000010 at 100 ns +Display : 4 0100 0100 00000100 00000110 at 103 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/main.cpp new file mode 100644 index 000000000..3e32605f9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/main.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "addition.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + addition addition1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.cpp new file mode 100644 index 000000000..2d43a45c4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 0; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value2 = 0; + send_value3 = 0; + send_value4 = 0; + send_value5 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1++; + send_value2 = send_value2+1; + send_value3 = send_value3+1; + send_value4 = send_value4+1; + send_value5 = send_value5+1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.h new file mode 100644 index 000000000..b73fb9d4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/stimulus.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.cpp new file mode 100644 index 000000000..df19755c1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "bitwidth.h" + +void bitwidth::entry(){ + + sc_bigint<4> tmp1; + sc_biguint<4> tmp2; + sc_bigint<6> tmp3; + sc_biguint<6> tmp4; + sc_bigint<8> tmp5; + sc_biguint<8> tmp6; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + //execute simple operations + // expected bitwidth 4 4 4 signed + tmp1 = tmp1 + tmp2; + // expected bitwidth 4 6 6 signed + tmp3 = tmp1 + tmp3; + // expected bitwidth 4 4 6 signed + tmp6 = tmp2 + tmp1; + // expected bitwidth 8 8 6 signed + tmp4 = tmp5 + tmp6; + // expected bitwidth 6 8 4 unsigned + tmp2 = tmp4 + tmp6; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.f new file mode 100644 index 000000000..53a59162e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.f @@ -0,0 +1,4 @@ +bitwidth/stimulus.cpp +bitwidth/display.cpp +bitwidth/bitwidth.cpp +bitwidth/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.h new file mode 100644 index 000000000..9ced486ea --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/bitwidth.h @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( bitwidth ) +{ + SC_HAS_PROCESS( bitwidth ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector4& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector6& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal_bool_vector8& in_value6; // Input port + const sc_signal& in_valid; // Input port + sc_signal_bool_vector4& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector6& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal_bool_vector8& out_value6; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + bitwidth ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector4& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector6& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal_bool_vector8& IN_VALUE6, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector4& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector6& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal_bool_vector8& OUT_VALUE6, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/common.h new file mode 100644 index 000000000..2a49981d9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector6; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.cpp new file mode 100644 index 000000000..76acd9e62 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << in_data6.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.h new file mode 100644 index 000000000..d35bb1abc --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/display.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector4& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector6& in_data3; // Input port + const sc_signal_bool_vector6& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal_bool_vector8& in_data6; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector4& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector6& IN_DATA3, + const sc_signal_bool_vector6& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal_bool_vector8& IN_DATA6, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_data6(IN_DATA6), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/golden/bitwidth.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/golden/bitwidth.log new file mode 100644 index 000000000..d8f3d5726 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/golden/bitwidth.log @@ -0,0 +1,51 @@ +SystemC Simulation +Stimuli : 0 0 0 0 0 0 at 23 ns +Display : 0000 0000 000000 000000 00000000 00000000 at 27 ns +Stimuli : 2 2 8 8 32 32 at 44 ns +Display : 0100 1100 001100 100110 00100000 00000110 at 48 ns +Stimuli : 4 4 16 16 64 64 at 65 ns +Display : 1000 1000 001000 111100 01000000 11111100 at 69 ns +Stimuli : 6 6 24 24 96 96 at 86 ns +Display : 1100 0100 010100 100010 01100000 00000010 at 90 ns +Stimuli : -8 8 -32 32 -128 128 at 107 ns +Display : 0000 0000 100000 001000 10000000 00001000 at 111 ns +Stimuli : -6 10 -24 40 -96 160 at 128 ns +Display : 0100 1100 101100 101110 10100000 00001110 at 132 ns +Stimuli : -4 12 -16 48 -64 192 at 149 ns +Display : 1000 1000 101000 000100 11000000 00000100 at 153 ns +Stimuli : -2 14 -8 56 -32 224 at 170 ns +Display : 1100 0100 110100 101010 11100000 00001010 at 174 ns +Stimuli : 0 0 0 0 0 0 at 191 ns +Display : 0000 0000 000000 000000 00000000 00000000 at 195 ns +Stimuli : 2 2 8 8 32 32 at 212 ns +Display : 0100 1100 001100 100110 00100000 00000110 at 216 ns +Stimuli : 4 4 16 16 64 64 at 233 ns +Display : 1000 1000 001000 111100 01000000 11111100 at 237 ns +Stimuli : 6 6 24 24 96 96 at 254 ns +Display : 1100 0100 010100 100010 01100000 00000010 at 258 ns +Stimuli : -8 8 -32 32 -128 128 at 275 ns +Display : 0000 0000 100000 001000 10000000 00001000 at 279 ns +Stimuli : -6 10 -24 40 -96 160 at 296 ns +Display : 0100 1100 101100 101110 10100000 00001110 at 300 ns +Stimuli : -4 12 -16 48 -64 192 at 317 ns +Display : 1000 1000 101000 000100 11000000 00000100 at 321 ns +Stimuli : -2 14 -8 56 -32 224 at 338 ns +Display : 1100 0100 110100 101010 11100000 00001010 at 342 ns +Stimuli : 0 0 0 0 0 0 at 359 ns +Display : 0000 0000 000000 000000 00000000 00000000 at 363 ns +Stimuli : 2 2 8 8 32 32 at 380 ns +Display : 0100 1100 001100 100110 00100000 00000110 at 384 ns +Stimuli : 4 4 16 16 64 64 at 401 ns +Display : 1000 1000 001000 111100 01000000 11111100 at 405 ns +Stimuli : 6 6 24 24 96 96 at 422 ns +Display : 1100 0100 010100 100010 01100000 00000010 at 426 ns +Stimuli : -8 8 -32 32 -128 128 at 443 ns +Display : 0000 0000 100000 001000 10000000 00001000 at 447 ns +Stimuli : -6 10 -24 40 -96 160 at 464 ns +Display : 0100 1100 101100 101110 10100000 00001110 at 468 ns +Stimuli : -4 12 -16 48 -64 192 at 485 ns +Display : 1000 1000 101000 000100 11000000 00000100 at 489 ns +Stimuli : -2 14 -8 56 -32 224 at 506 ns +Display : 1100 0100 110100 101010 11100000 00001010 at 510 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/main.cpp new file mode 100644 index 000000000..238dd032a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/main.cpp @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "bitwidth.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector4 stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector6 stimulus_line3; + sc_signal_bool_vector6 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal_bool_vector8 stimulus_line6; + sc_signal input_valid; + sc_signal output_valid; + sc_signal_bool_vector4 result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector6 result_line3; + sc_signal_bool_vector6 result_line4; + sc_signal_bool_vector8 result_line5; + sc_signal_bool_vector8 result_line6; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid); + + bitwidth bitwidth1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.cpp new file mode 100644 index 000000000..15546d1b2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.cpp @@ -0,0 +1,94 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() { + sc_signed send_value1(4); + sc_unsigned send_value2(4); + sc_signed send_value3(6); + sc_unsigned send_value4(6); + sc_signed send_value5(8); + sc_unsigned send_value6(8); + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value1 = 0; + send_value2 = 0; + send_value3 = 0; + send_value4 = 0; + send_value5 = 0; + send_value6 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + out_stimulus6.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_stimulus6.write( send_value6 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " + << send_value6 << " " << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+2; + send_value2 = send_value2+2; + send_value3 = send_value3+8; + send_value4 = send_value4+8; + send_value5 = send_value5+32; + send_value6 = send_value6+32; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.h new file mode 100644 index 000000000..edbd6be48 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/stimulus.h @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-08-02 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector4& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector6& out_stimulus3; + sc_signal_bool_vector6& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal_bool_vector8& out_stimulus6; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector4& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector6& OUT_STIMULUS3, + sc_signal_bool_vector6& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal_bool_vector8& OUT_STIMULUS6, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_stimulus6(OUT_STIMULUS6), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.cpp new file mode 100644 index 000000000..753647536 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "datatypes.h" +#define true 1 +#define false 0 + +void datatypes::entry() + +{ + + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + +// define 1 dimensional array + int tmp7[2]; + char tmp8[2]; + // int tmp9[2]; + int* tmp9; + +// define sc_bool_vector + sc_bv<4> tmp10; + tmp10[3] = 0; tmp10[2] = 1; tmp10[1] = 0; tmp10[0] = 1; + +// define 2 dimentional array + sc_bv<1> tmp11[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// + +// initialization of sc_array + + tmp7[0] = 3; + tmp7[1] = 12; + tmp8[0] = 'S'; + tmp8[1] = 'C'; + tmp9 = tmp7; + tmp11[0][0] = "1"; + tmp11[1][0] = "0"; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + out_ack.write(true); + + //execute mixed data type addition operations + tmp1r = tmp1 + tmp2 + (sc_bigint<1>)tmp1.range(0, 0) ; // #### + // tmp2r = tmp6 + tmp1 + int(tmp10[2]); // treat tmp10[2] as carry in + tmp2r = tmp6 + tmp1 + tmp10[2].to_bool(); // treat tmp10[2] as carry in + tmp3r = tmp4 + tmp6; + tmp4r = ++tmp5; + // tmp4r -= int(tmp11[0][0]); + tmp4r -= tmp11[0][0].to_bool(); + tmp5r = tmp6 + tmp4; + tmp6r = tmp8[0] + tmp9[1]; + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.h new file mode 100644 index 000000000..7ce8039e3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/datatypes.h @@ -0,0 +1,123 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal& in_value3; // Input port + const sc_signal& in_value4; // Input port + const sc_signal& in_value5; // Input port + const sc_signal& in_value6; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID, + + sc_signal& OUT_ACK, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.cpp new file mode 100644 index 000000000..ef7667e69 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry() { + + while(true){ + do { wait(); } while ( in_valid == false ); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << " " << in_value5.read() << " " << in_value6.read() << endl; + do { wait(); } while ( in_valid == true); + } + +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.h new file mode 100644 index 000000000..7804753f9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/display.h @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_value1; // Output port + const sc_signal_bool_vector& in_value2; // Output port + const sc_signal& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/golden/datatypes.log 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12346168 -123162 20588 +Display: 00100111 00111101 -123200 20588 7872 _ +Stimuli: 99 -57 12346173 -123159 20594 +Display: 00101001 01000010 -123193 20594 7879 _ + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/golden/datatypes.log.linuxaarch64 b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/golden/datatypes.log.linuxaarch64 new file mode 100644 index 000000000..27e506ff1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/golden/datatypes.log.linuxaarch64 @@ -0,0 +1,203 @@ +SystemC Simulation +Stimuli: 0 1 12345678 -123456 20000 +Display: 00000001 01010011 -123374 20000 7698 _ +Stimuli: 1 3 12345683 -123453 20006 +Display: 00000011 01011000 -123367 20006 7705 _ +Stimuli: 2 5 12345688 -123450 20012 +Display: 00000111 01011101 -123360 20012 7712 _ +Stimuli: 3 7 12345693 -123447 20018 +Display: 00001001 01100010 -123353 20018 7719 _ +Stimuli: 4 9 12345698 -123444 20024 +Display: 00001101 01100111 -123346 20024 7726 _ +Stimuli: 5 11 12345703 -123441 20030 +Display: 00001111 01101100 -123339 20030 7733 _ +Stimuli: 6 13 12345708 -123438 20036 +Display: 00010011 01110001 -123332 20036 7740 _ +Stimuli: 7 15 12345713 -123435 20042 +Display: 00010101 01110110 -123325 20042 7747 _ +Stimuli: 8 17 12345718 -123432 20048 +Display: 00011001 01111011 -123318 20048 7754 _ +Stimuli: 9 19 12345723 -123429 20054 +Display: 00011011 10000000 -123311 20054 7761 _ +Stimuli: 10 21 12345728 -123426 20060 +Display: 00011111 10000101 -123304 20060 7768 _ +Stimuli: 11 23 12345733 -123423 20066 +Display: 00100001 10001010 -123297 20066 7775 _ +Stimuli: 12 25 12345738 -123420 20072 +Display: 00100101 10001111 -123290 20072 7782 _ +Stimuli: 13 27 12345743 -123417 20078 +Display: 00100111 10010100 -123283 20078 7789 _ +Stimuli: 14 29 12345748 -123414 20084 +Display: 00101011 10011001 -123276 20084 7796 _ +Stimuli: 15 31 12345753 -123411 20090 +Display: 00101101 10011110 -123269 20090 7803 _ +Stimuli: 16 33 12345758 -123408 20096 +Display: 00110001 10100011 -123262 20096 7810 _ +Stimuli: 17 35 12345763 -123405 20102 +Display: 00110011 10101000 -123255 20102 7817 _ +Stimuli: 18 37 12345768 -123402 20108 +Display: 00110111 10101101 -123248 20108 7824 _ +Stimuli: 19 39 12345773 -123399 20114 +Display: 00111001 10110010 -123241 20114 7831 _ +Stimuli: 20 41 12345778 -123396 20120 +Display: 00111101 10110111 -123234 20120 7838 _ +Stimuli: 21 43 12345783 -123393 20126 +Display: 00111111 10111100 -123227 20126 7845 _ +Stimuli: 22 45 12345788 -123390 20132 +Display: 01000011 11000001 -123220 20132 7852 _ +Stimuli: 23 47 12345793 -123387 20138 +Display: 01000101 11000110 -123213 20138 7859 _ +Stimuli: 24 49 12345798 -123384 20144 +Display: 01001001 11001011 -123206 20144 7866 _ +Stimuli: 25 51 12345803 -123381 20150 +Display: 01001011 11010000 -123199 20150 7873 _ +Stimuli: 26 53 12345808 -123378 20156 +Display: 01001111 11010101 -123192 20156 7880 _ +Stimuli: 27 55 12345813 -123375 20162 +Display: 01010001 11011010 -123185 20162 7887 _ +Stimuli: 28 57 12345818 -123372 20168 +Display: 01010101 11011111 -123178 20168 7894 _ +Stimuli: 29 59 12345823 -123369 20174 +Display: 01010111 11100100 -123171 20174 7901 _ +Stimuli: 30 61 12345828 -123366 20180 +Display: 01011011 11101001 -123164 20180 7908 _ +Stimuli: 31 63 12345833 -123363 20186 +Display: 01011101 11101110 -123157 20186 7915 _ +Stimuli: 32 65 12345838 -123360 20192 +Display: 01100001 11110011 -123150 20192 7922 _ +Stimuli: 33 67 12345843 -123357 20198 +Display: 01100011 11111000 -123143 20198 7929 _ +Stimuli: 34 69 12345848 -123354 20204 +Display: 01100111 11111101 -123136 20204 7936 _ +Stimuli: 35 71 12345853 -123351 20210 +Display: 01101001 00000010 -123129 20210 7943 _ +Stimuli: 36 73 12345858 -123348 20216 +Display: 01101101 00000111 -123122 20216 7950 _ +Stimuli: 37 75 12345863 -123345 20222 +Display: 01101111 00001100 -123115 20222 7957 _ +Stimuli: 38 77 12345868 -123342 20228 +Display: 01110011 00010001 -123108 20228 7964 _ +Stimuli: 39 79 12345873 -123339 20234 +Display: 01110101 00010110 -123101 20234 7971 _ +Stimuli: 40 81 12345878 -123336 20240 +Display: 01111001 00011011 -123094 20240 7978 _ +Stimuli: 41 83 12345883 -123333 20246 +Display: 01111011 00100000 -123087 20246 7985 _ +Stimuli: 42 85 12345888 -123330 20252 +Display: 01111111 00100101 -123080 20252 7992 _ +Stimuli: 43 87 12345893 -123327 20258 +Display: 10000001 00101010 -123073 20258 7999 _ +Stimuli: 44 89 12345898 -123324 20264 +Display: 10000101 00101111 -123322 20264 7750 _ +Stimuli: 45 91 12345903 -123321 20270 +Display: 10000111 00110100 -123315 20270 7757 _ +Stimuli: 46 93 12345908 -123318 20276 +Display: 10001011 00111001 -123308 20276 7764 _ +Stimuli: 47 95 12345913 -123315 20282 +Display: 10001101 00111110 -123301 20282 7771 _ +Stimuli: 48 97 12345918 -123312 20288 +Display: 10010001 01000011 -123294 20288 7778 _ +Stimuli: 49 99 12345923 -123309 20294 +Display: 10010011 01001000 -123287 20294 7785 _ +Stimuli: 50 101 12345928 -123306 20300 +Display: 10010111 01001101 -123280 20300 7792 _ +Stimuli: 51 103 12345933 -123303 20306 +Display: 10011001 01010010 -123273 20306 7799 _ +Stimuli: 52 105 12345938 -123300 20312 +Display: 10011101 01010111 -123266 20312 7806 _ +Stimuli: 53 107 12345943 -123297 20318 +Display: 10011111 01011100 -123259 20318 7813 _ +Stimuli: 54 109 12345948 -123294 20324 +Display: 10100011 01100001 -123252 20324 7820 _ +Stimuli: 55 111 12345953 -123291 20330 +Display: 10100101 01100110 -123245 20330 7827 _ +Stimuli: 56 113 12345958 -123288 20336 +Display: 10101001 01101011 -123238 20336 7834 _ +Stimuli: 57 115 12345963 -123285 20342 +Display: 10101011 01110000 -123231 20342 7841 _ +Stimuli: 58 117 12345968 -123282 20348 +Display: 10101111 01110101 -123224 20348 7848 _ +Stimuli: 59 119 12345973 -123279 20354 +Display: 10110001 01111010 -123217 20354 7855 _ +Stimuli: 60 121 12345978 -123276 20360 +Display: 10110101 01111111 -123210 20360 7862 _ +Stimuli: 61 123 12345983 -123273 20366 +Display: 10110111 10000100 -123203 20366 7869 _ +Stimuli: 62 125 12345988 -123270 20372 +Display: 10111011 10001001 -123196 20372 7876 _ +Stimuli: 63 127 12345993 -123267 20378 +Display: 10111101 10001110 -123189 20378 7883 _ +Stimuli: 64 -127 12345998 -123264 20384 +Display: 11000001 10010011 -123182 20384 7890 _ +Stimuli: 65 -125 12346003 -123261 20390 +Display: 11000011 10011000 -123175 20390 7897 _ +Stimuli: 66 -123 12346008 -123258 20396 +Display: 11000111 10011101 -123168 20396 7904 _ +Stimuli: 67 -121 12346013 -123255 20402 +Display: 11001001 10100010 -123161 20402 7911 _ +Stimuli: 68 -119 12346018 -123252 20408 +Display: 11001101 10100111 -123154 20408 7918 _ +Stimuli: 69 -117 12346023 -123249 20414 +Display: 11001111 10101100 -123147 20414 7925 _ +Stimuli: 70 -115 12346028 -123246 20420 +Display: 11010011 10110001 -123140 20420 7932 _ +Stimuli: 71 -113 12346033 -123243 20426 +Display: 11010101 10110110 -123133 20426 7939 _ +Stimuli: 72 -111 12346038 -123240 20432 +Display: 11011001 10111011 -123126 20432 7946 _ +Stimuli: 73 -109 12346043 -123237 20438 +Display: 11011011 11000000 -123119 20438 7953 _ +Stimuli: 74 -107 12346048 -123234 20444 +Display: 11011111 11000101 -123112 20444 7960 _ +Stimuli: 75 -105 12346053 -123231 20450 +Display: 11100001 11001010 -123105 20450 7967 _ +Stimuli: 76 -103 12346058 -123228 20456 +Display: 11100101 11001111 -123098 20456 7974 _ +Stimuli: 77 -101 12346063 -123225 20462 +Display: 11100111 11010100 -123091 20462 7981 _ +Stimuli: 78 -99 12346068 -123222 20468 +Display: 11101011 11011001 -123084 20468 7988 _ +Stimuli: 79 -97 12346073 -123219 20474 +Display: 11101101 11011110 -123077 20474 7995 _ +Stimuli: 80 -95 12346078 -123216 20480 +Display: 11110001 11100011 -123070 20480 8002 _ +Stimuli: 81 -93 12346083 -123213 20486 +Display: 11110011 11101000 -123063 20486 8009 _ +Stimuli: 82 -91 12346088 -123210 20492 +Display: 11110111 11101101 -123056 20492 8016 _ +Stimuli: 83 -89 12346093 -123207 20498 +Display: 11111001 11110010 -123049 20498 8023 _ +Stimuli: 84 -87 12346098 -123204 20504 +Display: 11111101 11110111 -123042 20504 8030 _ +Stimuli: 85 -85 12346103 -123201 20510 +Display: 11111111 11111100 -123035 20510 8037 _ +Stimuli: 86 -83 12346108 -123198 20516 +Display: 00000011 00000001 -123028 20516 8044 _ +Stimuli: 87 -81 12346113 -123195 20522 +Display: 00000101 00000110 -123021 20522 8051 _ +Stimuli: 88 -79 12346118 -123192 20528 +Display: 00001001 00001011 -123014 20528 8058 _ +Stimuli: 89 -77 12346123 -123189 20534 +Display: 00001011 00010000 -123007 20534 8065 _ +Stimuli: 90 -75 12346128 -123186 20540 +Display: 00001111 00010101 -123000 20540 8072 _ +Stimuli: 91 -73 12346133 -123183 20546 +Display: 00010001 00011010 -122993 20546 8079 _ +Stimuli: 92 -71 12346138 -123180 20552 +Display: 00010101 00011111 -122986 20552 8086 _ +Stimuli: 93 -69 12346143 -123177 20558 +Display: 00010111 00100100 -122979 20558 8093 _ +Stimuli: 94 -67 12346148 -123174 20564 +Display: 00011011 00101001 -122972 20564 8100 _ +Stimuli: 95 -65 12346153 -123171 20570 +Display: 00011101 00101110 -122965 20570 8107 _ +Stimuli: 96 -63 12346158 -123168 20576 +Display: 00100001 00110011 -122958 20576 8114 _ +Stimuli: 97 -61 12346163 -123165 20582 +Display: 00100011 00111000 -122951 20582 8121 _ +Stimuli: 98 -59 12346168 -123162 20588 +Display: 00100111 00111101 -122944 20588 8128 _ +Stimuli: 99 -57 12346173 -123159 20594 +Display: 00101001 01000010 -122937 20594 8135 _ + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/main.cpp new file mode 100644 index 000000000..ab653c040 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/main.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Stan Liao, Synopsys, Inc., 1999-09-21 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal stimulus_line3; + sc_signal stimulus_line4; + sc_signal stimulus_line5; + sc_signal stimulus_line6; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector result_line1; + sc_signal_bool_vector result_line2; + sc_signal result_line3; + sc_signal result_line4; + sc_signal result_line5; + sc_signal result_line6; + + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.cpp new file mode 100644 index 000000000..79a2d896a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + + int counter = 0; + tmp1 = "00000000"; + tmp2 = "00000001"; + tmp3 = 12345678; + tmp4 = -123456; + tmp5 = 20000; + tmp6 = 'R'; + + + while(counter<100){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " << tmp5 << " " << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 2; + tmp3 = tmp3 + 5; + tmp4 = tmp4 + 3; + tmp5 = tmp5 + 6; + tmp6 = tmp6 + 4; + do { wait(); } while (in_ack==false); + out_valid.write(false); + counter++; + wait(); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.h new file mode 100644 index 000000000..689995a6a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/stimulus.h @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/common.h new file mode 100644 index 000000000..b0b56195b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.cpp new file mode 100644 index 000000000..64c5ee2b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.h new file mode 100644 index 000000000..21e3c27fd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/display.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/golden/increment.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/golden/increment.log new file mode 100644 index 000000000..e8205e774 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/golden/increment.log @@ -0,0 +1,51 @@ +SystemC Simulation +Stimuli : 0 0 at 23 ns +Display : 3 00011 at 27 ns +Stimuli : 4 4 at 44 ns +Display : 7 00111 at 48 ns +Stimuli : 8 8 at 65 ns +Display : 11 01011 at 69 ns +Stimuli : 12 12 at 86 ns +Display : 15 01111 at 90 ns +Stimuli : 16 -16 at 107 ns +Display : 19 10011 at 111 ns +Stimuli : 20 -12 at 128 ns +Display : 23 10111 at 132 ns +Stimuli : 24 -8 at 149 ns +Display : 27 11011 at 153 ns +Stimuli : 28 -4 at 170 ns +Display : 31 11111 at 174 ns +Stimuli : 32 0 at 191 ns +Display : 35 00011 at 195 ns +Stimuli : 36 4 at 212 ns +Display : 39 00111 at 216 ns +Stimuli : 40 8 at 233 ns +Display : 43 01011 at 237 ns +Stimuli : 44 12 at 254 ns +Display : 47 01111 at 258 ns +Stimuli : 48 -16 at 275 ns +Display : 51 10011 at 279 ns +Stimuli : 52 -12 at 296 ns +Display : 55 10111 at 300 ns +Stimuli : 56 -8 at 317 ns +Display : 59 11011 at 321 ns +Stimuli : 60 -4 at 338 ns +Display : 63 11111 at 342 ns +Stimuli : 64 0 at 359 ns +Display : 67 00011 at 363 ns +Stimuli : 68 4 at 380 ns +Display : 71 00111 at 384 ns +Stimuli : 72 8 at 401 ns +Display : 75 01011 at 405 ns +Stimuli : 76 12 at 422 ns +Display : 79 01111 at 426 ns +Stimuli : 80 -16 at 443 ns +Display : 83 10011 at 447 ns +Stimuli : 84 -12 at 464 ns +Display : 87 10111 at 468 ns +Stimuli : 88 -8 at 485 ns +Display : 91 11011 at 489 ns +Stimuli : 92 -4 at 506 ns +Display : 95 11111 at 510 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.cpp new file mode 100644 index 000000000..3b32d2317 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + increment.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "increment.h" + +void increment::entry(){ + + #define ONE 1 + const int eins = 1; + int tmp1; + sc_bigint<5> tmp2; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + + //execute simple operations + tmp1 = tmp1 + 1; + tmp1 = tmp1 + ONE; + tmp1 = tmp1 + eins; + tmp2 = tmp2 + 1; + tmp2 = tmp2 + ONE; + tmp2 = tmp2 + eins; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.f new file mode 100644 index 000000000..3e7b5f3b7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.f @@ -0,0 +1,4 @@ +increment/stimulus.cpp +increment/display.cpp +increment/increment.cpp +increment/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.h new file mode 100644 index 000000000..30093ede8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/increment.h @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + increment.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( increment ) +{ + SC_HAS_PROCESS( increment ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + increment ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/main.cpp new file mode 100644 index 000000000..6189f9dc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "increment.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal_bool_vector result_line2; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + input_valid); + + increment increment1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + input_valid, + result_line1, + result_line2, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.cpp new file mode 100644 index 000000000..9f22a9c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() +{ + int send_value1 = 0; + sc_signed send_value2(5); + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value2 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+4; + send_value2 = send_value2+4; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.h new file mode 100644 index 000000000..0bda545fa --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/stimulus.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal_bool_vector& out_stimulus2; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal_bool_vector& OUT_STIMULUS2, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/common.h new file mode 100644 index 000000000..60baad076 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector5; +typedef sc_signal > sc_signal_bool_vector6; +typedef sc_signal > sc_signal_bool_vector7; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.cpp new file mode 100644 index 000000000..b13920d6c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " + << in_data1.read() << " " + << in_data3.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.h new file mode 100644 index 000000000..524ee27b0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/display.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector4& in_data1; // Input port + const sc_signal_bool_vector5& in_data2; // Input port + const sc_signal_bool_vector6& in_data3; // Input port + const sc_signal_bool_vector7& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector4& IN_DATA1, + const sc_signal_bool_vector5& IN_DATA2, + const sc_signal_bool_vector6& IN_DATA3, + const sc_signal_bool_vector7& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/golden/sharing.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/golden/sharing.log new file mode 100644 index 000000000..dda9320f3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/golden/sharing.log @@ -0,0 +1,39 @@ +SystemC Simulation +Stimuli : 0 0 0 0 0 at 23 ns +Display : 1010 001010 001010 0001010 00001010 at 27 ns +Display : 1011 001011 001011 0010100 00001011 at 30 ns +Stimuli : 1 1 1 1 1 at 44 ns +Display : 1011 001011 001011 0001011 00001011 at 48 ns +Display : 1100 001100 001100 0010101 00001100 at 51 ns +Stimuli : 2 2 2 2 2 at 65 ns +Display : 1100 001100 001100 0001100 00001100 at 69 ns +Display : 1101 001101 001101 0010110 00001101 at 72 ns +Stimuli : 3 3 3 3 3 at 86 ns +Display : 1101 001101 001101 0001101 00001101 at 90 ns +Display : 1110 001110 001110 0010111 00001110 at 93 ns +Stimuli : 4 4 4 4 4 at 107 ns +Display : 1110 001110 001110 0001110 00001110 at 111 ns +Display : 1111 001111 001111 0011000 00001111 at 114 ns +Stimuli : 5 5 5 5 5 at 128 ns +Display : 1111 001111 001111 0001111 00001111 at 132 ns +Display : 0000 010000 010000 0011001 00010000 at 135 ns +Stimuli : 6 6 6 6 6 at 149 ns +Display : 0000 010000 010000 0010000 00010000 at 153 ns +Display : 0001 010001 010001 0011010 00010001 at 156 ns +Stimuli : 7 7 7 7 7 at 170 ns +Display : 0001 010001 010001 0010001 00010001 at 174 ns +Display : 0010 010010 010010 0011011 00010010 at 177 ns +Stimuli : -8 8 8 8 8 at 191 ns +Display : 0010 010010 010010 0010010 00010010 at 195 ns +Display : 0011 010011 010011 0011100 00010011 at 198 ns +Stimuli : -7 9 9 9 9 at 212 ns +Display : 0011 010011 010011 0010011 00010011 at 216 ns +Display : 0100 010100 010100 0011101 00010100 at 219 ns +Stimuli : -6 10 10 10 10 at 233 ns +Display : 0100 010100 010100 0010100 00010100 at 237 ns +Display : 0101 010101 010101 0011110 00010101 at 240 ns +Stimuli : -5 11 11 11 11 at 254 ns +Display : 0101 010101 010101 0010101 00010101 at 258 ns +Display : 0110 010110 010110 0011111 00010110 at 261 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/main.cpp new file mode 100644 index 000000000..056a41e79 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/main.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "sharing.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector4 stimulus_line1; + sc_signal_bool_vector5 stimulus_line2; + sc_signal_bool_vector6 stimulus_line3; + sc_signal_bool_vector7 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal_bool_vector4 result_line1; + sc_signal_bool_vector5 result_line2; + sc_signal_bool_vector6 result_line3; + sc_signal_bool_vector7 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + sharing sharing1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.cpp new file mode 100644 index 000000000..aa1dca4c5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "sharing.h" + +void sharing::entry(){ + + sc_bigint<4> tmp1; + sc_biguint<5> tmp2; + sc_bigint<6> tmp3; + sc_biguint<7> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp1 = tmp1 + 10; + tmp2 = tmp2 + 10; + tmp3 = tmp3 + 10; + tmp4 = tmp4 + 10; + tmp5 = tmp5 + 10; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute simple operations + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 10; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 10; + tmp5 = tmp5 + 1; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.f new file mode 100644 index 000000000..0c0f3ff29 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.f @@ -0,0 +1,4 @@ +sharing/stimulus.cpp +sharing/display.cpp +sharing/sharing.cpp +sharing/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.h new file mode 100644 index 000000000..d185d964c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/sharing.h @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( sharing ) +{ + SC_HAS_PROCESS( sharing ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector4& in_value1; // Input port + const sc_signal_bool_vector5& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector7& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal_bool_vector4& out_value1; // Output port + sc_signal_bool_vector5& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector7& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + sharing ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector4& IN_VALUE1, + const sc_signal_bool_vector5& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector7& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector4& OUT_VALUE1, + sc_signal_bool_vector5& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector7& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.cpp new file mode 100644 index 000000000..7b71dd7a7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.cpp @@ -0,0 +1,88 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" + +void stimulus::entry() { + sc_bigint<4> send_value1; + sc_biguint<5> send_value2; + sc_bigint<6> send_value3; + sc_biguint<7> send_value4; + sc_biguint<8> send_value5; + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value1 = 0; + send_value2 = 0; + send_value3 = 0; + send_value4 = 0; + send_value5 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+1; + send_value2 = send_value2+1; + send_value3 = send_value3+1; + send_value4 = send_value4+1; + send_value5 = send_value5+1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.h new file mode 100644 index 000000000..28a75e233 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/stimulus.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector4& out_stimulus1; + sc_signal_bool_vector5& out_stimulus2; + sc_signal_bool_vector6& out_stimulus3; + sc_signal_bool_vector7& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector4& OUT_STIMULUS1, + sc_signal_bool_vector5& OUT_STIMULUS2, + sc_signal_bool_vector6& OUT_STIMULUS3, + sc_signal_bool_vector7& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h new file mode 100644 index 000000000..335b51334 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector2; +typedef sc_signal > sc_signal_bool_vector3; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp new file mode 100644 index 000000000..1418eba9b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.cpp @@ -0,0 +1,105 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-10 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry(){ + + sc_biguint<2> tmp1; + sc_bigint<2> tmp2; + sc_biguint<3> tmp3; + sc_bigint<3> tmp4; + sc_biguint<2> tmp1r; + sc_bigint<2> tmp2r; + sc_biguint<3> tmp3r; + sc_bigint<3> tmp4r; + + // reset_loop + out_valid.write(false); + out_ack.write(false); + wait(); + + // + // main loop + // + + while(1) { + //input handshake + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + // input handshake + out_ack.write(true); + + //execute datatypes operations + // unsigned(2) <- signed(3)/unsigned(2) + tmp1r = tmp4 / tmp1; + // signed(2) <- unsigned(2)/signed(3) + tmp2r = tmp1 / tmp4; + // unsigned(3) <- unsigned(3)/unsigned(2) + tmp3r = tmp3 / tmp1; + // signed(3) <- signed(3)/signed(2) + tmp4r = tmp4 / tmp2; + + // write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + + //output handshake + out_valid.write(true); + wait(); + + //input handshake + out_ack.write(false); + + //output handshake + out_valid.write(false); + wait(); + } +} + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h new file mode 100644 index 000000000..0d58458fd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/datatypes.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector2& in_value2; // Input port + const sc_signal_bool_vector3& in_value3; // Input port + const sc_signal_bool_vector3& in_value4; // Input port + const sc_signal& in_valid; // Input port + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector2& out_value2; // Output port + sc_signal_bool_vector3& out_value3; // Output port + sc_signal_bool_vector3& out_value4; // Output port + sc_signal& out_ack; // Output port + sc_signal& out_valid; // Output port + + + // + // Constructor + // + + datatypes ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector2& IN_VALUE2, + const sc_signal_bool_vector3& IN_VALUE3, + const sc_signal_bool_vector3& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector2& OUT_VALUE2, + sc_signal_bool_vector3& OUT_VALUE3, + sc_signal_bool_vector3& OUT_VALUE4, + sc_signal& OUT_ACK, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_ack (OUT_ACK), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + +void entry (); + +}; + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp new file mode 100644 index 000000000..649ac74a3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-11 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + wait(); + + while(counter<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << endl; + do { wait(); } while ( in_valid == true); + counter++; + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h new file mode 100644 index 000000000..c4efff539 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/display.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector2& in_value2; // Input port + const sc_signal_bool_vector3& in_value3; // Input port + const sc_signal_bool_vector3& in_value4; // Input port + const sc_signal& in_valid; // Input port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector2& IN_VALUE2, + const sc_signal_bool_vector3& IN_VALUE3, + const sc_signal_bool_vector3& IN_VALUE4, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log new file mode 100644 index 000000000..487107cf4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/golden/datatypes.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 +Display: 11 00 010 011 +Stimuli: 3 1 5 -2 +Display: 00 11 001 110 +Stimuli: 1 -2 6 -1 +Display: 11 11 110 000 +Stimuli: 2 -1 7 1 +Display: 00 10 011 111 +Stimuli: 3 1 1 2 +Display: 00 01 000 010 +Stimuli: 1 -2 2 3 +Display: 11 00 010 111 +Stimuli: 2 -1 3 -4 +Display: 10 00 001 100 +Stimuli: 3 1 4 -3 +Display: 11 11 001 101 +Stimuli: 1 -2 5 -2 +Display: 10 00 101 001 +Stimuli: 2 -1 6 -1 +Display: 00 10 011 001 +Stimuli: 3 1 7 1 +Display: 00 11 010 001 +Stimuli: 1 -2 1 2 +Display: 10 00 001 111 +Stimuli: 2 -1 2 3 +Display: 01 00 001 101 +Stimuli: 3 1 3 -4 +Display: 11 00 001 100 +Stimuli: 1 -2 4 -3 +Display: 01 00 100 001 +Stimuli: 2 -1 5 -2 +Display: 11 11 010 010 +Stimuli: 3 1 6 -1 +Display: 00 01 010 111 +Stimuli: 1 -2 7 1 +Display: 01 01 111 000 +Stimuli: 2 -1 1 2 +Display: 01 01 000 110 +Stimuli: 3 1 2 3 +Display: 01 01 000 011 +Stimuli: 1 -2 3 -4 +Display: 00 00 011 010 +Stimuli: 2 -1 4 -3 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp new file mode 100644 index 000000000..a56c0c05e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/main.cpp @@ -0,0 +1,94 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector2 stimulus_line1; + sc_signal_bool_vector2 stimulus_line2; + sc_signal_bool_vector3 stimulus_line3; + sc_signal_bool_vector3 stimulus_line4; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector2 result_line1; + sc_signal_bool_vector2 result_line2; + sc_signal_bool_vector3 result_line3; + sc_signal_bool_vector3 result_line4; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + ack, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp new file mode 100644 index 000000000..5f0d4fc1d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-10-01 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_unsigned tmp1(2); + sc_signed tmp2(2); + sc_unsigned tmp3(3); + sc_signed tmp4(3); + sc_unsigned zero_2(2); + sc_unsigned zero_3(3); + + zero_3 = "000"; + zero_2 = "00"; + tmp1 = "01"; + tmp2 = "10"; + tmp3 = "010"; + tmp4 = "011"; + + + while(true){ + // handshake + out_valid.write(true); + // write stimuli + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + cout << "Stimuli: "<< tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << endl; + // update stimuli + tmp1 = tmp1 + 1; + if (tmp1 == zero_2) tmp1 = "01"; + tmp2 = tmp2 + 1; + if (tmp2 == zero_2) tmp2 = "01"; + tmp3 = tmp3 + 1; + if (tmp3 == zero_3) tmp3 = "001"; + tmp4 = tmp4 + 1; + if (tmp4 == zero_3) tmp4 = "001"; + // handshake + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h new file mode 100644 index 000000000..5e7335244 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/stimulus.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset ; + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector2& out_value2; // Output port + sc_signal_bool_vector3& out_value3; // Output port + sc_signal_bool_vector3& out_value4; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector2& OUT_VALUE2, + sc_signal_bool_vector3& OUT_VALUE3, + sc_signal_bool_vector3& OUT_VALUE4, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp new file mode 100644 index 000000000..2a99472b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h new file mode 100644 index 000000000..5902ca652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp new file mode 100644 index 000000000..bc363dc9a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + divide.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "divide.h" + +void divide::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute operations + tmp1 = tmp1/2; + tmp2 = tmp2/2; + tmp3 = tmp3/2; + tmp4 = tmp4/2; + tmp5 = tmp5/2; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute slf assigning operations + tmp1 /= 3; + tmp2 /= 3; + tmp3 /= 3; + tmp4 /= 3; + tmp5 /= 3; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute self assigning operations + if (tmp3!=0) + tmp1 = (tmp2/tmp3).to_int(); + if (tmp4!=0) + tmp2 = tmp2/tmp4; + if (tmp5!=0) + tmp3 = tmp3/tmp5; + if (tmp5!=0) + tmp4 = tmp4/tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f new file mode 100644 index 000000000..2e58a7f37 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.f @@ -0,0 +1,4 @@ +divide/stimulus.cpp +divide/display.cpp +divide/divide.cpp +divide/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h new file mode 100644 index 000000000..20be049c1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/divide.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + divide.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( divide ) +{ + SC_HAS_PROCESS( divide ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector4& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector4& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + divide( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log new file mode 100644 index 000000000..e48b2110a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/golden/divide.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli : 254 -2 14 -2 254 at 18 ns +Display : 127 1111 0111 11111111 01111111 at 22 ns +Display : 42 1111 0010 00000000 00101010 at 25 ns +Display : 0 1111 0000 00000000 00101010 at 28 ns +Stimuli : 253 -3 13 -3 253 at 34 ns +Display : 126 1111 0110 11111111 01111110 at 38 ns +Display : 42 1111 0010 00000000 00101010 at 41 ns +Display : 0 1111 0000 00000000 00101010 at 44 ns +Stimuli : 252 -4 12 -4 252 at 50 ns +Display : 126 1110 0110 11111110 01111110 at 54 ns +Display : 42 1110 0010 00000000 00101010 at 57 ns +Display : 0 1110 0000 00000000 00101010 at 60 ns +Stimuli : 251 -5 11 -5 251 at 66 ns +Display : 125 1110 0101 11111110 01111101 at 70 ns +Display : 41 1110 0001 00000000 00101001 at 73 ns +Display : 0 1110 0000 00000000 00101001 at 76 ns +Stimuli : 250 -6 10 -6 250 at 82 ns +Display : 125 1101 0101 11111101 01111101 at 86 ns +Display : 41 1101 0001 11111111 00101001 at 89 ns +Display : -1 1101 0000 00000000 00101001 at 92 ns +Stimuli : 249 -7 9 -7 249 at 98 ns +Display : 124 1101 0100 11111101 01111100 at 102 ns +Display : 41 1101 0001 11111111 00101001 at 105 ns +Display : -1 1101 0000 00000000 00101001 at 108 ns +Stimuli : 248 -8 8 -8 248 at 114 ns +Display : 124 1100 0100 11111100 01111100 at 118 ns +Display : 41 1100 0001 11111111 00101001 at 121 ns +Display : -1 1100 0000 00000000 00101001 at 124 ns +Stimuli : 247 7 7 -9 247 at 130 ns +Display : 123 0011 0011 11111100 01111011 at 134 ns +Display : 41 0011 0001 11111111 00101001 at 137 ns +Display : 1 0011 0000 00000000 00101001 at 140 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp new file mode 100644 index 000000000..5285ae4aa --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "divide.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + divide divide1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp new file mode 100644 index 000000000..f4f3ffac7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 254; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + reset.write(true); + out_valid.write(false); + send_value2 = 14; + send_value3 = 14; + send_value4 = 254; + send_value5 = 254; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + while(true){ + wait(15); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1--; + send_value2 = send_value2-1; + send_value3 = send_value3-1; + send_value4 = send_value4-1; + send_value5 = send_value5-1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h new file mode 100644 index 000000000..4fe06d3f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.cpp new file mode 100644 index 000000000..2a99472b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.h new file mode 100644 index 000000000..93a9e567b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/golden/modulo.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/golden/modulo.log new file mode 100644 index 000000000..2fffc9ded --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/golden/modulo.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli : 254 -2 14 -2 254 at 18 ns +Display : 4 1110 0100 11111110 00000100 at 22 ns +Display : 1 1110 0001 11111110 00000001 at 25 ns +Display : 0 0000 0000 00000000 00000001 at 28 ns +Stimuli : 253 -3 13 -3 253 at 34 ns +Display : 3 1101 0011 11111101 00000011 at 38 ns +Display : 0 0000 0000 00000000 00000000 at 41 ns +Display : 0 0000 0000 00000000 00000000 at 44 ns +Stimuli : 252 -4 12 -4 252 at 50 ns +Display : 2 1100 0010 11111100 00000010 at 54 ns +Display : 2 1111 0010 11111111 00000010 at 57 ns +Display : -1 0000 0000 11111111 00000010 at 60 ns +Stimuli : 251 -5 11 -5 251 at 66 ns +Display : 1 0000 0001 00000000 00000001 at 70 ns +Display : 1 0000 0001 00000000 00000001 at 73 ns +Display : 0 0000 0000 00000000 00000001 at 76 ns +Stimuli : 250 -6 10 -6 250 at 82 ns +Display : 0 1111 0000 11111111 00000000 at 86 ns +Display : 0 1111 0000 11111111 00000000 at 89 ns +Display : 0 0000 0000 11111111 00000000 at 92 ns +Stimuli : 249 -7 9 -7 249 at 98 ns +Display : 4 1110 0100 11111110 00000100 at 102 ns +Display : 1 1110 0001 11111110 00000001 at 105 ns +Display : 0 0000 0000 00000000 00000001 at 108 ns +Stimuli : 248 -8 8 -8 248 at 114 ns +Display : 3 1101 0011 11111101 00000011 at 118 ns +Display : 0 0000 0000 00000000 00000000 at 121 ns +Display : 0 0000 0000 00000000 00000000 at 124 ns +Stimuli : 247 7 7 -9 247 at 130 ns +Display : 2 0010 0010 11111100 00000010 at 134 ns +Display : 2 0010 0010 11111111 00000010 at 137 ns +Display : 0 0000 0000 11111111 00000010 at 140 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/main.cpp new file mode 100644 index 000000000..db408bc47 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "modulo.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + modulo modulo1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.cpp new file mode 100644 index 000000000..eba16c8f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.cpp @@ -0,0 +1,131 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + modulo.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "modulo.h" + +void modulo::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute operations + tmp1 = tmp1%5; + tmp2 = tmp2%5; + tmp3 = tmp3%5; + tmp4 = tmp4%5; + tmp5 = tmp5%5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute self assignment operations + tmp1 %= 3; + tmp2 %= 3; + tmp3 %= 3; + tmp4 %= 3; + tmp5 %= 3; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute different type operations + if (tmp3!=0) + tmp1 = (tmp2%tmp3).to_int(); + if (tmp4!=0) + tmp2 = tmp2%tmp4; + if (tmp5!=0) + tmp3 = tmp3%tmp5; + if (tmp5!=0) + tmp4 = tmp4%tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.f new file mode 100644 index 000000000..444eb5b42 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.f @@ -0,0 +1,4 @@ +modulo/stimulus.cpp +modulo/display.cpp +modulo/modulo.cpp +modulo/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.h new file mode 100644 index 000000000..e77849c8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/modulo.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + modulo.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( modulo ) +{ + SC_HAS_PROCESS( modulo ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector4& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector4& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + modulo( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.cpp new file mode 100644 index 000000000..f224e9210 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 254; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + reset.write(true); + out_valid.write(false); + send_value2 = 14; + send_value3 = 14; + send_value4 = 254; + send_value5 = 254; + out_stimulus1.write(0); + out_stimulus3.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + while(true){ + wait(15); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1--; + send_value2 = send_value2-1; + send_value3 = send_value3-1; + send_value4 = send_value4-1; + send_value5 = send_value5-1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.h new file mode 100644 index 000000000..7d02a2958 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.cpp new file mode 100644 index 000000000..2a99472b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.h new file mode 100644 index 000000000..5902ca652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/golden/mult.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/golden/mult.log new file mode 100644 index 000000000..7f225d536 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/golden/mult.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli : 0 0 0 0 0 at 18 ns +Display : 0 0000 0000 00000000 00000000 at 22 ns +Display : 0 0000 0000 00000000 00000000 at 25 ns +Display : 0 0000 0000 00000000 00000000 at 28 ns +Stimuli : 1 1 1 1 1 at 34 ns +Display : 2 0010 0010 00000010 00000010 at 38 ns +Display : 4 0100 0100 00000100 00000100 at 41 ns +Display : 16 0000 0000 00010000 01000000 at 44 ns +Stimuli : 2 2 2 2 2 at 50 ns +Display : 4 0100 0100 00000100 00000100 at 54 ns +Display : 8 1000 1000 00001000 00001000 at 57 ns +Display : -64 0000 0000 01000000 00000000 at 60 ns +Stimuli : 3 3 3 3 3 at 66 ns +Display : 6 0110 0110 00000110 00000110 at 70 ns +Display : 12 1100 1100 00001100 00001100 at 73 ns +Display : -48 0000 0000 10010000 11000000 at 76 ns +Stimuli : 4 4 4 4 4 at 82 ns +Display : 8 1000 1000 00001000 00001000 at 86 ns +Display : 16 0000 0000 00010000 00010000 at 89 ns +Display : 0 0000 0000 00000000 00000000 at 92 ns +Stimuli : 5 5 5 5 5 at 98 ns +Display : 10 1010 1010 00001010 00001010 at 102 ns +Display : 20 0100 0100 00010100 00010100 at 105 ns +Display : 16 0000 0000 10010000 01000000 at 108 ns +Stimuli : 6 6 6 6 6 at 114 ns +Display : 12 1100 1100 00001100 00001100 at 118 ns +Display : 24 1000 1000 00011000 00011000 at 121 ns +Display : -64 0000 0000 01000000 00000000 at 124 ns +Stimuli : 7 7 7 7 7 at 130 ns +Display : 14 1110 1110 00001110 00001110 at 134 ns +Display : 28 1100 1100 00011100 00011100 at 137 ns +Display : -48 0000 0000 00010000 11000000 at 140 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/main.cpp new file mode 100644 index 000000000..9ef3b5199 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "mult.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + mult mult1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.cpp new file mode 100644 index 000000000..3faec6274 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mult.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "mult.h" + +void mult::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp1 = tmp1 * 2; + tmp2 = tmp2 * 2; + tmp3 = tmp3 * 2; + tmp4 = tmp4 * 2; + tmp5 = tmp5 * 2; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute self assigning operations + tmp1 *= 2; + tmp2 *= 2; + tmp3 *= 2; + tmp4 *= 2; + tmp5 *= 2; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute complex operations with different bit width + tmp1 = (tmp2*tmp3).to_int(); + tmp2 = tmp2*tmp4; + tmp3 = tmp3*tmp5; + tmp4 = tmp4*tmp5; + tmp5 = tmp4*tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.f new file mode 100644 index 000000000..795188df6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.f @@ -0,0 +1,4 @@ +mult/stimulus.cpp +mult/display.cpp +mult/mult.cpp +mult/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.h new file mode 100644 index 000000000..d7a5d76b6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/mult.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mult.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( mult ) +{ + SC_HAS_PROCESS( mult ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector4& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector4& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + mult( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.cpp new file mode 100644 index 000000000..456016581 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 0; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + reset.write(true); + out_valid.write(false); + send_value2 = 0; + send_value3 = 0; + send_value4 = 0; + send_value5 = 0; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + while(true){ + wait(15); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1++; + send_value2 = send_value2+1; + send_value3 = send_value3+1; + send_value4 = send_value4+1; + send_value5 = send_value5+1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.h new file mode 100644 index 000000000..457d783ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-05-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.cpp new file mode 100644 index 000000000..3dc7a1980 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "bitwidth.h" + +void bitwidth::entry(){ + + sc_biguint<2> tmp1; + sc_biguint<2> tmp1a; + sc_bigint<4> tmp2; + sc_bigint<4> tmp2a; + sc_biguint<6> tmp3; + sc_biguint<6> tmp3a; + sc_bigint<8> tmp4; + sc_bigint<8> tmp4a; + + // reset_loop + out_valid.write(false); + out_ack.write(false); + wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + //execute simple operations + // expected bitwidth 2 2 2 + tmp1a = tmp1 - tmp1; + // expected bitwidth 2 4 4 + tmp2a = tmp2 - tmp1; + // expected bitwidth 6 2 6 + tmp3a = tmp3 - tmp1; + // expected bitwidth 4 8 8 + tmp4a = tmp4 - tmp2; + + out_ack.write(true); + wait(); + out_ack.write(false); + + // write outputs + out_value1.write(tmp1a); + out_value2.write(tmp2a); + out_value3.write(tmp3a); + out_value4.write(tmp4a); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.f new file mode 100644 index 000000000..53a59162e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.f @@ -0,0 +1,4 @@ +bitwidth/stimulus.cpp +bitwidth/display.cpp +bitwidth/bitwidth.cpp +bitwidth/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.h new file mode 100644 index 000000000..e31268284 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/bitwidth.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( bitwidth ) +{ + SC_HAS_PROCESS( bitwidth ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal& in_valid; // Input port + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal& out_ack; // Output port + sc_signal& out_valid; // Output port + + + // + // Constructor + // + + bitwidth ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal& OUT_ACK, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_ack (OUT_ACK), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + +void entry (); + +}; + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/common.h new file mode 100644 index 000000000..d3b94a8f8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/common.h @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector2; +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector6; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.cpp new file mode 100644 index 000000000..e6d9371f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-12-10 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << endl; + do { wait(); } while ( in_valid == true); + counter++; + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.h new file mode 100644 index 000000000..00498390d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/display.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector2& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector8& in_value4; // Input port + const sc_signal& in_valid; // Input port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector2& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/golden/bitwidth.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/golden/bitwidth.log new file mode 100644 index 000000000..26dab71e7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/golden/bitwidth.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 0 1 2 3 +Stimuli: 1 2 3 4 +Display: 00 0001 000010 00000010 +Stimuli: -2 3 4 5 +Display: 00 0001 000010 00000010 +Stimuli: -1 4 5 6 +Display: 00 0001 000010 00000010 +Stimuli: 0 5 6 7 +Display: 00 0001 000010 00000010 +Stimuli: 1 6 7 8 +Display: 00 0101 000110 00000010 +Stimuli: -2 7 8 9 +Display: 00 0101 000110 00000010 +Stimuli: -1 -8 9 10 +Display: 00 0101 000110 00000010 +Stimuli: 0 -7 10 11 +Display: 00 0101 000110 00010010 +Stimuli: 1 -6 11 12 +Display: 00 1001 001010 00010010 +Stimuli: -2 -5 12 13 +Display: 00 1001 001010 00010010 +Stimuli: -1 -4 13 14 +Display: 00 1001 001010 00010010 +Stimuli: 0 -3 14 15 +Display: 00 1001 001010 00010010 +Stimuli: 1 -2 15 16 +Display: 00 1101 001110 00010010 +Stimuli: -2 -1 16 17 +Display: 00 1101 001110 00010010 +Stimuli: -1 0 17 18 +Display: 00 1101 001110 00010010 +Stimuli: 0 1 18 19 +Display: 00 1101 001110 00010010 +Stimuli: 1 2 19 20 +Display: 00 0001 010010 00010010 +Stimuli: -2 3 20 21 +Display: 00 0001 010010 00010010 +Stimuli: -1 4 21 22 +Display: 00 0001 010010 00010010 +Stimuli: 0 5 22 23 +Display: 00 0001 010010 00010010 +Stimuli: 1 6 23 24 +Display: 00 0101 010110 00010010 +Stimuli: -2 7 24 25 +Display: 00 0101 010110 00010010 +Stimuli: -1 -8 25 26 +Display: 00 0101 010110 00010010 +Stimuli: 0 -7 26 27 +Display: 00 0101 010110 00100010 +Stimuli: 1 -6 27 28 +Display: 00 1001 011010 00100010 +Stimuli: -2 -5 28 29 +Display: 00 1001 011010 00100010 +Stimuli: -1 -4 29 30 +Display: 00 1001 011010 00100010 +Stimuli: 0 -3 30 31 +Display: 00 1001 011010 00100010 +Stimuli: 1 -2 31 32 +Display: 00 1101 011110 00100010 +Stimuli: -2 -1 -32 33 +Display: 00 1101 011110 00100010 +Stimuli: -1 0 -31 34 +Display: 00 1101 011110 00100010 +Stimuli: 0 1 -30 35 +Display: 00 1101 011110 00100010 +Stimuli: 1 2 -29 36 +Display: 00 0001 100010 00100010 +Stimuli: -2 3 -28 37 +Display: 00 0001 100010 00100010 +Stimuli: -1 4 -27 38 +Display: 00 0001 100010 00100010 +Stimuli: 0 5 -26 39 +Display: 00 0001 100010 00100010 +Stimuli: 1 6 -25 40 +Display: 00 0101 100110 00100010 +Stimuli: -2 7 -24 41 +Display: 00 0101 100110 00100010 +Stimuli: -1 -8 -23 42 +Display: 00 0101 100110 00100010 +Stimuli: 0 -7 -22 43 +Display: 00 0101 100110 00110010 +Stimuli: 1 -6 -21 44 +Display: 00 1001 101010 00110010 +Stimuli: -2 -5 -20 45 +Display: 00 1001 101010 00110010 +Stimuli: -1 -4 -19 46 +Display: 00 1001 101010 00110010 +Stimuli: 0 -3 -18 47 +Display: 00 1001 101010 00110010 +Stimuli: 1 -2 -17 48 +Display: 00 1101 101110 00110010 +Stimuli: -2 -1 -16 49 +Display: 00 1101 101110 00110010 +Stimuli: -1 0 -15 50 +Display: 00 1101 101110 00110010 +Stimuli: 0 1 -14 51 +Display: 00 1101 101110 00110010 +Stimuli: 1 2 -13 52 +Display: 00 0001 110010 00110010 +Stimuli: -2 3 -12 53 +Display: 00 0001 110010 00110010 +Stimuli: -1 4 -11 54 +Display: 00 0001 110010 00110010 +Stimuli: 0 5 -10 55 +Display: 00 0001 110010 00110010 +Stimuli: 1 6 -9 56 +Display: 00 0101 110110 00110010 +Stimuli: -2 7 -8 57 +Display: 00 0101 110110 00110010 +Stimuli: -1 -8 -7 58 +Display: 00 0101 110110 00110010 +Stimuli: 0 -7 -6 59 +Display: 00 0101 110110 01000010 +Stimuli: 1 -6 -5 60 +Display: 00 1001 111010 01000010 +Stimuli: -2 -5 -4 61 +Display: 00 1001 111010 01000010 +Stimuli: -1 -4 -3 62 +Display: 00 1001 111010 01000010 +Stimuli: 0 -3 -2 63 +Display: 00 1001 111010 01000010 +Stimuli: 1 -2 -1 64 +Display: 00 1101 111110 01000010 +Stimuli: -2 -1 0 65 +Display: 00 1101 111110 01000010 +Stimuli: -1 0 1 66 +Display: 00 1101 111110 01000010 +Stimuli: 0 1 2 67 +Display: 00 1101 111110 01000010 +Stimuli: 1 2 3 68 +Display: 00 0001 000010 01000010 +Stimuli: -2 3 4 69 +Display: 00 0001 000010 01000010 +Stimuli: -1 4 5 70 +Display: 00 0001 000010 01000010 +Stimuli: 0 5 6 71 +Display: 00 0001 000010 01000010 +Stimuli: 1 6 7 72 +Display: 00 0101 000110 01000010 +Stimuli: -2 7 8 73 +Display: 00 0101 000110 01000010 +Stimuli: -1 -8 9 74 +Display: 00 0101 000110 01000010 +Stimuli: 0 -7 10 75 +Display: 00 0101 000110 01010010 +Stimuli: 1 -6 11 76 +Display: 00 1001 001010 01010010 +Stimuli: -2 -5 12 77 +Display: 00 1001 001010 01010010 +Stimuli: -1 -4 13 78 +Display: 00 1001 001010 01010010 +Stimuli: 0 -3 14 79 +Display: 00 1001 001010 01010010 +Stimuli: 1 -2 15 80 +Display: 00 1101 001110 01010010 +Stimuli: -2 -1 16 81 +Display: 00 1101 001110 01010010 +Stimuli: -1 0 17 82 +Display: 00 1101 001110 01010010 +Stimuli: 0 1 18 83 +Display: 00 1101 001110 01010010 +Stimuli: 1 2 19 84 +Display: 00 0001 010010 01010010 +Stimuli: -2 3 20 85 +Display: 00 0001 010010 01010010 +Stimuli: -1 4 21 86 +Display: 00 0001 010010 01010010 +Stimuli: 0 5 22 87 +Display: 00 0001 010010 01010010 +Stimuli: 1 6 23 88 +Display: 00 0101 010110 01010010 +Stimuli: -2 7 24 89 +Display: 00 0101 010110 01010010 +Stimuli: -1 -8 25 90 +Display: 00 0101 010110 01010010 +Stimuli: 0 -7 26 91 +Display: 00 0101 010110 01100010 +Stimuli: 1 -6 27 92 +Display: 00 1001 011010 01100010 +Stimuli: -2 -5 28 93 +Display: 00 1001 011010 01100010 +Stimuli: -1 -4 29 94 +Display: 00 1001 011010 01100010 +Stimuli: 0 -3 30 95 +Display: 00 1001 011010 01100010 +Stimuli: 1 -2 31 96 +Display: 00 1101 011110 01100010 +Stimuli: -2 -1 -32 97 +Display: 00 1101 011110 01100010 +Stimuli: -1 0 -31 98 +Display: 00 1101 011110 01100010 +Stimuli: 0 1 -30 99 +Display: 00 1101 011110 01100010 +Stimuli: 1 2 -29 100 +Display: 00 0001 100010 01100010 +Stimuli: -2 3 -28 101 +Display: 00 0001 100010 01100010 +Stimuli: -1 4 -27 102 +Display: 00 0001 100010 01100010 +Stimuli: 0 5 -26 103 +Display: 00 0001 100010 01100010 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/main.cpp new file mode 100644 index 000000000..61341a228 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "bitwidth.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector2 stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector6 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector2 result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector6 result_line3; + sc_signal_bool_vector8 result_line4; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + ack); + + bitwidth bitwidth1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + ack, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.cpp new file mode 100644 index 000000000..4ce6064b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(2); + sc_signed tmp2(4); + sc_signed tmp3(6); + sc_signed tmp4(8); + + tmp1 = "0b00"; + tmp2 = "0b0001"; + tmp3 = "0b000010"; + tmp4 = "0b00000011"; + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + cout << "Stimuli: "<< tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.h new file mode 100644 index 000000000..0fa07858c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/stimulus.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset ; + sc_signal_bool_vector2& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector8& out_value4; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector2& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.cpp new file mode 100644 index 000000000..d3e2cd1e1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.cpp @@ -0,0 +1,119 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry() + +{ + + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + +// define 1 dimensional array + int tmp7[2]; + char tmp8[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// + +// initialization of sc_array + + tmp7[0] = 3; + tmp7[1] = 12; + tmp8[0] = 'R'; + tmp8[1] = 'G'; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + out_ack.write(true); + + //execute mixed data type subtraction operations + tmp1r = tmp1 - tmp2; + tmp2r = tmp6 - tmp1; + tmp3r = tmp4 - tmp6; + tmp4r = --tmp5; + tmp4r -= 1; + tmp5r = tmp6 - tmp4; + tmp6r = tmp8[0] - tmp7[1]; + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.h new file mode 100644 index 000000000..b7e6f7a00 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/datatypes.h @@ -0,0 +1,126 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal& in_value3; // Input port + const sc_signal& in_value4; // Input port + const sc_signal& in_value5; // Input port + const sc_signal& in_value6; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID, + + sc_signal& OUT_ACK, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.cpp new file mode 100644 index 000000000..a8037ef4f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter++<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << " " << in_value5.read() << " " << in_value6.read() << endl; + do { wait(); } while ( in_valid == true); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.h new file mode 100644 index 000000000..2e1149286 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/display.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_value1; // Output port + const sc_signal_bool_vector& in_value2; // Output port + const sc_signal& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/golden/datatypes.log new file mode 100644 index 000000000..afdff5743 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/golden/datatypes.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 0 1 12345678 -123456 20000 +Display: 11111111 01010010 -123538 19998 -7534 F +Stimuli: 1 3 12345683 -123453 20006 +Display: 11111110 01010101 -123539 20004 -7533 F +Stimuli: 2 5 12345688 -123450 20012 +Display: 11111101 01011000 -123540 20010 -7532 F +Stimuli: 3 7 12345693 -123447 20018 +Display: 11111100 01011011 -123541 20016 -7531 F +Stimuli: 4 9 12345698 -123444 20024 +Display: 11111011 01011110 -123542 20022 -7530 F +Stimuli: 5 11 12345703 -123441 20030 +Display: 11111010 01100001 -123543 20028 -7529 F +Stimuli: 6 13 12345708 -123438 20036 +Display: 11111001 01100100 -123544 20034 -7528 F +Stimuli: 7 15 12345713 -123435 20042 +Display: 11111000 01100111 -123545 20040 -7527 F +Stimuli: 8 17 12345718 -123432 20048 +Display: 11110111 01101010 -123546 20046 -7526 F +Stimuli: 9 19 12345723 -123429 20054 +Display: 11110110 01101101 -123547 20052 -7525 F +Stimuli: 10 21 12345728 -123426 20060 +Display: 11110101 01110000 -123548 20058 -7524 F +Stimuli: 11 23 12345733 -123423 20066 +Display: 11110100 01110011 -123549 20064 -7523 F +Stimuli: 12 25 12345738 -123420 20072 +Display: 11110011 01110110 -123294 20070 -7778 F +Stimuli: 13 27 12345743 -123417 20078 +Display: 11110010 01111001 -123295 20076 -7777 F +Stimuli: 14 29 12345748 -123414 20084 +Display: 11110001 01111100 -123296 20082 -7776 F +Stimuli: 15 31 12345753 -123411 20090 +Display: 11110000 01111111 -123297 20088 -7775 F +Stimuli: 16 33 12345758 -123408 20096 +Display: 11101111 10000010 -123298 20094 -7774 F +Stimuli: 17 35 12345763 -123405 20102 +Display: 11101110 10000101 -123299 20100 -7773 F +Stimuli: 18 37 12345768 -123402 20108 +Display: 11101101 10001000 -123300 20106 -7772 F +Stimuli: 19 39 12345773 -123399 20114 +Display: 11101100 10001011 -123301 20112 -7771 F +Stimuli: 20 41 12345778 -123396 20120 +Display: 11101011 10001110 -123302 20118 -7770 F +Stimuli: 21 43 12345783 -123393 20126 +Display: 11101010 10010001 -123303 20124 -7769 F +Stimuli: 22 45 12345788 -123390 20132 +Display: 11101001 10010100 -123304 20130 -7768 F +Stimuli: 23 47 12345793 -123387 20138 +Display: 11101000 10010111 -123305 20136 -7767 F +Stimuli: 24 49 12345798 -123384 20144 +Display: 11100111 10011010 -123306 20142 -7766 F +Stimuli: 25 51 12345803 -123381 20150 +Display: 11100110 10011101 -123307 20148 -7765 F +Stimuli: 26 53 12345808 -123378 20156 +Display: 11100101 10100000 -123308 20154 -7764 F +Stimuli: 27 55 12345813 -123375 20162 +Display: 11100100 10100011 -123309 20160 -7763 F +Stimuli: 28 57 12345818 -123372 20168 +Display: 11100011 10100110 -123310 20166 -7762 F +Stimuli: 29 59 12345823 -123369 20174 +Display: 11100010 10101001 -123311 20172 -7761 F +Stimuli: 30 61 12345828 -123366 20180 +Display: 11100001 10101100 -123312 20178 -7760 F +Stimuli: 31 63 12345833 -123363 20186 +Display: 11100000 10101111 -123313 20184 -7759 F +Stimuli: 32 65 12345838 -123360 20192 +Display: 11011111 10110010 -123314 20190 -7758 F +Stimuli: 33 67 12345843 -123357 20198 +Display: 11011110 10110101 -123315 20196 -7757 F +Stimuli: 34 69 12345848 -123354 20204 +Display: 11011101 10111000 -123316 20202 -7756 F +Stimuli: 35 71 12345853 -123351 20210 +Display: 11011100 10111011 -123317 20208 -7755 F +Stimuli: 36 73 12345858 -123348 20216 +Display: 11011011 10111110 -123318 20214 -7754 F +Stimuli: 37 75 12345863 -123345 20222 +Display: 11011010 11000001 -123319 20220 -7753 F +Stimuli: 38 77 12345868 -123342 20228 +Display: 11011001 11000100 -123320 20226 -7752 F +Stimuli: 39 79 12345873 -123339 20234 +Display: 11011000 11000111 -123321 20232 -7751 F +Stimuli: 40 81 12345878 -123336 20240 +Display: 11010111 11001010 -123322 20238 -7750 F +Stimuli: 41 83 12345883 -123333 20246 +Display: 11010110 11001101 -123323 20244 -7749 F +Stimuli: 42 85 12345888 -123330 20252 +Display: 11010101 11010000 -123324 20250 -7748 F +Stimuli: 43 87 12345893 -123327 20258 +Display: 11010100 11010011 -123325 20256 -7747 F +Stimuli: 44 89 12345898 -123324 20264 +Display: 11010011 11010110 -123326 20262 -7746 F +Stimuli: 45 91 12345903 -123321 20270 +Display: 11010010 11011001 -123327 20268 -7745 F +Stimuli: 46 93 12345908 -123318 20276 +Display: 11010001 11011100 -123328 20274 -7744 F +Stimuli: 47 95 12345913 -123315 20282 +Display: 11010000 11011111 -123329 20280 -7743 F +Stimuli: 48 97 12345918 -123312 20288 +Display: 11001111 11100010 -123330 20286 -7742 F +Stimuli: 49 99 12345923 -123309 20294 +Display: 11001110 11100101 -123331 20292 -7741 F +Stimuli: 50 101 12345928 -123306 20300 +Display: 11001101 11101000 -123332 20298 -7740 F +Stimuli: 51 103 12345933 -123303 20306 +Display: 11001100 11101011 -123333 20304 -7739 F +Stimuli: 52 105 12345938 -123300 20312 +Display: 11001011 11101110 -123334 20310 -7738 F +Stimuli: 53 107 12345943 -123297 20318 +Display: 11001010 11110001 -123335 20316 -7737 F +Stimuli: 54 109 12345948 -123294 20324 +Display: 11001001 11110100 -123336 20322 -7736 F +Stimuli: 55 111 12345953 -123291 20330 +Display: 11001000 11110111 -123337 20328 -7735 F +Stimuli: 56 113 12345958 -123288 20336 +Display: 11000111 11111010 -123338 20334 -7734 F +Stimuli: 57 115 12345963 -123285 20342 +Display: 11000110 11111101 -123339 20340 -7733 F +Stimuli: 58 117 12345968 -123282 20348 +Display: 11000101 00000000 -123340 20346 -7732 F +Stimuli: 59 119 12345973 -123279 20354 +Display: 11000100 00000011 -123341 20352 -7731 F +Stimuli: 60 121 12345978 -123276 20360 +Display: 11000011 00000110 -123342 20358 -7730 F +Stimuli: 61 123 12345983 -123273 20366 +Display: 11000010 00001001 -123343 20364 -7729 F +Stimuli: 62 125 12345988 -123270 20372 +Display: 11000001 00001100 -123344 20370 -7728 F +Stimuli: 63 127 12345993 -123267 20378 +Display: 11000000 00001111 -123345 20376 -7727 F +Stimuli: 64 -127 12345998 -123264 20384 +Display: 10111111 00010010 -123346 20382 -7726 F +Stimuli: 65 -125 12346003 -123261 20390 +Display: 10111110 00010101 -123347 20388 -7725 F +Stimuli: 66 -123 12346008 -123258 20396 +Display: 10111101 00011000 -123348 20394 -7724 F +Stimuli: 67 -121 12346013 -123255 20402 +Display: 10111100 00011011 -123349 20400 -7723 F +Stimuli: 68 -119 12346018 -123252 20408 +Display: 10111011 00011110 -123350 20406 -7722 F +Stimuli: 69 -117 12346023 -123249 20414 +Display: 10111010 00100001 -123351 20412 -7721 F +Stimuli: 70 -115 12346028 -123246 20420 +Display: 10111001 00100100 -123352 20418 -7720 F +Stimuli: 71 -113 12346033 -123243 20426 +Display: 10111000 00100111 -123353 20424 -7719 F +Stimuli: 72 -111 12346038 -123240 20432 +Display: 10110111 00101010 -123354 20430 -7718 F +Stimuli: 73 -109 12346043 -123237 20438 +Display: 10110110 00101101 -123355 20436 -7717 F +Stimuli: 74 -107 12346048 -123234 20444 +Display: 10110101 00110000 -123356 20442 -7716 F +Stimuli: 75 -105 12346053 -123231 20450 +Display: 10110100 00110011 -123357 20448 -7715 F +Stimuli: 76 -103 12346058 -123228 20456 +Display: 10110011 00110110 -123102 20454 -7970 F +Stimuli: 77 -101 12346063 -123225 20462 +Display: 10110010 00111001 -123103 20460 -7969 F +Stimuli: 78 -99 12346068 -123222 20468 +Display: 10110001 00111100 -123104 20466 -7968 F +Stimuli: 79 -97 12346073 -123219 20474 +Display: 10110000 00111111 -123105 20472 -7967 F +Stimuli: 80 -95 12346078 -123216 20480 +Display: 10101111 01000010 -123106 20478 -7966 F +Stimuli: 81 -93 12346083 -123213 20486 +Display: 10101110 01000101 -123107 20484 -7965 F +Stimuli: 82 -91 12346088 -123210 20492 +Display: 10101101 01001000 -123108 20490 -7964 F +Stimuli: 83 -89 12346093 -123207 20498 +Display: 10101100 01001011 -123109 20496 -7963 F +Stimuli: 84 -87 12346098 -123204 20504 +Display: 10101011 01001110 -123110 20502 -7962 F +Stimuli: 85 -85 12346103 -123201 20510 +Display: 10101010 01010001 -123111 20508 -7961 F +Stimuli: 86 -83 12346108 -123198 20516 +Display: 10101001 01010100 -123112 20514 -7960 F +Stimuli: 87 -81 12346113 -123195 20522 +Display: 10101000 01010111 -123113 20520 -7959 F +Stimuli: 88 -79 12346118 -123192 20528 +Display: 10100111 01011010 -123114 20526 -7958 F +Stimuli: 89 -77 12346123 -123189 20534 +Display: 10100110 01011101 -123115 20532 -7957 F +Stimuli: 90 -75 12346128 -123186 20540 +Display: 10100101 01100000 -123116 20538 -7956 F +Stimuli: 91 -73 12346133 -123183 20546 +Display: 10100100 01100011 -123117 20544 -7955 F +Stimuli: 92 -71 12346138 -123180 20552 +Display: 10100011 01100110 -123118 20550 -7954 F +Stimuli: 93 -69 12346143 -123177 20558 +Display: 10100010 01101001 -123119 20556 -7953 F +Stimuli: 94 -67 12346148 -123174 20564 +Display: 10100001 01101100 -123120 20562 -7952 F +Stimuli: 95 -65 12346153 -123171 20570 +Display: 10100000 01101111 -123121 20568 -7951 F +Stimuli: 96 -63 12346158 -123168 20576 +Display: 10011111 01110010 -123122 20574 -7950 F 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12345688 -123450 20012 +Display: 11111101 01011000 -123540 20010 -7532 F +Stimuli: 3 7 12345693 -123447 20018 +Display: 11111100 01011011 -123541 20016 -7531 F +Stimuli: 4 9 12345698 -123444 20024 +Display: 11111011 01011110 -123542 20022 -7530 F +Stimuli: 5 11 12345703 -123441 20030 +Display: 11111010 01100001 -123543 20028 -7529 F +Stimuli: 6 13 12345708 -123438 20036 +Display: 11111001 01100100 -123544 20034 -7528 F +Stimuli: 7 15 12345713 -123435 20042 +Display: 11111000 01100111 -123545 20040 -7527 F +Stimuli: 8 17 12345718 -123432 20048 +Display: 11110111 01101010 -123546 20046 -7526 F +Stimuli: 9 19 12345723 -123429 20054 +Display: 11110110 01101101 -123547 20052 -7525 F +Stimuli: 10 21 12345728 -123426 20060 +Display: 11110101 01110000 -123548 20058 -7524 F +Stimuli: 11 23 12345733 -123423 20066 +Display: 11110100 01110011 -123549 20064 -7523 F +Stimuli: 12 25 12345738 -123420 20072 +Display: 11110011 01110110 -123550 20070 -7522 F +Stimuli: 13 27 12345743 -123417 20078 +Display: 11110010 01111001 -123551 20076 -7521 F +Stimuli: 14 29 12345748 -123414 20084 +Display: 11110001 01111100 -123552 20082 -7520 F +Stimuli: 15 31 12345753 -123411 20090 +Display: 11110000 01111111 -123553 20088 -7519 F +Stimuli: 16 33 12345758 -123408 20096 +Display: 11101111 10000010 -123554 20094 -7518 F +Stimuli: 17 35 12345763 -123405 20102 +Display: 11101110 10000101 -123555 20100 -7517 F +Stimuli: 18 37 12345768 -123402 20108 +Display: 11101101 10001000 -123556 20106 -7516 F +Stimuli: 19 39 12345773 -123399 20114 +Display: 11101100 10001011 -123557 20112 -7515 F +Stimuli: 20 41 12345778 -123396 20120 +Display: 11101011 10001110 -123558 20118 -7514 F +Stimuli: 21 43 12345783 -123393 20126 +Display: 11101010 10010001 -123559 20124 -7513 F +Stimuli: 22 45 12345788 -123390 20132 +Display: 11101001 10010100 -123560 20130 -7512 F +Stimuli: 23 47 12345793 -123387 20138 +Display: 11101000 10010111 -123561 20136 -7511 F +Stimuli: 24 49 12345798 -123384 20144 +Display: 11100111 10011010 -123562 20142 -7510 F +Stimuli: 25 51 12345803 -123381 20150 +Display: 11100110 10011101 -123563 20148 -7509 F +Stimuli: 26 53 12345808 -123378 20156 +Display: 11100101 10100000 -123564 20154 -7508 F +Stimuli: 27 55 12345813 -123375 20162 +Display: 11100100 10100011 -123565 20160 -7507 F +Stimuli: 28 57 12345818 -123372 20168 +Display: 11100011 10100110 -123566 20166 -7506 F +Stimuli: 29 59 12345823 -123369 20174 +Display: 11100010 10101001 -123567 20172 -7505 F +Stimuli: 30 61 12345828 -123366 20180 +Display: 11100001 10101100 -123568 20178 -7504 F +Stimuli: 31 63 12345833 -123363 20186 +Display: 11100000 10101111 -123569 20184 -7503 F +Stimuli: 32 65 12345838 -123360 20192 +Display: 11011111 10110010 -123570 20190 -7502 F +Stimuli: 33 67 12345843 -123357 20198 +Display: 11011110 10110101 -123571 20196 -7501 F +Stimuli: 34 69 12345848 -123354 20204 +Display: 11011101 10111000 -123572 20202 -7500 F +Stimuli: 35 71 12345853 -123351 20210 +Display: 11011100 10111011 -123573 20208 -7499 F +Stimuli: 36 73 12345858 -123348 20216 +Display: 11011011 10111110 -123574 20214 -7498 F +Stimuli: 37 75 12345863 -123345 20222 +Display: 11011010 11000001 -123575 20220 -7497 F +Stimuli: 38 77 12345868 -123342 20228 +Display: 11011001 11000100 -123576 20226 -7496 F +Stimuli: 39 79 12345873 -123339 20234 +Display: 11011000 11000111 -123577 20232 -7495 F +Stimuli: 40 81 12345878 -123336 20240 +Display: 11010111 11001010 -123578 20238 -7494 F +Stimuli: 41 83 12345883 -123333 20246 +Display: 11010110 11001101 -123579 20244 -7493 F +Stimuli: 42 85 12345888 -123330 20252 +Display: 11010101 11010000 -123580 20250 -7492 F +Stimuli: 43 87 12345893 -123327 20258 +Display: 11010100 11010011 -123581 20256 -7491 F +Stimuli: 44 89 12345898 -123324 20264 +Display: 11010011 11010110 -123326 20262 -7746 F +Stimuli: 45 91 12345903 -123321 20270 +Display: 11010010 11011001 -123327 20268 -7745 F +Stimuli: 46 93 12345908 -123318 20276 +Display: 11010001 11011100 -123328 20274 -7744 F +Stimuli: 47 95 12345913 -123315 20282 +Display: 11010000 11011111 -123329 20280 -7743 F +Stimuli: 48 97 12345918 -123312 20288 +Display: 11001111 11100010 -123330 20286 -7742 F +Stimuli: 49 99 12345923 -123309 20294 +Display: 11001110 11100101 -123331 20292 -7741 F +Stimuli: 50 101 12345928 -123306 20300 +Display: 11001101 11101000 -123332 20298 -7740 F +Stimuli: 51 103 12345933 -123303 20306 +Display: 11001100 11101011 -123333 20304 -7739 F +Stimuli: 52 105 12345938 -123300 20312 +Display: 11001011 11101110 -123334 20310 -7738 F +Stimuli: 53 107 12345943 -123297 20318 +Display: 11001010 11110001 -123335 20316 -7737 F +Stimuli: 54 109 12345948 -123294 20324 +Display: 11001001 11110100 -123336 20322 -7736 F +Stimuli: 55 111 12345953 -123291 20330 +Display: 11001000 11110111 -123337 20328 -7735 F +Stimuli: 56 113 12345958 -123288 20336 +Display: 11000111 11111010 -123338 20334 -7734 F +Stimuli: 57 115 12345963 -123285 20342 +Display: 11000110 11111101 -123339 20340 -7733 F +Stimuli: 58 117 12345968 -123282 20348 +Display: 11000101 00000000 -123340 20346 -7732 F +Stimuli: 59 119 12345973 -123279 20354 +Display: 11000100 00000011 -123341 20352 -7731 F +Stimuli: 60 121 12345978 -123276 20360 +Display: 11000011 00000110 -123342 20358 -7730 F +Stimuli: 61 123 12345983 -123273 20366 +Display: 11000010 00001001 -123343 20364 -7729 F +Stimuli: 62 125 12345988 -123270 20372 +Display: 11000001 00001100 -123344 20370 -7728 F +Stimuli: 63 127 12345993 -123267 20378 +Display: 11000000 00001111 -123345 20376 -7727 F +Stimuli: 64 -127 12345998 -123264 20384 +Display: 10111111 00010010 -123346 20382 -7726 F +Stimuli: 65 -125 12346003 -123261 20390 +Display: 10111110 00010101 -123347 20388 -7725 F +Stimuli: 66 -123 12346008 -123258 20396 +Display: 10111101 00011000 -123348 20394 -7724 F +Stimuli: 67 -121 12346013 -123255 20402 +Display: 10111100 00011011 -123349 20400 -7723 F +Stimuli: 68 -119 12346018 -123252 20408 +Display: 10111011 00011110 -123350 20406 -7722 F +Stimuli: 69 -117 12346023 -123249 20414 +Display: 10111010 00100001 -123351 20412 -7721 F +Stimuli: 70 -115 12346028 -123246 20420 +Display: 10111001 00100100 -123352 20418 -7720 F +Stimuli: 71 -113 12346033 -123243 20426 +Display: 10111000 00100111 -123353 20424 -7719 F +Stimuli: 72 -111 12346038 -123240 20432 +Display: 10110111 00101010 -123354 20430 -7718 F +Stimuli: 73 -109 12346043 -123237 20438 +Display: 10110110 00101101 -123355 20436 -7717 F +Stimuli: 74 -107 12346048 -123234 20444 +Display: 10110101 00110000 -123356 20442 -7716 F +Stimuli: 75 -105 12346053 -123231 20450 +Display: 10110100 00110011 -123357 20448 -7715 F +Stimuli: 76 -103 12346058 -123228 20456 +Display: 10110011 00110110 -123358 20454 -7714 F +Stimuli: 77 -101 12346063 -123225 20462 +Display: 10110010 00111001 -123359 20460 -7713 F +Stimuli: 78 -99 12346068 -123222 20468 +Display: 10110001 00111100 -123360 20466 -7712 F +Stimuli: 79 -97 12346073 -123219 20474 +Display: 10110000 00111111 -123361 20472 -7711 F +Stimuli: 80 -95 12346078 -123216 20480 +Display: 10101111 01000010 -123362 20478 -7710 F +Stimuli: 81 -93 12346083 -123213 20486 +Display: 10101110 01000101 -123363 20484 -7709 F +Stimuli: 82 -91 12346088 -123210 20492 +Display: 10101101 01001000 -123364 20490 -7708 F +Stimuli: 83 -89 12346093 -123207 20498 +Display: 10101100 01001011 -123365 20496 -7707 F +Stimuli: 84 -87 12346098 -123204 20504 +Display: 10101011 01001110 -123366 20502 -7706 F +Stimuli: 85 -85 12346103 -123201 20510 +Display: 10101010 01010001 -123367 20508 -7705 F +Stimuli: 86 -83 12346108 -123198 20516 +Display: 10101001 01010100 -123368 20514 -7704 F +Stimuli: 87 -81 12346113 -123195 20522 +Display: 10101000 01010111 -123369 20520 -7703 F +Stimuli: 88 -79 12346118 -123192 20528 +Display: 10100111 01011010 -123370 20526 -7702 F +Stimuli: 89 -77 12346123 -123189 20534 +Display: 10100110 01011101 -123371 20532 -7701 F +Stimuli: 90 -75 12346128 -123186 20540 +Display: 10100101 01100000 -123372 20538 -7700 F +Stimuli: 91 -73 12346133 -123183 20546 +Display: 10100100 01100011 -123373 20544 -7699 F +Stimuli: 92 -71 12346138 -123180 20552 +Display: 10100011 01100110 -123374 20550 -7698 F +Stimuli: 93 -69 12346143 -123177 20558 +Display: 10100010 01101001 -123375 20556 -7697 F +Stimuli: 94 -67 12346148 -123174 20564 +Display: 10100001 01101100 -123376 20562 -7696 F +Stimuli: 95 -65 12346153 -123171 20570 +Display: 10100000 01101111 -123377 20568 -7695 F +Stimuli: 96 -63 12346158 -123168 20576 +Display: 10011111 01110010 -123378 20574 -7694 F +Stimuli: 97 -61 12346163 -123165 20582 +Display: 10011110 01110101 -123379 20580 -7693 F +Stimuli: 98 -59 12346168 -123162 20588 +Display: 10011101 01111000 -123380 20586 -7692 F +Stimuli: 99 -57 12346173 -123159 20594 +Display: 10011100 01111011 -123381 20592 -7691 F +Stimuli: 100 -55 12346178 -123156 20600 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/main.cpp new file mode 100644 index 000000000..baafeba5d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/main.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal stimulus_line3; + sc_signal stimulus_line4; + sc_signal stimulus_line5; + sc_signal stimulus_line6; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector result_line1; + sc_signal_bool_vector result_line2; + sc_signal result_line3; + sc_signal result_line4; + sc_signal result_line5; + sc_signal result_line6; + + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.cpp new file mode 100644 index 000000000..ebcfe7bf0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + + tmp1 = "00000000"; + tmp2 = "00000001"; + tmp3 = 12345678; + tmp4 = -123456; + tmp5 = 20000; + tmp6 = 'R'; + + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " << tmp5 << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 2; + tmp3 = tmp3 + 5; + tmp4 = tmp4 + 3; + tmp5 = tmp5 + 6; + tmp6 = tmp6 + 4; + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.h new file mode 100644 index 000000000..cf0a3e621 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/datatypes/stimulus.h @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.cpp new file mode 100644 index 000000000..86f654680 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + decrement.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "decrement.h" + +void decrement::entry(){ + + #define ONE 1 + const int eins = 1; + int tmp1; + sc_bigint<4> tmp2; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + + // + // main loop + // + + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + + //execute simple operations + tmp1 = tmp1 - 1; + tmp1 = tmp1 - ONE; + tmp1 = tmp1 - eins; + tmp1--; + tmp2 = tmp2 - 1; + tmp2 = tmp2 - ONE; + tmp2 = tmp2 - eins; + tmp2--; + + out_ack.write(true); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.f new file mode 100644 index 000000000..894de102e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.f @@ -0,0 +1,4 @@ +decrement/stimulus.cpp +decrement/display.cpp +decrement/decrement.cpp +decrement/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.h new file mode 100644 index 000000000..cf19214a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/decrement.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + decrement.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( decrement ) +{ + SC_HAS_PROCESS( decrement ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + decrement ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_ACK, + sc_signal& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.cpp new file mode 100644 index 000000000..c1192ec7b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + + while(counter++<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << endl; + do { wait(); } while ( in_valid == true); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.h new file mode 100644 index 000000000..80f2aa3cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/display.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal& in_valid; // Input port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/golden/decrement.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/golden/decrement.log new file mode 100644 index 000000000..10fc11b2e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/golden/decrement.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 0 1 +Display: -4 1101 +Stimuli: 1 2 +Display: -3 1110 +Stimuli: 2 3 +Display: -2 1111 +Stimuli: 3 4 +Display: -1 0000 +Stimuli: 4 5 +Display: 0 0001 +Stimuli: 5 6 +Display: 1 0010 +Stimuli: 6 7 +Display: 2 0011 +Stimuli: 7 -8 +Display: 3 0100 +Stimuli: 8 -7 +Display: 4 0101 +Stimuli: 9 -6 +Display: 5 0110 +Stimuli: 10 -5 +Display: 6 0111 +Stimuli: 11 -4 +Display: 7 1000 +Stimuli: 12 -3 +Display: 8 1001 +Stimuli: 13 -2 +Display: 9 1010 +Stimuli: 14 -1 +Display: 10 1011 +Stimuli: 15 0 +Display: 11 1100 +Stimuli: 16 1 +Display: 12 1101 +Stimuli: 17 2 +Display: 13 1110 +Stimuli: 18 3 +Display: 14 1111 +Stimuli: 19 4 +Display: 15 0000 +Stimuli: 20 5 +Display: 16 0001 +Stimuli: 21 6 +Display: 17 0010 +Stimuli: 22 7 +Display: 18 0011 +Stimuli: 23 -8 +Display: 19 0100 +Stimuli: 24 -7 +Display: 20 0101 +Stimuli: 25 -6 +Display: 21 0110 +Stimuli: 26 -5 +Display: 22 0111 +Stimuli: 27 -4 +Display: 23 1000 +Stimuli: 28 -3 +Display: 24 1001 +Stimuli: 29 -2 +Display: 25 1010 +Stimuli: 30 -1 +Display: 26 1011 +Stimuli: 31 0 +Display: 27 1100 +Stimuli: 32 1 +Display: 28 1101 +Stimuli: 33 2 +Display: 29 1110 +Stimuli: 34 3 +Display: 30 1111 +Stimuli: 35 4 +Display: 31 0000 +Stimuli: 36 5 +Display: 32 0001 +Stimuli: 37 6 +Display: 33 0010 +Stimuli: 38 7 +Display: 34 0011 +Stimuli: 39 -8 +Display: 35 0100 +Stimuli: 40 -7 +Display: 36 0101 +Stimuli: 41 -6 +Display: 37 0110 +Stimuli: 42 -5 +Display: 38 0111 +Stimuli: 43 -4 +Display: 39 1000 +Stimuli: 44 -3 +Display: 40 1001 +Stimuli: 45 -2 +Display: 41 1010 +Stimuli: 46 -1 +Display: 42 1011 +Stimuli: 47 0 +Display: 43 1100 +Stimuli: 48 1 +Display: 44 1101 +Stimuli: 49 2 +Display: 45 1110 +Stimuli: 50 3 +Display: 46 1111 +Stimuli: 51 4 +Display: 47 0000 +Stimuli: 52 5 +Display: 48 0001 +Stimuli: 53 6 +Display: 49 0010 +Stimuli: 54 7 +Display: 50 0011 +Stimuli: 55 -8 +Display: 51 0100 +Stimuli: 56 -7 +Display: 52 0101 +Stimuli: 57 -6 +Display: 53 0110 +Stimuli: 58 -5 +Display: 54 0111 +Stimuli: 59 -4 +Display: 55 1000 +Stimuli: 60 -3 +Display: 56 1001 +Stimuli: 61 -2 +Display: 57 1010 +Stimuli: 62 -1 +Display: 58 1011 +Stimuli: 63 0 +Display: 59 1100 +Stimuli: 64 1 +Display: 60 1101 +Stimuli: 65 2 +Display: 61 1110 +Stimuli: 66 3 +Display: 62 1111 +Stimuli: 67 4 +Display: 63 0000 +Stimuli: 68 5 +Display: 64 0001 +Stimuli: 69 6 +Display: 65 0010 +Stimuli: 70 7 +Display: 66 0011 +Stimuli: 71 -8 +Display: 67 0100 +Stimuli: 72 -7 +Display: 68 0101 +Stimuli: 73 -6 +Display: 69 0110 +Stimuli: 74 -5 +Display: 70 0111 +Stimuli: 75 -4 +Display: 71 1000 +Stimuli: 76 -3 +Display: 72 1001 +Stimuli: 77 -2 +Display: 73 1010 +Stimuli: 78 -1 +Display: 74 1011 +Stimuli: 79 0 +Display: 75 1100 +Stimuli: 80 1 +Display: 76 1101 +Stimuli: 81 2 +Display: 77 1110 +Stimuli: 82 3 +Display: 78 1111 +Stimuli: 83 4 +Display: 79 0000 +Stimuli: 84 5 +Display: 80 0001 +Stimuli: 85 6 +Display: 81 0010 +Stimuli: 86 7 +Display: 82 0011 +Stimuli: 87 -8 +Display: 83 0100 +Stimuli: 88 -7 +Display: 84 0101 +Stimuli: 89 -6 +Display: 85 0110 +Stimuli: 90 -5 +Display: 86 0111 +Stimuli: 91 -4 +Display: 87 1000 +Stimuli: 92 -3 +Display: 88 1001 +Stimuli: 93 -2 +Display: 89 1010 +Stimuli: 94 -1 +Display: 90 1011 +Stimuli: 95 0 +Display: 91 1100 +Stimuli: 96 1 +Display: 92 1101 +Stimuli: 97 2 +Display: 93 1110 +Stimuli: 98 3 +Display: 94 1111 +Stimuli: 99 4 +Display: 95 0000 +Stimuli: 100 5 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/main.cpp new file mode 100644 index 000000000..89e3a7295 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/main.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "decrement.h" + +int sc_main(int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal result_line1; + sc_signal_bool_vector result_line2; + + // initialization to fix regressions - ali + output_valid = false; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + input_valid, + ack); + + decrement decrement1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + input_valid, + ack, + result_line1, + result_line2, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + output_valid); + + sc_start(); + + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.cpp new file mode 100644 index 000000000..924a46e69 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + int tmp1; + sc_signed tmp2(4); + + tmp1 = 0; + tmp2 = "0001"; + + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + cout << "Stimuli: " << tmp1 << " " << tmp2 << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.h new file mode 100644 index 000000000..92e32db22 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset ; + sc_signal& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/common.h new file mode 100644 index 000000000..60baad076 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector5; +typedef sc_signal > sc_signal_bool_vector6; +typedef sc_signal > sc_signal_bool_vector7; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.cpp new file mode 100644 index 000000000..47832f313 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter++<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << " " << in_value5.read() << endl; + do { wait(); } while ( in_valid == true); + } + wait(); + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.h new file mode 100644 index 000000000..377dd8cbd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/display.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector4& in_value1; // Output port + const sc_signal_bool_vector5& in_value2; // Output port + const sc_signal_bool_vector6& in_value3; // Output port + const sc_signal_bool_vector7& in_value4; // Output port + const sc_signal_bool_vector8& in_value5; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector4& IN_VALUE1, + const sc_signal_bool_vector5& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector7& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/golden/sharing.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/golden/sharing.log new file mode 100644 index 000000000..1789b5327 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/golden/sharing.log @@ -0,0 +1,204 @@ +SystemC Simulation +Stimuli: 0 1 2 3 4 +Display: 1100 11101 111110 0000001 00000010 +Stimuli: 1 2 3 4 5 +Display: 1101 11110 111111 0000010 00000011 +Stimuli: 2 3 4 5 6 +Display: 1110 11111 000000 0000011 00000100 +Stimuli: 3 4 5 6 7 +Display: 1111 00000 000001 0000100 00000101 +Stimuli: 4 5 6 7 8 +Display: 0000 00001 000010 0000101 00000110 +Stimuli: 5 6 7 8 9 +Display: 0001 00010 000011 0000110 00000111 +Stimuli: 6 7 8 9 10 +Display: 0010 00011 000100 0000111 00001000 +Stimuli: 7 8 9 10 11 +Display: 0011 00100 000101 0001000 00001001 +Stimuli: -8 9 10 11 12 +Display: 0100 00101 000110 0001001 00001010 +Stimuli: -7 10 11 12 13 +Display: 0101 00110 000111 0001010 00001011 +Stimuli: -6 11 12 13 14 +Display: 0110 00111 001000 0001011 00001100 +Stimuli: -5 12 13 14 15 +Display: 0111 01000 001001 0001100 00001101 +Stimuli: -4 13 14 15 16 +Display: 1000 01001 001010 0001101 00001110 +Stimuli: -3 14 15 16 17 +Display: 1001 01010 001011 0001110 00001111 +Stimuli: -2 15 16 17 18 +Display: 1010 01011 001100 0001111 00010000 +Stimuli: -1 -16 17 18 19 +Display: 1011 01100 001101 0010000 00010001 +Stimuli: 0 -15 18 19 20 +Display: 1100 01101 001110 0010001 00010010 +Stimuli: 1 -14 19 20 21 +Display: 1101 01110 001111 0010010 00010011 +Stimuli: 2 -13 20 21 22 +Display: 1110 01111 010000 0010011 00010100 +Stimuli: 3 -12 21 22 23 +Display: 1111 10000 010001 0010100 00010101 +Stimuli: 4 -11 22 23 24 +Display: 0000 10001 010010 0010101 00010110 +Stimuli: 5 -10 23 24 25 +Display: 0001 10010 010011 0010110 00010111 +Stimuli: 6 -9 24 25 26 +Display: 0010 10011 010100 0010111 00011000 +Stimuli: 7 -8 25 26 27 +Display: 0011 10100 010101 0011000 00011001 +Stimuli: -8 -7 26 27 28 +Display: 0100 10101 010110 0011001 00011010 +Stimuli: -7 -6 27 28 29 +Display: 0101 10110 010111 0011010 00011011 +Stimuli: -6 -5 28 29 30 +Display: 0110 10111 011000 0011011 00011100 +Stimuli: -5 -4 29 30 31 +Display: 0111 11000 011001 0011100 00011101 +Stimuli: -4 -3 30 31 32 +Display: 1000 11001 011010 0011101 00011110 +Stimuli: -3 -2 31 32 33 +Display: 1001 11010 011011 0011110 00011111 +Stimuli: -2 -1 -32 33 34 +Display: 1010 11011 011100 0011111 00100000 +Stimuli: -1 0 -31 34 35 +Display: 1011 11100 011101 0100000 00100001 +Stimuli: 0 1 -30 35 36 +Display: 1100 11101 011110 0100001 00100010 +Stimuli: 1 2 -29 36 37 +Display: 1101 11110 011111 0100010 00100011 +Stimuli: 2 3 -28 37 38 +Display: 1110 11111 100000 0100011 00100100 +Stimuli: 3 4 -27 38 39 +Display: 1111 00000 100001 0100100 00100101 +Stimuli: 4 5 -26 39 40 +Display: 0000 00001 100010 0100101 00100110 +Stimuli: 5 6 -25 40 41 +Display: 0001 00010 100011 0100110 00100111 +Stimuli: 6 7 -24 41 42 +Display: 0010 00011 100100 0100111 00101000 +Stimuli: 7 8 -23 42 43 +Display: 0011 00100 100101 0101000 00101001 +Stimuli: -8 9 -22 43 44 +Display: 0100 00101 100110 0101001 00101010 +Stimuli: -7 10 -21 44 45 +Display: 0101 00110 100111 0101010 00101011 +Stimuli: -6 11 -20 45 46 +Display: 0110 00111 101000 0101011 00101100 +Stimuli: -5 12 -19 46 47 +Display: 0111 01000 101001 0101100 00101101 +Stimuli: -4 13 -18 47 48 +Display: 1000 01001 101010 0101101 00101110 +Stimuli: -3 14 -17 48 49 +Display: 1001 01010 101011 0101110 00101111 +Stimuli: -2 15 -16 49 50 +Display: 1010 01011 101100 0101111 00110000 +Stimuli: -1 -16 -15 50 51 +Display: 1011 01100 101101 0110000 00110001 +Stimuli: 0 -15 -14 51 52 +Display: 1100 01101 101110 0110001 00110010 +Stimuli: 1 -14 -13 52 53 +Display: 1101 01110 101111 0110010 00110011 +Stimuli: 2 -13 -12 53 54 +Display: 1110 01111 110000 0110011 00110100 +Stimuli: 3 -12 -11 54 55 +Display: 1111 10000 110001 0110100 00110101 +Stimuli: 4 -11 -10 55 56 +Display: 0000 10001 110010 0110101 00110110 +Stimuli: 5 -10 -9 56 57 +Display: 0001 10010 110011 0110110 00110111 +Stimuli: 6 -9 -8 57 58 +Display: 0010 10011 110100 0110111 00111000 +Stimuli: 7 -8 -7 58 59 +Display: 0011 10100 110101 0111000 00111001 +Stimuli: -8 -7 -6 59 60 +Display: 0100 10101 110110 0111001 00111010 +Stimuli: -7 -6 -5 60 61 +Display: 0101 10110 110111 0111010 00111011 +Stimuli: -6 -5 -4 61 62 +Display: 0110 10111 111000 0111011 00111100 +Stimuli: -5 -4 -3 62 63 +Display: 0111 11000 111001 0111100 00111101 +Stimuli: -4 -3 -2 63 64 +Display: 1000 11001 111010 0111101 00111110 +Stimuli: -3 -2 -1 -64 65 +Display: 1001 11010 111011 0111110 00111111 +Stimuli: -2 -1 0 -63 66 +Display: 1010 11011 111100 0111111 01000000 +Stimuli: -1 0 1 -62 67 +Display: 1011 11100 111101 1000000 01000001 +Stimuli: 0 1 2 -61 68 +Display: 1100 11101 111110 1000001 01000010 +Stimuli: 1 2 3 -60 69 +Display: 1101 11110 111111 1000010 01000011 +Stimuli: 2 3 4 -59 70 +Display: 1110 11111 000000 1000011 01000100 +Stimuli: 3 4 5 -58 71 +Display: 1111 00000 000001 1000100 01000101 +Stimuli: 4 5 6 -57 72 +Display: 0000 00001 000010 1000101 01000110 +Stimuli: 5 6 7 -56 73 +Display: 0001 00010 000011 1000110 01000111 +Stimuli: 6 7 8 -55 74 +Display: 0010 00011 000100 1000111 01001000 +Stimuli: 7 8 9 -54 75 +Display: 0011 00100 000101 1001000 01001001 +Stimuli: -8 9 10 -53 76 +Display: 0100 00101 000110 1001001 01001010 +Stimuli: -7 10 11 -52 77 +Display: 0101 00110 000111 1001010 01001011 +Stimuli: -6 11 12 -51 78 +Display: 0110 00111 001000 1001011 01001100 +Stimuli: -5 12 13 -50 79 +Display: 0111 01000 001001 1001100 01001101 +Stimuli: -4 13 14 -49 80 +Display: 1000 01001 001010 1001101 01001110 +Stimuli: -3 14 15 -48 81 +Display: 1001 01010 001011 1001110 01001111 +Stimuli: -2 15 16 -47 82 +Display: 1010 01011 001100 1001111 01010000 +Stimuli: -1 -16 17 -46 83 +Display: 1011 01100 001101 1010000 01010001 +Stimuli: 0 -15 18 -45 84 +Display: 1100 01101 001110 1010001 01010010 +Stimuli: 1 -14 19 -44 85 +Display: 1101 01110 001111 1010010 01010011 +Stimuli: 2 -13 20 -43 86 +Display: 1110 01111 010000 1010011 01010100 +Stimuli: 3 -12 21 -42 87 +Display: 1111 10000 010001 1010100 01010101 +Stimuli: 4 -11 22 -41 88 +Display: 0000 10001 010010 1010101 01010110 +Stimuli: 5 -10 23 -40 89 +Display: 0001 10010 010011 1010110 01010111 +Stimuli: 6 -9 24 -39 90 +Display: 0010 10011 010100 1010111 01011000 +Stimuli: 7 -8 25 -38 91 +Display: 0011 10100 010101 1011000 01011001 +Stimuli: -8 -7 26 -37 92 +Display: 0100 10101 010110 1011001 01011010 +Stimuli: -7 -6 27 -36 93 +Display: 0101 10110 010111 1011010 01011011 +Stimuli: -6 -5 28 -35 94 +Display: 0110 10111 011000 1011011 01011100 +Stimuli: -5 -4 29 -34 95 +Display: 0111 11000 011001 1011100 01011101 +Stimuli: -4 -3 30 -33 96 +Display: 1000 11001 011010 1011101 01011110 +Stimuli: -3 -2 31 -32 97 +Display: 1001 11010 011011 1011110 01011111 +Stimuli: -2 -1 -32 -31 98 +Display: 1010 11011 011100 1011111 01100000 +Stimuli: -1 0 -31 -30 99 +Display: 1011 11100 011101 1100000 01100001 +Stimuli: 0 1 -30 -29 100 +Display: 1100 11101 011110 1100001 01100010 +Stimuli: 1 2 -29 -28 101 +Display: 1101 11110 011111 1100010 01100011 +Stimuli: 2 3 -28 -27 102 +Display: 1110 11111 100000 1100011 01100100 +Stimuli: 3 4 -27 -26 103 +Display: 1111 00000 100001 1100100 01100101 +Stimuli: 4 5 -26 -25 104 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/main.cpp new file mode 100644 index 000000000..82b0ce24a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/main.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "sharing.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector4 stimulus_line1; + sc_signal_bool_vector5 stimulus_line2; + sc_signal_bool_vector6 stimulus_line3; + sc_signal_bool_vector7 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector4 result_line1; + sc_signal_bool_vector5 result_line2; + sc_signal_bool_vector6 result_line3; + sc_signal_bool_vector7 result_line4; + sc_signal_bool_vector8 result_line5; + + // SYL 990908 - Initialize some signals -- logs diffed + // when I hacked the simulation kernel. + reset = 0; + input_valid = 0; + ack = 0; + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + ack); + + sharing sharing1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.cpp new file mode 100644 index 000000000..8215ce41d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "sharing.h" + +void sharing::entry(){ + + sc_bigint<4> tmp1; + sc_biguint<5> tmp2; + sc_bigint<6> tmp3; + sc_biguint<7> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + out_ack.write(true); + + //execute simple operations + tmp1 = tmp1 - 4; + tmp2 = tmp2 - 4; + tmp3 = tmp3 - 4; + tmp4 = tmp4 - 2; + tmp5 = tmp5 - 2; + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + wait(); + } +} + +// EOF + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.f new file mode 100644 index 000000000..0c0f3ff29 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.f @@ -0,0 +1,4 @@ +sharing/stimulus.cpp +sharing/display.cpp +sharing/sharing.cpp +sharing/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.h new file mode 100644 index 000000000..ca7191f3d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/sharing.h @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( sharing ) +{ + SC_HAS_PROCESS( sharing ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector4& in_value1; // Input port + const sc_signal_bool_vector5& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector7& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector4& out_value1; // Output port + sc_signal_bool_vector5& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector7& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + sharing ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector4& IN_VALUE1, + const sc_signal_bool_vector5& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector7& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_ACK, + sc_signal_bool_vector4& OUT_VALUE1, + sc_signal_bool_vector5& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector7& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.cpp new file mode 100644 index 000000000..4c05ea844 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(4); + sc_signed tmp2(5); + sc_signed tmp3(6); + sc_signed tmp4(7); + sc_signed tmp5(8); + + tmp1 = "0b0000"; + tmp2 = "0b00001"; + tmp3 = "0b000010"; + tmp4 = "0b0000011"; + tmp5 = "0b00000100"; + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " << tmp5 << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 1; + tmp5 = tmp5 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.h new file mode 100644 index 000000000..9a8f62092 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/stimulus.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector4& out_value1; // Output port + sc_signal_bool_vector5& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector7& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector4& OUT_VALUE1, + sc_signal_bool_vector5& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector7& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h new file mode 100644 index 000000000..8a560ac63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp new file mode 100644 index 000000000..966569d48 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h new file mode 100644 index 000000000..a11ccd275 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector4& in_data3; // Input port + const sc_signal_bool_vector8& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector4& IN_DATA3, + const sc_signal_bool_vector8& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log new file mode 100644 index 000000000..9486fc2bd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/golden/subtract.log @@ -0,0 +1,31 @@ +SystemC Simulation +Stimuli : 255 -1 15 -1 255 at 23 ns +Display : 254 1110 1110 11111110 11111110 at 27 ns +Display : 254 1110 1110 11111110 11111110 at 29 ns +Display : 252 1100 1100 11111100 11111100 at 31 ns +Display : -2 1110 1110 11111110 11111110 at 34 ns +Display : -256 0000 0000 00000000 00000000 at 37 ns +Display : 0 0000 0000 00000000 00000000 at 40 ns +Stimuli : 254 -2 14 -2 254 at 44 ns +Display : 253 1101 1101 11111101 11111101 at 48 ns +Display : 253 1101 1101 11111101 11111101 at 50 ns +Display : 251 1011 1011 11111011 11111011 at 52 ns +Display : -3 1101 1101 11111101 11111101 at 55 ns +Display : -257 1111 1111 11111111 11111111 at 58 ns +Display : 16 0000 0000 00000000 00000001 at 61 ns +Stimuli : 253 -3 13 -3 253 at 65 ns +Display : 252 1100 1100 11111100 11111100 at 69 ns +Display : 252 1100 1100 11111100 11111100 at 71 ns +Display : 250 1010 1010 11111010 11111010 at 73 ns +Display : -4 1100 1100 11111100 11111100 at 76 ns +Display : -258 1110 1110 11111110 11111110 at 79 ns +Display : 16 0000 0000 00000000 00000010 at 82 ns +Stimuli : 252 -4 12 -4 252 at 86 ns +Display : 251 1011 1011 11111011 11111011 at 90 ns +Display : 251 1011 1011 11111011 11111011 at 92 ns +Display : 249 1001 1001 11111001 11111001 at 94 ns +Display : -5 1011 1011 11111011 11111011 at 97 ns +Display : -259 1101 1101 11111101 11111101 at 100 ns +Display : 16 0000 0000 00000000 00000011 at 103 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp new file mode 100644 index 000000000..86a1b91b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "subtract.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector4 stimulus_line3; + sc_signal_bool_vector8 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector4 result_line3; + sc_signal_bool_vector8 result_line4; + sc_signal_bool_vector8 result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + subtraction subtraction1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp new file mode 100644 index 000000000..8856451d4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + int send_value1 = 255; + sc_signed send_value2(4); + sc_unsigned send_value3(4); + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + reset.write(true); + out_valid.write(false); + send_value2 = 15; + send_value3 = 15; + send_value4 = 255; + send_value5 = 255; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1--; + send_value2 -= 1; + send_value3 -= 1; + send_value4 -= 1; + send_value5 -= 1; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h new file mode 100644 index 000000000..1d675ef5c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector4& out_stimulus3; + sc_signal_bool_vector8& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector4& OUT_STIMULUS3, + sc_signal_bool_vector8& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp new file mode 100644 index 000000000..a3fc5ee4b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.cpp @@ -0,0 +1,166 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + subtract.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "subtract.h" + +void subtraction::entry(){ + + int tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute operations + tmp1 = tmp1 - 1; + tmp2 = tmp2 - 1; + tmp3 = tmp3 - 1; + tmp4 = tmp4 - 1; + tmp5 = tmp5 - 1; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + // write outputs + out_value1.write(tmp1--); + out_value2.write(tmp2--); + out_value3.write(tmp3--); + out_value4.write(tmp4--); + out_value5.write(tmp5--); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + // write outputs + out_value1.write(--tmp1); + out_value2.write(--tmp2); + out_value3.write(--tmp3); + out_value4.write(--tmp4); + out_value5.write(--tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations + tmp1 = tmp1 - 254; + tmp2 = tmp2 - 14; + tmp3 = tmp3 - 14; + tmp4 = tmp4 - 254; + tmp5 = tmp5 - 254; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations + tmp1 -= 254; + tmp2 -= 14; + tmp3 -= 14; + tmp4 -= 254; + tmp5 -= 254; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + //execute operations with signed and unsigned mix and mixed bit width + tmp1 = (tmp3 - tmp2).to_int(); + tmp2 = tmp2 - tmp4; + tmp3 = tmp3 - tmp5; + tmp4 = tmp4 - tmp5; + tmp5 = tmp4 - tmp5; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f new file mode 100644 index 000000000..fe9d1d54d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.f @@ -0,0 +1,4 @@ +subtract/stimulus.cpp +subtract/display.cpp +subtract/subtract.cpp +subtract/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h new file mode 100644 index 000000000..bac065909 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/subtract.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + subtract.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( subtraction ) +{ + SC_HAS_PROCESS( subtraction ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; + const sc_signal_bool_vector4& in_value3; + const sc_signal_bool_vector8& in_value4; + const sc_signal_bool_vector8& in_value5; + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal_bool_vector4& out_value2; + sc_signal_bool_vector4& out_value3; + sc_signal_bool_vector8& out_value4; + sc_signal_bool_vector8& out_value5; + sc_signal& out_valid; // Output port + + // + // Constructor + // + + subtraction( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector4& IN_VALUE3, + const sc_signal_bool_vector8& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector4& OUT_VALUE3, + sc_signal_bool_vector8& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/and_1.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/and_1.cpp new file mode 100644 index 000000000..5a8b81974 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/and_1.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + and_1.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "and_1.h" + +void and_1::entry(){ + + signed int tmp1; + unsigned int tmp2; + sc_lv<8> tmp3; + sc_lv<8> tmp3_tmp; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp3_tmp = 0x0f; + tmp1 = tmp1 & 0x0f & 0x12; + tmp2 = tmp2 & 0x0f & 0x13 ; + tmp3 = tmp3 & tmp3_tmp; + tmp4 = tmp4 & 0x0f & 0x14 ; + tmp5 = tmp5 & 0x0f & 0x15 ; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + + //execute simple operations + tmp3_tmp = 0x03; + tmp1 &= 0x03; + tmp2 &= 0x03; + tmp3 &= tmp3_tmp; + tmp4 &= 0x03; + tmp5 &= 0x03; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/and_1.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/and_1.f new file mode 100644 index 000000000..606aecf73 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/and_1.f @@ -0,0 +1,4 @@ +and_1/stimulus.cpp +and_1/display.cpp +and_1/and_1.cpp +and_1/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/and_1.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/and_1.h new file mode 100644 index 000000000..2e88eb916 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/and_1.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + and_1.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( and_1 ) +{ + SC_HAS_PROCESS( and_1 ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal& in_value2; // Input port + const sc_signal_bool_vector& in_value3; // Input port + const sc_signal_bool_vector& in_value4; // Input port + const sc_signal_bool_vector& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal& out_value2; // Output port + sc_signal_bool_vector& out_value3; // Output port + sc_signal_bool_vector& out_value4; // Output port + sc_signal_bool_vector& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + and_1 ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal_bool_vector& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal_bool_vector& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/display.cpp new file mode 100644 index 000000000..966569d48 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/display.h new file mode 100644 index 000000000..59a19b5f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal_bool_vector& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal_bool_vector& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/golden/and_1.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/golden/and_1.log new file mode 100644 index 000000000..dfc053eb3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/golden/and_1.log @@ -0,0 +1,39 @@ +SystemC Simulation +Stimuli : 1 1 00000001 1 1 at 13 ns +Display : 0 1 00000001 00000000 00000001 at 17 ns +Display : 0 1 00000001 00000000 00000001 at 20 ns +Stimuli : 12 12 00001100 12 12 at 24 ns +Display : 0 0 00001100 00000100 00000100 at 28 ns +Display : 0 0 00000000 00000000 00000000 at 31 ns +Stimuli : 23 23 00010111 23 23 at 35 ns +Display : 2 3 00000111 00000100 00000101 at 39 ns +Display : 2 3 00000011 00000000 00000001 at 42 ns +Stimuli : 34 34 00100010 34 34 at 46 ns +Display : 2 2 00000010 00000000 00000000 at 50 ns +Display : 2 2 00000010 00000000 00000000 at 53 ns +Stimuli : 45 45 00101101 45 45 at 57 ns +Display : 0 1 00001101 00000100 00000101 at 61 ns +Display : 0 1 00000001 00000000 00000001 at 64 ns +Stimuli : 56 56 00111000 56 56 at 68 ns +Display : 0 0 00001000 00000000 00000000 at 72 ns +Display : 0 0 00000000 00000000 00000000 at 75 ns +Stimuli : 67 67 01000011 67 67 at 79 ns +Display : 2 3 00000011 00000000 00000001 at 83 ns +Display : 2 3 00000011 00000000 00000001 at 86 ns +Stimuli : 78 78 01001110 78 78 at 90 ns +Display : 2 2 00001110 00000100 00000100 at 94 ns +Display : 2 2 00000010 00000000 00000000 at 97 ns +Stimuli : 89 89 01011001 89 89 at 101 ns +Display : 0 1 00001001 00000000 00000001 at 105 ns +Display : 0 1 00000001 00000000 00000001 at 108 ns +Stimuli : 100 100 01100100 100 100 at 112 ns +Display : 0 0 00000100 00000100 00000100 at 116 ns +Display : 0 0 00000000 00000000 00000000 at 119 ns +Stimuli : 111 111 01101111 111 111 at 123 ns +Display : 2 3 00001111 00000100 00000101 at 127 ns +Display : 2 3 00000011 00000000 00000001 at 130 ns +Stimuli : 122 122 01111010 122 122 at 134 ns +Display : 2 2 00001010 00000000 00000000 at 138 ns +Display : 2 2 00000010 00000000 00000000 at 141 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/main.cpp new file mode 100644 index 000000000..79b1c4704 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "and_1.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal stimulus_line2; + sc_signal_bool_vector stimulus_line3; + sc_signal_bool_vector stimulus_line4; + sc_signal_bool_vector stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal result_line2; + sc_signal_bool_vector result_line3; + sc_signal_bool_vector result_line4; + sc_signal_bool_vector result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + and_1 and1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/stimulus.cpp new file mode 100644 index 000000000..8664cf6ec --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/stimulus.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + signed int send_value1 = 1; + unsigned int send_value2 = 1; + sc_lv<8> send_value3; + sc_bigint<8> send_value4; + sc_biguint<8> send_value5; + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value3 = 1; + send_value4 = 1; + send_value5 = 1; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(10); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+11; + send_value2 = send_value2+11; + send_value3 = send_value3.to_int()+11; + send_value4 = send_value4+11; + send_value5 = send_value5+11; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/stimulus.h new file mode 100644 index 000000000..9bd211ba6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/and_1/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal& out_stimulus2; + sc_signal_bool_vector& out_stimulus3; + sc_signal_bool_vector& out_stimulus4; + sc_signal_bool_vector& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal& OUT_STIMULUS2, + sc_signal_bool_vector& OUT_STIMULUS3, + sc_signal_bool_vector& OUT_STIMULUS4, + sc_signal_bool_vector& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/common.h new file mode 100644 index 000000000..8976a26a2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector8; +typedef sc_signal > sc_signal_logic_vector4; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/datatypes.cpp new file mode 100644 index 000000000..0cbeaaf72 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/datatypes.cpp @@ -0,0 +1,142 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry() + +{ + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + bool tmp7; + bool tmp7r; + sc_bv<4> tmp8; + sc_bv<4> tmp8r; + sc_lv<4> tmp9; + sc_lv<4> tmp9r; + +// define 1 dimensional array + int tmpa[2]; + char tmpb[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// +// initialization of sc_array + + tmpa[0] = 12; + tmpa[1] = 127; + tmpb[1] = 'G'; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + tmpb[0] = in_value7.read(); + tmp7 = in_value8.read(); + tmp8 = in_value9.read(); + tmp9 = in_value10.read(); + + out_ack.write(true); + + //execute mixed data type and operations + + // signed(8) <- signed(8) & unsigned(8) + tmp1r = tmp1 & tmp2; + // unsigned(8) <- char & long + tmp2r = tmp6 & tmp3; + // long <- int & char + tmp3r = tmp4 & tmp6; + // int <- int & short + tmp4r = tmp4 & tmp5; + // short <- short & const + tmp5r = tmp5 & 5; + // char <- char_array[0] & int_array[1] + tmp6r = tmpb[0] & tmpa[1]; + // bool <- bool & bool; + tmp7r = tmp7 & tmp7; + // sc_bool_vector(4) <- sc_bool_vector(4) & sc_logic_vector(4) + tmp8r = tmp8 & tmp9; + // sc_logic_vector(4) <- sc_bool_vector(4) & "0111" + tmp9r = tmp9 & sc_bv<4>( "0111" ); + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + out_value7.write(tmp7r); + out_value8.write(tmp8r); + out_value9.write(tmp9r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/datatypes.h new file mode 100644 index 000000000..547119370 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/datatypes.h @@ -0,0 +1,146 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector8& in_value1; // Input port + const sc_signal_bool_vector8& in_value2; // Input port + const sc_signal& in_value3; // Input port + const sc_signal& in_value4; // Input port + const sc_signal& in_value5; // Input port + const sc_signal& in_value6; // Input port + const sc_signal& in_value7; // Input port + const sc_signal& in_value8 ; + const sc_signal_bool_vector4& in_value9; // Input port + const sc_signal_logic_vector4& in_value10; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector8& out_value1; // Output port + sc_signal_bool_vector8& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_value7; // Output port + sc_signal_bool_vector4& out_value8; // Output port + sc_signal_logic_vector4& out_value9; // Output port + sc_signal& out_valid; // Output port + + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector8& IN_VALUE1, + const sc_signal_bool_vector8& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALUE7, + const sc_signal& IN_VALUE8, + const sc_signal_bool_vector4& IN_VALUE9, + const sc_signal_logic_vector4& IN_VALUE10, + const sc_signal& IN_VALID, + + sc_signal& OUT_ACK, + sc_signal_bool_vector8& OUT_VALUE1, + sc_signal_bool_vector8& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALUE7, + sc_signal_bool_vector4& OUT_VALUE8, + sc_signal_logic_vector4& OUT_VALUE9, + sc_signal& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_value7 (IN_VALUE7), + in_value8 (IN_VALUE8), + in_value9 (IN_VALUE9), + in_value10 (IN_VALUE10), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_value7 (OUT_VALUE7), + out_value8 (OUT_VALUE8), + out_value9 (OUT_VALUE9), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/display.cpp new file mode 100644 index 000000000..0c6fdf20e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter++<40){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read( +) << " " << in_value4.read() << " " << in_value5.read() << " " << in_value6.read() << " " << in_value7.read() << " " << in_value8.read() << " " << in_value9.read() <& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_value7; // Output port + const sc_signal_bool_vector4& in_value8; // Output port + const sc_signal_logic_vector4& in_value9; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector8& IN_VALUE1, + const sc_signal_bool_vector8& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALUE7, + const sc_signal_bool_vector4& IN_VALUE8, + const sc_signal_logic_vector4& IN_VALUE9, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_value7 (IN_VALUE7), + in_value8 (IN_VALUE8), + in_value9 (IN_VALUE9), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/golden/datatypes.log new file mode 100644 index 000000000..0af19af8b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/golden/datatypes.log @@ -0,0 +1,84 @@ +SystemC Simulation +Stimuli: 85 2 12345678 -123456 20000 $ A 1 1 2 +Display: 00000000 00000100 0 3072 0 A 1 0000 0010 +Stimuli: 87 3 12345683 -123453 20006 $ B 0 2 3 +Display: 00000011 00000000 0 3074 4 B 0 0010 0011 +Stimuli: 89 4 12345688 -123450 20012 $ C 1 3 4 +Display: 00000000 00000000 4 3076 4 C 1 0000 0100 +Stimuli: 91 5 12345693 -123447 20018 $ D 0 4 5 +Display: 00000001 00000100 0 3072 0 D 0 0100 0101 +Stimuli: 93 6 12345698 -123444 20024 $ E 1 5 6 +Display: 00000100 00100000 4 3080 0 E 1 0100 0110 +Stimuli: 95 7 12345703 -123441 20030 $ F 0 6 7 +Display: 00000111 00100100 4 3086 4 F 0 0110 0111 +Stimuli: 97 8 12345708 -123438 20036 $ G 1 7 8 +Display: 00000000 00100100 0 3136 4 G 1 0000 0000 +Stimuli: 99 9 12345713 -123435 20042 $ H 0 8 9 +Display: 00000001 00100000 4 3136 0 H 0 1000 0001 +Stimuli: 101 10 12345718 -123432 20048 $ I 1 9 10 +Display: 00000000 00100100 0 3152 0 I 1 1000 0010 +Stimuli: 103 11 12345723 -123429 20054 $ J 0 10 11 +Display: 00000011 00100000 0 3154 4 J 0 1010 0011 +Stimuli: 105 12 12345728 -123426 20060 $ K 1 11 12 +Display: 00001000 00000000 4 3164 4 K 1 1000 0100 +Stimuli: 107 13 12345733 -123423 20066 $ L 0 12 13 +Display: 00001001 00000100 32 3168 0 L 0 1100 0101 +Stimuli: 109 14 12345738 -123420 20072 $ M 1 13 14 +Display: 00001100 00000000 36 3168 0 M 1 1100 0110 +Stimuli: 111 15 12345743 -123417 20078 $ N 0 14 15 +Display: 00001111 00000100 36 3174 4 N 0 1110 0111 +Stimuli: 113 16 12345748 -123414 20084 $ O 1 15 0 +Display: 00010000 00000100 32 3168 4 O 1 0000 0000 +Stimuli: 115 17 12345753 -123411 20090 $ P 0 0 1 +Display: 00010001 00000000 36 3176 0 P 0 0000 0001 +Stimuli: 117 18 12345758 -123408 20096 $ Q 1 1 2 +Display: 00010000 00000100 32 3200 0 Q 1 0000 0010 +Stimuli: 119 19 12345763 -123405 20102 $ R 0 2 3 +Display: 00010011 00100000 32 3202 4 R 0 0010 0011 +Stimuli: 121 20 12345768 -123402 20108 $ S 1 3 4 +Display: 00010000 00100000 36 3204 4 S 1 0000 0100 +Stimuli: 123 21 12345773 -123399 20114 $ T 0 4 5 +Display: 00010001 00100100 32 3216 0 T 0 0100 0101 +Stimuli: 125 22 12345778 -123396 20120 $ U 1 5 6 +Display: 00010100 00100000 36 3224 0 U 1 0100 0110 +Stimuli: 127 23 12345783 -123393 20126 $ V 0 6 7 +Display: 00010111 00100100 36 3230 4 V 0 0110 0111 +Stimuli: -127 24 12345788 -123390 20132 $ W 1 7 8 +Display: 00000000 00100100 0 3584 4 W 1 0000 0000 +Stimuli: -125 25 12345793 -123387 20138 $ X 0 8 9 +Display: 00000001 00000000 4 3584 0 X 0 1000 0001 +Stimuli: -123 26 12345798 -123384 20144 $ Y 1 9 10 +Display: 00000000 00000100 0 3584 0 Y 1 1000 0010 +Stimuli: -121 27 12345803 -123381 20150 $ Z 0 10 11 +Display: 00000011 00000000 0 3586 4 Z 0 1010 0011 +Stimuli: -119 28 12345808 -123378 20156 $ [ 1 11 12 +Display: 00001000 00000000 4 3596 4 [ 1 1000 0100 +Stimuli: -117 29 12345813 -123375 20162 $ \ 0 12 13 +Display: 00001001 00000100 0 3584 0 \ 0 1100 0101 +Stimuli: -115 30 12345818 -123372 20168 $ ] 1 13 14 +Display: 00001100 00000000 4 3584 0 ] 1 1100 0110 +Stimuli: -113 31 12345823 -123369 20174 $ ^ 0 14 15 +Display: 00001111 00000100 4 3590 4 ^ 0 1110 0111 +Stimuli: -111 32 12345828 -123366 20180 $ _ 1 15 0 +Display: 00000000 00100100 0 3600 4 _ 1 0000 0000 +Stimuli: -109 33 12345833 -123363 20186 $ ` 0 0 1 +Display: 00000001 00100000 4 3608 0 ` 0 0000 0001 +Stimuli: -107 34 12345838 -123360 20192 $ a 1 1 2 +Display: 00000000 00100100 32 3616 0 a 1 0000 0010 +Stimuli: -105 35 12345843 -123357 20198 $ b 0 2 3 +Display: 00000011 00100000 32 3618 4 b 0 0010 0011 +Stimuli: -103 36 12345848 -123354 20204 $ c 1 3 4 +Display: 00000000 00100000 36 3620 4 c 1 0000 0100 +Stimuli: -101 37 12345853 -123351 20210 $ d 0 4 5 +Display: 00000001 00100100 32 3616 0 d 0 0100 0101 +Stimuli: -99 38 12345858 -123348 20216 $ e 1 5 6 +Display: 00000100 00000000 36 3624 0 e 1 0100 0110 +Stimuli: -97 39 12345863 -123345 20222 $ f 0 6 7 +Display: 00000111 00000100 36 3630 4 f 0 0110 0111 +Stimuli: -95 40 12345868 -123342 20228 $ g 1 7 8 +Display: 00100000 00000100 32 3584 4 g 1 0000 0000 +Stimuli: -93 41 12345873 -123339 20234 $ h 0 8 9 +Display: 00100001 00000000 36 3584 0 h 0 1000 0001 +Stimuli: -91 42 12345878 -123336 20240 $ i 1 9 10 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/main.cpp new file mode 100644 index 000000000..ae4db66ee --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/main.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector8 stimulus_line1; + sc_signal_bool_vector8 stimulus_line2; + sc_signal stimulus_line3; + sc_signal stimulus_line4; + sc_signal stimulus_line5; + sc_signal stimulus_line6; + sc_signal stimulus_line7; + sc_signal stimulus_line8; + sc_signal_bool_vector4 stimulus_line9; + sc_signal_logic_vector4 stimulus_line10; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector8 result_line1; + sc_signal_bool_vector8 result_line2; + sc_signal result_line3; + sc_signal result_line4; + sc_signal result_line5; + sc_signal result_line6; + sc_signal result_line7; + sc_signal_bool_vector4 result_line8; + sc_signal_logic_vector4 result_line9; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + stimulus_line7, + stimulus_line8, + stimulus_line9, + stimulus_line10, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + stimulus_line7, + stimulus_line8, + stimulus_line9, + stimulus_line10, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + result_line7, + result_line8, + result_line9, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + result_line7, + result_line8, + result_line9, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/stimulus.cpp new file mode 100644 index 000000000..384030f0d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/stimulus.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + char tmp7; + bool tmp8; + sc_unsigned tmp9(4); + sc_unsigned tmp10(4); + + tmp1 = "0b01010101"; + tmp2 = "0b00000010"; + tmp3 = 12345678; + tmp4 = -123456; + tmp5 = 20000; + tmp6 = '$'; + tmp7 = 'A'; + tmp8 = "0"; + tmp9 = "0b0001"; + tmp10 = "0b0010"; + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + out_value7.write(tmp7); + out_value8.write(tmp8); + out_value9.write(tmp9); + out_value10.write(tmp10); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " + << tmp5 << " " << tmp6 << " " << tmp7 << " " << tmp8 << " " << tmp9 << " " << tmp10 <& reset; + sc_signal_bool_vector8& out_value1; // Output port + sc_signal_bool_vector8& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_value7; // Output port + sc_signal& out_value8 ; + sc_signal_bool_vector4& out_value9; // Output port + sc_signal_logic_vector4& out_value10; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector8& OUT_VALUE1, + sc_signal_bool_vector8& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALUE7, + sc_signal& OUT_VALUE8, + sc_signal_bool_vector4& OUT_VALUE9, + sc_signal_logic_vector4& OUT_VALUE10, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_value7 (OUT_VALUE7), + out_value8 (OUT_VALUE8), + out_value9 (OUT_VALUE9), + out_value10 (OUT_VALUE10), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/common.h new file mode 100644 index 000000000..8976a26a2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector8; +typedef sc_signal > sc_signal_logic_vector4; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/datatypes.cpp new file mode 100644 index 000000000..ec1d89946 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/datatypes.cpp @@ -0,0 +1,143 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry() + +{ + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + bool tmp7; + bool tmp7r; + sc_bv<4> tmp8; + sc_bv<4> tmp8r; + sc_lv<4> tmp9; + sc_lv<4> tmp9r; + +// define 1 dimensional array + int tmpa[2]; + char tmpb[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// +// initialization of sc_array + + tmpa[0] = 12; + tmpa[1] = 127; + tmpb[1] = 'G'; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + tmpb[0] = in_value7.read(); + tmp7 = in_value8.read(); + tmp8 = in_value9.read(); + tmp9 = in_value10.read(); + + out_ack.write(true); + + //execute mixed data type not operations + + // signed(8) <- ~ unsigned(8) + tmp1r = ~ tmp2; + // unsigned(8) <- ~ long + tmp2r = ~ tmp3; + // long <- ~ char + tmp3r = ~ tmp6; + // int <- ~ short + tmp4r = ~ tmp5; + // short <- ~ int + tmp5r = ~ tmp4; + // char <- ~ char_array[0] + // tmp6r = ~ tmp8[0]; + tmp6r = ~ tmp8[0].to_bool(); + // bool <- ! bool; + tmp7r = !tmp7; + // sc_bool_vector(4) <- ~ sc_logic_vector(4) + tmp8r = ~ tmp9; + // sc_logic_vector(4) <- ~ sc_bool_vector(4) + tmp9r = ~ tmp9; + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + out_value7.write(tmp7r); + out_value8.write(tmp8r); + out_value9.write(tmp9r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/datatypes.h new file mode 100644 index 000000000..9aba0ab1f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/datatypes.h @@ -0,0 +1,146 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector8& in_value1; // Input port + const sc_signal_bool_vector8& in_value2; // Input port + const sc_signal& in_value3; // Input port + const sc_signal& in_value4; // Input port + const sc_signal& in_value5; // Input port + const sc_signal& in_value6; // Input port + const sc_signal& in_value7; // Input port + const sc_signal& in_value8 ; + const sc_signal_bool_vector4& in_value9 ; // Input port + const sc_signal_logic_vector4& in_value10; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector8& out_value1; // Output port + sc_signal_bool_vector8& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_value7; // Output port + sc_signal_bool_vector4& out_value8; // Output port + sc_signal_logic_vector4& out_value9; // Output port + sc_signal& out_valid; // Output port + + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector8& IN_VALUE1, + const sc_signal_bool_vector8& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALUE7, + const sc_signal& IN_VALUE8, + const sc_signal_bool_vector4& IN_VALUE9, + const sc_signal_logic_vector4& IN_VALUE10, + const sc_signal& IN_VALID, + + sc_signal& OUT_ACK, + sc_signal_bool_vector8& OUT_VALUE1, + sc_signal_bool_vector8& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALUE7, + sc_signal_bool_vector4& OUT_VALUE8, + sc_signal_logic_vector4& OUT_VALUE9, + sc_signal& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_value7 (IN_VALUE7), + in_value8 (IN_VALUE8), + in_value9 (IN_VALUE9), + in_value10 (IN_VALUE10), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_value7 (OUT_VALUE7), + out_value8 (OUT_VALUE8), + out_value9 (OUT_VALUE9), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/display.cpp new file mode 100644 index 000000000..75d3350de --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter++<40){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read( +) << " " << in_value4.read() << " " << in_value5.read() << " " << (int)in_value6.read() << " " << in_value7.read() << " " << in_value8.read() << " " << in_value9.read() <& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_value7; // Output port + const sc_signal_bool_vector4& in_value8; // Output port + const sc_signal_logic_vector4& in_value9; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector8& IN_VALUE1, + const sc_signal_bool_vector8& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALUE7, + const sc_signal_bool_vector4& IN_VALUE8, + const sc_signal_logic_vector4& IN_VALUE9, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_value7 (IN_VALUE7), + in_value8 (IN_VALUE8), + in_value9 (IN_VALUE9), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/golden/datatypes.log new file mode 100644 index 000000000..4b372afbf --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/golden/datatypes.log @@ -0,0 +1,84 @@ +SystemC Simulation +Stimuli: 85 2 12345678 -123456 20000 $ A 1 1 2 +Display: 11111101 10110001 -37 -20001 -7617 -2 0 1101 1101 +Stimuli: 87 3 12345683 -123453 20006 $ B 0 2 3 +Display: 11111100 10101100 -37 -20007 -7620 -1 1 1100 1100 +Stimuli: 89 4 12345688 -123450 20012 $ C 1 3 4 +Display: 11111011 10100111 -37 -20013 -7623 -2 0 1011 1011 +Stimuli: 91 5 12345693 -123447 20018 $ D 0 4 5 +Display: 11111010 10100010 -37 -20019 -7626 -1 1 1010 1010 +Stimuli: 93 6 12345698 -123444 20024 $ E 1 5 6 +Display: 11111001 10011101 -37 -20025 -7629 -2 0 1001 1001 +Stimuli: 95 7 12345703 -123441 20030 $ F 0 6 7 +Display: 11111000 10011000 -37 -20031 -7632 -1 1 1000 1000 +Stimuli: 97 8 12345708 -123438 20036 $ G 1 7 8 +Display: 11110111 10010011 -37 -20037 -7635 -2 0 0111 0111 +Stimuli: 99 9 12345713 -123435 20042 $ H 0 8 9 +Display: 11110110 10001110 -37 -20043 -7638 -1 1 0110 0110 +Stimuli: 101 10 12345718 -123432 20048 $ I 1 9 10 +Display: 11110101 10001001 -37 -20049 -7641 -2 0 0101 0101 +Stimuli: 103 11 12345723 -123429 20054 $ J 0 10 11 +Display: 11110100 10000100 -37 -20055 -7644 -1 1 0100 0100 +Stimuli: 105 12 12345728 -123426 20060 $ K 1 11 12 +Display: 11110011 01111111 -37 -20061 -7647 -2 0 0011 0011 +Stimuli: 107 13 12345733 -123423 20066 $ L 0 12 13 +Display: 11110010 01111010 -37 -20067 -7650 -1 1 0010 0010 +Stimuli: 109 14 12345738 -123420 20072 $ M 1 13 14 +Display: 11110001 01110101 -37 -20073 -7653 -2 0 0001 0001 +Stimuli: 111 15 12345743 -123417 20078 $ N 0 14 15 +Display: 11110000 01110000 -37 -20079 -7656 -1 1 0000 0000 +Stimuli: 113 16 12345748 -123414 20084 $ O 1 15 0 +Display: 11101111 01101011 -37 -20085 -7659 -2 0 1111 1111 +Stimuli: 115 17 12345753 -123411 20090 $ P 0 0 1 +Display: 11101110 01100110 -37 -20091 -7662 -1 1 1110 1110 +Stimuli: 117 18 12345758 -123408 20096 $ Q 1 1 2 +Display: 11101101 01100001 -37 -20097 -7665 -2 0 1101 1101 +Stimuli: 119 19 12345763 -123405 20102 $ R 0 2 3 +Display: 11101100 01011100 -37 -20103 -7668 -1 1 1100 1100 +Stimuli: 121 20 12345768 -123402 20108 $ S 1 3 4 +Display: 11101011 01010111 -37 -20109 -7671 -2 0 1011 1011 +Stimuli: 123 21 12345773 -123399 20114 $ T 0 4 5 +Display: 11101010 01010010 -37 -20115 -7674 -1 1 1010 1010 +Stimuli: 125 22 12345778 -123396 20120 $ U 1 5 6 +Display: 11101001 01001101 -37 -20121 -7677 -2 0 1001 1001 +Stimuli: 127 23 12345783 -123393 20126 $ V 0 6 7 +Display: 11101000 01001000 -37 -20127 -7680 -1 1 1000 1000 +Stimuli: -127 24 12345788 -123390 20132 $ W 1 7 8 +Display: 11100111 01000011 -37 -20133 -7683 -2 0 0111 0111 +Stimuli: -125 25 12345793 -123387 20138 $ X 0 8 9 +Display: 11100110 00111110 -37 -20139 -7686 -1 1 0110 0110 +Stimuli: -123 26 12345798 -123384 20144 $ Y 1 9 10 +Display: 11100101 00111001 -37 -20145 -7689 -2 0 0101 0101 +Stimuli: -121 27 12345803 -123381 20150 $ Z 0 10 11 +Display: 11100100 00110100 -37 -20151 -7692 -1 1 0100 0100 +Stimuli: -119 28 12345808 -123378 20156 $ [ 1 11 12 +Display: 11100011 00101111 -37 -20157 -7695 -2 0 0011 0011 +Stimuli: -117 29 12345813 -123375 20162 $ \ 0 12 13 +Display: 11100010 00101010 -37 -20163 -7698 -1 1 0010 0010 +Stimuli: -115 30 12345818 -123372 20168 $ ] 1 13 14 +Display: 11100001 00100101 -37 -20169 -7701 -2 0 0001 0001 +Stimuli: -113 31 12345823 -123369 20174 $ ^ 0 14 15 +Display: 11100000 00100000 -37 -20175 -7704 -1 1 0000 0000 +Stimuli: -111 32 12345828 -123366 20180 $ _ 1 15 0 +Display: 11011111 00011011 -37 -20181 -7707 -2 0 1111 1111 +Stimuli: -109 33 12345833 -123363 20186 $ ` 0 0 1 +Display: 11011110 00010110 -37 -20187 -7710 -1 1 1110 1110 +Stimuli: -107 34 12345838 -123360 20192 $ a 1 1 2 +Display: 11011101 00010001 -37 -20193 -7713 -2 0 1101 1101 +Stimuli: -105 35 12345843 -123357 20198 $ b 0 2 3 +Display: 11011100 00001100 -37 -20199 -7716 -1 1 1100 1100 +Stimuli: -103 36 12345848 -123354 20204 $ c 1 3 4 +Display: 11011011 00000111 -37 -20205 -7719 -2 0 1011 1011 +Stimuli: -101 37 12345853 -123351 20210 $ d 0 4 5 +Display: 11011010 00000010 -37 -20211 -7722 -1 1 1010 1010 +Stimuli: -99 38 12345858 -123348 20216 $ e 1 5 6 +Display: 11011001 11111101 -37 -20217 -7725 -2 0 1001 1001 +Stimuli: -97 39 12345863 -123345 20222 $ f 0 6 7 +Display: 11011000 11111000 -37 -20223 -7728 -1 1 1000 1000 +Stimuli: -95 40 12345868 -123342 20228 $ g 1 7 8 +Display: 11010111 11110011 -37 -20229 -7731 -2 0 0111 0111 +Stimuli: -93 41 12345873 -123339 20234 $ h 0 8 9 +Display: 11010110 11101110 -37 -20235 -7734 -1 1 0110 0110 +Stimuli: -91 42 12345878 -123336 20240 $ i 1 9 10 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/golden/datatypes.log.linuxaarch64 b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/golden/datatypes.log.linuxaarch64 new file mode 100644 index 000000000..d0ebd06c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/golden/datatypes.log.linuxaarch64 @@ -0,0 +1,84 @@ +SystemC Simulation +Stimuli: 85 2 12345678 -123456 20000 $ A 1 1 2 +Display: 11111101 10110001 -37 -20001 -7617 254 0 1101 1101 +Stimuli: 87 3 12345683 -123453 20006 $ B 0 2 3 +Display: 11111100 10101100 -37 -20007 -7620 255 1 1100 1100 +Stimuli: 89 4 12345688 -123450 20012 $ C 1 3 4 +Display: 11111011 10100111 -37 -20013 -7623 254 0 1011 1011 +Stimuli: 91 5 12345693 -123447 20018 $ D 0 4 5 +Display: 11111010 10100010 -37 -20019 -7626 255 1 1010 1010 +Stimuli: 93 6 12345698 -123444 20024 $ E 1 5 6 +Display: 11111001 10011101 -37 -20025 -7629 254 0 1001 1001 +Stimuli: 95 7 12345703 -123441 20030 $ F 0 6 7 +Display: 11111000 10011000 -37 -20031 -7632 255 1 1000 1000 +Stimuli: 97 8 12345708 -123438 20036 $ G 1 7 8 +Display: 11110111 10010011 -37 -20037 -7635 254 0 0111 0111 +Stimuli: 99 9 12345713 -123435 20042 $ H 0 8 9 +Display: 11110110 10001110 -37 -20043 -7638 255 1 0110 0110 +Stimuli: 101 10 12345718 -123432 20048 $ I 1 9 10 +Display: 11110101 10001001 -37 -20049 -7641 254 0 0101 0101 +Stimuli: 103 11 12345723 -123429 20054 $ J 0 10 11 +Display: 11110100 10000100 -37 -20055 -7644 255 1 0100 0100 +Stimuli: 105 12 12345728 -123426 20060 $ K 1 11 12 +Display: 11110011 01111111 -37 -20061 -7647 254 0 0011 0011 +Stimuli: 107 13 12345733 -123423 20066 $ L 0 12 13 +Display: 11110010 01111010 -37 -20067 -7650 255 1 0010 0010 +Stimuli: 109 14 12345738 -123420 20072 $ M 1 13 14 +Display: 11110001 01110101 -37 -20073 -7653 254 0 0001 0001 +Stimuli: 111 15 12345743 -123417 20078 $ N 0 14 15 +Display: 11110000 01110000 -37 -20079 -7656 255 1 0000 0000 +Stimuli: 113 16 12345748 -123414 20084 $ O 1 15 0 +Display: 11101111 01101011 -37 -20085 -7659 254 0 1111 1111 +Stimuli: 115 17 12345753 -123411 20090 $ P 0 0 1 +Display: 11101110 01100110 -37 -20091 -7662 255 1 1110 1110 +Stimuli: 117 18 12345758 -123408 20096 $ Q 1 1 2 +Display: 11101101 01100001 -37 -20097 -7665 254 0 1101 1101 +Stimuli: 119 19 12345763 -123405 20102 $ R 0 2 3 +Display: 11101100 01011100 -37 -20103 -7668 255 1 1100 1100 +Stimuli: 121 20 12345768 -123402 20108 $ S 1 3 4 +Display: 11101011 01010111 -37 -20109 -7671 254 0 1011 1011 +Stimuli: 123 21 12345773 -123399 20114 $ T 0 4 5 +Display: 11101010 01010010 -37 -20115 -7674 255 1 1010 1010 +Stimuli: 125 22 12345778 -123396 20120 $ U 1 5 6 +Display: 11101001 01001101 -37 -20121 -7677 254 0 1001 1001 +Stimuli: 127 23 12345783 -123393 20126 $ V 0 6 7 +Display: 11101000 01001000 -37 -20127 -7680 255 1 1000 1000 +Stimuli: -127 24 12345788 -123390 20132 $ W 1 7 8 +Display: 11100111 01000011 -37 -20133 -7683 254 0 0111 0111 +Stimuli: -125 25 12345793 -123387 20138 $ X 0 8 9 +Display: 11100110 00111110 -37 -20139 -7686 255 1 0110 0110 +Stimuli: -123 26 12345798 -123384 20144 $ Y 1 9 10 +Display: 11100101 00111001 -37 -20145 -7689 254 0 0101 0101 +Stimuli: -121 27 12345803 -123381 20150 $ Z 0 10 11 +Display: 11100100 00110100 -37 -20151 -7692 255 1 0100 0100 +Stimuli: -119 28 12345808 -123378 20156 $ [ 1 11 12 +Display: 11100011 00101111 -37 -20157 -7695 254 0 0011 0011 +Stimuli: -117 29 12345813 -123375 20162 $ \ 0 12 13 +Display: 11100010 00101010 -37 -20163 -7698 255 1 0010 0010 +Stimuli: -115 30 12345818 -123372 20168 $ ] 1 13 14 +Display: 11100001 00100101 -37 -20169 -7701 254 0 0001 0001 +Stimuli: -113 31 12345823 -123369 20174 $ ^ 0 14 15 +Display: 11100000 00100000 -37 -20175 -7704 255 1 0000 0000 +Stimuli: -111 32 12345828 -123366 20180 $ _ 1 15 0 +Display: 11011111 00011011 -37 -20181 -7707 254 0 1111 1111 +Stimuli: -109 33 12345833 -123363 20186 $ ` 0 0 1 +Display: 11011110 00010110 -37 -20187 -7710 255 1 1110 1110 +Stimuli: -107 34 12345838 -123360 20192 $ a 1 1 2 +Display: 11011101 00010001 -37 -20193 -7713 254 0 1101 1101 +Stimuli: -105 35 12345843 -123357 20198 $ b 0 2 3 +Display: 11011100 00001100 -37 -20199 -7716 255 1 1100 1100 +Stimuli: -103 36 12345848 -123354 20204 $ c 1 3 4 +Display: 11011011 00000111 -37 -20205 -7719 254 0 1011 1011 +Stimuli: -101 37 12345853 -123351 20210 $ d 0 4 5 +Display: 11011010 00000010 -37 -20211 -7722 255 1 1010 1010 +Stimuli: -99 38 12345858 -123348 20216 $ e 1 5 6 +Display: 11011001 11111101 -37 -20217 -7725 254 0 1001 1001 +Stimuli: -97 39 12345863 -123345 20222 $ f 0 6 7 +Display: 11011000 11111000 -37 -20223 -7728 255 1 1000 1000 +Stimuli: -95 40 12345868 -123342 20228 $ g 1 7 8 +Display: 11010111 11110011 -37 -20229 -7731 254 0 0111 0111 +Stimuli: -93 41 12345873 -123339 20234 $ h 0 8 9 +Display: 11010110 11101110 -37 -20235 -7734 255 1 0110 0110 +Stimuli: -91 42 12345878 -123336 20240 $ i 1 9 10 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/main.cpp new file mode 100644 index 000000000..ae4db66ee --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/main.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector8 stimulus_line1; + sc_signal_bool_vector8 stimulus_line2; + sc_signal stimulus_line3; + sc_signal stimulus_line4; + sc_signal stimulus_line5; + sc_signal stimulus_line6; + sc_signal stimulus_line7; + sc_signal stimulus_line8; + sc_signal_bool_vector4 stimulus_line9; + sc_signal_logic_vector4 stimulus_line10; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector8 result_line1; + sc_signal_bool_vector8 result_line2; + sc_signal result_line3; + sc_signal result_line4; + sc_signal result_line5; + sc_signal result_line6; + sc_signal result_line7; + sc_signal_bool_vector4 result_line8; + sc_signal_logic_vector4 result_line9; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + stimulus_line7, + stimulus_line8, + stimulus_line9, + stimulus_line10, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + stimulus_line7, + stimulus_line8, + stimulus_line9, + stimulus_line10, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + result_line7, + result_line8, + result_line9, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + result_line7, + result_line8, + result_line9, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/stimulus.cpp new file mode 100644 index 000000000..384030f0d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/stimulus.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + char tmp7; + bool tmp8; + sc_unsigned tmp9(4); + sc_unsigned tmp10(4); + + tmp1 = "0b01010101"; + tmp2 = "0b00000010"; + tmp3 = 12345678; + tmp4 = -123456; + tmp5 = 20000; + tmp6 = '$'; + tmp7 = 'A'; + tmp8 = "0"; + tmp9 = "0b0001"; + tmp10 = "0b0010"; + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + out_value7.write(tmp7); + out_value8.write(tmp8); + out_value9.write(tmp9); + out_value10.write(tmp10); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " + << tmp5 << " " << tmp6 << " " << tmp7 << " " << tmp8 << " " << tmp9 << " " << tmp10 <& reset; + sc_signal_bool_vector8& out_value1; // Output port + sc_signal_bool_vector8& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_value7; // Output port + sc_signal& out_value8 ; + sc_signal_bool_vector4& out_value9 ; // Output port + sc_signal_logic_vector4& out_value10; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector8& OUT_VALUE1, + sc_signal_bool_vector8& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALUE7, + sc_signal& OUT_VALUE8, + sc_signal_bool_vector4& OUT_VALUE9, + sc_signal_logic_vector4& OUT_VALUE10, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_value7 (OUT_VALUE7), + out_value8 (OUT_VALUE8), + out_value9 (OUT_VALUE9), + out_value10 (OUT_VALUE10), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/display.cpp new file mode 100644 index 000000000..966569d48 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/display.h new file mode 100644 index 000000000..59a19b5f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal_bool_vector& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal_bool_vector& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/golden/not_1.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/golden/not_1.log new file mode 100644 index 000000000..299c670c9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/golden/not_1.log @@ -0,0 +1,39 @@ +SystemC Simulation +Stimuli : 1 1 00000001 1 1 at 13 ns +Display : -2 4294967294 11111110 11111110 11111110 at 17 ns +Display : -4 4294967292 11111100 11111100 11111100 at 20 ns +Stimuli : 12 12 00001100 12 12 at 24 ns +Display : -13 4294967283 11110011 11110011 11110011 at 28 ns +Display : -4 4294967292 11111100 11111100 11111100 at 31 ns +Stimuli : 23 23 00010111 23 23 at 35 ns +Display : -24 4294967272 11101000 11101000 11101000 at 39 ns +Display : -4 4294967292 11111100 11111100 11111100 at 42 ns +Stimuli : 34 34 00100010 34 34 at 46 ns +Display : -35 4294967261 11011101 11011101 11011101 at 50 ns +Display : -4 4294967292 11111100 11111100 11111100 at 53 ns +Stimuli : 45 45 00101101 45 45 at 57 ns +Display : -46 4294967250 11010010 11010010 11010010 at 61 ns +Display : -4 4294967292 11111100 11111100 11111100 at 64 ns +Stimuli : 56 56 00111000 56 56 at 68 ns +Display : -57 4294967239 11000111 11000111 11000111 at 72 ns +Display : -4 4294967292 11111100 11111100 11111100 at 75 ns +Stimuli : 67 67 01000011 67 67 at 79 ns +Display : -68 4294967228 10111100 10111100 10111100 at 83 ns +Display : -4 4294967292 11111100 11111100 11111100 at 86 ns +Stimuli : 78 78 01001110 78 78 at 90 ns +Display : -79 4294967217 10110001 10110001 10110001 at 94 ns +Display : -4 4294967292 11111100 11111100 11111100 at 97 ns +Stimuli : 89 89 01011001 89 89 at 101 ns +Display : -90 4294967206 10100110 10100110 10100110 at 105 ns +Display : -4 4294967292 11111100 11111100 11111100 at 108 ns +Stimuli : 100 100 01100100 100 100 at 112 ns +Display : -101 4294967195 10011011 10011011 10011011 at 116 ns +Display : -4 4294967292 11111100 11111100 11111100 at 119 ns +Stimuli : 111 111 01101111 111 111 at 123 ns +Display : -112 4294967184 10010000 10010000 10010000 at 127 ns +Display : -4 4294967292 11111100 11111100 11111100 at 130 ns +Stimuli : 122 122 01111010 122 122 at 134 ns +Display : -123 4294967173 10000101 10000101 10000101 at 138 ns +Display : -4 4294967292 11111100 11111100 11111100 at 141 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/main.cpp new file mode 100644 index 000000000..1a4d8f4e7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/main.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "not_1.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal stimulus_line2; + sc_signal_bool_vector stimulus_line3; + sc_signal_bool_vector stimulus_line4; + sc_signal_bool_vector stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal result_line2; + sc_signal_bool_vector result_line3; + sc_signal_bool_vector result_line4; + sc_signal_bool_vector result_line5; + + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + not_1 not1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/not_1.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/not_1.cpp new file mode 100644 index 000000000..a96e400e5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/not_1.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + not_1.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "not_1.h" + +void not_1::entry(){ + + signed int tmp1; + unsigned int tmp2; + sc_lv<8> tmp3; + sc_lv<8> tmp3_tmp; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp3_tmp = 0x0f; + tmp1 = ~ tmp1 ; + tmp2 = ~ tmp2 ; + tmp3 = ~ tmp3 ; + tmp4 = ~ tmp4 ; + tmp5 = ~ tmp5 ; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + + //execute simple operations + tmp3_tmp = 0x03; + tmp1 = ~(0x03); + tmp2 = ~(0x03); + tmp3 = ~(tmp3_tmp); + tmp4 = ~(0x03); + tmp5 = ~(0x03); + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/not_1.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/not_1.f new file mode 100644 index 000000000..07b7b0d72 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/not_1.f @@ -0,0 +1,4 @@ +not_1/display.cpp +not_1/main.cpp +not_1/not_1.cpp +not_1/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/not_1.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/not_1.h new file mode 100644 index 000000000..7366fd3c8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/not_1.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + not_1.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( not_1 ) +{ + SC_HAS_PROCESS( not_1 ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal& in_value2; // Input port + const sc_signal_bool_vector& in_value3; // Input port + const sc_signal_bool_vector& in_value4; // Input port + const sc_signal_bool_vector& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal& out_value2; // Output port + sc_signal_bool_vector& out_value3; // Output port + sc_signal_bool_vector& out_value4; // Output port + sc_signal_bool_vector& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + not_1 ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal_bool_vector& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal_bool_vector& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/stimulus.cpp new file mode 100644 index 000000000..b7e17113f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/stimulus.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + signed int send_value1 = 1; + unsigned int send_value2 = 1; + sc_lv<8> send_value3; + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value3 = 1; + send_value4 = 1; + send_value5 = 1; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(10); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+11; + send_value2 = send_value2+11; + send_value3 = send_value3.to_int()+11; + send_value4 = send_value4+11; + send_value5 = send_value5+11; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/stimulus.h new file mode 100644 index 000000000..9bd211ba6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/not_1/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal& out_stimulus2; + sc_signal_bool_vector& out_stimulus3; + sc_signal_bool_vector& out_stimulus4; + sc_signal_bool_vector& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal& OUT_STIMULUS2, + sc_signal_bool_vector& OUT_STIMULUS3, + sc_signal_bool_vector& OUT_STIMULUS4, + sc_signal_bool_vector& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/datatypes.cpp new file mode 100644 index 000000000..eeacba45c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/datatypes.cpp @@ -0,0 +1,123 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry() + +{ + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + +// define 1 dimensional array + int tmp7[2]; + char tmp8[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// +// initialization of sc_array + + tmp7[0] = 12; + tmp7[1] = 0; + tmp8[1] = 'G'; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + tmp8[0] = in_value7.read(); + + out_ack.write(true); + + //execute mixed data type or operations + + // signed(8) <- signed(8) & unsigned(8) + tmp1r = tmp1 | tmp2; + // unsigned(8) <- char & long + tmp2r = tmp6 | tmp3; + // long <- int & char + tmp3r = tmp4 | tmp6; + // int <- int & short + tmp4r = tmp4 | tmp5; + // short <- short & const + tmp5r = tmp5 | 5; + // char <- char_array[0] & int_array[1] + tmp6r = tmp8[0] | tmp7[1]; + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/datatypes.f new file mode 100644 index 000000000..c767ce1c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/datatypes.cpp +datatypes/display.cpp +datatypes/main.cpp +datatypes/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/datatypes.h new file mode 100644 index 000000000..3332046ad --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/datatypes.h @@ -0,0 +1,127 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal& in_value3; // Input port + const sc_signal& in_value4; // Input port + const sc_signal& in_value5; // Input port + const sc_signal& in_value6; // Input port + const sc_signal& in_value7; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALUE7, + const sc_signal& IN_VALID, + + sc_signal& OUT_ACK, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_value7 (IN_VALUE7), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/display.cpp new file mode 100644 index 000000000..258461c24 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter++<100){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read( +) << " " << in_value4.read() << " " << in_value5.read() << " " << in_value6.read() << endl; + do { wait(); } while ( in_valid == true); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/display.h new file mode 100644 index 000000000..3c2ece81a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/display.h @@ -0,0 +1,88 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_value1; // Output port + const sc_signal_bool_vector& in_value2; // Output port + const sc_signal& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/golden/datatypes.log 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-123154 -106754 20541 › +Stimuli: 11 93 12346133 -123183 20546 $ œ +Display: 01011111 00110101 -123147 -106797 20551 œ +Stimuli: 13 94 12346138 -123180 20552 $  +Display: 01011111 00111110 -123148 -106788 20557  +Stimuli: 15 95 12346143 -123177 20558 $ ž +Display: 01011111 00111111 -123145 -106785 20559 ž +Stimuli: 17 96 12346148 -123174 20564 $ Ÿ +Display: 01110001 00100100 -123138 -106786 20565 Ÿ +Stimuli: 19 97 12346153 -123171 20570 $   +Display: 01110011 00101101 -123139 -106785 20575   +Stimuli: 21 98 12346158 -123168 20576 $ ¡ +Display: 01110111 00101110 -123164 -106784 20581 ¡ +Stimuli: 23 99 12346163 -123165 20582 $ ¢ +Display: 01110111 00110111 -123161 -106777 20583 ¢ +Stimuli: 25 100 12346168 -123162 20588 $ £ +Display: 01111101 00111100 -123162 -106770 20589 £ +Stimuli: 27 101 12346173 -123159 20594 $ ¤ +Display: 01111111 00111101 -123155 -106757 20599 ¤ +Stimuli: 29 102 12346178 -123156 20600 $ ¥ + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/main.cpp new file mode 100644 index 000000000..319d97eb5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/main.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Stan Liao, Synopsys, Inc., 1999-10-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal stimulus_line3; + sc_signal stimulus_line4; + sc_signal stimulus_line5; + sc_signal stimulus_line6; + sc_signal stimulus_line7; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector result_line1; + sc_signal_bool_vector result_line2; + sc_signal result_line3; + sc_signal result_line4; + sc_signal result_line5; + sc_signal result_line6; + + input_valid = 0; + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + stimulus_line7, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + stimulus_line7, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/stimulus.cpp new file mode 100644 index 000000000..aff6ff983 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/stimulus.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + char tmp7; + + tmp1 = "0b01010101"; + tmp2 = "0b00000010"; + tmp3 = 12345678; + tmp4 = -123456; + tmp5 = 20000; + tmp6 = '$'; + tmp7 = 'A'; + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + out_value7.write(tmp7); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " + << tmp5 << " " << tmp6 << " " << tmp7 << endl; + tmp1 = tmp1 + 2; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 5; + tmp4 = tmp4 + 3; + tmp5 = tmp5 + 6; + tmp7 = tmp7 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + wait(); + } +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/stimulus.h new file mode 100644 index 000000000..fbb96b57b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/datatypes/stimulus.h @@ -0,0 +1,94 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_value7; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALUE7, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_value7 (OUT_VALUE7), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/display.cpp new file mode 100644 index 000000000..966569d48 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/display.h new file mode 100644 index 000000000..59a19b5f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal_bool_vector& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal_bool_vector& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/golden/or_1.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/golden/or_1.log new file mode 100644 index 000000000..d5f651425 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/golden/or_1.log @@ -0,0 +1,39 @@ +SystemC Simulation +Stimuli : 1 1 00000001 1 1 at 13 ns +Display : 31 31 00001111 00011111 00011111 at 17 ns +Display : 31 31 00001111 00011111 00011111 at 20 ns +Stimuli : 12 12 00001100 12 12 at 24 ns +Display : 31 31 00001111 00011111 00011111 at 28 ns +Display : 31 31 00001111 00011111 00011111 at 31 ns +Stimuli : 23 23 00010111 23 23 at 35 ns +Display : 31 31 00011111 00011111 00011111 at 39 ns +Display : 31 31 00011111 00011111 00011111 at 42 ns +Stimuli : 34 34 00100010 34 34 at 46 ns +Display : 63 63 00101111 00111111 00111111 at 50 ns +Display : 63 63 00101111 00111111 00111111 at 53 ns +Stimuli : 45 45 00101101 45 45 at 57 ns +Display : 63 63 00101111 00111111 00111111 at 61 ns +Display : 63 63 00101111 00111111 00111111 at 64 ns +Stimuli : 56 56 00111000 56 56 at 68 ns +Display : 63 63 00111111 00111111 00111111 at 72 ns +Display : 63 63 00111111 00111111 00111111 at 75 ns +Stimuli : 67 67 01000011 67 67 at 79 ns +Display : 95 95 01001111 01011111 01011111 at 83 ns +Display : 95 95 01001111 01011111 01011111 at 86 ns +Stimuli : 78 78 01001110 78 78 at 90 ns +Display : 95 95 01001111 01011111 01011111 at 94 ns +Display : 95 95 01001111 01011111 01011111 at 97 ns +Stimuli : 89 89 01011001 89 89 at 101 ns +Display : 95 95 01011111 01011111 01011111 at 105 ns +Display : 95 95 01011111 01011111 01011111 at 108 ns +Stimuli : 100 100 01100100 100 100 at 112 ns +Display : 127 127 01101111 01111111 01111111 at 116 ns +Display : 127 127 01101111 01111111 01111111 at 119 ns +Stimuli : 111 111 01101111 111 111 at 123 ns +Display : 127 127 01101111 01111111 01111111 at 127 ns +Display : 127 127 01101111 01111111 01111111 at 130 ns +Stimuli : 122 122 01111010 122 122 at 134 ns +Display : 127 127 01111111 01111111 01111111 at 138 ns +Display : 127 127 01111111 01111111 01111111 at 141 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/main.cpp new file mode 100644 index 000000000..fb587275d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "or_1.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal stimulus_line2; + sc_signal_bool_vector stimulus_line3; + sc_signal_bool_vector stimulus_line4; + sc_signal_bool_vector stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal result_line2; + sc_signal_bool_vector result_line3; + sc_signal_bool_vector result_line4; + sc_signal_bool_vector result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + or_1 or1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/or_1.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/or_1.cpp new file mode 100644 index 000000000..e65fdbaf1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/or_1.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + or_1.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "or_1.h" + +void or_1::entry(){ + + signed int tmp1; + unsigned int tmp2; + sc_lv<8> tmp3; + sc_lv<8> tmp3_tmp; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp3_tmp = 0x0f; + tmp1 = tmp1 | 0x0f | 0x12; + tmp2 = tmp2 | 0x0f | 0x13 ; + tmp3 = tmp3 | tmp3_tmp; + tmp4 = tmp4 | 0x0f | 0x14 ; + tmp5 = tmp5 | 0x0f | 0x15 ; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + + //execute simple operations + tmp3_tmp = 0x03; + tmp1 |= 0x03; + tmp2 |= 0x03; + tmp3 |= tmp3_tmp; + tmp4 |= 0x03; + tmp5 |= 0x03; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/or_1.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/or_1.f new file mode 100644 index 000000000..8b7bff4d2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/or_1.f @@ -0,0 +1,4 @@ +or_1/display.cpp +or_1/main.cpp +or_1/or_1.cpp +or_1/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/or_1.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/or_1.h new file mode 100644 index 000000000..99285a543 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/or_1.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + or_1.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( or_1 ) +{ + SC_HAS_PROCESS( or_1 ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal& in_value2; // Input port + const sc_signal_bool_vector& in_value3; // Input port + const sc_signal_bool_vector& in_value4; // Input port + const sc_signal_bool_vector& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal& out_value2; // Output port + sc_signal_bool_vector& out_value3; // Output port + sc_signal_bool_vector& out_value4; // Output port + sc_signal_bool_vector& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + or_1 ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal_bool_vector& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal_bool_vector& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/stimulus.cpp new file mode 100644 index 000000000..b7e17113f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/stimulus.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + signed int send_value1 = 1; + unsigned int send_value2 = 1; + sc_lv<8> send_value3; + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value3 = 1; + send_value4 = 1; + send_value5 = 1; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(10); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+11; + send_value2 = send_value2+11; + send_value3 = send_value3.to_int()+11; + send_value4 = send_value4+11; + send_value5 = send_value5+11; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/stimulus.h new file mode 100644 index 000000000..9bd211ba6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/or/or_1/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal& out_stimulus2; + sc_signal_bool_vector& out_stimulus3; + sc_signal_bool_vector& out_stimulus4; + sc_signal_bool_vector& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal& OUT_STIMULUS2, + sc_signal_bool_vector& OUT_STIMULUS3, + sc_signal_bool_vector& OUT_STIMULUS4, + sc_signal_bool_vector& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/bitwidth.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/bitwidth.cpp new file mode 100644 index 000000000..7cb14c66c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/bitwidth.cpp @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "bitwidth.h" + +void bitwidth::entry(){ + + sc_bigint<4> tmp1; + sc_biguint<4> tmp2; + sc_bigint<6> tmp3; + sc_biguint<6> tmp4; + sc_bigint<8> tmp5; + sc_biguint<8> tmp6; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + //execute simple operations + // expected bitwidth 4 4 4 signed + tmp1 = tmp1 << tmp2; + // expected bitwidth 4 6 6 signed + tmp3 = tmp1 << tmp2; + // expected bitwidth 4 4 6 signed + tmp6 = tmp2 << tmp6; + // expected bitwidth 8 8 6 signed + tmp4 = tmp5 << tmp6; + // expected bitwidth 6 8 4 unsigned + tmp2 = tmp4 << tmp6; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/bitwidth.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/bitwidth.f new file mode 100644 index 000000000..53a59162e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/bitwidth.f @@ -0,0 +1,4 @@ +bitwidth/stimulus.cpp +bitwidth/display.cpp +bitwidth/bitwidth.cpp +bitwidth/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/bitwidth.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/bitwidth.h new file mode 100644 index 000000000..e088b3a4a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/bitwidth.h @@ -0,0 +1,121 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bitwidth.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( bitwidth ) +{ + SC_HAS_PROCESS( bitwidth ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector4& in_value1; // Input port + const sc_signal_bool_vector4& in_value2; // Input port + const sc_signal_bool_vector6& in_value3; // Input port + const sc_signal_bool_vector6& in_value4; // Input port + const sc_signal_bool_vector8& in_value5; // Input port + const sc_signal_bool_vector8& in_value6; // Input port + const sc_signal& in_valid; // Input port + sc_signal_bool_vector4& out_value1; // Output port + sc_signal_bool_vector4& out_value2; // Output port + sc_signal_bool_vector6& out_value3; // Output port + sc_signal_bool_vector6& out_value4; // Output port + sc_signal_bool_vector8& out_value5; // Output port + sc_signal_bool_vector8& out_value6; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + bitwidth ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector4& IN_VALUE1, + const sc_signal_bool_vector4& IN_VALUE2, + const sc_signal_bool_vector6& IN_VALUE3, + const sc_signal_bool_vector6& IN_VALUE4, + const sc_signal_bool_vector8& IN_VALUE5, + const sc_signal_bool_vector8& IN_VALUE6, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector4& OUT_VALUE1, + sc_signal_bool_vector4& OUT_VALUE2, + sc_signal_bool_vector6& OUT_VALUE3, + sc_signal_bool_vector6& OUT_VALUE4, + sc_signal_bool_vector8& OUT_VALUE5, + sc_signal_bool_vector8& OUT_VALUE6, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/common.h new file mode 100644 index 000000000..2a49981d9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector6; +typedef sc_signal > sc_signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/display.cpp new file mode 100644 index 000000000..17eba10b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/display.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << in_data6.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 12) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/display.h new file mode 100644 index 000000000..922ed13a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/display.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector4& in_data1; // Input port + const sc_signal_bool_vector4& in_data2; // Input port + const sc_signal_bool_vector6& in_data3; // Input port + const sc_signal_bool_vector6& in_data4; // Input port + const sc_signal_bool_vector8& in_data5; // Input port + const sc_signal_bool_vector8& in_data6; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector4& IN_DATA1, + const sc_signal_bool_vector4& IN_DATA2, + const sc_signal_bool_vector6& IN_DATA3, + const sc_signal_bool_vector6& IN_DATA4, + const sc_signal_bool_vector8& IN_DATA5, + const sc_signal_bool_vector8& IN_DATA6, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_data6(IN_DATA6), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/golden/bitwidth.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/golden/bitwidth.log new file mode 100644 index 000000000..ad7d0b4fd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/golden/bitwidth.log @@ -0,0 +1,27 @@ +SystemC Simulation +Stimuli : 1 1 1 1 1 1 at 23 ns +Display : 0010 0000 000100 000100 00000001 00000010 at 27 ns +Stimuli : 3 3 3 3 3 3 at 44 ns +Display : 1000 0000 000000 000000 00000011 00011000 at 48 ns +Stimuli : 5 5 5 5 5 5 at 65 ns +Display : 0000 0000 000000 000000 00000101 10100000 at 69 ns +Stimuli : 7 7 7 7 7 7 at 86 ns +Display : 0000 0000 000000 000000 00000111 10000000 at 90 ns +Stimuli : -7 9 9 9 9 9 at 107 ns +Display : 0000 1001 000000 001001 00001001 00000000 at 111 ns +Stimuli : -5 11 11 11 11 11 at 128 ns +Display : 0000 1011 000000 001011 00001011 00000000 at 132 ns +Stimuli : -3 13 13 13 13 13 at 149 ns +Display : 0000 1101 000000 001101 00001101 00000000 at 153 ns +Stimuli : -1 15 15 15 15 15 at 170 ns +Display : 0000 1111 000000 001111 00001111 00000000 at 174 ns +Stimuli : 1 1 17 17 17 17 at 191 ns +Display : 0010 0001 000100 010001 00010001 00000000 at 195 ns +Stimuli : 3 3 19 19 19 19 at 212 ns +Display : 1000 0011 000000 010011 00010011 00000000 at 216 ns +Stimuli : 5 5 21 21 21 21 at 233 ns +Display : 0000 0101 000000 010101 00010101 00000000 at 237 ns +Stimuli : 7 7 23 23 23 23 at 254 ns +Display : 0000 0111 000000 010111 00010111 00000000 at 258 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/main.cpp new file mode 100644 index 000000000..8a7ff91be --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/main.cpp @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "bitwidth.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector4 stimulus_line1; + sc_signal_bool_vector4 stimulus_line2; + sc_signal_bool_vector6 stimulus_line3; + sc_signal_bool_vector6 stimulus_line4; + sc_signal_bool_vector8 stimulus_line5; + sc_signal_bool_vector8 stimulus_line6; + sc_signal input_valid; + sc_signal output_valid; + sc_signal_bool_vector4 result_line1; + sc_signal_bool_vector4 result_line2; + sc_signal_bool_vector6 result_line3; + sc_signal_bool_vector6 result_line4; + sc_signal_bool_vector8 result_line5; + sc_signal_bool_vector8 result_line6; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid); + + bitwidth bitwidth1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/stimulus.cpp new file mode 100644 index 000000000..3d7567c14 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/stimulus.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + sc_signed send_value1(4); + sc_unsigned send_value2(4); + sc_signed send_value3(6); + sc_unsigned send_value4(6); + sc_signed send_value5(8); + sc_unsigned send_value6(8); + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value1 = 1; + send_value2 = 1; + send_value3 = 1; + send_value4 = 1; + send_value5 = 1; + send_value6 = 1; + out_stimulus1.write(1); + out_stimulus2.write(1); + out_stimulus3.write(1); + out_stimulus4.write(1); + out_stimulus5.write(1); + out_stimulus6.write(1); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(20); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_stimulus6.write( send_value6 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " + << send_value6 << " " << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+2; + send_value2 = send_value2+2; + send_value3 = send_value3+2; + send_value4 = send_value4+2; + send_value5 = send_value5+2; + send_value6 = send_value6+2; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/stimulus.h new file mode 100644 index 000000000..fa0b64302 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/stimulus.h @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector4& out_stimulus1; + sc_signal_bool_vector4& out_stimulus2; + sc_signal_bool_vector6& out_stimulus3; + sc_signal_bool_vector6& out_stimulus4; + sc_signal_bool_vector8& out_stimulus5; + sc_signal_bool_vector8& out_stimulus6; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector4& OUT_STIMULUS1, + sc_signal_bool_vector4& OUT_STIMULUS2, + sc_signal_bool_vector6& OUT_STIMULUS3, + sc_signal_bool_vector6& OUT_STIMULUS4, + sc_signal_bool_vector8& OUT_STIMULUS5, + sc_signal_bool_vector8& OUT_STIMULUS6, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_stimulus6(OUT_STIMULUS6), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/datatypes.cpp new file mode 100644 index 000000000..67ed1a1ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/datatypes.cpp @@ -0,0 +1,150 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" +#define true 1 +#define false 0 + +void datatypes::entry() + +{ + + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + +// define 1 dimensional array + unsigned int tmp7[2]; + char tmp8[2]; + +// define sc_bool_vector + sc_bv<4> tmp10; + tmp10[3] = 0; tmp10[2] = 1; tmp10[1] = 0; tmp10[0] = 1; + +// define 2 dimentional array + sc_bv<1> tmp11[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// + +// initialization of sc_array + + tmp7[0] = 3; + tmp7[1] = 12; + tmp8[0] = 'S'; + tmp8[1] = 'C'; + tmp11[0][0] = "1"; + tmp11[1][0] = "0"; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + out_ack.write(true); + + //execute mixed data type shift left operations + tmp1r = tmp1 << (tmp7[0] % 8); + tmp2r = tmp2 << 2; + tmp3r = tmp3 << 1; + tmp4r = tmp4 << (tmp7[1] % 16); + tmp5r = tmp3 << ((unsigned int)(tmp1.to_int()) % 32); + tmp6r = tmp6 << 1; + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + //execute mixed data type shift left operations + tmp1r = tmp1 << (tmp7[0] % 8); + tmp2r = tmp2 << (unsigned int)(tmp4 % 8); + tmp3r = tmp3 << (short)(tmp5 % 32); + tmp4r = tmp4 << 2; + tmp5r = tmp3 << ((unsigned int)(tmp5) % 16); + tmp6r = tmp6 << (tmp2.to_uint() % 32); + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/datatypes.h new file mode 100644 index 000000000..6def13c41 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/datatypes.h @@ -0,0 +1,126 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal& in_value3; // Input port + const sc_signal& in_value4; // Input port + const sc_signal& in_value5; // Input port + const sc_signal& in_value6; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID, + + sc_signal& OUT_ACK, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/display.cpp new file mode 100644 index 000000000..15e132440 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/display.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + while(true){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << " " << in_value5.read() << " " << (int)in_value6.read() << endl; + do { wait(); } while ( in_valid == true); + } + +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/display.h new file mode 100644 index 000000000..5e938dbf5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/display.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_value1; // Output port + const sc_signal_bool_vector& in_value2; // Output port + const sc_signal& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/golden/datatypes.log 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0 94 +Stimuli: 57 95 95 93 20094 +Display: 11001000 01111100 190 380928 0 96 +Stimuli: 58 96 96 94 20095 +Display: 11010000 10000000 192 385024 0 98 +Stimuli: 59 97 97 95 20096 +Display: 11011000 10000100 194 389120 0 100 +Stimuli: 60 98 98 96 20097 +Display: 11100000 10001000 196 393216 0 102 +Stimuli: 61 99 99 97 20098 +Display: 11101000 10001100 198 397312 0 104 +Stimuli: 62 100 100 98 20099 +Display: 11110000 10010000 200 401408 0 106 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/main.cpp new file mode 100644 index 000000000..813f5f29d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/main.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal stimulus_line3; + sc_signal stimulus_line4; + sc_signal stimulus_line5; + sc_signal stimulus_line6; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector result_line1; + sc_signal_bool_vector result_line2; + sc_signal result_line3; + sc_signal result_line4; + sc_signal result_line5; + sc_signal result_line6; + + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/stimulus.cpp new file mode 100644 index 000000000..1263da802 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/stimulus.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + + int counter = 0; + + tmp1 = "0b11011011"; + tmp2 = "0b00000001"; + tmp3 = 1; + tmp4 = -1; + tmp5 = 20000; + tmp6 = 'R'; + + while(counter<100){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " << tmp5 << " " << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 1; + tmp5 = tmp5 + 1; + tmp6 = tmp6 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + counter++; + wait(); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/stimulus.h new file mode 100644 index 000000000..6f7aeefc8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/datatypes/stimulus.h @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/display.cpp new file mode 100644 index 000000000..79d2a0f86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/display.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + while(true){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << " " << in_value5.read() << " " << in_value6.read() << endl; + do { wait(); } while ( in_valid == true); + } + +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/display.h new file mode 100644 index 000000000..5e938dbf5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/display.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_value1; // Output port + const sc_signal_bool_vector& in_value2; // Output port + const sc_signal& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/golden/sharing.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/golden/sharing.log new file mode 100644 index 0000000000000000000000000000000000000000..9666885d8259f3fba432fa8ee1d39fb5435ce1e0 GIT binary patch literal 7111 zcmZ9R|Eq4<9LFU|CrOed>60YMomqRY{q-ivOfnL3B}p>V+{x9<+?#vnhx`9Xk|arz zBuSDaNs=T-D@ppY>jAefB!H9^QX&`-Las)}0q# zdj9DLckaG;b?bqy@7#36GoJw&4f7-6uKT(VAL?iu+(kh z?O)4;Ay%HV3Ckmdiw5Ul(8o+0N~ZXFMwB2txJtu%Mu;F0ex)aGn&x$hI>t8=V%$T| z)rjp8L|4HJEru<|ZCS^leKR9ACrMhQV?ROq$BSUvSWvJobXiJ#D^qYJmK+cRg{&Wz zyma=3q>N+KWm~4G^BCXGl!ei9voXP)Fjk|aw2KiF;p`F;^qq{EW5Av?TNLCO<4}yT z8hkL9nU7wO^xe#vG-PVFD!|0ChBiiR#*JG{`#?l>#x38=9F!o*s+65^Sj$9AbD z<~mNB!Yc9o%#jt{Y+QgRJysN^$vjwPUh9N<+xG_<#85F{H2W9m8Po*nJ6}=p{xD62 zb*HR2;D?!HW8p11l((O3+{OtTLou>4>E@a5p42}|oMDgN>}7yiQFos?R>Z8?7XoaP z;>Q^z8>`9heC)~3Lw61!=_&Xp*19rsC4Q12h`>5z$##ZzQq#uU5UH7%Q|pEsZ?w7b z(@Y{Q$drF12joGr1gQ{7KLmrN%e8QK}*zJ^#1>0JurQR3$rf@fN@ znW3E^7K0MMqGXGmAGGrRB16!Cn5KttvXkj~ofusb&Rk-j#-i;0GD8qRTC}7&C)vh* zV3dym<6a+uH)C4!l-Cnv>M{c_U(gWDKHcd zldmk3H`CuF3MOgI-i3COa!HCs#mrn8%Ir<;w+XTZ6Q3qAD9OGxp&6w)I9T+CVOqSe z{VqY)sDqmHu(f923ZgKSSyN(RIT^N<#j3>b6U4g=lS^WNoGjZC%cm}+> zhXi4JrbeLIvd~gadS)90QY>2cm!18s#2*uc9ilZ`7Fvch35GZ>?MiiEg#z-Y1VIC0 ztViLTEK5?{SKpMNSP8Ap1FRB%P7v)_ZniA6lM;1zPTB<$hPscWro>+ogrQ-8XtpfC zGen&gPV>o1Vy9Xe=@NfEAb13)(7fIPI~Wq7hZ%;E&|z99d`pkN9T0@;Sf@YSWuoG2>+ihuRPqsM)~~Q(WCIS|R-i*4km)CNguQl`$_*B#eV93zMXijhz`K zS|q;MMA*&8nJulCF|SA@N+oYsFhn|exoa`0M+tUc7B)85F|SM@?o0+X5P*Q@;97JI zBuQ*Zde_S4)(V+dCDIhkI5n@rAWtL-ad7=Y2;F07wYW+Y?vs#YRnl{^bQ`NqX?ipy z+eXrRDf8-tT4F|%WeJsSZ4uXk^aG)h$zj~R&Ald3xMf0nqt&Xj;ebnNEvLcDF zUYjV`9644bN;WkFK@^r>bwQd(wmPlHuS=Aj$>Qeq7~GL!QPjOrxZ;8okMqb%R^s&s z1&_0(tJ%*GGvy-TGWNV{+_hqqctfJ#8su1!BFbJ?*NYaZLJQfgb@E>K#zf(^mQ~G) zM9Dr@POtOQFEl;tI(xHwQ=(MreKq<+0e6b%k{7Ge?vHzY?^NQ=iNak2a;!*{Y~ZG( zWw+y8n|kdk@s>oHV?mA;iINSho{B_c46eKeEYW6O~6GaM~mv%9z=2#0g36ysx z3T8o$6)B>VciYHxO4CAi*}@5|#JduO`oi@W{YA;%y$lT(-7kbPt{c-)y&g-L8Y@RL zmIQ`B9w7;%P?VT%7&iHFBf%=R5R^ER4ocL#{sKI4u2bVz2AlEm=?ZUVu^JO+<_^=% zg)qP~r|aQ`28R^yMU{XK5vIghf{IWL#l)2@+@f+^edGsiWIM+ZF7few0GCd(2i zyI7!$ASIe|i-`8UXgSyI)0RLwp>WgQQy}KZnv=H% zOrVp!0lB}vw?whd)auHz6+9nEB#tdmWnm(n4Bkv&Ng^sbQciHph7uo4lr=UaS(PX! zcVE^b>4HPaOtz~BzZX0oN+`-Z9i>Qnnw<^q7$W7ScRZtZ1SBSfbz_>s(T%Me)(LYU>4+9k+ht=i;|0$o)@yauhj>bpGy?>LrLWe zf;cDlI;rjN;@MLiaSW5sFh75F_0)^c-Mtx)f8^E^Pd$FC{fF*m`WIc?e{lESz1z>m PGY{jX`?tUF*wz05fmK(e literal 0 HcmV?d00001 diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/main.cpp new file mode 100644 index 000000000..ffb011ab2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/main.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "sharing.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal stimulus_line3; + sc_signal stimulus_line4; + sc_signal stimulus_line5; + sc_signal stimulus_line6; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector result_line1; + sc_signal_bool_vector result_line2; + sc_signal result_line3; + sc_signal result_line4; + sc_signal result_line5; + sc_signal result_line6; + + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack); + + sharing sharing1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/sharing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/sharing.cpp new file mode 100644 index 000000000..392ac6ca5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/sharing.cpp @@ -0,0 +1,150 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "sharing.h" +#define true 1 +#define false 0 + +void sharing::entry() + +{ + + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + +// define 1 dimensional array + unsigned int tmp7[2]; + char tmp8[2]; + +// define sc_bool_vector + sc_bv<4> tmp10; + tmp10[3] = 0; tmp10[2] = 1; tmp10[1] = 0; tmp10[0] = 1; + +// define 2 dimentional array + sc_bv<1> tmp11[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// + +// initialization of sc_array + + tmp7[0] = 3; + tmp7[1] = 12; + tmp8[0] = 'S'; + tmp8[1] = 'C'; + tmp11[0][0] = "1"; + tmp11[1][0] = "0"; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + out_ack.write(true); + + //execute mixed data type shit left operations + tmp1r = tmp1 << (tmp7[0] % 8); + tmp2r = tmp2 << 2; + tmp3r = tmp3 << 1; + tmp4r = tmp4 << (tmp7[1] % 32); + tmp5r = tmp3 << ((unsigned int)tmp1.to_int() % 32); + tmp6r = tmp6 << 1; + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + //execute mixed data type shift left operations + tmp1r = tmp1 << (tmp7[0] % 8); + tmp2r = tmp2 << (tmp4 % 8); + tmp3r = tmp3 << (tmp5 % 32); + tmp4r = tmp4 << 2; + tmp5r = tmp3 << ((unsigned int)(tmp5) % 32); + tmp6r = tmp6 << (tmp2.to_uint() % 8); + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/sharing.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/sharing.f new file mode 100644 index 000000000..998e0f309 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/sharing.f @@ -0,0 +1,4 @@ +sharing/display.cpp +sharing/main.cpp +sharing/sharing.cpp +sharing/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/sharing.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/sharing.h new file mode 100644 index 000000000..5552db43a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/sharing.h @@ -0,0 +1,126 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( sharing ) +{ + SC_HAS_PROCESS( sharing ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal& in_value3; // Input port + const sc_signal& in_value4; // Input port + const sc_signal& in_value5; // Input port + const sc_signal& in_value6; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + sharing( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID, + + sc_signal& OUT_ACK, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/stimulus.cpp new file mode 100644 index 000000000..1263da802 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/stimulus.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + + int counter = 0; + + tmp1 = "0b11011011"; + tmp2 = "0b00000001"; + tmp3 = 1; + tmp4 = -1; + tmp5 = 20000; + tmp6 = 'R'; + + while(counter<100){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " << tmp5 << " " << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 1; + tmp5 = tmp5 + 1; + tmp6 = tmp6 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + counter++; + wait(); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/stimulus.h new file mode 100644 index 000000000..6f7aeefc8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/sharing/stimulus.h @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/display.cpp new file mode 100644 index 000000000..79d2a0f86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/display.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + while(true){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read() << " " << in_value4.read() << " " << in_value5.read() << " " << in_value6.read() << endl; + do { wait(); } while ( in_valid == true); + } + +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/display.h new file mode 100644 index 000000000..5e938dbf5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/display.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_value1; // Output port + const sc_signal_bool_vector& in_value2; // Output port + const sc_signal& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/golden/sharing.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/golden/sharing.log new file mode 100644 index 000000000..acc069982 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/golden/sharing.log @@ -0,0 +1,203 @@ +SystemC Simulation +Stimuli: -37 1 1 -1 20000 +Display: 11111011 00000000 0 -1 0 ) +Stimuli: -36 2 2 0 20001 +Display: 11111011 00000000 1 0 0 ) +Stimuli: -35 3 3 1 20002 +Display: 11111011 00000000 1 0 0 * +Stimuli: -34 4 4 2 20003 +Display: 11111011 00000001 2 0 0 * +Stimuli: -33 5 5 3 20004 +Display: 11111011 00000001 2 0 0 + +Stimuli: -32 6 6 4 20005 +Display: 11111100 00000001 3 0 6 + +Stimuli: -31 7 7 5 20006 +Display: 11111100 00000001 3 0 3 , +Stimuli: -30 8 8 6 20007 +Display: 11111100 00000010 4 0 2 , +Stimuli: -29 9 9 7 20008 +Display: 11111100 00000010 4 0 1 - +Stimuli: -28 10 10 8 20009 +Display: 11111100 00000010 5 1 0 - +Stimuli: -27 11 11 9 20010 +Display: 11111100 00000010 5 1 0 . +Stimuli: -26 12 12 10 20011 +Display: 11111100 00000011 6 1 0 . +Stimuli: -25 13 13 11 20012 +Display: 11111100 00000011 6 1 0 / +Stimuli: -24 14 14 12 20013 +Display: 11111101 00000011 7 1 0 / +Stimuli: -23 15 15 13 20014 +Display: 11111101 00000011 7 1 0 0 +Stimuli: -22 16 16 14 20015 +Display: 11111101 00000100 8 1 0 0 +Stimuli: -21 17 17 15 20016 +Display: 11111101 00000100 8 1 0 1 +Stimuli: -20 18 18 16 20017 +Display: 11111101 00000100 9 2 0 1 +Stimuli: -19 19 19 17 20018 +Display: 11111101 00000100 9 2 0 2 +Stimuli: -18 20 20 18 20019 +Display: 11111101 00000101 10 2 0 2 +Stimuli: -17 21 21 19 20020 +Display: 11111101 00000101 10 2 0 3 +Stimuli: -16 22 22 20 20021 +Display: 11111110 00000101 11 2 0 3 +Stimuli: -15 23 23 21 20022 +Display: 11111110 00000101 11 2 0 4 +Stimuli: -14 24 24 22 20023 +Display: 11111110 00000110 12 2 0 4 +Stimuli: -13 25 25 23 20024 +Display: 11111110 00000110 12 2 0 5 +Stimuli: -12 26 26 24 20025 +Display: 11111110 00000110 13 3 0 5 +Stimuli: -11 27 27 25 20026 +Display: 11111110 00000110 13 3 0 6 +Stimuli: -10 28 28 26 20027 +Display: 11111110 00000111 14 3 0 6 +Stimuli: -9 29 29 27 20028 +Display: 11111110 00000111 14 3 0 7 +Stimuli: -8 30 30 28 20029 +Display: 11111111 00000111 15 3 0 7 +Stimuli: -7 31 31 29 20030 +Display: 11111111 00000111 15 3 0 8 +Stimuli: -6 32 32 30 20031 +Display: 11111111 00001000 16 3 0 8 +Stimuli: -5 33 33 31 20032 +Display: 11111111 00001000 16 3 0 9 +Stimuli: -4 34 34 32 20033 +Display: 11111111 00001000 17 4 0 9 +Stimuli: -3 35 35 33 20034 +Display: 11111111 00001000 17 4 0 : +Stimuli: -2 36 36 34 20035 +Display: 11111111 00001001 18 4 0 : +Stimuli: -1 37 37 35 20036 +Display: 11111111 00001001 18 4 0 ; +Stimuli: 0 38 38 36 20037 +Display: 00000000 00001001 19 4 38 ; +Stimuli: 1 39 39 37 20038 +Display: 00000000 00001001 19 4 19 < +Stimuli: 2 40 40 38 20039 +Display: 00000000 00001010 20 4 10 < +Stimuli: 3 41 41 39 20040 +Display: 00000000 00001010 20 4 5 = +Stimuli: 4 42 42 40 20041 +Display: 00000000 00001010 21 5 2 = +Stimuli: 5 43 43 41 20042 +Display: 00000000 00001010 21 5 1 > +Stimuli: 6 44 44 42 20043 +Display: 00000000 00001011 22 5 0 > +Stimuli: 7 45 45 43 20044 +Display: 00000000 00001011 22 5 0 ? +Stimuli: 8 46 46 44 20045 +Display: 00000001 00001011 23 5 0 ? +Stimuli: 9 47 47 45 20046 +Display: 00000001 00001011 23 5 0 À +Stimuli: 10 48 48 46 20047 +Display: 00000001 00001100 24 5 0 À +Stimuli: 11 49 49 47 20048 +Display: 00000001 00001100 24 5 0 Á +Stimuli: 12 50 50 48 20049 +Display: 00000001 00001100 25 6 0 Á +Stimuli: 13 51 51 49 20050 +Display: 00000001 00001100 25 6 0  +Stimuli: 14 52 52 50 20051 +Display: 00000001 00001101 26 6 0  +Stimuli: 15 53 53 51 20052 +Display: 00000001 00001101 26 6 0 à +Stimuli: 16 54 54 52 20053 +Display: 00000010 00001101 27 6 0 à +Stimuli: 17 55 55 53 20054 +Display: 00000010 00001101 27 6 0 Ä +Stimuli: 18 56 56 54 20055 +Display: 00000010 00001110 28 6 0 Ä +Stimuli: 19 57 57 55 20056 +Display: 00000010 00001110 28 6 0 Å +Stimuli: 20 58 58 56 20057 +Display: 00000010 00001110 29 7 0 Å +Stimuli: 21 59 59 57 20058 +Display: 00000010 00001110 29 7 0 Æ +Stimuli: 22 60 60 58 20059 +Display: 00000010 00001111 30 7 0 Æ +Stimuli: 23 61 61 59 20060 +Display: 00000010 00001111 30 7 0 Ç +Stimuli: 24 62 62 60 20061 +Display: 00000011 00001111 31 7 0 Ç +Stimuli: 25 63 63 61 20062 +Display: 00000011 00001111 31 7 0 È +Stimuli: 26 64 64 62 20063 +Display: 00000011 00010000 32 7 0 È +Stimuli: 27 65 65 63 20064 +Display: 00000011 00010000 32 7 0 É +Stimuli: 28 66 66 64 20065 +Display: 00000011 00010000 33 8 0 É +Stimuli: 29 67 67 65 20066 +Display: 00000011 00010000 33 8 0 Ê +Stimuli: 30 68 68 66 20067 +Display: 00000011 00010001 34 8 0 Ê +Stimuli: 31 69 69 67 20068 +Display: 00000011 00010001 34 8 0 Ë +Stimuli: 32 70 70 68 20069 +Display: 00000100 00010001 35 8 70 Ë +Stimuli: 33 71 71 69 20070 +Display: 00000100 00010001 35 8 35 Ì +Stimuli: 34 72 72 70 20071 +Display: 00000100 00010010 36 8 18 Ì +Stimuli: 35 73 73 71 20072 +Display: 00000100 00010010 36 8 9 Í +Stimuli: 36 74 74 72 20073 +Display: 00000100 00010010 37 9 4 Í +Stimuli: 37 75 75 73 20074 +Display: 00000100 00010010 37 9 2 Î +Stimuli: 38 76 76 74 20075 +Display: 00000100 00010011 38 9 1 Î +Stimuli: 39 77 77 75 20076 +Display: 00000100 00010011 38 9 0 Ï +Stimuli: 40 78 78 76 20077 +Display: 00000101 00010011 39 9 0 Ï +Stimuli: 41 79 79 77 20078 +Display: 00000101 00010011 39 9 0 Ð +Stimuli: 42 80 80 78 20079 +Display: 00000101 00010100 40 9 0 Ð +Stimuli: 43 81 81 79 20080 +Display: 00000101 00010100 40 9 0 Ñ +Stimuli: 44 82 82 80 20081 +Display: 00000101 00010100 41 10 0 Ñ +Stimuli: 45 83 83 81 20082 +Display: 00000101 00010100 41 10 0 Ò +Stimuli: 46 84 84 82 20083 +Display: 00000101 00010101 42 10 0 Ò +Stimuli: 47 85 85 83 20084 +Display: 00000101 00010101 42 10 0 Ó +Stimuli: 48 86 86 84 20085 +Display: 00000110 00010101 43 10 0 Ó +Stimuli: 49 87 87 85 20086 +Display: 00000110 00010101 43 10 0 Ô +Stimuli: 50 88 88 86 20087 +Display: 00000110 00010110 44 10 0 Ô +Stimuli: 51 89 89 87 20088 +Display: 00000110 00010110 44 10 0 Õ +Stimuli: 52 90 90 88 20089 +Display: 00000110 00010110 45 11 0 Õ +Stimuli: 53 91 91 89 20090 +Display: 00000110 00010110 45 11 0 Ö +Stimuli: 54 92 92 90 20091 +Display: 00000110 00010111 46 11 0 Ö +Stimuli: 55 93 93 91 20092 +Display: 00000110 00010111 46 11 0 × +Stimuli: 56 94 94 92 20093 +Display: 00000111 00010111 47 11 0 × +Stimuli: 57 95 95 93 20094 +Display: 00000111 00010111 47 11 0 Ø +Stimuli: 58 96 96 94 20095 +Display: 00000111 00011000 48 11 0 Ø +Stimuli: 59 97 97 95 20096 +Display: 00000111 00011000 48 11 0 Ù +Stimuli: 60 98 98 96 20097 +Display: 00000111 00011000 49 12 0 Ù +Stimuli: 61 99 99 97 20098 +Display: 00000111 00011000 49 12 0 Ú +Stimuli: 62 100 100 98 20099 +Display: 00000111 00011001 50 12 0 Ú + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/golden/sharing.log.linuxaarch64 b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/golden/sharing.log.linuxaarch64 new file mode 100644 index 000000000..7faa47515 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/golden/sharing.log.linuxaarch64 @@ -0,0 +1,203 @@ +SystemC Simulation +Stimuli: -37 1 1 -1 20000 +Display: 11111011 00000000 0 -1 0 ) +Stimuli: -36 2 2 0 20001 +Display: 11111011 00000000 1 0 0 ) +Stimuli: -35 3 3 1 20002 +Display: 11111011 00000000 1 0 0 * +Stimuli: -34 4 4 2 20003 +Display: 11111011 00000001 2 0 0 * +Stimuli: -33 5 5 3 20004 +Display: 11111011 00000001 2 0 0 + +Stimuli: -32 6 6 4 20005 +Display: 11111100 00000001 3 0 6 + +Stimuli: -31 7 7 5 20006 +Display: 11111100 00000001 3 0 3 , +Stimuli: -30 8 8 6 20007 +Display: 11111100 00000010 4 0 2 , +Stimuli: -29 9 9 7 20008 +Display: 11111100 00000010 4 0 1 - +Stimuli: -28 10 10 8 20009 +Display: 11111100 00000010 5 1 0 - +Stimuli: -27 11 11 9 20010 +Display: 11111100 00000010 5 1 0 . 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27 25 20026 +Display: 11111110 00000110 13 3 0 6 +Stimuli: -10 28 28 26 20027 +Display: 11111110 00000111 14 3 0 6 +Stimuli: -9 29 29 27 20028 +Display: 11111110 00000111 14 3 0 7 +Stimuli: -8 30 30 28 20029 +Display: 11111111 00000111 15 3 0 7 +Stimuli: -7 31 31 29 20030 +Display: 11111111 00000111 15 3 0 8 +Stimuli: -6 32 32 30 20031 +Display: 11111111 00001000 16 3 0 8 +Stimuli: -5 33 33 31 20032 +Display: 11111111 00001000 16 3 0 9 +Stimuli: -4 34 34 32 20033 +Display: 11111111 00001000 17 4 0 9 +Stimuli: -3 35 35 33 20034 +Display: 11111111 00001000 17 4 0 : +Stimuli: -2 36 36 34 20035 +Display: 11111111 00001001 18 4 0 : +Stimuli: -1 37 37 35 20036 +Display: 11111111 00001001 18 4 0 ; +Stimuli: 0 38 38 36 20037 +Display: 00000000 00001001 19 4 38 ; +Stimuli: 1 39 39 37 20038 +Display: 00000000 00001001 19 4 19 < +Stimuli: 2 40 40 38 20039 +Display: 00000000 00001010 20 4 10 < +Stimuli: 3 41 41 39 20040 +Display: 00000000 00001010 20 4 5 = +Stimuli: 4 42 42 40 20041 +Display: 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+Stimuli: 20 58 58 56 20057 +Display: 00000010 00001110 29 7 0 E +Stimuli: 21 59 59 57 20058 +Display: 00000010 00001110 29 7 0 F +Stimuli: 22 60 60 58 20059 +Display: 00000010 00001111 30 7 0 F +Stimuli: 23 61 61 59 20060 +Display: 00000010 00001111 30 7 0 G +Stimuli: 24 62 62 60 20061 +Display: 00000011 00001111 31 7 0 G +Stimuli: 25 63 63 61 20062 +Display: 00000011 00001111 31 7 0 H +Stimuli: 26 64 64 62 20063 +Display: 00000011 00010000 32 7 0 H +Stimuli: 27 65 65 63 20064 +Display: 00000011 00010000 32 7 0 I +Stimuli: 28 66 66 64 20065 +Display: 00000011 00010000 33 8 0 I +Stimuli: 29 67 67 65 20066 +Display: 00000011 00010000 33 8 0 J +Stimuli: 30 68 68 66 20067 +Display: 00000011 00010001 34 8 0 J +Stimuli: 31 69 69 67 20068 +Display: 00000011 00010001 34 8 0 K +Stimuli: 32 70 70 68 20069 +Display: 00000100 00010001 35 8 70 K +Stimuli: 33 71 71 69 20070 +Display: 00000100 00010001 35 8 35 L +Stimuli: 34 72 72 70 20071 +Display: 00000100 00010010 36 8 18 L +Stimuli: 35 73 73 71 20072 +Display: 00000100 00010010 36 8 9 M +Stimuli: 36 74 74 72 20073 +Display: 00000100 00010010 37 9 4 M +Stimuli: 37 75 75 73 20074 +Display: 00000100 00010010 37 9 2 N +Stimuli: 38 76 76 74 20075 +Display: 00000100 00010011 38 9 1 N +Stimuli: 39 77 77 75 20076 +Display: 00000100 00010011 38 9 0 O +Stimuli: 40 78 78 76 20077 +Display: 00000101 00010011 39 9 0 O +Stimuli: 41 79 79 77 20078 +Display: 00000101 00010011 39 9 0 P +Stimuli: 42 80 80 78 20079 +Display: 00000101 00010100 40 9 0 P +Stimuli: 43 81 81 79 20080 +Display: 00000101 00010100 40 9 0 Q +Stimuli: 44 82 82 80 20081 +Display: 00000101 00010100 41 10 0 Q +Stimuli: 45 83 83 81 20082 +Display: 00000101 00010100 41 10 0 R +Stimuli: 46 84 84 82 20083 +Display: 00000101 00010101 42 10 0 R +Stimuli: 47 85 85 83 20084 +Display: 00000101 00010101 42 10 0 S +Stimuli: 48 86 86 84 20085 +Display: 00000110 00010101 43 10 0 S +Stimuli: 49 87 87 85 20086 +Display: 00000110 00010101 43 10 0 T +Stimuli: 50 88 88 86 20087 +Display: 00000110 00010110 44 10 0 T +Stimuli: 51 89 89 87 20088 +Display: 00000110 00010110 44 10 0 U +Stimuli: 52 90 90 88 20089 +Display: 00000110 00010110 45 11 0 U +Stimuli: 53 91 91 89 20090 +Display: 00000110 00010110 45 11 0 V +Stimuli: 54 92 92 90 20091 +Display: 00000110 00010111 46 11 0 V +Stimuli: 55 93 93 91 20092 +Display: 00000110 00010111 46 11 0 W +Stimuli: 56 94 94 92 20093 +Display: 00000111 00010111 47 11 0 W +Stimuli: 57 95 95 93 20094 +Display: 00000111 00010111 47 11 0 X +Stimuli: 58 96 96 94 20095 +Display: 00000111 00011000 48 11 0 X +Stimuli: 59 97 97 95 20096 +Display: 00000111 00011000 48 11 0 Y +Stimuli: 60 98 98 96 20097 +Display: 00000111 00011000 49 12 0 Y +Stimuli: 61 99 99 97 20098 +Display: 00000111 00011000 49 12 0 Z +Stimuli: 62 100 100 98 20099 +Display: 00000111 00011001 50 12 0 Z + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/main.cpp new file mode 100644 index 000000000..ffb011ab2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/main.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "sharing.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stimulus_line1; + sc_signal_bool_vector stimulus_line2; + sc_signal stimulus_line3; + sc_signal stimulus_line4; + sc_signal stimulus_line5; + sc_signal stimulus_line6; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector result_line1; + sc_signal_bool_vector result_line2; + sc_signal result_line3; + sc_signal result_line4; + sc_signal result_line5; + sc_signal result_line6; + + output_valid = 0; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack); + + sharing sharing1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/sharing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/sharing.cpp new file mode 100644 index 000000000..2b1dc2eb4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/sharing.cpp @@ -0,0 +1,150 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "sharing.h" +#define true 1 +#define false 0 + +void sharing::entry() + +{ + + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + +// define 1 dimensional array + unsigned int tmp7[2]; + char tmp8[2]; + +// define sc_bool_vector + sc_bv<4> tmp10; + tmp10[3] = 0; tmp10[2] = 1; tmp10[1] = 0; tmp10[0] = 1; + +// define 2 dimentional array + sc_bv<1> tmp11[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// + +// initialization of sc_array + + tmp7[0] = 3; + tmp7[1] = 12; + tmp8[0] = 'S'; + tmp8[1] = 'C'; + tmp11[0][0] = "1"; + tmp11[1][0] = "0"; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + + out_ack.write(true); + + //execute mixed data type addition operations + tmp1r = tmp1 >> (tmp7[0] % 9); + tmp2r = tmp2 >> 2; + tmp3r = tmp3 >> 1; + tmp4r = tmp4 >> (tmp7[1] % 9); + tmp5r = tmp3 >> (((unsigned int)tmp1.to_int()) % 32); + tmp6r = tmp6 >> 1; + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + //execute mixed data type addition operations + tmp1r = tmp1 >> (tmp7[0] % 9); + tmp2r = tmp2 >> (tmp4 % 9); + tmp3r = tmp3 >> (tmp5 % 33); + tmp4r = tmp4 >> 2; + tmp5r = tmp3 >> (((unsigned int)tmp5) % 33); + tmp6r = tmp6 >> (tmp2.to_uint() % 9); + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/sharing.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/sharing.f new file mode 100644 index 000000000..998e0f309 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/sharing.f @@ -0,0 +1,4 @@ +sharing/display.cpp +sharing/main.cpp +sharing/sharing.cpp +sharing/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/sharing.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/sharing.h new file mode 100644 index 000000000..5552db43a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/sharing.h @@ -0,0 +1,126 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sharing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( sharing ) +{ + SC_HAS_PROCESS( sharing ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; // Input port + const sc_signal_bool_vector& in_value2; // Input port + const sc_signal& in_value3; // Input port + const sc_signal& in_value4; // Input port + const sc_signal& in_value5; // Input port + const sc_signal& in_value6; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + sharing( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALID, + + sc_signal& OUT_ACK, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/stimulus.cpp new file mode 100644 index 000000000..1263da802 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/stimulus.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + + int counter = 0; + + tmp1 = "0b11011011"; + tmp2 = "0b00000001"; + tmp3 = 1; + tmp4 = -1; + tmp5 = 20000; + tmp6 = 'R'; + + while(counter<100){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " << tmp5 << " " << endl; + tmp1 = tmp1 + 1; + tmp2 = tmp2 + 1; + tmp3 = tmp3 + 1; + tmp4 = tmp4 + 1; + tmp5 = tmp5 + 1; + tmp6 = tmp6 + 1; + do { wait(); } while (in_ack==false); + out_valid.write(false); + counter++; + wait(); + } + sc_stop(); +} +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/stimulus.h new file mode 100644 index 000000000..6f7aeefc8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shr/sharing/stimulus.h @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/common.h new file mode 100644 index 000000000..8976a26a2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector4; +typedef sc_signal > sc_signal_bool_vector8; +typedef sc_signal > sc_signal_logic_vector4; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/datatypes.cpp new file mode 100644 index 000000000..5b863a7ed --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/datatypes.cpp @@ -0,0 +1,142 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry() + +{ + sc_bigint<8> tmp1; + sc_bigint<8> tmp1r; + sc_biguint<8> tmp2; + sc_biguint<8> tmp2r; + long tmp3; + long tmp3r; + int tmp4; + int tmp4r; + short tmp5; + short tmp5r; + char tmp6; + char tmp6r; + bool tmp7; + bool tmp7r; + sc_bv<4> tmp8; + sc_bv<4> tmp8r; + sc_lv<4> tmp9; + sc_lv<4> tmp9r; + +// define 1 dimensional array + int tmpa[2]; + char tmpb[2]; + +// reset_loop + if (reset.read() == true) { + out_valid.write(false); + out_ack.write(false); + wait(); + } else wait(); + +// +// main loop +// +// initialization of sc_array + + tmpa[0] = 12; + tmpa[1] = 127; + tmpb[1] = 'G'; + + + while(1) { + while(in_valid.read()==false) wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + tmp6 = in_value6.read(); + tmpb[0] = in_value7.read(); + tmp7 = in_value8.read(); + tmp8 = in_value9.read(); + tmp9 = in_value10.read(); + + out_ack.write(true); + + //execute mixed data type xor operations + + // signed(8) <- signed(8) ^ unsigned(8) + tmp1r = tmp1 ^ tmp2; + // unsigned(8) <- char ^ long + tmp2r = tmp6 ^ tmp3; + // long <- int ^ char + tmp3r = tmp4 ^ tmp6; + // int <- int ^ short + tmp4r = tmp4 ^ tmp5; + // short <- short ^ const + tmp5r = tmp5 ^ 5; + // char <- char_array[0] ^ int_array[1] + tmp6r = tmpb[0] ^ tmpa[1]; + // bool <- bool ^ bool; + tmp7r = tmp7 ^ tmp7; + // sc_bool_vector(4) <- sc_bool_vector(4) ^ sc_logic_vector(4) + tmp8r = tmp8 ^ tmp9; + // sc_logic_vector(4) <- sc_bool_vector(4) ^ "0111" + tmp9r = tmp9 ^ sc_bv<4>( "0111" ); + + //write outputs + out_value1.write(tmp1r); + out_value2.write(tmp2r); + out_value3.write(tmp3r); + out_value4.write(tmp4r); + out_value5.write(tmp5r); + out_value6.write(tmp6r); + out_value7.write(tmp7r); + out_value8.write(tmp8r); + out_value9.write(tmp9r); + + out_valid.write(true); + wait(); + out_ack.write(false); + out_valid.write(false); + + } + +} // End + + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/datatypes.f new file mode 100644 index 000000000..64f4c05f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/stimulus.cpp +datatypes/display.cpp +datatypes/datatypes.cpp +datatypes/main.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/datatypes.h new file mode 100644 index 000000000..9aba0ab1f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/datatypes.h @@ -0,0 +1,146 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector8& in_value1; // Input port + const sc_signal_bool_vector8& in_value2; // Input port + const sc_signal& in_value3; // Input port + const sc_signal& in_value4; // Input port + const sc_signal& in_value5; // Input port + const sc_signal& in_value6; // Input port + const sc_signal& in_value7; // Input port + const sc_signal& in_value8 ; + const sc_signal_bool_vector4& in_value9 ; // Input port + const sc_signal_logic_vector4& in_value10; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_ack; // Output port + sc_signal_bool_vector8& out_value1; // Output port + sc_signal_bool_vector8& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_value7; // Output port + sc_signal_bool_vector4& out_value8; // Output port + sc_signal_logic_vector4& out_value9; // Output port + sc_signal& out_valid; // Output port + + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector8& IN_VALUE1, + const sc_signal_bool_vector8& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALUE7, + const sc_signal& IN_VALUE8, + const sc_signal_bool_vector4& IN_VALUE9, + const sc_signal_logic_vector4& IN_VALUE10, + const sc_signal& IN_VALID, + + sc_signal& OUT_ACK, + sc_signal_bool_vector8& OUT_VALUE1, + sc_signal_bool_vector8& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALUE7, + sc_signal_bool_vector4& OUT_VALUE8, + sc_signal_logic_vector4& OUT_VALUE9, + sc_signal& OUT_VALID + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_value7 (IN_VALUE7), + in_value8 (IN_VALUE8), + in_value9 (IN_VALUE9), + in_value10 (IN_VALUE10), + in_valid (IN_VALID), + out_ack (OUT_ACK), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_value7 (OUT_VALUE7), + out_value8 (OUT_VALUE8), + out_value9 (OUT_VALUE9), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + +//Process Functionality: Described in the member function below + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/display.cpp new file mode 100644 index 000000000..0c6fdf20e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry() { + + int counter = 0; + while(counter++<40){ + do { wait(); } while ( in_valid == false); + cout << "Display: " << in_value1.read() << " " << in_value2.read() << " " << in_value3.read( +) << " " << in_value4.read() << " " << in_value5.read() << " " << in_value6.read() << " " << in_value7.read() << " " << in_value8.read() << " " << in_value9.read() <& in_value3; // Output port + const sc_signal& in_value4; // Output port + const sc_signal& in_value5; // Output port + const sc_signal& in_value6; // Output port + const sc_signal& in_value7; // Output port + const sc_signal_bool_vector4& in_value8; // Output port + const sc_signal_logic_vector4& in_value9; // Output port + const sc_signal& in_valid; // Output port + + // + // Constructor + // + + display( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal_bool_vector8& IN_VALUE1, + const sc_signal_bool_vector8& IN_VALUE2, + const sc_signal& IN_VALUE3, + const sc_signal& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALUE6, + const sc_signal& IN_VALUE7, + const sc_signal_bool_vector4& IN_VALUE8, + const sc_signal_logic_vector4& IN_VALUE9, + const sc_signal& IN_VALID + ) + : + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_value6 (IN_VALUE6), + in_value7 (IN_VALUE7), + in_value8 (IN_VALUE8), + in_value9 (IN_VALUE9), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + + + void entry(); +}; + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/golden/datatypes.log new file mode 100644 index 000000000..05838b4cf --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/golden/datatypes.log @@ -0,0 +1,84 @@ +SystemC Simulation +Stimuli: 85 2 12345678 -123456 20000 $ A 1 1 2 +Display: 01010111 01101010 -123420 -109600 20005 > 0 0011 0101 +Stimuli: 87 3 12345683 -123453 20006 $ B 0 2 3 +Display: 01010100 01110111 -123417 -109595 20003 = 0 0001 0100 +Stimuli: 89 4 12345688 -123450 20012 $ C 1 3 4 +Display: 01011101 01111100 -123422 -109590 20009 < 0 0111 0011 +Stimuli: 91 5 12345693 -123447 20018 $ D 0 4 5 +Display: 01011110 01111001 -123411 -109573 20023 ; 0 0001 0010 +Stimuli: 93 6 12345698 -123444 20024 $ E 1 5 6 +Display: 01011011 01000110 -123416 -109580 20029 : 0 0011 0001 +Stimuli: 95 7 12345703 -123441 20030 $ F 0 6 7 +Display: 01011000 01000011 -123413 -109583 20027 9 0 0001 0000 +Stimuli: 97 8 12345708 -123438 20036 $ G 1 7 8 +Display: 01101001 01001000 -123402 -109674 20033 8 0 1111 1111 +Stimuli: 99 9 12345713 -123435 20042 $ H 0 8 9 +Display: 01101010 01010101 -123407 -109665 20047 7 0 0001 1110 +Stimuli: 101 10 12345718 -123432 20048 $ I 1 9 10 +Display: 01101111 01010010 -123396 -109688 20053 6 0 0011 1101 +Stimuli: 103 11 12345723 -123429 20054 $ J 0 10 11 +Display: 01101100 01011111 -123393 -109683 20051 5 0 0001 1100 +Stimuli: 105 12 12345728 -123426 20060 $ K 1 11 12 +Display: 01100101 10100100 -123398 -109694 20057 4 0 0111 1011 +Stimuli: 107 13 12345733 -123423 20066 $ L 0 12 13 +Display: 01100110 10100001 -123451 -109693 20071 3 0 0001 1010 +Stimuli: 109 14 12345738 -123420 20072 $ M 1 13 14 +Display: 01100011 10101110 -123456 -109684 20077 2 0 0011 1001 +Stimuli: 111 15 12345743 -123417 20078 $ N 0 14 15 +Display: 01100000 10101011 -123453 -109687 20075 1 0 0001 1000 +Stimuli: 113 16 12345748 -123414 20084 $ O 1 15 0 +Display: 01100001 10110000 -123442 -109666 20081 0 0 1111 0111 +Stimuli: 115 17 12345753 -123411 20090 $ P 0 0 1 +Display: 01100010 10111101 -123447 -109673 20095 / 0 0001 0110 +Stimuli: 117 18 12345758 -123408 20096 $ Q 1 1 2 +Display: 01100111 10111010 -123436 -109712 20101 . 0 0011 0101 +Stimuli: 119 19 12345763 -123405 20102 $ R 0 2 3 +Display: 01100100 10000111 -123433 -109707 20099 - 0 0001 0100 +Stimuli: 121 20 12345768 -123402 20108 $ S 1 3 4 +Display: 01101101 10001100 -123438 -109702 20105 , 0 0111 0011 +Stimuli: 123 21 12345773 -123399 20114 $ T 0 4 5 +Display: 01101110 10001001 -123427 -109717 20119 + 0 0001 0010 +Stimuli: 125 22 12345778 -123396 20120 $ U 1 5 6 +Display: 01101011 10010110 -123432 -109724 20125 * 0 0011 0001 +Stimuli: 127 23 12345783 -123393 20126 $ V 0 6 7 +Display: 01101000 10010011 -123429 -109727 20123 ) 0 0001 0000 +Stimuli: -127 24 12345788 -123390 20132 $ W 1 7 8 +Display: 10011001 10011000 -123354 -110426 20129 ( 0 1111 1111 +Stimuli: -125 25 12345793 -123387 20138 $ X 0 8 9 +Display: 10011010 11100101 -123359 -110417 20143 ' 0 0001 1110 +Stimuli: -123 26 12345798 -123384 20144 $ Y 1 9 10 +Display: 10011111 11100010 -123348 -110408 20149 & 0 0011 1101 +Stimuli: -121 27 12345803 -123381 20150 $ Z 0 10 11 +Display: 10011100 11101111 -123345 -110403 20147 % 0 0001 1100 +Stimuli: -119 28 12345808 -123378 20156 $ [ 1 11 12 +Display: 10010101 11110100 -123350 -110414 20153 $ 0 0111 1011 +Stimuli: -117 29 12345813 -123375 20162 $ \ 0 12 13 +Display: 10010110 11110001 -123339 -110381 20167 # 0 0001 1010 +Stimuli: -115 30 12345818 -123372 20168 $ ] 1 13 14 +Display: 10010011 11111110 -123344 -110372 20173 " 0 0011 1001 +Stimuli: -113 31 12345823 -123369 20174 $ ^ 0 14 15 +Display: 10010000 11111011 -123341 -110375 20171 ! 0 0001 1000 +Stimuli: -111 32 12345828 -123366 20180 $ _ 1 15 0 +Display: 10110001 11000000 -123330 -110386 20177 0 1111 0111 +Stimuli: -109 33 12345833 -123363 20186 $ ` 0 0 1 +Display: 10110010 11001101 -123335 -110393 20191  0 0001 0110 +Stimuli: -107 34 12345838 -123360 20192 $ a 1 1 2 +Display: 10110111 11001010 -123388 -110400 20197  0 0011 0101 +Stimuli: -105 35 12345843 -123357 20198 $ b 0 2 3 +Display: 10110100 11010111 -123385 -110395 20195  0 0001 0100 +Stimuli: -103 36 12345848 -123354 20204 $ c 1 3 4 +Display: 10111101 11011100 -123390 -110390 20201  0 0111 0011 +Stimuli: -101 37 12345853 -123351 20210 $ d 0 4 5 +Display: 10111110 11011001 -123379 -110373 20215  0 0001 0010 +Stimuli: -99 38 12345858 -123348 20216 $ e 1 5 6 +Display: 10111011 00100110 -123384 -110380 20221  0 0011 0001 +Stimuli: -97 39 12345863 -123345 20222 $ f 0 6 7 +Display: 10111000 00100011 -123381 -110383 20219  0 0001 0000 +Stimuli: -95 40 12345868 -123342 20228 $ g 1 7 8 +Display: 10001001 00101000 -123370 -110282 20225  0 1111 1111 +Stimuli: -93 41 12345873 -123339 20234 $ h 0 8 9 +Display: 10001010 00110101 -123375 -110273 20239  0 0001 1110 +Stimuli: -91 42 12345878 -123336 20240 $ i 1 9 10 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/main.cpp new file mode 100644 index 000000000..ae4db66ee --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/main.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "datatypes.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector8 stimulus_line1; + sc_signal_bool_vector8 stimulus_line2; + sc_signal stimulus_line3; + sc_signal stimulus_line4; + sc_signal stimulus_line5; + sc_signal stimulus_line6; + sc_signal stimulus_line7; + sc_signal stimulus_line8; + sc_signal_bool_vector4 stimulus_line9; + sc_signal_logic_vector4 stimulus_line10; + sc_signal input_valid; + sc_signal ack; + sc_signal output_valid; + sc_signal_bool_vector8 result_line1; + sc_signal_bool_vector8 result_line2; + sc_signal result_line3; + sc_signal result_line4; + sc_signal result_line5; + sc_signal result_line6; + sc_signal result_line7; + sc_signal_bool_vector4 result_line8; + sc_signal_logic_vector4 result_line9; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + stimulus_line7, + stimulus_line8, + stimulus_line9, + stimulus_line10, + input_valid, + ack); + + datatypes datatypes1( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + stimulus_line6, + stimulus_line7, + stimulus_line8, + stimulus_line9, + stimulus_line10, + input_valid, + ack, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + result_line7, + result_line8, + result_line9, + output_valid); + + display display1( "display_block", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + result_line6, + result_line7, + result_line8, + result_line9, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/stimulus.cpp new file mode 100644 index 000000000..384030f0d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/stimulus.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + reset.write(true); + wait(); + reset.write(false); + + sc_signed tmp1(8); + sc_signed tmp2(8); + long tmp3; + int tmp4; + short tmp5; + char tmp6; + char tmp7; + bool tmp8; + sc_unsigned tmp9(4); + sc_unsigned tmp10(4); + + tmp1 = "0b01010101"; + tmp2 = "0b00000010"; + tmp3 = 12345678; + tmp4 = -123456; + tmp5 = 20000; + tmp6 = '$'; + tmp7 = 'A'; + tmp8 = "0"; + tmp9 = "0b0001"; + tmp10 = "0b0010"; + + while(true){ + out_valid.write(true); + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_value6.write(tmp6); + out_value7.write(tmp7); + out_value8.write(tmp8); + out_value9.write(tmp9); + out_value10.write(tmp10); + cout << "Stimuli: " << tmp1 << " " << tmp2 << " " << tmp3 << " " << tmp4 << " " + << tmp5 << " " << tmp6 << " " << tmp7 << " " << tmp8 << " " << tmp9 << " " << tmp10 <& reset; + sc_signal_bool_vector8& out_value1; // Output port + sc_signal_bool_vector8& out_value2; // Output port + sc_signal& out_value3; // Output port + sc_signal& out_value4; // Output port + sc_signal& out_value5; // Output port + sc_signal& out_value6; // Output port + sc_signal& out_value7; // Output port + sc_signal& out_value8 ; + sc_signal_bool_vector4& out_value9 ; // Output port + sc_signal_logic_vector4& out_value10; // Output port + sc_signal& out_valid; // Output port + const sc_signal& in_ack; + + // + // Constructor + // + + stimulus( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + sc_signal& RESET, + sc_signal_bool_vector8& OUT_VALUE1, + sc_signal_bool_vector8& OUT_VALUE2, + sc_signal& OUT_VALUE3, + sc_signal& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALUE6, + sc_signal& OUT_VALUE7, + sc_signal& OUT_VALUE8, + sc_signal_bool_vector4& OUT_VALUE9, + sc_signal_logic_vector4& OUT_VALUE10, + sc_signal& OUT_VALID, + const sc_signal& IN_ACK + ) + : + reset (RESET), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_value6 (OUT_VALUE6), + out_value7 (OUT_VALUE7), + out_value8 (OUT_VALUE8), + out_value9 (OUT_VALUE9), + out_value10 (OUT_VALUE10), + out_valid (OUT_VALID), + in_ack (IN_ACK) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + }; + void entry(); +}; +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/common.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/common.h new file mode 100644 index 000000000..1af56c523 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/display.cpp new file mode 100644 index 000000000..966569d48 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/display.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/display.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/display.h new file mode 100644 index 000000000..cf3a89370 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in_data1; // Input port + const sc_signal& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal_bool_vector& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_DATA1, + const sc_signal& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal_bool_vector& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/golden/xor_1.log b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/golden/xor_1.log new file mode 100644 index 000000000..71803889d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/golden/xor_1.log @@ -0,0 +1,39 @@ +SystemC Simulation +Stimuli : 1 1 00000001 1 1 at 13 ns +Display : 28 29 00001110 00011010 00011011 at 17 ns +Display : 31 30 00001101 00011001 00011000 at 20 ns +Stimuli : 12 12 00001100 12 12 at 24 ns +Display : 17 16 00000011 00010111 00010110 at 28 ns +Display : 18 19 00000000 00010100 00010101 at 31 ns +Stimuli : 23 23 00010111 23 23 at 35 ns +Display : 10 11 00011000 00001100 00001101 at 39 ns +Display : 9 8 00011011 00001111 00001110 at 42 ns +Stimuli : 34 34 00100010 34 34 at 46 ns +Display : 63 62 00101101 00111001 00111000 at 50 ns +Display : 60 61 00101110 00111010 00111011 at 53 ns +Stimuli : 45 45 00101101 45 45 at 57 ns +Display : 48 49 00100010 00110110 00110111 at 61 ns +Display : 51 50 00100001 00110101 00110100 at 64 ns +Stimuli : 56 56 00111000 56 56 at 68 ns +Display : 37 36 00110111 00100011 00100010 at 72 ns +Display : 38 39 00110100 00100000 00100001 at 75 ns +Stimuli : 67 67 01000011 67 67 at 79 ns +Display : 94 95 01001100 01011000 01011001 at 83 ns +Display : 93 92 01001111 01011011 01011010 at 86 ns +Stimuli : 78 78 01001110 78 78 at 90 ns +Display : 83 82 01000001 01010101 01010100 at 94 ns +Display : 80 81 01000010 01010110 01010111 at 97 ns +Stimuli : 89 89 01011001 89 89 at 101 ns +Display : 68 69 01010110 01000010 01000011 at 105 ns +Display : 71 70 01010101 01000001 01000000 at 108 ns +Stimuli : 100 100 01100100 100 100 at 112 ns +Display : 121 120 01101011 01111111 01111110 at 116 ns +Display : 122 123 01101000 01111100 01111101 at 119 ns +Stimuli : 111 111 01101111 111 111 at 123 ns +Display : 114 115 01100000 01110100 01110101 at 127 ns +Display : 113 112 01100011 01110111 01110110 at 130 ns +Stimuli : 122 122 01111010 122 122 at 134 ns +Display : 103 102 01110101 01100001 01100000 at 138 ns +Display : 100 101 01110110 01100010 01100011 at 141 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/main.cpp new file mode 100644 index 000000000..ba25bdac8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/main.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" +#include "display.h" +#include "xor_1.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal stimulus_line1; + sc_signal stimulus_line2; + sc_signal_bool_vector stimulus_line3; + sc_signal_bool_vector stimulus_line4; + sc_signal_bool_vector stimulus_line5; + sc_signal input_valid; + sc_signal output_valid; + sc_signal result_line1; + sc_signal result_line2; + sc_signal_bool_vector result_line3; + sc_signal_bool_vector result_line4; + sc_signal_bool_vector result_line5; + + stimulus stimulus1("stimulus_block", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid); + + xor_1 xor1 ( "process_body", + clock, + reset, + stimulus_line1, + stimulus_line2, + stimulus_line3, + stimulus_line4, + stimulus_line5, + input_valid, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + display display1 ( "display", + clock, + result_line1, + result_line2, + result_line3, + result_line4, + result_line5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/stimulus.cpp new file mode 100644 index 000000000..b7e17113f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/stimulus.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + signed int send_value1 = 1; + unsigned int send_value2 = 1; + sc_lv<8> send_value3; + sc_signed send_value4(8); + sc_unsigned send_value5(8); + + + // sending some reset values + reset.write(true); + out_valid.write(false); + send_value3 = 1; + send_value4 = 1; + send_value5 = 1; + out_stimulus1.write(0); + out_stimulus2.write(0); + out_stimulus3.write(0); + out_stimulus4.write(0); + out_stimulus5.write(0); + wait(3); + reset.write(false); + // sending normal mode values + while(true){ + wait(10); + out_stimulus1.write( send_value1 ); + out_stimulus2.write( send_value2 ); + out_stimulus3.write( send_value3 ); + out_stimulus4.write( send_value4 ); + out_stimulus5.write( send_value5 ); + out_valid.write( true ); + cout << "Stimuli : " << send_value1 << " " + << send_value2 << " " + << send_value3 << " " + << send_value4 << " " + << send_value5 << " " << " at " + << sc_time_stamp() << endl; + send_value1 = send_value1+11; + send_value2 = send_value2+11; + send_value3 = send_value3.to_int()+11; + send_value4 = send_value4+11; + send_value5 = send_value5+11; + wait(); + out_valid.write( false ); + } +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/stimulus.h new file mode 100644 index 000000000..9bd211ba6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& out_stimulus1; + sc_signal& out_stimulus2; + sc_signal_bool_vector& out_stimulus3; + sc_signal_bool_vector& out_stimulus4; + sc_signal_bool_vector& out_stimulus5; + sc_signal& out_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& OUT_STIMULUS1, + sc_signal& OUT_STIMULUS2, + sc_signal_bool_vector& OUT_STIMULUS3, + sc_signal_bool_vector& OUT_STIMULUS4, + sc_signal_bool_vector& OUT_STIMULUS5, + sc_signal& OUT_VALID + ) + : + reset(RESET), + out_stimulus1(OUT_STIMULUS1), + out_stimulus2(OUT_STIMULUS2), + out_stimulus3(OUT_STIMULUS3), + out_stimulus4(OUT_STIMULUS4), + out_stimulus5(OUT_STIMULUS5), + out_valid(OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/xor_1.cpp b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/xor_1.cpp new file mode 100644 index 000000000..623e1b2f9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/xor_1.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + xor_1.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "xor_1.h" + +void xor_1::entry(){ + + signed int tmp1; + unsigned int tmp2; + sc_lv<8> tmp3; + sc_lv<8> tmp3_tmp; + sc_bigint<8> tmp4; + sc_biguint<8> tmp5; + + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execute simple operations + tmp3_tmp = 0x0f; + tmp1 = tmp1 ^ 0x0f ^ 0x12; + tmp2 = tmp2 ^ 0x0f ^ 0x13 ; + tmp3 = tmp3 ^ tmp3_tmp; + tmp4 = tmp4 ^ 0x0f ^ 0x14 ; + tmp5 = tmp5 ^ 0x0f ^ 0x15 ; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + + //execute simple operations + tmp3_tmp = 0x03; + tmp1 ^= 0x03; + tmp2 ^= 0x03; + tmp3 ^= tmp3_tmp; + tmp4 ^= 0x03; + tmp5 ^= 0x03; + wait(); + + // write outputs + out_value1.write(tmp1); + out_value2.write(tmp2); + out_value3.write(tmp3); + out_value4.write(tmp4); + out_value5.write(tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/xor_1.f b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/xor_1.f new file mode 100644 index 000000000..aa5cf3860 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/xor_1.f @@ -0,0 +1,4 @@ +xor_1/display.cpp +xor_1/main.cpp +xor_1/stimulus.cpp +xor_1/xor_1.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/xor_1.h b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/xor_1.h new file mode 100644 index 000000000..d56813a54 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/xor_1/xor_1.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + xor_1.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( xor_1 ) +{ + SC_HAS_PROCESS( xor_1 ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal& in_value1; // Input port + const sc_signal& in_value2; // Input port + const sc_signal_bool_vector& in_value3; // Input port + const sc_signal_bool_vector& in_value4; // Input port + const sc_signal_bool_vector& in_value5; // Input port + const sc_signal& in_valid; // Input port + sc_signal& out_value1; // Output port + sc_signal& out_value2; // Output port + sc_signal_bool_vector& out_value3; // Output port + sc_signal_bool_vector& out_value4; // Output port + sc_signal_bool_vector& out_value5; // Output port + sc_signal& out_valid; // Output port + + // + // Constructor + // + + xor_1 ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALUE1, + const sc_signal& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal_bool_vector& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal& OUT_VALUE1, + sc_signal& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal_bool_vector& OUT_VALUE5, + sc_signal& OUT_VALID // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.cpp new file mode 100644 index 000000000..b25ae0fa6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.cpp @@ -0,0 +1,171 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-10-25 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" + + +void balancing::entry(){ + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp3; + unsigned int tmpint; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + out_tmp2 = 0; + out_tmp3 = 0; + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + + //easy, just a bunch of different waits + out_valid1.write(true); + tmpint = tmp1.to_uint(); + switch (tmpint) { + case 4 : + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + case 3 : + out_value1.write(2); + wait(); + wait(); + wait(); + case 2 : + out_value1.write(1); + wait(); + wait(); + default : + out_value1.write(tmp1); + wait(); + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + tmp1 = tmp2; + out_valid2.write(true); + wait(); + tmpint = tmp1.to_uint(); + switch (tmpint) { + case 0 : + case 1 : + case 2 : + case 3 : + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + case 4 : + case 5 : + case 6 : + case 7 : + //short operation should not extent latency + out_tmp2 = 4; + wait(); + case 8 | 9 | 10 | 11: + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + }; + wait(); + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp3 = in_value3.read(); + out_valid3.write(true); + wait(); + tmpint = tmp3.to_uint(); + switch (tmpint) { + case 0 : + case 1 : + case 2 : + case 3 : + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + case 4 : + case 5 : + case 6 : + case 7 : + //short operation should not extent latency + out_tmp2 = 4; + case 8 : + case 9 : + case 10 : + case 11 : + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + }; + wait(); + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.f b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.f new file mode 100644 index 000000000..0a6488983 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.f @@ -0,0 +1,4 @@ +balancing/balancing.cpp +balancing/display.cpp +balancing/main.cpp +balancing/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.h new file mode 100644 index 000000000..a27e68018 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/balancing.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( balancing ) +{ + SC_HAS_PROCESS( balancing ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal& out_valid1; + sc_signal& out_valid2; + sc_signal& out_valid3; + + // + // Constructor + // + + balancing( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal& OUT_VALID1, + sc_signal& OUT_VALID2, + sc_signal& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.cpp new file mode 100644 index 000000000..55ff8cb26 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up. + while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.h new file mode 100644 index 000000000..f42a6b294 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal& in_valid1; + const sc_signal& in_valid2; + const sc_signal& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal& IN_VALID1, + const sc_signal& IN_VALID2, + const sc_signal& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/golden/balancing.log b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/golden/balancing.log new file mode 100644 index 000000000..264e09ae0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/golden/balancing.log @@ -0,0 +1,163 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data2 0000 at 6 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data2 0000 at 9 ns +Display : in_data2 0000 at 10 ns +Display : in_data2 0000 at 11 ns +Display : in_data2 0000 at 12 ns +Display : in_data3 0000 at 14 ns +Display : in_data3 0000 at 15 ns +Display : in_data3 0000 at 16 ns +Display : in_data3 0000 at 17 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data3 0000 at 18 ns +Display : in_data3 0000 at 19 ns +Display : in_data3 0000 at 20 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data1 0010 at 38 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data2 0001 at 42 ns +Display : in_data2 0001 at 43 ns +Display : in_data2 0001 at 44 ns +Display : in_data2 0001 at 45 ns +Display : in_data2 0001 at 46 ns +Display : in_data3 0000 at 48 ns +Display : in_data3 0000 at 49 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data3 0000 at 50 ns +Display : in_data3 0000 at 51 ns +Display : in_data3 0000 at 52 ns +Display : in_data3 0000 at 53 ns +Display : in_data3 0000 at 54 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0011 at 72 ns +Display : in_data1 0010 at 73 ns +Display : in_data1 0010 at 74 ns +Display : in_data1 0010 at 75 ns +Display : in_data1 0001 at 76 ns +Display : in_data1 0001 at 77 ns +Display : in_data1 0100 at 78 ns +Display : in_data2 0001 at 80 ns +Display : in_data2 0001 at 81 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data2 0001 at 82 ns +Display : in_data2 0001 at 83 ns +Display : in_data2 0001 at 84 ns +Display : in_data2 0001 at 85 ns +Display : in_data3 0000 at 87 ns +Display : in_data3 0000 at 88 ns +Display : in_data3 0000 at 89 ns +Display : in_data3 0000 at 90 ns +Display : in_data3 0000 at 91 ns +Display : in_data3 0000 at 92 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0110 at 100 ns +Display : in_data2 0001 at 102 ns +Display : in_data2 0001 at 103 ns +Display : in_data2 0001 at 104 ns +Display : in_data2 0001 at 105 ns +Display : in_data2 0001 at 106 ns +Display : in_data2 0001 at 107 ns +Display : in_data3 0000 at 109 ns +Display : in_data3 0000 at 110 ns +Display : in_data3 0000 at 111 ns +Display : in_data3 0000 at 112 ns +Display : in_data3 0000 at 113 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data3 0000 at 114 ns +Display : in_data1 0111 at 116 ns +Display : in_data2 0001 at 118 ns +Display : in_data2 0001 at 119 ns +Display : in_data2 0001 at 120 ns +Display : in_data2 0001 at 121 ns +Display : in_data2 0001 at 122 ns +Display : in_data2 0001 at 123 ns +Display : in_data3 0000 at 125 ns +Display : in_data3 0000 at 126 ns +Display : in_data3 0000 at 127 ns +Display : in_data3 0000 at 128 ns +Display : in_data3 0000 at 129 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data3 0000 at 130 ns +Display : in_data1 1000 at 132 ns +Display : in_data2 0001 at 134 ns +Display : in_data2 0001 at 135 ns +Display : in_data3 0000 at 137 ns +Display : in_data3 0000 at 138 ns +Display : in_data3 0000 at 139 ns +Display : in_data3 0000 at 140 ns +Display : in_data3 0000 at 141 ns +Display : in_data3 0000 at 142 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1001 at 148 ns +Display : in_data2 0001 at 150 ns +Display : in_data2 0001 at 151 ns +Display : in_data3 0000 at 153 ns +Display : in_data3 0000 at 154 ns +Display : in_data3 0000 at 155 ns +Display : in_data3 0000 at 156 ns +Display : in_data3 0000 at 157 ns +Display : in_data3 0000 at 158 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1010 at 164 ns +Display : in_data2 0001 at 166 ns +Display : in_data2 0001 at 167 ns +Display : in_data3 0000 at 169 ns +Display : in_data3 0000 at 170 ns +Display : in_data3 0000 at 171 ns +Display : in_data3 0000 at 172 ns +Display : in_data3 0000 at 173 ns +Display : in_data3 0000 at 174 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1011 at 180 ns +Display : in_data2 0001 at 182 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data3 0000 at 188 ns +Display : in_data3 0000 at 189 ns +Display : in_data3 0000 at 190 ns +Display : in_data3 0000 at 191 ns +Display : in_data3 0000 at 192 ns +Display : in_data3 0000 at 193 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1100 at 196 ns +Display : in_data2 0001 at 198 ns +Display : in_data2 0001 at 199 ns +Display : in_data3 0000 at 201 ns +Display : in_data3 0000 at 202 ns +Display : in_data3 0000 at 203 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1101 at 212 ns +Display : in_data2 0001 at 214 ns +Display : in_data2 0001 at 215 ns +Display : in_data3 0000 at 217 ns +Display : in_data3 0000 at 218 ns +Display : in_data3 0000 at 219 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1110 at 228 ns +Display : in_data2 0001 at 230 ns +Display : in_data2 0001 at 231 ns +Display : in_data3 0000 at 233 ns +Display : in_data3 0000 at 234 ns +Display : in_data3 0000 at 235 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1111 at 244 ns +Display : in_data2 0001 at 246 ns +Display : in_data2 0001 at 247 ns +Display : in_data3 0000 at 249 ns +Display : in_data3 0000 at 250 ns +Display : in_data3 0000 at 251 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/main.cpp new file mode 100644 index 000000000..177cebdfb --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal output_valid1; + sc_signal output_valid2; + sc_signal output_valid3; + + + balancing balancing1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.cpp new file mode 100644 index 000000000..65f97f5d6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.h new file mode 100644 index 000000000..a03d3e296 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.cpp new file mode 100644 index 000000000..2d6ece6cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + + +void datatypes::entry() { + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + // reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + //checking if condition on a range of bits + if (tmp1.range(1,3) == 4) { + out_value1.write(3); + } else if (tmp1.range(3,1) == 4) { + out_value1.write(2); + } else { + out_value1.write(tmp1); + }; + wait(); + + if (tmp2[2]) { + out_value2.write(3); + } else if ((bool)tmp1[1]==true) { + out_value2.write(2); + } else { + out_value2.write(tmp2); + }; + wait(); + + if (tmp3.range(1,3)=="000" || ((tmp3.range(3,1).to_uint()!=4) && + tmp3.range(3,1).to_uint()!=5 && tmp3.range(3,1).to_uint()!=6 && + tmp3.range(3,1).to_uint()!=7)) { + out_value3.write(1); + } else { + out_value3.write(tmp3); + }; + + if (tmp4.range(1,3)=="000" || (tmp4.range(3,1).to_uint()!=4 && + tmp4.range(3,1).to_uint()!=5 && tmp4.range(3,1).to_uint()!=6 && + tmp4.range(3,1).to_uint()!=7)) { + out_value4.write(1); + } else { + out_value4.write(tmp4); + }; + + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.f new file mode 100644 index 000000000..c767ce1c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/datatypes.cpp +datatypes/display.cpp +datatypes/main.cpp +datatypes/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.h new file mode 100644 index 000000000..ac098dc52 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/datatypes.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal& out_valid; + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.cpp new file mode 100644 index 000000000..530b46ce3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.h new file mode 100644 index 000000000..5fcc3c5b3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/display.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/golden/datatypes.log new file mode 100644 index 000000000..f183028c3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/golden/datatypes.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +Display : 0000 0000 0001 0001 at 6 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +Display : 0001 0001 0001 0001 at 17 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +Display : 0011 0010 0001 0001 at 28 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +Display : 0011 0010 0001 0001 at 39 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +Display : 0100 0011 0001 0001 at 50 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +Display : 0101 0011 0001 0001 at 61 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +Display : 0110 0011 0001 0001 at 72 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +Display : 0111 0011 0001 0001 at 83 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +Display : 0010 1000 1000 1000 at 94 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +Display : 0010 1001 1001 1001 at 105 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +Display : 1010 0010 1010 1010 at 116 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +Display : 1011 0010 1011 1011 at 127 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +Display : 1100 0011 1100 1100 at 138 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +Display : 1101 0011 1101 1101 at 149 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +Display : 1110 0011 1110 1110 at 160 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +Display : 1111 0011 1111 1111 at 171 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/main.cpp new file mode 100644 index 000000000..b7e9c4496 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal output_valid; + + + + datatypes datatypes1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + result3, + result4, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + result4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.cpp new file mode 100644 index 000000000..c3d3dea5a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.h new file mode 100644 index 000000000..058da3946 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.cpp new file mode 100644 index 000000000..f089446c8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up. + while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.h new file mode 100644 index 000000000..f42a6b294 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal& in_valid1; + const sc_signal& in_valid2; + const sc_signal& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal& IN_VALID1, + const sc_signal& IN_VALID2, + const sc_signal& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.cpp new file mode 100644 index 000000000..90972a738 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.cpp @@ -0,0 +1,168 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" + +void fsm::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_biguint<4> tmp3; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + unsigned int tmpint; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + + //easy, just a bunch of different waits + out_valid1.write(true); + tmpint = tmp1.to_uint(); + wait(); + switch (tmpint) { + case 4 : + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + break; + case 3 : + out_value1.write(2); + wait(); + wait(); + wait(); + break; + case 2 : + out_value1.write(1); + wait(); + wait(); + break; + default : + out_value1.write(tmp1); + wait(); + break; + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + out_valid2.write(true); + wait(); + tmpint = tmp2.to_uint(); + switch (tmpint) { + case 0 : + case 1 : + case 2 : + case 3 : + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + break; + case 4 : + case 5 : + case 6 : + case 7 : + //short operation should not extent latency + out_tmp2 = 4; + wait(); + break; + case 8 : + case 9 : + case 10 : + case 11 : + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + break; + }; + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + // and just another short case, maybe later to check unbalanched case + tmp3 = in_value3.read(); + out_valid3.write(true); + wait(); + tmpint = tmp3.to_uint(); + switch (tmpint) { + case 0 : + case 1 : + case 2 : + case 3 : + //long operation should extent latency + out_tmp3 = tmp3*tmp3*tmp3; + wait(); + break; + default : + //short operation should not extent latency + out_tmp3 = 4; + wait(); + break; + }; + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.f new file mode 100644 index 000000000..c9b315fc7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.f @@ -0,0 +1,4 @@ +fsm/display.cpp +fsm/fsm.cpp +fsm/main.cpp +fsm/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.h new file mode 100644 index 000000000..ee5feb351 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/fsm.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( fsm ) +{ + SC_HAS_PROCESS( fsm ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal& out_valid1; + sc_signal& out_valid2; + sc_signal& out_valid3; + + // + // Constructor + // + + fsm( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal& OUT_VALID1, + sc_signal& OUT_VALID2, + sc_signal& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/golden/fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/golden/fsm.log new file mode 100644 index 000000000..89ea6bcd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/golden/fsm.log @@ -0,0 +1,142 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data1 0000 at 5 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data3 0000 at 10 ns +Display : in_data3 0000 at 11 ns +Display : in_data3 0000 at 12 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data1 0000 at 20 ns +Display : in_data1 0001 at 21 ns +Display : in_data2 0000 at 23 ns +Display : in_data2 0000 at 24 ns +Display : in_data3 0000 at 26 ns +Display : in_data3 0000 at 27 ns +Display : in_data3 0001 at 28 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data1 0001 at 38 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data3 0001 at 43 ns +Display : in_data3 0001 at 44 ns +Display : in_data3 1000 at 45 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data1 0001 at 52 ns +Display : in_data1 0010 at 53 ns +Display : in_data1 0010 at 54 ns +Display : in_data1 0010 at 55 ns +Display : in_data2 1000 at 57 ns +Display : in_data2 1000 at 58 ns +Display : in_data3 1000 at 60 ns +Display : in_data3 1000 at 61 ns +Display : in_data3 1011 at 62 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0010 at 72 ns +Display : in_data1 0011 at 73 ns +Display : in_data2 1011 at 75 ns +Display : in_data2 1011 at 76 ns +Display : in_data3 1011 at 78 ns +Display : in_data3 1011 at 79 ns +Display : in_data3 0100 at 80 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data1 0011 at 84 ns +Display : in_data1 0101 at 85 ns +Display : in_data2 0100 at 87 ns +Display : in_data2 0100 at 88 ns +Display : in_data3 0100 at 90 ns +Display : in_data3 0100 at 91 ns +Display : in_data3 0100 at 92 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0101 at 100 ns +Display : in_data1 0110 at 101 ns +Display : in_data2 0100 at 103 ns +Display : in_data2 0100 at 104 ns +Display : in_data3 0100 at 106 ns +Display : in_data3 0100 at 107 ns +Display : in_data3 0100 at 108 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data1 0110 at 116 ns +Display : in_data1 0111 at 117 ns +Display : in_data2 0100 at 119 ns +Display : in_data2 0100 at 120 ns +Display : in_data3 0100 at 122 ns +Display : in_data3 0100 at 123 ns +Display : in_data3 0100 at 124 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data1 0111 at 132 ns +Display : in_data1 1000 at 133 ns +Display : in_data2 0100 at 135 ns +Display : in_data2 0100 at 136 ns +Display : in_data2 0100 at 137 ns +Display : in_data2 0100 at 138 ns +Display : in_data3 0100 at 140 ns +Display : in_data3 0100 at 141 ns +Display : in_data3 0100 at 142 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1000 at 148 ns +Display : in_data1 1001 at 149 ns +Display : in_data2 0001 at 151 ns +Display : in_data2 0001 at 152 ns +Display : in_data2 0001 at 153 ns +Display : in_data2 0001 at 154 ns +Display : in_data3 0100 at 156 ns +Display : in_data3 0100 at 157 ns +Display : in_data3 0100 at 158 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1001 at 164 ns +Display : in_data1 1010 at 165 ns +Display : in_data2 0001 at 167 ns +Display : in_data2 0001 at 168 ns +Display : in_data2 0001 at 169 ns +Display : in_data2 0001 at 170 ns +Display : in_data3 0100 at 172 ns +Display : in_data3 0100 at 173 ns +Display : in_data3 0100 at 174 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1010 at 180 ns +Display : in_data1 1011 at 181 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data3 0100 at 188 ns +Display : in_data3 0100 at 189 ns +Display : in_data3 0100 at 190 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1011 at 196 ns +Display : in_data1 1100 at 197 ns +Display : in_data2 0001 at 199 ns +Display : in_data3 0100 at 201 ns +Display : in_data3 0100 at 202 ns +Display : in_data3 0100 at 203 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1100 at 212 ns +Display : in_data1 1101 at 213 ns +Display : in_data2 0001 at 215 ns +Display : in_data3 0100 at 217 ns +Display : in_data3 0100 at 218 ns +Display : in_data3 0100 at 219 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1101 at 228 ns +Display : in_data1 1110 at 229 ns +Display : in_data2 0001 at 231 ns +Display : in_data3 0100 at 233 ns +Display : in_data3 0100 at 234 ns +Display : in_data3 0100 at 235 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1110 at 244 ns +Display : in_data1 1111 at 245 ns +Display : in_data2 0001 at 247 ns +Display : in_data3 0100 at 249 ns +Display : in_data3 0100 at 250 ns +Display : in_data3 0100 at 251 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/main.cpp new file mode 100644 index 000000000..5280ddd17 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal output_valid1; + sc_signal output_valid2; + sc_signal output_valid3; + + + fsm fsm1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.cpp new file mode 100644 index 000000000..65f97f5d6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.h new file mode 100644 index 000000000..a03d3e296 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.cpp new file mode 100644 index 000000000..0135a0381 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.h new file mode 100644 index 000000000..74d4c67ba --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/display.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/golden/inlining.log b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/golden/inlining.log new file mode 100644 index 000000000..3a3a8c358 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/golden/inlining.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +Display : 0000 0000 at 6 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +Display : 0000 0001 at 17 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +Display : 0000 0010 at 28 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +Display : 0000 0011 at 39 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +Display : 0100 0100 at 50 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +Display : 0101 0101 at 61 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +Display : 0110 0110 at 72 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +Display : 0111 0111 at 83 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +Display : 1000 1000 at 94 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +Display : 1001 1001 at 105 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +Display : 1010 1010 at 116 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +Display : 1011 1011 at 127 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +Display : 1100 1100 at 138 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +Display : 1101 1101 at 149 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +Display : 1110 1110 at 160 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +Display : 1111 1111 at 171 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.cpp new file mode 100644 index 000000000..08da0e3ba --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" + +// list of defines +#define clock(a) wait(a) +#define intu4(a) sc_biguint<4> a; +#define vec4(a) sc_lv<4> a; +#define my_case(a, b, c) switch (a) { \ + case 0: \ + case 1: \ + case 2: \ + case 3: \ + b = 0; \ + break; \ + default : \ + b = c; \ + break; \ + }; +#define my_wait_case(a, b, c) switch (a) { \ + case 0: \ + case 1: \ + case 2: \ + case 3: \ + b = 0; \ + wait(); \ + break; \ + default : \ + b = c; \ + wait(); \ + break; \ + }; + +void inlining::entry(){ + + int tmp1; + int tmp2; + vec4(tmp3); + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_valid.write(false); + clock(1); + } else clock(1); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read().to_int(); + tmp2 = in_value2.read().to_int(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + //execution + my_wait_case(tmp1, tmp3, tmp4); + out_value1.write(tmp3); + clock(1); + + my_case(tmp2, tmp3, tmp4); + out_value2.write(tmp4); + out_valid.write(true); + clock(1); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.f b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.f new file mode 100644 index 000000000..fc00870e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.f @@ -0,0 +1,4 @@ +inlining/display.cpp +inlining/inlining.cpp +inlining/main.cpp +inlining/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.h new file mode 100644 index 000000000..70380e24e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/inlining.h @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( inlining ) +{ + SC_HAS_PROCESS( inlining ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1 ; + const sc_signal_bool_vector& in_value2 ; + const sc_signal_bool_vector& in_value3 ; + const sc_signal_bool_vector& in_value4 ; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal& out_valid; + + // + // Constructor + // + + inlining( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + // + void entry (); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/main.cpp new file mode 100644 index 000000000..c859cafce --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/main.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal output_valid; + + + + inlining inlining1 ( + "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid + ); + + display display1 ("display", + clock, + result1, + result2, + output_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.cpp new file mode 100644 index 000000000..c3d3dea5a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.h new file mode 100644 index 000000000..058da3946 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.cpp new file mode 100644 index 000000000..13ee2a807 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.cpp @@ -0,0 +1,135 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" + +void balancing::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_biguint<4> tmp3; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + + //easy, just a bunch of different waits + out_valid1.write(true); + if (tmp1 == 4) { + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + } else if (tmp1 == 3) { + out_value1.write(2); + wait(); + wait(); + wait(); + } else if (tmp1 == 2) { + out_value1.write(1); + wait(); + wait(); + } else { + out_value1.write(tmp1); + wait(); + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + out_valid2.write(true); + wait(); + if (tmp2<4) { + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + } else if (tmp2<8) { + //short operation should not extent latency + out_tmp2 = 4; + wait(); + } else if (tmp2<12) { + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + }; + wait(); + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + //if branch without else + tmp3 = in_value3.read(); + out_valid3.write(true); + wait(); + if (tmp3<8) { + out_tmp3 = 4; + wait(); + } + + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.f new file mode 100644 index 000000000..2d727063d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.f @@ -0,0 +1,4 @@ +balancing/main.cpp +balancing/stimulus.cpp +balancing/display.cpp +balancing/balancing.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.h new file mode 100644 index 000000000..d32742dc6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/balancing.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + balancing.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( balancing ) +{ + SC_HAS_PROCESS( balancing ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal& out_valid1; + sc_signal& out_valid2; + sc_signal& out_valid3; + + // + // Constructor + // + + balancing( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal& OUT_VALID1, + sc_signal& OUT_VALID2, + sc_signal& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.cpp new file mode 100644 index 000000000..f61b61003 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up. + while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.h new file mode 100644 index 000000000..5860d2d9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal& in_valid1; + const sc_signal& in_valid2; + const sc_signal& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal& IN_VALID1, + const sc_signal& IN_VALID2, + const sc_signal& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/golden/balancing.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/golden/balancing.log new file mode 100644 index 000000000..b3ca99775 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/golden/balancing.log @@ -0,0 +1,134 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data2 0000 at 6 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data3 0000 at 10 ns +Display : in_data3 0000 at 11 ns +Display : in_data3 0100 at 12 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data1 0001 at 20 ns +Display : in_data2 0000 at 22 ns +Display : in_data2 0000 at 23 ns +Display : in_data2 0000 at 24 ns +Display : in_data3 0100 at 26 ns +Display : in_data3 0100 at 27 ns +Display : in_data3 0100 at 28 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data2 0001 at 39 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data3 0100 at 43 ns +Display : in_data3 0100 at 44 ns +Display : in_data3 0100 at 45 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data1 0010 at 52 ns +Display : in_data1 0010 at 53 ns +Display : in_data1 0010 at 54 ns +Display : in_data2 1000 at 56 ns +Display : in_data2 1000 at 57 ns +Display : in_data2 1000 at 58 ns +Display : in_data3 0100 at 60 ns +Display : in_data3 0100 at 61 ns +Display : in_data3 0100 at 62 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0011 at 72 ns +Display : in_data2 1011 at 74 ns +Display : in_data2 1011 at 75 ns +Display : in_data2 1011 at 76 ns +Display : in_data3 0100 at 78 ns +Display : in_data3 0100 at 79 ns +Display : in_data3 0100 at 80 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data1 0101 at 84 ns +Display : in_data2 0100 at 86 ns +Display : in_data2 0100 at 87 ns +Display : in_data2 0100 at 88 ns +Display : in_data3 0100 at 90 ns +Display : in_data3 0100 at 91 ns +Display : in_data3 0100 at 92 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0110 at 100 ns +Display : in_data2 0100 at 102 ns +Display : in_data2 0100 at 103 ns +Display : in_data2 0100 at 104 ns +Display : in_data3 0100 at 106 ns +Display : in_data3 0100 at 107 ns +Display : in_data3 0100 at 108 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data1 0111 at 116 ns +Display : in_data2 0100 at 118 ns +Display : in_data2 0100 at 119 ns +Display : in_data2 0100 at 120 ns +Display : in_data3 0100 at 122 ns +Display : in_data3 0100 at 123 ns +Display : in_data3 0100 at 124 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data1 1000 at 132 ns +Display : in_data2 0100 at 134 ns +Display : in_data2 0100 at 135 ns +Display : in_data2 0100 at 136 ns +Display : in_data2 0100 at 137 ns +Display : in_data2 0100 at 138 ns +Display : in_data3 0100 at 140 ns +Display : in_data3 0100 at 141 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1001 at 148 ns +Display : in_data2 0001 at 150 ns +Display : in_data2 0001 at 151 ns +Display : in_data2 0001 at 152 ns +Display : in_data2 0001 at 153 ns +Display : in_data2 0001 at 154 ns +Display : in_data3 0100 at 156 ns +Display : in_data3 0100 at 157 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1010 at 164 ns +Display : in_data2 0001 at 166 ns +Display : in_data2 0001 at 167 ns +Display : in_data2 0001 at 168 ns +Display : in_data2 0001 at 169 ns +Display : in_data2 0001 at 170 ns +Display : in_data3 0100 at 172 ns +Display : in_data3 0100 at 173 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1011 at 180 ns +Display : in_data2 0001 at 182 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data3 0100 at 188 ns +Display : in_data3 0100 at 189 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1100 at 196 ns +Display : in_data2 0001 at 198 ns +Display : in_data2 0001 at 199 ns +Display : in_data3 0100 at 201 ns +Display : in_data3 0100 at 202 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1101 at 212 ns +Display : in_data2 0001 at 214 ns +Display : in_data2 0001 at 215 ns +Display : in_data3 0100 at 217 ns +Display : in_data3 0100 at 218 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1110 at 228 ns +Display : in_data2 0001 at 230 ns +Display : in_data2 0001 at 231 ns +Display : in_data3 0100 at 233 ns +Display : in_data3 0100 at 234 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1111 at 244 ns +Display : in_data2 0001 at 246 ns +Display : in_data2 0001 at 247 ns +Display : in_data3 0100 at 249 ns +Display : in_data3 0100 at 250 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/main.cpp new file mode 100644 index 000000000..01e223141 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "balancing.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal output_valid1; + sc_signal output_valid2; + sc_signal output_valid3; + + + balancing balancing1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.cpp new file mode 100644 index 000000000..53a319114 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.h new file mode 100644 index 000000000..1bc242809 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.cpp new file mode 100644 index 000000000..5ecc74334 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + conditions.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "conditions.h" + +void conditions::entry(){ + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_biguint<4> tmp2a; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + int tmp5; + bool cond_tmp; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_value5.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + // complex condition on variables + if ((tmp1==4) && (tmp2<6) || (tmp5+tmp4.to_int()==6)) { + out_value1.write(4); + } else { + out_value1.write(tmp1); + }; + wait(); + + // complex conditions on signal reads + if ((in_value1.read().to_uint()==4) && (in_value2.read().to_int()<6) || + (in_value4.read().to_int()+in_value5.read()==6)) { + out_value2.write(4); + } else { + out_value2.write(tmp1); + }; + wait(); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + // complex conditions outside the if; does it matter for timing? + cond_tmp = (tmp1==4) && (tmp2<6) || (tmp5+tmp4.to_int()==6); + if (cond_tmp) { + out_value3.write(4); + } else { + out_value3.write(tmp1); + }; + wait(); + + // arithmetic if can only be done when using the same datatypes + // therefor the temporary assignment + tmp2a = 0; + out_value4.write((tmp3.to_int()==4) && (tmp1<6) || + (tmp5+tmp2.to_int()==6)?tmp2a:tmp1); + wait(); + + // arithmetic if can only be done when using the same datatypes + // therefor the temporary assignment + tmp5 = tmp2.to_int(); + out_value5.write((in_value3.read().to_int()==4) && + (in_value1.read().to_int()<6) || + (in_value5.read()+in_value2.read().to_int()==6)? + 0:tmp5); + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.f new file mode 100644 index 000000000..ed7a236e6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.f @@ -0,0 +1,4 @@ +conditions/display.cpp +conditions/stimulus.cpp +conditions/main.cpp +conditions/conditions.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.h new file mode 100644 index 000000000..f2ceadb83 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/conditions.h @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + conditions.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( conditions ) +{ + SC_HAS_PROCESS( conditions ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal& in_value5 ; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal& out_value5; + sc_signal& out_valid; + + // + // Constructor + // + + conditions( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.cpp new file mode 100644 index 000000000..fc643330d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.h new file mode 100644 index 000000000..36001ab41 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/golden/conditions.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/golden/conditions.log new file mode 100644 index 000000000..3432fae28 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/golden/conditions.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 stim5= 0 2 ns +Display : 0000 0000 0000 0000 0 at 8 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 stim5= 1 13 ns +Display : 0001 0001 0001 0001 1 at 19 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 stim5= 2 24 ns +Display : 0010 0010 0010 0010 2 at 30 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 stim5= 3 35 ns +Display : 0100 0100 0100 0000 0 at 41 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 stim5= 4 46 ns +Display : 0100 0100 0100 0000 0 at 52 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 stim5= 5 57 ns +Display : 0101 0101 0101 0101 5 at 63 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 stim5= 6 68 ns +Display : 0110 0110 0110 0110 6 at 74 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 stim5= 7 79 ns +Display : 0111 0111 0111 0111 7 at 85 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 stim5= 8 90 ns +Display : 1000 1000 1000 1000 -8 at 96 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 stim5= 9 101 ns +Display : 1001 1001 1001 1001 -7 at 107 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 stim5= 10 112 ns +Display : 1010 1010 1010 1010 -6 at 118 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 stim5= 11 123 ns +Display : 0100 0100 0100 0000 0 at 129 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 stim5= 12 134 ns +Display : 1100 1100 1100 1100 -4 at 140 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 stim5= 13 145 ns +Display : 1101 1101 1101 1101 -3 at 151 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 stim5= 14 156 ns +Display : 1110 1110 1110 1110 -2 at 162 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 stim5= 15 167 ns +Display : 1111 1111 1111 1111 -1 at 173 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/main.cpp new file mode 100644 index 000000000..bbb3a183b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/main.cpp @@ -0,0 +1,106 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "conditions.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal stim5; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal result5; + sc_signal output_valid; + + + + conditions conditions1 ( + "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid, + result1, + result2, + result3, + result4, + result5, + output_valid + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid + ); + + display display1 ( + "display", + clock, + result1, + result2, + result3, + result4, + result5, + output_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.cpp new file mode 100644 index 000000000..f45313792 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + stim5.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + stim5.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " stim5= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.h new file mode 100644 index 000000000..813c53e1b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& stim5; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& STIM5, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + stim5(STIM5), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp new file mode 100644 index 000000000..145f7181d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.cpp @@ -0,0 +1,119 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" + +void datatypes::entry() { + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + // reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + // checking if condition on a range of bits + if (tmp1.range(1,3) == 4) { + out_value1.write(3); + } else if (tmp1.range(3,1) == 4) { + out_value1.write(2); + } else { + out_value1.write(tmp1); + }; + wait(); + + // checking if condition on bit part + if (tmp2[2]) { + out_value2.write(3); + } else if ((bool)tmp1[1]==true) { + out_value2.write(2); + } else { + out_value2.write(tmp2); + }; + wait(); + + // checking if condition on a range of bits in complex condition + if (tmp3.range(1,3)=="000" || ((tmp3.range(3,1).to_uint()!=4) && + tmp3.range(3,1).to_uint()!=5 && tmp3.range(3,1).to_uint()!=6 && + tmp3.range(3,1).to_uint()!=7)) { + out_value3.write(1); + } else { + out_value3.write(tmp3); + }; + + // checking if condition on a range of bits in complex condition + // on signal reads inside condition + if (in_value4.read().range(1,3)=="000" || + (in_value4.read().range(3,1).to_uint()!=4 && + in_value4.read().range(3,1).to_uint()!=5 && + in_value4.read().range(3,1).to_uint()!=6 && + in_value4.read().range(3,1).to_uint()!=7)) { + out_value4.write(1); + } else { + out_value4.write(tmp4); + }; + + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f new file mode 100644 index 000000000..be086769d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.f @@ -0,0 +1,4 @@ +datatypes/display.cpp +datatypes/main.cpp +datatypes/stimulus.cpp +datatypes/datatypes.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h new file mode 100644 index 000000000..43be41785 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/datatypes.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( datatypes ) +{ + SC_HAS_PROCESS( datatypes ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal& out_valid; + + // + // Constructor + // + + datatypes( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp new file mode 100644 index 000000000..ceaa882b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h new file mode 100644 index 000000000..3ff6b921c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/display.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log new file mode 100644 index 000000000..f183028c3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/golden/datatypes.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +Display : 0000 0000 0001 0001 at 6 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +Display : 0001 0001 0001 0001 at 17 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +Display : 0011 0010 0001 0001 at 28 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +Display : 0011 0010 0001 0001 at 39 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +Display : 0100 0011 0001 0001 at 50 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +Display : 0101 0011 0001 0001 at 61 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +Display : 0110 0011 0001 0001 at 72 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +Display : 0111 0011 0001 0001 at 83 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +Display : 0010 1000 1000 1000 at 94 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +Display : 0010 1001 1001 1001 at 105 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +Display : 1010 0010 1010 1010 at 116 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +Display : 1011 0010 1011 1011 at 127 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +Display : 1100 0011 1100 1100 at 138 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +Display : 1101 0011 1101 1101 at 149 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +Display : 1110 0011 1110 1110 at 160 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +Display : 1111 0011 1111 1111 at 171 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp new file mode 100644 index 000000000..0eee3db1c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "datatypes.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal output_valid; + + + + datatypes datatypes1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + result3, + result4, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + result4, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp new file mode 100644 index 000000000..2e897dacc --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h new file mode 100644 index 000000000..a82afff4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.cpp new file mode 100644 index 000000000..f61b61003 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(i++<20) { + // Reading Data, and Counter i,j is counted up. + while (in_valid1.read()==false) wait(); + while (in_valid1.read()==true) { + cout << "Display : in_data1 " << in_data1.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid2.read()==false) wait(); + while (in_valid2.read()==true) { + cout << "Display : in_data2 " << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + while (in_valid3.read()==false) wait(); + while (in_valid3.read()==true) { + cout << "Display : in_data3 " << in_data3.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + }; + }; + sc_stop(); +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.h new file mode 100644 index 000000000..5860d2d9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal& in_valid1; + const sc_signal& in_valid2; + const sc_signal& in_valid3; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal& IN_VALID1, + const sc_signal& IN_VALID2, + const sc_signal& IN_VALID3 + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_valid1(IN_VALID1), + in_valid2(IN_VALID2), + in_valid3(IN_VALID3) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.cpp new file mode 100644 index 000000000..6735f4d22 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.cpp @@ -0,0 +1,138 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-10-25 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" + +void fsm::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_biguint<4> tmp3; + sc_unsigned out_tmp2(12); + sc_unsigned out_tmp3(12); + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_valid1.write(false); + out_valid2.write(false); + out_valid3.write(false); + out_tmp3 = 0; + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + //easy, just a bunch of different waits + out_valid1.write(true); + wait(); + if (tmp1 == 4) { + wait(); + wait(); + wait(); + wait(); + out_value1.write(3); + wait(); + } else if (tmp1 == 3) { + out_value1.write(2); + wait(); + wait(); + wait(); + } else if (tmp1 == 2) { + out_value1.write(1); + wait(); + wait(); + } else { + out_value1.write(tmp1); + wait(); + }; + out_valid1.write(false); + wait(); + + //the first branch should be pushed out in latency due to long delay + tmp2 = in_value2.read(); + out_valid2.write(true); + wait(); + if (tmp2<4) { + //long operation should extent latency + out_tmp2 = tmp2*tmp2*tmp2; + wait(); + } else if (tmp2<8) { + //short operation should not extent latency + out_tmp2 = 4; + wait(); + } else if (tmp2<12) { + //wait statements should extent latency + out_tmp2 = 1; + wait(); + wait(); + wait(); + } else { + wait(); + }; + wait(); + + out_value2.write( sc_biguint<4>( out_tmp2 ) ); + out_valid2.write(false); + wait(); + + // if branch without else maybe check later + tmp3 = in_value3.read(); + out_valid3.write(true); +// wait(); +// if (tmp3<8) { +// out_tmp3 = 4; +// wait(); +// } + + out_value3.write( sc_biguint<4>( out_tmp3 ) ); + wait(); + out_valid3.write(false); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.f new file mode 100644 index 000000000..67fa931e6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.f @@ -0,0 +1,4 @@ +fsm/main.cpp +fsm/stimulus.cpp +fsm/display.cpp +fsm/fsm.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.h new file mode 100644 index 000000000..9f67e156c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/fsm.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( fsm ) +{ + SC_HAS_PROCESS( fsm ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal& out_valid1; + sc_signal& out_valid2; + sc_signal& out_valid3; + + // + // Constructor + // + + fsm( + sc_module_name NAME, // reference name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal& IN_VALID, + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal& OUT_VALID1, + sc_signal& OUT_VALID2, + sc_signal& OUT_VALID3 + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_valid1 (OUT_VALID1), + out_valid2 (OUT_VALID2), + out_valid3 (OUT_VALID3) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/golden/fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/golden/fsm.log new file mode 100644 index 000000000..03ef8acfe --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/golden/fsm.log @@ -0,0 +1,130 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 at 2 ns +Display : in_data1 0000 at 4 ns +Display : in_data1 0000 at 5 ns +Display : in_data2 0000 at 7 ns +Display : in_data2 0000 at 8 ns +Display : in_data2 0000 at 9 ns +Display : in_data3 0000 at 11 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 at 18 ns +Display : in_data1 0000 at 20 ns +Display : in_data1 0001 at 21 ns +Display : in_data2 0000 at 23 ns +Display : in_data2 0000 at 24 ns +Display : in_data2 0000 at 25 ns +Display : in_data3 0000 at 27 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 at 34 ns +Display : in_data1 0001 at 36 ns +Display : in_data1 0001 at 37 ns +Display : in_data1 0001 at 38 ns +Display : in_data2 0001 at 40 ns +Display : in_data2 0001 at 41 ns +Display : in_data2 0001 at 42 ns +Display : in_data3 0000 at 44 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 at 50 ns +Display : in_data1 0001 at 52 ns +Display : in_data1 0010 at 53 ns +Display : in_data1 0010 at 54 ns +Display : in_data1 0010 at 55 ns +Display : in_data2 1000 at 57 ns +Display : in_data2 1000 at 58 ns +Display : in_data2 1000 at 59 ns +Display : in_data3 0000 at 61 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 at 66 ns +Display : in_data1 0010 at 68 ns +Display : in_data1 0010 at 69 ns +Display : in_data1 0010 at 70 ns +Display : in_data1 0010 at 71 ns +Display : in_data1 0010 at 72 ns +Display : in_data1 0011 at 73 ns +Display : in_data2 1011 at 75 ns +Display : in_data2 1011 at 76 ns +Display : in_data2 1011 at 77 ns +Display : in_data3 0000 at 79 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 at 82 ns +Display : in_data1 0011 at 84 ns +Display : in_data1 0101 at 85 ns +Display : in_data2 0100 at 87 ns +Display : in_data2 0100 at 88 ns +Display : in_data2 0100 at 89 ns +Display : in_data3 0000 at 91 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 at 98 ns +Display : in_data1 0101 at 100 ns +Display : in_data1 0110 at 101 ns +Display : in_data2 0100 at 103 ns +Display : in_data2 0100 at 104 ns +Display : in_data2 0100 at 105 ns +Display : in_data3 0000 at 107 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 at 114 ns +Display : in_data1 0110 at 116 ns +Display : in_data1 0111 at 117 ns +Display : in_data2 0100 at 119 ns +Display : in_data2 0100 at 120 ns +Display : in_data2 0100 at 121 ns +Display : in_data3 0000 at 123 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 at 130 ns +Display : in_data1 0111 at 132 ns +Display : in_data1 1000 at 133 ns +Display : in_data2 0100 at 135 ns +Display : in_data2 0100 at 136 ns +Display : in_data2 0100 at 137 ns +Display : in_data2 0100 at 138 ns +Display : in_data2 0100 at 139 ns +Display : in_data3 0000 at 141 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 at 146 ns +Display : in_data1 1000 at 148 ns +Display : in_data1 1001 at 149 ns +Display : in_data2 0001 at 151 ns +Display : in_data2 0001 at 152 ns +Display : in_data2 0001 at 153 ns +Display : in_data2 0001 at 154 ns +Display : in_data2 0001 at 155 ns +Display : in_data3 0000 at 157 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 at 162 ns +Display : in_data1 1001 at 164 ns +Display : in_data1 1010 at 165 ns +Display : in_data2 0001 at 167 ns +Display : in_data2 0001 at 168 ns +Display : in_data2 0001 at 169 ns +Display : in_data2 0001 at 170 ns +Display : in_data2 0001 at 171 ns +Display : in_data3 0000 at 173 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 at 178 ns +Display : in_data1 1010 at 180 ns +Display : in_data1 1011 at 181 ns +Display : in_data2 0001 at 183 ns +Display : in_data2 0001 at 184 ns +Display : in_data2 0001 at 185 ns +Display : in_data2 0001 at 186 ns +Display : in_data2 0001 at 187 ns +Display : in_data3 0000 at 189 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 at 194 ns +Display : in_data1 1011 at 196 ns +Display : in_data1 1100 at 197 ns +Display : in_data2 0001 at 199 ns +Display : in_data2 0001 at 200 ns +Display : in_data2 0001 at 201 ns +Display : in_data3 0000 at 203 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 at 210 ns +Display : in_data1 1100 at 212 ns +Display : in_data1 1101 at 213 ns +Display : in_data2 0001 at 215 ns +Display : in_data2 0001 at 216 ns +Display : in_data2 0001 at 217 ns +Display : in_data3 0000 at 219 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 at 226 ns +Display : in_data1 1101 at 228 ns +Display : in_data1 1110 at 229 ns +Display : in_data2 0001 at 231 ns +Display : in_data2 0001 at 232 ns +Display : in_data2 0001 at 233 ns +Display : in_data3 0000 at 235 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 at 242 ns +Display : in_data1 1110 at 244 ns +Display : in_data1 1111 at 245 ns +Display : in_data2 0001 at 247 ns +Display : in_data2 0001 at 248 ns +Display : in_data2 0001 at 249 ns +Display : in_data3 0000 at 251 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/main.cpp new file mode 100644 index 000000000..68aa873e9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/main.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal output_valid1; + sc_signal output_valid2; + sc_signal output_valid3; + + + fsm fsm1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + input_valid, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + output_valid1, + output_valid2, + output_valid3 + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.cpp new file mode 100644 index 000000000..53a319114 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " << i + << " at " << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(15); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.h new file mode 100644 index 000000000..1bc242809 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/stimulus.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.cpp new file mode 100644 index 000000000..fc643330d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << in_data3.read() << " " + << in_data4.read() << " " + << in_data5.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.h new file mode 100644 index 000000000..36001ab41 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/display.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal_bool_vector& in_data3; // Input port + const sc_signal_bool_vector& in_data4; // Input port + const sc_signal& in_data5; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal_bool_vector& IN_DATA3, + const sc_signal_bool_vector& IN_DATA4, + const sc_signal& IN_DATA5, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_data3(IN_DATA3), + in_data4(IN_DATA4), + in_data5(IN_DATA5), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/golden/if_test.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/golden/if_test.log new file mode 100644 index 000000000..505f7d8d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/golden/if_test.log @@ -0,0 +1,35 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 stim5= 0 2 ns +Display : 0000 0000 0001 0000 0 at 10 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 stim5= 1 13 ns +Display : 0001 0000 0001 0000 1 at 20 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 stim5= 2 24 ns +Display : 0001 0000 0010 0010 2 at 31 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 stim5= 3 35 ns +Display : 0010 0000 0011 0011 3 at 42 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 stim5= 4 46 ns +Display : 0011 0000 0100 0100 4 at 53 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 stim5= 5 57 ns +Display : 0101 0000 0101 0101 5 at 64 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 stim5= 6 68 ns +Display : 0110 0110 0110 0110 0 at 75 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 stim5= 7 79 ns +Display : 0111 0111 0111 0111 0 at 86 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 stim5= 8 90 ns +Display : 1000 0000 1000 1000 0 at 97 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 stim5= 9 101 ns +Display : 1001 0000 1001 1001 0 at 108 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 stim5= 10 112 ns +Display : 1010 0000 1010 1010 0 at 119 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 stim5= 11 123 ns +Display : 1011 0000 1011 1011 0 at 130 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 stim5= 12 134 ns +Display : 1100 0000 1100 1100 0 at 141 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 stim5= 13 145 ns +Display : 1101 0000 1101 1101 0 at 152 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 stim5= 14 156 ns +Display : 1110 0000 1110 1110 0 at 163 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 stim5= 15 167 ns +Display : 1111 0000 1111 1111 0 at 174 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.cpp new file mode 100644 index 000000000..c728895ed --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.cpp @@ -0,0 +1,118 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + if_test.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "if_test.h" + +void if_test::entry(){ + + sc_biguint<4> tmp1; + sc_bigint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + int tmp5; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_value3.write(0); + out_value4.write(0); + out_value5.write(0); + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + tmp5 = in_value5.read(); + + //execution + if (tmp1 == 4) { + out_value1.write(3); + } else if (tmp1 == 3) { + out_value1.write(2); + } else if (tmp1 == 2) { + out_value1.write(1); + } else { + out_value1.write(tmp1); + }; + wait(); + + if (tmp2 < 6 ) { + out_value2.write(0); + wait(); + } else { + out_value2.write(tmp2); + wait(); + }; + + if (tmp3 == "0000" ) { + out_value3.write(1); + wait(); + wait(); + } else { + out_value3.write(tmp3); + wait(); + }; + + if (tmp4 != "0001" ) { + out_value4.write(tmp4); + }; + wait(); + + out_value5.write((tmp5>=6)?0:tmp5); + wait(); + + out_valid.write(true); + wait(); + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.f new file mode 100644 index 000000000..3d00cc5c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.f @@ -0,0 +1,4 @@ +if_test/if_test.cpp +if_test/display.cpp +if_test/main.cpp +if_test/stimulus.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.h new file mode 100644 index 000000000..d1ab3341a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/if_test.h @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + if_test.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( if_test ) +{ + SC_HAS_PROCESS( if_test ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; + const sc_signal_bool_vector& in_value2; + const sc_signal_bool_vector& in_value3; + const sc_signal_bool_vector& in_value4; + const sc_signal& in_value5 ; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal_bool_vector& out_value3; + sc_signal_bool_vector& out_value4; + sc_signal& out_value5; + sc_signal& out_valid; + + // + // Constructor + // + + if_test( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALUE5, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal_bool_vector& OUT_VALUE3, + sc_signal_bool_vector& OUT_VALUE4, + sc_signal& OUT_VALUE5, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_value5 (IN_VALUE5), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_value3 (OUT_VALUE3), + out_value4 (OUT_VALUE4), + out_value5 (OUT_VALUE5), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + + void entry (); + +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/main.cpp new file mode 100644 index 000000000..bfad98b86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/main.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "if_test.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal stim5; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal_bool_vector result3; + sc_signal_bool_vector result4; + sc_signal result5; + sc_signal output_valid; + + + + if_test if_test1 ( "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid, + result1, + result2, + result3, + result4, + result5, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + stim5, + input_valid); + + display display1 ("display", + clock, + result1, + result2, + result3, + result4, + result5, + output_valid); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.cpp new file mode 100644 index 000000000..f45313792 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + stim5.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + stim5.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " stim5= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.h new file mode 100644 index 000000000..813c53e1b --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/stimulus.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& stim5; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& STIM5, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + stim5(STIM5), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/common.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/common.h new file mode 100644 index 000000000..2a4edbad5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.cpp new file mode 100644 index 000000000..b0ac27b0c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + int i = 0; + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (in_valid.read()==false) wait(); + cout << "Display : " << in_data1.read() << " " + << in_data2.read() << " " + << " at " << sc_time_stamp() << endl; + i++; + if(i == 24) sc_stop(); + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.h new file mode 100644 index 000000000..ea15269eb --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/display.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in_data1; // Input port + const sc_signal_bool_vector& in_data2; // Input port + const sc_signal& in_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_DATA1, + const sc_signal_bool_vector& IN_DATA2, + const sc_signal& IN_VALID + ) + : + in_data1(IN_DATA1), + in_data2(IN_DATA2), + in_valid(IN_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/golden/inlining.log b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/golden/inlining.log new file mode 100644 index 000000000..b5ed181e7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/golden/inlining.log @@ -0,0 +1,67 @@ +SystemC Simulation +Stimuli: stim1= 0 stim2= 0 stim3= 0 stim4= 0 2 ns +tmp1 my print 1 +tmp2 my print 0 +Display : 0001 0000 at 5 ns +Stimuli: stim1= 1 stim2= 1 stim3= 1 stim4= 1 13 ns +tmp1 my print 2 +tmp2 my print 1 +Display : 0010 0001 at 16 ns +Stimuli: stim1= 2 stim2= 2 stim3= 2 stim4= 2 24 ns +tmp1 my print 3 +tmp2 my print 2 +Display : 0011 0010 at 27 ns +Stimuli: stim1= 3 stim2= 3 stim3= 3 stim4= 3 35 ns +tmp1 my print 4 +tmp2 my print 3 +Display : 0100 0011 at 38 ns +Stimuli: stim1= 4 stim2= 4 stim3= 4 stim4= 4 46 ns +tmp1 my print 5 +tmp2 my print 4 +Display : 0101 0100 at 49 ns +Stimuli: stim1= 5 stim2= 5 stim3= 5 stim4= 5 57 ns +tmp1 my print 6 +tmp2 my print 5 +Display : 0110 0101 at 60 ns +Stimuli: stim1= 6 stim2= 6 stim3= 6 stim4= 6 68 ns +tmp1 my print 7 +tmp2 my print 6 +Display : 0111 0110 at 71 ns +Stimuli: stim1= 7 stim2= 7 stim3= 7 stim4= 7 79 ns +tmp1 my print 8 +tmp2 my print 7 +Display : 1000 0111 at 82 ns +Stimuli: stim1= 8 stim2= 8 stim3= 8 stim4= 8 90 ns +tmp1 my print 9 +tmp2 my print 8 +Display : 1001 1000 at 93 ns +Stimuli: stim1= 9 stim2= 9 stim3= 9 stim4= 9 101 ns +tmp1 my print 10 +tmp2 my print 9 +Display : 1010 1001 at 104 ns +Stimuli: stim1= 10 stim2= 10 stim3= 10 stim4= 10 112 ns +tmp1 my print 11 +tmp2 my print 10 +Display : 1011 1010 at 115 ns +Stimuli: stim1= 11 stim2= 11 stim3= 11 stim4= 11 123 ns +tmp1 my print 12 +tmp2 my print 11 +Display : 1100 1011 at 126 ns +Stimuli: stim1= 12 stim2= 12 stim3= 12 stim4= 12 134 ns +tmp1 my print 13 +tmp2 my print 12 +Display : 1101 1100 at 137 ns +Stimuli: stim1= 13 stim2= 13 stim3= 13 stim4= 13 145 ns +tmp1 my print 14 +tmp2 my print 13 +Display : 1110 1101 at 148 ns +Stimuli: stim1= 14 stim2= 14 stim3= 14 stim4= 14 156 ns +tmp1 my print 15 +tmp2 my print 14 +Display : 1111 1110 at 159 ns +Stimuli: stim1= 15 stim2= 15 stim3= 15 stim4= 15 167 ns +tmp1 my print 0 +tmp2 my print 15 +Display : 1111 1111 at 170 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.cpp new file mode 100644 index 000000000..232c6a8e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.cpp @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" + +// list of defines +// #define MAXI(a,b) ((a)>(b)?(a):(b)) +#define MAXI(a,b) ( (a) > (b) ? sc_biguint<4>( a ) : sc_biguint<4>( b ) ) +#define clockedge wait() +#define my_print(a) cout << #a << " my print " << a << endl +#define my_if(a, b, c) if (a < 6 ) { \ + b = 0; \ + } else { \ + b = c; \ + }; + +void inlining::entry(){ + + sc_biguint<4> tmp1; + sc_biguint<4> tmp2; + sc_lv<4> tmp3; + sc_bv<4> tmp4; + + // reset_loop + if (reset.read() == true) { + out_value1.write(0); + out_value2.write(0); + out_valid.write(false); + clockedge; + } else clockedge; + + // + // main loop + // + while(1) { + do { wait(); } while (in_valid == false); + + //reading inputs + tmp1 = in_value1.read(); + tmp2 = in_value2.read(); + tmp3 = in_value3.read(); + tmp4 = in_value4.read(); + + //execution + ++tmp1; + out_value1.write(MAXI(tmp1, tmp2)); + my_print(tmp1); + my_print(tmp2); + clockedge; + + my_if(tmp2, tmp3, tmp4); + out_value2.write(tmp4); + out_valid.write(true); + clockedge; + out_valid.write(false); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.f b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.f new file mode 100644 index 000000000..4c51c0531 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.f @@ -0,0 +1,4 @@ +inlining/main.cpp +inlining/stimulus.cpp +inlining/display.cpp +inlining/inlining.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.h new file mode 100644 index 000000000..457fd7048 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/inlining.h @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + inlining.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( inlining ) +{ + SC_HAS_PROCESS( inlining ); + + sc_in_clk clk; + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1 ; + const sc_signal_bool_vector& in_value2 ; + const sc_signal_bool_vector& in_value3 ; + const sc_signal_bool_vector& in_value4 ; + const sc_signal& in_valid; + sc_signal_bool_vector& out_value1; + sc_signal_bool_vector& out_value2; + sc_signal& out_valid; + + // + // Constructor + // + + inlining( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal_bool_vector& IN_VALUE3, + const sc_signal_bool_vector& IN_VALUE4, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALID // Input port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_value3 (IN_VALUE3), + in_value4 (IN_VALUE4), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + // + void entry (); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/main.cpp new file mode 100644 index 000000000..89a428293 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/main.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "inlining.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal_bool_vector stim1; + sc_signal_bool_vector stim2; + sc_signal_bool_vector stim3; + sc_signal_bool_vector stim4; + sc_signal input_valid; + sc_signal_bool_vector result1; + sc_signal_bool_vector result2; + sc_signal output_valid; + + + + inlining inlining1 ( + "process_body", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid, + result1, + result2, + output_valid + ); + + stimulus stimulus1 ("stimulus", + clock, + reset, + stim1, + stim2, + stim3, + stim4, + input_valid + ); + + display display1 ("display", + clock, + result1, + result2, + output_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.cpp new file mode 100644 index 000000000..2e897dacc --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + +int i; + + // sending some reset values + reset.write(true); + stim1.write(0); + stim2.write(0); + stim3.write(0); + stim4.write(0); + wait(); + reset.write(false); + wait(); + for (i=0; i<= 15; i++) { + stim1.write(i); + stim2.write(i); + stim3.write(i); + stim4.write(i); + input_valid.write(true); + cout << "Stimuli: stim1= " << i << " stim2= " << i << " stim3= " + << i << " stim4= " << i << " " + << sc_time_stamp() << endl; + wait(); + input_valid.write(false); + wait(10); + } + + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.h new file mode 100644 index 000000000..a82afff4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/stimulus.h @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "common.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal_bool_vector& stim1; + sc_signal_bool_vector& stim2; + sc_signal_bool_vector& stim3; + sc_signal_bool_vector& stim4; + sc_signal& input_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal_bool_vector& STIM1, + sc_signal_bool_vector& STIM2, + sc_signal_bool_vector& STIM3, + sc_signal_bool_vector& STIM4, + sc_signal& INPUT_VALID + ) + : + reset(RESET), + stim1(STIM1), + stim2(STIM2), + stim3(STIM3), + stim4(STIM4), + input_valid(INPUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.cpp new file mode 100644 index 000000000..336edf69c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.h new file mode 100644 index 000000000..e858eb226 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.cpp new file mode 100644 index 000000000..668c4ee95 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_datatypes.h" + +#define max 10 + +void for_datatypes::entry() +{ + + int i; + sc_signed counter_signed(8); + sc_unsigned counter_unsigned(8); + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + //read inputs + while (in_valid.read()==false) wait(); + + //execution of for loop with integer counter + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + result.write(in_value.read()); + wait(); + }; + out_valid.write(false); + wait(4); + + //execution of for loop with signed counter + out_valid.write(true); + wait(); + for (counter_signed=1; counter_signed.to_int()<=max; counter_signed++) { + result.write(in_value.read()); + wait(); + }; + out_valid.write(false); + wait(4); + + //execution of for loop with unsinged counter + out_valid.write(true); + wait(); + for (counter_unsigned=1; counter_unsigned.to_uint()<=max; counter_unsigned++) { + result.write(in_value.read()); + wait(); + }; + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.f new file mode 100644 index 000000000..127102844 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.f @@ -0,0 +1,4 @@ +for_datatypes/stimulus.cpp +for_datatypes/main.cpp +for_datatypes/display.cpp +for_datatypes/for_datatypes.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.h new file mode 100644 index 000000000..dcacddfff --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/for_datatypes.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( for_datatypes ) +{ + SC_HAS_PROCESS( for_datatypes ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + for_datatypes ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/golden/for_datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/golden/for_datatypes.log new file mode 100644 index 000000000..4fb0720f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/golden/for_datatypes.log @@ -0,0 +1,201 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 0 at 6 ns +Stimuli1 : in_valid = true in_value 1 at 7 ns +Stimuli1 : in_valid = true in_value 2 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 3 at 9 ns +Display : 1 at 9 ns +Stimuli1 : in_valid = true in_value 4 at 10 ns +Display : 2 at 10 ns +Stimuli1 : in_valid = true in_value 5 at 11 ns +Display : 3 at 11 ns +Stimuli1 : in_valid = true in_value 6 at 12 ns +Display : 4 at 12 ns +Stimuli1 : in_valid = true in_value 7 at 13 ns +Display : 5 at 13 ns +Stimuli1 : in_valid = true in_value 8 at 14 ns +Display : 6 at 14 ns +Stimuli1 : in_valid = true in_value 9 at 15 ns +Display : 7 at 15 ns +Stimuli1 : in_valid = true in_value 10 at 16 ns +Display : 8 at 16 ns +Display : 9 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 0 at 21 ns +Stimuli2 : in_valid = true in_value 1 at 22 ns +Stimuli2 : in_valid = true in_value 2 at 23 ns +Display : 10 at 23 ns +Stimuli2 : in_valid = true in_value 3 at 24 ns +Display : 1 at 24 ns +Stimuli2 : in_valid = true in_value 4 at 25 ns +Display : 2 at 25 ns +Stimuli2 : in_valid = true in_value 5 at 26 ns +Display : 3 at 26 ns +Stimuli2 : in_valid = true in_value 6 at 27 ns +Display : 4 at 27 ns +Stimuli2 : in_valid = true in_value 7 at 28 ns +Display : 5 at 28 ns +Stimuli2 : in_valid = true in_value 8 at 29 ns +Display : 6 at 29 ns +Stimuli2 : in_valid = true in_value 9 at 30 ns +Display : 7 at 30 ns +Stimuli2 : in_valid = true in_value 10 at 31 ns +Display : 8 at 31 ns +Display : 9 at 32 ns +Display : 10 at 33 ns +Stimuli3 : in_valid = true in_value 0 at 36 ns +Stimuli3 : in_valid = true in_value 1 at 37 ns +Stimuli3 : in_valid = true in_value 2 at 38 ns +Display : 10 at 38 ns +Stimuli3 : in_valid = true in_value 3 at 39 ns +Display : 1 at 39 ns +Stimuli3 : in_valid = true in_value 4 at 40 ns +Display : 2 at 40 ns +Stimuli3 : in_valid = true in_value 5 at 41 ns +Display : 3 at 41 ns +Stimuli3 : in_valid = true in_value 6 at 42 ns +Display : 4 at 42 ns +Stimuli3 : in_valid = true in_value 7 at 43 ns +Display : 5 at 43 ns +Stimuli3 : in_valid = true in_value 8 at 44 ns +Display : 6 at 44 ns +Stimuli3 : in_valid = true in_value 9 at 45 ns +Display : 7 at 45 ns +Stimuli3 : in_valid = true in_value 10 at 46 ns +Display : 8 at 46 ns +Display : 9 at 47 ns +Display : 10 at 48 ns +Stimuli1 : in_valid = true in_value 0 at 57 ns +Stimuli1 : in_valid = true in_value 1 at 58 ns +Stimuli1 : in_valid = true in_value 2 at 59 ns +Display : 10 at 59 ns +Stimuli1 : in_valid = true in_value 3 at 60 ns +Display : 1 at 60 ns +Stimuli1 : in_valid = true in_value 4 at 61 ns +Display : 2 at 61 ns +Stimuli1 : in_valid = true in_value 5 at 62 ns +Display : 3 at 62 ns +Stimuli1 : in_valid = true in_value 6 at 63 ns +Display : 4 at 63 ns +Stimuli1 : in_valid = true in_value 7 at 64 ns +Display : 5 at 64 ns +Stimuli1 : in_valid = true in_value 8 at 65 ns +Display : 6 at 65 ns +Stimuli1 : in_valid = true in_value 9 at 66 ns +Display : 7 at 66 ns +Stimuli1 : in_valid = true in_value 10 at 67 ns +Display : 8 at 67 ns +Display : 9 at 68 ns +Display : 10 at 69 ns +Stimuli2 : in_valid = true in_value 0 at 72 ns +Stimuli2 : in_valid = true in_value 1 at 73 ns +Stimuli2 : in_valid = true in_value 2 at 74 ns +Display : 10 at 74 ns +Stimuli2 : in_valid = true in_value 3 at 75 ns +Display : 1 at 75 ns +Stimuli2 : in_valid = true in_value 4 at 76 ns +Display : 2 at 76 ns +Stimuli2 : in_valid = true in_value 5 at 77 ns +Display : 3 at 77 ns +Stimuli2 : in_valid = true in_value 6 at 78 ns +Display : 4 at 78 ns +Stimuli2 : in_valid = true in_value 7 at 79 ns +Display : 5 at 79 ns +Stimuli2 : in_valid = true in_value 8 at 80 ns +Display : 6 at 80 ns +Stimuli2 : in_valid = true in_value 9 at 81 ns +Display : 7 at 81 ns +Stimuli2 : in_valid = true in_value 10 at 82 ns +Display : 8 at 82 ns +Display : 9 at 83 ns +Display : 10 at 84 ns +Stimuli3 : in_valid = true in_value 0 at 87 ns +Stimuli3 : in_valid = true in_value 1 at 88 ns +Stimuli3 : in_valid = true in_value 2 at 89 ns +Display : 10 at 89 ns +Stimuli3 : in_valid = true in_value 3 at 90 ns +Display : 1 at 90 ns +Stimuli3 : in_valid = true in_value 4 at 91 ns +Display : 2 at 91 ns +Stimuli3 : in_valid = true in_value 5 at 92 ns +Display : 3 at 92 ns +Stimuli3 : in_valid = true in_value 6 at 93 ns +Display : 4 at 93 ns +Stimuli3 : in_valid = true in_value 7 at 94 ns +Display : 5 at 94 ns +Stimuli3 : in_valid = true in_value 8 at 95 ns +Display : 6 at 95 ns +Stimuli3 : in_valid = true in_value 9 at 96 ns +Display : 7 at 96 ns +Stimuli3 : in_valid = true in_value 10 at 97 ns +Display : 8 at 97 ns +Display : 9 at 98 ns +Display : 10 at 99 ns +Stimuli1 : in_valid = true in_value 0 at 108 ns +Stimuli1 : in_valid = true in_value 1 at 109 ns +Stimuli1 : in_valid = true in_value 2 at 110 ns +Display : 10 at 110 ns +Stimuli1 : in_valid = true in_value 3 at 111 ns +Display : 1 at 111 ns +Stimuli1 : in_valid = true in_value 4 at 112 ns +Display : 2 at 112 ns +Stimuli1 : in_valid = true in_value 5 at 113 ns +Display : 3 at 113 ns +Stimuli1 : in_valid = true in_value 6 at 114 ns +Display : 4 at 114 ns +Stimuli1 : in_valid = true in_value 7 at 115 ns +Display : 5 at 115 ns +Stimuli1 : in_valid = true in_value 8 at 116 ns +Display : 6 at 116 ns +Stimuli1 : in_valid = true in_value 9 at 117 ns +Display : 7 at 117 ns +Stimuli1 : in_valid = true in_value 10 at 118 ns +Display : 8 at 118 ns +Display : 9 at 119 ns +Display : 10 at 120 ns +Stimuli2 : in_valid = true in_value 0 at 123 ns +Stimuli2 : in_valid = true in_value 1 at 124 ns +Stimuli2 : in_valid = true in_value 2 at 125 ns +Display : 10 at 125 ns +Stimuli2 : in_valid = true in_value 3 at 126 ns +Display : 1 at 126 ns +Stimuli2 : in_valid = true in_value 4 at 127 ns +Display : 2 at 127 ns +Stimuli2 : in_valid = true in_value 5 at 128 ns +Display : 3 at 128 ns +Stimuli2 : in_valid = true in_value 6 at 129 ns +Display : 4 at 129 ns +Stimuli2 : in_valid = true in_value 7 at 130 ns +Display : 5 at 130 ns +Stimuli2 : in_valid = true in_value 8 at 131 ns +Display : 6 at 131 ns +Stimuli2 : in_valid = true in_value 9 at 132 ns +Display : 7 at 132 ns +Stimuli2 : in_valid = true in_value 10 at 133 ns +Display : 8 at 133 ns +Display : 9 at 134 ns +Display : 10 at 135 ns +Stimuli3 : in_valid = true in_value 0 at 138 ns +Stimuli3 : in_valid = true in_value 1 at 139 ns +Stimuli3 : in_valid = true in_value 2 at 140 ns +Display : 10 at 140 ns +Stimuli3 : in_valid = true in_value 3 at 141 ns +Display : 1 at 141 ns +Stimuli3 : in_valid = true in_value 4 at 142 ns +Display : 2 at 142 ns +Stimuli3 : in_valid = true in_value 5 at 143 ns +Display : 3 at 143 ns +Stimuli3 : in_valid = true in_value 6 at 144 ns +Display : 4 at 144 ns +Stimuli3 : in_valid = true in_value 7 at 145 ns +Display : 5 at 145 ns +Stimuli3 : in_valid = true in_value 8 at 146 ns +Display : 6 at 146 ns +Stimuli3 : in_valid = true in_value 9 at 147 ns +Display : 7 at 147 ns +Stimuli3 : in_valid = true in_value 10 at 148 ns +Display : 8 at 148 ns +Display : 9 at 149 ns +Display : 10 at 150 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/main.cpp new file mode 100644 index 000000000..a306ccd47 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/main.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_datatypes.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_valid; + sc_signal result; + sc_signal in_value; + + + for_datatypes for_datatypes1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.cpp new file mode 100644 index 000000000..af5159663 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.h new file mode 100644 index 000000000..e20114c36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/stimulus.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.cpp new file mode 100644 index 000000000..05c349065 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.h new file mode 100644 index 000000000..e858eb226 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.cpp new file mode 100644 index 000000000..db3ac2bb9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.cpp @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_exit.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_exit.h" + +#define max 10 + +void for_exit::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop with continues + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (inp_tmp<5 && i!=1) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + }; + }; + out_valid.write(false); + wait(5); + + // for loop with break + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + } + }; + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.f new file mode 100644 index 000000000..b1509dea5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.f @@ -0,0 +1,4 @@ +for_exit/main.cpp +for_exit/stimulus.cpp +for_exit/display.cpp +for_exit/for_exit.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.h new file mode 100644 index 000000000..8d2de9783 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/for_exit.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_exit.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( for_exit ) +{ + SC_HAS_PROCESS( for_exit ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + for_exit( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/golden/for_exit.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/golden/for_exit.log new file mode 100644 index 000000000..a7037c4e5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/golden/for_exit.log @@ -0,0 +1,123 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 0 at 6 ns +Stimuli1 : in_valid = true in_value 1 at 7 ns +Stimuli1 : in_valid = true in_value 2 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 3 at 9 ns +Display : 1 at 9 ns +Stimuli1 : in_valid = true in_value 4 at 10 ns +Display : 1 at 10 ns +Stimuli1 : in_valid = true in_value 5 at 11 ns +Display : 1 at 11 ns +Stimuli1 : in_valid = true in_value 6 at 12 ns +Display : 1 at 12 ns +Stimuli1 : in_valid = true in_value 7 at 13 ns +Display : 5 at 13 ns +Stimuli1 : in_valid = true in_value 8 at 14 ns +Display : 6 at 14 ns +Stimuli1 : in_valid = true in_value 9 at 15 ns +Display : 7 at 15 ns +Stimuli1 : in_valid = true in_value 10 at 16 ns +Display : 7 at 16 ns +Display : 9 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 0 at 21 ns +Stimuli2 : in_valid = true in_value 1 at 22 ns +Stimuli2 : in_valid = true in_value 2 at 23 ns +Stimuli2 : in_valid = true in_value 3 at 24 ns +Display : 10 at 24 ns +Stimuli2 : in_valid = true in_value 4 at 25 ns +Display : 2 at 25 ns +Stimuli2 : in_valid = true in_value 5 at 26 ns +Display : 3 at 26 ns +Stimuli2 : in_valid = true in_value 6 at 27 ns +Display : 4 at 27 ns +Stimuli2 : in_valid = true in_value 7 at 28 ns +Display : 5 at 28 ns +Stimuli2 : in_valid = true in_value 8 at 29 ns +Display : 6 at 29 ns +Stimuli2 : in_valid = true in_value 9 at 30 ns +Display : 6 at 30 ns +Stimuli2 : in_valid = true in_value 10 at 31 ns +Stimuli1 : in_valid = true in_value 0 at 42 ns +Stimuli1 : in_valid = true in_value 1 at 43 ns +Stimuli1 : in_valid = true in_value 2 at 44 ns +Display : 6 at 44 ns +Stimuli1 : in_valid = true in_value 3 at 45 ns +Display : 1 at 45 ns +Stimuli1 : in_valid = true in_value 4 at 46 ns +Display : 1 at 46 ns +Stimuli1 : in_valid = true in_value 5 at 47 ns +Display : 1 at 47 ns +Stimuli1 : in_valid = true in_value 6 at 48 ns +Display : 1 at 48 ns +Stimuli1 : in_valid = true in_value 7 at 49 ns +Display : 5 at 49 ns +Stimuli1 : in_valid = true in_value 8 at 50 ns +Display : 6 at 50 ns +Stimuli1 : in_valid = true in_value 9 at 51 ns +Display : 7 at 51 ns +Stimuli1 : in_valid = true in_value 10 at 52 ns +Display : 7 at 52 ns +Display : 9 at 53 ns +Display : 10 at 54 ns +Stimuli2 : in_valid = true in_value 0 at 57 ns +Stimuli2 : in_valid = true in_value 1 at 58 ns +Stimuli2 : in_valid = true in_value 2 at 59 ns +Stimuli2 : in_valid = true in_value 3 at 60 ns +Display : 10 at 60 ns +Stimuli2 : in_valid = true in_value 4 at 61 ns +Display : 2 at 61 ns +Stimuli2 : in_valid = true in_value 5 at 62 ns +Display : 3 at 62 ns +Stimuli2 : in_valid = true in_value 6 at 63 ns +Display : 4 at 63 ns +Stimuli2 : in_valid = true in_value 7 at 64 ns +Display : 5 at 64 ns +Stimuli2 : in_valid = true in_value 8 at 65 ns +Display : 6 at 65 ns +Stimuli2 : in_valid = true in_value 9 at 66 ns +Display : 6 at 66 ns +Stimuli2 : in_valid = true in_value 10 at 67 ns +Stimuli1 : in_valid = true in_value 0 at 78 ns +Stimuli1 : in_valid = true in_value 1 at 79 ns +Stimuli1 : in_valid = true in_value 2 at 80 ns +Display : 6 at 80 ns +Stimuli1 : in_valid = true in_value 3 at 81 ns +Display : 1 at 81 ns +Stimuli1 : in_valid = true in_value 4 at 82 ns +Display : 1 at 82 ns +Stimuli1 : in_valid = true in_value 5 at 83 ns +Display : 1 at 83 ns +Stimuli1 : in_valid = true in_value 6 at 84 ns +Display : 1 at 84 ns +Stimuli1 : in_valid = true in_value 7 at 85 ns +Display : 5 at 85 ns +Stimuli1 : in_valid = true in_value 8 at 86 ns +Display : 6 at 86 ns +Stimuli1 : in_valid = true in_value 9 at 87 ns +Display : 7 at 87 ns +Stimuli1 : in_valid = true in_value 10 at 88 ns +Display : 7 at 88 ns +Display : 9 at 89 ns +Display : 10 at 90 ns +Stimuli2 : in_valid = true in_value 0 at 93 ns +Stimuli2 : in_valid = true in_value 1 at 94 ns +Stimuli2 : in_valid = true in_value 2 at 95 ns +Stimuli2 : in_valid = true in_value 3 at 96 ns +Display : 10 at 96 ns +Stimuli2 : in_valid = true in_value 4 at 97 ns +Display : 2 at 97 ns +Stimuli2 : in_valid = true in_value 5 at 98 ns +Display : 3 at 98 ns +Stimuli2 : in_valid = true in_value 6 at 99 ns +Display : 4 at 99 ns +Stimuli2 : in_valid = true in_value 7 at 100 ns +Display : 5 at 100 ns +Stimuli2 : in_valid = true in_value 8 at 101 ns +Display : 6 at 101 ns +Stimuli2 : in_valid = true in_value 9 at 102 ns +Display : 6 at 102 ns +Stimuli2 : in_valid = true in_value 10 at 103 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/main.cpp new file mode 100644 index 000000000..b560aab5e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/main.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_exit.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_value; + sc_signal in_valid; + sc_signal result; + + + for_exit for_exit1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.cpp new file mode 100644 index 000000000..d45342c41 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.h new file mode 100644 index 000000000..d8bccb0f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/stimulus.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.cpp new file mode 100644 index 000000000..05c349065 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.h new file mode 100644 index 000000000..b50f526c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.cpp new file mode 100644 index 000000000..51836042c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_fsm.h" + +#define max 10 + +void for_fsm::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + wait(); + }; + out_valid.write(false); + wait(5); + + // execution of for loop with continues + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (inp_tmp<5 && i!=1) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + }; + }; + out_valid.write(false); + wait(5); + + // for loop with break + out_valid.write(true); + wait(); + for (i=1; i<=max; i++) { + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + }; + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.f new file mode 100644 index 000000000..d1a3ca297 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.f @@ -0,0 +1,4 @@ +for_fsm/main.cpp +for_fsm/stimulus.cpp +for_fsm/display.cpp +for_fsm/for_fsm.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.h new file mode 100644 index 000000000..790e686eb --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/for_fsm.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( for_fsm ) +{ + SC_HAS_PROCESS( for_fsm ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + for_fsm( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/golden/for_fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/golden/for_fsm.log new file mode 100644 index 000000000..3e6064ab7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/golden/for_fsm.log @@ -0,0 +1,180 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 1 at 6 ns +Stimuli1 : in_valid = true in_value 2 at 7 ns +Stimuli1 : in_valid = true in_value 3 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 4 at 9 ns +Display : 2 at 9 ns +Stimuli1 : in_valid = true in_value 5 at 10 ns +Display : 3 at 10 ns +Stimuli1 : in_valid = true in_value 6 at 11 ns +Display : 4 at 11 ns +Stimuli1 : in_valid = true in_value 7 at 12 ns +Display : 5 at 12 ns +Stimuli1 : in_valid = true in_value 8 at 13 ns +Display : 6 at 13 ns +Stimuli1 : in_valid = true in_value 9 at 14 ns +Display : 7 at 14 ns +Stimuli1 : in_valid = true in_value 10 at 15 ns +Display : 8 at 15 ns +Display : 9 at 16 ns +Display : 10 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 1 at 21 ns +Stimuli2 : in_valid = true in_value 2 at 22 ns +Stimuli2 : in_valid = true in_value 3 at 23 ns +Stimuli2 : in_valid = true in_value 4 at 24 ns +Display : 10 at 24 ns +Stimuli2 : in_valid = true in_value 5 at 25 ns +Display : 3 at 25 ns +Stimuli2 : in_valid = true in_value 6 at 26 ns +Display : 3 at 26 ns +Stimuli2 : in_valid = true in_value 7 at 27 ns +Display : 5 at 27 ns +Stimuli2 : in_valid = true in_value 8 at 28 ns +Display : 6 at 28 ns +Stimuli2 : in_valid = true in_value 9 at 29 ns +Display : 7 at 29 ns +Stimuli2 : in_valid = true in_value 10 at 30 ns +Display : 8 at 30 ns +Display : 9 at 31 ns +Display : 9 at 32 ns +Display : 10 at 33 ns +Display : 10 at 34 ns +Stimuli3 : in_valid = true in_value 0 at 36 ns +Stimuli3 : in_valid = true in_value 1 at 37 ns +Stimuli3 : in_valid = true in_value 2 at 38 ns +Stimuli3 : in_valid = true in_value 3 at 39 ns +Stimuli3 : in_valid = true in_value 4 at 40 ns +Display : 10 at 40 ns +Stimuli3 : in_valid = true in_value 5 at 41 ns +Display : 3 at 41 ns +Stimuli3 : in_valid = true in_value 6 at 42 ns +Display : 4 at 42 ns +Stimuli3 : in_valid = true in_value 7 at 43 ns +Display : 5 at 43 ns +Stimuli3 : in_valid = true in_value 8 at 44 ns +Display : 6 at 44 ns +Stimuli3 : in_valid = true in_value 9 at 45 ns +Display : 6 at 45 ns +Stimuli3 : in_valid = true in_value 10 at 46 ns +Stimuli1 : in_valid = true in_value 1 at 57 ns +Stimuli1 : in_valid = true in_value 2 at 58 ns +Stimuli1 : in_valid = true in_value 3 at 59 ns +Display : 6 at 59 ns +Stimuli1 : in_valid = true in_value 4 at 60 ns +Display : 2 at 60 ns +Stimuli1 : in_valid = true in_value 5 at 61 ns +Display : 3 at 61 ns +Stimuli1 : in_valid = true in_value 6 at 62 ns +Display : 4 at 62 ns +Stimuli1 : in_valid = true in_value 7 at 63 ns +Display : 5 at 63 ns +Stimuli1 : in_valid = true in_value 8 at 64 ns +Display : 6 at 64 ns +Stimuli1 : in_valid = true in_value 9 at 65 ns +Display : 7 at 65 ns +Stimuli1 : in_valid = true in_value 10 at 66 ns +Display : 8 at 66 ns +Display : 9 at 67 ns +Display : 10 at 68 ns +Display : 10 at 69 ns +Stimuli2 : in_valid = true in_value 1 at 72 ns +Stimuli2 : in_valid = true in_value 2 at 73 ns +Stimuli2 : in_valid = true in_value 3 at 74 ns +Stimuli2 : in_valid = true in_value 4 at 75 ns +Display : 10 at 75 ns +Stimuli2 : in_valid = true in_value 5 at 76 ns +Display : 3 at 76 ns +Stimuli2 : in_valid = true in_value 6 at 77 ns +Display : 3 at 77 ns +Stimuli2 : in_valid = true in_value 7 at 78 ns +Display : 5 at 78 ns +Stimuli2 : in_valid = true in_value 8 at 79 ns +Display : 6 at 79 ns +Stimuli2 : in_valid = true in_value 9 at 80 ns +Display : 7 at 80 ns +Stimuli2 : in_valid = true in_value 10 at 81 ns +Display : 8 at 81 ns +Display : 9 at 82 ns +Display : 9 at 83 ns +Display : 10 at 84 ns +Display : 10 at 85 ns +Stimuli3 : in_valid = true in_value 0 at 87 ns +Stimuli3 : in_valid = true in_value 1 at 88 ns +Stimuli3 : in_valid = true in_value 2 at 89 ns +Stimuli3 : in_valid = true in_value 3 at 90 ns +Stimuli3 : in_valid = true in_value 4 at 91 ns +Display : 10 at 91 ns +Stimuli3 : in_valid = true in_value 5 at 92 ns +Display : 3 at 92 ns +Stimuli3 : in_valid = true in_value 6 at 93 ns +Display : 4 at 93 ns +Stimuli3 : in_valid = true in_value 7 at 94 ns +Display : 5 at 94 ns +Stimuli3 : in_valid = true in_value 8 at 95 ns +Display : 6 at 95 ns +Stimuli3 : in_valid = true in_value 9 at 96 ns +Display : 6 at 96 ns +Stimuli3 : in_valid = true in_value 10 at 97 ns +Stimuli1 : in_valid = true in_value 1 at 108 ns +Stimuli1 : in_valid = true in_value 2 at 109 ns +Stimuli1 : in_valid = true in_value 3 at 110 ns +Display : 6 at 110 ns +Stimuli1 : in_valid = true in_value 4 at 111 ns +Display : 2 at 111 ns +Stimuli1 : in_valid = true in_value 5 at 112 ns +Display : 3 at 112 ns +Stimuli1 : in_valid = true in_value 6 at 113 ns +Display : 4 at 113 ns +Stimuli1 : in_valid = true in_value 7 at 114 ns +Display : 5 at 114 ns +Stimuli1 : in_valid = true in_value 8 at 115 ns +Display : 6 at 115 ns +Stimuli1 : in_valid = true in_value 9 at 116 ns +Display : 7 at 116 ns +Stimuli1 : in_valid = true in_value 10 at 117 ns +Display : 8 at 117 ns +Display : 9 at 118 ns +Display : 10 at 119 ns +Display : 10 at 120 ns +Stimuli2 : in_valid = true in_value 1 at 123 ns +Stimuli2 : in_valid = true in_value 2 at 124 ns +Stimuli2 : in_valid = true in_value 3 at 125 ns +Stimuli2 : in_valid = true in_value 4 at 126 ns +Display : 10 at 126 ns +Stimuli2 : in_valid = true in_value 5 at 127 ns +Display : 3 at 127 ns +Stimuli2 : in_valid = true in_value 6 at 128 ns +Display : 3 at 128 ns +Stimuli2 : in_valid = true in_value 7 at 129 ns +Display : 5 at 129 ns +Stimuli2 : in_valid = true in_value 8 at 130 ns +Display : 6 at 130 ns +Stimuli2 : in_valid = true in_value 9 at 131 ns +Display : 7 at 131 ns +Stimuli2 : in_valid = true in_value 10 at 132 ns +Display : 8 at 132 ns +Display : 9 at 133 ns +Display : 9 at 134 ns +Display : 10 at 135 ns +Display : 10 at 136 ns +Stimuli3 : in_valid = true in_value 0 at 138 ns +Stimuli3 : in_valid = true in_value 1 at 139 ns +Stimuli3 : in_valid = true in_value 2 at 140 ns +Stimuli3 : in_valid = true in_value 3 at 141 ns +Stimuli3 : in_valid = true in_value 4 at 142 ns +Display : 10 at 142 ns +Stimuli3 : in_valid = true in_value 5 at 143 ns +Display : 3 at 143 ns +Stimuli3 : in_valid = true in_value 6 at 144 ns +Display : 4 at 144 ns +Stimuli3 : in_valid = true in_value 7 at 145 ns +Display : 5 at 145 ns +Stimuli3 : in_valid = true in_value 8 at 146 ns +Display : 6 at 146 ns +Stimuli3 : in_valid = true in_value 9 at 147 ns +Display : 6 at 147 ns +Stimuli3 : in_valid = true in_value 10 at 148 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/main.cpp new file mode 100644 index 000000000..f9722f687 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/main.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "for_fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_value; + sc_signal in_valid; + sc_signal result; + + + for_fsm for_fsm1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.cpp new file mode 100644 index 000000000..f61a6def4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(5); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(5); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.h new file mode 100644 index 000000000..d8bccb0f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/stimulus.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.cpp new file mode 100644 index 000000000..3e8ba2ec1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.h new file mode 100644 index 000000000..b50f526c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/golden/while_datatypes.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/golden/while_datatypes.log new file mode 100644 index 000000000..ee8d4b026 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/golden/while_datatypes.log @@ -0,0 +1,186 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 0 at 6 ns +Stimuli1 : in_valid = true in_value 1 at 7 ns +Stimuli1 : in_valid = true in_value 2 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 3 at 9 ns +Display : 1 at 9 ns +Stimuli1 : in_valid = true in_value 4 at 10 ns +Display : 2 at 10 ns +Stimuli1 : in_valid = true in_value 5 at 11 ns +Display : 3 at 11 ns +Stimuli1 : in_valid = true in_value 6 at 12 ns +Display : 4 at 12 ns +Stimuli1 : in_valid = true in_value 7 at 13 ns +Display : 5 at 13 ns +Stimuli1 : in_valid = true in_value 8 at 14 ns +Display : 6 at 14 ns +Stimuli1 : in_valid = true in_value 9 at 15 ns +Display : 7 at 15 ns +Stimuli1 : in_valid = true in_value 10 at 16 ns +Display : 8 at 16 ns +Display : 9 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 0 at 21 ns +Stimuli2 : in_valid = true in_value 1 at 22 ns +Stimuli2 : in_valid = true in_value 2 at 23 ns +Stimuli2 : in_valid = true in_value 3 at 24 ns +Display : 10 at 24 ns +Stimuli2 : in_valid = true in_value 4 at 25 ns +Display : 10 at 25 ns +Stimuli2 : in_valid = true in_value 5 at 26 ns +Display : 10 at 26 ns +Stimuli2 : in_valid = true in_value 6 at 27 ns +Display : 10 at 27 ns +Stimuli2 : in_valid = true in_value 7 at 28 ns +Display : 5 at 28 ns +Stimuli2 : in_valid = true in_value 8 at 29 ns +Display : 6 at 29 ns +Stimuli2 : in_valid = true in_value 9 at 30 ns +Display : 7 at 30 ns +Stimuli2 : in_valid = true in_value 10 at 31 ns +Display : 8 at 31 ns +Display : 8 at 32 ns +Display : 10 at 33 ns +Display : 10 at 34 ns +Display : 10 at 35 ns +Stimuli3 : in_valid = true in_value 0 at 36 ns +Stimuli3 : in_valid = true in_value 1 at 37 ns +Stimuli3 : in_valid = true in_value 2 at 38 ns +Stimuli3 : in_valid = true in_value 3 at 39 ns +Stimuli3 : in_valid = true in_value 4 at 40 ns +Stimuli3 : in_valid = true in_value 5 at 41 ns +Display : 10 at 41 ns +Stimuli3 : in_valid = true in_value 6 at 42 ns +Display : 4 at 42 ns +Stimuli3 : in_valid = true in_value 7 at 43 ns +Display : 5 at 43 ns +Stimuli3 : in_valid = true in_value 8 at 44 ns +Display : 6 at 44 ns +Stimuli3 : in_valid = true in_value 9 at 45 ns +Display : 6 at 45 ns +Stimuli3 : in_valid = true in_value 10 at 46 ns +Stimuli1 : in_valid = true in_value 0 at 57 ns +Stimuli1 : in_valid = true in_value 1 at 58 ns +Stimuli1 : in_valid = true in_value 2 at 59 ns +Display : 6 at 59 ns +Stimuli1 : in_valid = true in_value 3 at 60 ns +Display : 1 at 60 ns +Stimuli1 : in_valid = true in_value 4 at 61 ns +Display : 2 at 61 ns +Stimuli1 : in_valid = true in_value 5 at 62 ns +Display : 3 at 62 ns +Stimuli1 : in_valid = true in_value 6 at 63 ns +Display : 4 at 63 ns +Stimuli1 : in_valid = true in_value 7 at 64 ns +Display : 5 at 64 ns +Stimuli1 : in_valid = true in_value 8 at 65 ns +Display : 6 at 65 ns +Stimuli1 : in_valid = true in_value 9 at 66 ns +Display : 7 at 66 ns +Stimuli1 : in_valid = true in_value 10 at 67 ns +Display : 8 at 67 ns +Display : 9 at 68 ns +Display : 10 at 69 ns +Stimuli2 : in_valid = true in_value 0 at 72 ns +Stimuli2 : in_valid = true in_value 1 at 73 ns +Stimuli2 : in_valid = true in_value 2 at 74 ns +Stimuli2 : in_valid = true in_value 3 at 75 ns +Display : 10 at 75 ns +Stimuli2 : in_valid = true in_value 4 at 76 ns +Display : 10 at 76 ns +Stimuli2 : in_valid = true in_value 5 at 77 ns +Display : 10 at 77 ns +Stimuli2 : in_valid = true in_value 6 at 78 ns +Display : 10 at 78 ns +Stimuli2 : in_valid = true in_value 7 at 79 ns +Display : 5 at 79 ns +Stimuli2 : in_valid = true in_value 8 at 80 ns +Display : 6 at 80 ns +Stimuli2 : in_valid = true in_value 9 at 81 ns +Display : 7 at 81 ns +Stimuli2 : in_valid = true in_value 10 at 82 ns +Display : 8 at 82 ns +Display : 8 at 83 ns +Display : 10 at 84 ns +Display : 10 at 85 ns +Display : 10 at 86 ns +Stimuli3 : in_valid = true in_value 0 at 87 ns +Stimuli3 : in_valid = true in_value 1 at 88 ns +Stimuli3 : in_valid = true in_value 2 at 89 ns +Stimuli3 : in_valid = true in_value 3 at 90 ns +Stimuli3 : in_valid = true in_value 4 at 91 ns +Stimuli3 : in_valid = true in_value 5 at 92 ns +Display : 10 at 92 ns +Stimuli3 : in_valid = true in_value 6 at 93 ns +Display : 4 at 93 ns +Stimuli3 : in_valid = true in_value 7 at 94 ns +Display : 5 at 94 ns +Stimuli3 : in_valid = true in_value 8 at 95 ns +Display : 6 at 95 ns +Stimuli3 : in_valid = true in_value 9 at 96 ns +Display : 6 at 96 ns +Stimuli3 : in_valid = true in_value 10 at 97 ns +Stimuli1 : in_valid = true in_value 0 at 108 ns +Stimuli1 : in_valid = true in_value 1 at 109 ns +Stimuli1 : in_valid = true in_value 2 at 110 ns +Display : 6 at 110 ns +Stimuli1 : in_valid = true in_value 3 at 111 ns +Display : 1 at 111 ns +Stimuli1 : in_valid = true in_value 4 at 112 ns +Display : 2 at 112 ns +Stimuli1 : in_valid = true in_value 5 at 113 ns +Display : 3 at 113 ns +Stimuli1 : in_valid = true in_value 6 at 114 ns +Display : 4 at 114 ns +Stimuli1 : in_valid = true in_value 7 at 115 ns +Display : 5 at 115 ns +Stimuli1 : in_valid = true in_value 8 at 116 ns +Display : 6 at 116 ns +Stimuli1 : in_valid = true in_value 9 at 117 ns +Display : 7 at 117 ns +Stimuli1 : in_valid = true in_value 10 at 118 ns +Display : 8 at 118 ns +Display : 9 at 119 ns +Display : 10 at 120 ns +Stimuli2 : in_valid = true in_value 0 at 123 ns +Stimuli2 : in_valid = true in_value 1 at 124 ns +Stimuli2 : in_valid = true in_value 2 at 125 ns +Stimuli2 : in_valid = true in_value 3 at 126 ns +Display : 10 at 126 ns +Stimuli2 : in_valid = true in_value 4 at 127 ns +Display : 10 at 127 ns +Stimuli2 : in_valid = true in_value 5 at 128 ns +Display : 10 at 128 ns +Stimuli2 : in_valid = true in_value 6 at 129 ns +Display : 10 at 129 ns +Stimuli2 : in_valid = true in_value 7 at 130 ns +Display : 5 at 130 ns +Stimuli2 : in_valid = true in_value 8 at 131 ns +Display : 6 at 131 ns +Stimuli2 : in_valid = true in_value 9 at 132 ns +Display : 7 at 132 ns +Stimuli2 : in_valid = true in_value 10 at 133 ns +Display : 8 at 133 ns +Display : 8 at 134 ns +Display : 10 at 135 ns +Display : 10 at 136 ns +Display : 10 at 137 ns +Stimuli3 : in_valid = true in_value 0 at 138 ns +Stimuli3 : in_valid = true in_value 1 at 139 ns +Stimuli3 : in_valid = true in_value 2 at 140 ns +Stimuli3 : in_valid = true in_value 3 at 141 ns +Stimuli3 : in_valid = true in_value 4 at 142 ns +Stimuli3 : in_valid = true in_value 5 at 143 ns +Display : 10 at 143 ns +Stimuli3 : in_valid = true in_value 6 at 144 ns +Display : 4 at 144 ns +Stimuli3 : in_valid = true in_value 7 at 145 ns +Display : 5 at 145 ns +Stimuli3 : in_valid = true in_value 8 at 146 ns +Display : 6 at 146 ns +Stimuli3 : in_valid = true in_value 9 at 147 ns +Display : 6 at 147 ns +Stimuli3 : in_valid = true in_value 10 at 148 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/main.cpp new file mode 100644 index 000000000..259079b39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/main.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_datatypes.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_valid; + sc_signal result; + sc_signal in_value; + + + while_datatypes while_datatypes1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.cpp new file mode 100644 index 000000000..af5159663 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.h new file mode 100644 index 000000000..e20114c36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/stimulus.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.cpp new file mode 100644 index 000000000..e0b1ae585 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_datatypes.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_datatypes.h" + +#define max 10 + +void while_datatypes::entry() +{ + + int i, inp_tmp; + sc_signed signed_counter(8); + sc_unsigned unsigned_counter(8); + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop + out_valid.write(true); + i=1; + wait(); + while (i<=max) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + i++; + wait(); + }; + out_valid.write(false); + wait(5); + + // execution of for loop with continues + out_valid.write(true); + signed_counter=0; + wait(); + do { + signed_counter++; + inp_tmp = in_value.read(); + if (signed_counter==8) { + wait(); + continue; + } else if (in_value.read()<5) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + } + } while (signed_counter.to_int()<=max); + out_valid.write(false); + wait(5); + + // for loop with break + out_valid.write(true); + wait(); + unsigned_counter=0; + do { + unsigned_counter++; + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + } while (unsigned_counter.to_uint()<=max); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.f new file mode 100644 index 000000000..bdd5c8d62 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.f @@ -0,0 +1,4 @@ +while_datatypes/main.cpp +while_datatypes/stimulus.cpp +while_datatypes/display.cpp +while_datatypes/while_datatypes.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.h new file mode 100644 index 000000000..40c6642b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/while_datatypes.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_datatypes.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( while_datatypes ) +{ + SC_HAS_PROCESS( while_datatypes ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + while_datatypes ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.cpp new file mode 100644 index 000000000..efa95d3cf --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.h new file mode 100644 index 000000000..4f696fcd3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/golden/while_exit.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/golden/while_exit.log new file mode 100644 index 000000000..b4ad00f9a --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/golden/while_exit.log @@ -0,0 +1,183 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 0 at 6 ns +Stimuli1 : in_valid = true in_value 1 at 7 ns +Stimuli1 : in_valid = true in_value 2 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 3 at 9 ns +Display : 1 at 9 ns +Stimuli1 : in_valid = true in_value 4 at 10 ns +Display : 2 at 10 ns +Stimuli1 : in_valid = true in_value 5 at 11 ns +Display : 3 at 11 ns +Stimuli1 : in_valid = true in_value 6 at 12 ns +Display : 4 at 12 ns +Stimuli1 : in_valid = true in_value 7 at 13 ns +Display : 5 at 13 ns +Stimuli1 : in_valid = true in_value 8 at 14 ns +Display : 6 at 14 ns +Stimuli1 : in_valid = true in_value 9 at 15 ns +Display : 7 at 15 ns +Stimuli1 : in_valid = true in_value 10 at 16 ns +Stimuli2 : in_valid = true in_value 0 at 21 ns +Stimuli2 : in_valid = true in_value 1 at 22 ns +Display : 7 at 22 ns +Stimuli2 : in_valid = true in_value 2 at 23 ns +Display : 7 at 23 ns +Stimuli2 : in_valid = true in_value 3 at 24 ns +Display : 7 at 24 ns +Stimuli2 : in_valid = true in_value 4 at 25 ns +Display : 7 at 25 ns +Stimuli2 : in_valid = true in_value 5 at 26 ns +Display : 7 at 26 ns +Stimuli2 : in_valid = true in_value 6 at 27 ns +Display : 7 at 27 ns +Stimuli2 : in_valid = true in_value 7 at 28 ns +Display : 5 at 28 ns +Stimuli2 : in_valid = true in_value 8 at 29 ns +Display : 6 at 29 ns +Stimuli2 : in_valid = true in_value 9 at 30 ns +Display : 6 at 30 ns +Stimuli2 : in_valid = true in_value 10 at 31 ns +Display : 8 at 31 ns +Display : 9 at 32 ns +Display : 10 at 33 ns +Stimuli3 : in_valid = true in_value 0 at 36 ns +Stimuli3 : in_valid = true in_value 1 at 37 ns +Stimuli3 : in_valid = true in_value 2 at 38 ns +Stimuli3 : in_valid = true in_value 3 at 39 ns +Display : 10 at 39 ns +Stimuli3 : in_valid = true in_value 4 at 40 ns +Display : 2 at 40 ns +Stimuli3 : in_valid = true in_value 5 at 41 ns +Display : 3 at 41 ns +Stimuli3 : in_valid = true in_value 6 at 42 ns +Display : 4 at 42 ns +Stimuli3 : in_valid = true in_value 7 at 43 ns +Display : 5 at 43 ns +Stimuli3 : in_valid = true in_value 8 at 44 ns +Display : 6 at 44 ns +Stimuli3 : in_valid = true in_value 9 at 45 ns +Display : 6 at 45 ns +Stimuli3 : in_valid = true in_value 10 at 46 ns +Stimuli1 : in_valid = true in_value 0 at 57 ns +Stimuli1 : in_valid = true in_value 1 at 58 ns +Stimuli1 : in_valid = true in_value 2 at 59 ns +Display : 6 at 59 ns +Stimuli1 : in_valid = true in_value 3 at 60 ns +Display : 1 at 60 ns +Stimuli1 : in_valid = true in_value 4 at 61 ns +Display : 2 at 61 ns +Stimuli1 : in_valid = true in_value 5 at 62 ns +Display : 3 at 62 ns +Stimuli1 : in_valid = true in_value 6 at 63 ns +Display : 4 at 63 ns +Stimuli1 : in_valid = true in_value 7 at 64 ns +Display : 5 at 64 ns +Stimuli1 : in_valid = true in_value 8 at 65 ns +Display : 6 at 65 ns +Stimuli1 : in_valid = true in_value 9 at 66 ns +Display : 7 at 66 ns +Stimuli1 : in_valid = true in_value 10 at 67 ns +Stimuli2 : in_valid = true in_value 0 at 72 ns +Stimuli2 : in_valid = true in_value 1 at 73 ns +Display : 7 at 73 ns +Stimuli2 : in_valid = true in_value 2 at 74 ns +Display : 7 at 74 ns +Stimuli2 : in_valid = true in_value 3 at 75 ns +Display : 7 at 75 ns +Stimuli2 : in_valid = true in_value 4 at 76 ns +Display : 7 at 76 ns +Stimuli2 : in_valid = true in_value 5 at 77 ns +Display : 7 at 77 ns +Stimuli2 : in_valid = true in_value 6 at 78 ns +Display : 7 at 78 ns +Stimuli2 : in_valid = true in_value 7 at 79 ns +Display : 5 at 79 ns +Stimuli2 : in_valid = true in_value 8 at 80 ns +Display : 6 at 80 ns +Stimuli2 : in_valid = true in_value 9 at 81 ns +Display : 6 at 81 ns +Stimuli2 : in_valid = true in_value 10 at 82 ns +Display : 8 at 82 ns +Display : 9 at 83 ns +Display : 10 at 84 ns +Stimuli3 : in_valid = true in_value 0 at 87 ns +Stimuli3 : in_valid = true in_value 1 at 88 ns +Stimuli3 : in_valid = true in_value 2 at 89 ns +Stimuli3 : in_valid = true in_value 3 at 90 ns +Display : 10 at 90 ns +Stimuli3 : in_valid = true in_value 4 at 91 ns +Display : 2 at 91 ns +Stimuli3 : in_valid = true in_value 5 at 92 ns +Display : 3 at 92 ns +Stimuli3 : in_valid = true in_value 6 at 93 ns +Display : 4 at 93 ns +Stimuli3 : in_valid = true in_value 7 at 94 ns +Display : 5 at 94 ns +Stimuli3 : in_valid = true in_value 8 at 95 ns +Display : 6 at 95 ns +Stimuli3 : in_valid = true in_value 9 at 96 ns +Display : 6 at 96 ns +Stimuli3 : in_valid = true in_value 10 at 97 ns +Stimuli1 : in_valid = true in_value 0 at 108 ns +Stimuli1 : in_valid = true in_value 1 at 109 ns +Stimuli1 : in_valid = true in_value 2 at 110 ns +Display : 6 at 110 ns +Stimuli1 : in_valid = true in_value 3 at 111 ns +Display : 1 at 111 ns +Stimuli1 : in_valid = true in_value 4 at 112 ns +Display : 2 at 112 ns +Stimuli1 : in_valid = true in_value 5 at 113 ns +Display : 3 at 113 ns +Stimuli1 : in_valid = true in_value 6 at 114 ns +Display : 4 at 114 ns +Stimuli1 : in_valid = true in_value 7 at 115 ns +Display : 5 at 115 ns +Stimuli1 : in_valid = true in_value 8 at 116 ns +Display : 6 at 116 ns +Stimuli1 : in_valid = true in_value 9 at 117 ns +Display : 7 at 117 ns +Stimuli1 : in_valid = true in_value 10 at 118 ns +Stimuli2 : in_valid = true in_value 0 at 123 ns +Stimuli2 : in_valid = true in_value 1 at 124 ns +Display : 7 at 124 ns +Stimuli2 : in_valid = true in_value 2 at 125 ns +Display : 7 at 125 ns +Stimuli2 : in_valid = true in_value 3 at 126 ns +Display : 7 at 126 ns +Stimuli2 : in_valid = true in_value 4 at 127 ns +Display : 7 at 127 ns +Stimuli2 : in_valid = true in_value 5 at 128 ns +Display : 7 at 128 ns +Stimuli2 : in_valid = true in_value 6 at 129 ns +Display : 7 at 129 ns +Stimuli2 : in_valid = true in_value 7 at 130 ns +Display : 5 at 130 ns +Stimuli2 : in_valid = true in_value 8 at 131 ns +Display : 6 at 131 ns +Stimuli2 : in_valid = true in_value 9 at 132 ns +Display : 6 at 132 ns +Stimuli2 : in_valid = true in_value 10 at 133 ns +Display : 8 at 133 ns +Display : 9 at 134 ns +Display : 10 at 135 ns +Stimuli3 : in_valid = true in_value 0 at 138 ns +Stimuli3 : in_valid = true in_value 1 at 139 ns +Stimuli3 : in_valid = true in_value 2 at 140 ns +Stimuli3 : in_valid = true in_value 3 at 141 ns +Display : 10 at 141 ns +Stimuli3 : in_valid = true in_value 4 at 142 ns +Display : 2 at 142 ns +Stimuli3 : in_valid = true in_value 5 at 143 ns +Display : 3 at 143 ns +Stimuli3 : in_valid = true in_value 6 at 144 ns +Display : 4 at 144 ns +Stimuli3 : in_valid = true in_value 7 at 145 ns +Display : 5 at 145 ns +Stimuli3 : in_valid = true in_value 8 at 146 ns +Display : 6 at 146 ns +Stimuli3 : in_valid = true in_value 9 at 147 ns +Display : 6 at 147 ns +Stimuli3 : in_valid = true in_value 10 at 148 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/main.cpp new file mode 100644 index 000000000..7d176025e --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/main.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_exit.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_valid; + sc_signal result; + sc_signal in_value; + + + while_exit while_exit1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.cpp new file mode 100644 index 000000000..d86f16758 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=0; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.h new file mode 100644 index 000000000..5bc8313de --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/stimulus.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.cpp new file mode 100644 index 000000000..5cc53af40 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_exit.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_exit.h" + +#define max 10 + +void while_exit::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of while loop with exit after write statement + out_valid.write(true); + i=1; + wait(); + while (i<=max) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + if (inp_tmp==7) { + wait(); + break; + } else { + i++; + wait(); + }; + }; + out_valid.write(false); + wait(6); + + // execution of do loop with continues + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (in_value.read()<5) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + } + } while (i<=max); + out_valid.write(false); + wait(5); + + // execution of do loop with exit after before statement + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + } while (i<=max); + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.f new file mode 100644 index 000000000..947eeefd1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.f @@ -0,0 +1,4 @@ +while_exit/main.cpp +while_exit/stimulus.cpp +while_exit/display.cpp +while_exit/while_exit.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.h new file mode 100644 index 000000000..a57397dd4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/while_exit.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_exit.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-30 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( while_exit ) +{ + SC_HAS_PROCESS( while_exit ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + while_exit( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp new file mode 100644 index 000000000..3e8ba2ec1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "display.h" + +void display::entry(){ + + wait(2); + while(1) { + // Reading Data, and Counter i,j is counted up. + while (out_valid.read()==false) wait(); + cout << "Display : " << result.read() << " " + << " at " << sc_time_stamp() << endl; + wait(); + } +} + + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h new file mode 100644 index 000000000..b50f526c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/display.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& result; // Input port + const sc_signal& out_valid; + + display( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULT, + const sc_signal& OUT_VALID + ) + : + result(RESULT), + out_valid(OUT_VALID) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log new file mode 100644 index 000000000..acee1098d --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/golden/while_fsm.log @@ -0,0 +1,183 @@ +SystemC Simulation +Stimuli1 : in_valid = true in_value 1 at 6 ns +Stimuli1 : in_valid = true in_value 2 at 7 ns +Stimuli1 : in_valid = true in_value 3 at 8 ns +Display : 0 at 8 ns +Stimuli1 : in_valid = true in_value 4 at 9 ns +Display : 2 at 9 ns +Stimuli1 : in_valid = true in_value 5 at 10 ns +Display : 3 at 10 ns +Stimuli1 : in_valid = true in_value 6 at 11 ns +Display : 4 at 11 ns +Stimuli1 : in_valid = true in_value 7 at 12 ns +Display : 5 at 12 ns +Stimuli1 : in_valid = true in_value 8 at 13 ns +Display : 6 at 13 ns +Stimuli1 : in_valid = true in_value 9 at 14 ns +Display : 7 at 14 ns +Stimuli1 : in_valid = true in_value 10 at 15 ns +Display : 8 at 15 ns +Display : 9 at 16 ns +Display : 10 at 17 ns +Display : 10 at 18 ns +Stimuli2 : in_valid = true in_value 1 at 20 ns +Display : 10 at 20 ns +Stimuli2 : in_valid = true in_value 2 at 21 ns +Display : 10 at 21 ns +Stimuli2 : in_valid = true in_value 3 at 22 ns +Display : 10 at 22 ns +Stimuli2 : in_valid = true in_value 4 at 23 ns +Display : 10 at 23 ns +Stimuli2 : in_valid = true in_value 5 at 24 ns +Display : 10 at 24 ns +Stimuli2 : in_valid = true in_value 6 at 25 ns +Display : 10 at 25 ns +Stimuli2 : in_valid = true in_value 7 at 26 ns +Display : 5 at 26 ns +Stimuli2 : in_valid = true in_value 8 at 27 ns +Display : 6 at 27 ns +Stimuli2 : in_valid = true in_value 9 at 28 ns +Display : 6 at 28 ns +Stimuli2 : in_valid = true in_value 10 at 29 ns +Display : 8 at 29 ns +Display : 9 at 30 ns +Display : 10 at 31 ns +Stimuli3 : in_valid = true in_value 1 at 34 ns +Stimuli3 : in_valid = true in_value 2 at 35 ns +Stimuli3 : in_valid = true in_value 3 at 36 ns +Display : 10 at 36 ns +Stimuli3 : in_valid = true in_value 4 at 37 ns +Display : 2 at 37 ns +Stimuli3 : in_valid = true in_value 5 at 38 ns +Display : 3 at 38 ns +Stimuli3 : in_valid = true in_value 6 at 39 ns +Display : 4 at 39 ns +Stimuli3 : in_valid = true in_value 7 at 40 ns +Display : 5 at 40 ns +Stimuli3 : in_valid = true in_value 8 at 41 ns +Display : 6 at 41 ns +Stimuli3 : in_valid = true in_value 9 at 42 ns +Display : 6 at 42 ns +Stimuli3 : in_valid = true in_value 10 at 43 ns +Stimuli1 : in_valid = true in_value 1 at 54 ns +Stimuli1 : in_valid = true in_value 2 at 55 ns +Stimuli1 : in_valid = true in_value 3 at 56 ns +Display : 6 at 56 ns +Stimuli1 : in_valid = true in_value 4 at 57 ns +Display : 2 at 57 ns +Stimuli1 : in_valid = true in_value 5 at 58 ns +Display : 3 at 58 ns +Stimuli1 : in_valid = true in_value 6 at 59 ns +Display : 4 at 59 ns +Stimuli1 : in_valid = true in_value 7 at 60 ns +Display : 5 at 60 ns +Stimuli1 : in_valid = true in_value 8 at 61 ns +Display : 6 at 61 ns +Stimuli1 : in_valid = true in_value 9 at 62 ns +Display : 7 at 62 ns +Stimuli1 : in_valid = true in_value 10 at 63 ns +Display : 8 at 63 ns +Display : 9 at 64 ns +Display : 10 at 65 ns +Display : 10 at 66 ns +Stimuli2 : in_valid = true in_value 1 at 68 ns +Display : 10 at 68 ns +Stimuli2 : in_valid = true in_value 2 at 69 ns +Display : 10 at 69 ns +Stimuli2 : in_valid = true in_value 3 at 70 ns +Display : 10 at 70 ns +Stimuli2 : in_valid = true in_value 4 at 71 ns +Display : 10 at 71 ns +Stimuli2 : in_valid = true in_value 5 at 72 ns +Display : 10 at 72 ns +Stimuli2 : in_valid = true in_value 6 at 73 ns +Display : 10 at 73 ns +Stimuli2 : in_valid = true in_value 7 at 74 ns +Display : 5 at 74 ns +Stimuli2 : in_valid = true in_value 8 at 75 ns +Display : 6 at 75 ns +Stimuli2 : in_valid = true in_value 9 at 76 ns +Display : 6 at 76 ns +Stimuli2 : in_valid = true in_value 10 at 77 ns +Display : 8 at 77 ns +Display : 9 at 78 ns +Display : 10 at 79 ns +Stimuli3 : in_valid = true in_value 1 at 82 ns +Stimuli3 : in_valid = true in_value 2 at 83 ns +Stimuli3 : in_valid = true in_value 3 at 84 ns +Display : 10 at 84 ns +Stimuli3 : in_valid = true in_value 4 at 85 ns +Display : 2 at 85 ns +Stimuli3 : in_valid = true in_value 5 at 86 ns +Display : 3 at 86 ns +Stimuli3 : in_valid = true in_value 6 at 87 ns +Display : 4 at 87 ns +Stimuli3 : in_valid = true in_value 7 at 88 ns +Display : 5 at 88 ns +Stimuli3 : in_valid = true in_value 8 at 89 ns +Display : 6 at 89 ns +Stimuli3 : in_valid = true in_value 9 at 90 ns +Display : 6 at 90 ns +Stimuli3 : in_valid = true in_value 10 at 91 ns +Stimuli1 : in_valid = true in_value 1 at 102 ns +Stimuli1 : in_valid = true in_value 2 at 103 ns +Stimuli1 : in_valid = true in_value 3 at 104 ns +Display : 6 at 104 ns +Stimuli1 : in_valid = true in_value 4 at 105 ns +Display : 2 at 105 ns +Stimuli1 : in_valid = true in_value 5 at 106 ns +Display : 3 at 106 ns +Stimuli1 : in_valid = true in_value 6 at 107 ns +Display : 4 at 107 ns +Stimuli1 : in_valid = true in_value 7 at 108 ns +Display : 5 at 108 ns +Stimuli1 : in_valid = true in_value 8 at 109 ns +Display : 6 at 109 ns +Stimuli1 : in_valid = true in_value 9 at 110 ns +Display : 7 at 110 ns +Stimuli1 : in_valid = true in_value 10 at 111 ns +Display : 8 at 111 ns +Display : 9 at 112 ns +Display : 10 at 113 ns +Display : 10 at 114 ns +Stimuli2 : in_valid = true in_value 1 at 116 ns +Display : 10 at 116 ns +Stimuli2 : in_valid = true in_value 2 at 117 ns +Display : 10 at 117 ns +Stimuli2 : in_valid = true in_value 3 at 118 ns +Display : 10 at 118 ns +Stimuli2 : in_valid = true in_value 4 at 119 ns +Display : 10 at 119 ns +Stimuli2 : in_valid = true in_value 5 at 120 ns +Display : 10 at 120 ns +Stimuli2 : in_valid = true in_value 6 at 121 ns +Display : 10 at 121 ns +Stimuli2 : in_valid = true in_value 7 at 122 ns +Display : 5 at 122 ns +Stimuli2 : in_valid = true in_value 8 at 123 ns +Display : 6 at 123 ns +Stimuli2 : in_valid = true in_value 9 at 124 ns +Display : 6 at 124 ns +Stimuli2 : in_valid = true in_value 10 at 125 ns +Display : 8 at 125 ns +Display : 9 at 126 ns +Display : 10 at 127 ns +Stimuli3 : in_valid = true in_value 1 at 130 ns +Stimuli3 : in_valid = true in_value 2 at 131 ns +Stimuli3 : in_valid = true in_value 3 at 132 ns +Display : 10 at 132 ns +Stimuli3 : in_valid = true in_value 4 at 133 ns +Display : 2 at 133 ns +Stimuli3 : in_valid = true in_value 5 at 134 ns +Display : 3 at 134 ns +Stimuli3 : in_valid = true in_value 6 at 135 ns +Display : 4 at 135 ns +Stimuli3 : in_valid = true in_value 7 at 136 ns +Display : 5 at 136 ns +Stimuli3 : in_valid = true in_value 8 at 137 ns +Display : 6 at 137 ns +Stimuli3 : in_valid = true in_value 9 at 138 ns +Display : 6 at 138 ns +Stimuli3 : in_valid = true in_value 10 at 139 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp new file mode 100644 index 000000000..69ab12ad6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/main.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_fsm.h" +#include "stimulus.h" +#include "display.h" + +int sc_main (int argc , char *argv[]) { + sc_clock clock; + sc_signal reset; + sc_signal out_valid; + sc_signal in_valid; + sc_signal result; + sc_signal in_value; + + + while_fsm while_fsm1 ( + "process_body", + clock, + reset, + in_valid, + in_value, + out_valid, + result + ); + + stimulus stimulus1 ( + "stimulus", + clock, + reset, + in_value, + in_valid + ); + + display display1 ( + "display", + clock, + result, + out_valid + ); + + + sc_start(); + return 0; +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp new file mode 100644 index 000000000..61049e207 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "stimulus.h" + +void stimulus::entry() { + + int i, j; + + // sending some reset values + reset.write(true); + in_valid.write(false); + in_value.write(0); + wait(); + reset.write(false); + wait(5); + for(i=0; i<3; i++){ + in_valid.write(true); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli1 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + in_valid.write(false); + wait(4); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli2 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(4); + for(j=1; j<=10; j++) { + in_value.write(j); + cout << "Stimuli3 : in_valid = true in_value " << j << " at " + << sc_time_stamp() << endl; + wait(); + }; + wait(10); + }; + + wait(15); + sc_stop(); +} + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h new file mode 100644 index 000000000..e20114c36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/stimulus.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( stimulus ) +{ + SC_HAS_PROCESS( stimulus ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_value; + sc_signal& in_valid; + + stimulus(sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& IN_VALUE, + sc_signal& IN_VALID + ) + : + reset (RESET), + in_value (IN_VALUE), + in_valid (IN_VALID) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp new file mode 100644 index 000000000..a3f08d992 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_fsm.cpp -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "while_fsm.h" + +#define max 10 + +void while_fsm::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop + out_valid.write(true); + i=1; + wait(); + while (i<=max) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + i++; + wait(); + }; + out_valid.write(false); + wait(); + + // execution of for loop with continues + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (in_value.read()<5 && i!=1) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + } + } while (i<=max); + out_valid.write(false); + wait(); + wait(3); + + // for loop with break + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + } while (i<=max); + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f new file mode 100644 index 000000000..e47e026a1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.f @@ -0,0 +1,4 @@ +while_fsm/main.cpp +while_fsm/stimulus.cpp +while_fsm/display.cpp +while_fsm/while_fsm.cpp diff --git a/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h new file mode 100644 index 000000000..75fd0080c --- /dev/null +++ b/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/while_fsm.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_fsm.h -- + + Original Author: Rocco Jonack, Synopsys, Inc., 1999-07-27 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" + +SC_MODULE( while_fsm ) +{ + SC_HAS_PROCESS( while_fsm ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + while_fsm( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/communication/channel/aggregate/golden/rgb.log b/src/systemc/tests/systemc/misc/communication/channel/aggregate/golden/rgb.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/aggregate/golden/rgb.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.cpp b/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.cpp new file mode 100644 index 000000000..d7ae1aaa8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + rgb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "rgb.h" + +ostream& +operator<<(ostream& os, struct rgb_t &r) +{ + os << r.red << " " << r.green << " " << r.blue << endl; + return os; +} + +void sc_trace(sc_trace_file* tf,const rgb_t& s, const std::string& NAME) { + sc_trace(tf, s.red, NAME + ".red"); + sc_trace(tf, s.green, NAME + ".green"); + sc_trace(tf, s.blue, NAME + ".blue"); +} + + +void some_process::entry() +{ + rgb_t clin; + rgb_t clout; + + while(true) { + clin = color_in.read(); + clout = clin; + clout.red >>= 1; + clout.green >>=2; + clout.blue <<= 1; + color_out.write(clout); + wait(); + + } +} + +int sc_main(int ac, char* av[]) +{ + sc_fifo in; + sc_fifo out; + + sc_clock clk("CLK"); + + some_process foo("FOO", clk, in, out); + + sc_start(1000, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.h b/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.h new file mode 100644 index 000000000..38d63ed7f --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/aggregate/rgb.h @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + rgb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +struct rgb_t { + unsigned red; + unsigned green; + unsigned blue; + + inline bool operator == (const rgb_t& rhs) const + { + return (red == rhs.red && green == rhs.green && blue == rhs.blue); + } + + friend ostream& operator<<(ostream& os, struct rgb_t &r); +}; + +SC_MODULE( some_process ) +{ + SC_HAS_PROCESS( some_process ); + + sc_in_clk clk; + + sc_fifo& color_in; + sc_fifo& color_out; + + // Constructor + + some_process( sc_module_name NAME, + sc_clock& CLK, + sc_fifo& COLOR_IN, + sc_fifo& COLOR_OUT ) + : color_in(COLOR_IN),color_out(COLOR_OUT) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/communication/channel/dataflow/dataflow.cpp b/src/systemc/tests/systemc/misc/communication/channel/dataflow/dataflow.cpp new file mode 100644 index 000000000..29a1d3471 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/dataflow/dataflow.cpp @@ -0,0 +1,226 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dataflow.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( sawtooth ) +{ + SC_HAS_PROCESS( sawtooth ); + + sc_in_clk clk; + + sc_fifo& out1; + sc_fifo& out2; + + sawtooth( sc_module_name NAME, + sc_clock& CLK, + sc_fifo& OUT1, + sc_fifo& OUT2 ) + : out1(OUT1), out2(OUT2) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void sawtooth::entry() +{ + int index = 0; + while (true) { + wait(); + out1.write(index % 17); + out2.write(index % 17); + index++; + } +} + +SC_MODULE( delay ) +{ + SC_HAS_PROCESS( delay ); + + sc_in_clk clk; + + sc_fifo& in; + sc_fifo& out; + + delay( sc_module_name NAME, + sc_clock& CLK, + sc_fifo& IN_, + sc_fifo& OUT_ ) + : in(IN_), out(OUT_) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void delay::entry() +{ + int buffer = 0; + + while (true) { + out.write(buffer); + buffer = in.read(); + } +} + +SC_MODULE( downsample ) +{ + SC_HAS_PROCESS( downsample ); + + sc_in_clk clk; + + sc_fifo& in; + sc_fifo& out; + + downsample( sc_module_name NAME, + sc_clock& CLK, + sc_fifo& IN_, + sc_fifo& OUT_ ) + : in(IN_), out(OUT_) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void downsample::entry() +{ + int temp; + while (true) { + temp = in.read(); + temp = in.read(); + out.write(temp); + } +} + +SC_MODULE( upsample ) +{ + SC_HAS_PROCESS( upsample ); + + sc_in_clk clk; + + sc_fifo& in; + sc_fifo& out; + + upsample( sc_module_name NAME, + sc_clock& CLK, + sc_fifo& IN_, + sc_fifo& OUT_ ) + : in(IN_), out(OUT_) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void upsample::entry() +{ + while(true) { + out.write(in.read()); + out.write(0); + } +} + +SC_MODULE( adder ) +{ + SC_HAS_PROCESS( adder ); + + sc_in_clk clk; + + sc_fifo& a; + sc_fifo& b; + + adder( sc_module_name NAME, + sc_clock& CLK, + sc_fifo& A, + sc_fifo& B ) + : a(A), b(B) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry(); +}; + +void adder::entry() +{ + while(true) { + int tmp = a.read() + b.read(); + cout << "Sum = " << tmp << endl; + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_fifo st1("ST1", 2), st2("ST2", 2); + sc_fifo a1("A1", 2), a2("A2", 2), a3("A3", 2); + sc_fifo b1("B1", 2), b2("B2", 2), b3("B3", 2); + + sc_clock clock("CLOCK"); + + sawtooth ST("TB1", clock, st1, st2); + + delay D1("D1", clock, st1, a1); + downsample DN1("DN1", clock, a1, a2); + upsample UP1("UP1", clock, a2, a3); + + downsample DN2("DN2", clock, st2, b1); + upsample UP2("UP2", clock, b1, b2); + delay D2("D2", clock, b2, b3); + + adder A ("A", clock, a3, b3); + + sc_start(100, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/dataflow/golden/dataflow.log b/src/systemc/tests/systemc/misc/communication/channel/dataflow/golden/dataflow.log new file mode 100644 index 000000000..b7e0044cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/dataflow/golden/dataflow.log @@ -0,0 +1,101 @@ +SystemC Simulation +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 +Sum = 15 +Sum = 16 +Sum = 0 +Sum = 1 +Sum = 2 +Sum = 3 +Sum = 4 +Sum = 5 +Sum = 6 +Sum = 7 +Sum = 8 +Sum = 9 +Sum = 10 +Sum = 11 +Sum = 12 +Sum = 13 +Sum = 14 diff --git a/src/systemc/tests/systemc/misc/communication/channel/hshake1/golden/hshake1.log b/src/systemc/tests/systemc/misc/communication/channel/hshake1/golden/hshake1.log new file mode 100644 index 000000000..a1f8a6efe --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hshake1/golden/hshake1.log @@ -0,0 +1,203 @@ +SystemC Simulation +Proc2::Done is 1 +Done is 1 +Input is 0 +Proc2::Input is 0 +Input is 1 +Proc2::Input is 1 +Input is 2 +Proc2::Input is 2 +Input is 3 +Proc2::Input is 3 +Input is 4 +Proc2::Input is 4 +Input is 5 +Proc2::Input is 5 +Input is 6 +Proc2::Input is 6 +Input is 7 +Proc2::Input is 7 +Input is 8 +Proc2::Input is 8 +Input is 9 +Proc2::Input is 9 +Input is 10 +Proc2::Input is 10 +Input is 11 +Proc2::Input is 11 +Input is 12 +Proc2::Input is 12 +Input is 13 +Proc2::Input is 13 +Input is 14 +Proc2::Input is 14 +Input is 15 +Proc2::Input is 15 +Input is 16 +Proc2::Input is 16 +Input is 17 +Proc2::Input is 17 +Input is 18 +Proc2::Input is 18 +Input is 19 +Proc2::Input is 19 +Input is 20 +Proc2::Input is 20 +Input is 21 +Proc2::Input is 21 +Input is 22 +Proc2::Input is 22 +Input is 23 +Proc2::Input is 23 +Input is 24 +Proc2::Input is 24 +Input is 25 +Proc2::Input is 25 +Input is 26 +Proc2::Input is 26 +Input is 27 +Proc2::Input is 27 +Input is 28 +Proc2::Input is 28 +Input is 29 +Proc2::Input is 29 +Input is 30 +Proc2::Input is 30 +Input is 31 +Proc2::Input is 31 +Input is 32 +Proc2::Input is 32 +Input is 33 +Proc2::Input is 33 +Input is 34 +Proc2::Input is 34 +Input is 35 +Proc2::Input is 35 +Input is 36 +Proc2::Input is 36 +Input is 37 +Proc2::Input is 37 +Input is 38 +Proc2::Input is 38 +Input is 39 +Proc2::Input is 39 +Input is 40 +Proc2::Input is 40 +Input is 41 +Proc2::Input is 41 +Input is 42 +Proc2::Input is 42 +Input is 43 +Proc2::Input is 43 +Input is 44 +Proc2::Input is 44 +Input is 45 +Proc2::Input is 45 +Input is 46 +Proc2::Input is 46 +Input is 47 +Proc2::Input is 47 +Input is 48 +Proc2::Input is 48 +Input is 49 +Proc2::Input is 49 +Input is 50 +Proc2::Input is 50 +Input is 51 +Proc2::Input is 51 +Input is 52 +Proc2::Input is 52 +Input is 53 +Proc2::Input is 53 +Input is 54 +Proc2::Input is 54 +Input is 55 +Proc2::Input is 55 +Input is 56 +Proc2::Input is 56 +Input is 57 +Proc2::Input is 57 +Input is 58 +Proc2::Input is 58 +Input is 59 +Proc2::Input is 59 +Input is 60 +Proc2::Input is 60 +Input is 61 +Proc2::Input is 61 +Input is 62 +Proc2::Input is 62 +Input is 63 +Proc2::Input is 63 +Input is 64 +Proc2::Input is 64 +Input is 65 +Proc2::Input is 65 +Input is 66 +Proc2::Input is 66 +Input is 67 +Proc2::Input is 67 +Input is 68 +Proc2::Input is 68 +Input is 69 +Proc2::Input is 69 +Input is 70 +Proc2::Input is 70 +Input is 71 +Proc2::Input is 71 +Input is 72 +Proc2::Input is 72 +Input is 73 +Proc2::Input is 73 +Input is 74 +Proc2::Input is 74 +Input is 75 +Proc2::Input is 75 +Input is 76 +Proc2::Input is 76 +Input is 77 +Proc2::Input is 77 +Input is 78 +Proc2::Input is 78 +Input is 79 +Proc2::Input is 79 +Input is 80 +Proc2::Input is 80 +Input is 81 +Proc2::Input is 81 +Input is 82 +Proc2::Input is 82 +Input is 83 +Proc2::Input is 83 +Input is 84 +Proc2::Input is 84 +Input is 85 +Proc2::Input is 85 +Input is 86 +Proc2::Input is 86 +Input is 87 +Proc2::Input is 87 +Input is 88 +Proc2::Input is 88 +Input is 89 +Proc2::Input is 89 +Input is 90 +Proc2::Input is 90 +Input is 91 +Proc2::Input is 91 +Input is 92 +Proc2::Input is 92 +Input is 93 +Proc2::Input is 93 +Input is 94 +Proc2::Input is 94 +Input is 95 +Proc2::Input is 95 +Input is 96 +Proc2::Input is 96 +Input is 97 +Proc2::Input is 97 +Input is 98 +Proc2::Input is 98 +Input is 99 +Proc2::Input is 99 diff --git a/src/systemc/tests/systemc/misc/communication/channel/hshake1/hshake1.cpp b/src/systemc/tests/systemc/misc/communication/channel/hshake1/hshake1.cpp new file mode 100644 index 000000000..a990b86d3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hshake1/hshake1.cpp @@ -0,0 +1,131 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + hshake1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo& in; + sc_fifo& done; + sc_fifo& out; + sc_fifo& ready; + + // Constructor + proc1 ( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& IN_, + sc_fifo& DONE, + sc_fifo& OUT_, + sc_fifo& READY ) + : in(IN_), done(DONE), out(OUT_), ready(READY) + { + clk(CLOCK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + ready.write(1); + bool done_ = done.read(); + cout << "Done is " << done_ << endl; + for (int i=0; i < 100; i++) { + out.write(i); + int in_ = in.read(); + cout << "Input is " << in_ << endl; + } + ready.write(0); + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo& in; + sc_fifo& done; + sc_fifo& out; + sc_fifo& ready; + + // Constructor + proc2 ( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& IN_, + sc_fifo& DONE, + sc_fifo& OUT_, + sc_fifo& READY ) + : in(IN_), done(DONE), out(OUT_), ready(READY) + { + clk(CLOCK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + bool done_ = done.read(); + cout << "Proc2::Done is " << done_ << endl; + ready.write(1); + for (int i=0; i < 100; i++) { + out.write(i); + int in_ = in.read(); + cout << "Proc2::Input is " << in_ << endl; + } + ready.write(0); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo a; + sc_fifo b; + sc_fifo c("C", 10); + // sc_fifo d("D", 2); + sc_fifo d("D", 1); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c, a, d, b); + proc2 p2("P2", clock, d, b, c, a); + + sc_start(1000, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/hshake2/golden/hshake2.log b/src/systemc/tests/systemc/misc/communication/channel/hshake2/golden/hshake2.log new file mode 100644 index 000000000..a1f8a6efe --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hshake2/golden/hshake2.log @@ -0,0 +1,203 @@ +SystemC Simulation +Proc2::Done is 1 +Done is 1 +Input is 0 +Proc2::Input is 0 +Input is 1 +Proc2::Input is 1 +Input is 2 +Proc2::Input is 2 +Input is 3 +Proc2::Input is 3 +Input is 4 +Proc2::Input is 4 +Input is 5 +Proc2::Input is 5 +Input is 6 +Proc2::Input is 6 +Input is 7 +Proc2::Input is 7 +Input is 8 +Proc2::Input is 8 +Input is 9 +Proc2::Input is 9 +Input is 10 +Proc2::Input is 10 +Input is 11 +Proc2::Input is 11 +Input is 12 +Proc2::Input is 12 +Input is 13 +Proc2::Input is 13 +Input is 14 +Proc2::Input is 14 +Input is 15 +Proc2::Input is 15 +Input is 16 +Proc2::Input is 16 +Input is 17 +Proc2::Input is 17 +Input is 18 +Proc2::Input is 18 +Input is 19 +Proc2::Input is 19 +Input is 20 +Proc2::Input is 20 +Input is 21 +Proc2::Input is 21 +Input is 22 +Proc2::Input is 22 +Input is 23 +Proc2::Input is 23 +Input is 24 +Proc2::Input is 24 +Input is 25 +Proc2::Input is 25 +Input is 26 +Proc2::Input is 26 +Input is 27 +Proc2::Input is 27 +Input is 28 +Proc2::Input is 28 +Input is 29 +Proc2::Input is 29 +Input is 30 +Proc2::Input is 30 +Input is 31 +Proc2::Input is 31 +Input is 32 +Proc2::Input is 32 +Input is 33 +Proc2::Input is 33 +Input is 34 +Proc2::Input is 34 +Input is 35 +Proc2::Input is 35 +Input is 36 +Proc2::Input is 36 +Input is 37 +Proc2::Input is 37 +Input is 38 +Proc2::Input is 38 +Input is 39 +Proc2::Input is 39 +Input is 40 +Proc2::Input is 40 +Input is 41 +Proc2::Input is 41 +Input is 42 +Proc2::Input is 42 +Input is 43 +Proc2::Input is 43 +Input is 44 +Proc2::Input is 44 +Input is 45 +Proc2::Input is 45 +Input is 46 +Proc2::Input is 46 +Input is 47 +Proc2::Input is 47 +Input is 48 +Proc2::Input is 48 +Input is 49 +Proc2::Input is 49 +Input is 50 +Proc2::Input is 50 +Input is 51 +Proc2::Input is 51 +Input is 52 +Proc2::Input is 52 +Input is 53 +Proc2::Input is 53 +Input is 54 +Proc2::Input is 54 +Input is 55 +Proc2::Input is 55 +Input is 56 +Proc2::Input is 56 +Input is 57 +Proc2::Input is 57 +Input is 58 +Proc2::Input is 58 +Input is 59 +Proc2::Input is 59 +Input is 60 +Proc2::Input is 60 +Input is 61 +Proc2::Input is 61 +Input is 62 +Proc2::Input is 62 +Input is 63 +Proc2::Input is 63 +Input is 64 +Proc2::Input is 64 +Input is 65 +Proc2::Input is 65 +Input is 66 +Proc2::Input is 66 +Input is 67 +Proc2::Input is 67 +Input is 68 +Proc2::Input is 68 +Input is 69 +Proc2::Input is 69 +Input is 70 +Proc2::Input is 70 +Input is 71 +Proc2::Input is 71 +Input is 72 +Proc2::Input is 72 +Input is 73 +Proc2::Input is 73 +Input is 74 +Proc2::Input is 74 +Input is 75 +Proc2::Input is 75 +Input is 76 +Proc2::Input is 76 +Input is 77 +Proc2::Input is 77 +Input is 78 +Proc2::Input is 78 +Input is 79 +Proc2::Input is 79 +Input is 80 +Proc2::Input is 80 +Input is 81 +Proc2::Input is 81 +Input is 82 +Proc2::Input is 82 +Input is 83 +Proc2::Input is 83 +Input is 84 +Proc2::Input is 84 +Input is 85 +Proc2::Input is 85 +Input is 86 +Proc2::Input is 86 +Input is 87 +Proc2::Input is 87 +Input is 88 +Proc2::Input is 88 +Input is 89 +Proc2::Input is 89 +Input is 90 +Proc2::Input is 90 +Input is 91 +Proc2::Input is 91 +Input is 92 +Proc2::Input is 92 +Input is 93 +Proc2::Input is 93 +Input is 94 +Proc2::Input is 94 +Input is 95 +Proc2::Input is 95 +Input is 96 +Proc2::Input is 96 +Input is 97 +Proc2::Input is 97 +Input is 98 +Proc2::Input is 98 +Input is 99 +Proc2::Input is 99 diff --git a/src/systemc/tests/systemc/misc/communication/channel/hshake2/hshake2.cpp b/src/systemc/tests/systemc/misc/communication/channel/hshake2/hshake2.cpp new file mode 100644 index 000000000..232512f32 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hshake2/hshake2.cpp @@ -0,0 +1,130 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + hshake2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo& in; + sc_fifo& done; + sc_fifo& out; + sc_fifo& ready; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& IN_, + sc_fifo& DONE, + sc_fifo& OUT_, + sc_fifo& READY ) + : in(IN_), done(DONE), out(OUT_), ready(READY) + { + clk(CLOCK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + ready.write(1); + bool done_ = done.read(); + cout << "Done is " << done_ << endl; + for (int i=0; i < 100; i++) { + out.write(i); + int in_ = in.read(); + cout << "Input is " << in_ << endl; + } + ready.write(0); + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo& in; + sc_fifo& done; + sc_fifo& out; + sc_fifo& ready; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& IN_, + sc_fifo& DONE, + sc_fifo& OUT_, + sc_fifo& READY) + : in(IN_), done(DONE), out(OUT_), ready(READY) + { + clk(CLOCK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + ready.write(1); + bool done_ = done.read(); + cout << "Proc2::Done is " << done_ << endl; + for (int i=0; i < 100; i++) { + out.write(i); + int in_ = in.read(); + cout << "Proc2::Input is " << in_ << endl; + } + ready.write(0); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo a(3); + sc_fifo b(10); + sc_fifo c("C", 10); + sc_fifo d("D", 2); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c, a, d, b); + proc2 p2("P2", clock, d, b, c, a); + + sc_start(1000, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/hwsw/golden/hwsw.log b/src/systemc/tests/systemc/misc/communication/channel/hwsw/golden/hwsw.log new file mode 100644 index 000000000..6ff1eec49 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hwsw/golden/hwsw.log @@ -0,0 +1,13 @@ +SystemC Simulation +A = 206, B = 69, C = 91, D = 137, SUM = 366 +A = 92, B = 157, C = 173, D = -65, SUM = 422 +A = 69, B = 108, C = 53, D = -39, SUM = 230 +A = 179, B = 109, C = 39, D = 70, SUM = 327 +A = 108, B = 176, C = 132, D = -68, SUM = 416 +A = 150, B = 15, C = 133, D = 135, SUM = 298 +A = 147, B = 21, C = 193, D = 126, SUM = 361 +A = 86, B = 217, C = 207, D = -131, SUM = 510 +A = 83, B = 120, C = 240, D = -37, SUM = 443 +A = 242, B = 85, C = 213, D = 157, SUM = 540 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/hwsw/hwsw.cpp b/src/systemc/tests/systemc/misc/communication/channel/hwsw/hwsw.cpp new file mode 100644 index 000000000..9c19a17f0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/hwsw/hwsw.cpp @@ -0,0 +1,181 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + hwsw.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +static int randa[] = { 3278, 3420, 1349, 13491, 9234028, 234902, + 13971, 1498710, 1348179, 1389810, 190101, 92384 }; +static int randb[] = { 1349, 20893, 2090092, 8813, 87472, 73231, + 59413, 42713, 3192, 45653, 565643, 78931, 573231 }; +static int randc[] = { 3419, 82093, 9013, 1831, 74372, 233861, + 421313, 47823, 3902192, 93245653, 77565643, 77234, 10192 }; + +SC_MODULE( adder_sub ) +{ + SC_HAS_PROCESS( adder_sub ); + + sc_in_clk clk; + + sc_fifo& Sa; //input + sc_fifo& Sb; //input + sc_fifo& Sc; //input + sc_fifo& Sd; //output + sc_fifo& Ssum; //output + + // constructor + adder_sub( sc_module_name NAME, + sc_clock& CLK, + sc_fifo& SA, + sc_fifo& SB, + sc_fifo& SC, + sc_fifo& SD, + sc_fifo& SSUM ) + : Sa(SA), Sb(SB), Sc(SC), Sd(SD), Ssum(SSUM) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + // Process functionality in member function below + void entry(); +}; + + +int add(int a, int b) +{ + return (a + b); +} + +void adder_sub::entry() +{ + int sum; + int a, b, c, d; + + while (true) { + // Read inputs + a = Sa.read(); + b = Sb.read(); + c = Sc.read(); + + // Perform the computation. + sum = add(a, b); + sum = add(sum, c); + d = a - b; + + // Write outputs + Ssum.write(sum); + Sd.write(d); + // Loop back to do { wait(); } while . + } + +} // end of entry function + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + sc_fifo& Ssum; //input + sc_fifo& Sdiff; //input + sc_fifo& Sa; //output + sc_fifo& Sb; //output + sc_fifo& Sc; //output + + // constructor + testbench( sc_module_name NAME, + sc_clock& CLK, + sc_fifo& SSUM, + sc_fifo& SDIFF, + sc_fifo& SA, + sc_fifo& SB, + sc_fifo& SC ) + : Ssum(SSUM), Sdiff(SDIFF), Sa(SA), Sb(SB), Sc(SC) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + // Process functionality in member function below + void entry(); +}; + + +void testbench::entry() +{ + int a, b, c, d; + int sum; + int i; + char buf[BUFSIZ]; + + for (i=0; i < 10; i++) { + a = randa[i % (sizeof(randa)/sizeof(randa[0]))] & 0x0ff; + b = randb[i % (sizeof(randb)/sizeof(randb[0]))] & 0x0ff; + c = randc[i % (sizeof(randc)/sizeof(randc[0]))] & 0x0ff; + + Sa.write(a); + Sb.write(b); + Sc.write(c); + sum = Ssum.read(); + d = Sdiff.read(); + // printf("A = %d, B = %d, C = %d, D = %d, SUM = %d\n", a, b, c, d, sum); + sprintf(buf, "A = %d, B = %d, C = %d, D = %d, SUM = %d\n", a, b, c, d, sum); + cout << buf; + } + sc_stop(); + +} // end of entry function + +// Main routine + +int sc_main(int ac, char *av[]) +{ + sc_fifo a; + sc_fifo b; + sc_fifo c; + sc_fifo d; + sc_fifo sum; + sc_clock clock("Clock", 10, SC_NS, 0.5, 0, SC_NS, 0); + + testbench T("TB", clock, sum, d, a, b, c); + adder_sub AS("AS", clock, a, b, c, d, sum); + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/test1/golden/test1.log b/src/systemc/tests/systemc/misc/communication/channel/test1/golden/test1.log new file mode 100644 index 000000000..223bed689 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test1/golden/test1.log @@ -0,0 +1,25 @@ +SystemC Simulation +Proc1:: Waiting 10 cycles before reading +Proc2:: Write +Proc2:: Write completed +Proc2:: Wait 10 cycles before write +Proc1:: Wait completed +Proc1:: Read. Value = 1 +Proc1:: Read +Proc2:: Wait completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Loop start +Proc1:: Read completed. Value = 2 +Proc1:: Read. Value = 3 +Proc1:: Loop start +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc1:: Read. Value = 9 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/test1/test1.cpp b/src/systemc/tests/systemc/misc/communication/channel/test1/test1.cpp new file mode 100644 index 000000000..7e3253f43 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test1/test1.cpp @@ -0,0 +1,135 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo& in; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& IN_ ) + : in(IN_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + int val; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Read\n"; + val = in.read(); + cout << "Proc1:: Read completed. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Loop start\n"; + int i = 1; + while (true) { + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + wait( i ); + i += 3; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo& out; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& OUT_ ) + : out(OUT_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + cout << "Proc2:: Write\n"; + out.write(1); + cout << "Proc2:: Write completed\n"; + cout << "Proc2:: Wait 10 cycles before write\n"; + wait( 10 ); + cout << "Proc2:: Wait completed\n"; + cout << "Proc2:: Write\n"; + out.write(2); + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Write\n"; + out.write(3); + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Loop start\n"; + for (int i=4; i<10; i++) { + out.write(i); + wait( i + 2 ); + } + sc_stop(); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo c("C"); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c); + proc2 p2("P2", clock, c); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/test2/golden/test2.log b/src/systemc/tests/systemc/misc/communication/channel/test2/golden/test2.log new file mode 100644 index 000000000..48875d567 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test2/golden/test2.log @@ -0,0 +1,22 @@ +SystemC Simulation +Proc1:: Waiting 10 cycles before reading +Proc2:: Write +Proc2:: Write completed +Proc2:: Wait 10 cycles before write +Proc1:: Wait completed +Proc1:: Read. Value = 1 +Proc1:: Read +Proc2:: Wait completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Loop start +Proc1:: Read completed. Value = 2 +Proc1:: Read. Value = 3 +Proc1:: Loop start +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 9 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/test2/test2.cpp b/src/systemc/tests/systemc/misc/communication/channel/test2/test2.cpp new file mode 100644 index 000000000..d8b893b86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test2/test2.cpp @@ -0,0 +1,137 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo& in; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& IN_ ) + : in(IN_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + int val; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Read\n"; + val = in.read(); + cout << "Proc1:: Read completed. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Loop start\n"; + int i = 1; + int j; + while (true) { + j = in; + cout << "Proc1:: Read. Value = " << j << "\n"; + if (in > 5 && in < 7) cout << "Proc1:: Special value 6 read\n"; + wait( i ); + i += 3; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo& out; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& OUT_ ) + : out(OUT_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + cout << "Proc2:: Write\n"; + out = 1; + cout << "Proc2:: Write completed\n"; + cout << "Proc2:: Wait 10 cycles before write\n"; + wait( 10 ); + cout << "Proc2:: Wait completed\n"; + cout << "Proc2:: Write\n"; + out = 2; + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Write\n"; + out = 3; + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Loop start\n"; + for (int i=4; i<10; i++) { + out = i; + wait( i + 2 ); + } + sc_stop(); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo c("C"); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c); + proc2 p2("P2", clock, c); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/test3/golden/test3.log b/src/systemc/tests/systemc/misc/communication/channel/test3/golden/test3.log new file mode 100644 index 000000000..6153bb185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test3/golden/test3.log @@ -0,0 +1,48 @@ +SystemC Simulation +Proc1:: Waiting 10 cycles before reading +Proc2:: Write 8 values +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc1:: Wait completed +Proc1:: Read. Value = 1 +Proc1:: Read. Value = 2 +Proc1:: Read. Value = 3 +Proc1:: Waiting 10 cycles before reading +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Write completed +Proc2:: Wait 30 cycles before write +Proc1:: Wait completed +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc2:: Wait completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Loop start +Proc1:: Read. Value = 9 +Proc1:: Loop start +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc1:: Read. Value = 9 +Proc1:: Read. Value = 10 +Proc1:: Read. Value = 11 +Proc1:: Read. Value = 12 +Proc1:: Read. Value = 13 +Proc1:: Read. Value = 14 +Proc1:: Read. Value = 15 +Proc1:: Read. Value = 16 +Proc1:: Read. Value = 17 +Proc1:: Read. Value = 18 +Proc1:: Read. Value = 19 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/test3/test3.cpp b/src/systemc/tests/systemc/misc/communication/channel/test3/test3.cpp new file mode 100644 index 000000000..ad5262db8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test3/test3.cpp @@ -0,0 +1,150 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo& in; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& IN_ ) + : in(IN_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + int val; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Loop start\n"; + int i = 1; + while (true) { + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + wait( i ); + i += 3; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo& out; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& OUT_ ) + : out(OUT_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + cout << "Proc2:: Write 8 values\n"; + for (int i = 1; i<=8; i++) { + out.write(i); + cout << "Proc2:: Written one value\n"; + } + cout << "Proc2:: Write completed\n"; + cout << "Proc2:: Wait 30 cycles before write\n"; + wait( 30 ); + cout << "Proc2:: Wait completed\n"; + cout << "Proc2:: Write\n"; + out.write(9); + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Loop start\n"; + for (int i=4; i<20; i++) { + out.write(i); + wait( i + 2 ); + } + wait( 150 * clk ); + sc_stop(); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo c("C", 5); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c); + proc2 p2("P2", clock, c); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/channel/test4/golden/test4.log b/src/systemc/tests/systemc/misc/communication/channel/test4/golden/test4.log new file mode 100644 index 000000000..6153bb185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test4/golden/test4.log @@ -0,0 +1,48 @@ +SystemC Simulation +Proc1:: Waiting 10 cycles before reading +Proc2:: Write 8 values +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc1:: Wait completed +Proc1:: Read. Value = 1 +Proc1:: Read. Value = 2 +Proc1:: Read. Value = 3 +Proc1:: Waiting 10 cycles before reading +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Written one value +Proc2:: Write completed +Proc2:: Wait 30 cycles before write +Proc1:: Wait completed +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc2:: Wait completed +Proc2:: Write +Proc2:: Write Completed +Proc2:: Loop start +Proc1:: Read. Value = 9 +Proc1:: Loop start +Proc1:: Read. Value = 4 +Proc1:: Read. Value = 5 +Proc1:: Read. Value = 6 +Proc1:: Read. Value = 7 +Proc1:: Read. Value = 8 +Proc1:: Read. Value = 9 +Proc1:: Read. Value = 10 +Proc1:: Read. Value = 11 +Proc1:: Read. Value = 12 +Proc1:: Read. Value = 13 +Proc1:: Read. Value = 14 +Proc1:: Read. Value = 15 +Proc1:: Read. Value = 16 +Proc1:: Read. Value = 17 +Proc1:: Read. Value = 18 +Proc1:: Read. Value = 19 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/communication/channel/test4/test4.cpp b/src/systemc/tests/systemc/misc/communication/channel/test4/test4.cpp new file mode 100644 index 000000000..79aa179e4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/channel/test4/test4.cpp @@ -0,0 +1,153 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_fifo& in; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& IN_ ) + : in(IN_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + int val; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Waiting 10 cycles before reading\n"; + wait( 10 ); + cout << "Proc1:: Wait completed\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + cout << "Proc1:: Loop start\n"; + int i = 1; + while (true) { + val = in.read(); + cout << "Proc1:: Read. Value = " << val << "\n"; + wait( i ); + i += 3; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_fifo& out; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLOCK, + sc_fifo& OUT_ ) + : out(OUT_) + { + clk( CLOCK ); + SC_THREAD( entry ); + sensitive << clk.pos(); + } + + void entry() { + cout << "Proc2:: Write 8 values\n"; + for (int i = 1; i<=8; i++) { + out.write(i); + cout << "Proc2:: Written one value\n"; + } + cout << "Proc2:: Write completed\n"; + cout << "Proc2:: Wait 30 cycles before write\n"; + wait( 30 ); + cout << "Proc2:: Wait completed\n"; + cout << "Proc2:: Write\n"; + out.write(9); + cout << "Proc2:: Write Completed\n"; + cout << "Proc2:: Loop start\n"; + for (int i=4; i<20; i++) { + out.write(i); + wait( i + 2 ); + } + wait( 150 ); + sc_stop(); + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo c("C", 5); + + sc_clock clock("CLK", 20, SC_NS); + + proc1 p1("P1", clock, c); + proc2 p2("P2", clock, c); + + // sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); + // sc_trace(tf, c, "MyChannel", 3); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test1/golden/test1.log b/src/systemc/tests/systemc/misc/communication/reslv/test1/golden/test1.log new file mode 100644 index 000000000..298c904fe --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test1/golden/test1.log @@ -0,0 +1,26 @@ +SystemC Simulation +P1: Set to Z +P2: Set to 0 +Value on Bus = X +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test1/test1.cpp b/src/systemc/tests/systemc/misc/communication/reslv/test1/test1.cpp new file mode 100644 index 000000000..9af5f4ddf --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test1/test1.cpp @@ -0,0 +1,149 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved& out; + sc_in in; + + proc1( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P1: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved& out; + sc_in in; + + proc2( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + out = SC_LOGIC_0;//'0'; + } + else { + cout << "P2: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved& in; + + proc3( sc_module_name n, + const sc_signal_resolved& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_logic v; + v = in; + cout << "Value on Bus = " << v.to_char() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved Bus; + sc_signal clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(1, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test2/golden/test2.log b/src/systemc/tests/systemc/misc/communication/reslv/test2/golden/test2.log new file mode 100644 index 000000000..659987cb8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test2/golden/test2.log @@ -0,0 +1,25 @@ +SystemC Simulation +P1: Set to 1 +P2: Set to 0 +Value on Bus = X +P1: Set to Z +P2: Set to Z +Value on Bus = Z +P1: Set to 1 +P2: Set to 0 +Value on Bus = X +P1: Set to Z +P2: Set to Z +Value on Bus = Z +P1: Set to 1 +P2: Set to 0 +Value on Bus = X +P1: Set to Z +P2: Set to Z +Value on Bus = Z +P1: Set to 1 +P2: Set to 0 +Value on Bus = X +P1: Set to Z +P2: Set to Z +Value on Bus = Z diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test2/test2.cpp b/src/systemc/tests/systemc/misc/communication/reslv/test2/test2.cpp new file mode 100644 index 000000000..6caf44f92 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test2/test2.cpp @@ -0,0 +1,149 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved& out; + sc_in in; + + proc1( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + if ((bool) in == false) { + cout << "P1: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P1: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved& out; + sc_in in; + + proc2( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + out = SC_LOGIC_0;//'0'; + } + else { + cout << "P2: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved& in; + + proc3( sc_module_name n, + const sc_signal_resolved& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_logic v; + v = in; + cout << "Value on Bus = " << v.to_char() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved Bus; + sc_signal clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(0, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test3/golden/test3.log b/src/systemc/tests/systemc/misc/communication/reslv/test3/golden/test3.log new file mode 100644 index 000000000..05143f90f --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test3/golden/test3.log @@ -0,0 +1,19 @@ +SystemC Simulation +P1: Set to Z +P2: Set to 1 +Value on Bus = X +Value on Bus = 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test3/test3.cpp b/src/systemc/tests/systemc/misc/communication/reslv/test3/test3.cpp new file mode 100644 index 000000000..c173895f7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test3/test3.cpp @@ -0,0 +1,150 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved& out; + sc_in in; + + proc1( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P1: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved& out; + sc_in in; + + proc2( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + if ((bool) in == false) { + cout << "P2: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P2: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved& in; + + proc3( sc_module_name n, + const sc_signal_resolved& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_logic v; + v = in; + cout << "Value on Bus = " << v.to_char() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved Bus; + sc_signal clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(1, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test4/golden/test4.log b/src/systemc/tests/systemc/misc/communication/reslv/test4/golden/test4.log new file mode 100644 index 000000000..430c155cb --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test4/golden/test4.log @@ -0,0 +1,23 @@ +SystemC Simulation +Value on Bus = X +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 +P1: Set to Z +P2: Set to 0 +Value on Bus = 0 +P1: Set to 1 +P2: Set to Z +Value on Bus = 1 diff --git a/src/systemc/tests/systemc/misc/communication/reslv/test4/test4.cpp b/src/systemc/tests/systemc/misc/communication/reslv/test4/test4.cpp new file mode 100644 index 000000000..7e98a158a --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/test4/test4.cpp @@ -0,0 +1,158 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved& out; + sc_in in; + + proc1( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_THREAD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + wait(); + while (true) { + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + out = SC_LOGIC_1;//'1'; + } + else { + cout << "P1: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } + wait(); + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved& out; + sc_in in; + + proc2( sc_module_name n, + sc_signal_resolved& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_THREAD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + wait(); + while (true) { + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + out = SC_LOGIC_0;//'0'; + } + else { + cout << "P2: Set to Z" << endl; + out = SC_LOGIC_Z;//'Z'; + } + wait(); + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved& in; + + proc3( sc_module_name n, + const sc_signal_resolved& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_logic v; + v = in; + cout << "Value on Bus = " << v.to_char() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved Bus; + sc_signal clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(0, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec1/golden/tvec1.log b/src/systemc/tests/systemc/misc/communication/reslv/tvec1/golden/tvec1.log new file mode 100644 index 000000000..2aa2aebad --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec1/golden/tvec1.log @@ -0,0 +1,26 @@ +SystemC Simulation +P1: Set to Z +P2: Set to 0 +Value on Bus = XX +Value on Bus = 00 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11 diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec1/tvec1.cpp b/src/systemc/tests/systemc/misc/communication/reslv/tvec1/tvec1.cpp new file mode 100644 index 000000000..3ff091a66 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec1/tvec1.cpp @@ -0,0 +1,159 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tvec1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +typedef sc_signal_rv<2> sc_signal_resolved_vector; + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved_vector& out; + sc_in in; + + proc1( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + sc_lv<2> a; + + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + a[0] = a[1] = '1'; + out = a; + } + else { + cout << "P1: Set to Z" << endl; + a[0] = a[1] = 'Z'; + out = a; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved_vector& out; + sc_in in; + + proc2( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + sc_lv<2> a; + + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + a[0] = a[1] = '0'; + out = a; + } + else { + cout << "P2: Set to Z" << endl; + a[0] = a[1] = 'Z'; + out = a; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved_vector& in; + + proc3( sc_module_name n, + const sc_signal_resolved_vector& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_lv<2> v; + v = in; + cout << "Value on Bus = " << v.to_string().c_str() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved_vector Bus; + sc_signal clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(1, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec2/golden/tvec2.log b/src/systemc/tests/systemc/misc/communication/reslv/tvec2/golden/tvec2.log new file mode 100644 index 000000000..28298d76a --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec2/golden/tvec2.log @@ -0,0 +1,25 @@ +SystemC Simulation +P1: Set to 1 +P2: Set to 0 +Value on Bus = XX +P1: Set to Z +P2: Set to Z +Value on Bus = ZZ +P1: Set to 1 +P2: Set to 0 +Value on Bus = XX +P1: Set to Z +P2: Set to Z +Value on Bus = ZZ +P1: Set to 1 +P2: Set to 0 +Value on Bus = XX +P1: Set to Z +P2: Set to Z +Value on Bus = ZZ +P1: Set to 1 +P2: Set to 0 +Value on Bus = XX +P1: Set to Z +P2: Set to Z +Value on Bus = ZZ diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec2/tvec2.cpp b/src/systemc/tests/systemc/misc/communication/reslv/tvec2/tvec2.cpp new file mode 100644 index 000000000..01ae9ce94 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec2/tvec2.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tvec2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +typedef sc_signal_rv<2> sc_signal_resolved_vector; + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved_vector& out; + sc_in in; + + proc1( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + sc_lv<2> a; + if ((bool) in == false) { + cout << "P1: Set to 1" << endl; + a = "11"; + out = a; + } + else { + cout << "P1: Set to Z" << endl; + a = "ZZ"; + out = a; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved_vector& out; + sc_in in; + + proc2( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + sc_lv<2> a; + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + a = "00"; + out = a; + } + else { + cout << "P2: Set to Z" << endl; + a = "ZZ"; + out = a; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved_vector& in; + + proc3( sc_module_name n, + const sc_signal_resolved_vector& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_lv<2> v; + v = in; + cout << "Value on Bus = " << v.to_string().c_str() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved_vector Bus; + sc_signal clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(0, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec3/golden/tvec3.log b/src/systemc/tests/systemc/misc/communication/reslv/tvec3/golden/tvec3.log new file mode 100644 index 000000000..d6d4b9f94 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec3/golden/tvec3.log @@ -0,0 +1,19 @@ +SystemC Simulation +P1: Set to Z +P2: Set to 1 +Value on Bus = XXX +Value on Bus = 111 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z +P1: Set to Z +P2: Set to 1 +P1: Set to 1 +P2: Set to Z diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec3/tvec3.cpp b/src/systemc/tests/systemc/misc/communication/reslv/tvec3/tvec3.cpp new file mode 100644 index 000000000..ab61ddfbc --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec3/tvec3.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tvec3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +typedef sc_signal_rv<3> sc_signal_resolved_vector; + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved_vector& out; + sc_in in; + + proc1( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + sc_lv<3> a; + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + a = "111"; + out = a; + } + else { + cout << "P1: Set to Z" << endl; + a = "ZZZ"; + out = a; + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved_vector& out; + sc_in in; + + proc2( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_METHOD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + sc_lv<3> a; + if ((bool) in == false) { + cout << "P2: Set to 1" << endl; + a = "111"; + out = a; + } + else { + cout << "P2: Set to Z" << endl; + a = "ZZZ"; + out = a; + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved_vector& in; + + proc3( sc_module_name n, + const sc_signal_resolved_vector& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_lv<3> v; + v = in; + cout << "Value on Bus = " << v.to_string().c_str() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved_vector Bus; + sc_signal clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + sc_start(1, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec4/golden/tvec4.log b/src/systemc/tests/systemc/misc/communication/reslv/tvec4/golden/tvec4.log new file mode 100644 index 000000000..323840809 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec4/golden/tvec4.log @@ -0,0 +1,23 @@ +SystemC Simulation +Value on Bus = XXXXX +P1: Set to 1 +P2: Set to Z +Value on Bus = 11001 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00110 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11001 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00110 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11001 +P1: Set to Z +P2: Set to 0 +Value on Bus = 00110 +P1: Set to 1 +P2: Set to Z +Value on Bus = 11001 diff --git a/src/systemc/tests/systemc/misc/communication/reslv/tvec4/tvec4.cpp b/src/systemc/tests/systemc/misc/communication/reslv/tvec4/tvec4.cpp new file mode 100644 index 000000000..b66615baf --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/reslv/tvec4/tvec4.cpp @@ -0,0 +1,162 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tvec4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +typedef sc_signal_rv<5> sc_signal_resolved_vector; + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_signal_resolved_vector& out; + sc_in in; + + proc1( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_THREAD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc1::entry() +{ + wait(); + sc_lv<5> a; + while (true) { + if ((bool) in == true) { + cout << "P1: Set to 1" << endl; + a = "11001"; out = a; + } + else { + cout << "P1: Set to Z" << endl; + a = "ZZZZZ"; out = a; + } + wait(); + } +} + + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_signal_resolved_vector& out; + sc_in in; + + proc2( sc_module_name n, + sc_signal_resolved_vector& OUT_, + sc_signal& IN_ ) + : out(OUT_) + { + in(IN_); + SC_THREAD( entry ); + sensitive << in; + } + + void entry(); +}; + +void +proc2::entry() +{ + wait(); + sc_lv<5> a; + while (true) { + if ((bool) in == false) { + cout << "P2: Set to 0" << endl; + a = "00110"; out = a; + } + else { + cout << "P2: Set to Z" << endl; + a = "ZZZZZ"; out = a; + } + wait(); + } +} + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + const sc_signal_resolved_vector& in; + + proc3( sc_module_name n, + const sc_signal_resolved_vector& IN_ ) + : in(IN_) + { + SC_METHOD( entry ); + sensitive << in; + } + + void entry() + { + sc_lv<5> v; + v = in; + cout << "Value on Bus = " << v.to_string().c_str() << endl; + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_signal_resolved_vector Bus; + sc_signal clock; + + proc1 P1("P1", Bus, clock); + proc2 P2("P2", Bus, clock); + proc3 P3("P3", Bus); + + clock = 0; + sc_start(0, SC_NS); + clock = 1; + sc_start(10, SC_NS); + for (int i = 0; i < 3; i++) { + clock = 0; + sc_start(10, SC_NS); + clock = 1; + sc_start(10, SC_NS); + } + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/communication/signals/aggregate/golden/rgb.log b/src/systemc/tests/systemc/misc/communication/signals/aggregate/golden/rgb.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/aggregate/golden/rgb.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/communication/signals/aggregate/rgb.cpp b/src/systemc/tests/systemc/misc/communication/signals/aggregate/rgb.cpp new file mode 100644 index 000000000..4d77eb316 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/aggregate/rgb.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + rgb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "rgb.h" + +void sc_trace(sc_trace_file* tf,const rgb_t& s, const std::string& NAME) { + sc_trace(tf, s.red, NAME + ".red"); + sc_trace(tf, s.green, NAME + ".green"); + sc_trace(tf, s.blue, NAME + ".blue"); +} + +void +some_process::entry() +{ + rgb_t clin; + rgb_t clout; + + while( true ) { + clin = color_in.read(); + clout = clin; + clout.red >>= 1; + clout.green >>= 2; + clout.blue <<= 1; + color_out.write( clout ); + wait(); + } +} + +int +sc_main( int, char*[] ) +{ + sc_signal in; + sc_signal out; + + sc_clock clk( "CLK" ); + + some_process foo( "FOO", clk, in, out ); + + sc_start( 1000, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/communication/signals/aggregate/rgb.h b/src/systemc/tests/systemc/misc/communication/signals/aggregate/rgb.h new file mode 100644 index 000000000..4feb1e275 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/aggregate/rgb.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + rgb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +struct rgb_t +{ + unsigned red; + unsigned green; + unsigned blue; + + bool operator == ( const rgb_t& rhs ) const + { + return ( red == rhs.red && green == rhs.green && blue == rhs.blue ); + } +}; + +inline +ostream& +operator << ( ostream& os, const rgb_t& a ) +{ + os << a.red << " " << a.green << " " << a.blue; + return os; +} + +SC_MODULE( some_process ) +{ + SC_HAS_PROCESS( some_process ); + + sc_in_clk clk; + sc_in color_in; + sc_out color_out; + + // Constructor + + some_process( sc_module_name NAME, + sc_clock& CLK, + sc_signal& COLOR_IN, + sc_signal& COLOR_OUT) + { + clk( CLK ); + color_in( COLOR_IN ); + color_out( COLOR_OUT ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/communication/signals/bool/bool.f b/src/systemc/tests/systemc/misc/communication/signals/bool/bool.f new file mode 100644 index 000000000..f5262a45b --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/bool/bool.f @@ -0,0 +1,3 @@ +bool/proc1.cpp +bool/proc2.cpp +bool/main.cpp diff --git a/src/systemc/tests/systemc/misc/communication/signals/bool/golden/bool.log b/src/systemc/tests/systemc/misc/communication/signals/bool/golden/bool.log new file mode 100644 index 000000000..c2c0e4e87 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/bool/golden/bool.log @@ -0,0 +1,50 @@ +SystemC Simulation +if( signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works diff --git a/src/systemc/tests/systemc/misc/communication/signals/bool/main.cpp b/src/systemc/tests/systemc/misc/communication/signals/bool/main.cpp new file mode 100644 index 000000000..cea23cb69 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/bool/main.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc1.h" +#include "proc2.h" + +int +sc_main( int, char*[] ) +{ + sc_signal ack; + sc_signal ready; + + ack = true; + ready = true; + + sc_clock clk( "Clock", 20, SC_NS, 0.5, 0.0, SC_NS ); + + proc1 P1( "P1", clk, ack, ready ); + proc2 P2( "P2", clk, ready, ack ); + + sc_start( 500, SC_NS ); + + return 0; +} + + diff --git a/src/systemc/tests/systemc/misc/communication/signals/bool/proc1.cpp b/src/systemc/tests/systemc/misc/communication/signals/bool/proc1.cpp new file mode 100644 index 000000000..8eff2df8f --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/bool/proc1.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc1.h" + +void +proc1::entry() +{ + while( true ) { + if( ready ) { + ack.write( false ); + cout << "if( signal ) works" << endl; + } + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/communication/signals/bool/proc1.h b/src/systemc/tests/systemc/misc/communication/signals/bool/proc1.h new file mode 100644 index 000000000..561fb30d2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/bool/proc1.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PROC1_H +#define PROC1_H + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + sc_in ready; + sc_out ack; + + proc1( sc_module_name NAME, + sc_clock& CLK, + sc_signal& READY, + sc_signal& ACK ) + { + clk( CLK); + ready( READY ); + ack( ACK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/communication/signals/bool/proc2.cpp b/src/systemc/tests/systemc/misc/communication/signals/bool/proc2.cpp new file mode 100644 index 000000000..dbe1f4004 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/bool/proc2.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc2.h" + +void +proc2::entry() +{ + while( true ) { + if( ! ready.read() ) { + ack.write( true ); + cout << "if( !signal ) works" << endl; + } + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/communication/signals/bool/proc2.h b/src/systemc/tests/systemc/misc/communication/signals/bool/proc2.h new file mode 100644 index 000000000..fbc62a02d --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/bool/proc2.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PROC2_H +#define PROC2_H + +#include "systemc.h" + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + sc_in ready; + sc_out ack; + + proc2( sc_module_name NAME, + sc_clock& CLK, + sc_signal& READY, + sc_signal& ACK ) + { + clk( CLK ); + ready( READY ); + ack( ACK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/communication/signals/float/float.f b/src/systemc/tests/systemc/misc/communication/signals/float/float.f new file mode 100644 index 000000000..c435b03ff --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/float/float.f @@ -0,0 +1,3 @@ +float/proc1.cpp +float/proc2.cpp +float/main.cpp diff --git a/src/systemc/tests/systemc/misc/communication/signals/float/golden/float.log b/src/systemc/tests/systemc/misc/communication/signals/float/golden/float.log new file mode 100644 index 000000000..c2c0e4e87 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/float/golden/float.log @@ -0,0 +1,50 @@ +SystemC Simulation +if( signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works diff --git a/src/systemc/tests/systemc/misc/communication/signals/float/main.cpp b/src/systemc/tests/systemc/misc/communication/signals/float/main.cpp new file mode 100644 index 000000000..df88153d0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/float/main.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc1.h" +#include "proc2.h" + +int +sc_main( int, char*[] ) +{ + sc_signal ack; + sc_signal ready; + + ack = 1.0; + ready = 1.0; + + sc_clock clk( "Clock", 20, SC_NS, 0.5, 0.0, SC_NS ); + + proc1 P1( "P1", clk, ack, ready ); + proc2 P2( "P2", clk, ready, ack ); + + sc_start( 500, SC_NS ); + + return 0; +} + + diff --git a/src/systemc/tests/systemc/misc/communication/signals/float/proc1.cpp b/src/systemc/tests/systemc/misc/communication/signals/float/proc1.cpp new file mode 100644 index 000000000..7af23deaf --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/float/proc1.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc1.h" + +void +proc1::entry() +{ + while( true ) { + if( ready.read() ) { + ack.write( 0.0 ); + cout << "if( signal ) works" << endl; + } + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/communication/signals/float/proc1.h b/src/systemc/tests/systemc/misc/communication/signals/float/proc1.h new file mode 100644 index 000000000..6258013dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/float/proc1.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PROC1_H +#define PROC1_H + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + sc_in ready; + sc_out ack; + + proc1( sc_module_name NAME, + sc_clock& CLK, + sc_signal& READY, + sc_signal& ACK ) + { + clk( CLK ); + ready( READY ); + ack( ACK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/communication/signals/float/proc2.cpp b/src/systemc/tests/systemc/misc/communication/signals/float/proc2.cpp new file mode 100644 index 000000000..b92097761 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/float/proc2.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc2.h" + +void +proc2::entry() +{ + while( true ) { + if( ! ready .read() ) { + ack.write( 1.0 ); + cout << "if( !signal ) works" << endl; + } + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/communication/signals/float/proc2.h b/src/systemc/tests/systemc/misc/communication/signals/float/proc2.h new file mode 100644 index 000000000..23607104f --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/float/proc2.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PROC2_H +#define PROC2_H + +#include "systemc.h" + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + sc_in ready; + sc_out ack; + + proc2( sc_module_name NAME, + sc_clock& CLK, + sc_signal& READY, + sc_signal& ACK ) + { + clk( CLK ); + ready( READY ); + ack( ACK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/communication/signals/int/golden/int.log b/src/systemc/tests/systemc/misc/communication/signals/int/golden/int.log new file mode 100644 index 000000000..c2c0e4e87 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/int/golden/int.log @@ -0,0 +1,50 @@ +SystemC Simulation +if( signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works diff --git a/src/systemc/tests/systemc/misc/communication/signals/int/int.f b/src/systemc/tests/systemc/misc/communication/signals/int/int.f new file mode 100644 index 000000000..baac075a8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/int/int.f @@ -0,0 +1,3 @@ +int/proc1.cpp +int/proc2.cpp +int/main.cpp diff --git a/src/systemc/tests/systemc/misc/communication/signals/int/main.cpp b/src/systemc/tests/systemc/misc/communication/signals/int/main.cpp new file mode 100644 index 000000000..2b51e2fe9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/int/main.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc1.h" +#include "proc2.h" + +int +sc_main( int, char*[] ) +{ + sc_signal ack; + sc_signal ready; + + ack = 1; + ready = 1; + + sc_clock clk( "Clock", 20, SC_NS, 0.5, 0.0, SC_NS ); + + proc1 P1( "P1", clk, ack, ready ); + proc2 P2( "P2", clk, ready, ack ); + + sc_start( 500, SC_NS ); + + return 0; +} + + diff --git a/src/systemc/tests/systemc/misc/communication/signals/int/proc1.cpp b/src/systemc/tests/systemc/misc/communication/signals/int/proc1.cpp new file mode 100644 index 000000000..f81b89806 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/int/proc1.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc1.h" + +void +proc1::entry() +{ + while( true ) { + if( ready ) { + ack.write( 0 ); + cout << "if( signal ) works" << endl; + } + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/communication/signals/int/proc1.h b/src/systemc/tests/systemc/misc/communication/signals/int/proc1.h new file mode 100644 index 000000000..213623915 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/int/proc1.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PROC1_H +#define PROC1_H + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + sc_in ready; + sc_out ack; + + proc1( sc_module_name NAME, + sc_clock& CLK, + sc_signal& READY, + sc_signal& ACK ) + { + clk( CLK ); + ready( READY ); + ack( ACK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/communication/signals/int/proc2.cpp b/src/systemc/tests/systemc/misc/communication/signals/int/proc2.cpp new file mode 100644 index 000000000..9dbe9bbd1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/int/proc2.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc2.h" + +void +proc2::entry() +{ + while( true ) { + if( ! ready.read() ) { + ack.write( 5 ); + cout << "if( !signal ) works" << endl; + } + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/communication/signals/int/proc2.h b/src/systemc/tests/systemc/misc/communication/signals/int/proc2.h new file mode 100644 index 000000000..dde150122 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/int/proc2.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PROC2_H +#define PROC2_H + +#include "systemc.h" + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + sc_in ready; + sc_out ack; + + proc2( sc_module_name NAME, + sc_clock& CLK, + sc_signal& READY, + sc_signal& ACK ) + { + clk( CLK ); + ready( READY ); + ack( ACK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/communication/signals/unsigned/golden/unsigned.log b/src/systemc/tests/systemc/misc/communication/signals/unsigned/golden/unsigned.log new file mode 100644 index 000000000..c2c0e4e87 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/unsigned/golden/unsigned.log @@ -0,0 +1,50 @@ +SystemC Simulation +if( signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works +if( signal ) works +if( !signal ) works diff --git a/src/systemc/tests/systemc/misc/communication/signals/unsigned/main.cpp b/src/systemc/tests/systemc/misc/communication/signals/unsigned/main.cpp new file mode 100644 index 000000000..463d1a50b --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/unsigned/main.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc1.h" +#include "proc2.h" + +int +sc_main( int, char*[] ) +{ + sc_signal ack; + sc_signal ready; + + ack = 1; + ready = 1; + + sc_clock clk( "Clock", 20, SC_NS, 0.5, 0.0, SC_NS ); + + proc1 P1( "P1", clk, ack, ready ); + proc2 P2( "P2", clk, ready, ack ); + + sc_start( 500, SC_NS ); + + return 0; +} + + diff --git a/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc1.cpp b/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc1.cpp new file mode 100644 index 000000000..ac2f11150 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc1.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc1.h" + +void proc1::entry() +{ + while( true ) { + if( ready ) { + ack.write( 0 ); + cout << "if( signal ) works" << endl; + } + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc1.h b/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc1.h new file mode 100644 index 000000000..6f27bffbe --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc1.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PROC1_H +#define PROC1_H + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + sc_in ready; + sc_out ack; + + proc1( sc_module_name NAME, + sc_clock& CLK, + sc_signal& READY, + sc_signal& ACK ) + { + clk( CLK ); + ready( READY ); + ack( ACK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc2.cpp b/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc2.cpp new file mode 100644 index 000000000..9dbe9bbd1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc2.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "proc2.h" + +void +proc2::entry() +{ + while( true ) { + if( ! ready.read() ) { + ack.write( 5 ); + cout << "if( !signal ) works" << endl; + } + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc2.h b/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc2.h new file mode 100644 index 000000000..d6c37637e --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/unsigned/proc2.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PROC2_H +#define PROC2_H + +#include "systemc.h" + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + sc_in ready; + sc_out ack; + + proc2( sc_module_name NAME, + sc_clock& CLK, + sc_signal& READY, + sc_signal& ACK ) + { + clk( CLK ); + ready( READY ); + ack( ACK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/communication/signals/unsigned/unsigned.f b/src/systemc/tests/systemc/misc/communication/signals/unsigned/unsigned.f new file mode 100644 index 000000000..26547bc07 --- /dev/null +++ b/src/systemc/tests/systemc/misc/communication/signals/unsigned/unsigned.f @@ -0,0 +1,3 @@ +unsigned/proc1.cpp +unsigned/proc2.cpp +unsigned/main.cpp diff --git a/src/systemc/tests/systemc/misc/examples/README b/src/systemc/tests/systemc/misc/examples/README new file mode 100644 index 000000000..b2148915a --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/README @@ -0,0 +1,13 @@ +Example Tests +------------- + +datawidth_int_c - This test consists of a single CC file. + The regression harness looks for the .cc + extension. + +datawidth_int_file - This test consists of multiple CC files + referenced by a single file that lists the + names of each CC file in the design. The + regression harness will detect the list file + by looking for the .f extension. + diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901.cpp b/src/systemc/tests/systemc/misc/examples/a2901/a2901.cpp new file mode 100644 index 000000000..3ed026600 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "a2901.h" +#include "a2901_test.h" + +SC_MODULE( twosome ) +{ + // signals + sig4 Y; + sig1 t_RAM0, t_RAM3, t_Q0, t_Q3, C4; + sig1 Gbar, Pbar, OVR, F3, F30; + sig9 I; + sig4 Aadd, Badd, D; + sig1 RAM0, RAM3, Q0, Q3, C0, OEbar; + + // modules + a2901 SLICE; + a2901_test TB; + + // constructor + twosome( sc_module_name, + const sc_clock& CLK_ ) + : SLICE( "a2901", + CLK_, + I, Aadd, Badd, D, RAM0, RAM3, Q0, Q3, C0, OEbar, + Y, t_RAM0, t_RAM3, t_Q0, t_Q3, C4, Gbar, Pbar, OVR, F3, F30 ), + TB( "a2901_test", + CLK_, + Y, t_RAM0, t_RAM3, t_Q0, t_Q3, C4, Gbar, Pbar, OVR, F3, F30, + I, Aadd, Badd, D, RAM0, RAM3, Q0, Q3, C0, OEbar ) + {} +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + twosome AA( "AA", clk ); + + sc_start( 410000, SC_NS ); + + cout << sc_time_stamp() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901.f b/src/systemc/tests/systemc/misc/examples/a2901/a2901.f new file mode 100644 index 000000000..fa477be5e --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901.f @@ -0,0 +1,6 @@ +a2901/a2901.cpp +a2901/a2901_alu.cpp +a2901/a2901_alu_inputs.cpp +a2901/a2901_edge.cpp +a2901/a2901_output_and_shifter.cpp +a2901/a2901_test.cpp diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901.h b/src/systemc/tests/systemc/misc/examples/a2901/a2901.h new file mode 100644 index 000000000..59c22a29c --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901.h @@ -0,0 +1,105 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef A2901_H +#define A2901_H + +#include "a2901_alu.h" +#include "a2901_alu_inputs.h" +#include "a2901_output_and_shifter.h" +#include "a2901_edge.h" + +SC_MODULE( a2901 ) +{ + // shared state + long RAM[15]; + + // signals + sig4 RE, S, F, Q, A; + sig5 R_ext, S_ext; + + // constructor + a2901( sc_module_name, + const sc_clock& CLK_, + const sig9& I_, + const sig4& Aadd_, + const sig4& Badd_, + const sig4& D_, + const sig1& RAM0_, + const sig1& RAM3_, + const sig1& Q0_, + const sig1& Q3_, + const sig1& C0_, + const sig1& OEbar_, + sig4& Y_, + sig1& t_RAM0_, + sig1& t_RAM3_, + sig1& t_Q0_, + sig1& t_Q3_, + sig1& C4_, + sig1& Gbar_, + sig1& Pbar_, + sig1& OVR_, + sig1& F3_, + sig1& F30_ ) + { + SC_NEW( a2901_alu( "alu", + I_, RE, S, C0_, + R_ext, S_ext, F, OVR_, C4_, Pbar_, Gbar_, + F3_, F30_ ) ); + SC_NEW( a2901_alu_inputs( "alu_inputs", + RAM, + I_, Aadd_, Badd_, D_, Q, + RE, S, A ) ); + SC_NEW( a2901_output_and_shifter( "o_and_s", + I_, OEbar_, A, F, Q, + Y_, t_RAM0_, t_RAM3_, + t_Q0_, t_Q3_ ) ); + SC_NEW( a2901_edge( "edge", + CLK_, + RAM, + I_, Badd_, F, Q3_, Q0_, RAM3_, RAM0_, + Q ) ); + // initialize the RAM (to get rid of UMRs) + for( int i = 0; i < 15; ++ i ) { + RAM[0] = 0; + } + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu.cpp b/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu.cpp new file mode 100644 index 000000000..b8862c63d --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu.cpp @@ -0,0 +1,88 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_alu.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "a2901_alu.h" + +void +a2901_alu::entry() +{ + int I53 = I.read().range(5,3); + + R_ext_v = (I53 == 0x1) ? sc_int<5> (0xf & ~(RE.read())) + : sc_int<5>( RE.read() ); + S_ext_v = (I53 == 0x2) ? sc_int<5> (0xf & ~(S.read()) ) + : sc_int<5>( S.read() ); + R_ext.write(R_ext_v); + S_ext.write(S_ext_v); + + switch (I53) { + case 0x0: + case 0x1: + case 0x2: + result = R_ext_v + S_ext_v + C0.read(); + break; + case 0x3: + result = R_ext_v | S_ext_v; + break; + case 0x4: + result = R_ext_v & S_ext_v; + break; + case 0x5: + result = ~(R_ext_v) & S_ext_v; + break; + case 0x6: + result = R_ext_v ^ S_ext_v; + break; + default: + result = ~(R_ext_v ^ S_ext_v); + } + + F.write(result); + OVR.write(!(R_ext_v[3] ^ S_ext_v[3]) & (R_ext_v[3] ^ result[3])); + //C4.write(result[4]); + C4.write((bool)result[4]); + temp_p = R_ext_v | S_ext_v; + temp_g = R_ext_v & S_ext_v; + Pbar.write((temp_p[0] & temp_p[1] & temp_p[2] & temp_p[3]) ? 0 : 1); + Gbar.write((temp_g[3] | + (temp_p[3] & temp_g[2]) | + (temp_p[3] & temp_p[2] & temp_g[1]) | + (temp_p[3] & temp_p[2] & temp_p[1] & temp_g[0])) ? 0 : 1); + //F3.write(result[3]); + F3.write((bool)result[3]); + F30.write((result[3] | result[2] | result[1] | result[0]) ? 0 : 1); +} diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu.h b/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu.h new file mode 100644 index 000000000..99bfbfcdd --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu.h @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_alu.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef A2901_ALU_H +#define A2901_ALU_H + +#include "common.h" + +SC_MODULE( a2901_alu ) +{ + SC_HAS_PROCESS( a2901_alu ); + + // inputs + const sig9& I; + const sig4& RE; + const sig4& S; + const sig1& C0; + + // outputs + sig5& R_ext; + sig5& S_ext; + sig4& F; + sig1& OVR; + sig1& C4; + sig1& Pbar; + sig1& Gbar; + sig1& F3; + sig1& F30; + + // temporaries + int5 result; + int5 R_ext_v; + int5 S_ext_v; + int5 temp_p; + int5 temp_g; + + // constructor + a2901_alu( sc_module_name, + const sig9& I_, + const sig4& RE_, + const sig4& S_, + const sig1& C0_, + sig5& R_ext_, + sig5& S_ext_, + sig4& F_, + sig1& OVR_, + sig1& C4_, + sig1& Pbar_, + sig1& Gbar_, + sig1& F3_, + sig1& F30_ ) + : I( I_ ), + RE( RE_ ), + S( S_ ), + C0( C0_ ), + R_ext( R_ext_ ), + S_ext( S_ext_ ), + F( F_ ), + OVR( OVR_ ), + C4( C4_ ), + Pbar( Pbar_ ), + Gbar( Gbar_ ), + F3( F3_ ), + F30( F30_ ) + { + SC_METHOD( entry ); + sensitive << I; + sensitive << RE; + sensitive << S; + sensitive << C0; + } + + void entry(); +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu_inputs.cpp b/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu_inputs.cpp new file mode 100644 index 000000000..90d37564e --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu_inputs.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_alu_inputs.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "a2901_alu_inputs.h" + +void +a2901_alu_inputs::entry() +{ + int4 Av; + int4 B; + + Av = RAM[Aadd.read()]; + B = RAM[Badd.read()]; + A.write(Av); + + switch((int)(I.read().range(2,0))) { + case 0x0: + case 0x1: + RE.write(Av); + break; + case 0x2: + case 0x3: + case 0x4: + RE.write(0x0); + break; + default: + RE.write(D.read()); + } + + switch((int)(I.read().range(2,0))) { + case 0x4: + case 0x5: + S.write(Av); + break; + case 0x1: + case 0x3: + S.write(B); + break; + case 0x7: + S.write(0x0); + break; + default: + S.write(Q.read()); + } +} diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu_inputs.h b/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu_inputs.h new file mode 100644 index 000000000..200c98020 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_alu_inputs.h @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_alu_inputs.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef A2901_ALU_INPUTS_H +#define A2901_ALU_INPUTS_H + +#include "common.h" + +SC_MODULE( a2901_alu_inputs ) +{ + SC_HAS_PROCESS( a2901_alu_inputs ); + + // shared state + long* RAM; + + // inputs + const sig9& I; + const sig4& Aadd; + const sig4& Badd; + const sig4& D; + const sig4& Q; + + // outputs + sig4& RE; + sig4& S; + sig4& A; + + // constructor + a2901_alu_inputs( sc_module_name, + long* RAM_, + const sig9& I_, + const sig4& Aadd_, + const sig4& Badd_, + const sig4& D_, + const sig4& Q_, + sig4& RE_, + sig4& S_, + sig4& A_ ) + : RAM( RAM_ ), + I( I_ ), + Aadd( Aadd_ ), + Badd( Badd_ ), + D( D_ ), + Q( Q_ ), + RE( RE_ ), + S( S_ ), + A( A_ ) + { + SC_METHOD( entry ); + sensitive << I; + sensitive << Aadd; + sensitive << Badd; + sensitive << D; + sensitive << Q; + } + + void entry(); +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_edge.cpp b/src/systemc/tests/systemc/misc/examples/a2901/a2901_edge.cpp new file mode 100644 index 000000000..55be5e060 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_edge.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_edge.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "a2901_edge.h" + + +void +a2901_edge::entry() +{ + i86 = I.read().range(8,6); + i87 = I.read().range(8,7); + q31 = Q.read().range(3,1); + q20 = Q.read().range(2,0); + f31 = F.read().range(3,1); + + switch ((int)i87) { + case 0: + RAM[Badd.read()] = RAM[Badd.read()]; + break; + case 1: + RAM[Badd.read()] = F.read(); + break; + case 2: + RAM[Badd.read()] = (RAM3.read(),f31); + break; + case 3: + RAM[Badd.read()] = (f20, RAM0.read()); + break; + } + +#if SUN_HAS_FIXED_THIS_BUG_IN_SC62 + Q.write( (i86 == 0x0) ? F.read() : + (i86 == 0x4) ? sc_uint<4>((Q3.read(),q31)) : + (i86 == 0x6) ? sc_uint<4>((q20,Q0.read())) : + Q.read()); +#else + if( i86 == 0x0 ) { + Q.write( F.read() ); + } else if( i86 == 0x4 ) { + Q.write( ( Q3.read(), q31 ) ); + } else if( i86 == 0x6 ) { + Q.write( ( q20, Q0.read() ) ); + } else { + Q.write( Q.read() ); + } +#endif +} diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_edge.h b/src/systemc/tests/systemc/misc/examples/a2901/a2901_edge.h new file mode 100644 index 000000000..6af666fac --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_edge.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_edge.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef A2901_EDGE_H +#define A2901_EDGE_H + +#include "common.h" + +SC_MODULE( a2901_edge ) +{ + SC_HAS_PROCESS( a2901_edge ); + + // clock + const sc_clock& CLK; + + // shared state + long* RAM; + + // inputs + const sig9& I; + const sig4& Badd; + const sig4& F; + const sig1& Q3; + const sig1& Q0; + const sig1& RAM3; + const sig1& RAM0; + + // outputs + sig4& Q; + + // temporaries + sc_uint<3> i86; + sc_uint<3> i87; + sc_uint<3> q31, q20; + sc_uint<3> f31, f20; + + // constructor + a2901_edge( sc_module_name, + const sc_clock& CLK_, + long* RAM_, + const sig9& I_, + const sig4& Badd_, + const sig4& F_, + const sig1& Q3_, + const sig1& Q0_, + const sig1& RAM3_, + const sig1& RAM0_, + sig4& Q_ ) + : CLK( CLK_ ), + RAM( RAM_ ), + I( I_ ), + Badd( Badd_ ), + F( F_ ), + Q3( Q3_ ), + Q0( Q0_ ), + RAM3( RAM3_ ), + RAM0( RAM0_ ), + Q( Q_ ) + { + SC_METHOD( entry ); + sensitive << CLK.posedge_event(); + } + + void entry(); +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_output_and_shifter.cpp b/src/systemc/tests/systemc/misc/examples/a2901/a2901_output_and_shifter.cpp new file mode 100644 index 000000000..92229c4ec --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_output_and_shifter.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_output_and_shifter.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "a2901_output_and_shifter.h" + +void +a2901_output_and_shifter::entry() +{ + bool i8, i7, f0, f3, q0, q3; + sc_uint<3> i86; + int4 z4; + + z4 = 0x0; + i86 = I.read().range(8,6); + i8 = I.read()[8]; + i7 = I.read()[7]; + f0 = F.read()[0]; + f3 = F.read()[3]; + q0 = Q.read()[0]; + q3 = Q.read()[3]; + + Y.write( ( ( i86 == 0x2 ) && ( OEbar.read() == 0x0)) ? (uint64)A.read() : + (!( i86 == 0x2 ) && ( OEbar.read() == 0x0)) ? + (uint64)F.read() : (uint64)z4); + + t_RAM0 .write( (( i8 == 0x1) && ( i7 == 0x0 )) ? f0 : 0x0); + t_RAM3 .write( (( i8 == 0x1) && ( i7 == 0x1 )) ? f3 : 0x0); + t_Q3 .write( (( i8 == 0x1) && ( i7 == 0x1)) ? q3 : 0x0); + t_Q0 .write( (( i8 == 0x1) && ( i7 == 0x0)) ? q0 : 0x0); +} diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_output_and_shifter.h b/src/systemc/tests/systemc/misc/examples/a2901/a2901_output_and_shifter.h new file mode 100644 index 000000000..63eb7513a --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_output_and_shifter.h @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_output_and_shifter.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef A2901_OUTPUT_AND_SHIFTER_H +#define A2901_OUTPUT_AND_SHIFTER_H + +#include "common.h" + +SC_MODULE( a2901_output_and_shifter ) +{ + SC_HAS_PROCESS( a2901_output_and_shifter ); + + // inputs + const sig9& I; + const sig1& OEbar; + const sig4& A; + const sig4& F; + const sig4& Q; + + // outputs + sig4& Y; + sig1& t_RAM0; + sig1& t_RAM3; + sig1& t_Q0; + sig1& t_Q3; + + // constructor + a2901_output_and_shifter( sc_module_name, + const sig9& I_, + const sig1& OEbar_, + const sig4& A_, + const sig4& F_, + const sig4& Q_, + sig4& Y_, + sig1& t_RAM0_, + sig1& t_RAM3_, + sig1& t_Q0_, + sig1& t_Q3_ ) + : I( I_ ), + OEbar( OEbar_ ), + A( A_ ), + F( F_ ), + Q( Q_ ), + Y( Y_ ), + t_RAM0( t_RAM0_ ), + t_RAM3( t_RAM3_ ), + t_Q0( t_Q0_ ), + t_Q3( t_Q3_ ) + { + SC_METHOD( entry ); + sensitive << I; + sensitive << OEbar; + sensitive << A; + sensitive << F; + sensitive << Q; + } + + void entry(); +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_test.cpp b/src/systemc/tests/systemc/misc/examples/a2901/a2901_test.cpp new file mode 100644 index 000000000..a2a66287f --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_test.cpp @@ -0,0 +1,472 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "a2901_test.h" + +void +a2901_test::entry() +{ + switch (vec_cnt++) { + case 0: + I. write(0x7); + D. write( 0); + C0. write( 0); + OEbar.write( 0); + break; + case 1: + I. write(0x46); + D. write( 0); + C0. write( 0); + OEbar.write( 0); + break; + case 2: + if (Y.read() != 0x0) fprintf(stderr,"Y != 4'b0000 (%0d)\n", (int)Y.read()); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x1) fprintf(stderr,"Pbar != 1'b1\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x1) fprintf(stderr,"F30 != 1'b1 (%0d)\n", (int)F30.read()); + + I.write(0x7); + D.write(0x0); + C0.write(0x0); + OEbar.write(0x0); + + break; + case 3: + I.write(0x46); + D.write(0x0); + C0.write(0x1); + OEbar.write(0x0); + break; + case 4: + if (Y.read() != 0x1) fprintf(stderr,"Y != 4'b0001\n"); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x1) fprintf(stderr,"Pbar != 1'b1\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I.write(0x7); + D.write(0xf); // N("4'b1111") + C0.write(0x0); + OEbar.write(0x0); + + break; + case 5: + I.write(0x46); + D.write(0x0); + C0.write(0x0); + OEbar.write(0x0); + + break; + case 6: + if (Y.read() != 0xf) fprintf(stderr,"Y != 4'b1111\n"); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x1) fprintf(stderr,"F3 != 1'b1\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I.write(0x7); + D.write(0xf); + C0.write(0x0); + OEbar.write(0x0); + + break; + case 7: + I.write(0x46); + D.write(0x0); + C0.write(0x1); + OEbar.write(0x0); + break; + case 8: + if (Y.read() != 0x0) fprintf(stderr,"Y != 4'b0000\n"); + if (C4.read() != 0x1) fprintf(stderr,"C4 != 1'b1\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x1) fprintf(stderr,"F30 != 1'b1\n"); + + I.write(0x7); + D.write(0xf); + C0.write(0x0); + OEbar.write(0x0); + break; + case 9: + I.write(0x46); + D.write(0xf); + C0.write(0x0); + OEbar.write(0x0); + break; + case 10: + if (Y.read() != 0xe) fprintf(stderr,"Y != 4'b1110\n"); + if (C4.read() != 0x1) fprintf(stderr,"C4 != 1'b1\n"); + if (Gbar.read() != 0x0) fprintf(stderr,"Gbar != 1'b0\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x1) fprintf(stderr,"F3 != 1'b1\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I.write(0x7); + D.write(0xf); + C0.write(0x0); + OEbar.write(0x0); + break; + case 11: + I.write(0x46); + D.write(0xf); + C0.write(0x1); + OEbar.write(0x0); + break; + case 12: + if (Y.read() != 0xf) fprintf(stderr,"Y != 4'b1111\n"); + if (C4.read() != 0x1) fprintf(stderr,"C4 != 1'b1\n"); + if (Gbar.read() != 0x0) fprintf(stderr,"Gbar != 1'b0\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x1) fprintf(stderr,"F3 != 1'b1\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0x0); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 13: + I .write( 0x46); + D .write( 0xf); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 14: + if (Y.read() != 0xf) fprintf(stderr,"Y != 4'b1111\n"); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x1) fprintf(stderr,"F3 != 1'b1\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0x0); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 15: + I .write( 0x46); + D .write( 0xf); + C0 .write( 0x1); + OEbar .write( 0x0); + break; + case 16: + if (Y.read() != 0x0) fprintf(stderr,"Y != 4'b0000\n"); + if (C4.read() != 0x1) fprintf(stderr,"C4 != 1'b1\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x1) fprintf(stderr,"F30 != 1'b1\n"); + + I .write( 0x7); + D .write( 0x1); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 17: + I .write( 0x6); + D .write( 0x1); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 18: + if (Y.read() != 0x2) fprintf(stderr,"Y != 4'b0010\n"); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x1) fprintf(stderr,"Pbar != 1'b1\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0x2); // N("4'b0010") + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 19: + I .write( 0x46); + D .write( 0x2); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 20: + if (Y.read() != 0x4) fprintf(stderr,"Y != 4'b0100\n"); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x1) fprintf(stderr,"Pbar != 1'b1\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0x4); + C0 .write( 0x0); + OEbar .write( 0x0); + + break; + case 21: + I .write( 0x46); + D .write( 0x4); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 22: + if (Y.read() != 0x8) fprintf(stderr,"Y != 4'b1000\n"); + if (C4.read()!= 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x1) fprintf(stderr,"Pbar != 1'b1\n"); + if (OVR.read() != 0x1) fprintf(stderr,"OVR != 1'b1\n"); + if (F3.read() != 0x1) fprintf(stderr,"F3 != 1'b1\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0x8); // N("4'b1000") + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 23: + I .write( 0x46); + D .write( 0x8); + C0 .write( 0x0); + OEbar .write( 0x0); + + break; + case 24: + if (Y.read() != 0x0) fprintf(stderr,"Y != 4'b0000\n"); + if (C4.read() != 0x1) fprintf(stderr,"C4 != 1'b1\n"); + if (Gbar.read() != 0x0) fprintf(stderr,"Gbar != 1'b0\n"); + if (Pbar.read() != 0x1) fprintf(stderr,"Pbar != 1'b1\n"); + if (OVR.read() != 0x1) fprintf(stderr,"OVR != 1'b1\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x1) fprintf(stderr,"F30 != 1'b1\n"); + + // ******** SUBTRACTION S - R ******** + I .write( 0x7); + D .write( 0x0); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 25: + I .write( 0x4e); // N("9'b001001110") + D .write( 0x0); + C0 .write( 0x0); + OEbar .write( 0x0); + + break; + case 26: + if (Y.read() != 0xf) fprintf(stderr,"Y != 4'b1111\n"); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x1) fprintf(stderr,"F3 != 1'b1\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0x0); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 27: + I .write( 0x4e); + D .write( 0x0); + C0 .write( 0x1); + OEbar .write( 0x0); + break; + case 28: + if (Y.read() != 0x0) fprintf(stderr,"Y != 4'b0000\n"); + if (C4.read() != 0x1) fprintf(stderr,"C4 != 1'b1\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x1) fprintf(stderr,"F30 != 1'b1\n"); + + I .write( 0x7); + D .write( 0x0); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 29: + I .write( 0x4e); + D .write( 0xf); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 30: + if (Y.read() != 0x0) fprintf(stderr,"Y != 4'b0000\n"); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x1) fprintf(stderr,"Pbar != 1'b1\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x1) fprintf(stderr,"F30 != 1'b1\n"); + + I .write( 0x7); + D .write( 0x0); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 31: + I .write( 0x4e); + D .write( 0xf); + C0 .write( 0x1); + OEbar .write( 0x0); + + break; + case 32: + if (Y.read() != 0x1) fprintf(stderr,"Y != 4'b0001\n"); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x1) fprintf(stderr,"Pbar != 1'b1\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0xf); + C0 .write( 0x0); + OEbar .write( 0x0); + + break; + case 33: + I .write( 0x4e); + D .write( 0xf); + C0 .write( 0x0); + OEbar .write( 0x0); + + break; + case 34: + if (Y.read() != 0xf) fprintf(stderr,"Y != 4'b1111\n"); + if (C4.read() != 0x0) fprintf(stderr,"C4 != 1'b0\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x1) fprintf(stderr,"F3 != 1'b1\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0xf); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 35: + I .write( 0x4e); + D .write( 0xf); + C0 .write( 0x1); + OEbar .write( 0x0); + + break; + case 36: + if (Y.read() != 0x0) fprintf(stderr,"Y != 4'b0000\n"); + if (C4.read() != 0x1) fprintf(stderr,"C4 != 1'b1\n"); + if (Gbar.read() != 0x1) fprintf(stderr,"Gbar != 1'b1\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x0) fprintf(stderr,"F3 != 1'b0\n"); + if (F30.read() != 0x1) fprintf(stderr,"F30 != 1'b1\n"); + + I .write( 0x7); + D .write( 0xf); + C0 .write( 0x0); + OEbar .write( 0x0); + + break; + case 37: + I .write( 0x4e); + D .write( 0x0); + C0 .write( 0x0); + OEbar .write( 0x0); + + break; + case 38: + if (Y.read() != 0xe) fprintf(stderr,"Y != 4'b1110\n"); + if (C4.read() != 0x1) fprintf(stderr,"C4 != 1'b1\n"); + if (Gbar.read() != 0x0) fprintf(stderr,"Gbar != 1'b0\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x1) fprintf(stderr,"F3 != 1'b1\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0xf); + C0 .write( 0x0); + OEbar .write( 0x0); + break; + case 39: + I .write( 0x4e); + D .write( 0x0); + C0 .write( 0x1); + OEbar .write( 0x0); + break; + case 40: + if (Y.read() != 0xf) fprintf(stderr,"Y != 4'b1111\n"); + if (C4.read() != 0x1) fprintf(stderr,"C4 != 1'b1\n"); + if (Gbar.read() != 0x0) fprintf(stderr,"Gbar != 1'b0\n"); + if (Pbar.read() != 0x0) fprintf(stderr,"Pbar != 1'b0\n"); + if (OVR.read() != 0x0) fprintf(stderr,"OVR != 1'b0\n"); + if (F3.read() != 0x1) fprintf(stderr,"F3 != 1'b1\n"); + if (F30.read() != 0x0) fprintf(stderr,"F30 != 1'b0\n"); + + I .write( 0x7); + D .write( 0x0); // 0x1; + C0 .write( 0x0); + OEbar .write( 0x0); + + if (++loop < 100000) + vec_cnt = 0; + else { + printf ("loops = %d\n", loop); + sc_stop(); + } + break; + } +} diff --git a/src/systemc/tests/systemc/misc/examples/a2901/a2901_test.h b/src/systemc/tests/systemc/misc/examples/a2901/a2901_test.h new file mode 100644 index 000000000..e4edd755f --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/a2901_test.h @@ -0,0 +1,146 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + a2901_test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef A2901_TEST_H +#define A2901_TEST_H + +#include "common.h" + +SC_MODULE( a2901_test ) +{ + SC_HAS_PROCESS( a2901_test ); + + // clock + const sc_clock& CLK; + + // inputs + const sig4& Y; + const sig1& t_RAM0; + const sig1& t_RAM3; + const sig1& t_Q0; + const sig1& t_Q3; + const sig1& C4; + const sig1& Gbar; + const sig1& Pbar; + const sig1& OVR; + const sig1& F3; + const sig1& F30; + + // outputs + sig9& I; + sig4& Aadd; + sig4& Badd; + sig4& D; + sig1& RAM0; + sig1& RAM3; + sig1& Q0; + sig1& Q3; + sig1& C0; + sig1& OEbar; + + // temporaries + int vec_cnt; + int loop; + + // constructor + a2901_test( sc_module_name, + const sc_clock& CLK_, + const sig4& Y_, + const sig1& t_RAM0_, + const sig1& t_RAM3_, + const sig1& t_Q0_, + const sig1& t_Q3_, + const sig1& C4_, + const sig1& Gbar_, + const sig1& Pbar_, + const sig1& OVR_, + const sig1& F3_, + const sig1& F30_, + sig9& I_, + sig4& Aadd_, + sig4& Badd_, + sig4& D_, + sig1& RAM0_, + sig1& RAM3_, + sig1& Q0_, + sig1& Q3_, + sig1& C0_, + sig1& OEbar_ ) + : CLK( CLK_ ), + Y( Y_ ), + t_RAM0( t_RAM0_ ), + t_RAM3( t_RAM3_ ), + t_Q0( t_Q0_ ), + t_Q3( t_Q3_ ), + C4( C4_ ), + Gbar( Gbar_ ), + Pbar( Pbar_ ), + OVR( OVR_ ), + F3( F3_ ), + F30( F30_ ), + I( I_ ), + Aadd( Aadd_ ), + Badd( Badd_ ), + D( D_ ), + RAM0( RAM0_ ), + RAM3( RAM3_ ), + Q0( Q0_ ), + Q3( Q3_ ), + C0( C0_ ), + OEbar( OEbar_ ) + { + vec_cnt = 0; + loop = 0; + + // init + I.write( 0x7 ); + D.write( 0 ); + C0.write( 0 ); + OEbar.write( 0 ); + Aadd.write( 0 ); + Badd.write( 0 ); + Q0.write( 0 ); + Q3.write( 0 ); + + SC_METHOD( entry ); + sensitive << CLK.posedge_event(); + } + + void entry(); +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/examples/a2901/common.h b/src/systemc/tests/systemc/misc/examples/a2901/common.h new file mode 100644 index 000000000..073976081 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/common.h @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef bool int1; +typedef sc_uint<4> int4; +typedef sc_uint<5> int5; +typedef sc_uint<9> int9; + +typedef sc_signal sig1; +typedef sc_signal sig4; +typedef sc_signal sig5; +typedef sc_signal sig9; + +#endif diff --git a/src/systemc/tests/systemc/misc/examples/a2901/golden/a2901.log b/src/systemc/tests/systemc/misc/examples/a2901/golden/a2901.log new file mode 100644 index 000000000..5667dbd19 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/a2901/golden/a2901.log @@ -0,0 +1,2 @@ +SystemC Simulation +410 us diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_c/datawidth.h b/src/systemc/tests/systemc/misc/examples/datawidth_int_c/datawidth.h new file mode 100644 index 000000000..5be0bfed9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_c/datawidth.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "systemc.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const sc_signal& in1; + const sc_signal& in2; + const sc_signal& ready; + // Outputs + sc_signal& result; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& IN1, + const sc_signal& IN2, + const sc_signal& READY, + sc_signal& RESULT ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_c/datawidth_int.cpp b/src/systemc/tests/systemc/misc/examples/datawidth_int_c/datawidth_int.cpp new file mode 100644 index 000000000..3548a3ea8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_c/datawidth_int.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth_int.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "datawidth.h" +#include "stimgen.h" + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +void +datawidth::entry() +{ + int tmp_a; + int tmp_b; + int tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready == 0); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read() << " + " << in2.read() + << " = " << result.read() << endl; + } + } + + sc_stop(); +} + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + /* */ + /* int = int + int */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /***************************************/ + +int +sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal in1 ("in1"); + sc_signal in2 ("in2"); + sc_signal result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_c/golden/datawidth_int.log b/src/systemc/tests/systemc/misc/examples/datawidth_int_c/golden/datawidth_int.log new file mode 100644 index 000000000..b168b0482 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_c/golden/datawidth_int.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 +0 + 1 = 1 +0 + 2 = 2 +0 + 3 = 3 +0 + 4 = 4 +0 + 5 = 5 +0 + 6 = 6 +0 + 7 = 7 +0 + 8 = 8 +0 + 9 = 9 +0 + 10 = 10 +0 + 11 = 11 +0 + 12 = 12 +0 + 13 = 13 +0 + 14 = 14 +0 + 15 = 15 +0 + 16 = 16 +0 + 17 = 17 +0 + 18 = 18 +0 + 19 = 19 +0 + 20 = 20 +0 + 21 = 21 +0 + 22 = 22 +0 + 23 = 23 +0 + 24 = 24 +0 + 25 = 25 +0 + 26 = 26 +0 + 27 = 27 +0 + 28 = 28 +0 + 29 = 29 +0 + 30 = 30 +0 + 31 = 31 +0 + 32 = 32 +0 + 33 = 33 +0 + 34 = 34 +0 + 35 = 35 +0 + 36 = 36 +0 + 37 = 37 +0 + 38 = 38 +0 + 39 = 39 +0 + 40 = 40 +0 + 41 = 41 +0 + 42 = 42 +0 + 43 = 43 +0 + 44 = 44 +0 + 45 = 45 +0 + 46 = 46 +0 + 47 = 47 +0 + 48 = 48 +0 + 49 = 49 +0 + 50 = 50 +0 + 51 = 51 +0 + 52 = 52 +0 + 53 = 53 +0 + 54 = 54 +0 + 55 = 55 +0 + 56 = 56 +0 + 57 = 57 +0 + 58 = 58 +0 + 59 = 59 +0 + 60 = 60 +0 + 61 = 61 +0 + 62 = 62 +0 + 63 = 63 +1 + 0 = 1 +1 + 1 = 2 +1 + 2 = 3 +1 + 3 = 4 +1 + 4 = 5 +1 + 5 = 6 +1 + 6 = 7 +1 + 7 = 8 +1 + 8 = 9 +1 + 9 = 10 +1 + 10 = 11 +1 + 11 = 12 +1 + 12 = 13 +1 + 13 = 14 +1 + 14 = 15 +1 + 15 = 16 +1 + 16 = 17 +1 + 17 = 18 +1 + 18 = 19 +1 + 19 = 20 +1 + 20 = 21 +1 + 21 = 22 +1 + 22 = 23 +1 + 23 = 24 +1 + 24 = 25 +1 + 25 = 26 +1 + 26 = 27 +1 + 27 = 28 +1 + 28 = 29 +1 + 29 = 30 +1 + 30 = 31 +1 + 31 = 32 +1 + 32 = 33 +1 + 33 = 34 +1 + 34 = 35 +1 + 35 = 36 +1 + 36 = 37 +1 + 37 = 38 +1 + 38 = 39 +1 + 39 = 40 +1 + 40 = 41 +1 + 41 = 42 +1 + 42 = 43 +1 + 43 = 44 +1 + 44 = 45 +1 + 45 = 46 +1 + 46 = 47 +1 + 47 = 48 +1 + 48 = 49 +1 + 49 = 50 +1 + 50 = 51 +1 + 51 = 52 +1 + 52 = 53 +1 + 53 = 54 +1 + 54 = 55 +1 + 55 = 56 +1 + 56 = 57 +1 + 57 = 58 +1 + 58 = 59 +1 + 59 = 60 +1 + 60 = 61 +1 + 61 = 62 +1 + 62 = 63 +1 + 63 = 64 +2 + 0 = 2 +2 + 1 = 3 +2 + 2 = 4 +2 + 3 = 5 +2 + 4 = 6 +2 + 5 = 7 +2 + 6 = 8 +2 + 7 = 9 +2 + 8 = 10 +2 + 9 = 11 +2 + 10 = 12 +2 + 11 = 13 +2 + 12 = 14 +2 + 13 = 15 +2 + 14 = 16 +2 + 15 = 17 +2 + 16 = 18 +2 + 17 = 19 +2 + 18 = 20 +2 + 19 = 21 +2 + 20 = 22 +2 + 21 = 23 +2 + 22 = 24 +2 + 23 = 25 +2 + 24 = 26 +2 + 25 = 27 +2 + 26 = 28 +2 + 27 = 29 +2 + 28 = 30 +2 + 29 = 31 +2 + 30 = 32 +2 + 31 = 33 +2 + 32 = 34 +2 + 33 = 35 +2 + 34 = 36 +2 + 35 = 37 +2 + 36 = 38 +2 + 37 = 39 +2 + 38 = 40 +2 + 39 = 41 +2 + 40 = 42 +2 + 41 = 43 +2 + 42 = 44 +2 + 43 = 45 +2 + 44 = 46 +2 + 45 = 47 +2 + 46 = 48 +2 + 47 = 49 +2 + 48 = 50 +2 + 49 = 51 +2 + 50 = 52 +2 + 51 = 53 +2 + 52 = 54 +2 + 53 = 55 +2 + 54 = 56 +2 + 55 = 57 +2 + 56 = 58 +2 + 57 = 59 +2 + 58 = 60 +2 + 59 = 61 +2 + 60 = 62 +2 + 61 = 63 +2 + 62 = 64 +2 + 63 = 65 +3 + 0 = 3 +3 + 1 = 4 +3 + 2 = 5 +3 + 3 = 6 +3 + 4 = 7 +3 + 5 = 8 +3 + 6 = 9 +3 + 7 = 10 +3 + 8 = 11 +3 + 9 = 12 +3 + 10 = 13 +3 + 11 = 14 +3 + 12 = 15 +3 + 13 = 16 +3 + 14 = 17 +3 + 15 = 18 +3 + 16 = 19 +3 + 17 = 20 +3 + 18 = 21 +3 + 19 = 22 +3 + 20 = 23 +3 + 21 = 24 +3 + 22 = 25 +3 + 23 = 26 +3 + 24 = 27 +3 + 25 = 28 +3 + 26 = 29 +3 + 27 = 30 +3 + 28 = 31 +3 + 29 = 32 +3 + 30 = 33 +3 + 31 = 34 +3 + 32 = 35 +3 + 33 = 36 +3 + 34 = 37 +3 + 35 = 38 +3 + 36 = 39 +3 + 37 = 40 +3 + 38 = 41 +3 + 39 = 42 +3 + 40 = 43 +3 + 41 = 44 +3 + 42 = 45 +3 + 43 = 46 +3 + 44 = 47 +3 + 45 = 48 +3 + 46 = 49 +3 + 47 = 50 +3 + 48 = 51 +3 + 49 = 52 +3 + 50 = 53 +3 + 51 = 54 +3 + 52 = 55 +3 + 53 = 56 +3 + 54 = 57 +3 + 55 = 58 +3 + 56 = 59 +3 + 57 = 60 +3 + 58 = 61 +3 + 59 = 62 +3 + 60 = 63 +3 + 61 = 64 +3 + 62 = 65 +3 + 63 = 66 +4 + 0 = 4 +4 + 1 = 5 +4 + 2 = 6 +4 + 3 = 7 +4 + 4 = 8 +4 + 5 = 9 +4 + 6 = 10 +4 + 7 = 11 +4 + 8 = 12 +4 + 9 = 13 +4 + 10 = 14 +4 + 11 = 15 +4 + 12 = 16 +4 + 13 = 17 +4 + 14 = 18 +4 + 15 = 19 +4 + 16 = 20 +4 + 17 = 21 +4 + 18 = 22 +4 + 19 = 23 +4 + 20 = 24 +4 + 21 = 25 +4 + 22 = 26 +4 + 23 = 27 +4 + 24 = 28 +4 + 25 = 29 +4 + 26 = 30 +4 + 27 = 31 +4 + 28 = 32 +4 + 29 = 33 +4 + 30 = 34 +4 + 31 = 35 +4 + 32 = 36 +4 + 33 = 37 +4 + 34 = 38 +4 + 35 = 39 +4 + 36 = 40 +4 + 37 = 41 +4 + 38 = 42 +4 + 39 = 43 +4 + 40 = 44 +4 + 41 = 45 +4 + 42 = 46 +4 + 43 = 47 +4 + 44 = 48 +4 + 45 = 49 +4 + 46 = 50 +4 + 47 = 51 +4 + 48 = 52 +4 + 49 = 53 +4 + 50 = 54 +4 + 51 = 55 +4 + 52 = 56 +4 + 53 = 57 +4 + 54 = 58 +4 + 55 = 59 +4 + 56 = 60 +4 + 57 = 61 +4 + 58 = 62 +4 + 59 = 63 +4 + 60 = 64 +4 + 61 = 65 +4 + 62 = 66 +4 + 63 = 67 +5 + 0 = 5 +5 + 1 = 6 +5 + 2 = 7 +5 + 3 = 8 +5 + 4 = 9 +5 + 5 = 10 +5 + 6 = 11 +5 + 7 = 12 +5 + 8 = 13 +5 + 9 = 14 +5 + 10 = 15 +5 + 11 = 16 +5 + 12 = 17 +5 + 13 = 18 +5 + 14 = 19 +5 + 15 = 20 +5 + 16 = 21 +5 + 17 = 22 +5 + 18 = 23 +5 + 19 = 24 +5 + 20 = 25 +5 + 21 = 26 +5 + 22 = 27 +5 + 23 = 28 +5 + 24 = 29 +5 + 25 = 30 +5 + 26 = 31 +5 + 27 = 32 +5 + 28 = 33 +5 + 29 = 34 +5 + 30 = 35 +5 + 31 = 36 +5 + 32 = 37 +5 + 33 = 38 +5 + 34 = 39 +5 + 35 = 40 +5 + 36 = 41 +5 + 37 = 42 +5 + 38 = 43 +5 + 39 = 44 +5 + 40 = 45 +5 + 41 = 46 +5 + 42 = 47 +5 + 43 = 48 +5 + 44 = 49 +5 + 45 = 50 +5 + 46 = 51 +5 + 47 = 52 +5 + 48 = 53 +5 + 49 = 54 +5 + 50 = 55 +5 + 51 = 56 +5 + 52 = 57 +5 + 53 = 58 +5 + 54 = 59 +5 + 55 = 60 +5 + 56 = 61 +5 + 57 = 62 +5 + 58 = 63 +5 + 59 = 64 +5 + 60 = 65 +5 + 61 = 66 +5 + 62 = 67 +5 + 63 = 68 +6 + 0 = 6 +6 + 1 = 7 +6 + 2 = 8 +6 + 3 = 9 +6 + 4 = 10 +6 + 5 = 11 +6 + 6 = 12 +6 + 7 = 13 +6 + 8 = 14 +6 + 9 = 15 +6 + 10 = 16 +6 + 11 = 17 +6 + 12 = 18 +6 + 13 = 19 +6 + 14 = 20 +6 + 15 = 21 +6 + 16 = 22 +6 + 17 = 23 +6 + 18 = 24 +6 + 19 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107 +63 + 45 = 108 +63 + 46 = 109 +63 + 47 = 110 +63 + 48 = 111 +63 + 49 = 112 +63 + 50 = 113 +63 + 51 = 114 +63 + 52 = 115 +63 + 53 = 116 +63 + 54 = 117 +63 + 55 = 118 +63 + 56 = 119 +63 + 57 = 120 +63 + 58 = 121 +63 + 59 = 122 +63 + 60 = 123 +63 + 61 = 124 +63 + 62 = 125 +63 + 63 = 126 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_c/stimgen.h b/src/systemc/tests/systemc/misc/examples/datawidth_int_c/stimgen.h new file mode 100644 index 000000000..7e889295c --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_c/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "systemc.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const sc_signal& result; + // Outputs + sc_signal& in1; + sc_signal& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& RESULT, + sc_signal& IN1, + sc_signal& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_file/datawidth.cpp b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/datawidth.cpp new file mode 100644 index 000000000..c3920273d --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + int tmp_a; + int tmp_b; + int tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready == 0); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_file/datawidth.h b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/datawidth.h new file mode 100644 index 000000000..5be0bfed9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/datawidth.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "systemc.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const sc_signal& in1; + const sc_signal& in2; + const sc_signal& ready; + // Outputs + sc_signal& result; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& IN1, + const sc_signal& IN2, + const sc_signal& READY, + sc_signal& RESULT ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_file/datawidth_int.f b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/datawidth_int.f new file mode 100644 index 000000000..261078d77 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/datawidth_int.f @@ -0,0 +1,3 @@ +datawidth_int_file/datawidth.cpp +datawidth_int_file/stimgen.cpp +datawidth_int_file/main.cpp diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_file/golden/datawidth_int.log b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/golden/datawidth_int.log new file mode 100644 index 000000000..b168b0482 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/golden/datawidth_int.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 +0 + 1 = 1 +0 + 2 = 2 +0 + 3 = 3 +0 + 4 = 4 +0 + 5 = 5 +0 + 6 = 6 +0 + 7 = 7 +0 + 8 = 8 +0 + 9 = 9 +0 + 10 = 10 +0 + 11 = 11 +0 + 12 = 12 +0 + 13 = 13 +0 + 14 = 14 +0 + 15 = 15 +0 + 16 = 16 +0 + 17 = 17 +0 + 18 = 18 +0 + 19 = 19 +0 + 20 = 20 +0 + 21 = 21 +0 + 22 = 22 +0 + 23 = 23 +0 + 24 = 24 +0 + 25 = 25 +0 + 26 = 26 +0 + 27 = 27 +0 + 28 = 28 +0 + 29 = 29 +0 + 30 = 30 +0 + 31 = 31 +0 + 32 = 32 +0 + 33 = 33 +0 + 34 = 34 +0 + 35 = 35 +0 + 36 = 36 +0 + 37 = 37 +0 + 38 = 38 +0 + 39 = 39 +0 + 40 = 40 +0 + 41 = 41 +0 + 42 = 42 +0 + 43 = 43 +0 + 44 = 44 +0 + 45 = 45 +0 + 46 = 46 +0 + 47 = 47 +0 + 48 = 48 +0 + 49 = 49 +0 + 50 = 50 +0 + 51 = 51 +0 + 52 = 52 +0 + 53 = 53 +0 + 54 = 54 +0 + 55 = 55 +0 + 56 = 56 +0 + 57 = 57 +0 + 58 = 58 +0 + 59 = 59 +0 + 60 = 60 +0 + 61 = 61 +0 + 62 = 62 +0 + 63 = 63 +1 + 0 = 1 +1 + 1 = 2 +1 + 2 = 3 +1 + 3 = 4 +1 + 4 = 5 +1 + 5 = 6 +1 + 6 = 7 +1 + 7 = 8 +1 + 8 = 9 +1 + 9 = 10 +1 + 10 = 11 +1 + 11 = 12 +1 + 12 = 13 +1 + 13 = 14 +1 + 14 = 15 +1 + 15 = 16 +1 + 16 = 17 +1 + 17 = 18 +1 + 18 = 19 +1 + 19 = 20 +1 + 20 = 21 +1 + 21 = 22 +1 + 22 = 23 +1 + 23 = 24 +1 + 24 = 25 +1 + 25 = 26 +1 + 26 = 27 +1 + 27 = 28 +1 + 28 = 29 +1 + 29 = 30 +1 + 30 = 31 +1 + 31 = 32 +1 + 32 = 33 +1 + 33 = 34 +1 + 34 = 35 +1 + 35 = 36 +1 + 36 = 37 +1 + 37 = 38 +1 + 38 = 39 +1 + 39 = 40 +1 + 40 = 41 +1 + 41 = 42 +1 + 42 = 43 +1 + 43 = 44 +1 + 44 = 45 +1 + 45 = 46 +1 + 46 = 47 +1 + 47 = 48 +1 + 48 = 49 +1 + 49 = 50 +1 + 50 = 51 +1 + 51 = 52 +1 + 52 = 53 +1 + 53 = 54 +1 + 54 = 55 +1 + 55 = 56 +1 + 56 = 57 +1 + 57 = 58 +1 + 58 = 59 +1 + 59 = 60 +1 + 60 = 61 +1 + 61 = 62 +1 + 62 = 63 +1 + 63 = 64 +2 + 0 = 2 +2 + 1 = 3 +2 + 2 = 4 +2 + 3 = 5 +2 + 4 = 6 +2 + 5 = 7 +2 + 6 = 8 +2 + 7 = 9 +2 + 8 = 10 +2 + 9 = 11 +2 + 10 = 12 +2 + 11 = 13 +2 + 12 = 14 +2 + 13 = 15 +2 + 14 = 16 +2 + 15 = 17 +2 + 16 = 18 +2 + 17 = 19 +2 + 18 = 20 +2 + 19 = 21 +2 + 20 = 22 +2 + 21 = 23 +2 + 22 = 24 +2 + 23 = 25 +2 + 24 = 26 +2 + 25 = 27 +2 + 26 = 28 +2 + 27 = 29 +2 + 28 = 30 +2 + 29 = 31 +2 + 30 = 32 +2 + 31 = 33 +2 + 32 = 34 +2 + 33 = 35 +2 + 34 = 36 +2 + 35 = 37 +2 + 36 = 38 +2 + 37 = 39 +2 + 38 = 40 +2 + 39 = 41 +2 + 40 = 42 +2 + 41 = 43 +2 + 42 = 44 +2 + 43 = 45 +2 + 44 = 46 +2 + 45 = 47 +2 + 46 = 48 +2 + 47 = 49 +2 + 48 = 50 +2 + 49 = 51 +2 + 50 = 52 +2 + 51 = 53 +2 + 52 = 54 +2 + 53 = 55 +2 + 54 = 56 +2 + 55 = 57 +2 + 56 = 58 +2 + 57 = 59 +2 + 58 = 60 +2 + 59 = 61 +2 + 60 = 62 +2 + 61 = 63 +2 + 62 = 64 +2 + 63 = 65 +3 + 0 = 3 +3 + 1 = 4 +3 + 2 = 5 +3 + 3 = 6 +3 + 4 = 7 +3 + 5 = 8 +3 + 6 = 9 +3 + 7 = 10 +3 + 8 = 11 +3 + 9 = 12 +3 + 10 = 13 +3 + 11 = 14 +3 + 12 = 15 +3 + 13 = 16 +3 + 14 = 17 +3 + 15 = 18 +3 + 16 = 19 +3 + 17 = 20 +3 + 18 = 21 +3 + 19 = 22 +3 + 20 = 23 +3 + 21 = 24 +3 + 22 = 25 +3 + 23 = 26 +3 + 24 = 27 +3 + 25 = 28 +3 + 26 = 29 +3 + 27 = 30 +3 + 28 = 31 +3 + 29 = 32 +3 + 30 = 33 +3 + 31 = 34 +3 + 32 = 35 +3 + 33 = 36 +3 + 34 = 37 +3 + 35 = 38 +3 + 36 = 39 +3 + 37 = 40 +3 + 38 = 41 +3 + 39 = 42 +3 + 40 = 43 +3 + 41 = 44 +3 + 42 = 45 +3 + 43 = 46 +3 + 44 = 47 +3 + 45 = 48 +3 + 46 = 49 +3 + 47 = 50 +3 + 48 = 51 +3 + 49 = 52 +3 + 50 = 53 +3 + 51 = 54 +3 + 52 = 55 +3 + 53 = 56 +3 + 54 = 57 +3 + 55 = 58 +3 + 56 = 59 +3 + 57 = 60 +3 + 58 = 61 +3 + 59 = 62 +3 + 60 = 63 +3 + 61 = 64 +3 + 62 = 65 +3 + 63 = 66 +4 + 0 = 4 +4 + 1 = 5 +4 + 2 = 6 +4 + 3 = 7 +4 + 4 = 8 +4 + 5 = 9 +4 + 6 = 10 +4 + 7 = 11 +4 + 8 = 12 +4 + 9 = 13 +4 + 10 = 14 +4 + 11 = 15 +4 + 12 = 16 +4 + 13 = 17 +4 + 14 = 18 +4 + 15 = 19 +4 + 16 = 20 +4 + 17 = 21 +4 + 18 = 22 +4 + 19 = 23 +4 + 20 = 24 +4 + 21 = 25 +4 + 22 = 26 +4 + 23 = 27 +4 + 24 = 28 +4 + 25 = 29 +4 + 26 = 30 +4 + 27 = 31 +4 + 28 = 32 +4 + 29 = 33 +4 + 30 = 34 +4 + 31 = 35 +4 + 32 = 36 +4 + 33 = 37 +4 + 34 = 38 +4 + 35 = 39 +4 + 36 = 40 +4 + 37 = 41 +4 + 38 = 42 +4 + 39 = 43 +4 + 40 = 44 +4 + 41 = 45 +4 + 42 = 46 +4 + 43 = 47 +4 + 44 = 48 +4 + 45 = 49 +4 + 46 = 50 +4 + 47 = 51 +4 + 48 = 52 +4 + 49 = 53 +4 + 50 = 54 +4 + 51 = 55 +4 + 52 = 56 +4 + 53 = 57 +4 + 54 = 58 +4 + 55 = 59 +4 + 56 = 60 +4 + 57 = 61 +4 + 58 = 62 +4 + 59 = 63 +4 + 60 = 64 +4 + 61 = 65 +4 + 62 = 66 +4 + 63 = 67 +5 + 0 = 5 +5 + 1 = 6 +5 + 2 = 7 +5 + 3 = 8 +5 + 4 = 9 +5 + 5 = 10 +5 + 6 = 11 +5 + 7 = 12 +5 + 8 = 13 +5 + 9 = 14 +5 + 10 = 15 +5 + 11 = 16 +5 + 12 = 17 +5 + 13 = 18 +5 + 14 = 19 +5 + 15 = 20 +5 + 16 = 21 +5 + 17 = 22 +5 + 18 = 23 +5 + 19 = 24 +5 + 20 = 25 +5 + 21 = 26 +5 + 22 = 27 +5 + 23 = 28 +5 + 24 = 29 +5 + 25 = 30 +5 + 26 = 31 +5 + 27 = 32 +5 + 28 = 33 +5 + 29 = 34 +5 + 30 = 35 +5 + 31 = 36 +5 + 32 = 37 +5 + 33 = 38 +5 + 34 = 39 +5 + 35 = 40 +5 + 36 = 41 +5 + 37 = 42 +5 + 38 = 43 +5 + 39 = 44 +5 + 40 = 45 +5 + 41 = 46 +5 + 42 = 47 +5 + 43 = 48 +5 + 44 = 49 +5 + 45 = 50 +5 + 46 = 51 +5 + 47 = 52 +5 + 48 = 53 +5 + 49 = 54 +5 + 50 = 55 +5 + 51 = 56 +5 + 52 = 57 +5 + 53 = 58 +5 + 54 = 59 +5 + 55 = 60 +5 + 56 = 61 +5 + 57 = 62 +5 + 58 = 63 +5 + 59 = 64 +5 + 60 = 65 +5 + 61 = 66 +5 + 62 = 67 +5 + 63 = 68 +6 + 0 = 6 +6 + 1 = 7 +6 + 2 = 8 +6 + 3 = 9 +6 + 4 = 10 +6 + 5 = 11 +6 + 6 = 12 +6 + 7 = 13 +6 + 8 = 14 +6 + 9 = 15 +6 + 10 = 16 +6 + 11 = 17 +6 + 12 = 18 +6 + 13 = 19 +6 + 14 = 20 +6 + 15 = 21 +6 + 16 = 22 +6 + 17 = 23 +6 + 18 = 24 +6 + 19 = 25 +6 + 20 = 26 +6 + 21 = 27 +6 + 22 = 28 +6 + 23 = 29 +6 + 24 = 30 +6 + 25 = 31 +6 + 26 = 32 +6 + 27 = 33 +6 + 28 = 34 +6 + 29 = 35 +6 + 30 = 36 +6 + 31 = 37 +6 + 32 = 38 +6 + 33 = 39 +6 + 34 = 40 +6 + 35 = 41 +6 + 36 = 42 +6 + 37 = 43 +6 + 38 = 44 +6 + 39 = 45 +6 + 40 = 46 +6 + 41 = 47 +6 + 42 = 48 +6 + 43 = 49 +6 + 44 = 50 +6 + 45 = 51 +6 + 46 = 52 +6 + 47 = 53 +6 + 48 = 54 +6 + 49 = 55 +6 + 50 = 56 +6 + 51 = 57 +6 + 52 = 58 +6 + 53 = 59 +6 + 54 = 60 +6 + 55 = 61 +6 + 56 = 62 +6 + 57 = 63 +6 + 58 = 64 +6 + 59 = 65 +6 + 60 = 66 +6 + 61 = 67 +6 + 62 = 68 +6 + 63 = 69 +7 + 0 = 7 +7 + 1 = 8 +7 + 2 = 9 +7 + 3 = 10 +7 + 4 = 11 +7 + 5 = 12 +7 + 6 = 13 +7 + 7 = 14 +7 + 8 = 15 +7 + 9 = 16 +7 + 10 = 17 +7 + 11 = 18 +7 + 12 = 19 +7 + 13 = 20 +7 + 14 = 21 +7 + 15 = 22 +7 + 16 = 23 +7 + 17 = 24 +7 + 18 = 25 +7 + 19 = 26 +7 + 20 = 27 +7 + 21 = 28 +7 + 22 = 29 +7 + 23 = 30 +7 + 24 = 31 +7 + 25 = 32 +7 + 26 = 33 +7 + 27 = 34 +7 + 28 = 35 +7 + 29 = 36 +7 + 30 = 37 +7 + 31 = 38 +7 + 32 = 39 +7 + 33 = 40 +7 + 34 = 41 +7 + 35 = 42 +7 + 36 = 43 +7 + 37 = 44 +7 + 38 = 45 +7 + 39 = 46 +7 + 40 = 47 +7 + 41 = 48 +7 + 42 = 49 +7 + 43 = 50 +7 + 44 = 51 +7 + 45 = 52 +7 + 46 = 53 +7 + 47 = 54 +7 + 48 = 55 +7 + 49 = 56 +7 + 50 = 57 +7 + 51 = 58 +7 + 52 = 59 +7 + 53 = 60 +7 + 54 = 61 +7 + 55 = 62 +7 + 56 = 63 +7 + 57 = 64 +7 + 58 = 65 +7 + 59 = 66 +7 + 60 = 67 +7 + 61 = 68 +7 + 62 = 69 +7 + 63 = 70 +8 + 0 = 8 +8 + 1 = 9 +8 + 2 = 10 +8 + 3 = 11 +8 + 4 = 12 +8 + 5 = 13 +8 + 6 = 14 +8 + 7 = 15 +8 + 8 = 16 +8 + 9 = 17 +8 + 10 = 18 +8 + 11 = 19 +8 + 12 = 20 +8 + 13 = 21 +8 + 14 = 22 +8 + 15 = 23 +8 + 16 = 24 +8 + 17 = 25 +8 + 18 = 26 +8 + 19 = 27 +8 + 20 = 28 +8 + 21 = 29 +8 + 22 = 30 +8 + 23 = 31 +8 + 24 = 32 +8 + 25 = 33 +8 + 26 = 34 +8 + 27 = 35 +8 + 28 = 36 +8 + 29 = 37 +8 + 30 = 38 +8 + 31 = 39 +8 + 32 = 40 +8 + 33 = 41 +8 + 34 = 42 +8 + 35 = 43 +8 + 36 = 44 +8 + 37 = 45 +8 + 38 = 46 +8 + 39 = 47 +8 + 40 = 48 +8 + 41 = 49 +8 + 42 = 50 +8 + 43 = 51 +8 + 44 = 52 +8 + 45 = 53 +8 + 46 = 54 +8 + 47 = 55 +8 + 48 = 56 +8 + 49 = 57 +8 + 50 = 58 +8 + 51 = 59 +8 + 52 = 60 +8 + 53 = 61 +8 + 54 = 62 +8 + 55 = 63 +8 + 56 = 64 +8 + 57 = 65 +8 + 58 = 66 +8 + 59 = 67 +8 + 60 = 68 +8 + 61 = 69 +8 + 62 = 70 +8 + 63 = 71 +9 + 0 = 9 +9 + 1 = 10 +9 + 2 = 11 +9 + 3 = 12 +9 + 4 = 13 +9 + 5 = 14 +9 + 6 = 15 +9 + 7 = 16 +9 + 8 = 17 +9 + 9 = 18 +9 + 10 = 19 +9 + 11 = 20 +9 + 12 = 21 +9 + 13 = 22 +9 + 14 = 23 +9 + 15 = 24 +9 + 16 = 25 +9 + 17 = 26 +9 + 18 = 27 +9 + 19 = 28 +9 + 20 = 29 +9 + 21 = 30 +9 + 22 = 31 +9 + 23 = 32 +9 + 24 = 33 +9 + 25 = 34 +9 + 26 = 35 +9 + 27 = 36 +9 + 28 = 37 +9 + 29 = 38 +9 + 30 = 39 +9 + 31 = 40 +9 + 32 = 41 +9 + 33 = 42 +9 + 34 = 43 +9 + 35 = 44 +9 + 36 = 45 +9 + 37 = 46 +9 + 38 = 47 +9 + 39 = 48 +9 + 40 = 49 +9 + 41 = 50 +9 + 42 = 51 +9 + 43 = 52 +9 + 44 = 53 +9 + 45 = 54 +9 + 46 = 55 +9 + 47 = 56 +9 + 48 = 57 +9 + 49 = 58 +9 + 50 = 59 +9 + 51 = 60 +9 + 52 = 61 +9 + 53 = 62 +9 + 54 = 63 +9 + 55 = 64 +9 + 56 = 65 +9 + 57 = 66 +9 + 58 = 67 +9 + 59 = 68 +9 + 60 = 69 +9 + 61 = 70 +9 + 62 = 71 +9 + 63 = 72 +10 + 0 = 10 +10 + 1 = 11 +10 + 2 = 12 +10 + 3 = 13 +10 + 4 = 14 +10 + 5 = 15 +10 + 6 = 16 +10 + 7 = 17 +10 + 8 = 18 +10 + 9 = 19 +10 + 10 = 20 +10 + 11 = 21 +10 + 12 = 22 +10 + 13 = 23 +10 + 14 = 24 +10 + 15 = 25 +10 + 16 = 26 +10 + 17 = 27 +10 + 18 = 28 +10 + 19 = 29 +10 + 20 = 30 +10 + 21 = 31 +10 + 22 = 32 +10 + 23 = 33 +10 + 24 = 34 +10 + 25 = 35 +10 + 26 = 36 +10 + 27 = 37 +10 + 28 = 38 +10 + 29 = 39 +10 + 30 = 40 +10 + 31 = 41 +10 + 32 = 42 +10 + 33 = 43 +10 + 34 = 44 +10 + 35 = 45 +10 + 36 = 46 +10 + 37 = 47 +10 + 38 = 48 +10 + 39 = 49 +10 + 40 = 50 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+ 57 = 105 +48 + 58 = 106 +48 + 59 = 107 +48 + 60 = 108 +48 + 61 = 109 +48 + 62 = 110 +48 + 63 = 111 +49 + 0 = 49 +49 + 1 = 50 +49 + 2 = 51 +49 + 3 = 52 +49 + 4 = 53 +49 + 5 = 54 +49 + 6 = 55 +49 + 7 = 56 +49 + 8 = 57 +49 + 9 = 58 +49 + 10 = 59 +49 + 11 = 60 +49 + 12 = 61 +49 + 13 = 62 +49 + 14 = 63 +49 + 15 = 64 +49 + 16 = 65 +49 + 17 = 66 +49 + 18 = 67 +49 + 19 = 68 +49 + 20 = 69 +49 + 21 = 70 +49 + 22 = 71 +49 + 23 = 72 +49 + 24 = 73 +49 + 25 = 74 +49 + 26 = 75 +49 + 27 = 76 +49 + 28 = 77 +49 + 29 = 78 +49 + 30 = 79 +49 + 31 = 80 +49 + 32 = 81 +49 + 33 = 82 +49 + 34 = 83 +49 + 35 = 84 +49 + 36 = 85 +49 + 37 = 86 +49 + 38 = 87 +49 + 39 = 88 +49 + 40 = 89 +49 + 41 = 90 +49 + 42 = 91 +49 + 43 = 92 +49 + 44 = 93 +49 + 45 = 94 +49 + 46 = 95 +49 + 47 = 96 +49 + 48 = 97 +49 + 49 = 98 +49 + 50 = 99 +49 + 51 = 100 +49 + 52 = 101 +49 + 53 = 102 +49 + 54 = 103 +49 + 55 = 104 +49 + 56 = 105 +49 + 57 = 106 +49 + 58 = 107 +49 + 59 = 108 +49 + 60 = 109 +49 + 61 = 110 +49 + 62 = 111 +49 + 63 = 112 +50 + 0 = 50 +50 + 1 = 51 +50 + 2 = 52 +50 + 3 = 53 +50 + 4 = 54 +50 + 5 = 55 +50 + 6 = 56 +50 + 7 = 57 +50 + 8 = 58 +50 + 9 = 59 +50 + 10 = 60 +50 + 11 = 61 +50 + 12 = 62 +50 + 13 = 63 +50 + 14 = 64 +50 + 15 = 65 +50 + 16 = 66 +50 + 17 = 67 +50 + 18 = 68 +50 + 19 = 69 +50 + 20 = 70 +50 + 21 = 71 +50 + 22 = 72 +50 + 23 = 73 +50 + 24 = 74 +50 + 25 = 75 +50 + 26 = 76 +50 + 27 = 77 +50 + 28 = 78 +50 + 29 = 79 +50 + 30 = 80 +50 + 31 = 81 +50 + 32 = 82 +50 + 33 = 83 +50 + 34 = 84 +50 + 35 = 85 +50 + 36 = 86 +50 + 37 = 87 +50 + 38 = 88 +50 + 39 = 89 +50 + 40 = 90 +50 + 41 = 91 +50 + 42 = 92 +50 + 43 = 93 +50 + 44 = 94 +50 + 45 = 95 +50 + 46 = 96 +50 + 47 = 97 +50 + 48 = 98 +50 + 49 = 99 +50 + 50 = 100 +50 + 51 = 101 +50 + 52 = 102 +50 + 53 = 103 +50 + 54 = 104 +50 + 55 = 105 +50 + 56 = 106 +50 + 57 = 107 +50 + 58 = 108 +50 + 59 = 109 +50 + 60 = 110 +50 + 61 = 111 +50 + 62 = 112 +50 + 63 = 113 +51 + 0 = 51 +51 + 1 = 52 +51 + 2 = 53 +51 + 3 = 54 +51 + 4 = 55 +51 + 5 = 56 +51 + 6 = 57 +51 + 7 = 58 +51 + 8 = 59 +51 + 9 = 60 +51 + 10 = 61 +51 + 11 = 62 +51 + 12 = 63 +51 + 13 = 64 +51 + 14 = 65 +51 + 15 = 66 +51 + 16 = 67 +51 + 17 = 68 +51 + 18 = 69 +51 + 19 = 70 +51 + 20 = 71 +51 + 21 = 72 +51 + 22 = 73 +51 + 23 = 74 +51 + 24 = 75 +51 + 25 = 76 +51 + 26 = 77 +51 + 27 = 78 +51 + 28 = 79 +51 + 29 = 80 +51 + 30 = 81 +51 + 31 = 82 +51 + 32 = 83 +51 + 33 = 84 +51 + 34 = 85 +51 + 35 = 86 +51 + 36 = 87 +51 + 37 = 88 +51 + 38 = 89 +51 + 39 = 90 +51 + 40 = 91 +51 + 41 = 92 +51 + 42 = 93 +51 + 43 = 94 +51 + 44 = 95 +51 + 45 = 96 +51 + 46 = 97 +51 + 47 = 98 +51 + 48 = 99 +51 + 49 = 100 +51 + 50 = 101 +51 + 51 = 102 +51 + 52 = 103 +51 + 53 = 104 +51 + 54 = 105 +51 + 55 = 106 +51 + 56 = 107 +51 + 57 = 108 +51 + 58 = 109 +51 + 59 = 110 +51 + 60 = 111 +51 + 61 = 112 +51 + 62 = 113 +51 + 63 = 114 +52 + 0 = 52 +52 + 1 = 53 +52 + 2 = 54 +52 + 3 = 55 +52 + 4 = 56 +52 + 5 = 57 +52 + 6 = 58 +52 + 7 = 59 +52 + 8 = 60 +52 + 9 = 61 +52 + 10 = 62 +52 + 11 = 63 +52 + 12 = 64 +52 + 13 = 65 +52 + 14 = 66 +52 + 15 = 67 +52 + 16 = 68 +52 + 17 = 69 +52 + 18 = 70 +52 + 19 = 71 +52 + 20 = 72 +52 + 21 = 73 +52 + 22 = 74 +52 + 23 = 75 +52 + 24 = 76 +52 + 25 = 77 +52 + 26 = 78 +52 + 27 = 79 +52 + 28 = 80 +52 + 29 = 81 +52 + 30 = 82 +52 + 31 = 83 +52 + 32 = 84 +52 + 33 = 85 +52 + 34 = 86 +52 + 35 = 87 +52 + 36 = 88 +52 + 37 = 89 +52 + 38 = 90 +52 + 39 = 91 +52 + 40 = 92 +52 + 41 = 93 +52 + 42 = 94 +52 + 43 = 95 +52 + 44 = 96 +52 + 45 = 97 +52 + 46 = 98 +52 + 47 = 99 +52 + 48 = 100 +52 + 49 = 101 +52 + 50 = 102 +52 + 51 = 103 +52 + 52 = 104 +52 + 53 = 105 +52 + 54 = 106 +52 + 55 = 107 +52 + 56 = 108 +52 + 57 = 109 +52 + 58 = 110 +52 + 59 = 111 +52 + 60 = 112 +52 + 61 = 113 +52 + 62 = 114 +52 + 63 = 115 +53 + 0 = 53 +53 + 1 = 54 +53 + 2 = 55 +53 + 3 = 56 +53 + 4 = 57 +53 + 5 = 58 +53 + 6 = 59 +53 + 7 = 60 +53 + 8 = 61 +53 + 9 = 62 +53 + 10 = 63 +53 + 11 = 64 +53 + 12 = 65 +53 + 13 = 66 +53 + 14 = 67 +53 + 15 = 68 +53 + 16 = 69 +53 + 17 = 70 +53 + 18 = 71 +53 + 19 = 72 +53 + 20 = 73 +53 + 21 = 74 +53 + 22 = 75 +53 + 23 = 76 +53 + 24 = 77 +53 + 25 = 78 +53 + 26 = 79 +53 + 27 = 80 +53 + 28 = 81 +53 + 29 = 82 +53 + 30 = 83 +53 + 31 = 84 +53 + 32 = 85 +53 + 33 = 86 +53 + 34 = 87 +53 + 35 = 88 +53 + 36 = 89 +53 + 37 = 90 +53 + 38 = 91 +53 + 39 = 92 +53 + 40 = 93 +53 + 41 = 94 +53 + 42 = 95 +53 + 43 = 96 +53 + 44 = 97 +53 + 45 = 98 +53 + 46 = 99 +53 + 47 = 100 +53 + 48 = 101 +53 + 49 = 102 +53 + 50 = 103 +53 + 51 = 104 +53 + 52 = 105 +53 + 53 = 106 +53 + 54 = 107 +53 + 55 = 108 +53 + 56 = 109 +53 + 57 = 110 +53 + 58 = 111 +53 + 59 = 112 +53 + 60 = 113 +53 + 61 = 114 +53 + 62 = 115 +53 + 63 = 116 +54 + 0 = 54 +54 + 1 = 55 +54 + 2 = 56 +54 + 3 = 57 +54 + 4 = 58 +54 + 5 = 59 +54 + 6 = 60 +54 + 7 = 61 +54 + 8 = 62 +54 + 9 = 63 +54 + 10 = 64 +54 + 11 = 65 +54 + 12 = 66 +54 + 13 = 67 +54 + 14 = 68 +54 + 15 = 69 +54 + 16 = 70 +54 + 17 = 71 +54 + 18 = 72 +54 + 19 = 73 +54 + 20 = 74 +54 + 21 = 75 +54 + 22 = 76 +54 + 23 = 77 +54 + 24 = 78 +54 + 25 = 79 +54 + 26 = 80 +54 + 27 = 81 +54 + 28 = 82 +54 + 29 = 83 +54 + 30 = 84 +54 + 31 = 85 +54 + 32 = 86 +54 + 33 = 87 +54 + 34 = 88 +54 + 35 = 89 +54 + 36 = 90 +54 + 37 = 91 +54 + 38 = 92 +54 + 39 = 93 +54 + 40 = 94 +54 + 41 = 95 +54 + 42 = 96 +54 + 43 = 97 +54 + 44 = 98 +54 + 45 = 99 +54 + 46 = 100 +54 + 47 = 101 +54 + 48 = 102 +54 + 49 = 103 +54 + 50 = 104 +54 + 51 = 105 +54 + 52 = 106 +54 + 53 = 107 +54 + 54 = 108 +54 + 55 = 109 +54 + 56 = 110 +54 + 57 = 111 +54 + 58 = 112 +54 + 59 = 113 +54 + 60 = 114 +54 + 61 = 115 +54 + 62 = 116 +54 + 63 = 117 +55 + 0 = 55 +55 + 1 = 56 +55 + 2 = 57 +55 + 3 = 58 +55 + 4 = 59 +55 + 5 = 60 +55 + 6 = 61 +55 + 7 = 62 +55 + 8 = 63 +55 + 9 = 64 +55 + 10 = 65 +55 + 11 = 66 +55 + 12 = 67 +55 + 13 = 68 +55 + 14 = 69 +55 + 15 = 70 +55 + 16 = 71 +55 + 17 = 72 +55 + 18 = 73 +55 + 19 = 74 +55 + 20 = 75 +55 + 21 = 76 +55 + 22 = 77 +55 + 23 = 78 +55 + 24 = 79 +55 + 25 = 80 +55 + 26 = 81 +55 + 27 = 82 +55 + 28 = 83 +55 + 29 = 84 +55 + 30 = 85 +55 + 31 = 86 +55 + 32 = 87 +55 + 33 = 88 +55 + 34 = 89 +55 + 35 = 90 +55 + 36 = 91 +55 + 37 = 92 +55 + 38 = 93 +55 + 39 = 94 +55 + 40 = 95 +55 + 41 = 96 +55 + 42 = 97 +55 + 43 = 98 +55 + 44 = 99 +55 + 45 = 100 +55 + 46 = 101 +55 + 47 = 102 +55 + 48 = 103 +55 + 49 = 104 +55 + 50 = 105 +55 + 51 = 106 +55 + 52 = 107 +55 + 53 = 108 +55 + 54 = 109 +55 + 55 = 110 +55 + 56 = 111 +55 + 57 = 112 +55 + 58 = 113 +55 + 59 = 114 +55 + 60 = 115 +55 + 61 = 116 +55 + 62 = 117 +55 + 63 = 118 +56 + 0 = 56 +56 + 1 = 57 +56 + 2 = 58 +56 + 3 = 59 +56 + 4 = 60 +56 + 5 = 61 +56 + 6 = 62 +56 + 7 = 63 +56 + 8 = 64 +56 + 9 = 65 +56 + 10 = 66 +56 + 11 = 67 +56 + 12 = 68 +56 + 13 = 69 +56 + 14 = 70 +56 + 15 = 71 +56 + 16 = 72 +56 + 17 = 73 +56 + 18 = 74 +56 + 19 = 75 +56 + 20 = 76 +56 + 21 = 77 +56 + 22 = 78 +56 + 23 = 79 +56 + 24 = 80 +56 + 25 = 81 +56 + 26 = 82 +56 + 27 = 83 +56 + 28 = 84 +56 + 29 = 85 +56 + 30 = 86 +56 + 31 = 87 +56 + 32 = 88 +56 + 33 = 89 +56 + 34 = 90 +56 + 35 = 91 +56 + 36 = 92 +56 + 37 = 93 +56 + 38 = 94 +56 + 39 = 95 +56 + 40 = 96 +56 + 41 = 97 +56 + 42 = 98 +56 + 43 = 99 +56 + 44 = 100 +56 + 45 = 101 +56 + 46 = 102 +56 + 47 = 103 +56 + 48 = 104 +56 + 49 = 105 +56 + 50 = 106 +56 + 51 = 107 +56 + 52 = 108 +56 + 53 = 109 +56 + 54 = 110 +56 + 55 = 111 +56 + 56 = 112 +56 + 57 = 113 +56 + 58 = 114 +56 + 59 = 115 +56 + 60 = 116 +56 + 61 = 117 +56 + 62 = 118 +56 + 63 = 119 +57 + 0 = 57 +57 + 1 = 58 +57 + 2 = 59 +57 + 3 = 60 +57 + 4 = 61 +57 + 5 = 62 +57 + 6 = 63 +57 + 7 = 64 +57 + 8 = 65 +57 + 9 = 66 +57 + 10 = 67 +57 + 11 = 68 +57 + 12 = 69 +57 + 13 = 70 +57 + 14 = 71 +57 + 15 = 72 +57 + 16 = 73 +57 + 17 = 74 +57 + 18 = 75 +57 + 19 = 76 +57 + 20 = 77 +57 + 21 = 78 +57 + 22 = 79 +57 + 23 = 80 +57 + 24 = 81 +57 + 25 = 82 +57 + 26 = 83 +57 + 27 = 84 +57 + 28 = 85 +57 + 29 = 86 +57 + 30 = 87 +57 + 31 = 88 +57 + 32 = 89 +57 + 33 = 90 +57 + 34 = 91 +57 + 35 = 92 +57 + 36 = 93 +57 + 37 = 94 +57 + 38 = 95 +57 + 39 = 96 +57 + 40 = 97 +57 + 41 = 98 +57 + 42 = 99 +57 + 43 = 100 +57 + 44 = 101 +57 + 45 = 102 +57 + 46 = 103 +57 + 47 = 104 +57 + 48 = 105 +57 + 49 = 106 +57 + 50 = 107 +57 + 51 = 108 +57 + 52 = 109 +57 + 53 = 110 +57 + 54 = 111 +57 + 55 = 112 +57 + 56 = 113 +57 + 57 = 114 +57 + 58 = 115 +57 + 59 = 116 +57 + 60 = 117 +57 + 61 = 118 +57 + 62 = 119 +57 + 63 = 120 +58 + 0 = 58 +58 + 1 = 59 +58 + 2 = 60 +58 + 3 = 61 +58 + 4 = 62 +58 + 5 = 63 +58 + 6 = 64 +58 + 7 = 65 +58 + 8 = 66 +58 + 9 = 67 +58 + 10 = 68 +58 + 11 = 69 +58 + 12 = 70 +58 + 13 = 71 +58 + 14 = 72 +58 + 15 = 73 +58 + 16 = 74 +58 + 17 = 75 +58 + 18 = 76 +58 + 19 = 77 +58 + 20 = 78 +58 + 21 = 79 +58 + 22 = 80 +58 + 23 = 81 +58 + 24 = 82 +58 + 25 = 83 +58 + 26 = 84 +58 + 27 = 85 +58 + 28 = 86 +58 + 29 = 87 +58 + 30 = 88 +58 + 31 = 89 +58 + 32 = 90 +58 + 33 = 91 +58 + 34 = 92 +58 + 35 = 93 +58 + 36 = 94 +58 + 37 = 95 +58 + 38 = 96 +58 + 39 = 97 +58 + 40 = 98 +58 + 41 = 99 +58 + 42 = 100 +58 + 43 = 101 +58 + 44 = 102 +58 + 45 = 103 +58 + 46 = 104 +58 + 47 = 105 +58 + 48 = 106 +58 + 49 = 107 +58 + 50 = 108 +58 + 51 = 109 +58 + 52 = 110 +58 + 53 = 111 +58 + 54 = 112 +58 + 55 = 113 +58 + 56 = 114 +58 + 57 = 115 +58 + 58 = 116 +58 + 59 = 117 +58 + 60 = 118 +58 + 61 = 119 +58 + 62 = 120 +58 + 63 = 121 +59 + 0 = 59 +59 + 1 = 60 +59 + 2 = 61 +59 + 3 = 62 +59 + 4 = 63 +59 + 5 = 64 +59 + 6 = 65 +59 + 7 = 66 +59 + 8 = 67 +59 + 9 = 68 +59 + 10 = 69 +59 + 11 = 70 +59 + 12 = 71 +59 + 13 = 72 +59 + 14 = 73 +59 + 15 = 74 +59 + 16 = 75 +59 + 17 = 76 +59 + 18 = 77 +59 + 19 = 78 +59 + 20 = 79 +59 + 21 = 80 +59 + 22 = 81 +59 + 23 = 82 +59 + 24 = 83 +59 + 25 = 84 +59 + 26 = 85 +59 + 27 = 86 +59 + 28 = 87 +59 + 29 = 88 +59 + 30 = 89 +59 + 31 = 90 +59 + 32 = 91 +59 + 33 = 92 +59 + 34 = 93 +59 + 35 = 94 +59 + 36 = 95 +59 + 37 = 96 +59 + 38 = 97 +59 + 39 = 98 +59 + 40 = 99 +59 + 41 = 100 +59 + 42 = 101 +59 + 43 = 102 +59 + 44 = 103 +59 + 45 = 104 +59 + 46 = 105 +59 + 47 = 106 +59 + 48 = 107 +59 + 49 = 108 +59 + 50 = 109 +59 + 51 = 110 +59 + 52 = 111 +59 + 53 = 112 +59 + 54 = 113 +59 + 55 = 114 +59 + 56 = 115 +59 + 57 = 116 +59 + 58 = 117 +59 + 59 = 118 +59 + 60 = 119 +59 + 61 = 120 +59 + 62 = 121 +59 + 63 = 122 +60 + 0 = 60 +60 + 1 = 61 +60 + 2 = 62 +60 + 3 = 63 +60 + 4 = 64 +60 + 5 = 65 +60 + 6 = 66 +60 + 7 = 67 +60 + 8 = 68 +60 + 9 = 69 +60 + 10 = 70 +60 + 11 = 71 +60 + 12 = 72 +60 + 13 = 73 +60 + 14 = 74 +60 + 15 = 75 +60 + 16 = 76 +60 + 17 = 77 +60 + 18 = 78 +60 + 19 = 79 +60 + 20 = 80 +60 + 21 = 81 +60 + 22 = 82 +60 + 23 = 83 +60 + 24 = 84 +60 + 25 = 85 +60 + 26 = 86 +60 + 27 = 87 +60 + 28 = 88 +60 + 29 = 89 +60 + 30 = 90 +60 + 31 = 91 +60 + 32 = 92 +60 + 33 = 93 +60 + 34 = 94 +60 + 35 = 95 +60 + 36 = 96 +60 + 37 = 97 +60 + 38 = 98 +60 + 39 = 99 +60 + 40 = 100 +60 + 41 = 101 +60 + 42 = 102 +60 + 43 = 103 +60 + 44 = 104 +60 + 45 = 105 +60 + 46 = 106 +60 + 47 = 107 +60 + 48 = 108 +60 + 49 = 109 +60 + 50 = 110 +60 + 51 = 111 +60 + 52 = 112 +60 + 53 = 113 +60 + 54 = 114 +60 + 55 = 115 +60 + 56 = 116 +60 + 57 = 117 +60 + 58 = 118 +60 + 59 = 119 +60 + 60 = 120 +60 + 61 = 121 +60 + 62 = 122 +60 + 63 = 123 +61 + 0 = 61 +61 + 1 = 62 +61 + 2 = 63 +61 + 3 = 64 +61 + 4 = 65 +61 + 5 = 66 +61 + 6 = 67 +61 + 7 = 68 +61 + 8 = 69 +61 + 9 = 70 +61 + 10 = 71 +61 + 11 = 72 +61 + 12 = 73 +61 + 13 = 74 +61 + 14 = 75 +61 + 15 = 76 +61 + 16 = 77 +61 + 17 = 78 +61 + 18 = 79 +61 + 19 = 80 +61 + 20 = 81 +61 + 21 = 82 +61 + 22 = 83 +61 + 23 = 84 +61 + 24 = 85 +61 + 25 = 86 +61 + 26 = 87 +61 + 27 = 88 +61 + 28 = 89 +61 + 29 = 90 +61 + 30 = 91 +61 + 31 = 92 +61 + 32 = 93 +61 + 33 = 94 +61 + 34 = 95 +61 + 35 = 96 +61 + 36 = 97 +61 + 37 = 98 +61 + 38 = 99 +61 + 39 = 100 +61 + 40 = 101 +61 + 41 = 102 +61 + 42 = 103 +61 + 43 = 104 +61 + 44 = 105 +61 + 45 = 106 +61 + 46 = 107 +61 + 47 = 108 +61 + 48 = 109 +61 + 49 = 110 +61 + 50 = 111 +61 + 51 = 112 +61 + 52 = 113 +61 + 53 = 114 +61 + 54 = 115 +61 + 55 = 116 +61 + 56 = 117 +61 + 57 = 118 +61 + 58 = 119 +61 + 59 = 120 +61 + 60 = 121 +61 + 61 = 122 +61 + 62 = 123 +61 + 63 = 124 +62 + 0 = 62 +62 + 1 = 63 +62 + 2 = 64 +62 + 3 = 65 +62 + 4 = 66 +62 + 5 = 67 +62 + 6 = 68 +62 + 7 = 69 +62 + 8 = 70 +62 + 9 = 71 +62 + 10 = 72 +62 + 11 = 73 +62 + 12 = 74 +62 + 13 = 75 +62 + 14 = 76 +62 + 15 = 77 +62 + 16 = 78 +62 + 17 = 79 +62 + 18 = 80 +62 + 19 = 81 +62 + 20 = 82 +62 + 21 = 83 +62 + 22 = 84 +62 + 23 = 85 +62 + 24 = 86 +62 + 25 = 87 +62 + 26 = 88 +62 + 27 = 89 +62 + 28 = 90 +62 + 29 = 91 +62 + 30 = 92 +62 + 31 = 93 +62 + 32 = 94 +62 + 33 = 95 +62 + 34 = 96 +62 + 35 = 97 +62 + 36 = 98 +62 + 37 = 99 +62 + 38 = 100 +62 + 39 = 101 +62 + 40 = 102 +62 + 41 = 103 +62 + 42 = 104 +62 + 43 = 105 +62 + 44 = 106 +62 + 45 = 107 +62 + 46 = 108 +62 + 47 = 109 +62 + 48 = 110 +62 + 49 = 111 +62 + 50 = 112 +62 + 51 = 113 +62 + 52 = 114 +62 + 53 = 115 +62 + 54 = 116 +62 + 55 = 117 +62 + 56 = 118 +62 + 57 = 119 +62 + 58 = 120 +62 + 59 = 121 +62 + 60 = 122 +62 + 61 = 123 +62 + 62 = 124 +62 + 63 = 125 +63 + 0 = 63 +63 + 1 = 64 +63 + 2 = 65 +63 + 3 = 66 +63 + 4 = 67 +63 + 5 = 68 +63 + 6 = 69 +63 + 7 = 70 +63 + 8 = 71 +63 + 9 = 72 +63 + 10 = 73 +63 + 11 = 74 +63 + 12 = 75 +63 + 13 = 76 +63 + 14 = 77 +63 + 15 = 78 +63 + 16 = 79 +63 + 17 = 80 +63 + 18 = 81 +63 + 19 = 82 +63 + 20 = 83 +63 + 21 = 84 +63 + 22 = 85 +63 + 23 = 86 +63 + 24 = 87 +63 + 25 = 88 +63 + 26 = 89 +63 + 27 = 90 +63 + 28 = 91 +63 + 29 = 92 +63 + 30 = 93 +63 + 31 = 94 +63 + 32 = 95 +63 + 33 = 96 +63 + 34 = 97 +63 + 35 = 98 +63 + 36 = 99 +63 + 37 = 100 +63 + 38 = 101 +63 + 39 = 102 +63 + 40 = 103 +63 + 41 = 104 +63 + 42 = 105 +63 + 43 = 106 +63 + 44 = 107 +63 + 45 = 108 +63 + 46 = 109 +63 + 47 = 110 +63 + 48 = 111 +63 + 49 = 112 +63 + 50 = 113 +63 + 51 = 114 +63 + 52 = 115 +63 + 53 = 116 +63 + 54 = 117 +63 + 55 = 118 +63 + 56 = 119 +63 + 57 = 120 +63 + 58 = 121 +63 + 59 = 122 +63 + 60 = 123 +63 + 61 = 124 +63 + 62 = 125 +63 + 63 = 126 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_file/main.cpp b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/main.cpp new file mode 100644 index 000000000..771aebbfa --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/main.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + /* */ + /* int = int + int */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /***************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal in1 ("in1"); + sc_signal in2 ("in2"); + sc_signal result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_file/stimgen.cpp b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/stimgen.cpp new file mode 100644 index 000000000..ac55101ee --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/stimgen.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read() << " + " << in2.read() + << " = " << result.read() << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/examples/datawidth_int_file/stimgen.h b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/stimgen.h new file mode 100644 index 000000000..479191043 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/datawidth_int_file/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "systemc.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const sc_signal& result; + // Outputs + sc_signal& in1; + sc_signal& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& RESULT, + sc_signal& IN1, + sc_signal& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/examples/parsing/activa.cpp b/src/systemc/tests/systemc/misc/examples/parsing/activa.cpp new file mode 100644 index 000000000..600884954 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/parsing/activa.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + activa.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( activa ) +{ + SC_HAS_PROCESS( activa ); + + sc_in_clk clk; + + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + + activa( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& A, + const sc_signal& B, + sc_signal& C ) + : + a(A), b(B), c(C) + { + clk( CLK ); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +void activa::entry() +{ + bool cond1 = false, cond2 = false; + + while (1) { + c.write( a + b ); + if (cond1) { + if (cond2) { + c.write( a + b ); + } + c.write( a - b ); + } + c.write( a * b ); + } +} + +int +sc_main( int, char** ) +{ + sc_clock clk; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/examples/parsing/golden/activa.log b/src/systemc/tests/systemc/misc/examples/parsing/golden/activa.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/examples/parsing/golden/activa.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr-130/COMPILE b/src/systemc/tests/systemc/misc/gnats/pr-130/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/gnats/pr-130/pr-130.cpp b/src/systemc/tests/systemc/misc/gnats/pr-130/pr-130.cpp new file mode 100644 index 000000000..6bddf070c --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-130/pr-130.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-130.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( pr130 ) +{ + SC_HAS_PROCESS( pr130 ); + + sc_in_clk clk; + + const sc_signal& x; + + pr130( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& X ) + : x(X) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +SC_MODULE( pr130_2 ) +{ + SC_HAS_PROCESS( pr130_2 ); + + sc_in_clk clk; + + const sc_signal& x; + + pr130_2( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& X ) + : x(X) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-134/golden/pr-134.log b/src/systemc/tests/systemc/misc/gnats/pr-134/golden/pr-134.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-134/golden/pr-134.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr-134/pr-134.cpp b/src/systemc/tests/systemc/misc/gnats/pr-134/pr-134.cpp new file mode 100644 index 000000000..8094ee04c --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-134/pr-134.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-134.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( arst ) +{ + SC_HAS_PROCESS( arst ); + + sc_in_clk clk; + + const sc_signal& a; + sc_signal& b; + + arst( sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& A, + sc_signal& B ) + : a(A), b(B) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +sc_signal yikes; /* instantiation bug with gcc 2.95 */ + +struct xyz { + char x; + char y; +}; + +void +arst::entry() +{ + xyz xyz_array[8]; + for (signed char i = 0; i < 8; ++i) { + xyz_array[i].x = a; + wait(); + } + for (signed char i = 0; i < 8; ++i) { + b = xyz_array[i].x; + wait(); + } +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-2/golden/pr-2.log b/src/systemc/tests/systemc/misc/gnats/pr-2/golden/pr-2.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-2/golden/pr-2.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr-2/pr-2.cpp b/src/systemc/tests/systemc/misc/gnats/pr-2/pr-2.cpp new file mode 100644 index 000000000..25dd808af --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-2/pr-2.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( foo ) +{ + SC_HAS_PROCESS( foo ); + + sc_in_clk clk; + + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + + sc_signed x; + sc_unsigned y; +// sc_logic_vector z; +// sc_bool_vector v; + + foo( sc_module_name name, + sc_clock& CLK, + const sc_signal& A, + const sc_signal& B, + sc_signal& C ) + : + a(A), b(B), c(C), + x(13), y(15) // , z(8), v(11) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +void +foo::entry() +{ + sc_signed x2(13); + sc_unsigned y2(15); + + x2 = x; // should have no converts here + y2 = y; // should have no converts here +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-233/golden/pr-233.log b/src/systemc/tests/systemc/misc/gnats/pr-233/golden/pr-233.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-233/golden/pr-233.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr-233/pr-233.cpp b/src/systemc/tests/systemc/misc/gnats/pr-233/pr-233.cpp new file mode 100644 index 000000000..b0d323884 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-233/pr-233.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-233.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int* +bar(int* x, int* y, int q) +{ + return q ? x : y; +} + +SC_MODULE( pr233 ) +{ + SC_HAS_PROCESS( pr233 ); + + sc_in_clk clk; + + // const sc_signal& x; + // const sc_signal& y; + // const sc_signal& q; + // sc_signal& z; + sc_in x; + sc_in y; + sc_in q; + sc_out z; + + pr233( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& X, + const sc_signal& Y, + const sc_signal& Q, + sc_signal& Z ) + : + x(X), y(Y), q(Q), z(Z) + { + clk( CLK ); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); + +}; + +void +pr233::entry() +{ + z.write( bar(x, y, q) ); + wait(); +} + +int sc_main(int,char**) { return 0; } diff --git a/src/systemc/tests/systemc/misc/gnats/pr-25/golden/pr-25.log b/src/systemc/tests/systemc/misc/gnats/pr-25/golden/pr-25.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-25/golden/pr-25.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr-25/pr-25.cpp b/src/systemc/tests/systemc/misc/gnats/pr-25/pr-25.cpp new file mode 100644 index 000000000..2afff1128 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-25/pr-25.cpp @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-25.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + sc_signal& a; + + t( sc_module_name NAME, + sc_clock& CLK, + sc_signal& A ) + : + a(A) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +int x = 0; + +void t::entry() +{ + static int y = 0; + int i; + i = x; + i = y; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-47_3/golden/pr-47_3.log b/src/systemc/tests/systemc/misc/gnats/pr-47_3/golden/pr-47_3.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-47_3/golden/pr-47_3.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr-47_3/pr-47_3.cpp b/src/systemc/tests/systemc/misc/gnats/pr-47_3/pr-47_3.cpp new file mode 100644 index 000000000..66cdcf92d --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-47_3/pr-47_3.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-47_3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( dub ) +{ + SC_HAS_PROCESS( dub ); + + sc_in_clk clk; + + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + sc_signal& d; + + dub( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& A, + const sc_signal& B, + sc_signal& C, + sc_signal& D ) + : + a(A), + b(B), + c(C), + d(D) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +void +dub::entry() +{ + while (1) { + d = b; + wait(); + c = a; + c = a.read() && b.read(); + wait(); + } +} + +int sc_main( int, char*[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-480/COMPILE b/src/systemc/tests/systemc/misc/gnats/pr-480/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/gnats/pr-480/pr-480.cpp b/src/systemc/tests/systemc/misc/gnats/pr-480/pr-480.cpp new file mode 100644 index 000000000..3c4117781 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-480/pr-480.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-480.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( yow ) +{ + SC_HAS_PROCESS( yow ); + + sc_in_clk clk; + + yow( sc_module_name name, sc_clock& clk_ ) + : clk(clk_) + { + SC_CTHREAD( entry, clk.pos() ); + } + sc_unsigned foo(int x); + int bar(); + void entry(); +}; + +int +yow::bar() +{ + sc_bigint<10> x; + return (x + foo(x.to_int())).to_int(); +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-503-neg/golden/pr-503-neg.log b/src/systemc/tests/systemc/misc/gnats/pr-503-neg/golden/pr-503-neg.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-503-neg/golden/pr-503-neg.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr-503-neg/pr-503-neg.cpp b/src/systemc/tests/systemc/misc/gnats/pr-503-neg/pr-503-neg.cpp new file mode 100644 index 000000000..621a0942e --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-503-neg/pr-503-neg.cpp @@ -0,0 +1,2836 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-503-neg.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +struct EXC_CTRL : sc_module { + + // Input ports + sc_in RPHB_RESET; + sc_in RPHB_REG_RST; + sc_in IBC_GRANT_EXC; + sc_in > IBC_DATA; + sc_in > RPBI_BPA; + sc_in > RPBI_APA; + sc_in MODE_S_P; + sc_in > RHC_ADDR_RT; + sc_in RHC_OP_END; + sc_in RHC_REG_RST; + sc_in > TM_EXC_FIR; + + // clock port + sc_in_clk RHC_RPHB_CLK; + + // Output ports + sc_out EXC_REQ; + sc_out > EXC_ADDR; + sc_out > EXC_DATA; + sc_out EXC_RW; + sc_out EXC_IDLE0; + sc_out EXC_IDLE1; + sc_out > EXC_RPBH_ID; + sc_out > RHC_OP_CODE; + sc_out RHC_OP_START; + sc_out > RHC_SIZE; + sc_out > RHC_ADDR1; + sc_out > RHC_ADDR2; + sc_out > EXC_ERR_NO; + + SC_HAS_PROCESS( EXC_CTRL ); + + EXC_CTRL(char *name) : sc_module(name) { + SC_CTHREAD( start_always, RHC_RPHB_CLK.pos() ); + // reset + reset_signal_is( RPHB_RESET, true); + end_module(); + }; + void start_always(); +}; +void EXC_CTRL::start_always() { + sc_int<16> dt; + sc_int<16> dtemp; + sc_int<8> dtemp_1; + sc_int<14> atemp; + sc_int<14> atemp_1; + sc_int<14> atemp_2; + sc_int<14> atemp_3; + sc_int<14> atemp_4; + sc_int<8> timer; + bool V_reg; + sc_int<5> DID_reg; + sc_int<5> MET_reg; + sc_int<6> Data_Start_reg; + sc_int<12> total_data_len; + sc_int<7> link_ptr; + sc_int<7> index; + sc_int<2> LEV_reg; + sc_int<4> DT_reg; + sc_int<6> NHW_reg; + sc_int<8> RSN_reg; + sc_int<8> RP_addr_ptr; + sc_int<12> cnt; + sc_int<7> sig_gen_buff_addr; + sc_int<5> TS0AR; + sc_int<5> TS1AR; + bool GB_1_ind; + bool GB_ext_flg; + sc_int<2> id_reg; + sc_int<3> err_no_reg; + bool rb_flag; + sc_int<32> _case_1021_; + sc_int<32> _case_1396_; + sc_int<16> _case_1934_; + sc_int<16> _case_2503_; + + sc_int<3> error; + start: while(1) { + + // reset action + reset_action: + { + dt = 0; + dtemp_1 = 0; + atemp = 0; + atemp_1 = 0; + atemp_2 = 0; + atemp_3 = 0; + atemp_4 = 0; + timer = 0; + V_reg = 0; + DID_reg = 0; + MET_reg = 0; + Data_Start_reg = 0; + total_data_len = 0; + link_ptr = 0; + index = 0; + LEV_reg = 0; + DT_reg = 0; + NHW_reg = 0; + RSN_reg = 0; + RP_addr_ptr = 0; + cnt = 0; + sig_gen_buff_addr = 0; + TS0AR = 0; + TS1AR = 0; + GB_1_ind = 0; + GB_ext_flg = 0; + id_reg = -1; + err_no_reg = 0; + rb_flag = 0; + EXC_IDLE0 = 1; + EXC_IDLE1 = 1; + error = 0; + EXC_REQ = 0; + RHC_OP_START = 0; + } + wait(); + + + // continue with the normal operation + + if(RPHB_REG_RST.read()==1) { // init_reg_op + // Initialise programmable register#10, #8, #4, #9, #7, #5 and #6 for hard reset + // Reset STATISTIC_0 register(register #10) + // `write_mem + dt = 0; + atemp = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { //wr_01 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } //wr_01 + + // Reset STATISTIC_1 register(register #10) + // 'write_mem + atemp = 1; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { //wr_02 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } //wr_02 + + // Initialize SSADR_0/POLL_0 register(register #8) + if(MODE_S_P.read()==1) { + dt = 0; + } else { + dt = 16; + } + + // 'write_mem + atemp = 2; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { // wr_03 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } // wr_03 + + // Initialize SSADR_1/POLL_1 register(register #8) + // 'write_mem + atemp = 4; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { //wr_04 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } //wr_04 + + // Reset RPHB_0 registers(register #4) + RHC_ADDR1 = 8; + RHC_ADDR2 = 0; + RHC_SIZE = 2; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + EXC_ADDR = 10; + EXC_DATA = 100; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + + while(1) { // wr_idle_delay_timer_0 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_idle_delay_timer_0 + + // Reset RPHB_1 registers(register #4) + RHC_ADDR1 = 16; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + // Initialize NOT_IDLE_TIMER register for RPBH1 + EXC_ADDR = 18; + EXC_DATA = 100; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_idle_delay_timer_1 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_idle_delay_timer_1 + + // Set default value to RHC_PEQ registers(register #9) + RHC_ADDR1 = 20; + RHC_ADDR2 = 50; + RHC_SIZE = 4; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + // Reset RPB_P/RPB_S registers(register #7) + if(!MODE_S_P.read()==1) { + atemp = 37; + atemp_1 = 53; + RHC_SIZE = 5; + } else { + atemp = 35; + atemp_1 = 51; + RHC_SIZE = 3; + } + + RHC_ADDR2 = 0; + RHC_ADDR1 = 32; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + dt = 30; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_05 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_05 + + RHC_ADDR1 = 48; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + atemp = atemp_1; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_06 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_06 + + // Reset RPBH_0/RPBH_1 RP state table(register #5) + RHC_ADDR1 = 64; + RHC_ADDR2 = 2; + RHC_SIZE = 32; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + + RHC_ADDR1 = 96; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + // Reset RPBH_0/RPBH_1 EM list table(register #6) + RHC_ADDR1 = 128; + RHC_ADDR2 = 0; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + RHC_ADDR1 = 160; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + } else { + wait(); + } // init_reg_op + + // Initialise FPP/LPP in all Buffer Queues for both hard and soft reset + atemp = 270; + dt = 0; + + //buf_empty_loop(begin) + buf_empty_op: while(1) { + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_07 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_07 + + atemp = (atemp) + 1; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_08 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_08 + atemp = (atemp) + 15; + if((atemp.range(8,4)) >= -4) { + wait(); + break; + } else { + wait(); + } + }//buf_empty_loop(end) + + // Initialise all Generic Buffers for both hard and soft reset + atemp = 514; + V_reg = 0; + link_ptr = 5; + dt = (((sc_int<1>(V_reg), sc_int<1>(0)), link_ptr.range(5,0)), sc_int<1>(0)); + + // GB_init_loop(begin) + GB_init_op: while(1) { + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { // wr_09 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } // wr_09 + + atemp = (atemp) + 128; + if(((bool)atemp[13]) == 1) { + wait(); + break; + } else { + wait(); + } + + link_ptr = (link_ptr) + 1; + if(((bool)link_ptr[6]) == 1) { + link_ptr = 0; + } else { + link_ptr = link_ptr; + } + dt = (((sc_int<1>(V_reg), sc_int<1>(0) ), link_ptr.range(5,0)), sc_int<1>(0) ); + } // GB_init_loop(end) + + atemp = -8190; + dt = 63; + + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + + while(1) {// wr_09_1 + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + }// wr_09_1 + + wait(); + + // RPHB Signals handling part + main: while(1) { + wait(); + signal_proc: do{ + + // Set RPBH_0/RPBH_1 ID active + // Reset internal error number and flag for return buffer + id_reg = -1; + err_no_reg = 0; + rb_flag = 0; + //*************************************************************** + /* #### Modified 19/2/98 EJH #### + PEQ code removed from here. PEQ code now only executed if BQ + is empty + */ + //*************************************************************** + wait(); + // Read the queue(RPHBport -> ExecCtrl) + RHC_ADDR1 = 256; + //MACRO:read_queue(begin) + RHC_OP_CODE = 0; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + dtemp.range(13,0) = RHC_ADDR_RT; + wait(); + //MACRO:read_queue(end) + + sig_gen_buff_addr = dtemp.range(13,7); + + if((sig_gen_buff_addr.range(6,5)) == -1) { // **** If BQ empty + wait(); + + // Show idle state for both channels + EXC_IDLE0 = 1; + EXC_IDLE1 = 1; + + // Read the queue poll time + atemp = 22; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) {// rd_01 + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + }// rd_01 + + // Set the timer accordingly and wait + timer = dtemp.range(7,0); + wait(); + while(timer) { + timer = (timer) - 1; + wait(); + continue; + } + continue; + } else { // **** BQ contains pointers + wait(); + } + + // Read the header of Generic Buffer addressed by FPP pointer + atemp = (sig_gen_buff_addr, (sc_int<1>)0); + + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { // rd_02 + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + }// rd_02 + + // Combine with Fault Insertion bit + DID_reg = (dtemp.range(4,0)) | (((TM_EXC_FIR.read())[1], 0)); + MET_reg = dtemp.range(9,5); + if((DID_reg) > 2) { + err_no_reg = 1; + rb_flag = 1; + wait(); + // Show idle state for both channels + EXC_IDLE0 = 1; + EXC_IDLE1 = 1; + break; //goto _signal_proc__END; + } else { + err_no_reg = err_no_reg; + rb_flag = rb_flag; + wait(); + } + + // Set the no. for RPBH being handled + id_reg = (!(DID_reg[0]), !(DID_reg[1])); + + // Set the idle outputs + EXC_IDLE0 = DID_reg[1]; + EXC_IDLE1 = DID_reg[0]; + + // Read inf0 from the Signal being handled + atemp = (sig_gen_buff_addr, (sc_int<8>)8); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) {// rd_03 + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + }// rd_03 + + // Combine with Fault Insertion bit + if((TM_EXC_FIR.read())[2]) { + dtemp = 254; + } else { + dtemp = dtemp; + } + wait(); + + _case_1021_ = dtemp.range(7,0); + switch((int)_case_1021_) { + // if(193 == _case_1021_) { + case 193: + if(((MET_reg) != 3) || ((DID_reg) != 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + id_reg = 1; + err_no_reg = err_no_reg; + rb_flag = rb_flag; + //RHC_ADDR1 = (((sc_int<1>(0), sig_gen_buff_addr), RPBI_BPA.read()), sc_int<1>(MODE_S_P.read())); + RHC_ADDR1 = (((sc_int<1>(0), sig_gen_buff_addr), sc_int<4>(RPBI_BPA.read())), sc_int<1>(MODE_S_P.read())); + RHC_ADDR2 = ((sc_int<8>(10), TS0AR), sc_int<1>(RHC_REG_RST.read())); + RHC_OP_CODE = -4; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 272; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + id_reg = -2; + EXC_ADDR = -8192; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + //RHC_ADDR1 = (((sc_int<1>(0), dtemp.range(13,7)), RPBI_BPA.read()), sc_int<1>(MODE_S_P.read()) ); + RHC_ADDR1 = (((sc_int<1>(0), dtemp.range(13,7)), sc_int<4>(RPBI_BPA.read())), sc_int<1>(MODE_S_P.read()) ); + RHC_ADDR2 = ((sc_int<8>(11), TS1AR), sc_int<1>(RHC_REG_RST.read()) ); + RHC_OP_CODE = -4; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 288; + RHC_ADDR2 = (dtemp.range(13,7), 0); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait();} + break; + // } else if(1 == _case_1021_) { + case 1: + if(((MET_reg) != 3) || ((DID_reg) != 1)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = 1; + atemp = (sig_gen_buff_addr, sc_int<8>(10)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + TS0AR = dtemp.range(4,0); + TS1AR = (TS0AR) + 1; + atemp = (sig_gen_buff_addr, sc_int<8>(11)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = dtemp; + atemp = 9; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = (dt) + 32; + atemp = 17; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + break; + // } else if((((194 == _case_1021_) || (201 == _case_1021_)) || (205 == _case_1021_)) || (204 == _case_1021_)) { + case 194:; + case 201:; + case 205:; + + if(((MET_reg) != 3) || ((DID_reg) != 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + err_no_reg = err_no_reg; + rb_flag = 1; + wait(); + } + break; + // } else if(209 == _case_1021_) { + case 209: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + err_no_reg = err_no_reg; + rb_flag = 1; + wait(); + } + break; + //} else if(7 == _case_1021_) { + case 7: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = rb_flag; + if((DID_reg[0]) == 1) { + DID_reg = 10; + atemp_1 = 272; + } else { + DID_reg = 11; + atemp_1 = 288; + } + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<1>(0)); + RHC_ADDR2 = 0; + RHC_SIZE = ((sc_int<1>(0), DID_reg), sc_int<1>(0)); + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 451; + RHC_ADDR2 = 0; + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = (sig_gen_buff_addr, sc_int<8>(11) ); + dt = 1; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<8>(12) ); + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = atemp_1; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } + break; + // } else if(59 == _case_1021_) { + case 59: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = rb_flag; + atemp = (sig_gen_buff_addr, sc_int<8>(10) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RP_addr_ptr = dtemp.range(7,0); + if((DID_reg[0]) == 1) { + RP_addr_ptr = (sc_int<8>(2), RP_addr_ptr.range(4,0)); + DID_reg = 10; + atemp_1 = (sc_int<8>(4), RP_addr_ptr.range(4,0)); + atemp_2 = 9; + atemp_3 = 272; + } else { + RP_addr_ptr = (sc_int<8>(3), RP_addr_ptr.range(4,0)); + DID_reg = 11; + atemp_1 = (sc_int<8>(5), RP_addr_ptr.range(4,0)); + atemp_2 = 17; + atemp_3 = 288; + } + atemp = (sig_gen_buff_addr, sc_int<8>(11) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + _case_1396_ = int(dtemp); + switch((int)_case_1396_) { + // if(1 == _case_1396_) { + case 1: + rb_flag = 1; + atemp = (sc_int<1>(0), RP_addr_ptr); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = dtemp | 2; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + break; + // } else if(2 == _case_1396_) { + case 2: + rb_flag = 1; + atemp = (sc_int<1>(0), RP_addr_ptr); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = dtemp & -3; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + break; + // } else if(3 == _case_1396_) { + case 3: + rb_flag = 1; + atemp = (sig_gen_buff_addr, sc_int<8>(12) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = atemp_1; + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(4 == _case_1396_) { + case 4: + atemp = atemp_2; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_ADDR2 = 0; + RHC_SIZE = ((sc_int<1>(0), DID_reg), sc_int<1>(0) ); + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 3779; + RHC_ADDR2 = 0; + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = (sig_gen_buff_addr, (sc_int<8>)10); + dt = (dtemp.range(15,5), RP_addr_ptr.range(4,0)); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sc_int<1>(0), RP_addr_ptr); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<8>(11) ); + if(!(dtemp[1])) { + dt = 0; + } else { + dt = 1; + } + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = atemp_1; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<8>(12)); + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = atemp_3; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + break; + // } else { + default: + err_no_reg = -4; + rb_flag = 1; + wait(); + } // end _case_1396_ + + // } else if(208 == _case_1021_) { + case 208: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = rb_flag; + atemp = (sig_gen_buff_addr, sc_int<8>(24) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + NHW_reg = dtemp.range(13,8); + Data_Start_reg = (NHW_reg) + 2; + atemp = (sig_gen_buff_addr, sc_int<8>(8)); + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<8>(25) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + total_data_len = dtemp.range(11,0); + atemp = (sig_gen_buff_addr, sc_int<8>(9) ); + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + Data_Start_reg = 32 + ((Data_Start_reg) << 1); + MET_reg = 6; + if(DID_reg[0]) { + DID_reg = 10; + atemp_1 = 272; + } else { + DID_reg = 11; + atemp_1 = 288; + } + atemp = (sig_gen_buff_addr, sc_int<1>(0) ); + dt = ((Data_Start_reg, MET_reg), DID_reg); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<1>(1)); + dt = (sc_int<1>(0), total_data_len); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(26)); + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(10)); + RHC_SIZE = NHW_reg; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = atemp_1; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } + break; + // } else if(9 == _case_1021_) { + case 9: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = rb_flag; + Data_Start_reg = -32; + MET_reg = 5; + total_data_len = 2; + LEV_reg = 0; + NHW_reg = 3; + RSN_reg = 9; + DT_reg = 0; + link_ptr = 0; + V_reg = 0; + if(DID_reg[0]) { + DID_reg = 10; + atemp_1 = 272; + } else { + DID_reg = 11; + atemp_1 = 288; + } + atemp = (sig_gen_buff_addr, sc_int<8>(10) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + if((TM_EXC_FIR.read())[3]) { + dtemp = 4096; + } else { + dtemp = dtemp; + } + wait(); + _case_1934_ = dtemp; + switch((int)_case_1934_) { + case 0: + // if(0 == _case_1934_) { + atemp = (sig_gen_buff_addr, sc_int<8>(24) ); + dt = (sc_int<10>(256), MODE_S_P); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(1 == _case_1934_) { + case 1: + atemp = (sig_gen_buff_addr, sc_int<8>(24) ); + dt = 3; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(2 == _case_1934_) { + case 2: + atemp = (sig_gen_buff_addr, sc_int<8>(24) ); + dt = 32; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(3 == _case_1934_) { + case 3: + atemp = (sig_gen_buff_addr, sc_int<8>(24) ); + dt = ( sc_int<1>(0), ( RPBI_BPA.read(), RPBI_APA.read() ) ); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(4 == _case_1934_) { + case 4: + total_data_len = 6; + if(!(DID_reg[0])) { + RHC_ADDR1 = 8; + } else { + RHC_ADDR1 = 16; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(24) ); + RHC_SIZE = 3; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(5 == _case_1934_) { + case 5: + total_data_len = 64; + if(!(DID_reg[0])) { + RHC_ADDR1 = 64; + } else { + RHC_ADDR1 = 96; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(24) ); + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(6 == _case_1934_) { + case 6: + total_data_len = 64; + if(!(DID_reg[0])) { + RHC_ADDR1 = 128; + } else { + RHC_ADDR1 = 160; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(24)); + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(7 == _case_1934_) { + case 7: + if(!MODE_S_P.read()) { + total_data_len = 12; + RHC_SIZE = 6; + } else { + total_data_len = 8; + RHC_SIZE = 4; + } + if(!(DID_reg[0])) { + RHC_ADDR1 = 32; + } else { + RHC_ADDR1 = 48; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(24)); + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(8 == _case_1934_) { + case 8: + total_data_len = 2; + if(!(DID_reg[0])) { + RHC_ADDR1 = 2; + } else { + RHC_ADDR1 = 4; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(24)); + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(9 == _case_1934_) { + case 9: + total_data_len = 8; + RHC_ADDR1 = 20; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(24) ); + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(10 == _case_1934_) { + case 10: + total_data_len = 2; + if(!(DID_reg[0])) { + atemp_2 = 0; + } else { + atemp_2 = 1; + } + RHC_ADDR1 = atemp_2; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(24) ); + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = atemp_2; + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(-1 == _case_1934_) { + case -1: + index = 0; + GB_1_ind = 1; + atemp = (sig_gen_buff_addr, sc_int<8>(11) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp_2 = dtemp.range(13,0); + atemp_3 = (sig_gen_buff_addr, sc_int<8>(24) ); + atemp = (sig_gen_buff_addr, sc_int<8>(13) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + cnt = dtemp.range(11,0); + total_data_len = dtemp.range(11,0); + dtemp_1 = -48; + mem_copy_op_1: while(1) { + if((cnt) <= 1) { + index = 0; + wait(); + break; + } else { + wait(); + } + if(cnt > (dtemp_1)) { + index = dtemp_1.range(7,1); + GB_ext_flg = 1; + cnt = cnt - (dtemp_1); + } else { + index = cnt.range(7,1); + GB_ext_flg = 0; + cnt = cnt & 1; + } + RHC_ADDR1 = atemp_2; + RHC_ADDR2 = atemp_3; + RHC_SIZE = index; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + if(!GB_ext_flg) { + wait(); + break; + } else { + wait(); + } + EXC_ADDR = -8192; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + if(GB_1_ind) { + link_ptr = dtemp.range(13,7); + V_reg = 1; + atemp = atemp; + dt = dt; + wait(); + } else { + link_ptr = link_ptr; + V_reg = V_reg; + atemp = (atemp_4.range(13,7), sc_int<8>(2)); + dt = (sc_int<8>(-4), dtemp.range(12,0)); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + dtemp_1 = -16; + atemp_2 = atemp_2 + (index); + atemp_3 = (dtemp.range(13,7), sc_int<7>( 8 )); + atemp_4 = dtemp.range(13,0); + GB_1_ind = 0; + } + if(!(cnt[0])) { + wait(); + } else { + wait(); + atemp = atemp_2 + (index); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = atemp_3 + (index); + dt = (sc_int<1>(0), dtemp.range(7,0)); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + if(!GB_1_ind) { + atemp = (atemp_4.range(13,7), sc_int<7>( 2 )); + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } else { + wait(); + } break; + // } else { + default: + err_no_reg = -3; + rb_flag = 1; + wait(); + } // end _case_1934_ + if((rb_flag) == 0) { + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, link_ptr); + RHC_ADDR2 = (sc_int<1>(0), total_data_len); + RHC_SIZE = ((sc_int<1>(0), DID_reg), V_reg); + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sc_int<8>(9), NHW_reg); + RHC_ADDR2 = (sc_int<1>(0), total_data_len); + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = atemp_1; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } else { + wait(); + } + } + break; + // } else if(210 == _case_1021_) { + case 210: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = 1; + atemp = (sig_gen_buff_addr, sc_int<1>(1)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + cnt = dtemp.range(11,0); + atemp = (sig_gen_buff_addr, sc_int<8>(10) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + if((TM_EXC_FIR.read())[3]) { + dtemp = 4096; + } else { + dtemp = dtemp; + } + wait(); + _case_2503_ = dtemp; + switch((int)_case_2503_) { + // if(4 == _case_2503_) { + case 4: + if((cnt) != 6) { + err_no_reg = 2; + wait(); + } else { + atemp = (sig_gen_buff_addr, sc_int<8>(24) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = (sc_int<1>(1), dtemp.range(14,0)); + if(DID_reg[0]) { + atemp = 8; + atemp_1 = 9; + } else { + atemp = 16; + atemp_1 = 17; + } + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(25) ); + RHC_ADDR2 = atemp_1; + RHC_SIZE = 2; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(5 == _case_2503_) { + case 5: + if((cnt) != 64) { + err_no_reg = 2; + wait(); + } else { + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(24) ); + RHC_SIZE = 32; + if(DID_reg[0]) { + RHC_ADDR2 = 64; + } else { + RHC_ADDR2 = 96; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(6 == _case_2503_) { + case 6: + if((cnt) != 64) { + err_no_reg = 2; + wait(); + } else { + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(24) ); + RHC_SIZE = 32; + if(DID_reg[0]) { + RHC_ADDR2 = 128; + } else { + RHC_ADDR2 = 160; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(7 == _case_2503_) { + case 7: + if(((!MODE_S_P.read()) && ((cnt) != 12)) || (MODE_S_P.read() && ((cnt) != 8))) { + err_no_reg = 2; + wait(); + } else { + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(24) ); + if(!MODE_S_P.read()) { + RHC_SIZE = 6; + } else { + RHC_SIZE = 4; + } + if(DID_reg[0]) { + RHC_ADDR2 = 32; + } else { + RHC_ADDR2 = 48; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(8 == _case_2503_) { + case 8: + if((cnt) != 2) { + err_no_reg = 2; + wait(); + } else { + atemp = (sig_gen_buff_addr, sc_int<8>(24) ); + if(DID_reg[0]) { + atemp_1 = 2; + } else { + atemp_1 = 4; + } + RHC_ADDR1 = atemp; + RHC_ADDR2 = atemp_1; + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(9 == _case_2503_) { + case 9: + if((cnt) != 8) { + err_no_reg = 2; + wait(); + } else { + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(24) ); + RHC_ADDR2 = 20; + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(-1 == _case_2503_) { + case -1: + wt_mem: do { + atemp = (sig_gen_buff_addr, sc_int<8>(11) ); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp_2 = dtemp.range(13,0); + atemp_1 = (sig_gen_buff_addr, sc_int<8>(24) ); + GB_copy_op_1: while(1) { + if((cnt) <= 1) { + wait(); + break; + } else { + atemp = atemp_1; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = atemp_2; + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp_1 = (atemp_1) + 1; + atemp_2 = (atemp_2) + 1; + cnt = (cnt) - 2; + if(atemp_1 <= ((sig_gen_buff_addr, sc_int<1>(-1) ))) { + wait(); + continue; + } else { + atemp = (sig_gen_buff_addr, sc_int<7>( 2 )); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = ((sc_int<1>(0), sig_gen_buff_addr), sc_int<1>(0) ); + EXC_ADDR = -8192; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + sig_gen_buff_addr = dtemp.range(13,7); + atemp_1 = (sig_gen_buff_addr, sc_int<8>(8) ); + } + } + } + if(!(cnt[0])) { + wait(); + break; //goto _wt_mem__END; + } else { + atemp = atemp_1; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp_3.range(7,0) = dtemp.range(7,0); + atemp = atemp_2; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = (dtemp.range(15,8), atemp_3.range(7,0)); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + _wt_mem__END:; }while(0); + break; + // } else { + default: + err_no_reg = -3; + wait(); + } // end _case_2503_ + } + break; + // } else if(176 == _case_1021_) { + case 176: + if(((MET_reg) != 3) || ((DID_reg) != 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + rb_flag = rb_flag; + id_reg = 1; + if(!MODE_S_P.read()) { + total_data_len = 156; + } else { + total_data_len = 152; + } + RSN_reg = 10; + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_ADDR2 = (sc_int<1>(0) , total_data_len); + RHC_SIZE = 20; + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (RSN_reg, sc_int<1>(1) ); + RHC_ADDR2 = (sc_int<1>(0), total_data_len); + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = (sig_gen_buff_addr, sc_int<8>(10) ); + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = 8; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(24) ); + RHC_SIZE = 3; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 64; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(27) ); + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 128; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(59) ); + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 32; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(-37) ); + if(!MODE_S_P.read()) { + atemp_1 = (sig_gen_buff_addr, sc_int<8>(-31) ); + atemp_2 = (sig_gen_buff_addr, sc_int<8>(-30) ); + atemp_3 = 6; + RHC_SIZE = 6; + } else { + atemp_1 = (sig_gen_buff_addr, sc_int<8>(-33) ); + atemp_2 = (sig_gen_buff_addr, sc_int<8>(-32) ); + atemp_3 = 4; + RHC_SIZE = 4; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 2; + RHC_ADDR2 = atemp_1; + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 20; + RHC_ADDR2 = atemp_2; + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 272; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + id_reg = -2; + EXC_ADDR = -8192; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + sig_gen_buff_addr = dtemp.range(13,7); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_ADDR2 = (sc_int<1>(0), total_data_len); + RHC_SIZE = 22; + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (RSN_reg, sc_int<1>(1) ); + RHC_ADDR2 = (sc_int<1>(0) , total_data_len); + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = (sig_gen_buff_addr, sc_int<8>(10) ); + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = 16; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(24) ); + RHC_SIZE = 3; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 96; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(27) ); + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 160; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(59) ); + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 48; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<8>(-37)); + RHC_SIZE = atemp_3.range(6,0); + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 4; + RHC_ADDR2 = (sig_gen_buff_addr.range(6,0), atemp_1.range(6,0)); + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 20; + RHC_ADDR2 = (sig_gen_buff_addr.range(6,0), atemp_2.range(6,0)); + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 288; + RHC_ADDR2 = (sig_gen_buff_addr.range(6,0), 0); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } + break; + // } else if(10 == _case_1021_) { + case 10: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + err_no_reg = err_no_reg; + rb_flag = rb_flag; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(24) ); + if(DID_reg[0]) { + atemp_1 = 128; + atemp_2 = 32; + atemp_3 = 2; + atemp_4 = 272; + atemp = 64; + DID_reg = 10; + RHC_ADDR2 = 8; + } else { + atemp_1 = 160; + atemp_2 = 48; + atemp_3 = 4; + atemp_4 = 288; + atemp = 96; + DID_reg = 11; + RHC_ADDR2 = 16; + } + RHC_SIZE = 3; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(27) ); + RHC_ADDR2 = atemp; + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(59)); + RHC_ADDR2 = atemp_1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<8>(-37) ); + RHC_ADDR2 = atemp_2; + if(!MODE_S_P.read()) { + atemp_1 = -3743; + RHC_SIZE = 6; + } else { + atemp_1 = -4001; + RHC_SIZE = 4; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr.range(6,0), atemp_1.range(6,0)); + RHC_ADDR2 = atemp_3; + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr.range(6,0), atemp_1.range(13,7)); + RHC_ADDR2 = 20; + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<1>(0) ); + RHC_ADDR2 = 0; + RHC_SIZE = ((sc_int<1>(0), DID_reg), sc_int<1>(0) ); + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 768; + RHC_ADDR2 = 0; + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + + //Write Buffer Queue + RHC_ADDR1 = atemp_4; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<1>(0) ); + + //Macro:write_queue(begin) + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + //Macro:write_queue(end) + RHC_OP_START = 0; + wait(); + } + break; + // } else { + default: + err_no_reg = 3; + rb_flag = 1; + wait(); + + } // end _case_1021_ + + _signal_proc__END:; } while(0); + if((err_no_reg) != 0) { + error = err_no_reg; + wait(); + error = 0; + wait(); + } else { + wait(); + } + if((rb_flag) != 0) { + dt = ((sc_int<1>(0), sig_gen_buff_addr), sc_int<1>(0)); + EXC_ADDR = -8192; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } else { + wait(); + } + } // end start + } // end main + } // main entry + +int +sc_main( int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-503/golden/pr-503.log b/src/systemc/tests/systemc/misc/gnats/pr-503/golden/pr-503.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-503/golden/pr-503.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr-503/pr-503.cpp b/src/systemc/tests/systemc/misc/gnats/pr-503/pr-503.cpp new file mode 100644 index 000000000..dd8ad55ea --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-503/pr-503.cpp @@ -0,0 +1,2836 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-503.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +struct EXC_CTRL : sc_module { + + // Input ports + sc_in RPHB_RESET; + sc_in RPHB_REG_RST; + sc_in IBC_GRANT_EXC; + sc_in > IBC_DATA; + sc_in > RPBI_BPA; + sc_in > RPBI_APA; + sc_in MODE_S_P; + sc_in > RHC_ADDR_RT; + sc_in RHC_OP_END; + sc_in RHC_REG_RST; + sc_in > TM_EXC_FIR; + + // clock port + sc_in_clk RHC_RPHB_CLK; + + // Output ports + sc_out EXC_REQ; + sc_out > EXC_ADDR; + sc_out > EXC_DATA; + sc_out EXC_RW; + sc_out EXC_IDLE0; + sc_out EXC_IDLE1; + sc_out > EXC_RPBH_ID; + sc_out > RHC_OP_CODE; + sc_out RHC_OP_START; + sc_out > RHC_SIZE; + sc_out > RHC_ADDR1; + sc_out > RHC_ADDR2; + sc_out > EXC_ERR_NO; + + SC_HAS_PROCESS( EXC_CTRL ); + + EXC_CTRL(char *name) : sc_module(name) { + SC_CTHREAD( start_always, RHC_RPHB_CLK.pos() ); + // reset + reset_signal_is(RPHB_RESET,true); + end_module(); + }; + void start_always(); +}; +void EXC_CTRL::start_always() { + sc_int<16> dt; + sc_int<16> dtemp; + sc_int<8> dtemp_1; + sc_int<14> atemp; + sc_int<14> atemp_1; + sc_int<14> atemp_2; + sc_int<14> atemp_3; + sc_int<14> atemp_4; + sc_int<8> timer; + bool V_reg; + sc_int<5> DID_reg; + sc_int<5> MET_reg; + sc_int<6> Data_Start_reg; + sc_int<12> total_data_len; + sc_int<7> link_ptr; + sc_int<7> index; + sc_int<2> LEV_reg; + sc_int<4> DT_reg; + sc_int<6> NHW_reg; + sc_int<8> RSN_reg; + sc_int<8> RP_addr_ptr; + sc_int<12> cnt; + sc_int<7> sig_gen_buff_addr; + sc_int<5> TS0AR; + sc_int<5> TS1AR; + bool GB_1_ind; + bool GB_ext_flg; + sc_int<2> id_reg; + sc_int<3> err_no_reg; + bool rb_flag; + sc_int<32> _case_1021_; + sc_int<32> _case_1396_; + sc_int<16> _case_1934_; + sc_int<16> _case_2503_; + + sc_int<3> error; + start: while(1) { + + // reset action + reset_action: + { + dt = 0; + dtemp_1 = 0; + atemp = 0; + atemp_1 = 0; + atemp_2 = 0; + atemp_3 = 0; + atemp_4 = 0; + timer = 0; + V_reg = 0; + DID_reg = 0; + MET_reg = 0; + Data_Start_reg = 0; + total_data_len = 0; + link_ptr = 0; + index = 0; + LEV_reg = 0; + DT_reg = 0; + NHW_reg = 0; + RSN_reg = 0; + RP_addr_ptr = 0; + cnt = 0; + sig_gen_buff_addr = 0; + TS0AR = 0; + TS1AR = 0; + GB_1_ind = 0; + GB_ext_flg = 0; + id_reg = -1; + err_no_reg = 0; + rb_flag = 0; + EXC_IDLE0 = 1; + EXC_IDLE1 = 1; + error = 0; + EXC_REQ = 0; + RHC_OP_START = 0; + } + wait(); + + + // continue with the normal operation + + if(RPHB_REG_RST.read()==1) { // init_reg_op + // Initialise programmable register#10, #8, #4, #9, #7, #5 and #6 for hard reset + // Reset STATISTIC_0 register(register #10) + // `write_mem + dt = 0; + atemp = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { //wr_01 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } //wr_01 + + // Reset STATISTIC_1 register(register #10) + // 'write_mem + atemp = 1; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { //wr_02 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } //wr_02 + + // Initialize SSADR_0/POLL_0 register(register #8) + if(MODE_S_P.read()==1) { + dt = 0; + } else { + dt = 16; + } + + // 'write_mem + atemp = 2; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { // wr_03 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } // wr_03 + + // Initialize SSADR_1/POLL_1 register(register #8) + // 'write_mem + atemp = 4; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { //wr_04 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } //wr_04 + + // Reset RPHB_0 registers(register #4) + RHC_ADDR1 = 8; + RHC_ADDR2 = 0; + RHC_SIZE = 2; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + EXC_ADDR = 10; + EXC_DATA = 100; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + + while(1) { // wr_idle_delay_timer_0 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_idle_delay_timer_0 + + // Reset RPHB_1 registers(register #4) + RHC_ADDR1 = 16; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + // Initialize NOT_IDLE_TIMER register for RPBH1 + EXC_ADDR = 18; + EXC_DATA = 100; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_idle_delay_timer_1 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_idle_delay_timer_1 + + // Set default value to RHC_PEQ registers(register #9) + RHC_ADDR1 = 20; + RHC_ADDR2 = 50; + RHC_SIZE = 4; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + // Reset RPB_P/RPB_S registers(register #7) + if(!MODE_S_P.read()==1) { + atemp = 37; + atemp_1 = 53; + RHC_SIZE = 5; + } else { + atemp = 35; + atemp_1 = 51; + RHC_SIZE = 3; + } + + RHC_ADDR2 = 0; + RHC_ADDR1 = 32; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + dt = 30; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_05 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_05 + + RHC_ADDR1 = 48; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + atemp = atemp_1; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_06 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_06 + + // Reset RPBH_0/RPBH_1 RP state table(register #5) + RHC_ADDR1 = 64; + RHC_ADDR2 = 2; + RHC_SIZE = 32; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + + RHC_ADDR1 = 96; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + // Reset RPBH_0/RPBH_1 EM list table(register #6) + RHC_ADDR1 = 128; + RHC_ADDR2 = 0; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + RHC_ADDR1 = 160; + + // (begin)MACRO: 'set_mem + RHC_OP_CODE = 2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + // (end)MACRO: 'set_mem + + } else { + wait(); + } // init_reg_op + + // Initialise FPP/LPP in all Buffer Queues for both hard and soft reset + atemp = 270; + dt = 0; + + //buf_empty_loop(begin) + buf_empty_op: while(1) { + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_07 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_07 + + atemp = (atemp) + 1; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) {// wr_08 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + }// wr_08 + atemp = (atemp) + 15; + if((atemp.range(8,4)) >= -4) { + wait(); + break; + } else { + wait(); + } + }//buf_empty_loop(end) + + // Initialise all Generic Buffers for both hard and soft reset + atemp = 514; + V_reg = 0; + link_ptr = 5; + dt = (((sc_int<1>(V_reg), sc_int<1>(0)), link_ptr.range(5,0)), sc_int<8>(0)); + + // GB_init_loop(begin) + GB_init_op: while(1) { + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { // wr_09 + EXC_REQ = 0; + if(IBC_GRANT_EXC.read()==1) { + wait(); + break; + } + wait(); + } // wr_09 + + atemp = (atemp) + 128; + if(((bool)atemp[13]) == 1) { + wait(); + break; + } else { + wait(); + } + + link_ptr = (link_ptr) + 1; + if(((bool)link_ptr[6]) == 1) { + link_ptr = 0; + } else { + link_ptr = link_ptr; + } + dt = (((sc_int<1>(V_reg), sc_int<1>(0)), link_ptr.range(5,0)), sc_int<8>(0)); + } // GB_init_loop(end) + + atemp = -8190; + dt = 63; + + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + + while(1) {// wr_09_1 + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + }// wr_09_1 + + wait(); + + // RPHB Signals handling part + main: while(1) { + wait(); + signal_proc: do{ + + // Set RPBH_0/RPBH_1 ID active + // Reset internal error number and flag for return buffer + id_reg = -1; + err_no_reg = 0; + rb_flag = 0; + //*************************************************************** + /* #### Modified 19/2/98 EJH #### + PEQ code removed from here. PEQ code now only executed if BQ + is empty + */ + //*************************************************************** + wait(); + // Read the queue(RPHBport -> ExecCtrl) + RHC_ADDR1 = 256; + //MACRO:read_queue(begin) + RHC_OP_CODE = 0; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + dtemp.range(13,0) = RHC_ADDR_RT; + wait(); + //MACRO:read_queue(end) + + sig_gen_buff_addr = dtemp.range(13,7); + + if((sig_gen_buff_addr.range(6,5)) == -1) { // **** If BQ empty + wait(); + + // Show idle state for both channels + EXC_IDLE0 = 1; + EXC_IDLE1 = 1; + + // Read the queue poll time + atemp = 22; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) {// rd_01 + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + }// rd_01 + + // Set the timer accordingly and wait + timer = dtemp.range(7,0); + wait(); + while(timer) { + timer = (timer) - 1; + wait(); + continue; + } + continue; + } else { // **** BQ contains pointers + wait(); + } + + // Read the header of Generic Buffer addressed by FPP pointer + atemp = (sig_gen_buff_addr, sc_int<7>(0)); + + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { // rd_02 + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + }// rd_02 + + // Combine with Fault Insertion bit + DID_reg = (dtemp.range(4,0)) | (((TM_EXC_FIR.read())[1], sc_int<4>(0))); + MET_reg = dtemp.range(9,5); + if((DID_reg) > 2) { + err_no_reg = 1; + rb_flag = 1; + wait(); + // Show idle state for both channels + EXC_IDLE0 = 1; + EXC_IDLE1 = 1; + break; //goto _signal_proc__END; + } else { + err_no_reg = err_no_reg; + rb_flag = rb_flag; + wait(); + } + + // Set the no. for RPBH being handled + id_reg = (!(DID_reg[0]), !(DID_reg[1])); + + // Set the idle outputs + EXC_IDLE0 = DID_reg[1]; + EXC_IDLE1 = DID_reg[0]; + + // Read inf0 from the Signal being handled + atemp = (sig_gen_buff_addr, sc_int<7>(8)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) {// rd_03 + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + }// rd_03 + + // Combine with Fault Insertion bit + if((TM_EXC_FIR.read())[2]) { + dtemp = 254; + } else { + dtemp = dtemp; + } + wait(); + + _case_1021_ = dtemp.range(7,0); + switch((int)_case_1021_) { + // if(193 == _case_1021_) { + case 193: + if(((MET_reg) != 3) || ((DID_reg) != 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + id_reg = 1; + err_no_reg = err_no_reg; + rb_flag = rb_flag; + //RHC_ADDR1 = (((sc_int<4>(0), sig_gen_buff_addr), RPBI_BPA.read()), sc_int<1>(MODE_S_P.read())); + RHC_ADDR1 = (((sc_int<4>(0), sig_gen_buff_addr), sc_int<4>(RPBI_BPA.read())), sc_int<1>(MODE_S_P.read())); + RHC_ADDR2 = ((sc_int<8>(10), TS0AR), sc_int<1>(RHC_REG_RST.read())); + RHC_OP_CODE = -4; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 272; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + id_reg = -2; + EXC_ADDR = -8192; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + //RHC_ADDR1 = (((sc_int<4>(0), dtemp.range(13,7)), RPBI_BPA.read()), sc_int<1>(MODE_S_P.read())); + RHC_ADDR1 = (((sc_int<4>(0), dtemp.range(13,7)), sc_int<4>(RPBI_BPA.read())), sc_int<1>(MODE_S_P.read())); + RHC_ADDR2 = ((sc_int<8>(11), TS1AR), sc_int<1>(RHC_REG_RST.read())); + RHC_OP_CODE = -4; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 288; + RHC_ADDR2 = (dtemp.range(13,7), sc_int<7>(0)); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait();} + break; + // } else if(1 == _case_1021_) { + case 1: + if(((MET_reg) != 3) || ((DID_reg) != 1)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = 1; + atemp = (sig_gen_buff_addr, sc_int<7>(10)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + TS0AR = dtemp.range(4,0); + TS1AR = (TS0AR) + 1; + atemp = (sig_gen_buff_addr, sc_int<7>(11)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = dtemp; + atemp = 9; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = (dt) + 32; + atemp = 17; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + break; + // } else if((((194 == _case_1021_) || (201 == _case_1021_)) || (205 == _case_1021_)) || (204 == _case_1021_)) { + case 194:; + case 201:; + case 205:; + + if(((MET_reg) != 3) || ((DID_reg) != 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + err_no_reg = err_no_reg; + rb_flag = 1; + wait(); + } + break; + // } else if(209 == _case_1021_) { + case 209: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + err_no_reg = err_no_reg; + rb_flag = 1; + wait(); + } + break; + //} else if(7 == _case_1021_) { + case 7: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = rb_flag; + if((DID_reg[0]) == 1) { + DID_reg = 10; + atemp_1 = 272; + } else { + DID_reg = 11; + atemp_1 = 288; + } + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_ADDR2 = 0; + RHC_SIZE = ((sc_int<1>(0), DID_reg), sc_int<1>(0)); + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 451; + RHC_ADDR2 = 0; + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = (sig_gen_buff_addr, sc_int<7>(11)); + dt = 1; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<7>(12)); + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = atemp_1; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } + break; + // } else if(59 == _case_1021_) { + case 59: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = rb_flag; + atemp = (sig_gen_buff_addr, sc_int<7>(10)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RP_addr_ptr = dtemp.range(7,0); + if((DID_reg[0]) == 1) { + RP_addr_ptr = (sc_int<3>(2), RP_addr_ptr.range(4,0)); + DID_reg = 10; + atemp_1 = (sc_int<9>(4), RP_addr_ptr.range(4,0)); + atemp_2 = 9; + atemp_3 = 272; + } else { + RP_addr_ptr = (sc_int<3>(3), RP_addr_ptr.range(4,0)); + DID_reg = 11; + atemp_1 = (sc_int<9>(5), RP_addr_ptr.range(4,0)); + atemp_2 = 17; + atemp_3 = 288; + } + atemp = (sig_gen_buff_addr, sc_int<7>(11)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + _case_1396_ = int(dtemp); + switch((int)_case_1396_) { + // if(1 == _case_1396_) { + case 1: + rb_flag = 1; + atemp = (sc_int<6>(0), RP_addr_ptr); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = dtemp | 2; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + break; + // } else if(2 == _case_1396_) { + case 2: + rb_flag = 1; + atemp = (sc_int<6>(0), RP_addr_ptr); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = dtemp & -3; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + break; + // } else if(3 == _case_1396_) { + case 3: + rb_flag = 1; + atemp = (sig_gen_buff_addr, sc_int<7>(12)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = atemp_1; + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(4 == _case_1396_) { + case 4: + atemp = atemp_2; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_ADDR2 = 0; + RHC_SIZE = ((sc_int<1>(0), DID_reg), sc_int<1>(0)); + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 3779; + RHC_ADDR2 = 0; + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = (sig_gen_buff_addr, sc_int<7>(10)); + dt = (dtemp.range(15,5), RP_addr_ptr.range(4,0)); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sc_int<6>(0), RP_addr_ptr); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<7>(11)); + if(!(dtemp[1])) { + dt = 0; + } else { + dt = 1; + } + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = atemp_1; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<7>(12)); + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = atemp_3; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + break; + // } else { + default: + err_no_reg = -4; + rb_flag = 1; + wait(); + } // end _case_1396_ + + // } else if(208 == _case_1021_) { + case 208: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = rb_flag; + atemp = (sig_gen_buff_addr, sc_int<7>(24)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + NHW_reg = dtemp.range(13,8); + Data_Start_reg = (NHW_reg) + 2; + atemp = (sig_gen_buff_addr, sc_int<7>(8)); + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<7>(25)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + total_data_len = dtemp.range(11,0); + atemp = (sig_gen_buff_addr, sc_int<7>(9)); + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + Data_Start_reg = 32 + ((Data_Start_reg) << 1); + MET_reg = 6; + if(DID_reg[0]) { + DID_reg = 10; + atemp_1 = 272; + } else { + DID_reg = 11; + atemp_1 = 288; + } + atemp = (sig_gen_buff_addr, sc_int<7>(0)); + dt = ((Data_Start_reg, MET_reg), DID_reg); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = (sig_gen_buff_addr, sc_int<7>(1)); + dt = (sc_int<4>(0), total_data_len); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(26)); + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(10)); + RHC_SIZE = NHW_reg; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = atemp_1; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } + break; + // } else if(9 == _case_1021_) { + case 9: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = rb_flag; + Data_Start_reg = -32; + MET_reg = 5; + total_data_len = 2; + LEV_reg = 0; + NHW_reg = 3; + RSN_reg = 9; + DT_reg = 0; + link_ptr = 0; + V_reg = 0; + if(DID_reg[0]) { + DID_reg = 10; + atemp_1 = 272; + } else { + DID_reg = 11; + atemp_1 = 288; + } + atemp = (sig_gen_buff_addr, sc_int<7>(10)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + if((TM_EXC_FIR.read())[3]) { + dtemp = 4096; + } else { + dtemp = dtemp; + } + wait(); + _case_1934_ = dtemp; + switch((int)_case_1934_) { + case 0: + // if(0 == _case_1934_) { + atemp = (sig_gen_buff_addr, sc_int<7>(24)); + dt = (256, MODE_S_P.read()); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(1 == _case_1934_) { + case 1: + atemp = (sig_gen_buff_addr, sc_int<7>(24)); + dt = 3; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(2 == _case_1934_) { + case 2: + atemp = (sig_gen_buff_addr, sc_int<7>(24)); + dt = 32; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(3 == _case_1934_) { + case 3: + atemp = (sig_gen_buff_addr, sc_int<7>(24)); + dt = ( sc_int<10>(0), ( RPBI_BPA.read() , RPBI_APA.read() ) ); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(4 == _case_1934_) { + case 4: + total_data_len = 6; + if(!(DID_reg[0])) { + RHC_ADDR1 = 8; + } else { + RHC_ADDR1 = 16; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 3; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(5 == _case_1934_) { + case 5: + total_data_len = 64; + if(!(DID_reg[0])) { + RHC_ADDR1 = 64; + } else { + RHC_ADDR1 = 96; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(6 == _case_1934_) { + case 6: + total_data_len = 64; + if(!(DID_reg[0])) { + RHC_ADDR1 = 128; + } else { + RHC_ADDR1 = 160; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(7 == _case_1934_) { + case 7: + if(!MODE_S_P.read()) { + total_data_len = 12; + RHC_SIZE = 6; + } else { + total_data_len = 8; + RHC_SIZE = 4; + } + if(!(DID_reg[0])) { + RHC_ADDR1 = 32; + } else { + RHC_ADDR1 = 48; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(8 == _case_1934_) { + case 8: + total_data_len = 2; + if(!(DID_reg[0])) { + RHC_ADDR1 = 2; + } else { + RHC_ADDR1 = 4; + } + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(9 == _case_1934_) { + case 9: + total_data_len = 8; + RHC_ADDR1 = 20; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); break; + // } else if(10 == _case_1934_) { + case 10: + total_data_len = 2; + if(!(DID_reg[0])) { + atemp_2 = 0; + } else { + atemp_2 = 1; + } + RHC_ADDR1 = atemp_2; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = atemp_2; + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } break; + // } else if(-1 == _case_1934_) { + case -1: + index = 0; + GB_1_ind = 1; + atemp = (sig_gen_buff_addr, sc_int<7>(11)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp_2 = dtemp.range(13,0); + atemp_3 = (sig_gen_buff_addr, sc_int<7>(24)); + atemp = (sig_gen_buff_addr, sc_int<7>(13)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + cnt = dtemp.range(11,0); + total_data_len = dtemp.range(11,0); + dtemp_1 = -48; + mem_copy_op_1: while(1) { + if((cnt) <= 1) { + index = 0; + wait(); + break; + } else { + wait(); + } + if(cnt > (dtemp_1)) { + index = dtemp_1.range(7,1); + GB_ext_flg = 1; + cnt = cnt - (dtemp_1); + } else { + index = cnt.range(7,1); + GB_ext_flg = 0; + cnt = cnt & 1; + } + RHC_ADDR1 = atemp_2; + RHC_ADDR2 = atemp_3; + RHC_SIZE = index; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + if(!GB_ext_flg) { + wait(); + break; + } else { + wait(); + } + EXC_ADDR = -8192; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + if(GB_1_ind) { + link_ptr = dtemp.range(13,7); + V_reg = 1; + atemp = atemp; + dt = dt; + wait(); + } else { + link_ptr = link_ptr; + V_reg = V_reg; + atemp = (atemp_4.range(13,7), sc_int<7>(2)); + dt = (sc_int<3>(-4), dtemp.range(12,0)); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + dtemp_1 = -16; + atemp_2 = atemp_2 + (index); + atemp_3 = (dtemp.range(13,7), sc_int<7>(8)); + atemp_4 = dtemp.range(13,0); + GB_1_ind = 0; + } + if(!(cnt[0])) { + wait(); + } else { + wait(); + atemp = atemp_2 + (index); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = atemp_3 + (index); + dt = (sc_int<8>(0), dtemp.range(7,0)); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + if(!GB_1_ind) { + atemp = (atemp_4.range(13,7), sc_int<7>(2)); + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } else { + wait(); + } break; + // } else { + default: + err_no_reg = -3; + rb_flag = 1; + wait(); + } // end _case_1934_ + if((rb_flag) == 0) { + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, link_ptr); + RHC_ADDR2 = (sc_int<2>(0), total_data_len); + RHC_SIZE = ((sc_int<1>(0), DID_reg), V_reg); + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sc_int<8>(9), NHW_reg); + RHC_ADDR2 = (sc_int<2>(0), total_data_len); + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = atemp_1; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } else { + wait(); + } + } + break; + // } else if(210 == _case_1021_) { + case 210: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + err_no_reg = err_no_reg; + rb_flag = 1; + atemp = (sig_gen_buff_addr, sc_int<7>(1)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + cnt = dtemp.range(11,0); + atemp = (sig_gen_buff_addr, sc_int<7>(10)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + if((TM_EXC_FIR.read())[3]) { + dtemp = 4096; + } else { + dtemp = dtemp; + } + wait(); + _case_2503_ = dtemp; + switch((int)_case_2503_) { + // if(4 == _case_2503_) { + case 4: + if((cnt) != 6) { + err_no_reg = 2; + wait(); + } else { + atemp = (sig_gen_buff_addr, sc_int<7>(24)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = (sc_int<1>(1), dtemp.range(14,0)); + if(DID_reg[0]) { + atemp = 8; + atemp_1 = 9; + } else { + atemp = 16; + atemp_1 = 17; + } + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(25)); + RHC_ADDR2 = atemp_1; + RHC_SIZE = 2; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(5 == _case_2503_) { + case 5: + if((cnt) != 64) { + err_no_reg = 2; + wait(); + } else { + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 32; + if(DID_reg[0]) { + RHC_ADDR2 = 64; + } else { + RHC_ADDR2 = 96; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(6 == _case_2503_) { + case 6: + if((cnt) != 64) { + err_no_reg = 2; + wait(); + } else { + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 32; + if(DID_reg[0]) { + RHC_ADDR2 = 128; + } else { + RHC_ADDR2 = 160; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(7 == _case_2503_) { + case 7: + if(((!MODE_S_P.read()) && ((cnt) != 12)) || (MODE_S_P.read() && ((cnt) != 8))) { + err_no_reg = 2; + wait(); + } else { + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(24)); + if(!MODE_S_P.read()) { + RHC_SIZE = 6; + } else { + RHC_SIZE = 4; + } + if(DID_reg[0]) { + RHC_ADDR2 = 32; + } else { + RHC_ADDR2 = 48; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(8 == _case_2503_) { + case 8: + if((cnt) != 2) { + err_no_reg = 2; + wait(); + } else { + atemp = (sig_gen_buff_addr, sc_int<7>(24)); + if(DID_reg[0]) { + atemp_1 = 2; + } else { + atemp_1 = 4; + } + RHC_ADDR1 = atemp; + RHC_ADDR2 = atemp_1; + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(9 == _case_2503_) { + case 9: + if((cnt) != 8) { + err_no_reg = 2; + wait(); + } else { + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_ADDR2 = 20; + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } break; + // } else if(-1 == _case_2503_) { + case -1: + wt_mem: do { + atemp = (sig_gen_buff_addr, sc_int<7>(11)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp_2 = dtemp.range(13,0); + atemp_1 = (sig_gen_buff_addr, sc_int<7>(24)); + GB_copy_op_1: while(1) { + if((cnt) <= 1) { + wait(); + break; + } else { + atemp = atemp_1; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp = atemp_2; + dt = dtemp; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp_1 = (atemp_1) + 1; + atemp_2 = (atemp_2) + 1; + cnt = (cnt) - 2; + if(atemp_1 <= ((sig_gen_buff_addr, sc_int<7>(-1)))) { + wait(); + continue; + } else { + atemp = (sig_gen_buff_addr, sc_int<7>(2)); + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = ((sc_int<1>(0), sig_gen_buff_addr), sc_int<8>(0)); + EXC_ADDR = -8192; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + sig_gen_buff_addr = dtemp.range(13,7); + atemp_1 = (sig_gen_buff_addr, sc_int<7>(8)); + } + } + } + if(!(cnt[0])) { + wait(); + break; //goto _wt_mem__END; + } else { + atemp = atemp_1; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + atemp_3.range(7,0) = dtemp.range(7,0); + atemp = atemp_2; + EXC_ADDR = atemp; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + dt = (dtemp.range(15,8), atemp_3.range(7,0)); + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } + _wt_mem__END:; }while(0); + break; + // } else { + default: + err_no_reg = -3; + wait(); + } // end _case_2503_ + } + break; + // } else if(176 == _case_1021_) { + case 176: + if(((MET_reg) != 3) || ((DID_reg) != 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + wait(); + rb_flag = rb_flag; + id_reg = 1; + if(!MODE_S_P.read()) { + total_data_len = 156; + } else { + total_data_len = 152; + } + RSN_reg = 10; + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_ADDR2 = (sc_int<2>(0), total_data_len); + RHC_SIZE = 20; + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (RSN_reg, sc_int<6>(1)); + RHC_ADDR2 = (sc_int<2>(0), total_data_len); + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = (sig_gen_buff_addr, sc_int<7>(10)); + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = 8; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 3; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 64; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(27)); + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 128; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(59)); + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 32; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(-37)); + if(!MODE_S_P.read()) { + atemp_1 = (sig_gen_buff_addr, sc_int<7>(-31)); + atemp_2 = (sig_gen_buff_addr, sc_int<7>(-30)); + atemp_3 = 6; + RHC_SIZE = 6; + } else { + atemp_1 = (sig_gen_buff_addr, sc_int<7>(-33)); + atemp_2 = (sig_gen_buff_addr, sc_int<7>(-32)); + atemp_3 = 4; + RHC_SIZE = 4; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 2; + RHC_ADDR2 = atemp_1; + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 20; + RHC_ADDR2 = atemp_2; + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 272; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + id_reg = -2; + EXC_ADDR = -8192; + EXC_RPBH_ID = id_reg; + EXC_RW = 1; + EXC_REQ = 1; + wait(); + while(1) { + dtemp = IBC_DATA.read(); + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + sig_gen_buff_addr = dtemp.range(13,7); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_ADDR2 = (sc_int<2>(0), total_data_len); + RHC_SIZE = 22; + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (RSN_reg, sc_int<6>(1)); + RHC_ADDR2 = (sc_int<2>(0), total_data_len); + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + atemp = (sig_gen_buff_addr, sc_int<7>(10)); + dt = 0; + EXC_ADDR = atemp; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + RHC_ADDR1 = 16; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(24)); + RHC_SIZE = 3; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 96; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(27)); + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 160; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(59)); + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 48; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(-37)); + RHC_SIZE = atemp_3.range(6,0); + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 4; + RHC_ADDR2 = (sig_gen_buff_addr.range(6,0), atemp_1.range(6,0)); + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 20; + RHC_ADDR2 = (sig_gen_buff_addr.range(6,0), atemp_2.range(6,0)); + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 288; + RHC_ADDR2 = (sig_gen_buff_addr.range(6,0), sc_int<7>(0)); + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + } + break; + // } else if(10 == _case_1021_) { + case 10: + if(((MET_reg) != 3) || ((DID_reg) == 0)) { + err_no_reg = 1; + rb_flag = 1; + wait(); + } else { + err_no_reg = err_no_reg; + rb_flag = rb_flag; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(24)); + if(DID_reg[0]) { + atemp_1 = 128; + atemp_2 = 32; + atemp_3 = 2; + atemp_4 = 272; + atemp = 64; + DID_reg = 10; + RHC_ADDR2 = 8; + } else { + atemp_1 = 160; + atemp_2 = 48; + atemp_3 = 4; + atemp_4 = 288; + atemp = 96; + DID_reg = 11; + RHC_ADDR2 = 16; + } + RHC_SIZE = 3; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(27)); + RHC_ADDR2 = atemp; + RHC_SIZE = 32; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(59)); + RHC_ADDR2 = atemp_1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(-37)); + RHC_ADDR2 = atemp_2; + if(!MODE_S_P.read()) { + atemp_1 = -3743; + RHC_SIZE = 6; + } else { + atemp_1 = -4001; + RHC_SIZE = 4; + } + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr.range(6,0), atemp_1.range(6,0)); + RHC_ADDR2 = atemp_3; + RHC_SIZE = 1; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr.range(6,0), atemp_1.range(13,7)); + RHC_ADDR2 = 20; + RHC_SIZE = 4; + RHC_OP_CODE = 3; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = (sig_gen_buff_addr, sc_int<7>(0)); + RHC_ADDR2 = 0; + RHC_SIZE = ((sc_int<1>(0), DID_reg), sc_int<1>(0)); + RHC_OP_CODE = -3; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + RHC_ADDR1 = 768; + RHC_ADDR2 = 0; + RHC_SIZE = sig_gen_buff_addr; + RHC_OP_CODE = -2; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + RHC_OP_START = 0; + wait(); + + //Write Buffer Queue + RHC_ADDR1 = atemp_4; + RHC_ADDR2 = (sig_gen_buff_addr, sc_int<7>(0)); + + //Macro:write_queue(begin) + RHC_OP_CODE = 1; + EXC_RPBH_ID = id_reg; + RHC_OP_START = 1; + wait(); + while(!RHC_OP_END.read()) { + wait(); + continue; + } + wait(); + //Macro:write_queue(end) + RHC_OP_START = 0; + wait(); + } + break; + // } else { + default: + err_no_reg = 3; + rb_flag = 1; + wait(); + + } // end _case_1021_ + + _signal_proc__END:; } while(0); + if((err_no_reg) != 0) { + error = err_no_reg; + wait(); + error = 0; + wait(); + } else { + wait(); + } + if((rb_flag) != 0) { + dt = ((sc_int<1>(0), sig_gen_buff_addr), sc_int<8>(0)); + EXC_ADDR = -8192; + EXC_DATA = dt; + EXC_RW = 0; + EXC_REQ = 1; + wait(); + while(1) { + EXC_REQ = 0; + if(IBC_GRANT_EXC) { + wait(); + break; + } + wait(); + } + } else { + wait(); + } + } // end start + } // end main + } // main entry + +int +sc_main( int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-51_pos/COMPILE b/src/systemc/tests/systemc/misc/gnats/pr-51_pos/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/gnats/pr-51_pos/pr-51_pos.cpp b/src/systemc/tests/systemc/misc/gnats/pr-51_pos/pr-51_pos.cpp new file mode 100644 index 000000000..39baf4b01 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-51_pos/pr-51_pos.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-51_pos.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +foo() +{ + sc_logic x; + sc_logic y; + sc_logic z; + char q; + + x = 'X'; + z = '1'; + y = x & z; + y = x | z; + y = x ^ z; + y ^= x; + y |= z; + y &= z; + y = z; + y = x & sc_logic('1'); + y = sc_logic('1') | x; + y = '0'; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-52/COMPILE b/src/systemc/tests/systemc/misc/gnats/pr-52/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/gnats/pr-52/pr-52.cpp b/src/systemc/tests/systemc/misc/gnats/pr-52/pr-52.cpp new file mode 100644 index 000000000..47189f40f --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-52/pr-52.cpp @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-52.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +sc_signed +pr_52( const sc_signed& x, + const sc_signed& y ) +{ + return (x + y + 4); +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-56/COMPILE b/src/systemc/tests/systemc/misc/gnats/pr-56/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/gnats/pr-56/pr-56.cpp b/src/systemc/tests/systemc/misc/gnats/pr-56/pr-56.cpp new file mode 100644 index 000000000..4d1acb2d4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-56/pr-56.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-56.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +void +foo( sc_signed& x, + sc_unsigned& y ) +{ + x = x + 1; +} + +sc_signed +bar() +{ + sc_signed y(6); + sc_unsigned yu(6); + foo(y, yu); + sc_signed z(10); + sc_unsigned zu(10); + foo(z, zu); + sc_signed x(8); + sc_unsigned xu(8); + foo(x, xu); + return x + y + z; +} diff --git a/src/systemc/tests/systemc/misc/gnats/pr-5_1/COMPILE b/src/systemc/tests/systemc/misc/gnats/pr-5_1/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/gnats/pr-5_1/pr-5_1.cpp b/src/systemc/tests/systemc/misc/gnats/pr-5_1/pr-5_1.cpp new file mode 100644 index 000000000..11a3f3a29 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr-5_1/pr-5_1.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-5_1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( matrix ) +{ + SC_HAS_PROCESS( matrix ); + + sc_in_clk clk; + + // Constructor + matrix ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET + ) + : reset(RESET) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + } + + void entry(); + + // INPUTS + const sc_signal& reset; +}; + +int sc_main(int, char**) { return 0; } diff --git a/src/systemc/tests/systemc/misc/gnats/pr213/golden/pr213.log b/src/systemc/tests/systemc/misc/gnats/pr213/golden/pr213.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr213/golden/pr213.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr213/pr213.cpp b/src/systemc/tests/systemc/misc/gnats/pr213/pr213.cpp new file mode 100644 index 000000000..78811c1f0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr213/pr213.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr213.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( abc ) +{ + SC_HAS_PROCESS( abc ); + + sc_in_clk clk; + + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + + abc( sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& A, + const sc_signal& B, + sc_signal& C ) + + : + a(A), b(B), c(C) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +void +abc::entry() +{ + int i = 0, j = 0; + do { + i++; + if (i == 5) continue; + if (i == 7) break; + j = j + 2; + wait(); + } while (a.read() && b.read()); +} + +int sc_main( int, char** ) { return 0; } diff --git a/src/systemc/tests/systemc/misc/gnats/pr57/golden/pr57.log b/src/systemc/tests/systemc/misc/gnats/pr57/golden/pr57.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr57/golden/pr57.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/gnats/pr57/pr57.cpp b/src/systemc/tests/systemc/misc/gnats/pr57/pr57.cpp new file mode 100644 index 000000000..d9a7e0d54 --- /dev/null +++ b/src/systemc/tests/systemc/misc/gnats/pr57/pr57.cpp @@ -0,0 +1,118 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr57.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( pr57 ) +{ + SC_HAS_PROCESS( pr57 ); + + sc_in_clk clk; + + const sc_signal& a; + sc_signal& b; + + bool c; + bool d; + + pr57( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& A, + sc_signal& B ) + : + a(A), b(B) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); + bool pres1(bool x, bool y); + bool pres2(bool x); + void pres3(bool z); +}; + +bool +pr57::pres1(bool x, bool y) +{ + bool u = x | c; + bool v = y & d; + bool t = d; + d = y; + c = t; + return u ^ v; +} + +bool +pr57::pres2(bool x) +{ + bool u = x & c & d; + d = x ^ u; + return u; +} + +void +pr57::pres3(bool z) +{ + c = z; +} + +void +pr57::entry() +{ + c = a; + d = ! a.read(); + b = pres1(1, 0); + wait(); + c = ! a.read(); + d = a; + b = pres1(0, 1); + wait(); + c = a; + d = ! a.read(); + b = pres2(0); + wait(); + pres3(!a.read()); + d = a; + b = pres2(1); + wait(); +} + +int +sc_main( int, char*[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/define.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/golden/test.log b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/main.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/monitor.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/monitor.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/monitor.h new file mode 100644 index 000000000..b642f3a03 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/tb.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/tb.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/tb.h new file mode 100644 index 000000000..aff2b39e4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/test.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/test.cpp new file mode 100644 index 000000000..0db610d12 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/test.cpp @@ -0,0 +1,95 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies loop unrolling for various data types +// +// Test Plan: 5.2 +// From PR-476 +// +// Author: PRP +// Date Created: 05 APR 99 +// + + +#include "test.h" + +void test::entry() +{ + int i; + short int j; + long int k; + sc_int<4> l; + sc_uint<4> m; + sc_bigint<4> p; + sc_biguint<4> q; + sc_signed n(8); + sc_unsigned o(8); + int tmp = 0; + + for (i = 0; i < 3; i++) + tmp++; + + for (j = 0; j < 3; j++) + tmp++; + + for (k = 0; k < 3; k++) + tmp++; + + for (l = 0; l < 3; l++) + tmp++; + + for (m = 0; m < 3; m++) + tmp++; + + for (n = 0; n < 3; n++) + tmp++; + + for (o = 0; o < 3; o++) + tmp++; + + for (p = 0; p < 3; p++) + tmp++; + + for (q = 0; q < 3; q++) + tmp++; + + o1 = tmp; + + wait(); +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/test.f b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/test.f new file mode 100644 index 000000000..19d8926c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/test.f @@ -0,0 +1,4 @@ +pr476/test.cpp +pr476/tb.cpp +pr476/monitor.cpp +pr476/main.cpp diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/test.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/test.h new file mode 100644 index 000000000..1e6520892 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/pr476/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/define.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/golden/test.log b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/main.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/main.cpp new file mode 100644 index 000000000..7b71a5fb3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start (); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/monitor.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/monitor.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/monitor.h new file mode 100644 index 000000000..b642f3a03 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/tb.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/tb.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/tb.h new file mode 100644 index 000000000..aff2b39e4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/test.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/test.cpp new file mode 100644 index 000000000..a7332db84 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/test.cpp @@ -0,0 +1,151 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies loop unrolling +// +// Test Plan: 5.2 +// +// Author: PRP +// Date Created: 19 Feb 99 +// + + +#include "test.h" + +void test::entry() +{ + int i,j; + int a[10],b[10]; + + + do { wait(); } while (cont1 == 0); + wait (); + + i = 0; + while (i < 4) { + a[i] = 0; + i = i + 1; + } + + i = 0; + while (i <= 4) { + b[i] = 10; + i = i + 1; + } + + i = 9; + while (i > 4) { + a[i] = 20; + i = i - 1; + } + + i = 9; + while (i >= 4) { + b[i] = 30; + i = i - 1; + } + + i = -4; + while (i < 0) { + a[i+4] = 40; + i = i + 1; + } + + + i = -4; + while (i < 0) { + a[i+4] = 50; + i = i + 2; + } + + i = -4; + while (i <= 0) { + a[i+4] = 60; + i = i + 2; + } + + i = -4; + while (i <= 0) { + a[i+4] = 70; + i = i + 3; + } + i = -4; + while (i <= 0) { + a[i+4] = 80; + i = i + 4; + } + + i = -6; + while (i <= 0) { + a[i+6] = 90; + i = i + 5; + } + + i = 8; + if (i) { + j = 9; + } + + while (i <= 10) { + a[i] = 80; + i = i + 5; + } + + for (i = 0; i < 2; i++) + a[i] = 8; + + i = 0; + for (; i < 3; i++) + a[i] = 10; + + i = 0; + wait(); + for (; i < 3; ++i) { + a[i] = 11; + //i = i + 1; + wait(); + } + + i = 0; + for (; i < 3; i++) + a[i] = 12; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/test.f b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/test.f new file mode 100644 index 000000000..df637f6d7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/test.f @@ -0,0 +1,4 @@ +test1/test.cpp +test1/tb.cpp +test1/monitor.cpp +test1/main.cpp diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/test.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/test.h new file mode 100644 index 000000000..bdcc8e59b --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test1/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/define.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/golden/test.log b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/main.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/main.cpp new file mode 100644 index 000000000..7b71a5fb3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start (); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/monitor.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/monitor.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/monitor.h new file mode 100644 index 000000000..b642f3a03 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/tb.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/tb.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/tb.h new file mode 100644 index 000000000..aff2b39e4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/test.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/test.cpp new file mode 100644 index 000000000..edccd2fe4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/test.cpp @@ -0,0 +1,121 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies loop unrolling +// +// Test Plan: 5.2 +// From 37.sc +// +// Author: PRP +// Date Created: 05 APR 99 +// + + +#include "test.h" + +void test::entry() +{ + int i,j; + int a[10],b[10]; + + + do { wait(); } while (cont1 == 0); + wait (); + + i = 0; + wait (); + for (; i < 3; /*i++*/) { + a[i] = 11; + i += 2; + wait (); + } + + for (i=0; i < 3; i ++) { + a[i] = 1; + } + + for (i=0; i < 3;) { + a[i] = 2; + ++i; + } + + i = 0; + for (; i < 3; ) { + a[i] = 3; + i += 2; + } + + if (i) + j = 1; + else + j = 3; + + wait(); + for (; i < 5;++i) { + a[i] = 8; + wait(); + } + if (i) + i = 1; + else + j = 3; + i = 0; + for (; i < 3;++i) { + a[i] = 9; + } + + i = j; + if (j) { + i = 0; + for (; i < 3;++i) { + a[i] = 10; + } + } + + for (j = 0; j < 2; j++) { + i = 0; + for (; i < 3;++i) { + a[i] = 11; + } + b[j] = i; + } + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/test.f b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/test.f new file mode 100644 index 000000000..0ff8be826 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/test.f @@ -0,0 +1,4 @@ +test2/test.cpp +test2/tb.cpp +test2/monitor.cpp +test2/main.cpp diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/test.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/test.h new file mode 100644 index 000000000..bdcc8e59b --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test2/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/define.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/golden/test.log b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/main.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/main.cpp new file mode 100644 index 000000000..7b71a5fb3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start (); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/monitor.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/monitor.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/monitor.h new file mode 100644 index 000000000..b642f3a03 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/tb.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/tb.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/tb.h new file mode 100644 index 000000000..aff2b39e4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/test.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/test.cpp new file mode 100644 index 000000000..71e506552 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/test.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies loop unrolling +// +// Test Plan: 5.2 +// From 38.sc +// +// Author: PRP +// Date Created: 05 APR 99 +// + + +#include "test.h" + +void test::entry() +{ + int i,j; + int a[10]; + + + do { wait(); } while (cont1 == 0); + wait (); + + for (j = 0; j < 2; j++) { + for (i = 0; i < 3; i++) { + a[i] = 11; + } + } + + wait(); + + o1 = 16; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/test.f b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/test.f new file mode 100644 index 000000000..f4bc5ed9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/test.f @@ -0,0 +1,4 @@ +test3/test.cpp +test3/tb.cpp +test3/monitor.cpp +test3/main.cpp diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/test.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/test.h new file mode 100644 index 000000000..bdcc8e59b --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test3/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/define.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/golden/test.log b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/main.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/main.cpp new file mode 100644 index 000000000..7b71a5fb3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start (); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/monitor.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/monitor.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/monitor.h new file mode 100644 index 000000000..b642f3a03 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/tb.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/tb.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/tb.h new file mode 100644 index 000000000..aff2b39e4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/test.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/test.cpp new file mode 100644 index 000000000..88981212f --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/test.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies loop unrolling +// +// Test Plan: 5.2 +// From 39.sc +// +// Author: PRP +// Date Created: 05 APR 99 +// + + +#include "test.h" + +void test::entry() +{ + int i,j,k,m; + int a[10],b[10]; + + + do { wait(); } while (cont1 == 0); + wait (); + + + for (i = 0; i < 2; i++) + for (j = 0; j < 3; j++) + for (k = 0; k < 4; k++) + a[i] = b[i] + 53; + + for (i = 0; i < 2; i++) + for (j = 0; j < 3; j++) + for (k = 0; k < 4; k++) + for (m = 0; m < 2; m++) + a[i] = b[i] + 17; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/test.f b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/test.f new file mode 100644 index 000000000..4ac7cda08 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/test.f @@ -0,0 +1,4 @@ +test4/test.cpp +test4/tb.cpp +test4/monitor.cpp +test4/main.cpp diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/test.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/test.h new file mode 100644 index 000000000..bdcc8e59b --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test4/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/define.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/golden/test.log b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/main.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/main.cpp new file mode 100644 index 000000000..7b71a5fb3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start (); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/monitor.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/monitor.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/monitor.h new file mode 100644 index 000000000..b642f3a03 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/tb.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/tb.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/tb.h new file mode 100644 index 000000000..aff2b39e4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/test.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/test.cpp new file mode 100644 index 000000000..4049b7a82 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/test.cpp @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies loop unrolling +// +// Test Plan: 5.2 +// From 40.sc +// +// Author: PRP +// Date Created: 05 APR 99 +// + + +#include "test.h" + +void test::entry() +{ + int i,j,k,m; + int a[10],b[10]; + + + do { wait(); } while (cont1 == 0); + wait (); + + for (i = 0; i < 2; i++) { + if (i == 1) + continue; + a[i] = 5; + + wait(); + } + for (i = 0; i < 2; i++) { + if (i == 1) + break; + a[i] = 10; + + wait(); + } + + for (i = 0; i < 2; i++) + a[i] = 6; + + for (i = 0; i < 2; i++) { + for (j = 0; j < 2; j++) { + a[j] = 8; + if (j == 1) + continue; + a[j] = 7; + + wait(); + } + for (j = 0; j < 2; j++) + a[j] = 8; + } + + + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/test.f b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/test.f new file mode 100644 index 000000000..48933f17e --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/test.f @@ -0,0 +1,4 @@ +test5/test.cpp +test5/tb.cpp +test5/monitor.cpp +test5/main.cpp diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/test.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/test.h new file mode 100644 index 000000000..bdcc8e59b --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test5/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/define.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/golden/test.log b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/main.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/main.cpp new file mode 100644 index 000000000..7b71a5fb3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start (); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/monitor.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/monitor.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/monitor.h new file mode 100644 index 000000000..b642f3a03 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/tb.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/tb.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/tb.h new file mode 100644 index 000000000..aff2b39e4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/test.cpp b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/test.cpp new file mode 100644 index 000000000..261ae9eef --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/test.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies loop unrolling +// +// Test Plan: 5.2 +// From 41.sc +// +// Author: PRP +// Date Created: 05 APR 99 +// + + +#include "test.h" + +void test::entry() +{ + int i,j,k,m; + int a[10]; + + a[0] = a[1] = i1; + a[2] = a[3] = i2; + a[4] = a[5] = i3; + a[6] = a[7] = i4; + a[8] = a[9] = i5; + + wait (); + + for (i = 0; i < 2; i++) + for (j = 0; j < 3; j++) + for (k = 0; k < 4; k++) + a[i] = 5; + + for (i = 0; i < 2; i++) + for (j = 0; j < 3; j++) + for (k = 0; k < 4; k++) + for (m = 0; m < 2; m++) + a[i] = 6; + + o1 = a[0]; + o2 = a[2]; + o3 = a[4]; + o4 = a[6]; + o5 = a[8]; + + wait(); +} + diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/test.f b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/test.f new file mode 100644 index 000000000..208a2e652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/test.f @@ -0,0 +1,4 @@ +test6/test.cpp +test6/tb.cpp +test6/monitor.cpp +test6/main.cpp diff --git a/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/test.h b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/test.h new file mode 100644 index 000000000..6112b0b36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/if_transforms/loop_unrolling/test6/test.h @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + // const sc_signal& i1; + // const sc_signal& i2; + // const sc_signal& i3; + // const sc_signal& i4; + // const sc_signal& i5; + sc_in i1; + sc_in i2; + sc_in i3; + sc_in i4; + sc_in i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), + cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + i1(I1); i2(I2); i3(I3); i4(I4); i5(I5); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/memory_explosion/test01/golden/test01.log b/src/systemc/tests/systemc/misc/memory_explosion/test01/golden/test01.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/memory_explosion/test01/golden/test01.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/memory_explosion/test01/test01.cpp b/src/systemc/tests/systemc/misc/memory_explosion/test01/test01.cpp new file mode 100644 index 000000000..3ddfe6efa --- /dev/null +++ b/src/systemc/tests/systemc/misc/memory_explosion/test01/test01.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Martin, +tis is a very simple test that I used to verify functionality and timing +with 1.2.1 on NT and I can see how memory consumption grows linearly with +time. When I ran my implementation I could see the program footprint of +about 400K during the whole simulation. +The test runs about 20 seconds and memory footprint grows to about 90MB. If +you run it longer it starts swapping memory do the disk and goes very +slowly. So I waited till it grew to 1GB and then killed it because all +computer does at that point is swapping memory. I guess if you let it run +long enough it would eventually die. I think this happens only with +optimized libraries. +*/ + +//-------------------------------------------------------------------------- + +#include + +#define sc_ns SC_NS +#define sc_ms SC_MS + +class A : public sc_module +{ + sc_event e1; + + void f() + { + while(true) + { + e1.notify(sc_time(5,sc_ns)); + wait(e1); + + wait(2,sc_ns); + } + } + public: + sc_in_clk clk; + SC_CTOR(A) { SC_THREAD(f); sensitive< x; + + for( int i = 0; i < 3000000; ++ i ) { + sc_fixed_fast<24,3> tmp_fx = 0.3; + x = (sc_bv_base) tmp_fx.range( 23, 0 ); + } + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_1/COMPILE b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_1/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_1/T_1_1_2_1.cpp b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_1/T_1_1_2_1.cpp new file mode 100644 index 000000000..00a573ddd --- /dev/null +++ b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_1/T_1_1_2_1.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_1_1_2_1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int argc, char* argv[] ) +{ + sc_clock clock1("CLK1"); + sc_clock clock2("CLK2", 2, SC_NS); + sc_clock clock3("CLK3", 3, SC_NS, 0.25); + sc_clock clock4("CLK4", 4, SC_NS, 0.5, 0.5, SC_NS); + sc_clock clock5("CLK5", 5, SC_NS, 0.75, 1.0, SC_NS, false); + const char *name = clock1.name(); + // double period = clock2.period(); + sc_time period = clock2.period(); + double duty_cycle = clock3.duty_cycle(); + + // clock4.pos(); + // clock5.neg(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_3/COMPILE b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_3/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_3/T_1_1_2_3.cpp b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_3/T_1_1_2_3.cpp new file mode 100644 index 000000000..258002914 --- /dev/null +++ b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_3/T_1_1_2_3.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_1_1_2_3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( foo ) +{ + SC_HAS_PROCESS( foo ); + + sc_in_clk clk; + + const sc_signal &input; + sc_signal &output; + + int state; + + foo( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& INPUT, + sc_signal& OUTPUT ) + : input(INPUT), output(OUTPUT) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_4/COMPILE b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_4/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_4/T_1_1_2_4.cpp b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_4/T_1_1_2_4.cpp new file mode 100644 index 000000000..e0f691312 --- /dev/null +++ b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_4/T_1_1_2_4.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_1_1_2_4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( foo ) +{ + SC_HAS_PROCESS( foo ); + + const sc_signal &input; + sc_signal &output; + + int state; + + foo( sc_module_name NAME, + const sc_signal& INPUT, + sc_signal& OUTPUT ) + : input(INPUT), output(OUTPUT) + { + SC_METHOD( entry ); + sensitive << input; + } + void entry(); +}; + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_5/COMPILE b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_5/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_5/T_1_1_2_5.cpp b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_5/T_1_1_2_5.cpp new file mode 100644 index 000000000..1b9c768bb --- /dev/null +++ b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_5/T_1_1_2_5.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_1_1_2_5.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( foo ) +{ + SC_HAS_PROCESS( foo ); + + const sc_signal &input; + sc_signal &output; + + int state; + + foo( sc_module_name NAME, + const sc_signal& INPUT, + sc_signal& OUTPUT ) + : input(INPUT), output(OUTPUT) + { + SC_THREAD( entry ); + sensitive << input; + } + void entry(); +}; + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_6/COMPILE b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_6/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/parsing/T_1_1_2_6/T_1_1_2_6.cpp b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_6/T_1_1_2_6.cpp new file mode 100644 index 000000000..851bd25c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/parsing/T_1_1_2_6/T_1_1_2_6.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_1_1_2_6.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( inverter ) +{ + SC_HAS_PROCESS( inverter ); + + sc_in_clk clk; + + const sc_signal& input; + sc_signal& output; + + inverter( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& INPUT, + sc_signal& OUTPUT ) + : input(INPUT), output(OUTPUT) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +class foo: public sc_module { +public: + + sc_signal sig; + + inverter I1, I2; + + foo(const char* NAME, + sc_clock& CLK, + const sc_signal& input, + sc_signal& output ) + : sc_module(NAME), + I1("I1", CLK, input, sig), + I2("I2", CLK, sig, output) { + end_module(); + } +}; + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/reports/test01/golden/test01.log b/src/systemc/tests/systemc/misc/reports/test01/golden/test01.log new file mode 100644 index 000000000..5b96591bd --- /dev/null +++ b/src/systemc/tests/systemc/misc/reports/test01/golden/test01.log @@ -0,0 +1,55 @@ +SystemC Simulation + +Exception caught +Error: (E101) sc_clock period is zero: increase the period: clock 'clk1' +In file: + +Exception caught +Error: (E102) sc_clock high time is zero: increase the period or increase the duty cycle: clock 'clk2' +In file: + +Exception caught +Error: (E103) sc_clock low time is zero: increase the period or decrease the duty cycle: clock 'clk3' +In file: + +Exception caught +Error: (E118) find event failed: port is not bound: port 'a.port_0' (sc_in) +In file: + +Exception caught +Error: (E112) get interface failed: port is not bound: port 'b.port_0' (sc_in) +In file: + +Exception caught +Error: (E112) get interface failed: port is not bound: port 'c.port_0' (sc_in) +In file: + +Exception caught +Error: (E119) sc_semaphore requires an initial value >= 0: semaphore 'semaphore_0' +In file: + +Exception caught +Error: (E119) sc_semaphore requires an initial value >= 0: semaphore 'sem2' +In file: + +Info: (I804) /IEEE_Std_1666/deprecated: notify_delayed(...) is deprecated, use notify(sc_time) instead + +Exception caught +Error: (E531) notify_delayed() cannot be called on events that have pending notifications +In file: + +Exception caught +Error: (E531) notify_delayed() cannot be called on events that have pending notifications +In file: + +Exception caught +Error: (E532) cannot generate unique name from null string +In file: + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/misc/reports/test01/test01.cpp b/src/systemc/tests/systemc/misc/reports/test01/test01.cpp new file mode 100644 index 000000000..61cfd3f6d --- /dev/null +++ b/src/systemc/tests/systemc/misc/reports/test01/test01.cpp @@ -0,0 +1,183 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-13 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test01.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:10 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/24 21:05:13 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// + +// test of former asserts (should not be reachable from public APIs) now errors + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + SC_CTOR( mod_a ) + { + clk.pos().find_event(); + } +}; + +SC_MODULE( mod_b ) +{ + sc_in_clk clk; + + SC_CTOR( mod_b ) + { + clk->read(); + } +}; + +SC_MODULE( mod_c ) +{ + const sc_in_clk clk; + + SC_CTOR( mod_c ) + { + clk->read(); + } +}; + +int +sc_main( int, char*[] ) +{ + // sc_clock error(s) + + try { + sc_clock clk1( "clk1", 0, SC_PS ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + try { + sc_clock clk2( "clk2", 1, SC_PS, 0.1 ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + try { + sc_clock clk3( "clk3", 1, SC_PS, 0.9 ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + + // sc_event_finder error(s) + + try { + mod_a a( "a" ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + + // sc_port error(s) + + try { + mod_b b( "b" ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + try { + mod_c c( "c" ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + + // sc_semaphore error(s) + + try { + sc_semaphore sem1( -1 ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + try { + sc_semaphore sem2( "sem2", -1 ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + + // sc_event error(s) + + try { + sc_event e1; + e1.notify( 10, SC_MS ); + e1.notify_delayed(); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + try { + sc_event e2; + e2.notify( 10, SC_MS ); + e2.notify_delayed( SC_ZERO_TIME ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + + // sc_name_gen error(s) + + try { + sc_gen_unique_name( 0 ); + } catch( sc_report x ) { + cout << "\nException caught" << endl; + cout << x.what() << endl; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_1/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_1/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_1/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_1/T_2_3_1_1.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_1/T_2_3_1_1.cpp new file mode 100644 index 000000000..b8418b621 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_1/T_2_3_1_1.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1_1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_1 + +const int WIDTH = 8; +typedef sc_bv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + + a = x; + b = y; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + wait(); + a = ~ x.read(); + b = ~ y.read(); + z = a | b; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_1/golden/T_2_3_1_1.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_1/golden/T_2_3_1_1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_1/golden/T_2_3_1_1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_2/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_2/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_2/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_2/T_2_3_1_2.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_2/T_2_3_1_2.cpp new file mode 100644 index 000000000..44f3a4e91 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_2/T_2_3_1_2.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1_2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_2 + +const int WIDTH = 8; +typedef sc_lv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + + a = x; + b = y; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + wait(); + a = ~ x.read(); + b = ~ y.read(); + z = a | b; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_2/golden/T_2_3_1_2.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_2/golden/T_2_3_1_2.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_2/golden/T_2_3_1_2.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_3/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_3/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_3/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_3/T_2_3_1_3.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_3/T_2_3_1_3.cpp new file mode 100644 index 000000000..ee496bcf7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_3/T_2_3_1_3.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1_3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_3 + +const int WIDTH = 8; +typedef sc_lv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + sc_bigint c, d; + sc_bigint e; + + a = x; + b = y; + c = a; + c += d; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + c = b; + c = c - d; + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + c = a; + c = c * d; + wait(); + a = ~ x.read(); + b = ~ y.read(); + c = b; + e = c * d; + z = a | b; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_3/golden/T_2_3_1_3.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_3/golden/T_2_3_1_3.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_3/golden/T_2_3_1_3.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_4/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_4/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_4/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_4/T_2_3_1_4.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_4/T_2_3_1_4.cpp new file mode 100644 index 000000000..a04230592 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_4/T_2_3_1_4.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1_4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_4 + +const int WIDTH = 8; +typedef sc_lv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + sc_biguint c, d; + sc_biguint e; + + a = x; + b = y; + c = a; + c += d; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + c = b; + c = c - d; + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + c = a; + c = c * d; + wait(); + a = ~ x.read(); + b = ~ y.read(); + c = b; + e = c * d; + z = a | b; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_4/golden/T_2_3_1_4.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_4/golden/T_2_3_1_4.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_4/golden/T_2_3_1_4.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_5_neg/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_5_neg/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_5_neg/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_5_neg/T_2_3_1_5_neg.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_5_neg/T_2_3_1_5_neg.cpp new file mode 100644 index 000000000..4c03b676b --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_5_neg/T_2_3_1_5_neg.cpp @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1_5_neg.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_5 + +const int WIDTH = 8; +typedef sc_bv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + + a = x; + b = y; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + wait(); + a = ~ x.read(); + b = ~ y.read(); + z = a | b; + wait(); +} + +int +sc_main( int, char*[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_5_neg/golden/T_2_3_1_5_neg.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_5_neg/golden/T_2_3_1_5_neg.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_1_5_neg/golden/T_2_3_1_5_neg.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_1/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_1/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_1/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_1/T_2_3_2_1.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_1/T_2_3_2_1.cpp new file mode 100644 index 000000000..226a8ec85 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_1/T_2_3_2_1.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_2_1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_2 + +const int WIDTH = 8; +typedef sc_lv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + + a = x; + b = y; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + wait(); + a = ~ x.read(); + b = ~ y.read(); + z = a | b; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_1/golden/T_2_3_2_1.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_1/golden/T_2_3_2_1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_1/golden/T_2_3_2_1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_5_neg/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_5_neg/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_5_neg/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_5_neg/T_2_3_2_5_neg.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_5_neg/T_2_3_2_5_neg.cpp new file mode 100644 index 000000000..cbc380705 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_5_neg/T_2_3_2_5_neg.cpp @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_2_5_neg.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_5 + +const int WIDTH = 8; +typedef sc_lv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + + a = x; + b = y; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + wait(); + a = ~ x.read(); + b = ~ y.read(); + z = a | b; + wait(); +} + +int +sc_main( int, char*[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_5_neg/golden/T_2_3_2_5_neg.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_5_neg/golden/T_2_3_2_5_neg.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_2_5_neg/golden/T_2_3_2_5_neg.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_3_1/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_3_1/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_3_1/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_3_1/T_2_3_3_1.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_3_1/T_2_3_3_1.cpp new file mode 100644 index 000000000..c6c2be45f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_3_1/T_2_3_3_1.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_3_1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_3 + +const int WIDTH = 8; +typedef sc_lv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + sc_bigint c, d; + sc_bigint e; + + a = x; + b = y; + c = a; + c += d; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + c = b; + c = c - d; + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + c = a; + c = c * d; + wait(); + a = ~ x.read(); + b = ~ y.read(); + c = b; + e = c * d; + z = a | b; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_3_1/golden/T_2_3_3_1.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_3_1/golden/T_2_3_3_1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_3_1/golden/T_2_3_3_1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_4_1/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_4_1/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_4_1/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_4_1/T_2_3_4_1.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_4_1/T_2_3_4_1.cpp new file mode 100644 index 000000000..af9f53891 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_4_1/T_2_3_4_1.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_4_1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_4 + +const int WIDTH = 8; +typedef sc_lv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + sc_biguint c, d; + sc_biguint e; + + a = x; + b = y; + c = a; + c += d; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + c = b; + c = c - d; + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + c = a; + c = c * d; + wait(); + a = ~ x.read(); + b = ~ y.read(); + c = b; + e = c * d; + z = a | b; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_4_1/golden/T_2_3_4_1.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_4_1/golden/T_2_3_4_1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_4_1/golden/T_2_3_4_1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_5_1/T_2_3_1.h b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_5_1/T_2_3_1.h new file mode 100644 index 000000000..6acda2a6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_5_1/T_2_3_1.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_5_1/T_2_3_5_1.cpp b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_5_1/T_2_3_5_1.cpp new file mode 100644 index 000000000..e987a77b7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_5_1/T_2_3_5_1.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_3_5_1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_3_1_5 + +const int WIDTH = 13; +typedef sc_lv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_3_1.h" + +sc_signed +foobar1( const sc_signed& a, + sc_signed const& b ) +{ + return a + b; +} + +sc_unsigned +foobar2( const sc_unsigned& a, + sc_unsigned const& b ) +{ + return a + b; +} + +sc_bv_base +foobar3( const sc_bv_base& a, + sc_bv_base const& b ) +{ + return a | b; +} + +sc_lv_base +foobar4( const sc_lv_base& a, + sc_lv_base const& b ) +{ + return a & b; +} + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + sc_biguint c, d; + sc_biguint e; + + a = x; + b = y; + c = a; + c += d; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + c = b; + c = c - d; + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + c = a; + c = c * d; + wait(); + a = ~ x.read(); + b = ~ y.read(); + c = b; + e = c * d; + z = a | b; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_5_1/golden/T_2_3_5_1.log b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_5_1/golden/T_2_3_5_1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.3/T_2_3_5_1/golden/T_2_3_5_1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.4/T_2_4.h b/src/systemc/tests/systemc/misc/semantic/2.4/T_2_4.h new file mode 100644 index 000000000..8dd5cef46 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.4/T_2_4.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_4.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.4/T_2_4_1_1.cpp b/src/systemc/tests/systemc/misc/semantic/2.4/T_2_4_1_1.cpp new file mode 100644 index 000000000..43606744f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.4/T_2_4_1_1.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_4_1_1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_4_1_1 + +const int WIDTH = 13; +typedef sc_lv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_4.h" + +sc_signed +foobar1( const sc_signed& a, + sc_signed const& b ) +{ + return a + b; +} + +sc_unsigned +foobar2( const sc_unsigned& a, + sc_unsigned const& b ) +{ + return a + b; +} + +sc_bv_base +foobar3( const sc_bv_base& a, + sc_bv_base const& b ) +{ + return a.range(WIDTH - 1, 0) | b; +} + +sc_lv_base +foobar4( const sc_lv_base& a, + sc_lv_base const& b ) +{ + return a & b.range(2*WIDTH - 1, WIDTH); +} + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + sc_biguint c, d; + sc_biguint e; + + a = x; + b = y; + c = a; + c += d; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + c = b; + c = c - d; + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + c = a; + c = c * d; + wait(); + a = ~ x.read(); + b = ~ y.read(); + c = b; + e = c * d; + z = a | b; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.4/golden/T_2_4_1_1.log b/src/systemc/tests/systemc/misc/semantic/2.4/golden/T_2_4_1_1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.4/golden/T_2_4_1_1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/semantic/2.5/T_2_5.h b/src/systemc/tests/systemc/misc/semantic/2.5/T_2_5.h new file mode 100644 index 000000000..57c850345 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.5/T_2_5.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_5.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( MYNAME ) +{ + SC_HAS_PROCESS( MYNAME ); + + sc_in_clk clk; + + const signal_vector& x; + const signal_vector& y; + signal_vector& z; + + sc_bigint a1; + sc_bigint a2; + sc_biguint b1; + sc_biguint b2; + sc_bv c1; + sc_bv c2; + sc_lv d1; + sc_lv d2; + + MYNAME( sc_module_name NAME, + sc_clock& CLK, + const signal_vector& X, + const signal_vector& Y, + signal_vector& Z ) + : + x(X), y(Y), z(Z) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/semantic/2.5/T_2_5_1_1.cpp b/src/systemc/tests/systemc/misc/semantic/2.5/T_2_5_1_1.cpp new file mode 100644 index 000000000..35da3582f --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.5/T_2_5_1_1.cpp @@ -0,0 +1,123 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + T_2_5_1_1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MYNAME T_2_5_1_1 + +const int WIDTH = 13; +typedef sc_bv my_vector; +typedef sc_signal signal_vector; + +#include "T_2_5.h" + +sc_signed +foobar1( const sc_signed& a, + sc_signed const& b ) +{ + return a + b; +} + +sc_unsigned +foobar2( const sc_unsigned& a, + sc_unsigned const& b ) +{ + return a + b; +} + +sc_bv_base +foobar3( const sc_bv_base& a, + sc_bv_base const& b ) +{ + return a | b; +} + +sc_lv_base +foobar4( const sc_lv_base& a, + sc_lv_base const& b ) +{ + return a & b; +} + +void +MYNAME::entry() +{ + my_vector a; + my_vector b; + sc_biguint c, d; + sc_biguint e; + + a = x; + b = y; + c = a; + c += d; + z = a | b; + wait(); + a = x.read() | y.read(); + b = x.read() ^ y.read(); + c = b; + c = c - d; + z = a & b; + wait(); + a = x.read() & y.read(); + b = x.read() | y.read(); + z = a ^ b; + c = a; + c = c * d; + wait(); + a = ~ x.read(); + b = ~ y.read(); + c = b; + e = c * d; + z = a | b; + wait(); + + a1 = x.read().to_int(); + a2 = a1 + a1; + b1 = y.read().to_uint(); + b2 = b1 + b1; + c1 = x; + c2 = (c1, "00"); + d1 = y.read(); + d2 = ("00", d1); + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/semantic/2.5/golden/T_2_5_1_1.log b/src/systemc/tests/systemc/misc/semantic/2.5/golden/T_2_5_1_1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/semantic/2.5/golden/T_2_5_1_1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/common.h b/src/systemc/tests/systemc/misc/sim/prime_do_while/common.h new file mode 100644 index 000000000..803cbc085 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<16> bool_vector; +typedef sc_signal signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/display.cpp b/src/systemc/tests/systemc/misc/sim/prime_do_while/display.cpp new file mode 100644 index 000000000..14193f053 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/display.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: display.cc */ + /*****************************************/ + +#include "display.h" + +void displayp::entry() +{ + bool_vector last_prime; + + while (true) { + + last_prime = prime.read(); + wait(); + + do { + wait(); + } while (prime.read() == last_prime); + + cout << prime.read().to_uint() << endl; + + if (prime.read().to_uint() > 40) { + sc_stop(); + } + } +} diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/display.h b/src/systemc/tests/systemc/misc/sim/prime_do_while/display.h new file mode 100644 index 000000000..49ded855c --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/display.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: display.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( displayp ) +{ + SC_HAS_PROCESS( displayp ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& prime; + + // Constructor + displayp ( sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& PRIME ) + : prime(PRIME) + { + clk(TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/golden/prime_do_while.log b/src/systemc/tests/systemc/misc/sim/prime_do_while/golden/prime_do_while.log new file mode 100644 index 000000000..009089bfc --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/golden/prime_do_while.log @@ -0,0 +1,12 @@ +SystemC Simulation +1 +2 +Terminating process T1.entry +5 +11 +17 +23 +31 +41 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp b/src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp new file mode 100644 index 000000000..501d2988e --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/main.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + +#include "reset.h" +#include "display.h" +#include "prime_numgen.h" + +int +sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal reset ("reset"); + signal_bool_vector prime ("prime"); + +// Clock Instantiation + sc_clock clk ("CLK", 6, SC_NS, 0.5, 10, SC_NS, false); // 167 Mhz + +// Process Instantiation + prime_numgen D1 ("D1", clk, reset, prime); + + resetp T1 ("T1", clk, reset); + + displayp T2 ("T2", clk, prime); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_do_while.f b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_do_while.f new file mode 100644 index 000000000..21f1f34c4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_do_while.f @@ -0,0 +1,4 @@ +prime_do_while/reset.cpp +prime_do_while/display.cpp +prime_do_while/prime_numgen.cpp +prime_do_while/main.cpp diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.cpp b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.cpp new file mode 100644 index 000000000..3b20cb2a5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + prime_numgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*** Prime Number Generator ***/ +/*** Implementation Filename: prime_numgen.cc ***/ +/******************************************************************************/ + +#include "prime_numgen.h" + +void prime_numgen::entry() +{ + + static unsigned int p2 = 1, + p3 = 0, + p5 = 0, + p7 = 0, + p11 = 0, + p13 = 0, + p17 = 0, + p19 = 0, + p23 = 0, + p29 = 0; + + while (true) { + + if (p2 && !p3 && !p5 && !p7 && !p11 && !p13 && !p17 && !p19 && !p23 && !p29) + { + prime.write(p2); + wait(); + } + + if (p7 && p13) { p7--, p13--, p17++; } + else if (p5 && p17) { p5--, p17--, p2++, p3++, p13++; } + else if (p3 && p17) { p3--, p17--, p19++; } + else if (p2 && p19) { p2--, p19--, p23++; } + else if (p3 && p11) { p3--, p11--, p29++; } + else if (p29) { p29--, p7++, p11++; } + else if (p23) { p23--, p5++, p19++; } + else if (p19) { p19--, p7++, p11++; } + else if (p17) { p17 = 0; } + else if (p13) { p13--, p11++; } + else if (p11) { p11--, p13++; } + else if (p2 && p7) { p2--, p7--, p3++, p5++; } + else if (p2) { p2--, p3++, p5++; } + else { p5++, p11++; } + } +} diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.h b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.h new file mode 100644 index 000000000..c6a4c74d7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/prime_numgen.h @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + prime_numgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: prime_numgen.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( prime_numgen ) +{ + SC_HAS_PROCESS( prime_numgen ); + + sc_in_clk clk; + + // Inputs + const sc_signal& reset; + // Outputs + signal_bool_vector& prime; + + // Constructor + prime_numgen (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& RESET, + signal_bool_vector& PRIME ) + + : + reset (RESET), + prime (PRIME) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,false); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.cpp b/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.cpp new file mode 100644 index 000000000..43e3ce8d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + reset.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Implementation Filename: reset.cc */ + /***************************************/ + +#include "reset.h" + +void resetp::entry() +{ + reset.write(0); + wait(3); + + reset.write(1); + wait(); + + halt(); +} diff --git a/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.h b/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.h new file mode 100644 index 000000000..2b755b030 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim/prime_do_while/reset.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + reset.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: reset.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( resetp ) +{ + SC_HAS_PROCESS( resetp ); + + sc_in_clk clk; + + // Outputs + sc_signal& reset; + + // Constructor + resetp (sc_module_name NAME, + sc_clock& TICK, + sc_signal& RESET ) + + : + reset (RESET) + + { + clk(TICK); + SC_CTHREAD( entry, clk.neg() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/async_clock/async_clock.cpp b/src/systemc/tests/systemc/misc/sim_tests/async_clock/async_clock.cpp new file mode 100644 index 000000000..397039e23 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/async_clock/async_clock.cpp @@ -0,0 +1,188 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + async_clock.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + proc1( sc_module_name NAME, + sc_signal_in_if& CLK ) + { + clk( CLK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry() + { + while (true) { + wait(); + cout << "Process 1 triggered" << endl; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + proc2( sc_module_name NAME, + sc_signal_in_if& CLK ) + { + clk( CLK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry() + { + while (true) { + wait(); + cout << "Process 2 triggered" << endl; + } + } +}; + +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + sc_in_clk clk; + + proc3( sc_module_name NAME, + sc_signal_in_if& CLK ) + { + clk( CLK ); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry() + { + while (true) { + wait(); + cout << "Process 3 triggered" << endl; + } + } +}; + + +SC_MODULE( proc4 ) +{ + SC_HAS_PROCESS( proc4 ); + + sc_in a; + sc_in b; + sc_in_clk clk; + sc_out_clk c; + sc_out_clk d; + + proc4( sc_module_name NAME, + sc_signal& A, + sc_signal& B, + sc_signal_in_if& CLK, + sc_signal_out_if& C, + sc_signal_out_if& D ) + { + a(A); + b(B); + clk(CLK); + c(C); + d(D); + SC_METHOD( entry ); + sensitive << a << b << clk; + } + + void entry() + { + if ((bool) a == 1) + c = clk; + else + c = 0; + + d = clk & b; + } +}; + +#define NS * 1e-9 + +int +sc_main( int argc, char* argv[] ) +{ + sc_signal clk1("clk1"); + sc_signal dclk1("Dclock1"); // First derived clock + sc_signal dclk2("Dclock2"); // Second derived clock + + sc_signal p("p"), q("q"); + + proc1 p1("p1", clk1); + proc2 p2("p2", dclk1); + proc3 p3("p3", dclk2); + proc4 p4("p4", p, q, clk1, dclk1, dclk2 ); + + sc_start(0, SC_NS); + p = 1; + q = 1; + for (double t = 0; t < 5 NS; t += 1 NS) { + clk1 = 1; + sc_start( 1, SC_NS ); + clk1 = 0; + sc_start( 1, SC_NS ); + cout << " ***" << endl; + } + q = 0; + for (double t = 0; t < 5 NS; t += 1 NS) { + clk1 = 1; + sc_start( 1, SC_NS ); + clk1 = 0; + sc_start( 1, SC_NS ); + cout << " ***" << endl; + } + p = 0; + for (double t = 0; t < 5 NS; t += 1 NS) { + clk1 = 1; + sc_start( 1, SC_NS ); + clk1 = 0; + sc_start( 1, SC_NS ); + cout << " ***" << endl; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/async_clock/golden/async_clock.log b/src/systemc/tests/systemc/misc/sim_tests/async_clock/golden/async_clock.log new file mode 100644 index 000000000..6a54aeb5b --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/async_clock/golden/async_clock.log @@ -0,0 +1,43 @@ +SystemC Simulation + *** +Process 1 triggered +Process 2 triggered +Process 3 triggered + *** +Process 1 triggered +Process 2 triggered +Process 3 triggered + *** +Process 1 triggered +Process 2 triggered +Process 3 triggered + *** +Process 1 triggered +Process 2 triggered +Process 3 triggered + *** +Process 1 triggered +Process 2 triggered + *** +Process 1 triggered +Process 2 triggered + *** +Process 1 triggered +Process 2 triggered + *** +Process 1 triggered +Process 2 triggered + *** +Process 1 triggered +Process 2 triggered + *** +Process 1 triggered + *** +Process 1 triggered + *** +Process 1 triggered + *** +Process 1 triggered + *** +Process 1 triggered + *** diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/biquad.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/biquad.cpp new file mode 100644 index 000000000..b2ba3b644 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/biquad.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + biquad.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename biquad.cc */ +/* This is the implementation file for synchronous process `biquad' */ + +#include "biquad.h" + +void biquad::entry() +{ + float Acc; // Accumulator + float sample; // Input sample + + if ((bool) reset == true) { + Del[0] = Del[1] = Del[2] = Del[3] = 0.0; + out.write(0.0); + wait(); + } + + while (true) { + sample = in.read(); + Acc = Cte[0] * sample; + for (int i = 0; i < 4; i++) { + Acc += Cte[i+1] * Del[i]; + } + // Acc = Acc / 1024.0; + Del[1] = Del[0]; Del[0] = sample; + Del[3] = Del[2]; Del[2] = Acc; + out.write(Acc); + wait(); + } + +} // end of entry function diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/biquad.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/biquad.h new file mode 100644 index 000000000..0b098727d --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/biquad.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + biquad.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename biquad.h */ +/* This is the interface file for synchronous process `biquad' */ + +#include "systemc.h" + +SC_MODULE( biquad ) +{ + SC_HAS_PROCESS( biquad ); + + sc_in_clk clk; + + sc_in in; + sc_in reset; + sc_out out; + + int num_taps; //internal variable + float Del[4]; //internal variable + float Cte[5]; //internal variable + + // Constructor + biquad( sc_module_name NAME, + sc_clock& CLK, + sc_signal& IN1, + sc_signal& RESET, + sc_signal& OUT1 ) + { + clk(CLK); + in(IN1); reset(RESET); out(OUT1); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + // initialize Del (to avoid UMRs) + Del[0] = Del[1] = Del[2] = Del[3] = 0; + // initialize the coefficient matrix + Cte[0] = 1.0; + Cte[1] = 2.0; + Cte[2] = 1.0; + Cte[3] = 0.75; + Cte[4] = -0.125; + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/biquad1.f b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/biquad1.f new file mode 100644 index 000000000..28647a169 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/biquad1.f @@ -0,0 +1,3 @@ +biquad1/biquad.cpp +biquad1/main.cpp +biquad1/testbench.cpp diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log new file mode 100644 index 000000000..c8d504466 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log @@ -0,0 +1,994 @@ +SystemC Simulation +Input = 0.000000 Output = 0.000000 +Input = 0.006283 Output = 0.000000 +Input = 0.012566 Output = 0.006283 +Input = 0.018848 Output = 0.029845 +Input = 0.025130 Output = 0.071862 +Input = 0.031411 Output = 0.125559 +Input = 0.037690 Output = 0.185706 +Input = 0.043968 Output = 0.249226 +Input = 0.050244 Output = 0.314466 +Input = 0.056519 Output = 0.380567 +Input = 0.062791 Output = 0.447092 +Input = 0.069060 Output = 0.513820 +Input = 0.075327 Output = 0.580638 +Input = 0.081591 Output = 0.647488 +Input = 0.087851 Output = 0.714341 +Input = 0.094108 Output = 0.781179 +Input = 0.100362 Output = 0.847993 +Input = 0.106611 Output = 0.914777 +Input = 0.112856 Output = 0.981526 +Input = 0.119097 Output = 1.048238 +Input = 0.125333 Output = 1.114909 +Input = 0.131564 Output = 1.181536 +Input = 0.137790 Output = 1.248116 +Input = 0.144011 Output = 1.314647 +Input = 0.150226 Output = 1.381127 +Input = 0.156434 Output = 1.447551 +Input = 0.162637 Output = 1.513919 +Input = 0.168833 Output = 1.580227 +Input = 0.175023 Output = 1.646473 +Input = 0.181206 Output = 1.712653 +Input = 0.187381 Output = 1.778766 +Input = 0.193549 Output = 1.844809 +Input = 0.199710 Output = 1.910779 +Input = 0.205863 Output = 1.976673 +Input = 0.212007 Output = 2.042489 +Input = 0.218143 Output = 2.108225 +Input = 0.224271 Output = 2.173878 +Input = 0.230389 Output = 2.239444 +Input = 0.236499 Output = 2.304923 +Input = 0.242599 Output = 2.370310 +Input = 0.248690 Output = 2.435604 +Input = 0.254771 Output = 2.500801 +Input = 0.260841 Output = 2.565900 +Input = 0.266902 Output = 2.630898 +Input = 0.272952 Output = 2.695791 +Input = 0.278991 Output = 2.760579 +Input = 0.285019 Output = 2.825257 +Input = 0.291036 Output = 2.889824 +Input = 0.297042 Output = 2.954277 +Input = 0.303035 Output = 3.018612 +Input = 0.309017 Output = 3.082829 +Input = 0.314986 Output = 3.146924 +Input = 0.320944 Output = 3.210896 +Input = 0.326888 Output = 3.274740 +Input = 0.332820 Output = 3.338454 +Input = 0.338738 Output = 3.402038 +Input = 0.344643 Output = 3.465486 +Input = 0.350534 Output = 3.528798 +Input = 0.356412 Output = 3.591971 +Input = 0.362275 Output = 3.655002 +Input = 0.368125 Output = 3.717888 +Input = 0.373959 Output = 3.780628 +Input = 0.379779 Output = 3.843218 +Input = 0.385584 Output = 3.905657 +Input = 0.391374 Output = 3.967942 +Input = 0.397148 Output = 4.030070 +Input = 0.402906 Output = 4.092039 +Input = 0.408649 Output = 4.153846 +Input = 0.414376 Output = 4.215489 +Input = 0.420086 Output = 4.276966 +Input = 0.425779 Output = 4.338274 +Input = 0.431456 Output = 4.399412 +Input = 0.437116 Output = 4.460374 +Input = 0.442758 Output = 4.521162 +Input = 0.448383 Output = 4.581770 +Input = 0.453990 Output = 4.642198 +Input = 0.459580 Output = 4.702442 +Input = 0.465151 Output = 4.762501 +Input = 0.470704 Output = 4.822372 +Input = 0.476238 Output = 4.882052 +Input = 0.481754 Output = 4.941540 +Input = 0.487250 Output = 5.000832 +Input = 0.492727 Output = 5.059927 +Input = 0.498185 Output = 5.118823 +Input = 0.503623 Output = 5.177516 +Input = 0.509041 Output = 5.236004 +Input = 0.514440 Output = 5.294287 +Input = 0.519817 Output = 5.352360 +Input = 0.525175 Output = 5.410222 +Input = 0.530511 Output = 5.467870 +Input = 0.535827 Output = 5.525302 +Input = 0.541121 Output = 5.582517 +Input = 0.546394 Output = 5.639511 +Input = 0.551646 Output = 5.696282 +Input = 0.556876 Output = 5.752829 +Input = 0.562083 Output = 5.809148 +Input = 0.567269 Output = 5.865238 +Input = 0.572432 Output = 5.921096 +Input = 0.577573 Output = 5.976721 +Input = 0.582690 Output = 6.032109 +Input = 0.587785 Output = 6.087260 +Input = 0.592857 Output = 6.142170 +Input = 0.597905 Output = 6.196838 +Input = 0.602930 Output = 6.251261 +Input = 0.607930 Output = 6.305438 +Input = 0.612907 Output = 6.359365 +Input = 0.617860 Output = 6.413041 +Input = 0.622788 Output = 6.466464 +Input = 0.627691 Output = 6.519632 +Input = 0.632570 Output = 6.572542 +Input = 0.637424 Output = 6.625194 +Input = 0.642253 Output = 6.677583 +Input = 0.647056 Output = 6.729709 +Input = 0.651834 Output = 6.781569 +Input = 0.656586 Output = 6.833161 +Input = 0.661312 Output = 6.884483 +Input = 0.666012 Output = 6.935534 +Input = 0.670686 Output = 6.986311 +Input = 0.675333 Output = 7.036813 +Input = 0.679953 Output = 7.087036 +Input = 0.684547 Output = 7.136980 +Input = 0.689114 Output = 7.186642 +Input = 0.693653 Output = 7.236020 +Input = 0.698165 Output = 7.285113 +Input = 0.702650 Output = 7.333918 +Input = 0.707107 Output = 7.382433 +Input = 0.711536 Output = 7.430657 +Input = 0.715936 Output = 7.478588 +Input = 0.720309 Output = 7.526223 +Input = 0.724653 Output = 7.573562 +Input = 0.728969 Output = 7.620602 +Input = 0.733255 Output = 7.667339 +Input = 0.737513 Output = 7.713775 +Input = 0.741742 Output = 7.759906 +Input = 0.745941 Output = 7.805731 +Input = 0.750111 Output = 7.851247 +Input = 0.754251 Output = 7.896454 +Input = 0.758362 Output = 7.941350 +Input = 0.762442 Output = 7.985931 +Input = 0.766493 Output = 8.030197 +Input = 0.770513 Output = 8.074146 +Input = 0.774503 Output = 8.117777 +Input = 0.778462 Output = 8.161087 +Input = 0.782391 Output = 8.204075 +Input = 0.786288 Output = 8.246738 +Input = 0.790155 Output = 8.289078 +Input = 0.793990 Output = 8.331089 +Input = 0.797794 Output = 8.372770 +Input = 0.801567 Output = 8.414122 +Input = 0.805308 Output = 8.455141 +Input = 0.809017 Output = 8.495827 +Input = 0.812694 Output = 8.536177 +Input = 0.816339 Output = 8.576190 +Input = 0.819952 Output = 8.615864 +Input = 0.823533 Output = 8.655199 +Input = 0.827081 Output = 8.694193 +Input = 0.830596 Output = 8.732842 +Input = 0.834078 Output = 8.771148 +Input = 0.837528 Output = 8.809106 +Input = 0.840945 Output = 8.846717 +Input = 0.844328 Output = 8.883979 +Input = 0.847678 Output = 8.920889 +Input = 0.850994 Output = 8.957448 +Input = 0.854277 Output = 8.993653 +Input = 0.857527 Output = 9.029503 +Input = 0.860742 Output = 9.064997 +Input = 0.863923 Output = 9.100132 +Input = 0.867071 Output = 9.134909 +Input = 0.870184 Output = 9.169325 +Input = 0.873262 Output = 9.203378 +Input = 0.876307 Output = 9.237068 +Input = 0.879316 Output = 9.270394 +Input = 0.882291 Output = 9.303354 +Input = 0.885231 Output = 9.335947 +Input = 0.888136 Output = 9.368171 +Input = 0.891007 Output = 9.400025 +Input = 0.893841 Output = 9.431508 +Input = 0.896641 Output = 9.462619 +Input = 0.899405 Output = 9.493356 +Input = 0.902134 Output = 9.523719 +Input = 0.904827 Output = 9.553705 +Input = 0.907484 Output = 9.583314 +Input = 0.910106 Output = 9.612545 +Input = 0.912692 Output = 9.641397 +Input = 0.915241 Output = 9.669867 +Input = 0.917755 Output = 9.697956 +Input = 0.920232 Output = 9.725662 +Input = 0.922673 Output = 9.752985 +Input = 0.925077 Output = 9.779922 +Input = 0.927445 Output = 9.806474 +Input = 0.929776 Output = 9.832638 +Input = 0.932071 Output = 9.858414 +Input = 0.934329 Output = 9.883801 +Input = 0.936550 Output = 9.908796 +Input = 0.938734 Output = 9.933401 +Input = 0.940881 Output = 9.957613 +Input = 0.942991 Output = 9.981433 +Input = 0.945063 Output = 10.004859 +Input = 0.947098 Output = 10.027890 +Input = 0.949096 Output = 10.050526 +Input = 0.951056 Output = 10.072763 +Input = 0.952979 Output = 10.094604 +Input = 0.954865 Output = 10.116047 +Input = 0.956712 Output = 10.137089 +Input = 0.958522 Output = 10.157732 +Input = 0.960294 Output = 10.177973 +Input = 0.962028 Output = 10.197813 +Input = 0.963724 Output = 10.217250 +Input = 0.965382 Output = 10.236282 +Input = 0.967001 Output = 10.254912 +Input = 0.968583 Output = 10.273137 +Input = 0.970127 Output = 10.290956 +Input = 0.971632 Output = 10.308370 +Input = 0.973099 Output = 10.325377 +Input = 0.974527 Output = 10.341974 +Input = 0.975917 Output = 10.358164 +Input = 0.977268 Output = 10.373945 +Input = 0.978581 Output = 10.389318 +Input = 0.979855 Output = 10.404279 +Input = 0.981090 Output = 10.418830 +Input = 0.982287 Output = 10.432968 +Input = 0.983445 Output = 10.446695 +Input = 0.984564 Output = 10.460011 +Input = 0.985645 Output = 10.472913 +Input = 0.986686 Output = 10.485401 +Input = 0.987688 Output = 10.497476 +Input = 0.988652 Output = 10.509136 +Input = 0.989576 Output = 10.520382 +Input = 0.990461 Output = 10.531212 +Input = 0.991308 Output = 10.541626 +Input = 0.992115 Output = 10.551624 +Input = 0.992883 Output = 10.561207 +Input = 0.993611 Output = 10.570372 +Input = 0.994301 Output = 10.579119 +Input = 0.994951 Output = 10.587448 +Input = 0.995562 Output = 10.595360 +Input = 0.996134 Output = 10.602854 +Input = 0.996666 Output = 10.609929 +Input = 0.997159 Output = 10.616586 +Input = 0.997612 Output = 10.622823 +Input = 0.998027 Output = 10.628640 +Input = 0.998402 Output = 10.634038 +Input = 0.998737 Output = 10.639016 +Input = 0.999033 Output = 10.643575 +Input = 0.999289 Output = 10.647713 +Input = 0.999507 Output = 10.651429 +Input = 0.999684 Output = 10.654727 +Input = 0.999822 Output = 10.657603 +Input = 0.999921 Output = 10.660059 +Input = 0.999980 Output = 10.662094 +Input = 1.000000 Output = 10.663709 +Input = 0.999980 Output = 10.664902 +Input = 0.999921 Output = 10.665672 +Input = 0.999822 Output = 10.666023 +Input = 0.999684 Output = 10.665953 +Input = 0.999507 Output = 10.665462 +Input = 0.999289 Output = 10.664549 +Input = 0.999033 Output = 10.663217 +Input = 0.998737 Output = 10.661462 +Input = 0.998402 Output = 10.659287 +Input = 0.998027 Output = 10.656692 +Input = 0.997613 Output = 10.653675 +Input = 0.997159 Output = 10.650237 +Input = 0.996666 Output = 10.646379 +Input = 0.996134 Output = 10.642101 +Input = 0.995562 Output = 10.637403 +Input = 0.994951 Output = 10.632284 +Input = 0.994301 Output = 10.626746 +Input = 0.993611 Output = 10.620789 +Input = 0.992883 Output = 10.614412 +Input = 0.992115 Output = 10.607616 +Input = 0.991308 Output = 10.600403 +Input = 0.990461 Output = 10.592770 +Input = 0.989576 Output = 10.584719 +Input = 0.988652 Output = 10.576250 +Input = 0.987688 Output = 10.567364 +Input = 0.986686 Output = 10.558060 +Input = 0.985645 Output = 10.548338 +Input = 0.984564 Output = 10.538200 +Input = 0.983445 Output = 10.527647 +Input = 0.982287 Output = 10.516679 +Input = 0.981091 Output = 10.505295 +Input = 0.979855 Output = 10.493497 +Input = 0.978581 Output = 10.481285 +Input = 0.977268 Output = 10.468658 +Input = 0.975917 Output = 10.455619 +Input = 0.974527 Output = 10.442165 +Input = 0.973099 Output = 10.428300 +Input = 0.971632 Output = 10.414024 +Input = 0.970127 Output = 10.399337 +Input = 0.968583 Output = 10.384238 +Input = 0.967001 Output = 10.368730 +Input = 0.965382 Output = 10.352812 +Input = 0.963724 Output = 10.336486 +Input = 0.962028 Output = 10.319751 +Input = 0.960294 Output = 10.302608 +Input = 0.958522 Output = 10.285061 +Input = 0.956712 Output = 10.267107 +Input = 0.954865 Output = 10.248747 +Input = 0.952979 Output = 10.229982 +Input = 0.951057 Output = 10.210814 +Input = 0.949096 Output = 10.191242 +Input = 0.947098 Output = 10.171268 +Input = 0.945063 Output = 10.150894 +Input = 0.942991 Output = 10.130117 +Input = 0.940881 Output = 10.108941 +Input = 0.938734 Output = 10.087366 +Input = 0.936550 Output = 10.065392 +Input = 0.934329 Output = 10.043023 +Input = 0.932071 Output = 10.020256 +Input = 0.929777 Output = 9.997093 +Input = 0.927445 Output = 9.973536 +Input = 0.925077 Output = 9.949584 +Input = 0.922673 Output = 9.925241 +Input = 0.920232 Output = 9.900505 +Input = 0.917755 Output = 9.875379 +Input = 0.915241 Output = 9.849862 +Input = 0.912692 Output = 9.823956 +Input = 0.910106 Output = 9.797664 +Input = 0.907484 Output = 9.770983 +Input = 0.904827 Output = 9.743917 +Input = 0.902134 Output = 9.716468 +Input = 0.899405 Output = 9.688634 +Input = 0.896641 Output = 9.660418 +Input = 0.893841 Output = 9.631820 +Input = 0.891007 Output = 9.602841 +Input = 0.888137 Output = 9.573484 +Input = 0.885231 Output = 9.543749 +Input = 0.882291 Output = 9.513637 +Input = 0.879316 Output = 9.483150 +Input = 0.876307 Output = 9.452289 +Input = 0.873263 Output = 9.421054 +Input = 0.870184 Output = 9.389446 +Input = 0.867071 Output = 9.357469 +Input = 0.863923 Output = 9.325121 +Input = 0.860742 Output = 9.292406 +Input = 0.857527 Output = 9.259325 +Input = 0.854277 Output = 9.225878 +Input = 0.850995 Output = 9.192066 +Input = 0.847678 Output = 9.157891 +Input = 0.844328 Output = 9.123356 +Input = 0.840945 Output = 9.088459 +Input = 0.837528 Output = 9.053204 +Input = 0.834078 Output = 9.017591 +Input = 0.830596 Output = 8.981623 +Input = 0.827081 Output = 8.945299 +Input = 0.823533 Output = 8.908623 +Input = 0.819952 Output = 8.871594 +Input = 0.816339 Output = 8.834216 +Input = 0.812694 Output = 8.796489 +Input = 0.809017 Output = 8.758415 +Input = 0.805308 Output = 8.719995 +Input = 0.801567 Output = 8.681231 +Input = 0.797795 Output = 8.642124 +Input = 0.793990 Output = 8.602676 +Input = 0.790155 Output = 8.562889 +Input = 0.786288 Output = 8.522763 +Input = 0.782391 Output = 8.482301 +Input = 0.778462 Output = 8.441504 +Input = 0.774503 Output = 8.400373 +Input = 0.770513 Output = 8.358911 +Input = 0.766493 Output = 8.317118 +Input = 0.762443 Output = 8.274997 +Input = 0.758362 Output = 8.232550 +Input = 0.754251 Output = 8.189778 +Input = 0.750111 Output = 8.146684 +Input = 0.745941 Output = 8.103267 +Input = 0.741742 Output = 8.059529 +Input = 0.737513 Output = 8.015474 +Input = 0.733255 Output = 7.971103 +Input = 0.728969 Output = 7.926416 +Input = 0.724653 Output = 7.881418 +Input = 0.720309 Output = 7.836107 +Input = 0.715937 Output = 7.790487 +Input = 0.711536 Output = 7.744560 +Input = 0.707107 Output = 7.698327 +Input = 0.702650 Output = 7.651791 +Input = 0.698165 Output = 7.604952 +Input = 0.693653 Output = 7.557812 +Input = 0.689114 Output = 7.510375 +Input = 0.684547 Output = 7.462641 +Input = 0.679953 Output = 7.414613 +Input = 0.675333 Output = 7.366292 +Input = 0.670686 Output = 7.317679 +Input = 0.666012 Output = 7.268777 +Input = 0.661312 Output = 7.219589 +Input = 0.656586 Output = 7.170116 +Input = 0.651834 Output = 7.120360 +Input = 0.647056 Output = 7.070323 +Input = 0.642253 Output = 7.020006 +Input = 0.637424 Output = 6.969413 +Input = 0.632570 Output = 6.918545 +Input = 0.627691 Output = 6.867403 +Input = 0.622788 Output = 6.815990 +Input = 0.617860 Output = 6.764309 +Input = 0.612907 Output = 6.712360 +Input = 0.607930 Output = 6.660146 +Input = 0.602930 Output = 6.607669 +Input = 0.597905 Output = 6.554931 +Input = 0.592857 Output = 6.501935 +Input = 0.587785 Output = 6.448681 +Input = 0.582691 Output = 6.395174 +Input = 0.577573 Output = 6.341413 +Input = 0.572432 Output = 6.287403 +Input = 0.567269 Output = 6.233144 +Input = 0.562083 Output = 6.178639 +Input = 0.556876 Output = 6.123890 +Input = 0.551646 Output = 6.068900 +Input = 0.546394 Output = 6.013669 +Input = 0.541121 Output = 5.958201 +Input = 0.535827 Output = 5.902499 +Input = 0.530511 Output = 5.846563 +Input = 0.525175 Output = 5.790396 +Input = 0.519817 Output = 5.734002 +Input = 0.514440 Output = 5.677380 +Input = 0.509042 Output = 5.620534 +Input = 0.503623 Output = 5.563467 +Input = 0.498185 Output = 5.506179 +Input = 0.492727 Output = 5.448675 +Input = 0.487250 Output = 5.390954 +Input = 0.481754 Output = 5.333022 +Input = 0.476238 Output = 5.274879 +Input = 0.470704 Output = 5.216527 +Input = 0.465151 Output = 5.157970 +Input = 0.459580 Output = 5.099209 +Input = 0.453991 Output = 5.040247 +Input = 0.448383 Output = 4.981086 +Input = 0.442758 Output = 4.921728 +Input = 0.437116 Output = 4.862175 +Input = 0.431456 Output = 4.802432 +Input = 0.425779 Output = 4.742498 +Input = 0.420086 Output = 4.682377 +Input = 0.414376 Output = 4.622071 +Input = 0.408649 Output = 4.561583 +Input = 0.402907 Output = 4.500915 +Input = 0.397148 Output = 4.440069 +Input = 0.391374 Output = 4.379047 +Input = 0.385584 Output = 4.317853 +Input = 0.379779 Output = 4.256489 +Input = 0.373959 Output = 4.194956 +Input = 0.368125 Output = 4.133258 +Input = 0.362275 Output = 4.071396 +Input = 0.356412 Output = 4.009374 +Input = 0.350534 Output = 3.947194 +Input = 0.344643 Output = 3.884857 +Input = 0.338738 Output = 3.822368 +Input = 0.332820 Output = 3.759727 +Input = 0.326888 Output = 3.696938 +Input = 0.320944 Output = 3.634003 +Input = 0.314987 Output = 3.570925 +Input = 0.309017 Output = 3.507706 +Input = 0.303035 Output = 3.444348 +Input = 0.297042 Output = 3.380854 +Input = 0.291036 Output = 3.317227 +Input = 0.285019 Output = 3.253469 +Input = 0.278991 Output = 3.189582 +Input = 0.272952 Output = 3.125569 +Input = 0.266902 Output = 3.061433 +Input = 0.260842 Output = 2.997176 +Input = 0.254771 Output = 2.932801 +Input = 0.248690 Output = 2.868310 +Input = 0.242599 Output = 2.803706 +Input = 0.236499 Output = 2.738991 +Input = 0.230390 Output = 2.674168 +Input = 0.224271 Output = 2.609239 +Input = 0.218143 Output = 2.544208 +Input = 0.212007 Output = 2.479075 +Input = 0.205863 Output = 2.413846 +Input = 0.199710 Output = 2.348520 +Input = 0.193550 Output = 2.283103 +Input = 0.187381 Output = 2.217594 +Input = 0.181206 Output = 2.151999 +Input = 0.175023 Output = 2.086318 +Input = 0.168834 Output = 2.020555 +Input = 0.162637 Output = 1.954713 +Input = 0.156435 Output = 1.888793 +Input = 0.150226 Output = 1.822798 +Input = 0.144011 Output = 1.756732 +Input = 0.137790 Output = 1.690596 +Input = 0.131564 Output = 1.624394 +Input = 0.125333 Output = 1.558127 +Input = 0.119097 Output = 1.491799 +Input = 0.112857 Output = 1.425412 +Input = 0.106611 Output = 1.358968 +Input = 0.100362 Output = 1.292472 +Input = 0.094108 Output = 1.225924 +Input = 0.087851 Output = 1.159327 +Input = 0.081591 Output = 1.092685 +Input = 0.075327 Output = 1.026000 +Input = 0.069060 Output = 0.959274 +Input = 0.062791 Output = 0.892510 +Input = 0.056519 Output = 0.825711 +Input = 0.050244 Output = 0.758880 +Input = 0.043968 Output = 0.692019 +Input = 0.037690 Output = 0.625130 +Input = 0.031411 Output = 0.558216 +Input = 0.025130 Output = 0.491281 +Input = 0.018849 Output = 0.424326 +Input = 0.012566 Output = 0.357354 +Input = 0.006283 Output = 0.290369 +Input = 0.000000 Output = 0.223371 +Input = -0.006283 Output = 0.156365 +Input = -0.012566 Output = 0.089353 +Input = -0.018848 Output = 0.022338 +Input = -0.025130 Output = -0.044679 +Input = -0.031411 Output = -0.111694 +Input = -0.037690 Output = -0.178704 +Input = -0.043968 Output = -0.245708 +Input = -0.050244 Output = -0.312701 +Input = -0.056518 Output = -0.379683 +Input = -0.062790 Output = -0.446649 +Input = -0.069060 Output = -0.513598 +Input = -0.075327 Output = -0.580526 +Input = -0.081590 Output = -0.647432 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Output = 0.249226 +Input = 0.050244 Output = 0.314466 +Input = 0.056519 Output = 0.380567 +Input = 0.062791 Output = 0.447092 +Input = 0.069060 Output = 0.513820 +Input = 0.075327 Output = 0.580638 +Input = 0.081591 Output = 0.647488 +Input = 0.087851 Output = 0.714341 +Input = 0.094108 Output = 0.781179 +Input = 0.100362 Output = 0.847993 +Input = 0.106611 Output = 0.914777 +Input = 0.112856 Output = 0.981526 +Input = 0.119097 Output = 1.048238 +Input = 0.125333 Output = 1.114909 +Input = 0.131564 Output = 1.181536 +Input = 0.137790 Output = 1.248116 +Input = 0.144011 Output = 1.314647 +Input = 0.150226 Output = 1.381127 +Input = 0.156434 Output = 1.447551 +Input = 0.162637 Output = 1.513919 +Input = 0.168833 Output = 1.580227 +Input = 0.175023 Output = 1.646473 +Input = 0.181206 Output = 1.712653 +Input = 0.187381 Output = 1.778766 +Input = 0.193549 Output = 1.844809 +Input = 0.199710 Output = 1.910779 +Input = 0.205863 Output = 1.976673 +Input = 0.212007 Output = 2.042490 +Input = 0.218143 Output = 2.108225 +Input = 0.224271 Output = 2.173878 +Input = 0.230389 Output = 2.239444 +Input = 0.236499 Output = 2.304923 +Input = 0.242599 Output = 2.370310 +Input = 0.248690 Output = 2.435604 +Input = 0.254771 Output = 2.500802 +Input = 0.260841 Output = 2.565900 +Input = 0.266902 Output = 2.630898 +Input = 0.272952 Output = 2.695791 +Input = 0.278991 Output = 2.760579 +Input = 0.285019 Output = 2.825257 +Input = 0.291036 Output = 2.889824 +Input = 0.297042 Output = 2.954277 +Input = 0.303035 Output = 3.018613 +Input = 0.309017 Output = 3.082829 +Input = 0.314986 Output = 3.146924 +Input = 0.320944 Output = 3.210896 +Input = 0.326888 Output = 3.274740 +Input = 0.332820 Output = 3.338454 +Input = 0.338738 Output = 3.402038 +Input = 0.344643 Output = 3.465486 +Input = 0.350534 Output = 3.528798 +Input = 0.356412 Output = 3.591971 +Input = 0.362275 Output = 3.655002 +Input = 0.368125 Output = 3.717888 +Input = 0.373959 Output = 3.780628 +Input = 0.379779 Output = 3.843218 +Input = 0.385584 Output = 3.905657 +Input = 0.391374 Output = 3.967942 +Input = 0.397148 Output = 4.030070 +Input = 0.402906 Output = 4.092039 +Input = 0.408649 Output = 4.153846 +Input = 0.414376 Output = 4.215489 +Input = 0.420086 Output = 4.276966 +Input = 0.425779 Output = 4.338274 +Input = 0.431456 Output = 4.399411 +Input = 0.437116 Output = 4.460374 +Input = 0.442758 Output = 4.521162 +Input = 0.448383 Output = 4.581770 +Input = 0.453990 Output = 4.642198 +Input = 0.459580 Output = 4.702442 +Input = 0.465151 Output = 4.762501 +Input = 0.470704 Output = 4.822372 +Input = 0.476238 Output = 4.882052 +Input = 0.481754 Output = 4.941539 +Input = 0.487250 Output = 5.000832 +Input = 0.492727 Output = 5.059927 +Input = 0.498185 Output = 5.118822 +Input = 0.503623 Output = 5.177516 +Input = 0.509041 Output = 5.236005 +Input = 0.514440 Output = 5.294287 +Input = 0.519817 Output = 5.352360 +Input = 0.525175 Output = 5.410222 +Input = 0.530511 Output = 5.467870 +Input = 0.535827 Output = 5.525302 +Input = 0.541121 Output = 5.582517 +Input = 0.546394 Output = 5.639511 +Input = 0.551646 Output = 5.696282 +Input = 0.556876 Output = 5.752829 +Input = 0.562083 Output = 5.809148 +Input = 0.567269 Output = 5.865237 +Input = 0.572432 Output = 5.921095 +Input = 0.577573 Output = 5.976720 +Input = 0.582690 Output = 6.032109 +Input = 0.587785 Output = 6.087260 +Input = 0.592857 Output = 6.142170 +Input = 0.597905 Output = 6.196838 +Input = 0.602930 Output = 6.251261 +Input = 0.607930 Output = 6.305438 +Input = 0.612907 Output = 6.359365 +Input = 0.617860 Output = 6.413041 +Input = 0.622788 Output = 6.466464 +Input = 0.627691 Output = 6.519632 +Input = 0.632570 Output = 6.572543 +Input = 0.637424 Output = 6.625194 +Input = 0.642253 Output = 6.677583 +Input = 0.647056 Output = 6.729708 +Input = 0.651834 Output = 6.781569 +Input = 0.656586 Output = 6.833161 +Input = 0.661312 Output = 6.884483 +Input = 0.666012 Output = 6.935534 +Input = 0.670686 Output = 6.986312 +Input = 0.675333 Output = 7.036813 +Input = 0.679953 Output = 7.087037 +Input = 0.684547 Output = 7.136980 +Input = 0.689114 Output = 7.186642 +Input = 0.693653 Output = 7.236020 +Input = 0.698165 Output = 7.285113 +Input = 0.702650 Output = 7.333918 +Input = 0.707107 Output = 7.382433 +Input = 0.711536 Output = 7.430657 +Input = 0.715936 Output = 7.478588 +Input = 0.720309 Output = 7.526223 +Input = 0.724653 Output = 7.573561 +Input = 0.728969 Output = 7.620601 +Input = 0.733255 Output = 7.667339 +Input = 0.737513 Output = 7.713775 +Input = 0.741742 Output = 7.759906 +Input = 0.745941 Output = 7.805731 +Input = 0.750111 Output = 7.851247 +Input = 0.754251 Output = 7.896454 +Input = 0.758362 Output = 7.941350 +Input = 0.762442 Output = 7.985931 +Input = 0.766493 Output = 8.030197 +Input = 0.770513 Output = 8.074146 +Input = 0.774503 Output = 8.117777 +Input = 0.778462 Output = 8.161087 +Input = 0.782391 Output = 8.204075 +Input = 0.786288 Output = 8.246738 +Input = 0.790155 Output = 8.289078 +Input = 0.793990 Output = 8.331089 +Input = 0.797794 Output = 8.372770 +Input = 0.801567 Output = 8.414122 +Input = 0.805308 Output = 8.455141 +Input = 0.809017 Output = 8.495827 +Input = 0.812694 Output = 8.536177 +Input = 0.816339 Output = 8.576190 +Input = 0.819952 Output = 8.615865 +Input = 0.823533 Output = 8.655200 +Input = 0.827081 Output = 8.694192 +Input = 0.830596 Output = 8.732841 +Input = 0.834078 Output = 8.771147 +Input = 0.837528 Output = 8.809106 +Input = 0.840945 Output = 8.846717 +Input = 0.844328 Output = 8.883979 +Input = 0.847678 Output = 8.920890 +Input = 0.850994 Output = 8.957448 +Input = 0.854277 Output = 8.993653 +Input = 0.857527 Output = 9.029503 +Input = 0.860742 Output = 9.064997 +Input = 0.863923 Output = 9.100132 +Input = 0.867071 Output = 9.134909 +Input = 0.870184 Output = 9.169325 +Input = 0.873262 Output = 9.203378 +Input = 0.876307 Output = 9.237068 +Input = 0.879316 Output = 9.270394 +Input = 0.882291 Output = 9.303354 +Input = 0.885231 Output = 9.335947 +Input = 0.888136 Output = 9.368171 +Input = 0.891007 Output = 9.400025 +Input = 0.893841 Output = 9.431508 +Input = 0.896641 Output = 9.462619 +Input = 0.899405 Output = 9.493356 +Input = 0.902134 Output = 9.523719 +Input = 0.904827 Output = 9.553705 +Input = 0.907484 Output = 9.583314 +Input = 0.910106 Output = 9.612545 +Input = 0.912692 Output = 9.641397 +Input = 0.915241 Output = 9.669867 +Input = 0.917755 Output = 9.697956 +Input = 0.920232 Output = 9.725662 +Input = 0.922673 Output = 9.752985 +Input = 0.925077 Output = 9.779922 +Input = 0.927445 Output = 9.806474 +Input = 0.929776 Output = 9.832638 +Input = 0.932071 Output = 9.858414 +Input = 0.934329 Output = 9.883801 +Input = 0.936550 Output = 9.908796 +Input = 0.938734 Output = 9.933401 +Input = 0.940881 Output = 9.957613 +Input = 0.942991 Output = 9.981433 +Input = 0.945063 Output = 10.004859 +Input = 0.947098 Output = 10.027890 +Input = 0.949096 Output = 10.050525 +Input = 0.951056 Output = 10.072762 +Input = 0.952979 Output = 10.094604 +Input = 0.954865 Output = 10.116046 +Input = 0.956712 Output = 10.137089 +Input = 0.958522 Output = 10.157732 +Input = 0.960294 Output = 10.177973 +Input = 0.962028 Output = 10.197813 +Input = 0.963724 Output = 10.217250 +Input = 0.965382 Output = 10.236283 +Input = 0.967001 Output = 10.254913 +Input = 0.968583 Output = 10.273138 +Input = 0.970127 Output = 10.290957 +Input = 0.971632 Output = 10.308370 +Input = 0.973099 Output = 10.325376 +Input = 0.974527 Output = 10.341973 +Input = 0.975917 Output = 10.358164 +Input = 0.977268 Output = 10.373945 +Input = 0.978581 Output = 10.389318 +Input = 0.979855 Output = 10.404279 +Input = 0.981090 Output = 10.418829 +Input = 0.982287 Output = 10.432968 +Input = 0.983445 Output = 10.446695 +Input = 0.984564 Output = 10.460011 +Input = 0.985645 Output = 10.472913 +Input = 0.986686 Output = 10.485401 +Input = 0.987688 Output = 10.497476 +Input = 0.988652 Output = 10.509136 +Input = 0.989576 Output = 10.520382 +Input = 0.990461 Output = 10.531212 +Input = 0.991308 Output = 10.541626 +Input = 0.992115 Output = 10.551624 +Input = 0.992883 Output = 10.561207 +Input = 0.993611 Output = 10.570372 +Input = 0.994301 Output = 10.579119 +Input = 0.994951 Output = 10.587448 +Input = 0.995562 Output = 10.595360 +Input = 0.996134 Output = 10.602854 +Input = 0.996666 Output = 10.609929 +Input = 0.997159 Output = 10.616586 +Input = 0.997612 Output = 10.622822 +Input = 0.998027 Output = 10.628639 +Input = 0.998402 Output = 10.634037 +Input = 0.998737 Output = 10.639015 +Input = 0.999033 Output = 10.643574 +Input = 0.999289 Output = 10.647712 +Input = 0.999507 Output = 10.651430 +Input = 0.999684 Output = 10.654727 +Input = 0.999822 Output = 10.657603 +Input = 0.999921 Output = 10.660059 +Input = 0.999980 Output = 10.662094 +Input = 1.000000 Output = 10.663709 +Input = 0.999980 Output = 10.664902 +Input = 0.999921 Output = 10.665672 +Input = 0.999822 Output = 10.666023 +Input = 0.999684 Output = 10.665953 +Input = 0.999507 Output = 10.665462 +Input = 0.999289 Output = 10.664549 +Input = 0.999033 Output = 10.663217 +Input = 0.998737 Output = 10.661462 +Input = 0.998402 Output = 10.659286 +Input = 0.998027 Output = 10.656691 +Input = 0.997613 Output = 10.653674 +Input = 0.997159 Output = 10.650236 +Input = 0.996666 Output = 10.646379 +Input = 0.996134 Output = 10.642101 +Input = 0.995562 Output = 10.637403 +Input = 0.994951 Output = 10.632284 +Input = 0.994301 Output = 10.626746 +Input = 0.993611 Output = 10.620789 +Input = 0.992883 Output = 10.614412 +Input = 0.992115 Output = 10.607616 +Input = 0.991308 Output = 10.600403 +Input = 0.990461 Output = 10.592770 +Input = 0.989576 Output = 10.584719 +Input = 0.988652 Output = 10.576250 +Input = 0.987688 Output = 10.567364 +Input = 0.986686 Output = 10.558060 +Input = 0.985645 Output = 10.548338 +Input = 0.984564 Output = 10.538200 +Input = 0.983445 Output = 10.527647 +Input = 0.982287 Output = 10.516679 +Input = 0.981091 Output = 10.505295 +Input = 0.979855 Output = 10.493497 +Input = 0.978581 Output = 10.481284 +Input = 0.977268 Output = 10.468657 +Input = 0.975917 Output = 10.455618 +Input = 0.974527 Output = 10.442165 +Input = 0.973099 Output = 10.428300 +Input = 0.971632 Output = 10.414022 +Input = 0.970127 Output = 10.399335 +Input = 0.968583 Output = 10.384236 +Input = 0.967001 Output = 10.368729 +Input = 0.965382 Output = 10.352811 +Input = 0.963724 Output = 10.336485 +Input = 0.962028 Output = 10.319751 +Input = 0.960294 Output = 10.302608 +Input = 0.958522 Output = 10.285061 +Input = 0.956712 Output = 10.267107 +Input = 0.954865 Output = 10.248747 +Input = 0.952979 Output = 10.229982 +Input = 0.951057 Output = 10.210814 +Input = 0.949096 Output = 10.191242 +Input = 0.947098 Output = 10.171268 +Input = 0.945063 Output = 10.150894 +Input = 0.942991 Output = 10.130117 +Input = 0.940881 Output = 10.108941 +Input = 0.938734 Output = 10.087366 +Input = 0.936550 Output = 10.065392 +Input = 0.934329 Output = 10.043022 +Input = 0.932071 Output = 10.020255 +Input = 0.929777 Output = 9.997092 +Input = 0.927445 Output = 9.973535 +Input = 0.925077 Output = 9.949584 +Input = 0.922673 Output = 9.925241 +Input = 0.920232 Output = 9.900505 +Input = 0.917755 Output = 9.875379 +Input = 0.915241 Output = 9.849862 +Input = 0.912692 Output = 9.823956 +Input = 0.910106 Output = 9.797664 +Input = 0.907484 Output = 9.770984 +Input = 0.904827 Output = 9.743918 +Input = 0.902134 Output = 9.716469 +Input = 0.899405 Output = 9.688634 +Input = 0.896641 Output = 9.660418 +Input = 0.893841 Output = 9.631820 +Input = 0.891007 Output = 9.602841 +Input = 0.888137 Output = 9.573484 +Input = 0.885231 Output = 9.543749 +Input = 0.882291 Output = 9.513637 +Input = 0.879316 Output = 9.483150 +Input = 0.876307 Output = 9.452289 +Input = 0.873263 Output = 9.421054 +Input = 0.870184 Output = 9.389447 +Input = 0.867071 Output = 9.357470 +Input = 0.863923 Output = 9.325122 +Input = 0.860742 Output = 9.292407 +Input = 0.857527 Output = 9.259325 +Input = 0.854277 Output = 9.225878 +Input = 0.850995 Output = 9.192066 +Input = 0.847678 Output = 9.157891 +Input = 0.844328 Output = 9.123354 +Input = 0.840945 Output = 9.088458 +Input = 0.837528 Output = 9.053204 +Input = 0.834078 Output = 9.017591 +Input = 0.830596 Output = 8.981623 +Input = 0.827081 Output = 8.945299 +Input = 0.823533 Output = 8.908623 +Input = 0.819952 Output = 8.871594 +Input = 0.816339 Output = 8.834216 +Input = 0.812694 Output = 8.796489 +Input = 0.809017 Output = 8.758415 +Input = 0.805308 Output = 8.719995 +Input = 0.801567 Output = 8.681231 +Input = 0.797795 Output = 8.642124 +Input = 0.793990 Output = 8.602676 +Input = 0.790155 Output = 8.562889 +Input = 0.786288 Output = 8.522763 +Input = 0.782391 Output = 8.482301 +Input = 0.778462 Output = 8.441503 +Input = 0.774503 Output = 8.400372 +Input = 0.770513 Output = 8.358909 +Input = 0.766493 Output = 8.317118 +Input = 0.762443 Output = 8.274997 +Input = 0.758362 Output = 8.232551 +Input = 0.754251 Output = 8.189779 +Input = 0.750111 Output = 8.146684 +Input = 0.745941 Output = 8.103267 +Input = 0.741742 Output = 8.059530 +Input = 0.737513 Output = 8.015475 +Input = 0.733255 Output = 7.971103 +Input = 0.728969 Output = 7.926416 +Input = 0.724653 Output = 7.881417 +Input = 0.720309 Output = 7.836106 +Input = 0.715937 Output = 7.790486 +Input = 0.711536 Output = 7.744559 +Input = 0.707107 Output = 7.698327 +Input = 0.702650 Output = 7.651790 +Input = 0.698165 Output = 7.604951 +Input = 0.693653 Output = 7.557812 +Input = 0.689114 Output = 7.510375 +Input = 0.684547 Output = 7.462641 +Input = 0.679953 Output = 7.414613 +Input = 0.675333 Output = 7.366292 +Input = 0.670686 Output = 7.317679 +Input = 0.666012 Output = 7.268778 +Input = 0.661312 Output = 7.219590 +Input = 0.656586 Output = 7.170117 +Input = 0.651834 Output = 7.120360 +Input = 0.647056 Output = 7.070323 +Input = 0.642253 Output = 7.020007 +Input = 0.637424 Output = 6.969413 +Input = 0.632570 Output = 6.918545 +Input = 0.627691 Output = 6.867403 +Input = 0.622788 Output = 6.815990 +Input = 0.617860 Output = 6.764309 +Input = 0.612907 Output = 6.712360 +Input = 0.607930 Output = 6.660146 +Input = 0.602930 Output = 6.607668 +Input = 0.597905 Output = 6.554931 +Input = 0.592857 Output = 6.501934 +Input = 0.587785 Output = 6.448681 +Input = 0.582691 Output = 6.395174 +Input = 0.577573 Output = 6.341413 +Input = 0.572432 Output = 6.287403 +Input = 0.567269 Output = 6.233144 +Input = 0.562083 Output = 6.178639 +Input = 0.556876 Output = 6.123890 +Input = 0.551646 Output = 6.068900 +Input = 0.546394 Output = 6.013669 +Input = 0.541121 Output = 5.958201 +Input = 0.535827 Output = 5.902499 +Input = 0.530511 Output = 5.846563 +Input = 0.525175 Output = 5.790396 +Input = 0.519817 Output = 5.734001 +Input = 0.514440 Output = 5.677380 +Input = 0.509042 Output = 5.620534 +Input = 0.503623 Output = 5.563467 +Input = 0.498185 Output = 5.506179 +Input = 0.492727 Output = 5.448675 +Input = 0.487250 Output = 5.390954 +Input = 0.481754 Output = 5.333022 +Input = 0.476238 Output = 5.274879 +Input = 0.470704 Output = 5.216528 +Input = 0.465151 Output = 5.157970 +Input = 0.459580 Output = 5.099209 +Input = 0.453991 Output = 5.040246 +Input = 0.448383 Output = 4.981085 +Input = 0.442758 Output = 4.921728 +Input = 0.437116 Output = 4.862175 +Input = 0.431456 Output = 4.802432 +Input = 0.425779 Output = 4.742498 +Input = 0.420086 Output = 4.682377 +Input = 0.414376 Output = 4.622071 +Input = 0.408649 Output = 4.561583 +Input = 0.402907 Output = 4.500915 +Input = 0.397148 Output = 4.440069 +Input = 0.391374 Output = 4.379047 +Input = 0.385584 Output = 4.317853 +Input = 0.379779 Output = 4.256489 +Input = 0.373959 Output = 4.194956 +Input = 0.368125 Output = 4.133258 +Input = 0.362275 Output = 4.071396 +Input = 0.356412 Output = 4.009374 +Input = 0.350534 Output = 3.947194 +Input = 0.344643 Output = 3.884857 +Input = 0.338738 Output = 3.822368 +Input = 0.332820 Output = 3.759727 +Input = 0.326888 Output = 3.696938 +Input = 0.320944 Output = 3.634003 +Input = 0.314987 Output = 3.570925 +Input = 0.309017 Output = 3.507706 +Input = 0.303035 Output = 3.444348 +Input = 0.297042 Output = 3.380854 +Input = 0.291036 Output = 3.317227 +Input = 0.285019 Output = 3.253469 +Input = 0.278991 Output = 3.189582 +Input = 0.272952 Output = 3.125569 +Input = 0.266902 Output = 3.061433 +Input = 0.260842 Output = 2.997176 +Input = 0.254771 Output = 2.932801 +Input = 0.248690 Output = 2.868310 +Input = 0.242599 Output = 2.803706 +Input = 0.236499 Output = 2.738991 +Input = 0.230390 Output = 2.674168 +Input = 0.224271 Output = 2.609239 +Input = 0.218143 Output = 2.544208 +Input = 0.212007 Output = 2.479075 +Input = 0.205863 Output = 2.413846 +Input = 0.199710 Output = 2.348520 +Input = 0.193550 Output = 2.283103 +Input = 0.187381 Output = 2.217594 +Input = 0.181206 Output = 2.151999 +Input = 0.175023 Output = 2.086318 +Input = 0.168834 Output = 2.020555 +Input = 0.162637 Output = 1.954713 +Input = 0.156435 Output = 1.888793 +Input = 0.150226 Output = 1.822798 +Input = 0.144011 Output = 1.756732 +Input = 0.137790 Output = 1.690596 +Input = 0.131564 Output = 1.624394 +Input = 0.125333 Output = 1.558127 +Input = 0.119097 Output = 1.491799 +Input = 0.112857 Output = 1.425412 +Input = 0.106611 Output = 1.358969 +Input = 0.100362 Output = 1.292472 +Input = 0.094108 Output = 1.225924 +Input = 0.087851 Output = 1.159327 +Input = 0.081591 Output = 1.092685 +Input = 0.075327 Output = 1.026000 +Input = 0.069060 Output = 0.959274 +Input = 0.062791 Output = 0.892510 +Input = 0.056519 Output = 0.825711 +Input = 0.050244 Output = 0.758880 +Input = 0.043968 Output = 0.692019 +Input = 0.037690 Output = 0.625130 +Input = 0.031411 Output = 0.558216 +Input = 0.025130 Output = 0.491281 +Input = 0.018849 Output = 0.424326 +Input = 0.012566 Output = 0.357354 +Input = 0.006283 Output = 0.290369 +Input = 0.000000 Output = 0.223371 +Input = -0.006283 Output = 0.156365 +Input = -0.012566 Output = 0.089353 +Input = -0.018848 Output = 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-3.759729 +Input = -0.326888 Output = -3.696940 +Input = -0.320944 Output = -3.634005 +Input = -0.314987 Output = -3.570926 +Input = -0.309017 Output = -3.507707 +Input = -0.303036 Output = -3.444349 +Input = -0.297042 Output = -3.380855 +Input = -0.291036 Output = -3.317228 +Input = -0.285020 Output = -3.253470 +Input = -0.278991 Output = -3.189583 +Input = -0.272952 Output = -3.125571 +Input = -0.266902 Output = -3.061435 +Input = -0.260842 Output = -2.997178 +Input = -0.254771 Output = -2.932802 +Input = -0.248690 Output = -2.868312 +Input = -0.242600 Output = -2.803707 +Input = -0.236499 Output = -2.738992 +Input = -0.230390 Output = -2.674170 +Input = -0.224271 Output = -2.609241 +Input = -0.218144 Output = -2.544209 +Input = -0.212007 Output = -2.479077 +Input = -0.205863 Output = -2.413847 +Input = -0.199710 Output = -2.348522 +Input = -0.193550 Output = -2.283104 +Input = -0.187382 Output = -2.217596 +Input = -0.181206 Output = -2.152000 +Input = -0.175023 Output = -2.086320 +Input = -0.168834 Output = -2.020557 +Input = -0.162637 Output = -1.954714 +Input = -0.156435 Output = -1.888794 +Input = -0.150226 Output = -1.822800 +Input = -0.144011 Output = -1.756734 +Input = -0.137791 Output = -1.690598 +Input = -0.131565 Output = -1.624395 +Input = -0.125334 Output = -1.558129 +Input = -0.119097 Output = -1.491801 +Input = -0.112857 Output = -1.425414 +Input = -0.106611 Output = -1.358970 +Input = -0.100362 Output = -1.292473 +Input = -0.094109 Output = -1.225925 +Input = -0.087851 Output = -1.159329 +Input = -0.081591 Output = -1.092687 +Input = -0.075327 Output = -1.026001 +Input = -0.069060 Output = -0.959276 +Input = -0.062791 Output = -0.892512 +Input = -0.056519 Output = -0.825713 +Input = -0.050245 Output = -0.758882 diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.cygwin b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.cygwin new file mode 100644 index 000000000..97fce0a76 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.cygwin @@ -0,0 +1,994 @@ +SystemC Simulation +Input = 0.000000 Output = 0.000000 +Input = 0.006283 Output = 0.000000 +Input = 0.012566 Output = 0.006283 +Input = 0.018848 Output = 0.029845 +Input = 0.025130 Output = 0.071862 +Input = 0.031411 Output = 0.125559 +Input = 0.037690 Output = 0.185706 +Input = 0.043968 Output = 0.249226 +Input = 0.050244 Output = 0.314466 +Input = 0.056519 Output = 0.380567 +Input = 0.062791 Output = 0.447092 +Input = 0.069060 Output = 0.513820 +Input = 0.075327 Output = 0.580638 +Input = 0.081591 Output = 0.647488 +Input = 0.087851 Output = 0.714341 +Input = 0.094108 Output = 0.781179 +Input = 0.100362 Output = 0.847993 +Input = 0.106611 Output = 0.914777 +Input = 0.112856 Output = 0.981526 +Input = 0.119097 Output = 1.048238 +Input = 0.125333 Output = 1.114909 +Input = 0.131564 Output = 1.181536 +Input = 0.137790 Output = 1.248116 +Input = 0.144011 Output = 1.314647 +Input = 0.150226 Output = 1.381127 +Input = 0.156434 Output = 1.447551 +Input = 0.162637 Output = 1.513919 +Input = 0.168833 Output = 1.580227 +Input = 0.175023 Output = 1.646473 +Input = 0.181206 Output = 1.712653 +Input = 0.187381 Output = 1.778766 +Input = 0.193549 Output = 1.844809 +Input = 0.199710 Output = 1.910779 +Input = 0.205863 Output = 1.976673 +Input = 0.212007 Output = 2.042490 +Input = 0.218143 Output = 2.108225 +Input = 0.224271 Output = 2.173878 +Input = 0.230389 Output = 2.239444 +Input = 0.236499 Output = 2.304923 +Input = 0.242599 Output = 2.370310 +Input = 0.248690 Output = 2.435604 +Input = 0.254771 Output = 2.500802 +Input = 0.260841 Output = 2.565900 +Input = 0.266902 Output = 2.630898 +Input = 0.272952 Output = 2.695791 +Input = 0.278991 Output = 2.760579 +Input = 0.285019 Output = 2.825257 +Input = 0.291036 Output = 2.889824 +Input = 0.297042 Output = 2.954277 +Input = 0.303035 Output = 3.018613 +Input = 0.309017 Output = 3.082829 +Input = 0.314986 Output = 3.146924 +Input = 0.320944 Output = 3.210896 +Input = 0.326888 Output = 3.274740 +Input = 0.332820 Output = 3.338454 +Input = 0.338738 Output = 3.402038 +Input = 0.344643 Output = 3.465486 +Input = 0.350534 Output = 3.528798 +Input = 0.356412 Output = 3.591971 +Input = 0.362275 Output = 3.655002 +Input = 0.368125 Output = 3.717888 +Input = 0.373959 Output = 3.780628 +Input = 0.379779 Output = 3.843218 +Input = 0.385584 Output = 3.905657 +Input = 0.391374 Output = 3.967942 +Input = 0.397148 Output = 4.030070 +Input = 0.402906 Output = 4.092039 +Input = 0.408649 Output = 4.153846 +Input = 0.414376 Output = 4.215489 +Input = 0.420086 Output = 4.276966 +Input = 0.425779 Output = 4.338274 +Input = 0.431456 Output = 4.399411 +Input = 0.437116 Output = 4.460374 +Input = 0.442758 Output = 4.521162 +Input = 0.448383 Output = 4.581770 +Input = 0.453990 Output = 4.642198 +Input = 0.459580 Output = 4.702442 +Input = 0.465151 Output = 4.762501 +Input = 0.470704 Output = 4.822372 +Input = 0.476238 Output = 4.882052 +Input = 0.481754 Output = 4.941539 +Input = 0.487250 Output = 5.000832 +Input = 0.492727 Output = 5.059927 +Input = 0.498185 Output = 5.118822 +Input = 0.503623 Output = 5.177516 +Input = 0.509041 Output = 5.236005 +Input = 0.514440 Output = 5.294287 +Input = 0.519817 Output = 5.352360 +Input = 0.525175 Output = 5.410222 +Input = 0.530511 Output = 5.467870 +Input = 0.535827 Output = 5.525302 +Input = 0.541121 Output = 5.582517 +Input = 0.546394 Output = 5.639511 +Input = 0.551646 Output = 5.696282 +Input = 0.556876 Output = 5.752829 +Input = 0.562083 Output = 5.809148 +Input = 0.567269 Output = 5.865237 +Input = 0.572432 Output = 5.921095 +Input = 0.577573 Output = 5.976720 +Input = 0.582690 Output = 6.032109 +Input = 0.587785 Output = 6.087260 +Input = 0.592857 Output = 6.142170 +Input = 0.597905 Output = 6.196838 +Input = 0.602930 Output = 6.251261 +Input = 0.607930 Output = 6.305438 +Input = 0.612907 Output = 6.359365 +Input = 0.617860 Output = 6.413041 +Input = 0.622788 Output = 6.466464 +Input = 0.627691 Output = 6.519632 +Input = 0.632570 Output = 6.572543 +Input = 0.637424 Output = 6.625194 +Input = 0.642253 Output = 6.677583 +Input = 0.647056 Output = 6.729708 +Input = 0.651834 Output = 6.781569 +Input = 0.656586 Output = 6.833161 +Input = 0.661312 Output = 6.884483 +Input = 0.666012 Output = 6.935534 +Input = 0.670686 Output = 6.986312 +Input = 0.675333 Output = 7.036813 +Input = 0.679953 Output = 7.087037 +Input = 0.684547 Output = 7.136980 +Input = 0.689114 Output = 7.186642 +Input = 0.693653 Output = 7.236020 +Input = 0.698165 Output = 7.285113 +Input = 0.702650 Output = 7.333918 +Input = 0.707107 Output = 7.382433 +Input = 0.711536 Output = 7.430657 +Input = 0.715936 Output = 7.478588 +Input = 0.720309 Output = 7.526223 +Input = 0.724653 Output = 7.573561 +Input = 0.728969 Output = 7.620601 +Input = 0.733255 Output = 7.667339 +Input = 0.737513 Output = 7.713775 +Input = 0.741742 Output = 7.759906 +Input = 0.745941 Output = 7.805731 +Input = 0.750111 Output = 7.851247 +Input = 0.754251 Output = 7.896454 +Input = 0.758362 Output = 7.941350 +Input = 0.762442 Output = 7.985931 +Input = 0.766493 Output = 8.030197 +Input = 0.770513 Output = 8.074146 +Input = 0.774503 Output = 8.117777 +Input = 0.778462 Output = 8.161087 +Input = 0.782391 Output = 8.204075 +Input = 0.786288 Output = 8.246738 +Input = 0.790155 Output = 8.289078 +Input = 0.793990 Output = 8.331089 +Input = 0.797794 Output = 8.372770 +Input = 0.801567 Output = 8.414122 +Input = 0.805308 Output = 8.455141 +Input = 0.809017 Output = 8.495827 +Input = 0.812694 Output = 8.536177 +Input = 0.816339 Output = 8.576190 +Input = 0.819952 Output = 8.615865 +Input = 0.823533 Output = 8.655200 +Input = 0.827081 Output = 8.694192 +Input = 0.830596 Output = 8.732841 +Input = 0.834078 Output = 8.771147 +Input = 0.837528 Output = 8.809106 +Input = 0.840945 Output = 8.846717 +Input = 0.844328 Output = 8.883979 +Input = 0.847678 Output = 8.920890 +Input = 0.850994 Output = 8.957448 +Input = 0.854277 Output = 8.993653 +Input = 0.857527 Output = 9.029503 +Input = 0.860742 Output = 9.064997 +Input = 0.863923 Output = 9.100132 +Input = 0.867071 Output = 9.134909 +Input = 0.870184 Output = 9.169325 +Input = 0.873262 Output = 9.203378 +Input = 0.876307 Output = 9.237068 +Input = 0.879316 Output = 9.270394 +Input = 0.882291 Output = 9.303354 +Input = 0.885231 Output = 9.335947 +Input = 0.888136 Output = 9.368171 +Input = 0.891007 Output = 9.400025 +Input = 0.893841 Output = 9.431508 +Input = 0.896641 Output = 9.462619 +Input = 0.899405 Output = 9.493356 +Input = 0.902134 Output = 9.523719 +Input = 0.904827 Output = 9.553705 +Input = 0.907484 Output = 9.583314 +Input = 0.910106 Output = 9.612545 +Input = 0.912692 Output = 9.641397 +Input = 0.915241 Output = 9.669867 +Input = 0.917755 Output = 9.697956 +Input = 0.920232 Output = 9.725662 +Input = 0.922673 Output = 9.752985 +Input = 0.925077 Output = 9.779922 +Input = 0.927445 Output = 9.806474 +Input = 0.929776 Output = 9.832638 +Input = 0.932071 Output = 9.858414 +Input = 0.934329 Output = 9.883801 +Input = 0.936550 Output = 9.908796 +Input = 0.938734 Output = 9.933401 +Input = 0.940881 Output = 9.957613 +Input = 0.942991 Output = 9.981433 +Input = 0.945063 Output = 10.004859 +Input = 0.947098 Output = 10.027890 +Input = 0.949096 Output = 10.050525 +Input = 0.951056 Output = 10.072762 +Input = 0.952979 Output = 10.094604 +Input = 0.954865 Output = 10.116046 +Input = 0.956712 Output = 10.137089 +Input = 0.958522 Output = 10.157732 +Input = 0.960294 Output = 10.177973 +Input = 0.962028 Output = 10.197813 +Input = 0.963724 Output = 10.217250 +Input = 0.965382 Output = 10.236283 +Input = 0.967001 Output = 10.254913 +Input = 0.968583 Output = 10.273138 +Input = 0.970127 Output = 10.290957 +Input = 0.971632 Output = 10.308370 +Input = 0.973099 Output = 10.325376 +Input = 0.974527 Output = 10.341973 +Input = 0.975917 Output = 10.358164 +Input = 0.977268 Output = 10.373945 +Input = 0.978581 Output = 10.389318 +Input = 0.979855 Output = 10.404279 +Input = 0.981090 Output = 10.418829 +Input = 0.982287 Output = 10.432968 +Input = 0.983445 Output = 10.446695 +Input = 0.984564 Output = 10.460011 +Input = 0.985645 Output = 10.472913 +Input = 0.986686 Output = 10.485401 +Input = 0.987688 Output = 10.497476 +Input = 0.988652 Output = 10.509136 +Input = 0.989576 Output = 10.520382 +Input = 0.990461 Output = 10.531212 +Input = 0.991308 Output = 10.541626 +Input = 0.992115 Output = 10.551624 +Input = 0.992883 Output = 10.561207 +Input = 0.993611 Output = 10.570372 +Input = 0.994301 Output = 10.579119 +Input = 0.994951 Output = 10.587448 +Input = 0.995562 Output = 10.595360 +Input = 0.996134 Output = 10.602854 +Input = 0.996666 Output = 10.609929 +Input = 0.997159 Output = 10.616586 +Input = 0.997612 Output = 10.622822 +Input = 0.998027 Output = 10.628639 +Input = 0.998402 Output = 10.634037 +Input = 0.998737 Output = 10.639015 +Input = 0.999033 Output = 10.643574 +Input = 0.999289 Output = 10.647712 +Input = 0.999507 Output = 10.651430 +Input = 0.999684 Output = 10.654727 +Input = 0.999822 Output = 10.657603 +Input = 0.999921 Output = 10.660059 +Input = 0.999980 Output = 10.662094 +Input = 1.000000 Output = 10.663709 +Input = 0.999980 Output = 10.664902 +Input = 0.999921 Output = 10.665672 +Input = 0.999822 Output = 10.666023 +Input = 0.999684 Output = 10.665953 +Input = 0.999507 Output = 10.665462 +Input = 0.999289 Output = 10.664549 +Input = 0.999033 Output = 10.663217 +Input = 0.998737 Output = 10.661462 +Input = 0.998402 Output = 10.659286 +Input = 0.998027 Output = 10.656691 +Input = 0.997613 Output = 10.653674 +Input = 0.997159 Output = 10.650236 +Input = 0.996666 Output = 10.646379 +Input = 0.996134 Output = 10.642101 +Input = 0.995562 Output = 10.637403 +Input = 0.994951 Output = 10.632284 +Input = 0.994301 Output = 10.626746 +Input = 0.993611 Output = 10.620789 +Input = 0.992883 Output = 10.614412 +Input = 0.992115 Output = 10.607616 +Input = 0.991308 Output = 10.600403 +Input = 0.990461 Output = 10.592770 +Input = 0.989576 Output = 10.584719 +Input = 0.988652 Output = 10.576250 +Input = 0.987688 Output = 10.567364 +Input = 0.986686 Output = 10.558060 +Input = 0.985645 Output = 10.548338 +Input = 0.984564 Output = 10.538200 +Input = 0.983445 Output = 10.527647 +Input = 0.982287 Output = 10.516679 +Input = 0.981091 Output = 10.505295 +Input = 0.979855 Output = 10.493497 +Input = 0.978581 Output = 10.481284 +Input = 0.977268 Output = 10.468657 +Input = 0.975917 Output = 10.455618 +Input = 0.974527 Output = 10.442165 +Input = 0.973099 Output = 10.428300 +Input = 0.971632 Output = 10.414022 +Input = 0.970127 Output = 10.399335 +Input = 0.968583 Output = 10.384236 +Input = 0.967001 Output = 10.368729 +Input = 0.965382 Output = 10.352811 +Input = 0.963724 Output = 10.336485 +Input = 0.962028 Output = 10.319751 +Input = 0.960294 Output = 10.302608 +Input = 0.958522 Output = 10.285061 +Input = 0.956712 Output = 10.267107 +Input = 0.954865 Output = 10.248747 +Input = 0.952979 Output = 10.229982 +Input = 0.951057 Output = 10.210814 +Input = 0.949096 Output = 10.191242 +Input = 0.947098 Output = 10.171268 +Input = 0.945063 Output = 10.150894 +Input = 0.942991 Output = 10.130117 +Input = 0.940881 Output = 10.108941 +Input = 0.938734 Output = 10.087366 +Input = 0.936550 Output = 10.065392 +Input = 0.934329 Output = 10.043022 +Input = 0.932071 Output = 10.020255 +Input = 0.929777 Output = 9.997092 +Input = 0.927445 Output = 9.973535 +Input = 0.925077 Output = 9.949584 +Input = 0.922673 Output = 9.925241 +Input = 0.920232 Output = 9.900505 +Input = 0.917755 Output = 9.875379 +Input = 0.915241 Output = 9.849862 +Input = 0.912692 Output = 9.823956 +Input = 0.910106 Output = 9.797664 +Input = 0.907484 Output = 9.770984 +Input = 0.904827 Output = 9.743918 +Input = 0.902134 Output = 9.716469 +Input = 0.899405 Output = 9.688634 +Input = 0.896641 Output = 9.660418 +Input = 0.893841 Output = 9.631820 +Input = 0.891007 Output = 9.602841 +Input = 0.888137 Output = 9.573484 +Input = 0.885231 Output = 9.543749 +Input = 0.882291 Output = 9.513637 +Input = 0.879316 Output = 9.483150 +Input = 0.876307 Output = 9.452289 +Input = 0.873263 Output = 9.421054 +Input = 0.870184 Output = 9.389447 +Input = 0.867071 Output = 9.357470 +Input = 0.863923 Output = 9.325122 +Input = 0.860742 Output = 9.292407 +Input = 0.857527 Output = 9.259325 +Input = 0.854277 Output = 9.225878 +Input = 0.850995 Output = 9.192066 +Input = 0.847678 Output = 9.157891 +Input = 0.844328 Output = 9.123354 +Input = 0.840945 Output = 9.088458 +Input = 0.837528 Output = 9.053204 +Input = 0.834078 Output = 9.017591 +Input = 0.830596 Output = 8.981623 +Input = 0.827081 Output = 8.945299 +Input = 0.823533 Output = 8.908623 +Input = 0.819952 Output = 8.871594 +Input = 0.816339 Output = 8.834216 +Input = 0.812694 Output = 8.796489 +Input = 0.809017 Output = 8.758415 +Input = 0.805308 Output = 8.719995 +Input = 0.801567 Output = 8.681231 +Input = 0.797795 Output = 8.642124 +Input = 0.793990 Output = 8.602676 +Input = 0.790155 Output = 8.562889 +Input = 0.786288 Output = 8.522763 +Input = 0.782391 Output = 8.482301 +Input = 0.778462 Output = 8.441503 +Input = 0.774503 Output = 8.400372 +Input = 0.770513 Output = 8.358909 +Input = 0.766493 Output = 8.317118 +Input = 0.762443 Output = 8.274997 +Input = 0.758362 Output = 8.232551 +Input = 0.754251 Output = 8.189779 +Input = 0.750111 Output = 8.146684 +Input = 0.745941 Output = 8.103267 +Input = 0.741742 Output = 8.059530 +Input = 0.737513 Output = 8.015475 +Input = 0.733255 Output = 7.971103 +Input = 0.728969 Output = 7.926416 +Input = 0.724653 Output = 7.881417 +Input = 0.720309 Output = 7.836106 +Input = 0.715937 Output = 7.790486 +Input = 0.711536 Output = 7.744559 +Input = 0.707107 Output = 7.698327 +Input = 0.702650 Output = 7.651790 +Input = 0.698165 Output = 7.604951 +Input = 0.693653 Output = 7.557812 +Input = 0.689114 Output = 7.510375 +Input = 0.684547 Output = 7.462641 +Input = 0.679953 Output = 7.414613 +Input = 0.675333 Output = 7.366292 +Input = 0.670686 Output = 7.317679 +Input = 0.666012 Output = 7.268778 +Input = 0.661312 Output = 7.219590 +Input = 0.656586 Output = 7.170117 +Input = 0.651834 Output = 7.120360 +Input = 0.647056 Output = 7.070323 +Input = 0.642253 Output = 7.020007 +Input = 0.637424 Output = 6.969413 +Input = 0.632570 Output = 6.918545 +Input = 0.627691 Output = 6.867403 +Input = 0.622788 Output = 6.815990 +Input = 0.617860 Output = 6.764309 +Input = 0.612907 Output = 6.712360 +Input = 0.607930 Output = 6.660146 +Input = 0.602930 Output = 6.607668 +Input = 0.597905 Output = 6.554931 +Input = 0.592857 Output = 6.501934 +Input = 0.587785 Output = 6.448681 +Input = 0.582691 Output = 6.395174 +Input = 0.577573 Output = 6.341413 +Input = 0.572432 Output = 6.287403 +Input = 0.567269 Output = 6.233144 +Input = 0.562083 Output = 6.178639 +Input = 0.556876 Output = 6.123890 +Input = 0.551646 Output = 6.068900 +Input = 0.546394 Output = 6.013669 +Input = 0.541121 Output = 5.958201 +Input = 0.535827 Output = 5.902499 +Input = 0.530511 Output = 5.846563 +Input = 0.525175 Output = 5.790396 +Input = 0.519817 Output = 5.734001 +Input = 0.514440 Output = 5.677380 +Input = 0.509042 Output = 5.620534 +Input = 0.503623 Output = 5.563467 +Input = 0.498185 Output = 5.506179 +Input = 0.492727 Output = 5.448675 +Input = 0.487250 Output = 5.390954 +Input = 0.481754 Output = 5.333022 +Input = 0.476238 Output = 5.274879 +Input = 0.470704 Output = 5.216528 +Input = 0.465151 Output = 5.157970 +Input = 0.459580 Output = 5.099209 +Input = 0.453991 Output = 5.040246 +Input = 0.448383 Output = 4.981085 +Input = 0.442758 Output = 4.921728 +Input = 0.437116 Output = 4.862175 +Input = 0.431456 Output = 4.802432 +Input = 0.425779 Output = 4.742498 +Input = 0.420086 Output = 4.682377 +Input = 0.414376 Output = 4.622071 +Input = 0.408649 Output = 4.561583 +Input = 0.402907 Output = 4.500915 +Input = 0.397148 Output = 4.440069 +Input = 0.391374 Output = 4.379047 +Input = 0.385584 Output = 4.317853 +Input = 0.379779 Output = 4.256489 +Input = 0.373959 Output = 4.194956 +Input = 0.368125 Output = 4.133258 +Input = 0.362275 Output = 4.071396 +Input = 0.356412 Output = 4.009374 +Input = 0.350534 Output = 3.947194 +Input = 0.344643 Output = 3.884857 +Input = 0.338738 Output = 3.822368 +Input = 0.332820 Output = 3.759727 +Input = 0.326888 Output = 3.696938 +Input = 0.320944 Output = 3.634003 +Input = 0.314987 Output = 3.570925 +Input = 0.309017 Output = 3.507706 +Input = 0.303035 Output = 3.444348 +Input = 0.297042 Output = 3.380854 +Input = 0.291036 Output = 3.317227 +Input = 0.285019 Output = 3.253469 +Input = 0.278991 Output = 3.189582 +Input = 0.272952 Output = 3.125569 +Input = 0.266902 Output = 3.061433 +Input = 0.260842 Output = 2.997176 +Input = 0.254771 Output = 2.932801 +Input = 0.248690 Output = 2.868310 +Input = 0.242599 Output = 2.803706 +Input = 0.236499 Output = 2.738991 +Input = 0.230390 Output = 2.674168 +Input = 0.224271 Output = 2.609239 +Input = 0.218143 Output = 2.544208 +Input = 0.212007 Output = 2.479075 +Input = 0.205863 Output = 2.413846 +Input = 0.199710 Output = 2.348520 +Input = 0.193550 Output = 2.283103 +Input = 0.187381 Output = 2.217594 +Input = 0.181206 Output = 2.151999 +Input = 0.175023 Output = 2.086318 +Input = 0.168834 Output = 2.020555 +Input = 0.162637 Output = 1.954713 +Input = 0.156435 Output = 1.888793 +Input = 0.150226 Output = 1.822798 +Input = 0.144011 Output = 1.756732 +Input = 0.137790 Output = 1.690596 +Input = 0.131564 Output = 1.624394 +Input = 0.125333 Output = 1.558127 +Input = 0.119097 Output = 1.491799 +Input = 0.112857 Output = 1.425412 +Input = 0.106611 Output = 1.358969 +Input = 0.100362 Output = 1.292472 +Input = 0.094108 Output = 1.225924 +Input = 0.087851 Output = 1.159327 +Input = 0.081591 Output = 1.092685 +Input = 0.075327 Output = 1.026000 +Input = 0.069060 Output = 0.959274 +Input = 0.062791 Output = 0.892510 +Input = 0.056519 Output = 0.825711 +Input = 0.050244 Output = 0.758880 +Input = 0.043968 Output = 0.692019 +Input = 0.037690 Output = 0.625130 +Input = 0.031411 Output = 0.558216 +Input = 0.025130 Output = 0.491281 +Input = 0.018849 Output = 0.424326 +Input = 0.012566 Output = 0.357354 +Input = 0.006283 Output = 0.290369 +Input = 0.000000 Output = 0.223371 +Input = -0.006283 Output = 0.156365 +Input = -0.012566 Output = 0.089353 +Input = -0.018848 Output = 0.022338 +Input = -0.025130 Output = -0.044679 +Input = -0.031411 Output = -0.111694 +Input = -0.037690 Output = -0.178704 +Input = -0.043968 Output = -0.245708 +Input = -0.050244 Output = -0.312701 +Input = -0.056518 Output = -0.379683 +Input = -0.062790 Output = -0.446649 +Input = -0.069060 Output = -0.513598 +Input = -0.075327 Output = -0.580526 +Input = -0.081590 Output = -0.647432 +Input = -0.087851 Output = -0.714312 +Input = -0.094108 Output = -0.781163 +Input = -0.100362 Output = -0.847984 +Input = -0.106611 Output = -0.914772 +Input = -0.112856 Output = -0.981523 +Input = -0.119097 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Output = -2.738992 +Input = -0.230390 Output = -2.674170 +Input = -0.224271 Output = -2.609241 +Input = -0.218144 Output = -2.544209 +Input = -0.212007 Output = -2.479077 +Input = -0.205863 Output = -2.413847 +Input = -0.199710 Output = -2.348522 +Input = -0.193550 Output = -2.283104 +Input = -0.187382 Output = -2.217596 +Input = -0.181206 Output = -2.152000 +Input = -0.175023 Output = -2.086320 +Input = -0.168834 Output = -2.020557 +Input = -0.162637 Output = -1.954714 +Input = -0.156435 Output = -1.888794 +Input = -0.150226 Output = -1.822800 +Input = -0.144011 Output = -1.756734 +Input = -0.137791 Output = -1.690598 +Input = -0.131565 Output = -1.624395 +Input = -0.125334 Output = -1.558129 +Input = -0.119097 Output = -1.491801 +Input = -0.112857 Output = -1.425414 +Input = -0.106611 Output = -1.358970 +Input = -0.100362 Output = -1.292473 +Input = -0.094109 Output = -1.225925 +Input = -0.087851 Output = -1.159329 +Input = -0.081591 Output = -1.092687 +Input = -0.075327 Output = -1.026001 +Input = -0.069060 Output = -0.959276 +Input = -0.062791 Output = -0.892512 +Input = -0.056519 Output = -0.825713 +Input = -0.050245 Output = -0.758882 diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.linux b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.linux new file mode 100644 index 000000000..97fce0a76 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.linux @@ -0,0 +1,994 @@ +SystemC Simulation +Input = 0.000000 Output = 0.000000 +Input = 0.006283 Output = 0.000000 +Input = 0.012566 Output = 0.006283 +Input = 0.018848 Output = 0.029845 +Input = 0.025130 Output = 0.071862 +Input = 0.031411 Output = 0.125559 +Input = 0.037690 Output = 0.185706 +Input = 0.043968 Output = 0.249226 +Input = 0.050244 Output = 0.314466 +Input = 0.056519 Output = 0.380567 +Input = 0.062791 Output = 0.447092 +Input = 0.069060 Output = 0.513820 +Input = 0.075327 Output = 0.580638 +Input = 0.081591 Output = 0.647488 +Input = 0.087851 Output = 0.714341 +Input = 0.094108 Output = 0.781179 +Input = 0.100362 Output = 0.847993 +Input = 0.106611 Output = 0.914777 +Input = 0.112856 Output = 0.981526 +Input = 0.119097 Output = 1.048238 +Input = 0.125333 Output = 1.114909 +Input = 0.131564 Output = 1.181536 +Input = 0.137790 Output = 1.248116 +Input = 0.144011 Output = 1.314647 +Input = 0.150226 Output = 1.381127 +Input = 0.156434 Output = 1.447551 +Input = 0.162637 Output = 1.513919 +Input = 0.168833 Output = 1.580227 +Input = 0.175023 Output = 1.646473 +Input = 0.181206 Output = 1.712653 +Input = 0.187381 Output = 1.778766 +Input = 0.193549 Output = 1.844809 +Input = 0.199710 Output = 1.910779 +Input = 0.205863 Output = 1.976673 +Input = 0.212007 Output = 2.042490 +Input = 0.218143 Output = 2.108225 +Input = 0.224271 Output = 2.173878 +Input = 0.230389 Output = 2.239444 +Input = 0.236499 Output = 2.304923 +Input = 0.242599 Output = 2.370310 +Input = 0.248690 Output = 2.435604 +Input = 0.254771 Output = 2.500802 +Input = 0.260841 Output = 2.565900 +Input = 0.266902 Output = 2.630898 +Input = 0.272952 Output = 2.695791 +Input = 0.278991 Output = 2.760579 +Input = 0.285019 Output = 2.825257 +Input = 0.291036 Output = 2.889824 +Input = 0.297042 Output = 2.954277 +Input = 0.303035 Output = 3.018613 +Input = 0.309017 Output = 3.082829 +Input = 0.314986 Output = 3.146924 +Input = 0.320944 Output = 3.210896 +Input = 0.326888 Output = 3.274740 +Input = 0.332820 Output = 3.338454 +Input = 0.338738 Output = 3.402038 +Input = 0.344643 Output = 3.465486 +Input = 0.350534 Output = 3.528798 +Input = 0.356412 Output = 3.591971 +Input = 0.362275 Output = 3.655002 +Input = 0.368125 Output = 3.717888 +Input = 0.373959 Output = 3.780628 +Input = 0.379779 Output = 3.843218 +Input = 0.385584 Output = 3.905657 +Input = 0.391374 Output = 3.967942 +Input = 0.397148 Output = 4.030070 +Input = 0.402906 Output = 4.092039 +Input = 0.408649 Output = 4.153846 +Input = 0.414376 Output = 4.215489 +Input = 0.420086 Output = 4.276966 +Input = 0.425779 Output = 4.338274 +Input = 0.431456 Output = 4.399411 +Input = 0.437116 Output = 4.460374 +Input = 0.442758 Output = 4.521162 +Input = 0.448383 Output = 4.581770 +Input = 0.453990 Output = 4.642198 +Input = 0.459580 Output = 4.702442 +Input = 0.465151 Output = 4.762501 +Input = 0.470704 Output = 4.822372 +Input = 0.476238 Output = 4.882052 +Input = 0.481754 Output = 4.941539 +Input = 0.487250 Output = 5.000832 +Input = 0.492727 Output = 5.059927 +Input = 0.498185 Output = 5.118822 +Input = 0.503623 Output = 5.177516 +Input = 0.509041 Output = 5.236005 +Input = 0.514440 Output = 5.294287 +Input = 0.519817 Output = 5.352360 +Input = 0.525175 Output = 5.410222 +Input = 0.530511 Output = 5.467870 +Input = 0.535827 Output = 5.525302 +Input = 0.541121 Output = 5.582517 +Input = 0.546394 Output = 5.639511 +Input = 0.551646 Output = 5.696282 +Input = 0.556876 Output = 5.752829 +Input = 0.562083 Output = 5.809148 +Input = 0.567269 Output = 5.865237 +Input = 0.572432 Output = 5.921095 +Input = 0.577573 Output = 5.976720 +Input = 0.582690 Output = 6.032109 +Input = 0.587785 Output = 6.087260 +Input = 0.592857 Output = 6.142170 +Input = 0.597905 Output = 6.196838 +Input = 0.602930 Output = 6.251261 +Input = 0.607930 Output = 6.305438 +Input = 0.612907 Output = 6.359365 +Input = 0.617860 Output = 6.413041 +Input = 0.622788 Output = 6.466464 +Input = 0.627691 Output = 6.519632 +Input = 0.632570 Output = 6.572543 +Input = 0.637424 Output = 6.625194 +Input = 0.642253 Output = 6.677583 +Input = 0.647056 Output = 6.729708 +Input = 0.651834 Output = 6.781569 +Input = 0.656586 Output = 6.833161 +Input = 0.661312 Output = 6.884483 +Input = 0.666012 Output = 6.935534 +Input = 0.670686 Output = 6.986312 +Input = 0.675333 Output = 7.036813 +Input = 0.679953 Output = 7.087037 +Input = 0.684547 Output = 7.136980 +Input = 0.689114 Output = 7.186642 +Input = 0.693653 Output = 7.236020 +Input = 0.698165 Output = 7.285113 +Input = 0.702650 Output = 7.333918 +Input = 0.707107 Output = 7.382433 +Input = 0.711536 Output = 7.430657 +Input = 0.715936 Output = 7.478588 +Input = 0.720309 Output = 7.526223 +Input = 0.724653 Output = 7.573561 +Input = 0.728969 Output = 7.620601 +Input = 0.733255 Output = 7.667339 +Input = 0.737513 Output = 7.713775 +Input = 0.741742 Output = 7.759906 +Input = 0.745941 Output = 7.805731 +Input = 0.750111 Output = 7.851247 +Input = 0.754251 Output = 7.896454 +Input = 0.758362 Output = 7.941350 +Input = 0.762442 Output = 7.985931 +Input = 0.766493 Output = 8.030197 +Input = 0.770513 Output = 8.074146 +Input = 0.774503 Output = 8.117777 +Input = 0.778462 Output = 8.161087 +Input = 0.782391 Output = 8.204075 +Input = 0.786288 Output = 8.246738 +Input = 0.790155 Output = 8.289078 +Input = 0.793990 Output = 8.331089 +Input = 0.797794 Output = 8.372770 +Input = 0.801567 Output = 8.414122 +Input = 0.805308 Output = 8.455141 +Input = 0.809017 Output = 8.495827 +Input = 0.812694 Output = 8.536177 +Input = 0.816339 Output = 8.576190 +Input = 0.819952 Output = 8.615865 +Input = 0.823533 Output = 8.655200 +Input = 0.827081 Output = 8.694192 +Input = 0.830596 Output = 8.732841 +Input = 0.834078 Output = 8.771147 +Input = 0.837528 Output = 8.809106 +Input = 0.840945 Output = 8.846717 +Input = 0.844328 Output = 8.883979 +Input = 0.847678 Output = 8.920890 +Input = 0.850994 Output = 8.957448 +Input = 0.854277 Output = 8.993653 +Input = 0.857527 Output = 9.029503 +Input = 0.860742 Output = 9.064997 +Input = 0.863923 Output = 9.100132 +Input = 0.867071 Output = 9.134909 +Input = 0.870184 Output = 9.169325 +Input = 0.873262 Output = 9.203378 +Input = 0.876307 Output = 9.237068 +Input = 0.879316 Output = 9.270394 +Input = 0.882291 Output = 9.303354 +Input = 0.885231 Output = 9.335947 +Input = 0.888136 Output = 9.368171 +Input = 0.891007 Output = 9.400025 +Input = 0.893841 Output = 9.431508 +Input = 0.896641 Output = 9.462619 +Input = 0.899405 Output = 9.493356 +Input = 0.902134 Output = 9.523719 +Input = 0.904827 Output = 9.553705 +Input = 0.907484 Output = 9.583314 +Input = 0.910106 Output = 9.612545 +Input = 0.912692 Output = 9.641397 +Input = 0.915241 Output = 9.669867 +Input = 0.917755 Output = 9.697956 +Input = 0.920232 Output = 9.725662 +Input = 0.922673 Output = 9.752985 +Input = 0.925077 Output = 9.779922 +Input = 0.927445 Output = 9.806474 +Input = 0.929776 Output = 9.832638 +Input = 0.932071 Output = 9.858414 +Input = 0.934329 Output = 9.883801 +Input = 0.936550 Output = 9.908796 +Input = 0.938734 Output = 9.933401 +Input = 0.940881 Output = 9.957613 +Input = 0.942991 Output = 9.981433 +Input = 0.945063 Output = 10.004859 +Input = 0.947098 Output = 10.027890 +Input = 0.949096 Output = 10.050525 +Input = 0.951056 Output = 10.072762 +Input = 0.952979 Output = 10.094604 +Input = 0.954865 Output = 10.116046 +Input = 0.956712 Output = 10.137089 +Input = 0.958522 Output = 10.157732 +Input = 0.960294 Output = 10.177973 +Input = 0.962028 Output = 10.197813 +Input = 0.963724 Output = 10.217250 +Input = 0.965382 Output = 10.236283 +Input = 0.967001 Output = 10.254913 +Input = 0.968583 Output = 10.273138 +Input = 0.970127 Output = 10.290957 +Input = 0.971632 Output = 10.308370 +Input = 0.973099 Output = 10.325376 +Input = 0.974527 Output = 10.341973 +Input = 0.975917 Output = 10.358164 +Input = 0.977268 Output = 10.373945 +Input = 0.978581 Output = 10.389318 +Input = 0.979855 Output = 10.404279 +Input = 0.981090 Output = 10.418829 +Input = 0.982287 Output = 10.432968 +Input = 0.983445 Output = 10.446695 +Input = 0.984564 Output = 10.460011 +Input = 0.985645 Output = 10.472913 +Input = 0.986686 Output = 10.485401 +Input = 0.987688 Output = 10.497476 +Input = 0.988652 Output = 10.509136 +Input = 0.989576 Output = 10.520382 +Input = 0.990461 Output = 10.531212 +Input = 0.991308 Output = 10.541626 +Input = 0.992115 Output = 10.551624 +Input = 0.992883 Output = 10.561207 +Input = 0.993611 Output = 10.570372 +Input = 0.994301 Output = 10.579119 +Input = 0.994951 Output = 10.587448 +Input = 0.995562 Output = 10.595360 +Input = 0.996134 Output = 10.602854 +Input = 0.996666 Output = 10.609929 +Input = 0.997159 Output = 10.616586 +Input = 0.997612 Output = 10.622822 +Input = 0.998027 Output = 10.628639 +Input = 0.998402 Output = 10.634037 +Input = 0.998737 Output = 10.639015 +Input = 0.999033 Output = 10.643574 +Input = 0.999289 Output = 10.647712 +Input = 0.999507 Output = 10.651430 +Input = 0.999684 Output = 10.654727 +Input = 0.999822 Output = 10.657603 +Input = 0.999921 Output = 10.660059 +Input = 0.999980 Output = 10.662094 +Input = 1.000000 Output = 10.663709 +Input = 0.999980 Output = 10.664902 +Input = 0.999921 Output = 10.665672 +Input = 0.999822 Output = 10.666023 +Input = 0.999684 Output = 10.665953 +Input = 0.999507 Output = 10.665462 +Input = 0.999289 Output = 10.664549 +Input = 0.999033 Output = 10.663217 +Input = 0.998737 Output = 10.661462 +Input = 0.998402 Output = 10.659286 +Input = 0.998027 Output = 10.656691 +Input = 0.997613 Output = 10.653674 +Input = 0.997159 Output = 10.650236 +Input = 0.996666 Output = 10.646379 +Input = 0.996134 Output = 10.642101 +Input = 0.995562 Output = 10.637403 +Input = 0.994951 Output = 10.632284 +Input = 0.994301 Output = 10.626746 +Input = 0.993611 Output = 10.620789 +Input = 0.992883 Output = 10.614412 +Input = 0.992115 Output = 10.607616 +Input = 0.991308 Output = 10.600403 +Input = 0.990461 Output = 10.592770 +Input = 0.989576 Output = 10.584719 +Input = 0.988652 Output = 10.576250 +Input = 0.987688 Output = 10.567364 +Input = 0.986686 Output = 10.558060 +Input = 0.985645 Output = 10.548338 +Input = 0.984564 Output = 10.538200 +Input = 0.983445 Output = 10.527647 +Input = 0.982287 Output = 10.516679 +Input = 0.981091 Output = 10.505295 +Input = 0.979855 Output = 10.493497 +Input = 0.978581 Output = 10.481284 +Input = 0.977268 Output = 10.468657 +Input = 0.975917 Output = 10.455618 +Input = 0.974527 Output = 10.442165 +Input = 0.973099 Output = 10.428300 +Input = 0.971632 Output = 10.414022 +Input = 0.970127 Output = 10.399335 +Input = 0.968583 Output = 10.384236 +Input = 0.967001 Output = 10.368729 +Input = 0.965382 Output = 10.352811 +Input = 0.963724 Output = 10.336485 +Input = 0.962028 Output = 10.319751 +Input = 0.960294 Output = 10.302608 +Input = 0.958522 Output = 10.285061 +Input = 0.956712 Output = 10.267107 +Input = 0.954865 Output = 10.248747 +Input = 0.952979 Output = 10.229982 +Input = 0.951057 Output = 10.210814 +Input = 0.949096 Output = 10.191242 +Input = 0.947098 Output = 10.171268 +Input = 0.945063 Output = 10.150894 +Input = 0.942991 Output = 10.130117 +Input = 0.940881 Output = 10.108941 +Input = 0.938734 Output = 10.087366 +Input = 0.936550 Output = 10.065392 +Input = 0.934329 Output = 10.043022 +Input = 0.932071 Output = 10.020255 +Input = 0.929777 Output = 9.997092 +Input = 0.927445 Output = 9.973535 +Input = 0.925077 Output = 9.949584 +Input = 0.922673 Output = 9.925241 +Input = 0.920232 Output = 9.900505 +Input = 0.917755 Output = 9.875379 +Input = 0.915241 Output = 9.849862 +Input = 0.912692 Output = 9.823956 +Input = 0.910106 Output = 9.797664 +Input = 0.907484 Output = 9.770984 +Input = 0.904827 Output = 9.743918 +Input = 0.902134 Output = 9.716469 +Input = 0.899405 Output = 9.688634 +Input = 0.896641 Output = 9.660418 +Input = 0.893841 Output = 9.631820 +Input = 0.891007 Output = 9.602841 +Input = 0.888137 Output = 9.573484 +Input = 0.885231 Output = 9.543749 +Input = 0.882291 Output = 9.513637 +Input = 0.879316 Output = 9.483150 +Input = 0.876307 Output = 9.452289 +Input = 0.873263 Output = 9.421054 +Input = 0.870184 Output = 9.389447 +Input = 0.867071 Output = 9.357470 +Input = 0.863923 Output = 9.325122 +Input = 0.860742 Output = 9.292407 +Input = 0.857527 Output = 9.259325 +Input = 0.854277 Output = 9.225878 +Input = 0.850995 Output = 9.192066 +Input = 0.847678 Output = 9.157891 +Input = 0.844328 Output = 9.123354 +Input = 0.840945 Output = 9.088458 +Input = 0.837528 Output = 9.053204 +Input = 0.834078 Output = 9.017591 +Input = 0.830596 Output = 8.981623 +Input = 0.827081 Output = 8.945299 +Input = 0.823533 Output = 8.908623 +Input = 0.819952 Output = 8.871594 +Input = 0.816339 Output = 8.834216 +Input = 0.812694 Output = 8.796489 +Input = 0.809017 Output = 8.758415 +Input = 0.805308 Output = 8.719995 +Input = 0.801567 Output = 8.681231 +Input = 0.797795 Output = 8.642124 +Input = 0.793990 Output = 8.602676 +Input = 0.790155 Output = 8.562889 +Input = 0.786288 Output = 8.522763 +Input = 0.782391 Output = 8.482301 +Input = 0.778462 Output = 8.441503 +Input = 0.774503 Output = 8.400372 +Input = 0.770513 Output = 8.358909 +Input = 0.766493 Output = 8.317118 +Input = 0.762443 Output = 8.274997 +Input = 0.758362 Output = 8.232551 +Input = 0.754251 Output = 8.189779 +Input = 0.750111 Output = 8.146684 +Input = 0.745941 Output = 8.103267 +Input = 0.741742 Output = 8.059530 +Input = 0.737513 Output = 8.015475 +Input = 0.733255 Output = 7.971103 +Input = 0.728969 Output = 7.926416 +Input = 0.724653 Output = 7.881417 +Input = 0.720309 Output = 7.836106 +Input = 0.715937 Output = 7.790486 +Input = 0.711536 Output = 7.744559 +Input = 0.707107 Output = 7.698327 +Input = 0.702650 Output = 7.651790 +Input = 0.698165 Output = 7.604951 +Input = 0.693653 Output = 7.557812 +Input = 0.689114 Output = 7.510375 +Input = 0.684547 Output = 7.462641 +Input = 0.679953 Output = 7.414613 +Input = 0.675333 Output = 7.366292 +Input = 0.670686 Output = 7.317679 +Input = 0.666012 Output = 7.268778 +Input = 0.661312 Output = 7.219590 +Input = 0.656586 Output = 7.170117 +Input = 0.651834 Output = 7.120360 +Input = 0.647056 Output = 7.070323 +Input = 0.642253 Output = 7.020007 +Input = 0.637424 Output = 6.969413 +Input = 0.632570 Output = 6.918545 +Input = 0.627691 Output = 6.867403 +Input = 0.622788 Output = 6.815990 +Input = 0.617860 Output = 6.764309 +Input = 0.612907 Output = 6.712360 +Input = 0.607930 Output = 6.660146 +Input = 0.602930 Output = 6.607668 +Input = 0.597905 Output = 6.554931 +Input = 0.592857 Output = 6.501934 +Input = 0.587785 Output = 6.448681 +Input = 0.582691 Output = 6.395174 +Input = 0.577573 Output = 6.341413 +Input = 0.572432 Output = 6.287403 +Input = 0.567269 Output = 6.233144 +Input = 0.562083 Output = 6.178639 +Input = 0.556876 Output = 6.123890 +Input = 0.551646 Output = 6.068900 +Input = 0.546394 Output = 6.013669 +Input = 0.541121 Output = 5.958201 +Input = 0.535827 Output = 5.902499 +Input = 0.530511 Output = 5.846563 +Input = 0.525175 Output = 5.790396 +Input = 0.519817 Output = 5.734001 +Input = 0.514440 Output = 5.677380 +Input = 0.509042 Output = 5.620534 +Input = 0.503623 Output = 5.563467 +Input = 0.498185 Output = 5.506179 +Input = 0.492727 Output = 5.448675 +Input = 0.487250 Output = 5.390954 +Input = 0.481754 Output = 5.333022 +Input = 0.476238 Output = 5.274879 +Input = 0.470704 Output = 5.216528 +Input = 0.465151 Output = 5.157970 +Input = 0.459580 Output = 5.099209 +Input = 0.453991 Output = 5.040246 +Input = 0.448383 Output = 4.981085 +Input = 0.442758 Output = 4.921728 +Input = 0.437116 Output = 4.862175 +Input = 0.431456 Output = 4.802432 +Input = 0.425779 Output = 4.742498 +Input = 0.420086 Output = 4.682377 +Input = 0.414376 Output = 4.622071 +Input = 0.408649 Output = 4.561583 +Input = 0.402907 Output = 4.500915 +Input = 0.397148 Output = 4.440069 +Input = 0.391374 Output = 4.379047 +Input = 0.385584 Output = 4.317853 +Input = 0.379779 Output = 4.256489 +Input = 0.373959 Output = 4.194956 +Input = 0.368125 Output = 4.133258 +Input = 0.362275 Output = 4.071396 +Input = 0.356412 Output = 4.009374 +Input = 0.350534 Output = 3.947194 +Input = 0.344643 Output = 3.884857 +Input = 0.338738 Output = 3.822368 +Input = 0.332820 Output = 3.759727 +Input = 0.326888 Output = 3.696938 +Input = 0.320944 Output = 3.634003 +Input = 0.314987 Output = 3.570925 +Input = 0.309017 Output = 3.507706 +Input = 0.303035 Output = 3.444348 +Input = 0.297042 Output = 3.380854 +Input = 0.291036 Output = 3.317227 +Input = 0.285019 Output = 3.253469 +Input = 0.278991 Output = 3.189582 +Input = 0.272952 Output = 3.125569 +Input = 0.266902 Output = 3.061433 +Input = 0.260842 Output = 2.997176 +Input = 0.254771 Output = 2.932801 +Input = 0.248690 Output = 2.868310 +Input = 0.242599 Output = 2.803706 +Input = 0.236499 Output = 2.738991 +Input = 0.230390 Output = 2.674168 +Input = 0.224271 Output = 2.609239 +Input = 0.218143 Output = 2.544208 +Input = 0.212007 Output = 2.479075 +Input = 0.205863 Output = 2.413846 +Input = 0.199710 Output = 2.348520 +Input = 0.193550 Output = 2.283103 +Input = 0.187381 Output = 2.217594 +Input = 0.181206 Output = 2.151999 +Input = 0.175023 Output = 2.086318 +Input = 0.168834 Output = 2.020555 +Input = 0.162637 Output = 1.954713 +Input = 0.156435 Output = 1.888793 +Input = 0.150226 Output = 1.822798 +Input = 0.144011 Output = 1.756732 +Input = 0.137790 Output = 1.690596 +Input = 0.131564 Output = 1.624394 +Input = 0.125333 Output = 1.558127 +Input = 0.119097 Output = 1.491799 +Input = 0.112857 Output = 1.425412 +Input = 0.106611 Output = 1.358969 +Input = 0.100362 Output = 1.292472 +Input = 0.094108 Output = 1.225924 +Input = 0.087851 Output = 1.159327 +Input = 0.081591 Output = 1.092685 +Input = 0.075327 Output = 1.026000 +Input = 0.069060 Output = 0.959274 +Input = 0.062791 Output = 0.892510 +Input = 0.056519 Output = 0.825711 +Input = 0.050244 Output = 0.758880 +Input = 0.043968 Output = 0.692019 +Input = 0.037690 Output = 0.625130 +Input = 0.031411 Output = 0.558216 +Input = 0.025130 Output = 0.491281 +Input = 0.018849 Output = 0.424326 +Input = 0.012566 Output = 0.357354 +Input = 0.006283 Output = 0.290369 +Input = 0.000000 Output = 0.223371 +Input = -0.006283 Output = 0.156365 +Input = -0.012566 Output = 0.089353 +Input = -0.018848 Output = 0.022338 +Input = -0.025130 Output = -0.044679 +Input = -0.031411 Output = -0.111694 +Input = -0.037690 Output = -0.178704 +Input = -0.043968 Output = -0.245708 +Input = -0.050244 Output = -0.312701 +Input = -0.056518 Output = -0.379683 +Input = -0.062790 Output = -0.446649 +Input = -0.069060 Output = -0.513598 +Input = -0.075327 Output = -0.580526 +Input = -0.081590 Output = -0.647432 +Input = -0.087851 Output = -0.714312 +Input = -0.094108 Output = -0.781163 +Input = -0.100362 Output = -0.847984 +Input = -0.106611 Output = -0.914772 +Input = -0.112856 Output = -0.981523 +Input = -0.119097 Output = -1.048236 +Input = -0.125333 Output = -1.114907 +Input = -0.131564 Output = -1.181534 +Input = -0.137790 Output = -1.248114 +Input = -0.144011 Output = -1.314646 +Input = -0.150225 Output = -1.381125 +Input = -0.156434 Output = -1.447550 +Input = -0.162637 Output = -1.513917 +Input = -0.168833 Output = -1.580225 +Input = -0.175023 Output = -1.646471 +Input = -0.181206 Output = -1.712651 +Input = -0.187381 Output = -1.778764 +Input = -0.193549 Output = -1.844807 +Input = -0.199710 Output = -1.910777 +Input = -0.205862 Output = -1.976672 +Input = -0.212007 Output = -2.042488 +Input = -0.218143 Output = -2.108224 +Input = -0.224271 Output = -2.173876 +Input = -0.230389 Output = -2.239443 +Input = -0.236499 Output = -2.304921 +Input = -0.242599 Output = -2.370308 +Input = -0.248690 Output = -2.435602 +Input = -0.254771 Output = -2.500800 +Input = -0.260841 Output = -2.565899 +Input = -0.266902 Output = -2.630896 +Input = -0.272952 Output = -2.695790 +Input = -0.278991 Output = -2.760577 +Input = -0.285019 Output = -2.825256 +Input = -0.291036 Output = -2.889822 +Input = -0.297041 Output = -2.954275 +Input = -0.303035 Output = -3.018611 +Input = -0.309017 Output = -3.082828 +Input = -0.314986 Output = -3.146923 +Input = -0.320943 Output = -3.210894 +Input = -0.326888 Output = -3.274738 +Input = -0.332819 Output = -3.338453 +Input = -0.338738 Output = -3.402036 +Input = -0.344643 Output = -3.465485 +Input = -0.350534 Output = -3.528797 +Input = -0.356412 Output = -3.591969 +Input = -0.362275 Output = -3.655000 +Input = -0.368124 Output = -3.717887 +Input = -0.373959 Output = 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-1.690598 +Input = -0.131565 Output = -1.624395 +Input = -0.125334 Output = -1.558129 +Input = -0.119097 Output = -1.491801 +Input = -0.112857 Output = -1.425414 +Input = -0.106611 Output = -1.358970 +Input = -0.100362 Output = -1.292473 +Input = -0.094109 Output = -1.225925 +Input = -0.087851 Output = -1.159329 +Input = -0.081591 Output = -1.092687 +Input = -0.075327 Output = -1.026001 +Input = -0.069060 Output = -0.959276 +Input = -0.062791 Output = -0.892512 +Input = -0.056519 Output = -0.825713 +Input = -0.050245 Output = -0.758882 diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.macosx b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.macosx new file mode 100644 index 000000000..97fce0a76 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.macosx @@ -0,0 +1,994 @@ +SystemC Simulation +Input = 0.000000 Output = 0.000000 +Input = 0.006283 Output = 0.000000 +Input = 0.012566 Output = 0.006283 +Input = 0.018848 Output = 0.029845 +Input = 0.025130 Output = 0.071862 +Input = 0.031411 Output = 0.125559 +Input = 0.037690 Output = 0.185706 +Input = 0.043968 Output = 0.249226 +Input = 0.050244 Output = 0.314466 +Input = 0.056519 Output = 0.380567 +Input = 0.062791 Output = 0.447092 +Input = 0.069060 Output = 0.513820 +Input = 0.075327 Output = 0.580638 +Input = 0.081591 Output = 0.647488 +Input = 0.087851 Output = 0.714341 +Input = 0.094108 Output = 0.781179 +Input = 0.100362 Output = 0.847993 +Input = 0.106611 Output = 0.914777 +Input = 0.112856 Output = 0.981526 +Input = 0.119097 Output = 1.048238 +Input = 0.125333 Output = 1.114909 +Input = 0.131564 Output = 1.181536 +Input = 0.137790 Output = 1.248116 +Input = 0.144011 Output = 1.314647 +Input = 0.150226 Output = 1.381127 +Input = 0.156434 Output = 1.447551 +Input = 0.162637 Output = 1.513919 +Input = 0.168833 Output = 1.580227 +Input = 0.175023 Output = 1.646473 +Input = 0.181206 Output = 1.712653 +Input = 0.187381 Output = 1.778766 +Input = 0.193549 Output = 1.844809 +Input = 0.199710 Output = 1.910779 +Input = 0.205863 Output = 1.976673 +Input = 0.212007 Output = 2.042490 +Input = 0.218143 Output = 2.108225 +Input = 0.224271 Output = 2.173878 +Input = 0.230389 Output = 2.239444 +Input = 0.236499 Output = 2.304923 +Input = 0.242599 Output = 2.370310 +Input = 0.248690 Output = 2.435604 +Input = 0.254771 Output = 2.500802 +Input = 0.260841 Output = 2.565900 +Input = 0.266902 Output = 2.630898 +Input = 0.272952 Output = 2.695791 +Input = 0.278991 Output = 2.760579 +Input = 0.285019 Output = 2.825257 +Input = 0.291036 Output = 2.889824 +Input = 0.297042 Output = 2.954277 +Input = 0.303035 Output = 3.018613 +Input = 0.309017 Output = 3.082829 +Input = 0.314986 Output = 3.146924 +Input = 0.320944 Output = 3.210896 +Input = 0.326888 Output = 3.274740 +Input = 0.332820 Output = 3.338454 +Input = 0.338738 Output = 3.402038 +Input = 0.344643 Output = 3.465486 +Input = 0.350534 Output = 3.528798 +Input = 0.356412 Output = 3.591971 +Input = 0.362275 Output = 3.655002 +Input = 0.368125 Output = 3.717888 +Input = 0.373959 Output = 3.780628 +Input = 0.379779 Output = 3.843218 +Input = 0.385584 Output = 3.905657 +Input = 0.391374 Output = 3.967942 +Input = 0.397148 Output = 4.030070 +Input = 0.402906 Output = 4.092039 +Input = 0.408649 Output = 4.153846 +Input = 0.414376 Output = 4.215489 +Input = 0.420086 Output = 4.276966 +Input = 0.425779 Output = 4.338274 +Input = 0.431456 Output = 4.399411 +Input = 0.437116 Output = 4.460374 +Input = 0.442758 Output = 4.521162 +Input = 0.448383 Output = 4.581770 +Input = 0.453990 Output = 4.642198 +Input = 0.459580 Output = 4.702442 +Input = 0.465151 Output = 4.762501 +Input = 0.470704 Output = 4.822372 +Input = 0.476238 Output = 4.882052 +Input = 0.481754 Output = 4.941539 +Input = 0.487250 Output = 5.000832 +Input = 0.492727 Output = 5.059927 +Input = 0.498185 Output = 5.118822 +Input = 0.503623 Output = 5.177516 +Input = 0.509041 Output = 5.236005 +Input = 0.514440 Output = 5.294287 +Input = 0.519817 Output = 5.352360 +Input = 0.525175 Output = 5.410222 +Input = 0.530511 Output = 5.467870 +Input = 0.535827 Output = 5.525302 +Input = 0.541121 Output = 5.582517 +Input = 0.546394 Output = 5.639511 +Input = 0.551646 Output = 5.696282 +Input = 0.556876 Output = 5.752829 +Input = 0.562083 Output = 5.809148 +Input = 0.567269 Output = 5.865237 +Input = 0.572432 Output = 5.921095 +Input = 0.577573 Output = 5.976720 +Input = 0.582690 Output = 6.032109 +Input = 0.587785 Output = 6.087260 +Input = 0.592857 Output = 6.142170 +Input = 0.597905 Output = 6.196838 +Input = 0.602930 Output = 6.251261 +Input = 0.607930 Output = 6.305438 +Input = 0.612907 Output = 6.359365 +Input = 0.617860 Output = 6.413041 +Input = 0.622788 Output = 6.466464 +Input = 0.627691 Output = 6.519632 +Input = 0.632570 Output = 6.572543 +Input = 0.637424 Output = 6.625194 +Input = 0.642253 Output = 6.677583 +Input = 0.647056 Output = 6.729708 +Input = 0.651834 Output = 6.781569 +Input = 0.656586 Output = 6.833161 +Input = 0.661312 Output = 6.884483 +Input = 0.666012 Output = 6.935534 +Input = 0.670686 Output = 6.986312 +Input = 0.675333 Output = 7.036813 +Input = 0.679953 Output = 7.087037 +Input = 0.684547 Output = 7.136980 +Input = 0.689114 Output = 7.186642 +Input = 0.693653 Output = 7.236020 +Input = 0.698165 Output = 7.285113 +Input = 0.702650 Output = 7.333918 +Input = 0.707107 Output = 7.382433 +Input = 0.711536 Output = 7.430657 +Input = 0.715936 Output = 7.478588 +Input = 0.720309 Output = 7.526223 +Input = 0.724653 Output = 7.573561 +Input = 0.728969 Output = 7.620601 +Input = 0.733255 Output = 7.667339 +Input = 0.737513 Output = 7.713775 +Input = 0.741742 Output = 7.759906 +Input = 0.745941 Output = 7.805731 +Input = 0.750111 Output = 7.851247 +Input = 0.754251 Output = 7.896454 +Input = 0.758362 Output = 7.941350 +Input = 0.762442 Output = 7.985931 +Input = 0.766493 Output = 8.030197 +Input = 0.770513 Output = 8.074146 +Input = 0.774503 Output = 8.117777 +Input = 0.778462 Output = 8.161087 +Input = 0.782391 Output = 8.204075 +Input = 0.786288 Output = 8.246738 +Input = 0.790155 Output = 8.289078 +Input = 0.793990 Output = 8.331089 +Input = 0.797794 Output = 8.372770 +Input = 0.801567 Output = 8.414122 +Input = 0.805308 Output = 8.455141 +Input = 0.809017 Output = 8.495827 +Input = 0.812694 Output = 8.536177 +Input = 0.816339 Output = 8.576190 +Input = 0.819952 Output = 8.615865 +Input = 0.823533 Output = 8.655200 +Input = 0.827081 Output = 8.694192 +Input = 0.830596 Output = 8.732841 +Input = 0.834078 Output = 8.771147 +Input = 0.837528 Output = 8.809106 +Input = 0.840945 Output = 8.846717 +Input = 0.844328 Output = 8.883979 +Input = 0.847678 Output = 8.920890 +Input = 0.850994 Output = 8.957448 +Input = 0.854277 Output = 8.993653 +Input = 0.857527 Output = 9.029503 +Input = 0.860742 Output = 9.064997 +Input = 0.863923 Output = 9.100132 +Input = 0.867071 Output = 9.134909 +Input = 0.870184 Output = 9.169325 +Input = 0.873262 Output = 9.203378 +Input = 0.876307 Output = 9.237068 +Input = 0.879316 Output = 9.270394 +Input = 0.882291 Output = 9.303354 +Input = 0.885231 Output = 9.335947 +Input = 0.888136 Output = 9.368171 +Input = 0.891007 Output = 9.400025 +Input = 0.893841 Output = 9.431508 +Input = 0.896641 Output = 9.462619 +Input = 0.899405 Output = 9.493356 +Input = 0.902134 Output = 9.523719 +Input = 0.904827 Output = 9.553705 +Input = 0.907484 Output = 9.583314 +Input = 0.910106 Output = 9.612545 +Input = 0.912692 Output = 9.641397 +Input = 0.915241 Output = 9.669867 +Input = 0.917755 Output = 9.697956 +Input = 0.920232 Output = 9.725662 +Input = 0.922673 Output = 9.752985 +Input = 0.925077 Output = 9.779922 +Input = 0.927445 Output = 9.806474 +Input = 0.929776 Output = 9.832638 +Input = 0.932071 Output = 9.858414 +Input = 0.934329 Output = 9.883801 +Input = 0.936550 Output = 9.908796 +Input = 0.938734 Output = 9.933401 +Input = 0.940881 Output = 9.957613 +Input = 0.942991 Output = 9.981433 +Input = 0.945063 Output = 10.004859 +Input = 0.947098 Output = 10.027890 +Input = 0.949096 Output = 10.050525 +Input = 0.951056 Output = 10.072762 +Input = 0.952979 Output = 10.094604 +Input = 0.954865 Output = 10.116046 +Input = 0.956712 Output = 10.137089 +Input = 0.958522 Output = 10.157732 +Input = 0.960294 Output = 10.177973 +Input = 0.962028 Output = 10.197813 +Input = 0.963724 Output = 10.217250 +Input = 0.965382 Output = 10.236283 +Input = 0.967001 Output = 10.254913 +Input = 0.968583 Output = 10.273138 +Input = 0.970127 Output = 10.290957 +Input = 0.971632 Output = 10.308370 +Input = 0.973099 Output = 10.325376 +Input = 0.974527 Output = 10.341973 +Input = 0.975917 Output = 10.358164 +Input = 0.977268 Output = 10.373945 +Input = 0.978581 Output = 10.389318 +Input = 0.979855 Output = 10.404279 +Input = 0.981090 Output = 10.418829 +Input = 0.982287 Output = 10.432968 +Input = 0.983445 Output = 10.446695 +Input = 0.984564 Output = 10.460011 +Input = 0.985645 Output = 10.472913 +Input = 0.986686 Output = 10.485401 +Input = 0.987688 Output = 10.497476 +Input = 0.988652 Output = 10.509136 +Input = 0.989576 Output = 10.520382 +Input = 0.990461 Output = 10.531212 +Input = 0.991308 Output = 10.541626 +Input = 0.992115 Output = 10.551624 +Input = 0.992883 Output = 10.561207 +Input = 0.993611 Output = 10.570372 +Input = 0.994301 Output = 10.579119 +Input = 0.994951 Output = 10.587448 +Input = 0.995562 Output = 10.595360 +Input = 0.996134 Output = 10.602854 +Input = 0.996666 Output = 10.609929 +Input = 0.997159 Output = 10.616586 +Input = 0.997612 Output = 10.622822 +Input = 0.998027 Output = 10.628639 +Input = 0.998402 Output = 10.634037 +Input = 0.998737 Output = 10.639015 +Input = 0.999033 Output = 10.643574 +Input = 0.999289 Output = 10.647712 +Input = 0.999507 Output = 10.651430 +Input = 0.999684 Output = 10.654727 +Input = 0.999822 Output = 10.657603 +Input = 0.999921 Output = 10.660059 +Input = 0.999980 Output = 10.662094 +Input = 1.000000 Output = 10.663709 +Input = 0.999980 Output = 10.664902 +Input = 0.999921 Output = 10.665672 +Input = 0.999822 Output = 10.666023 +Input = 0.999684 Output = 10.665953 +Input = 0.999507 Output = 10.665462 +Input = 0.999289 Output = 10.664549 +Input = 0.999033 Output = 10.663217 +Input = 0.998737 Output = 10.661462 +Input = 0.998402 Output = 10.659286 +Input = 0.998027 Output = 10.656691 +Input = 0.997613 Output = 10.653674 +Input = 0.997159 Output = 10.650236 +Input = 0.996666 Output = 10.646379 +Input = 0.996134 Output = 10.642101 +Input = 0.995562 Output = 10.637403 +Input = 0.994951 Output = 10.632284 +Input = 0.994301 Output = 10.626746 +Input = 0.993611 Output = 10.620789 +Input = 0.992883 Output = 10.614412 +Input = 0.992115 Output = 10.607616 +Input = 0.991308 Output = 10.600403 +Input = 0.990461 Output = 10.592770 +Input = 0.989576 Output = 10.584719 +Input = 0.988652 Output = 10.576250 +Input = 0.987688 Output = 10.567364 +Input = 0.986686 Output = 10.558060 +Input = 0.985645 Output = 10.548338 +Input = 0.984564 Output = 10.538200 +Input = 0.983445 Output = 10.527647 +Input = 0.982287 Output = 10.516679 +Input = 0.981091 Output = 10.505295 +Input = 0.979855 Output = 10.493497 +Input = 0.978581 Output = 10.481284 +Input = 0.977268 Output = 10.468657 +Input = 0.975917 Output = 10.455618 +Input = 0.974527 Output = 10.442165 +Input = 0.973099 Output = 10.428300 +Input = 0.971632 Output = 10.414022 +Input = 0.970127 Output = 10.399335 +Input = 0.968583 Output = 10.384236 +Input = 0.967001 Output = 10.368729 +Input = 0.965382 Output = 10.352811 +Input = 0.963724 Output = 10.336485 +Input = 0.962028 Output = 10.319751 +Input = 0.960294 Output = 10.302608 +Input = 0.958522 Output = 10.285061 +Input = 0.956712 Output = 10.267107 +Input = 0.954865 Output = 10.248747 +Input = 0.952979 Output = 10.229982 +Input = 0.951057 Output = 10.210814 +Input = 0.949096 Output = 10.191242 +Input = 0.947098 Output = 10.171268 +Input = 0.945063 Output = 10.150894 +Input = 0.942991 Output = 10.130117 +Input = 0.940881 Output = 10.108941 +Input = 0.938734 Output = 10.087366 +Input = 0.936550 Output = 10.065392 +Input = 0.934329 Output = 10.043022 +Input = 0.932071 Output = 10.020255 +Input = 0.929777 Output = 9.997092 +Input = 0.927445 Output = 9.973535 +Input = 0.925077 Output = 9.949584 +Input = 0.922673 Output = 9.925241 +Input = 0.920232 Output = 9.900505 +Input = 0.917755 Output = 9.875379 +Input = 0.915241 Output = 9.849862 +Input = 0.912692 Output = 9.823956 +Input = 0.910106 Output = 9.797664 +Input = 0.907484 Output = 9.770984 +Input = 0.904827 Output = 9.743918 +Input = 0.902134 Output = 9.716469 +Input = 0.899405 Output = 9.688634 +Input = 0.896641 Output = 9.660418 +Input = 0.893841 Output = 9.631820 +Input = 0.891007 Output = 9.602841 +Input = 0.888137 Output = 9.573484 +Input = 0.885231 Output = 9.543749 +Input = 0.882291 Output = 9.513637 +Input = 0.879316 Output = 9.483150 +Input = 0.876307 Output = 9.452289 +Input = 0.873263 Output = 9.421054 +Input = 0.870184 Output = 9.389447 +Input = 0.867071 Output = 9.357470 +Input = 0.863923 Output = 9.325122 +Input = 0.860742 Output = 9.292407 +Input = 0.857527 Output = 9.259325 +Input = 0.854277 Output = 9.225878 +Input = 0.850995 Output = 9.192066 +Input = 0.847678 Output = 9.157891 +Input = 0.844328 Output = 9.123354 +Input = 0.840945 Output = 9.088458 +Input = 0.837528 Output = 9.053204 +Input = 0.834078 Output = 9.017591 +Input = 0.830596 Output = 8.981623 +Input = 0.827081 Output = 8.945299 +Input = 0.823533 Output = 8.908623 +Input = 0.819952 Output = 8.871594 +Input = 0.816339 Output = 8.834216 +Input = 0.812694 Output = 8.796489 +Input = 0.809017 Output = 8.758415 +Input = 0.805308 Output = 8.719995 +Input = 0.801567 Output = 8.681231 +Input = 0.797795 Output = 8.642124 +Input = 0.793990 Output = 8.602676 +Input = 0.790155 Output = 8.562889 +Input = 0.786288 Output = 8.522763 +Input = 0.782391 Output = 8.482301 +Input = 0.778462 Output = 8.441503 +Input = 0.774503 Output = 8.400372 +Input = 0.770513 Output = 8.358909 +Input = 0.766493 Output = 8.317118 +Input = 0.762443 Output = 8.274997 +Input = 0.758362 Output = 8.232551 +Input = 0.754251 Output = 8.189779 +Input = 0.750111 Output = 8.146684 +Input = 0.745941 Output = 8.103267 +Input = 0.741742 Output = 8.059530 +Input = 0.737513 Output = 8.015475 +Input = 0.733255 Output = 7.971103 +Input = 0.728969 Output = 7.926416 +Input = 0.724653 Output = 7.881417 +Input = 0.720309 Output = 7.836106 +Input = 0.715937 Output = 7.790486 +Input = 0.711536 Output = 7.744559 +Input = 0.707107 Output = 7.698327 +Input = 0.702650 Output = 7.651790 +Input = 0.698165 Output = 7.604951 +Input = 0.693653 Output = 7.557812 +Input = 0.689114 Output = 7.510375 +Input = 0.684547 Output = 7.462641 +Input = 0.679953 Output = 7.414613 +Input = 0.675333 Output = 7.366292 +Input = 0.670686 Output = 7.317679 +Input = 0.666012 Output = 7.268778 +Input = 0.661312 Output = 7.219590 +Input = 0.656586 Output = 7.170117 +Input = 0.651834 Output = 7.120360 +Input = 0.647056 Output = 7.070323 +Input = 0.642253 Output = 7.020007 +Input = 0.637424 Output = 6.969413 +Input = 0.632570 Output = 6.918545 +Input = 0.627691 Output = 6.867403 +Input = 0.622788 Output = 6.815990 +Input = 0.617860 Output = 6.764309 +Input = 0.612907 Output = 6.712360 +Input = 0.607930 Output = 6.660146 +Input = 0.602930 Output = 6.607668 +Input = 0.597905 Output = 6.554931 +Input = 0.592857 Output = 6.501934 +Input = 0.587785 Output = 6.448681 +Input = 0.582691 Output = 6.395174 +Input = 0.577573 Output = 6.341413 +Input = 0.572432 Output = 6.287403 +Input = 0.567269 Output = 6.233144 +Input = 0.562083 Output = 6.178639 +Input = 0.556876 Output = 6.123890 +Input = 0.551646 Output = 6.068900 +Input = 0.546394 Output = 6.013669 +Input = 0.541121 Output = 5.958201 +Input = 0.535827 Output = 5.902499 +Input = 0.530511 Output = 5.846563 +Input = 0.525175 Output = 5.790396 +Input = 0.519817 Output = 5.734001 +Input = 0.514440 Output = 5.677380 +Input = 0.509042 Output = 5.620534 +Input = 0.503623 Output = 5.563467 +Input = 0.498185 Output = 5.506179 +Input = 0.492727 Output = 5.448675 +Input = 0.487250 Output = 5.390954 +Input = 0.481754 Output = 5.333022 +Input = 0.476238 Output = 5.274879 +Input = 0.470704 Output = 5.216528 +Input = 0.465151 Output = 5.157970 +Input = 0.459580 Output = 5.099209 +Input = 0.453991 Output = 5.040246 +Input = 0.448383 Output = 4.981085 +Input = 0.442758 Output = 4.921728 +Input = 0.437116 Output = 4.862175 +Input = 0.431456 Output = 4.802432 +Input = 0.425779 Output = 4.742498 +Input = 0.420086 Output = 4.682377 +Input = 0.414376 Output = 4.622071 +Input = 0.408649 Output = 4.561583 +Input = 0.402907 Output = 4.500915 +Input = 0.397148 Output = 4.440069 +Input = 0.391374 Output = 4.379047 +Input = 0.385584 Output = 4.317853 +Input = 0.379779 Output = 4.256489 +Input = 0.373959 Output = 4.194956 +Input = 0.368125 Output = 4.133258 +Input = 0.362275 Output = 4.071396 +Input = 0.356412 Output = 4.009374 +Input = 0.350534 Output = 3.947194 +Input = 0.344643 Output = 3.884857 +Input = 0.338738 Output = 3.822368 +Input = 0.332820 Output = 3.759727 +Input = 0.326888 Output = 3.696938 +Input = 0.320944 Output = 3.634003 +Input = 0.314987 Output = 3.570925 +Input = 0.309017 Output = 3.507706 +Input = 0.303035 Output = 3.444348 +Input = 0.297042 Output = 3.380854 +Input = 0.291036 Output = 3.317227 +Input = 0.285019 Output = 3.253469 +Input = 0.278991 Output = 3.189582 +Input = 0.272952 Output = 3.125569 +Input = 0.266902 Output = 3.061433 +Input = 0.260842 Output = 2.997176 +Input = 0.254771 Output = 2.932801 +Input = 0.248690 Output = 2.868310 +Input = 0.242599 Output = 2.803706 +Input = 0.236499 Output = 2.738991 +Input = 0.230390 Output = 2.674168 +Input = 0.224271 Output = 2.609239 +Input = 0.218143 Output = 2.544208 +Input = 0.212007 Output = 2.479075 +Input = 0.205863 Output = 2.413846 +Input = 0.199710 Output = 2.348520 +Input = 0.193550 Output = 2.283103 +Input = 0.187381 Output = 2.217594 +Input = 0.181206 Output = 2.151999 +Input = 0.175023 Output = 2.086318 +Input = 0.168834 Output = 2.020555 +Input = 0.162637 Output = 1.954713 +Input = 0.156435 Output = 1.888793 +Input = 0.150226 Output = 1.822798 +Input = 0.144011 Output = 1.756732 +Input = 0.137790 Output = 1.690596 +Input = 0.131564 Output = 1.624394 +Input = 0.125333 Output = 1.558127 +Input = 0.119097 Output = 1.491799 +Input = 0.112857 Output = 1.425412 +Input = 0.106611 Output = 1.358969 +Input = 0.100362 Output = 1.292472 +Input = 0.094108 Output = 1.225924 +Input = 0.087851 Output = 1.159327 +Input = 0.081591 Output = 1.092685 +Input = 0.075327 Output = 1.026000 +Input = 0.069060 Output = 0.959274 +Input = 0.062791 Output = 0.892510 +Input = 0.056519 Output = 0.825711 +Input = 0.050244 Output = 0.758880 +Input = 0.043968 Output = 0.692019 +Input = 0.037690 Output = 0.625130 +Input = 0.031411 Output = 0.558216 +Input = 0.025130 Output = 0.491281 +Input = 0.018849 Output = 0.424326 +Input = 0.012566 Output = 0.357354 +Input = 0.006283 Output = 0.290369 +Input = 0.000000 Output = 0.223371 +Input = -0.006283 Output = 0.156365 +Input = -0.012566 Output = 0.089353 +Input = -0.018848 Output = 0.022338 +Input = -0.025130 Output = -0.044679 +Input = -0.031411 Output = -0.111694 +Input = -0.037690 Output = -0.178704 +Input = -0.043968 Output = -0.245708 +Input = -0.050244 Output = -0.312701 +Input = -0.056518 Output = -0.379683 +Input = -0.062790 Output = -0.446649 +Input = -0.069060 Output = -0.513598 +Input = -0.075327 Output = -0.580526 +Input = -0.081590 Output = -0.647432 +Input = -0.087851 Output = -0.714312 +Input = -0.094108 Output = -0.781163 +Input = -0.100362 Output = -0.847984 +Input = -0.106611 Output = -0.914772 +Input = -0.112856 Output = -0.981523 +Input = -0.119097 Output = -1.048236 +Input = -0.125333 Output = -1.114907 +Input = -0.131564 Output = -1.181534 +Input = -0.137790 Output = -1.248114 +Input = -0.144011 Output = -1.314646 +Input = -0.150225 Output = -1.381125 +Input = -0.156434 Output = -1.447550 +Input = -0.162637 Output = -1.513917 +Input = -0.168833 Output = -1.580225 +Input = -0.175023 Output = -1.646471 +Input = -0.181206 Output = -1.712651 +Input = -0.187381 Output = -1.778764 +Input = -0.193549 Output = -1.844807 +Input = -0.199710 Output = -1.910777 +Input = -0.205862 Output = -1.976672 +Input = -0.212007 Output = -2.042488 +Input = -0.218143 Output = -2.108224 +Input = -0.224271 Output = -2.173876 +Input = -0.230389 Output = -2.239443 +Input = -0.236499 Output = -2.304921 +Input = -0.242599 Output = -2.370308 +Input = -0.248690 Output = -2.435602 +Input = -0.254771 Output = -2.500800 +Input = -0.260841 Output = -2.565899 +Input = -0.266902 Output = -2.630896 +Input = -0.272952 Output = -2.695790 +Input = -0.278991 Output = -2.760577 +Input = -0.285019 Output = -2.825256 +Input = -0.291036 Output = -2.889822 +Input = -0.297041 Output = -2.954275 +Input = -0.303035 Output = -3.018611 +Input = -0.309017 Output = -3.082828 +Input = -0.314986 Output = -3.146923 +Input = -0.320943 Output = -3.210894 +Input = -0.326888 Output = -3.274738 +Input = -0.332819 Output = -3.338453 +Input = -0.338738 Output = -3.402036 +Input = -0.344643 Output = -3.465485 +Input = -0.350534 Output = -3.528797 +Input = -0.356412 Output = -3.591969 +Input = -0.362275 Output = -3.655000 +Input = -0.368124 Output = -3.717887 +Input = -0.373959 Output = -3.780627 +Input = -0.379779 Output = -3.843217 +Input = -0.385584 Output = -3.905656 +Input = -0.391374 Output = -3.967940 +Input = -0.397148 Output = -4.030068 +Input = -0.402906 Output = -4.092037 +Input = -0.408649 Output = -4.153845 +Input = -0.414375 Output = -4.215488 +Input = -0.420086 Output = -4.276965 +Input = -0.425779 Output = -4.338273 +Input = -0.431456 Output = -4.399410 +Input = -0.437116 Output = -4.460373 +Input = -0.442758 Output = -4.521160 +Input = -0.448383 Output = -4.581768 +Input = -0.453990 Output = -4.642196 +Input = -0.459580 Output = -4.702441 +Input = -0.465151 Output = -4.762499 +Input = -0.470704 Output = -4.822370 +Input = -0.476238 Output = -4.882050 +Input = -0.481754 Output = -4.941538 +Input = -0.487250 Output = -5.000831 +Input = -0.492727 Output = -5.059926 +Input = -0.498185 Output = -5.118821 +Input = -0.503623 Output = -5.177515 +Input = -0.509041 Output = -5.236003 +Input = -0.514439 Output = -5.294286 +Input = -0.519817 Output = -5.352359 +Input = -0.525174 Output = -5.410221 +Input = -0.530511 Output = -5.467869 +Input = -0.535827 Output = -5.525301 +Input = -0.541121 Output = -5.582516 +Input = -0.546394 Output = -5.639509 +Input = -0.551646 Output = -5.696280 +Input = -0.556875 Output = -5.752827 +Input = -0.562083 Output = -5.809146 +Input = -0.567269 Output = -5.865236 +Input = -0.572432 Output = -5.921094 +Input = -0.577573 Output = -5.976719 +Input = -0.582690 Output = -6.032108 +Input = -0.587785 Output = -6.087259 +Input = -0.592857 Output = -6.142169 +Input = -0.597905 Output = -6.196836 +Input = -0.602929 Output = -6.251259 +Input = -0.607930 Output = -6.305436 +Input = -0.612907 Output = -6.359364 +Input = -0.617859 Output = -6.413040 +Input = -0.622788 Output = -6.466463 +Input = -0.627691 Output = -6.519631 +Input = -0.632570 Output = -6.572541 +Input = -0.637424 Output = -6.625192 +Input = -0.642253 Output = -6.677582 +Input = -0.647056 Output = -6.729708 +Input = -0.651834 Output = -6.781568 +Input = -0.656586 Output = -6.833160 +Input = -0.661312 Output = -6.884483 +Input = -0.666012 Output = -6.935534 +Input = -0.670685 Output = -6.986311 +Input = -0.675333 Output = -7.036812 +Input = -0.679953 Output = -7.087035 +Input = -0.684547 Output = -7.136979 +Input = -0.689114 Output = -7.186641 +Input = -0.693653 Output = -7.236019 +Input = -0.698165 Output = -7.285112 +Input = -0.702650 Output = -7.333917 +Input = -0.707107 Output = -7.382433 +Input = -0.711536 Output = -7.430657 +Input = -0.715936 Output = -7.478588 +Input = -0.720309 Output = -7.526223 +Input = -0.724653 Output = -7.573561 +Input = -0.728969 Output = -7.620601 +Input = -0.733255 Output = -7.667338 +Input = -0.737513 Output = -7.713774 +Input = -0.741742 Output = -7.759905 +Input = -0.745941 Output = -7.805730 +Input = -0.750111 Output = -7.851246 +Input = -0.754251 Output = -7.896453 +Input = -0.758362 Output = -7.941349 +Input = -0.762442 Output = -7.985929 +Input = -0.766493 Output = -8.030196 +Input = -0.770513 Output = -8.074145 +Input = -0.774503 Output = -8.117776 +Input = -0.778462 Output = -8.161086 +Input = -0.782391 Output = -8.204074 +Input = -0.786288 Output = -8.246737 +Input = -0.790155 Output = -8.289076 +Input = -0.793990 Output = -8.331087 +Input = -0.797794 Output = -8.372768 +Input = -0.801567 Output = -8.414121 +Input = -0.805308 Output = -8.455141 +Input = -0.809017 Output = -8.495827 +Input = -0.812694 Output = -8.536177 +Input = -0.816339 Output = -8.576190 +Input = -0.819952 Output = -8.615864 +Input = -0.823532 Output = -8.655199 +Input = -0.827080 Output = -8.694193 +Input = -0.830596 Output = -8.732842 +Input = -0.834078 Output = -8.771147 +Input = -0.837528 Output = -8.809105 +Input = -0.840944 Output = -8.846716 +Input = -0.844328 Output = -8.883977 +Input = -0.847678 Output = -8.920888 +Input = -0.850994 Output = -8.957446 +Input = -0.854277 Output = -8.993651 +Input = -0.857527 Output = -9.029502 +Input = -0.860742 Output = -9.064995 +Input = -0.863923 Output = -9.100131 +Input = -0.867071 Output = -9.134908 +Input = -0.870184 Output = -9.169324 +Input = -0.873262 Output = -9.203378 +Input = -0.876307 Output = -9.237068 +Input = -0.879316 Output = -9.270394 +Input = -0.882291 Output = -9.303354 +Input = -0.885231 Output = -9.335946 +Input = -0.888136 Output = -9.368170 +Input = -0.891006 Output = -9.400023 +Input = -0.893841 Output = -9.431506 +Input = -0.896641 Output = -9.462617 +Input = -0.899405 Output = -9.493355 +Input = -0.902134 Output = -9.523718 +Input = -0.904827 Output = -9.553704 +Input = -0.907484 Output = -9.583313 +Input = -0.910106 Output = -9.612544 +Input = -0.912691 Output = -9.641396 +Input = -0.915241 Output = -9.669867 +Input = -0.917755 Output = -9.697955 +Input = -0.920232 Output = -9.725661 +Input = -0.922673 Output = -9.752984 +Input = -0.925077 Output = -9.779921 +Input = -0.927445 Output = -9.806472 +Input = -0.929776 Output = -9.832636 +Input = -0.932071 Output = -9.858412 +Input = -0.934329 Output = -9.883799 +Input = -0.936550 Output = -9.908794 +Input = -0.938734 Output = -9.933400 +Input = -0.940881 Output = -9.957613 +Input = -0.942990 Output = -9.981433 +Input = -0.945063 Output = -10.004859 +Input = -0.947098 Output = -10.027890 +Input = -0.949096 Output = -10.050525 +Input = -0.951056 Output = -10.072762 +Input = -0.952979 Output = -10.094604 +Input = -0.954865 Output = -10.116046 +Input = -0.956712 Output = -10.137089 +Input = -0.958522 Output = -10.157732 +Input = -0.960294 Output = -10.177973 +Input = -0.962028 Output = -10.197812 +Input = -0.963724 Output = -10.217249 +Input = -0.965382 Output = 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a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.mingw b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.mingw new file mode 100644 index 000000000..97fce0a76 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/golden/biquad1.log.mingw @@ -0,0 +1,994 @@ +SystemC Simulation +Input = 0.000000 Output = 0.000000 +Input = 0.006283 Output = 0.000000 +Input = 0.012566 Output = 0.006283 +Input = 0.018848 Output = 0.029845 +Input = 0.025130 Output = 0.071862 +Input = 0.031411 Output = 0.125559 +Input = 0.037690 Output = 0.185706 +Input = 0.043968 Output = 0.249226 +Input = 0.050244 Output = 0.314466 +Input = 0.056519 Output = 0.380567 +Input = 0.062791 Output = 0.447092 +Input = 0.069060 Output = 0.513820 +Input = 0.075327 Output = 0.580638 +Input = 0.081591 Output = 0.647488 +Input = 0.087851 Output = 0.714341 +Input = 0.094108 Output = 0.781179 +Input = 0.100362 Output = 0.847993 +Input = 0.106611 Output = 0.914777 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2.760579 +Input = 0.285019 Output = 2.825257 +Input = 0.291036 Output = 2.889824 +Input = 0.297042 Output = 2.954277 +Input = 0.303035 Output = 3.018613 +Input = 0.309017 Output = 3.082829 +Input = 0.314986 Output = 3.146924 +Input = 0.320944 Output = 3.210896 +Input = 0.326888 Output = 3.274740 +Input = 0.332820 Output = 3.338454 +Input = 0.338738 Output = 3.402038 +Input = 0.344643 Output = 3.465486 +Input = 0.350534 Output = 3.528798 +Input = 0.356412 Output = 3.591971 +Input = 0.362275 Output = 3.655002 +Input = 0.368125 Output = 3.717888 +Input = 0.373959 Output = 3.780628 +Input = 0.379779 Output = 3.843218 +Input = 0.385584 Output = 3.905657 +Input = 0.391374 Output = 3.967942 +Input = 0.397148 Output = 4.030070 +Input = 0.402906 Output = 4.092039 +Input = 0.408649 Output = 4.153846 +Input = 0.414376 Output = 4.215489 +Input = 0.420086 Output = 4.276966 +Input = 0.425779 Output = 4.338274 +Input = 0.431456 Output = 4.399411 +Input = 0.437116 Output = 4.460374 +Input = 0.442758 Output = 4.521162 +Input = 0.448383 Output = 4.581770 +Input = 0.453990 Output = 4.642198 +Input = 0.459580 Output = 4.702442 +Input = 0.465151 Output = 4.762501 +Input = 0.470704 Output = 4.822372 +Input = 0.476238 Output = 4.882052 +Input = 0.481754 Output = 4.941539 +Input = 0.487250 Output = 5.000832 +Input = 0.492727 Output = 5.059927 +Input = 0.498185 Output = 5.118822 +Input = 0.503623 Output = 5.177516 +Input = 0.509041 Output = 5.236005 +Input = 0.514440 Output = 5.294287 +Input = 0.519817 Output = 5.352360 +Input = 0.525175 Output = 5.410222 +Input = 0.530511 Output = 5.467870 +Input = 0.535827 Output = 5.525302 +Input = 0.541121 Output = 5.582517 +Input = 0.546394 Output = 5.639511 +Input = 0.551646 Output = 5.696282 +Input = 0.556876 Output = 5.752829 +Input = 0.562083 Output = 5.809148 +Input = 0.567269 Output = 5.865237 +Input = 0.572432 Output = 5.921095 +Input = 0.577573 Output = 5.976720 +Input = 0.582690 Output = 6.032109 +Input = 0.587785 Output = 6.087260 +Input = 0.592857 Output = 6.142170 +Input = 0.597905 Output = 6.196838 +Input = 0.602930 Output = 6.251261 +Input = 0.607930 Output = 6.305438 +Input = 0.612907 Output = 6.359365 +Input = 0.617860 Output = 6.413041 +Input = 0.622788 Output = 6.466464 +Input = 0.627691 Output = 6.519632 +Input = 0.632570 Output = 6.572543 +Input = 0.637424 Output = 6.625194 +Input = 0.642253 Output = 6.677583 +Input = 0.647056 Output = 6.729708 +Input = 0.651834 Output = 6.781569 +Input = 0.656586 Output = 6.833161 +Input = 0.661312 Output = 6.884483 +Input = 0.666012 Output = 6.935534 +Input = 0.670686 Output = 6.986312 +Input = 0.675333 Output = 7.036813 +Input = 0.679953 Output = 7.087037 +Input = 0.684547 Output = 7.136980 +Input = 0.689114 Output = 7.186642 +Input = 0.693653 Output = 7.236020 +Input = 0.698165 Output = 7.285113 +Input = 0.702650 Output = 7.333918 +Input = 0.707107 Output = 7.382433 +Input = 0.711536 Output = 7.430657 +Input = 0.715936 Output = 7.478588 +Input = 0.720309 Output = 7.526223 +Input = 0.724653 Output = 7.573561 +Input = 0.728969 Output = 7.620601 +Input = 0.733255 Output = 7.667339 +Input = 0.737513 Output = 7.713775 +Input = 0.741742 Output = 7.759906 +Input = 0.745941 Output = 7.805731 +Input = 0.750111 Output = 7.851247 +Input = 0.754251 Output = 7.896454 +Input = 0.758362 Output = 7.941350 +Input = 0.762442 Output = 7.985931 +Input = 0.766493 Output = 8.030197 +Input = 0.770513 Output = 8.074146 +Input = 0.774503 Output = 8.117777 +Input = 0.778462 Output = 8.161087 +Input = 0.782391 Output = 8.204075 +Input = 0.786288 Output = 8.246738 +Input = 0.790155 Output = 8.289078 +Input = 0.793990 Output = 8.331089 +Input = 0.797794 Output = 8.372770 +Input = 0.801567 Output = 8.414122 +Input = 0.805308 Output = 8.455141 +Input = 0.809017 Output = 8.495827 +Input = 0.812694 Output = 8.536177 +Input = 0.816339 Output = 8.576190 +Input = 0.819952 Output = 8.615865 +Input = 0.823533 Output = 8.655200 +Input = 0.827081 Output = 8.694192 +Input = 0.830596 Output = 8.732841 +Input = 0.834078 Output = 8.771147 +Input = 0.837528 Output = 8.809106 +Input = 0.840945 Output = 8.846717 +Input = 0.844328 Output = 8.883979 +Input = 0.847678 Output = 8.920890 +Input = 0.850994 Output = 8.957448 +Input = 0.854277 Output = 8.993653 +Input = 0.857527 Output = 9.029503 +Input = 0.860742 Output = 9.064997 +Input = 0.863923 Output = 9.100132 +Input = 0.867071 Output = 9.134909 +Input = 0.870184 Output = 9.169325 +Input = 0.873262 Output = 9.203378 +Input = 0.876307 Output = 9.237068 +Input = 0.879316 Output = 9.270394 +Input = 0.882291 Output = 9.303354 +Input = 0.885231 Output = 9.335947 +Input = 0.888136 Output = 9.368171 +Input = 0.891007 Output = 9.400025 +Input = 0.893841 Output = 9.431508 +Input = 0.896641 Output = 9.462619 +Input = 0.899405 Output = 9.493356 +Input = 0.902134 Output = 9.523719 +Input = 0.904827 Output = 9.553705 +Input = 0.907484 Output = 9.583314 +Input = 0.910106 Output = 9.612545 +Input = 0.912692 Output = 9.641397 +Input = 0.915241 Output = 9.669867 +Input = 0.917755 Output = 9.697956 +Input = 0.920232 Output = 9.725662 +Input = 0.922673 Output = 9.752985 +Input = 0.925077 Output = 9.779922 +Input = 0.927445 Output = 9.806474 +Input = 0.929776 Output = 9.832638 +Input = 0.932071 Output = 9.858414 +Input = 0.934329 Output = 9.883801 +Input = 0.936550 Output = 9.908796 +Input = 0.938734 Output = 9.933401 +Input = 0.940881 Output = 9.957613 +Input = 0.942991 Output = 9.981433 +Input = 0.945063 Output = 10.004859 +Input = 0.947098 Output = 10.027890 +Input = 0.949096 Output = 10.050525 +Input = 0.951056 Output = 10.072762 +Input = 0.952979 Output = 10.094604 +Input = 0.954865 Output = 10.116046 +Input = 0.956712 Output = 10.137089 +Input = 0.958522 Output = 10.157732 +Input = 0.960294 Output = 10.177973 +Input = 0.962028 Output = 10.197813 +Input = 0.963724 Output = 10.217250 +Input = 0.965382 Output = 10.236283 +Input = 0.967001 Output = 10.254913 +Input = 0.968583 Output = 10.273138 +Input = 0.970127 Output = 10.290957 +Input = 0.971632 Output = 10.308370 +Input = 0.973099 Output = 10.325376 +Input = 0.974527 Output = 10.341973 +Input = 0.975917 Output = 10.358164 +Input = 0.977268 Output = 10.373945 +Input = 0.978581 Output = 10.389318 +Input = 0.979855 Output = 10.404279 +Input = 0.981090 Output = 10.418829 +Input = 0.982287 Output = 10.432968 +Input = 0.983445 Output = 10.446695 +Input = 0.984564 Output = 10.460011 +Input = 0.985645 Output = 10.472913 +Input = 0.986686 Output = 10.485401 +Input = 0.987688 Output = 10.497476 +Input = 0.988652 Output = 10.509136 +Input = 0.989576 Output = 10.520382 +Input = 0.990461 Output = 10.531212 +Input = 0.991308 Output = 10.541626 +Input = 0.992115 Output = 10.551624 +Input = 0.992883 Output = 10.561207 +Input = 0.993611 Output = 10.570372 +Input = 0.994301 Output = 10.579119 +Input = 0.994951 Output = 10.587448 +Input = 0.995562 Output = 10.595360 +Input = 0.996134 Output = 10.602854 +Input = 0.996666 Output = 10.609929 +Input = 0.997159 Output = 10.616586 +Input = 0.997612 Output = 10.622822 +Input = 0.998027 Output = 10.628639 +Input = 0.998402 Output = 10.634037 +Input = 0.998737 Output = 10.639015 +Input = 0.999033 Output = 10.643574 +Input = 0.999289 Output = 10.647712 +Input = 0.999507 Output = 10.651430 +Input = 0.999684 Output = 10.654727 +Input = 0.999822 Output = 10.657603 +Input = 0.999921 Output = 10.660059 +Input = 0.999980 Output = 10.662094 +Input = 1.000000 Output = 10.663709 +Input = 0.999980 Output = 10.664902 +Input = 0.999921 Output = 10.665672 +Input = 0.999822 Output = 10.666023 +Input = 0.999684 Output = 10.665953 +Input = 0.999507 Output = 10.665462 +Input = 0.999289 Output = 10.664549 +Input = 0.999033 Output = 10.663217 +Input = 0.998737 Output = 10.661462 +Input = 0.998402 Output = 10.659286 +Input = 0.998027 Output = 10.656691 +Input = 0.997613 Output = 10.653674 +Input = 0.997159 Output = 10.650236 +Input = 0.996666 Output = 10.646379 +Input = 0.996134 Output = 10.642101 +Input = 0.995562 Output = 10.637403 +Input = 0.994951 Output = 10.632284 +Input = 0.994301 Output = 10.626746 +Input = 0.993611 Output = 10.620789 +Input = 0.992883 Output = 10.614412 +Input = 0.992115 Output = 10.607616 +Input = 0.991308 Output = 10.600403 +Input = 0.990461 Output = 10.592770 +Input = 0.989576 Output = 10.584719 +Input = 0.988652 Output = 10.576250 +Input = 0.987688 Output = 10.567364 +Input = 0.986686 Output = 10.558060 +Input = 0.985645 Output = 10.548338 +Input = 0.984564 Output = 10.538200 +Input = 0.983445 Output = 10.527647 +Input = 0.982287 Output = 10.516679 +Input = 0.981091 Output = 10.505295 +Input = 0.979855 Output = 10.493497 +Input = 0.978581 Output = 10.481284 +Input = 0.977268 Output = 10.468657 +Input = 0.975917 Output = 10.455618 +Input = 0.974527 Output = 10.442165 +Input = 0.973099 Output = 10.428300 +Input = 0.971632 Output = 10.414022 +Input = 0.970127 Output = 10.399335 +Input = 0.968583 Output = 10.384236 +Input = 0.967001 Output = 10.368729 +Input = 0.965382 Output = 10.352811 +Input = 0.963724 Output = 10.336485 +Input = 0.962028 Output = 10.319751 +Input = 0.960294 Output = 10.302608 +Input = 0.958522 Output = 10.285061 +Input = 0.956712 Output = 10.267107 +Input = 0.954865 Output = 10.248747 +Input = 0.952979 Output = 10.229982 +Input = 0.951057 Output = 10.210814 +Input = 0.949096 Output = 10.191242 +Input = 0.947098 Output = 10.171268 +Input = 0.945063 Output = 10.150894 +Input = 0.942991 Output = 10.130117 +Input = 0.940881 Output = 10.108941 +Input = 0.938734 Output = 10.087366 +Input = 0.936550 Output = 10.065392 +Input = 0.934329 Output = 10.043022 +Input = 0.932071 Output = 10.020255 +Input = 0.929777 Output = 9.997092 +Input = 0.927445 Output = 9.973535 +Input = 0.925077 Output = 9.949584 +Input = 0.922673 Output = 9.925241 +Input = 0.920232 Output = 9.900505 +Input = 0.917755 Output = 9.875379 +Input = 0.915241 Output = 9.849862 +Input = 0.912692 Output = 9.823956 +Input = 0.910106 Output = 9.797664 +Input = 0.907484 Output = 9.770984 +Input = 0.904827 Output = 9.743918 +Input = 0.902134 Output = 9.716469 +Input = 0.899405 Output = 9.688634 +Input = 0.896641 Output = 9.660418 +Input = 0.893841 Output = 9.631820 +Input = 0.891007 Output = 9.602841 +Input = 0.888137 Output = 9.573484 +Input = 0.885231 Output = 9.543749 +Input = 0.882291 Output = 9.513637 +Input = 0.879316 Output = 9.483150 +Input = 0.876307 Output = 9.452289 +Input = 0.873263 Output = 9.421054 +Input = 0.870184 Output = 9.389447 +Input = 0.867071 Output = 9.357470 +Input = 0.863923 Output = 9.325122 +Input = 0.860742 Output = 9.292407 +Input = 0.857527 Output = 9.259325 +Input = 0.854277 Output = 9.225878 +Input = 0.850995 Output = 9.192066 +Input = 0.847678 Output = 9.157891 +Input = 0.844328 Output = 9.123354 +Input = 0.840945 Output = 9.088458 +Input = 0.837528 Output = 9.053204 +Input = 0.834078 Output = 9.017591 +Input = 0.830596 Output = 8.981623 +Input = 0.827081 Output = 8.945299 +Input = 0.823533 Output = 8.908623 +Input = 0.819952 Output = 8.871594 +Input = 0.816339 Output = 8.834216 +Input = 0.812694 Output = 8.796489 +Input = 0.809017 Output = 8.758415 +Input = 0.805308 Output = 8.719995 +Input = 0.801567 Output = 8.681231 +Input = 0.797795 Output = 8.642124 +Input = 0.793990 Output = 8.602676 +Input = 0.790155 Output = 8.562889 +Input = 0.786288 Output = 8.522763 +Input = 0.782391 Output = 8.482301 +Input = 0.778462 Output = 8.441503 +Input = 0.774503 Output = 8.400372 +Input = 0.770513 Output = 8.358909 +Input = 0.766493 Output = 8.317118 +Input = 0.762443 Output = 8.274997 +Input = 0.758362 Output = 8.232551 +Input = 0.754251 Output = 8.189779 +Input = 0.750111 Output = 8.146684 +Input = 0.745941 Output = 8.103267 +Input = 0.741742 Output = 8.059530 +Input = 0.737513 Output = 8.015475 +Input = 0.733255 Output = 7.971103 +Input = 0.728969 Output = 7.926416 +Input = 0.724653 Output = 7.881417 +Input = 0.720309 Output = 7.836106 +Input = 0.715937 Output = 7.790486 +Input = 0.711536 Output = 7.744559 +Input = 0.707107 Output = 7.698327 +Input = 0.702650 Output = 7.651790 +Input = 0.698165 Output = 7.604951 +Input = 0.693653 Output = 7.557812 +Input = 0.689114 Output = 7.510375 +Input = 0.684547 Output = 7.462641 +Input = 0.679953 Output = 7.414613 +Input = 0.675333 Output = 7.366292 +Input = 0.670686 Output = 7.317679 +Input = 0.666012 Output = 7.268778 +Input = 0.661312 Output = 7.219590 +Input = 0.656586 Output = 7.170117 +Input = 0.651834 Output = 7.120360 +Input = 0.647056 Output = 7.070323 +Input = 0.642253 Output = 7.020007 +Input = 0.637424 Output = 6.969413 +Input = 0.632570 Output = 6.918545 +Input = 0.627691 Output = 6.867403 +Input = 0.622788 Output = 6.815990 +Input = 0.617860 Output = 6.764309 +Input = 0.612907 Output = 6.712360 +Input = 0.607930 Output = 6.660146 +Input = 0.602930 Output = 6.607668 +Input = 0.597905 Output = 6.554931 +Input = 0.592857 Output = 6.501934 +Input = 0.587785 Output = 6.448681 +Input = 0.582691 Output = 6.395174 +Input = 0.577573 Output = 6.341413 +Input = 0.572432 Output = 6.287403 +Input = 0.567269 Output = 6.233144 +Input = 0.562083 Output = 6.178639 +Input = 0.556876 Output = 6.123890 +Input = 0.551646 Output = 6.068900 +Input = 0.546394 Output = 6.013669 +Input = 0.541121 Output = 5.958201 +Input = 0.535827 Output = 5.902499 +Input = 0.530511 Output = 5.846563 +Input = 0.525175 Output = 5.790396 +Input = 0.519817 Output = 5.734001 +Input = 0.514440 Output = 5.677380 +Input = 0.509042 Output = 5.620534 +Input = 0.503623 Output = 5.563467 +Input = 0.498185 Output = 5.506179 +Input = 0.492727 Output = 5.448675 +Input = 0.487250 Output = 5.390954 +Input = 0.481754 Output = 5.333022 +Input = 0.476238 Output = 5.274879 +Input = 0.470704 Output = 5.216528 +Input = 0.465151 Output = 5.157970 +Input = 0.459580 Output = 5.099209 +Input = 0.453991 Output = 5.040246 +Input = 0.448383 Output = 4.981085 +Input = 0.442758 Output = 4.921728 +Input = 0.437116 Output = 4.862175 +Input = 0.431456 Output = 4.802432 +Input = 0.425779 Output = 4.742498 +Input = 0.420086 Output = 4.682377 +Input = 0.414376 Output = 4.622071 +Input = 0.408649 Output = 4.561583 +Input = 0.402907 Output = 4.500915 +Input = 0.397148 Output = 4.440069 +Input = 0.391374 Output = 4.379047 +Input = 0.385584 Output = 4.317853 +Input = 0.379779 Output = 4.256489 +Input = 0.373959 Output = 4.194956 +Input = 0.368125 Output = 4.133258 +Input = 0.362275 Output = 4.071396 +Input = 0.356412 Output = 4.009374 +Input = 0.350534 Output = 3.947194 +Input = 0.344643 Output = 3.884857 +Input = 0.338738 Output = 3.822368 +Input = 0.332820 Output = 3.759727 +Input = 0.326888 Output = 3.696938 +Input = 0.320944 Output = 3.634003 +Input = 0.314987 Output = 3.570925 +Input = 0.309017 Output = 3.507706 +Input = 0.303035 Output = 3.444348 +Input = 0.297042 Output = 3.380854 +Input = 0.291036 Output = 3.317227 +Input = 0.285019 Output = 3.253469 +Input = 0.278991 Output = 3.189582 +Input = 0.272952 Output = 3.125569 +Input = 0.266902 Output = 3.061433 +Input = 0.260842 Output = 2.997176 +Input = 0.254771 Output = 2.932801 +Input = 0.248690 Output = 2.868310 +Input = 0.242599 Output = 2.803706 +Input = 0.236499 Output = 2.738991 +Input = 0.230390 Output = 2.674168 +Input = 0.224271 Output = 2.609239 +Input = 0.218143 Output = 2.544208 +Input = 0.212007 Output = 2.479075 +Input = 0.205863 Output = 2.413846 +Input = 0.199710 Output = 2.348520 +Input = 0.193550 Output = 2.283103 +Input = 0.187381 Output = 2.217594 +Input = 0.181206 Output = 2.151999 +Input = 0.175023 Output = 2.086318 +Input = 0.168834 Output = 2.020555 +Input = 0.162637 Output = 1.954713 +Input = 0.156435 Output = 1.888793 +Input = 0.150226 Output = 1.822798 +Input = 0.144011 Output = 1.756732 +Input = 0.137790 Output = 1.690596 +Input = 0.131564 Output = 1.624394 +Input = 0.125333 Output = 1.558127 +Input = 0.119097 Output = 1.491799 +Input = 0.112857 Output = 1.425412 +Input = 0.106611 Output = 1.358969 +Input = 0.100362 Output = 1.292472 +Input = 0.094108 Output = 1.225924 +Input = 0.087851 Output = 1.159327 +Input = 0.081591 Output = 1.092685 +Input = 0.075327 Output = 1.026000 +Input = 0.069060 Output = 0.959274 +Input = 0.062791 Output = 0.892510 +Input = 0.056519 Output = 0.825711 +Input = 0.050244 Output = 0.758880 +Input = 0.043968 Output = 0.692019 +Input = 0.037690 Output = 0.625130 +Input = 0.031411 Output = 0.558216 +Input = 0.025130 Output = 0.491281 +Input = 0.018849 Output = 0.424326 +Input = 0.012566 Output = 0.357354 +Input = 0.006283 Output = 0.290369 +Input = 0.000000 Output = 0.223371 +Input = -0.006283 Output = 0.156365 +Input = -0.012566 Output = 0.089353 +Input = -0.018848 Output = 0.022338 +Input = -0.025130 Output = -0.044679 +Input = -0.031411 Output = -0.111694 +Input = -0.037690 Output = -0.178704 +Input = -0.043968 Output = -0.245708 +Input = -0.050244 Output = -0.312701 +Input = -0.056518 Output = -0.379683 +Input = -0.062790 Output = -0.446649 +Input = -0.069060 Output = -0.513598 +Input = -0.075327 Output = -0.580526 +Input = -0.081590 Output = -0.647432 +Input = -0.087851 Output = -0.714312 +Input = -0.094108 Output = -0.781163 +Input = -0.100362 Output = -0.847984 +Input = -0.106611 Output = -0.914772 +Input = -0.112856 Output = -0.981523 +Input = -0.119097 Output = -1.048236 +Input = -0.125333 Output = -1.114907 +Input = -0.131564 Output = -1.181534 +Input = -0.137790 Output = -1.248114 +Input = -0.144011 Output = -1.314646 +Input = -0.150225 Output = -1.381125 +Input = -0.156434 Output = -1.447550 +Input = -0.162637 Output = -1.513917 +Input = -0.168833 Output = -1.580225 +Input = -0.175023 Output = -1.646471 +Input = -0.181206 Output = -1.712651 +Input = -0.187381 Output = -1.778764 +Input = -0.193549 Output = -1.844807 +Input = -0.199710 Output = -1.910777 +Input = -0.205862 Output = -1.976672 +Input = -0.212007 Output = -2.042488 +Input = -0.218143 Output = -2.108224 +Input = -0.224271 Output = -2.173876 +Input = -0.230389 Output = -2.239443 +Input = -0.236499 Output = -2.304921 +Input = -0.242599 Output = -2.370308 +Input = -0.248690 Output = -2.435602 +Input = -0.254771 Output = -2.500800 +Input = -0.260841 Output = -2.565899 +Input = -0.266902 Output = -2.630896 +Input = -0.272952 Output = -2.695790 +Input = -0.278991 Output = -2.760577 +Input = -0.285019 Output = -2.825256 +Input = -0.291036 Output = -2.889822 +Input = -0.297041 Output = -2.954275 +Input = -0.303035 Output = -3.018611 +Input = -0.309017 Output = -3.082828 +Input = -0.314986 Output = -3.146923 +Input = -0.320943 Output = -3.210894 +Input = -0.326888 Output = -3.274738 +Input = -0.332819 Output = -3.338453 +Input = -0.338738 Output = -3.402036 +Input = -0.344643 Output = -3.465485 +Input = -0.350534 Output = -3.528797 +Input = -0.356412 Output = -3.591969 +Input = -0.362275 Output = -3.655000 +Input = -0.368124 Output = -3.717887 +Input = -0.373959 Output = -3.780627 +Input = -0.379779 Output = -3.843217 +Input = -0.385584 Output = -3.905656 +Input = -0.391374 Output = -3.967940 +Input = -0.397148 Output = -4.030068 +Input = -0.402906 Output = -4.092037 +Input = -0.408649 Output = -4.153845 +Input = -0.414375 Output = -4.215488 +Input = -0.420086 Output = -4.276965 +Input = -0.425779 Output = -4.338273 +Input = -0.431456 Output = -4.399410 +Input = -0.437116 Output = -4.460373 +Input = -0.442758 Output = -4.521160 +Input = -0.448383 Output = -4.581768 +Input = -0.453990 Output = -4.642196 +Input = -0.459580 Output = -4.702441 +Input = -0.465151 Output = -4.762499 +Input = -0.470704 Output = -4.822370 +Input = -0.476238 Output = -4.882050 +Input = -0.481754 Output = -4.941538 +Input = -0.487250 Output = -5.000831 +Input = -0.492727 Output = -5.059926 +Input = -0.498185 Output = -5.118821 +Input = -0.503623 Output = -5.177515 +Input = -0.509041 Output = -5.236003 +Input = -0.514439 Output = -5.294286 +Input = -0.519817 Output = -5.352359 +Input = -0.525174 Output = -5.410221 +Input = -0.530511 Output = -5.467869 +Input = -0.535827 Output = -5.525301 +Input = -0.541121 Output = -5.582516 +Input = -0.546394 Output = -5.639509 +Input = -0.551646 Output = -5.696280 +Input = -0.556875 Output = -5.752827 +Input = -0.562083 Output = -5.809146 +Input = -0.567269 Output = -5.865236 +Input = -0.572432 Output = -5.921094 +Input = -0.577573 Output = -5.976719 +Input = -0.582690 Output = -6.032108 +Input = -0.587785 Output = -6.087259 +Input = -0.592857 Output = -6.142169 +Input = -0.597905 Output = -6.196836 +Input = -0.602929 Output = -6.251259 +Input = -0.607930 Output = -6.305436 +Input = -0.612907 Output = -6.359364 +Input = -0.617859 Output = -6.413040 +Input = -0.622788 Output = -6.466463 +Input = -0.627691 Output = -6.519631 +Input = -0.632570 Output = -6.572541 +Input = -0.637424 Output = -6.625192 +Input = -0.642253 Output = -6.677582 +Input = -0.647056 Output = -6.729708 +Input = -0.651834 Output = -6.781568 +Input = -0.656586 Output = -6.833160 +Input = -0.661312 Output = -6.884483 +Input = -0.666012 Output = -6.935534 +Input = -0.670685 Output = -6.986311 +Input = -0.675333 Output = -7.036812 +Input = -0.679953 Output = -7.087035 +Input = -0.684547 Output = -7.136979 +Input = -0.689114 Output = -7.186641 +Input = -0.693653 Output = -7.236019 +Input = -0.698165 Output = -7.285112 +Input = -0.702650 Output = -7.333917 +Input = -0.707107 Output = -7.382433 +Input = -0.711536 Output = -7.430657 +Input = -0.715936 Output = -7.478588 +Input = -0.720309 Output = -7.526223 +Input = -0.724653 Output = -7.573561 +Input = -0.728969 Output = -7.620601 +Input = -0.733255 Output = -7.667338 +Input = -0.737513 Output = -7.713774 +Input = -0.741742 Output = -7.759905 +Input = -0.745941 Output = -7.805730 +Input = -0.750111 Output = -7.851246 +Input = -0.754251 Output = -7.896453 +Input = -0.758362 Output = -7.941349 +Input = -0.762442 Output = -7.985929 +Input = -0.766493 Output = -8.030196 +Input = -0.770513 Output = -8.074145 +Input = -0.774503 Output = -8.117776 +Input = -0.778462 Output = -8.161086 +Input = -0.782391 Output = -8.204074 +Input = -0.786288 Output = -8.246737 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Output = 5.525302 +Input = 0.541121 Output = 5.582517 +Input = 0.546394 Output = 5.639511 +Input = 0.551646 Output = 5.696282 +Input = 0.556876 Output = 5.752829 +Input = 0.562083 Output = 5.809148 +Input = 0.567269 Output = 5.865237 +Input = 0.572432 Output = 5.921095 +Input = 0.577573 Output = 5.976720 +Input = 0.582690 Output = 6.032109 +Input = 0.587785 Output = 6.087260 +Input = 0.592857 Output = 6.142170 +Input = 0.597905 Output = 6.196838 +Input = 0.602930 Output = 6.251261 +Input = 0.607930 Output = 6.305438 +Input = 0.612907 Output = 6.359365 +Input = 0.617860 Output = 6.413041 +Input = 0.622788 Output = 6.466464 +Input = 0.627691 Output = 6.519632 +Input = 0.632570 Output = 6.572543 +Input = 0.637424 Output = 6.625194 +Input = 0.642253 Output = 6.677583 +Input = 0.647056 Output = 6.729708 +Input = 0.651834 Output = 6.781569 +Input = 0.656586 Output = 6.833161 +Input = 0.661312 Output = 6.884483 +Input = 0.666012 Output = 6.935534 +Input = 0.670686 Output = 6.986312 +Input = 0.675333 Output = 7.036813 +Input = 0.679953 Output = 7.087037 +Input = 0.684547 Output = 7.136980 +Input = 0.689114 Output = 7.186642 +Input = 0.693653 Output = 7.236020 +Input = 0.698165 Output = 7.285113 +Input = 0.702650 Output = 7.333918 +Input = 0.707107 Output = 7.382433 +Input = 0.711536 Output = 7.430657 +Input = 0.715936 Output = 7.478588 +Input = 0.720309 Output = 7.526223 +Input = 0.724653 Output = 7.573561 +Input = 0.728969 Output = 7.620601 +Input = 0.733255 Output = 7.667339 +Input = 0.737513 Output = 7.713775 +Input = 0.741742 Output = 7.759906 +Input = 0.745941 Output = 7.805731 +Input = 0.750111 Output = 7.851247 +Input = 0.754251 Output = 7.896454 +Input = 0.758362 Output = 7.941350 +Input = 0.762442 Output = 7.985931 +Input = 0.766493 Output = 8.030197 +Input = 0.770513 Output = 8.074146 +Input = 0.774503 Output = 8.117777 +Input = 0.778462 Output = 8.161087 +Input = 0.782391 Output = 8.204075 +Input = 0.786288 Output = 8.246738 +Input = 0.790155 Output = 8.289078 +Input = 0.793990 Output = 8.331089 +Input = 0.797794 Output = 8.372770 +Input = 0.801567 Output = 8.414122 +Input = 0.805308 Output = 8.455141 +Input = 0.809017 Output = 8.495827 +Input = 0.812694 Output = 8.536177 +Input = 0.816339 Output = 8.576190 +Input = 0.819952 Output = 8.615865 +Input = 0.823533 Output = 8.655200 +Input = 0.827081 Output = 8.694192 +Input = 0.830596 Output = 8.732841 +Input = 0.834078 Output = 8.771147 +Input = 0.837528 Output = 8.809106 +Input = 0.840945 Output = 8.846717 +Input = 0.844328 Output = 8.883979 +Input = 0.847678 Output = 8.920890 +Input = 0.850994 Output = 8.957448 +Input = 0.854277 Output = 8.993653 +Input = 0.857527 Output = 9.029503 +Input = 0.860742 Output = 9.064997 +Input = 0.863923 Output = 9.100132 +Input = 0.867071 Output = 9.134909 +Input = 0.870184 Output = 9.169325 +Input = 0.873262 Output = 9.203378 +Input = 0.876307 Output = 9.237068 +Input = 0.879316 Output = 9.270394 +Input = 0.882291 Output = 9.303354 +Input = 0.885231 Output = 9.335947 +Input = 0.888136 Output = 9.368171 +Input = 0.891007 Output = 9.400025 +Input = 0.893841 Output = 9.431508 +Input = 0.896641 Output = 9.462619 +Input = 0.899405 Output = 9.493356 +Input = 0.902134 Output = 9.523719 +Input = 0.904827 Output = 9.553705 +Input = 0.907484 Output = 9.583314 +Input = 0.910106 Output = 9.612545 +Input = 0.912692 Output = 9.641397 +Input = 0.915241 Output = 9.669867 +Input = 0.917755 Output = 9.697956 +Input = 0.920232 Output = 9.725662 +Input = 0.922673 Output = 9.752985 +Input = 0.925077 Output = 9.779922 +Input = 0.927445 Output = 9.806474 +Input = 0.929776 Output = 9.832638 +Input = 0.932071 Output = 9.858414 +Input = 0.934329 Output = 9.883801 +Input = 0.936550 Output = 9.908796 +Input = 0.938734 Output = 9.933401 +Input = 0.940881 Output = 9.957613 +Input = 0.942991 Output = 9.981433 +Input = 0.945063 Output = 10.004859 +Input = 0.947098 Output = 10.027890 +Input = 0.949096 Output = 10.050525 +Input = 0.951056 Output = 10.072762 +Input = 0.952979 Output = 10.094604 +Input = 0.954865 Output = 10.116046 +Input = 0.956712 Output = 10.137089 +Input = 0.958522 Output = 10.157732 +Input = 0.960294 Output = 10.177973 +Input = 0.962028 Output = 10.197813 +Input = 0.963724 Output = 10.217250 +Input = 0.965382 Output = 10.236283 +Input = 0.967001 Output = 10.254913 +Input = 0.968583 Output = 10.273138 +Input = 0.970127 Output = 10.290957 +Input = 0.971632 Output = 10.308370 +Input = 0.973099 Output = 10.325376 +Input = 0.974527 Output = 10.341973 +Input = 0.975917 Output = 10.358164 +Input = 0.977268 Output = 10.373945 +Input = 0.978581 Output = 10.389318 +Input = 0.979855 Output = 10.404279 +Input = 0.981090 Output = 10.418829 +Input = 0.982287 Output = 10.432968 +Input = 0.983445 Output = 10.446695 +Input = 0.984564 Output = 10.460011 +Input = 0.985645 Output = 10.472913 +Input = 0.986686 Output = 10.485401 +Input = 0.987688 Output = 10.497476 +Input = 0.988652 Output = 10.509136 +Input = 0.989576 Output = 10.520382 +Input = 0.990461 Output = 10.531212 +Input = 0.991308 Output = 10.541626 +Input = 0.992115 Output = 10.551624 +Input = 0.992883 Output = 10.561207 +Input = 0.993611 Output = 10.570372 +Input = 0.994301 Output = 10.579119 +Input = 0.994951 Output = 10.587448 +Input = 0.995562 Output = 10.595360 +Input = 0.996134 Output = 10.602854 +Input = 0.996666 Output = 10.609929 +Input = 0.997159 Output = 10.616586 +Input = 0.997612 Output = 10.622822 +Input = 0.998027 Output = 10.628639 +Input = 0.998402 Output = 10.634037 +Input = 0.998737 Output = 10.639015 +Input = 0.999033 Output = 10.643574 +Input = 0.999289 Output = 10.647712 +Input = 0.999507 Output = 10.651430 +Input = 0.999684 Output = 10.654727 +Input = 0.999822 Output = 10.657603 +Input = 0.999921 Output = 10.660059 +Input = 0.999980 Output = 10.662094 +Input = 1.000000 Output = 10.663709 +Input = 0.999980 Output = 10.664902 +Input = 0.999921 Output = 10.665672 +Input = 0.999822 Output = 10.666023 +Input = 0.999684 Output = 10.665953 +Input = 0.999507 Output = 10.665462 +Input = 0.999289 Output = 10.664549 +Input = 0.999033 Output = 10.663217 +Input = 0.998737 Output = 10.661462 +Input = 0.998402 Output = 10.659286 +Input = 0.998027 Output = 10.656691 +Input = 0.997613 Output = 10.653674 +Input = 0.997159 Output = 10.650236 +Input = 0.996666 Output = 10.646379 +Input = 0.996134 Output = 10.642101 +Input = 0.995562 Output = 10.637403 +Input = 0.994951 Output = 10.632284 +Input = 0.994301 Output = 10.626746 +Input = 0.993611 Output = 10.620789 +Input = 0.992883 Output = 10.614412 +Input = 0.992115 Output = 10.607616 +Input = 0.991308 Output = 10.600403 +Input = 0.990461 Output = 10.592770 +Input = 0.989576 Output = 10.584719 +Input = 0.988652 Output = 10.576250 +Input = 0.987688 Output = 10.567364 +Input = 0.986686 Output = 10.558060 +Input = 0.985645 Output = 10.548338 +Input = 0.984564 Output = 10.538200 +Input = 0.983445 Output = 10.527647 +Input = 0.982287 Output = 10.516679 +Input = 0.981091 Output = 10.505295 +Input = 0.979855 Output = 10.493497 +Input = 0.978581 Output = 10.481284 +Input = 0.977268 Output = 10.468657 +Input = 0.975917 Output = 10.455618 +Input = 0.974527 Output = 10.442165 +Input = 0.973099 Output = 10.428300 +Input = 0.971632 Output = 10.414022 +Input = 0.970127 Output = 10.399335 +Input = 0.968583 Output = 10.384236 +Input = 0.967001 Output = 10.368729 +Input = 0.965382 Output = 10.352811 +Input = 0.963724 Output = 10.336485 +Input = 0.962028 Output = 10.319751 +Input = 0.960294 Output = 10.302608 +Input = 0.958522 Output = 10.285061 +Input = 0.956712 Output = 10.267107 +Input = 0.954865 Output = 10.248747 +Input = 0.952979 Output = 10.229982 +Input = 0.951057 Output = 10.210814 +Input = 0.949096 Output = 10.191242 +Input = 0.947098 Output = 10.171268 +Input = 0.945063 Output = 10.150894 +Input = 0.942991 Output = 10.130117 +Input = 0.940881 Output = 10.108941 +Input = 0.938734 Output = 10.087366 +Input = 0.936550 Output = 10.065392 +Input = 0.934329 Output = 10.043022 +Input = 0.932071 Output = 10.020255 +Input = 0.929777 Output = 9.997092 +Input = 0.927445 Output = 9.973535 +Input = 0.925077 Output = 9.949584 +Input = 0.922673 Output = 9.925241 +Input = 0.920232 Output = 9.900505 +Input = 0.917755 Output = 9.875379 +Input = 0.915241 Output = 9.849862 +Input = 0.912692 Output = 9.823956 +Input = 0.910106 Output = 9.797664 +Input = 0.907484 Output = 9.770984 +Input = 0.904827 Output = 9.743918 +Input = 0.902134 Output = 9.716469 +Input = 0.899405 Output = 9.688634 +Input = 0.896641 Output = 9.660418 +Input = 0.893841 Output = 9.631820 +Input = 0.891007 Output = 9.602841 +Input = 0.888137 Output = 9.573484 +Input = 0.885231 Output = 9.543749 +Input = 0.882291 Output = 9.513637 +Input = 0.879316 Output = 9.483150 +Input = 0.876307 Output = 9.452289 +Input = 0.873263 Output = 9.421054 +Input = 0.870184 Output = 9.389447 +Input = 0.867071 Output = 9.357470 +Input = 0.863923 Output = 9.325122 +Input = 0.860742 Output = 9.292407 +Input = 0.857527 Output = 9.259325 +Input = 0.854277 Output = 9.225878 +Input = 0.850995 Output = 9.192066 +Input = 0.847678 Output = 9.157891 +Input = 0.844328 Output = 9.123354 +Input = 0.840945 Output = 9.088458 +Input = 0.837528 Output = 9.053204 +Input = 0.834078 Output = 9.017591 +Input = 0.830596 Output = 8.981623 +Input = 0.827081 Output = 8.945299 +Input = 0.823533 Output = 8.908623 +Input = 0.819952 Output = 8.871594 +Input = 0.816339 Output = 8.834216 +Input = 0.812694 Output = 8.796489 +Input = 0.809017 Output = 8.758415 +Input = 0.805308 Output = 8.719995 +Input = 0.801567 Output = 8.681231 +Input = 0.797795 Output = 8.642124 +Input = 0.793990 Output = 8.602676 +Input = 0.790155 Output = 8.562889 +Input = 0.786288 Output = 8.522763 +Input = 0.782391 Output = 8.482301 +Input = 0.778462 Output = 8.441503 +Input = 0.774503 Output = 8.400372 +Input = 0.770513 Output = 8.358909 +Input = 0.766493 Output = 8.317118 +Input = 0.762443 Output = 8.274997 +Input = 0.758362 Output = 8.232551 +Input = 0.754251 Output = 8.189779 +Input = 0.750111 Output = 8.146684 +Input = 0.745941 Output = 8.103267 +Input = 0.741742 Output = 8.059530 +Input = 0.737513 Output = 8.015475 +Input = 0.733255 Output = 7.971103 +Input = 0.728969 Output = 7.926416 +Input = 0.724653 Output = 7.881417 +Input = 0.720309 Output = 7.836106 +Input = 0.715937 Output = 7.790486 +Input = 0.711536 Output = 7.744559 +Input = 0.707107 Output = 7.698327 +Input = 0.702650 Output = 7.651790 +Input = 0.698165 Output = 7.604951 +Input = 0.693653 Output = 7.557812 +Input = 0.689114 Output = 7.510375 +Input = 0.684547 Output = 7.462641 +Input = 0.679953 Output = 7.414613 +Input = 0.675333 Output = 7.366292 +Input = 0.670686 Output = 7.317679 +Input = 0.666012 Output = 7.268778 +Input = 0.661312 Output = 7.219590 +Input = 0.656586 Output = 7.170117 +Input = 0.651834 Output = 7.120360 +Input = 0.647056 Output = 7.070323 +Input = 0.642253 Output = 7.020007 +Input = 0.637424 Output = 6.969413 +Input = 0.632570 Output = 6.918545 +Input = 0.627691 Output = 6.867403 +Input = 0.622788 Output = 6.815990 +Input = 0.617860 Output = 6.764309 +Input = 0.612907 Output = 6.712360 +Input = 0.607930 Output = 6.660146 +Input = 0.602930 Output = 6.607668 +Input = 0.597905 Output = 6.554931 +Input = 0.592857 Output = 6.501934 +Input = 0.587785 Output = 6.448681 +Input = 0.582691 Output = 6.395174 +Input = 0.577573 Output = 6.341413 +Input = 0.572432 Output = 6.287403 +Input = 0.567269 Output = 6.233144 +Input = 0.562083 Output = 6.178639 +Input = 0.556876 Output = 6.123890 +Input = 0.551646 Output = 6.068900 +Input = 0.546394 Output = 6.013669 +Input = 0.541121 Output = 5.958201 +Input = 0.535827 Output = 5.902499 +Input = 0.530511 Output = 5.846563 +Input = 0.525175 Output = 5.790396 +Input = 0.519817 Output = 5.734001 +Input = 0.514440 Output = 5.677380 +Input = 0.509042 Output = 5.620534 +Input = 0.503623 Output = 5.563467 +Input = 0.498185 Output = 5.506179 +Input = 0.492727 Output = 5.448675 +Input = 0.487250 Output = 5.390954 +Input = 0.481754 Output = 5.333022 +Input = 0.476238 Output = 5.274879 +Input = 0.470704 Output = 5.216528 +Input = 0.465151 Output = 5.157970 +Input = 0.459580 Output = 5.099209 +Input = 0.453991 Output = 5.040246 +Input = 0.448383 Output = 4.981085 +Input = 0.442758 Output = 4.921728 +Input = 0.437116 Output = 4.862175 +Input = 0.431456 Output = 4.802432 +Input = 0.425779 Output = 4.742498 +Input = 0.420086 Output = 4.682377 +Input = 0.414376 Output = 4.622071 +Input = 0.408649 Output = 4.561583 +Input = 0.402907 Output = 4.500915 +Input = 0.397148 Output = 4.440069 +Input = 0.391374 Output = 4.379047 +Input = 0.385584 Output = 4.317853 +Input = 0.379779 Output = 4.256489 +Input = 0.373959 Output = 4.194956 +Input = 0.368125 Output = 4.133258 +Input = 0.362275 Output = 4.071396 +Input = 0.356412 Output = 4.009374 +Input = 0.350534 Output = 3.947194 +Input = 0.344643 Output = 3.884857 +Input = 0.338738 Output = 3.822368 +Input = 0.332820 Output = 3.759727 +Input = 0.326888 Output = 3.696938 +Input = 0.320944 Output = 3.634003 +Input = 0.314987 Output = 3.570925 +Input = 0.309017 Output = 3.507706 +Input = 0.303035 Output = 3.444348 +Input = 0.297042 Output = 3.380854 +Input = 0.291036 Output = 3.317227 +Input = 0.285019 Output = 3.253469 +Input = 0.278991 Output = 3.189582 +Input = 0.272952 Output = 3.125569 +Input = 0.266902 Output = 3.061433 +Input = 0.260842 Output = 2.997176 +Input = 0.254771 Output = 2.932801 +Input = 0.248690 Output = 2.868310 +Input = 0.242599 Output = 2.803706 +Input = 0.236499 Output = 2.738991 +Input = 0.230390 Output = 2.674168 +Input = 0.224271 Output = 2.609239 +Input = 0.218143 Output = 2.544208 +Input = 0.212007 Output = 2.479075 +Input = 0.205863 Output = 2.413846 +Input = 0.199710 Output = 2.348520 +Input = 0.193550 Output = 2.283103 +Input = 0.187381 Output = 2.217594 +Input = 0.181206 Output = 2.151999 +Input = 0.175023 Output = 2.086318 +Input = 0.168834 Output = 2.020555 +Input = 0.162637 Output = 1.954713 +Input = 0.156435 Output = 1.888793 +Input = 0.150226 Output = 1.822798 +Input = 0.144011 Output = 1.756732 +Input = 0.137790 Output = 1.690596 +Input = 0.131564 Output = 1.624394 +Input = 0.125333 Output = 1.558127 +Input = 0.119097 Output = 1.491799 +Input = 0.112857 Output = 1.425412 +Input = 0.106611 Output = 1.358969 +Input = 0.100362 Output = 1.292472 +Input = 0.094108 Output = 1.225924 +Input = 0.087851 Output = 1.159327 +Input = 0.081591 Output = 1.092685 +Input = 0.075327 Output = 1.026000 +Input = 0.069060 Output = 0.959274 +Input = 0.062791 Output = 0.892510 +Input = 0.056519 Output = 0.825711 +Input = 0.050244 Output = 0.758880 +Input = 0.043968 Output = 0.692019 +Input = 0.037690 Output = 0.625130 +Input = 0.031411 Output = 0.558216 +Input = 0.025130 Output = 0.491281 +Input = 0.018849 Output = 0.424326 +Input = 0.012566 Output = 0.357354 +Input = 0.006283 Output = 0.290369 +Input = 0.000000 Output = 0.223371 +Input = -0.006283 Output = 0.156365 +Input = -0.012566 Output = 0.089353 +Input = -0.018848 Output = 0.022338 +Input = -0.025130 Output = -0.044679 +Input = -0.031411 Output = -0.111694 +Input = -0.037690 Output = -0.178704 +Input = -0.043968 Output = -0.245708 +Input = -0.050244 Output = -0.312701 +Input = -0.056518 Output = -0.379683 +Input = -0.062790 Output = -0.446649 +Input = -0.069060 Output = -0.513598 +Input = -0.075327 Output = -0.580526 +Input = -0.081590 Output = -0.647432 +Input = -0.087851 Output = -0.714312 +Input = -0.094108 Output = -0.781163 +Input = -0.100362 Output = -0.847984 +Input = -0.106611 Output = -0.914772 +Input = -0.112856 Output = -0.981523 +Input = -0.119097 Output = -1.048236 +Input = -0.125333 Output = -1.114907 +Input = -0.131564 Output = -1.181534 +Input = -0.137790 Output = -1.248114 +Input = -0.144011 Output = -1.314646 +Input = -0.150225 Output = -1.381125 +Input = -0.156434 Output = -1.447550 +Input = -0.162637 Output = -1.513917 +Input = -0.168833 Output = -1.580225 +Input = -0.175023 Output = -1.646471 +Input = -0.181206 Output = -1.712651 +Input = -0.187381 Output = -1.778764 +Input = -0.193549 Output = -1.844807 +Input = -0.199710 Output = -1.910777 +Input = -0.205862 Output = -1.976672 +Input = -0.212007 Output = -2.042488 +Input = -0.218143 Output = -2.108224 +Input = -0.224271 Output = -2.173876 +Input = -0.230389 Output = -2.239443 +Input = -0.236499 Output = -2.304921 +Input = -0.242599 Output = -2.370308 +Input = -0.248690 Output = -2.435602 +Input = -0.254771 Output = -2.500800 +Input = -0.260841 Output = -2.565899 +Input = -0.266902 Output = -2.630896 +Input = -0.272952 Output = -2.695790 +Input = -0.278991 Output = -2.760577 +Input = -0.285019 Output = -2.825256 +Input = -0.291036 Output = -2.889822 +Input = -0.297041 Output = -2.954275 +Input = -0.303035 Output = -3.018611 +Input = -0.309017 Output = -3.082828 +Input = -0.314986 Output = -3.146923 +Input = -0.320943 Output = -3.210894 +Input = -0.326888 Output = -3.274738 +Input = -0.332819 Output = -3.338453 +Input = -0.338738 Output = -3.402036 +Input = -0.344643 Output = -3.465485 +Input = -0.350534 Output = -3.528797 +Input = -0.356412 Output = -3.591969 +Input = -0.362275 Output = -3.655000 +Input = -0.368124 Output = -3.717887 +Input = -0.373959 Output = -3.780627 +Input = -0.379779 Output = -3.843217 +Input = -0.385584 Output = -3.905656 +Input = -0.391374 Output = -3.967940 +Input = -0.397148 Output = -4.030068 +Input = -0.402906 Output = -4.092037 +Input = -0.408649 Output = -4.153845 +Input = -0.414375 Output = -4.215488 +Input = -0.420086 Output = -4.276965 +Input = -0.425779 Output = -4.338273 +Input = -0.431456 Output = -4.399410 +Input = -0.437116 Output = -4.460373 +Input = -0.442758 Output = -4.521160 +Input = -0.448383 Output = -4.581768 +Input = -0.453990 Output = -4.642196 +Input = -0.459580 Output = -4.702441 +Input = -0.465151 Output = -4.762499 +Input = -0.470704 Output = -4.822370 +Input = -0.476238 Output = -4.882050 +Input = -0.481754 Output = -4.941538 +Input = -0.487250 Output = -5.000831 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b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/main.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main routine for biquad simulation */ + +#include "testbench.h" +#include "biquad.h" + +float signal_freq; + +int +sc_main(int ac, char *av[]) +{ + sc_signal sample; + sc_signal result; + sc_signal reset; + + sample = 0.0; + result = 0.0; + reset = false; + + sc_clock clk("Clock", CLOCK_PERIOD, SC_NS); + + biquad filter("BFILTER", clk, sample, reset, result); + testbench TB("TB", clk, result, reset, sample); + + int n = 10000; + signal_freq = 100000; + for (int i = 1; i < ac; i++) { + if (av[i][0] == '-') { + signal_freq = atof(av[i+1]); i++; + continue; + } + n = atoi(av[i]); + } + + sc_start(n, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/testbench.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/testbench.cpp new file mode 100644 index 000000000..ee80a29ad --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/testbench.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.cc */ +/* This is the implementation file for synchronous process `testbench' */ + +#include "testbench.h" + +float gen_sample(float t); + +extern float signal_freq; + +void testbench::entry() +{ + float sample_val; + float result_val; + float time; + + FILE *data1 = fopen("Sample", "w"); + FILE *data2 = fopen("Result", "w"); + + reset.write(true); + wait(5); + reset.write(false); + wait(); + + time = 0.0; + while (true) { + sample_val = gen_sample(time); + sample.write(sample_val); + wait(); + result_val = result.read(); + fprintf(data1, "%f\t%f\n", time, sample_val); + fprintf(data2, "%f\t%f\n", time, result_val); + char buf[BUFSIZ]; + sprintf( buf, "Input = %f\tOutput = %f", sample_val, result_val ); + cout << buf << endl; + time += 1.0; + } +} // end of entry function + + +float +gen_step(float t) +{ + if (t < 10.0) + return (0.0); + else + return (1.0); +} + +float +gen_impulse(float t) +{ + if (t == 20.00) + return (1.00); + else + return (0.00); +} + +float +gen_sine(float t, float freq) // freq in Hertz +{ + return sin(6.283185 * freq * t * CLOCK_PERIOD * 1e-9); +} + +// This function actually generates the samples +float +gen_sample(float t) +{ + // return (gen_step(t)); + // return (gen_impulse(t)); + return (gen_sine(t, signal_freq)); +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/testbench.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/testbench.h new file mode 100644 index 000000000..cdb7f0e5e --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/testbench.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.h */ +/* This is the interface file for synchronous process `testbench' */ + +#include "systemc.h" + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + sc_in result; + sc_out reset; + sc_out sample; + + // Constructor + testbench( sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESULT, + sc_signal& RESET, + sc_signal& SAMPLE ) + { + clk(CLK); + result(RESULT); + reset(RESET); + sample(SAMPLE); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + +#define CLOCK_PERIOD 10 diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/biquad.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/biquad.cpp new file mode 100644 index 000000000..7664893a5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/biquad.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + biquad.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename biquad.cc */ +/* This is the implementation file for synchronous process `biquad' */ + +#include "biquad.h" + +void biquad::entry() +{ + float Acc; // Accumulator + float sample; // Input sample + + if ((bool) reset == true) { + Del[0] = Del[1] = Del[2] = Del[3] = 0.0; + out.write(0.0); + wait(); + } + + while (true) { + sample = in.read(); + Acc = Cte[0] * sample; + for (int i = 0; i < 4; i++) { + Acc += Cte[i+1] * Del[i]; + } + Acc = Acc / 1024.0; + Del[1] = Del[0]; Del[0] = sample; + Del[3] = Del[2]; Del[2] = Acc; + out.write(Acc); + wait(); + } + +} // end of entry function diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/biquad.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/biquad.h new file mode 100644 index 000000000..dd25ed436 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/biquad.h @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + biquad.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename biquad.h */ +/* This is the interface file for synchronous process `biquad' */ + +#include "systemc.h" + +SC_MODULE( biquad ) +{ + SC_HAS_PROCESS( biquad ); + + sc_in_clk clk; + + sc_in in; + sc_in reset; + sc_out out; + + int num_taps; //internal variable + float Del[4]; //internal variable + float Cte[5]; //internal variable + + // Constructor + biquad( sc_module_name NAME, + sc_clock& CLK, + sc_signal& IN1, + sc_signal& RESET, + sc_signal& OUT1 ) + { + clk(CLK); + in(IN1); reset(RESET); out(OUT1); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + // initialize the coefficient matrix + Cte[0] = 1.0; + Cte[1] = 2.0; + Cte[2] = 1.0; + Cte[3] = 0.75; + Cte[4] = -0.125; + Del[0] = Del[1] = Del[2] = Del[3] = 0.0; + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/biquad2.f b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/biquad2.f new file mode 100644 index 000000000..3afa2d3b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/biquad2.f @@ -0,0 +1,6 @@ +biquad2/biquad.cpp +biquad2/delay_line.cpp +biquad2/getres.cpp +biquad2/main.cpp +biquad2/op_queue.cpp +biquad2/testbench.cpp diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/delay_line.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/delay_line.cpp new file mode 100644 index 000000000..8a5d03a82 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/delay_line.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + delay_line.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename delay_line.cc */ +/* This is the implementation file for synchronous process `delay_line' */ + +#include "delay_line.h" + +void delay_line::entry() +{ + for( int i = 0; i < delay; ++ i ) { + line[i] = 0; + } + while (true) { + out.write(line[delay-1]); + for (int i = delay - 1; i > 0; i--) + line[i] = line[i-1]; + line[0] = in.read(); + wait(); + } +} // end of entry function diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/delay_line.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/delay_line.h new file mode 100644 index 000000000..931a3a526 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/delay_line.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + delay_line.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename delay_line.h */ +/* This is the interface file for synchronous process `delay_line' */ + +#include "systemc.h" + +SC_MODULE( delay_line ) +{ + SC_HAS_PROCESS( delay_line ); + + sc_in_clk clk; + + sc_in in; + sc_out out; + + const int delay; //internal variable + float *line; // delay line + + // Constructor + delay_line( sc_module_name NAME, + sc_clock& CLK, + sc_signal& IN1, + sc_signal& OUT1, + int DELAY=4 ) : delay(DELAY) + { + clk(CLK); + in(IN1); out(OUT1); + SC_CTHREAD( entry, clk.pos() ); + line = new float[delay]; + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/getres.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/getres.cpp new file mode 100644 index 000000000..2b54423e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/getres.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + getres.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename getres.cc */ +/* This is the implementation file for synchronous process `getres' */ + +#include "getres.h" + +void getres::entry() +{ + while (true) { + pop.write(true); + wait(); + char buf[BUFSIZ]; + sprintf( buf, "Result = %f", result.read() ); + cout << buf << endl; + } +} // end of entry function diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/getres.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/getres.h new file mode 100644 index 000000000..d3ba7279b --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/getres.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + getres.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename getres.h */ +/* This is the interface file for synchronous process `getres' */ + +#include "systemc.h" + +SC_MODULE( getres ) +{ + SC_HAS_PROCESS( getres ); + + sc_in_clk clk; + + sc_in result; + sc_out pop; + + // Constructor + getres( sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESULT, + sc_signal& POP ) + { + clk(CLK); + result(RESULT); + pop(POP); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/golden/biquad2.log b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/golden/biquad2.log new file mode 100644 index 000000000..e7ab8cd52 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/golden/biquad2.log @@ -0,0 +1,100 @@ +SystemC Simulation +Result = 0.000000 +Result = 0.000000 +Result = 0.000000 +Result = 0.000000 +Result = 0.000000 +Result = 0.000000 +Input = 0.000000 Output = 0.000000 Result = 0.000000 +Input = 0.062791 Output = 0.000000 Result = 0.000000 +Input = 0.125333 Output = 0.000061 Result = 0.000000 +Input = 0.187381 Output = 0.000245 Result = 0.000000 +Input = 0.248690 Output = 0.000489 Result = 0.000000 +Input = 0.309017 Output = 0.000732 Result = 0.000000 +Input = 0.368125 Output = 0.000971 Result = 0.000000 +Input = 0.425779 Output = 0.001207 Result = 0.000000 +Input = 0.481754 Output = 0.001437 Result = 0.000000 +Input = 0.535827 Output = 0.001662 Result = 0.000061 +Input = 0.587785 Output = 0.001881 Result = 0.000245 +Input = 0.637424 Output = 0.002092 Result = 0.000489 +Input = 0.684547 Output = 0.002295 Result = 0.000732 +Input = 0.728969 Output = 0.002489 Result = 0.000971 +Input = 0.770513 Output = 0.002673 Result = 0.001207 +Input = 0.809017 Output = 0.002846 Result = 0.001437 +Input = 0.844328 Output = 0.003009 Result = 0.001662 +Input = 0.876307 Output = 0.003159 Result = 0.001881 +Input = 0.904827 Output = 0.003297 Result = 0.002092 +Input = 0.929776 Output = 0.003422 Result = 0.002295 +Input = 0.951056 Output = 0.003533 Result = 0.002489 +Input = 0.968583 Output = 0.003631 Result = 0.002673 +Input = 0.982287 Output = 0.003714 Result = 0.002846 +Input = 0.992115 Output = 0.003782 Result = 0.003009 +Input = 0.998027 Output = 0.003836 Result = 0.003159 +Input = 1.000000 Output = 0.003874 Result = 0.003297 +Input = 0.998027 Output = 0.003897 Result = 0.003422 +Input = 0.992115 Output = 0.003905 Result = 0.003533 +Input = 0.982287 Output = 0.003897 Result = 0.003631 +Input = 0.968583 Output = 0.003874 Result = 0.003714 +Input = 0.951057 Output = 0.003836 Result = 0.003782 +Input = 0.929777 Output = 0.003782 Result = 0.003836 +Input = 0.904827 Output = 0.003714 Result = 0.003874 +Input = 0.876307 Output = 0.003631 Result = 0.003897 +Input = 0.844328 Output = 0.003533 Result = 0.003905 +Input = 0.809017 Output = 0.003422 Result = 0.003897 +Input = 0.770513 Output = 0.003297 Result = 0.003874 +Input = 0.728969 Output = 0.003159 Result = 0.003836 +Input = 0.684547 Output = 0.003009 Result = 0.003782 +Input = 0.637424 Output = 0.002847 Result = 0.003714 +Input = 0.587785 Output = 0.002673 Result = 0.003631 +Input = 0.535827 Output = 0.002489 Result = 0.003533 +Input = 0.481754 Output = 0.002295 Result = 0.003422 +Input = 0.425779 Output = 0.002092 Result = 0.003297 +Input = 0.368125 Output = 0.001881 Result = 0.003159 +Input = 0.309017 Output = 0.001663 Result = 0.003009 +Input = 0.248690 Output = 0.001438 Result = 0.002847 +Input = 0.187381 Output = 0.001207 Result = 0.002673 +Input = 0.125333 Output = 0.000971 Result = 0.002489 +Input = 0.062791 Output = 0.000732 Result = 0.002295 +Input = 0.000000 Output = 0.000490 Result = 0.002092 +Input = -0.062790 Output = 0.000245 Result = 0.001881 +Input = -0.125333 Output = 0.000000 Result = 0.001663 +Input = -0.187381 Output = -0.000245 Result = 0.001438 +Input = -0.248690 Output = -0.000489 Result = 0.001207 +Input = -0.309017 Output = -0.000732 Result = 0.000971 +Input = -0.368124 Output = -0.000971 Result = 0.000732 +Input = -0.425779 Output = -0.001207 Result = 0.000490 +Input = -0.481754 Output = -0.001437 Result = 0.000245 +Input = -0.535827 Output = -0.001662 Result = 0.000000 +Input = -0.587785 Output = -0.001881 Result = -0.000245 +Input = -0.637424 Output = -0.002092 Result = -0.000489 +Input = -0.684547 Output = -0.002295 Result = -0.000732 +Input = -0.728969 Output = -0.002489 Result = -0.000971 +Input = -0.770513 Output = -0.002673 Result = -0.001207 +Input = -0.809017 Output = -0.002846 Result = -0.001437 +Input = -0.844328 Output = -0.003009 Result = -0.001662 +Input = -0.876307 Output = -0.003159 Result = -0.001881 +Input = -0.904827 Output = -0.003297 Result = -0.002092 +Input = -0.929776 Output = -0.003422 Result = -0.002295 +Input = -0.951056 Output = -0.003533 Result = -0.002489 +Input = -0.968583 Output = -0.003631 Result = -0.002673 +Input = -0.982287 Output = -0.003714 Result = -0.002846 +Input = -0.992115 Output = -0.003782 Result = -0.003009 +Input = -0.998027 Output = -0.003836 Result = -0.003159 +Input = -1.000000 Output = -0.003874 Result = -0.003297 +Input = -0.998027 Output = -0.003897 Result = -0.003422 +Input = -0.992115 Output = -0.003905 Result = -0.003533 +Input = -0.982287 Output = -0.003897 Result = -0.003631 +Input = -0.968583 Output = -0.003874 Result = -0.003714 +Input = -0.951057 Output = -0.003836 Result = -0.003782 +Input = -0.929777 Output = -0.003782 Result = -0.003836 +Input = -0.904827 Output = -0.003714 Result = -0.003874 +Input = -0.876307 Output = -0.003631 Result = -0.003897 +Input = -0.844328 Output = -0.003533 Result = -0.003905 +Input = -0.809017 Output = -0.003422 Result = -0.003897 +Input = -0.770513 Output = -0.003297 Result = -0.003874 +Input = -0.728969 Output = -0.003159 Result = -0.003836 +Input = -0.684547 Output = -0.003009 Result = -0.003782 +Input = -0.637424 Output = -0.002847 Result = -0.003714 +Input = -0.587785 Output = -0.002673 Result = -0.003631 +Input = -0.535827 Output = -0.002489 Result = -0.003533 +Input = -0.481754 Output = -0.002295 Result = -0.003422 diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/main.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/main.cpp new file mode 100644 index 000000000..d7924c12b --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main routine for biquad simulation */ + +#include "testbench.h" +#include "biquad.h" +#include "delay_line.h" +#include "op_queue.h" +#include "getres.h" + +int +sc_main(int ac, char *av[]) +{ + sc_signal sample; + sc_signal result; + sc_signal delayed_out; + sc_signal final_out; + sc_signal reset; + sc_signal pop; + + sample = 0.0; + result = 0.0; + delayed_out = 0.0; + final_out = 0.0; + pop = false; + + sc_clock clk("Clock", CLOCK_PERIOD, SC_NS); + + testbench TB("TB", clk, result, reset, sample); + biquad filter("BFILTER", clk, sample, reset, result); + delay_line D("Delay", clk, result, delayed_out); + op_queue OPQ("OPQueue", clk, delayed_out, pop, final_out, 1000); + getres OP("OPStage", clk, final_out, pop); + + int n; + if (ac == 2) + n = atoi(av[1]); + else + n = 10000; + sc_start(n, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/op_queue.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/op_queue.cpp new file mode 100644 index 000000000..082cd93ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/op_queue.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + op_queue.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename op_queue.cc */ +/* This is the implementation file for synchronous process `op_queue' */ + +#include "op_queue.h" + +// Queue management. Assuming a circular queue. + +void op_queue::entry() +{ + bool to_pop; + int tail, head; + bool queue_empty = true; + bool queue_full = false; + + out = 0.0; + + head = 0; + tail = 0; + while (true) { + if (!queue_full) { + queue[tail] = in.read(); + tail = (tail + 1) % queue_size; + queue_empty = false; + if (tail == head) queue_full = true; + } + else { + cout << "Warning: Data is being lost because queue is full" << endl; + } + + to_pop = pop.read(); + if (to_pop) { + if (!queue_empty) { + out.write(queue[head]); + head = (head + 1) % queue_size; + queue_full = false; + if (head == tail) queue_empty = true; + } + else { + cout << "Warning: No data in queue to be popped" << endl; + } + } + + wait(); + } + +} // end of entry function diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/op_queue.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/op_queue.h new file mode 100644 index 000000000..041dd7220 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/op_queue.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + op_queue.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename op_queue.h */ +/* This is the interface file for synchronous process `op_queue' */ + +#include "systemc.h" + +SC_MODULE( op_queue ) +{ + SC_HAS_PROCESS( op_queue ); + + sc_in_clk clk; + + sc_in in; + sc_in pop; + sc_out out; + + const int queue_size; //internal variable + float *queue; //internal variable + + // Constructor + op_queue( sc_module_name NAME, + sc_clock& CLK, + sc_signal& IN1, + sc_signal& POP, + sc_signal& OUT1, + int QUEUE_SIZE = 4 ) + : queue_size(QUEUE_SIZE) + { + clk(CLK); + in(IN1); + pop(POP); + out(OUT1); + SC_CTHREAD( entry, clk.pos() ); + queue = new float[queue_size]; + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/testbench.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/testbench.cpp new file mode 100644 index 000000000..983bada92 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/testbench.cpp @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.cc */ +/* This is the implementation file for synchronous process `testbench' */ + +#include "testbench.h" + +float gen_sample(float t); + +void testbench::entry() +{ + float sample_val; + float result_val; + float time; + + FILE *data1 = fopen("Sample", "w"); + FILE *data2 = fopen("Result", "w"); + + reset.write(true); + wait(5); + reset.write(false); + wait(); + + time = 0.0; + while (true) { + sample_val = gen_sample(time); + sample.write(sample_val); + wait(); + result_val = result.read(); + fprintf(data1, "%f\t%f\n", time, sample_val); + fprintf(data2, "%f\t%f\n", time, result_val); + char buf[BUFSIZ]; + sprintf( buf, "Input = %f\tOutput = %f\t", sample_val, result_val ); + cout << buf << flush; + time += 1.0; + } +} // end of entry function + + +float +gen_step(float t) +{ + if (t < 10.0) + return (0.0); + else + return (1.0); +} + +float +gen_impulse(float t) +{ + if (t == 20.00) + return (1.00); + else + return (0.00); +} + +float +gen_sine(float t, float freq) // freq in Hertz +{ + return sin(6.283185 * freq * t * CLOCK_PERIOD * 1e-9); +} + +// This function actually generates the samples +float +gen_sample(float t) +{ + return (gen_sine(t, 100000)); +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/testbench.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/testbench.h new file mode 100644 index 000000000..121a7552c --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/testbench.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.h */ +/* This is the interface file for synchronous process `testbench' */ + +#include "systemc.h" + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + sc_in result; + sc_out reset; + sc_out sample; + + // Constructor + testbench( sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESULT, + sc_signal& RESET, + sc_signal& SAMPLE ) + { + clk(CLK); + result(RESULT); reset(RESET); sample(SAMPLE); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + +#define CLOCK_PERIOD 100 diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad.cpp new file mode 100644 index 000000000..dd23b001f --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + biquad.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename biquad.cc */ +/* This is the implementation file for synchronous process `biquad' */ + +#include "biquad.h" + +void biquad::entry() +{ + float Acc; // Accumulator + float sample; // Input sample + + if (reset.read() == true) { + Del[0] = Del[1] = Del[2] = Del[3] = 0.0; + out.write(0.0); + } + else { + sample = in.read(); + Acc = Cte[0] * sample; + for (int i = 0; i < 4; i++) { + Acc += Cte[i+1] * Del[i]; + } + Del[1] = Del[0]; Del[0] = sample; + Del[3] = Del[2]; Del[2] = Acc; + out.write(Acc); + } + +} // end of entry function diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad.h new file mode 100644 index 000000000..12358321d --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + biquad.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename biquad.h */ +/* This is the interface file for synchronous process `biquad' */ + +#include "systemc.h" + +SC_MODULE( biquad ) +{ + SC_HAS_PROCESS( biquad ); + + sc_in in; + sc_in reset; + sc_out out; + + int num_taps; //internal variable + float Del[4]; //internal variable + float Cte[5]; //internal variable + + // Constructor + biquad( sc_module_name NAME, + sc_signal& IN1, + sc_signal& RESET, + sc_signal& OUT1 ) + { + in(IN1); reset(RESET); out(OUT1); + + // initialize the coefficient matrix + Cte[0] = 1.0; + Cte[1] = 2.0; + Cte[2] = 1.0; + Cte[3] = 0.75; + Cte[4] = -0.125; + Del[0] = Del[1] = Del[2] = Del[3] = 0.0; + + SC_METHOD( entry ); + sensitive << in << reset; + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad3.f b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad3.f new file mode 100644 index 000000000..050048484 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/biquad3.f @@ -0,0 +1,4 @@ +biquad3/biquad.cpp +biquad3/delay_line.cpp +biquad3/main.cpp +biquad3/testbench.cpp diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/delay_line.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/delay_line.cpp new file mode 100644 index 000000000..7a4eb50db --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/delay_line.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + delay_line.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename delay_line.cc */ +/* This is the implementation file for synchronous process `delay_line' */ + +#include "delay_line.h" + +void delay_line::entry() +{ + out.write(line[delay-1]); + for (int i = delay - 1; i > 0; i--) + line[i] = line[i-1]; + line[0] = in.read(); +} // end of entry function diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/delay_line.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/delay_line.h new file mode 100644 index 000000000..78d423caa --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/delay_line.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + delay_line.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename delay_line.h */ +/* This is the interface file for synchronous process `delay_line' */ + +#include "systemc.h" + +SC_MODULE( delay_line ) +{ + SC_HAS_PROCESS( delay_line ); + + sc_in in; + sc_out out; + + const int delay; //internal variable + float *line; // delay line + + // Constructor + delay_line( sc_module_name NAME, + sc_signal& IN1, + sc_signal& OUT1, + int DELAY=4 ) + : delay(DELAY) + { + in(IN1); + out(OUT1); + line = new float[delay]; + for(int i=0; i sample; + sc_signal result; + sc_signal reset; + sc_signal delayed_out; + + sample = 0.0; + result = 0.0; + reset = false; + delayed_out = 0.0; + + sc_clock clk("Clock", CLOCK_PERIOD, SC_NS); + + biquad filter("BFILTER", sample, reset, result); + testbench TB("TB", clk, delayed_out, reset, sample); + delay_line D("Delay", result, delayed_out, 300); + + int n = 10000; + signal_freq = 100000; + for (int i = 1; i < ac; i++) { + if (av[i][0] == '-') { + signal_freq = atof(av[i+1]); i++; + continue; + } + n = atoi(av[i]); + } + + sc_start(n, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/testbench.cpp b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/testbench.cpp new file mode 100644 index 000000000..ca38eb9a4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/testbench.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.cc */ +/* This is the implementation file for synchronous process `testbench' */ + +#include "testbench.h" + +float gen_sample(float t); + +extern float signal_freq; + +void testbench::entry() +{ + float sample_val; + float result_val; + float time; + + FILE *data1 = fopen("Sample", "w"); + FILE *data2 = fopen("Result", "w"); + + reset.write(true); + wait(); + reset.write(false); + wait(); + + time = 0.0; + while (true) { + sample_val = gen_sample(time); + sample.write(sample_val); + wait(); + result_val = result.read(); + fprintf(data1, "%f\t%f\n", time, sample_val); + fprintf(data2, "%f\t%f\n", time, result_val); + char buf[BUFSIZ]; + sprintf( buf, "Input = %f\tOutput = %f", sample_val, result_val ); + cout << buf << endl; + time += 1.0; + } +} // end of entry function + + +float +gen_step(float t) +{ + if (t < 10.0) + return (0.0); + else + return (1.0); +} + +float +gen_impulse(float t) +{ + if (t == 20.00) + return (1.00); + else + return (0.00); +} + +float +gen_sine(float t, float freq) // freq in Hertz +{ + return sin(6.283185 * freq * t * CLOCK_PERIOD * 1e-9); +} + +// This function actually generates the samples +float +gen_sample(float t) +{ + // return (gen_step(t)); + // return (gen_impulse(t)); + return (gen_sine(t, signal_freq)); +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/testbench.h b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/testbench.h new file mode 100644 index 000000000..74f7e95eb --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/testbench.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.h */ +/* This is the interface file for synchronous process `testbench' */ + +#include "systemc.h" + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + sc_in result; + sc_out reset; + sc_out sample; + + // Constructor + testbench( sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESULT, + sc_signal& RESET, + sc_signal& SAMPLE ) + { + clk(CLK); + result(RESULT); reset(RESET); sample(SAMPLE); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + +#define CLOCK_PERIOD 10 diff --git a/src/systemc/tests/systemc/misc/sim_tests/cgen/cgen.cpp b/src/systemc/tests/systemc/misc/sim_tests/cgen/cgen.cpp new file mode 100644 index 000000000..191358d9d --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cgen/cgen.cpp @@ -0,0 +1,158 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + cgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +/* Filename seqgen.h */ +/* This is the interface file for asynchronous process 'seqgen' */ + +SC_MODULE( seqgen ) +{ + SC_HAS_PROCESS( seqgen ); + + sc_in clock_i; + sc_out data_o; + + // Constructor + seqgen( sc_module_name NAME, + sc_signal& CLOCK_I, + sc_signal& DATA_O ) + { + clock_i(CLOCK_I); + data_o(DATA_O); + SC_THREAD( entry ); + sensitive << clock_i; + } + + // Functionality of process + void entry(); +}; + + +/* Filename seqgen.cc */ +/* This is the implementation file for asynchronous process 'seqgen' */ + +void seqgen::entry() +{ + // Initialization code can go here + int i = 17; + wait(); + + while (true) { // Infinite loop encompassing functionality + if (clock_i.posedge()) { + // Generate output only on positive edge of clock + data_o.write(i); + i = ((i * i) % 1019) - 9; + } + wait(); + } +} + + +// Interface and implementation files for +// Asynchronous block for code generation + +SC_MODULE( codegen ) +{ + SC_HAS_PROCESS( codegen ); + + sc_in data_i; + sc_out code_o; + + int sum, num; + + // Constructor + codegen( sc_module_name NAME, + sc_signal& DATA_I, + sc_signal& CODE_O ) + { + data_i(DATA_I); + code_o(CODE_O); + SC_METHOD( entry ); + sensitive << data_i; + + sum = 0; + num = 0; + } + + // Process functionality + void entry(); +}; + +void codegen::entry() +{ + // Simple code generation routine + sum += data_i.read(); + num++; + code_o.write(sum % num); +} + +void testbench(const sc_signal& data, + const sc_signal& code, + sc_signal& clock) +{ + int i; + + sc_start(0, SC_NS); + for (i=0; i<100; i++) { + sc_start( 10, SC_NS ); + clock.write(1); + sc_start( 10, SC_NS ); + clock.write(0); + char buf[BUFSIZ]; + sprintf( buf, "Data = %4d\tCode = %4d", data.read(), code.read() ); + cout << buf << endl; + } +} + +int +sc_main(int ac, char *av[]) +{ + sc_signal clock("Clock"); + sc_signal data("Data"); + sc_signal code("Code"); + + clock = 0; + data = 0; + code = 0; + + seqgen S("S", clock, data); + codegen C("C", data, code); + + testbench(data, code, clock); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/cgen/golden/cgen.log b/src/systemc/tests/systemc/misc/sim_tests/cgen/golden/cgen.log new file mode 100644 index 000000000..369f798b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cgen/golden/cgen.log @@ -0,0 +1,101 @@ +SystemC Simulation +Data = 17 Code = 1 +Data = 280 Code = 0 +Data = 947 Code = 0 +Data = 80 Code = 4 +Data = 277 Code = 5 +Data = 295 Code = 6 +Data = 401 Code = 1 +Data = 809 Code = 1 +Data = 274 Code = 0 +Data = 680 Code = 1 +Data = 784 Code = 8 +Data = 190 Code = 3 +Data = 426 Code = 0 +Data = 85 Code = 10 +Data = 83 Code = 12 +Data = 766 Code = 2 +Data = 822 Code = 16 +Data = 78 Code = 17 +Data = 980 Code = 14 +Data = 493 Code = 10 +Data = 518 Code = 1 +Data = 318 Code = 12 +Data = 234 Code = 21 +Data = 740 Code = 2 +Data = 388 Code = 19 +Data = 742 Code = 16 +Data = 295 Code = 18 +Data = 401 Code = 20 +Data = 809 Code = 12 +Data = 274 Code = 1 +Data = 680 Code = 22 +Data = 784 Code = 1 +Data = 190 Code = 10 +Data = 426 Code = 26 +Data = 85 Code = 27 +Data = 83 Code = 9 +Data = 766 Code = 8 +Data = 822 Code = 6 +Data = 78 Code = 0 +Data = 980 Code = 12 +Data = 493 Code = 15 +Data = 518 Code = 41 +Data = 318 Code = 41 +Data = 234 Code = 8 +Data = 740 Code = 29 +Data = 388 Code = 15 +Data = 742 Code = 21 +Data = 295 Code = 9 +Data = 401 Code = 9 +Data = 809 Code = 11 +Data = 274 Code = 36 +Data = 680 Code = 51 +Data = 784 Code = 0 +Data = 190 Code = 1 +Data = 426 Code = 24 +Data = 85 Code = 50 +Data = 83 Code = 30 +Data = 766 Code = 56 +Data = 822 Code = 8 +Data = 78 Code = 56 +Data = 980 Code = 28 +Data = 493 Code = 62 +Data = 518 Code = 57 +Data = 318 Code = 45 +Data = 234 Code = 19 +Data = 740 Code = 36 +Data = 388 Code = 33 +Data = 742 Code = 41 +Data = 295 Code = 14 +Data = 401 Code = 26 +Data = 809 Code = 16 +Data = 274 Code = 45 +Data = 680 Code = 42 +Data = 784 Code = 62 +Data = 190 Code = 12 +Data = 426 Code = 50 +Data = 85 Code = 61 +Data = 83 Code = 1 +Data = 766 Code = 72 +Data = 822 Code = 31 +Data = 78 Code = 56 +Data = 980 Code = 80 +Data = 493 Code = 25 +Data = 518 Code = 78 +Data = 318 Code = 17 +Data = 234 Code = 48 +Data = 740 Code = 63 +Data = 388 Code = 76 +Data = 742 Code = 85 +Data = 295 Code = 5 +Data = 401 Code = 33 +Data = 809 Code = 6 +Data = 274 Code = 0 +Data = 680 Code = 24 +Data = 784 Code = 52 +Data = 190 Code = 62 +Data = 426 Code = 20 +Data = 85 Code = 33 +Data = 83 Code = 52 +Data = 766 Code = 55 diff --git a/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/common.h b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/common.h new file mode 100644 index 000000000..1a045ca83 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector8; +typedef sc_signal > signal_bool_vector16; + +#endif diff --git a/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/cycle_dw8051_demo.f b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/cycle_dw8051_demo.f new file mode 100644 index 000000000..23d42bc71 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/cycle_dw8051_demo.f @@ -0,0 +1,3 @@ +cycle_dw8051_demo/cycle_model.cpp +cycle_dw8051_demo/peripheral.cpp +cycle_dw8051_demo/main.cpp diff --git a/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/cycle_model.cpp b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/cycle_model.cpp new file mode 100644 index 000000000..1b77ef1a4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/cycle_model.cpp @@ -0,0 +1,1761 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + cycle_model.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//*************************************************************************** +// FILE: cycle_model.cc +// +// AUTHOR: Luc Semeria September, 21, 1998 +// +// ABSTRACT: cycle-accurate model based on the dw8051 architecture +// +// +// MODIFICATION HISTORY: +// Luc Semeria: 21/9/98 created +// +//*************************************************************************** +// +// DESCRIPTION +// +// During initialization, the model parses the Intel hex file and put the +// program into memory. +// Then the cycle-accurate model does the following operations: +// +// main loop: +// fetch instruction +// decode instruction +// execute instruction /read instr mem +// |\- fetch operand 1 (and 2) < /mem bus access +// | \fetch data < +// | \read data mem +// |\- execute operation +// | /mem bus access +// |\- write back data < +// | \write data mem +// | +// \- compute next address +// +// +// The external instruction and data memories are part of the model +// so these memory accesses are just read and write in internal memory +// The simulation is then speeded up because no bus transactions occurs. +// The model doesn't switch from one process to another. +// +// To communicate with peripheral on the memory bus, the bus can be +// used and the model automatically switches to a real cycle-accurate mode +// for a given number of cycle. This is implemented within the function: +// request_address(int addr); +// +// This cycle-accurate model implements only parts of the dw8051. The +// limitations are the following: +// - some instructions are not supported (cf decode function) +// - SFR, timers, io_interface and interrupts are not supported +// +//*************************************************************************** + +#include "cycle_model.h" +#include + +/* useful macros for sc_aproc */ +#define AT_POSEDGE(CLK) wait(); while(!clk.posedge()) wait(); +#define AT_NEGEDGE(CLK) wait(); while(!clk.negedge()) wait(); + +bool ALL_CYCLES; /* flag to execute all cycles */ + + +//------------------------------------------------------------------------- +// void cycle_model::parse_hex(char *name) +// +// parse Intel HEX file +// more information on hex format on-line at: +// http://www.8052.com/tutintel.htm +// +//------------------------------------------------------------------------ +void cycle_model::parse_hex(char *name) { + char line_buffer[MEM_SIZE]; + FILE *hex_file; + + // open file + hex_file = fopen(name,"r"); + if(hex_file==NULL) { + fprintf(stderr,"Error in opening file %s\n",name); + exit(-1); + } + + // read new line at each loop ------------------------------------------ + while(fgets(line_buffer,MEM_SIZE,hex_file)!=NULL) { +#ifdef DEBUG + printf("Read new line -> %s",line_buffer); +#endif + + // parse line -------------------------------------------------------- + + // parse ':' (line[0]) + if(line_buffer[0]!=':') { + continue; + } + + + // parse length (line[1..2]) + int length; + // char length_string[2]; + char length_string[3]; + if(strncpy(length_string,&(line_buffer[1]),2)==NULL) { + fprintf(stderr,"Error in parsing length\n"); + exit(-1); + } + length_string[2] = 0; + length = (int)strtol(length_string, (char **)NULL, 16); +#ifdef DEBUG + printf("length=%x\n",length); +#endif + + // parse address (line[3..6]) + int address; + // char address_string[4]; + char address_string[5]; + if(strncpy(address_string,&(line_buffer[3]),4)==NULL) { + fprintf(stderr,"Error in parsing address\n"); + exit(-1); + } + address_string[4] = 0; + address = (int)strtol(address_string, (char **)NULL, 16); +#ifdef DEBUG + printf("address=%x\n",address); +#endif + + + // parse Record Type (line[7..8]) + int record_type; + // char record_string[2]; + char record_string[3]; + if(strncpy(record_string,&(line_buffer[7]),2)==NULL) { + fprintf(stderr,"Error in parsing record type\n"); + exit(-1); + } + record_string[2] = 0; + record_type = (int)strtol(record_string, (char **)NULL, 16); +#ifdef DEBUG + printf("record_type=%x\n",record_type); +#endif + if(record_type==01) { + // end of file + // return; +#ifdef DEBUG + printf("end of file => return\n"); +#endif + fclose(hex_file); + return; + } + + // parse data bytes + char instr_string[3]; + for(int i=0;itype = i_nop; + i->n_src = 0; + i->src1.type = o_null; + i->src1.val = -1; + i->src2.type = o_null; + i->src2.val = -1; + i->dst.type = o_null; + i->dst.val = -1; + + switch(opcode) { + // arithmetic operations ----------------------------------------- + case 0x28: + case 0x29: + case 0x2A: + case 0x2B: + case 0x2C: + case 0x2d: + case 0x2e: + case 0x2f: { + // add register to A + i->type = i_add; + i->n_src = 2; + i->src1.type = o_reg; + i->src1.val = opcode&0x07; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x25: { + // add direct byte to A + i->type = i_add; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x26: + case 0x27: { + // add data memory to A + i->type = i_add; + i->n_src = 2; + i->src1.type = o_ind; + i->src1.val = opcode&1; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x24: { + // add immediate to A + i->type = i_add; + i->n_src = 2; + i->src1.type = o_cst; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x98: + case 0x99: + case 0x9A: + case 0x9B: + case 0x9C: + case 0x9d: + case 0x9e: + case 0x9f: { + // sub register to A + i->type = i_sub; + i->n_src = 2; + i->src1.type = o_reg; + i->src1.val = opcode&0x07; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x95: { + // sub direct byte to A + i->type = i_sub; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x96: + case 0x97: { + // sub data memory to A + i->type = i_sub; + i->n_src = 2; + i->src1.type = o_ind; + i->src1.val = opcode&1; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x94: { + // sub immediate to A + i->type = i_sub; + i->n_src = 2; + i->src1.type = o_cst; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x04: { + // increment A + i->type = i_inc; + i->n_src = 1; + i->src1.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x08: + case 0x09: + case 0x0A: + case 0x0B: + case 0x0C: + case 0x0d: + case 0x0e: + case 0x0f: { + // increment register + i->type = i_inc; + i->n_src = 1; + i->src1.type = o_reg; + i->src1.val = opcode&0x07; + i->dst.type = o_reg; + i->dst.val = opcode&0x07; + i->cycle = 1; + break; + } + case 0x05: { + // increment direct byte + i->type = i_inc; + i->n_src = 1; + i->src1.type = o_dir; + i->dst.type = o_dir; + i->cycle = 2; + break; + } + case 0x06: + case 0x07: { + // increment data memory + i->type = i_inc; + i->n_src = 1; + i->src1.type = o_ind; + i->src1.val = opcode&1; + i->dst.type = o_ind; + i->dst.val = opcode&1; + i->cycle = 1; + break; + } + case 0x14: { + // decrement A + i->type = i_dec; + i->n_src = 1; + i->src1.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x18: + case 0x19: + case 0x1A: + case 0x1B: + case 0x1C: + case 0x1d: + case 0x1e: + case 0x1f: { + // decrement register + i->type = i_dec; + i->n_src = 1; + i->src1.type = o_reg; + i->src1.val = opcode&0x07; + i->dst.type = o_reg; + i->dst.val = opcode&0x07; + i->cycle = 1; + break; + } + case 0x15: { + // decrement direct byte + i->type = i_dec; + i->n_src = 1; + i->src1.type = o_dir; + i->dst.type = o_dir; + i->cycle = 2; + break; + } + case 0x16: + case 0x17: { + // increment data memory + i->type = i_dec; + i->n_src = 1; + i->src1.type = o_ind; + i->src1.val = opcode&1; + i->dst.type = o_ind; + i->dst.val = opcode&1; + i->cycle = 1; + break; + } + // logic operation -------------------------------------------------- + case 0x58: + case 0x59: + case 0x5A: + case 0x5B: + case 0x5C: + case 0x5d: + case 0x5e: + case 0x5f: { + // and register to A + i->type = i_and; + i->n_src = 2; + i->src1.type = o_reg; + i->src1.val = opcode&0x07; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x55: { + // and direct byte to A + i->type = i_and; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x56: + case 0x57: { + // and data memory to A + i->type = i_and; + i->n_src = 2; + i->src1.type = o_ind; + i->src1.val = opcode&1; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x54: { + // and immediate to A + i->type = i_and; + i->n_src = 2; + i->src1.type = o_cst; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x52: { + // and A to direct byte + i->type = i_and; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_acc; + i->dst.type = o_dir; + i->cycle = 2; + break; + } + case 0x53: { + // and immdiate to direct byte + i->type = i_and; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_cst; + i->dst.type = o_dir; + i->cycle = 3; + break; + } + case 0x48: + case 0x49: + case 0x4A: + case 0x4B: + case 0x4C: + case 0x4d: + case 0x4e: + case 0x4f: { + // or register to A + i->type = i_or; + i->n_src = 2; + i->src1.type = o_reg; + i->src1.val = opcode&0x07; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x45: { + // or direct byte to A + i->type = i_or; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x46: + case 0x47: { + // or data memory to A + i->type = i_or; + i->n_src = 2; + i->src1.type = o_ind; + i->src1.val = opcode&1; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x44: { + // or immediate to A + i->type = i_or; + i->n_src = 2; + i->src1.type = o_cst; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x42: { + // or A to direct byte + i->type = i_or; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_acc; + i->dst.type = o_dir; + i->cycle = 2; + break; + } + case 0x43: { + // or immediate to direct byte + i->type = i_or; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_cst; + i->dst.type = o_dir; + i->cycle = 3; + break; + } + case 0x68: + case 0x69: + case 0x6A: + case 0x6B: + case 0x6C: + case 0x6d: + case 0x6e: + case 0x6f: { + // xor register to A + i->type = i_xor; + i->n_src = 2; + i->src1.type = o_reg; + i->src1.val = opcode&0x07; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x65: { + // xor direct byte to A + i->type = i_xor; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x66: + case 0x67: { + // xor data memory to A + i->type = i_xor; + i->n_src = 2; + i->src1.type = o_ind; + i->src1.val = opcode&1; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x64: { + // xor immediate to A + i->type = i_xor; + i->n_src = 2; + i->src1.type = o_cst; + i->src2.type = o_acc; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0x62: { + // and A to direct byte + i->type = i_xor; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_acc; + i->dst.type = o_dir; + i->cycle = 2; + break; + } + case 0x63: { + // xor immdiate to direct byte + i->type = i_xor; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_cst; + i->dst.type = o_dir; + i->cycle = 3; + break; + } + case 0xf4: { + // complement A + i->type = i_cpl; + i->n_src = 1; + i->src1.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x23: { + // rotate A left + i->type = i_rl; + i->n_src = 1; + i->src1.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x03: { + // rotate A right + i->type = i_rr; + i->n_src = 1; + i->src1.type = o_acc; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + // data transfer ----------------------------------------------- + case 0xe8: + case 0xe9: + case 0xeA: + case 0xeB: + case 0xeC: + case 0xed: + case 0xee: + case 0xef: { + // move register to A + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_reg; + i->src1.val = opcode&0x07; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0xe5: { + // move direct bit to A + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_dir; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0xe6: + case 0xe7: { + // move data memory to A + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_ind; + i->src1.val = opcode&1; + i->dst.type = o_acc; + i->cycle = 1; + break; + } + case 0x74: { + // move immediate to A + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_cst; + i->dst.type = o_acc; + i->cycle = 2; + break; + } + case 0xf8: + case 0xf9: + case 0xfA: + case 0xfB: + case 0xfC: + case 0xfd: + case 0xfe: + case 0xff: { + // move A to register + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_acc; + i->dst.type = o_reg; + i->dst.val = opcode&0x07; + i->cycle = 1; + break; + } + case 0xa8: + case 0xa9: + case 0xaA: + case 0xaB: + case 0xaC: + case 0xad: + case 0xae: + case 0xaf: { + // move direct to register + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_dir; + i->dst.type = o_reg; + i->dst.val = opcode&0x07; + i->cycle = 2; + break; + } + case 0x78: + case 0x79: + case 0x7A: + case 0x7B: + case 0x7C: + case 0x7d: + case 0x7e: + case 0x7f: { + // move immediate to register + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_cst; + i->dst.type = o_reg; + i->dst.val = opcode&0x07; + i->cycle = 2; + break; + } + case 0xf5: { + // move A to direct byte + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_acc; + i->dst.type = o_dir; + i->cycle = 2; + } + case 0x88: + case 0x89: + case 0x8A: + case 0x8B: + case 0x8C: + case 0x8d: + case 0x8e: + case 0x8f: { + // move register to direct byte + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_reg; + i->src1.val = opcode&0x07; + i->dst.type = o_dir; + i->cycle = 2; + break; + } + case 0x85: { + // move direct byte to direct byte + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_dir; + i->dst.type = o_dir; + i->cycle = 3; + break; + } + case 0x86: + case 0x87: { + // move data memory to direct byte + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_ind; + i->src1.val = opcode&0x01; + i->dst.type = o_dir; + i->cycle = 2; + break; + } + case 0x75: { + // move immediate to direct byte + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_cst; + i->dst.type = o_dir; + i->cycle = 2; + break; + } + case 0xf6: + case 0xf7: { + // move A to data memory + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_acc; + i->dst.type = o_ind; + i->dst.val = opcode&1; + i->cycle = 1; + break; + } + case 0xa6: + case 0xa7: { + // move direct byte to data memory + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_dir; + i->dst.type = o_ind; + i->dst.val = opcode&1; + i->cycle = 2; + break; + } + case 0x76: + case 0x77: { + // move immediate to data memory + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_cst; + i->dst.type = o_ind; + i->dst.val = opcode&1; + i->cycle = 2; + break; + } + case 0xe2: + case 0xe3: { + // move external data to A + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_ext; + i->src1.val = opcode&1; + i->dst.type = o_acc; + i->cycle = 2+stretch_cycles; + break; + } + case 0xf2: + case 0xf3: { + // move A to external data + i->type = i_mov; + i->n_src = 1; + i->src1.type = o_acc; + i->dst.type = o_ext; + i->dst.val = opcode&1; + i->cycle = 2+stretch_cycles; + break; + } + // branching ---------------------------------------------------- + case 0x11: + case 0x31: + case 0x51: + case 0x71: + case 0x91: + case 0xb1: + case 0xd1: + case 0xf1: { + // absolute call to subroutine + i->type = i_call; + i->n_src = 1; + i->src1.type = o_add; + i->src1.val = (opcode>>5)&7; + i->cycle = 3; + break; + } + case 0x12: { + // Long call to subroutine + i->type = i_call; + i->n_src = 1; + i->src1.type = o_ladd; + i->cycle = 4; + break; + } + case 0x22: { + // return from subroutine + i->type = i_ret; + i->cycle = 4; + break; + } + case 0x01: + case 0x21: + case 0x41: + case 0x61: + case 0x81: + case 0xa1: + case 0xc1: + case 0xe1: { + // absolute jump unconditional + i->type = i_jmp; + i->n_src = 1; + i->src1.type = o_add; + i->src1.val = (opcode>>5)&7; + i->cycle = 3; + break; + } + case 0x02: { + // Long jump unconditional + i->type = i_jmp; + i->n_src = 1; + i->src1.type = o_ladd; + i->cycle = 4; + break; + } + case 0x60: { + // jump on accumulator = 0 + i->type = i_jz; + i->n_src = 1; + i->src1.type = o_rel; + i->cycle = 3; + break; + } + case 0x70: { + // jump on accumulator != 0 + i->type = i_jnz; + i->n_src = 1; + i->src1.type = o_rel; + i->cycle = 3; + break; + } + case 0xb5: { + // compare A,direct JNE + i->type = i_cjne; + i->n_src = 2; + i->src1.type = o_acc; + i->src2.type = o_dir; + i->dst.type = o_rel; + i->cycle = 4; + break; + } + case 0xb4: { + // compare A,immeditate JNE + i->type = i_cjne; + i->n_src = 2; + i->src1.type = o_acc; + i->src2.type = o_cst; + i->dst.type = o_rel; + i->cycle = 4; + break; + } + case 0xB8: + case 0xB9: + case 0xBa: + case 0xBb: + case 0xBc: + case 0xBd: + case 0xBe: + case 0xBf: { + // compare reg,immeditate JNE + i->type = i_cjne; + i->n_src = 2; + i->src1.type = o_reg; + i->src1.val = opcode & 0x7; + i->src2.type = o_cst; + i->dst.type = o_rel; + i->cycle = 4; + break; + } + case 0xb6: + case 0xb7: { + // compare memory byte,immeditate JNE + i->type = i_cjne; + i->n_src = 2; + i->src1.type = o_ind; + i->src1.val = opcode & 0x1; + i->src2.type = o_cst; + i->dst.type = o_rel; + i->cycle = 4; + break; + } + case 0xd8: + case 0xd9: + case 0xda: + case 0xdb: + case 0xdc: + case 0xdd: + case 0xde: + case 0xdf: { + // decrement reg, JNZ relative + i->type = i_djnz; + i->n_src = 2; + i->src1.type = o_reg; + i->src1.val = opcode & 0x7; + i->src2.type = o_rel; + i->cycle = 3; + break; + } + case 0xd5: { + // decrement direct byte, JNZ relative + i->type = i_djnz; + i->n_src = 2; + i->src1.type = o_dir; + i->src2.type = o_rel; + i->cycle = 4; + break; + } + // NOP -------------------------------------------------------------- + case 0x00: { + break; + } + default: { + + break; + fprintf(stderr,"opcode 0x%x not supported\n",opcode); + break; + } + } + +#ifdef DEBUG + printf("decode instr type:%d, src1: %d, src2: %d, dest %d, nb_cycles: %d\n",i->type, i->src1.type, i->src2.type, i->dst.type, i->cycle); +#endif +} + + +//-------------------------------------------------------------------- +// bool request_address(int ad); +// +// return 0 if the memory adress is external (i.e. external peripheral) +// update cycles2execute so that the simulation runs for a given +// number of clock cycles. +// +//-------------------------------------------------------------------- +bool cycle_model::request_address(int ad) { + // add peripheral driver here + // + // if(ad==
) { + // if(cycles2execute<=) + // cycles2execute = ; + // return 0; + // } + + if(ad==0x10) { + if(cycles2execute<=30) + cycles2execute = 30; + return 0; + } + + if(ad==0x11) { + return 0; + } + + return 1; +} + + +//-------------------------------------------------------------------- +// exec_bus_cycle(bus_cycle_type op, int addr, int data, int* result) +// +// executes a bus cycle (IDLE, MEM_READ, MEM_WRITE). +// - IDLE: executes an idle cycle (4 clocks) +// - MEM_READ: reads from the memory bus (stretch+1 clocks) +// - MEM_WRITE: writes on the memory bus (stretch+1 clocks) +// +//-------------------------------------------------------------------- +void cycle_model::exec_bus_cycle(bus_cycle_type op, int addr, int data, int* result) { + int cycles = 0; + int mem_idle =0; + + + if(op==OP_IDLE) { + // OP_IDLE + if((cycles2execute>0)||ALL_CYCLES) { + // wait 4 cycles + mem_ale.write(0); + mem_wr_n.write(1); + mem_pswr_n.write(1); + mem_rd_n.write(1); + mem_psrd_n.write(1); + p0_mem_reg_n.write(0); + p0_addr_data_n.write(0); + AT_POSEDGE(clk); + AT_POSEDGE(clk); + AT_POSEDGE(clk); + AT_POSEDGE(clk); + cycles2execute -= 1; + } + + cycle_count += 1; + return; + } + + + // OP_MEM_READ or OP_MEM_WRITE + do { + cycles++; + + // Cycle 1 ********************************************************* + if(mem_idle==0) { + mem_ale.write(1); + mem_wr_n.write(1); + mem_pswr_n.write(1); + mem_rd_n.write(1); + mem_psrd_n.write(1); + p0_mem_reg_n.write(0); + p0_addr_data_n.write(0); + + if(op==OP_MEM_WRITE) { + mem_data_out.write( sc_bv<8>( data ) ); + p0_mem_reg_n.write(1); + p0_addr_data_n.write(1); + } + } + + AT_POSEDGE(clk); + + + // Cycle 2 ********************************************************* + if(mem_idle==0) { + switch (op) { + case OP_MEM_READ: { + mem_addr.write( sc_bv<16>( addr & 0x0000ffff ) ); + p0_mem_reg_n.write(1); + p0_addr_data_n.write(1); + p2_mem_reg_n.write(1); + break; + } + case OP_MEM_WRITE: { + mem_addr.write( sc_bv<16>( addr & 0x0000ffff ) ); + p0_addr_data_n.write(0); + p2_mem_reg_n.write(1); + break; + } + default: { + // do nothing + break; + } + } + } + if(mem_idle==0) { + AT_NEGEDGE(clk); + mem_ale.write(0); + } + + AT_POSEDGE(clk); + + + // Cycle 3 ********************************************************* + if(mem_idle==0) { + switch (op) { + case OP_MEM_READ: { + p0_mem_reg_n.write(0); + p0_addr_data_n.write(0); + + if(stretch_cycles==0) + mem_rd_n.write(0); // read RAM + break; + } + case OP_MEM_WRITE: { + if(stretch_cycles==0) + mem_wr_n.write(0); // write RAM + break; + } + default: { + // do nothing + break; + } + } + } + AT_POSEDGE(clk); + + + // Cycle 4 ********************************************************* + if (mem_idle==0) { + switch (op) { + case OP_MEM_READ: { + if(stretch_cycles>0) { + mem_idle=stretch_cycles+1; + mem_rd_n.write(0); // read RAM + } + break; + } + case OP_MEM_WRITE: { + if(stretch_cycles>0) { + mem_idle=stretch_cycles+1; + mem_wr_n.write(0); // write RAM + } + break; + } + default: { + // do nothing + break; + } + } + } + else if(mem_idle==1) { + // read/write enable <- 1 when stretch>0 + switch (op) { + case OP_MEM_READ: { + if(stretch_cycles>0) { + // read value + *result = mem_data_in.read().to_uint(); + // reset read enable + mem_rd_n.write(1); // read RAM + } + break; + } + case OP_MEM_WRITE: { + if(stretch_cycles>0) { + // reset write enable + mem_wr_n.write(1); // write RAM + } + break; + } + default: { + break; + } + } + } + AT_POSEDGE(clk); + + + // Cycle 1 (1st part) ********************************************** + if(mem_idle>0) + mem_idle--; + + if(mem_idle==0){ + switch(op) { + case OP_MEM_READ: + if(stretch_cycles==0) { + mem_rd_n.write(1); + *result = mem_data_in.read().to_uint(); + } + break; + case OP_MEM_WRITE: + if(stretch_cycles==0) + mem_wr_n.write(1); + break; + default: + break; + } + } + } while(mem_idle>0); + + sc_assert(cycles==(stretch_cycles+1)); + cycle_count += cycles; + cycles2execute-=cycles; + return; +} + + + + +//------------------------------------------------------------------------ +// int cycle_model::fetch_instr(int ad) +// +// fetches data (1byte) from instruction memory +// +//------------------------------------------------------------------------ +int cycle_model::fetch_instr(int ad) { + + sc_assert((ad=0)); + + int temp; + exec_bus_cycle(OP_IDLE, 0,0, &temp); + + int opcode = instr_mem[ad]; +#ifdef DEBUG + printf("Fetch instruction @0x%x (= 0x%x)\n",ad,opcode); +#endif + return opcode; +} + +//------------------------------------------------------------------------ +// int cycle_model::fetch_data(int ad) +// +// fetches data from memory which can be internal to the block or +// external (case of an hardware peripheral) +// +//------------------------------------------------------------------------ +int cycle_model::fetch_data(int addr) { + + int data = 0, result; + + bool is_internal = request_address(addr); + if(is_internal) { + // is internal + if((cycles2execute>0)||ALL_CYCLES) { + // Wait + for(int i=0; i0)||ALL_CYCLES) { + for(int i=0; itype) { + case o_acc: { + return A; + break; + } + case o_reg: { + sc_assert((op->val<8)&&(op->val>=0)); +#ifdef DEBUG + printf("read R%d=%d\n",op->val,R[op->val]); +#endif + return R[op->val]; + break; + } + case o_dir: { + // fetch address + my_stack->address += 1; + int temp = fetch_instr(my_stack->address); + sc_assert((op->valval>=0)); + return int_mem[temp]; + break; + } + case o_ind: { + sc_assert((op->val==0)||(op->val==1)); + sc_assert((R[op->val]val]>=0)); + return int_mem[R[op->val]]; + break; + } + case o_ext: { + sc_assert((op->val==1)||(op->val==0)); + int addr = R[op->val]; + sc_assert((addr=0)); + + int result = fetch_data(addr); + + return result; + break; + } + case o_cst: { + // fetch next byte + my_stack->address += 1; + int temp = fetch_instr(my_stack->address); + return temp; + break; + } + case o_lcst: { + // fetch next 2 bytes + + my_stack->address += 1; + int temp = fetch_instr(my_stack->address); + + my_stack->address += 1; + sc_assert(my_stack->address<=MEM_SIZE); + temp = (temp<<8) + fetch_instr(my_stack->address); + + return temp; + break; + } + case o_add: { + // fetch next byte + my_stack->address += 1; + int temp = ((op->val)<<8) + fetch_instr(my_stack->address); + return temp; + break; + } + case o_ladd: { + // fetch next 2 bytes + my_stack->address += 1; + int temp = fetch_instr(my_stack->address); + + my_stack->address += 1; + temp = (temp<<8) + fetch_instr(my_stack->address); + return temp; + break; + } + case o_rel: { + // fetch next byte + my_stack->address += 1; + int temp = fetch_instr(my_stack->address); + if(temp<0x80) + return temp; + else + return -(0x100-temp); + break; + } + default: { + return -1; + break; + } + } + return -1; +} + +//-------------------------------------------------------------------- +// int write_back(operand *op, int value) +// +// write the value into the operand +// +//-------------------------------------------------------------------- +int cycle_model::write_back(operand* op, int v) { + switch(op->type) { + case o_acc: { + A = v; + return A; + break; + } + case o_reg: { + sc_assert((op->val<8)&&(op->val>=0)); + R[op->val] = v; +#ifdef DEBUG + printf("write R%d <- %d\n",op->val,R[op->val]); +#endif + return R[op->val]; + break; + } + case o_dir: { + // write address + my_stack->address += 1; + int temp = fetch_instr(my_stack->address); + sc_assert((temp=0)); + int_mem[temp] = v; + return int_mem[temp]; + break; + } + case o_ind: { + sc_assert((op->val==0)||(op->val==1)); + sc_assert((R[op->val]val]>=0)); + int_mem[R[op->val]] = v; + return int_mem[R[op->val]]; + break; + } + case o_ext: { + sc_assert((op->val==1)||(op->val==0)); + int addr = R[op->val]; + sc_assert((addr=0)); + int data, result; + data = v; + result = write_data(addr,data); + return result; + break; + } + default: { + return -1; + break; + } + } + return -1; +} + + + +//-------------------------------------------------------------------- +// void execute(instr *i) +// +// execute consists of the following tasks: +// - fetch the operands +// - execute the operation in the intruction +// - write the data back in the destination +// - compute the next address for (jmp, call, return...) +// +//-------------------------------------------------------------------- +void cycle_model::execute(instr *i) { + int in1, in2, out = 0; + + // fetch operands --------------------------------------------------- + if(i->n_src>=1) + in1 = fetch_operand(&(i->src1)); + + if(i->n_src>=2) + in2 = fetch_operand(&(i->src2)); + +#ifdef DEBUG + printf("execute %d, with in1=%d and in2=%d\n",i->type,in1, in2); +#endif + + // execute ---------------------------------------------------------- + switch(i->type) { + case i_add: { + out = in1 + in2; + break; + } + case i_sub: { + out = in1 - in2; + break; + } + case i_inc: { + out = in1+1; + break; + } + case i_dec: { + out = in1-1; + break; + } + case i_mul: { + out = in1 * in2; + break; + } + case i_div: { + out = in1/in2; + break; + } + // logic operations + case i_and: { + out = in1 & in2; + break; + } + case i_or: { + out = in1 | in2; + break; + } + case i_xor: { + out = in1 ^ in2; + break; + } + case i_rl: { + out = in1<<1; + break; + } + case i_rr: { + out = in2>>1; + break; + } + // data transfer + case i_mov: { + out = in1; + break; + } + // branching (out==0 -> don't branch) + case i_call: + case i_ret: + case i_jmp: + case i_sjmp: { + out = 1; + break; + } + case i_jz: { + out = (A==0); + break; + } + case i_jnz: { + out = (A!=0); + break; + } + case i_cjne: { + out = (in1!=in2); + break; + } + case i_djnz: { + out=in1-1; // decrement reg/direct and jump if != 0 + break; + } + default: { + break; + } + } + + + // write back -------------------------------------------------------- + write_back(&(i->dst),out); + + // compute next address ---------------------------------------------- + switch(i->type) { + case i_call: { + stack_el *new_stack_el= (stack_el *) malloc(sizeof(stack_el)); + new_stack_el->up = my_stack; + new_stack_el->address = in1; + my_stack = new_stack_el; + + /* wait additional cycles */ + int result; + exec_bus_cycle(OP_IDLE,0,0,&result); + + break; + } + case i_ret: { + stack_el *new_stack_el = my_stack->up; + free(my_stack); + my_stack = new_stack_el; + if(my_stack!=NULL) + my_stack->address += 1; // increment address after jump + + /* wait additional cycles */ + int result; + exec_bus_cycle(OP_IDLE,0,0,&result); + exec_bus_cycle(OP_IDLE,0,0,&result); + exec_bus_cycle(OP_IDLE,0,0,&result); + break; + } + case i_jmp: { + my_stack->address = in1; + + /* wait additional cycles */ + int result; + exec_bus_cycle(OP_IDLE,0,0,&result); + + break; + } + case i_sjmp: + case i_jz: + case i_jnz: { + if(out!=0) + my_stack->address += in1+1; + else + my_stack->address += 1; + + /* wait additional cycles */ + int result; + exec_bus_cycle(OP_IDLE,0,0,&result); + + break; + } + case i_cjne: { + int in3 = fetch_operand(&i->dst); + if(out!=0) + my_stack->address += in3+1; + else + my_stack->address += 1; + + /* wait additional cycles */ + int result; + exec_bus_cycle(OP_IDLE,0,0,&result); + + break; + } + case i_djnz: { + if(out!=0) + my_stack->address += in2+1; + else + my_stack->address += 1; + + /* wait additional cycles */ + int result; + exec_bus_cycle(OP_IDLE,0,0,&result); + + break; + } + default: { + my_stack->address += 1; + break; + } + } +} + + + +//--------------------------------------------------------------------- +// cycle_model::init() +// +// initialize the stack +// +//--------------------------------------------------------------------- +void cycle_model::init() { + + cycles2execute = 0; + cycle_count = 0; + stretch_cycles = 0; + + // initialize stack + my_stack = (stack_el *) malloc(sizeof(stack_el)); + my_stack->up = NULL; + my_stack->address = 0; +} + + + +//------------------------------------------------------------------------ +// void cycle_mode::entry() +// +// main loop: fetch instruction +// decode opcode +// execute instruction +// +//------------------------------------------------------------------------ +void cycle_model::entry() { + + wait(); + + mem_ale.write(0); + mem_wr_n.write(1); + mem_pswr_n.write(1); + mem_rd_n.write(1); + mem_psrd_n.write(1); + p0_mem_reg_n.write(0); + p0_addr_data_n.write(0); + wait(); + + while(true) { + instr the_instr; + // fetch instruction + if(my_stack==NULL) { + // printf("cycles count = %d\n",cycle_count); + sc_stop(); + wait(); + } else { + int opcode = fetch_instr(my_stack->address); + + // decode instruction + decode(opcode, &the_instr); + + // execute + execute(&the_instr); + } + } +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/cycle_model.h b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/cycle_model.h new file mode 100644 index 000000000..7aa0b1e89 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/cycle_model.h @@ -0,0 +1,230 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + cycle_model.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +#define MEM_SIZE 65536 +#define INT_SIZE 2048 + +/* types of operands */ +enum op_type { + o_null, + o_acc, // accumulator + o_reg, // registers Ri + o_dir, // internal register direct + o_ind, // internal register pointed to by R0 or R1 + o_ext, // external memory pointed to by R0 or R1 + o_rel, // 2complement offset byte + o_cst, // 8bit constant + o_lcst, // 16bit constant + o_add, // 11bit destination address + o_ladd // 16bit destination address +}; + + +/* limited set of instruction types */ +enum instr_type { + // arithmetic operations + i_add, // 0 + i_sub, // 1 + i_inc, // 2 + i_dec, // 3 + i_mul, // 4 + i_div, // 5 + // logic operations + i_and, // 6 + i_or, // 7 + i_xor, // 8 + i_clr, // 9 + i_cpl, // 10 + i_rl, // 11 + i_rr, // 12 + // data transfer + i_mov, // 13 + // branching + i_call,// 14 + i_ret, // 15 + i_jmp, // 16 + i_sjmp,// 17 + i_jz, // 18 + i_jnz, // 19 + i_cjne,// 20 + i_djnz,// 21 + i_nop // 22 +}; + + +/* cycle types for memory bus */ +enum bus_cycle_type { + OP_IDLE, + OP_MEM_READ, + OP_MEM_WRITE +}; + + +/* ------------------------------------------------------------------------ + * struct operand + * ----------------------------------------------------------------------*/ +struct operand { + op_type type; + int val; /* value encoded with the opcode (i.e. register number) */ +}; + + +/* ------------------------------------------------------------------------ + * struct instr ( instruction ) + * ----------------------------------------------------------------------*/ +struct instr { + instr_type type; + int n_src; /* number of source operands */ + operand src1; /* source operand 1 */ + operand src2; /* source operand 2 */ + operand dst; /* destination operand */ + int cycle; // number of cycles +}; + + +/* ------------------------------------------------------------------------ + * struct stack_el ( stack element ) + * ----------------------------------------------------------------------*/ +struct stack_el { + int address; + stack_el *up; +}; + + + +/* ------------------------------------------------------------------------ + * struct cycle_model: public sc_aproc + * + * ----------------------------------------------------------------------*/ + +SC_MODULE( cycle_model ) +{ + SC_HAS_PROCESS( cycle_model ); + + sc_in_clk clk; + + /* functions */ + void init(); + void parse_hex(char *name); + void exec_bus_cycle(bus_cycle_type op, int addr, int data, int* result); + bool request_address(int addr); + int fetch_instr(int ad); + int fetch_data(int ad); + int write_data(int ad, int data); + int fetch_operand(operand* op); + int write_back(operand *, int); + void execute(instr *i); + void decode(int opcode, instr* i); + + + /* memory bus */ + signal_bool_vector16& mem_addr; + signal_bool_vector8& mem_data_out; + const signal_bool_vector8& mem_data_in; + sc_signal& mem_wr_n; + sc_signal& mem_rd_n; + sc_signal& mem_pswr_n; + sc_signal& mem_psrd_n; + sc_signal& mem_ale; + const sc_signal& mem_ea_n; + + sc_signal& p0_mem_reg_n; + sc_signal& p0_addr_data_n; + sc_signal& p2_mem_reg_n; + + /* internal variables */ + /* memories registers and stack */ + int instr_mem[MEM_SIZE]; /* instruction memory */ + int ext_mem[MEM_SIZE]; /* 'external' data memory */ + int int_mem[INT_SIZE]; /* internal data memory */ + int A; /* accumulator */ + int R[8]; /* registers */ + stack_el *my_stack; /* stack */ + /* others */ + int cycles2execute; /* number of cycles to execute */ + int cycle_count; /* total number of cycles executed */ + int stretch_cycles; /* memory stretch cycles */ + + + + /* Constructor */ + cycle_model(sc_module_name NAME, + const sc_signal_in_if& CLK, + char* hex_file_name, + + signal_bool_vector16& MEM_ADDR, + signal_bool_vector8& MEM_DATA_OUT, + const signal_bool_vector8& MEM_DATA_IN, + sc_signal& MEM_WR_N, + sc_signal& MEM_RD_N, + sc_signal& MEM_PSWR_N, + sc_signal& MEM_PSRD_N, + sc_signal& MEM_ALE, + const sc_signal& MEM_EA_N, + + sc_signal& P0_MEM_REG_N, + sc_signal& P0_ADDR_DATA_N, + sc_signal& P2_MEM_REG_N + ) + : + + mem_addr(MEM_ADDR), + mem_data_out(MEM_DATA_OUT), + mem_data_in(MEM_DATA_IN), + mem_wr_n(MEM_WR_N), + mem_rd_n(MEM_RD_N), + mem_pswr_n(MEM_PSWR_N), + mem_psrd_n(MEM_PSRD_N), + mem_ale(MEM_ALE), + mem_ea_n(MEM_EA_N), + p0_mem_reg_n(P0_MEM_REG_N), + p0_addr_data_n(P0_ADDR_DATA_N), + p2_mem_reg_n(P2_MEM_REG_N) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + + parse_hex(hex_file_name); + init(); + } + + /* Process functionality in member function below */ + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/golden/cycle_dw8051_demo.log b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/golden/cycle_dw8051_demo.log new file mode 100644 index 000000000..d487dd01f --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/golden/cycle_dw8051_demo.log @@ -0,0 +1,23 @@ +SystemC Simulation +peripheral: receive 10 +peripheral: send 10 +peripheral: receive 9 +peripheral: send 9 +peripheral: receive 8 +peripheral: send 8 +peripheral: receive 7 +peripheral: send 7 +peripheral: receive 6 +peripheral: send 6 +peripheral: receive 5 +peripheral: send 5 +peripheral: receive 4 +peripheral: send 4 +peripheral: receive 3 +peripheral: send 3 +peripheral: receive 2 +peripheral: send 2 +peripheral: receive 1 +peripheral: send 1 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/main.cpp b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/main.cpp new file mode 100644 index 000000000..11366c74a --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/main.cpp @@ -0,0 +1,172 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//*************************************************************************** +// FILE: main.cc +// +// AUTHOR: Luc Semeria September, 21, 1998 +// +// ABSTRACT: main (instanciates dw8051 cycle-accurate model and +// and peripheral on memory bus +// +// MODIFICATION HISTORY: +// Luc Semeria: 9/21/98 created +// +//*************************************************************************** +// +// DESCRIPTION +// +// This program tests the communication between the cycle-accurate model +// and the peripheral on the memory bus +// +// The peripheral copies the input after a given number of clocks +// +// Reference: Synopsys DesignWare DW8051 MacroCell Databook +// +//*************************************************************************** +#include "cycle_model.h" +#include "peripheral.h" +// #define DEBUG +char *hex_file_name; + + +void usage() { + fprintf(stdout,"\nusage: hw_sim.x [-a] filename.hex\n"); + exit(-1); +} + +void parse_arg(int argc, char *argv[]) { + extern bool ALL_CYCLES; + int i = 1; + + ALL_CYCLES = 0; + +#if 0 + // parse -a + if(argc<=i) + usage(); + + if(!strcmp(argv[i],"-a")) { + ALL_CYCLES = 1; + i++; + } + + // parse file name + if(argc<=i) + usage(); + + hex_file_name=(char *)malloc(strlen(argv[i])*sizeof(char)); + strcpy(hex_file_name,argv[i]); + i++; + + // no more param + if(i mem_wr_n("mem_wr_n"); // write strobe + sc_signal mem_rd_n("mem_rd_n"); // read enable sampled + sc_signal mem_pswr_n("mem_pswr_n"); // write enable (ROM) + sc_signal mem_psrd_n("mem_psrd_n"); // read enable (ROM) + sc_signal mem_ale("mem_ale"); // ext latch enable + sc_signal mem_ea_n("mem_ea_n"); // ext prog mem enable + + // sc_signal port_pin_reg_n(); // select read from ext reg or pin + sc_signal p0_mem_reg_n("p0_mem_reg_n"); // select port reg + sc_signal p0_addr_data_n("p0_addr_data_n");// select data + sc_signal p2_mem_reg_n("p2_mem_reg_n"); // cf p0_mem_reg_n + + parse_arg(argc, argv); + + cycle_model CYCLE_MODEL("dw8051", + clock, + hex_file_name, // name of the hex file + + mem_addr, + mem_data_out, + mem_data_in, + mem_wr_n, + mem_rd_n, + mem_pswr_n, + mem_psrd_n, + mem_ale, + mem_ea_n, + + // port_pin_reg_n, + p0_mem_reg_n, + p0_addr_data_n, + p2_mem_reg_n); + + peripheral PERIPHERAL("peripheral", + clock, + mem_addr, + mem_data_out, + mem_data_in, + mem_wr_n, + mem_rd_n, + mem_pswr_n, + mem_psrd_n, + mem_ale, + mem_ea_n, + + p0_mem_reg_n, + p0_addr_data_n, + p2_mem_reg_n); + + + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/peripheral.cpp b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/peripheral.cpp new file mode 100644 index 000000000..2fdb37151 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/peripheral.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + peripheral.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "peripheral.h" + +void peripheral::entry() { + unsigned int buffer_in = 0; + unsigned int buffer_out = 0; + wait(); + + while(true) { + unsigned int addr = mem_addr.read().to_uint(); + unsigned int data = mem_data_out.read().to_uint(); + + if(!mem_wr_n.read() && (addr==0x10)) { + // write + cout << "peripheral: receive " << data << endl; + buffer_in = data; + wait(100); + buffer_out = buffer_in; + } + + if(!mem_rd_n.read() && (addr==0x11)) { + // read + mem_data_in.write( sc_bv<8>( buffer_out ) ); + cout << "peripheral: send " << buffer_out << endl; + wait(); + } + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/peripheral.h b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/peripheral.h new file mode 100644 index 000000000..d0e73ffb3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/peripheral.h @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + peripheral.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( peripheral ) +{ + SC_HAS_PROCESS( peripheral ); + + sc_in_clk clk; + + /* Ports( other than clk) */ + const signal_bool_vector16& mem_addr; + const signal_bool_vector8& mem_data_out; + signal_bool_vector8& mem_data_in; + const sc_signal& mem_wr_n; + const sc_signal& mem_rd_n; + const sc_signal& mem_pswr_n; + const sc_signal& mem_psrd_n; + const sc_signal& mem_ale; + sc_signal& mem_ea_n; + + const sc_signal& p0_mem_reg_n; + const sc_signal& p0_addr_data_n; + const sc_signal& p2_mem_reg_n; + + peripheral(sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector16& MEM_ADDR, + const signal_bool_vector8& MEM_DATA_OUT, + signal_bool_vector8& MEM_DATA_IN, + const sc_signal& MEM_WR_N, + const sc_signal& MEM_RD_N, + const sc_signal& MEM_PSWR_N, + const sc_signal& MEM_PSRD_N, + const sc_signal& MEM_ALE, + sc_signal& MEM_EA_N, + + const sc_signal& P0_MEM_REG_N, + const sc_signal& P0_ADDR_DATA_N, + const sc_signal& P2_MEM_REG_N + ) + : + mem_addr(MEM_ADDR), + mem_data_out(MEM_DATA_OUT), + mem_data_in(MEM_DATA_IN), + mem_wr_n(MEM_WR_N), + mem_rd_n(MEM_RD_N), + mem_pswr_n(MEM_PSWR_N), + mem_psrd_n(MEM_PSRD_N), + mem_ale(MEM_ALE), + mem_ea_n(MEM_EA_N), + p0_mem_reg_n(P0_MEM_REG_N), + p0_addr_data_n(P0_ADDR_DATA_N), + p2_mem_reg_n(P2_MEM_REG_N) + { + clk(TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + /* Process functionality in member function below */ + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/test.hex b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/test.hex new file mode 100644 index 000000000..ca3d9bb1a --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/test.hex @@ -0,0 +1,5 @@ +:03000000020100fa +:160100007c0a78107911120200ecf2120200e31cec70f3020300f8 +:100200007a0a007b0a001beb0070fa1aea70f322ec +:0103000022da +:00000001ff diff --git a/src/systemc/tests/systemc/misc/sim_tests/hshake2/golden/hshake2.log b/src/systemc/tests/systemc/misc/sim_tests/hshake2/golden/hshake2.log new file mode 100644 index 000000000..97b3db6b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/hshake2/golden/hshake2.log @@ -0,0 +1,33 @@ +SystemC Simulation + +Initiating Transfer +Proc1: Data Ready has value = 1 at time 20 ns +Proc1: Data Ack has value = 0 at same time +Proc2: Received data = 10 at time 20 ns +Proc1: Data Ack Received at time 30 ns +Proc1: Data Ready has value = 0 at time 40 ns +Transfer complete + +Initiating Transfer +Proc1: Data Ready has value = 1 at time 50 ns +Proc1: Data Ack has value = 0 at same time +Proc2: Received data = 11 at time 50 ns +Proc1: Data Ack Received at time 60 ns +Proc1: Data Ready has value = 0 at time 70 ns +Transfer complete + +Initiating Transfer +Proc1: Data Ready has value = 1 at time 80 ns +Proc1: Data Ack has value = 0 at same time +Proc2: Received data = 12 at time 80 ns +Proc1: Data Ack Received at time 90 ns +Proc1: Data Ready has value = 0 at time 100 ns +Transfer complete + +Initiating Transfer +Proc1: Data Ready has value = 1 at time 110 ns +Proc1: Data Ack has value = 0 at same time +Proc2: Received data = 13 at time 110 ns + +Info: /OSCI/SystemC: Simulation stopped by user. +SIMULATION COMPLETED AT TIME 110 ns diff --git a/src/systemc/tests/systemc/misc/sim_tests/hshake2/hshake2.f b/src/systemc/tests/systemc/misc/sim_tests/hshake2/hshake2.f new file mode 100644 index 000000000..a898f3890 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/hshake2/hshake2.f @@ -0,0 +1,3 @@ +hshake2/proc1.cpp +hshake2/proc2.cpp +hshake2/main.cpp diff --git a/src/systemc/tests/systemc/misc/sim_tests/hshake2/main.cpp b/src/systemc/tests/systemc/misc/sim_tests/hshake2/main.cpp new file mode 100644 index 000000000..1e0b0eefa --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/hshake2/main.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for handshaking simulation */ + +#include "proc1.h" +#include "proc2.h" + +int sc_main(int ac, char* av[]) +{ + sc_signal data_ready("DataReady"); + sc_signal data_ack("DataAck"); + sc_signal data("Data"); + + sc_clock clock("CLOCK", 10, SC_NS, 0.5, 0.0, SC_NS); + + proc1 Master("MasterProcess", clock, data_ack, data, data_ready); + proc2 Slave("SlaveProcess", clock, data_ready, data, data_ack); + + sc_start(); + cout << "SIMULATION COMPLETED AT TIME " << sc_time_stamp() << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc1.cpp b/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc1.cpp new file mode 100644 index 000000000..24807ef25 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc1.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc1.cc */ +/* This is the implementation file for synchronous process `proc1' */ + +#include "proc1.h" + +void proc1::entry() +{ + int i = 10; + + data_ready.write(false); + wait(); + + while(true) { + cout << endl << "Initiating Transfer" << endl; + data_ready.write(true); + data.write(i++); + wait(); + cout << "Proc1: Data Ready has value = " << data_ready.read() + << " at time " << sc_time_stamp() << endl; + cout << "Proc1: Data Ack has value = " << data_ack.read() + << " at same time" << endl; + do { wait(); } while (data_ack == false); + cout << "Proc1: Data Ack Received at time " << sc_time_stamp() << + endl; + data_ready.write(false); + wait(); + cout << "Proc1: Data Ready has value = " << data_ready.read() + << " at time " << sc_time_stamp() << endl; + cout << "Transfer complete" << endl; + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc1.h b/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc1.h new file mode 100644 index 000000000..540706ce3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc1.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc1.h */ +/* This is the interface file for synchronous process `proc1' */ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_in data_ack; + sc_inout data; + sc_inout data_ready; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLK, + sc_signal& DATA_ACK, + sc_signal& DATA, + sc_signal& DATA_READY ) + { + clk(CLK); + data_ack(DATA_ACK); data(DATA); data_ready(DATA_READY); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc2.cpp b/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc2.cpp new file mode 100644 index 000000000..f1bb5a519 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc2.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc2.cc */ +/* This is the implementation file for synchronous process `proc2' */ + +#include "proc2.h" + +void proc2::entry() +{ + int i; + + data_ack.write(false); + wait(); + + while (true) { + do { wait(); } while (data_ready == false); + i = data.read(); + cout << "Proc2: Received data = " << i << " at time " << + sc_time_stamp() << endl; + if (i > 12) { + sc_stop(); + } + data_ack.write(true); + wait(); + do { wait(); } while (data_ready == true); + data_ack.write(false); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc2.h b/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc2.h new file mode 100644 index 000000000..769ad5aed --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/hshake2/proc2.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc2.h */ +/* This is the interface file for synchronous process `proc2' */ + +#include "systemc.h" + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_in data_ready; + sc_in data; + sc_out data_ack; + + // Constructor + proc2( sc_module_name NAME, + sc_clock& CLK, + sc_signal& DATA_READY, + sc_signal& DATA, + sc_signal& DATA_ACK ) + { + clk(CLK); + data_ready(DATA_READY); data(DATA); data_ack(DATA_ACK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + diff --git a/src/systemc/tests/systemc/misc/sim_tests/irq/golden/irq.log b/src/systemc/tests/systemc/misc/sim_tests/irq/golden/irq.log new file mode 100644 index 000000000..6fcf830c5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/irq/golden/irq.log @@ -0,0 +1,5 @@ +SystemC Simulation +Posedge on IRQ 0 +Negedge on IRQ 0 +Posedge on IRQ 1 +Negedge on IRQ 1 diff --git a/src/systemc/tests/systemc/misc/sim_tests/irq/irq.cpp b/src/systemc/tests/systemc/misc/sim_tests/irq/irq.cpp new file mode 100644 index 000000000..c7d4048cb --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/irq/irq.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + irq.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define MAX_NUM 5 + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clock; + sc_in irq[MAX_NUM]; + + proc1( sc_module_name NAME, + sc_signal& CLOCK, + sc_signal* IRQ ) + { + clock(CLOCK); + for( int i = 0; i < MAX_NUM; ++ i ) { + irq[i]( IRQ[i] ); + } + + SC_THREAD( entry ); + sensitive << irq[0]; + sensitive << irq[1]; + } + + void entry() + { + while (true) { + for (int i = 0; i clock; + sc_signal irq[MAX_NUM]; + + proc1 P1("P1", clock, irq); + + for( int i = 0; i < MAX_NUM; ++ i ) { + irq[i] = 0; + } + sc_start(0, SC_NS); + for (int i=0; i < MAX_NUM; i++) { + clock = 0; + sc_start(1, SC_NS); + irq[i] = 1; + clock = 1; + sc_start(1, SC_NS); + clock = 0; + irq[i] = 0; + sc_start(1, SC_NS); + } + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/manual_clock/golden/manual_clock.log b/src/systemc/tests/systemc/misc/sim_tests/manual_clock/golden/manual_clock.log new file mode 100644 index 000000000..4d727e9a8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/manual_clock/golden/manual_clock.log @@ -0,0 +1,13333 @@ +SystemC Simulation +4 ns P1(a&&b):: C = 0 +4 ns P2(a&&b):: C = 1 +6 ns P1(a||b):: C = 1 +6 ns P2(a||b):: C = 0 +10 ns P1(a&&b):: C = 0 +10 ns P2(a&&b):: C = 1 +12 ns P1(a||b):: C = 1 +12 ns P2(a||b):: C = 0 +16 ns P1(a&&b):: C = 1 +16 ns P2(a&&b):: C = 0 +18 ns P1(a||b):: C = 1 +18 ns P2(a||b):: C = 0 +22 ns P1(a&&b):: C = 0 +22 ns P2(a&&b):: C = 1 +24 ns P1(a||b):: C = 1 +24 ns P2(a||b):: C = 0 +28 ns P1(a&&b):: C = 0 +28 ns P2(a&&b):: C = 1 +30 ns P1(a||b):: C = 1 +30 ns P2(a||b):: C = 0 +34 ns P1(a&&b):: C = 0 +34 ns P2(a&&b):: C = 1 +36 ns P1(a||b):: C = 1 +36 ns P2(a||b):: C = 0 +40 ns P1(a&&b):: C = 0 +40 ns P2(a&&b):: C = 1 +42 ns P1(a||b):: C = 1 +42 ns P2(a||b):: C = 0 +46 ns P1(a&&b):: C = 0 +46 ns P2(a&&b):: C = 1 +48 ns P1(a||b):: C = 1 +48 ns P2(a||b):: C = 0 +52 ns P1(a&&b):: C = 0 +52 ns P2(a&&b):: C = 1 +54 ns P1(a||b):: C = 1 +54 ns P2(a||b):: C = 0 +58 ns P1(a&&b):: C = 0 +58 ns P2(a&&b):: C = 1 +60 ns P1(a||b):: C = 1 +60 ns P2(a||b):: C = 0 +64 ns P1(a&&b):: C = 0 +64 ns P2(a&&b):: C = 1 +66 ns P1(a||b):: C = 1 +66 ns P2(a||b):: C = 0 +70 ns P1(a&&b):: C = 0 +70 ns P2(a&&b):: C = 1 +72 ns P1(a||b):: C = 0 +72 ns P2(a||b):: C = 1 +76 ns P1(a&&b):: C = 0 +76 ns P2(a&&b):: C = 1 +78 ns P1(a||b):: C = 1 +78 ns P2(a||b):: C = 0 +82 ns P1(a&&b):: C = 1 +82 ns P2(a&&b):: C = 0 +84 ns P1(a||b):: C = 1 +84 ns P2(a||b):: C = 0 +88 ns P1(a&&b):: C = 1 +88 ns P2(a&&b):: C = 0 +90 ns P1(a||b):: C = 1 +90 ns P2(a||b):: C = 0 +94 ns P1(a&&b):: C = 0 +94 ns P2(a&&b):: C = 1 +96 ns P1(a||b):: C = 1 +96 ns P2(a||b):: C = 0 +100 ns P1(a&&b):: C = 0 +100 ns P2(a&&b):: C = 1 +102 ns P1(a||b):: C = 1 +102 ns P2(a||b):: C = 0 +106 ns P1(a&&b):: C = 0 +106 ns P2(a&&b):: C = 1 +108 ns P1(a||b):: C = 0 +108 ns P2(a||b):: C = 1 +112 ns P1(a&&b):: C = 1 +112 ns P2(a&&b):: C = 0 +114 ns P1(a||b):: C = 1 +114 ns P2(a||b):: C = 0 +118 ns P1(a&&b):: C = 1 +118 ns P2(a&&b):: C = 0 +120 ns P1(a||b):: C = 1 +120 ns P2(a||b):: C = 0 +124 ns P1(a&&b):: C = 0 +124 ns P2(a&&b):: C = 1 +126 ns P1(a||b):: C = 1 +126 ns P2(a||b):: C = 0 +130 ns P1(a&&b):: C = 0 +130 ns P2(a&&b):: C = 1 +132 ns P1(a||b):: C = 0 +132 ns P2(a||b):: C = 1 +136 ns P1(a&&b):: C = 1 +136 ns P2(a&&b):: C = 0 +138 ns P1(a||b):: C = 1 +138 ns P2(a||b):: C = 0 +142 ns P1(a&&b):: C = 0 +142 ns P2(a&&b):: C = 1 +144 ns P1(a||b):: C = 0 +144 ns P2(a||b):: C = 1 +148 ns P1(a&&b):: C = 1 +148 ns P2(a&&b):: C = 0 +150 ns P1(a||b):: C = 1 +150 ns P2(a||b):: C = 0 +154 ns P1(a&&b):: C = 1 +154 ns P2(a&&b):: C = 0 +156 ns P1(a||b):: C = 1 +156 ns P2(a||b):: C = 0 +160 ns P1(a&&b):: C = 1 +160 ns P2(a&&b):: C = 0 +162 ns P1(a||b):: C = 1 +162 ns P2(a||b):: C = 0 +166 ns P1(a&&b):: C = 0 +166 ns P2(a&&b):: C = 1 +168 ns P1(a||b):: C = 0 +168 ns P2(a||b):: C = 1 +172 ns P1(a&&b):: C = 0 +172 ns P2(a&&b):: C = 1 +174 ns P1(a||b):: C = 1 +174 ns P2(a||b):: C = 0 +178 ns P1(a&&b):: C = 0 +178 ns P2(a&&b):: C = 1 +180 ns P1(a||b):: C = 1 +180 ns P2(a||b):: C = 0 +184 ns P1(a&&b):: C = 0 +184 ns P2(a&&b):: C = 1 +186 ns P1(a||b):: C = 1 +186 ns P2(a||b):: C = 0 +190 ns P1(a&&b):: C = 0 +190 ns P2(a&&b):: C = 1 +192 ns P1(a||b):: C = 0 +192 ns P2(a||b):: C = 1 +196 ns P1(a&&b):: C = 0 +196 ns P2(a&&b):: C = 1 +198 ns P1(a||b):: C = 0 +198 ns P2(a||b):: C = 1 +202 ns P1(a&&b):: C = 0 +202 ns P2(a&&b):: C = 1 +204 ns P1(a||b):: C = 0 +204 ns P2(a||b):: C = 1 +208 ns P1(a&&b):: C = 1 +208 ns P2(a&&b):: C = 0 +210 ns P1(a||b):: C = 0 +210 ns P2(a||b):: C = 1 +214 ns P1(a&&b):: C = 0 +214 ns P2(a&&b):: C = 1 +216 ns P1(a||b):: C = 0 +216 ns P2(a||b):: C = 1 +220 ns P1(a&&b):: C = 0 +220 ns P2(a&&b):: C = 1 +222 ns P1(a||b):: C = 1 +222 ns P2(a||b):: C = 0 +226 ns P1(a&&b):: C = 0 +226 ns P2(a&&b):: C = 1 +228 ns P1(a||b):: C = 1 +228 ns P2(a||b):: C = 0 +232 ns P1(a&&b):: C = 0 +232 ns P2(a&&b):: C = 1 +234 ns P1(a||b):: C = 0 +234 ns P2(a||b):: C = 1 +238 ns P1(a&&b):: C = 0 +238 ns P2(a&&b):: C = 1 +240 ns P1(a||b):: C = 0 +240 ns P2(a||b):: C = 1 +244 ns P1(a&&b):: C = 0 +244 ns P2(a&&b):: C = 1 +246 ns P1(a||b):: C = 0 +246 ns P2(a||b):: C = 1 +250 ns P1(a&&b):: C = 1 +250 ns P2(a&&b):: C = 0 +252 ns P1(a||b):: C = 1 +252 ns P2(a||b):: C = 0 +256 ns P1(a&&b):: C = 1 +256 ns P2(a&&b):: C = 0 +258 ns P1(a||b):: C = 0 +258 ns P2(a||b):: C = 1 +262 ns P1(a&&b):: C = 0 +262 ns P2(a&&b):: C = 1 +264 ns P1(a||b):: C = 1 +264 ns P2(a||b):: C = 0 +268 ns P1(a&&b):: C = 1 +268 ns P2(a&&b):: C = 0 +270 ns P1(a||b):: C = 1 +270 ns P2(a||b):: C = 0 +274 ns P1(a&&b):: C = 0 +274 ns P2(a&&b):: C = 1 +276 ns P1(a||b):: C = 1 +276 ns P2(a||b):: C = 0 +280 ns P1(a&&b):: C = 0 +280 ns P2(a&&b):: C = 1 +282 ns P1(a||b):: C = 0 +282 ns P2(a||b):: C = 1 +286 ns P1(a&&b):: C = 0 +286 ns P2(a&&b):: C = 1 +288 ns P1(a||b):: C = 1 +288 ns P2(a||b):: C = 0 +292 ns P1(a&&b):: C = 0 +292 ns P2(a&&b):: C = 1 +294 ns P1(a||b):: C = 1 +294 ns P2(a||b):: C = 0 +298 ns P1(a&&b):: C = 1 +298 ns P2(a&&b):: C = 0 +300 ns P1(a||b):: C = 1 +300 ns P2(a||b):: C = 0 +304 ns P1(a&&b):: C = 0 +304 ns P2(a&&b):: C = 1 +306 ns P1(a||b):: C = 1 +306 ns P2(a||b):: C = 0 +310 ns P1(a&&b):: C = 1 +310 ns P2(a&&b):: C = 0 +312 ns P1(a||b):: C = 1 +312 ns P2(a||b):: C = 0 +316 ns P1(a&&b):: C = 0 +316 ns P2(a&&b):: C = 1 +318 ns P1(a||b):: C = 1 +318 ns P2(a||b):: C = 0 +322 ns P1(a&&b):: C = 0 +322 ns P2(a&&b):: C = 1 +324 ns P1(a||b):: C = 1 +324 ns P2(a||b):: C = 0 +328 ns P1(a&&b):: C = 1 +328 ns P2(a&&b):: C = 0 +330 ns P1(a||b):: C = 0 +330 ns P2(a||b):: C = 1 +334 ns P1(a&&b):: C = 0 +334 ns P2(a&&b):: C = 1 +336 ns P1(a||b):: C = 1 +336 ns P2(a||b):: C = 0 +340 ns P1(a&&b):: C = 0 +340 ns P2(a&&b):: C = 1 +342 ns P1(a||b):: C = 0 +342 ns P2(a||b):: C = 1 +346 ns P1(a&&b):: C = 1 +346 ns P2(a&&b):: C = 0 +348 ns P1(a||b):: C = 1 +348 ns P2(a||b):: C = 0 +352 ns P1(a&&b):: C = 0 +352 ns P2(a&&b):: C = 1 +354 ns P1(a||b):: C = 1 +354 ns P2(a||b):: C = 0 +358 ns P1(a&&b):: C = 1 +358 ns P2(a&&b):: C = 0 +360 ns P1(a||b):: C = 1 +360 ns P2(a||b):: C = 0 +364 ns P1(a&&b):: C = 0 +364 ns P2(a&&b):: C = 1 +366 ns P1(a||b):: C = 1 +366 ns P2(a||b):: C = 0 +370 ns P1(a&&b):: C = 1 +370 ns P2(a&&b):: C = 0 +372 ns P1(a||b):: C = 1 +372 ns P2(a||b):: C = 0 +376 ns P1(a&&b):: C = 0 +376 ns P2(a&&b):: C = 1 +378 ns P1(a||b):: C = 0 +378 ns P2(a||b):: C = 1 +382 ns P1(a&&b):: C = 0 +382 ns P2(a&&b):: C = 1 +384 ns P1(a||b):: C = 1 +384 ns P2(a||b):: C = 0 +388 ns P1(a&&b):: C = 0 +388 ns P2(a&&b):: C = 1 +390 ns P1(a||b):: C = 1 +390 ns P2(a||b):: C = 0 +394 ns P1(a&&b):: C = 0 +394 ns P2(a&&b):: C = 1 +396 ns P1(a||b):: C = 1 +396 ns P2(a||b):: C = 0 +400 ns P1(a&&b):: C = 0 +400 ns P2(a&&b):: C = 1 +402 ns P1(a||b):: C = 1 +402 ns P2(a||b):: C = 0 +406 ns P1(a&&b):: C = 0 +406 ns P2(a&&b):: C = 1 +408 ns P1(a||b):: C = 1 +408 ns P2(a||b):: C = 0 +412 ns P1(a&&b):: C = 0 +412 ns P2(a&&b):: C = 1 +414 ns P1(a||b):: C = 1 +414 ns P2(a||b):: C = 0 +418 ns P1(a&&b):: C = 0 +418 ns P2(a&&b):: C = 1 +420 ns P1(a||b):: C = 1 +420 ns P2(a||b):: C = 0 +424 ns P1(a&&b):: C = 0 +424 ns P2(a&&b):: C = 1 +426 ns P1(a||b):: C = 1 +426 ns P2(a||b):: C = 0 +430 ns P1(a&&b):: C = 0 +430 ns P2(a&&b):: C = 1 +432 ns P1(a||b):: C = 1 +432 ns P2(a||b):: C = 0 +436 ns P1(a&&b):: C = 0 +436 ns P2(a&&b):: C = 1 +438 ns P1(a||b):: C = 1 +438 ns P2(a||b):: C = 0 +442 ns P1(a&&b):: C = 1 +442 ns P2(a&&b):: C = 0 +444 ns P1(a||b):: C = 1 +444 ns P2(a||b):: C = 0 +448 ns P1(a&&b):: C = 0 +448 ns P2(a&&b):: C = 1 +450 ns P1(a||b):: C = 0 +450 ns P2(a||b):: C = 1 +454 ns P1(a&&b):: C = 0 +454 ns P2(a&&b):: C = 1 +456 ns P1(a||b):: C = 1 +456 ns P2(a||b):: C = 0 +460 ns P1(a&&b):: C = 1 +460 ns P2(a&&b):: C = 0 +462 ns P1(a||b):: C = 1 +462 ns P2(a||b):: C = 0 +466 ns P1(a&&b):: C = 0 +466 ns P2(a&&b):: C = 1 +468 ns P1(a||b):: C = 1 +468 ns P2(a||b):: C = 0 +472 ns P1(a&&b):: C = 0 +472 ns P2(a&&b):: C = 1 +474 ns P1(a||b):: C = 1 +474 ns P2(a||b):: C = 0 +478 ns P1(a&&b):: C = 0 +478 ns P2(a&&b):: C = 1 +480 ns P1(a||b):: C = 1 +480 ns P2(a||b):: C = 0 +484 ns P1(a&&b):: C = 0 +484 ns P2(a&&b):: C = 1 +486 ns P1(a||b):: C = 1 +486 ns P2(a||b):: C = 0 +490 ns P1(a&&b):: C = 0 +490 ns P2(a&&b):: C = 1 +492 ns P1(a||b):: C = 0 +492 ns P2(a||b):: C = 1 +496 ns P1(a&&b):: C = 0 +496 ns P2(a&&b):: C = 1 +498 ns P1(a||b):: C = 1 +498 ns P2(a||b):: C = 0 +502 ns P1(a&&b):: C = 1 +502 ns P2(a&&b):: C = 0 +504 ns P1(a||b):: C = 1 +504 ns P2(a||b):: C = 0 +508 ns P1(a&&b):: C = 0 +508 ns P2(a&&b):: C = 1 +510 ns P1(a||b):: C = 1 +510 ns P2(a||b):: C = 0 +514 ns P1(a&&b):: C = 0 +514 ns P2(a&&b):: C = 1 +516 ns P1(a||b):: C = 1 +516 ns P2(a||b):: C = 0 +520 ns P1(a&&b):: C = 0 +520 ns P2(a&&b):: C = 1 +522 ns P1(a||b):: C = 1 +522 ns P2(a||b):: C = 0 +526 ns P1(a&&b):: C = 1 +526 ns P2(a&&b):: C = 0 +528 ns P1(a||b):: C = 1 +528 ns P2(a||b):: C = 0 +532 ns P1(a&&b):: C = 0 +532 ns P2(a&&b):: C = 1 +534 ns P1(a||b):: C = 1 +534 ns P2(a||b):: C = 0 +538 ns P1(a&&b):: C = 1 +538 ns P2(a&&b):: C = 0 +540 ns P1(a||b):: C = 1 +540 ns P2(a||b):: C = 0 +544 ns P1(a&&b):: C = 0 +544 ns P2(a&&b):: C = 1 +546 ns P1(a||b):: C = 0 +546 ns P2(a||b):: C = 1 +550 ns P1(a&&b):: C = 0 +550 ns P2(a&&b):: C = 1 +552 ns P1(a||b):: C = 1 +552 ns P2(a||b):: C = 0 +556 ns P1(a&&b):: C = 1 +556 ns P2(a&&b):: C = 0 +558 ns P1(a||b):: C = 0 +558 ns P2(a||b):: C = 1 +562 ns P1(a&&b):: C = 0 +562 ns P2(a&&b):: C = 1 +564 ns P1(a||b):: C = 0 +564 ns P2(a||b):: C = 1 +568 ns P1(a&&b):: C = 1 +568 ns P2(a&&b):: C = 0 +570 ns P1(a||b):: C = 1 +570 ns P2(a||b):: C = 0 +574 ns P1(a&&b):: C = 1 +574 ns P2(a&&b):: C = 0 +576 ns P1(a||b):: C = 1 +576 ns P2(a||b):: C = 0 +580 ns P1(a&&b):: C = 0 +580 ns P2(a&&b):: C = 1 +582 ns P1(a||b):: C = 1 +582 ns P2(a||b):: C = 0 +586 ns P1(a&&b):: C = 0 +586 ns P2(a&&b):: C = 1 +588 ns P1(a||b):: C = 1 +588 ns P2(a||b):: C = 0 +592 ns P1(a&&b):: C = 0 +592 ns P2(a&&b):: C = 1 +594 ns P1(a||b):: C = 0 +594 ns P2(a||b):: C = 1 +598 ns P1(a&&b):: C = 1 +598 ns P2(a&&b):: C = 0 +600 ns P1(a||b):: C = 1 +600 ns P2(a||b):: C = 0 +604 ns P1(a&&b):: C = 1 +604 ns P2(a&&b):: C = 0 +606 ns P1(a||b):: C = 1 +606 ns P2(a||b):: C = 0 +610 ns P1(a&&b):: C = 0 +610 ns P2(a&&b):: C = 1 +612 ns P1(a||b):: C = 0 +612 ns P2(a||b):: C = 1 +616 ns P1(a&&b):: C = 0 +616 ns P2(a&&b):: C = 1 +618 ns P1(a||b):: C = 1 +618 ns P2(a||b):: C = 0 +622 ns P1(a&&b):: C = 0 +622 ns P2(a&&b):: C = 1 +624 ns P1(a||b):: C = 0 +624 ns P2(a||b):: C = 1 +628 ns P1(a&&b):: C = 0 +628 ns P2(a&&b):: C = 1 +630 ns P1(a||b):: C = 0 +630 ns P2(a||b):: C = 1 +634 ns P1(a&&b):: C = 0 +634 ns P2(a&&b):: C = 1 +636 ns P1(a||b):: C = 1 +636 ns P2(a||b):: C = 0 +640 ns P1(a&&b):: C = 0 +640 ns P2(a&&b):: C = 1 +642 ns P1(a||b):: C = 1 +642 ns P2(a||b):: C = 0 +646 ns P1(a&&b):: C = 0 +646 ns P2(a&&b):: C = 1 +648 ns P1(a||b):: C = 0 +648 ns P2(a||b):: C = 1 +652 ns P1(a&&b):: C = 0 +652 ns P2(a&&b):: C = 1 +654 ns P1(a||b):: C = 1 +654 ns P2(a||b):: C = 0 +658 ns P1(a&&b):: C = 0 +658 ns P2(a&&b):: C = 1 +660 ns P1(a||b):: C = 1 +660 ns P2(a||b):: C = 0 +664 ns P1(a&&b):: C = 0 +664 ns P2(a&&b):: C = 1 +666 ns P1(a||b):: C = 0 +666 ns P2(a||b):: C = 1 +670 ns P1(a&&b):: C = 0 +670 ns P2(a&&b):: C = 1 +672 ns P1(a||b):: C = 1 +672 ns P2(a||b):: C = 0 +676 ns P1(a&&b):: C = 0 +676 ns P2(a&&b):: C = 1 +678 ns P1(a||b):: C = 1 +678 ns P2(a||b):: C = 0 +682 ns P1(a&&b):: C = 0 +682 ns P2(a&&b):: C = 1 +684 ns P1(a||b):: C = 1 +684 ns P2(a||b):: C = 0 +688 ns P1(a&&b):: C = 1 +688 ns P2(a&&b):: C = 0 +690 ns P1(a||b):: C = 0 +690 ns P2(a||b):: C = 1 +694 ns P1(a&&b):: C = 1 +694 ns P2(a&&b):: C = 0 +696 ns P1(a||b):: C = 1 +696 ns P2(a||b):: C = 0 +700 ns P1(a&&b):: C = 0 +700 ns P2(a&&b):: C = 1 +702 ns P1(a||b):: C = 0 +702 ns P2(a||b):: C = 1 +706 ns P1(a&&b):: C = 0 +706 ns P2(a&&b):: C = 1 +708 ns P1(a||b):: C = 1 +708 ns P2(a||b):: C = 0 +712 ns P1(a&&b):: C = 0 +712 ns P2(a&&b):: C = 1 +714 ns P1(a||b):: C = 1 +714 ns P2(a||b):: C = 0 +718 ns P1(a&&b):: C = 0 +718 ns P2(a&&b):: C = 1 +720 ns P1(a||b):: C = 1 +720 ns P2(a||b):: C = 0 +724 ns P1(a&&b):: C = 0 +724 ns P2(a&&b):: C = 1 +726 ns P1(a||b):: C = 1 +726 ns P2(a||b):: C = 0 +730 ns P1(a&&b):: C = 0 +730 ns P2(a&&b):: C = 1 +732 ns P1(a||b):: C = 1 +732 ns P2(a||b):: C = 0 +736 ns P1(a&&b):: C = 0 +736 ns P2(a&&b):: C = 1 +738 ns P1(a||b):: C = 1 +738 ns P2(a||b):: C = 0 +742 ns P1(a&&b):: C = 0 +742 ns P2(a&&b):: C = 1 +744 ns P1(a||b):: C = 1 +744 ns P2(a||b):: C = 0 +748 ns P1(a&&b):: C = 0 +748 ns P2(a&&b):: C = 1 +750 ns P1(a||b):: C = 1 +750 ns P2(a||b):: C = 0 +754 ns P1(a&&b):: C = 0 +754 ns P2(a&&b):: C = 1 +756 ns P1(a||b):: C = 0 +756 ns P2(a||b):: C = 1 +760 ns P1(a&&b):: C = 0 +760 ns P2(a&&b):: C = 1 +762 ns P1(a||b):: C = 1 +762 ns P2(a||b):: C = 0 +766 ns P1(a&&b):: C = 1 +766 ns P2(a&&b):: C = 0 +768 ns P1(a||b):: C = 1 +768 ns P2(a||b):: C = 0 +772 ns P1(a&&b):: C = 0 +772 ns P2(a&&b):: C = 1 +774 ns P1(a||b):: C = 0 +774 ns P2(a||b):: C = 1 +778 ns P1(a&&b):: C = 0 +778 ns P2(a&&b):: C = 1 +780 ns P1(a||b):: C = 1 +780 ns P2(a||b):: C = 0 +784 ns P1(a&&b):: C = 0 +784 ns P2(a&&b):: C = 1 +786 ns P1(a||b):: C = 0 +786 ns P2(a||b):: C = 1 +790 ns P1(a&&b):: C = 1 +790 ns P2(a&&b):: C = 0 +792 ns P1(a||b):: C = 1 +792 ns P2(a||b):: C = 0 +796 ns P1(a&&b):: C = 1 +796 ns P2(a&&b):: C = 0 +798 ns P1(a||b):: C = 1 +798 ns P2(a||b):: C = 0 +802 ns P1(a&&b):: C = 0 +802 ns P2(a&&b):: C = 1 +804 ns P1(a||b):: C = 1 +804 ns P2(a||b):: C = 0 +808 ns P1(a&&b):: C = 1 +808 ns P2(a&&b):: C = 0 +810 ns P1(a||b):: C = 1 +810 ns P2(a||b):: C = 0 +814 ns P1(a&&b):: C = 0 +814 ns P2(a&&b):: C = 1 +816 ns P1(a||b):: C = 1 +816 ns P2(a||b):: C = 0 +820 ns P1(a&&b):: C = 0 +820 ns P2(a&&b):: C = 1 +822 ns P1(a||b):: C = 1 +822 ns P2(a||b):: C = 0 +826 ns P1(a&&b):: C = 0 +826 ns P2(a&&b):: C = 1 +828 ns P1(a||b):: C = 1 +828 ns P2(a||b):: C = 0 +832 ns P1(a&&b):: C = 0 +832 ns P2(a&&b):: C = 1 +834 ns P1(a||b):: C = 1 +834 ns P2(a||b):: C = 0 +838 ns P1(a&&b):: C = 0 +838 ns P2(a&&b):: C = 1 +840 ns P1(a||b):: C = 0 +840 ns P2(a||b):: C = 1 +844 ns P1(a&&b):: C = 0 +844 ns P2(a&&b):: C = 1 +846 ns P1(a||b):: C = 1 +846 ns P2(a||b):: C = 0 +850 ns P1(a&&b):: C = 0 +850 ns P2(a&&b):: C = 1 +852 ns P1(a||b):: C = 1 +852 ns P2(a||b):: C = 0 +856 ns P1(a&&b):: C = 0 +856 ns P2(a&&b):: C = 1 +858 ns P1(a||b):: C = 1 +858 ns P2(a||b):: C = 0 +862 ns P1(a&&b):: C = 1 +862 ns P2(a&&b):: C = 0 +864 ns P1(a||b):: C = 0 +864 ns P2(a||b):: C = 1 +868 ns P1(a&&b):: C = 0 +868 ns P2(a&&b):: C = 1 +870 ns P1(a||b):: C = 0 +870 ns P2(a||b):: C = 1 +874 ns P1(a&&b):: C = 0 +874 ns P2(a&&b):: C = 1 +876 ns P1(a||b):: C = 1 +876 ns P2(a||b):: C = 0 +880 ns P1(a&&b):: C = 0 +880 ns P2(a&&b):: C = 1 +882 ns P1(a||b):: C = 1 +882 ns P2(a||b):: C = 0 +886 ns P1(a&&b):: C = 0 +886 ns P2(a&&b):: C = 1 +888 ns P1(a||b):: C = 1 +888 ns P2(a||b):: C = 0 +892 ns P1(a&&b):: C = 0 +892 ns P2(a&&b):: C = 1 +894 ns P1(a||b):: C = 1 +894 ns P2(a||b):: C = 0 +898 ns P1(a&&b):: C = 0 +898 ns P2(a&&b):: C = 1 +900 ns P1(a||b):: C = 1 +900 ns P2(a||b):: C = 0 +904 ns P1(a&&b):: C = 0 +904 ns P2(a&&b):: C = 1 +906 ns P1(a||b):: C = 1 +906 ns P2(a||b):: C = 0 +910 ns P1(a&&b):: C = 0 +910 ns P2(a&&b):: C = 1 +912 ns P1(a||b):: C = 0 +912 ns P2(a||b):: C = 1 +916 ns P1(a&&b):: C = 0 +916 ns P2(a&&b):: C = 1 +918 ns P1(a||b):: C = 1 +918 ns P2(a||b):: C = 0 +922 ns P1(a&&b):: C = 0 +922 ns P2(a&&b):: C = 1 +924 ns P1(a||b):: C = 1 +924 ns P2(a||b):: C = 0 +928 ns P1(a&&b):: C = 0 +928 ns P2(a&&b):: C = 1 +930 ns P1(a||b):: C = 0 +930 ns P2(a||b):: C = 1 +934 ns P1(a&&b):: C = 0 +934 ns P2(a&&b):: C = 1 +936 ns P1(a||b):: C = 1 +936 ns P2(a||b):: C = 0 +940 ns P1(a&&b):: C = 1 +940 ns P2(a&&b):: C = 0 +942 ns P1(a||b):: C = 1 +942 ns P2(a||b):: C = 0 +946 ns P1(a&&b):: C = 0 +946 ns P2(a&&b):: C = 1 +948 ns P1(a||b):: C = 0 +948 ns P2(a||b):: C = 1 +952 ns P1(a&&b):: C = 1 +952 ns P2(a&&b):: C = 0 +954 ns P1(a||b):: C = 0 +954 ns P2(a||b):: C = 1 +958 ns P1(a&&b):: C = 0 +958 ns P2(a&&b):: C = 1 +960 ns P1(a||b):: C = 1 +960 ns P2(a||b):: C = 0 +964 ns P1(a&&b):: C = 0 +964 ns P2(a&&b):: C = 1 +966 ns P1(a||b):: C = 1 +966 ns P2(a||b):: C = 0 +970 ns P1(a&&b):: C = 0 +970 ns P2(a&&b):: C = 1 +972 ns P1(a||b):: C = 1 +972 ns P2(a||b):: C = 0 +976 ns P1(a&&b):: C = 0 +976 ns P2(a&&b):: C = 1 +978 ns P1(a||b):: C = 1 +978 ns P2(a||b):: C = 0 +982 ns P1(a&&b):: C = 0 +982 ns P2(a&&b):: C = 1 +984 ns P1(a||b):: C = 1 +984 ns P2(a||b):: C = 0 +988 ns P1(a&&b):: C = 0 +988 ns P2(a&&b):: C = 1 +990 ns P1(a||b):: C = 0 +990 ns P2(a||b):: C = 1 +994 ns P1(a&&b):: C = 0 +994 ns P2(a&&b):: C = 1 +996 ns P1(a||b):: C = 1 +996 ns P2(a||b):: C = 0 +1 us P1(a&&b):: C = 0 +1 us P2(a&&b):: C = 1 +1002 ns P1(a||b):: C = 0 +1002 ns P2(a||b):: C = 1 +1006 ns P1(a&&b):: C = 0 +1006 ns P2(a&&b):: C = 1 +1008 ns P1(a||b):: C = 1 +1008 ns P2(a||b):: C = 0 +1012 ns P1(a&&b):: C = 0 +1012 ns P2(a&&b):: C = 1 +1014 ns P1(a||b):: C = 1 +1014 ns P2(a||b):: C = 0 +1018 ns P1(a&&b):: C = 0 +1018 ns P2(a&&b):: C = 1 +1020 ns P1(a||b):: C = 1 +1020 ns P2(a||b):: C = 0 +1024 ns P1(a&&b):: C = 0 +1024 ns P2(a&&b):: C = 1 +1026 ns P1(a||b):: C = 1 +1026 ns P2(a||b):: C = 0 +1030 ns P1(a&&b):: C = 0 +1030 ns P2(a&&b):: C = 1 +1032 ns P1(a||b):: C = 1 +1032 ns P2(a||b):: C = 0 +1036 ns P1(a&&b):: C = 1 +1036 ns P2(a&&b):: C = 0 +1038 ns P1(a||b):: C = 1 +1038 ns P2(a||b):: C = 0 +1042 ns P1(a&&b):: C = 0 +1042 ns P2(a&&b):: C = 1 +1044 ns P1(a||b):: C = 1 +1044 ns P2(a||b):: C = 0 +1048 ns P1(a&&b):: C = 0 +1048 ns P2(a&&b):: C = 1 +1050 ns P1(a||b):: C = 1 +1050 ns P2(a||b):: C = 0 +1054 ns P1(a&&b):: C = 0 +1054 ns P2(a&&b):: C = 1 +1056 ns P1(a||b):: C = 0 +1056 ns P2(a||b):: C = 1 +1060 ns P1(a&&b):: C = 0 +1060 ns P2(a&&b):: C = 1 +1062 ns P1(a||b):: C = 1 +1062 ns P2(a||b):: C = 0 +1066 ns P1(a&&b):: C = 0 +1066 ns P2(a&&b):: C = 1 +1068 ns P1(a||b):: C = 1 +1068 ns P2(a||b):: C = 0 +1072 ns P1(a&&b):: C = 0 +1072 ns P2(a&&b):: C = 1 +1074 ns P1(a||b):: C = 0 +1074 ns P2(a||b):: C = 1 +1078 ns P1(a&&b):: C = 0 +1078 ns P2(a&&b):: C = 1 +1080 ns P1(a||b):: C = 0 +1080 ns P2(a||b):: C = 1 +1084 ns P1(a&&b):: C = 1 +1084 ns P2(a&&b):: C = 0 +1086 ns P1(a||b):: C = 0 +1086 ns P2(a||b):: C = 1 +1090 ns P1(a&&b):: C = 1 +1090 ns P2(a&&b):: C = 0 +1092 ns P1(a||b):: C = 1 +1092 ns P2(a||b):: C = 0 +1096 ns P1(a&&b):: C = 0 +1096 ns P2(a&&b):: C = 1 +1098 ns P1(a||b):: C = 1 +1098 ns P2(a||b):: C = 0 +1102 ns P1(a&&b):: C = 0 +1102 ns P2(a&&b):: C = 1 +1104 ns P1(a||b):: C = 1 +1104 ns P2(a||b):: C = 0 +1108 ns P1(a&&b):: C = 0 +1108 ns P2(a&&b):: C = 1 +1110 ns P1(a||b):: C = 1 +1110 ns P2(a||b):: C = 0 +1114 ns P1(a&&b):: C = 0 +1114 ns P2(a&&b):: C = 1 +1116 ns P1(a||b):: C = 1 +1116 ns P2(a||b):: C = 0 +1120 ns P1(a&&b):: C = 0 +1120 ns P2(a&&b):: C = 1 +1122 ns P1(a||b):: C = 0 +1122 ns P2(a||b):: C = 1 +1126 ns P1(a&&b):: C = 0 +1126 ns P2(a&&b):: C = 1 +1128 ns P1(a||b):: C = 1 +1128 ns P2(a||b):: C = 0 +1132 ns P1(a&&b):: C = 1 +1132 ns P2(a&&b):: C = 0 +1134 ns P1(a||b):: C = 0 +1134 ns P2(a||b):: C = 1 +1138 ns P1(a&&b):: C = 1 +1138 ns P2(a&&b):: C = 0 +1140 ns P1(a||b):: C = 1 +1140 ns P2(a||b):: C = 0 +1144 ns P1(a&&b):: C = 1 +1144 ns P2(a&&b):: C = 0 +1146 ns P1(a||b):: C = 0 +1146 ns P2(a||b):: C = 1 +1150 ns P1(a&&b):: C = 1 +1150 ns P2(a&&b):: C = 0 +1152 ns P1(a||b):: C = 1 +1152 ns P2(a||b):: C = 0 +1156 ns P1(a&&b):: C = 1 +1156 ns P2(a&&b):: C = 0 +1158 ns P1(a||b):: C = 0 +1158 ns P2(a||b):: C = 1 +1162 ns P1(a&&b):: C = 0 +1162 ns P2(a&&b):: C = 1 +1164 ns P1(a||b):: C = 1 +1164 ns P2(a||b):: C = 0 +1168 ns P1(a&&b):: C = 0 +1168 ns P2(a&&b):: C = 1 +1170 ns P1(a||b):: C = 0 +1170 ns P2(a||b):: C = 1 +1174 ns P1(a&&b):: C = 0 +1174 ns P2(a&&b):: C = 1 +1176 ns P1(a||b):: C = 1 +1176 ns P2(a||b):: C = 0 +1180 ns P1(a&&b):: C = 1 +1180 ns P2(a&&b):: C = 0 +1182 ns P1(a||b):: C = 1 +1182 ns P2(a||b):: C = 0 +1186 ns P1(a&&b):: C = 0 +1186 ns P2(a&&b):: C = 1 +1188 ns P1(a||b):: C = 1 +1188 ns P2(a||b):: C = 0 +1192 ns P1(a&&b):: C = 0 +1192 ns P2(a&&b):: C = 1 +1194 ns P1(a||b):: C = 1 +1194 ns P2(a||b):: C = 0 +1198 ns P1(a&&b):: C = 0 +1198 ns P2(a&&b):: C = 1 +1200 ns P1(a||b):: C = 1 +1200 ns P2(a||b):: C = 0 +1204 ns P1(a&&b):: C = 0 +1204 ns P2(a&&b):: C = 1 +1206 ns P1(a||b):: C = 1 +1206 ns P2(a||b):: C = 0 +1210 ns P1(a&&b):: C = 0 +1210 ns P2(a&&b):: C = 1 +1212 ns P1(a||b):: C = 1 +1212 ns P2(a||b):: C = 0 +1216 ns P1(a&&b):: C = 0 +1216 ns P2(a&&b):: C = 1 +1218 ns P1(a||b):: C = 1 +1218 ns P2(a||b):: C = 0 +1222 ns P1(a&&b):: C = 0 +1222 ns P2(a&&b):: C = 1 +1224 ns P1(a||b):: C = 1 +1224 ns P2(a||b):: C = 0 +1228 ns P1(a&&b):: C = 1 +1228 ns P2(a&&b):: C = 0 +1230 ns P1(a||b):: C = 1 +1230 ns P2(a||b):: C = 0 +1234 ns P1(a&&b):: C = 1 +1234 ns P2(a&&b):: C = 0 +1236 ns P1(a||b):: C = 1 +1236 ns P2(a||b):: C = 0 +1240 ns P1(a&&b):: C = 0 +1240 ns P2(a&&b):: C = 1 +1242 ns P1(a||b):: C = 0 +1242 ns P2(a||b):: C = 1 +1246 ns P1(a&&b):: C = 1 +1246 ns P2(a&&b):: C = 0 +1248 ns P1(a||b):: C = 1 +1248 ns P2(a||b):: C = 0 +1252 ns P1(a&&b):: C = 1 +1252 ns P2(a&&b):: C = 0 +1254 ns P1(a||b):: C = 1 +1254 ns P2(a||b):: C = 0 +1258 ns P1(a&&b):: C = 0 +1258 ns P2(a&&b):: C = 1 +1260 ns P1(a||b):: C = 1 +1260 ns P2(a||b):: C = 0 +1264 ns P1(a&&b):: C = 0 +1264 ns P2(a&&b):: C = 1 +1266 ns P1(a||b):: C = 1 +1266 ns P2(a||b):: C = 0 +1270 ns P1(a&&b):: C = 0 +1270 ns P2(a&&b):: C = 1 +1272 ns P1(a||b):: C = 1 +1272 ns P2(a||b):: C = 0 +1276 ns P1(a&&b):: C = 0 +1276 ns P2(a&&b):: C = 1 +1278 ns P1(a||b):: C = 1 +1278 ns P2(a||b):: C = 0 +1282 ns P1(a&&b):: C = 0 +1282 ns P2(a&&b):: C = 1 +1284 ns P1(a||b):: C = 1 +1284 ns P2(a||b):: C = 0 +1288 ns P1(a&&b):: C = 0 +1288 ns P2(a&&b):: C = 1 +1290 ns P1(a||b):: C = 1 +1290 ns P2(a||b):: C = 0 +1294 ns P1(a&&b):: C = 0 +1294 ns P2(a&&b):: C = 1 +1296 ns P1(a||b):: C = 1 +1296 ns P2(a||b):: C = 0 +1300 ns P1(a&&b):: C = 0 +1300 ns P2(a&&b):: C = 1 +1302 ns P1(a||b):: C = 0 +1302 ns P2(a||b):: C = 1 +1306 ns P1(a&&b):: C = 0 +1306 ns P2(a&&b):: C = 1 +1308 ns P1(a||b):: C = 1 +1308 ns P2(a||b):: C = 0 +1312 ns P1(a&&b):: C = 0 +1312 ns P2(a&&b):: C = 1 +1314 ns P1(a||b):: C = 1 +1314 ns P2(a||b):: C = 0 +1318 ns P1(a&&b):: C = 0 +1318 ns P2(a&&b):: C = 1 +1320 ns P1(a||b):: C = 1 +1320 ns P2(a||b):: C = 0 +1324 ns P1(a&&b):: C = 0 +1324 ns P2(a&&b):: C = 1 +1326 ns P1(a||b):: C = 1 +1326 ns P2(a||b):: C = 0 +1330 ns P1(a&&b):: C = 0 +1330 ns P2(a&&b):: C = 1 +1332 ns P1(a||b):: C = 0 +1332 ns P2(a||b):: C = 1 +1336 ns P1(a&&b):: C = 0 +1336 ns P2(a&&b):: C = 1 +1338 ns P1(a||b):: C = 0 +1338 ns P2(a||b):: C = 1 +1342 ns P1(a&&b):: C = 0 +1342 ns P2(a&&b):: C = 1 +1344 ns P1(a||b):: C = 1 +1344 ns P2(a||b):: C = 0 +1348 ns P1(a&&b):: C = 0 +1348 ns P2(a&&b):: C = 1 +1350 ns P1(a||b):: C = 1 +1350 ns P2(a||b):: C = 0 +1354 ns P1(a&&b):: C = 1 +1354 ns P2(a&&b):: C = 0 +1356 ns P1(a||b):: C = 1 +1356 ns P2(a||b):: C = 0 +1360 ns P1(a&&b):: C = 0 +1360 ns P2(a&&b):: C = 1 +1362 ns P1(a||b):: C = 1 +1362 ns P2(a||b):: C = 0 +1366 ns P1(a&&b):: C = 0 +1366 ns P2(a&&b):: C = 1 +1368 ns P1(a||b):: C = 1 +1368 ns P2(a||b):: C = 0 +1372 ns P1(a&&b):: C = 0 +1372 ns P2(a&&b):: C = 1 +1374 ns P1(a||b):: C = 0 +1374 ns P2(a||b):: C = 1 +1378 ns P1(a&&b):: C = 0 +1378 ns P2(a&&b):: C = 1 +1380 ns P1(a||b):: C = 1 +1380 ns P2(a||b):: C = 0 +1384 ns P1(a&&b):: C = 0 +1384 ns P2(a&&b):: C = 1 +1386 ns P1(a||b):: C = 1 +1386 ns P2(a||b):: C = 0 +1390 ns P1(a&&b):: C = 1 +1390 ns P2(a&&b):: C = 0 +1392 ns P1(a||b):: C = 1 +1392 ns P2(a||b):: C = 0 +1396 ns P1(a&&b):: C = 0 +1396 ns P2(a&&b):: C = 1 +1398 ns P1(a||b):: C = 1 +1398 ns P2(a||b):: C = 0 +1402 ns P1(a&&b):: C = 0 +1402 ns P2(a&&b):: C = 1 +1404 ns P1(a||b):: C = 1 +1404 ns P2(a||b):: C = 0 +1408 ns P1(a&&b):: C = 1 +1408 ns P2(a&&b):: C = 0 +1410 ns P1(a||b):: C = 1 +1410 ns P2(a||b):: C = 0 +1414 ns P1(a&&b):: C = 1 +1414 ns P2(a&&b):: C = 0 +1416 ns P1(a||b):: C = 1 +1416 ns P2(a||b):: C = 0 +1420 ns P1(a&&b):: C = 0 +1420 ns P2(a&&b):: C = 1 +1422 ns P1(a||b):: C = 1 +1422 ns P2(a||b):: C = 0 +1426 ns P1(a&&b):: C = 0 +1426 ns P2(a&&b):: C = 1 +1428 ns P1(a||b):: C = 1 +1428 ns P2(a||b):: C = 0 +1432 ns P1(a&&b):: C = 0 +1432 ns P2(a&&b):: C = 1 +1434 ns P1(a||b):: C = 1 +1434 ns P2(a||b):: C = 0 +1438 ns P1(a&&b):: C = 0 +1438 ns P2(a&&b):: C = 1 +1440 ns P1(a||b):: C = 0 +1440 ns P2(a||b):: C = 1 +1444 ns P1(a&&b):: C = 0 +1444 ns P2(a&&b):: C = 1 +1446 ns P1(a||b):: C = 1 +1446 ns P2(a||b):: C = 0 +1450 ns P1(a&&b):: C = 0 +1450 ns P2(a&&b):: C = 1 +1452 ns P1(a||b):: C = 0 +1452 ns P2(a||b):: C = 1 +1456 ns P1(a&&b):: C = 0 +1456 ns P2(a&&b):: C = 1 +1458 ns P1(a||b):: C = 1 +1458 ns P2(a||b):: C = 0 +1462 ns P1(a&&b):: C = 0 +1462 ns P2(a&&b):: C = 1 +1464 ns P1(a||b):: C = 1 +1464 ns P2(a||b):: C = 0 +1468 ns P1(a&&b):: C = 1 +1468 ns P2(a&&b):: C = 0 +1470 ns P1(a||b):: C = 1 +1470 ns P2(a||b):: C = 0 +1474 ns P1(a&&b):: C = 0 +1474 ns P2(a&&b):: C = 1 +1476 ns P1(a||b):: C = 0 +1476 ns P2(a||b):: C = 1 +1480 ns P1(a&&b):: C = 1 +1480 ns P2(a&&b):: C = 0 +1482 ns P1(a||b):: C = 1 +1482 ns P2(a||b):: C = 0 +1486 ns P1(a&&b):: C = 0 +1486 ns P2(a&&b):: C = 1 +1488 ns P1(a||b):: C = 1 +1488 ns P2(a||b):: C = 0 +1492 ns P1(a&&b):: C = 0 +1492 ns P2(a&&b):: C = 1 +1494 ns P1(a||b):: C = 1 +1494 ns P2(a||b):: C = 0 +1498 ns P1(a&&b):: C = 1 +1498 ns P2(a&&b):: C = 0 +1500 ns P1(a||b):: C = 1 +1500 ns P2(a||b):: C = 0 +1504 ns P1(a&&b):: C = 1 +1504 ns P2(a&&b):: C = 0 +1506 ns P1(a||b):: C = 1 +1506 ns P2(a||b):: C = 0 +1510 ns P1(a&&b):: C = 0 +1510 ns P2(a&&b):: C = 1 +1512 ns P1(a||b):: C = 1 +1512 ns P2(a||b):: C = 0 +1516 ns P1(a&&b):: C = 0 +1516 ns P2(a&&b):: C = 1 +1518 ns P1(a||b):: C = 1 +1518 ns P2(a||b):: C = 0 +1522 ns P1(a&&b):: C = 0 +1522 ns P2(a&&b):: C = 1 +1524 ns P1(a||b):: C = 1 +1524 ns P2(a||b):: C = 0 +1528 ns P1(a&&b):: C = 1 +1528 ns P2(a&&b):: C = 0 +1530 ns P1(a||b):: C = 1 +1530 ns P2(a||b):: C = 0 +1534 ns P1(a&&b):: C = 1 +1534 ns P2(a&&b):: C = 0 +1536 ns P1(a||b):: C = 1 +1536 ns P2(a||b):: C = 0 +1540 ns P1(a&&b):: C = 1 +1540 ns P2(a&&b):: C = 0 +1542 ns P1(a||b):: C = 0 +1542 ns P2(a||b):: C = 1 +1546 ns P1(a&&b):: C = 0 +1546 ns P2(a&&b):: C = 1 +1548 ns P1(a||b):: C = 1 +1548 ns P2(a||b):: C = 0 +1552 ns P1(a&&b):: C = 0 +1552 ns P2(a&&b):: C = 1 +1554 ns P1(a||b):: C = 0 +1554 ns P2(a||b):: C = 1 +1558 ns P1(a&&b):: C = 0 +1558 ns P2(a&&b):: C = 1 +1560 ns P1(a||b):: C = 1 +1560 ns P2(a||b):: C = 0 +1564 ns P1(a&&b):: C = 0 +1564 ns P2(a&&b):: C = 1 +1566 ns P1(a||b):: C = 1 +1566 ns P2(a||b):: C = 0 +1570 ns P1(a&&b):: C = 0 +1570 ns P2(a&&b):: C = 1 +1572 ns P1(a||b):: C = 1 +1572 ns P2(a||b):: C = 0 +1576 ns P1(a&&b):: C = 1 +1576 ns P2(a&&b):: C = 0 +1578 ns P1(a||b):: C = 1 +1578 ns P2(a||b):: C = 0 +1582 ns P1(a&&b):: C = 0 +1582 ns P2(a&&b):: C = 1 +1584 ns P1(a||b):: C = 1 +1584 ns P2(a||b):: C = 0 +1588 ns P1(a&&b):: C = 0 +1588 ns P2(a&&b):: C = 1 +1590 ns P1(a||b):: C = 1 +1590 ns P2(a||b):: C = 0 +1594 ns P1(a&&b):: C = 0 +1594 ns P2(a&&b):: C = 1 +1596 ns P1(a||b):: C = 1 +1596 ns P2(a||b):: C = 0 +1600 ns P1(a&&b):: C = 0 +1600 ns P2(a&&b):: C = 1 +1602 ns P1(a||b):: C = 1 +1602 ns P2(a||b):: C = 0 +1606 ns P1(a&&b):: C = 1 +1606 ns P2(a&&b):: C = 0 +1608 ns P1(a||b):: C = 1 +1608 ns P2(a||b):: C = 0 +1612 ns P1(a&&b):: C = 1 +1612 ns P2(a&&b):: C = 0 +1614 ns P1(a||b):: C = 0 +1614 ns P2(a||b):: C = 1 +1618 ns P1(a&&b):: C = 1 +1618 ns P2(a&&b):: C = 0 +1620 ns P1(a||b):: C = 1 +1620 ns P2(a||b):: C = 0 +1624 ns P1(a&&b):: C = 0 +1624 ns P2(a&&b):: C = 1 +1626 ns P1(a||b):: C = 0 +1626 ns P2(a||b):: C = 1 +1630 ns P1(a&&b):: C = 0 +1630 ns P2(a&&b):: C = 1 +1632 ns P1(a||b):: C = 1 +1632 ns P2(a||b):: C = 0 +1636 ns P1(a&&b):: C = 0 +1636 ns P2(a&&b):: C = 1 +1638 ns P1(a||b):: C = 0 +1638 ns P2(a||b):: C = 1 +1642 ns P1(a&&b):: C = 1 +1642 ns P2(a&&b):: C = 0 +1644 ns P1(a||b):: C = 0 +1644 ns P2(a||b):: C = 1 +1648 ns P1(a&&b):: C = 0 +1648 ns P2(a&&b):: C = 1 +1650 ns P1(a||b):: C = 0 +1650 ns P2(a||b):: C = 1 +1654 ns P1(a&&b):: C = 0 +1654 ns P2(a&&b):: C = 1 +1656 ns P1(a||b):: C = 0 +1656 ns P2(a||b):: C = 1 +1660 ns P1(a&&b):: C = 1 +1660 ns P2(a&&b):: C = 0 +1662 ns P1(a||b):: C = 1 +1662 ns P2(a||b):: C = 0 +1666 ns P1(a&&b):: C = 1 +1666 ns P2(a&&b):: C = 0 +1668 ns P1(a||b):: C = 1 +1668 ns P2(a||b):: C = 0 +1672 ns P1(a&&b):: C = 0 +1672 ns P2(a&&b):: C = 1 +1674 ns P1(a||b):: C = 0 +1674 ns P2(a||b):: C = 1 +1678 ns P1(a&&b):: C = 0 +1678 ns P2(a&&b):: C = 1 +1680 ns P1(a||b):: C = 1 +1680 ns P2(a||b):: C = 0 +1684 ns P1(a&&b):: C = 1 +1684 ns P2(a&&b):: C = 0 +1686 ns P1(a||b):: C = 1 +1686 ns P2(a||b):: C = 0 +1690 ns P1(a&&b):: C = 0 +1690 ns P2(a&&b):: C = 1 +1692 ns P1(a||b):: C = 1 +1692 ns P2(a||b):: C = 0 +1696 ns P1(a&&b):: C = 0 +1696 ns P2(a&&b):: C = 1 +1698 ns P1(a||b):: C = 1 +1698 ns P2(a||b):: C = 0 +1702 ns P1(a&&b):: C = 1 +1702 ns P2(a&&b):: C = 0 +1704 ns P1(a||b):: C = 1 +1704 ns P2(a||b):: C = 0 +1708 ns P1(a&&b):: C = 0 +1708 ns P2(a&&b):: C = 1 +1710 ns P1(a||b):: C = 1 +1710 ns P2(a||b):: C = 0 +1714 ns P1(a&&b):: C = 0 +1714 ns P2(a&&b):: C = 1 +1716 ns P1(a||b):: C = 1 +1716 ns P2(a||b):: C = 0 +1720 ns P1(a&&b):: C = 0 +1720 ns P2(a&&b):: C = 1 +1722 ns P1(a||b):: C = 1 +1722 ns P2(a||b):: C = 0 +1726 ns P1(a&&b):: C = 0 +1726 ns P2(a&&b):: C = 1 +1728 ns P1(a||b):: C = 1 +1728 ns P2(a||b):: C = 0 +1732 ns P1(a&&b):: C = 1 +1732 ns P2(a&&b):: C = 0 +1734 ns P1(a||b):: C = 0 +1734 ns P2(a||b):: C = 1 +1738 ns P1(a&&b):: C = 0 +1738 ns P2(a&&b):: C = 1 +1740 ns P1(a||b):: C = 1 +1740 ns P2(a||b):: C = 0 +1744 ns P1(a&&b):: C = 1 +1744 ns P2(a&&b):: C = 0 +1746 ns P1(a||b):: C = 1 +1746 ns P2(a||b):: C = 0 +1750 ns P1(a&&b):: C = 0 +1750 ns P2(a&&b):: C = 1 +1752 ns P1(a||b):: C = 1 +1752 ns P2(a||b):: C = 0 +1756 ns P1(a&&b):: C = 0 +1756 ns P2(a&&b):: C = 1 +1758 ns P1(a||b):: C = 1 +1758 ns P2(a||b):: C = 0 +1762 ns P1(a&&b):: C = 0 +1762 ns P2(a&&b):: C = 1 +1764 ns P1(a||b):: C = 1 +1764 ns P2(a||b):: C = 0 +1768 ns P1(a&&b):: C = 0 +1768 ns P2(a&&b):: C = 1 +1770 ns P1(a||b):: C = 1 +1770 ns P2(a||b):: C = 0 +1774 ns P1(a&&b):: C = 1 +1774 ns P2(a&&b):: C = 0 +1776 ns P1(a||b):: C = 1 +1776 ns P2(a||b):: C = 0 +1780 ns P1(a&&b):: C = 0 +1780 ns P2(a&&b):: C = 1 +1782 ns P1(a||b):: C = 1 +1782 ns P2(a||b):: C = 0 +1786 ns P1(a&&b):: C = 0 +1786 ns P2(a&&b):: C = 1 +1788 ns P1(a||b):: C = 1 +1788 ns P2(a||b):: C = 0 +1792 ns P1(a&&b):: C = 0 +1792 ns P2(a&&b):: C = 1 +1794 ns P1(a||b):: C = 1 +1794 ns P2(a||b):: C = 0 +1798 ns P1(a&&b):: C = 0 +1798 ns P2(a&&b):: C = 1 +1800 ns P1(a||b):: C = 1 +1800 ns P2(a||b):: C = 0 +1804 ns P1(a&&b):: C = 1 +1804 ns P2(a&&b):: C = 0 +1806 ns P1(a||b):: C = 0 +1806 ns P2(a||b):: C = 1 +1810 ns P1(a&&b):: C = 1 +1810 ns P2(a&&b):: C = 0 +1812 ns P1(a||b):: C = 0 +1812 ns P2(a||b):: C = 1 +1816 ns P1(a&&b):: C = 0 +1816 ns P2(a&&b):: C = 1 +1818 ns P1(a||b):: C = 1 +1818 ns P2(a||b):: C = 0 +1822 ns P1(a&&b):: C = 1 +1822 ns P2(a&&b):: C = 0 +1824 ns P1(a||b):: C = 0 +1824 ns P2(a||b):: C = 1 +1828 ns P1(a&&b):: C = 0 +1828 ns P2(a&&b):: C = 1 +1830 ns P1(a||b):: C = 1 +1830 ns P2(a||b):: C = 0 +1834 ns P1(a&&b):: C = 1 +1834 ns P2(a&&b):: C = 0 +1836 ns P1(a||b):: C = 0 +1836 ns P2(a||b):: C = 1 +1840 ns P1(a&&b):: C = 0 +1840 ns P2(a&&b):: C = 1 +1842 ns P1(a||b):: C = 1 +1842 ns P2(a||b):: C = 0 +1846 ns P1(a&&b):: C = 1 +1846 ns P2(a&&b):: C = 0 +1848 ns P1(a||b):: C = 0 +1848 ns P2(a||b):: C = 1 +1852 ns P1(a&&b):: C = 0 +1852 ns P2(a&&b):: C = 1 +1854 ns P1(a||b):: C = 0 +1854 ns P2(a||b):: C = 1 +1858 ns P1(a&&b):: C = 0 +1858 ns P2(a&&b):: C = 1 +1860 ns P1(a||b):: C = 1 +1860 ns P2(a||b):: C = 0 +1864 ns P1(a&&b):: C = 1 +1864 ns P2(a&&b):: C = 0 +1866 ns P1(a||b):: C = 0 +1866 ns P2(a||b):: C = 1 +1870 ns P1(a&&b):: C = 0 +1870 ns P2(a&&b):: C = 1 +1872 ns P1(a||b):: C = 1 +1872 ns P2(a||b):: C = 0 +1876 ns P1(a&&b):: C = 0 +1876 ns P2(a&&b):: C = 1 +1878 ns P1(a||b):: C = 1 +1878 ns P2(a||b):: C = 0 +1882 ns P1(a&&b):: C = 0 +1882 ns P2(a&&b):: C = 1 +1884 ns P1(a||b):: C = 1 +1884 ns P2(a||b):: C = 0 +1888 ns P1(a&&b):: C = 1 +1888 ns P2(a&&b):: C = 0 +1890 ns P1(a||b):: C = 1 +1890 ns P2(a||b):: C = 0 +1894 ns P1(a&&b):: C = 0 +1894 ns P2(a&&b):: C = 1 +1896 ns P1(a||b):: C = 1 +1896 ns P2(a||b):: C = 0 +1900 ns P1(a&&b):: C = 0 +1900 ns P2(a&&b):: C = 1 +1902 ns P1(a||b):: C = 1 +1902 ns P2(a||b):: C = 0 +1906 ns P1(a&&b):: C = 0 +1906 ns P2(a&&b):: C = 1 +1908 ns P1(a||b):: C = 1 +1908 ns P2(a||b):: C = 0 +1912 ns P1(a&&b):: C = 0 +1912 ns P2(a&&b):: C = 1 +1914 ns P1(a||b):: C = 1 +1914 ns P2(a||b):: C = 0 +1918 ns P1(a&&b):: C = 0 +1918 ns P2(a&&b):: C = 1 +1920 ns P1(a||b):: C = 1 +1920 ns P2(a||b):: C = 0 +1924 ns P1(a&&b):: C = 0 +1924 ns P2(a&&b):: C = 1 +1926 ns P1(a||b):: C = 1 +1926 ns P2(a||b):: C = 0 +1930 ns P1(a&&b):: C = 0 +1930 ns P2(a&&b):: C = 1 +1932 ns P1(a||b):: C = 1 +1932 ns P2(a||b):: C = 0 +1936 ns P1(a&&b):: C = 0 +1936 ns P2(a&&b):: C = 1 +1938 ns P1(a||b):: C = 1 +1938 ns P2(a||b):: C = 0 +1942 ns P1(a&&b):: C = 0 +1942 ns P2(a&&b):: C = 1 +1944 ns P1(a||b):: C = 1 +1944 ns P2(a||b):: C = 0 +1948 ns P1(a&&b):: C = 1 +1948 ns P2(a&&b):: C = 0 +1950 ns P1(a||b):: C = 1 +1950 ns P2(a||b):: C = 0 +1954 ns P1(a&&b):: C = 0 +1954 ns P2(a&&b):: C = 1 +1956 ns P1(a||b):: C = 1 +1956 ns P2(a||b):: C = 0 +1960 ns P1(a&&b):: C = 1 +1960 ns P2(a&&b):: C = 0 +1962 ns P1(a||b):: C = 1 +1962 ns P2(a||b):: C = 0 +1966 ns P1(a&&b):: C = 0 +1966 ns P2(a&&b):: C = 1 +1968 ns P1(a||b):: C = 1 +1968 ns P2(a||b):: C = 0 +1972 ns P1(a&&b):: C = 0 +1972 ns P2(a&&b):: C = 1 +1974 ns P1(a||b):: C = 1 +1974 ns P2(a||b):: C = 0 +1978 ns P1(a&&b):: C = 0 +1978 ns P2(a&&b):: C = 1 +1980 ns P1(a||b):: C = 1 +1980 ns P2(a||b):: C = 0 +1984 ns P1(a&&b):: C = 0 +1984 ns P2(a&&b):: C = 1 +1986 ns P1(a||b):: C = 0 +1986 ns P2(a||b):: C = 1 +1990 ns P1(a&&b):: C = 0 +1990 ns P2(a&&b):: C = 1 +1992 ns P1(a||b):: C = 1 +1992 ns P2(a||b):: C = 0 +1996 ns P1(a&&b):: C = 0 +1996 ns P2(a&&b):: C = 1 +1998 ns P1(a||b):: C = 0 +1998 ns P2(a||b):: C = 1 +2002 ns P1(a&&b):: C = 0 +2002 ns P2(a&&b):: C = 1 +2004 ns P1(a||b):: C = 1 +2004 ns P2(a||b):: C = 0 +2008 ns P1(a&&b):: C = 0 +2008 ns P2(a&&b):: C = 1 +2010 ns P1(a||b):: C = 1 +2010 ns P2(a||b):: C = 0 +2014 ns P1(a&&b):: C = 0 +2014 ns P2(a&&b):: C = 1 +2016 ns P1(a||b):: C = 1 +2016 ns P2(a||b):: C = 0 +2020 ns P1(a&&b):: C = 0 +2020 ns P2(a&&b):: C = 1 +2022 ns P1(a||b):: C = 1 +2022 ns P2(a||b):: C = 0 +2026 ns P1(a&&b):: C = 0 +2026 ns P2(a&&b):: C = 1 +2028 ns P1(a||b):: C = 1 +2028 ns P2(a||b):: C = 0 +2032 ns P1(a&&b):: C = 0 +2032 ns P2(a&&b):: C = 1 +2034 ns P1(a||b):: C = 0 +2034 ns P2(a||b):: C = 1 +2038 ns P1(a&&b):: C = 0 +2038 ns P2(a&&b):: C = 1 +2040 ns P1(a||b):: C = 0 +2040 ns P2(a||b):: C = 1 +2044 ns P1(a&&b):: C = 0 +2044 ns P2(a&&b):: C = 1 +2046 ns P1(a||b):: C = 1 +2046 ns P2(a||b):: C = 0 +2050 ns P1(a&&b):: C = 0 +2050 ns P2(a&&b):: C = 1 +2052 ns P1(a||b):: C = 1 +2052 ns P2(a||b):: C = 0 +2056 ns P1(a&&b):: C = 0 +2056 ns P2(a&&b):: C = 1 +2058 ns P1(a||b):: C = 1 +2058 ns P2(a||b):: C = 0 +2062 ns P1(a&&b):: C = 0 +2062 ns P2(a&&b):: C = 1 +2064 ns P1(a||b):: C = 1 +2064 ns P2(a||b):: C = 0 +2068 ns P1(a&&b):: C = 1 +2068 ns P2(a&&b):: C = 0 +2070 ns P1(a||b):: C = 1 +2070 ns P2(a||b):: C = 0 +2074 ns P1(a&&b):: C = 1 +2074 ns P2(a&&b):: C = 0 +2076 ns P1(a||b):: C = 1 +2076 ns P2(a||b):: C = 0 +2080 ns P1(a&&b):: C = 1 +2080 ns P2(a&&b):: C = 0 +2082 ns P1(a||b):: C = 0 +2082 ns P2(a||b):: C = 1 +2086 ns P1(a&&b):: C = 1 +2086 ns P2(a&&b):: C = 0 +2088 ns P1(a||b):: C = 1 +2088 ns P2(a||b):: C = 0 +2092 ns P1(a&&b):: C = 0 +2092 ns P2(a&&b):: C = 1 +2094 ns P1(a||b):: C = 1 +2094 ns P2(a||b):: C = 0 +2098 ns P1(a&&b):: C = 0 +2098 ns P2(a&&b):: C = 1 +2100 ns P1(a||b):: C = 1 +2100 ns P2(a||b):: C = 0 +2104 ns P1(a&&b):: C = 1 +2104 ns P2(a&&b):: C = 0 +2106 ns P1(a||b):: C = 1 +2106 ns P2(a||b):: C = 0 +2110 ns P1(a&&b):: C = 1 +2110 ns P2(a&&b):: C = 0 +2112 ns P1(a||b):: C = 1 +2112 ns P2(a||b):: C = 0 +2116 ns P1(a&&b):: C = 0 +2116 ns P2(a&&b):: C = 1 +2118 ns P1(a||b):: C = 0 +2118 ns P2(a||b):: C = 1 +2122 ns P1(a&&b):: C = 0 +2122 ns P2(a&&b):: C = 1 +2124 ns P1(a||b):: C = 1 +2124 ns P2(a||b):: C = 0 +2128 ns P1(a&&b):: C = 0 +2128 ns P2(a&&b):: C = 1 +2130 ns P1(a||b):: C = 1 +2130 ns P2(a||b):: C = 0 +2134 ns P1(a&&b):: C = 1 +2134 ns P2(a&&b):: C = 0 +2136 ns P1(a||b):: C = 0 +2136 ns P2(a||b):: C = 1 +2140 ns P1(a&&b):: C = 0 +2140 ns P2(a&&b):: C = 1 +2142 ns P1(a||b):: C = 1 +2142 ns P2(a||b):: C = 0 +2146 ns P1(a&&b):: C = 1 +2146 ns P2(a&&b):: C = 0 +2148 ns P1(a||b):: C = 1 +2148 ns P2(a||b):: C = 0 +2152 ns P1(a&&b):: C = 1 +2152 ns P2(a&&b):: C = 0 +2154 ns P1(a||b):: C = 1 +2154 ns P2(a||b):: C = 0 +2158 ns P1(a&&b):: C = 1 +2158 ns P2(a&&b):: C = 0 +2160 ns P1(a||b):: C = 1 +2160 ns P2(a||b):: C = 0 +2164 ns P1(a&&b):: C = 0 +2164 ns P2(a&&b):: C = 1 +2166 ns P1(a||b):: C = 1 +2166 ns P2(a||b):: C = 0 +2170 ns P1(a&&b):: C = 0 +2170 ns P2(a&&b):: C = 1 +2172 ns P1(a||b):: C = 1 +2172 ns P2(a||b):: C = 0 +2176 ns P1(a&&b):: C = 1 +2176 ns P2(a&&b):: C = 0 +2178 ns P1(a||b):: C = 1 +2178 ns P2(a||b):: C = 0 +2182 ns P1(a&&b):: C = 0 +2182 ns P2(a&&b):: C = 1 +2184 ns P1(a||b):: C = 1 +2184 ns P2(a||b):: C = 0 +2188 ns P1(a&&b):: C = 1 +2188 ns P2(a&&b):: C = 0 +2190 ns P1(a||b):: C = 1 +2190 ns P2(a||b):: C = 0 +2194 ns P1(a&&b):: C = 0 +2194 ns P2(a&&b):: C = 1 +2196 ns P1(a||b):: C = 0 +2196 ns P2(a||b):: C = 1 +2200 ns P1(a&&b):: C = 0 +2200 ns P2(a&&b):: C = 1 +2202 ns P1(a||b):: C = 1 +2202 ns P2(a||b):: C = 0 +2206 ns P1(a&&b):: C = 0 +2206 ns P2(a&&b):: C = 1 +2208 ns P1(a||b):: C = 1 +2208 ns P2(a||b):: C = 0 +2212 ns P1(a&&b):: C = 1 +2212 ns P2(a&&b):: C = 0 +2214 ns P1(a||b):: C = 1 +2214 ns P2(a||b):: C = 0 +2218 ns P1(a&&b):: C = 0 +2218 ns P2(a&&b):: C = 1 +2220 ns P1(a||b):: C = 1 +2220 ns P2(a||b):: C = 0 +2224 ns P1(a&&b):: C = 1 +2224 ns P2(a&&b):: C = 0 +2226 ns P1(a||b):: C = 0 +2226 ns P2(a||b):: C = 1 +2230 ns P1(a&&b):: C = 0 +2230 ns P2(a&&b):: C = 1 +2232 ns P1(a||b):: C = 1 +2232 ns P2(a||b):: C = 0 +2236 ns P1(a&&b):: C = 0 +2236 ns P2(a&&b):: C = 1 +2238 ns P1(a||b):: C = 1 +2238 ns P2(a||b):: C = 0 +2242 ns P1(a&&b):: C = 0 +2242 ns P2(a&&b):: C = 1 +2244 ns P1(a||b):: C = 1 +2244 ns P2(a||b):: C = 0 +2248 ns P1(a&&b):: C = 0 +2248 ns P2(a&&b):: C = 1 +2250 ns P1(a||b):: C = 1 +2250 ns P2(a||b):: C = 0 +2254 ns P1(a&&b):: C = 0 +2254 ns P2(a&&b):: C = 1 +2256 ns P1(a||b):: C = 1 +2256 ns P2(a||b):: C = 0 +2260 ns P1(a&&b):: C = 0 +2260 ns P2(a&&b):: C = 1 +2262 ns P1(a||b):: C = 1 +2262 ns P2(a||b):: C = 0 +2266 ns P1(a&&b):: C = 1 +2266 ns P2(a&&b):: C = 0 +2268 ns P1(a||b):: C = 0 +2268 ns P2(a||b):: C = 1 +2272 ns P1(a&&b):: C = 0 +2272 ns P2(a&&b):: C = 1 +2274 ns P1(a||b):: C = 1 +2274 ns P2(a||b):: C = 0 +2278 ns P1(a&&b):: C = 1 +2278 ns P2(a&&b):: C = 0 +2280 ns P1(a||b):: C = 1 +2280 ns P2(a||b):: C = 0 +2284 ns P1(a&&b):: C = 0 +2284 ns P2(a&&b):: C = 1 +2286 ns P1(a||b):: C = 1 +2286 ns P2(a||b):: C = 0 +2290 ns P1(a&&b):: C = 1 +2290 ns P2(a&&b):: C = 0 +2292 ns P1(a||b):: C = 1 +2292 ns P2(a||b):: C = 0 +2296 ns P1(a&&b):: C = 0 +2296 ns P2(a&&b):: C = 1 +2298 ns P1(a||b):: C = 1 +2298 ns P2(a||b):: C = 0 +2302 ns P1(a&&b):: C = 1 +2302 ns P2(a&&b):: C = 0 +2304 ns P1(a||b):: C = 1 +2304 ns P2(a||b):: C = 0 +2308 ns P1(a&&b):: C = 0 +2308 ns P2(a&&b):: C = 1 +2310 ns P1(a||b):: C = 1 +2310 ns P2(a||b):: C = 0 +2314 ns P1(a&&b):: C = 1 +2314 ns P2(a&&b):: C = 0 +2316 ns P1(a||b):: C = 1 +2316 ns P2(a||b):: C = 0 +2320 ns P1(a&&b):: C = 1 +2320 ns P2(a&&b):: C = 0 +2322 ns P1(a||b):: C = 0 +2322 ns P2(a||b):: C = 1 +2326 ns P1(a&&b):: C = 0 +2326 ns P2(a&&b):: C = 1 +2328 ns P1(a||b):: C = 1 +2328 ns P2(a||b):: C = 0 +2332 ns P1(a&&b):: C = 0 +2332 ns P2(a&&b):: C = 1 +2334 ns P1(a||b):: C = 1 +2334 ns P2(a||b):: C = 0 +2338 ns P1(a&&b):: C = 0 +2338 ns P2(a&&b):: C = 1 +2340 ns P1(a||b):: C = 1 +2340 ns P2(a||b):: C = 0 +2344 ns P1(a&&b):: C = 0 +2344 ns P2(a&&b):: C = 1 +2346 ns P1(a||b):: C = 0 +2346 ns P2(a||b):: C = 1 +2350 ns P1(a&&b):: C = 0 +2350 ns P2(a&&b):: C = 1 +2352 ns P1(a||b):: C = 1 +2352 ns P2(a||b):: C = 0 +2356 ns P1(a&&b):: C = 1 +2356 ns P2(a&&b):: C = 0 +2358 ns P1(a||b):: C = 0 +2358 ns P2(a||b):: C = 1 +2362 ns P1(a&&b):: C = 0 +2362 ns P2(a&&b):: C = 1 +2364 ns P1(a||b):: C = 1 +2364 ns P2(a||b):: C = 0 +2368 ns P1(a&&b):: C = 0 +2368 ns P2(a&&b):: C = 1 +2370 ns P1(a||b):: C = 1 +2370 ns P2(a||b):: C = 0 +2374 ns P1(a&&b):: C = 0 +2374 ns P2(a&&b):: C = 1 +2376 ns P1(a||b):: C = 1 +2376 ns P2(a||b):: C = 0 +2380 ns P1(a&&b):: C = 0 +2380 ns P2(a&&b):: C = 1 +2382 ns P1(a||b):: C = 1 +2382 ns P2(a||b):: C = 0 +2386 ns P1(a&&b):: C = 0 +2386 ns P2(a&&b):: C = 1 +2388 ns P1(a||b):: C = 1 +2388 ns P2(a||b):: C = 0 +2392 ns P1(a&&b):: C = 1 +2392 ns P2(a&&b):: C = 0 +2394 ns P1(a||b):: C = 1 +2394 ns P2(a||b):: C = 0 +2398 ns P1(a&&b):: C = 0 +2398 ns P2(a&&b):: C = 1 +2400 ns P1(a||b):: C = 0 +2400 ns P2(a||b):: C = 1 +2404 ns P1(a&&b):: C = 0 +2404 ns P2(a&&b):: C = 1 +2406 ns P1(a||b):: C = 1 +2406 ns P2(a||b):: C = 0 +2410 ns P1(a&&b):: C = 0 +2410 ns P2(a&&b):: C = 1 +2412 ns P1(a||b):: C = 1 +2412 ns P2(a||b):: C = 0 +2416 ns P1(a&&b):: C = 0 +2416 ns P2(a&&b):: C = 1 +2418 ns P1(a||b):: C = 1 +2418 ns P2(a||b):: C = 0 +2422 ns P1(a&&b):: C = 1 +2422 ns P2(a&&b):: C = 0 +2424 ns P1(a||b):: C = 1 +2424 ns P2(a||b):: C = 0 +2428 ns P1(a&&b):: C = 0 +2428 ns P2(a&&b):: C = 1 +2430 ns P1(a||b):: C = 0 +2430 ns P2(a||b):: C = 1 +2434 ns P1(a&&b):: C = 0 +2434 ns P2(a&&b):: C = 1 +2436 ns P1(a||b):: C = 1 +2436 ns P2(a||b):: C = 0 +2440 ns P1(a&&b):: C = 0 +2440 ns P2(a&&b):: C = 1 +2442 ns P1(a||b):: C = 1 +2442 ns P2(a||b):: C = 0 +2446 ns P1(a&&b):: C = 1 +2446 ns P2(a&&b):: C = 0 +2448 ns P1(a||b):: C = 1 +2448 ns P2(a||b):: C = 0 +2452 ns P1(a&&b):: C = 1 +2452 ns P2(a&&b):: C = 0 +2454 ns P1(a||b):: C = 0 +2454 ns P2(a||b):: C = 1 +2458 ns P1(a&&b):: C = 0 +2458 ns P2(a&&b):: C = 1 +2460 ns P1(a||b):: C = 0 +2460 ns P2(a||b):: C = 1 +2464 ns P1(a&&b):: C = 0 +2464 ns P2(a&&b):: C = 1 +2466 ns P1(a||b):: C = 0 +2466 ns P2(a||b):: C = 1 +2470 ns P1(a&&b):: C = 0 +2470 ns P2(a&&b):: C = 1 +2472 ns P1(a||b):: C = 1 +2472 ns P2(a||b):: C = 0 +2476 ns P1(a&&b):: C = 0 +2476 ns P2(a&&b):: C = 1 +2478 ns P1(a||b):: C = 1 +2478 ns P2(a||b):: C = 0 +2482 ns P1(a&&b):: C = 1 +2482 ns P2(a&&b):: C = 0 +2484 ns P1(a||b):: C = 1 +2484 ns P2(a||b):: C = 0 +2488 ns P1(a&&b):: C = 1 +2488 ns P2(a&&b):: C = 0 +2490 ns P1(a||b):: C = 0 +2490 ns P2(a||b):: C = 1 +2494 ns P1(a&&b):: C = 1 +2494 ns P2(a&&b):: C = 0 +2496 ns P1(a||b):: C = 1 +2496 ns P2(a||b):: C = 0 +2500 ns P1(a&&b):: C = 0 +2500 ns P2(a&&b):: C = 1 +2502 ns P1(a||b):: C = 1 +2502 ns P2(a||b):: C = 0 +2506 ns P1(a&&b):: C = 0 +2506 ns P2(a&&b):: C = 1 +2508 ns P1(a||b):: C = 0 +2508 ns P2(a||b):: C = 1 +2512 ns P1(a&&b):: C = 1 +2512 ns P2(a&&b):: C = 0 +2514 ns P1(a||b):: C = 0 +2514 ns P2(a||b):: C = 1 +2518 ns P1(a&&b):: C = 0 +2518 ns P2(a&&b):: C = 1 +2520 ns P1(a||b):: C = 0 +2520 ns P2(a||b):: C = 1 +2524 ns P1(a&&b):: C = 0 +2524 ns P2(a&&b):: C = 1 +2526 ns P1(a||b):: C = 0 +2526 ns P2(a||b):: C = 1 +2530 ns P1(a&&b):: C = 0 +2530 ns P2(a&&b):: C = 1 +2532 ns P1(a||b):: C = 0 +2532 ns P2(a||b):: C = 1 +2536 ns P1(a&&b):: C = 0 +2536 ns P2(a&&b):: C = 1 +2538 ns P1(a||b):: C = 1 +2538 ns P2(a||b):: C = 0 +2542 ns P1(a&&b):: C = 0 +2542 ns P2(a&&b):: C = 1 +2544 ns P1(a||b):: C = 0 +2544 ns P2(a||b):: C = 1 +2548 ns P1(a&&b):: C = 0 +2548 ns P2(a&&b):: C = 1 +2550 ns P1(a||b):: C = 1 +2550 ns P2(a||b):: C = 0 +2554 ns P1(a&&b):: C = 0 +2554 ns P2(a&&b):: C = 1 +2556 ns P1(a||b):: C = 0 +2556 ns P2(a||b):: C = 1 +2560 ns P1(a&&b):: C = 0 +2560 ns P2(a&&b):: C = 1 +2562 ns P1(a||b):: C = 1 +2562 ns P2(a||b):: C = 0 +2566 ns P1(a&&b):: C = 1 +2566 ns P2(a&&b):: C = 0 +2568 ns P1(a||b):: C = 0 +2568 ns P2(a||b):: C = 1 +2572 ns P1(a&&b):: C = 1 +2572 ns P2(a&&b):: C = 0 +2574 ns P1(a||b):: C = 1 +2574 ns P2(a||b):: C = 0 +2578 ns P1(a&&b):: C = 0 +2578 ns P2(a&&b):: C = 1 +2580 ns P1(a||b):: C = 1 +2580 ns P2(a||b):: C = 0 +2584 ns P1(a&&b):: C = 0 +2584 ns P2(a&&b):: C = 1 +2586 ns P1(a||b):: C = 1 +2586 ns P2(a||b):: C = 0 +2590 ns P1(a&&b):: C = 0 +2590 ns P2(a&&b):: C = 1 +2592 ns P1(a||b):: C = 0 +2592 ns P2(a||b):: C = 1 +2596 ns P1(a&&b):: C = 1 +2596 ns P2(a&&b):: C = 0 +2598 ns P1(a||b):: C = 1 +2598 ns P2(a||b):: C = 0 +2602 ns P1(a&&b):: C = 1 +2602 ns P2(a&&b):: C = 0 +2604 ns P1(a||b):: C = 1 +2604 ns P2(a||b):: C = 0 +2608 ns P1(a&&b):: C = 0 +2608 ns P2(a&&b):: C = 1 +2610 ns P1(a||b):: C = 1 +2610 ns P2(a||b):: C = 0 +2614 ns P1(a&&b):: C = 0 +2614 ns P2(a&&b):: C = 1 +2616 ns P1(a||b):: C = 1 +2616 ns P2(a||b):: C = 0 +2620 ns P1(a&&b):: C = 0 +2620 ns P2(a&&b):: C = 1 +2622 ns P1(a||b):: C = 1 +2622 ns P2(a||b):: C = 0 +2626 ns P1(a&&b):: C = 0 +2626 ns P2(a&&b):: C = 1 +2628 ns P1(a||b):: C = 1 +2628 ns P2(a||b):: C = 0 +2632 ns P1(a&&b):: C = 0 +2632 ns P2(a&&b):: C = 1 +2634 ns P1(a||b):: C = 1 +2634 ns P2(a||b):: C = 0 +2638 ns P1(a&&b):: C = 1 +2638 ns P2(a&&b):: C = 0 +2640 ns P1(a||b):: C = 1 +2640 ns P2(a||b):: C = 0 +2644 ns P1(a&&b):: C = 1 +2644 ns P2(a&&b):: C = 0 +2646 ns P1(a||b):: C = 1 +2646 ns P2(a||b):: C = 0 +2650 ns P1(a&&b):: C = 0 +2650 ns P2(a&&b):: C = 1 +2652 ns P1(a||b):: C = 1 +2652 ns P2(a||b):: C = 0 +2656 ns P1(a&&b):: C = 0 +2656 ns P2(a&&b):: C = 1 +2658 ns P1(a||b):: C = 0 +2658 ns P2(a||b):: C = 1 +2662 ns P1(a&&b):: C = 1 +2662 ns P2(a&&b):: C = 0 +2664 ns P1(a||b):: C = 0 +2664 ns P2(a||b):: C = 1 +2668 ns P1(a&&b):: C = 0 +2668 ns P2(a&&b):: C = 1 +2670 ns P1(a||b):: C = 1 +2670 ns P2(a||b):: C = 0 +2674 ns P1(a&&b):: C = 0 +2674 ns P2(a&&b):: C = 1 +2676 ns P1(a||b):: C = 1 +2676 ns P2(a||b):: C = 0 +2680 ns P1(a&&b):: C = 0 +2680 ns P2(a&&b):: C = 1 +2682 ns P1(a||b):: C = 1 +2682 ns P2(a||b):: C = 0 +2686 ns P1(a&&b):: C = 0 +2686 ns P2(a&&b):: C = 1 +2688 ns P1(a||b):: C = 1 +2688 ns P2(a||b):: C = 0 +2692 ns P1(a&&b):: C = 0 +2692 ns P2(a&&b):: C = 1 +2694 ns P1(a||b):: C = 1 +2694 ns P2(a||b):: C = 0 +2698 ns P1(a&&b):: C = 0 +2698 ns P2(a&&b):: C = 1 +2700 ns P1(a||b):: C = 1 +2700 ns P2(a||b):: C = 0 +2704 ns P1(a&&b):: C = 1 +2704 ns P2(a&&b):: C = 0 +2706 ns P1(a||b):: C = 1 +2706 ns P2(a||b):: C = 0 +2710 ns P1(a&&b):: C = 0 +2710 ns P2(a&&b):: C = 1 +2712 ns P1(a||b):: C = 1 +2712 ns P2(a||b):: C = 0 +2716 ns P1(a&&b):: C = 0 +2716 ns P2(a&&b):: C = 1 +2718 ns P1(a||b):: C = 0 +2718 ns P2(a||b):: C = 1 +2722 ns P1(a&&b):: C = 0 +2722 ns P2(a&&b):: C = 1 +2724 ns P1(a||b):: C = 1 +2724 ns P2(a||b):: C = 0 +2728 ns P1(a&&b):: C = 0 +2728 ns P2(a&&b):: C = 1 +2730 ns P1(a||b):: C = 1 +2730 ns P2(a||b):: C = 0 +2734 ns P1(a&&b):: C = 1 +2734 ns P2(a&&b):: C = 0 +2736 ns P1(a||b):: C = 1 +2736 ns P2(a||b):: C = 0 +2740 ns P1(a&&b):: C = 0 +2740 ns P2(a&&b):: C = 1 +2742 ns P1(a||b):: C = 0 +2742 ns P2(a||b):: C = 1 +2746 ns P1(a&&b):: C = 0 +2746 ns P2(a&&b):: C = 1 +2748 ns P1(a||b):: C = 1 +2748 ns P2(a||b):: C = 0 +2752 ns P1(a&&b):: C = 0 +2752 ns P2(a&&b):: C = 1 +2754 ns P1(a||b):: C = 1 +2754 ns P2(a||b):: C = 0 +2758 ns P1(a&&b):: C = 0 +2758 ns P2(a&&b):: C = 1 +2760 ns P1(a||b):: C = 1 +2760 ns P2(a||b):: C = 0 +2764 ns P1(a&&b):: C = 0 +2764 ns P2(a&&b):: C = 1 +2766 ns P1(a||b):: C = 0 +2766 ns P2(a||b):: C = 1 +2770 ns P1(a&&b):: C = 0 +2770 ns P2(a&&b):: C = 1 +2772 ns P1(a||b):: C = 1 +2772 ns P2(a||b):: C = 0 +2776 ns P1(a&&b):: C = 0 +2776 ns P2(a&&b):: C = 1 +2778 ns P1(a||b):: C = 1 +2778 ns P2(a||b):: C = 0 +2782 ns P1(a&&b):: C = 0 +2782 ns P2(a&&b):: C = 1 +2784 ns P1(a||b):: C = 1 +2784 ns P2(a||b):: C = 0 +2788 ns P1(a&&b):: C = 0 +2788 ns P2(a&&b):: C = 1 +2790 ns P1(a||b):: C = 1 +2790 ns P2(a||b):: C = 0 +2794 ns P1(a&&b):: C = 0 +2794 ns P2(a&&b):: C = 1 +2796 ns P1(a||b):: C = 0 +2796 ns P2(a||b):: C = 1 +2800 ns P1(a&&b):: C = 0 +2800 ns P2(a&&b):: C = 1 +2802 ns P1(a||b):: C = 0 +2802 ns P2(a||b):: C = 1 +2806 ns P1(a&&b):: C = 0 +2806 ns P2(a&&b):: C = 1 +2808 ns P1(a||b):: C = 1 +2808 ns P2(a||b):: C = 0 +2812 ns P1(a&&b):: C = 0 +2812 ns P2(a&&b):: C = 1 +2814 ns P1(a||b):: C = 1 +2814 ns P2(a||b):: C = 0 +2818 ns P1(a&&b):: C = 1 +2818 ns P2(a&&b):: C = 0 +2820 ns P1(a||b):: C = 1 +2820 ns P2(a||b):: C = 0 +2824 ns P1(a&&b):: C = 0 +2824 ns P2(a&&b):: C = 1 +2826 ns P1(a||b):: C = 1 +2826 ns P2(a||b):: C = 0 +2830 ns P1(a&&b):: C = 0 +2830 ns P2(a&&b):: C = 1 +2832 ns P1(a||b):: C = 1 +2832 ns P2(a||b):: C = 0 +2836 ns P1(a&&b):: C = 0 +2836 ns P2(a&&b):: C = 1 +2838 ns P1(a||b):: C = 1 +2838 ns P2(a||b):: C = 0 +2842 ns P1(a&&b):: C = 0 +2842 ns P2(a&&b):: C = 1 +2844 ns P1(a||b):: C = 1 +2844 ns P2(a||b):: C = 0 +2848 ns P1(a&&b):: C = 0 +2848 ns P2(a&&b):: C = 1 +2850 ns P1(a||b):: C = 1 +2850 ns P2(a||b):: C = 0 +2854 ns P1(a&&b):: C = 1 +2854 ns P2(a&&b):: C = 0 +2856 ns P1(a||b):: C = 1 +2856 ns P2(a||b):: C = 0 +2860 ns P1(a&&b):: C = 0 +2860 ns P2(a&&b):: C = 1 +2862 ns P1(a||b):: C = 1 +2862 ns P2(a||b):: C = 0 +2866 ns P1(a&&b):: C = 0 +2866 ns P2(a&&b):: C = 1 +2868 ns P1(a||b):: C = 1 +2868 ns P2(a||b):: C = 0 +2872 ns P1(a&&b):: C = 1 +2872 ns P2(a&&b):: C = 0 +2874 ns P1(a||b):: C = 0 +2874 ns P2(a||b):: C = 1 +2878 ns P1(a&&b):: C = 0 +2878 ns P2(a&&b):: C = 1 +2880 ns P1(a||b):: C = 0 +2880 ns P2(a||b):: C = 1 +2884 ns P1(a&&b):: C = 1 +2884 ns P2(a&&b):: C = 0 +2886 ns P1(a||b):: C = 1 +2886 ns P2(a||b):: C = 0 +2890 ns P1(a&&b):: C = 1 +2890 ns P2(a&&b):: C = 0 +2892 ns P1(a||b):: C = 0 +2892 ns P2(a||b):: C = 1 +2896 ns P1(a&&b):: C = 1 +2896 ns P2(a&&b):: C = 0 +2898 ns P1(a||b):: C = 0 +2898 ns P2(a||b):: C = 1 +2902 ns P1(a&&b):: C = 1 +2902 ns P2(a&&b):: C = 0 +2904 ns P1(a||b):: C = 1 +2904 ns P2(a||b):: C = 0 +2908 ns P1(a&&b):: C = 0 +2908 ns P2(a&&b):: C = 1 +2910 ns P1(a||b):: C = 1 +2910 ns P2(a||b):: C = 0 +2914 ns P1(a&&b):: C = 0 +2914 ns P2(a&&b):: C = 1 +2916 ns P1(a||b):: C = 1 +2916 ns P2(a||b):: C = 0 +2920 ns P1(a&&b):: C = 0 +2920 ns P2(a&&b):: C = 1 +2922 ns P1(a||b):: C = 1 +2922 ns P2(a||b):: C = 0 +2926 ns P1(a&&b):: C = 0 +2926 ns P2(a&&b):: C = 1 +2928 ns P1(a||b):: C = 1 +2928 ns P2(a||b):: C = 0 +2932 ns P1(a&&b):: C = 0 +2932 ns P2(a&&b):: C = 1 +2934 ns P1(a||b):: C = 0 +2934 ns P2(a||b):: C = 1 +2938 ns P1(a&&b):: C = 0 +2938 ns P2(a&&b):: C = 1 +2940 ns P1(a||b):: C = 1 +2940 ns P2(a||b):: C = 0 +2944 ns P1(a&&b):: C = 0 +2944 ns P2(a&&b):: C = 1 +2946 ns P1(a||b):: C = 1 +2946 ns P2(a||b):: C = 0 +2950 ns P1(a&&b):: C = 1 +2950 ns P2(a&&b):: C = 0 +2952 ns P1(a||b):: C = 1 +2952 ns P2(a||b):: C = 0 +2956 ns P1(a&&b):: C = 1 +2956 ns P2(a&&b):: C = 0 +2958 ns P1(a||b):: C = 1 +2958 ns P2(a||b):: C = 0 +2962 ns P1(a&&b):: C = 1 +2962 ns P2(a&&b):: C = 0 +2964 ns P1(a||b):: C = 1 +2964 ns P2(a||b):: C = 0 +2968 ns P1(a&&b):: C = 1 +2968 ns P2(a&&b):: C = 0 +2970 ns P1(a||b):: C = 1 +2970 ns P2(a||b):: C = 0 +2974 ns P1(a&&b):: C = 0 +2974 ns P2(a&&b):: C = 1 +2976 ns P1(a||b):: C = 1 +2976 ns P2(a||b):: C = 0 +2980 ns P1(a&&b):: C = 1 +2980 ns P2(a&&b):: C = 0 +2982 ns P1(a||b):: C = 1 +2982 ns P2(a||b):: C = 0 +2986 ns P1(a&&b):: C = 0 +2986 ns P2(a&&b):: C = 1 +2988 ns P1(a||b):: C = 1 +2988 ns P2(a||b):: C = 0 +2992 ns P1(a&&b):: C = 0 +2992 ns P2(a&&b):: C = 1 +2994 ns P1(a||b):: C = 0 +2994 ns P2(a||b):: C = 1 +2998 ns P1(a&&b):: C = 0 +2998 ns P2(a&&b):: C = 1 +3 us P1(a||b):: C = 1 +3 us P2(a||b):: C = 0 +3004 ns P1(a&&b):: C = 0 +3004 ns P2(a&&b):: C = 1 +3006 ns P1(a||b):: C = 1 +3006 ns P2(a||b):: C = 0 +3010 ns P1(a&&b):: C = 0 +3010 ns P2(a&&b):: C = 1 +3012 ns P1(a||b):: C = 1 +3012 ns P2(a||b):: C = 0 +3016 ns P1(a&&b):: C = 0 +3016 ns P2(a&&b):: C = 1 +3018 ns P1(a||b):: C = 1 +3018 ns P2(a||b):: C = 0 +3022 ns P1(a&&b):: C = 1 +3022 ns P2(a&&b):: C = 0 +3024 ns P1(a||b):: C = 1 +3024 ns P2(a||b):: C = 0 +3028 ns P1(a&&b):: C = 0 +3028 ns P2(a&&b):: C = 1 +3030 ns P1(a||b):: C = 1 +3030 ns P2(a||b):: C = 0 +3034 ns P1(a&&b):: C = 0 +3034 ns P2(a&&b):: C = 1 +3036 ns P1(a||b):: C = 1 +3036 ns P2(a||b):: C = 0 +3040 ns P1(a&&b):: C = 0 +3040 ns P2(a&&b):: C = 1 +3042 ns P1(a||b):: C = 0 +3042 ns P2(a||b):: C = 1 +3046 ns P1(a&&b):: C = 0 +3046 ns P2(a&&b):: C = 1 +3048 ns P1(a||b):: C = 1 +3048 ns P2(a||b):: C = 0 +3052 ns P1(a&&b):: C = 0 +3052 ns P2(a&&b):: C = 1 +3054 ns P1(a||b):: C = 1 +3054 ns P2(a||b):: C = 0 +3058 ns P1(a&&b):: C = 0 +3058 ns P2(a&&b):: C = 1 +3060 ns P1(a||b):: C = 0 +3060 ns P2(a||b):: C = 1 +3064 ns P1(a&&b):: C = 1 +3064 ns P2(a&&b):: C = 0 +3066 ns P1(a||b):: C = 1 +3066 ns P2(a||b):: C = 0 +3070 ns P1(a&&b):: C = 0 +3070 ns P2(a&&b):: C = 1 +3072 ns P1(a||b):: C = 1 +3072 ns P2(a||b):: C = 0 +3076 ns P1(a&&b):: C = 0 +3076 ns P2(a&&b):: C = 1 +3078 ns P1(a||b):: C = 1 +3078 ns P2(a||b):: C = 0 +3082 ns P1(a&&b):: C = 0 +3082 ns P2(a&&b):: C = 1 +3084 ns P1(a||b):: C = 1 +3084 ns P2(a||b):: C = 0 +3088 ns P1(a&&b):: C = 0 +3088 ns P2(a&&b):: C = 1 +3090 ns P1(a||b):: C = 1 +3090 ns P2(a||b):: C = 0 +3094 ns P1(a&&b):: C = 0 +3094 ns P2(a&&b):: C = 1 +3096 ns P1(a||b):: C = 1 +3096 ns P2(a||b):: C = 0 +3100 ns P1(a&&b):: C = 0 +3100 ns P2(a&&b):: C = 1 +3102 ns P1(a||b):: C = 1 +3102 ns P2(a||b):: C = 0 +3106 ns P1(a&&b):: C = 1 +3106 ns P2(a&&b):: C = 0 +3108 ns P1(a||b):: C = 1 +3108 ns P2(a||b):: C = 0 +3112 ns P1(a&&b):: C = 1 +3112 ns P2(a&&b):: C = 0 +3114 ns P1(a||b):: C = 1 +3114 ns P2(a||b):: C = 0 +3118 ns P1(a&&b):: C = 0 +3118 ns P2(a&&b):: C = 1 +3120 ns P1(a||b):: C = 1 +3120 ns P2(a||b):: C = 0 +3124 ns P1(a&&b):: C = 1 +3124 ns P2(a&&b):: C = 0 +3126 ns P1(a||b):: C = 1 +3126 ns P2(a||b):: C = 0 +3130 ns P1(a&&b):: C = 0 +3130 ns P2(a&&b):: C = 1 +3132 ns P1(a||b):: C = 1 +3132 ns P2(a||b):: C = 0 +3136 ns P1(a&&b):: C = 0 +3136 ns P2(a&&b):: C = 1 +3138 ns P1(a||b):: C = 1 +3138 ns P2(a||b):: C = 0 +3142 ns P1(a&&b):: C = 0 +3142 ns P2(a&&b):: C = 1 +3144 ns P1(a||b):: C = 1 +3144 ns P2(a||b):: C = 0 +3148 ns P1(a&&b):: C = 0 +3148 ns P2(a&&b):: C = 1 +3150 ns P1(a||b):: C = 1 +3150 ns P2(a||b):: C = 0 +3154 ns P1(a&&b):: C = 0 +3154 ns P2(a&&b):: C = 1 +3156 ns P1(a||b):: C = 1 +3156 ns P2(a||b):: C = 0 +3160 ns P1(a&&b):: C = 1 +3160 ns P2(a&&b):: C = 0 +3162 ns P1(a||b):: C = 0 +3162 ns P2(a||b):: C = 1 +3166 ns P1(a&&b):: C = 1 +3166 ns P2(a&&b):: C = 0 +3168 ns P1(a||b):: C = 1 +3168 ns P2(a||b):: C = 0 +3172 ns P1(a&&b):: C = 0 +3172 ns P2(a&&b):: C = 1 +3174 ns P1(a||b):: C = 0 +3174 ns P2(a||b):: C = 1 +3178 ns P1(a&&b):: C = 0 +3178 ns P2(a&&b):: C = 1 +3180 ns P1(a||b):: C = 1 +3180 ns P2(a||b):: C = 0 +3184 ns P1(a&&b):: C = 0 +3184 ns P2(a&&b):: C = 1 +3186 ns P1(a||b):: C = 1 +3186 ns P2(a||b):: C = 0 +3190 ns P1(a&&b):: C = 0 +3190 ns P2(a&&b):: C = 1 +3192 ns P1(a||b):: C = 1 +3192 ns P2(a||b):: C = 0 +3196 ns P1(a&&b):: C = 0 +3196 ns P2(a&&b):: C = 1 +3198 ns P1(a||b):: C = 1 +3198 ns P2(a||b):: C = 0 +3202 ns P1(a&&b):: C = 0 +3202 ns P2(a&&b):: C = 1 +3204 ns P1(a||b):: C = 1 +3204 ns P2(a||b):: C = 0 +3208 ns P1(a&&b):: C = 0 +3208 ns P2(a&&b):: C = 1 +3210 ns P1(a||b):: C = 1 +3210 ns P2(a||b):: C = 0 +3214 ns P1(a&&b):: C = 0 +3214 ns P2(a&&b):: C = 1 +3216 ns P1(a||b):: C = 1 +3216 ns P2(a||b):: C = 0 +3220 ns P1(a&&b):: C = 1 +3220 ns P2(a&&b):: C = 0 +3222 ns P1(a||b):: C = 1 +3222 ns P2(a||b):: C = 0 +3226 ns P1(a&&b):: C = 0 +3226 ns P2(a&&b):: C = 1 +3228 ns P1(a||b):: C = 1 +3228 ns P2(a||b):: C = 0 +3232 ns P1(a&&b):: C = 1 +3232 ns P2(a&&b):: C = 0 +3234 ns P1(a||b):: C = 1 +3234 ns P2(a||b):: C = 0 +3238 ns P1(a&&b):: C = 0 +3238 ns P2(a&&b):: C = 1 +3240 ns P1(a||b):: C = 1 +3240 ns P2(a||b):: C = 0 +3244 ns P1(a&&b):: C = 0 +3244 ns P2(a&&b):: C = 1 +3246 ns P1(a||b):: C = 1 +3246 ns P2(a||b):: C = 0 +3250 ns P1(a&&b):: C = 0 +3250 ns P2(a&&b):: C = 1 +3252 ns P1(a||b):: C = 1 +3252 ns P2(a||b):: C = 0 +3256 ns P1(a&&b):: C = 0 +3256 ns P2(a&&b):: C = 1 +3258 ns P1(a||b):: C = 1 +3258 ns P2(a||b):: C = 0 +3262 ns P1(a&&b):: C = 0 +3262 ns P2(a&&b):: C = 1 +3264 ns P1(a||b):: C = 1 +3264 ns P2(a||b):: C = 0 +3268 ns P1(a&&b):: C = 0 +3268 ns P2(a&&b):: C = 1 +3270 ns P1(a||b):: C = 1 +3270 ns P2(a||b):: C = 0 +3274 ns P1(a&&b):: C = 0 +3274 ns P2(a&&b):: C = 1 +3276 ns P1(a||b):: C = 1 +3276 ns P2(a||b):: C = 0 +3280 ns P1(a&&b):: C = 0 +3280 ns P2(a&&b):: C = 1 +3282 ns P1(a||b):: C = 1 +3282 ns P2(a||b):: C = 0 +3286 ns P1(a&&b):: C = 0 +3286 ns P2(a&&b):: C = 1 +3288 ns P1(a||b):: C = 1 +3288 ns P2(a||b):: C = 0 +3292 ns P1(a&&b):: C = 0 +3292 ns P2(a&&b):: C = 1 +3294 ns P1(a||b):: C = 0 +3294 ns P2(a||b):: C = 1 +3298 ns P1(a&&b):: C = 0 +3298 ns P2(a&&b):: C = 1 +3300 ns P1(a||b):: C = 0 +3300 ns P2(a||b):: C = 1 +3304 ns P1(a&&b):: C = 0 +3304 ns P2(a&&b):: C = 1 +3306 ns P1(a||b):: C = 1 +3306 ns P2(a||b):: C = 0 +3310 ns P1(a&&b):: C = 1 +3310 ns P2(a&&b):: C = 0 +3312 ns P1(a||b):: C = 1 +3312 ns P2(a||b):: C = 0 +3316 ns P1(a&&b):: C = 0 +3316 ns P2(a&&b):: C = 1 +3318 ns P1(a||b):: C = 1 +3318 ns P2(a||b):: C = 0 +3322 ns P1(a&&b):: C = 0 +3322 ns P2(a&&b):: C = 1 +3324 ns P1(a||b):: C = 0 +3324 ns P2(a||b):: C = 1 +3328 ns P1(a&&b):: C = 1 +3328 ns P2(a&&b):: C = 0 +3330 ns P1(a||b):: C = 1 +3330 ns P2(a||b):: C = 0 +3334 ns P1(a&&b):: C = 0 +3334 ns P2(a&&b):: C = 1 +3336 ns P1(a||b):: C = 1 +3336 ns P2(a||b):: C = 0 +3340 ns P1(a&&b):: C = 0 +3340 ns P2(a&&b):: C = 1 +3342 ns P1(a||b):: C = 0 +3342 ns P2(a||b):: C = 1 +3346 ns P1(a&&b):: C = 0 +3346 ns P2(a&&b):: C = 1 +3348 ns P1(a||b):: C = 1 +3348 ns P2(a||b):: C = 0 +3352 ns P1(a&&b):: C = 1 +3352 ns P2(a&&b):: C = 0 +3354 ns P1(a||b):: C = 1 +3354 ns P2(a||b):: C = 0 +3358 ns P1(a&&b):: C = 0 +3358 ns P2(a&&b):: C = 1 +3360 ns P1(a||b):: C = 1 +3360 ns P2(a||b):: C = 0 +3364 ns P1(a&&b):: C = 0 +3364 ns P2(a&&b):: C = 1 +3366 ns P1(a||b):: C = 0 +3366 ns P2(a||b):: C = 1 +3370 ns P1(a&&b):: C = 0 +3370 ns P2(a&&b):: C = 1 +3372 ns P1(a||b):: C = 0 +3372 ns P2(a||b):: C = 1 +3376 ns P1(a&&b):: C = 1 +3376 ns P2(a&&b):: C = 0 +3378 ns P1(a||b):: C = 1 +3378 ns P2(a||b):: C = 0 +3382 ns P1(a&&b):: C = 0 +3382 ns P2(a&&b):: C = 1 +3384 ns P1(a||b):: C = 1 +3384 ns P2(a||b):: C = 0 +3388 ns P1(a&&b):: C = 0 +3388 ns P2(a&&b):: C = 1 +3390 ns P1(a||b):: C = 0 +3390 ns P2(a||b):: C = 1 +3394 ns P1(a&&b):: C = 0 +3394 ns P2(a&&b):: C = 1 +3396 ns P1(a||b):: C = 1 +3396 ns P2(a||b):: C = 0 +3400 ns P1(a&&b):: C = 0 +3400 ns P2(a&&b):: C = 1 +3402 ns P1(a||b):: C = 0 +3402 ns P2(a||b):: C = 1 +3406 ns P1(a&&b):: C = 0 +3406 ns P2(a&&b):: C = 1 +3408 ns P1(a||b):: C = 1 +3408 ns P2(a||b):: C = 0 +3412 ns P1(a&&b):: C = 1 +3412 ns P2(a&&b):: C = 0 +3414 ns P1(a||b):: C = 0 +3414 ns P2(a||b):: C = 1 +3418 ns P1(a&&b):: C = 0 +3418 ns P2(a&&b):: C = 1 +3420 ns P1(a||b):: C = 1 +3420 ns P2(a||b):: C = 0 +3424 ns P1(a&&b):: C = 0 +3424 ns P2(a&&b):: C = 1 +3426 ns P1(a||b):: C = 0 +3426 ns P2(a||b):: C = 1 +3430 ns P1(a&&b):: C = 0 +3430 ns P2(a&&b):: C = 1 +3432 ns P1(a||b):: C = 0 +3432 ns P2(a||b):: C = 1 +3436 ns P1(a&&b):: C = 0 +3436 ns P2(a&&b):: C = 1 +3438 ns P1(a||b):: C = 1 +3438 ns P2(a||b):: C = 0 +3442 ns P1(a&&b):: C = 0 +3442 ns P2(a&&b):: C = 1 +3444 ns P1(a||b):: C = 1 +3444 ns P2(a||b):: C = 0 +3448 ns P1(a&&b):: C = 0 +3448 ns P2(a&&b):: C = 1 +3450 ns P1(a||b):: C = 1 +3450 ns P2(a||b):: C = 0 +3454 ns P1(a&&b):: C = 0 +3454 ns P2(a&&b):: C = 1 +3456 ns P1(a||b):: C = 1 +3456 ns P2(a||b):: C = 0 +3460 ns P1(a&&b):: C = 0 +3460 ns P2(a&&b):: C = 1 +3462 ns P1(a||b):: C = 1 +3462 ns P2(a||b):: C = 0 +3466 ns P1(a&&b):: C = 0 +3466 ns P2(a&&b):: C = 1 +3468 ns P1(a||b):: C = 1 +3468 ns P2(a||b):: C = 0 +3472 ns P1(a&&b):: C = 0 +3472 ns P2(a&&b):: C = 1 +3474 ns P1(a||b):: C = 1 +3474 ns P2(a||b):: C = 0 +3478 ns P1(a&&b):: C = 1 +3478 ns P2(a&&b):: C = 0 +3480 ns P1(a||b):: C = 1 +3480 ns P2(a||b):: C = 0 +3484 ns P1(a&&b):: C = 0 +3484 ns P2(a&&b):: C = 1 +3486 ns P1(a||b):: C = 1 +3486 ns P2(a||b):: C = 0 +3490 ns P1(a&&b):: C = 0 +3490 ns P2(a&&b):: C = 1 +3492 ns P1(a||b):: C = 1 +3492 ns P2(a||b):: C = 0 +3496 ns P1(a&&b):: C = 0 +3496 ns P2(a&&b):: C = 1 +3498 ns P1(a||b):: C = 1 +3498 ns P2(a||b):: C = 0 +3502 ns P1(a&&b):: C = 0 +3502 ns P2(a&&b):: C = 1 +3504 ns P1(a||b):: C = 0 +3504 ns P2(a||b):: C = 1 +3508 ns P1(a&&b):: C = 1 +3508 ns P2(a&&b):: C = 0 +3510 ns P1(a||b):: C = 0 +3510 ns P2(a||b):: C = 1 +3514 ns P1(a&&b):: C = 0 +3514 ns P2(a&&b):: C = 1 +3516 ns P1(a||b):: C = 1 +3516 ns P2(a||b):: C = 0 +3520 ns P1(a&&b):: C = 0 +3520 ns P2(a&&b):: C = 1 +3522 ns P1(a||b):: C = 1 +3522 ns P2(a||b):: C = 0 +3526 ns P1(a&&b):: C = 1 +3526 ns P2(a&&b):: C = 0 +3528 ns P1(a||b):: C = 1 +3528 ns P2(a||b):: C = 0 +3532 ns P1(a&&b):: C = 0 +3532 ns P2(a&&b):: C = 1 +3534 ns P1(a||b):: C = 1 +3534 ns P2(a||b):: C = 0 +3538 ns P1(a&&b):: C = 0 +3538 ns P2(a&&b):: C = 1 +3540 ns P1(a||b):: C = 1 +3540 ns P2(a||b):: C = 0 +3544 ns P1(a&&b):: C = 0 +3544 ns P2(a&&b):: C = 1 +3546 ns P1(a||b):: C = 1 +3546 ns P2(a||b):: C = 0 +3550 ns P1(a&&b):: C = 0 +3550 ns P2(a&&b):: C = 1 +3552 ns P1(a||b):: C = 1 +3552 ns P2(a||b):: C = 0 +3556 ns P1(a&&b):: C = 1 +3556 ns P2(a&&b):: C = 0 +3558 ns P1(a||b):: C = 1 +3558 ns P2(a||b):: C = 0 +3562 ns P1(a&&b):: C = 0 +3562 ns P2(a&&b):: C = 1 +3564 ns P1(a||b):: C = 1 +3564 ns P2(a||b):: C = 0 +3568 ns P1(a&&b):: C = 1 +3568 ns P2(a&&b):: C = 0 +3570 ns P1(a||b):: C = 1 +3570 ns P2(a||b):: C = 0 +3574 ns P1(a&&b):: C = 0 +3574 ns P2(a&&b):: C = 1 +3576 ns P1(a||b):: C = 1 +3576 ns P2(a||b):: C = 0 +3580 ns P1(a&&b):: C = 0 +3580 ns P2(a&&b):: C = 1 +3582 ns P1(a||b):: C = 0 +3582 ns P2(a||b):: C = 1 +3586 ns P1(a&&b):: C = 0 +3586 ns P2(a&&b):: C = 1 +3588 ns P1(a||b):: C = 0 +3588 ns P2(a||b):: C = 1 +3592 ns P1(a&&b):: C = 1 +3592 ns P2(a&&b):: C = 0 +3594 ns P1(a||b):: C = 1 +3594 ns P2(a||b):: C = 0 +3598 ns P1(a&&b):: C = 0 +3598 ns P2(a&&b):: C = 1 +3600 ns P1(a||b):: C = 1 +3600 ns P2(a||b):: C = 0 +3604 ns P1(a&&b):: C = 0 +3604 ns P2(a&&b):: C = 1 +3606 ns P1(a||b):: C = 1 +3606 ns P2(a||b):: C = 0 +3610 ns P1(a&&b):: C = 1 +3610 ns P2(a&&b):: C = 0 +3612 ns P1(a||b):: C = 1 +3612 ns P2(a||b):: C = 0 +3616 ns P1(a&&b):: C = 0 +3616 ns P2(a&&b):: C = 1 +3618 ns P1(a||b):: C = 1 +3618 ns P2(a||b):: C = 0 +3622 ns P1(a&&b):: C = 1 +3622 ns P2(a&&b):: C = 0 +3624 ns P1(a||b):: C = 1 +3624 ns P2(a||b):: C = 0 +3628 ns P1(a&&b):: C = 0 +3628 ns P2(a&&b):: C = 1 +3630 ns P1(a||b):: C = 1 +3630 ns P2(a||b):: C = 0 +3634 ns P1(a&&b):: C = 0 +3634 ns P2(a&&b):: C = 1 +3636 ns P1(a||b):: C = 1 +3636 ns P2(a||b):: C = 0 +3640 ns P1(a&&b):: C = 0 +3640 ns P2(a&&b):: C = 1 +3642 ns P1(a||b):: C = 0 +3642 ns P2(a||b):: C = 1 +3646 ns P1(a&&b):: C = 1 +3646 ns P2(a&&b):: C = 0 +3648 ns P1(a||b):: C = 1 +3648 ns P2(a||b):: C = 0 +3652 ns P1(a&&b):: C = 0 +3652 ns P2(a&&b):: C = 1 +3654 ns P1(a||b):: C = 1 +3654 ns P2(a||b):: C = 0 +3658 ns P1(a&&b):: C = 1 +3658 ns P2(a&&b):: C = 0 +3660 ns P1(a||b):: C = 1 +3660 ns P2(a||b):: C = 0 +3664 ns P1(a&&b):: C = 1 +3664 ns P2(a&&b):: C = 0 +3666 ns P1(a||b):: C = 1 +3666 ns P2(a||b):: C = 0 +3670 ns P1(a&&b):: C = 0 +3670 ns P2(a&&b):: C = 1 +3672 ns P1(a||b):: C = 0 +3672 ns P2(a||b):: C = 1 +3676 ns P1(a&&b):: C = 0 +3676 ns P2(a&&b):: C = 1 +3678 ns P1(a||b):: C = 1 +3678 ns P2(a||b):: C = 0 +3682 ns P1(a&&b):: C = 0 +3682 ns P2(a&&b):: C = 1 +3684 ns P1(a||b):: C = 1 +3684 ns P2(a||b):: C = 0 +3688 ns P1(a&&b):: C = 0 +3688 ns P2(a&&b):: C = 1 +3690 ns P1(a||b):: C = 1 +3690 ns P2(a||b):: C = 0 +3694 ns P1(a&&b):: C = 0 +3694 ns P2(a&&b):: C = 1 +3696 ns P1(a||b):: C = 1 +3696 ns P2(a||b):: C = 0 +3700 ns P1(a&&b):: C = 0 +3700 ns P2(a&&b):: C = 1 +3702 ns P1(a||b):: C = 0 +3702 ns P2(a||b):: C = 1 +3706 ns P1(a&&b):: C = 0 +3706 ns P2(a&&b):: C = 1 +3708 ns P1(a||b):: C = 1 +3708 ns P2(a||b):: C = 0 +3712 ns P1(a&&b):: C = 1 +3712 ns P2(a&&b):: C = 0 +3714 ns P1(a||b):: C = 1 +3714 ns P2(a||b):: C = 0 +3718 ns P1(a&&b):: C = 0 +3718 ns P2(a&&b):: C = 1 +3720 ns P1(a||b):: C = 1 +3720 ns P2(a||b):: C = 0 +3724 ns P1(a&&b):: C = 1 +3724 ns P2(a&&b):: C = 0 +3726 ns P1(a||b):: C = 1 +3726 ns P2(a||b):: C = 0 +3730 ns P1(a&&b):: C = 0 +3730 ns P2(a&&b):: C = 1 +3732 ns P1(a||b):: C = 1 +3732 ns P2(a||b):: C = 0 +3736 ns P1(a&&b):: C = 0 +3736 ns P2(a&&b):: C = 1 +3738 ns P1(a||b):: C = 1 +3738 ns P2(a||b):: C = 0 +3742 ns P1(a&&b):: C = 0 +3742 ns P2(a&&b):: C = 1 +3744 ns P1(a||b):: C = 1 +3744 ns P2(a||b):: C = 0 +3748 ns P1(a&&b):: C = 0 +3748 ns P2(a&&b):: C = 1 +3750 ns P1(a||b):: C = 1 +3750 ns P2(a||b):: C = 0 +3754 ns P1(a&&b):: C = 1 +3754 ns P2(a&&b):: C = 0 +3756 ns P1(a||b):: C = 1 +3756 ns P2(a||b):: C = 0 +3760 ns P1(a&&b):: C = 0 +3760 ns P2(a&&b):: C = 1 +3762 ns P1(a||b):: C = 0 +3762 ns P2(a||b):: C = 1 +3766 ns P1(a&&b):: C = 0 +3766 ns P2(a&&b):: C = 1 +3768 ns P1(a||b):: C = 0 +3768 ns P2(a||b):: C = 1 +3772 ns P1(a&&b):: C = 0 +3772 ns P2(a&&b):: C = 1 +3774 ns P1(a||b):: C = 1 +3774 ns P2(a||b):: C = 0 +3778 ns P1(a&&b):: C = 0 +3778 ns P2(a&&b):: C = 1 +3780 ns P1(a||b):: C = 1 +3780 ns P2(a||b):: C = 0 +3784 ns P1(a&&b):: C = 0 +3784 ns P2(a&&b):: C = 1 +3786 ns P1(a||b):: C = 1 +3786 ns P2(a||b):: C = 0 +3790 ns P1(a&&b):: C = 0 +3790 ns P2(a&&b):: C = 1 +3792 ns P1(a||b):: C = 1 +3792 ns P2(a||b):: C = 0 +3796 ns P1(a&&b):: C = 1 +3796 ns P2(a&&b):: C = 0 +3798 ns P1(a||b):: C = 1 +3798 ns P2(a||b):: C = 0 +3802 ns P1(a&&b):: C = 0 +3802 ns P2(a&&b):: C = 1 +3804 ns P1(a||b):: C = 1 +3804 ns P2(a||b):: C = 0 +3808 ns P1(a&&b):: C = 0 +3808 ns P2(a&&b):: C = 1 +3810 ns P1(a||b):: C = 1 +3810 ns P2(a||b):: C = 0 +3814 ns P1(a&&b):: C = 1 +3814 ns P2(a&&b):: C = 0 +3816 ns P1(a||b):: C = 1 +3816 ns P2(a||b):: C = 0 +3820 ns P1(a&&b):: C = 0 +3820 ns P2(a&&b):: C = 1 +3822 ns P1(a||b):: C = 1 +3822 ns P2(a||b):: C = 0 +3826 ns P1(a&&b):: C = 0 +3826 ns P2(a&&b):: C = 1 +3828 ns P1(a||b):: C = 0 +3828 ns P2(a||b):: C = 1 +3832 ns P1(a&&b):: C = 1 +3832 ns P2(a&&b):: C = 0 +3834 ns P1(a||b):: C = 1 +3834 ns P2(a||b):: C = 0 +3838 ns P1(a&&b):: C = 0 +3838 ns P2(a&&b):: C = 1 +3840 ns P1(a||b):: C = 1 +3840 ns P2(a||b):: C = 0 +3844 ns P1(a&&b):: C = 0 +3844 ns P2(a&&b):: C = 1 +3846 ns P1(a||b):: C = 1 +3846 ns P2(a||b):: C = 0 +3850 ns P1(a&&b):: C = 0 +3850 ns P2(a&&b):: C = 1 +3852 ns P1(a||b):: C = 1 +3852 ns P2(a||b):: C = 0 +3856 ns P1(a&&b):: C = 0 +3856 ns P2(a&&b):: C = 1 +3858 ns P1(a||b):: C = 0 +3858 ns P2(a||b):: C = 1 +3862 ns P1(a&&b):: C = 0 +3862 ns P2(a&&b):: C = 1 +3864 ns P1(a||b):: C = 1 +3864 ns P2(a||b):: C = 0 +3868 ns P1(a&&b):: C = 1 +3868 ns P2(a&&b):: C = 0 +3870 ns P1(a||b):: C = 1 +3870 ns P2(a||b):: C = 0 +3874 ns P1(a&&b):: C = 0 +3874 ns P2(a&&b):: C = 1 +3876 ns P1(a||b):: C = 1 +3876 ns P2(a||b):: C = 0 +3880 ns P1(a&&b):: C = 0 +3880 ns P2(a&&b):: C = 1 +3882 ns P1(a||b):: C = 1 +3882 ns P2(a||b):: C = 0 +3886 ns P1(a&&b):: C = 1 +3886 ns P2(a&&b):: C = 0 +3888 ns P1(a||b):: C = 0 +3888 ns P2(a||b):: C = 1 +3892 ns P1(a&&b):: C = 0 +3892 ns P2(a&&b):: C = 1 +3894 ns P1(a||b):: C = 1 +3894 ns P2(a||b):: C = 0 +3898 ns P1(a&&b):: C = 0 +3898 ns P2(a&&b):: C = 1 +3900 ns P1(a||b):: C = 1 +3900 ns P2(a||b):: C = 0 +3904 ns P1(a&&b):: C = 1 +3904 ns P2(a&&b):: C = 0 +3906 ns P1(a||b):: C = 0 +3906 ns P2(a||b):: C = 1 +3910 ns P1(a&&b):: C = 0 +3910 ns P2(a&&b):: C = 1 +3912 ns P1(a||b):: C = 0 +3912 ns P2(a||b):: C = 1 +3916 ns P1(a&&b):: C = 0 +3916 ns P2(a&&b):: C = 1 +3918 ns P1(a||b):: C = 1 +3918 ns P2(a||b):: C = 0 +3922 ns P1(a&&b):: C = 0 +3922 ns P2(a&&b):: C = 1 +3924 ns P1(a||b):: C = 1 +3924 ns P2(a||b):: C = 0 +3928 ns P1(a&&b):: C = 1 +3928 ns P2(a&&b):: C = 0 +3930 ns P1(a||b):: C = 1 +3930 ns P2(a||b):: C = 0 +3934 ns P1(a&&b):: C = 0 +3934 ns P2(a&&b):: C = 1 +3936 ns P1(a||b):: C = 1 +3936 ns P2(a||b):: C = 0 +3940 ns P1(a&&b):: C = 0 +3940 ns P2(a&&b):: C = 1 +3942 ns P1(a||b):: C = 0 +3942 ns P2(a||b):: C = 1 +3946 ns P1(a&&b):: C = 0 +3946 ns P2(a&&b):: C = 1 +3948 ns P1(a||b):: C = 0 +3948 ns P2(a||b):: C = 1 +3952 ns P1(a&&b):: C = 0 +3952 ns P2(a&&b):: C = 1 +3954 ns P1(a||b):: C = 1 +3954 ns P2(a||b):: C = 0 +3958 ns P1(a&&b):: C = 0 +3958 ns P2(a&&b):: C = 1 +3960 ns P1(a||b):: C = 1 +3960 ns P2(a||b):: C = 0 +3964 ns P1(a&&b):: C = 1 +3964 ns P2(a&&b):: C = 0 +3966 ns P1(a||b):: C = 1 +3966 ns P2(a||b):: C = 0 +3970 ns P1(a&&b):: C = 0 +3970 ns P2(a&&b):: C = 1 +3972 ns P1(a||b):: C = 1 +3972 ns P2(a||b):: C = 0 +3976 ns P1(a&&b):: C = 0 +3976 ns P2(a&&b):: C = 1 +3978 ns P1(a||b):: C = 1 +3978 ns P2(a||b):: C = 0 +3982 ns P1(a&&b):: C = 0 +3982 ns P2(a&&b):: C = 1 +3984 ns P1(a||b):: C = 1 +3984 ns P2(a||b):: C = 0 +3988 ns P1(a&&b):: C = 0 +3988 ns P2(a&&b):: C = 1 +3990 ns P1(a||b):: C = 1 +3990 ns P2(a||b):: C = 0 +3994 ns P1(a&&b):: C = 0 +3994 ns P2(a&&b):: C = 1 +3996 ns P1(a||b):: C = 0 +3996 ns P2(a||b):: C = 1 +4 us P1(a&&b):: C = 0 +4 us P2(a&&b):: C = 1 +4002 ns P1(a||b):: C = 1 +4002 ns P2(a||b):: C = 0 +4006 ns P1(a&&b):: C = 0 +4006 ns P2(a&&b):: C = 1 +4008 ns P1(a||b):: C = 0 +4008 ns P2(a||b):: C = 1 +4012 ns P1(a&&b):: C = 0 +4012 ns P2(a&&b):: C = 1 +4014 ns P1(a||b):: C = 1 +4014 ns P2(a||b):: C = 0 +4018 ns P1(a&&b):: C = 0 +4018 ns P2(a&&b):: C = 1 +4020 ns P1(a||b):: C = 1 +4020 ns P2(a||b):: C = 0 +4024 ns P1(a&&b):: C = 0 +4024 ns P2(a&&b):: C = 1 +4026 ns P1(a||b):: C = 1 +4026 ns P2(a||b):: C = 0 +4030 ns P1(a&&b):: C = 0 +4030 ns P2(a&&b):: C = 1 +4032 ns P1(a||b):: C = 1 +4032 ns P2(a||b):: C = 0 +4036 ns P1(a&&b):: C = 0 +4036 ns P2(a&&b):: C = 1 +4038 ns P1(a||b):: C = 1 +4038 ns P2(a||b):: C = 0 +4042 ns P1(a&&b):: C = 0 +4042 ns P2(a&&b):: C = 1 +4044 ns P1(a||b):: C = 0 +4044 ns P2(a||b):: C = 1 +4048 ns P1(a&&b):: C = 1 +4048 ns P2(a&&b):: C = 0 +4050 ns P1(a||b):: C = 1 +4050 ns P2(a||b):: C = 0 +4054 ns P1(a&&b):: C = 0 +4054 ns P2(a&&b):: C = 1 +4056 ns P1(a||b):: C = 1 +4056 ns P2(a||b):: C = 0 +4060 ns P1(a&&b):: C = 0 +4060 ns P2(a&&b):: C = 1 +4062 ns P1(a||b):: C = 0 +4062 ns P2(a||b):: C = 1 +4066 ns P1(a&&b):: C = 0 +4066 ns P2(a&&b):: C = 1 +4068 ns P1(a||b):: C = 0 +4068 ns P2(a||b):: C = 1 +4072 ns P1(a&&b):: C = 0 +4072 ns P2(a&&b):: C = 1 +4074 ns P1(a||b):: C = 1 +4074 ns P2(a||b):: C = 0 +4078 ns P1(a&&b):: C = 0 +4078 ns P2(a&&b):: C = 1 +4080 ns P1(a||b):: C = 1 +4080 ns P2(a||b):: C = 0 +4084 ns P1(a&&b):: C = 0 +4084 ns P2(a&&b):: C = 1 +4086 ns P1(a||b):: C = 1 +4086 ns P2(a||b):: C = 0 +4090 ns P1(a&&b):: C = 1 +4090 ns P2(a&&b):: C = 0 +4092 ns P1(a||b):: C = 0 +4092 ns P2(a||b):: C = 1 +4096 ns P1(a&&b):: C = 0 +4096 ns P2(a&&b):: C = 1 +4098 ns P1(a||b):: C = 1 +4098 ns P2(a||b):: C = 0 +4102 ns P1(a&&b):: C = 1 +4102 ns P2(a&&b):: C = 0 +4104 ns P1(a||b):: C = 1 +4104 ns P2(a||b):: C = 0 +4108 ns P1(a&&b):: C = 0 +4108 ns P2(a&&b):: C = 1 +4110 ns P1(a||b):: C = 1 +4110 ns P2(a||b):: C = 0 +4114 ns P1(a&&b):: C = 0 +4114 ns P2(a&&b):: C = 1 +4116 ns P1(a||b):: C = 1 +4116 ns P2(a||b):: C = 0 +4120 ns P1(a&&b):: C = 1 +4120 ns P2(a&&b):: C = 0 +4122 ns P1(a||b):: C = 1 +4122 ns P2(a||b):: C = 0 +4126 ns P1(a&&b):: C = 0 +4126 ns P2(a&&b):: C = 1 +4128 ns P1(a||b):: C = 0 +4128 ns P2(a||b):: C = 1 +4132 ns P1(a&&b):: C = 0 +4132 ns P2(a&&b):: C = 1 +4134 ns P1(a||b):: C = 1 +4134 ns P2(a||b):: C = 0 +4138 ns P1(a&&b):: C = 0 +4138 ns P2(a&&b):: C = 1 +4140 ns P1(a||b):: C = 1 +4140 ns P2(a||b):: C = 0 +4144 ns P1(a&&b):: C = 0 +4144 ns P2(a&&b):: C = 1 +4146 ns P1(a||b):: C = 1 +4146 ns P2(a||b):: C = 0 +4150 ns P1(a&&b):: C = 0 +4150 ns P2(a&&b):: C = 1 +4152 ns P1(a||b):: C = 1 +4152 ns P2(a||b):: C = 0 +4156 ns P1(a&&b):: C = 0 +4156 ns P2(a&&b):: C = 1 +4158 ns P1(a||b):: C = 1 +4158 ns P2(a||b):: C = 0 +4162 ns P1(a&&b):: C = 0 +4162 ns P2(a&&b):: C = 1 +4164 ns P1(a||b):: C = 1 +4164 ns P2(a||b):: C = 0 +4168 ns P1(a&&b):: C = 0 +4168 ns P2(a&&b):: C = 1 +4170 ns P1(a||b):: C = 1 +4170 ns P2(a||b):: C = 0 +4174 ns P1(a&&b):: C = 0 +4174 ns P2(a&&b):: C = 1 +4176 ns P1(a||b):: C = 1 +4176 ns P2(a||b):: C = 0 +4180 ns P1(a&&b):: C = 0 +4180 ns P2(a&&b):: C = 1 +4182 ns P1(a||b):: C = 1 +4182 ns P2(a||b):: C = 0 +4186 ns P1(a&&b):: C = 1 +4186 ns P2(a&&b):: C = 0 +4188 ns P1(a||b):: C = 0 +4188 ns P2(a||b):: C = 1 +4192 ns P1(a&&b):: C = 1 +4192 ns P2(a&&b):: C = 0 +4194 ns P1(a||b):: C = 1 +4194 ns P2(a||b):: C = 0 +4198 ns P1(a&&b):: C = 0 +4198 ns P2(a&&b):: C = 1 +4200 ns P1(a||b):: C = 1 +4200 ns P2(a||b):: C = 0 +4204 ns P1(a&&b):: C = 0 +4204 ns P2(a&&b):: C = 1 +4206 ns P1(a||b):: C = 1 +4206 ns P2(a||b):: C = 0 +4210 ns P1(a&&b):: C = 0 +4210 ns P2(a&&b):: C = 1 +4212 ns P1(a||b):: C = 1 +4212 ns P2(a||b):: C = 0 +4216 ns P1(a&&b):: C = 0 +4216 ns P2(a&&b):: C = 1 +4218 ns P1(a||b):: C = 1 +4218 ns P2(a||b):: C = 0 +4222 ns P1(a&&b):: C = 1 +4222 ns P2(a&&b):: C = 0 +4224 ns P1(a||b):: C = 1 +4224 ns P2(a||b):: C = 0 +4228 ns P1(a&&b):: C = 0 +4228 ns P2(a&&b):: C = 1 +4230 ns P1(a||b):: C = 0 +4230 ns P2(a||b):: C = 1 +4234 ns P1(a&&b):: C = 0 +4234 ns P2(a&&b):: C = 1 +4236 ns P1(a||b):: C = 0 +4236 ns P2(a||b):: C = 1 +4240 ns P1(a&&b):: C = 0 +4240 ns P2(a&&b):: C = 1 +4242 ns P1(a||b):: C = 0 +4242 ns P2(a||b):: C = 1 +4246 ns P1(a&&b):: C = 1 +4246 ns P2(a&&b):: C = 0 +4248 ns P1(a||b):: C = 1 +4248 ns P2(a||b):: C = 0 +4252 ns P1(a&&b):: C = 0 +4252 ns P2(a&&b):: C = 1 +4254 ns P1(a||b):: C = 0 +4254 ns P2(a||b):: C = 1 +4258 ns P1(a&&b):: C = 0 +4258 ns P2(a&&b):: C = 1 +4260 ns P1(a||b):: C = 1 +4260 ns P2(a||b):: C = 0 +4264 ns P1(a&&b):: C = 1 +4264 ns P2(a&&b):: C = 0 +4266 ns P1(a||b):: C = 0 +4266 ns P2(a||b):: C = 1 +4270 ns P1(a&&b):: C = 0 +4270 ns P2(a&&b):: C = 1 +4272 ns P1(a||b):: C = 0 +4272 ns P2(a||b):: C = 1 +4276 ns P1(a&&b):: C = 0 +4276 ns P2(a&&b):: C = 1 +4278 ns P1(a||b):: C = 0 +4278 ns P2(a||b):: C = 1 +4282 ns P1(a&&b):: C = 0 +4282 ns P2(a&&b):: C = 1 +4284 ns P1(a||b):: C = 1 +4284 ns P2(a||b):: C = 0 +4288 ns P1(a&&b):: C = 0 +4288 ns P2(a&&b):: C = 1 +4290 ns P1(a||b):: C = 1 +4290 ns P2(a||b):: C = 0 +4294 ns P1(a&&b):: C = 0 +4294 ns P2(a&&b):: C = 1 +4296 ns P1(a||b):: C = 0 +4296 ns P2(a||b):: C = 1 +4300 ns P1(a&&b):: C = 0 +4300 ns P2(a&&b):: C = 1 +4302 ns P1(a||b):: C = 1 +4302 ns P2(a||b):: C = 0 +4306 ns P1(a&&b):: C = 0 +4306 ns P2(a&&b):: C = 1 +4308 ns P1(a||b):: C = 1 +4308 ns P2(a||b):: C = 0 +4312 ns P1(a&&b):: C = 0 +4312 ns P2(a&&b):: C = 1 +4314 ns P1(a||b):: C = 1 +4314 ns P2(a||b):: C = 0 +4318 ns P1(a&&b):: C = 0 +4318 ns P2(a&&b):: C = 1 +4320 ns P1(a||b):: C = 0 +4320 ns P2(a||b):: C = 1 +4324 ns P1(a&&b):: C = 0 +4324 ns P2(a&&b):: C = 1 +4326 ns P1(a||b):: C = 0 +4326 ns P2(a||b):: C = 1 +4330 ns P1(a&&b):: C = 0 +4330 ns P2(a&&b):: C = 1 +4332 ns P1(a||b):: C = 0 +4332 ns P2(a||b):: C = 1 +4336 ns P1(a&&b):: C = 0 +4336 ns P2(a&&b):: C = 1 +4338 ns P1(a||b):: C = 0 +4338 ns P2(a||b):: C = 1 +4342 ns P1(a&&b):: C = 0 +4342 ns P2(a&&b):: C = 1 +4344 ns P1(a||b):: C = 1 +4344 ns P2(a||b):: C = 0 +4348 ns P1(a&&b):: C = 0 +4348 ns P2(a&&b):: C = 1 +4350 ns P1(a||b):: C = 1 +4350 ns P2(a||b):: C = 0 +4354 ns P1(a&&b):: C = 0 +4354 ns P2(a&&b):: C = 1 +4356 ns P1(a||b):: C = 0 +4356 ns P2(a||b):: C = 1 +4360 ns P1(a&&b):: C = 0 +4360 ns P2(a&&b):: C = 1 +4362 ns P1(a||b):: C = 1 +4362 ns P2(a||b):: C = 0 +4366 ns P1(a&&b):: C = 1 +4366 ns P2(a&&b):: C = 0 +4368 ns P1(a||b):: C = 1 +4368 ns P2(a||b):: C = 0 +4372 ns P1(a&&b):: C = 0 +4372 ns P2(a&&b):: C = 1 +4374 ns P1(a||b):: C = 1 +4374 ns P2(a||b):: C = 0 +4378 ns P1(a&&b):: C = 1 +4378 ns P2(a&&b):: C = 0 +4380 ns P1(a||b):: C = 1 +4380 ns P2(a||b):: C = 0 +4384 ns P1(a&&b):: C = 0 +4384 ns P2(a&&b):: C = 1 +4386 ns P1(a||b):: C = 1 +4386 ns P2(a||b):: C = 0 +4390 ns P1(a&&b):: C = 0 +4390 ns P2(a&&b):: C = 1 +4392 ns P1(a||b):: C = 0 +4392 ns P2(a||b):: C = 1 +4396 ns P1(a&&b):: C = 0 +4396 ns P2(a&&b):: C = 1 +4398 ns P1(a||b):: C = 1 +4398 ns P2(a||b):: C = 0 +4402 ns P1(a&&b):: C = 0 +4402 ns P2(a&&b):: C = 1 +4404 ns P1(a||b):: C = 1 +4404 ns P2(a||b):: C = 0 +4408 ns P1(a&&b):: C = 0 +4408 ns P2(a&&b):: C = 1 +4410 ns P1(a||b):: C = 1 +4410 ns P2(a||b):: C = 0 +4414 ns P1(a&&b):: C = 0 +4414 ns P2(a&&b):: C = 1 +4416 ns P1(a||b):: C = 1 +4416 ns P2(a||b):: C = 0 +4420 ns P1(a&&b):: C = 0 +4420 ns P2(a&&b):: C = 1 +4422 ns P1(a||b):: C = 0 +4422 ns P2(a||b):: C = 1 +4426 ns P1(a&&b):: C = 1 +4426 ns P2(a&&b):: C = 0 +4428 ns P1(a||b):: C = 1 +4428 ns P2(a||b):: C = 0 +4432 ns P1(a&&b):: C = 1 +4432 ns P2(a&&b):: C = 0 +4434 ns P1(a||b):: C = 1 +4434 ns P2(a||b):: C = 0 +4438 ns P1(a&&b):: C = 0 +4438 ns P2(a&&b):: C = 1 +4440 ns P1(a||b):: C = 1 +4440 ns P2(a||b):: C = 0 +4444 ns P1(a&&b):: C = 0 +4444 ns P2(a&&b):: C = 1 +4446 ns P1(a||b):: C = 1 +4446 ns P2(a||b):: C = 0 +4450 ns P1(a&&b):: C = 1 +4450 ns P2(a&&b):: C = 0 +4452 ns P1(a||b):: C = 1 +4452 ns P2(a||b):: C = 0 +4456 ns P1(a&&b):: C = 1 +4456 ns P2(a&&b):: C = 0 +4458 ns P1(a||b):: C = 1 +4458 ns P2(a||b):: C = 0 +4462 ns P1(a&&b):: C = 0 +4462 ns P2(a&&b):: C = 1 +4464 ns P1(a||b):: C = 1 +4464 ns P2(a||b):: C = 0 +4468 ns P1(a&&b):: C = 0 +4468 ns P2(a&&b):: C = 1 +4470 ns P1(a||b):: C = 0 +4470 ns P2(a||b):: C = 1 +4474 ns P1(a&&b):: C = 1 +4474 ns P2(a&&b):: C = 0 +4476 ns P1(a||b):: C = 1 +4476 ns P2(a||b):: C = 0 +4480 ns P1(a&&b):: C = 1 +4480 ns P2(a&&b):: C = 0 +4482 ns P1(a||b):: C = 1 +4482 ns P2(a||b):: C = 0 +4486 ns P1(a&&b):: C = 0 +4486 ns P2(a&&b):: C = 1 +4488 ns P1(a||b):: C = 1 +4488 ns P2(a||b):: C = 0 +4492 ns P1(a&&b):: C = 0 +4492 ns P2(a&&b):: C = 1 +4494 ns P1(a||b):: C = 0 +4494 ns P2(a||b):: C = 1 +4498 ns P1(a&&b):: C = 1 +4498 ns P2(a&&b):: C = 0 +4500 ns P1(a||b):: C = 1 +4500 ns P2(a||b):: C = 0 +4504 ns P1(a&&b):: C = 0 +4504 ns P2(a&&b):: C = 1 +4506 ns P1(a||b):: C = 1 +4506 ns P2(a||b):: C = 0 +4510 ns P1(a&&b):: C = 1 +4510 ns P2(a&&b):: C = 0 +4512 ns P1(a||b):: C = 0 +4512 ns P2(a||b):: C = 1 +4516 ns P1(a&&b):: C = 0 +4516 ns P2(a&&b):: C = 1 +4518 ns P1(a||b):: C = 1 +4518 ns P2(a||b):: C = 0 +4522 ns P1(a&&b):: C = 0 +4522 ns P2(a&&b):: C = 1 +4524 ns P1(a||b):: C = 1 +4524 ns P2(a||b):: C = 0 +4528 ns P1(a&&b):: C = 0 +4528 ns P2(a&&b):: C = 1 +4530 ns P1(a||b):: C = 1 +4530 ns P2(a||b):: C = 0 +4534 ns P1(a&&b):: C = 0 +4534 ns P2(a&&b):: C = 1 +4536 ns P1(a||b):: C = 1 +4536 ns P2(a||b):: C = 0 +4540 ns P1(a&&b):: C = 0 +4540 ns P2(a&&b):: C = 1 +4542 ns P1(a||b):: C = 1 +4542 ns P2(a||b):: C = 0 +4546 ns P1(a&&b):: C = 1 +4546 ns P2(a&&b):: C = 0 +4548 ns P1(a||b):: C = 1 +4548 ns P2(a||b):: C = 0 +4552 ns P1(a&&b):: C = 1 +4552 ns P2(a&&b):: C = 0 +4554 ns P1(a||b):: C = 0 +4554 ns P2(a||b):: C = 1 +4558 ns P1(a&&b):: C = 0 +4558 ns P2(a&&b):: C = 1 +4560 ns P1(a||b):: C = 1 +4560 ns P2(a||b):: C = 0 +4564 ns P1(a&&b):: C = 0 +4564 ns P2(a&&b):: C = 1 +4566 ns P1(a||b):: C = 1 +4566 ns P2(a||b):: C = 0 +4570 ns P1(a&&b):: C = 0 +4570 ns P2(a&&b):: C = 1 +4572 ns P1(a||b):: C = 1 +4572 ns P2(a||b):: C = 0 +4576 ns P1(a&&b):: C = 1 +4576 ns P2(a&&b):: C = 0 +4578 ns P1(a||b):: C = 1 +4578 ns P2(a||b):: C = 0 +4582 ns P1(a&&b):: C = 1 +4582 ns P2(a&&b):: C = 0 +4584 ns P1(a||b):: C = 1 +4584 ns P2(a||b):: C = 0 +4588 ns P1(a&&b):: C = 0 +4588 ns P2(a&&b):: C = 1 +4590 ns P1(a||b):: C = 1 +4590 ns P2(a||b):: C = 0 +4594 ns P1(a&&b):: C = 0 +4594 ns P2(a&&b):: C = 1 +4596 ns P1(a||b):: C = 1 +4596 ns P2(a||b):: C = 0 +4600 ns P1(a&&b):: C = 0 +4600 ns P2(a&&b):: C = 1 +4602 ns P1(a||b):: C = 1 +4602 ns P2(a||b):: C = 0 +4606 ns P1(a&&b):: C = 0 +4606 ns P2(a&&b):: C = 1 +4608 ns P1(a||b):: C = 0 +4608 ns P2(a||b):: C = 1 +4612 ns P1(a&&b):: C = 0 +4612 ns P2(a&&b):: C = 1 +4614 ns P1(a||b):: C = 0 +4614 ns P2(a||b):: C = 1 +4618 ns P1(a&&b):: C = 0 +4618 ns P2(a&&b):: C = 1 +4620 ns P1(a||b):: C = 1 +4620 ns P2(a||b):: C = 0 +4624 ns P1(a&&b):: C = 1 +4624 ns P2(a&&b):: C = 0 +4626 ns P1(a||b):: C = 1 +4626 ns P2(a||b):: C = 0 +4630 ns P1(a&&b):: C = 0 +4630 ns P2(a&&b):: C = 1 +4632 ns P1(a||b):: C = 1 +4632 ns P2(a||b):: C = 0 +4636 ns P1(a&&b):: C = 0 +4636 ns P2(a&&b):: C = 1 +4638 ns P1(a||b):: C = 1 +4638 ns P2(a||b):: C = 0 +4642 ns P1(a&&b):: C = 0 +4642 ns P2(a&&b):: C = 1 +4644 ns P1(a||b):: C = 1 +4644 ns P2(a||b):: C = 0 +4648 ns P1(a&&b):: C = 0 +4648 ns P2(a&&b):: C = 1 +4650 ns P1(a||b):: C = 1 +4650 ns P2(a||b):: C = 0 +4654 ns P1(a&&b):: C = 1 +4654 ns P2(a&&b):: C = 0 +4656 ns P1(a||b):: C = 1 +4656 ns P2(a||b):: C = 0 +4660 ns P1(a&&b):: C = 1 +4660 ns P2(a&&b):: C = 0 +4662 ns P1(a||b):: C = 1 +4662 ns P2(a||b):: C = 0 +4666 ns P1(a&&b):: C = 1 +4666 ns P2(a&&b):: C = 0 +4668 ns P1(a||b):: C = 1 +4668 ns P2(a||b):: C = 0 +4672 ns P1(a&&b):: C = 0 +4672 ns P2(a&&b):: C = 1 +4674 ns P1(a||b):: C = 1 +4674 ns P2(a||b):: C = 0 +4678 ns P1(a&&b):: C = 0 +4678 ns P2(a&&b):: C = 1 +4680 ns P1(a||b):: C = 1 +4680 ns P2(a||b):: C = 0 +4684 ns P1(a&&b):: C = 1 +4684 ns P2(a&&b):: C = 0 +4686 ns P1(a||b):: C = 1 +4686 ns P2(a||b):: C = 0 +4690 ns P1(a&&b):: C = 0 +4690 ns P2(a&&b):: C = 1 +4692 ns P1(a||b):: C = 1 +4692 ns P2(a||b):: C = 0 +4696 ns P1(a&&b):: C = 0 +4696 ns P2(a&&b):: C = 1 +4698 ns P1(a||b):: C = 0 +4698 ns P2(a||b):: C = 1 +4702 ns P1(a&&b):: C = 0 +4702 ns P2(a&&b):: C = 1 +4704 ns P1(a||b):: C = 0 +4704 ns P2(a||b):: C = 1 +4708 ns P1(a&&b):: C = 1 +4708 ns P2(a&&b):: C = 0 +4710 ns P1(a||b):: C = 1 +4710 ns P2(a||b):: C = 0 +4714 ns P1(a&&b):: C = 0 +4714 ns P2(a&&b):: C = 1 +4716 ns P1(a||b):: C = 1 +4716 ns P2(a||b):: C = 0 +4720 ns P1(a&&b):: C = 0 +4720 ns P2(a&&b):: C = 1 +4722 ns P1(a||b):: C = 1 +4722 ns P2(a||b):: C = 0 +4726 ns P1(a&&b):: C = 1 +4726 ns P2(a&&b):: C = 0 +4728 ns P1(a||b):: C = 1 +4728 ns P2(a||b):: C = 0 +4732 ns P1(a&&b):: C = 0 +4732 ns P2(a&&b):: C = 1 +4734 ns P1(a||b):: C = 1 +4734 ns P2(a||b):: C = 0 +4738 ns P1(a&&b):: C = 0 +4738 ns P2(a&&b):: C = 1 +4740 ns P1(a||b):: C = 1 +4740 ns P2(a||b):: C = 0 +4744 ns P1(a&&b):: C = 0 +4744 ns P2(a&&b):: C = 1 +4746 ns P1(a||b):: C = 0 +4746 ns P2(a||b):: C = 1 +4750 ns P1(a&&b):: C = 0 +4750 ns P2(a&&b):: C = 1 +4752 ns P1(a||b):: C = 1 +4752 ns P2(a||b):: C = 0 +4756 ns P1(a&&b):: C = 0 +4756 ns P2(a&&b):: C = 1 +4758 ns P1(a||b):: C = 1 +4758 ns P2(a||b):: C = 0 +4762 ns P1(a&&b):: C = 0 +4762 ns P2(a&&b):: C = 1 +4764 ns P1(a||b):: C = 1 +4764 ns P2(a||b):: C = 0 +4768 ns P1(a&&b):: C = 0 +4768 ns P2(a&&b):: C = 1 +4770 ns P1(a||b):: C = 1 +4770 ns P2(a||b):: C = 0 +4774 ns P1(a&&b):: C = 0 +4774 ns P2(a&&b):: C = 1 +4776 ns P1(a||b):: C = 0 +4776 ns P2(a||b):: C = 1 +4780 ns P1(a&&b):: C = 0 +4780 ns P2(a&&b):: C = 1 +4782 ns P1(a||b):: C = 1 +4782 ns P2(a||b):: C = 0 +4786 ns P1(a&&b):: C = 0 +4786 ns P2(a&&b):: C = 1 +4788 ns P1(a||b):: C = 1 +4788 ns P2(a||b):: C = 0 +4792 ns P1(a&&b):: C = 1 +4792 ns P2(a&&b):: C = 0 +4794 ns P1(a||b):: C = 1 +4794 ns P2(a||b):: C = 0 +4798 ns P1(a&&b):: C = 1 +4798 ns P2(a&&b):: C = 0 +4800 ns P1(a||b):: C = 1 +4800 ns P2(a||b):: C = 0 +4804 ns P1(a&&b):: C = 0 +4804 ns P2(a&&b):: C = 1 +4806 ns P1(a||b):: C = 1 +4806 ns P2(a||b):: C = 0 +4810 ns P1(a&&b):: C = 0 +4810 ns P2(a&&b):: C = 1 +4812 ns P1(a||b):: C = 1 +4812 ns P2(a||b):: C = 0 +4816 ns P1(a&&b):: C = 1 +4816 ns P2(a&&b):: C = 0 +4818 ns P1(a||b):: C = 1 +4818 ns P2(a||b):: C = 0 +4822 ns P1(a&&b):: C = 0 +4822 ns P2(a&&b):: C = 1 +4824 ns P1(a||b):: C = 1 +4824 ns P2(a||b):: C = 0 +4828 ns P1(a&&b):: C = 0 +4828 ns P2(a&&b):: C = 1 +4830 ns P1(a||b):: C = 1 +4830 ns P2(a||b):: C = 0 +4834 ns P1(a&&b):: C = 1 +4834 ns P2(a&&b):: C = 0 +4836 ns P1(a||b):: C = 0 +4836 ns P2(a||b):: C = 1 +4840 ns P1(a&&b):: C = 0 +4840 ns P2(a&&b):: C = 1 +4842 ns P1(a||b):: C = 0 +4842 ns P2(a||b):: C = 1 +4846 ns P1(a&&b):: C = 1 +4846 ns P2(a&&b):: C = 0 +4848 ns P1(a||b):: C = 0 +4848 ns P2(a||b):: C = 1 +4852 ns P1(a&&b):: C = 1 +4852 ns P2(a&&b):: C = 0 +4854 ns P1(a||b):: C = 0 +4854 ns P2(a||b):: C = 1 +4858 ns P1(a&&b):: C = 0 +4858 ns P2(a&&b):: C = 1 +4860 ns P1(a||b):: C = 1 +4860 ns P2(a||b):: C = 0 +4864 ns P1(a&&b):: C = 0 +4864 ns P2(a&&b):: C = 1 +4866 ns P1(a||b):: C = 1 +4866 ns P2(a||b):: C = 0 +4870 ns P1(a&&b):: C = 0 +4870 ns P2(a&&b):: C = 1 +4872 ns P1(a||b):: C = 1 +4872 ns P2(a||b):: C = 0 +4876 ns P1(a&&b):: C = 0 +4876 ns P2(a&&b):: C = 1 +4878 ns P1(a||b):: C = 1 +4878 ns P2(a||b):: C = 0 +4882 ns P1(a&&b):: C = 0 +4882 ns P2(a&&b):: C = 1 +4884 ns P1(a||b):: C = 1 +4884 ns P2(a||b):: C = 0 +4888 ns P1(a&&b):: C = 0 +4888 ns P2(a&&b):: C = 1 +4890 ns P1(a||b):: C = 1 +4890 ns P2(a||b):: C = 0 +4894 ns P1(a&&b):: C = 0 +4894 ns P2(a&&b):: C = 1 +4896 ns P1(a||b):: C = 0 +4896 ns P2(a||b):: C = 1 +4900 ns P1(a&&b):: C = 0 +4900 ns P2(a&&b):: C = 1 +4902 ns P1(a||b):: C = 1 +4902 ns P2(a||b):: C = 0 +4906 ns P1(a&&b):: C = 1 +4906 ns P2(a&&b):: C = 0 +4908 ns P1(a||b):: C = 1 +4908 ns P2(a||b):: C = 0 +4912 ns P1(a&&b):: C = 0 +4912 ns P2(a&&b):: C = 1 +4914 ns P1(a||b):: C = 1 +4914 ns P2(a||b):: C = 0 +4918 ns P1(a&&b):: C = 0 +4918 ns P2(a&&b):: C = 1 +4920 ns P1(a||b):: C = 1 +4920 ns P2(a||b):: C = 0 +4924 ns P1(a&&b):: C = 0 +4924 ns P2(a&&b):: C = 1 +4926 ns P1(a||b):: C = 1 +4926 ns P2(a||b):: C = 0 +4930 ns P1(a&&b):: C = 0 +4930 ns P2(a&&b):: C = 1 +4932 ns P1(a||b):: C = 1 +4932 ns P2(a||b):: C = 0 +4936 ns P1(a&&b):: C = 0 +4936 ns P2(a&&b):: C = 1 +4938 ns P1(a||b):: C = 1 +4938 ns P2(a||b):: C = 0 +4942 ns P1(a&&b):: C = 0 +4942 ns P2(a&&b):: C = 1 +4944 ns P1(a||b):: C = 1 +4944 ns P2(a||b):: C = 0 +4948 ns P1(a&&b):: C = 0 +4948 ns P2(a&&b):: C = 1 +4950 ns P1(a||b):: C = 1 +4950 ns P2(a||b):: C = 0 +4954 ns P1(a&&b):: C = 0 +4954 ns P2(a&&b):: C = 1 +4956 ns P1(a||b):: C = 0 +4956 ns P2(a||b):: C = 1 +4960 ns P1(a&&b):: C = 0 +4960 ns P2(a&&b):: C = 1 +4962 ns P1(a||b):: C = 1 +4962 ns P2(a||b):: C = 0 +4966 ns P1(a&&b):: C = 0 +4966 ns P2(a&&b):: C = 1 +4968 ns P1(a||b):: C = 1 +4968 ns P2(a||b):: C = 0 +4972 ns P1(a&&b):: C = 1 +4972 ns P2(a&&b):: C = 0 +4974 ns P1(a||b):: C = 1 +4974 ns P2(a||b):: C = 0 +4978 ns P1(a&&b):: C = 0 +4978 ns P2(a&&b):: C = 1 +4980 ns P1(a||b):: C = 1 +4980 ns P2(a||b):: C = 0 +4984 ns P1(a&&b):: C = 0 +4984 ns P2(a&&b):: C = 1 +4986 ns P1(a||b):: C = 0 +4986 ns P2(a||b):: C = 1 +4990 ns P1(a&&b):: C = 0 +4990 ns P2(a&&b):: C = 1 +4992 ns P1(a||b):: C = 1 +4992 ns P2(a||b):: C = 0 +4996 ns P1(a&&b):: C = 1 +4996 ns P2(a&&b):: C = 0 +4998 ns P1(a||b):: C = 1 +4998 ns P2(a||b):: C = 0 +5002 ns P1(a&&b):: C = 0 +5002 ns P2(a&&b):: C = 1 +5004 ns P1(a||b):: C = 1 +5004 ns P2(a||b):: C = 0 +5008 ns P1(a&&b):: C = 0 +5008 ns P2(a&&b):: C = 1 +5010 ns P1(a||b):: C = 1 +5010 ns P2(a||b):: C = 0 +5014 ns P1(a&&b):: C = 0 +5014 ns P2(a&&b):: C = 1 +5016 ns P1(a||b):: C = 1 +5016 ns P2(a||b):: C = 0 +5020 ns P1(a&&b):: C = 0 +5020 ns P2(a&&b):: C = 1 +5022 ns P1(a||b):: C = 1 +5022 ns P2(a||b):: C = 0 +5026 ns P1(a&&b):: C = 0 +5026 ns P2(a&&b):: C = 1 +5028 ns P1(a||b):: C = 0 +5028 ns P2(a||b):: C = 1 +5032 ns P1(a&&b):: C = 0 +5032 ns P2(a&&b):: C = 1 +5034 ns P1(a||b):: C = 1 +5034 ns P2(a||b):: C = 0 +5038 ns P1(a&&b):: C = 0 +5038 ns P2(a&&b):: C = 1 +5040 ns P1(a||b):: C = 0 +5040 ns P2(a||b):: C = 1 +5044 ns P1(a&&b):: C = 1 +5044 ns P2(a&&b):: C = 0 +5046 ns P1(a||b):: C = 0 +5046 ns P2(a||b):: C = 1 +5050 ns P1(a&&b):: C = 1 +5050 ns P2(a&&b):: C = 0 +5052 ns P1(a||b):: C = 1 +5052 ns P2(a||b):: C = 0 +5056 ns P1(a&&b):: C = 0 +5056 ns P2(a&&b):: C = 1 +5058 ns P1(a||b):: C = 1 +5058 ns P2(a||b):: C = 0 +5062 ns P1(a&&b):: C = 1 +5062 ns P2(a&&b):: C = 0 +5064 ns P1(a||b):: C = 1 +5064 ns P2(a||b):: C = 0 +5068 ns P1(a&&b):: C = 0 +5068 ns P2(a&&b):: C = 1 +5070 ns P1(a||b):: C = 1 +5070 ns P2(a||b):: C = 0 +5074 ns P1(a&&b):: C = 0 +5074 ns P2(a&&b):: C = 1 +5076 ns P1(a||b):: C = 1 +5076 ns P2(a||b):: C = 0 +5080 ns P1(a&&b):: C = 0 +5080 ns P2(a&&b):: C = 1 +5082 ns P1(a||b):: C = 0 +5082 ns P2(a||b):: C = 1 +5086 ns P1(a&&b):: C = 1 +5086 ns P2(a&&b):: C = 0 +5088 ns P1(a||b):: C = 1 +5088 ns P2(a||b):: C = 0 +5092 ns P1(a&&b):: C = 0 +5092 ns P2(a&&b):: C = 1 +5094 ns P1(a||b):: C = 1 +5094 ns P2(a||b):: C = 0 +5098 ns P1(a&&b):: C = 1 +5098 ns P2(a&&b):: C = 0 +5100 ns P1(a||b):: C = 1 +5100 ns P2(a||b):: C = 0 +5104 ns P1(a&&b):: C = 0 +5104 ns P2(a&&b):: C = 1 +5106 ns P1(a||b):: C = 1 +5106 ns P2(a||b):: C = 0 +5110 ns P1(a&&b):: C = 0 +5110 ns P2(a&&b):: C = 1 +5112 ns P1(a||b):: C = 1 +5112 ns P2(a||b):: C = 0 +5116 ns P1(a&&b):: C = 0 +5116 ns P2(a&&b):: C = 1 +5118 ns P1(a||b):: C = 1 +5118 ns P2(a||b):: C = 0 +5122 ns P1(a&&b):: C = 0 +5122 ns P2(a&&b):: C = 1 +5124 ns P1(a||b):: C = 1 +5124 ns P2(a||b):: C = 0 +5128 ns P1(a&&b):: C = 1 +5128 ns P2(a&&b):: C = 0 +5130 ns P1(a||b):: C = 0 +5130 ns P2(a||b):: C = 1 +5134 ns P1(a&&b):: C = 0 +5134 ns P2(a&&b):: C = 1 +5136 ns P1(a||b):: C = 1 +5136 ns P2(a||b):: C = 0 +5140 ns P1(a&&b):: C = 0 +5140 ns P2(a&&b):: C = 1 +5142 ns P1(a||b):: C = 1 +5142 ns P2(a||b):: C = 0 +5146 ns P1(a&&b):: C = 0 +5146 ns P2(a&&b):: C = 1 +5148 ns P1(a||b):: C = 1 +5148 ns P2(a||b):: C = 0 +5152 ns P1(a&&b):: C = 0 +5152 ns P2(a&&b):: C = 1 +5154 ns P1(a||b):: C = 1 +5154 ns P2(a||b):: C = 0 +5158 ns P1(a&&b):: C = 1 +5158 ns P2(a&&b):: C = 0 +5160 ns P1(a||b):: C = 1 +5160 ns P2(a||b):: C = 0 +5164 ns P1(a&&b):: C = 0 +5164 ns P2(a&&b):: C = 1 +5166 ns P1(a||b):: C = 1 +5166 ns P2(a||b):: C = 0 +5170 ns P1(a&&b):: C = 1 +5170 ns P2(a&&b):: C = 0 +5172 ns P1(a||b):: C = 1 +5172 ns P2(a||b):: C = 0 +5176 ns P1(a&&b):: C = 0 +5176 ns P2(a&&b):: C = 1 +5178 ns P1(a||b):: C = 1 +5178 ns P2(a||b):: C = 0 +5182 ns P1(a&&b):: C = 0 +5182 ns P2(a&&b):: C = 1 +5184 ns P1(a||b):: C = 1 +5184 ns P2(a||b):: C = 0 +5188 ns P1(a&&b):: C = 0 +5188 ns P2(a&&b):: C = 1 +5190 ns P1(a||b):: C = 1 +5190 ns P2(a||b):: C = 0 +5194 ns P1(a&&b):: C = 1 +5194 ns P2(a&&b):: C = 0 +5196 ns P1(a||b):: C = 0 +5196 ns P2(a||b):: C = 1 +5200 ns P1(a&&b):: C = 0 +5200 ns P2(a&&b):: C = 1 +5202 ns P1(a||b):: C = 1 +5202 ns P2(a||b):: C = 0 +5206 ns P1(a&&b):: C = 0 +5206 ns P2(a&&b):: C = 1 +5208 ns P1(a||b):: C = 1 +5208 ns P2(a||b):: C = 0 +5212 ns P1(a&&b):: C = 0 +5212 ns P2(a&&b):: C = 1 +5214 ns P1(a||b):: C = 1 +5214 ns P2(a||b):: C = 0 +5218 ns P1(a&&b):: C = 1 +5218 ns P2(a&&b):: C = 0 +5220 ns P1(a||b):: C = 1 +5220 ns P2(a||b):: C = 0 +5224 ns P1(a&&b):: C = 1 +5224 ns P2(a&&b):: C = 0 +5226 ns P1(a||b):: C = 1 +5226 ns P2(a||b):: C = 0 +5230 ns P1(a&&b):: C = 0 +5230 ns P2(a&&b):: C = 1 +5232 ns P1(a||b):: C = 0 +5232 ns P2(a||b):: C = 1 +5236 ns P1(a&&b):: C = 0 +5236 ns P2(a&&b):: C = 1 +5238 ns P1(a||b):: C = 1 +5238 ns P2(a||b):: C = 0 +5242 ns P1(a&&b):: C = 0 +5242 ns P2(a&&b):: C = 1 +5244 ns P1(a||b):: C = 1 +5244 ns P2(a||b):: C = 0 +5248 ns P1(a&&b):: C = 0 +5248 ns P2(a&&b):: C = 1 +5250 ns P1(a||b):: C = 1 +5250 ns P2(a||b):: C = 0 +5254 ns P1(a&&b):: C = 0 +5254 ns P2(a&&b):: C = 1 +5256 ns P1(a||b):: C = 1 +5256 ns P2(a||b):: C = 0 +5260 ns P1(a&&b):: C = 1 +5260 ns P2(a&&b):: C = 0 +5262 ns P1(a||b):: C = 1 +5262 ns P2(a||b):: C = 0 +5266 ns P1(a&&b):: C = 0 +5266 ns P2(a&&b):: C = 1 +5268 ns P1(a||b):: C = 0 +5268 ns P2(a||b):: C = 1 +5272 ns P1(a&&b):: C = 0 +5272 ns P2(a&&b):: C = 1 +5274 ns P1(a||b):: C = 1 +5274 ns P2(a||b):: C = 0 +5278 ns P1(a&&b):: C = 0 +5278 ns P2(a&&b):: C = 1 +5280 ns P1(a||b):: C = 0 +5280 ns P2(a||b):: C = 1 +5284 ns P1(a&&b):: C = 1 +5284 ns P2(a&&b):: C = 0 +5286 ns P1(a||b):: C = 0 +5286 ns P2(a||b):: C = 1 +5290 ns P1(a&&b):: C = 0 +5290 ns P2(a&&b):: C = 1 +5292 ns P1(a||b):: C = 1 +5292 ns P2(a||b):: C = 0 +5296 ns P1(a&&b):: C = 0 +5296 ns P2(a&&b):: C = 1 +5298 ns P1(a||b):: C = 0 +5298 ns P2(a||b):: C = 1 +5302 ns P1(a&&b):: C = 0 +5302 ns P2(a&&b):: C = 1 +5304 ns P1(a||b):: C = 1 +5304 ns P2(a||b):: C = 0 +5308 ns P1(a&&b):: C = 0 +5308 ns P2(a&&b):: C = 1 +5310 ns P1(a||b):: C = 1 +5310 ns P2(a||b):: C = 0 +5314 ns P1(a&&b):: C = 0 +5314 ns P2(a&&b):: C = 1 +5316 ns P1(a||b):: C = 1 +5316 ns P2(a||b):: C = 0 +5320 ns P1(a&&b):: C = 0 +5320 ns P2(a&&b):: C = 1 +5322 ns P1(a||b):: C = 0 +5322 ns P2(a||b):: C = 1 +5326 ns P1(a&&b):: C = 0 +5326 ns P2(a&&b):: C = 1 +5328 ns P1(a||b):: C = 1 +5328 ns P2(a||b):: C = 0 +5332 ns P1(a&&b):: C = 0 +5332 ns P2(a&&b):: C = 1 +5334 ns P1(a||b):: C = 1 +5334 ns P2(a||b):: C = 0 +5338 ns P1(a&&b):: C = 1 +5338 ns P2(a&&b):: C = 0 +5340 ns P1(a||b):: C = 1 +5340 ns P2(a||b):: C = 0 +5344 ns P1(a&&b):: C = 0 +5344 ns P2(a&&b):: C = 1 +5346 ns P1(a||b):: C = 1 +5346 ns P2(a||b):: C = 0 +5350 ns P1(a&&b):: C = 1 +5350 ns P2(a&&b):: C = 0 +5352 ns P1(a||b):: C = 1 +5352 ns P2(a||b):: C = 0 +5356 ns P1(a&&b):: C = 0 +5356 ns P2(a&&b):: C = 1 +5358 ns P1(a||b):: C = 1 +5358 ns P2(a||b):: C = 0 +5362 ns P1(a&&b):: C = 1 +5362 ns P2(a&&b):: C = 0 +5364 ns P1(a||b):: C = 0 +5364 ns P2(a||b):: C = 1 +5368 ns P1(a&&b):: C = 0 +5368 ns P2(a&&b):: C = 1 +5370 ns P1(a||b):: C = 0 +5370 ns P2(a||b):: C = 1 +5374 ns P1(a&&b):: C = 0 +5374 ns P2(a&&b):: C = 1 +5376 ns P1(a||b):: C = 1 +5376 ns P2(a||b):: C = 0 +5380 ns P1(a&&b):: C = 0 +5380 ns P2(a&&b):: C = 1 +5382 ns P1(a||b):: C = 1 +5382 ns P2(a||b):: C = 0 +5386 ns P1(a&&b):: C = 0 +5386 ns P2(a&&b):: C = 1 +5388 ns P1(a||b):: C = 0 +5388 ns P2(a||b):: C = 1 +5392 ns P1(a&&b):: C = 1 +5392 ns P2(a&&b):: C = 0 +5394 ns P1(a||b):: C = 1 +5394 ns P2(a||b):: C = 0 +5398 ns P1(a&&b):: C = 0 +5398 ns P2(a&&b):: C = 1 +5400 ns P1(a||b):: C = 0 +5400 ns P2(a||b):: C = 1 +5404 ns P1(a&&b):: C = 0 +5404 ns P2(a&&b):: C = 1 +5406 ns P1(a||b):: C = 1 +5406 ns P2(a||b):: C = 0 +5410 ns P1(a&&b):: C = 0 +5410 ns P2(a&&b):: C = 1 +5412 ns P1(a||b):: C = 0 +5412 ns P2(a||b):: C = 1 +5416 ns P1(a&&b):: C = 1 +5416 ns P2(a&&b):: C = 0 +5418 ns P1(a||b):: C = 1 +5418 ns P2(a||b):: C = 0 +5422 ns P1(a&&b):: C = 0 +5422 ns P2(a&&b):: C = 1 +5424 ns P1(a||b):: C = 1 +5424 ns P2(a||b):: C = 0 +5428 ns P1(a&&b):: C = 1 +5428 ns P2(a&&b):: C = 0 +5430 ns P1(a||b):: C = 1 +5430 ns P2(a||b):: C = 0 +5434 ns P1(a&&b):: C = 1 +5434 ns P2(a&&b):: C = 0 +5436 ns P1(a||b):: C = 1 +5436 ns P2(a||b):: C = 0 +5440 ns P1(a&&b):: C = 0 +5440 ns P2(a&&b):: C = 1 +5442 ns P1(a||b):: C = 1 +5442 ns P2(a||b):: C = 0 +5446 ns P1(a&&b):: C = 1 +5446 ns P2(a&&b):: C = 0 +5448 ns P1(a||b):: C = 1 +5448 ns P2(a||b):: C = 0 +5452 ns P1(a&&b):: C = 0 +5452 ns P2(a&&b):: C = 1 +5454 ns P1(a||b):: C = 0 +5454 ns P2(a||b):: C = 1 +5458 ns P1(a&&b):: C = 0 +5458 ns P2(a&&b):: C = 1 +5460 ns P1(a||b):: C = 0 +5460 ns P2(a||b):: C = 1 +5464 ns P1(a&&b):: C = 1 +5464 ns P2(a&&b):: C = 0 +5466 ns P1(a||b):: C = 1 +5466 ns P2(a||b):: C = 0 +5470 ns P1(a&&b):: C = 1 +5470 ns P2(a&&b):: C = 0 +5472 ns P1(a||b):: C = 1 +5472 ns P2(a||b):: C = 0 +5476 ns P1(a&&b):: C = 1 +5476 ns P2(a&&b):: C = 0 +5478 ns P1(a||b):: C = 1 +5478 ns P2(a||b):: C = 0 +5482 ns P1(a&&b):: C = 0 +5482 ns P2(a&&b):: C = 1 +5484 ns P1(a||b):: C = 1 +5484 ns P2(a||b):: C = 0 +5488 ns P1(a&&b):: C = 0 +5488 ns P2(a&&b):: C = 1 +5490 ns P1(a||b):: C = 1 +5490 ns P2(a||b):: C = 0 +5494 ns P1(a&&b):: C = 0 +5494 ns P2(a&&b):: C = 1 +5496 ns P1(a||b):: C = 0 +5496 ns P2(a||b):: C = 1 +5500 ns P1(a&&b):: C = 1 +5500 ns P2(a&&b):: C = 0 +5502 ns P1(a||b):: C = 1 +5502 ns P2(a||b):: C = 0 +5506 ns P1(a&&b):: C = 1 +5506 ns P2(a&&b):: C = 0 +5508 ns P1(a||b):: C = 0 +5508 ns P2(a||b):: C = 1 +5512 ns P1(a&&b):: C = 0 +5512 ns P2(a&&b):: C = 1 +5514 ns P1(a||b):: C = 1 +5514 ns P2(a||b):: C = 0 +5518 ns P1(a&&b):: C = 1 +5518 ns P2(a&&b):: C = 0 +5520 ns P1(a||b):: C = 1 +5520 ns P2(a||b):: C = 0 +5524 ns P1(a&&b):: C = 1 +5524 ns P2(a&&b):: C = 0 +5526 ns P1(a||b):: C = 0 +5526 ns P2(a||b):: C = 1 +5530 ns P1(a&&b):: C = 0 +5530 ns P2(a&&b):: C = 1 +5532 ns P1(a||b):: C = 1 +5532 ns P2(a||b):: C = 0 +5536 ns P1(a&&b):: C = 0 +5536 ns P2(a&&b):: C = 1 +5538 ns P1(a||b):: C = 0 +5538 ns P2(a||b):: C = 1 +5542 ns P1(a&&b):: C = 0 +5542 ns P2(a&&b):: C = 1 +5544 ns P1(a||b):: C = 1 +5544 ns P2(a||b):: C = 0 +5548 ns P1(a&&b):: C = 1 +5548 ns P2(a&&b):: C = 0 +5550 ns P1(a||b):: C = 1 +5550 ns P2(a||b):: C = 0 +5554 ns P1(a&&b):: C = 1 +5554 ns P2(a&&b):: C = 0 +5556 ns P1(a||b):: C = 0 +5556 ns P2(a||b):: C = 1 +5560 ns P1(a&&b):: C = 1 +5560 ns P2(a&&b):: C = 0 +5562 ns P1(a||b):: C = 1 +5562 ns P2(a||b):: C = 0 +5566 ns P1(a&&b):: C = 1 +5566 ns P2(a&&b):: C = 0 +5568 ns P1(a||b):: C = 0 +5568 ns P2(a||b):: C = 1 +5572 ns P1(a&&b):: C = 0 +5572 ns P2(a&&b):: C = 1 +5574 ns P1(a||b):: C = 0 +5574 ns P2(a||b):: C = 1 +5578 ns P1(a&&b):: C = 0 +5578 ns P2(a&&b):: C = 1 +5580 ns P1(a||b):: C = 1 +5580 ns P2(a||b):: C = 0 +5584 ns P1(a&&b):: C = 0 +5584 ns P2(a&&b):: C = 1 +5586 ns P1(a||b):: C = 1 +5586 ns P2(a||b):: C = 0 +5590 ns P1(a&&b):: C = 1 +5590 ns P2(a&&b):: C = 0 +5592 ns P1(a||b):: C = 1 +5592 ns P2(a||b):: C = 0 +5596 ns P1(a&&b):: C = 0 +5596 ns P2(a&&b):: C = 1 +5598 ns P1(a||b):: C = 1 +5598 ns P2(a||b):: C = 0 +5602 ns P1(a&&b):: C = 0 +5602 ns P2(a&&b):: C = 1 +5604 ns P1(a||b):: C = 1 +5604 ns P2(a||b):: C = 0 +5608 ns P1(a&&b):: C = 1 +5608 ns P2(a&&b):: C = 0 +5610 ns P1(a||b):: C = 1 +5610 ns P2(a||b):: C = 0 +5614 ns P1(a&&b):: C = 1 +5614 ns P2(a&&b):: C = 0 +5616 ns P1(a||b):: C = 1 +5616 ns P2(a||b):: C = 0 +5620 ns P1(a&&b):: C = 0 +5620 ns P2(a&&b):: C = 1 +5622 ns P1(a||b):: C = 1 +5622 ns P2(a||b):: C = 0 +5626 ns P1(a&&b):: C = 0 +5626 ns P2(a&&b):: C = 1 +5628 ns P1(a||b):: C = 1 +5628 ns P2(a||b):: C = 0 +5632 ns P1(a&&b):: C = 0 +5632 ns P2(a&&b):: C = 1 +5634 ns P1(a||b):: C = 1 +5634 ns P2(a||b):: C = 0 +5638 ns P1(a&&b):: C = 0 +5638 ns P2(a&&b):: C = 1 +5640 ns P1(a||b):: C = 0 +5640 ns P2(a||b):: C = 1 +5644 ns P1(a&&b):: C = 0 +5644 ns P2(a&&b):: C = 1 +5646 ns P1(a||b):: C = 1 +5646 ns P2(a||b):: C = 0 +5650 ns P1(a&&b):: C = 0 +5650 ns P2(a&&b):: C = 1 +5652 ns P1(a||b):: C = 1 +5652 ns P2(a||b):: C = 0 +5656 ns P1(a&&b):: C = 0 +5656 ns P2(a&&b):: C = 1 +5658 ns P1(a||b):: C = 1 +5658 ns P2(a||b):: C = 0 +5662 ns P1(a&&b):: C = 1 +5662 ns P2(a&&b):: C = 0 +5664 ns P1(a||b):: C = 1 +5664 ns P2(a||b):: C = 0 +5668 ns P1(a&&b):: C = 0 +5668 ns P2(a&&b):: C = 1 +5670 ns P1(a||b):: C = 1 +5670 ns P2(a||b):: C = 0 +5674 ns P1(a&&b):: C = 1 +5674 ns P2(a&&b):: C = 0 +5676 ns P1(a||b):: C = 1 +5676 ns P2(a||b):: C = 0 +5680 ns P1(a&&b):: C = 0 +5680 ns P2(a&&b):: C = 1 +5682 ns P1(a||b):: C = 1 +5682 ns P2(a||b):: C = 0 +5686 ns P1(a&&b):: C = 1 +5686 ns P2(a&&b):: C = 0 +5688 ns P1(a||b):: C = 1 +5688 ns P2(a||b):: C = 0 +5692 ns P1(a&&b):: C = 1 +5692 ns P2(a&&b):: C = 0 +5694 ns P1(a||b):: C = 1 +5694 ns P2(a||b):: C = 0 +5698 ns P1(a&&b):: C = 0 +5698 ns P2(a&&b):: C = 1 +5700 ns P1(a||b):: C = 1 +5700 ns P2(a||b):: C = 0 +5704 ns P1(a&&b):: C = 0 +5704 ns P2(a&&b):: C = 1 +5706 ns P1(a||b):: C = 1 +5706 ns P2(a||b):: C = 0 +5710 ns P1(a&&b):: C = 0 +5710 ns P2(a&&b):: C = 1 +5712 ns P1(a||b):: C = 1 +5712 ns P2(a||b):: C = 0 +5716 ns P1(a&&b):: C = 1 +5716 ns P2(a&&b):: C = 0 +5718 ns P1(a||b):: C = 1 +5718 ns P2(a||b):: C = 0 +5722 ns P1(a&&b):: C = 0 +5722 ns P2(a&&b):: C = 1 +5724 ns P1(a||b):: C = 1 +5724 ns P2(a||b):: C = 0 +5728 ns P1(a&&b):: C = 0 +5728 ns P2(a&&b):: C = 1 +5730 ns P1(a||b):: C = 1 +5730 ns P2(a||b):: C = 0 +5734 ns P1(a&&b):: C = 1 +5734 ns P2(a&&b):: C = 0 +5736 ns P1(a||b):: C = 0 +5736 ns P2(a||b):: C = 1 +5740 ns P1(a&&b):: C = 0 +5740 ns P2(a&&b):: C = 1 +5742 ns P1(a||b):: C = 0 +5742 ns P2(a||b):: C = 1 +5746 ns P1(a&&b):: C = 1 +5746 ns P2(a&&b):: C = 0 +5748 ns P1(a||b):: C = 1 +5748 ns P2(a||b):: C = 0 +5752 ns P1(a&&b):: C = 0 +5752 ns P2(a&&b):: C = 1 +5754 ns P1(a||b):: C = 1 +5754 ns P2(a||b):: C = 0 +5758 ns P1(a&&b):: C = 1 +5758 ns P2(a&&b):: C = 0 +5760 ns P1(a||b):: C = 1 +5760 ns P2(a||b):: C = 0 +5764 ns P1(a&&b):: C = 0 +5764 ns P2(a&&b):: C = 1 +5766 ns P1(a||b):: C = 1 +5766 ns P2(a||b):: C = 0 +5770 ns P1(a&&b):: C = 0 +5770 ns P2(a&&b):: C = 1 +5772 ns P1(a||b):: C = 1 +5772 ns P2(a||b):: C = 0 +5776 ns P1(a&&b):: C = 0 +5776 ns P2(a&&b):: C = 1 +5778 ns P1(a||b):: C = 1 +5778 ns P2(a||b):: C = 0 +5782 ns P1(a&&b):: C = 0 +5782 ns P2(a&&b):: C = 1 +5784 ns P1(a||b):: C = 1 +5784 ns P2(a||b):: C = 0 +5788 ns P1(a&&b):: C = 0 +5788 ns P2(a&&b):: C = 1 +5790 ns P1(a||b):: C = 0 +5790 ns P2(a||b):: C = 1 +5794 ns P1(a&&b):: C = 0 +5794 ns P2(a&&b):: C = 1 +5796 ns P1(a||b):: C = 1 +5796 ns P2(a||b):: C = 0 +5800 ns P1(a&&b):: C = 0 +5800 ns P2(a&&b):: C = 1 +5802 ns P1(a||b):: C = 1 +5802 ns P2(a||b):: C = 0 +5806 ns P1(a&&b):: C = 0 +5806 ns P2(a&&b):: C = 1 +5808 ns P1(a||b):: C = 1 +5808 ns P2(a||b):: C = 0 +5812 ns P1(a&&b):: C = 1 +5812 ns P2(a&&b):: C = 0 +5814 ns P1(a||b):: C = 1 +5814 ns P2(a||b):: C = 0 +5818 ns P1(a&&b):: C = 1 +5818 ns P2(a&&b):: C = 0 +5820 ns P1(a||b):: C = 1 +5820 ns P2(a||b):: C = 0 +5824 ns P1(a&&b):: C = 1 +5824 ns P2(a&&b):: C = 0 +5826 ns P1(a||b):: C = 1 +5826 ns P2(a||b):: C = 0 +5830 ns P1(a&&b):: C = 0 +5830 ns P2(a&&b):: C = 1 +5832 ns P1(a||b):: C = 1 +5832 ns P2(a||b):: C = 0 +5836 ns P1(a&&b):: C = 1 +5836 ns P2(a&&b):: C = 0 +5838 ns P1(a||b):: C = 1 +5838 ns P2(a||b):: C = 0 +5842 ns P1(a&&b):: C = 1 +5842 ns P2(a&&b):: C = 0 +5844 ns P1(a||b):: C = 1 +5844 ns P2(a||b):: C = 0 +5848 ns P1(a&&b):: C = 0 +5848 ns P2(a&&b):: C = 1 +5850 ns P1(a||b):: C = 1 +5850 ns P2(a||b):: C = 0 +5854 ns P1(a&&b):: C = 1 +5854 ns P2(a&&b):: C = 0 +5856 ns P1(a||b):: C = 1 +5856 ns P2(a||b):: C = 0 +5860 ns P1(a&&b):: C = 0 +5860 ns P2(a&&b):: C = 1 +5862 ns P1(a||b):: C = 1 +5862 ns P2(a||b):: C = 0 +5866 ns P1(a&&b):: C = 1 +5866 ns P2(a&&b):: C = 0 +5868 ns P1(a||b):: C = 1 +5868 ns P2(a||b):: C = 0 +5872 ns P1(a&&b):: C = 0 +5872 ns P2(a&&b):: C = 1 +5874 ns P1(a||b):: C = 1 +5874 ns P2(a||b):: C = 0 +5878 ns P1(a&&b):: C = 0 +5878 ns P2(a&&b):: C = 1 +5880 ns P1(a||b):: C = 1 +5880 ns P2(a||b):: C = 0 +5884 ns P1(a&&b):: C = 0 +5884 ns P2(a&&b):: C = 1 +5886 ns P1(a||b):: C = 0 +5886 ns P2(a||b):: C = 1 +5890 ns P1(a&&b):: C = 0 +5890 ns P2(a&&b):: C = 1 +5892 ns P1(a||b):: C = 1 +5892 ns P2(a||b):: C = 0 +5896 ns P1(a&&b):: C = 1 +5896 ns P2(a&&b):: C = 0 +5898 ns P1(a||b):: C = 1 +5898 ns P2(a||b):: C = 0 +5902 ns P1(a&&b):: C = 0 +5902 ns P2(a&&b):: C = 1 +5904 ns P1(a||b):: C = 0 +5904 ns P2(a||b):: C = 1 +5908 ns P1(a&&b):: C = 0 +5908 ns P2(a&&b):: C = 1 +5910 ns P1(a||b):: C = 1 +5910 ns P2(a||b):: C = 0 +5914 ns P1(a&&b):: C = 0 +5914 ns P2(a&&b):: C = 1 +5916 ns P1(a||b):: C = 1 +5916 ns P2(a||b):: C = 0 +5920 ns P1(a&&b):: C = 0 +5920 ns P2(a&&b):: C = 1 +5922 ns P1(a||b):: C = 0 +5922 ns P2(a||b):: C = 1 +5926 ns P1(a&&b):: C = 0 +5926 ns P2(a&&b):: C = 1 +5928 ns P1(a||b):: C = 1 +5928 ns P2(a||b):: C = 0 +5932 ns P1(a&&b):: C = 0 +5932 ns P2(a&&b):: C = 1 +5934 ns P1(a||b):: C = 1 +5934 ns P2(a||b):: C = 0 +5938 ns P1(a&&b):: C = 0 +5938 ns P2(a&&b):: C = 1 +5940 ns P1(a||b):: C = 0 +5940 ns P2(a||b):: C = 1 +5944 ns P1(a&&b):: C = 0 +5944 ns P2(a&&b):: C = 1 +5946 ns P1(a||b):: C = 1 +5946 ns P2(a||b):: C = 0 +5950 ns P1(a&&b):: C = 1 +5950 ns P2(a&&b):: C = 0 +5952 ns P1(a||b):: C = 1 +5952 ns P2(a||b):: C = 0 +5956 ns P1(a&&b):: C = 0 +5956 ns P2(a&&b):: C = 1 +5958 ns P1(a||b):: C = 0 +5958 ns P2(a||b):: C = 1 +5962 ns P1(a&&b):: C = 1 +5962 ns P2(a&&b):: C = 0 +5964 ns P1(a||b):: C = 1 +5964 ns P2(a||b):: C = 0 +5968 ns P1(a&&b):: C = 0 +5968 ns P2(a&&b):: C = 1 +5970 ns P1(a||b):: C = 1 +5970 ns P2(a||b):: C = 0 +5974 ns P1(a&&b):: C = 0 +5974 ns P2(a&&b):: C = 1 +5976 ns P1(a||b):: C = 1 +5976 ns P2(a||b):: C = 0 +5980 ns P1(a&&b):: C = 0 +5980 ns P2(a&&b):: C = 1 +5982 ns P1(a||b):: C = 1 +5982 ns P2(a||b):: C = 0 +5986 ns P1(a&&b):: C = 0 +5986 ns P2(a&&b):: C = 1 +5988 ns P1(a||b):: C = 0 +5988 ns P2(a||b):: C = 1 +5992 ns P1(a&&b):: C = 0 +5992 ns P2(a&&b):: C = 1 +5994 ns P1(a||b):: C = 1 +5994 ns P2(a||b):: C = 0 +5998 ns P1(a&&b):: C = 0 +5998 ns P2(a&&b):: C = 1 +6 us P1(a||b):: C = 1 +6 us P2(a||b):: C = 0 +6004 ns P1(a&&b):: C = 0 +6004 ns P2(a&&b):: C = 1 +6006 ns P1(a||b):: C = 0 +6006 ns P2(a||b):: C = 1 +6010 ns P1(a&&b):: C = 0 +6010 ns P2(a&&b):: C = 1 +6012 ns P1(a||b):: C = 1 +6012 ns P2(a||b):: C = 0 +6016 ns P1(a&&b):: C = 0 +6016 ns P2(a&&b):: C = 1 +6018 ns P1(a||b):: C = 1 +6018 ns P2(a||b):: C = 0 +6022 ns P1(a&&b):: C = 0 +6022 ns P2(a&&b):: C = 1 +6024 ns P1(a||b):: C = 1 +6024 ns P2(a||b):: C = 0 +6028 ns P1(a&&b):: C = 1 +6028 ns P2(a&&b):: C = 0 +6030 ns P1(a||b):: C = 1 +6030 ns P2(a||b):: C = 0 +6034 ns P1(a&&b):: C = 0 +6034 ns P2(a&&b):: C = 1 +6036 ns P1(a||b):: C = 0 +6036 ns P2(a||b):: C = 1 +6040 ns P1(a&&b):: C = 0 +6040 ns P2(a&&b):: C = 1 +6042 ns P1(a||b):: C = 1 +6042 ns P2(a||b):: C = 0 +6046 ns P1(a&&b):: C = 1 +6046 ns P2(a&&b):: C = 0 +6048 ns P1(a||b):: C = 1 +6048 ns P2(a||b):: C = 0 +6052 ns P1(a&&b):: C = 1 +6052 ns P2(a&&b):: C = 0 +6054 ns P1(a||b):: C = 1 +6054 ns P2(a||b):: C = 0 +6058 ns P1(a&&b):: C = 0 +6058 ns P2(a&&b):: C = 1 +6060 ns P1(a||b):: C = 1 +6060 ns P2(a||b):: C = 0 +6064 ns P1(a&&b):: C = 0 +6064 ns P2(a&&b):: C = 1 +6066 ns P1(a||b):: C = 1 +6066 ns P2(a||b):: C = 0 +6070 ns P1(a&&b):: C = 1 +6070 ns P2(a&&b):: C = 0 +6072 ns P1(a||b):: C = 1 +6072 ns P2(a||b):: C = 0 +6076 ns P1(a&&b):: C = 1 +6076 ns P2(a&&b):: C = 0 +6078 ns P1(a||b):: C = 1 +6078 ns P2(a||b):: C = 0 +6082 ns P1(a&&b):: C = 0 +6082 ns P2(a&&b):: C = 1 +6084 ns P1(a||b):: C = 1 +6084 ns P2(a||b):: C = 0 +6088 ns P1(a&&b):: C = 0 +6088 ns P2(a&&b):: C = 1 +6090 ns P1(a||b):: C = 0 +6090 ns P2(a||b):: C = 1 +6094 ns P1(a&&b):: C = 0 +6094 ns P2(a&&b):: C = 1 +6096 ns P1(a||b):: C = 1 +6096 ns P2(a||b):: C = 0 +6100 ns P1(a&&b):: C = 0 +6100 ns P2(a&&b):: C = 1 +6102 ns P1(a||b):: C = 0 +6102 ns P2(a||b):: C = 1 +6106 ns P1(a&&b):: C = 0 +6106 ns P2(a&&b):: C = 1 +6108 ns P1(a||b):: C = 1 +6108 ns P2(a||b):: C = 0 +6112 ns P1(a&&b):: C = 0 +6112 ns P2(a&&b):: C = 1 +6114 ns P1(a||b):: C = 1 +6114 ns P2(a||b):: C = 0 +6118 ns P1(a&&b):: C = 0 +6118 ns P2(a&&b):: C = 1 +6120 ns P1(a||b):: C = 1 +6120 ns P2(a||b):: C = 0 +6124 ns P1(a&&b):: C = 1 +6124 ns P2(a&&b):: C = 0 +6126 ns P1(a||b):: C = 1 +6126 ns P2(a||b):: C = 0 +6130 ns P1(a&&b):: C = 0 +6130 ns P2(a&&b):: C = 1 +6132 ns P1(a||b):: C = 1 +6132 ns P2(a||b):: C = 0 +6136 ns P1(a&&b):: C = 0 +6136 ns P2(a&&b):: C = 1 +6138 ns P1(a||b):: C = 0 +6138 ns P2(a||b):: C = 1 +6142 ns P1(a&&b):: C = 0 +6142 ns P2(a&&b):: C = 1 +6144 ns P1(a||b):: C = 1 +6144 ns P2(a||b):: C = 0 +6148 ns P1(a&&b):: C = 0 +6148 ns P2(a&&b):: C = 1 +6150 ns P1(a||b):: C = 0 +6150 ns P2(a||b):: C = 1 +6154 ns P1(a&&b):: C = 0 +6154 ns P2(a&&b):: C = 1 +6156 ns P1(a||b):: C = 0 +6156 ns P2(a||b):: C = 1 +6160 ns P1(a&&b):: C = 0 +6160 ns P2(a&&b):: C = 1 +6162 ns P1(a||b):: C = 1 +6162 ns P2(a||b):: C = 0 +6166 ns P1(a&&b):: C = 0 +6166 ns P2(a&&b):: C = 1 +6168 ns P1(a||b):: C = 0 +6168 ns P2(a||b):: C = 1 +6172 ns P1(a&&b):: C = 0 +6172 ns P2(a&&b):: C = 1 +6174 ns P1(a||b):: C = 1 +6174 ns P2(a||b):: C = 0 +6178 ns P1(a&&b):: C = 1 +6178 ns P2(a&&b):: C = 0 +6180 ns P1(a||b):: C = 1 +6180 ns P2(a||b):: C = 0 +6184 ns P1(a&&b):: C = 0 +6184 ns P2(a&&b):: C = 1 +6186 ns P1(a||b):: C = 1 +6186 ns P2(a||b):: C = 0 +6190 ns P1(a&&b):: C = 1 +6190 ns P2(a&&b):: C = 0 +6192 ns P1(a||b):: C = 1 +6192 ns P2(a||b):: C = 0 +6196 ns P1(a&&b):: C = 0 +6196 ns P2(a&&b):: C = 1 +6198 ns P1(a||b):: C = 1 +6198 ns P2(a||b):: C = 0 +6202 ns P1(a&&b):: C = 0 +6202 ns P2(a&&b):: C = 1 +6204 ns P1(a||b):: C = 1 +6204 ns P2(a||b):: C = 0 +6208 ns P1(a&&b):: C = 0 +6208 ns P2(a&&b):: C = 1 +6210 ns P1(a||b):: C = 1 +6210 ns P2(a||b):: C = 0 +6214 ns P1(a&&b):: C = 0 +6214 ns P2(a&&b):: C = 1 +6216 ns P1(a||b):: C = 1 +6216 ns P2(a||b):: C = 0 +6220 ns P1(a&&b):: C = 1 +6220 ns P2(a&&b):: C = 0 +6222 ns P1(a||b):: C = 1 +6222 ns P2(a||b):: C = 0 +6226 ns P1(a&&b):: C = 1 +6226 ns P2(a&&b):: C = 0 +6228 ns P1(a||b):: C = 0 +6228 ns P2(a||b):: C = 1 +6232 ns P1(a&&b):: C = 0 +6232 ns P2(a&&b):: C = 1 +6234 ns P1(a||b):: C = 1 +6234 ns P2(a||b):: C = 0 +6238 ns P1(a&&b):: C = 0 +6238 ns P2(a&&b):: C = 1 +6240 ns P1(a||b):: C = 0 +6240 ns P2(a||b):: C = 1 +6244 ns P1(a&&b):: C = 0 +6244 ns P2(a&&b):: C = 1 +6246 ns P1(a||b):: C = 1 +6246 ns P2(a||b):: C = 0 +6250 ns P1(a&&b):: C = 0 +6250 ns P2(a&&b):: C = 1 +6252 ns P1(a||b):: C = 1 +6252 ns P2(a||b):: C = 0 +6256 ns P1(a&&b):: C = 0 +6256 ns P2(a&&b):: C = 1 +6258 ns P1(a||b):: C = 0 +6258 ns P2(a||b):: C = 1 +6262 ns P1(a&&b):: C = 0 +6262 ns P2(a&&b):: C = 1 +6264 ns P1(a||b):: C = 1 +6264 ns P2(a||b):: C = 0 +6268 ns P1(a&&b):: C = 0 +6268 ns P2(a&&b):: C = 1 +6270 ns P1(a||b):: C = 1 +6270 ns P2(a||b):: C = 0 +6274 ns P1(a&&b):: C = 0 +6274 ns P2(a&&b):: C = 1 +6276 ns P1(a||b):: C = 1 +6276 ns P2(a||b):: C = 0 +6280 ns P1(a&&b):: C = 0 +6280 ns P2(a&&b):: C = 1 +6282 ns P1(a||b):: C = 1 +6282 ns P2(a||b):: C = 0 +6286 ns P1(a&&b):: C = 0 +6286 ns P2(a&&b):: C = 1 +6288 ns P1(a||b):: C = 1 +6288 ns P2(a||b):: C = 0 +6292 ns P1(a&&b):: C = 1 +6292 ns P2(a&&b):: C = 0 +6294 ns P1(a||b):: C = 0 +6294 ns P2(a||b):: C = 1 +6298 ns P1(a&&b):: C = 0 +6298 ns P2(a&&b):: C = 1 +6300 ns P1(a||b):: C = 1 +6300 ns P2(a||b):: C = 0 +6304 ns P1(a&&b):: C = 1 +6304 ns P2(a&&b):: C = 0 +6306 ns P1(a||b):: C = 0 +6306 ns P2(a||b):: C = 1 +6310 ns P1(a&&b):: C = 0 +6310 ns P2(a&&b):: C = 1 +6312 ns P1(a||b):: C = 1 +6312 ns P2(a||b):: C = 0 +6316 ns P1(a&&b):: C = 1 +6316 ns P2(a&&b):: C = 0 +6318 ns P1(a||b):: C = 1 +6318 ns P2(a||b):: C = 0 +6322 ns P1(a&&b):: C = 0 +6322 ns P2(a&&b):: C = 1 +6324 ns P1(a||b):: C = 0 +6324 ns P2(a||b):: C = 1 +6328 ns P1(a&&b):: C = 0 +6328 ns P2(a&&b):: C = 1 +6330 ns P1(a||b):: C = 1 +6330 ns P2(a||b):: C = 0 +6334 ns P1(a&&b):: C = 0 +6334 ns P2(a&&b):: C = 1 +6336 ns P1(a||b):: C = 1 +6336 ns P2(a||b):: C = 0 +6340 ns P1(a&&b):: C = 1 +6340 ns P2(a&&b):: C = 0 +6342 ns P1(a||b):: C = 1 +6342 ns P2(a||b):: C = 0 +6346 ns P1(a&&b):: C = 0 +6346 ns P2(a&&b):: C = 1 +6348 ns P1(a||b):: C = 1 +6348 ns P2(a||b):: C = 0 +6352 ns P1(a&&b):: C = 0 +6352 ns P2(a&&b):: C = 1 +6354 ns P1(a||b):: C = 0 +6354 ns P2(a||b):: C = 1 +6358 ns P1(a&&b):: C = 1 +6358 ns P2(a&&b):: C = 0 +6360 ns P1(a||b):: C = 1 +6360 ns P2(a||b):: C = 0 +6364 ns P1(a&&b):: C = 0 +6364 ns P2(a&&b):: C = 1 +6366 ns P1(a||b):: C = 0 +6366 ns P2(a||b):: C = 1 +6370 ns P1(a&&b):: C = 1 +6370 ns P2(a&&b):: C = 0 +6372 ns P1(a||b):: C = 0 +6372 ns P2(a||b):: C = 1 +6376 ns P1(a&&b):: C = 1 +6376 ns P2(a&&b):: C = 0 +6378 ns P1(a||b):: C = 1 +6378 ns P2(a||b):: C = 0 +6382 ns P1(a&&b):: C = 1 +6382 ns P2(a&&b):: C = 0 +6384 ns P1(a||b):: C = 0 +6384 ns P2(a||b):: C = 1 +6388 ns P1(a&&b):: C = 0 +6388 ns P2(a&&b):: C = 1 +6390 ns P1(a||b):: C = 1 +6390 ns P2(a||b):: C = 0 +6394 ns P1(a&&b):: C = 0 +6394 ns P2(a&&b):: C = 1 +6396 ns P1(a||b):: C = 1 +6396 ns P2(a||b):: C = 0 +6400 ns P1(a&&b):: C = 1 +6400 ns P2(a&&b):: C = 0 +6402 ns P1(a||b):: C = 1 +6402 ns P2(a||b):: C = 0 +6406 ns P1(a&&b):: C = 0 +6406 ns P2(a&&b):: C = 1 +6408 ns P1(a||b):: C = 1 +6408 ns P2(a||b):: C = 0 +6412 ns P1(a&&b):: C = 0 +6412 ns P2(a&&b):: C = 1 +6414 ns P1(a||b):: C = 1 +6414 ns P2(a||b):: C = 0 +6418 ns P1(a&&b):: C = 0 +6418 ns P2(a&&b):: C = 1 +6420 ns P1(a||b):: C = 1 +6420 ns P2(a||b):: C = 0 +6424 ns P1(a&&b):: C = 1 +6424 ns P2(a&&b):: C = 0 +6426 ns P1(a||b):: C = 0 +6426 ns P2(a||b):: C = 1 +6430 ns P1(a&&b):: C = 0 +6430 ns P2(a&&b):: C = 1 +6432 ns P1(a||b):: C = 1 +6432 ns P2(a||b):: C = 0 +6436 ns P1(a&&b):: C = 0 +6436 ns P2(a&&b):: C = 1 +6438 ns P1(a||b):: C = 0 +6438 ns P2(a||b):: C = 1 +6442 ns P1(a&&b):: C = 0 +6442 ns P2(a&&b):: C = 1 +6444 ns P1(a||b):: C = 1 +6444 ns P2(a||b):: C = 0 +6448 ns P1(a&&b):: C = 0 +6448 ns P2(a&&b):: C = 1 +6450 ns P1(a||b):: C = 1 +6450 ns P2(a||b):: C = 0 +6454 ns P1(a&&b):: C = 0 +6454 ns P2(a&&b):: C = 1 +6456 ns P1(a||b):: C = 0 +6456 ns P2(a||b):: C = 1 +6460 ns P1(a&&b):: C = 0 +6460 ns P2(a&&b):: C = 1 +6462 ns P1(a||b):: C = 1 +6462 ns P2(a||b):: C = 0 +6466 ns P1(a&&b):: C = 0 +6466 ns P2(a&&b):: C = 1 +6468 ns P1(a||b):: C = 1 +6468 ns P2(a||b):: C = 0 +6472 ns P1(a&&b):: C = 1 +6472 ns P2(a&&b):: C = 0 +6474 ns P1(a||b):: C = 1 +6474 ns P2(a||b):: C = 0 +6478 ns P1(a&&b):: C = 0 +6478 ns P2(a&&b):: C = 1 +6480 ns P1(a||b):: C = 1 +6480 ns P2(a||b):: C = 0 +6484 ns P1(a&&b):: C = 0 +6484 ns P2(a&&b):: C = 1 +6486 ns P1(a||b):: C = 1 +6486 ns P2(a||b):: C = 0 +6490 ns P1(a&&b):: C = 0 +6490 ns P2(a&&b):: C = 1 +6492 ns P1(a||b):: C = 1 +6492 ns P2(a||b):: C = 0 +6496 ns P1(a&&b):: C = 0 +6496 ns P2(a&&b):: C = 1 +6498 ns P1(a||b):: C = 1 +6498 ns P2(a||b):: C = 0 +6502 ns P1(a&&b):: C = 0 +6502 ns P2(a&&b):: C = 1 +6504 ns P1(a||b):: C = 0 +6504 ns P2(a||b):: C = 1 +6508 ns P1(a&&b):: C = 1 +6508 ns P2(a&&b):: C = 0 +6510 ns P1(a||b):: C = 0 +6510 ns P2(a||b):: C = 1 +6514 ns P1(a&&b):: C = 1 +6514 ns P2(a&&b):: C = 0 +6516 ns P1(a||b):: C = 0 +6516 ns P2(a||b):: C = 1 +6520 ns P1(a&&b):: C = 1 +6520 ns P2(a&&b):: C = 0 +6522 ns P1(a||b):: C = 1 +6522 ns P2(a||b):: C = 0 +6526 ns P1(a&&b):: C = 1 +6526 ns P2(a&&b):: C = 0 +6528 ns P1(a||b):: C = 1 +6528 ns P2(a||b):: C = 0 +6532 ns P1(a&&b):: C = 0 +6532 ns P2(a&&b):: C = 1 +6534 ns P1(a||b):: C = 1 +6534 ns P2(a||b):: C = 0 +6538 ns P1(a&&b):: C = 1 +6538 ns P2(a&&b):: C = 0 +6540 ns P1(a||b):: C = 1 +6540 ns P2(a||b):: C = 0 +6544 ns P1(a&&b):: C = 0 +6544 ns P2(a&&b):: C = 1 +6546 ns P1(a||b):: C = 1 +6546 ns P2(a||b):: C = 0 +6550 ns P1(a&&b):: C = 0 +6550 ns P2(a&&b):: C = 1 +6552 ns P1(a||b):: C = 1 +6552 ns P2(a||b):: C = 0 +6556 ns P1(a&&b):: C = 0 +6556 ns P2(a&&b):: C = 1 +6558 ns P1(a||b):: C = 0 +6558 ns P2(a||b):: C = 1 +6562 ns P1(a&&b):: C = 0 +6562 ns P2(a&&b):: C = 1 +6564 ns P1(a||b):: C = 1 +6564 ns P2(a||b):: C = 0 +6568 ns P1(a&&b):: C = 0 +6568 ns P2(a&&b):: C = 1 +6570 ns P1(a||b):: C = 1 +6570 ns P2(a||b):: C = 0 +6574 ns P1(a&&b):: C = 0 +6574 ns P2(a&&b):: C = 1 +6576 ns P1(a||b):: C = 1 +6576 ns P2(a||b):: C = 0 +6580 ns P1(a&&b):: C = 0 +6580 ns P2(a&&b):: C = 1 +6582 ns P1(a||b):: C = 0 +6582 ns P2(a||b):: C = 1 +6586 ns P1(a&&b):: C = 0 +6586 ns P2(a&&b):: C = 1 +6588 ns P1(a||b):: C = 1 +6588 ns P2(a||b):: C = 0 +6592 ns P1(a&&b):: C = 1 +6592 ns P2(a&&b):: C = 0 +6594 ns P1(a||b):: C = 1 +6594 ns P2(a||b):: C = 0 +6598 ns P1(a&&b):: C = 0 +6598 ns P2(a&&b):: C = 1 +6600 ns P1(a||b):: C = 0 +6600 ns P2(a||b):: C = 1 +6604 ns P1(a&&b):: C = 1 +6604 ns P2(a&&b):: C = 0 +6606 ns P1(a||b):: C = 1 +6606 ns P2(a||b):: C = 0 +6610 ns P1(a&&b):: C = 0 +6610 ns P2(a&&b):: C = 1 +6612 ns P1(a||b):: C = 1 +6612 ns P2(a||b):: C = 0 +6616 ns P1(a&&b):: C = 0 +6616 ns P2(a&&b):: C = 1 +6618 ns P1(a||b):: C = 0 +6618 ns P2(a||b):: C = 1 +6622 ns P1(a&&b):: C = 0 +6622 ns P2(a&&b):: C = 1 +6624 ns P1(a||b):: C = 1 +6624 ns P2(a||b):: C = 0 +6628 ns P1(a&&b):: C = 0 +6628 ns P2(a&&b):: C = 1 +6630 ns P1(a||b):: C = 1 +6630 ns P2(a||b):: C = 0 +6634 ns P1(a&&b):: C = 0 +6634 ns P2(a&&b):: C = 1 +6636 ns P1(a||b):: C = 1 +6636 ns P2(a||b):: C = 0 +6640 ns P1(a&&b):: C = 0 +6640 ns P2(a&&b):: C = 1 +6642 ns P1(a||b):: C = 1 +6642 ns P2(a||b):: C = 0 +6646 ns P1(a&&b):: C = 1 +6646 ns P2(a&&b):: C = 0 +6648 ns P1(a||b):: C = 1 +6648 ns P2(a||b):: C = 0 +6652 ns P1(a&&b):: C = 0 +6652 ns P2(a&&b):: C = 1 +6654 ns P1(a||b):: C = 1 +6654 ns P2(a||b):: C = 0 +6658 ns P1(a&&b):: C = 1 +6658 ns P2(a&&b):: C = 0 +6660 ns P1(a||b):: C = 1 +6660 ns P2(a||b):: C = 0 +6664 ns P1(a&&b):: C = 0 +6664 ns P2(a&&b):: C = 1 +6666 ns P1(a||b):: C = 1 +6666 ns P2(a||b):: C = 0 +6670 ns P1(a&&b):: C = 0 +6670 ns P2(a&&b):: C = 1 +6672 ns P1(a||b):: C = 1 +6672 ns P2(a||b):: C = 0 +6676 ns P1(a&&b):: C = 0 +6676 ns P2(a&&b):: C = 1 +6678 ns P1(a||b):: C = 1 +6678 ns P2(a||b):: C = 0 +6682 ns P1(a&&b):: C = 0 +6682 ns P2(a&&b):: C = 1 +6684 ns P1(a||b):: C = 1 +6684 ns P2(a||b):: C = 0 +6688 ns P1(a&&b):: C = 0 +6688 ns P2(a&&b):: C = 1 +6690 ns P1(a||b):: C = 0 +6690 ns P2(a||b):: C = 1 +6694 ns P1(a&&b):: C = 0 +6694 ns P2(a&&b):: C = 1 +6696 ns P1(a||b):: C = 1 +6696 ns P2(a||b):: C = 0 +6700 ns P1(a&&b):: C = 0 +6700 ns P2(a&&b):: C = 1 +6702 ns P1(a||b):: C = 1 +6702 ns P2(a||b):: C = 0 +6706 ns P1(a&&b):: C = 1 +6706 ns P2(a&&b):: C = 0 +6708 ns P1(a||b):: C = 1 +6708 ns P2(a||b):: C = 0 +6712 ns P1(a&&b):: C = 0 +6712 ns P2(a&&b):: C = 1 +6714 ns P1(a||b):: C = 1 +6714 ns P2(a||b):: C = 0 +6718 ns P1(a&&b):: C = 0 +6718 ns P2(a&&b):: C = 1 +6720 ns P1(a||b):: C = 1 +6720 ns P2(a||b):: C = 0 +6724 ns P1(a&&b):: C = 0 +6724 ns P2(a&&b):: C = 1 +6726 ns P1(a||b):: C = 1 +6726 ns P2(a||b):: C = 0 +6730 ns P1(a&&b):: C = 0 +6730 ns P2(a&&b):: C = 1 +6732 ns P1(a||b):: C = 1 +6732 ns P2(a||b):: C = 0 +6736 ns P1(a&&b):: C = 1 +6736 ns P2(a&&b):: C = 0 +6738 ns P1(a||b):: C = 1 +6738 ns P2(a||b):: C = 0 +6742 ns P1(a&&b):: C = 0 +6742 ns P2(a&&b):: C = 1 +6744 ns P1(a||b):: C = 0 +6744 ns P2(a||b):: C = 1 +6748 ns P1(a&&b):: C = 0 +6748 ns P2(a&&b):: C = 1 +6750 ns P1(a||b):: C = 1 +6750 ns P2(a||b):: C = 0 +6754 ns P1(a&&b):: C = 0 +6754 ns P2(a&&b):: C = 1 +6756 ns P1(a||b):: C = 1 +6756 ns P2(a||b):: C = 0 +6760 ns P1(a&&b):: C = 0 +6760 ns P2(a&&b):: C = 1 +6762 ns P1(a||b):: C = 1 +6762 ns P2(a||b):: C = 0 +6766 ns P1(a&&b):: C = 0 +6766 ns P2(a&&b):: C = 1 +6768 ns P1(a||b):: C = 1 +6768 ns P2(a||b):: C = 0 +6772 ns P1(a&&b):: C = 1 +6772 ns P2(a&&b):: C = 0 +6774 ns P1(a||b):: C = 1 +6774 ns P2(a||b):: C = 0 +6778 ns P1(a&&b):: C = 0 +6778 ns P2(a&&b):: C = 1 +6780 ns P1(a||b):: C = 0 +6780 ns P2(a||b):: C = 1 +6784 ns P1(a&&b):: C = 1 +6784 ns P2(a&&b):: C = 0 +6786 ns P1(a||b):: C = 1 +6786 ns P2(a||b):: C = 0 +6790 ns P1(a&&b):: C = 0 +6790 ns P2(a&&b):: C = 1 +6792 ns P1(a||b):: C = 1 +6792 ns P2(a||b):: C = 0 +6796 ns P1(a&&b):: C = 0 +6796 ns P2(a&&b):: C = 1 +6798 ns P1(a||b):: C = 1 +6798 ns P2(a||b):: C = 0 +6802 ns P1(a&&b):: C = 1 +6802 ns P2(a&&b):: C = 0 +6804 ns P1(a||b):: C = 1 +6804 ns P2(a||b):: C = 0 +6808 ns P1(a&&b):: C = 0 +6808 ns P2(a&&b):: C = 1 +6810 ns P1(a||b):: C = 1 +6810 ns P2(a||b):: C = 0 +6814 ns P1(a&&b):: C = 1 +6814 ns P2(a&&b):: C = 0 +6816 ns P1(a||b):: C = 0 +6816 ns P2(a||b):: C = 1 +6820 ns P1(a&&b):: C = 1 +6820 ns P2(a&&b):: C = 0 +6822 ns P1(a||b):: C = 1 +6822 ns P2(a||b):: C = 0 +6826 ns P1(a&&b):: C = 1 +6826 ns P2(a&&b):: C = 0 +6828 ns P1(a||b):: C = 1 +6828 ns P2(a||b):: C = 0 +6832 ns P1(a&&b):: C = 0 +6832 ns P2(a&&b):: C = 1 +6834 ns P1(a||b):: C = 1 +6834 ns P2(a||b):: C = 0 +6838 ns P1(a&&b):: C = 0 +6838 ns P2(a&&b):: C = 1 +6840 ns P1(a||b):: C = 0 +6840 ns P2(a||b):: C = 1 +6844 ns P1(a&&b):: C = 1 +6844 ns P2(a&&b):: C = 0 +6846 ns P1(a||b):: C = 0 +6846 ns P2(a||b):: C = 1 +6850 ns P1(a&&b):: C = 1 +6850 ns P2(a&&b):: C = 0 +6852 ns P1(a||b):: C = 0 +6852 ns P2(a||b):: C = 1 +6856 ns P1(a&&b):: C = 0 +6856 ns P2(a&&b):: C = 1 +6858 ns P1(a||b):: C = 1 +6858 ns P2(a||b):: C = 0 +6862 ns P1(a&&b):: C = 1 +6862 ns P2(a&&b):: C = 0 +6864 ns P1(a||b):: C = 0 +6864 ns P2(a||b):: C = 1 +6868 ns P1(a&&b):: C = 0 +6868 ns P2(a&&b):: C = 1 +6870 ns P1(a||b):: C = 1 +6870 ns P2(a||b):: C = 0 +6874 ns P1(a&&b):: C = 1 +6874 ns P2(a&&b):: C = 0 +6876 ns P1(a||b):: C = 1 +6876 ns P2(a||b):: C = 0 +6880 ns P1(a&&b):: C = 0 +6880 ns P2(a&&b):: C = 1 +6882 ns P1(a||b):: C = 1 +6882 ns P2(a||b):: C = 0 +6886 ns P1(a&&b):: C = 0 +6886 ns P2(a&&b):: C = 1 +6888 ns P1(a||b):: C = 1 +6888 ns P2(a||b):: C = 0 +6892 ns P1(a&&b):: C = 0 +6892 ns P2(a&&b):: C = 1 +6894 ns P1(a||b):: C = 1 +6894 ns P2(a||b):: C = 0 +6898 ns P1(a&&b):: C = 1 +6898 ns P2(a&&b):: C = 0 +6900 ns P1(a||b):: C = 0 +6900 ns P2(a||b):: C = 1 +6904 ns P1(a&&b):: C = 0 +6904 ns P2(a&&b):: C = 1 +6906 ns P1(a||b):: C = 1 +6906 ns P2(a||b):: C = 0 +6910 ns P1(a&&b):: C = 1 +6910 ns P2(a&&b):: C = 0 +6912 ns P1(a||b):: C = 1 +6912 ns P2(a||b):: C = 0 +6916 ns P1(a&&b):: C = 0 +6916 ns P2(a&&b):: C = 1 +6918 ns P1(a||b):: C = 1 +6918 ns P2(a||b):: C = 0 +6922 ns P1(a&&b):: C = 0 +6922 ns P2(a&&b):: C = 1 +6924 ns P1(a||b):: C = 1 +6924 ns P2(a||b):: C = 0 +6928 ns P1(a&&b):: C = 0 +6928 ns P2(a&&b):: C = 1 +6930 ns P1(a||b):: C = 0 +6930 ns P2(a||b):: C = 1 +6934 ns P1(a&&b):: C = 0 +6934 ns P2(a&&b):: C = 1 +6936 ns P1(a||b):: C = 1 +6936 ns P2(a||b):: C = 0 +6940 ns P1(a&&b):: C = 0 +6940 ns P2(a&&b):: C = 1 +6942 ns P1(a||b):: C = 1 +6942 ns P2(a||b):: C = 0 +6946 ns P1(a&&b):: C = 0 +6946 ns P2(a&&b):: C = 1 +6948 ns P1(a||b):: C = 0 +6948 ns P2(a||b):: C = 1 +6952 ns P1(a&&b):: C = 0 +6952 ns P2(a&&b):: C = 1 +6954 ns P1(a||b):: C = 1 +6954 ns P2(a||b):: C = 0 +6958 ns P1(a&&b):: C = 0 +6958 ns P2(a&&b):: C = 1 +6960 ns P1(a||b):: C = 0 +6960 ns P2(a||b):: C = 1 +6964 ns P1(a&&b):: C = 0 +6964 ns P2(a&&b):: C = 1 +6966 ns P1(a||b):: C = 0 +6966 ns P2(a||b):: C = 1 +6970 ns P1(a&&b):: C = 0 +6970 ns P2(a&&b):: C = 1 +6972 ns P1(a||b):: C = 1 +6972 ns P2(a||b):: C = 0 +6976 ns P1(a&&b):: C = 0 +6976 ns P2(a&&b):: C = 1 +6978 ns P1(a||b):: C = 1 +6978 ns P2(a||b):: C = 0 +6982 ns P1(a&&b):: C = 0 +6982 ns P2(a&&b):: C = 1 +6984 ns P1(a||b):: C = 1 +6984 ns P2(a||b):: C = 0 +6988 ns P1(a&&b):: C = 0 +6988 ns P2(a&&b):: C = 1 +6990 ns P1(a||b):: C = 1 +6990 ns P2(a||b):: C = 0 +6994 ns P1(a&&b):: C = 0 +6994 ns P2(a&&b):: C = 1 +6996 ns P1(a||b):: C = 1 +6996 ns P2(a||b):: C = 0 +7 us P1(a&&b):: C = 0 +7 us P2(a&&b):: C = 1 +7002 ns P1(a||b):: C = 1 +7002 ns P2(a||b):: C = 0 +7006 ns P1(a&&b):: C = 0 +7006 ns P2(a&&b):: C = 1 +7008 ns P1(a||b):: C = 0 +7008 ns P2(a||b):: C = 1 +7012 ns P1(a&&b):: C = 1 +7012 ns P2(a&&b):: C = 0 +7014 ns P1(a||b):: C = 1 +7014 ns P2(a||b):: C = 0 +7018 ns P1(a&&b):: C = 0 +7018 ns P2(a&&b):: C = 1 +7020 ns P1(a||b):: C = 1 +7020 ns P2(a||b):: C = 0 +7024 ns P1(a&&b):: C = 0 +7024 ns P2(a&&b):: C = 1 +7026 ns P1(a||b):: C = 1 +7026 ns P2(a||b):: C = 0 +7030 ns P1(a&&b):: C = 0 +7030 ns P2(a&&b):: C = 1 +7032 ns P1(a||b):: C = 1 +7032 ns P2(a||b):: C = 0 +7036 ns P1(a&&b):: C = 1 +7036 ns P2(a&&b):: C = 0 +7038 ns P1(a||b):: C = 0 +7038 ns P2(a||b):: C = 1 +7042 ns P1(a&&b):: C = 0 +7042 ns P2(a&&b):: C = 1 +7044 ns P1(a||b):: C = 1 +7044 ns P2(a||b):: C = 0 +7048 ns P1(a&&b):: C = 0 +7048 ns P2(a&&b):: C = 1 +7050 ns P1(a||b):: C = 1 +7050 ns P2(a||b):: C = 0 +7054 ns P1(a&&b):: C = 1 +7054 ns P2(a&&b):: C = 0 +7056 ns P1(a||b):: C = 1 +7056 ns P2(a||b):: C = 0 +7060 ns P1(a&&b):: C = 0 +7060 ns P2(a&&b):: C = 1 +7062 ns P1(a||b):: C = 1 +7062 ns P2(a||b):: C = 0 +7066 ns P1(a&&b):: C = 0 +7066 ns P2(a&&b):: C = 1 +7068 ns P1(a||b):: C = 1 +7068 ns P2(a||b):: C = 0 +7072 ns P1(a&&b):: C = 0 +7072 ns P2(a&&b):: C = 1 +7074 ns P1(a||b):: C = 1 +7074 ns P2(a||b):: C = 0 +7078 ns P1(a&&b):: C = 0 +7078 ns P2(a&&b):: C = 1 +7080 ns P1(a||b):: C = 0 +7080 ns P2(a||b):: C = 1 +7084 ns P1(a&&b):: C = 0 +7084 ns P2(a&&b):: C = 1 +7086 ns P1(a||b):: C = 1 +7086 ns P2(a||b):: C = 0 +7090 ns P1(a&&b):: C = 0 +7090 ns P2(a&&b):: C = 1 +7092 ns P1(a||b):: C = 1 +7092 ns P2(a||b):: C = 0 +7096 ns P1(a&&b):: C = 0 +7096 ns P2(a&&b):: C = 1 +7098 ns P1(a||b):: C = 1 +7098 ns P2(a||b):: C = 0 +7102 ns P1(a&&b):: C = 0 +7102 ns P2(a&&b):: C = 1 +7104 ns P1(a||b):: C = 1 +7104 ns P2(a||b):: C = 0 +7108 ns P1(a&&b):: C = 0 +7108 ns P2(a&&b):: C = 1 +7110 ns P1(a||b):: C = 0 +7110 ns P2(a||b):: C = 1 +7114 ns P1(a&&b):: C = 1 +7114 ns P2(a&&b):: C = 0 +7116 ns P1(a||b):: C = 1 +7116 ns P2(a||b):: C = 0 +7120 ns P1(a&&b):: C = 1 +7120 ns P2(a&&b):: C = 0 +7122 ns P1(a||b):: C = 1 +7122 ns P2(a||b):: C = 0 +7126 ns P1(a&&b):: C = 0 +7126 ns P2(a&&b):: C = 1 +7128 ns P1(a||b):: C = 1 +7128 ns P2(a||b):: C = 0 +7132 ns P1(a&&b):: C = 0 +7132 ns P2(a&&b):: C = 1 +7134 ns P1(a||b):: C = 1 +7134 ns P2(a||b):: C = 0 +7138 ns P1(a&&b):: C = 0 +7138 ns P2(a&&b):: C = 1 +7140 ns P1(a||b):: C = 0 +7140 ns P2(a||b):: C = 1 +7144 ns P1(a&&b):: C = 0 +7144 ns P2(a&&b):: C = 1 +7146 ns P1(a||b):: C = 0 +7146 ns P2(a||b):: C = 1 +7150 ns P1(a&&b):: C = 0 +7150 ns P2(a&&b):: C = 1 +7152 ns P1(a||b):: C = 0 +7152 ns P2(a||b):: C = 1 +7156 ns P1(a&&b):: C = 0 +7156 ns P2(a&&b):: C = 1 +7158 ns P1(a||b):: C = 1 +7158 ns P2(a||b):: C = 0 +7162 ns P1(a&&b):: C = 0 +7162 ns P2(a&&b):: C = 1 +7164 ns P1(a||b):: C = 1 +7164 ns P2(a||b):: C = 0 +7168 ns P1(a&&b):: C = 0 +7168 ns P2(a&&b):: C = 1 +7170 ns P1(a||b):: C = 1 +7170 ns P2(a||b):: C = 0 +7174 ns P1(a&&b):: C = 0 +7174 ns P2(a&&b):: C = 1 +7176 ns P1(a||b):: C = 1 +7176 ns P2(a||b):: C = 0 +7180 ns P1(a&&b):: C = 0 +7180 ns P2(a&&b):: C = 1 +7182 ns P1(a||b):: C = 1 +7182 ns P2(a||b):: C = 0 +7186 ns P1(a&&b):: C = 0 +7186 ns P2(a&&b):: C = 1 +7188 ns P1(a||b):: C = 1 +7188 ns P2(a||b):: C = 0 +7192 ns P1(a&&b):: C = 0 +7192 ns P2(a&&b):: C = 1 +7194 ns P1(a||b):: C = 1 +7194 ns P2(a||b):: C = 0 +7198 ns P1(a&&b):: C = 0 +7198 ns P2(a&&b):: C = 1 +7200 ns P1(a||b):: C = 1 +7200 ns P2(a||b):: C = 0 +7204 ns P1(a&&b):: C = 1 +7204 ns P2(a&&b):: C = 0 +7206 ns P1(a||b):: C = 0 +7206 ns P2(a||b):: C = 1 +7210 ns P1(a&&b):: C = 1 +7210 ns P2(a&&b):: C = 0 +7212 ns P1(a||b):: C = 1 +7212 ns P2(a||b):: C = 0 +7216 ns P1(a&&b):: C = 0 +7216 ns P2(a&&b):: C = 1 +7218 ns P1(a||b):: C = 1 +7218 ns P2(a||b):: C = 0 +7222 ns P1(a&&b):: C = 0 +7222 ns P2(a&&b):: C = 1 +7224 ns P1(a||b):: C = 1 +7224 ns P2(a||b):: C = 0 +7228 ns P1(a&&b):: C = 0 +7228 ns P2(a&&b):: C = 1 +7230 ns P1(a||b):: C = 1 +7230 ns P2(a||b):: C = 0 +7234 ns P1(a&&b):: C = 1 +7234 ns P2(a&&b):: C = 0 +7236 ns P1(a||b):: C = 0 +7236 ns P2(a||b):: C = 1 +7240 ns P1(a&&b):: C = 0 +7240 ns P2(a&&b):: C = 1 +7242 ns P1(a||b):: C = 0 +7242 ns P2(a||b):: C = 1 +7246 ns P1(a&&b):: C = 0 +7246 ns P2(a&&b):: C = 1 +7248 ns P1(a||b):: C = 1 +7248 ns P2(a||b):: C = 0 +7252 ns P1(a&&b):: C = 0 +7252 ns P2(a&&b):: C = 1 +7254 ns P1(a||b):: C = 1 +7254 ns P2(a||b):: C = 0 +7258 ns P1(a&&b):: C = 0 +7258 ns P2(a&&b):: C = 1 +7260 ns P1(a||b):: C = 1 +7260 ns P2(a||b):: C = 0 +7264 ns P1(a&&b):: C = 0 +7264 ns P2(a&&b):: C = 1 +7266 ns P1(a||b):: C = 1 +7266 ns P2(a||b):: C = 0 +7270 ns P1(a&&b):: C = 0 +7270 ns P2(a&&b):: C = 1 +7272 ns P1(a||b):: C = 1 +7272 ns P2(a||b):: C = 0 +7276 ns P1(a&&b):: C = 0 +7276 ns P2(a&&b):: C = 1 +7278 ns P1(a||b):: C = 1 +7278 ns P2(a||b):: C = 0 +7282 ns P1(a&&b):: C = 0 +7282 ns P2(a&&b):: C = 1 +7284 ns P1(a||b):: C = 1 +7284 ns P2(a||b):: C = 0 +7288 ns P1(a&&b):: C = 0 +7288 ns P2(a&&b):: C = 1 +7290 ns P1(a||b):: C = 0 +7290 ns P2(a||b):: C = 1 +7294 ns P1(a&&b):: C = 0 +7294 ns P2(a&&b):: C = 1 +7296 ns P1(a||b):: C = 1 +7296 ns P2(a||b):: C = 0 +7300 ns P1(a&&b):: C = 0 +7300 ns P2(a&&b):: C = 1 +7302 ns P1(a||b):: C = 1 +7302 ns P2(a||b):: C = 0 +7306 ns P1(a&&b):: C = 0 +7306 ns P2(a&&b):: C = 1 +7308 ns P1(a||b):: C = 0 +7308 ns P2(a||b):: C = 1 +7312 ns P1(a&&b):: C = 0 +7312 ns P2(a&&b):: C = 1 +7314 ns P1(a||b):: C = 1 +7314 ns P2(a||b):: C = 0 +7318 ns P1(a&&b):: C = 0 +7318 ns P2(a&&b):: C = 1 +7320 ns P1(a||b):: C = 1 +7320 ns P2(a||b):: C = 0 +7324 ns P1(a&&b):: C = 0 +7324 ns P2(a&&b):: C = 1 +7326 ns P1(a||b):: C = 0 +7326 ns P2(a||b):: C = 1 +7330 ns P1(a&&b):: C = 0 +7330 ns P2(a&&b):: C = 1 +7332 ns P1(a||b):: C = 0 +7332 ns P2(a||b):: C = 1 +7336 ns P1(a&&b):: C = 0 +7336 ns P2(a&&b):: C = 1 +7338 ns P1(a||b):: C = 1 +7338 ns P2(a||b):: C = 0 +7342 ns P1(a&&b):: C = 0 +7342 ns P2(a&&b):: C = 1 +7344 ns P1(a||b):: C = 1 +7344 ns P2(a||b):: C = 0 +7348 ns P1(a&&b):: C = 1 +7348 ns P2(a&&b):: C = 0 +7350 ns P1(a||b):: C = 1 +7350 ns P2(a||b):: C = 0 +7354 ns P1(a&&b):: C = 0 +7354 ns P2(a&&b):: C = 1 +7356 ns P1(a||b):: C = 1 +7356 ns P2(a||b):: C = 0 +7360 ns P1(a&&b):: C = 0 +7360 ns P2(a&&b):: C = 1 +7362 ns P1(a||b):: C = 1 +7362 ns P2(a||b):: C = 0 +7366 ns P1(a&&b):: C = 0 +7366 ns P2(a&&b):: C = 1 +7368 ns P1(a||b):: C = 1 +7368 ns P2(a||b):: C = 0 +7372 ns P1(a&&b):: C = 0 +7372 ns P2(a&&b):: C = 1 +7374 ns P1(a||b):: C = 0 +7374 ns P2(a||b):: C = 1 +7378 ns P1(a&&b):: C = 0 +7378 ns P2(a&&b):: C = 1 +7380 ns P1(a||b):: C = 1 +7380 ns P2(a||b):: C = 0 +7384 ns P1(a&&b):: C = 0 +7384 ns P2(a&&b):: C = 1 +7386 ns P1(a||b):: C = 1 +7386 ns P2(a||b):: C = 0 +7390 ns P1(a&&b):: C = 0 +7390 ns P2(a&&b):: C = 1 +7392 ns P1(a||b):: C = 0 +7392 ns P2(a||b):: C = 1 +7396 ns P1(a&&b):: C = 1 +7396 ns P2(a&&b):: C = 0 +7398 ns P1(a||b):: C = 1 +7398 ns P2(a||b):: C = 0 +7402 ns P1(a&&b):: C = 1 +7402 ns P2(a&&b):: C = 0 +7404 ns P1(a||b):: C = 1 +7404 ns P2(a||b):: C = 0 +7408 ns P1(a&&b):: C = 0 +7408 ns P2(a&&b):: C = 1 +7410 ns P1(a||b):: C = 1 +7410 ns P2(a||b):: C = 0 +7414 ns P1(a&&b):: C = 0 +7414 ns P2(a&&b):: C = 1 +7416 ns P1(a||b):: C = 0 +7416 ns P2(a||b):: C = 1 +7420 ns P1(a&&b):: C = 0 +7420 ns P2(a&&b):: C = 1 +7422 ns P1(a||b):: C = 0 +7422 ns P2(a||b):: C = 1 +7426 ns P1(a&&b):: C = 0 +7426 ns P2(a&&b):: C = 1 +7428 ns P1(a||b):: C = 1 +7428 ns P2(a||b):: C = 0 +7432 ns P1(a&&b):: C = 0 +7432 ns P2(a&&b):: C = 1 +7434 ns P1(a||b):: C = 1 +7434 ns P2(a||b):: C = 0 +7438 ns P1(a&&b):: C = 1 +7438 ns P2(a&&b):: C = 0 +7440 ns P1(a||b):: C = 1 +7440 ns P2(a||b):: C = 0 +7444 ns P1(a&&b):: C = 0 +7444 ns P2(a&&b):: C = 1 +7446 ns P1(a||b):: C = 1 +7446 ns P2(a||b):: C = 0 +7450 ns P1(a&&b):: C = 0 +7450 ns P2(a&&b):: C = 1 +7452 ns P1(a||b):: C = 1 +7452 ns P2(a||b):: C = 0 +7456 ns P1(a&&b):: C = 1 +7456 ns P2(a&&b):: C = 0 +7458 ns P1(a||b):: C = 1 +7458 ns P2(a||b):: C = 0 +7462 ns P1(a&&b):: C = 0 +7462 ns P2(a&&b):: C = 1 +7464 ns P1(a||b):: C = 1 +7464 ns P2(a||b):: C = 0 +7468 ns P1(a&&b):: C = 1 +7468 ns P2(a&&b):: C = 0 +7470 ns P1(a||b):: C = 1 +7470 ns P2(a||b):: C = 0 +7474 ns P1(a&&b):: C = 0 +7474 ns P2(a&&b):: C = 1 +7476 ns P1(a||b):: C = 0 +7476 ns P2(a||b):: C = 1 +7480 ns P1(a&&b):: C = 1 +7480 ns P2(a&&b):: C = 0 +7482 ns P1(a||b):: C = 0 +7482 ns P2(a||b):: C = 1 +7486 ns P1(a&&b):: C = 0 +7486 ns P2(a&&b):: C = 1 +7488 ns P1(a||b):: C = 0 +7488 ns P2(a||b):: C = 1 +7492 ns P1(a&&b):: C = 0 +7492 ns P2(a&&b):: C = 1 +7494 ns P1(a||b):: C = 0 +7494 ns P2(a||b):: C = 1 +7498 ns P1(a&&b):: C = 0 +7498 ns P2(a&&b):: C = 1 +7500 ns P1(a||b):: C = 1 +7500 ns P2(a||b):: C = 0 +7504 ns P1(a&&b):: C = 1 +7504 ns P2(a&&b):: C = 0 +7506 ns P1(a||b):: C = 1 +7506 ns P2(a||b):: C = 0 +7510 ns P1(a&&b):: C = 0 +7510 ns P2(a&&b):: C = 1 +7512 ns P1(a||b):: C = 1 +7512 ns P2(a||b):: C = 0 +7516 ns P1(a&&b):: C = 0 +7516 ns P2(a&&b):: C = 1 +7518 ns P1(a||b):: C = 1 +7518 ns P2(a||b):: C = 0 +7522 ns P1(a&&b):: C = 0 +7522 ns P2(a&&b):: C = 1 +7524 ns P1(a||b):: C = 1 +7524 ns P2(a||b):: C = 0 +7528 ns P1(a&&b):: C = 0 +7528 ns P2(a&&b):: C = 1 +7530 ns P1(a||b):: C = 1 +7530 ns P2(a||b):: C = 0 +7534 ns P1(a&&b):: C = 1 +7534 ns P2(a&&b):: C = 0 +7536 ns P1(a||b):: C = 1 +7536 ns P2(a||b):: C = 0 +7540 ns P1(a&&b):: C = 0 +7540 ns P2(a&&b):: C = 1 +7542 ns P1(a||b):: C = 1 +7542 ns P2(a||b):: C = 0 +7546 ns P1(a&&b):: C = 0 +7546 ns P2(a&&b):: C = 1 +7548 ns P1(a||b):: C = 1 +7548 ns P2(a||b):: C = 0 +7552 ns P1(a&&b):: C = 1 +7552 ns P2(a&&b):: C = 0 +7554 ns P1(a||b):: C = 1 +7554 ns P2(a||b):: C = 0 +7558 ns P1(a&&b):: C = 0 +7558 ns P2(a&&b):: C = 1 +7560 ns P1(a||b):: C = 1 +7560 ns P2(a||b):: C = 0 +7564 ns P1(a&&b):: C = 0 +7564 ns P2(a&&b):: C = 1 +7566 ns P1(a||b):: C = 1 +7566 ns P2(a||b):: C = 0 +7570 ns P1(a&&b):: C = 0 +7570 ns P2(a&&b):: C = 1 +7572 ns P1(a||b):: C = 1 +7572 ns P2(a||b):: C = 0 +7576 ns P1(a&&b):: C = 1 +7576 ns P2(a&&b):: C = 0 +7578 ns P1(a||b):: C = 1 +7578 ns P2(a||b):: C = 0 +7582 ns P1(a&&b):: C = 0 +7582 ns P2(a&&b):: C = 1 +7584 ns P1(a||b):: C = 1 +7584 ns P2(a||b):: C = 0 +7588 ns P1(a&&b):: C = 1 +7588 ns P2(a&&b):: C = 0 +7590 ns P1(a||b):: C = 1 +7590 ns P2(a||b):: C = 0 +7594 ns P1(a&&b):: C = 1 +7594 ns P2(a&&b):: C = 0 +7596 ns P1(a||b):: C = 1 +7596 ns P2(a||b):: C = 0 +7600 ns P1(a&&b):: C = 0 +7600 ns P2(a&&b):: C = 1 +7602 ns P1(a||b):: C = 1 +7602 ns P2(a||b):: C = 0 +7606 ns P1(a&&b):: C = 1 +7606 ns P2(a&&b):: C = 0 +7608 ns P1(a||b):: C = 1 +7608 ns P2(a||b):: C = 0 +7612 ns P1(a&&b):: C = 0 +7612 ns P2(a&&b):: C = 1 +7614 ns P1(a||b):: C = 1 +7614 ns P2(a||b):: C = 0 +7618 ns P1(a&&b):: C = 0 +7618 ns P2(a&&b):: C = 1 +7620 ns P1(a||b):: C = 0 +7620 ns P2(a||b):: C = 1 +7624 ns P1(a&&b):: C = 0 +7624 ns P2(a&&b):: C = 1 +7626 ns P1(a||b):: C = 0 +7626 ns P2(a||b):: C = 1 +7630 ns P1(a&&b):: C = 0 +7630 ns P2(a&&b):: C = 1 +7632 ns P1(a||b):: C = 1 +7632 ns P2(a||b):: C = 0 +7636 ns P1(a&&b):: C = 1 +7636 ns P2(a&&b):: C = 0 +7638 ns P1(a||b):: C = 0 +7638 ns P2(a||b):: C = 1 +7642 ns P1(a&&b):: C = 0 +7642 ns P2(a&&b):: C = 1 +7644 ns P1(a||b):: C = 1 +7644 ns P2(a||b):: C = 0 +7648 ns P1(a&&b):: C = 1 +7648 ns P2(a&&b):: C = 0 +7650 ns P1(a||b):: C = 1 +7650 ns P2(a||b):: C = 0 +7654 ns P1(a&&b):: C = 0 +7654 ns P2(a&&b):: C = 1 +7656 ns P1(a||b):: C = 1 +7656 ns P2(a||b):: C = 0 +7660 ns P1(a&&b):: C = 1 +7660 ns P2(a&&b):: C = 0 +7662 ns P1(a||b):: C = 1 +7662 ns P2(a||b):: C = 0 +7666 ns P1(a&&b):: C = 0 +7666 ns P2(a&&b):: C = 1 +7668 ns P1(a||b):: C = 0 +7668 ns P2(a||b):: C = 1 +7672 ns P1(a&&b):: C = 1 +7672 ns P2(a&&b):: C = 0 +7674 ns P1(a||b):: C = 1 +7674 ns P2(a||b):: C = 0 +7678 ns P1(a&&b):: C = 0 +7678 ns P2(a&&b):: C = 1 +7680 ns P1(a||b):: C = 1 +7680 ns P2(a||b):: C = 0 +7684 ns P1(a&&b):: C = 0 +7684 ns P2(a&&b):: C = 1 +7686 ns P1(a||b):: C = 1 +7686 ns P2(a||b):: C = 0 +7690 ns P1(a&&b):: C = 0 +7690 ns P2(a&&b):: C = 1 +7692 ns P1(a||b):: C = 1 +7692 ns P2(a||b):: C = 0 +7696 ns P1(a&&b):: C = 0 +7696 ns P2(a&&b):: C = 1 +7698 ns P1(a||b):: C = 1 +7698 ns P2(a||b):: C = 0 +7702 ns P1(a&&b):: C = 0 +7702 ns P2(a&&b):: C = 1 +7704 ns P1(a||b):: C = 1 +7704 ns P2(a||b):: C = 0 +7708 ns P1(a&&b):: C = 1 +7708 ns P2(a&&b):: C = 0 +7710 ns P1(a||b):: C = 1 +7710 ns P2(a||b):: C = 0 +7714 ns P1(a&&b):: C = 0 +7714 ns P2(a&&b):: C = 1 +7716 ns P1(a||b):: C = 0 +7716 ns P2(a||b):: C = 1 +7720 ns P1(a&&b):: C = 0 +7720 ns P2(a&&b):: C = 1 +7722 ns P1(a||b):: C = 0 +7722 ns P2(a||b):: C = 1 +7726 ns P1(a&&b):: C = 0 +7726 ns P2(a&&b):: C = 1 +7728 ns P1(a||b):: C = 1 +7728 ns P2(a||b):: C = 0 +7732 ns P1(a&&b):: C = 0 +7732 ns P2(a&&b):: C = 1 +7734 ns P1(a||b):: C = 0 +7734 ns P2(a||b):: C = 1 +7738 ns P1(a&&b):: C = 0 +7738 ns P2(a&&b):: C = 1 +7740 ns P1(a||b):: C = 1 +7740 ns P2(a||b):: C = 0 +7744 ns P1(a&&b):: C = 0 +7744 ns P2(a&&b):: C = 1 +7746 ns P1(a||b):: C = 0 +7746 ns P2(a||b):: C = 1 +7750 ns P1(a&&b):: C = 1 +7750 ns P2(a&&b):: C = 0 +7752 ns P1(a||b):: C = 1 +7752 ns P2(a||b):: C = 0 +7756 ns P1(a&&b):: C = 1 +7756 ns P2(a&&b):: C = 0 +7758 ns P1(a||b):: C = 1 +7758 ns P2(a||b):: C = 0 +7762 ns P1(a&&b):: C = 0 +7762 ns P2(a&&b):: C = 1 +7764 ns P1(a||b):: C = 1 +7764 ns P2(a||b):: C = 0 +7768 ns P1(a&&b):: C = 0 +7768 ns P2(a&&b):: C = 1 +7770 ns P1(a||b):: C = 1 +7770 ns P2(a||b):: C = 0 +7774 ns P1(a&&b):: C = 1 +7774 ns P2(a&&b):: C = 0 +7776 ns P1(a||b):: C = 1 +7776 ns P2(a||b):: C = 0 +7780 ns P1(a&&b):: C = 0 +7780 ns P2(a&&b):: C = 1 +7782 ns P1(a||b):: C = 1 +7782 ns P2(a||b):: C = 0 +7786 ns P1(a&&b):: C = 0 +7786 ns P2(a&&b):: C = 1 +7788 ns P1(a||b):: C = 1 +7788 ns P2(a||b):: C = 0 +7792 ns P1(a&&b):: C = 0 +7792 ns P2(a&&b):: C = 1 +7794 ns P1(a||b):: C = 1 +7794 ns P2(a||b):: C = 0 +7798 ns P1(a&&b):: C = 0 +7798 ns P2(a&&b):: C = 1 +7800 ns P1(a||b):: C = 1 +7800 ns P2(a||b):: C = 0 +7804 ns P1(a&&b):: C = 0 +7804 ns P2(a&&b):: C = 1 +7806 ns P1(a||b):: C = 0 +7806 ns P2(a||b):: C = 1 +7810 ns P1(a&&b):: C = 0 +7810 ns P2(a&&b):: C = 1 +7812 ns P1(a||b):: C = 0 +7812 ns P2(a||b):: C = 1 +7816 ns P1(a&&b):: C = 0 +7816 ns P2(a&&b):: C = 1 +7818 ns P1(a||b):: C = 0 +7818 ns P2(a||b):: C = 1 +7822 ns P1(a&&b):: C = 1 +7822 ns P2(a&&b):: C = 0 +7824 ns P1(a||b):: C = 0 +7824 ns P2(a||b):: C = 1 +7828 ns P1(a&&b):: C = 0 +7828 ns P2(a&&b):: C = 1 +7830 ns P1(a||b):: C = 0 +7830 ns P2(a||b):: C = 1 +7834 ns P1(a&&b):: C = 0 +7834 ns P2(a&&b):: C = 1 +7836 ns P1(a||b):: C = 0 +7836 ns P2(a||b):: C = 1 +7840 ns P1(a&&b):: C = 0 +7840 ns P2(a&&b):: C = 1 +7842 ns P1(a||b):: C = 1 +7842 ns P2(a||b):: C = 0 +7846 ns P1(a&&b):: C = 1 +7846 ns P2(a&&b):: C = 0 +7848 ns P1(a||b):: C = 1 +7848 ns P2(a||b):: C = 0 +7852 ns P1(a&&b):: C = 0 +7852 ns P2(a&&b):: C = 1 +7854 ns P1(a||b):: C = 1 +7854 ns P2(a||b):: C = 0 +7858 ns P1(a&&b):: C = 0 +7858 ns P2(a&&b):: C = 1 +7860 ns P1(a||b):: C = 1 +7860 ns P2(a||b):: C = 0 +7864 ns P1(a&&b):: C = 0 +7864 ns P2(a&&b):: C = 1 +7866 ns P1(a||b):: C = 1 +7866 ns P2(a||b):: C = 0 +7870 ns P1(a&&b):: C = 0 +7870 ns P2(a&&b):: C = 1 +7872 ns P1(a||b):: C = 0 +7872 ns P2(a||b):: C = 1 +7876 ns P1(a&&b):: C = 0 +7876 ns P2(a&&b):: C = 1 +7878 ns P1(a||b):: C = 1 +7878 ns P2(a||b):: C = 0 +7882 ns P1(a&&b):: C = 0 +7882 ns P2(a&&b):: C = 1 +7884 ns P1(a||b):: C = 1 +7884 ns P2(a||b):: C = 0 +7888 ns P1(a&&b):: C = 0 +7888 ns P2(a&&b):: C = 1 +7890 ns P1(a||b):: C = 0 +7890 ns P2(a||b):: C = 1 +7894 ns P1(a&&b):: C = 0 +7894 ns P2(a&&b):: C = 1 +7896 ns P1(a||b):: C = 1 +7896 ns P2(a||b):: C = 0 +7900 ns P1(a&&b):: C = 0 +7900 ns P2(a&&b):: C = 1 +7902 ns P1(a||b):: C = 1 +7902 ns P2(a||b):: C = 0 +7906 ns P1(a&&b):: C = 0 +7906 ns P2(a&&b):: C = 1 +7908 ns P1(a||b):: C = 1 +7908 ns P2(a||b):: C = 0 +7912 ns P1(a&&b):: C = 0 +7912 ns P2(a&&b):: C = 1 +7914 ns P1(a||b):: C = 1 +7914 ns P2(a||b):: C = 0 +7918 ns P1(a&&b):: C = 1 +7918 ns P2(a&&b):: C = 0 +7920 ns P1(a||b):: C = 1 +7920 ns P2(a||b):: C = 0 +7924 ns P1(a&&b):: C = 1 +7924 ns P2(a&&b):: C = 0 +7926 ns P1(a||b):: C = 0 +7926 ns P2(a||b):: C = 1 +7930 ns P1(a&&b):: C = 0 +7930 ns P2(a&&b):: C = 1 +7932 ns P1(a||b):: C = 0 +7932 ns P2(a||b):: C = 1 +7936 ns P1(a&&b):: C = 1 +7936 ns P2(a&&b):: C = 0 +7938 ns P1(a||b):: C = 1 +7938 ns P2(a||b):: C = 0 +7942 ns P1(a&&b):: C = 0 +7942 ns P2(a&&b):: C = 1 +7944 ns P1(a||b):: C = 1 +7944 ns P2(a||b):: C = 0 +7948 ns P1(a&&b):: C = 1 +7948 ns P2(a&&b):: C = 0 +7950 ns P1(a||b):: C = 1 +7950 ns P2(a||b):: C = 0 +7954 ns P1(a&&b):: C = 0 +7954 ns P2(a&&b):: C = 1 +7956 ns P1(a||b):: C = 1 +7956 ns P2(a||b):: C = 0 +7960 ns P1(a&&b):: C = 0 +7960 ns P2(a&&b):: C = 1 +7962 ns P1(a||b):: C = 1 +7962 ns P2(a||b):: C = 0 +7966 ns P1(a&&b):: C = 0 +7966 ns P2(a&&b):: C = 1 +7968 ns P1(a||b):: C = 1 +7968 ns P2(a||b):: C = 0 +7972 ns P1(a&&b):: C = 1 +7972 ns P2(a&&b):: C = 0 +7974 ns P1(a||b):: C = 0 +7974 ns P2(a||b):: C = 1 +7978 ns P1(a&&b):: C = 0 +7978 ns P2(a&&b):: C = 1 +7980 ns P1(a||b):: C = 1 +7980 ns P2(a||b):: C = 0 +7984 ns P1(a&&b):: C = 0 +7984 ns P2(a&&b):: C = 1 +7986 ns P1(a||b):: C = 1 +7986 ns P2(a||b):: C = 0 +7990 ns P1(a&&b):: C = 0 +7990 ns P2(a&&b):: C = 1 +7992 ns P1(a||b):: C = 1 +7992 ns P2(a||b):: C = 0 +7996 ns P1(a&&b):: C = 0 +7996 ns P2(a&&b):: C = 1 +7998 ns P1(a||b):: C = 1 +7998 ns P2(a||b):: C = 0 +8002 ns P1(a&&b):: C = 0 +8002 ns P2(a&&b):: C = 1 +8004 ns P1(a||b):: C = 0 +8004 ns P2(a||b):: C = 1 +8008 ns P1(a&&b):: C = 0 +8008 ns P2(a&&b):: C = 1 +8010 ns P1(a||b):: C = 1 +8010 ns P2(a||b):: C = 0 +8014 ns P1(a&&b):: C = 0 +8014 ns P2(a&&b):: C = 1 +8016 ns P1(a||b):: C = 0 +8016 ns P2(a||b):: C = 1 +8020 ns P1(a&&b):: C = 1 +8020 ns P2(a&&b):: C = 0 +8022 ns P1(a||b):: C = 1 +8022 ns P2(a||b):: C = 0 +8026 ns P1(a&&b):: C = 1 +8026 ns P2(a&&b):: C = 0 +8028 ns P1(a||b):: C = 1 +8028 ns P2(a||b):: C = 0 +8032 ns P1(a&&b):: C = 0 +8032 ns P2(a&&b):: C = 1 +8034 ns P1(a||b):: C = 1 +8034 ns P2(a||b):: C = 0 +8038 ns P1(a&&b):: C = 1 +8038 ns P2(a&&b):: C = 0 +8040 ns P1(a||b):: C = 1 +8040 ns P2(a||b):: C = 0 +8044 ns P1(a&&b):: C = 0 +8044 ns P2(a&&b):: C = 1 +8046 ns P1(a||b):: C = 1 +8046 ns P2(a||b):: C = 0 +8050 ns P1(a&&b):: C = 0 +8050 ns P2(a&&b):: C = 1 +8052 ns P1(a||b):: C = 0 +8052 ns P2(a||b):: C = 1 +8056 ns P1(a&&b):: C = 0 +8056 ns P2(a&&b):: C = 1 +8058 ns P1(a||b):: C = 0 +8058 ns P2(a||b):: C = 1 +8062 ns P1(a&&b):: C = 1 +8062 ns P2(a&&b):: C = 0 +8064 ns P1(a||b):: C = 1 +8064 ns P2(a||b):: C = 0 +8068 ns P1(a&&b):: C = 0 +8068 ns P2(a&&b):: C = 1 +8070 ns P1(a||b):: C = 0 +8070 ns P2(a||b):: C = 1 +8074 ns P1(a&&b):: C = 0 +8074 ns P2(a&&b):: C = 1 +8076 ns P1(a||b):: C = 1 +8076 ns P2(a||b):: C = 0 +8080 ns P1(a&&b):: C = 0 +8080 ns P2(a&&b):: C = 1 +8082 ns P1(a||b):: C = 1 +8082 ns P2(a||b):: C = 0 +8086 ns P1(a&&b):: C = 0 +8086 ns P2(a&&b):: C = 1 +8088 ns P1(a||b):: C = 1 +8088 ns P2(a||b):: C = 0 +8092 ns P1(a&&b):: C = 0 +8092 ns P2(a&&b):: C = 1 +8094 ns P1(a||b):: C = 0 +8094 ns P2(a||b):: C = 1 +8098 ns P1(a&&b):: C = 0 +8098 ns P2(a&&b):: C = 1 +8100 ns P1(a||b):: C = 1 +8100 ns P2(a||b):: C = 0 +8104 ns P1(a&&b):: C = 0 +8104 ns P2(a&&b):: C = 1 +8106 ns P1(a||b):: C = 1 +8106 ns P2(a||b):: C = 0 +8110 ns P1(a&&b):: C = 0 +8110 ns P2(a&&b):: C = 1 +8112 ns P1(a||b):: C = 1 +8112 ns P2(a||b):: C = 0 +8116 ns P1(a&&b):: C = 0 +8116 ns P2(a&&b):: C = 1 +8118 ns P1(a||b):: C = 1 +8118 ns P2(a||b):: C = 0 +8122 ns P1(a&&b):: C = 0 +8122 ns P2(a&&b):: C = 1 +8124 ns P1(a||b):: C = 1 +8124 ns P2(a||b):: C = 0 +8128 ns P1(a&&b):: C = 0 +8128 ns P2(a&&b):: C = 1 +8130 ns P1(a||b):: C = 1 +8130 ns P2(a||b):: C = 0 +8134 ns P1(a&&b):: C = 0 +8134 ns P2(a&&b):: C = 1 +8136 ns P1(a||b):: C = 0 +8136 ns P2(a||b):: C = 1 +8140 ns P1(a&&b):: C = 0 +8140 ns P2(a&&b):: C = 1 +8142 ns P1(a||b):: C = 1 +8142 ns P2(a||b):: C = 0 +8146 ns P1(a&&b):: C = 0 +8146 ns P2(a&&b):: C = 1 +8148 ns P1(a||b):: C = 1 +8148 ns P2(a||b):: C = 0 +8152 ns P1(a&&b):: C = 0 +8152 ns P2(a&&b):: C = 1 +8154 ns P1(a||b):: C = 1 +8154 ns P2(a||b):: C = 0 +8158 ns P1(a&&b):: C = 0 +8158 ns P2(a&&b):: C = 1 +8160 ns P1(a||b):: C = 1 +8160 ns P2(a||b):: C = 0 +8164 ns P1(a&&b):: C = 0 +8164 ns P2(a&&b):: C = 1 +8166 ns P1(a||b):: C = 0 +8166 ns P2(a||b):: C = 1 +8170 ns P1(a&&b):: C = 1 +8170 ns P2(a&&b):: C = 0 +8172 ns P1(a||b):: C = 1 +8172 ns P2(a||b):: C = 0 +8176 ns P1(a&&b):: C = 0 +8176 ns P2(a&&b):: C = 1 +8178 ns P1(a||b):: C = 0 +8178 ns P2(a||b):: C = 1 +8182 ns P1(a&&b):: C = 1 +8182 ns P2(a&&b):: C = 0 +8184 ns P1(a||b):: C = 1 +8184 ns P2(a||b):: C = 0 +8188 ns P1(a&&b):: C = 0 +8188 ns P2(a&&b):: C = 1 +8190 ns P1(a||b):: C = 0 +8190 ns P2(a||b):: C = 1 +8194 ns P1(a&&b):: C = 0 +8194 ns P2(a&&b):: C = 1 +8196 ns P1(a||b):: C = 1 +8196 ns P2(a||b):: C = 0 +8200 ns P1(a&&b):: C = 0 +8200 ns P2(a&&b):: C = 1 +8202 ns P1(a||b):: C = 1 +8202 ns P2(a||b):: C = 0 +8206 ns P1(a&&b):: C = 0 +8206 ns P2(a&&b):: C = 1 +8208 ns P1(a||b):: C = 0 +8208 ns P2(a||b):: C = 1 +8212 ns P1(a&&b):: C = 0 +8212 ns P2(a&&b):: C = 1 +8214 ns P1(a||b):: C = 0 +8214 ns P2(a||b):: C = 1 +8218 ns P1(a&&b):: C = 0 +8218 ns P2(a&&b):: C = 1 +8220 ns P1(a||b):: C = 1 +8220 ns P2(a||b):: C = 0 +8224 ns P1(a&&b):: C = 0 +8224 ns P2(a&&b):: C = 1 +8226 ns P1(a||b):: C = 1 +8226 ns P2(a||b):: C = 0 +8230 ns P1(a&&b):: C = 0 +8230 ns P2(a&&b):: C = 1 +8232 ns P1(a||b):: C = 1 +8232 ns P2(a||b):: C = 0 +8236 ns P1(a&&b):: C = 0 +8236 ns P2(a&&b):: C = 1 +8238 ns P1(a||b):: C = 1 +8238 ns P2(a||b):: C = 0 +8242 ns P1(a&&b):: C = 0 +8242 ns P2(a&&b):: C = 1 +8244 ns P1(a||b):: C = 1 +8244 ns P2(a||b):: C = 0 +8248 ns P1(a&&b):: C = 0 +8248 ns P2(a&&b):: C = 1 +8250 ns P1(a||b):: C = 1 +8250 ns P2(a||b):: C = 0 +8254 ns P1(a&&b):: C = 0 +8254 ns P2(a&&b):: C = 1 +8256 ns P1(a||b):: C = 0 +8256 ns P2(a||b):: C = 1 +8260 ns P1(a&&b):: C = 1 +8260 ns P2(a&&b):: C = 0 +8262 ns P1(a||b):: C = 0 +8262 ns P2(a||b):: C = 1 +8266 ns P1(a&&b):: C = 0 +8266 ns P2(a&&b):: C = 1 +8268 ns P1(a||b):: C = 0 +8268 ns P2(a||b):: C = 1 +8272 ns P1(a&&b):: C = 0 +8272 ns P2(a&&b):: C = 1 +8274 ns P1(a||b):: C = 1 +8274 ns P2(a||b):: C = 0 +8278 ns P1(a&&b):: C = 0 +8278 ns P2(a&&b):: C = 1 +8280 ns P1(a||b):: C = 0 +8280 ns P2(a||b):: C = 1 +8284 ns P1(a&&b):: C = 0 +8284 ns P2(a&&b):: C = 1 +8286 ns P1(a||b):: C = 1 +8286 ns P2(a||b):: C = 0 +8290 ns P1(a&&b):: C = 0 +8290 ns P2(a&&b):: C = 1 +8292 ns P1(a||b):: C = 1 +8292 ns P2(a||b):: C = 0 +8296 ns P1(a&&b):: C = 0 +8296 ns P2(a&&b):: C = 1 +8298 ns P1(a||b):: C = 1 +8298 ns P2(a||b):: C = 0 +8302 ns P1(a&&b):: C = 1 +8302 ns P2(a&&b):: C = 0 +8304 ns P1(a||b):: C = 1 +8304 ns P2(a||b):: C = 0 +8308 ns P1(a&&b):: C = 0 +8308 ns P2(a&&b):: C = 1 +8310 ns P1(a||b):: C = 1 +8310 ns P2(a||b):: C = 0 +8314 ns P1(a&&b):: C = 0 +8314 ns P2(a&&b):: C = 1 +8316 ns P1(a||b):: C = 1 +8316 ns P2(a||b):: C = 0 +8320 ns P1(a&&b):: C = 0 +8320 ns P2(a&&b):: C = 1 +8322 ns P1(a||b):: C = 1 +8322 ns P2(a||b):: C = 0 +8326 ns P1(a&&b):: C = 1 +8326 ns P2(a&&b):: C = 0 +8328 ns P1(a||b):: C = 0 +8328 ns P2(a||b):: C = 1 +8332 ns P1(a&&b):: C = 1 +8332 ns P2(a&&b):: C = 0 +8334 ns P1(a||b):: C = 1 +8334 ns P2(a||b):: C = 0 +8338 ns P1(a&&b):: C = 0 +8338 ns P2(a&&b):: C = 1 +8340 ns P1(a||b):: C = 1 +8340 ns P2(a||b):: C = 0 +8344 ns P1(a&&b):: C = 1 +8344 ns P2(a&&b):: C = 0 +8346 ns P1(a||b):: C = 1 +8346 ns P2(a||b):: C = 0 +8350 ns P1(a&&b):: C = 1 +8350 ns P2(a&&b):: C = 0 +8352 ns P1(a||b):: C = 1 +8352 ns P2(a||b):: C = 0 +8356 ns P1(a&&b):: C = 0 +8356 ns P2(a&&b):: C = 1 +8358 ns P1(a||b):: C = 1 +8358 ns P2(a||b):: C = 0 +8362 ns P1(a&&b):: C = 0 +8362 ns P2(a&&b):: C = 1 +8364 ns P1(a||b):: C = 0 +8364 ns P2(a||b):: C = 1 +8368 ns P1(a&&b):: C = 0 +8368 ns P2(a&&b):: C = 1 +8370 ns P1(a||b):: C = 0 +8370 ns P2(a||b):: C = 1 +8374 ns P1(a&&b):: C = 0 +8374 ns P2(a&&b):: C = 1 +8376 ns P1(a||b):: C = 1 +8376 ns P2(a||b):: C = 0 +8380 ns P1(a&&b):: C = 0 +8380 ns P2(a&&b):: C = 1 +8382 ns P1(a||b):: C = 1 +8382 ns P2(a||b):: C = 0 +8386 ns P1(a&&b):: C = 0 +8386 ns P2(a&&b):: C = 1 +8388 ns P1(a||b):: C = 1 +8388 ns P2(a||b):: C = 0 +8392 ns P1(a&&b):: C = 1 +8392 ns P2(a&&b):: C = 0 +8394 ns P1(a||b):: C = 0 +8394 ns P2(a||b):: C = 1 +8398 ns P1(a&&b):: C = 0 +8398 ns P2(a&&b):: C = 1 +8400 ns P1(a||b):: C = 1 +8400 ns P2(a||b):: C = 0 +8404 ns P1(a&&b):: C = 0 +8404 ns P2(a&&b):: C = 1 +8406 ns P1(a||b):: C = 1 +8406 ns P2(a||b):: C = 0 +8410 ns P1(a&&b):: C = 0 +8410 ns P2(a&&b):: C = 1 +8412 ns P1(a||b):: C = 1 +8412 ns P2(a||b):: C = 0 +8416 ns P1(a&&b):: C = 0 +8416 ns P2(a&&b):: C = 1 +8418 ns P1(a||b):: C = 1 +8418 ns P2(a||b):: C = 0 +8422 ns P1(a&&b):: C = 0 +8422 ns P2(a&&b):: C = 1 +8424 ns P1(a||b):: C = 1 +8424 ns P2(a||b):: C = 0 +8428 ns P1(a&&b):: C = 0 +8428 ns P2(a&&b):: C = 1 +8430 ns P1(a||b):: C = 0 +8430 ns P2(a||b):: C = 1 +8434 ns P1(a&&b):: C = 0 +8434 ns P2(a&&b):: C = 1 +8436 ns P1(a||b):: C = 0 +8436 ns P2(a||b):: C = 1 +8440 ns P1(a&&b):: C = 0 +8440 ns P2(a&&b):: C = 1 +8442 ns P1(a||b):: C = 1 +8442 ns P2(a||b):: C = 0 +8446 ns P1(a&&b):: C = 0 +8446 ns P2(a&&b):: C = 1 +8448 ns P1(a||b):: C = 1 +8448 ns P2(a||b):: C = 0 +8452 ns P1(a&&b):: C = 0 +8452 ns P2(a&&b):: C = 1 +8454 ns P1(a||b):: C = 1 +8454 ns P2(a||b):: C = 0 +8458 ns P1(a&&b):: C = 1 +8458 ns P2(a&&b):: C = 0 +8460 ns P1(a||b):: C = 1 +8460 ns P2(a||b):: C = 0 +8464 ns P1(a&&b):: C = 0 +8464 ns P2(a&&b):: C = 1 +8466 ns P1(a||b):: C = 1 +8466 ns P2(a||b):: C = 0 +8470 ns P1(a&&b):: C = 0 +8470 ns P2(a&&b):: C = 1 +8472 ns P1(a||b):: C = 1 +8472 ns P2(a||b):: C = 0 +8476 ns P1(a&&b):: C = 0 +8476 ns P2(a&&b):: C = 1 +8478 ns P1(a||b):: C = 1 +8478 ns P2(a||b):: C = 0 +8482 ns P1(a&&b):: C = 0 +8482 ns P2(a&&b):: C = 1 +8484 ns P1(a||b):: C = 1 +8484 ns P2(a||b):: C = 0 +8488 ns P1(a&&b):: C = 0 +8488 ns P2(a&&b):: C = 1 +8490 ns P1(a||b):: C = 1 +8490 ns P2(a||b):: C = 0 +8494 ns P1(a&&b):: C = 0 +8494 ns P2(a&&b):: C = 1 +8496 ns P1(a||b):: C = 0 +8496 ns P2(a||b):: C = 1 +8500 ns P1(a&&b):: C = 1 +8500 ns P2(a&&b):: C = 0 +8502 ns P1(a||b):: C = 1 +8502 ns P2(a||b):: C = 0 +8506 ns P1(a&&b):: C = 0 +8506 ns P2(a&&b):: C = 1 +8508 ns P1(a||b):: C = 0 +8508 ns P2(a||b):: C = 1 +8512 ns P1(a&&b):: C = 0 +8512 ns P2(a&&b):: C = 1 +8514 ns P1(a||b):: C = 1 +8514 ns P2(a||b):: C = 0 +8518 ns P1(a&&b):: C = 0 +8518 ns P2(a&&b):: C = 1 +8520 ns P1(a||b):: C = 1 +8520 ns P2(a||b):: C = 0 +8524 ns P1(a&&b):: C = 0 +8524 ns P2(a&&b):: C = 1 +8526 ns P1(a||b):: C = 0 +8526 ns P2(a||b):: C = 1 +8530 ns P1(a&&b):: C = 0 +8530 ns P2(a&&b):: C = 1 +8532 ns P1(a||b):: C = 1 +8532 ns P2(a||b):: C = 0 +8536 ns P1(a&&b):: C = 0 +8536 ns P2(a&&b):: C = 1 +8538 ns P1(a||b):: C = 1 +8538 ns P2(a||b):: C = 0 +8542 ns P1(a&&b):: C = 0 +8542 ns P2(a&&b):: C = 1 +8544 ns P1(a||b):: C = 1 +8544 ns P2(a||b):: C = 0 +8548 ns P1(a&&b):: C = 1 +8548 ns P2(a&&b):: C = 0 +8550 ns P1(a||b):: C = 1 +8550 ns P2(a||b):: C = 0 +8554 ns P1(a&&b):: C = 1 +8554 ns P2(a&&b):: C = 0 +8556 ns P1(a||b):: C = 1 +8556 ns P2(a||b):: C = 0 +8560 ns P1(a&&b):: C = 0 +8560 ns P2(a&&b):: C = 1 +8562 ns P1(a||b):: C = 0 +8562 ns P2(a||b):: C = 1 +8566 ns P1(a&&b):: C = 0 +8566 ns P2(a&&b):: C = 1 +8568 ns P1(a||b):: C = 1 +8568 ns P2(a||b):: C = 0 +8572 ns P1(a&&b):: C = 0 +8572 ns P2(a&&b):: C = 1 +8574 ns P1(a||b):: C = 1 +8574 ns P2(a||b):: C = 0 +8578 ns P1(a&&b):: C = 0 +8578 ns P2(a&&b):: C = 1 +8580 ns P1(a||b):: C = 1 +8580 ns P2(a||b):: C = 0 +8584 ns P1(a&&b):: C = 1 +8584 ns P2(a&&b):: C = 0 +8586 ns P1(a||b):: C = 1 +8586 ns P2(a||b):: C = 0 +8590 ns P1(a&&b):: C = 1 +8590 ns P2(a&&b):: C = 0 +8592 ns P1(a||b):: C = 1 +8592 ns P2(a||b):: C = 0 +8596 ns P1(a&&b):: C = 1 +8596 ns P2(a&&b):: C = 0 +8598 ns P1(a||b):: C = 1 +8598 ns P2(a||b):: C = 0 +8602 ns P1(a&&b):: C = 0 +8602 ns P2(a&&b):: C = 1 +8604 ns P1(a||b):: C = 1 +8604 ns P2(a||b):: C = 0 +8608 ns P1(a&&b):: C = 0 +8608 ns P2(a&&b):: C = 1 +8610 ns P1(a||b):: C = 0 +8610 ns P2(a||b):: C = 1 +8614 ns P1(a&&b):: C = 0 +8614 ns P2(a&&b):: C = 1 +8616 ns P1(a||b):: C = 1 +8616 ns P2(a||b):: C = 0 +8620 ns P1(a&&b):: C = 1 +8620 ns P2(a&&b):: C = 0 +8622 ns P1(a||b):: C = 1 +8622 ns P2(a||b):: C = 0 +8626 ns P1(a&&b):: C = 0 +8626 ns P2(a&&b):: C = 1 +8628 ns P1(a||b):: C = 0 +8628 ns P2(a||b):: C = 1 +8632 ns P1(a&&b):: C = 0 +8632 ns P2(a&&b):: C = 1 +8634 ns P1(a||b):: C = 0 +8634 ns P2(a||b):: C = 1 +8638 ns P1(a&&b):: C = 0 +8638 ns P2(a&&b):: C = 1 +8640 ns P1(a||b):: C = 1 +8640 ns P2(a||b):: C = 0 +8644 ns P1(a&&b):: C = 0 +8644 ns P2(a&&b):: C = 1 +8646 ns P1(a||b):: C = 1 +8646 ns P2(a||b):: C = 0 +8650 ns P1(a&&b):: C = 0 +8650 ns P2(a&&b):: C = 1 +8652 ns P1(a||b):: C = 1 +8652 ns P2(a||b):: C = 0 +8656 ns P1(a&&b):: C = 0 +8656 ns P2(a&&b):: C = 1 +8658 ns P1(a||b):: C = 0 +8658 ns P2(a||b):: C = 1 +8662 ns P1(a&&b):: C = 0 +8662 ns P2(a&&b):: C = 1 +8664 ns P1(a||b):: C = 1 +8664 ns P2(a||b):: C = 0 +8668 ns P1(a&&b):: C = 0 +8668 ns P2(a&&b):: C = 1 +8670 ns P1(a||b):: C = 1 +8670 ns P2(a||b):: C = 0 +8674 ns P1(a&&b):: C = 0 +8674 ns P2(a&&b):: C = 1 +8676 ns P1(a||b):: C = 1 +8676 ns P2(a||b):: C = 0 +8680 ns P1(a&&b):: C = 1 +8680 ns P2(a&&b):: C = 0 +8682 ns P1(a||b):: C = 1 +8682 ns P2(a||b):: C = 0 +8686 ns P1(a&&b):: C = 0 +8686 ns P2(a&&b):: C = 1 +8688 ns P1(a||b):: C = 1 +8688 ns P2(a||b):: C = 0 +8692 ns P1(a&&b):: C = 1 +8692 ns P2(a&&b):: C = 0 +8694 ns P1(a||b):: C = 0 +8694 ns P2(a||b):: C = 1 +8698 ns P1(a&&b):: C = 0 +8698 ns P2(a&&b):: C = 1 +8700 ns P1(a||b):: C = 0 +8700 ns P2(a||b):: C = 1 +8704 ns P1(a&&b):: C = 0 +8704 ns P2(a&&b):: C = 1 +8706 ns P1(a||b):: C = 0 +8706 ns P2(a||b):: C = 1 +8710 ns P1(a&&b):: C = 0 +8710 ns P2(a&&b):: C = 1 +8712 ns P1(a||b):: C = 1 +8712 ns P2(a||b):: C = 0 +8716 ns P1(a&&b):: C = 0 +8716 ns P2(a&&b):: C = 1 +8718 ns P1(a||b):: C = 1 +8718 ns P2(a||b):: C = 0 +8722 ns P1(a&&b):: C = 0 +8722 ns P2(a&&b):: C = 1 +8724 ns P1(a||b):: C = 0 +8724 ns P2(a||b):: C = 1 +8728 ns P1(a&&b):: C = 0 +8728 ns P2(a&&b):: C = 1 +8730 ns P1(a||b):: C = 0 +8730 ns P2(a||b):: C = 1 +8734 ns P1(a&&b):: C = 1 +8734 ns P2(a&&b):: C = 0 +8736 ns P1(a||b):: C = 1 +8736 ns P2(a||b):: C = 0 +8740 ns P1(a&&b):: C = 0 +8740 ns P2(a&&b):: C = 1 +8742 ns P1(a||b):: C = 1 +8742 ns P2(a||b):: C = 0 +8746 ns P1(a&&b):: C = 1 +8746 ns P2(a&&b):: C = 0 +8748 ns P1(a||b):: C = 1 +8748 ns P2(a||b):: C = 0 +8752 ns P1(a&&b):: C = 0 +8752 ns P2(a&&b):: C = 1 +8754 ns P1(a||b):: C = 0 +8754 ns P2(a||b):: C = 1 +8758 ns P1(a&&b):: C = 0 +8758 ns P2(a&&b):: C = 1 +8760 ns P1(a||b):: C = 1 +8760 ns P2(a||b):: C = 0 +8764 ns P1(a&&b):: C = 0 +8764 ns P2(a&&b):: C = 1 +8766 ns P1(a||b):: C = 0 +8766 ns P2(a||b):: C = 1 +8770 ns P1(a&&b):: C = 0 +8770 ns P2(a&&b):: C = 1 +8772 ns P1(a||b):: C = 1 +8772 ns P2(a||b):: C = 0 +8776 ns P1(a&&b):: C = 0 +8776 ns P2(a&&b):: C = 1 +8778 ns P1(a||b):: C = 1 +8778 ns P2(a||b):: C = 0 +8782 ns P1(a&&b):: C = 1 +8782 ns P2(a&&b):: C = 0 +8784 ns P1(a||b):: C = 1 +8784 ns P2(a||b):: C = 0 +8788 ns P1(a&&b):: C = 0 +8788 ns P2(a&&b):: C = 1 +8790 ns P1(a||b):: C = 1 +8790 ns P2(a||b):: C = 0 +8794 ns P1(a&&b):: C = 0 +8794 ns P2(a&&b):: C = 1 +8796 ns P1(a||b):: C = 1 +8796 ns P2(a||b):: C = 0 +8800 ns P1(a&&b):: C = 0 +8800 ns P2(a&&b):: C = 1 +8802 ns P1(a||b):: C = 1 +8802 ns P2(a||b):: C = 0 +8806 ns P1(a&&b):: C = 0 +8806 ns P2(a&&b):: C = 1 +8808 ns P1(a||b):: C = 0 +8808 ns P2(a||b):: C = 1 +8812 ns P1(a&&b):: C = 0 +8812 ns P2(a&&b):: C = 1 +8814 ns P1(a||b):: C = 1 +8814 ns P2(a||b):: C = 0 +8818 ns P1(a&&b):: C = 0 +8818 ns P2(a&&b):: C = 1 +8820 ns P1(a||b):: C = 0 +8820 ns P2(a||b):: C = 1 +8824 ns P1(a&&b):: C = 0 +8824 ns P2(a&&b):: C = 1 +8826 ns P1(a||b):: C = 1 +8826 ns P2(a||b):: C = 0 +8830 ns P1(a&&b):: C = 0 +8830 ns P2(a&&b):: C = 1 +8832 ns P1(a||b):: C = 0 +8832 ns P2(a||b):: C = 1 +8836 ns P1(a&&b):: C = 0 +8836 ns P2(a&&b):: C = 1 +8838 ns P1(a||b):: C = 1 +8838 ns P2(a||b):: C = 0 +8842 ns P1(a&&b):: C = 1 +8842 ns P2(a&&b):: C = 0 +8844 ns P1(a||b):: C = 1 +8844 ns P2(a||b):: C = 0 +8848 ns P1(a&&b):: C = 0 +8848 ns P2(a&&b):: C = 1 +8850 ns P1(a||b):: C = 1 +8850 ns P2(a||b):: C = 0 +8854 ns P1(a&&b):: C = 0 +8854 ns P2(a&&b):: C = 1 +8856 ns P1(a||b):: C = 0 +8856 ns P2(a||b):: C = 1 +8860 ns P1(a&&b):: C = 0 +8860 ns P2(a&&b):: C = 1 +8862 ns P1(a||b):: C = 1 +8862 ns P2(a||b):: C = 0 +8866 ns P1(a&&b):: C = 0 +8866 ns P2(a&&b):: C = 1 +8868 ns P1(a||b):: C = 0 +8868 ns P2(a||b):: C = 1 +8872 ns P1(a&&b):: C = 1 +8872 ns P2(a&&b):: C = 0 +8874 ns P1(a||b):: C = 1 +8874 ns P2(a||b):: C = 0 +8878 ns P1(a&&b):: C = 0 +8878 ns P2(a&&b):: C = 1 +8880 ns P1(a||b):: C = 1 +8880 ns P2(a||b):: C = 0 +8884 ns P1(a&&b):: C = 0 +8884 ns P2(a&&b):: C = 1 +8886 ns P1(a||b):: C = 1 +8886 ns P2(a||b):: C = 0 +8890 ns P1(a&&b):: C = 1 +8890 ns P2(a&&b):: C = 0 +8892 ns P1(a||b):: C = 1 +8892 ns P2(a||b):: C = 0 +8896 ns P1(a&&b):: C = 0 +8896 ns P2(a&&b):: C = 1 +8898 ns P1(a||b):: C = 1 +8898 ns P2(a||b):: C = 0 +8902 ns P1(a&&b):: C = 0 +8902 ns P2(a&&b):: C = 1 +8904 ns P1(a||b):: C = 1 +8904 ns P2(a||b):: C = 0 +8908 ns P1(a&&b):: C = 0 +8908 ns P2(a&&b):: C = 1 +8910 ns P1(a||b):: C = 1 +8910 ns P2(a||b):: C = 0 +8914 ns P1(a&&b):: C = 1 +8914 ns P2(a&&b):: C = 0 +8916 ns P1(a||b):: C = 1 +8916 ns P2(a||b):: C = 0 +8920 ns P1(a&&b):: C = 1 +8920 ns P2(a&&b):: C = 0 +8922 ns P1(a||b):: C = 1 +8922 ns P2(a||b):: C = 0 +8926 ns P1(a&&b):: C = 0 +8926 ns P2(a&&b):: C = 1 +8928 ns P1(a||b):: C = 1 +8928 ns P2(a||b):: C = 0 +8932 ns P1(a&&b):: C = 0 +8932 ns P2(a&&b):: C = 1 +8934 ns P1(a||b):: C = 1 +8934 ns P2(a||b):: C = 0 +8938 ns P1(a&&b):: C = 0 +8938 ns P2(a&&b):: C = 1 +8940 ns P1(a||b):: C = 0 +8940 ns P2(a||b):: C = 1 +8944 ns P1(a&&b):: C = 1 +8944 ns P2(a&&b):: C = 0 +8946 ns P1(a||b):: C = 1 +8946 ns P2(a||b):: C = 0 +8950 ns P1(a&&b):: C = 0 +8950 ns P2(a&&b):: C = 1 +8952 ns P1(a||b):: C = 1 +8952 ns P2(a||b):: C = 0 +8956 ns P1(a&&b):: C = 0 +8956 ns P2(a&&b):: C = 1 +8958 ns P1(a||b):: C = 1 +8958 ns P2(a||b):: C = 0 +8962 ns P1(a&&b):: C = 0 +8962 ns P2(a&&b):: C = 1 +8964 ns P1(a||b):: C = 1 +8964 ns P2(a||b):: C = 0 +8968 ns P1(a&&b):: C = 0 +8968 ns P2(a&&b):: C = 1 +8970 ns P1(a||b):: C = 1 +8970 ns P2(a||b):: C = 0 +8974 ns P1(a&&b):: C = 1 +8974 ns P2(a&&b):: C = 0 +8976 ns P1(a||b):: C = 1 +8976 ns P2(a||b):: C = 0 +8980 ns P1(a&&b):: C = 1 +8980 ns P2(a&&b):: C = 0 +8982 ns P1(a||b):: C = 1 +8982 ns P2(a||b):: C = 0 +8986 ns P1(a&&b):: C = 0 +8986 ns P2(a&&b):: C = 1 +8988 ns P1(a||b):: C = 1 +8988 ns P2(a||b):: C = 0 +8992 ns P1(a&&b):: C = 0 +8992 ns P2(a&&b):: C = 1 +8994 ns P1(a||b):: C = 1 +8994 ns P2(a||b):: C = 0 +8998 ns P1(a&&b):: C = 0 +8998 ns P2(a&&b):: C = 1 +9 us P1(a||b):: C = 1 +9 us P2(a||b):: C = 0 +9004 ns P1(a&&b):: C = 0 +9004 ns P2(a&&b):: C = 1 +9006 ns P1(a||b):: C = 1 +9006 ns P2(a||b):: C = 0 +9010 ns P1(a&&b):: C = 0 +9010 ns P2(a&&b):: C = 1 +9012 ns P1(a||b):: C = 0 +9012 ns P2(a||b):: C = 1 +9016 ns P1(a&&b):: C = 0 +9016 ns P2(a&&b):: C = 1 +9018 ns P1(a||b):: C = 1 +9018 ns P2(a||b):: C = 0 +9022 ns P1(a&&b):: C = 1 +9022 ns P2(a&&b):: C = 0 +9024 ns P1(a||b):: C = 1 +9024 ns P2(a||b):: C = 0 +9028 ns P1(a&&b):: C = 0 +9028 ns P2(a&&b):: C = 1 +9030 ns P1(a||b):: C = 1 +9030 ns P2(a||b):: C = 0 +9034 ns P1(a&&b):: C = 0 +9034 ns P2(a&&b):: C = 1 +9036 ns P1(a||b):: C = 0 +9036 ns P2(a||b):: C = 1 +9040 ns P1(a&&b):: C = 0 +9040 ns P2(a&&b):: C = 1 +9042 ns P1(a||b):: C = 1 +9042 ns P2(a||b):: C = 0 +9046 ns P1(a&&b):: C = 1 +9046 ns P2(a&&b):: C = 0 +9048 ns P1(a||b):: C = 1 +9048 ns P2(a||b):: C = 0 +9052 ns P1(a&&b):: C = 0 +9052 ns P2(a&&b):: C = 1 +9054 ns P1(a||b):: C = 1 +9054 ns P2(a||b):: C = 0 +9058 ns P1(a&&b):: C = 0 +9058 ns P2(a&&b):: C = 1 +9060 ns P1(a||b):: C = 1 +9060 ns P2(a||b):: C = 0 +9064 ns P1(a&&b):: C = 0 +9064 ns P2(a&&b):: C = 1 +9066 ns P1(a||b):: C = 0 +9066 ns P2(a||b):: C = 1 +9070 ns P1(a&&b):: C = 0 +9070 ns P2(a&&b):: C = 1 +9072 ns P1(a||b):: C = 1 +9072 ns P2(a||b):: C = 0 +9076 ns P1(a&&b):: C = 0 +9076 ns P2(a&&b):: C = 1 +9078 ns P1(a||b):: C = 1 +9078 ns P2(a||b):: C = 0 +9082 ns P1(a&&b):: C = 1 +9082 ns P2(a&&b):: C = 0 +9084 ns P1(a||b):: C = 0 +9084 ns P2(a||b):: C = 1 +9088 ns P1(a&&b):: C = 1 +9088 ns P2(a&&b):: C = 0 +9090 ns P1(a||b):: C = 1 +9090 ns P2(a||b):: C = 0 +9094 ns P1(a&&b):: C = 0 +9094 ns P2(a&&b):: C = 1 +9096 ns P1(a||b):: C = 0 +9096 ns P2(a||b):: C = 1 +9100 ns P1(a&&b):: C = 0 +9100 ns P2(a&&b):: C = 1 +9102 ns P1(a||b):: C = 1 +9102 ns P2(a||b):: C = 0 +9106 ns P1(a&&b):: C = 0 +9106 ns P2(a&&b):: C = 1 +9108 ns P1(a||b):: C = 1 +9108 ns P2(a||b):: C = 0 +9112 ns P1(a&&b):: C = 1 +9112 ns P2(a&&b):: C = 0 +9114 ns P1(a||b):: C = 0 +9114 ns P2(a||b):: C = 1 +9118 ns P1(a&&b):: C = 0 +9118 ns P2(a&&b):: C = 1 +9120 ns P1(a||b):: C = 1 +9120 ns P2(a||b):: C = 0 +9124 ns P1(a&&b):: C = 1 +9124 ns P2(a&&b):: C = 0 +9126 ns P1(a||b):: C = 0 +9126 ns P2(a||b):: C = 1 +9130 ns P1(a&&b):: C = 0 +9130 ns P2(a&&b):: C = 1 +9132 ns P1(a||b):: C = 1 +9132 ns P2(a||b):: C = 0 +9136 ns P1(a&&b):: C = 0 +9136 ns P2(a&&b):: C = 1 +9138 ns P1(a||b):: C = 1 +9138 ns P2(a||b):: C = 0 +9142 ns P1(a&&b):: C = 0 +9142 ns P2(a&&b):: C = 1 +9144 ns P1(a||b):: C = 1 +9144 ns P2(a||b):: C = 0 +9148 ns P1(a&&b):: C = 1 +9148 ns P2(a&&b):: C = 0 +9150 ns P1(a||b):: C = 1 +9150 ns P2(a||b):: C = 0 +9154 ns P1(a&&b):: C = 0 +9154 ns P2(a&&b):: C = 1 +9156 ns P1(a||b):: C = 1 +9156 ns P2(a||b):: C = 0 +9160 ns P1(a&&b):: C = 0 +9160 ns P2(a&&b):: C = 1 +9162 ns P1(a||b):: C = 1 +9162 ns P2(a||b):: C = 0 +9166 ns P1(a&&b):: C = 0 +9166 ns P2(a&&b):: C = 1 +9168 ns P1(a||b):: C = 1 +9168 ns P2(a||b):: C = 0 +9172 ns P1(a&&b):: C = 0 +9172 ns P2(a&&b):: C = 1 +9174 ns P1(a||b):: C = 1 +9174 ns P2(a||b):: C = 0 +9178 ns P1(a&&b):: C = 0 +9178 ns P2(a&&b):: C = 1 +9180 ns P1(a||b):: C = 1 +9180 ns P2(a||b):: C = 0 +9184 ns P1(a&&b):: C = 1 +9184 ns P2(a&&b):: C = 0 +9186 ns P1(a||b):: C = 1 +9186 ns P2(a||b):: C = 0 +9190 ns P1(a&&b):: C = 0 +9190 ns P2(a&&b):: C = 1 +9192 ns P1(a||b):: C = 1 +9192 ns P2(a||b):: C = 0 +9196 ns P1(a&&b):: C = 0 +9196 ns P2(a&&b):: C = 1 +9198 ns P1(a||b):: C = 1 +9198 ns P2(a||b):: C = 0 +9202 ns P1(a&&b):: C = 1 +9202 ns P2(a&&b):: C = 0 +9204 ns P1(a||b):: C = 1 +9204 ns P2(a||b):: C = 0 +9208 ns P1(a&&b):: C = 0 +9208 ns P2(a&&b):: C = 1 +9210 ns P1(a||b):: C = 0 +9210 ns P2(a||b):: C = 1 +9214 ns P1(a&&b):: C = 0 +9214 ns P2(a&&b):: C = 1 +9216 ns P1(a||b):: C = 0 +9216 ns P2(a||b):: C = 1 +9220 ns P1(a&&b):: C = 0 +9220 ns P2(a&&b):: C = 1 +9222 ns P1(a||b):: C = 1 +9222 ns P2(a||b):: C = 0 +9226 ns P1(a&&b):: C = 0 +9226 ns P2(a&&b):: C = 1 +9228 ns P1(a||b):: C = 1 +9228 ns P2(a||b):: C = 0 +9232 ns P1(a&&b):: C = 0 +9232 ns P2(a&&b):: C = 1 +9234 ns P1(a||b):: C = 1 +9234 ns P2(a||b):: C = 0 +9238 ns P1(a&&b):: C = 0 +9238 ns P2(a&&b):: C = 1 +9240 ns P1(a||b):: C = 0 +9240 ns P2(a||b):: C = 1 +9244 ns P1(a&&b):: C = 0 +9244 ns P2(a&&b):: C = 1 +9246 ns P1(a||b):: C = 1 +9246 ns P2(a||b):: C = 0 +9250 ns P1(a&&b):: C = 0 +9250 ns P2(a&&b):: C = 1 +9252 ns P1(a||b):: C = 1 +9252 ns P2(a||b):: C = 0 +9256 ns P1(a&&b):: C = 0 +9256 ns P2(a&&b):: C = 1 +9258 ns P1(a||b):: C = 1 +9258 ns P2(a||b):: C = 0 +9262 ns P1(a&&b):: C = 0 +9262 ns P2(a&&b):: C = 1 +9264 ns P1(a||b):: C = 1 +9264 ns P2(a||b):: C = 0 +9268 ns P1(a&&b):: C = 0 +9268 ns P2(a&&b):: C = 1 +9270 ns P1(a||b):: C = 0 +9270 ns P2(a||b):: C = 1 +9274 ns P1(a&&b):: C = 0 +9274 ns P2(a&&b):: C = 1 +9276 ns P1(a||b):: C = 1 +9276 ns P2(a||b):: C = 0 +9280 ns P1(a&&b):: C = 1 +9280 ns P2(a&&b):: C = 0 +9282 ns P1(a||b):: C = 1 +9282 ns P2(a||b):: C = 0 +9286 ns P1(a&&b):: C = 0 +9286 ns P2(a&&b):: C = 1 +9288 ns P1(a||b):: C = 1 +9288 ns P2(a||b):: C = 0 +9292 ns P1(a&&b):: C = 1 +9292 ns P2(a&&b):: C = 0 +9294 ns P1(a||b):: C = 1 +9294 ns P2(a||b):: C = 0 +9298 ns P1(a&&b):: C = 1 +9298 ns P2(a&&b):: C = 0 +9300 ns P1(a||b):: C = 1 +9300 ns P2(a||b):: C = 0 +9304 ns P1(a&&b):: C = 0 +9304 ns P2(a&&b):: C = 1 +9306 ns P1(a||b):: C = 1 +9306 ns P2(a||b):: C = 0 +9310 ns P1(a&&b):: C = 0 +9310 ns P2(a&&b):: C = 1 +9312 ns P1(a||b):: C = 1 +9312 ns P2(a||b):: C = 0 +9316 ns P1(a&&b):: C = 0 +9316 ns P2(a&&b):: C = 1 +9318 ns P1(a||b):: C = 1 +9318 ns P2(a||b):: C = 0 +9322 ns P1(a&&b):: C = 0 +9322 ns P2(a&&b):: C = 1 +9324 ns P1(a||b):: C = 1 +9324 ns P2(a||b):: C = 0 +9328 ns P1(a&&b):: C = 0 +9328 ns P2(a&&b):: C = 1 +9330 ns P1(a||b):: C = 1 +9330 ns P2(a||b):: C = 0 +9334 ns P1(a&&b):: C = 0 +9334 ns P2(a&&b):: C = 1 +9336 ns P1(a||b):: C = 1 +9336 ns P2(a||b):: C = 0 +9340 ns P1(a&&b):: C = 0 +9340 ns P2(a&&b):: C = 1 +9342 ns P1(a||b):: C = 0 +9342 ns P2(a||b):: C = 1 +9346 ns P1(a&&b):: C = 1 +9346 ns P2(a&&b):: C = 0 +9348 ns P1(a||b):: C = 0 +9348 ns P2(a||b):: C = 1 +9352 ns P1(a&&b):: C = 0 +9352 ns P2(a&&b):: C = 1 +9354 ns P1(a||b):: C = 0 +9354 ns P2(a||b):: C = 1 +9358 ns P1(a&&b):: C = 1 +9358 ns P2(a&&b):: C = 0 +9360 ns P1(a||b):: C = 0 +9360 ns P2(a||b):: C = 1 +9364 ns P1(a&&b):: C = 0 +9364 ns P2(a&&b):: C = 1 +9366 ns P1(a||b):: C = 1 +9366 ns P2(a||b):: C = 0 +9370 ns P1(a&&b):: C = 0 +9370 ns P2(a&&b):: C = 1 +9372 ns P1(a||b):: C = 1 +9372 ns P2(a||b):: C = 0 +9376 ns P1(a&&b):: C = 0 +9376 ns P2(a&&b):: C = 1 +9378 ns P1(a||b):: C = 1 +9378 ns P2(a||b):: C = 0 +9382 ns P1(a&&b):: C = 0 +9382 ns P2(a&&b):: C = 1 +9384 ns P1(a||b):: C = 1 +9384 ns P2(a||b):: C = 0 +9388 ns P1(a&&b):: C = 0 +9388 ns P2(a&&b):: C = 1 +9390 ns P1(a||b):: C = 1 +9390 ns P2(a||b):: C = 0 +9394 ns P1(a&&b):: C = 0 +9394 ns P2(a&&b):: C = 1 +9396 ns P1(a||b):: C = 1 +9396 ns P2(a||b):: C = 0 +9400 ns P1(a&&b):: C = 0 +9400 ns P2(a&&b):: C = 1 +9402 ns P1(a||b):: C = 1 +9402 ns P2(a||b):: C = 0 +9406 ns P1(a&&b):: C = 0 +9406 ns P2(a&&b):: C = 1 +9408 ns P1(a||b):: C = 1 +9408 ns P2(a||b):: C = 0 +9412 ns P1(a&&b):: C = 0 +9412 ns P2(a&&b):: C = 1 +9414 ns P1(a||b):: C = 1 +9414 ns P2(a||b):: C = 0 +9418 ns P1(a&&b):: C = 0 +9418 ns P2(a&&b):: C = 1 +9420 ns P1(a||b):: C = 1 +9420 ns P2(a||b):: C = 0 +9424 ns P1(a&&b):: C = 0 +9424 ns P2(a&&b):: C = 1 +9426 ns P1(a||b):: C = 0 +9426 ns P2(a||b):: C = 1 +9430 ns P1(a&&b):: C = 1 +9430 ns P2(a&&b):: C = 0 +9432 ns P1(a||b):: C = 0 +9432 ns P2(a||b):: C = 1 +9436 ns P1(a&&b):: C = 1 +9436 ns P2(a&&b):: C = 0 +9438 ns P1(a||b):: C = 1 +9438 ns P2(a||b):: C = 0 +9442 ns P1(a&&b):: C = 0 +9442 ns P2(a&&b):: C = 1 +9444 ns P1(a||b):: C = 0 +9444 ns P2(a||b):: C = 1 +9448 ns P1(a&&b):: C = 1 +9448 ns P2(a&&b):: C = 0 +9450 ns P1(a||b):: C = 1 +9450 ns P2(a||b):: C = 0 +9454 ns P1(a&&b):: C = 1 +9454 ns P2(a&&b):: C = 0 +9456 ns P1(a||b):: C = 1 +9456 ns P2(a||b):: C = 0 +9460 ns P1(a&&b):: C = 0 +9460 ns P2(a&&b):: C = 1 +9462 ns P1(a||b):: C = 0 +9462 ns P2(a||b):: C = 1 +9466 ns P1(a&&b):: C = 0 +9466 ns P2(a&&b):: C = 1 +9468 ns P1(a||b):: C = 1 +9468 ns P2(a||b):: C = 0 +9472 ns P1(a&&b):: C = 0 +9472 ns P2(a&&b):: C = 1 +9474 ns P1(a||b):: C = 0 +9474 ns P2(a||b):: C = 1 +9478 ns P1(a&&b):: C = 0 +9478 ns P2(a&&b):: C = 1 +9480 ns P1(a||b):: C = 1 +9480 ns P2(a||b):: C = 0 +9484 ns P1(a&&b):: C = 0 +9484 ns P2(a&&b):: C = 1 +9486 ns P1(a||b):: C = 1 +9486 ns P2(a||b):: C = 0 +9490 ns P1(a&&b):: C = 0 +9490 ns P2(a&&b):: C = 1 +9492 ns P1(a||b):: C = 1 +9492 ns P2(a||b):: C = 0 +9496 ns P1(a&&b):: C = 0 +9496 ns P2(a&&b):: C = 1 +9498 ns P1(a||b):: C = 1 +9498 ns P2(a||b):: C = 0 +9502 ns P1(a&&b):: C = 1 +9502 ns P2(a&&b):: C = 0 +9504 ns P1(a||b):: C = 0 +9504 ns P2(a||b):: C = 1 +9508 ns P1(a&&b):: C = 1 +9508 ns P2(a&&b):: C = 0 +9510 ns P1(a||b):: C = 1 +9510 ns P2(a||b):: C = 0 +9514 ns P1(a&&b):: C = 0 +9514 ns P2(a&&b):: C = 1 +9516 ns P1(a||b):: C = 1 +9516 ns P2(a||b):: C = 0 +9520 ns P1(a&&b):: C = 0 +9520 ns P2(a&&b):: C = 1 +9522 ns P1(a||b):: C = 0 +9522 ns P2(a||b):: C = 1 +9526 ns P1(a&&b):: C = 0 +9526 ns P2(a&&b):: C = 1 +9528 ns P1(a||b):: C = 1 +9528 ns P2(a||b):: C = 0 +9532 ns P1(a&&b):: C = 0 +9532 ns P2(a&&b):: C = 1 +9534 ns P1(a||b):: C = 1 +9534 ns P2(a||b):: C = 0 +9538 ns P1(a&&b):: C = 0 +9538 ns P2(a&&b):: C = 1 +9540 ns P1(a||b):: C = 1 +9540 ns P2(a||b):: C = 0 +9544 ns P1(a&&b):: C = 0 +9544 ns P2(a&&b):: C = 1 +9546 ns P1(a||b):: C = 1 +9546 ns P2(a||b):: C = 0 +9550 ns P1(a&&b):: C = 0 +9550 ns P2(a&&b):: C = 1 +9552 ns P1(a||b):: C = 0 +9552 ns P2(a||b):: C = 1 +9556 ns P1(a&&b):: C = 0 +9556 ns P2(a&&b):: C = 1 +9558 ns P1(a||b):: C = 0 +9558 ns P2(a||b):: C = 1 +9562 ns P1(a&&b):: C = 0 +9562 ns P2(a&&b):: C = 1 +9564 ns P1(a||b):: C = 0 +9564 ns P2(a||b):: C = 1 +9568 ns P1(a&&b):: C = 0 +9568 ns P2(a&&b):: C = 1 +9570 ns P1(a||b):: C = 1 +9570 ns P2(a||b):: C = 0 +9574 ns P1(a&&b):: C = 1 +9574 ns P2(a&&b):: C = 0 +9576 ns P1(a||b):: C = 1 +9576 ns P2(a||b):: C = 0 +9580 ns P1(a&&b):: C = 0 +9580 ns P2(a&&b):: C = 1 +9582 ns P1(a||b):: C = 1 +9582 ns P2(a||b):: C = 0 +9586 ns P1(a&&b):: C = 0 +9586 ns P2(a&&b):: C = 1 +9588 ns P1(a||b):: C = 1 +9588 ns P2(a||b):: C = 0 +9592 ns P1(a&&b):: C = 0 +9592 ns P2(a&&b):: C = 1 +9594 ns P1(a||b):: C = 1 +9594 ns P2(a||b):: C = 0 +9598 ns P1(a&&b):: C = 0 +9598 ns P2(a&&b):: C = 1 +9600 ns P1(a||b):: C = 1 +9600 ns P2(a||b):: C = 0 +9604 ns P1(a&&b):: C = 1 +9604 ns P2(a&&b):: C = 0 +9606 ns P1(a||b):: C = 0 +9606 ns P2(a||b):: C = 1 +9610 ns P1(a&&b):: C = 0 +9610 ns P2(a&&b):: C = 1 +9612 ns P1(a||b):: C = 1 +9612 ns P2(a||b):: C = 0 +9616 ns P1(a&&b):: C = 0 +9616 ns P2(a&&b):: C = 1 +9618 ns P1(a||b):: C = 0 +9618 ns P2(a||b):: C = 1 +9622 ns P1(a&&b):: C = 0 +9622 ns P2(a&&b):: C = 1 +9624 ns P1(a||b):: C = 1 +9624 ns P2(a||b):: C = 0 +9628 ns P1(a&&b):: C = 1 +9628 ns P2(a&&b):: C = 0 +9630 ns P1(a||b):: C = 1 +9630 ns P2(a||b):: C = 0 +9634 ns P1(a&&b):: C = 0 +9634 ns P2(a&&b):: C = 1 +9636 ns P1(a||b):: C = 1 +9636 ns P2(a||b):: C = 0 +9640 ns P1(a&&b):: C = 0 +9640 ns P2(a&&b):: C = 1 +9642 ns P1(a||b):: C = 0 +9642 ns P2(a||b):: C = 1 +9646 ns P1(a&&b):: C = 0 +9646 ns P2(a&&b):: C = 1 +9648 ns P1(a||b):: C = 1 +9648 ns P2(a||b):: C = 0 +9652 ns P1(a&&b):: C = 0 +9652 ns P2(a&&b):: C = 1 +9654 ns P1(a||b):: C = 1 +9654 ns P2(a||b):: C = 0 +9658 ns P1(a&&b):: C = 0 +9658 ns P2(a&&b):: C = 1 +9660 ns P1(a||b):: C = 0 +9660 ns P2(a||b):: C = 1 +9664 ns P1(a&&b):: C = 0 +9664 ns P2(a&&b):: C = 1 +9666 ns P1(a||b):: C = 1 +9666 ns P2(a||b):: C = 0 +9670 ns P1(a&&b):: C = 1 +9670 ns P2(a&&b):: C = 0 +9672 ns P1(a||b):: C = 1 +9672 ns P2(a||b):: C = 0 +9676 ns P1(a&&b):: C = 1 +9676 ns P2(a&&b):: C = 0 +9678 ns P1(a||b):: C = 0 +9678 ns P2(a||b):: C = 1 +9682 ns P1(a&&b):: C = 0 +9682 ns P2(a&&b):: C = 1 +9684 ns P1(a||b):: C = 1 +9684 ns P2(a||b):: C = 0 +9688 ns P1(a&&b):: C = 0 +9688 ns P2(a&&b):: C = 1 +9690 ns P1(a||b):: C = 0 +9690 ns P2(a||b):: C = 1 +9694 ns P1(a&&b):: C = 0 +9694 ns P2(a&&b):: C = 1 +9696 ns P1(a||b):: C = 0 +9696 ns P2(a||b):: C = 1 +9700 ns P1(a&&b):: C = 0 +9700 ns P2(a&&b):: C = 1 +9702 ns P1(a||b):: C = 1 +9702 ns P2(a||b):: C = 0 +9706 ns P1(a&&b):: C = 0 +9706 ns P2(a&&b):: C = 1 +9708 ns P1(a||b):: C = 1 +9708 ns P2(a||b):: C = 0 +9712 ns P1(a&&b):: C = 1 +9712 ns P2(a&&b):: C = 0 +9714 ns P1(a||b):: C = 1 +9714 ns P2(a||b):: C = 0 +9718 ns P1(a&&b):: C = 0 +9718 ns P2(a&&b):: C = 1 +9720 ns P1(a||b):: C = 1 +9720 ns P2(a||b):: C = 0 +9724 ns P1(a&&b):: C = 0 +9724 ns P2(a&&b):: C = 1 +9726 ns P1(a||b):: C = 1 +9726 ns P2(a||b):: C = 0 +9730 ns P1(a&&b):: C = 0 +9730 ns P2(a&&b):: C = 1 +9732 ns P1(a||b):: C = 1 +9732 ns P2(a||b):: C = 0 +9736 ns P1(a&&b):: C = 0 +9736 ns P2(a&&b):: C = 1 +9738 ns P1(a||b):: C = 1 +9738 ns P2(a||b):: C = 0 +9742 ns P1(a&&b):: C = 0 +9742 ns P2(a&&b):: C = 1 +9744 ns P1(a||b):: C = 1 +9744 ns P2(a||b):: C = 0 +9748 ns P1(a&&b):: C = 0 +9748 ns P2(a&&b):: C = 1 +9750 ns P1(a||b):: C = 1 +9750 ns P2(a||b):: C = 0 +9754 ns P1(a&&b):: C = 0 +9754 ns P2(a&&b):: C = 1 +9756 ns P1(a||b):: C = 1 +9756 ns P2(a||b):: C = 0 +9760 ns P1(a&&b):: C = 0 +9760 ns P2(a&&b):: C = 1 +9762 ns P1(a||b):: C = 1 +9762 ns P2(a||b):: C = 0 +9766 ns P1(a&&b):: C = 0 +9766 ns P2(a&&b):: C = 1 +9768 ns P1(a||b):: C = 1 +9768 ns P2(a||b):: C = 0 +9772 ns P1(a&&b):: C = 0 +9772 ns P2(a&&b):: C = 1 +9774 ns P1(a||b):: C = 1 +9774 ns P2(a||b):: C = 0 +9778 ns P1(a&&b):: C = 1 +9778 ns P2(a&&b):: C = 0 +9780 ns P1(a||b):: C = 1 +9780 ns P2(a||b):: C = 0 +9784 ns P1(a&&b):: C = 0 +9784 ns P2(a&&b):: C = 1 +9786 ns P1(a||b):: C = 1 +9786 ns P2(a||b):: C = 0 +9790 ns P1(a&&b):: C = 0 +9790 ns P2(a&&b):: C = 1 +9792 ns P1(a||b):: C = 1 +9792 ns P2(a||b):: C = 0 +9796 ns P1(a&&b):: C = 0 +9796 ns P2(a&&b):: C = 1 +9798 ns P1(a||b):: C = 0 +9798 ns P2(a||b):: C = 1 +9802 ns P1(a&&b):: C = 0 +9802 ns P2(a&&b):: C = 1 +9804 ns P1(a||b):: C = 1 +9804 ns P2(a||b):: C = 0 +9808 ns P1(a&&b):: C = 0 +9808 ns P2(a&&b):: C = 1 +9810 ns P1(a||b):: C = 1 +9810 ns P2(a||b):: C = 0 +9814 ns P1(a&&b):: C = 0 +9814 ns P2(a&&b):: C = 1 +9816 ns P1(a||b):: C = 1 +9816 ns P2(a||b):: C = 0 +9820 ns P1(a&&b):: C = 0 +9820 ns P2(a&&b):: C = 1 +9822 ns P1(a||b):: C = 1 +9822 ns P2(a||b):: C = 0 +9826 ns P1(a&&b):: C = 0 +9826 ns P2(a&&b):: C = 1 +9828 ns P1(a||b):: C = 1 +9828 ns P2(a||b):: C = 0 +9832 ns P1(a&&b):: C = 0 +9832 ns P2(a&&b):: C = 1 +9834 ns P1(a||b):: C = 1 +9834 ns P2(a||b):: C = 0 +9838 ns P1(a&&b):: C = 0 +9838 ns P2(a&&b):: C = 1 +9840 ns P1(a||b):: C = 1 +9840 ns P2(a||b):: C = 0 +9844 ns P1(a&&b):: C = 0 +9844 ns P2(a&&b):: C = 1 +9846 ns P1(a||b):: C = 1 +9846 ns P2(a||b):: C = 0 +9850 ns P1(a&&b):: C = 0 +9850 ns P2(a&&b):: C = 1 +9852 ns P1(a||b):: C = 1 +9852 ns P2(a||b):: C = 0 +9856 ns P1(a&&b):: C = 0 +9856 ns P2(a&&b):: C = 1 +9858 ns P1(a||b):: C = 1 +9858 ns P2(a||b):: C = 0 +9862 ns P1(a&&b):: C = 0 +9862 ns P2(a&&b):: C = 1 +9864 ns P1(a||b):: C = 1 +9864 ns P2(a||b):: C = 0 +9868 ns P1(a&&b):: C = 0 +9868 ns P2(a&&b):: C = 1 +9870 ns P1(a||b):: C = 0 +9870 ns P2(a||b):: C = 1 +9874 ns P1(a&&b):: C = 1 +9874 ns P2(a&&b):: C = 0 +9876 ns P1(a||b):: C = 0 +9876 ns P2(a||b):: C = 1 +9880 ns P1(a&&b):: C = 0 +9880 ns P2(a&&b):: C = 1 +9882 ns P1(a||b):: C = 1 +9882 ns P2(a||b):: C = 0 +9886 ns P1(a&&b):: C = 0 +9886 ns P2(a&&b):: C = 1 +9888 ns P1(a||b):: C = 1 +9888 ns P2(a||b):: C = 0 +9892 ns P1(a&&b):: C = 0 +9892 ns P2(a&&b):: C = 1 +9894 ns P1(a||b):: C = 1 +9894 ns P2(a||b):: C = 0 +9898 ns P1(a&&b):: C = 0 +9898 ns P2(a&&b):: C = 1 +9900 ns P1(a||b):: C = 1 +9900 ns P2(a||b):: C = 0 +9904 ns P1(a&&b):: C = 0 +9904 ns P2(a&&b):: C = 1 +9906 ns P1(a||b):: C = 0 +9906 ns P2(a||b):: C = 1 +9910 ns P1(a&&b):: C = 0 +9910 ns P2(a&&b):: C = 1 +9912 ns P1(a||b):: C = 1 +9912 ns P2(a||b):: C = 0 +9916 ns P1(a&&b):: C = 0 +9916 ns P2(a&&b):: C = 1 +9918 ns P1(a||b):: C = 0 +9918 ns P2(a||b):: C = 1 +9922 ns P1(a&&b):: C = 0 +9922 ns P2(a&&b):: C = 1 +9924 ns P1(a||b):: C = 1 +9924 ns P2(a||b):: C = 0 +9928 ns P1(a&&b):: C = 0 +9928 ns P2(a&&b):: C = 1 +9930 ns P1(a||b):: C = 1 +9930 ns P2(a||b):: C = 0 +9934 ns P1(a&&b):: C = 0 +9934 ns P2(a&&b):: C = 1 +9936 ns P1(a||b):: C = 1 +9936 ns P2(a||b):: C = 0 +9940 ns P1(a&&b):: C = 0 +9940 ns P2(a&&b):: C = 1 +9942 ns P1(a||b):: C = 1 +9942 ns P2(a||b):: C = 0 +9946 ns P1(a&&b):: C = 1 +9946 ns P2(a&&b):: C = 0 +9948 ns P1(a||b):: C = 1 +9948 ns P2(a||b):: C = 0 +9952 ns P1(a&&b):: C = 0 +9952 ns P2(a&&b):: C = 1 +9954 ns P1(a||b):: C = 1 +9954 ns P2(a||b):: C = 0 +9958 ns P1(a&&b):: C = 0 +9958 ns P2(a&&b):: C = 1 +9960 ns P1(a||b):: C = 1 +9960 ns P2(a||b):: C = 0 +9964 ns P1(a&&b):: C = 1 +9964 ns P2(a&&b):: C = 0 +9966 ns P1(a||b):: C = 1 +9966 ns P2(a||b):: C = 0 +9970 ns P1(a&&b):: C = 0 +9970 ns P2(a&&b):: C = 1 +9972 ns P1(a||b):: C = 1 +9972 ns P2(a||b):: C = 0 +9976 ns P1(a&&b):: C = 0 +9976 ns P2(a&&b):: C = 1 +9978 ns P1(a||b):: C = 1 +9978 ns P2(a||b):: C = 0 +9982 ns P1(a&&b):: C = 1 +9982 ns P2(a&&b):: C = 0 +9984 ns P1(a||b):: C = 1 +9984 ns P2(a||b):: C = 0 +9988 ns P1(a&&b):: C = 1 +9988 ns P2(a&&b):: C = 0 +9990 ns P1(a||b):: C = 1 +9990 ns P2(a||b):: C = 0 +9994 ns P1(a&&b):: C = 0 +9994 ns P2(a&&b):: C = 1 +9996 ns P1(a||b):: C = 1 +9996 ns P2(a||b):: C = 0 +10 us P1(a&&b):: C = 1 +10 us P2(a&&b):: C = 0 +10002 ns P1(a||b):: C = 1 +10002 ns P2(a||b):: C = 0 +10006 ns P1(a&&b):: C = 0 +10006 ns P2(a&&b):: C = 1 +10008 ns P1(a||b):: C = 1 +10008 ns P2(a||b):: C = 0 +10012 ns P1(a&&b):: C = 0 +10012 ns P2(a&&b):: C = 1 +10014 ns P1(a||b):: C = 0 +10014 ns P2(a||b):: C = 1 +10018 ns P1(a&&b):: C = 0 +10018 ns P2(a&&b):: C = 1 +10020 ns P1(a||b):: C = 1 +10020 ns P2(a||b):: C = 0 +10024 ns P1(a&&b):: C = 1 +10024 ns P2(a&&b):: C = 0 +10026 ns P1(a||b):: C = 1 +10026 ns P2(a||b):: C = 0 +10030 ns P1(a&&b):: C = 0 +10030 ns P2(a&&b):: C = 1 +10032 ns P1(a||b):: C = 0 +10032 ns P2(a||b):: C = 1 +10036 ns P1(a&&b):: C = 1 +10036 ns P2(a&&b):: C = 0 +10038 ns P1(a||b):: C = 0 +10038 ns P2(a||b):: C = 1 +10042 ns P1(a&&b):: C = 1 +10042 ns P2(a&&b):: C = 0 +10044 ns P1(a||b):: C = 1 +10044 ns P2(a||b):: C = 0 +10048 ns P1(a&&b):: C = 0 +10048 ns P2(a&&b):: C = 1 +10050 ns P1(a||b):: C = 0 +10050 ns P2(a||b):: C = 1 +10054 ns P1(a&&b):: C = 1 +10054 ns P2(a&&b):: C = 0 +10056 ns P1(a||b):: C = 0 +10056 ns P2(a||b):: C = 1 +10060 ns P1(a&&b):: C = 0 +10060 ns P2(a&&b):: C = 1 +10062 ns P1(a||b):: C = 1 +10062 ns P2(a||b):: C = 0 +10066 ns P1(a&&b):: C = 0 +10066 ns P2(a&&b):: C = 1 +10068 ns P1(a||b):: C = 0 +10068 ns P2(a||b):: C = 1 +10072 ns P1(a&&b):: C = 0 +10072 ns P2(a&&b):: C = 1 +10074 ns P1(a||b):: C = 0 +10074 ns P2(a||b):: C = 1 +10078 ns P1(a&&b):: C = 0 +10078 ns P2(a&&b):: C = 1 +10080 ns P1(a||b):: C = 1 +10080 ns P2(a||b):: C = 0 +10084 ns P1(a&&b):: C = 0 +10084 ns P2(a&&b):: C = 1 +10086 ns P1(a||b):: C = 1 +10086 ns P2(a||b):: C = 0 +10090 ns P1(a&&b):: C = 0 +10090 ns P2(a&&b):: C = 1 +10092 ns P1(a||b):: C = 1 +10092 ns P2(a||b):: C = 0 +10096 ns P1(a&&b):: C = 0 +10096 ns P2(a&&b):: C = 1 +10098 ns P1(a||b):: C = 0 +10098 ns P2(a||b):: C = 1 +10102 ns P1(a&&b):: C = 0 +10102 ns P2(a&&b):: C = 1 +10104 ns P1(a||b):: C = 1 +10104 ns P2(a||b):: C = 0 +10108 ns P1(a&&b):: C = 0 +10108 ns P2(a&&b):: C = 1 +10110 ns P1(a||b):: C = 1 +10110 ns P2(a||b):: C = 0 +10114 ns P1(a&&b):: C = 0 +10114 ns P2(a&&b):: C = 1 +10116 ns P1(a||b):: C = 0 +10116 ns P2(a||b):: C = 1 +10120 ns P1(a&&b):: C = 0 +10120 ns P2(a&&b):: C = 1 +10122 ns P1(a||b):: C = 1 +10122 ns P2(a||b):: C = 0 +10126 ns P1(a&&b):: C = 0 +10126 ns P2(a&&b):: C = 1 +10128 ns P1(a||b):: C = 1 +10128 ns P2(a||b):: C = 0 +10132 ns P1(a&&b):: C = 0 +10132 ns P2(a&&b):: C = 1 +10134 ns P1(a||b):: C = 0 +10134 ns P2(a||b):: C = 1 +10138 ns P1(a&&b):: C = 0 +10138 ns P2(a&&b):: C = 1 +10140 ns P1(a||b):: C = 1 +10140 ns P2(a||b):: C = 0 +10144 ns P1(a&&b):: C = 0 +10144 ns P2(a&&b):: C = 1 +10146 ns P1(a||b):: C = 0 +10146 ns P2(a||b):: C = 1 +10150 ns P1(a&&b):: C = 0 +10150 ns P2(a&&b):: C = 1 +10152 ns P1(a||b):: C = 1 +10152 ns P2(a||b):: C = 0 +10156 ns P1(a&&b):: C = 0 +10156 ns P2(a&&b):: C = 1 +10158 ns P1(a||b):: C = 1 +10158 ns P2(a||b):: C = 0 +10162 ns P1(a&&b):: C = 0 +10162 ns P2(a&&b):: C = 1 +10164 ns P1(a||b):: C = 1 +10164 ns P2(a||b):: C = 0 +10168 ns P1(a&&b):: C = 0 +10168 ns P2(a&&b):: C = 1 +10170 ns P1(a||b):: C = 1 +10170 ns P2(a||b):: C = 0 +10174 ns P1(a&&b):: C = 1 +10174 ns P2(a&&b):: C = 0 +10176 ns P1(a||b):: C = 1 +10176 ns P2(a||b):: C = 0 +10180 ns P1(a&&b):: C = 0 +10180 ns P2(a&&b):: C = 1 +10182 ns P1(a||b):: C = 1 +10182 ns P2(a||b):: C = 0 +10186 ns P1(a&&b):: C = 1 +10186 ns P2(a&&b):: C = 0 +10188 ns P1(a||b):: C = 1 +10188 ns P2(a||b):: C = 0 +10192 ns P1(a&&b):: C = 1 +10192 ns P2(a&&b):: C = 0 +10194 ns P1(a||b):: C = 1 +10194 ns P2(a||b):: C = 0 +10198 ns P1(a&&b):: C = 0 +10198 ns P2(a&&b):: C = 1 +10200 ns P1(a||b):: C = 1 +10200 ns P2(a||b):: C = 0 +10204 ns P1(a&&b):: C = 0 +10204 ns P2(a&&b):: C = 1 +10206 ns P1(a||b):: C = 0 +10206 ns P2(a||b):: C = 1 +10210 ns P1(a&&b):: C = 0 +10210 ns P2(a&&b):: C = 1 +10212 ns P1(a||b):: C = 1 +10212 ns P2(a||b):: C = 0 +10216 ns P1(a&&b):: C = 0 +10216 ns P2(a&&b):: C = 1 +10218 ns P1(a||b):: C = 0 +10218 ns P2(a||b):: C = 1 +10222 ns P1(a&&b):: C = 0 +10222 ns P2(a&&b):: C = 1 +10224 ns P1(a||b):: C = 1 +10224 ns P2(a||b):: C = 0 +10228 ns P1(a&&b):: C = 0 +10228 ns P2(a&&b):: C = 1 +10230 ns P1(a||b):: C = 0 +10230 ns P2(a||b):: C = 1 +10234 ns P1(a&&b):: C = 0 +10234 ns P2(a&&b):: C = 1 +10236 ns P1(a||b):: C = 1 +10236 ns P2(a||b):: C = 0 +10240 ns P1(a&&b):: C = 0 +10240 ns P2(a&&b):: C = 1 +10242 ns P1(a||b):: C = 0 +10242 ns P2(a||b):: C = 1 +10246 ns P1(a&&b):: C = 1 +10246 ns P2(a&&b):: C = 0 +10248 ns P1(a||b):: C = 1 +10248 ns P2(a||b):: C = 0 +10252 ns P1(a&&b):: C = 0 +10252 ns P2(a&&b):: C = 1 +10254 ns P1(a||b):: C = 0 +10254 ns P2(a||b):: C = 1 +10258 ns P1(a&&b):: C = 1 +10258 ns P2(a&&b):: C = 0 +10260 ns P1(a||b):: C = 0 +10260 ns P2(a||b):: C = 1 +10264 ns P1(a&&b):: C = 0 +10264 ns P2(a&&b):: C = 1 +10266 ns P1(a||b):: C = 1 +10266 ns P2(a||b):: C = 0 +10270 ns P1(a&&b):: C = 1 +10270 ns P2(a&&b):: C = 0 +10272 ns P1(a||b):: C = 1 +10272 ns P2(a||b):: C = 0 +10276 ns P1(a&&b):: C = 0 +10276 ns P2(a&&b):: C = 1 +10278 ns P1(a||b):: C = 1 +10278 ns P2(a||b):: C = 0 +10282 ns P1(a&&b):: C = 0 +10282 ns P2(a&&b):: C = 1 +10284 ns P1(a||b):: C = 1 +10284 ns P2(a||b):: C = 0 +10288 ns P1(a&&b):: C = 0 +10288 ns P2(a&&b):: C = 1 +10290 ns P1(a||b):: C = 0 +10290 ns P2(a||b):: C = 1 +10294 ns P1(a&&b):: C = 0 +10294 ns P2(a&&b):: C = 1 +10296 ns P1(a||b):: C = 1 +10296 ns P2(a||b):: C = 0 +10300 ns P1(a&&b):: C = 0 +10300 ns P2(a&&b):: C = 1 +10302 ns P1(a||b):: C = 1 +10302 ns P2(a||b):: C = 0 +10306 ns P1(a&&b):: C = 0 +10306 ns P2(a&&b):: C = 1 +10308 ns P1(a||b):: C = 1 +10308 ns P2(a||b):: C = 0 +10312 ns P1(a&&b):: C = 0 +10312 ns P2(a&&b):: C = 1 +10314 ns P1(a||b):: C = 1 +10314 ns P2(a||b):: C = 0 +10318 ns P1(a&&b):: C = 0 +10318 ns P2(a&&b):: C = 1 +10320 ns P1(a||b):: C = 1 +10320 ns P2(a||b):: C = 0 +10324 ns P1(a&&b):: C = 0 +10324 ns P2(a&&b):: C = 1 +10326 ns P1(a||b):: C = 1 +10326 ns P2(a||b):: C = 0 +10330 ns P1(a&&b):: C = 1 +10330 ns P2(a&&b):: C = 0 +10332 ns P1(a||b):: C = 1 +10332 ns P2(a||b):: C = 0 +10336 ns P1(a&&b):: C = 1 +10336 ns P2(a&&b):: C = 0 +10338 ns P1(a||b):: C = 1 +10338 ns P2(a||b):: C = 0 +10342 ns P1(a&&b):: C = 1 +10342 ns P2(a&&b):: C = 0 +10344 ns P1(a||b):: C = 1 +10344 ns P2(a||b):: C = 0 +10348 ns P1(a&&b):: C = 0 +10348 ns P2(a&&b):: C = 1 +10350 ns P1(a||b):: C = 1 +10350 ns P2(a||b):: C = 0 +10354 ns P1(a&&b):: C = 0 +10354 ns P2(a&&b):: C = 1 +10356 ns P1(a||b):: C = 1 +10356 ns P2(a||b):: C = 0 +10360 ns P1(a&&b):: C = 0 +10360 ns P2(a&&b):: C = 1 +10362 ns P1(a||b):: C = 1 +10362 ns P2(a||b):: C = 0 +10366 ns P1(a&&b):: C = 0 +10366 ns P2(a&&b):: C = 1 +10368 ns P1(a||b):: C = 1 +10368 ns P2(a||b):: C = 0 +10372 ns P1(a&&b):: C = 0 +10372 ns P2(a&&b):: C = 1 +10374 ns P1(a||b):: C = 1 +10374 ns P2(a||b):: C = 0 +10378 ns P1(a&&b):: C = 0 +10378 ns P2(a&&b):: C = 1 +10380 ns P1(a||b):: C = 1 +10380 ns P2(a||b):: C = 0 +10384 ns P1(a&&b):: C = 1 +10384 ns P2(a&&b):: C = 0 +10386 ns P1(a||b):: C = 1 +10386 ns P2(a||b):: C = 0 +10390 ns P1(a&&b):: C = 0 +10390 ns P2(a&&b):: C = 1 +10392 ns P1(a||b):: C = 1 +10392 ns P2(a||b):: C = 0 +10396 ns P1(a&&b):: C = 1 +10396 ns P2(a&&b):: C = 0 +10398 ns P1(a||b):: C = 1 +10398 ns P2(a||b):: C = 0 +10402 ns P1(a&&b):: C = 0 +10402 ns P2(a&&b):: C = 1 +10404 ns P1(a||b):: C = 1 +10404 ns P2(a||b):: C = 0 +10408 ns P1(a&&b):: C = 0 +10408 ns P2(a&&b):: C = 1 +10410 ns P1(a||b):: C = 1 +10410 ns P2(a||b):: C = 0 +10414 ns P1(a&&b):: C = 0 +10414 ns P2(a&&b):: C = 1 +10416 ns P1(a||b):: C = 1 +10416 ns P2(a||b):: C = 0 +10420 ns P1(a&&b):: C = 0 +10420 ns P2(a&&b):: C = 1 +10422 ns P1(a||b):: C = 1 +10422 ns P2(a||b):: C = 0 +10426 ns P1(a&&b):: C = 1 +10426 ns P2(a&&b):: C = 0 +10428 ns P1(a||b):: C = 1 +10428 ns P2(a||b):: C = 0 +10432 ns P1(a&&b):: C = 1 +10432 ns P2(a&&b):: C = 0 +10434 ns P1(a||b):: C = 1 +10434 ns P2(a||b):: C = 0 +10438 ns P1(a&&b):: C = 0 +10438 ns P2(a&&b):: C = 1 +10440 ns P1(a||b):: C = 1 +10440 ns P2(a||b):: C = 0 +10444 ns P1(a&&b):: C = 0 +10444 ns P2(a&&b):: C = 1 +10446 ns P1(a||b):: C = 1 +10446 ns P2(a||b):: C = 0 +10450 ns P1(a&&b):: C = 0 +10450 ns P2(a&&b):: C = 1 +10452 ns P1(a||b):: C = 1 +10452 ns P2(a||b):: C = 0 +10456 ns P1(a&&b):: C = 0 +10456 ns P2(a&&b):: C = 1 +10458 ns P1(a||b):: C = 1 +10458 ns P2(a||b):: C = 0 +10462 ns P1(a&&b):: C = 0 +10462 ns P2(a&&b):: C = 1 +10464 ns P1(a||b):: C = 1 +10464 ns P2(a||b):: C = 0 +10468 ns P1(a&&b):: C = 1 +10468 ns P2(a&&b):: C = 0 +10470 ns P1(a||b):: C = 1 +10470 ns P2(a||b):: C = 0 +10474 ns P1(a&&b):: C = 0 +10474 ns P2(a&&b):: C = 1 +10476 ns P1(a||b):: C = 1 +10476 ns P2(a||b):: C = 0 +10480 ns P1(a&&b):: C = 0 +10480 ns P2(a&&b):: C = 1 +10482 ns P1(a||b):: C = 1 +10482 ns P2(a||b):: C = 0 +10486 ns P1(a&&b):: C = 0 +10486 ns P2(a&&b):: C = 1 +10488 ns P1(a||b):: C = 1 +10488 ns P2(a||b):: C = 0 +10492 ns P1(a&&b):: C = 1 +10492 ns P2(a&&b):: C = 0 +10494 ns P1(a||b):: C = 1 +10494 ns P2(a||b):: C = 0 +10498 ns P1(a&&b):: C = 0 +10498 ns P2(a&&b):: C = 1 +10500 ns P1(a||b):: C = 1 +10500 ns P2(a||b):: C = 0 +10504 ns P1(a&&b):: C = 0 +10504 ns P2(a&&b):: C = 1 +10506 ns P1(a||b):: C = 0 +10506 ns P2(a||b):: C = 1 +10510 ns P1(a&&b):: C = 0 +10510 ns P2(a&&b):: C = 1 +10512 ns P1(a||b):: C = 1 +10512 ns P2(a||b):: C = 0 +10516 ns P1(a&&b):: C = 1 +10516 ns P2(a&&b):: C = 0 +10518 ns P1(a||b):: C = 1 +10518 ns P2(a||b):: C = 0 +10522 ns P1(a&&b):: C = 0 +10522 ns P2(a&&b):: C = 1 +10524 ns P1(a||b):: C = 1 +10524 ns P2(a||b):: C = 0 +10528 ns P1(a&&b):: C = 1 +10528 ns P2(a&&b):: C = 0 +10530 ns P1(a||b):: C = 0 +10530 ns P2(a||b):: C = 1 +10534 ns P1(a&&b):: C = 0 +10534 ns P2(a&&b):: C = 1 +10536 ns P1(a||b):: C = 1 +10536 ns P2(a||b):: C = 0 +10540 ns P1(a&&b):: C = 0 +10540 ns P2(a&&b):: C = 1 +10542 ns P1(a||b):: C = 0 +10542 ns P2(a||b):: C = 1 +10546 ns P1(a&&b):: C = 1 +10546 ns P2(a&&b):: C = 0 +10548 ns P1(a||b):: C = 1 +10548 ns P2(a||b):: C = 0 +10552 ns P1(a&&b):: C = 0 +10552 ns P2(a&&b):: C = 1 +10554 ns P1(a||b):: C = 0 +10554 ns P2(a||b):: C = 1 +10558 ns P1(a&&b):: C = 0 +10558 ns P2(a&&b):: C = 1 +10560 ns P1(a||b):: C = 0 +10560 ns P2(a||b):: C = 1 +10564 ns P1(a&&b):: C = 1 +10564 ns P2(a&&b):: C = 0 +10566 ns P1(a||b):: C = 0 +10566 ns P2(a||b):: C = 1 +10570 ns P1(a&&b):: C = 0 +10570 ns P2(a&&b):: C = 1 +10572 ns P1(a||b):: C = 1 +10572 ns P2(a||b):: C = 0 +10576 ns P1(a&&b):: C = 1 +10576 ns P2(a&&b):: C = 0 +10578 ns P1(a||b):: C = 1 +10578 ns P2(a||b):: C = 0 +10582 ns P1(a&&b):: C = 0 +10582 ns P2(a&&b):: C = 1 +10584 ns P1(a||b):: C = 0 +10584 ns P2(a||b):: C = 1 +10588 ns P1(a&&b):: C = 0 +10588 ns P2(a&&b):: C = 1 +10590 ns P1(a||b):: C = 1 +10590 ns P2(a||b):: C = 0 +10594 ns P1(a&&b):: C = 1 +10594 ns P2(a&&b):: C = 0 +10596 ns P1(a||b):: C = 0 +10596 ns P2(a||b):: C = 1 +10600 ns P1(a&&b):: C = 1 +10600 ns P2(a&&b):: C = 0 +10602 ns P1(a||b):: C = 1 +10602 ns P2(a||b):: C = 0 +10606 ns P1(a&&b):: C = 1 +10606 ns P2(a&&b):: C = 0 +10608 ns P1(a||b):: C = 1 +10608 ns P2(a||b):: C = 0 +10612 ns P1(a&&b):: C = 0 +10612 ns P2(a&&b):: C = 1 +10614 ns P1(a||b):: C = 1 +10614 ns P2(a||b):: C = 0 +10618 ns P1(a&&b):: C = 0 +10618 ns P2(a&&b):: C = 1 +10620 ns P1(a||b):: C = 1 +10620 ns P2(a||b):: C = 0 +10624 ns P1(a&&b):: C = 0 +10624 ns P2(a&&b):: C = 1 +10626 ns P1(a||b):: C = 0 +10626 ns P2(a||b):: C = 1 +10630 ns P1(a&&b):: C = 1 +10630 ns P2(a&&b):: C = 0 +10632 ns P1(a||b):: C = 1 +10632 ns P2(a||b):: C = 0 +10636 ns P1(a&&b):: C = 0 +10636 ns P2(a&&b):: C = 1 +10638 ns P1(a||b):: C = 1 +10638 ns P2(a||b):: C = 0 +10642 ns P1(a&&b):: C = 0 +10642 ns P2(a&&b):: C = 1 +10644 ns P1(a||b):: C = 1 +10644 ns P2(a||b):: C = 0 +10648 ns P1(a&&b):: C = 1 +10648 ns P2(a&&b):: C = 0 +10650 ns P1(a||b):: C = 1 +10650 ns P2(a||b):: C = 0 +10654 ns P1(a&&b):: C = 1 +10654 ns P2(a&&b):: C = 0 +10656 ns P1(a||b):: C = 1 +10656 ns P2(a||b):: C = 0 +10660 ns P1(a&&b):: C = 1 +10660 ns P2(a&&b):: C = 0 +10662 ns P1(a||b):: C = 0 +10662 ns P2(a||b):: C = 1 +10666 ns P1(a&&b):: C = 0 +10666 ns P2(a&&b):: C = 1 +10668 ns P1(a||b):: C = 1 +10668 ns P2(a||b):: C = 0 +10672 ns P1(a&&b):: C = 0 +10672 ns P2(a&&b):: C = 1 +10674 ns P1(a||b):: C = 1 +10674 ns P2(a||b):: C = 0 +10678 ns P1(a&&b):: C = 0 +10678 ns P2(a&&b):: C = 1 +10680 ns P1(a||b):: C = 0 +10680 ns P2(a||b):: C = 1 +10684 ns P1(a&&b):: C = 0 +10684 ns P2(a&&b):: C = 1 +10686 ns P1(a||b):: C = 0 +10686 ns P2(a||b):: C = 1 +10690 ns P1(a&&b):: C = 0 +10690 ns P2(a&&b):: C = 1 +10692 ns P1(a||b):: C = 1 +10692 ns P2(a||b):: C = 0 +10696 ns P1(a&&b):: C = 0 +10696 ns P2(a&&b):: C = 1 +10698 ns P1(a||b):: C = 1 +10698 ns P2(a||b):: C = 0 +10702 ns P1(a&&b):: C = 0 +10702 ns P2(a&&b):: C = 1 +10704 ns P1(a||b):: C = 0 +10704 ns P2(a||b):: C = 1 +10708 ns P1(a&&b):: C = 0 +10708 ns P2(a&&b):: C = 1 +10710 ns P1(a||b):: C = 1 +10710 ns P2(a||b):: C = 0 +10714 ns P1(a&&b):: C = 0 +10714 ns P2(a&&b):: C = 1 +10716 ns P1(a||b):: C = 1 +10716 ns P2(a||b):: C = 0 +10720 ns P1(a&&b):: C = 1 +10720 ns P2(a&&b):: C = 0 +10722 ns P1(a||b):: C = 0 +10722 ns P2(a||b):: C = 1 +10726 ns P1(a&&b):: C = 0 +10726 ns P2(a&&b):: C = 1 +10728 ns P1(a||b):: C = 1 +10728 ns P2(a||b):: C = 0 +10732 ns P1(a&&b):: C = 1 +10732 ns P2(a&&b):: C = 0 +10734 ns P1(a||b):: C = 1 +10734 ns P2(a||b):: C = 0 +10738 ns P1(a&&b):: C = 0 +10738 ns P2(a&&b):: C = 1 +10740 ns P1(a||b):: C = 1 +10740 ns P2(a||b):: C = 0 +10744 ns P1(a&&b):: C = 0 +10744 ns P2(a&&b):: C = 1 +10746 ns P1(a||b):: C = 0 +10746 ns P2(a||b):: C = 1 +10750 ns P1(a&&b):: C = 0 +10750 ns P2(a&&b):: C = 1 +10752 ns P1(a||b):: C = 1 +10752 ns P2(a||b):: C = 0 +10756 ns P1(a&&b):: C = 1 +10756 ns P2(a&&b):: C = 0 +10758 ns P1(a||b):: C = 1 +10758 ns P2(a||b):: C = 0 +10762 ns P1(a&&b):: C = 1 +10762 ns P2(a&&b):: C = 0 +10764 ns P1(a||b):: C = 0 +10764 ns P2(a||b):: C = 1 +10768 ns P1(a&&b):: C = 0 +10768 ns P2(a&&b):: C = 1 +10770 ns P1(a||b):: C = 1 +10770 ns P2(a||b):: C = 0 +10774 ns P1(a&&b):: C = 0 +10774 ns P2(a&&b):: C = 1 +10776 ns P1(a||b):: C = 0 +10776 ns P2(a||b):: C = 1 +10780 ns P1(a&&b):: C = 0 +10780 ns P2(a&&b):: C = 1 +10782 ns P1(a||b):: C = 1 +10782 ns P2(a||b):: C = 0 +10786 ns P1(a&&b):: C = 0 +10786 ns P2(a&&b):: C = 1 +10788 ns P1(a||b):: C = 1 +10788 ns P2(a||b):: C = 0 +10792 ns P1(a&&b):: C = 0 +10792 ns P2(a&&b):: C = 1 +10794 ns P1(a||b):: C = 1 +10794 ns P2(a||b):: C = 0 +10798 ns P1(a&&b):: C = 0 +10798 ns P2(a&&b):: C = 1 +10800 ns P1(a||b):: C = 1 +10800 ns P2(a||b):: C = 0 +10804 ns P1(a&&b):: C = 0 +10804 ns P2(a&&b):: C = 1 +10806 ns P1(a||b):: C = 1 +10806 ns P2(a||b):: C = 0 +10810 ns P1(a&&b):: C = 1 +10810 ns P2(a&&b):: C = 0 +10812 ns P1(a||b):: C = 1 +10812 ns P2(a||b):: C = 0 +10816 ns P1(a&&b):: C = 0 +10816 ns P2(a&&b):: C = 1 +10818 ns P1(a||b):: C = 1 +10818 ns P2(a||b):: C = 0 +10822 ns P1(a&&b):: C = 0 +10822 ns P2(a&&b):: C = 1 +10824 ns P1(a||b):: C = 1 +10824 ns P2(a||b):: C = 0 +10828 ns P1(a&&b):: C = 1 +10828 ns P2(a&&b):: C = 0 +10830 ns P1(a||b):: C = 0 +10830 ns P2(a||b):: C = 1 +10834 ns P1(a&&b):: C = 1 +10834 ns P2(a&&b):: C = 0 +10836 ns P1(a||b):: C = 1 +10836 ns P2(a||b):: C = 0 +10840 ns P1(a&&b):: C = 0 +10840 ns P2(a&&b):: C = 1 +10842 ns P1(a||b):: C = 1 +10842 ns P2(a||b):: C = 0 +10846 ns P1(a&&b):: C = 0 +10846 ns P2(a&&b):: C = 1 +10848 ns P1(a||b):: C = 1 +10848 ns P2(a||b):: C = 0 +10852 ns P1(a&&b):: C = 0 +10852 ns P2(a&&b):: C = 1 +10854 ns P1(a||b):: C = 1 +10854 ns P2(a||b):: C = 0 +10858 ns P1(a&&b):: C = 1 +10858 ns P2(a&&b):: C = 0 +10860 ns P1(a||b):: C = 1 +10860 ns P2(a||b):: C = 0 +10864 ns P1(a&&b):: C = 1 +10864 ns P2(a&&b):: C = 0 +10866 ns P1(a||b):: C = 1 +10866 ns P2(a||b):: C = 0 +10870 ns P1(a&&b):: C = 0 +10870 ns P2(a&&b):: C = 1 +10872 ns P1(a||b):: C = 1 +10872 ns P2(a||b):: C = 0 +10876 ns P1(a&&b):: C = 0 +10876 ns P2(a&&b):: C = 1 +10878 ns P1(a||b):: C = 1 +10878 ns P2(a||b):: C = 0 +10882 ns P1(a&&b):: C = 1 +10882 ns P2(a&&b):: C = 0 +10884 ns P1(a||b):: C = 1 +10884 ns P2(a||b):: C = 0 +10888 ns P1(a&&b):: C = 0 +10888 ns P2(a&&b):: C = 1 +10890 ns P1(a||b):: C = 1 +10890 ns P2(a||b):: C = 0 +10894 ns P1(a&&b):: C = 0 +10894 ns P2(a&&b):: C = 1 +10896 ns P1(a||b):: C = 1 +10896 ns P2(a||b):: C = 0 +10900 ns P1(a&&b):: C = 1 +10900 ns P2(a&&b):: C = 0 +10902 ns P1(a||b):: C = 1 +10902 ns P2(a||b):: C = 0 +10906 ns P1(a&&b):: C = 1 +10906 ns P2(a&&b):: C = 0 +10908 ns P1(a||b):: C = 1 +10908 ns P2(a||b):: C = 0 +10912 ns P1(a&&b):: C = 0 +10912 ns P2(a&&b):: C = 1 +10914 ns P1(a||b):: C = 1 +10914 ns P2(a||b):: C = 0 +10918 ns P1(a&&b):: C = 1 +10918 ns P2(a&&b):: C = 0 +10920 ns P1(a||b):: C = 1 +10920 ns P2(a||b):: C = 0 +10924 ns P1(a&&b):: C = 0 +10924 ns P2(a&&b):: C = 1 +10926 ns P1(a||b):: C = 1 +10926 ns P2(a||b):: C = 0 +10930 ns P1(a&&b):: C = 1 +10930 ns P2(a&&b):: C = 0 +10932 ns P1(a||b):: C = 1 +10932 ns P2(a||b):: C = 0 +10936 ns P1(a&&b):: C = 0 +10936 ns P2(a&&b):: C = 1 +10938 ns P1(a||b):: C = 1 +10938 ns P2(a||b):: C = 0 +10942 ns P1(a&&b):: C = 0 +10942 ns P2(a&&b):: C = 1 +10944 ns P1(a||b):: C = 1 +10944 ns P2(a||b):: C = 0 +10948 ns P1(a&&b):: C = 1 +10948 ns P2(a&&b):: C = 0 +10950 ns P1(a||b):: C = 1 +10950 ns P2(a||b):: C = 0 +10954 ns P1(a&&b):: C = 0 +10954 ns P2(a&&b):: C = 1 +10956 ns P1(a||b):: C = 1 +10956 ns P2(a||b):: C = 0 +10960 ns P1(a&&b):: C = 0 +10960 ns P2(a&&b):: C = 1 +10962 ns P1(a||b):: C = 1 +10962 ns P2(a||b):: C = 0 +10966 ns P1(a&&b):: C = 0 +10966 ns P2(a&&b):: C = 1 +10968 ns P1(a||b):: C = 1 +10968 ns P2(a||b):: C = 0 +10972 ns P1(a&&b):: C = 1 +10972 ns P2(a&&b):: C = 0 +10974 ns P1(a||b):: C = 1 +10974 ns P2(a||b):: C = 0 +10978 ns P1(a&&b):: C = 1 +10978 ns P2(a&&b):: C = 0 +10980 ns P1(a||b):: C = 1 +10980 ns P2(a||b):: C = 0 +10984 ns P1(a&&b):: C = 0 +10984 ns P2(a&&b):: C = 1 +10986 ns P1(a||b):: C = 1 +10986 ns P2(a||b):: C = 0 +10990 ns P1(a&&b):: C = 0 +10990 ns P2(a&&b):: C = 1 +10992 ns P1(a||b):: C = 1 +10992 ns P2(a||b):: C = 0 +10996 ns P1(a&&b):: C = 0 +10996 ns P2(a&&b):: C = 1 +10998 ns P1(a||b):: C = 1 +10998 ns P2(a||b):: C = 0 +11002 ns P1(a&&b):: C = 0 +11002 ns P2(a&&b):: C = 1 +11004 ns P1(a||b):: C = 0 +11004 ns P2(a||b):: C = 1 +11008 ns P1(a&&b):: C = 1 +11008 ns P2(a&&b):: C = 0 +11010 ns P1(a||b):: C = 1 +11010 ns P2(a||b):: C = 0 +11014 ns P1(a&&b):: C = 0 +11014 ns P2(a&&b):: C = 1 +11016 ns P1(a||b):: C = 1 +11016 ns P2(a||b):: C = 0 +11020 ns P1(a&&b):: C = 0 +11020 ns P2(a&&b):: C = 1 +11022 ns P1(a||b):: C = 0 +11022 ns P2(a||b):: C = 1 +11026 ns P1(a&&b):: C = 0 +11026 ns P2(a&&b):: C = 1 +11028 ns P1(a||b):: C = 1 +11028 ns P2(a||b):: C = 0 +11032 ns P1(a&&b):: C = 1 +11032 ns P2(a&&b):: C = 0 +11034 ns P1(a||b):: C = 1 +11034 ns P2(a||b):: C = 0 +11038 ns P1(a&&b):: C = 0 +11038 ns P2(a&&b):: C = 1 +11040 ns P1(a||b):: C = 1 +11040 ns P2(a||b):: C = 0 +11044 ns P1(a&&b):: C = 1 +11044 ns P2(a&&b):: C = 0 +11046 ns P1(a||b):: C = 1 +11046 ns P2(a||b):: C = 0 +11050 ns P1(a&&b):: C = 0 +11050 ns P2(a&&b):: C = 1 +11052 ns P1(a||b):: C = 1 +11052 ns P2(a||b):: C = 0 +11056 ns P1(a&&b):: C = 0 +11056 ns P2(a&&b):: C = 1 +11058 ns P1(a||b):: C = 1 +11058 ns P2(a||b):: C = 0 +11062 ns P1(a&&b):: C = 1 +11062 ns P2(a&&b):: C = 0 +11064 ns P1(a||b):: C = 1 +11064 ns P2(a||b):: C = 0 +11068 ns P1(a&&b):: C = 0 +11068 ns P2(a&&b):: C = 1 +11070 ns P1(a||b):: C = 1 +11070 ns P2(a||b):: C = 0 +11074 ns P1(a&&b):: C = 0 +11074 ns P2(a&&b):: C = 1 +11076 ns P1(a||b):: C = 1 +11076 ns P2(a||b):: C = 0 +11080 ns P1(a&&b):: C = 0 +11080 ns P2(a&&b):: C = 1 +11082 ns P1(a||b):: C = 1 +11082 ns P2(a||b):: C = 0 +11086 ns P1(a&&b):: C = 0 +11086 ns P2(a&&b):: C = 1 +11088 ns P1(a||b):: C = 1 +11088 ns P2(a||b):: C = 0 +11092 ns P1(a&&b):: C = 0 +11092 ns P2(a&&b):: C = 1 +11094 ns P1(a||b):: C = 1 +11094 ns P2(a||b):: C = 0 +11098 ns P1(a&&b):: C = 1 +11098 ns P2(a&&b):: C = 0 +11100 ns P1(a||b):: C = 1 +11100 ns P2(a||b):: C = 0 +11104 ns P1(a&&b):: C = 1 +11104 ns P2(a&&b):: C = 0 +11106 ns P1(a||b):: C = 0 +11106 ns P2(a||b):: C = 1 +11110 ns P1(a&&b):: C = 1 +11110 ns P2(a&&b):: C = 0 +11112 ns P1(a||b):: C = 0 +11112 ns P2(a||b):: C = 1 +11116 ns P1(a&&b):: C = 0 +11116 ns P2(a&&b):: C = 1 +11118 ns P1(a||b):: C = 1 +11118 ns P2(a||b):: C = 0 +11122 ns P1(a&&b):: C = 1 +11122 ns P2(a&&b):: C = 0 +11124 ns P1(a||b):: C = 0 +11124 ns P2(a||b):: C = 1 +11128 ns P1(a&&b):: C = 0 +11128 ns P2(a&&b):: C = 1 +11130 ns P1(a||b):: C = 1 +11130 ns P2(a||b):: C = 0 +11134 ns P1(a&&b):: C = 0 +11134 ns P2(a&&b):: C = 1 +11136 ns P1(a||b):: C = 1 +11136 ns P2(a||b):: C = 0 +11140 ns P1(a&&b):: C = 1 +11140 ns P2(a&&b):: C = 0 +11142 ns P1(a||b):: C = 1 +11142 ns P2(a||b):: C = 0 +11146 ns P1(a&&b):: C = 0 +11146 ns P2(a&&b):: C = 1 +11148 ns P1(a||b):: C = 1 +11148 ns P2(a||b):: C = 0 +11152 ns P1(a&&b):: C = 0 +11152 ns P2(a&&b):: C = 1 +11154 ns P1(a||b):: C = 1 +11154 ns P2(a||b):: C = 0 +11158 ns P1(a&&b):: C = 1 +11158 ns P2(a&&b):: C = 0 +11160 ns P1(a||b):: C = 0 +11160 ns P2(a||b):: C = 1 +11164 ns P1(a&&b):: C = 0 +11164 ns P2(a&&b):: C = 1 +11166 ns P1(a||b):: C = 1 +11166 ns P2(a||b):: C = 0 +11170 ns P1(a&&b):: C = 0 +11170 ns P2(a&&b):: C = 1 +11172 ns P1(a||b):: C = 0 +11172 ns P2(a||b):: C = 1 +11176 ns P1(a&&b):: C = 0 +11176 ns P2(a&&b):: C = 1 +11178 ns P1(a||b):: C = 0 +11178 ns P2(a||b):: C = 1 +11182 ns P1(a&&b):: C = 1 +11182 ns P2(a&&b):: C = 0 +11184 ns P1(a||b):: C = 1 +11184 ns P2(a||b):: C = 0 +11188 ns P1(a&&b):: C = 1 +11188 ns P2(a&&b):: C = 0 +11190 ns P1(a||b):: C = 0 +11190 ns P2(a||b):: C = 1 +11194 ns P1(a&&b):: C = 1 +11194 ns P2(a&&b):: C = 0 +11196 ns P1(a||b):: C = 1 +11196 ns P2(a||b):: C = 0 +11200 ns P1(a&&b):: C = 0 +11200 ns P2(a&&b):: C = 1 +11202 ns P1(a||b):: C = 1 +11202 ns P2(a||b):: C = 0 +11206 ns P1(a&&b):: C = 0 +11206 ns P2(a&&b):: C = 1 +11208 ns P1(a||b):: C = 1 +11208 ns P2(a||b):: C = 0 +11212 ns P1(a&&b):: C = 1 +11212 ns P2(a&&b):: C = 0 +11214 ns P1(a||b):: C = 1 +11214 ns P2(a||b):: C = 0 +11218 ns P1(a&&b):: C = 0 +11218 ns P2(a&&b):: C = 1 +11220 ns P1(a||b):: C = 0 +11220 ns P2(a||b):: C = 1 +11224 ns P1(a&&b):: C = 0 +11224 ns P2(a&&b):: C = 1 +11226 ns P1(a||b):: C = 1 +11226 ns P2(a||b):: C = 0 +11230 ns P1(a&&b):: C = 0 +11230 ns P2(a&&b):: C = 1 +11232 ns P1(a||b):: C = 1 +11232 ns P2(a||b):: C = 0 +11236 ns P1(a&&b):: C = 0 +11236 ns P2(a&&b):: C = 1 +11238 ns P1(a||b):: C = 0 +11238 ns P2(a||b):: C = 1 +11242 ns P1(a&&b):: C = 0 +11242 ns P2(a&&b):: C = 1 +11244 ns P1(a||b):: C = 1 +11244 ns P2(a||b):: C = 0 +11248 ns P1(a&&b):: C = 0 +11248 ns P2(a&&b):: C = 1 +11250 ns P1(a||b):: C = 0 +11250 ns P2(a||b):: C = 1 +11254 ns P1(a&&b):: C = 0 +11254 ns P2(a&&b):: C = 1 +11256 ns P1(a||b):: C = 1 +11256 ns P2(a||b):: C = 0 +11260 ns P1(a&&b):: C = 1 +11260 ns P2(a&&b):: C = 0 +11262 ns P1(a||b):: C = 1 +11262 ns P2(a||b):: C = 0 +11266 ns P1(a&&b):: C = 0 +11266 ns P2(a&&b):: C = 1 +11268 ns P1(a||b):: C = 1 +11268 ns P2(a||b):: C = 0 +11272 ns P1(a&&b):: C = 1 +11272 ns P2(a&&b):: C = 0 +11274 ns P1(a||b):: C = 1 +11274 ns P2(a||b):: C = 0 +11278 ns P1(a&&b):: C = 0 +11278 ns P2(a&&b):: C = 1 +11280 ns P1(a||b):: C = 0 +11280 ns P2(a||b):: C = 1 +11284 ns P1(a&&b):: C = 1 +11284 ns P2(a&&b):: C = 0 +11286 ns P1(a||b):: C = 1 +11286 ns P2(a||b):: C = 0 +11290 ns P1(a&&b):: C = 0 +11290 ns P2(a&&b):: C = 1 +11292 ns P1(a||b):: C = 0 +11292 ns P2(a||b):: C = 1 +11296 ns P1(a&&b):: C = 0 +11296 ns P2(a&&b):: C = 1 +11298 ns P1(a||b):: C = 1 +11298 ns P2(a||b):: C = 0 +11302 ns P1(a&&b):: C = 0 +11302 ns P2(a&&b):: C = 1 +11304 ns P1(a||b):: C = 1 +11304 ns P2(a||b):: C = 0 +11308 ns P1(a&&b):: C = 1 +11308 ns P2(a&&b):: C = 0 +11310 ns P1(a||b):: C = 1 +11310 ns P2(a||b):: C = 0 +11314 ns P1(a&&b):: C = 0 +11314 ns P2(a&&b):: C = 1 +11316 ns P1(a||b):: C = 1 +11316 ns P2(a||b):: C = 0 +11320 ns P1(a&&b):: C = 0 +11320 ns P2(a&&b):: C = 1 +11322 ns P1(a||b):: C = 1 +11322 ns P2(a||b):: C = 0 +11326 ns P1(a&&b):: C = 1 +11326 ns P2(a&&b):: C = 0 +11328 ns P1(a||b):: C = 1 +11328 ns P2(a||b):: C = 0 +11332 ns P1(a&&b):: C = 0 +11332 ns P2(a&&b):: C = 1 +11334 ns P1(a||b):: C = 0 +11334 ns P2(a||b):: C = 1 +11338 ns P1(a&&b):: C = 1 +11338 ns P2(a&&b):: C = 0 +11340 ns P1(a||b):: C = 0 +11340 ns P2(a||b):: C = 1 +11344 ns P1(a&&b):: C = 0 +11344 ns P2(a&&b):: C = 1 +11346 ns P1(a||b):: C = 0 +11346 ns P2(a||b):: C = 1 +11350 ns P1(a&&b):: C = 1 +11350 ns P2(a&&b):: C = 0 +11352 ns P1(a||b):: C = 1 +11352 ns P2(a||b):: C = 0 +11356 ns P1(a&&b):: C = 0 +11356 ns P2(a&&b):: C = 1 +11358 ns P1(a||b):: C = 0 +11358 ns P2(a||b):: C = 1 +11362 ns P1(a&&b):: C = 0 +11362 ns P2(a&&b):: C = 1 +11364 ns P1(a||b):: C = 1 +11364 ns P2(a||b):: C = 0 +11368 ns P1(a&&b):: C = 0 +11368 ns P2(a&&b):: C = 1 +11370 ns P1(a||b):: C = 1 +11370 ns P2(a||b):: C = 0 +11374 ns P1(a&&b):: C = 0 +11374 ns P2(a&&b):: C = 1 +11376 ns P1(a||b):: C = 1 +11376 ns P2(a||b):: C = 0 +11380 ns P1(a&&b):: C = 0 +11380 ns P2(a&&b):: C = 1 +11382 ns P1(a||b):: C = 1 +11382 ns P2(a||b):: C = 0 +11386 ns P1(a&&b):: C = 0 +11386 ns P2(a&&b):: C = 1 +11388 ns P1(a||b):: C = 1 +11388 ns P2(a||b):: C = 0 +11392 ns P1(a&&b):: C = 1 +11392 ns P2(a&&b):: C = 0 +11394 ns P1(a||b):: C = 1 +11394 ns P2(a||b):: C = 0 +11398 ns P1(a&&b):: C = 1 +11398 ns P2(a&&b):: C = 0 +11400 ns P1(a||b):: C = 0 +11400 ns P2(a||b):: C = 1 +11404 ns P1(a&&b):: C = 0 +11404 ns P2(a&&b):: C = 1 +11406 ns P1(a||b):: C = 1 +11406 ns P2(a||b):: C = 0 +11410 ns P1(a&&b):: C = 0 +11410 ns P2(a&&b):: C = 1 +11412 ns P1(a||b):: C = 0 +11412 ns P2(a||b):: C = 1 +11416 ns P1(a&&b):: C = 0 +11416 ns P2(a&&b):: C = 1 +11418 ns P1(a||b):: C = 1 +11418 ns P2(a||b):: C = 0 +11422 ns P1(a&&b):: C = 0 +11422 ns P2(a&&b):: C = 1 +11424 ns P1(a||b):: C = 1 +11424 ns P2(a||b):: C = 0 +11428 ns P1(a&&b):: C = 0 +11428 ns P2(a&&b):: C = 1 +11430 ns P1(a||b):: C = 1 +11430 ns P2(a||b):: C = 0 +11434 ns P1(a&&b):: C = 0 +11434 ns P2(a&&b):: C = 1 +11436 ns P1(a||b):: C = 1 +11436 ns P2(a||b):: C = 0 +11440 ns P1(a&&b):: C = 0 +11440 ns P2(a&&b):: C = 1 +11442 ns P1(a||b):: C = 0 +11442 ns P2(a||b):: C = 1 +11446 ns P1(a&&b):: C = 0 +11446 ns P2(a&&b):: C = 1 +11448 ns P1(a||b):: C = 1 +11448 ns P2(a||b):: C = 0 +11452 ns P1(a&&b):: C = 0 +11452 ns P2(a&&b):: C = 1 +11454 ns P1(a||b):: C = 1 +11454 ns P2(a||b):: C = 0 +11458 ns P1(a&&b):: C = 0 +11458 ns P2(a&&b):: C = 1 +11460 ns P1(a||b):: C = 1 +11460 ns P2(a||b):: C = 0 +11464 ns P1(a&&b):: C = 0 +11464 ns P2(a&&b):: C = 1 +11466 ns P1(a||b):: C = 1 +11466 ns P2(a||b):: C = 0 +11470 ns P1(a&&b):: C = 0 +11470 ns P2(a&&b):: C = 1 +11472 ns P1(a||b):: C = 0 +11472 ns P2(a||b):: C = 1 +11476 ns P1(a&&b):: C = 0 +11476 ns P2(a&&b):: C = 1 +11478 ns P1(a||b):: C = 1 +11478 ns P2(a||b):: C = 0 +11482 ns P1(a&&b):: C = 1 +11482 ns P2(a&&b):: C = 0 +11484 ns P1(a||b):: C = 1 +11484 ns P2(a||b):: C = 0 +11488 ns P1(a&&b):: C = 0 +11488 ns P2(a&&b):: C = 1 +11490 ns P1(a||b):: C = 1 +11490 ns P2(a||b):: C = 0 +11494 ns P1(a&&b):: C = 0 +11494 ns P2(a&&b):: C = 1 +11496 ns P1(a||b):: C = 1 +11496 ns P2(a||b):: C = 0 +11500 ns P1(a&&b):: C = 0 +11500 ns P2(a&&b):: C = 1 +11502 ns P1(a||b):: C = 0 +11502 ns P2(a||b):: C = 1 +11506 ns P1(a&&b):: C = 1 +11506 ns P2(a&&b):: C = 0 +11508 ns P1(a||b):: C = 0 +11508 ns P2(a||b):: C = 1 +11512 ns P1(a&&b):: C = 0 +11512 ns P2(a&&b):: C = 1 +11514 ns P1(a||b):: C = 1 +11514 ns P2(a||b):: C = 0 +11518 ns P1(a&&b):: C = 1 +11518 ns P2(a&&b):: C = 0 +11520 ns P1(a||b):: C = 1 +11520 ns P2(a||b):: C = 0 +11524 ns P1(a&&b):: C = 0 +11524 ns P2(a&&b):: C = 1 +11526 ns P1(a||b):: C = 1 +11526 ns P2(a||b):: C = 0 +11530 ns P1(a&&b):: C = 1 +11530 ns P2(a&&b):: C = 0 +11532 ns P1(a||b):: C = 1 +11532 ns P2(a||b):: C = 0 +11536 ns P1(a&&b):: C = 1 +11536 ns P2(a&&b):: C = 0 +11538 ns P1(a||b):: C = 1 +11538 ns P2(a||b):: C = 0 +11542 ns P1(a&&b):: C = 0 +11542 ns P2(a&&b):: C = 1 +11544 ns P1(a||b):: C = 1 +11544 ns P2(a||b):: C = 0 +11548 ns P1(a&&b):: C = 1 +11548 ns P2(a&&b):: C = 0 +11550 ns P1(a||b):: C = 0 +11550 ns P2(a||b):: C = 1 +11554 ns P1(a&&b):: C = 0 +11554 ns P2(a&&b):: C = 1 +11556 ns P1(a||b):: C = 0 +11556 ns P2(a||b):: C = 1 +11560 ns P1(a&&b):: C = 1 +11560 ns P2(a&&b):: C = 0 +11562 ns P1(a||b):: C = 1 +11562 ns P2(a||b):: C = 0 +11566 ns P1(a&&b):: C = 0 +11566 ns P2(a&&b):: C = 1 +11568 ns P1(a||b):: C = 1 +11568 ns P2(a||b):: C = 0 +11572 ns P1(a&&b):: C = 0 +11572 ns P2(a&&b):: C = 1 +11574 ns P1(a||b):: C = 0 +11574 ns P2(a||b):: C = 1 +11578 ns P1(a&&b):: C = 0 +11578 ns P2(a&&b):: C = 1 +11580 ns P1(a||b):: C = 1 +11580 ns P2(a||b):: C = 0 +11584 ns P1(a&&b):: C = 0 +11584 ns P2(a&&b):: C = 1 +11586 ns P1(a||b):: C = 0 +11586 ns P2(a||b):: C = 1 +11590 ns P1(a&&b):: C = 1 +11590 ns P2(a&&b):: C = 0 +11592 ns P1(a||b):: C = 1 +11592 ns P2(a||b):: C = 0 +11596 ns P1(a&&b):: C = 1 +11596 ns P2(a&&b):: C = 0 +11598 ns P1(a||b):: C = 1 +11598 ns P2(a||b):: C = 0 +11602 ns P1(a&&b):: C = 0 +11602 ns P2(a&&b):: C = 1 +11604 ns P1(a||b):: C = 1 +11604 ns P2(a||b):: C = 0 +11608 ns P1(a&&b):: C = 0 +11608 ns P2(a&&b):: C = 1 +11610 ns P1(a||b):: C = 1 +11610 ns P2(a||b):: C = 0 +11614 ns P1(a&&b):: C = 1 +11614 ns P2(a&&b):: C = 0 +11616 ns P1(a||b):: C = 1 +11616 ns P2(a||b):: C = 0 +11620 ns P1(a&&b):: C = 0 +11620 ns P2(a&&b):: C = 1 +11622 ns P1(a||b):: C = 1 +11622 ns P2(a||b):: C = 0 +11626 ns P1(a&&b):: C = 0 +11626 ns P2(a&&b):: C = 1 +11628 ns P1(a||b):: C = 0 +11628 ns P2(a||b):: C = 1 +11632 ns P1(a&&b):: C = 0 +11632 ns P2(a&&b):: C = 1 +11634 ns P1(a||b):: C = 1 +11634 ns P2(a||b):: C = 0 +11638 ns P1(a&&b):: C = 1 +11638 ns P2(a&&b):: C = 0 +11640 ns P1(a||b):: C = 0 +11640 ns P2(a||b):: C = 1 +11644 ns P1(a&&b):: C = 0 +11644 ns P2(a&&b):: C = 1 +11646 ns P1(a||b):: C = 1 +11646 ns P2(a||b):: C = 0 +11650 ns P1(a&&b):: C = 0 +11650 ns P2(a&&b):: C = 1 +11652 ns P1(a||b):: C = 0 +11652 ns P2(a||b):: C = 1 +11656 ns P1(a&&b):: C = 1 +11656 ns P2(a&&b):: C = 0 +11658 ns P1(a||b):: C = 1 +11658 ns P2(a||b):: C = 0 +11662 ns P1(a&&b):: C = 0 +11662 ns P2(a&&b):: C = 1 +11664 ns P1(a||b):: C = 0 +11664 ns P2(a||b):: C = 1 +11668 ns P1(a&&b):: C = 0 +11668 ns P2(a&&b):: C = 1 +11670 ns P1(a||b):: C = 0 +11670 ns P2(a||b):: C = 1 +11674 ns P1(a&&b):: C = 0 +11674 ns P2(a&&b):: C = 1 +11676 ns P1(a||b):: C = 1 +11676 ns P2(a||b):: C = 0 +11680 ns P1(a&&b):: C = 0 +11680 ns P2(a&&b):: C = 1 +11682 ns P1(a||b):: C = 1 +11682 ns P2(a||b):: C = 0 +11686 ns P1(a&&b):: C = 0 +11686 ns P2(a&&b):: C = 1 +11688 ns P1(a||b):: C = 0 +11688 ns P2(a||b):: C = 1 +11692 ns P1(a&&b):: C = 0 +11692 ns P2(a&&b):: C = 1 +11694 ns P1(a||b):: C = 1 +11694 ns P2(a||b):: C = 0 +11698 ns P1(a&&b):: C = 0 +11698 ns P2(a&&b):: C = 1 +11700 ns P1(a||b):: C = 1 +11700 ns P2(a||b):: C = 0 +11704 ns P1(a&&b):: C = 0 +11704 ns P2(a&&b):: C = 1 +11706 ns P1(a||b):: C = 1 +11706 ns P2(a||b):: C = 0 +11710 ns P1(a&&b):: C = 0 +11710 ns P2(a&&b):: C = 1 +11712 ns P1(a||b):: C = 1 +11712 ns P2(a||b):: C = 0 +11716 ns P1(a&&b):: C = 1 +11716 ns P2(a&&b):: C = 0 +11718 ns P1(a||b):: C = 1 +11718 ns P2(a||b):: C = 0 +11722 ns P1(a&&b):: C = 0 +11722 ns P2(a&&b):: C = 1 +11724 ns P1(a||b):: C = 0 +11724 ns P2(a||b):: C = 1 +11728 ns P1(a&&b):: C = 0 +11728 ns P2(a&&b):: C = 1 +11730 ns P1(a||b):: C = 1 +11730 ns P2(a||b):: C = 0 +11734 ns P1(a&&b):: C = 0 +11734 ns P2(a&&b):: C = 1 +11736 ns P1(a||b):: C = 1 +11736 ns P2(a||b):: C = 0 +11740 ns P1(a&&b):: C = 0 +11740 ns P2(a&&b):: C = 1 +11742 ns P1(a||b):: C = 0 +11742 ns P2(a||b):: C = 1 +11746 ns P1(a&&b):: C = 1 +11746 ns P2(a&&b):: C = 0 +11748 ns P1(a||b):: C = 0 +11748 ns P2(a||b):: C = 1 +11752 ns P1(a&&b):: C = 1 +11752 ns P2(a&&b):: C = 0 +11754 ns P1(a||b):: C = 1 +11754 ns P2(a||b):: C = 0 +11758 ns P1(a&&b):: C = 0 +11758 ns P2(a&&b):: C = 1 +11760 ns P1(a||b):: C = 1 +11760 ns P2(a||b):: C = 0 +11764 ns P1(a&&b):: C = 0 +11764 ns P2(a&&b):: C = 1 +11766 ns P1(a||b):: C = 1 +11766 ns P2(a||b):: C = 0 +11770 ns P1(a&&b):: C = 1 +11770 ns P2(a&&b):: C = 0 +11772 ns P1(a||b):: C = 1 +11772 ns P2(a||b):: C = 0 +11776 ns P1(a&&b):: C = 0 +11776 ns P2(a&&b):: C = 1 +11778 ns P1(a||b):: C = 1 +11778 ns P2(a||b):: C = 0 +11782 ns P1(a&&b):: C = 1 +11782 ns P2(a&&b):: C = 0 +11784 ns P1(a||b):: C = 1 +11784 ns P2(a||b):: C = 0 +11788 ns P1(a&&b):: C = 0 +11788 ns P2(a&&b):: C = 1 +11790 ns P1(a||b):: C = 0 +11790 ns P2(a||b):: C = 1 +11794 ns P1(a&&b):: C = 0 +11794 ns P2(a&&b):: C = 1 +11796 ns P1(a||b):: C = 0 +11796 ns P2(a||b):: C = 1 +11800 ns P1(a&&b):: C = 0 +11800 ns P2(a&&b):: C = 1 +11802 ns P1(a||b):: C = 1 +11802 ns P2(a||b):: C = 0 +11806 ns P1(a&&b):: C = 0 +11806 ns P2(a&&b):: C = 1 +11808 ns P1(a||b):: C = 1 +11808 ns P2(a||b):: C = 0 +11812 ns P1(a&&b):: C = 0 +11812 ns P2(a&&b):: C = 1 +11814 ns P1(a||b):: C = 0 +11814 ns P2(a||b):: C = 1 +11818 ns P1(a&&b):: C = 1 +11818 ns P2(a&&b):: C = 0 +11820 ns P1(a||b):: C = 1 +11820 ns P2(a||b):: C = 0 +11824 ns P1(a&&b):: C = 0 +11824 ns P2(a&&b):: C = 1 +11826 ns P1(a||b):: C = 1 +11826 ns P2(a||b):: C = 0 +11830 ns P1(a&&b):: C = 1 +11830 ns P2(a&&b):: C = 0 +11832 ns P1(a||b):: C = 1 +11832 ns P2(a||b):: C = 0 +11836 ns P1(a&&b):: C = 0 +11836 ns P2(a&&b):: C = 1 +11838 ns P1(a||b):: C = 1 +11838 ns P2(a||b):: C = 0 +11842 ns P1(a&&b):: C = 0 +11842 ns P2(a&&b):: C = 1 +11844 ns P1(a||b):: C = 1 +11844 ns P2(a||b):: C = 0 +11848 ns P1(a&&b):: C = 0 +11848 ns P2(a&&b):: C = 1 +11850 ns P1(a||b):: C = 1 +11850 ns P2(a||b):: C = 0 +11854 ns P1(a&&b):: C = 0 +11854 ns P2(a&&b):: C = 1 +11856 ns P1(a||b):: C = 1 +11856 ns P2(a||b):: C = 0 +11860 ns P1(a&&b):: C = 0 +11860 ns P2(a&&b):: C = 1 +11862 ns P1(a||b):: C = 1 +11862 ns P2(a||b):: C = 0 +11866 ns P1(a&&b):: C = 1 +11866 ns P2(a&&b):: C = 0 +11868 ns P1(a||b):: C = 1 +11868 ns P2(a||b):: C = 0 +11872 ns P1(a&&b):: C = 0 +11872 ns P2(a&&b):: C = 1 +11874 ns P1(a||b):: C = 1 +11874 ns P2(a||b):: C = 0 +11878 ns P1(a&&b):: C = 1 +11878 ns P2(a&&b):: C = 0 +11880 ns P1(a||b):: C = 1 +11880 ns P2(a||b):: C = 0 +11884 ns P1(a&&b):: C = 0 +11884 ns P2(a&&b):: C = 1 +11886 ns P1(a||b):: C = 0 +11886 ns P2(a||b):: C = 1 +11890 ns P1(a&&b):: C = 0 +11890 ns P2(a&&b):: C = 1 +11892 ns P1(a||b):: C = 1 +11892 ns P2(a||b):: C = 0 +11896 ns P1(a&&b):: C = 1 +11896 ns P2(a&&b):: C = 0 +11898 ns P1(a||b):: C = 1 +11898 ns P2(a||b):: C = 0 +11902 ns P1(a&&b):: C = 1 +11902 ns P2(a&&b):: C = 0 +11904 ns P1(a||b):: C = 1 +11904 ns P2(a||b):: C = 0 +11908 ns P1(a&&b):: C = 0 +11908 ns P2(a&&b):: C = 1 +11910 ns P1(a||b):: C = 1 +11910 ns P2(a||b):: C = 0 +11914 ns P1(a&&b):: C = 1 +11914 ns P2(a&&b):: C = 0 +11916 ns P1(a||b):: C = 0 +11916 ns P2(a||b):: C = 1 +11920 ns P1(a&&b):: C = 0 +11920 ns P2(a&&b):: C = 1 +11922 ns P1(a||b):: C = 1 +11922 ns P2(a||b):: C = 0 +11926 ns P1(a&&b):: C = 1 +11926 ns P2(a&&b):: C = 0 +11928 ns P1(a||b):: C = 0 +11928 ns P2(a||b):: C = 1 +11932 ns P1(a&&b):: C = 0 +11932 ns P2(a&&b):: C = 1 +11934 ns P1(a||b):: C = 1 +11934 ns P2(a||b):: C = 0 +11938 ns P1(a&&b):: C = 0 +11938 ns P2(a&&b):: C = 1 +11940 ns P1(a||b):: C = 1 +11940 ns P2(a||b):: C = 0 +11944 ns P1(a&&b):: C = 0 +11944 ns P2(a&&b):: C = 1 +11946 ns P1(a||b):: C = 1 +11946 ns P2(a||b):: C = 0 +11950 ns P1(a&&b):: C = 0 +11950 ns P2(a&&b):: C = 1 +11952 ns P1(a||b):: C = 1 +11952 ns P2(a||b):: C = 0 +11956 ns P1(a&&b):: C = 1 +11956 ns P2(a&&b):: C = 0 +11958 ns P1(a||b):: C = 0 +11958 ns P2(a||b):: C = 1 +11962 ns P1(a&&b):: C = 0 +11962 ns P2(a&&b):: C = 1 +11964 ns P1(a||b):: C = 1 +11964 ns P2(a||b):: C = 0 +11968 ns P1(a&&b):: C = 0 +11968 ns P2(a&&b):: C = 1 +11970 ns P1(a||b):: C = 1 +11970 ns P2(a||b):: C = 0 +11974 ns P1(a&&b):: C = 0 +11974 ns P2(a&&b):: C = 1 +11976 ns P1(a||b):: C = 1 +11976 ns P2(a||b):: C = 0 +11980 ns P1(a&&b):: C = 0 +11980 ns P2(a&&b):: C = 1 +11982 ns P1(a||b):: C = 1 +11982 ns P2(a||b):: C = 0 +11986 ns P1(a&&b):: C = 1 +11986 ns P2(a&&b):: C = 0 +11988 ns P1(a||b):: C = 0 +11988 ns P2(a||b):: C = 1 +11992 ns P1(a&&b):: C = 0 +11992 ns P2(a&&b):: C = 1 +11994 ns P1(a||b):: C = 1 +11994 ns P2(a||b):: C = 0 +11998 ns P1(a&&b):: C = 1 +11998 ns P2(a&&b):: C = 0 +12 us P1(a||b):: C = 0 +12 us P2(a||b):: C = 1 +12004 ns P1(a&&b):: C = 0 +12004 ns P2(a&&b):: C = 1 +12006 ns P1(a||b):: C = 1 +12006 ns P2(a||b):: C = 0 +12010 ns P1(a&&b):: C = 0 +12010 ns P2(a&&b):: C = 1 +12012 ns P1(a||b):: C = 1 +12012 ns P2(a||b):: C = 0 +12016 ns P1(a&&b):: C = 0 +12016 ns P2(a&&b):: C = 1 +12018 ns P1(a||b):: C = 1 +12018 ns P2(a||b):: C = 0 +12022 ns P1(a&&b):: C = 0 +12022 ns P2(a&&b):: C = 1 +12024 ns P1(a||b):: C = 1 +12024 ns P2(a||b):: C = 0 +12028 ns P1(a&&b):: C = 1 +12028 ns P2(a&&b):: C = 0 +12030 ns P1(a||b):: C = 1 +12030 ns P2(a||b):: C = 0 +12034 ns P1(a&&b):: C = 0 +12034 ns P2(a&&b):: C = 1 +12036 ns P1(a||b):: C = 1 +12036 ns P2(a||b):: C = 0 +12040 ns P1(a&&b):: C = 0 +12040 ns P2(a&&b):: C = 1 +12042 ns P1(a||b):: C = 1 +12042 ns P2(a||b):: C = 0 +12046 ns P1(a&&b):: C = 0 +12046 ns P2(a&&b):: C = 1 +12048 ns P1(a||b):: C = 1 +12048 ns P2(a||b):: C = 0 +12052 ns P1(a&&b):: C = 0 +12052 ns P2(a&&b):: C = 1 +12054 ns P1(a||b):: C = 1 +12054 ns P2(a||b):: C = 0 +12058 ns P1(a&&b):: C = 0 +12058 ns P2(a&&b):: C = 1 +12060 ns P1(a||b):: C = 0 +12060 ns P2(a||b):: C = 1 +12064 ns P1(a&&b):: C = 0 +12064 ns P2(a&&b):: C = 1 +12066 ns P1(a||b):: C = 1 +12066 ns P2(a||b):: C = 0 +12070 ns P1(a&&b):: C = 0 +12070 ns P2(a&&b):: C = 1 +12072 ns P1(a||b):: C = 1 +12072 ns P2(a||b):: C = 0 +12076 ns P1(a&&b):: C = 0 +12076 ns P2(a&&b):: C = 1 +12078 ns P1(a||b):: C = 0 +12078 ns P2(a||b):: C = 1 +12082 ns P1(a&&b):: C = 0 +12082 ns P2(a&&b):: C = 1 +12084 ns P1(a||b):: C = 1 +12084 ns P2(a||b):: C = 0 +12088 ns P1(a&&b):: C = 0 +12088 ns P2(a&&b):: C = 1 +12090 ns P1(a||b):: C = 1 +12090 ns P2(a||b):: C = 0 +12094 ns P1(a&&b):: C = 0 +12094 ns P2(a&&b):: C = 1 +12096 ns P1(a||b):: C = 1 +12096 ns P2(a||b):: C = 0 +12100 ns P1(a&&b):: C = 0 +12100 ns P2(a&&b):: C = 1 +12102 ns P1(a||b):: C = 0 +12102 ns P2(a||b):: C = 1 +12106 ns P1(a&&b):: C = 0 +12106 ns P2(a&&b):: C = 1 +12108 ns P1(a||b):: C = 1 +12108 ns P2(a||b):: C = 0 +12112 ns P1(a&&b):: C = 0 +12112 ns P2(a&&b):: C = 1 +12114 ns P1(a||b):: C = 1 +12114 ns P2(a||b):: C = 0 +12118 ns P1(a&&b):: C = 1 +12118 ns P2(a&&b):: C = 0 +12120 ns P1(a||b):: C = 1 +12120 ns P2(a||b):: C = 0 +12124 ns P1(a&&b):: C = 1 +12124 ns P2(a&&b):: C = 0 +12126 ns P1(a||b):: C = 1 +12126 ns P2(a||b):: C = 0 +12130 ns P1(a&&b):: C = 0 +12130 ns P2(a&&b):: C = 1 +12132 ns P1(a||b):: C = 1 +12132 ns P2(a||b):: C = 0 +12136 ns P1(a&&b):: C = 0 +12136 ns P2(a&&b):: C = 1 +12138 ns P1(a||b):: C = 0 +12138 ns P2(a||b):: C = 1 +12142 ns P1(a&&b):: C = 0 +12142 ns P2(a&&b):: C = 1 +12144 ns P1(a||b):: C = 0 +12144 ns P2(a||b):: C = 1 +12148 ns P1(a&&b):: C = 1 +12148 ns P2(a&&b):: C = 0 +12150 ns P1(a||b):: C = 0 +12150 ns P2(a||b):: C = 1 +12154 ns P1(a&&b):: C = 1 +12154 ns P2(a&&b):: C = 0 +12156 ns P1(a||b):: C = 1 +12156 ns P2(a||b):: C = 0 +12160 ns P1(a&&b):: C = 1 +12160 ns P2(a&&b):: C = 0 +12162 ns P1(a||b):: C = 1 +12162 ns P2(a||b):: C = 0 +12166 ns P1(a&&b):: C = 0 +12166 ns P2(a&&b):: C = 1 +12168 ns P1(a||b):: C = 1 +12168 ns P2(a||b):: C = 0 +12172 ns P1(a&&b):: C = 0 +12172 ns P2(a&&b):: C = 1 +12174 ns P1(a||b):: C = 1 +12174 ns P2(a||b):: C = 0 +12178 ns P1(a&&b):: C = 0 +12178 ns P2(a&&b):: C = 1 +12180 ns P1(a||b):: C = 1 +12180 ns P2(a||b):: C = 0 +12184 ns P1(a&&b):: C = 0 +12184 ns P2(a&&b):: C = 1 +12186 ns P1(a||b):: C = 1 +12186 ns P2(a||b):: C = 0 +12190 ns P1(a&&b):: C = 0 +12190 ns P2(a&&b):: C = 1 +12192 ns P1(a||b):: C = 1 +12192 ns P2(a||b):: C = 0 +12196 ns P1(a&&b):: C = 1 +12196 ns P2(a&&b):: C = 0 +12198 ns P1(a||b):: C = 1 +12198 ns P2(a||b):: C = 0 +12202 ns P1(a&&b):: C = 1 +12202 ns P2(a&&b):: C = 0 +12204 ns P1(a||b):: C = 1 +12204 ns P2(a||b):: C = 0 +12208 ns P1(a&&b):: C = 0 +12208 ns P2(a&&b):: C = 1 +12210 ns P1(a||b):: C = 1 +12210 ns P2(a||b):: C = 0 +12214 ns P1(a&&b):: C = 1 +12214 ns P2(a&&b):: C = 0 +12216 ns P1(a||b):: C = 1 +12216 ns P2(a||b):: C = 0 +12220 ns P1(a&&b):: C = 0 +12220 ns P2(a&&b):: C = 1 +12222 ns P1(a||b):: C = 1 +12222 ns P2(a||b):: C = 0 +12226 ns P1(a&&b):: C = 0 +12226 ns P2(a&&b):: C = 1 +12228 ns P1(a||b):: C = 1 +12228 ns P2(a||b):: C = 0 +12232 ns P1(a&&b):: C = 0 +12232 ns P2(a&&b):: C = 1 +12234 ns P1(a||b):: C = 1 +12234 ns P2(a||b):: C = 0 +12238 ns P1(a&&b):: C = 0 +12238 ns P2(a&&b):: C = 1 +12240 ns P1(a||b):: C = 1 +12240 ns P2(a||b):: C = 0 +12244 ns P1(a&&b):: C = 0 +12244 ns P2(a&&b):: C = 1 +12246 ns P1(a||b):: C = 0 +12246 ns P2(a||b):: C = 1 +12250 ns P1(a&&b):: C = 0 +12250 ns P2(a&&b):: C = 1 +12252 ns P1(a||b):: C = 1 +12252 ns P2(a||b):: C = 0 +12256 ns P1(a&&b):: C = 0 +12256 ns P2(a&&b):: C = 1 +12258 ns P1(a||b):: C = 1 +12258 ns P2(a||b):: C = 0 +12262 ns P1(a&&b):: C = 0 +12262 ns P2(a&&b):: C = 1 +12264 ns P1(a||b):: C = 1 +12264 ns P2(a||b):: C = 0 +12268 ns P1(a&&b):: C = 0 +12268 ns P2(a&&b):: C = 1 +12270 ns P1(a||b):: C = 1 +12270 ns P2(a||b):: C = 0 +12274 ns P1(a&&b):: C = 1 +12274 ns P2(a&&b):: C = 0 +12276 ns P1(a||b):: C = 1 +12276 ns P2(a||b):: C = 0 +12280 ns P1(a&&b):: C = 0 +12280 ns P2(a&&b):: C = 1 +12282 ns P1(a||b):: C = 1 +12282 ns P2(a||b):: C = 0 +12286 ns P1(a&&b):: C = 0 +12286 ns P2(a&&b):: C = 1 +12288 ns P1(a||b):: C = 1 +12288 ns P2(a||b):: C = 0 +12292 ns P1(a&&b):: C = 0 +12292 ns P2(a&&b):: C = 1 +12294 ns P1(a||b):: C = 0 +12294 ns P2(a||b):: C = 1 +12298 ns P1(a&&b):: C = 1 +12298 ns P2(a&&b):: C = 0 +12300 ns P1(a||b):: C = 1 +12300 ns P2(a||b):: C = 0 +12304 ns P1(a&&b):: C = 0 +12304 ns P2(a&&b):: C = 1 +12306 ns P1(a||b):: C = 0 +12306 ns P2(a||b):: C = 1 +12310 ns P1(a&&b):: C = 0 +12310 ns P2(a&&b):: C = 1 +12312 ns P1(a||b):: C = 1 +12312 ns P2(a||b):: C = 0 +12316 ns P1(a&&b):: C = 1 +12316 ns P2(a&&b):: C = 0 +12318 ns P1(a||b):: C = 1 +12318 ns P2(a||b):: C = 0 +12322 ns P1(a&&b):: C = 1 +12322 ns P2(a&&b):: C = 0 +12324 ns P1(a||b):: C = 1 +12324 ns P2(a||b):: C = 0 +12328 ns P1(a&&b):: C = 0 +12328 ns P2(a&&b):: C = 1 +12330 ns P1(a||b):: C = 1 +12330 ns P2(a||b):: C = 0 +12334 ns P1(a&&b):: C = 0 +12334 ns P2(a&&b):: C = 1 +12336 ns P1(a||b):: C = 1 +12336 ns P2(a||b):: C = 0 +12340 ns P1(a&&b):: C = 1 +12340 ns P2(a&&b):: C = 0 +12342 ns P1(a||b):: C = 1 +12342 ns P2(a||b):: C = 0 +12346 ns P1(a&&b):: C = 0 +12346 ns P2(a&&b):: C = 1 +12348 ns P1(a||b):: C = 0 +12348 ns P2(a||b):: C = 1 +12352 ns P1(a&&b):: C = 1 +12352 ns P2(a&&b):: C = 0 +12354 ns P1(a||b):: C = 1 +12354 ns P2(a||b):: C = 0 +12358 ns P1(a&&b):: C = 0 +12358 ns P2(a&&b):: C = 1 +12360 ns P1(a||b):: C = 1 +12360 ns P2(a||b):: C = 0 +12364 ns P1(a&&b):: C = 0 +12364 ns P2(a&&b):: C = 1 +12366 ns P1(a||b):: C = 1 +12366 ns P2(a||b):: C = 0 +12370 ns P1(a&&b):: C = 0 +12370 ns P2(a&&b):: C = 1 +12372 ns P1(a||b):: C = 1 +12372 ns P2(a||b):: C = 0 +12376 ns P1(a&&b):: C = 0 +12376 ns P2(a&&b):: C = 1 +12378 ns P1(a||b):: C = 1 +12378 ns P2(a||b):: C = 0 +12382 ns P1(a&&b):: C = 0 +12382 ns P2(a&&b):: C = 1 +12384 ns P1(a||b):: C = 1 +12384 ns P2(a||b):: C = 0 +12388 ns P1(a&&b):: C = 0 +12388 ns P2(a&&b):: C = 1 +12390 ns P1(a||b):: C = 1 +12390 ns P2(a||b):: C = 0 +12394 ns P1(a&&b):: C = 0 +12394 ns P2(a&&b):: C = 1 +12396 ns P1(a||b):: C = 1 +12396 ns P2(a||b):: C = 0 +12400 ns P1(a&&b):: C = 0 +12400 ns P2(a&&b):: C = 1 +12402 ns P1(a||b):: C = 1 +12402 ns P2(a||b):: C = 0 +12406 ns P1(a&&b):: C = 0 +12406 ns P2(a&&b):: C = 1 +12408 ns P1(a||b):: C = 0 +12408 ns P2(a||b):: C = 1 +12412 ns P1(a&&b):: C = 0 +12412 ns P2(a&&b):: C = 1 +12414 ns P1(a||b):: C = 0 +12414 ns P2(a||b):: C = 1 +12418 ns P1(a&&b):: C = 0 +12418 ns P2(a&&b):: C = 1 +12420 ns P1(a||b):: C = 1 +12420 ns P2(a||b):: C = 0 +12424 ns P1(a&&b):: C = 0 +12424 ns P2(a&&b):: C = 1 +12426 ns P1(a||b):: C = 0 +12426 ns P2(a||b):: C = 1 +12430 ns P1(a&&b):: C = 0 +12430 ns P2(a&&b):: C = 1 +12432 ns P1(a||b):: C = 1 +12432 ns P2(a||b):: C = 0 +12436 ns P1(a&&b):: C = 1 +12436 ns P2(a&&b):: C = 0 +12438 ns P1(a||b):: C = 1 +12438 ns P2(a||b):: C = 0 +12442 ns P1(a&&b):: C = 1 +12442 ns P2(a&&b):: C = 0 +12444 ns P1(a||b):: C = 1 +12444 ns P2(a||b):: C = 0 +12448 ns P1(a&&b):: C = 0 +12448 ns P2(a&&b):: C = 1 +12450 ns P1(a||b):: C = 1 +12450 ns P2(a||b):: C = 0 +12454 ns P1(a&&b):: C = 0 +12454 ns P2(a&&b):: C = 1 +12456 ns P1(a||b):: C = 0 +12456 ns P2(a||b):: C = 1 +12460 ns P1(a&&b):: C = 0 +12460 ns P2(a&&b):: C = 1 +12462 ns P1(a||b):: C = 1 +12462 ns P2(a||b):: C = 0 +12466 ns P1(a&&b):: C = 1 +12466 ns P2(a&&b):: C = 0 +12468 ns P1(a||b):: C = 1 +12468 ns P2(a||b):: C = 0 +12472 ns P1(a&&b):: C = 1 +12472 ns P2(a&&b):: C = 0 +12474 ns P1(a||b):: C = 1 +12474 ns P2(a||b):: C = 0 +12478 ns P1(a&&b):: C = 0 +12478 ns P2(a&&b):: C = 1 +12480 ns P1(a||b):: C = 1 +12480 ns P2(a||b):: C = 0 +12484 ns P1(a&&b):: C = 0 +12484 ns P2(a&&b):: C = 1 +12486 ns P1(a||b):: C = 1 +12486 ns P2(a||b):: C = 0 +12490 ns P1(a&&b):: C = 0 +12490 ns P2(a&&b):: C = 1 +12492 ns P1(a||b):: C = 0 +12492 ns P2(a||b):: C = 1 +12496 ns P1(a&&b):: C = 1 +12496 ns P2(a&&b):: C = 0 +12498 ns P1(a||b):: C = 1 +12498 ns P2(a||b):: C = 0 +12502 ns P1(a&&b):: C = 0 +12502 ns P2(a&&b):: C = 1 +12504 ns P1(a||b):: C = 1 +12504 ns P2(a||b):: C = 0 +12508 ns P1(a&&b):: C = 0 +12508 ns P2(a&&b):: C = 1 +12510 ns P1(a||b):: C = 1 +12510 ns P2(a||b):: C = 0 +12514 ns P1(a&&b):: C = 1 +12514 ns P2(a&&b):: C = 0 +12516 ns P1(a||b):: C = 0 +12516 ns P2(a||b):: C = 1 +12520 ns P1(a&&b):: C = 0 +12520 ns P2(a&&b):: C = 1 +12522 ns P1(a||b):: C = 0 +12522 ns P2(a||b):: C = 1 +12526 ns P1(a&&b):: C = 0 +12526 ns P2(a&&b):: C = 1 +12528 ns P1(a||b):: C = 1 +12528 ns P2(a||b):: C = 0 +12532 ns P1(a&&b):: C = 0 +12532 ns P2(a&&b):: C = 1 +12534 ns P1(a||b):: C = 1 +12534 ns P2(a||b):: C = 0 +12538 ns P1(a&&b):: C = 1 +12538 ns P2(a&&b):: C = 0 +12540 ns P1(a||b):: C = 1 +12540 ns P2(a||b):: C = 0 +12544 ns P1(a&&b):: C = 0 +12544 ns P2(a&&b):: C = 1 +12546 ns P1(a||b):: C = 0 +12546 ns P2(a||b):: C = 1 +12550 ns P1(a&&b):: C = 0 +12550 ns P2(a&&b):: C = 1 +12552 ns P1(a||b):: C = 1 +12552 ns P2(a||b):: C = 0 +12556 ns P1(a&&b):: C = 0 +12556 ns P2(a&&b):: C = 1 +12558 ns P1(a||b):: C = 0 +12558 ns P2(a||b):: C = 1 +12562 ns P1(a&&b):: C = 0 +12562 ns P2(a&&b):: C = 1 +12564 ns P1(a||b):: C = 1 +12564 ns P2(a||b):: C = 0 +12568 ns P1(a&&b):: C = 0 +12568 ns P2(a&&b):: C = 1 +12570 ns P1(a||b):: C = 1 +12570 ns P2(a||b):: C = 0 +12574 ns P1(a&&b):: C = 0 +12574 ns P2(a&&b):: C = 1 +12576 ns P1(a||b):: C = 1 +12576 ns P2(a||b):: C = 0 +12580 ns P1(a&&b):: C = 0 +12580 ns P2(a&&b):: C = 1 +12582 ns P1(a||b):: C = 1 +12582 ns P2(a||b):: C = 0 +12586 ns P1(a&&b):: C = 0 +12586 ns P2(a&&b):: C = 1 +12588 ns P1(a||b):: C = 1 +12588 ns P2(a||b):: C = 0 +12592 ns P1(a&&b):: C = 0 +12592 ns P2(a&&b):: C = 1 +12594 ns P1(a||b):: C = 1 +12594 ns P2(a||b):: C = 0 +12598 ns P1(a&&b):: C = 1 +12598 ns P2(a&&b):: C = 0 +12600 ns P1(a||b):: C = 1 +12600 ns P2(a||b):: C = 0 +12604 ns P1(a&&b):: C = 0 +12604 ns P2(a&&b):: C = 1 +12606 ns P1(a||b):: C = 0 +12606 ns P2(a||b):: C = 1 +12610 ns P1(a&&b):: C = 0 +12610 ns P2(a&&b):: C = 1 +12612 ns P1(a||b):: C = 1 +12612 ns P2(a||b):: C = 0 +12616 ns P1(a&&b):: C = 0 +12616 ns P2(a&&b):: C = 1 +12618 ns P1(a||b):: C = 1 +12618 ns P2(a||b):: C = 0 +12622 ns P1(a&&b):: C = 1 +12622 ns P2(a&&b):: C = 0 +12624 ns P1(a||b):: C = 1 +12624 ns P2(a||b):: C = 0 +12628 ns P1(a&&b):: C = 0 +12628 ns P2(a&&b):: C = 1 +12630 ns P1(a||b):: C = 0 +12630 ns P2(a||b):: C = 1 +12634 ns P1(a&&b):: C = 0 +12634 ns P2(a&&b):: C = 1 +12636 ns P1(a||b):: C = 1 +12636 ns P2(a||b):: C = 0 +12640 ns P1(a&&b):: C = 0 +12640 ns P2(a&&b):: C = 1 +12642 ns P1(a||b):: C = 1 +12642 ns P2(a||b):: C = 0 +12646 ns P1(a&&b):: C = 0 +12646 ns P2(a&&b):: C = 1 +12648 ns P1(a||b):: C = 1 +12648 ns P2(a||b):: C = 0 +12652 ns P1(a&&b):: C = 0 +12652 ns P2(a&&b):: C = 1 +12654 ns P1(a||b):: C = 1 +12654 ns P2(a||b):: C = 0 +12658 ns P1(a&&b):: C = 0 +12658 ns P2(a&&b):: C = 1 +12660 ns P1(a||b):: C = 1 +12660 ns P2(a||b):: C = 0 +12664 ns P1(a&&b):: C = 0 +12664 ns P2(a&&b):: C = 1 +12666 ns P1(a||b):: C = 1 +12666 ns P2(a||b):: C = 0 +12670 ns P1(a&&b):: C = 0 +12670 ns P2(a&&b):: C = 1 +12672 ns P1(a||b):: C = 0 +12672 ns P2(a||b):: C = 1 +12676 ns P1(a&&b):: C = 0 +12676 ns P2(a&&b):: C = 1 +12678 ns P1(a||b):: C = 1 +12678 ns P2(a||b):: C = 0 +12682 ns P1(a&&b):: C = 0 +12682 ns P2(a&&b):: C = 1 +12684 ns P1(a||b):: C = 0 +12684 ns P2(a||b):: C = 1 +12688 ns P1(a&&b):: C = 1 +12688 ns P2(a&&b):: C = 0 +12690 ns P1(a||b):: C = 1 +12690 ns P2(a||b):: C = 0 +12694 ns P1(a&&b):: C = 1 +12694 ns P2(a&&b):: C = 0 +12696 ns P1(a||b):: C = 1 +12696 ns P2(a||b):: C = 0 +12700 ns P1(a&&b):: C = 1 +12700 ns P2(a&&b):: C = 0 +12702 ns P1(a||b):: C = 1 +12702 ns P2(a||b):: C = 0 +12706 ns P1(a&&b):: C = 0 +12706 ns P2(a&&b):: C = 1 +12708 ns P1(a||b):: C = 0 +12708 ns P2(a||b):: C = 1 +12712 ns P1(a&&b):: C = 0 +12712 ns P2(a&&b):: C = 1 +12714 ns P1(a||b):: C = 0 +12714 ns P2(a||b):: C = 1 +12718 ns P1(a&&b):: C = 0 +12718 ns P2(a&&b):: C = 1 +12720 ns P1(a||b):: C = 1 +12720 ns P2(a||b):: C = 0 +12724 ns P1(a&&b):: C = 0 +12724 ns P2(a&&b):: C = 1 +12726 ns P1(a||b):: C = 1 +12726 ns P2(a||b):: C = 0 +12730 ns P1(a&&b):: C = 0 +12730 ns P2(a&&b):: C = 1 +12732 ns P1(a||b):: C = 1 +12732 ns P2(a||b):: C = 0 +12736 ns P1(a&&b):: C = 0 +12736 ns P2(a&&b):: C = 1 +12738 ns P1(a||b):: C = 1 +12738 ns P2(a||b):: C = 0 +12742 ns P1(a&&b):: C = 0 +12742 ns P2(a&&b):: C = 1 +12744 ns P1(a||b):: C = 0 +12744 ns P2(a||b):: C = 1 +12748 ns P1(a&&b):: C = 1 +12748 ns P2(a&&b):: C = 0 +12750 ns P1(a||b):: C = 1 +12750 ns P2(a||b):: C = 0 +12754 ns P1(a&&b):: C = 0 +12754 ns P2(a&&b):: C = 1 +12756 ns P1(a||b):: C = 0 +12756 ns P2(a||b):: C = 1 +12760 ns P1(a&&b):: C = 1 +12760 ns P2(a&&b):: C = 0 +12762 ns P1(a||b):: C = 1 +12762 ns P2(a||b):: C = 0 +12766 ns P1(a&&b):: C = 1 +12766 ns P2(a&&b):: C = 0 +12768 ns P1(a||b):: C = 0 +12768 ns P2(a||b):: C = 1 +12772 ns P1(a&&b):: C = 0 +12772 ns P2(a&&b):: C = 1 +12774 ns P1(a||b):: C = 0 +12774 ns P2(a||b):: C = 1 +12778 ns P1(a&&b):: C = 0 +12778 ns P2(a&&b):: C = 1 +12780 ns P1(a||b):: C = 1 +12780 ns P2(a||b):: C = 0 +12784 ns P1(a&&b):: C = 0 +12784 ns P2(a&&b):: C = 1 +12786 ns P1(a||b):: C = 1 +12786 ns P2(a||b):: C = 0 +12790 ns P1(a&&b):: C = 0 +12790 ns P2(a&&b):: C = 1 +12792 ns P1(a||b):: C = 1 +12792 ns P2(a||b):: C = 0 +12796 ns P1(a&&b):: C = 0 +12796 ns P2(a&&b):: C = 1 +12798 ns P1(a||b):: C = 0 +12798 ns P2(a||b):: C = 1 +12802 ns P1(a&&b):: C = 0 +12802 ns P2(a&&b):: C = 1 +12804 ns P1(a||b):: C = 1 +12804 ns P2(a||b):: C = 0 +12808 ns P1(a&&b):: C = 1 +12808 ns P2(a&&b):: C = 0 +12810 ns P1(a||b):: C = 0 +12810 ns P2(a||b):: C = 1 +12814 ns P1(a&&b):: C = 0 +12814 ns P2(a&&b):: C = 1 +12816 ns P1(a||b):: C = 1 +12816 ns P2(a||b):: C = 0 +12820 ns P1(a&&b):: C = 0 +12820 ns P2(a&&b):: C = 1 +12822 ns P1(a||b):: C = 1 +12822 ns P2(a||b):: C = 0 +12826 ns P1(a&&b):: C = 1 +12826 ns P2(a&&b):: C = 0 +12828 ns P1(a||b):: C = 0 +12828 ns P2(a||b):: C = 1 +12832 ns P1(a&&b):: C = 1 +12832 ns P2(a&&b):: C = 0 +12834 ns P1(a||b):: C = 1 +12834 ns P2(a||b):: C = 0 +12838 ns P1(a&&b):: C = 0 +12838 ns P2(a&&b):: C = 1 +12840 ns P1(a||b):: C = 1 +12840 ns P2(a||b):: C = 0 +12844 ns P1(a&&b):: C = 0 +12844 ns P2(a&&b):: C = 1 +12846 ns P1(a||b):: C = 0 +12846 ns P2(a||b):: C = 1 +12850 ns P1(a&&b):: C = 1 +12850 ns P2(a&&b):: C = 0 +12852 ns P1(a||b):: C = 0 +12852 ns P2(a||b):: C = 1 +12856 ns P1(a&&b):: C = 0 +12856 ns P2(a&&b):: C = 1 +12858 ns P1(a||b):: C = 1 +12858 ns P2(a||b):: C = 0 +12862 ns P1(a&&b):: C = 0 +12862 ns P2(a&&b):: C = 1 +12864 ns P1(a||b):: C = 1 +12864 ns P2(a||b):: C = 0 +12868 ns P1(a&&b):: C = 0 +12868 ns P2(a&&b):: C = 1 +12870 ns P1(a||b):: C = 1 +12870 ns P2(a||b):: C = 0 +12874 ns P1(a&&b):: C = 0 +12874 ns P2(a&&b):: C = 1 +12876 ns P1(a||b):: C = 1 +12876 ns P2(a||b):: C = 0 +12880 ns P1(a&&b):: C = 0 +12880 ns P2(a&&b):: C = 1 +12882 ns P1(a||b):: C = 1 +12882 ns P2(a||b):: C = 0 +12886 ns P1(a&&b):: C = 0 +12886 ns P2(a&&b):: C = 1 +12888 ns P1(a||b):: C = 1 +12888 ns P2(a||b):: C = 0 +12892 ns P1(a&&b):: C = 0 +12892 ns P2(a&&b):: C = 1 +12894 ns P1(a||b):: C = 1 +12894 ns P2(a||b):: C = 0 +12898 ns P1(a&&b):: C = 1 +12898 ns P2(a&&b):: C = 0 +12900 ns P1(a||b):: C = 1 +12900 ns P2(a||b):: C = 0 +12904 ns P1(a&&b):: C = 1 +12904 ns P2(a&&b):: C = 0 +12906 ns P1(a||b):: C = 1 +12906 ns P2(a||b):: C = 0 +12910 ns P1(a&&b):: C = 1 +12910 ns P2(a&&b):: C = 0 +12912 ns P1(a||b):: C = 1 +12912 ns P2(a||b):: C = 0 +12916 ns P1(a&&b):: C = 0 +12916 ns P2(a&&b):: C = 1 +12918 ns P1(a||b):: C = 1 +12918 ns P2(a||b):: C = 0 +12922 ns P1(a&&b):: C = 0 +12922 ns P2(a&&b):: C = 1 +12924 ns P1(a||b):: C = 0 +12924 ns P2(a||b):: C = 1 +12928 ns P1(a&&b):: C = 0 +12928 ns P2(a&&b):: C = 1 +12930 ns P1(a||b):: C = 1 +12930 ns P2(a||b):: C = 0 +12934 ns P1(a&&b):: C = 0 +12934 ns P2(a&&b):: C = 1 +12936 ns P1(a||b):: C = 1 +12936 ns P2(a||b):: C = 0 +12940 ns P1(a&&b):: C = 0 +12940 ns P2(a&&b):: C = 1 +12942 ns P1(a||b):: C = 0 +12942 ns P2(a||b):: C = 1 +12946 ns P1(a&&b):: C = 0 +12946 ns P2(a&&b):: C = 1 +12948 ns P1(a||b):: C = 1 +12948 ns P2(a||b):: C = 0 +12952 ns P1(a&&b):: C = 0 +12952 ns P2(a&&b):: C = 1 +12954 ns P1(a||b):: C = 1 +12954 ns P2(a||b):: C = 0 +12958 ns P1(a&&b):: C = 1 +12958 ns P2(a&&b):: C = 0 +12960 ns P1(a||b):: C = 1 +12960 ns P2(a||b):: C = 0 +12964 ns P1(a&&b):: C = 0 +12964 ns P2(a&&b):: C = 1 +12966 ns P1(a||b):: C = 1 +12966 ns P2(a||b):: C = 0 +12970 ns P1(a&&b):: C = 0 +12970 ns P2(a&&b):: C = 1 +12972 ns P1(a||b):: C = 1 +12972 ns P2(a||b):: C = 0 +12976 ns P1(a&&b):: C = 0 +12976 ns P2(a&&b):: C = 1 +12978 ns P1(a||b):: C = 1 +12978 ns P2(a||b):: C = 0 +12982 ns P1(a&&b):: C = 1 +12982 ns P2(a&&b):: C = 0 +12984 ns P1(a||b):: C = 1 +12984 ns P2(a||b):: C = 0 +12988 ns P1(a&&b):: C = 0 +12988 ns P2(a&&b):: C = 1 +12990 ns P1(a||b):: C = 1 +12990 ns P2(a||b):: C = 0 +12994 ns P1(a&&b):: C = 1 +12994 ns P2(a&&b):: C = 0 +12996 ns P1(a||b):: C = 0 +12996 ns P2(a||b):: C = 1 +13 us P1(a&&b):: C = 0 +13 us P2(a&&b):: C = 1 +13002 ns P1(a||b):: C = 0 +13002 ns P2(a||b):: C = 1 +13006 ns P1(a&&b):: C = 1 +13006 ns P2(a&&b):: C = 0 +13008 ns P1(a||b):: C = 0 +13008 ns P2(a||b):: C = 1 +13012 ns P1(a&&b):: C = 0 +13012 ns P2(a&&b):: C = 1 +13014 ns P1(a||b):: C = 0 +13014 ns P2(a||b):: C = 1 +13018 ns P1(a&&b):: C = 0 +13018 ns P2(a&&b):: C = 1 +13020 ns P1(a||b):: C = 1 +13020 ns P2(a||b):: C = 0 +13024 ns P1(a&&b):: C = 0 +13024 ns P2(a&&b):: C = 1 +13026 ns P1(a||b):: C = 0 +13026 ns P2(a||b):: C = 1 +13030 ns P1(a&&b):: C = 1 +13030 ns P2(a&&b):: C = 0 +13032 ns P1(a||b):: C = 1 +13032 ns P2(a||b):: C = 0 +13036 ns P1(a&&b):: C = 1 +13036 ns P2(a&&b):: C = 0 +13038 ns P1(a||b):: C = 1 +13038 ns P2(a||b):: C = 0 +13042 ns P1(a&&b):: C = 1 +13042 ns P2(a&&b):: C = 0 +13044 ns P1(a||b):: C = 1 +13044 ns P2(a||b):: C = 0 +13048 ns P1(a&&b):: C = 0 +13048 ns P2(a&&b):: C = 1 +13050 ns P1(a||b):: C = 1 +13050 ns P2(a||b):: C = 0 +13054 ns P1(a&&b):: C = 0 +13054 ns P2(a&&b):: C = 1 +13056 ns P1(a||b):: C = 1 +13056 ns P2(a||b):: C = 0 +13060 ns P1(a&&b):: C = 1 +13060 ns P2(a&&b):: C = 0 +13062 ns P1(a||b):: C = 0 +13062 ns P2(a||b):: C = 1 +13066 ns P1(a&&b):: C = 0 +13066 ns P2(a&&b):: C = 1 +13068 ns P1(a||b):: C = 0 +13068 ns P2(a||b):: C = 1 +13072 ns P1(a&&b):: C = 0 +13072 ns P2(a&&b):: C = 1 +13074 ns P1(a||b):: C = 1 +13074 ns P2(a||b):: C = 0 +13078 ns P1(a&&b):: C = 0 +13078 ns P2(a&&b):: C = 1 +13080 ns P1(a||b):: C = 1 +13080 ns P2(a||b):: C = 0 +13084 ns P1(a&&b):: C = 0 +13084 ns P2(a&&b):: C = 1 +13086 ns P1(a||b):: C = 1 +13086 ns P2(a||b):: C = 0 +13090 ns P1(a&&b):: C = 0 +13090 ns P2(a&&b):: C = 1 +13092 ns P1(a||b):: C = 1 +13092 ns P2(a||b):: C = 0 +13096 ns P1(a&&b):: C = 0 +13096 ns P2(a&&b):: C = 1 +13098 ns P1(a||b):: C = 0 +13098 ns P2(a||b):: C = 1 +13102 ns P1(a&&b):: C = 0 +13102 ns P2(a&&b):: C = 1 +13104 ns P1(a||b):: C = 1 +13104 ns P2(a||b):: C = 0 +13108 ns P1(a&&b):: C = 0 +13108 ns P2(a&&b):: C = 1 +13110 ns P1(a||b):: C = 1 +13110 ns P2(a||b):: C = 0 +13114 ns P1(a&&b):: C = 0 +13114 ns P2(a&&b):: C = 1 +13116 ns P1(a||b):: C = 1 +13116 ns P2(a||b):: C = 0 +13120 ns P1(a&&b):: C = 1 +13120 ns P2(a&&b):: C = 0 +13122 ns P1(a||b):: C = 1 +13122 ns P2(a||b):: C = 0 +13126 ns P1(a&&b):: C = 0 +13126 ns P2(a&&b):: C = 1 +13128 ns P1(a||b):: C = 0 +13128 ns P2(a||b):: C = 1 +13132 ns P1(a&&b):: C = 1 +13132 ns P2(a&&b):: C = 0 +13134 ns P1(a||b):: C = 1 +13134 ns P2(a||b):: C = 0 +13138 ns P1(a&&b):: C = 0 +13138 ns P2(a&&b):: C = 1 +13140 ns P1(a||b):: C = 1 +13140 ns P2(a||b):: C = 0 +13144 ns P1(a&&b):: C = 0 +13144 ns P2(a&&b):: C = 1 +13146 ns P1(a||b):: C = 1 +13146 ns P2(a||b):: C = 0 +13150 ns P1(a&&b):: C = 0 +13150 ns P2(a&&b):: C = 1 +13152 ns P1(a||b):: C = 1 +13152 ns P2(a||b):: C = 0 +13156 ns P1(a&&b):: C = 0 +13156 ns P2(a&&b):: C = 1 +13158 ns P1(a||b):: C = 0 +13158 ns P2(a||b):: C = 1 +13162 ns P1(a&&b):: C = 0 +13162 ns P2(a&&b):: C = 1 +13164 ns P1(a||b):: C = 0 +13164 ns P2(a||b):: C = 1 +13168 ns P1(a&&b):: C = 0 +13168 ns P2(a&&b):: C = 1 +13170 ns P1(a||b):: C = 0 +13170 ns P2(a||b):: C = 1 +13174 ns P1(a&&b):: C = 0 +13174 ns P2(a&&b):: C = 1 +13176 ns P1(a||b):: C = 1 +13176 ns P2(a||b):: C = 0 +13180 ns P1(a&&b):: C = 0 +13180 ns P2(a&&b):: C = 1 +13182 ns P1(a||b):: C = 0 +13182 ns P2(a||b):: C = 1 +13186 ns P1(a&&b):: C = 0 +13186 ns P2(a&&b):: C = 1 +13188 ns P1(a||b):: C = 1 +13188 ns P2(a||b):: C = 0 +13192 ns P1(a&&b):: C = 0 +13192 ns P2(a&&b):: C = 1 +13194 ns P1(a||b):: C = 1 +13194 ns P2(a||b):: C = 0 +13198 ns P1(a&&b):: C = 0 +13198 ns P2(a&&b):: C = 1 +13200 ns P1(a||b):: C = 1 +13200 ns P2(a||b):: C = 0 +13204 ns P1(a&&b):: C = 1 +13204 ns P2(a&&b):: C = 0 +13206 ns P1(a||b):: C = 0 +13206 ns P2(a||b):: C = 1 +13210 ns P1(a&&b):: C = 0 +13210 ns P2(a&&b):: C = 1 +13212 ns P1(a||b):: C = 1 +13212 ns P2(a||b):: C = 0 +13216 ns P1(a&&b):: C = 0 +13216 ns P2(a&&b):: C = 1 +13218 ns P1(a||b):: C = 0 +13218 ns P2(a||b):: C = 1 +13222 ns P1(a&&b):: C = 1 +13222 ns P2(a&&b):: C = 0 +13224 ns P1(a||b):: C = 1 +13224 ns P2(a||b):: C = 0 +13228 ns P1(a&&b):: C = 1 +13228 ns P2(a&&b):: C = 0 +13230 ns P1(a||b):: C = 1 +13230 ns P2(a||b):: C = 0 +13234 ns P1(a&&b):: C = 0 +13234 ns P2(a&&b):: C = 1 +13236 ns P1(a||b):: C = 1 +13236 ns P2(a||b):: C = 0 +13240 ns P1(a&&b):: C = 0 +13240 ns P2(a&&b):: C = 1 +13242 ns P1(a||b):: C = 1 +13242 ns P2(a||b):: C = 0 +13246 ns P1(a&&b):: C = 1 +13246 ns P2(a&&b):: C = 0 +13248 ns P1(a||b):: C = 0 +13248 ns P2(a||b):: C = 1 +13252 ns P1(a&&b):: C = 0 +13252 ns P2(a&&b):: C = 1 +13254 ns P1(a||b):: C = 0 +13254 ns P2(a||b):: C = 1 +13258 ns P1(a&&b):: C = 1 +13258 ns P2(a&&b):: C = 0 +13260 ns P1(a||b):: C = 1 +13260 ns P2(a||b):: C = 0 +13264 ns P1(a&&b):: C = 0 +13264 ns P2(a&&b):: C = 1 +13266 ns P1(a||b):: C = 1 +13266 ns P2(a||b):: C = 0 +13270 ns P1(a&&b):: C = 1 +13270 ns P2(a&&b):: C = 0 +13272 ns P1(a||b):: C = 0 +13272 ns P2(a||b):: C = 1 +13276 ns P1(a&&b):: C = 0 +13276 ns P2(a&&b):: C = 1 +13278 ns P1(a||b):: C = 1 +13278 ns P2(a||b):: C = 0 +13282 ns P1(a&&b):: C = 0 +13282 ns P2(a&&b):: C = 1 +13284 ns P1(a||b):: C = 0 +13284 ns P2(a||b):: C = 1 +13288 ns P1(a&&b):: C = 0 +13288 ns P2(a&&b):: C = 1 +13290 ns P1(a||b):: C = 1 +13290 ns P2(a||b):: C = 0 +13294 ns P1(a&&b):: C = 0 +13294 ns P2(a&&b):: C = 1 +13296 ns P1(a||b):: C = 1 +13296 ns P2(a||b):: C = 0 +13300 ns P1(a&&b):: C = 0 +13300 ns P2(a&&b):: C = 1 +13302 ns P1(a||b):: C = 0 +13302 ns P2(a||b):: C = 1 +13306 ns P1(a&&b):: C = 0 +13306 ns P2(a&&b):: C = 1 +13308 ns P1(a||b):: C = 0 +13308 ns P2(a||b):: C = 1 +13312 ns P1(a&&b):: C = 0 +13312 ns P2(a&&b):: C = 1 +13314 ns P1(a||b):: C = 1 +13314 ns P2(a||b):: C = 0 +13318 ns P1(a&&b):: C = 0 +13318 ns P2(a&&b):: C = 1 +13320 ns P1(a||b):: C = 1 +13320 ns P2(a||b):: C = 0 +13324 ns P1(a&&b):: C = 0 +13324 ns P2(a&&b):: C = 1 +13326 ns P1(a||b):: C = 1 +13326 ns P2(a||b):: C = 0 +13330 ns P1(a&&b):: C = 1 +13330 ns P2(a&&b):: C = 0 +13332 ns P1(a||b):: C = 1 +13332 ns P2(a||b):: C = 0 +13336 ns P1(a&&b):: C = 0 +13336 ns P2(a&&b):: C = 1 +13338 ns P1(a||b):: C = 1 +13338 ns P2(a||b):: C = 0 +13342 ns P1(a&&b):: C = 0 +13342 ns P2(a&&b):: C = 1 +13344 ns P1(a||b):: C = 1 +13344 ns P2(a||b):: C = 0 +13348 ns P1(a&&b):: C = 0 +13348 ns P2(a&&b):: C = 1 +13350 ns P1(a||b):: C = 1 +13350 ns P2(a||b):: C = 0 +13354 ns P1(a&&b):: C = 1 +13354 ns P2(a&&b):: C = 0 +13356 ns P1(a||b):: C = 1 +13356 ns P2(a||b):: C = 0 +13360 ns P1(a&&b):: C = 1 +13360 ns P2(a&&b):: C = 0 +13362 ns P1(a||b):: C = 0 +13362 ns P2(a||b):: C = 1 +13366 ns P1(a&&b):: C = 0 +13366 ns P2(a&&b):: C = 1 +13368 ns P1(a||b):: C = 1 +13368 ns P2(a||b):: C = 0 +13372 ns P1(a&&b):: C = 0 +13372 ns P2(a&&b):: C = 1 +13374 ns P1(a||b):: C = 1 +13374 ns P2(a||b):: C = 0 +13378 ns P1(a&&b):: C = 0 +13378 ns P2(a&&b):: C = 1 +13380 ns P1(a||b):: C = 1 +13380 ns P2(a||b):: C = 0 +13384 ns P1(a&&b):: C = 0 +13384 ns P2(a&&b):: C = 1 +13386 ns P1(a||b):: C = 1 +13386 ns P2(a||b):: C = 0 +13390 ns P1(a&&b):: C = 0 +13390 ns P2(a&&b):: C = 1 +13392 ns P1(a||b):: C = 0 +13392 ns P2(a||b):: C = 1 +13396 ns P1(a&&b):: C = 0 +13396 ns P2(a&&b):: C = 1 +13398 ns P1(a||b):: C = 0 +13398 ns P2(a||b):: C = 1 +13402 ns P1(a&&b):: C = 0 +13402 ns P2(a&&b):: C = 1 +13404 ns P1(a||b):: C = 1 +13404 ns P2(a||b):: C = 0 +13408 ns P1(a&&b):: C = 0 +13408 ns P2(a&&b):: C = 1 +13410 ns P1(a||b):: C = 1 +13410 ns P2(a||b):: C = 0 +13414 ns P1(a&&b):: C = 0 +13414 ns P2(a&&b):: C = 1 +13416 ns P1(a||b):: C = 1 +13416 ns P2(a||b):: C = 0 +13420 ns P1(a&&b):: C = 1 +13420 ns P2(a&&b):: C = 0 +13422 ns P1(a||b):: C = 1 +13422 ns P2(a||b):: C = 0 +13426 ns P1(a&&b):: C = 0 +13426 ns P2(a&&b):: C = 1 +13428 ns P1(a||b):: C = 1 +13428 ns P2(a||b):: C = 0 +13432 ns P1(a&&b):: C = 0 +13432 ns P2(a&&b):: C = 1 +13434 ns P1(a||b):: C = 0 +13434 ns P2(a||b):: C = 1 +13438 ns P1(a&&b):: C = 0 +13438 ns P2(a&&b):: C = 1 +13440 ns P1(a||b):: C = 1 +13440 ns P2(a||b):: C = 0 +13444 ns P1(a&&b):: C = 0 +13444 ns P2(a&&b):: C = 1 +13446 ns P1(a||b):: C = 0 +13446 ns P2(a||b):: C = 1 +13450 ns P1(a&&b):: C = 0 +13450 ns P2(a&&b):: C = 1 +13452 ns P1(a||b):: C = 1 +13452 ns P2(a||b):: C = 0 +13456 ns P1(a&&b):: C = 0 +13456 ns P2(a&&b):: C = 1 +13458 ns P1(a||b):: C = 1 +13458 ns P2(a||b):: C = 0 +13462 ns P1(a&&b):: C = 0 +13462 ns P2(a&&b):: C = 1 +13464 ns P1(a||b):: C = 1 +13464 ns P2(a||b):: C = 0 +13468 ns P1(a&&b):: C = 0 +13468 ns P2(a&&b):: C = 1 +13470 ns P1(a||b):: C = 0 +13470 ns P2(a||b):: C = 1 +13474 ns P1(a&&b):: C = 0 +13474 ns P2(a&&b):: C = 1 +13476 ns P1(a||b):: C = 1 +13476 ns P2(a||b):: C = 0 +13480 ns P1(a&&b):: C = 0 +13480 ns P2(a&&b):: C = 1 +13482 ns P1(a||b):: C = 1 +13482 ns P2(a||b):: C = 0 +13486 ns P1(a&&b):: C = 0 +13486 ns P2(a&&b):: C = 1 +13488 ns P1(a||b):: C = 0 +13488 ns P2(a||b):: C = 1 +13492 ns P1(a&&b):: C = 0 +13492 ns P2(a&&b):: C = 1 +13494 ns P1(a||b):: C = 1 +13494 ns P2(a||b):: C = 0 +13498 ns P1(a&&b):: C = 1 +13498 ns P2(a&&b):: C = 0 +13500 ns P1(a||b):: C = 1 +13500 ns P2(a||b):: C = 0 +13504 ns P1(a&&b):: C = 0 +13504 ns P2(a&&b):: C = 1 +13506 ns P1(a||b):: C = 1 +13506 ns P2(a||b):: C = 0 +13510 ns P1(a&&b):: C = 0 +13510 ns P2(a&&b):: C = 1 +13512 ns P1(a||b):: C = 1 +13512 ns P2(a||b):: C = 0 +13516 ns P1(a&&b):: C = 0 +13516 ns P2(a&&b):: C = 1 +13518 ns P1(a||b):: C = 1 +13518 ns P2(a||b):: C = 0 +13522 ns P1(a&&b):: C = 0 +13522 ns P2(a&&b):: C = 1 +13524 ns P1(a||b):: C = 1 +13524 ns P2(a||b):: C = 0 +13528 ns P1(a&&b):: C = 0 +13528 ns P2(a&&b):: C = 1 +13530 ns P1(a||b):: C = 1 +13530 ns P2(a||b):: C = 0 +13534 ns P1(a&&b):: C = 1 +13534 ns P2(a&&b):: C = 0 +13536 ns P1(a||b):: C = 1 +13536 ns P2(a||b):: C = 0 +13540 ns P1(a&&b):: C = 0 +13540 ns P2(a&&b):: C = 1 +13542 ns P1(a||b):: C = 1 +13542 ns P2(a||b):: C = 0 +13546 ns P1(a&&b):: C = 0 +13546 ns P2(a&&b):: C = 1 +13548 ns P1(a||b):: C = 0 +13548 ns P2(a||b):: C = 1 +13552 ns P1(a&&b):: C = 0 +13552 ns P2(a&&b):: C = 1 +13554 ns P1(a||b):: C = 1 +13554 ns P2(a||b):: C = 0 +13558 ns P1(a&&b):: C = 1 +13558 ns P2(a&&b):: C = 0 +13560 ns P1(a||b):: C = 1 +13560 ns P2(a||b):: C = 0 +13564 ns P1(a&&b):: C = 0 +13564 ns P2(a&&b):: C = 1 +13566 ns P1(a||b):: C = 1 +13566 ns P2(a||b):: C = 0 +13570 ns P1(a&&b):: C = 1 +13570 ns P2(a&&b):: C = 0 +13572 ns P1(a||b):: C = 1 +13572 ns P2(a||b):: C = 0 +13576 ns P1(a&&b):: C = 0 +13576 ns P2(a&&b):: C = 1 +13578 ns P1(a||b):: C = 1 +13578 ns P2(a||b):: C = 0 +13582 ns P1(a&&b):: C = 0 +13582 ns P2(a&&b):: C = 1 +13584 ns P1(a||b):: C = 1 +13584 ns P2(a||b):: C = 0 +13588 ns P1(a&&b):: C = 0 +13588 ns P2(a&&b):: C = 1 +13590 ns P1(a||b):: C = 1 +13590 ns P2(a||b):: C = 0 +13594 ns P1(a&&b):: C = 1 +13594 ns P2(a&&b):: C = 0 +13596 ns P1(a||b):: C = 1 +13596 ns P2(a||b):: C = 0 +13600 ns P1(a&&b):: C = 0 +13600 ns P2(a&&b):: C = 1 +13602 ns P1(a||b):: C = 0 +13602 ns P2(a||b):: C = 1 +13606 ns P1(a&&b):: C = 0 +13606 ns P2(a&&b):: C = 1 +13608 ns P1(a||b):: C = 1 +13608 ns P2(a||b):: C = 0 +13612 ns P1(a&&b):: C = 1 +13612 ns P2(a&&b):: C = 0 +13614 ns P1(a||b):: C = 0 +13614 ns P2(a||b):: C = 1 +13618 ns P1(a&&b):: C = 1 +13618 ns P2(a&&b):: C = 0 +13620 ns P1(a||b):: C = 1 +13620 ns P2(a||b):: C = 0 +13624 ns P1(a&&b):: C = 0 +13624 ns P2(a&&b):: C = 1 +13626 ns P1(a||b):: C = 1 +13626 ns P2(a||b):: C = 0 +13630 ns P1(a&&b):: C = 0 +13630 ns P2(a&&b):: C = 1 +13632 ns P1(a||b):: C = 1 +13632 ns P2(a||b):: C = 0 +13636 ns P1(a&&b):: C = 0 +13636 ns P2(a&&b):: C = 1 +13638 ns P1(a||b):: C = 1 +13638 ns P2(a||b):: C = 0 +13642 ns P1(a&&b):: C = 0 +13642 ns P2(a&&b):: C = 1 +13644 ns P1(a||b):: C = 1 +13644 ns P2(a||b):: C = 0 +13648 ns P1(a&&b):: C = 1 +13648 ns P2(a&&b):: C = 0 +13650 ns P1(a||b):: C = 1 +13650 ns P2(a||b):: C = 0 +13654 ns P1(a&&b):: C = 1 +13654 ns P2(a&&b):: C = 0 +13656 ns P1(a||b):: C = 0 +13656 ns P2(a||b):: C = 1 +13660 ns P1(a&&b):: C = 0 +13660 ns P2(a&&b):: C = 1 +13662 ns P1(a||b):: C = 1 +13662 ns P2(a||b):: C = 0 +13666 ns P1(a&&b):: C = 0 +13666 ns P2(a&&b):: C = 1 +13668 ns P1(a||b):: C = 1 +13668 ns P2(a||b):: C = 0 +13672 ns P1(a&&b):: C = 0 +13672 ns P2(a&&b):: C = 1 +13674 ns P1(a||b):: C = 0 +13674 ns P2(a||b):: C = 1 +13678 ns P1(a&&b):: C = 1 +13678 ns P2(a&&b):: C = 0 +13680 ns P1(a||b):: C = 0 +13680 ns P2(a||b):: C = 1 +13684 ns P1(a&&b):: C = 0 +13684 ns P2(a&&b):: C = 1 +13686 ns P1(a||b):: C = 0 +13686 ns P2(a||b):: C = 1 +13690 ns P1(a&&b):: C = 0 +13690 ns P2(a&&b):: C = 1 +13692 ns P1(a||b):: C = 1 +13692 ns P2(a||b):: C = 0 +13696 ns P1(a&&b):: C = 0 +13696 ns P2(a&&b):: C = 1 +13698 ns P1(a||b):: C = 0 +13698 ns P2(a||b):: C = 1 +13702 ns P1(a&&b):: C = 0 +13702 ns P2(a&&b):: C = 1 +13704 ns P1(a||b):: C = 1 +13704 ns P2(a||b):: C = 0 +13708 ns P1(a&&b):: C = 0 +13708 ns P2(a&&b):: C = 1 +13710 ns P1(a||b):: C = 1 +13710 ns P2(a||b):: C = 0 +13714 ns P1(a&&b):: C = 0 +13714 ns P2(a&&b):: C = 1 +13716 ns P1(a||b):: C = 1 +13716 ns P2(a||b):: C = 0 +13720 ns P1(a&&b):: C = 0 +13720 ns P2(a&&b):: C = 1 +13722 ns P1(a||b):: C = 1 +13722 ns P2(a||b):: C = 0 +13726 ns P1(a&&b):: C = 0 +13726 ns P2(a&&b):: C = 1 +13728 ns P1(a||b):: C = 1 +13728 ns P2(a||b):: C = 0 +13732 ns P1(a&&b):: C = 1 +13732 ns P2(a&&b):: C = 0 +13734 ns P1(a||b):: C = 1 +13734 ns P2(a||b):: C = 0 +13738 ns P1(a&&b):: C = 1 +13738 ns P2(a&&b):: C = 0 +13740 ns P1(a||b):: C = 0 +13740 ns P2(a||b):: C = 1 +13744 ns P1(a&&b):: C = 0 +13744 ns P2(a&&b):: C = 1 +13746 ns P1(a||b):: C = 1 +13746 ns P2(a||b):: C = 0 +13750 ns P1(a&&b):: C = 0 +13750 ns P2(a&&b):: C = 1 +13752 ns P1(a||b):: C = 1 +13752 ns P2(a||b):: C = 0 +13756 ns P1(a&&b):: C = 0 +13756 ns P2(a&&b):: C = 1 +13758 ns P1(a||b):: C = 1 +13758 ns P2(a||b):: C = 0 +13762 ns P1(a&&b):: C = 1 +13762 ns P2(a&&b):: C = 0 +13764 ns P1(a||b):: C = 0 +13764 ns P2(a||b):: C = 1 +13768 ns P1(a&&b):: C = 0 +13768 ns P2(a&&b):: C = 1 +13770 ns P1(a||b):: C = 1 +13770 ns P2(a||b):: C = 0 +13774 ns P1(a&&b):: C = 0 +13774 ns P2(a&&b):: C = 1 +13776 ns P1(a||b):: C = 1 +13776 ns P2(a||b):: C = 0 +13780 ns P1(a&&b):: C = 0 +13780 ns P2(a&&b):: C = 1 +13782 ns P1(a||b):: C = 1 +13782 ns P2(a||b):: C = 0 +13786 ns P1(a&&b):: C = 0 +13786 ns P2(a&&b):: C = 1 +13788 ns P1(a||b):: C = 1 +13788 ns P2(a||b):: C = 0 +13792 ns P1(a&&b):: C = 0 +13792 ns P2(a&&b):: C = 1 +13794 ns P1(a||b):: C = 0 +13794 ns P2(a||b):: C = 1 +13798 ns P1(a&&b):: C = 1 +13798 ns P2(a&&b):: C = 0 +13800 ns P1(a||b):: C = 1 +13800 ns P2(a||b):: C = 0 +13804 ns P1(a&&b):: C = 0 +13804 ns P2(a&&b):: C = 1 +13806 ns P1(a||b):: C = 1 +13806 ns P2(a||b):: C = 0 +13810 ns P1(a&&b):: C = 0 +13810 ns P2(a&&b):: C = 1 +13812 ns P1(a||b):: C = 1 +13812 ns P2(a||b):: C = 0 +13816 ns P1(a&&b):: C = 0 +13816 ns P2(a&&b):: C = 1 +13818 ns P1(a||b):: C = 0 +13818 ns P2(a||b):: C = 1 +13822 ns P1(a&&b):: C = 0 +13822 ns P2(a&&b):: C = 1 +13824 ns P1(a||b):: C = 0 +13824 ns P2(a||b):: C = 1 +13828 ns P1(a&&b):: C = 0 +13828 ns P2(a&&b):: C = 1 +13830 ns P1(a||b):: C = 0 +13830 ns P2(a||b):: C = 1 +13834 ns P1(a&&b):: C = 0 +13834 ns P2(a&&b):: C = 1 +13836 ns P1(a||b):: C = 0 +13836 ns P2(a||b):: C = 1 +13840 ns P1(a&&b):: C = 0 +13840 ns P2(a&&b):: C = 1 +13842 ns P1(a||b):: C = 1 +13842 ns P2(a||b):: C = 0 +13846 ns P1(a&&b):: C = 0 +13846 ns P2(a&&b):: C = 1 +13848 ns P1(a||b):: C = 1 +13848 ns P2(a||b):: C = 0 +13852 ns P1(a&&b):: C = 1 +13852 ns P2(a&&b):: C = 0 +13854 ns P1(a||b):: C = 1 +13854 ns P2(a||b):: C = 0 +13858 ns P1(a&&b):: C = 0 +13858 ns P2(a&&b):: C = 1 +13860 ns P1(a||b):: C = 0 +13860 ns P2(a||b):: C = 1 +13864 ns P1(a&&b):: C = 0 +13864 ns P2(a&&b):: C = 1 +13866 ns P1(a||b):: C = 1 +13866 ns P2(a||b):: C = 0 +13870 ns P1(a&&b):: C = 0 +13870 ns P2(a&&b):: C = 1 +13872 ns P1(a||b):: C = 0 +13872 ns P2(a||b):: C = 1 +13876 ns P1(a&&b):: C = 0 +13876 ns P2(a&&b):: C = 1 +13878 ns P1(a||b):: C = 1 +13878 ns P2(a||b):: C = 0 +13882 ns P1(a&&b):: C = 1 +13882 ns P2(a&&b):: C = 0 +13884 ns P1(a||b):: C = 1 +13884 ns P2(a||b):: C = 0 +13888 ns P1(a&&b):: C = 0 +13888 ns P2(a&&b):: C = 1 +13890 ns P1(a||b):: C = 0 +13890 ns P2(a||b):: C = 1 +13894 ns P1(a&&b):: C = 0 +13894 ns P2(a&&b):: C = 1 +13896 ns P1(a||b):: C = 1 +13896 ns P2(a||b):: C = 0 +13900 ns P1(a&&b):: C = 1 +13900 ns P2(a&&b):: C = 0 +13902 ns P1(a||b):: C = 1 +13902 ns P2(a||b):: C = 0 +13906 ns P1(a&&b):: C = 0 +13906 ns P2(a&&b):: C = 1 +13908 ns P1(a||b):: C = 0 +13908 ns P2(a||b):: C = 1 +13912 ns P1(a&&b):: C = 0 +13912 ns P2(a&&b):: C = 1 +13914 ns P1(a||b):: C = 1 +13914 ns P2(a||b):: C = 0 +13918 ns P1(a&&b):: C = 0 +13918 ns P2(a&&b):: C = 1 +13920 ns P1(a||b):: C = 0 +13920 ns P2(a||b):: C = 1 +13924 ns P1(a&&b):: C = 0 +13924 ns P2(a&&b):: C = 1 +13926 ns P1(a||b):: C = 1 +13926 ns P2(a||b):: C = 0 +13930 ns P1(a&&b):: C = 1 +13930 ns P2(a&&b):: C = 0 +13932 ns P1(a||b):: C = 1 +13932 ns P2(a||b):: C = 0 +13936 ns P1(a&&b):: C = 0 +13936 ns P2(a&&b):: C = 1 +13938 ns P1(a||b):: C = 1 +13938 ns P2(a||b):: C = 0 +13942 ns P1(a&&b):: C = 0 +13942 ns P2(a&&b):: C = 1 +13944 ns P1(a||b):: C = 1 +13944 ns P2(a||b):: C = 0 +13948 ns P1(a&&b):: C = 0 +13948 ns P2(a&&b):: C = 1 +13950 ns P1(a||b):: C = 0 +13950 ns P2(a||b):: C = 1 +13954 ns P1(a&&b):: C = 1 +13954 ns P2(a&&b):: C = 0 +13956 ns P1(a||b):: C = 1 +13956 ns P2(a||b):: C = 0 +13960 ns P1(a&&b):: C = 1 +13960 ns P2(a&&b):: C = 0 +13962 ns P1(a||b):: C = 1 +13962 ns P2(a||b):: C = 0 +13966 ns P1(a&&b):: C = 0 +13966 ns P2(a&&b):: C = 1 +13968 ns P1(a||b):: C = 1 +13968 ns P2(a||b):: C = 0 +13972 ns P1(a&&b):: C = 0 +13972 ns P2(a&&b):: C = 1 +13974 ns P1(a||b):: C = 0 +13974 ns P2(a||b):: C = 1 +13978 ns P1(a&&b):: C = 0 +13978 ns P2(a&&b):: C = 1 +13980 ns P1(a||b):: C = 1 +13980 ns P2(a||b):: C = 0 +13984 ns P1(a&&b):: C = 1 +13984 ns P2(a&&b):: C = 0 +13986 ns P1(a||b):: C = 1 +13986 ns P2(a||b):: C = 0 +13990 ns P1(a&&b):: C = 0 +13990 ns P2(a&&b):: C = 1 +13992 ns P1(a||b):: C = 1 +13992 ns P2(a||b):: C = 0 +13996 ns P1(a&&b):: C = 0 +13996 ns P2(a&&b):: C = 1 +13998 ns P1(a||b):: C = 1 +13998 ns P2(a||b):: C = 0 +14002 ns P1(a&&b):: C = 1 +14002 ns P2(a&&b):: C = 0 +14004 ns P1(a||b):: C = 1 +14004 ns P2(a||b):: C = 0 +14008 ns P1(a&&b):: C = 1 +14008 ns P2(a&&b):: C = 0 +14010 ns P1(a||b):: C = 1 +14010 ns P2(a||b):: C = 0 +14014 ns P1(a&&b):: C = 1 +14014 ns P2(a&&b):: C = 0 +14016 ns P1(a||b):: C = 1 +14016 ns P2(a||b):: C = 0 +14020 ns P1(a&&b):: C = 0 +14020 ns P2(a&&b):: C = 1 +14022 ns P1(a||b):: C = 1 +14022 ns P2(a||b):: C = 0 +14026 ns P1(a&&b):: C = 0 +14026 ns P2(a&&b):: C = 1 +14028 ns P1(a||b):: C = 1 +14028 ns P2(a||b):: C = 0 +14032 ns P1(a&&b):: C = 0 +14032 ns P2(a&&b):: C = 1 +14034 ns P1(a||b):: C = 1 +14034 ns P2(a||b):: C = 0 +14038 ns P1(a&&b):: C = 0 +14038 ns P2(a&&b):: C = 1 +14040 ns P1(a||b):: C = 1 +14040 ns P2(a||b):: C = 0 +14044 ns P1(a&&b):: C = 0 +14044 ns P2(a&&b):: C = 1 +14046 ns P1(a||b):: C = 1 +14046 ns P2(a||b):: C = 0 +14050 ns P1(a&&b):: C = 0 +14050 ns P2(a&&b):: C = 1 +14052 ns P1(a||b):: C = 1 +14052 ns P2(a||b):: C = 0 +14056 ns P1(a&&b):: C = 0 +14056 ns P2(a&&b):: C = 1 +14058 ns P1(a||b):: C = 1 +14058 ns P2(a||b):: C = 0 +14062 ns P1(a&&b):: C = 0 +14062 ns P2(a&&b):: C = 1 +14064 ns P1(a||b):: C = 0 +14064 ns P2(a||b):: C = 1 +14068 ns P1(a&&b):: C = 0 +14068 ns P2(a&&b):: C = 1 +14070 ns P1(a||b):: C = 1 +14070 ns P2(a||b):: C = 0 +14074 ns P1(a&&b):: C = 0 +14074 ns P2(a&&b):: C = 1 +14076 ns P1(a||b):: C = 1 +14076 ns P2(a||b):: C = 0 +14080 ns P1(a&&b):: C = 0 +14080 ns P2(a&&b):: C = 1 +14082 ns P1(a||b):: C = 1 +14082 ns P2(a||b):: C = 0 +14086 ns P1(a&&b):: C = 1 +14086 ns P2(a&&b):: C = 0 +14088 ns P1(a||b):: C = 1 +14088 ns P2(a||b):: C = 0 +14092 ns P1(a&&b):: C = 0 +14092 ns P2(a&&b):: C = 1 +14094 ns P1(a||b):: C = 1 +14094 ns P2(a||b):: C = 0 +14098 ns P1(a&&b):: C = 1 +14098 ns P2(a&&b):: C = 0 +14100 ns P1(a||b):: C = 1 +14100 ns P2(a||b):: C = 0 +14104 ns P1(a&&b):: C = 1 +14104 ns P2(a&&b):: C = 0 +14106 ns P1(a||b):: C = 1 +14106 ns P2(a||b):: C = 0 +14110 ns P1(a&&b):: C = 1 +14110 ns P2(a&&b):: C = 0 +14112 ns P1(a||b):: C = 0 +14112 ns P2(a||b):: C = 1 +14116 ns P1(a&&b):: C = 0 +14116 ns P2(a&&b):: C = 1 +14118 ns P1(a||b):: C = 1 +14118 ns P2(a||b):: C = 0 +14122 ns P1(a&&b):: C = 0 +14122 ns P2(a&&b):: C = 1 +14124 ns P1(a||b):: C = 1 +14124 ns P2(a||b):: C = 0 +14128 ns P1(a&&b):: C = 1 +14128 ns P2(a&&b):: C = 0 +14130 ns P1(a||b):: C = 1 +14130 ns P2(a||b):: C = 0 +14134 ns P1(a&&b):: C = 0 +14134 ns P2(a&&b):: C = 1 +14136 ns P1(a||b):: C = 1 +14136 ns P2(a||b):: C = 0 +14140 ns P1(a&&b):: C = 0 +14140 ns P2(a&&b):: C = 1 +14142 ns P1(a||b):: C = 1 +14142 ns P2(a||b):: C = 0 +14146 ns P1(a&&b):: C = 0 +14146 ns P2(a&&b):: C = 1 +14148 ns P1(a||b):: C = 1 +14148 ns P2(a||b):: C = 0 +14152 ns P1(a&&b):: C = 0 +14152 ns P2(a&&b):: C = 1 +14154 ns P1(a||b):: C = 1 +14154 ns P2(a||b):: C = 0 +14158 ns P1(a&&b):: C = 0 +14158 ns P2(a&&b):: C = 1 +14160 ns P1(a||b):: C = 1 +14160 ns P2(a||b):: C = 0 +14164 ns P1(a&&b):: C = 1 +14164 ns P2(a&&b):: C = 0 +14166 ns P1(a||b):: C = 0 +14166 ns P2(a||b):: C = 1 +14170 ns P1(a&&b):: C = 0 +14170 ns P2(a&&b):: C = 1 +14172 ns P1(a||b):: C = 1 +14172 ns P2(a||b):: C = 0 +14176 ns P1(a&&b):: C = 1 +14176 ns P2(a&&b):: C = 0 +14178 ns P1(a||b):: C = 1 +14178 ns P2(a||b):: C = 0 +14182 ns P1(a&&b):: C = 0 +14182 ns P2(a&&b):: C = 1 +14184 ns P1(a||b):: C = 1 +14184 ns P2(a||b):: C = 0 +14188 ns P1(a&&b):: C = 1 +14188 ns P2(a&&b):: C = 0 +14190 ns P1(a||b):: C = 0 +14190 ns P2(a||b):: C = 1 +14194 ns P1(a&&b):: C = 0 +14194 ns P2(a&&b):: C = 1 +14196 ns P1(a||b):: C = 1 +14196 ns P2(a||b):: C = 0 +14200 ns P1(a&&b):: C = 0 +14200 ns P2(a&&b):: C = 1 +14202 ns P1(a||b):: C = 0 +14202 ns P2(a||b):: C = 1 +14206 ns P1(a&&b):: C = 1 +14206 ns P2(a&&b):: C = 0 +14208 ns P1(a||b):: C = 1 +14208 ns P2(a||b):: C = 0 +14212 ns P1(a&&b):: C = 0 +14212 ns P2(a&&b):: C = 1 +14214 ns P1(a||b):: C = 0 +14214 ns P2(a||b):: C = 1 +14218 ns P1(a&&b):: C = 0 +14218 ns P2(a&&b):: C = 1 +14220 ns P1(a||b):: C = 1 +14220 ns P2(a||b):: C = 0 +14224 ns P1(a&&b):: C = 1 +14224 ns P2(a&&b):: C = 0 +14226 ns P1(a||b):: C = 1 +14226 ns P2(a||b):: C = 0 +14230 ns P1(a&&b):: C = 0 +14230 ns P2(a&&b):: C = 1 +14232 ns P1(a||b):: C = 1 +14232 ns P2(a||b):: C = 0 +14236 ns P1(a&&b):: C = 1 +14236 ns P2(a&&b):: C = 0 +14238 ns P1(a||b):: C = 0 +14238 ns P2(a||b):: C = 1 +14242 ns P1(a&&b):: C = 1 +14242 ns P2(a&&b):: C = 0 +14244 ns P1(a||b):: C = 1 +14244 ns P2(a||b):: C = 0 +14248 ns P1(a&&b):: C = 0 +14248 ns P2(a&&b):: C = 1 +14250 ns P1(a||b):: C = 1 +14250 ns P2(a||b):: C = 0 +14254 ns P1(a&&b):: C = 0 +14254 ns P2(a&&b):: C = 1 +14256 ns P1(a||b):: C = 1 +14256 ns P2(a||b):: C = 0 +14260 ns P1(a&&b):: C = 0 +14260 ns P2(a&&b):: C = 1 +14262 ns P1(a||b):: C = 1 +14262 ns P2(a||b):: C = 0 +14266 ns P1(a&&b):: C = 0 +14266 ns P2(a&&b):: C = 1 +14268 ns P1(a||b):: C = 1 +14268 ns P2(a||b):: C = 0 +14272 ns P1(a&&b):: C = 1 +14272 ns P2(a&&b):: C = 0 +14274 ns P1(a||b):: C = 1 +14274 ns P2(a||b):: C = 0 +14278 ns P1(a&&b):: C = 0 +14278 ns P2(a&&b):: C = 1 +14280 ns P1(a||b):: C = 1 +14280 ns P2(a||b):: C = 0 +14284 ns P1(a&&b):: C = 0 +14284 ns P2(a&&b):: C = 1 +14286 ns P1(a||b):: C = 1 +14286 ns P2(a||b):: C = 0 +14290 ns P1(a&&b):: C = 1 +14290 ns P2(a&&b):: C = 0 +14292 ns P1(a||b):: C = 1 +14292 ns P2(a||b):: C = 0 +14296 ns P1(a&&b):: C = 0 +14296 ns P2(a&&b):: C = 1 +14298 ns P1(a||b):: C = 1 +14298 ns P2(a||b):: C = 0 +14302 ns P1(a&&b):: C = 0 +14302 ns P2(a&&b):: C = 1 +14304 ns P1(a||b):: C = 0 +14304 ns P2(a||b):: C = 1 +14308 ns P1(a&&b):: C = 0 +14308 ns P2(a&&b):: C = 1 +14310 ns P1(a||b):: C = 0 +14310 ns P2(a||b):: C = 1 +14314 ns P1(a&&b):: C = 0 +14314 ns P2(a&&b):: C = 1 +14316 ns P1(a||b):: C = 0 +14316 ns P2(a||b):: C = 1 +14320 ns P1(a&&b):: C = 0 +14320 ns P2(a&&b):: C = 1 +14322 ns P1(a||b):: C = 1 +14322 ns P2(a||b):: C = 0 +14326 ns P1(a&&b):: C = 0 +14326 ns P2(a&&b):: C = 1 +14328 ns P1(a||b):: C = 1 +14328 ns P2(a||b):: C = 0 +14332 ns P1(a&&b):: C = 1 +14332 ns P2(a&&b):: C = 0 +14334 ns P1(a||b):: C = 0 +14334 ns P2(a||b):: C = 1 +14338 ns P1(a&&b):: C = 0 +14338 ns P2(a&&b):: C = 1 +14340 ns P1(a||b):: C = 1 +14340 ns P2(a||b):: C = 0 +14344 ns P1(a&&b):: C = 0 +14344 ns P2(a&&b):: C = 1 +14346 ns P1(a||b):: C = 1 +14346 ns P2(a||b):: C = 0 +14350 ns P1(a&&b):: C = 0 +14350 ns P2(a&&b):: C = 1 +14352 ns P1(a||b):: C = 1 +14352 ns P2(a||b):: C = 0 +14356 ns P1(a&&b):: C = 0 +14356 ns P2(a&&b):: C = 1 +14358 ns P1(a||b):: C = 0 +14358 ns P2(a||b):: C = 1 +14362 ns P1(a&&b):: C = 1 +14362 ns P2(a&&b):: C = 0 +14364 ns P1(a||b):: C = 0 +14364 ns P2(a||b):: C = 1 +14368 ns P1(a&&b):: C = 0 +14368 ns P2(a&&b):: C = 1 +14370 ns P1(a||b):: C = 1 +14370 ns P2(a||b):: C = 0 +14374 ns P1(a&&b):: C = 0 +14374 ns P2(a&&b):: C = 1 +14376 ns P1(a||b):: C = 1 +14376 ns P2(a||b):: C = 0 +14380 ns P1(a&&b):: C = 0 +14380 ns P2(a&&b):: C = 1 +14382 ns P1(a||b):: C = 1 +14382 ns P2(a||b):: C = 0 +14386 ns P1(a&&b):: C = 0 +14386 ns P2(a&&b):: C = 1 +14388 ns P1(a||b):: C = 1 +14388 ns P2(a||b):: C = 0 +14392 ns P1(a&&b):: C = 1 +14392 ns P2(a&&b):: C = 0 +14394 ns P1(a||b):: C = 1 +14394 ns P2(a||b):: C = 0 +14398 ns P1(a&&b):: C = 0 +14398 ns P2(a&&b):: C = 1 +14400 ns P1(a||b):: C = 1 +14400 ns P2(a||b):: C = 0 +14404 ns P1(a&&b):: C = 0 +14404 ns P2(a&&b):: C = 1 +14406 ns P1(a||b):: C = 0 +14406 ns P2(a||b):: C = 1 +14410 ns P1(a&&b):: C = 1 +14410 ns P2(a&&b):: C = 0 +14412 ns P1(a||b):: C = 1 +14412 ns P2(a||b):: C = 0 +14416 ns P1(a&&b):: C = 0 +14416 ns P2(a&&b):: C = 1 +14418 ns P1(a||b):: C = 1 +14418 ns P2(a||b):: C = 0 +14422 ns P1(a&&b):: C = 1 +14422 ns P2(a&&b):: C = 0 +14424 ns P1(a||b):: C = 1 +14424 ns P2(a||b):: C = 0 +14428 ns P1(a&&b):: C = 0 +14428 ns P2(a&&b):: C = 1 +14430 ns P1(a||b):: C = 1 +14430 ns P2(a||b):: C = 0 +14434 ns P1(a&&b):: C = 0 +14434 ns P2(a&&b):: C = 1 +14436 ns P1(a||b):: C = 1 +14436 ns P2(a||b):: C = 0 +14440 ns P1(a&&b):: C = 0 +14440 ns P2(a&&b):: C = 1 +14442 ns P1(a||b):: C = 1 +14442 ns P2(a||b):: C = 0 +14446 ns P1(a&&b):: C = 1 +14446 ns P2(a&&b):: C = 0 +14448 ns P1(a||b):: C = 1 +14448 ns P2(a||b):: C = 0 +14452 ns P1(a&&b):: C = 0 +14452 ns P2(a&&b):: C = 1 +14454 ns P1(a||b):: C = 1 +14454 ns P2(a||b):: C = 0 +14458 ns P1(a&&b):: C = 0 +14458 ns P2(a&&b):: C = 1 +14460 ns P1(a||b):: C = 1 +14460 ns P2(a||b):: C = 0 +14464 ns P1(a&&b):: C = 0 +14464 ns P2(a&&b):: C = 1 +14466 ns P1(a||b):: C = 1 +14466 ns P2(a||b):: C = 0 +14470 ns P1(a&&b):: C = 0 +14470 ns P2(a&&b):: C = 1 +14472 ns P1(a||b):: C = 1 +14472 ns P2(a||b):: C = 0 +14476 ns P1(a&&b):: C = 0 +14476 ns P2(a&&b):: C = 1 +14478 ns P1(a||b):: C = 1 +14478 ns P2(a||b):: C = 0 +14482 ns P1(a&&b):: C = 1 +14482 ns P2(a&&b):: C = 0 +14484 ns P1(a||b):: C = 1 +14484 ns P2(a||b):: C = 0 +14488 ns P1(a&&b):: C = 1 +14488 ns P2(a&&b):: C = 0 +14490 ns P1(a||b):: C = 1 +14490 ns P2(a||b):: C = 0 +14494 ns P1(a&&b):: C = 0 +14494 ns P2(a&&b):: C = 1 +14496 ns P1(a||b):: C = 0 +14496 ns P2(a||b):: C = 1 +14500 ns P1(a&&b):: C = 0 +14500 ns P2(a&&b):: C = 1 +14502 ns P1(a||b):: C = 0 +14502 ns P2(a||b):: C = 1 +14506 ns P1(a&&b):: C = 0 +14506 ns P2(a&&b):: C = 1 +14508 ns P1(a||b):: C = 1 +14508 ns P2(a||b):: C = 0 +14512 ns P1(a&&b):: C = 0 +14512 ns P2(a&&b):: C = 1 +14514 ns P1(a||b):: C = 1 +14514 ns P2(a||b):: C = 0 +14518 ns P1(a&&b):: C = 0 +14518 ns P2(a&&b):: C = 1 +14520 ns P1(a||b):: C = 1 +14520 ns P2(a||b):: C = 0 +14524 ns P1(a&&b):: C = 0 +14524 ns P2(a&&b):: C = 1 +14526 ns P1(a||b):: C = 1 +14526 ns P2(a||b):: C = 0 +14530 ns P1(a&&b):: C = 0 +14530 ns P2(a&&b):: C = 1 +14532 ns P1(a||b):: C = 1 +14532 ns P2(a||b):: C = 0 +14536 ns P1(a&&b):: C = 0 +14536 ns P2(a&&b):: C = 1 +14538 ns P1(a||b):: C = 1 +14538 ns P2(a||b):: C = 0 +14542 ns P1(a&&b):: C = 1 +14542 ns P2(a&&b):: C = 0 +14544 ns P1(a||b):: C = 1 +14544 ns P2(a||b):: C = 0 +14548 ns P1(a&&b):: C = 0 +14548 ns P2(a&&b):: C = 1 +14550 ns P1(a||b):: C = 1 +14550 ns P2(a||b):: C = 0 +14554 ns P1(a&&b):: C = 0 +14554 ns P2(a&&b):: C = 1 +14556 ns P1(a||b):: C = 0 +14556 ns P2(a||b):: C = 1 +14560 ns P1(a&&b):: C = 1 +14560 ns P2(a&&b):: C = 0 +14562 ns P1(a||b):: C = 1 +14562 ns P2(a||b):: C = 0 +14566 ns P1(a&&b):: C = 1 +14566 ns P2(a&&b):: C = 0 +14568 ns P1(a||b):: C = 1 +14568 ns P2(a||b):: C = 0 +14572 ns P1(a&&b):: C = 1 +14572 ns P2(a&&b):: C = 0 +14574 ns P1(a||b):: C = 1 +14574 ns P2(a||b):: C = 0 +14578 ns P1(a&&b):: C = 0 +14578 ns P2(a&&b):: C = 1 +14580 ns P1(a||b):: C = 1 +14580 ns P2(a||b):: C = 0 +14584 ns P1(a&&b):: C = 0 +14584 ns P2(a&&b):: C = 1 +14586 ns P1(a||b):: C = 0 +14586 ns P2(a||b):: C = 1 +14590 ns P1(a&&b):: C = 0 +14590 ns P2(a&&b):: C = 1 +14592 ns P1(a||b):: C = 1 +14592 ns P2(a||b):: C = 0 +14596 ns P1(a&&b):: C = 0 +14596 ns P2(a&&b):: C = 1 +14598 ns P1(a||b):: C = 1 +14598 ns P2(a||b):: C = 0 +14602 ns P1(a&&b):: C = 0 +14602 ns P2(a&&b):: C = 1 +14604 ns P1(a||b):: C = 0 +14604 ns P2(a||b):: C = 1 +14608 ns P1(a&&b):: C = 0 +14608 ns P2(a&&b):: C = 1 +14610 ns P1(a||b):: C = 1 +14610 ns P2(a||b):: C = 0 +14614 ns P1(a&&b):: C = 0 +14614 ns P2(a&&b):: C = 1 +14616 ns P1(a||b):: C = 1 +14616 ns P2(a||b):: C = 0 +14620 ns P1(a&&b):: C = 0 +14620 ns P2(a&&b):: C = 1 +14622 ns P1(a||b):: C = 1 +14622 ns P2(a||b):: C = 0 +14626 ns P1(a&&b):: C = 0 +14626 ns P2(a&&b):: C = 1 +14628 ns P1(a||b):: C = 1 +14628 ns P2(a||b):: C = 0 +14632 ns P1(a&&b):: C = 0 +14632 ns P2(a&&b):: C = 1 +14634 ns P1(a||b):: C = 1 +14634 ns P2(a||b):: C = 0 +14638 ns P1(a&&b):: C = 0 +14638 ns P2(a&&b):: C = 1 +14640 ns P1(a||b):: C = 0 +14640 ns P2(a||b):: C = 1 +14644 ns P1(a&&b):: C = 0 +14644 ns P2(a&&b):: C = 1 +14646 ns P1(a||b):: C = 0 +14646 ns P2(a||b):: C = 1 +14650 ns P1(a&&b):: C = 0 +14650 ns P2(a&&b):: C = 1 +14652 ns P1(a||b):: C = 1 +14652 ns P2(a||b):: C = 0 +14656 ns P1(a&&b):: C = 0 +14656 ns P2(a&&b):: C = 1 +14658 ns P1(a||b):: C = 1 +14658 ns P2(a||b):: C = 0 +14662 ns P1(a&&b):: C = 0 +14662 ns P2(a&&b):: C = 1 +14664 ns P1(a||b):: C = 1 +14664 ns P2(a||b):: C = 0 +14668 ns P1(a&&b):: C = 0 +14668 ns P2(a&&b):: C = 1 +14670 ns P1(a||b):: C = 1 +14670 ns P2(a||b):: C = 0 +14674 ns P1(a&&b):: C = 0 +14674 ns P2(a&&b):: C = 1 +14676 ns P1(a||b):: C = 1 +14676 ns P2(a||b):: C = 0 +14680 ns P1(a&&b):: C = 0 +14680 ns P2(a&&b):: C = 1 +14682 ns P1(a||b):: C = 1 +14682 ns P2(a||b):: C = 0 +14686 ns P1(a&&b):: C = 1 +14686 ns P2(a&&b):: C = 0 +14688 ns P1(a||b):: C = 1 +14688 ns P2(a||b):: C = 0 +14692 ns P1(a&&b):: C = 0 +14692 ns P2(a&&b):: C = 1 +14694 ns P1(a||b):: C = 1 +14694 ns P2(a||b):: C = 0 +14698 ns P1(a&&b):: C = 0 +14698 ns P2(a&&b):: C = 1 +14700 ns P1(a||b):: C = 0 +14700 ns P2(a||b):: C = 1 +14704 ns P1(a&&b):: C = 0 +14704 ns P2(a&&b):: C = 1 +14706 ns P1(a||b):: C = 1 +14706 ns P2(a||b):: C = 0 +14710 ns P1(a&&b):: C = 0 +14710 ns P2(a&&b):: C = 1 +14712 ns P1(a||b):: C = 1 +14712 ns P2(a||b):: C = 0 +14716 ns P1(a&&b):: C = 0 +14716 ns P2(a&&b):: C = 1 +14718 ns P1(a||b):: C = 1 +14718 ns P2(a||b):: C = 0 +14722 ns P1(a&&b):: C = 1 +14722 ns P2(a&&b):: C = 0 +14724 ns P1(a||b):: C = 1 +14724 ns P2(a||b):: C = 0 +14728 ns P1(a&&b):: C = 1 +14728 ns P2(a&&b):: C = 0 +14730 ns P1(a||b):: C = 0 +14730 ns P2(a||b):: C = 1 +14734 ns P1(a&&b):: C = 0 +14734 ns P2(a&&b):: C = 1 +14736 ns P1(a||b):: C = 1 +14736 ns P2(a||b):: C = 0 +14740 ns P1(a&&b):: C = 0 +14740 ns P2(a&&b):: C = 1 +14742 ns P1(a||b):: C = 1 +14742 ns P2(a||b):: C = 0 +14746 ns P1(a&&b):: C = 0 +14746 ns P2(a&&b):: C = 1 +14748 ns P1(a||b):: C = 1 +14748 ns P2(a||b):: C = 0 +14752 ns P1(a&&b):: C = 0 +14752 ns P2(a&&b):: C = 1 +14754 ns P1(a||b):: C = 1 +14754 ns P2(a||b):: C = 0 +14758 ns P1(a&&b):: C = 1 +14758 ns P2(a&&b):: C = 0 +14760 ns P1(a||b):: C = 0 +14760 ns P2(a||b):: C = 1 +14764 ns P1(a&&b):: C = 1 +14764 ns P2(a&&b):: C = 0 +14766 ns P1(a||b):: C = 1 +14766 ns P2(a||b):: C = 0 +14770 ns P1(a&&b):: C = 0 +14770 ns P2(a&&b):: C = 1 +14772 ns P1(a||b):: C = 0 +14772 ns P2(a||b):: C = 1 +14776 ns P1(a&&b):: C = 0 +14776 ns P2(a&&b):: C = 1 +14778 ns P1(a||b):: C = 1 +14778 ns P2(a||b):: C = 0 +14782 ns P1(a&&b):: C = 0 +14782 ns P2(a&&b):: C = 1 +14784 ns P1(a||b):: C = 0 +14784 ns P2(a||b):: C = 1 +14788 ns P1(a&&b):: C = 1 +14788 ns P2(a&&b):: C = 0 +14790 ns P1(a||b):: C = 1 +14790 ns P2(a||b):: C = 0 +14794 ns P1(a&&b):: C = 1 +14794 ns P2(a&&b):: C = 0 +14796 ns P1(a||b):: C = 1 +14796 ns P2(a||b):: C = 0 +14800 ns P1(a&&b):: C = 0 +14800 ns P2(a&&b):: C = 1 +14802 ns P1(a||b):: C = 1 +14802 ns P2(a||b):: C = 0 +14806 ns P1(a&&b):: C = 1 +14806 ns P2(a&&b):: C = 0 +14808 ns P1(a||b):: C = 1 +14808 ns P2(a||b):: C = 0 +14812 ns P1(a&&b):: C = 0 +14812 ns P2(a&&b):: C = 1 +14814 ns P1(a||b):: C = 1 +14814 ns P2(a||b):: C = 0 +14818 ns P1(a&&b):: C = 0 +14818 ns P2(a&&b):: C = 1 +14820 ns P1(a||b):: C = 1 +14820 ns P2(a||b):: C = 0 +14824 ns P1(a&&b):: C = 1 +14824 ns P2(a&&b):: C = 0 +14826 ns P1(a||b):: C = 1 +14826 ns P2(a||b):: C = 0 +14830 ns P1(a&&b):: C = 1 +14830 ns P2(a&&b):: C = 0 +14832 ns P1(a||b):: C = 1 +14832 ns P2(a||b):: C = 0 +14836 ns P1(a&&b):: C = 0 +14836 ns P2(a&&b):: C = 1 +14838 ns P1(a||b):: C = 1 +14838 ns P2(a||b):: C = 0 +14842 ns P1(a&&b):: C = 0 +14842 ns P2(a&&b):: C = 1 +14844 ns P1(a||b):: C = 0 +14844 ns P2(a||b):: C = 1 +14848 ns P1(a&&b):: C = 1 +14848 ns P2(a&&b):: C = 0 +14850 ns P1(a||b):: C = 1 +14850 ns P2(a||b):: C = 0 +14854 ns P1(a&&b):: C = 1 +14854 ns P2(a&&b):: C = 0 +14856 ns P1(a||b):: C = 1 +14856 ns P2(a||b):: C = 0 +14860 ns P1(a&&b):: C = 0 +14860 ns P2(a&&b):: C = 1 +14862 ns P1(a||b):: C = 0 +14862 ns P2(a||b):: C = 1 +14866 ns P1(a&&b):: C = 0 +14866 ns P2(a&&b):: C = 1 +14868 ns P1(a||b):: C = 1 +14868 ns P2(a||b):: C = 0 +14872 ns P1(a&&b):: C = 0 +14872 ns P2(a&&b):: C = 1 +14874 ns P1(a||b):: C = 1 +14874 ns P2(a||b):: C = 0 +14878 ns P1(a&&b):: C = 0 +14878 ns P2(a&&b):: C = 1 +14880 ns P1(a||b):: C = 1 +14880 ns P2(a||b):: C = 0 +14884 ns P1(a&&b):: C = 0 +14884 ns P2(a&&b):: C = 1 +14886 ns P1(a||b):: C = 1 +14886 ns P2(a||b):: C = 0 +14890 ns P1(a&&b):: C = 0 +14890 ns P2(a&&b):: C = 1 +14892 ns P1(a||b):: C = 1 +14892 ns P2(a||b):: C = 0 +14896 ns P1(a&&b):: C = 0 +14896 ns P2(a&&b):: C = 1 +14898 ns P1(a||b):: C = 1 +14898 ns P2(a||b):: C = 0 +14902 ns P1(a&&b):: C = 0 +14902 ns P2(a&&b):: C = 1 +14904 ns P1(a||b):: C = 1 +14904 ns P2(a||b):: C = 0 +14908 ns P1(a&&b):: C = 1 +14908 ns P2(a&&b):: C = 0 +14910 ns P1(a||b):: C = 1 +14910 ns P2(a||b):: C = 0 +14914 ns P1(a&&b):: C = 1 +14914 ns P2(a&&b):: C = 0 +14916 ns P1(a||b):: C = 1 +14916 ns P2(a||b):: C = 0 +14920 ns P1(a&&b):: C = 0 +14920 ns P2(a&&b):: C = 1 +14922 ns P1(a||b):: C = 1 +14922 ns P2(a||b):: C = 0 +14926 ns P1(a&&b):: C = 0 +14926 ns P2(a&&b):: C = 1 +14928 ns P1(a||b):: C = 1 +14928 ns P2(a||b):: C = 0 +14932 ns P1(a&&b):: C = 1 +14932 ns P2(a&&b):: C = 0 +14934 ns P1(a||b):: C = 0 +14934 ns P2(a||b):: C = 1 +14938 ns P1(a&&b):: C = 0 +14938 ns P2(a&&b):: C = 1 +14940 ns P1(a||b):: C = 1 +14940 ns P2(a||b):: C = 0 +14944 ns P1(a&&b):: C = 0 +14944 ns P2(a&&b):: C = 1 +14946 ns P1(a||b):: C = 1 +14946 ns P2(a||b):: C = 0 +14950 ns P1(a&&b):: C = 0 +14950 ns P2(a&&b):: C = 1 +14952 ns P1(a||b):: C = 1 +14952 ns P2(a||b):: C = 0 +14956 ns P1(a&&b):: C = 0 +14956 ns P2(a&&b):: C = 1 +14958 ns P1(a||b):: C = 1 +14958 ns P2(a||b):: C = 0 +14962 ns P1(a&&b):: C = 0 +14962 ns P2(a&&b):: C = 1 +14964 ns P1(a||b):: C = 1 +14964 ns P2(a||b):: C = 0 +14968 ns P1(a&&b):: C = 0 +14968 ns P2(a&&b):: C = 1 +14970 ns P1(a||b):: C = 1 +14970 ns P2(a||b):: C = 0 +14974 ns P1(a&&b):: C = 1 +14974 ns P2(a&&b):: C = 0 +14976 ns P1(a||b):: C = 1 +14976 ns P2(a||b):: C = 0 +14980 ns P1(a&&b):: C = 0 +14980 ns P2(a&&b):: C = 1 +14982 ns P1(a||b):: C = 0 +14982 ns P2(a||b):: C = 1 +14986 ns P1(a&&b):: C = 0 +14986 ns P2(a&&b):: C = 1 +14988 ns P1(a||b):: C = 0 +14988 ns P2(a||b):: C = 1 +14992 ns P1(a&&b):: C = 1 +14992 ns P2(a&&b):: C = 0 +14994 ns P1(a||b):: C = 1 +14994 ns P2(a||b):: C = 0 +14998 ns P1(a&&b):: C = 0 +14998 ns P2(a&&b):: C = 1 +15 us P1(a||b):: C = 0 +15 us P2(a||b):: C = 1 +15004 ns P1(a&&b):: C = 0 +15004 ns P2(a&&b):: C = 1 +15006 ns P1(a||b):: C = 0 +15006 ns P2(a||b):: C = 1 +15010 ns P1(a&&b):: C = 1 +15010 ns P2(a&&b):: C = 0 +15012 ns P1(a||b):: C = 1 +15012 ns P2(a||b):: C = 0 +15016 ns P1(a&&b):: C = 0 +15016 ns P2(a&&b):: C = 1 +15018 ns P1(a||b):: C = 0 +15018 ns P2(a||b):: C = 1 +15022 ns P1(a&&b):: C = 0 +15022 ns P2(a&&b):: C = 1 +15024 ns P1(a||b):: C = 1 +15024 ns P2(a||b):: C = 0 +15028 ns P1(a&&b):: C = 0 +15028 ns P2(a&&b):: C = 1 +15030 ns P1(a||b):: C = 0 +15030 ns P2(a||b):: C = 1 +15034 ns P1(a&&b):: C = 0 +15034 ns P2(a&&b):: C = 1 +15036 ns P1(a||b):: C = 0 +15036 ns P2(a||b):: C = 1 +15040 ns P1(a&&b):: C = 0 +15040 ns P2(a&&b):: C = 1 +15042 ns P1(a||b):: C = 0 +15042 ns P2(a||b):: C = 1 +15046 ns P1(a&&b):: C = 0 +15046 ns P2(a&&b):: C = 1 +15048 ns P1(a||b):: C = 1 +15048 ns P2(a||b):: C = 0 +15052 ns P1(a&&b):: C = 0 +15052 ns P2(a&&b):: C = 1 +15054 ns P1(a||b):: C = 1 +15054 ns P2(a||b):: C = 0 +15058 ns P1(a&&b):: C = 0 +15058 ns P2(a&&b):: C = 1 +15060 ns P1(a||b):: C = 1 +15060 ns P2(a||b):: C = 0 +15064 ns P1(a&&b):: C = 1 +15064 ns P2(a&&b):: C = 0 +15066 ns P1(a||b):: C = 1 +15066 ns P2(a||b):: C = 0 +15070 ns P1(a&&b):: C = 0 +15070 ns P2(a&&b):: C = 1 +15072 ns P1(a||b):: C = 1 +15072 ns P2(a||b):: C = 0 +15076 ns P1(a&&b):: C = 0 +15076 ns P2(a&&b):: C = 1 +15078 ns P1(a||b):: C = 1 +15078 ns P2(a||b):: C = 0 +15082 ns P1(a&&b):: C = 0 +15082 ns P2(a&&b):: C = 1 +15084 ns P1(a||b):: C = 1 +15084 ns P2(a||b):: C = 0 +15088 ns P1(a&&b):: C = 1 +15088 ns P2(a&&b):: C = 0 +15090 ns P1(a||b):: C = 1 +15090 ns P2(a||b):: C = 0 +15094 ns P1(a&&b):: C = 1 +15094 ns P2(a&&b):: C = 0 +15096 ns P1(a||b):: C = 0 +15096 ns P2(a||b):: C = 1 +15100 ns P1(a&&b):: C = 0 +15100 ns P2(a&&b):: C = 1 +15102 ns P1(a||b):: C = 1 +15102 ns P2(a||b):: C = 0 +15106 ns P1(a&&b):: C = 0 +15106 ns P2(a&&b):: C = 1 +15108 ns P1(a||b):: C = 1 +15108 ns P2(a||b):: C = 0 +15112 ns P1(a&&b):: C = 1 +15112 ns P2(a&&b):: C = 0 +15114 ns P1(a||b):: C = 1 +15114 ns P2(a||b):: C = 0 +15118 ns P1(a&&b):: C = 1 +15118 ns P2(a&&b):: C = 0 +15120 ns P1(a||b):: C = 0 +15120 ns P2(a||b):: C = 1 +15124 ns P1(a&&b):: C = 1 +15124 ns P2(a&&b):: C = 0 +15126 ns P1(a||b):: C = 1 +15126 ns P2(a||b):: C = 0 +15130 ns P1(a&&b):: C = 0 +15130 ns P2(a&&b):: C = 1 +15132 ns P1(a||b):: C = 0 +15132 ns P2(a||b):: C = 1 +15136 ns P1(a&&b):: C = 1 +15136 ns P2(a&&b):: C = 0 +15138 ns P1(a||b):: C = 1 +15138 ns P2(a||b):: C = 0 +15142 ns P1(a&&b):: C = 1 +15142 ns P2(a&&b):: C = 0 +15144 ns P1(a||b):: C = 0 +15144 ns P2(a||b):: C = 1 +15148 ns P1(a&&b):: C = 1 +15148 ns P2(a&&b):: C = 0 +15150 ns P1(a||b):: C = 1 +15150 ns P2(a||b):: C = 0 +15154 ns P1(a&&b):: C = 0 +15154 ns P2(a&&b):: C = 1 +15156 ns P1(a||b):: C = 0 +15156 ns P2(a||b):: C = 1 +15160 ns P1(a&&b):: C = 0 +15160 ns P2(a&&b):: C = 1 +15162 ns P1(a||b):: C = 1 +15162 ns P2(a||b):: C = 0 +15166 ns P1(a&&b):: C = 0 +15166 ns P2(a&&b):: C = 1 +15168 ns P1(a||b):: C = 1 +15168 ns P2(a||b):: C = 0 +15172 ns P1(a&&b):: C = 0 +15172 ns P2(a&&b):: C = 1 +15174 ns P1(a||b):: C = 1 +15174 ns P2(a||b):: C = 0 +15178 ns P1(a&&b):: C = 1 +15178 ns P2(a&&b):: C = 0 +15180 ns P1(a||b):: C = 0 +15180 ns P2(a||b):: C = 1 +15184 ns P1(a&&b):: C = 1 +15184 ns P2(a&&b):: C = 0 +15186 ns P1(a||b):: C = 1 +15186 ns P2(a||b):: C = 0 +15190 ns P1(a&&b):: C = 0 +15190 ns P2(a&&b):: C = 1 +15192 ns P1(a||b):: C = 1 +15192 ns P2(a||b):: C = 0 +15196 ns P1(a&&b):: C = 1 +15196 ns P2(a&&b):: C = 0 +15198 ns P1(a||b):: C = 1 +15198 ns P2(a||b):: C = 0 +15202 ns P1(a&&b):: C = 0 +15202 ns P2(a&&b):: C = 1 +15204 ns P1(a||b):: C = 1 +15204 ns P2(a||b):: C = 0 +15208 ns P1(a&&b):: C = 1 +15208 ns P2(a&&b):: C = 0 +15210 ns P1(a||b):: C = 1 +15210 ns P2(a||b):: C = 0 +15214 ns P1(a&&b):: C = 0 +15214 ns P2(a&&b):: C = 1 +15216 ns P1(a||b):: C = 1 +15216 ns P2(a||b):: C = 0 +15220 ns P1(a&&b):: C = 1 +15220 ns P2(a&&b):: C = 0 +15222 ns P1(a||b):: C = 1 +15222 ns P2(a||b):: C = 0 +15226 ns P1(a&&b):: C = 0 +15226 ns P2(a&&b):: C = 1 +15228 ns P1(a||b):: C = 1 +15228 ns P2(a||b):: C = 0 +15232 ns P1(a&&b):: C = 0 +15232 ns P2(a&&b):: C = 1 +15234 ns P1(a||b):: C = 1 +15234 ns P2(a||b):: C = 0 +15238 ns P1(a&&b):: C = 0 +15238 ns P2(a&&b):: C = 1 +15240 ns P1(a||b):: C = 1 +15240 ns P2(a||b):: C = 0 +15244 ns P1(a&&b):: C = 0 +15244 ns P2(a&&b):: C = 1 +15246 ns P1(a||b):: C = 1 +15246 ns P2(a||b):: C = 0 +15250 ns P1(a&&b):: C = 0 +15250 ns P2(a&&b):: C = 1 +15252 ns P1(a||b):: C = 0 +15252 ns P2(a||b):: C = 1 +15256 ns P1(a&&b):: C = 0 +15256 ns P2(a&&b):: C = 1 +15258 ns P1(a||b):: C = 0 +15258 ns P2(a||b):: C = 1 +15262 ns P1(a&&b):: C = 0 +15262 ns P2(a&&b):: C = 1 +15264 ns P1(a||b):: C = 1 +15264 ns P2(a||b):: C = 0 +15268 ns P1(a&&b):: C = 0 +15268 ns P2(a&&b):: C = 1 +15270 ns P1(a||b):: C = 0 +15270 ns P2(a||b):: C = 1 +15274 ns P1(a&&b):: C = 1 +15274 ns P2(a&&b):: C = 0 +15276 ns P1(a||b):: C = 1 +15276 ns P2(a||b):: C = 0 +15280 ns P1(a&&b):: C = 0 +15280 ns P2(a&&b):: C = 1 +15282 ns P1(a||b):: C = 1 +15282 ns P2(a||b):: C = 0 +15286 ns P1(a&&b):: C = 0 +15286 ns P2(a&&b):: C = 1 +15288 ns P1(a||b):: C = 0 +15288 ns P2(a||b):: C = 1 +15292 ns P1(a&&b):: C = 1 +15292 ns P2(a&&b):: C = 0 +15294 ns P1(a||b):: C = 1 +15294 ns P2(a||b):: C = 0 +15298 ns P1(a&&b):: C = 0 +15298 ns P2(a&&b):: C = 1 +15300 ns P1(a||b):: C = 1 +15300 ns P2(a||b):: C = 0 +15304 ns P1(a&&b):: C = 0 +15304 ns P2(a&&b):: C = 1 +15306 ns P1(a||b):: C = 1 +15306 ns P2(a||b):: C = 0 +15310 ns P1(a&&b):: C = 0 +15310 ns P2(a&&b):: C = 1 +15312 ns P1(a||b):: C = 1 +15312 ns P2(a||b):: C = 0 +15316 ns P1(a&&b):: C = 1 +15316 ns P2(a&&b):: C = 0 +15318 ns P1(a||b):: C = 0 +15318 ns P2(a||b):: C = 1 +15322 ns P1(a&&b):: C = 0 +15322 ns P2(a&&b):: C = 1 +15324 ns P1(a||b):: C = 1 +15324 ns P2(a||b):: C = 0 +15328 ns P1(a&&b):: C = 0 +15328 ns P2(a&&b):: C = 1 +15330 ns P1(a||b):: C = 1 +15330 ns P2(a||b):: C = 0 +15334 ns P1(a&&b):: C = 0 +15334 ns P2(a&&b):: C = 1 +15336 ns P1(a||b):: C = 0 +15336 ns P2(a||b):: C = 1 +15340 ns P1(a&&b):: C = 0 +15340 ns P2(a&&b):: C = 1 +15342 ns P1(a||b):: C = 1 +15342 ns P2(a||b):: C = 0 +15346 ns P1(a&&b):: C = 1 +15346 ns P2(a&&b):: C = 0 +15348 ns P1(a||b):: C = 0 +15348 ns P2(a||b):: C = 1 +15352 ns P1(a&&b):: C = 0 +15352 ns P2(a&&b):: C = 1 +15354 ns P1(a||b):: C = 1 +15354 ns P2(a||b):: C = 0 +15358 ns P1(a&&b):: C = 0 +15358 ns P2(a&&b):: C = 1 +15360 ns P1(a||b):: C = 1 +15360 ns P2(a||b):: C = 0 +15364 ns P1(a&&b):: C = 0 +15364 ns P2(a&&b):: C = 1 +15366 ns P1(a||b):: C = 1 +15366 ns P2(a||b):: C = 0 +15370 ns P1(a&&b):: C = 1 +15370 ns P2(a&&b):: C = 0 +15372 ns P1(a||b):: C = 0 +15372 ns P2(a||b):: C = 1 +15376 ns P1(a&&b):: C = 0 +15376 ns P2(a&&b):: C = 1 +15378 ns P1(a||b):: C = 1 +15378 ns P2(a||b):: C = 0 +15382 ns P1(a&&b):: C = 0 +15382 ns P2(a&&b):: C = 1 +15384 ns P1(a||b):: C = 1 +15384 ns P2(a||b):: C = 0 +15388 ns P1(a&&b):: C = 0 +15388 ns P2(a&&b):: C = 1 +15390 ns P1(a||b):: C = 1 +15390 ns P2(a||b):: C = 0 +15394 ns P1(a&&b):: C = 0 +15394 ns P2(a&&b):: C = 1 +15396 ns P1(a||b):: C = 0 +15396 ns P2(a||b):: C = 1 +15400 ns P1(a&&b):: C = 0 +15400 ns P2(a&&b):: C = 1 +15402 ns P1(a||b):: C = 0 +15402 ns P2(a||b):: C = 1 +15406 ns P1(a&&b):: C = 0 +15406 ns P2(a&&b):: C = 1 +15408 ns P1(a||b):: C = 0 +15408 ns P2(a||b):: C = 1 +15412 ns P1(a&&b):: C = 0 +15412 ns P2(a&&b):: C = 1 +15414 ns P1(a||b):: C = 1 +15414 ns P2(a||b):: C = 0 +15418 ns P1(a&&b):: C = 0 +15418 ns P2(a&&b):: C = 1 +15420 ns P1(a||b):: C = 0 +15420 ns P2(a||b):: C = 1 +15424 ns P1(a&&b):: C = 0 +15424 ns P2(a&&b):: C = 1 +15426 ns P1(a||b):: C = 1 +15426 ns P2(a||b):: C = 0 +15430 ns P1(a&&b):: C = 0 +15430 ns P2(a&&b):: C = 1 +15432 ns P1(a||b):: C = 1 +15432 ns P2(a||b):: C = 0 +15436 ns P1(a&&b):: C = 0 +15436 ns P2(a&&b):: C = 1 +15438 ns P1(a||b):: C = 1 +15438 ns P2(a||b):: C = 0 +15442 ns P1(a&&b):: C = 0 +15442 ns P2(a&&b):: C = 1 +15444 ns P1(a||b):: C = 0 +15444 ns P2(a||b):: C = 1 +15448 ns P1(a&&b):: C = 1 +15448 ns P2(a&&b):: C = 0 +15450 ns P1(a||b):: C = 1 +15450 ns P2(a||b):: C = 0 +15454 ns P1(a&&b):: C = 0 +15454 ns P2(a&&b):: C = 1 +15456 ns P1(a||b):: C = 1 +15456 ns P2(a||b):: C = 0 +15460 ns P1(a&&b):: C = 0 +15460 ns P2(a&&b):: C = 1 +15462 ns P1(a||b):: C = 0 +15462 ns P2(a||b):: C = 1 +15466 ns P1(a&&b):: C = 0 +15466 ns P2(a&&b):: C = 1 +15468 ns P1(a||b):: C = 1 +15468 ns P2(a||b):: C = 0 +15472 ns P1(a&&b):: C = 0 +15472 ns P2(a&&b):: C = 1 +15474 ns P1(a||b):: C = 1 +15474 ns P2(a||b):: C = 0 +15478 ns P1(a&&b):: C = 0 +15478 ns P2(a&&b):: C = 1 +15480 ns P1(a||b):: C = 1 +15480 ns P2(a||b):: C = 0 +15484 ns P1(a&&b):: C = 0 +15484 ns P2(a&&b):: C = 1 +15486 ns P1(a||b):: C = 1 +15486 ns P2(a||b):: C = 0 +15490 ns P1(a&&b):: C = 0 +15490 ns P2(a&&b):: C = 1 +15492 ns P1(a||b):: C = 1 +15492 ns P2(a||b):: C = 0 +15496 ns P1(a&&b):: C = 0 +15496 ns P2(a&&b):: C = 1 +15498 ns P1(a||b):: C = 1 +15498 ns P2(a||b):: C = 0 +15502 ns P1(a&&b):: C = 1 +15502 ns P2(a&&b):: C = 0 +15504 ns P1(a||b):: C = 0 +15504 ns P2(a||b):: C = 1 +15508 ns P1(a&&b):: C = 0 +15508 ns P2(a&&b):: C = 1 +15510 ns P1(a||b):: C = 1 +15510 ns P2(a||b):: C = 0 +15514 ns P1(a&&b):: C = 1 +15514 ns P2(a&&b):: C = 0 +15516 ns P1(a||b):: C = 1 +15516 ns P2(a||b):: C = 0 +15520 ns P1(a&&b):: C = 0 +15520 ns P2(a&&b):: C = 1 +15522 ns P1(a||b):: C = 1 +15522 ns P2(a||b):: C = 0 +15526 ns P1(a&&b):: C = 0 +15526 ns P2(a&&b):: C = 1 +15528 ns P1(a||b):: C = 0 +15528 ns P2(a||b):: C = 1 +15532 ns P1(a&&b):: C = 0 +15532 ns P2(a&&b):: C = 1 +15534 ns P1(a||b):: C = 1 +15534 ns P2(a||b):: C = 0 +15538 ns P1(a&&b):: C = 1 +15538 ns P2(a&&b):: C = 0 +15540 ns P1(a||b):: C = 1 +15540 ns P2(a||b):: C = 0 +15544 ns P1(a&&b):: C = 0 +15544 ns P2(a&&b):: C = 1 +15546 ns P1(a||b):: C = 1 +15546 ns P2(a||b):: C = 0 +15550 ns P1(a&&b):: C = 0 +15550 ns P2(a&&b):: C = 1 +15552 ns P1(a||b):: C = 1 +15552 ns P2(a||b):: C = 0 +15556 ns P1(a&&b):: C = 1 +15556 ns P2(a&&b):: C = 0 +15558 ns P1(a||b):: C = 1 +15558 ns P2(a||b):: C = 0 +15562 ns P1(a&&b):: C = 0 +15562 ns P2(a&&b):: C = 1 +15564 ns P1(a||b):: C = 1 +15564 ns P2(a||b):: C = 0 +15568 ns P1(a&&b):: C = 0 +15568 ns P2(a&&b):: C = 1 +15570 ns P1(a||b):: C = 1 +15570 ns P2(a||b):: C = 0 +15574 ns P1(a&&b):: C = 0 +15574 ns P2(a&&b):: C = 1 +15576 ns P1(a||b):: C = 1 +15576 ns P2(a||b):: C = 0 +15580 ns P1(a&&b):: C = 0 +15580 ns P2(a&&b):: C = 1 +15582 ns P1(a||b):: C = 0 +15582 ns P2(a||b):: C = 1 +15586 ns P1(a&&b):: C = 0 +15586 ns P2(a&&b):: C = 1 +15588 ns P1(a||b):: C = 1 +15588 ns P2(a||b):: C = 0 +15592 ns P1(a&&b):: C = 0 +15592 ns P2(a&&b):: C = 1 +15594 ns P1(a||b):: C = 1 +15594 ns P2(a||b):: C = 0 +15598 ns P1(a&&b):: C = 1 +15598 ns P2(a&&b):: C = 0 +15600 ns P1(a||b):: C = 1 +15600 ns P2(a||b):: C = 0 +15604 ns P1(a&&b):: C = 0 +15604 ns P2(a&&b):: C = 1 +15606 ns P1(a||b):: C = 1 +15606 ns P2(a||b):: C = 0 +15610 ns P1(a&&b):: C = 0 +15610 ns P2(a&&b):: C = 1 +15612 ns P1(a||b):: C = 1 +15612 ns P2(a||b):: C = 0 +15616 ns P1(a&&b):: C = 0 +15616 ns P2(a&&b):: C = 1 +15618 ns P1(a||b):: C = 0 +15618 ns P2(a||b):: C = 1 +15622 ns P1(a&&b):: C = 0 +15622 ns P2(a&&b):: C = 1 +15624 ns P1(a||b):: C = 1 +15624 ns P2(a||b):: C = 0 +15628 ns P1(a&&b):: C = 0 +15628 ns P2(a&&b):: C = 1 +15630 ns P1(a||b):: C = 0 +15630 ns P2(a||b):: C = 1 +15634 ns P1(a&&b):: C = 0 +15634 ns P2(a&&b):: C = 1 +15636 ns P1(a||b):: C = 1 +15636 ns P2(a||b):: C = 0 +15640 ns P1(a&&b):: C = 0 +15640 ns P2(a&&b):: C = 1 +15642 ns P1(a||b):: C = 1 +15642 ns P2(a||b):: C = 0 +15646 ns P1(a&&b):: C = 0 +15646 ns P2(a&&b):: C = 1 +15648 ns P1(a||b):: C = 1 +15648 ns P2(a||b):: C = 0 +15652 ns P1(a&&b):: C = 0 +15652 ns P2(a&&b):: C = 1 +15654 ns P1(a||b):: C = 1 +15654 ns P2(a||b):: C = 0 +15658 ns P1(a&&b):: C = 0 +15658 ns P2(a&&b):: C = 1 +15660 ns P1(a||b):: C = 1 +15660 ns P2(a||b):: C = 0 +15664 ns P1(a&&b):: C = 0 +15664 ns P2(a&&b):: C = 1 +15666 ns P1(a||b):: C = 0 +15666 ns P2(a||b):: C = 1 +15670 ns P1(a&&b):: C = 0 +15670 ns P2(a&&b):: C = 1 +15672 ns P1(a||b):: C = 0 +15672 ns P2(a||b):: C = 1 +15676 ns P1(a&&b):: C = 0 +15676 ns P2(a&&b):: C = 1 +15678 ns P1(a||b):: C = 0 +15678 ns P2(a||b):: C = 1 +15682 ns P1(a&&b):: C = 1 +15682 ns P2(a&&b):: C = 0 +15684 ns P1(a||b):: C = 0 +15684 ns P2(a||b):: C = 1 +15688 ns P1(a&&b):: C = 0 +15688 ns P2(a&&b):: C = 1 +15690 ns P1(a||b):: C = 1 +15690 ns P2(a||b):: C = 0 +15694 ns P1(a&&b):: C = 0 +15694 ns P2(a&&b):: C = 1 +15696 ns P1(a||b):: C = 1 +15696 ns P2(a||b):: C = 0 +15700 ns P1(a&&b):: C = 0 +15700 ns P2(a&&b):: C = 1 +15702 ns P1(a||b):: C = 1 +15702 ns P2(a||b):: C = 0 +15706 ns P1(a&&b):: C = 0 +15706 ns P2(a&&b):: C = 1 +15708 ns P1(a||b):: C = 1 +15708 ns P2(a||b):: C = 0 +15712 ns P1(a&&b):: C = 0 +15712 ns P2(a&&b):: C = 1 +15714 ns P1(a||b):: C = 0 +15714 ns P2(a||b):: C = 1 +15718 ns P1(a&&b):: C = 0 +15718 ns P2(a&&b):: C = 1 +15720 ns P1(a||b):: C = 1 +15720 ns P2(a||b):: C = 0 +15724 ns P1(a&&b):: C = 0 +15724 ns P2(a&&b):: C = 1 +15726 ns P1(a||b):: C = 1 +15726 ns P2(a||b):: C = 0 +15730 ns P1(a&&b):: C = 1 +15730 ns P2(a&&b):: C = 0 +15732 ns P1(a||b):: C = 1 +15732 ns P2(a||b):: C = 0 +15736 ns P1(a&&b):: C = 1 +15736 ns P2(a&&b):: C = 0 +15738 ns P1(a||b):: C = 0 +15738 ns P2(a||b):: C = 1 +15742 ns P1(a&&b):: C = 1 +15742 ns P2(a&&b):: C = 0 +15744 ns P1(a||b):: C = 1 +15744 ns P2(a||b):: C = 0 +15748 ns P1(a&&b):: C = 1 +15748 ns P2(a&&b):: C = 0 +15750 ns P1(a||b):: C = 1 +15750 ns P2(a||b):: C = 0 +15754 ns P1(a&&b):: C = 0 +15754 ns P2(a&&b):: C = 1 +15756 ns P1(a||b):: C = 1 +15756 ns P2(a||b):: C = 0 +15760 ns P1(a&&b):: C = 0 +15760 ns P2(a&&b):: C = 1 +15762 ns P1(a||b):: C = 1 +15762 ns P2(a||b):: C = 0 +15766 ns P1(a&&b):: C = 0 +15766 ns P2(a&&b):: C = 1 +15768 ns P1(a||b):: C = 0 +15768 ns P2(a||b):: C = 1 +15772 ns P1(a&&b):: C = 1 +15772 ns P2(a&&b):: C = 0 +15774 ns P1(a||b):: C = 0 +15774 ns P2(a||b):: C = 1 +15778 ns P1(a&&b):: C = 0 +15778 ns P2(a&&b):: C = 1 +15780 ns P1(a||b):: C = 1 +15780 ns P2(a||b):: C = 0 +15784 ns P1(a&&b):: C = 0 +15784 ns P2(a&&b):: C = 1 +15786 ns P1(a||b):: C = 0 +15786 ns P2(a||b):: C = 1 +15790 ns P1(a&&b):: C = 0 +15790 ns P2(a&&b):: C = 1 +15792 ns P1(a||b):: C = 0 +15792 ns P2(a||b):: C = 1 +15796 ns P1(a&&b):: C = 0 +15796 ns P2(a&&b):: C = 1 +15798 ns P1(a||b):: C = 1 +15798 ns P2(a||b):: C = 0 +15802 ns P1(a&&b):: C = 0 +15802 ns P2(a&&b):: C = 1 +15804 ns P1(a||b):: C = 1 +15804 ns P2(a||b):: C = 0 +15808 ns P1(a&&b):: C = 0 +15808 ns P2(a&&b):: C = 1 +15810 ns P1(a||b):: C = 1 +15810 ns P2(a||b):: C = 0 +15814 ns P1(a&&b):: C = 0 +15814 ns P2(a&&b):: C = 1 +15816 ns P1(a||b):: C = 1 +15816 ns P2(a||b):: C = 0 +15820 ns P1(a&&b):: C = 0 +15820 ns P2(a&&b):: C = 1 +15822 ns P1(a||b):: C = 0 +15822 ns P2(a||b):: C = 1 +15826 ns P1(a&&b):: C = 0 +15826 ns P2(a&&b):: C = 1 +15828 ns P1(a||b):: C = 1 +15828 ns P2(a||b):: C = 0 +15832 ns P1(a&&b):: C = 0 +15832 ns P2(a&&b):: C = 1 +15834 ns P1(a||b):: C = 1 +15834 ns P2(a||b):: C = 0 +15838 ns P1(a&&b):: C = 0 +15838 ns P2(a&&b):: C = 1 +15840 ns P1(a||b):: C = 0 +15840 ns P2(a||b):: C = 1 +15844 ns P1(a&&b):: C = 0 +15844 ns P2(a&&b):: C = 1 +15846 ns P1(a||b):: C = 0 +15846 ns P2(a||b):: C = 1 +15850 ns P1(a&&b):: C = 0 +15850 ns P2(a&&b):: C = 1 +15852 ns P1(a||b):: C = 0 +15852 ns P2(a||b):: C = 1 +15856 ns P1(a&&b):: C = 0 +15856 ns P2(a&&b):: C = 1 +15858 ns P1(a||b):: C = 1 +15858 ns P2(a||b):: C = 0 +15862 ns P1(a&&b):: C = 0 +15862 ns P2(a&&b):: C = 1 +15864 ns P1(a||b):: C = 1 +15864 ns P2(a||b):: C = 0 +15868 ns P1(a&&b):: C = 0 +15868 ns P2(a&&b):: C = 1 +15870 ns P1(a||b):: C = 0 +15870 ns P2(a||b):: C = 1 +15874 ns P1(a&&b):: C = 0 +15874 ns P2(a&&b):: C = 1 +15876 ns P1(a||b):: C = 0 +15876 ns P2(a||b):: C = 1 +15880 ns P1(a&&b):: C = 1 +15880 ns P2(a&&b):: C = 0 +15882 ns P1(a||b):: C = 1 +15882 ns P2(a||b):: C = 0 +15886 ns P1(a&&b):: C = 0 +15886 ns P2(a&&b):: C = 1 +15888 ns P1(a||b):: C = 0 +15888 ns P2(a||b):: C = 1 +15892 ns P1(a&&b):: C = 0 +15892 ns P2(a&&b):: C = 1 +15894 ns P1(a||b):: C = 1 +15894 ns P2(a||b):: C = 0 +15898 ns P1(a&&b):: C = 1 +15898 ns P2(a&&b):: C = 0 +15900 ns P1(a||b):: C = 0 +15900 ns P2(a||b):: C = 1 +15904 ns P1(a&&b):: C = 1 +15904 ns P2(a&&b):: C = 0 +15906 ns P1(a||b):: C = 1 +15906 ns P2(a||b):: C = 0 +15910 ns P1(a&&b):: C = 0 +15910 ns P2(a&&b):: C = 1 +15912 ns P1(a||b):: C = 0 +15912 ns P2(a||b):: C = 1 +15916 ns P1(a&&b):: C = 0 +15916 ns P2(a&&b):: C = 1 +15918 ns P1(a||b):: C = 0 +15918 ns P2(a||b):: C = 1 +15922 ns P1(a&&b):: C = 1 +15922 ns P2(a&&b):: C = 0 +15924 ns P1(a||b):: C = 0 +15924 ns P2(a||b):: C = 1 +15928 ns P1(a&&b):: C = 0 +15928 ns P2(a&&b):: C = 1 +15930 ns P1(a||b):: C = 0 +15930 ns P2(a||b):: C = 1 +15934 ns P1(a&&b):: C = 1 +15934 ns P2(a&&b):: C = 0 +15936 ns P1(a||b):: C = 1 +15936 ns P2(a||b):: C = 0 +15940 ns P1(a&&b):: C = 0 +15940 ns P2(a&&b):: C = 1 +15942 ns P1(a||b):: C = 1 +15942 ns P2(a||b):: C = 0 +15946 ns P1(a&&b):: C = 1 +15946 ns P2(a&&b):: C = 0 +15948 ns P1(a||b):: C = 1 +15948 ns P2(a||b):: C = 0 +15952 ns P1(a&&b):: C = 0 +15952 ns P2(a&&b):: C = 1 +15954 ns P1(a||b):: C = 1 +15954 ns P2(a||b):: C = 0 +15958 ns P1(a&&b):: C = 0 +15958 ns P2(a&&b):: C = 1 +15960 ns P1(a||b):: C = 1 +15960 ns P2(a||b):: C = 0 +15964 ns P1(a&&b):: C = 1 +15964 ns P2(a&&b):: C = 0 +15966 ns P1(a||b):: C = 1 +15966 ns P2(a||b):: C = 0 +15970 ns P1(a&&b):: C = 0 +15970 ns P2(a&&b):: C = 1 +15972 ns P1(a||b):: C = 1 +15972 ns P2(a||b):: C = 0 +15976 ns P1(a&&b):: C = 0 +15976 ns P2(a&&b):: C = 1 +15978 ns P1(a||b):: C = 1 +15978 ns P2(a||b):: C = 0 +15982 ns P1(a&&b):: C = 1 +15982 ns P2(a&&b):: C = 0 +15984 ns P1(a||b):: C = 1 +15984 ns P2(a||b):: C = 0 +15988 ns P1(a&&b):: C = 0 +15988 ns P2(a&&b):: C = 1 +15990 ns P1(a||b):: C = 0 +15990 ns P2(a||b):: C = 1 +15994 ns P1(a&&b):: C = 0 +15994 ns P2(a&&b):: C = 1 +15996 ns P1(a||b):: C = 0 +15996 ns P2(a||b):: C = 1 +16 us P1(a&&b):: C = 1 +16 us P2(a&&b):: C = 0 +16002 ns P1(a||b):: C = 1 +16002 ns P2(a||b):: C = 0 +16006 ns P1(a&&b):: C = 0 +16006 ns P2(a&&b):: C = 1 +16008 ns P1(a||b):: C = 0 +16008 ns P2(a||b):: C = 1 +16012 ns P1(a&&b):: C = 1 +16012 ns P2(a&&b):: C = 0 +16014 ns P1(a||b):: C = 1 +16014 ns P2(a||b):: C = 0 +16018 ns P1(a&&b):: C = 0 +16018 ns P2(a&&b):: C = 1 +16020 ns P1(a||b):: C = 0 +16020 ns P2(a||b):: C = 1 +16024 ns P1(a&&b):: C = 0 +16024 ns P2(a&&b):: C = 1 +16026 ns P1(a||b):: C = 1 +16026 ns P2(a||b):: C = 0 +16030 ns P1(a&&b):: C = 0 +16030 ns P2(a&&b):: C = 1 +16032 ns P1(a||b):: C = 1 +16032 ns P2(a||b):: C = 0 +16036 ns P1(a&&b):: C = 1 +16036 ns P2(a&&b):: C = 0 +16038 ns P1(a||b):: C = 0 +16038 ns P2(a||b):: C = 1 +16042 ns P1(a&&b):: C = 0 +16042 ns P2(a&&b):: C = 1 +16044 ns P1(a||b):: C = 0 +16044 ns P2(a||b):: C = 1 +16048 ns P1(a&&b):: C = 0 +16048 ns P2(a&&b):: C = 1 +16050 ns P1(a||b):: C = 1 +16050 ns P2(a||b):: C = 0 +16054 ns P1(a&&b):: C = 0 +16054 ns P2(a&&b):: C = 1 +16056 ns P1(a||b):: C = 1 +16056 ns P2(a||b):: C = 0 +16060 ns P1(a&&b):: C = 0 +16060 ns P2(a&&b):: C = 1 +16062 ns P1(a||b):: C = 0 +16062 ns P2(a||b):: C = 1 +16066 ns P1(a&&b):: C = 1 +16066 ns P2(a&&b):: C = 0 +16068 ns P1(a||b):: C = 1 +16068 ns P2(a||b):: C = 0 +16072 ns P1(a&&b):: C = 0 +16072 ns P2(a&&b):: C = 1 +16074 ns P1(a||b):: C = 1 +16074 ns P2(a||b):: C = 0 +16078 ns P1(a&&b):: C = 0 +16078 ns P2(a&&b):: C = 1 +16080 ns P1(a||b):: C = 1 +16080 ns P2(a||b):: C = 0 +16084 ns P1(a&&b):: C = 1 +16084 ns P2(a&&b):: C = 0 +16086 ns P1(a||b):: C = 1 +16086 ns P2(a||b):: C = 0 +16090 ns P1(a&&b):: C = 1 +16090 ns P2(a&&b):: C = 0 +16092 ns P1(a||b):: C = 0 +16092 ns P2(a||b):: C = 1 +16096 ns P1(a&&b):: C = 0 +16096 ns P2(a&&b):: C = 1 +16098 ns P1(a||b):: C = 1 +16098 ns P2(a||b):: C = 0 +16102 ns P1(a&&b):: C = 0 +16102 ns P2(a&&b):: C = 1 +16104 ns P1(a||b):: C = 0 +16104 ns P2(a||b):: C = 1 +16108 ns P1(a&&b):: C = 0 +16108 ns P2(a&&b):: C = 1 +16110 ns P1(a||b):: C = 1 +16110 ns P2(a||b):: C = 0 +16114 ns P1(a&&b):: C = 0 +16114 ns P2(a&&b):: C = 1 +16116 ns P1(a||b):: C = 0 +16116 ns P2(a||b):: C = 1 +16120 ns P1(a&&b):: C = 0 +16120 ns P2(a&&b):: C = 1 +16122 ns P1(a||b):: C = 0 +16122 ns P2(a||b):: C = 1 +16126 ns P1(a&&b):: C = 0 +16126 ns P2(a&&b):: C = 1 +16128 ns P1(a||b):: C = 0 +16128 ns P2(a||b):: C = 1 +16132 ns P1(a&&b):: C = 0 +16132 ns P2(a&&b):: C = 1 +16134 ns P1(a||b):: C = 1 +16134 ns P2(a||b):: C = 0 +16138 ns P1(a&&b):: C = 0 +16138 ns P2(a&&b):: C = 1 +16140 ns P1(a||b):: C = 0 +16140 ns P2(a||b):: C = 1 +16144 ns P1(a&&b):: C = 0 +16144 ns P2(a&&b):: C = 1 +16146 ns P1(a||b):: C = 1 +16146 ns P2(a||b):: C = 0 +16150 ns P1(a&&b):: C = 0 +16150 ns P2(a&&b):: C = 1 +16152 ns P1(a||b):: C = 1 +16152 ns P2(a||b):: C = 0 +16156 ns P1(a&&b):: C = 0 +16156 ns P2(a&&b):: C = 1 +16158 ns P1(a||b):: C = 0 +16158 ns P2(a||b):: C = 1 +16162 ns P1(a&&b):: C = 0 +16162 ns P2(a&&b):: C = 1 +16164 ns P1(a||b):: C = 0 +16164 ns P2(a||b):: C = 1 +16168 ns P1(a&&b):: C = 0 +16168 ns P2(a&&b):: C = 1 +16170 ns P1(a||b):: C = 1 +16170 ns P2(a||b):: C = 0 +16174 ns P1(a&&b):: C = 0 +16174 ns P2(a&&b):: C = 1 +16176 ns P1(a||b):: C = 0 +16176 ns P2(a||b):: C = 1 +16180 ns P1(a&&b):: C = 1 +16180 ns P2(a&&b):: C = 0 +16182 ns P1(a||b):: C = 1 +16182 ns P2(a||b):: C = 0 +16186 ns P1(a&&b):: C = 0 +16186 ns P2(a&&b):: C = 1 +16188 ns P1(a||b):: C = 1 +16188 ns P2(a||b):: C = 0 +16192 ns P1(a&&b):: C = 0 +16192 ns P2(a&&b):: C = 1 +16194 ns P1(a||b):: C = 1 +16194 ns P2(a||b):: C = 0 +16198 ns P1(a&&b):: C = 0 +16198 ns P2(a&&b):: C = 1 +16200 ns P1(a||b):: C = 1 +16200 ns P2(a||b):: C = 0 +16204 ns P1(a&&b):: C = 0 +16204 ns P2(a&&b):: C = 1 +16206 ns P1(a||b):: C = 1 +16206 ns P2(a||b):: C = 0 +16210 ns P1(a&&b):: C = 0 +16210 ns P2(a&&b):: C = 1 +16212 ns P1(a||b):: C = 0 +16212 ns P2(a||b):: C = 1 +16216 ns P1(a&&b):: C = 1 +16216 ns P2(a&&b):: C = 0 +16218 ns P1(a||b):: C = 1 +16218 ns P2(a||b):: C = 0 +16222 ns P1(a&&b):: C = 1 +16222 ns P2(a&&b):: C = 0 +16224 ns P1(a||b):: C = 0 +16224 ns P2(a||b):: C = 1 +16228 ns P1(a&&b):: C = 0 +16228 ns P2(a&&b):: C = 1 +16230 ns P1(a||b):: C = 1 +16230 ns P2(a||b):: C = 0 +16234 ns P1(a&&b):: C = 0 +16234 ns P2(a&&b):: C = 1 +16236 ns P1(a||b):: C = 1 +16236 ns P2(a||b):: C = 0 +16240 ns P1(a&&b):: C = 1 +16240 ns P2(a&&b):: C = 0 +16242 ns P1(a||b):: C = 1 +16242 ns P2(a||b):: C = 0 +16246 ns P1(a&&b):: C = 0 +16246 ns P2(a&&b):: C = 1 +16248 ns P1(a||b):: C = 1 +16248 ns P2(a||b):: C = 0 +16252 ns P1(a&&b):: C = 0 +16252 ns P2(a&&b):: C = 1 +16254 ns P1(a||b):: C = 0 +16254 ns P2(a||b):: C = 1 +16258 ns P1(a&&b):: C = 0 +16258 ns P2(a&&b):: C = 1 +16260 ns P1(a||b):: C = 1 +16260 ns P2(a||b):: C = 0 +16264 ns P1(a&&b):: C = 0 +16264 ns P2(a&&b):: C = 1 +16266 ns P1(a||b):: C = 1 +16266 ns P2(a||b):: C = 0 +16270 ns P1(a&&b):: C = 1 +16270 ns P2(a&&b):: C = 0 +16272 ns P1(a||b):: C = 0 +16272 ns P2(a||b):: C = 1 +16276 ns P1(a&&b):: C = 1 +16276 ns P2(a&&b):: C = 0 +16278 ns P1(a||b):: C = 1 +16278 ns P2(a||b):: C = 0 +16282 ns P1(a&&b):: C = 0 +16282 ns P2(a&&b):: C = 1 +16284 ns P1(a||b):: C = 0 +16284 ns P2(a||b):: C = 1 +16288 ns P1(a&&b):: C = 0 +16288 ns P2(a&&b):: C = 1 +16290 ns P1(a||b):: C = 1 +16290 ns P2(a||b):: C = 0 +16294 ns P1(a&&b):: C = 1 +16294 ns P2(a&&b):: C = 0 +16296 ns P1(a||b):: C = 0 +16296 ns P2(a||b):: C = 1 +16300 ns P1(a&&b):: C = 0 +16300 ns P2(a&&b):: C = 1 +16302 ns P1(a||b):: C = 1 +16302 ns P2(a||b):: C = 0 +16306 ns P1(a&&b):: C = 0 +16306 ns P2(a&&b):: C = 1 +16308 ns P1(a||b):: C = 1 +16308 ns P2(a||b):: C = 0 +16312 ns P1(a&&b):: C = 0 +16312 ns P2(a&&b):: C = 1 +16314 ns P1(a||b):: C = 1 +16314 ns P2(a||b):: C = 0 +16318 ns P1(a&&b):: C = 0 +16318 ns P2(a&&b):: C = 1 +16320 ns P1(a||b):: C = 1 +16320 ns P2(a||b):: C = 0 +16324 ns P1(a&&b):: C = 0 +16324 ns P2(a&&b):: C = 1 +16326 ns P1(a||b):: C = 1 +16326 ns P2(a||b):: C = 0 +16330 ns P1(a&&b):: C = 1 +16330 ns P2(a&&b):: C = 0 +16332 ns P1(a||b):: C = 1 +16332 ns P2(a||b):: C = 0 +16336 ns P1(a&&b):: C = 1 +16336 ns P2(a&&b):: C = 0 +16338 ns P1(a||b):: C = 1 +16338 ns P2(a||b):: C = 0 +16342 ns P1(a&&b):: C = 1 +16342 ns P2(a&&b):: C = 0 +16344 ns P1(a||b):: C = 1 +16344 ns P2(a||b):: C = 0 +16348 ns P1(a&&b):: C = 0 +16348 ns P2(a&&b):: C = 1 +16350 ns P1(a||b):: C = 1 +16350 ns P2(a||b):: C = 0 +16354 ns P1(a&&b):: C = 0 +16354 ns P2(a&&b):: C = 1 +16356 ns P1(a||b):: C = 1 +16356 ns P2(a||b):: C = 0 +16360 ns P1(a&&b):: C = 0 +16360 ns P2(a&&b):: C = 1 +16362 ns P1(a||b):: C = 0 +16362 ns P2(a||b):: C = 1 +16366 ns P1(a&&b):: C = 1 +16366 ns P2(a&&b):: C = 0 +16368 ns P1(a||b):: C = 1 +16368 ns P2(a||b):: C = 0 +16372 ns P1(a&&b):: C = 0 +16372 ns P2(a&&b):: C = 1 +16374 ns P1(a||b):: C = 0 +16374 ns P2(a||b):: C = 1 +16378 ns P1(a&&b):: C = 0 +16378 ns P2(a&&b):: C = 1 +16380 ns P1(a||b):: C = 0 +16380 ns P2(a||b):: C = 1 +16384 ns P1(a&&b):: C = 1 +16384 ns P2(a&&b):: C = 0 +16386 ns P1(a||b):: C = 1 +16386 ns P2(a||b):: C = 0 +16390 ns P1(a&&b):: C = 1 +16390 ns P2(a&&b):: C = 0 +16392 ns P1(a||b):: C = 0 +16392 ns P2(a||b):: C = 1 +16396 ns P1(a&&b):: C = 0 +16396 ns P2(a&&b):: C = 1 +16398 ns P1(a||b):: C = 1 +16398 ns P2(a||b):: C = 0 +16402 ns P1(a&&b):: C = 0 +16402 ns P2(a&&b):: C = 1 +16404 ns P1(a||b):: C = 1 +16404 ns P2(a||b):: C = 0 +16408 ns P1(a&&b):: C = 0 +16408 ns P2(a&&b):: C = 1 +16410 ns P1(a||b):: C = 0 +16410 ns P2(a||b):: C = 1 +16414 ns P1(a&&b):: C = 1 +16414 ns P2(a&&b):: C = 0 +16416 ns P1(a||b):: C = 0 +16416 ns P2(a||b):: C = 1 +16420 ns P1(a&&b):: C = 1 +16420 ns P2(a&&b):: C = 0 +16422 ns P1(a||b):: C = 1 +16422 ns P2(a||b):: C = 0 +16426 ns P1(a&&b):: C = 0 +16426 ns P2(a&&b):: C = 1 +16428 ns P1(a||b):: C = 0 +16428 ns P2(a||b):: C = 1 +16432 ns P1(a&&b):: C = 1 +16432 ns P2(a&&b):: C = 0 +16434 ns P1(a||b):: C = 1 +16434 ns P2(a||b):: C = 0 +16438 ns P1(a&&b):: C = 0 +16438 ns P2(a&&b):: C = 1 +16440 ns P1(a||b):: C = 1 +16440 ns P2(a||b):: C = 0 +16444 ns P1(a&&b):: C = 0 +16444 ns P2(a&&b):: C = 1 +16446 ns P1(a||b):: C = 0 +16446 ns P2(a||b):: C = 1 +16450 ns P1(a&&b):: C = 0 +16450 ns P2(a&&b):: C = 1 +16452 ns P1(a||b):: C = 1 +16452 ns P2(a||b):: C = 0 +16456 ns P1(a&&b):: C = 0 +16456 ns P2(a&&b):: C = 1 +16458 ns P1(a||b):: C = 0 +16458 ns P2(a||b):: C = 1 +16462 ns P1(a&&b):: C = 1 +16462 ns P2(a&&b):: C = 0 +16464 ns P1(a||b):: C = 1 +16464 ns P2(a||b):: C = 0 +16468 ns P1(a&&b):: C = 0 +16468 ns P2(a&&b):: C = 1 +16470 ns P1(a||b):: C = 0 +16470 ns P2(a||b):: C = 1 +16474 ns P1(a&&b):: C = 0 +16474 ns P2(a&&b):: C = 1 +16476 ns P1(a||b):: C = 1 +16476 ns P2(a||b):: C = 0 +16480 ns P1(a&&b):: C = 0 +16480 ns P2(a&&b):: C = 1 +16482 ns P1(a||b):: C = 1 +16482 ns P2(a||b):: C = 0 +16486 ns P1(a&&b):: C = 0 +16486 ns P2(a&&b):: C = 1 +16488 ns P1(a||b):: C = 1 +16488 ns P2(a||b):: C = 0 +16492 ns P1(a&&b):: C = 0 +16492 ns P2(a&&b):: C = 1 +16494 ns P1(a||b):: C = 1 +16494 ns P2(a||b):: C = 0 +16498 ns P1(a&&b):: C = 1 +16498 ns P2(a&&b):: C = 0 +16500 ns P1(a||b):: C = 0 +16500 ns P2(a||b):: C = 1 +16504 ns P1(a&&b):: C = 1 +16504 ns P2(a&&b):: C = 0 +16506 ns P1(a||b):: C = 0 +16506 ns P2(a||b):: C = 1 +16510 ns P1(a&&b):: C = 0 +16510 ns P2(a&&b):: C = 1 +16512 ns P1(a||b):: C = 1 +16512 ns P2(a||b):: C = 0 +16516 ns P1(a&&b):: C = 0 +16516 ns P2(a&&b):: C = 1 +16518 ns P1(a||b):: C = 0 +16518 ns P2(a||b):: C = 1 +16522 ns P1(a&&b):: C = 0 +16522 ns P2(a&&b):: C = 1 +16524 ns P1(a||b):: C = 1 +16524 ns P2(a||b):: C = 0 +16528 ns P1(a&&b):: C = 1 +16528 ns P2(a&&b):: C = 0 +16530 ns P1(a||b):: C = 1 +16530 ns P2(a||b):: C = 0 +16534 ns P1(a&&b):: C = 0 +16534 ns P2(a&&b):: C = 1 +16536 ns P1(a||b):: C = 0 +16536 ns P2(a||b):: C = 1 +16540 ns P1(a&&b):: C = 1 +16540 ns P2(a&&b):: C = 0 +16542 ns P1(a||b):: C = 1 +16542 ns P2(a||b):: C = 0 +16546 ns P1(a&&b):: C = 1 +16546 ns P2(a&&b):: C = 0 +16548 ns P1(a||b):: C = 1 +16548 ns P2(a||b):: C = 0 +16552 ns P1(a&&b):: C = 0 +16552 ns P2(a&&b):: C = 1 +16554 ns P1(a||b):: C = 0 +16554 ns P2(a||b):: C = 1 +16558 ns P1(a&&b):: C = 1 +16558 ns P2(a&&b):: C = 0 +16560 ns P1(a||b):: C = 0 +16560 ns P2(a||b):: C = 1 +16564 ns P1(a&&b):: C = 1 +16564 ns P2(a&&b):: C = 0 +16566 ns P1(a||b):: C = 1 +16566 ns P2(a||b):: C = 0 +16570 ns P1(a&&b):: C = 0 +16570 ns P2(a&&b):: C = 1 +16572 ns P1(a||b):: C = 0 +16572 ns P2(a||b):: C = 1 +16576 ns P1(a&&b):: C = 1 +16576 ns P2(a&&b):: C = 0 +16578 ns P1(a||b):: C = 1 +16578 ns P2(a||b):: C = 0 +16582 ns P1(a&&b):: C = 0 +16582 ns P2(a&&b):: C = 1 +16584 ns P1(a||b):: C = 0 +16584 ns P2(a||b):: C = 1 +16588 ns P1(a&&b):: C = 1 +16588 ns P2(a&&b):: C = 0 +16590 ns P1(a||b):: C = 0 +16590 ns P2(a||b):: C = 1 +16594 ns P1(a&&b):: C = 0 +16594 ns P2(a&&b):: C = 1 +16596 ns P1(a||b):: C = 1 +16596 ns P2(a||b):: C = 0 +16600 ns P1(a&&b):: C = 0 +16600 ns P2(a&&b):: C = 1 +16602 ns P1(a||b):: C = 1 +16602 ns P2(a||b):: C = 0 +16606 ns P1(a&&b):: C = 0 +16606 ns P2(a&&b):: C = 1 +16608 ns P1(a||b):: C = 1 +16608 ns P2(a||b):: C = 0 +16612 ns P1(a&&b):: C = 0 +16612 ns P2(a&&b):: C = 1 +16614 ns P1(a||b):: C = 1 +16614 ns P2(a||b):: C = 0 +16618 ns P1(a&&b):: C = 1 +16618 ns P2(a&&b):: C = 0 +16620 ns P1(a||b):: C = 1 +16620 ns P2(a||b):: C = 0 +16624 ns P1(a&&b):: C = 0 +16624 ns P2(a&&b):: C = 1 +16626 ns P1(a||b):: C = 1 +16626 ns P2(a||b):: C = 0 +16630 ns P1(a&&b):: C = 1 +16630 ns P2(a&&b):: C = 0 +16632 ns P1(a||b):: C = 1 +16632 ns P2(a||b):: C = 0 +16636 ns P1(a&&b):: C = 0 +16636 ns P2(a&&b):: C = 1 +16638 ns P1(a||b):: C = 1 +16638 ns P2(a||b):: C = 0 +16642 ns P1(a&&b):: C = 0 +16642 ns P2(a&&b):: C = 1 +16644 ns P1(a||b):: C = 0 +16644 ns P2(a||b):: C = 1 +16648 ns P1(a&&b):: C = 0 +16648 ns P2(a&&b):: C = 1 +16650 ns P1(a||b):: C = 1 +16650 ns P2(a||b):: C = 0 +16654 ns P1(a&&b):: C = 0 +16654 ns P2(a&&b):: C = 1 +16656 ns P1(a||b):: C = 1 +16656 ns P2(a||b):: C = 0 +16660 ns P1(a&&b):: C = 0 +16660 ns P2(a&&b):: C = 1 +16662 ns P1(a||b):: C = 0 +16662 ns P2(a||b):: C = 1 +16666 ns P1(a&&b):: C = 0 +16666 ns P2(a&&b):: C = 1 +16668 ns P1(a||b):: C = 1 +16668 ns P2(a||b):: C = 0 +16672 ns P1(a&&b):: C = 0 +16672 ns P2(a&&b):: C = 1 +16674 ns P1(a||b):: C = 1 +16674 ns P2(a||b):: C = 0 +16678 ns P1(a&&b):: C = 0 +16678 ns P2(a&&b):: C = 1 +16680 ns P1(a||b):: C = 0 +16680 ns P2(a||b):: C = 1 +16684 ns P1(a&&b):: C = 0 +16684 ns P2(a&&b):: C = 1 +16686 ns P1(a||b):: C = 1 +16686 ns P2(a||b):: C = 0 +16690 ns P1(a&&b):: C = 1 +16690 ns P2(a&&b):: C = 0 +16692 ns P1(a||b):: C = 1 +16692 ns P2(a||b):: C = 0 +16696 ns P1(a&&b):: C = 0 +16696 ns P2(a&&b):: C = 1 +16698 ns P1(a||b):: C = 1 +16698 ns P2(a||b):: C = 0 +16702 ns P1(a&&b):: C = 0 +16702 ns P2(a&&b):: C = 1 +16704 ns P1(a||b):: C = 0 +16704 ns P2(a||b):: C = 1 +16708 ns P1(a&&b):: C = 1 +16708 ns P2(a&&b):: C = 0 +16710 ns P1(a||b):: C = 1 +16710 ns P2(a||b):: C = 0 +16714 ns P1(a&&b):: C = 0 +16714 ns P2(a&&b):: C = 1 +16716 ns P1(a||b):: C = 0 +16716 ns P2(a||b):: C = 1 +16720 ns P1(a&&b):: C = 0 +16720 ns P2(a&&b):: C = 1 +16722 ns P1(a||b):: C = 0 +16722 ns P2(a||b):: C = 1 +16726 ns P1(a&&b):: C = 0 +16726 ns P2(a&&b):: C = 1 +16728 ns P1(a||b):: C = 0 +16728 ns P2(a||b):: C = 1 +16732 ns P1(a&&b):: C = 0 +16732 ns P2(a&&b):: C = 1 +16734 ns P1(a||b):: C = 1 +16734 ns P2(a||b):: C = 0 +16738 ns P1(a&&b):: C = 0 +16738 ns P2(a&&b):: C = 1 +16740 ns P1(a||b):: C = 1 +16740 ns P2(a||b):: C = 0 +16744 ns P1(a&&b):: C = 0 +16744 ns P2(a&&b):: C = 1 +16746 ns P1(a||b):: C = 1 +16746 ns P2(a||b):: C = 0 +16750 ns P1(a&&b):: C = 0 +16750 ns P2(a&&b):: C = 1 +16752 ns P1(a||b):: C = 1 +16752 ns P2(a||b):: C = 0 +16756 ns P1(a&&b):: C = 0 +16756 ns P2(a&&b):: C = 1 +16758 ns P1(a||b):: C = 0 +16758 ns P2(a||b):: C = 1 +16762 ns P1(a&&b):: C = 0 +16762 ns P2(a&&b):: C = 1 +16764 ns P1(a||b):: C = 1 +16764 ns P2(a||b):: C = 0 +16768 ns P1(a&&b):: C = 0 +16768 ns P2(a&&b):: C = 1 +16770 ns P1(a||b):: C = 1 +16770 ns P2(a||b):: C = 0 +16774 ns P1(a&&b):: C = 1 +16774 ns P2(a&&b):: C = 0 +16776 ns P1(a||b):: C = 1 +16776 ns P2(a||b):: C = 0 +16780 ns P1(a&&b):: C = 0 +16780 ns P2(a&&b):: C = 1 +16782 ns P1(a||b):: C = 1 +16782 ns P2(a||b):: C = 0 +16786 ns P1(a&&b):: C = 1 +16786 ns P2(a&&b):: C = 0 +16788 ns P1(a||b):: C = 1 +16788 ns P2(a||b):: C = 0 +16792 ns P1(a&&b):: C = 0 +16792 ns P2(a&&b):: C = 1 +16794 ns P1(a||b):: C = 1 +16794 ns P2(a||b):: C = 0 +16798 ns P1(a&&b):: C = 0 +16798 ns P2(a&&b):: C = 1 +16800 ns P1(a||b):: C = 0 +16800 ns P2(a||b):: C = 1 +16804 ns P1(a&&b):: C = 0 +16804 ns P2(a&&b):: C = 1 +16806 ns P1(a||b):: C = 1 +16806 ns P2(a||b):: C = 0 +16810 ns P1(a&&b):: C = 0 +16810 ns P2(a&&b):: C = 1 +16812 ns P1(a||b):: C = 1 +16812 ns P2(a||b):: C = 0 +16816 ns P1(a&&b):: C = 0 +16816 ns P2(a&&b):: C = 1 +16818 ns P1(a||b):: C = 0 +16818 ns P2(a||b):: C = 1 +16822 ns P1(a&&b):: C = 0 +16822 ns P2(a&&b):: C = 1 +16824 ns P1(a||b):: C = 0 +16824 ns P2(a||b):: C = 1 +16828 ns P1(a&&b):: C = 0 +16828 ns P2(a&&b):: C = 1 +16830 ns P1(a||b):: C = 1 +16830 ns P2(a||b):: C = 0 +16834 ns P1(a&&b):: C = 1 +16834 ns P2(a&&b):: C = 0 +16836 ns P1(a||b):: C = 1 +16836 ns P2(a||b):: C = 0 +16840 ns P1(a&&b):: C = 0 +16840 ns P2(a&&b):: C = 1 +16842 ns P1(a||b):: C = 0 +16842 ns P2(a||b):: C = 1 +16846 ns P1(a&&b):: C = 0 +16846 ns P2(a&&b):: C = 1 +16848 ns P1(a||b):: C = 1 +16848 ns P2(a||b):: C = 0 +16852 ns P1(a&&b):: C = 0 +16852 ns P2(a&&b):: C = 1 +16854 ns P1(a||b):: C = 1 +16854 ns P2(a||b):: C = 0 +16858 ns P1(a&&b):: C = 0 +16858 ns P2(a&&b):: C = 1 +16860 ns P1(a||b):: C = 1 +16860 ns P2(a||b):: C = 0 +16864 ns P1(a&&b):: C = 0 +16864 ns P2(a&&b):: C = 1 +16866 ns P1(a||b):: C = 1 +16866 ns P2(a||b):: C = 0 +16870 ns P1(a&&b):: C = 1 +16870 ns P2(a&&b):: C = 0 +16872 ns P1(a||b):: C = 0 +16872 ns P2(a||b):: C = 1 +16876 ns P1(a&&b):: C = 0 +16876 ns P2(a&&b):: C = 1 +16878 ns P1(a||b):: C = 1 +16878 ns P2(a||b):: C = 0 +16882 ns P1(a&&b):: C = 0 +16882 ns P2(a&&b):: C = 1 +16884 ns P1(a||b):: C = 1 +16884 ns P2(a||b):: C = 0 +16888 ns P1(a&&b):: C = 0 +16888 ns P2(a&&b):: C = 1 +16890 ns P1(a||b):: C = 0 +16890 ns P2(a||b):: C = 1 +16894 ns P1(a&&b):: C = 0 +16894 ns P2(a&&b):: C = 1 +16896 ns P1(a||b):: C = 1 +16896 ns P2(a||b):: C = 0 +16900 ns P1(a&&b):: C = 0 +16900 ns P2(a&&b):: C = 1 +16902 ns P1(a||b):: C = 1 +16902 ns P2(a||b):: C = 0 +16906 ns P1(a&&b):: C = 1 +16906 ns P2(a&&b):: C = 0 +16908 ns P1(a||b):: C = 0 +16908 ns P2(a||b):: C = 1 +16912 ns P1(a&&b):: C = 0 +16912 ns P2(a&&b):: C = 1 +16914 ns P1(a||b):: C = 1 +16914 ns P2(a||b):: C = 0 +16918 ns P1(a&&b):: C = 0 +16918 ns P2(a&&b):: C = 1 +16920 ns P1(a||b):: C = 1 +16920 ns P2(a||b):: C = 0 +16924 ns P1(a&&b):: C = 0 +16924 ns P2(a&&b):: C = 1 +16926 ns P1(a||b):: C = 1 +16926 ns P2(a||b):: C = 0 +16930 ns P1(a&&b):: C = 1 +16930 ns P2(a&&b):: C = 0 +16932 ns P1(a||b):: C = 1 +16932 ns P2(a||b):: C = 0 +16936 ns P1(a&&b):: C = 0 +16936 ns P2(a&&b):: C = 1 +16938 ns P1(a||b):: C = 0 +16938 ns P2(a||b):: C = 1 +16942 ns P1(a&&b):: C = 0 +16942 ns P2(a&&b):: C = 1 +16944 ns P1(a||b):: C = 0 +16944 ns P2(a||b):: C = 1 +16948 ns P1(a&&b):: C = 0 +16948 ns P2(a&&b):: C = 1 +16950 ns P1(a||b):: C = 1 +16950 ns P2(a||b):: C = 0 +16954 ns P1(a&&b):: C = 0 +16954 ns P2(a&&b):: C = 1 +16956 ns P1(a||b):: C = 0 +16956 ns P2(a||b):: C = 1 +16960 ns P1(a&&b):: C = 0 +16960 ns P2(a&&b):: C = 1 +16962 ns P1(a||b):: C = 1 +16962 ns P2(a||b):: C = 0 +16966 ns P1(a&&b):: C = 0 +16966 ns P2(a&&b):: C = 1 +16968 ns P1(a||b):: C = 1 +16968 ns P2(a||b):: C = 0 +16972 ns P1(a&&b):: C = 0 +16972 ns P2(a&&b):: C = 1 +16974 ns P1(a||b):: C = 0 +16974 ns P2(a||b):: C = 1 +16978 ns P1(a&&b):: C = 0 +16978 ns P2(a&&b):: C = 1 +16980 ns P1(a||b):: C = 1 +16980 ns P2(a||b):: C = 0 +16984 ns P1(a&&b):: C = 1 +16984 ns P2(a&&b):: C = 0 +16986 ns P1(a||b):: C = 0 +16986 ns P2(a||b):: C = 1 +16990 ns P1(a&&b):: C = 0 +16990 ns P2(a&&b):: C = 1 +16992 ns P1(a||b):: C = 1 +16992 ns P2(a||b):: C = 0 +16996 ns P1(a&&b):: C = 1 +16996 ns P2(a&&b):: C = 0 +16998 ns P1(a||b):: C = 1 +16998 ns P2(a||b):: C = 0 +17002 ns P1(a&&b):: C = 0 +17002 ns P2(a&&b):: C = 1 +17004 ns P1(a||b):: C = 0 +17004 ns P2(a||b):: C = 1 +17008 ns P1(a&&b):: C = 1 +17008 ns P2(a&&b):: C = 0 +17010 ns P1(a||b):: C = 0 +17010 ns P2(a||b):: C = 1 +17014 ns P1(a&&b):: C = 1 +17014 ns P2(a&&b):: C = 0 +17016 ns P1(a||b):: C = 0 +17016 ns P2(a||b):: C = 1 +17020 ns P1(a&&b):: C = 0 +17020 ns P2(a&&b):: C = 1 +17022 ns P1(a||b):: C = 1 +17022 ns P2(a||b):: C = 0 +17026 ns P1(a&&b):: C = 0 +17026 ns P2(a&&b):: C = 1 +17028 ns P1(a||b):: C = 1 +17028 ns P2(a||b):: C = 0 +17032 ns P1(a&&b):: C = 1 +17032 ns P2(a&&b):: C = 0 +17034 ns P1(a||b):: C = 1 +17034 ns P2(a||b):: C = 0 +17038 ns P1(a&&b):: C = 1 +17038 ns P2(a&&b):: C = 0 +17040 ns P1(a||b):: C = 1 +17040 ns P2(a||b):: C = 0 +17044 ns P1(a&&b):: C = 0 +17044 ns P2(a&&b):: C = 1 +17046 ns P1(a||b):: C = 0 +17046 ns P2(a||b):: C = 1 +17050 ns P1(a&&b):: C = 0 +17050 ns P2(a&&b):: C = 1 +17052 ns P1(a||b):: C = 1 +17052 ns P2(a||b):: C = 0 +17056 ns P1(a&&b):: C = 0 +17056 ns P2(a&&b):: C = 1 +17058 ns P1(a||b):: C = 0 +17058 ns P2(a||b):: C = 1 +17062 ns P1(a&&b):: C = 0 +17062 ns P2(a&&b):: C = 1 +17064 ns P1(a||b):: C = 1 +17064 ns P2(a||b):: C = 0 +17068 ns P1(a&&b):: C = 0 +17068 ns P2(a&&b):: C = 1 +17070 ns P1(a||b):: C = 1 +17070 ns P2(a||b):: C = 0 +17074 ns P1(a&&b):: C = 1 +17074 ns P2(a&&b):: C = 0 +17076 ns P1(a||b):: C = 1 +17076 ns P2(a||b):: C = 0 +17080 ns P1(a&&b):: C = 0 +17080 ns P2(a&&b):: C = 1 +17082 ns P1(a||b):: C = 1 +17082 ns P2(a||b):: C = 0 +17086 ns P1(a&&b):: C = 0 +17086 ns P2(a&&b):: C = 1 +17088 ns P1(a||b):: C = 0 +17088 ns P2(a||b):: C = 1 +17092 ns P1(a&&b):: C = 1 +17092 ns P2(a&&b):: C = 0 +17094 ns P1(a||b):: C = 1 +17094 ns P2(a||b):: C = 0 +17098 ns P1(a&&b):: C = 0 +17098 ns P2(a&&b):: C = 1 +17100 ns P1(a||b):: C = 1 +17100 ns P2(a||b):: C = 0 +17104 ns P1(a&&b):: C = 0 +17104 ns P2(a&&b):: C = 1 +17106 ns P1(a||b):: C = 1 +17106 ns P2(a||b):: C = 0 +17110 ns P1(a&&b):: C = 0 +17110 ns P2(a&&b):: C = 1 +17112 ns P1(a||b):: C = 1 +17112 ns P2(a||b):: C = 0 +17116 ns P1(a&&b):: C = 0 +17116 ns P2(a&&b):: C = 1 +17118 ns P1(a||b):: C = 1 +17118 ns P2(a||b):: C = 0 +17122 ns P1(a&&b):: C = 0 +17122 ns P2(a&&b):: C = 1 +17124 ns P1(a||b):: C = 1 +17124 ns P2(a||b):: C = 0 +17128 ns P1(a&&b):: C = 0 +17128 ns P2(a&&b):: C = 1 +17130 ns P1(a||b):: C = 0 +17130 ns P2(a||b):: C = 1 +17134 ns P1(a&&b):: C = 1 +17134 ns P2(a&&b):: C = 0 +17136 ns P1(a||b):: C = 1 +17136 ns P2(a||b):: C = 0 +17140 ns P1(a&&b):: C = 0 +17140 ns P2(a&&b):: C = 1 +17142 ns P1(a||b):: C = 1 +17142 ns P2(a||b):: C = 0 +17146 ns P1(a&&b):: C = 0 +17146 ns P2(a&&b):: C = 1 +17148 ns P1(a||b):: C = 1 +17148 ns P2(a||b):: C = 0 +17152 ns P1(a&&b):: C = 0 +17152 ns P2(a&&b):: C = 1 +17154 ns P1(a||b):: C = 1 +17154 ns P2(a||b):: C = 0 +17158 ns P1(a&&b):: C = 0 +17158 ns P2(a&&b):: C = 1 +17160 ns P1(a||b):: C = 0 +17160 ns P2(a||b):: C = 1 +17164 ns P1(a&&b):: C = 0 +17164 ns P2(a&&b):: C = 1 +17166 ns P1(a||b):: C = 0 +17166 ns P2(a||b):: C = 1 +17170 ns P1(a&&b):: C = 1 +17170 ns P2(a&&b):: C = 0 +17172 ns P1(a||b):: C = 1 +17172 ns P2(a||b):: C = 0 +17176 ns P1(a&&b):: C = 0 +17176 ns P2(a&&b):: C = 1 +17178 ns P1(a||b):: C = 1 +17178 ns P2(a||b):: C = 0 +17182 ns P1(a&&b):: C = 1 +17182 ns P2(a&&b):: C = 0 +17184 ns P1(a||b):: C = 0 +17184 ns P2(a||b):: C = 1 +17188 ns P1(a&&b):: C = 0 +17188 ns P2(a&&b):: C = 1 +17190 ns P1(a||b):: C = 0 +17190 ns P2(a||b):: C = 1 +17194 ns P1(a&&b):: C = 0 +17194 ns P2(a&&b):: C = 1 +17196 ns P1(a||b):: C = 1 +17196 ns P2(a||b):: C = 0 +17200 ns P1(a&&b):: C = 1 +17200 ns P2(a&&b):: C = 0 +17202 ns P1(a||b):: C = 1 +17202 ns P2(a||b):: C = 0 +17206 ns P1(a&&b):: C = 0 +17206 ns P2(a&&b):: C = 1 +17208 ns P1(a||b):: C = 0 +17208 ns P2(a||b):: C = 1 +17212 ns P1(a&&b):: C = 0 +17212 ns P2(a&&b):: C = 1 +17214 ns P1(a||b):: C = 1 +17214 ns P2(a||b):: C = 0 +17218 ns P1(a&&b):: C = 1 +17218 ns P2(a&&b):: C = 0 +17220 ns P1(a||b):: C = 1 +17220 ns P2(a||b):: C = 0 +17224 ns P1(a&&b):: C = 0 +17224 ns P2(a&&b):: C = 1 +17226 ns P1(a||b):: C = 1 +17226 ns P2(a||b):: C = 0 +17230 ns P1(a&&b):: C = 0 +17230 ns P2(a&&b):: C = 1 +17232 ns P1(a||b):: C = 1 +17232 ns P2(a||b):: C = 0 +17236 ns P1(a&&b):: C = 0 +17236 ns P2(a&&b):: C = 1 +17238 ns P1(a||b):: C = 1 +17238 ns P2(a||b):: C = 0 +17242 ns P1(a&&b):: C = 0 +17242 ns P2(a&&b):: C = 1 +17244 ns P1(a||b):: C = 1 +17244 ns P2(a||b):: C = 0 +17248 ns P1(a&&b):: C = 0 +17248 ns P2(a&&b):: C = 1 +17250 ns P1(a||b):: C = 1 +17250 ns P2(a||b):: C = 0 +17254 ns P1(a&&b):: C = 0 +17254 ns P2(a&&b):: C = 1 +17256 ns P1(a||b):: C = 0 +17256 ns P2(a||b):: C = 1 +17260 ns P1(a&&b):: C = 0 +17260 ns P2(a&&b):: C = 1 +17262 ns P1(a||b):: C = 1 +17262 ns P2(a||b):: C = 0 +17266 ns P1(a&&b):: C = 0 +17266 ns P2(a&&b):: C = 1 +17268 ns P1(a||b):: C = 1 +17268 ns P2(a||b):: C = 0 +17272 ns P1(a&&b):: C = 0 +17272 ns P2(a&&b):: C = 1 +17274 ns P1(a||b):: C = 1 +17274 ns P2(a||b):: C = 0 +17278 ns P1(a&&b):: C = 0 +17278 ns P2(a&&b):: C = 1 +17280 ns P1(a||b):: C = 1 +17280 ns P2(a||b):: C = 0 +17284 ns P1(a&&b):: C = 0 +17284 ns P2(a&&b):: C = 1 +17286 ns P1(a||b):: C = 1 +17286 ns P2(a||b):: C = 0 +17290 ns P1(a&&b):: C = 1 +17290 ns P2(a&&b):: C = 0 +17292 ns P1(a||b):: C = 0 +17292 ns P2(a||b):: C = 1 +17296 ns P1(a&&b):: C = 0 +17296 ns P2(a&&b):: C = 1 +17298 ns P1(a||b):: C = 1 +17298 ns P2(a||b):: C = 0 +17302 ns P1(a&&b):: C = 0 +17302 ns P2(a&&b):: C = 1 +17304 ns P1(a||b):: C = 1 +17304 ns P2(a||b):: C = 0 +17308 ns P1(a&&b):: C = 1 +17308 ns P2(a&&b):: C = 0 +17310 ns P1(a||b):: C = 1 +17310 ns P2(a||b):: C = 0 +17314 ns P1(a&&b):: C = 0 +17314 ns P2(a&&b):: C = 1 +17316 ns P1(a||b):: C = 1 +17316 ns P2(a||b):: C = 0 +17320 ns P1(a&&b):: C = 0 +17320 ns P2(a&&b):: C = 1 +17322 ns P1(a||b):: C = 0 +17322 ns P2(a||b):: C = 1 +17326 ns P1(a&&b):: C = 0 +17326 ns P2(a&&b):: C = 1 +17328 ns P1(a||b):: C = 1 +17328 ns P2(a||b):: C = 0 +17332 ns P1(a&&b):: C = 0 +17332 ns P2(a&&b):: C = 1 +17334 ns P1(a||b):: C = 1 +17334 ns P2(a||b):: C = 0 +17338 ns P1(a&&b):: C = 0 +17338 ns P2(a&&b):: C = 1 +17340 ns P1(a||b):: C = 1 +17340 ns P2(a||b):: C = 0 +17344 ns P1(a&&b):: C = 0 +17344 ns P2(a&&b):: C = 1 +17346 ns P1(a||b):: C = 0 +17346 ns P2(a||b):: C = 1 +17350 ns P1(a&&b):: C = 0 +17350 ns P2(a&&b):: C = 1 +17352 ns P1(a||b):: C = 1 +17352 ns P2(a||b):: C = 0 +17356 ns P1(a&&b):: C = 0 +17356 ns P2(a&&b):: C = 1 +17358 ns P1(a||b):: C = 1 +17358 ns P2(a||b):: C = 0 +17362 ns P1(a&&b):: C = 0 +17362 ns P2(a&&b):: C = 1 +17364 ns P1(a||b):: C = 1 +17364 ns P2(a||b):: C = 0 +17368 ns P1(a&&b):: C = 0 +17368 ns P2(a&&b):: C = 1 +17370 ns P1(a||b):: C = 1 +17370 ns P2(a||b):: C = 0 +17374 ns P1(a&&b):: C = 0 +17374 ns P2(a&&b):: C = 1 +17376 ns P1(a||b):: C = 0 +17376 ns P2(a||b):: C = 1 +17380 ns P1(a&&b):: C = 1 +17380 ns P2(a&&b):: C = 0 +17382 ns P1(a||b):: C = 1 +17382 ns P2(a||b):: C = 0 +17386 ns P1(a&&b):: C = 0 +17386 ns P2(a&&b):: C = 1 +17388 ns P1(a||b):: C = 0 +17388 ns P2(a||b):: C = 1 +17392 ns P1(a&&b):: C = 1 +17392 ns P2(a&&b):: C = 0 +17394 ns P1(a||b):: C = 0 +17394 ns P2(a||b):: C = 1 +17398 ns P1(a&&b):: C = 0 +17398 ns P2(a&&b):: C = 1 +17400 ns P1(a||b):: C = 0 +17400 ns P2(a||b):: C = 1 +17404 ns P1(a&&b):: C = 0 +17404 ns P2(a&&b):: C = 1 +17406 ns P1(a||b):: C = 1 +17406 ns P2(a||b):: C = 0 +17410 ns P1(a&&b):: C = 0 +17410 ns P2(a&&b):: C = 1 +17412 ns P1(a||b):: C = 1 +17412 ns P2(a||b):: C = 0 +17416 ns P1(a&&b):: C = 0 +17416 ns P2(a&&b):: C = 1 +17418 ns P1(a||b):: C = 0 +17418 ns P2(a||b):: C = 1 +17422 ns P1(a&&b):: C = 0 +17422 ns P2(a&&b):: C = 1 +17424 ns P1(a||b):: C = 1 +17424 ns P2(a||b):: C = 0 +17428 ns P1(a&&b):: C = 1 +17428 ns P2(a&&b):: C = 0 +17430 ns P1(a||b):: C = 1 +17430 ns P2(a||b):: C = 0 +17434 ns P1(a&&b):: C = 0 +17434 ns P2(a&&b):: C = 1 +17436 ns P1(a||b):: C = 0 +17436 ns P2(a||b):: C = 1 +17440 ns P1(a&&b):: C = 0 +17440 ns P2(a&&b):: C = 1 +17442 ns P1(a||b):: C = 0 +17442 ns P2(a||b):: C = 1 +17446 ns P1(a&&b):: C = 0 +17446 ns P2(a&&b):: C = 1 +17448 ns P1(a||b):: C = 1 +17448 ns P2(a||b):: C = 0 +17452 ns P1(a&&b):: C = 1 +17452 ns P2(a&&b):: C = 0 +17454 ns P1(a||b):: C = 1 +17454 ns P2(a||b):: C = 0 +17458 ns P1(a&&b):: C = 0 +17458 ns P2(a&&b):: C = 1 +17460 ns P1(a||b):: C = 1 +17460 ns P2(a||b):: C = 0 +17464 ns P1(a&&b):: C = 0 +17464 ns P2(a&&b):: C = 1 +17466 ns P1(a||b):: C = 0 +17466 ns P2(a||b):: C = 1 +17470 ns P1(a&&b):: C = 0 +17470 ns P2(a&&b):: C = 1 +17472 ns P1(a||b):: C = 0 +17472 ns P2(a||b):: C = 1 +17476 ns P1(a&&b):: C = 0 +17476 ns P2(a&&b):: C = 1 +17478 ns P1(a||b):: C = 1 +17478 ns P2(a||b):: C = 0 +17482 ns P1(a&&b):: C = 0 +17482 ns P2(a&&b):: C = 1 +17484 ns P1(a||b):: C = 0 +17484 ns P2(a||b):: C = 1 +17488 ns P1(a&&b):: C = 0 +17488 ns P2(a&&b):: C = 1 +17490 ns P1(a||b):: C = 1 +17490 ns P2(a||b):: C = 0 +17494 ns P1(a&&b):: C = 1 +17494 ns P2(a&&b):: C = 0 +17496 ns P1(a||b):: C = 1 +17496 ns P2(a||b):: C = 0 +17500 ns P1(a&&b):: C = 1 +17500 ns P2(a&&b):: C = 0 +17502 ns P1(a||b):: C = 1 +17502 ns P2(a||b):: C = 0 +17506 ns P1(a&&b):: C = 1 +17506 ns P2(a&&b):: C = 0 +17508 ns P1(a||b):: C = 0 +17508 ns P2(a||b):: C = 1 +17512 ns P1(a&&b):: C = 0 +17512 ns P2(a&&b):: C = 1 +17514 ns P1(a||b):: C = 1 +17514 ns P2(a||b):: C = 0 +17518 ns P1(a&&b):: C = 0 +17518 ns P2(a&&b):: C = 1 +17520 ns P1(a||b):: C = 1 +17520 ns P2(a||b):: C = 0 +17524 ns P1(a&&b):: C = 1 +17524 ns P2(a&&b):: C = 0 +17526 ns P1(a||b):: C = 1 +17526 ns P2(a||b):: C = 0 +17530 ns P1(a&&b):: C = 0 +17530 ns P2(a&&b):: C = 1 +17532 ns P1(a||b):: C = 1 +17532 ns P2(a||b):: C = 0 +17536 ns P1(a&&b):: C = 1 +17536 ns P2(a&&b):: C = 0 +17538 ns P1(a||b):: C = 1 +17538 ns P2(a||b):: C = 0 +17542 ns P1(a&&b):: C = 0 +17542 ns P2(a&&b):: C = 1 +17544 ns P1(a||b):: C = 0 +17544 ns P2(a||b):: C = 1 +17548 ns P1(a&&b):: C = 0 +17548 ns P2(a&&b):: C = 1 +17550 ns P1(a||b):: C = 1 +17550 ns P2(a||b):: C = 0 +17554 ns P1(a&&b):: C = 0 +17554 ns P2(a&&b):: C = 1 +17556 ns P1(a||b):: C = 0 +17556 ns P2(a||b):: C = 1 +17560 ns P1(a&&b):: C = 0 +17560 ns P2(a&&b):: C = 1 +17562 ns P1(a||b):: C = 1 +17562 ns P2(a||b):: C = 0 +17566 ns P1(a&&b):: C = 0 +17566 ns P2(a&&b):: C = 1 +17568 ns P1(a||b):: C = 1 +17568 ns P2(a||b):: C = 0 +17572 ns P1(a&&b):: C = 0 +17572 ns P2(a&&b):: C = 1 +17574 ns P1(a||b):: C = 1 +17574 ns P2(a||b):: C = 0 +17578 ns P1(a&&b):: C = 0 +17578 ns P2(a&&b):: C = 1 +17580 ns P1(a||b):: C = 1 +17580 ns P2(a||b):: C = 0 +17584 ns P1(a&&b):: C = 0 +17584 ns P2(a&&b):: C = 1 +17586 ns P1(a||b):: C = 1 +17586 ns P2(a||b):: C = 0 +17590 ns P1(a&&b):: C = 0 +17590 ns P2(a&&b):: C = 1 +17592 ns P1(a||b):: C = 0 +17592 ns P2(a||b):: C = 1 +17596 ns P1(a&&b):: C = 0 +17596 ns P2(a&&b):: C = 1 +17598 ns P1(a||b):: C = 1 +17598 ns P2(a||b):: C = 0 +17602 ns P1(a&&b):: C = 0 +17602 ns P2(a&&b):: C = 1 +17604 ns P1(a||b):: C = 1 +17604 ns P2(a||b):: C = 0 +17608 ns P1(a&&b):: C = 0 +17608 ns P2(a&&b):: C = 1 +17610 ns P1(a||b):: C = 0 +17610 ns P2(a||b):: C = 1 +17614 ns P1(a&&b):: C = 0 +17614 ns P2(a&&b):: C = 1 +17616 ns P1(a||b):: C = 1 +17616 ns P2(a||b):: C = 0 +17620 ns P1(a&&b):: C = 1 +17620 ns P2(a&&b):: C = 0 +17622 ns P1(a||b):: C = 1 +17622 ns P2(a||b):: C = 0 +17626 ns P1(a&&b):: C = 0 +17626 ns P2(a&&b):: C = 1 +17628 ns P1(a||b):: C = 1 +17628 ns P2(a||b):: C = 0 +17632 ns P1(a&&b):: C = 0 +17632 ns P2(a&&b):: C = 1 +17634 ns P1(a||b):: C = 1 +17634 ns P2(a||b):: C = 0 +17638 ns P1(a&&b):: C = 0 +17638 ns P2(a&&b):: C = 1 +17640 ns P1(a||b):: C = 1 +17640 ns P2(a||b):: C = 0 +17644 ns P1(a&&b):: C = 0 +17644 ns P2(a&&b):: C = 1 +17646 ns P1(a||b):: C = 1 +17646 ns P2(a||b):: C = 0 +17650 ns P1(a&&b):: C = 0 +17650 ns P2(a&&b):: C = 1 +17652 ns P1(a||b):: C = 1 +17652 ns P2(a||b):: C = 0 +17656 ns P1(a&&b):: C = 0 +17656 ns P2(a&&b):: C = 1 +17658 ns P1(a||b):: C = 1 +17658 ns P2(a||b):: C = 0 +17662 ns P1(a&&b):: C = 0 +17662 ns P2(a&&b):: C = 1 +17664 ns P1(a||b):: C = 1 +17664 ns P2(a||b):: C = 0 +17668 ns P1(a&&b):: C = 1 +17668 ns P2(a&&b):: C = 0 +17670 ns P1(a||b):: C = 0 +17670 ns P2(a||b):: C = 1 +17674 ns P1(a&&b):: C = 0 +17674 ns P2(a&&b):: C = 1 +17676 ns P1(a||b):: C = 0 +17676 ns P2(a||b):: C = 1 +17680 ns P1(a&&b):: C = 0 +17680 ns P2(a&&b):: C = 1 +17682 ns P1(a||b):: C = 1 +17682 ns P2(a||b):: C = 0 +17686 ns P1(a&&b):: C = 0 +17686 ns P2(a&&b):: C = 1 +17688 ns P1(a||b):: C = 1 +17688 ns P2(a||b):: C = 0 +17692 ns P1(a&&b):: C = 1 +17692 ns P2(a&&b):: C = 0 +17694 ns P1(a||b):: C = 1 +17694 ns P2(a||b):: C = 0 +17698 ns P1(a&&b):: C = 0 +17698 ns P2(a&&b):: C = 1 +17700 ns P1(a||b):: C = 1 +17700 ns P2(a||b):: C = 0 +17704 ns P1(a&&b):: C = 1 +17704 ns P2(a&&b):: C = 0 +17706 ns P1(a||b):: C = 1 +17706 ns P2(a||b):: C = 0 +17710 ns P1(a&&b):: C = 0 +17710 ns P2(a&&b):: C = 1 +17712 ns P1(a||b):: C = 0 +17712 ns P2(a||b):: C = 1 +17716 ns P1(a&&b):: C = 1 +17716 ns P2(a&&b):: C = 0 +17718 ns P1(a||b):: C = 0 +17718 ns P2(a||b):: C = 1 +17722 ns P1(a&&b):: C = 0 +17722 ns P2(a&&b):: C = 1 +17724 ns P1(a||b):: C = 1 +17724 ns P2(a||b):: C = 0 +17728 ns P1(a&&b):: C = 0 +17728 ns P2(a&&b):: C = 1 +17730 ns P1(a||b):: C = 0 +17730 ns P2(a||b):: C = 1 +17734 ns P1(a&&b):: C = 0 +17734 ns P2(a&&b):: C = 1 +17736 ns P1(a||b):: C = 1 +17736 ns P2(a||b):: C = 0 +17740 ns P1(a&&b):: C = 0 +17740 ns P2(a&&b):: C = 1 +17742 ns P1(a||b):: C = 1 +17742 ns P2(a||b):: C = 0 +17746 ns P1(a&&b):: C = 1 +17746 ns P2(a&&b):: C = 0 +17748 ns P1(a||b):: C = 1 +17748 ns P2(a||b):: C = 0 +17752 ns P1(a&&b):: C = 0 +17752 ns P2(a&&b):: C = 1 +17754 ns P1(a||b):: C = 1 +17754 ns P2(a||b):: C = 0 +17758 ns P1(a&&b):: C = 0 +17758 ns P2(a&&b):: C = 1 +17760 ns P1(a||b):: C = 0 +17760 ns P2(a||b):: C = 1 +17764 ns P1(a&&b):: C = 1 +17764 ns P2(a&&b):: C = 0 +17766 ns P1(a||b):: C = 1 +17766 ns P2(a||b):: C = 0 +17770 ns P1(a&&b):: C = 1 +17770 ns P2(a&&b):: C = 0 +17772 ns P1(a||b):: C = 1 +17772 ns P2(a||b):: C = 0 +17776 ns P1(a&&b):: C = 0 +17776 ns P2(a&&b):: C = 1 +17778 ns P1(a||b):: C = 1 +17778 ns P2(a||b):: C = 0 +17782 ns P1(a&&b):: C = 0 +17782 ns P2(a&&b):: C = 1 +17784 ns P1(a||b):: C = 1 +17784 ns P2(a||b):: C = 0 +17788 ns P1(a&&b):: C = 0 +17788 ns P2(a&&b):: C = 1 +17790 ns P1(a||b):: C = 1 +17790 ns P2(a||b):: C = 0 +17794 ns P1(a&&b):: C = 1 +17794 ns P2(a&&b):: C = 0 +17796 ns P1(a||b):: C = 1 +17796 ns P2(a||b):: C = 0 +17800 ns P1(a&&b):: C = 0 +17800 ns P2(a&&b):: C = 1 +17802 ns P1(a||b):: C = 0 +17802 ns P2(a||b):: C = 1 +17806 ns P1(a&&b):: C = 1 +17806 ns P2(a&&b):: C = 0 +17808 ns P1(a||b):: C = 1 +17808 ns P2(a||b):: C = 0 +17812 ns P1(a&&b):: C = 0 +17812 ns P2(a&&b):: C = 1 +17814 ns P1(a||b):: C = 1 +17814 ns P2(a||b):: C = 0 +17818 ns P1(a&&b):: C = 0 +17818 ns P2(a&&b):: C = 1 +17820 ns P1(a||b):: C = 1 +17820 ns P2(a||b):: C = 0 +17824 ns P1(a&&b):: C = 1 +17824 ns P2(a&&b):: C = 0 +17826 ns P1(a||b):: C = 1 +17826 ns P2(a||b):: C = 0 +17830 ns P1(a&&b):: C = 0 +17830 ns P2(a&&b):: C = 1 +17832 ns P1(a||b):: C = 1 +17832 ns P2(a||b):: C = 0 +17836 ns P1(a&&b):: C = 1 +17836 ns P2(a&&b):: C = 0 +17838 ns P1(a||b):: C = 0 +17838 ns P2(a||b):: C = 1 +17842 ns P1(a&&b):: C = 0 +17842 ns P2(a&&b):: C = 1 +17844 ns P1(a||b):: C = 0 +17844 ns P2(a||b):: C = 1 +17848 ns P1(a&&b):: C = 0 +17848 ns P2(a&&b):: C = 1 +17850 ns P1(a||b):: C = 1 +17850 ns P2(a||b):: C = 0 +17854 ns P1(a&&b):: C = 0 +17854 ns P2(a&&b):: C = 1 +17856 ns P1(a||b):: C = 1 +17856 ns P2(a||b):: C = 0 +17860 ns P1(a&&b):: C = 1 +17860 ns P2(a&&b):: C = 0 +17862 ns P1(a||b):: C = 1 +17862 ns P2(a||b):: C = 0 +17866 ns P1(a&&b):: C = 0 +17866 ns P2(a&&b):: C = 1 +17868 ns P1(a||b):: C = 1 +17868 ns P2(a||b):: C = 0 +17872 ns P1(a&&b):: C = 0 +17872 ns P2(a&&b):: C = 1 +17874 ns P1(a||b):: C = 1 +17874 ns P2(a||b):: C = 0 +17878 ns P1(a&&b):: C = 1 +17878 ns P2(a&&b):: C = 0 +17880 ns P1(a||b):: C = 1 +17880 ns P2(a||b):: C = 0 +17884 ns P1(a&&b):: C = 0 +17884 ns P2(a&&b):: C = 1 +17886 ns P1(a||b):: C = 0 +17886 ns P2(a||b):: C = 1 +17890 ns P1(a&&b):: C = 0 +17890 ns P2(a&&b):: C = 1 +17892 ns P1(a||b):: C = 0 +17892 ns P2(a||b):: C = 1 +17896 ns P1(a&&b):: C = 0 +17896 ns P2(a&&b):: C = 1 +17898 ns P1(a||b):: C = 0 +17898 ns P2(a||b):: C = 1 +17902 ns P1(a&&b):: C = 0 +17902 ns P2(a&&b):: C = 1 +17904 ns P1(a||b):: C = 0 +17904 ns P2(a||b):: C = 1 +17908 ns P1(a&&b):: C = 0 +17908 ns P2(a&&b):: C = 1 +17910 ns P1(a||b):: C = 1 +17910 ns P2(a||b):: C = 0 +17914 ns P1(a&&b):: C = 1 +17914 ns P2(a&&b):: C = 0 +17916 ns P1(a||b):: C = 1 +17916 ns P2(a||b):: C = 0 +17920 ns P1(a&&b):: C = 0 +17920 ns P2(a&&b):: C = 1 +17922 ns P1(a||b):: C = 0 +17922 ns P2(a||b):: C = 1 +17926 ns P1(a&&b):: C = 0 +17926 ns P2(a&&b):: C = 1 +17928 ns P1(a||b):: C = 0 +17928 ns P2(a||b):: C = 1 +17932 ns P1(a&&b):: C = 1 +17932 ns P2(a&&b):: C = 0 +17934 ns P1(a||b):: C = 0 +17934 ns P2(a||b):: C = 1 +17938 ns P1(a&&b):: C = 0 +17938 ns P2(a&&b):: C = 1 +17940 ns P1(a||b):: C = 1 +17940 ns P2(a||b):: C = 0 +17944 ns P1(a&&b):: C = 0 +17944 ns P2(a&&b):: C = 1 +17946 ns P1(a||b):: C = 0 +17946 ns P2(a||b):: C = 1 +17950 ns P1(a&&b):: C = 1 +17950 ns P2(a&&b):: C = 0 +17952 ns P1(a||b):: C = 1 +17952 ns P2(a||b):: C = 0 +17956 ns P1(a&&b):: C = 1 +17956 ns P2(a&&b):: C = 0 +17958 ns P1(a||b):: C = 0 +17958 ns P2(a||b):: C = 1 +17962 ns P1(a&&b):: C = 1 +17962 ns P2(a&&b):: C = 0 +17964 ns P1(a||b):: C = 1 +17964 ns P2(a||b):: C = 0 +17968 ns P1(a&&b):: C = 0 +17968 ns P2(a&&b):: C = 1 +17970 ns P1(a||b):: C = 1 +17970 ns P2(a||b):: C = 0 +17974 ns P1(a&&b):: C = 1 +17974 ns P2(a&&b):: C = 0 +17976 ns P1(a||b):: C = 1 +17976 ns P2(a||b):: C = 0 +17980 ns P1(a&&b):: C = 0 +17980 ns P2(a&&b):: C = 1 +17982 ns P1(a||b):: C = 1 +17982 ns P2(a||b):: C = 0 +17986 ns P1(a&&b):: C = 0 +17986 ns P2(a&&b):: C = 1 +17988 ns P1(a||b):: C = 1 +17988 ns P2(a||b):: C = 0 +17992 ns P1(a&&b):: C = 0 +17992 ns P2(a&&b):: C = 1 +17994 ns P1(a||b):: C = 1 +17994 ns P2(a||b):: C = 0 +17998 ns P1(a&&b):: C = 1 +17998 ns P2(a&&b):: C = 0 +18 us P1(a||b):: C = 0 +18 us P2(a||b):: C = 1 +18004 ns P1(a&&b):: C = 0 +18004 ns P2(a&&b):: C = 1 +18006 ns P1(a||b):: C = 0 +18006 ns P2(a||b):: C = 1 +18010 ns P1(a&&b):: C = 0 +18010 ns P2(a&&b):: C = 1 +18012 ns P1(a||b):: C = 1 +18012 ns P2(a||b):: C = 0 +18016 ns P1(a&&b):: C = 0 +18016 ns P2(a&&b):: C = 1 +18018 ns P1(a||b):: C = 0 +18018 ns P2(a||b):: C = 1 +18022 ns P1(a&&b):: C = 1 +18022 ns P2(a&&b):: C = 0 +18024 ns P1(a||b):: C = 1 +18024 ns P2(a||b):: C = 0 +18028 ns P1(a&&b):: C = 0 +18028 ns P2(a&&b):: C = 1 +18030 ns P1(a||b):: C = 1 +18030 ns P2(a||b):: C = 0 +18034 ns P1(a&&b):: C = 0 +18034 ns P2(a&&b):: C = 1 +18036 ns P1(a||b):: C = 1 +18036 ns P2(a||b):: C = 0 +18040 ns P1(a&&b):: C = 0 +18040 ns P2(a&&b):: C = 1 +18042 ns P1(a||b):: C = 1 +18042 ns P2(a||b):: C = 0 +18046 ns P1(a&&b):: C = 0 +18046 ns P2(a&&b):: C = 1 +18048 ns P1(a||b):: C = 0 +18048 ns P2(a||b):: C = 1 +18052 ns P1(a&&b):: C = 0 +18052 ns P2(a&&b):: C = 1 +18054 ns P1(a||b):: C = 1 +18054 ns P2(a||b):: C = 0 +18058 ns P1(a&&b):: C = 1 +18058 ns P2(a&&b):: C = 0 +18060 ns P1(a||b):: C = 1 +18060 ns P2(a||b):: C = 0 +18064 ns P1(a&&b):: C = 0 +18064 ns P2(a&&b):: C = 1 +18066 ns P1(a||b):: C = 1 +18066 ns P2(a||b):: C = 0 +18070 ns P1(a&&b):: C = 0 +18070 ns P2(a&&b):: C = 1 +18072 ns P1(a||b):: C = 1 +18072 ns P2(a||b):: C = 0 +18076 ns P1(a&&b):: C = 1 +18076 ns P2(a&&b):: C = 0 +18078 ns P1(a||b):: C = 1 +18078 ns P2(a||b):: C = 0 +18082 ns P1(a&&b):: C = 0 +18082 ns P2(a&&b):: C = 1 +18084 ns P1(a||b):: C = 0 +18084 ns P2(a||b):: C = 1 +18088 ns P1(a&&b):: C = 0 +18088 ns P2(a&&b):: C = 1 +18090 ns P1(a||b):: C = 1 +18090 ns P2(a||b):: C = 0 +18094 ns P1(a&&b):: C = 0 +18094 ns P2(a&&b):: C = 1 +18096 ns P1(a||b):: C = 1 +18096 ns P2(a||b):: C = 0 +18100 ns P1(a&&b):: C = 0 +18100 ns P2(a&&b):: C = 1 +18102 ns P1(a||b):: C = 1 +18102 ns P2(a||b):: C = 0 +18106 ns P1(a&&b):: C = 0 +18106 ns P2(a&&b):: C = 1 +18108 ns P1(a||b):: C = 1 +18108 ns P2(a||b):: C = 0 +18112 ns P1(a&&b):: C = 1 +18112 ns P2(a&&b):: C = 0 +18114 ns P1(a||b):: C = 1 +18114 ns P2(a||b):: C = 0 +18118 ns P1(a&&b):: C = 0 +18118 ns P2(a&&b):: C = 1 +18120 ns P1(a||b):: C = 0 +18120 ns P2(a||b):: C = 1 +18124 ns P1(a&&b):: C = 0 +18124 ns P2(a&&b):: C = 1 +18126 ns P1(a||b):: C = 0 +18126 ns P2(a||b):: C = 1 +18130 ns P1(a&&b):: C = 1 +18130 ns P2(a&&b):: C = 0 +18132 ns P1(a||b):: C = 0 +18132 ns P2(a||b):: C = 1 +18136 ns P1(a&&b):: C = 1 +18136 ns P2(a&&b):: C = 0 +18138 ns P1(a||b):: C = 1 +18138 ns P2(a||b):: C = 0 +18142 ns P1(a&&b):: C = 0 +18142 ns P2(a&&b):: C = 1 +18144 ns P1(a||b):: C = 1 +18144 ns P2(a||b):: C = 0 +18148 ns P1(a&&b):: C = 1 +18148 ns P2(a&&b):: C = 0 +18150 ns P1(a||b):: C = 1 +18150 ns P2(a||b):: C = 0 +18154 ns P1(a&&b):: C = 1 +18154 ns P2(a&&b):: C = 0 +18156 ns P1(a||b):: C = 1 +18156 ns P2(a||b):: C = 0 +18160 ns P1(a&&b):: C = 1 +18160 ns P2(a&&b):: C = 0 +18162 ns P1(a||b):: C = 1 +18162 ns P2(a||b):: C = 0 +18166 ns P1(a&&b):: C = 0 +18166 ns P2(a&&b):: C = 1 +18168 ns P1(a||b):: C = 1 +18168 ns P2(a||b):: C = 0 +18172 ns P1(a&&b):: C = 0 +18172 ns P2(a&&b):: C = 1 +18174 ns P1(a||b):: C = 0 +18174 ns P2(a||b):: C = 1 +18178 ns P1(a&&b):: C = 0 +18178 ns P2(a&&b):: C = 1 +18180 ns P1(a||b):: C = 1 +18180 ns P2(a||b):: C = 0 +18184 ns P1(a&&b):: C = 0 +18184 ns P2(a&&b):: C = 1 +18186 ns P1(a||b):: C = 1 +18186 ns P2(a||b):: C = 0 +18190 ns P1(a&&b):: C = 0 +18190 ns P2(a&&b):: C = 1 +18192 ns P1(a||b):: C = 0 +18192 ns P2(a||b):: C = 1 +18196 ns P1(a&&b):: C = 1 +18196 ns P2(a&&b):: C = 0 +18198 ns P1(a||b):: C = 1 +18198 ns P2(a||b):: C = 0 +18202 ns P1(a&&b):: C = 1 +18202 ns P2(a&&b):: C = 0 +18204 ns P1(a||b):: C = 1 +18204 ns P2(a||b):: C = 0 +18208 ns P1(a&&b):: C = 0 +18208 ns P2(a&&b):: C = 1 +18210 ns P1(a||b):: C = 1 +18210 ns P2(a||b):: C = 0 +18214 ns P1(a&&b):: C = 0 +18214 ns P2(a&&b):: C = 1 +18216 ns P1(a||b):: C = 1 +18216 ns P2(a||b):: C = 0 +18220 ns P1(a&&b):: C = 0 +18220 ns P2(a&&b):: C = 1 +18222 ns P1(a||b):: C = 0 +18222 ns P2(a||b):: C = 1 +18226 ns P1(a&&b):: C = 0 +18226 ns P2(a&&b):: C = 1 +18228 ns P1(a||b):: C = 1 +18228 ns P2(a||b):: C = 0 +18232 ns P1(a&&b):: C = 0 +18232 ns P2(a&&b):: C = 1 +18234 ns P1(a||b):: C = 1 +18234 ns P2(a||b):: C = 0 +18238 ns P1(a&&b):: C = 1 +18238 ns P2(a&&b):: C = 0 +18240 ns P1(a||b):: C = 1 +18240 ns P2(a||b):: C = 0 +18244 ns P1(a&&b):: C = 0 +18244 ns P2(a&&b):: C = 1 +18246 ns P1(a||b):: C = 1 +18246 ns P2(a||b):: C = 0 +18250 ns P1(a&&b):: C = 0 +18250 ns P2(a&&b):: C = 1 +18252 ns P1(a||b):: C = 1 +18252 ns P2(a||b):: C = 0 +18256 ns P1(a&&b):: C = 0 +18256 ns P2(a&&b):: C = 1 +18258 ns P1(a||b):: C = 1 +18258 ns P2(a||b):: C = 0 +18262 ns P1(a&&b):: C = 1 +18262 ns P2(a&&b):: C = 0 +18264 ns P1(a||b):: C = 0 +18264 ns P2(a||b):: C = 1 +18268 ns P1(a&&b):: C = 0 +18268 ns P2(a&&b):: C = 1 +18270 ns P1(a||b):: C = 0 +18270 ns P2(a||b):: C = 1 +18274 ns P1(a&&b):: C = 0 +18274 ns P2(a&&b):: C = 1 +18276 ns P1(a||b):: C = 0 +18276 ns P2(a||b):: C = 1 +18280 ns P1(a&&b):: C = 0 +18280 ns P2(a&&b):: C = 1 +18282 ns P1(a||b):: C = 0 +18282 ns P2(a||b):: C = 1 +18286 ns P1(a&&b):: C = 1 +18286 ns P2(a&&b):: C = 0 +18288 ns P1(a||b):: C = 0 +18288 ns P2(a||b):: C = 1 +18292 ns P1(a&&b):: C = 0 +18292 ns P2(a&&b):: C = 1 +18294 ns P1(a||b):: C = 1 +18294 ns P2(a||b):: C = 0 +18298 ns P1(a&&b):: C = 0 +18298 ns P2(a&&b):: C = 1 +18300 ns P1(a||b):: C = 1 +18300 ns P2(a||b):: C = 0 +18304 ns P1(a&&b):: C = 0 +18304 ns P2(a&&b):: C = 1 +18306 ns P1(a||b):: C = 1 +18306 ns P2(a||b):: C = 0 +18310 ns P1(a&&b):: C = 0 +18310 ns P2(a&&b):: C = 1 +18312 ns P1(a||b):: C = 0 +18312 ns P2(a||b):: C = 1 +18316 ns P1(a&&b):: C = 0 +18316 ns P2(a&&b):: C = 1 +18318 ns P1(a||b):: C = 0 +18318 ns P2(a||b):: C = 1 +18322 ns P1(a&&b):: C = 0 +18322 ns P2(a&&b):: C = 1 +18324 ns P1(a||b):: C = 1 +18324 ns P2(a||b):: C = 0 +18328 ns P1(a&&b):: C = 0 +18328 ns P2(a&&b):: C = 1 +18330 ns P1(a||b):: C = 1 +18330 ns P2(a||b):: C = 0 +18334 ns P1(a&&b):: C = 0 +18334 ns P2(a&&b):: C = 1 +18336 ns P1(a||b):: C = 1 +18336 ns P2(a||b):: C = 0 +18340 ns P1(a&&b):: C = 1 +18340 ns P2(a&&b):: C = 0 +18342 ns P1(a||b):: C = 1 +18342 ns P2(a||b):: C = 0 +18346 ns P1(a&&b):: C = 1 +18346 ns P2(a&&b):: C = 0 +18348 ns P1(a||b):: C = 1 +18348 ns P2(a||b):: C = 0 +18352 ns P1(a&&b):: C = 0 +18352 ns P2(a&&b):: C = 1 +18354 ns P1(a||b):: C = 1 +18354 ns P2(a||b):: C = 0 +18358 ns P1(a&&b):: C = 0 +18358 ns P2(a&&b):: C = 1 +18360 ns P1(a||b):: C = 1 +18360 ns P2(a||b):: C = 0 +18364 ns P1(a&&b):: C = 0 +18364 ns P2(a&&b):: C = 1 +18366 ns P1(a||b):: C = 1 +18366 ns P2(a||b):: C = 0 +18370 ns P1(a&&b):: C = 0 +18370 ns P2(a&&b):: C = 1 +18372 ns P1(a||b):: C = 0 +18372 ns P2(a||b):: C = 1 +18376 ns P1(a&&b):: C = 1 +18376 ns P2(a&&b):: C = 0 +18378 ns P1(a||b):: C = 1 +18378 ns P2(a||b):: C = 0 +18382 ns P1(a&&b):: C = 1 +18382 ns P2(a&&b):: C = 0 +18384 ns P1(a||b):: C = 1 +18384 ns P2(a||b):: C = 0 +18388 ns P1(a&&b):: C = 0 +18388 ns P2(a&&b):: C = 1 +18390 ns P1(a||b):: C = 0 +18390 ns P2(a||b):: C = 1 +18394 ns P1(a&&b):: C = 0 +18394 ns P2(a&&b):: C = 1 +18396 ns P1(a||b):: C = 0 +18396 ns P2(a||b):: C = 1 +18400 ns P1(a&&b):: C = 1 +18400 ns P2(a&&b):: C = 0 +18402 ns P1(a||b):: C = 1 +18402 ns P2(a||b):: C = 0 +18406 ns P1(a&&b):: C = 0 +18406 ns P2(a&&b):: C = 1 +18408 ns P1(a||b):: C = 1 +18408 ns P2(a||b):: C = 0 +18412 ns P1(a&&b):: C = 0 +18412 ns P2(a&&b):: C = 1 +18414 ns P1(a||b):: C = 1 +18414 ns P2(a||b):: C = 0 +18418 ns P1(a&&b):: C = 0 +18418 ns P2(a&&b):: C = 1 +18420 ns P1(a||b):: C = 1 +18420 ns P2(a||b):: C = 0 +18424 ns P1(a&&b):: C = 0 +18424 ns P2(a&&b):: C = 1 +18426 ns P1(a||b):: C = 1 +18426 ns P2(a||b):: C = 0 +18430 ns P1(a&&b):: C = 0 +18430 ns P2(a&&b):: C = 1 +18432 ns P1(a||b):: C = 1 +18432 ns P2(a||b):: C = 0 +18436 ns P1(a&&b):: C = 0 +18436 ns P2(a&&b):: C = 1 +18438 ns P1(a||b):: C = 1 +18438 ns P2(a||b):: C = 0 +18442 ns P1(a&&b):: C = 1 +18442 ns P2(a&&b):: C = 0 +18444 ns P1(a||b):: C = 1 +18444 ns P2(a||b):: C = 0 +18448 ns P1(a&&b):: C = 0 +18448 ns P2(a&&b):: C = 1 +18450 ns P1(a||b):: C = 1 +18450 ns P2(a||b):: C = 0 +18454 ns P1(a&&b):: C = 0 +18454 ns P2(a&&b):: C = 1 +18456 ns P1(a||b):: C = 1 +18456 ns P2(a||b):: C = 0 +18460 ns P1(a&&b):: C = 0 +18460 ns P2(a&&b):: C = 1 +18462 ns P1(a||b):: C = 1 +18462 ns P2(a||b):: C = 0 +18466 ns P1(a&&b):: C = 1 +18466 ns P2(a&&b):: C = 0 +18468 ns P1(a||b):: C = 1 +18468 ns P2(a||b):: C = 0 +18472 ns P1(a&&b):: C = 0 +18472 ns P2(a&&b):: C = 1 +18474 ns P1(a||b):: C = 0 +18474 ns P2(a||b):: C = 1 +18478 ns P1(a&&b):: C = 1 +18478 ns P2(a&&b):: C = 0 +18480 ns P1(a||b):: C = 1 +18480 ns P2(a||b):: C = 0 +18484 ns P1(a&&b):: C = 0 +18484 ns P2(a&&b):: C = 1 +18486 ns P1(a||b):: C = 1 +18486 ns P2(a||b):: C = 0 +18490 ns P1(a&&b):: C = 0 +18490 ns P2(a&&b):: C = 1 +18492 ns P1(a||b):: C = 0 +18492 ns P2(a||b):: C = 1 +18496 ns P1(a&&b):: C = 0 +18496 ns P2(a&&b):: C = 1 +18498 ns P1(a||b):: C = 1 +18498 ns P2(a||b):: C = 0 +18502 ns P1(a&&b):: C = 0 +18502 ns P2(a&&b):: C = 1 +18504 ns P1(a||b):: C = 0 +18504 ns P2(a||b):: C = 1 +18508 ns P1(a&&b):: C = 0 +18508 ns P2(a&&b):: C = 1 +18510 ns P1(a||b):: C = 1 +18510 ns P2(a||b):: C = 0 +18514 ns P1(a&&b):: C = 1 +18514 ns P2(a&&b):: C = 0 +18516 ns P1(a||b):: C = 1 +18516 ns P2(a||b):: C = 0 +18520 ns P1(a&&b):: C = 0 +18520 ns P2(a&&b):: C = 1 +18522 ns P1(a||b):: C = 1 +18522 ns P2(a||b):: C = 0 +18526 ns P1(a&&b):: C = 0 +18526 ns P2(a&&b):: C = 1 +18528 ns P1(a||b):: C = 1 +18528 ns P2(a||b):: C = 0 +18532 ns P1(a&&b):: C = 0 +18532 ns P2(a&&b):: C = 1 +18534 ns P1(a||b):: C = 1 +18534 ns P2(a||b):: C = 0 +18538 ns P1(a&&b):: C = 0 +18538 ns P2(a&&b):: C = 1 +18540 ns P1(a||b):: C = 0 +18540 ns P2(a||b):: C = 1 +18544 ns P1(a&&b):: C = 0 +18544 ns P2(a&&b):: C = 1 +18546 ns P1(a||b):: C = 1 +18546 ns P2(a||b):: C = 0 +18550 ns P1(a&&b):: C = 0 +18550 ns P2(a&&b):: C = 1 +18552 ns P1(a||b):: C = 1 +18552 ns P2(a||b):: C = 0 +18556 ns P1(a&&b):: C = 0 +18556 ns P2(a&&b):: C = 1 +18558 ns P1(a||b):: C = 0 +18558 ns P2(a||b):: C = 1 +18562 ns P1(a&&b):: C = 1 +18562 ns P2(a&&b):: C = 0 +18564 ns P1(a||b):: C = 1 +18564 ns P2(a||b):: C = 0 +18568 ns P1(a&&b):: C = 0 +18568 ns P2(a&&b):: C = 1 +18570 ns P1(a||b):: C = 1 +18570 ns P2(a||b):: C = 0 +18574 ns P1(a&&b):: C = 0 +18574 ns P2(a&&b):: C = 1 +18576 ns P1(a||b):: C = 0 +18576 ns P2(a||b):: C = 1 +18580 ns P1(a&&b):: C = 0 +18580 ns P2(a&&b):: C = 1 +18582 ns P1(a||b):: C = 1 +18582 ns P2(a||b):: C = 0 +18586 ns P1(a&&b):: C = 1 +18586 ns P2(a&&b):: C = 0 +18588 ns P1(a||b):: C = 1 +18588 ns P2(a||b):: C = 0 +18592 ns P1(a&&b):: C = 1 +18592 ns P2(a&&b):: C = 0 +18594 ns P1(a||b):: C = 1 +18594 ns P2(a||b):: C = 0 +18598 ns P1(a&&b):: C = 0 +18598 ns P2(a&&b):: C = 1 +18600 ns P1(a||b):: C = 0 +18600 ns P2(a||b):: C = 1 +18604 ns P1(a&&b):: C = 0 +18604 ns P2(a&&b):: C = 1 +18606 ns P1(a||b):: C = 0 +18606 ns P2(a||b):: C = 1 +18610 ns P1(a&&b):: C = 0 +18610 ns P2(a&&b):: C = 1 +18612 ns P1(a||b):: C = 0 +18612 ns P2(a||b):: C = 1 +18616 ns P1(a&&b):: C = 0 +18616 ns P2(a&&b):: C = 1 +18618 ns P1(a||b):: C = 1 +18618 ns P2(a||b):: C = 0 +18622 ns P1(a&&b):: C = 1 +18622 ns P2(a&&b):: C = 0 +18624 ns P1(a||b):: C = 1 +18624 ns P2(a||b):: C = 0 +18628 ns P1(a&&b):: C = 0 +18628 ns P2(a&&b):: C = 1 +18630 ns P1(a||b):: C = 0 +18630 ns P2(a||b):: C = 1 +18634 ns P1(a&&b):: C = 0 +18634 ns P2(a&&b):: C = 1 +18636 ns P1(a||b):: C = 1 +18636 ns P2(a||b):: C = 0 +18640 ns P1(a&&b):: C = 0 +18640 ns P2(a&&b):: C = 1 +18642 ns P1(a||b):: C = 0 +18642 ns P2(a||b):: C = 1 +18646 ns P1(a&&b):: C = 0 +18646 ns P2(a&&b):: C = 1 +18648 ns P1(a||b):: C = 1 +18648 ns P2(a||b):: C = 0 +18652 ns P1(a&&b):: C = 0 +18652 ns P2(a&&b):: C = 1 +18654 ns P1(a||b):: C = 1 +18654 ns P2(a||b):: C = 0 +18658 ns P1(a&&b):: C = 0 +18658 ns P2(a&&b):: C = 1 +18660 ns P1(a||b):: C = 0 +18660 ns P2(a||b):: C = 1 +18664 ns P1(a&&b):: C = 1 +18664 ns P2(a&&b):: C = 0 +18666 ns P1(a||b):: C = 0 +18666 ns P2(a||b):: C = 1 +18670 ns P1(a&&b):: C = 0 +18670 ns P2(a&&b):: C = 1 +18672 ns P1(a||b):: C = 1 +18672 ns P2(a||b):: C = 0 +18676 ns P1(a&&b):: C = 0 +18676 ns P2(a&&b):: C = 1 +18678 ns P1(a||b):: C = 1 +18678 ns P2(a||b):: C = 0 +18682 ns P1(a&&b):: C = 1 +18682 ns P2(a&&b):: C = 0 +18684 ns P1(a||b):: C = 1 +18684 ns P2(a||b):: C = 0 +18688 ns P1(a&&b):: C = 0 +18688 ns P2(a&&b):: C = 1 +18690 ns P1(a||b):: C = 0 +18690 ns P2(a||b):: C = 1 +18694 ns P1(a&&b):: C = 0 +18694 ns P2(a&&b):: C = 1 +18696 ns P1(a||b):: C = 1 +18696 ns P2(a||b):: C = 0 +18700 ns P1(a&&b):: C = 0 +18700 ns P2(a&&b):: C = 1 +18702 ns P1(a||b):: C = 1 +18702 ns P2(a||b):: C = 0 +18706 ns P1(a&&b):: C = 1 +18706 ns P2(a&&b):: C = 0 +18708 ns P1(a||b):: C = 1 +18708 ns P2(a||b):: C = 0 +18712 ns P1(a&&b):: C = 0 +18712 ns P2(a&&b):: C = 1 +18714 ns P1(a||b):: C = 0 +18714 ns P2(a||b):: C = 1 +18718 ns P1(a&&b):: C = 0 +18718 ns P2(a&&b):: C = 1 +18720 ns P1(a||b):: C = 1 +18720 ns P2(a||b):: C = 0 +18724 ns P1(a&&b):: C = 1 +18724 ns P2(a&&b):: C = 0 +18726 ns P1(a||b):: C = 1 +18726 ns P2(a||b):: C = 0 +18730 ns P1(a&&b):: C = 0 +18730 ns P2(a&&b):: C = 1 +18732 ns P1(a||b):: C = 1 +18732 ns P2(a||b):: C = 0 +18736 ns P1(a&&b):: C = 0 +18736 ns P2(a&&b):: C = 1 +18738 ns P1(a||b):: C = 1 +18738 ns P2(a||b):: C = 0 +18742 ns P1(a&&b):: C = 0 +18742 ns P2(a&&b):: C = 1 +18744 ns P1(a||b):: C = 1 +18744 ns P2(a||b):: C = 0 +18748 ns P1(a&&b):: C = 0 +18748 ns P2(a&&b):: C = 1 +18750 ns P1(a||b):: C = 0 +18750 ns P2(a||b):: C = 1 +18754 ns P1(a&&b):: C = 1 +18754 ns P2(a&&b):: C = 0 +18756 ns P1(a||b):: C = 0 +18756 ns P2(a||b):: C = 1 +18760 ns P1(a&&b):: C = 0 +18760 ns P2(a&&b):: C = 1 +18762 ns P1(a||b):: C = 1 +18762 ns P2(a||b):: C = 0 +18766 ns P1(a&&b):: C = 1 +18766 ns P2(a&&b):: C = 0 +18768 ns P1(a||b):: C = 1 +18768 ns P2(a||b):: C = 0 +18772 ns P1(a&&b):: C = 0 +18772 ns P2(a&&b):: C = 1 +18774 ns P1(a||b):: C = 1 +18774 ns P2(a||b):: C = 0 +18778 ns P1(a&&b):: C = 1 +18778 ns P2(a&&b):: C = 0 +18780 ns P1(a||b):: C = 1 +18780 ns P2(a||b):: C = 0 +18784 ns P1(a&&b):: C = 0 +18784 ns P2(a&&b):: C = 1 +18786 ns P1(a||b):: C = 1 +18786 ns P2(a||b):: C = 0 +18790 ns P1(a&&b):: C = 0 +18790 ns P2(a&&b):: C = 1 +18792 ns P1(a||b):: C = 1 +18792 ns P2(a||b):: C = 0 +18796 ns P1(a&&b):: C = 0 +18796 ns P2(a&&b):: C = 1 +18798 ns P1(a||b):: C = 1 +18798 ns P2(a||b):: C = 0 +18802 ns P1(a&&b):: C = 0 +18802 ns P2(a&&b):: C = 1 +18804 ns P1(a||b):: C = 1 +18804 ns P2(a||b):: C = 0 +18808 ns P1(a&&b):: C = 0 +18808 ns P2(a&&b):: C = 1 +18810 ns P1(a||b):: C = 1 +18810 ns P2(a||b):: C = 0 +18814 ns P1(a&&b):: C = 1 +18814 ns P2(a&&b):: C = 0 +18816 ns P1(a||b):: C = 0 +18816 ns P2(a||b):: C = 1 +18820 ns P1(a&&b):: C = 0 +18820 ns P2(a&&b):: C = 1 +18822 ns P1(a||b):: C = 1 +18822 ns P2(a||b):: C = 0 +18826 ns P1(a&&b):: C = 0 +18826 ns P2(a&&b):: C = 1 +18828 ns P1(a||b):: C = 1 +18828 ns P2(a||b):: C = 0 +18832 ns P1(a&&b):: C = 0 +18832 ns P2(a&&b):: C = 1 +18834 ns P1(a||b):: C = 1 +18834 ns P2(a||b):: C = 0 +18838 ns P1(a&&b):: C = 0 +18838 ns P2(a&&b):: C = 1 +18840 ns P1(a||b):: C = 1 +18840 ns P2(a||b):: C = 0 +18844 ns P1(a&&b):: C = 0 +18844 ns P2(a&&b):: C = 1 +18846 ns P1(a||b):: C = 1 +18846 ns P2(a||b):: C = 0 +18850 ns P1(a&&b):: C = 0 +18850 ns P2(a&&b):: C = 1 +18852 ns P1(a||b):: C = 1 +18852 ns P2(a||b):: C = 0 +18856 ns P1(a&&b):: C = 0 +18856 ns P2(a&&b):: C = 1 +18858 ns P1(a||b):: C = 1 +18858 ns P2(a||b):: C = 0 +18862 ns P1(a&&b):: C = 0 +18862 ns P2(a&&b):: C = 1 +18864 ns P1(a||b):: C = 0 +18864 ns P2(a||b):: C = 1 +18868 ns P1(a&&b):: C = 1 +18868 ns P2(a&&b):: C = 0 +18870 ns P1(a||b):: C = 1 +18870 ns P2(a||b):: C = 0 +18874 ns P1(a&&b):: C = 0 +18874 ns P2(a&&b):: C = 1 +18876 ns P1(a||b):: C = 0 +18876 ns P2(a||b):: C = 1 +18880 ns P1(a&&b):: C = 0 +18880 ns P2(a&&b):: C = 1 +18882 ns P1(a||b):: C = 0 +18882 ns P2(a||b):: C = 1 +18886 ns P1(a&&b):: C = 0 +18886 ns P2(a&&b):: C = 1 +18888 ns P1(a||b):: C = 1 +18888 ns P2(a||b):: C = 0 +18892 ns P1(a&&b):: C = 0 +18892 ns P2(a&&b):: C = 1 +18894 ns P1(a||b):: C = 1 +18894 ns P2(a||b):: C = 0 +18898 ns P1(a&&b):: C = 0 +18898 ns P2(a&&b):: C = 1 +18900 ns P1(a||b):: C = 1 +18900 ns P2(a||b):: C = 0 +18904 ns P1(a&&b):: C = 1 +18904 ns P2(a&&b):: C = 0 +18906 ns P1(a||b):: C = 1 +18906 ns P2(a||b):: C = 0 +18910 ns P1(a&&b):: C = 0 +18910 ns P2(a&&b):: C = 1 +18912 ns P1(a||b):: C = 1 +18912 ns P2(a||b):: C = 0 +18916 ns P1(a&&b):: C = 0 +18916 ns P2(a&&b):: C = 1 +18918 ns P1(a||b):: C = 0 +18918 ns P2(a||b):: C = 1 +18922 ns P1(a&&b):: C = 0 +18922 ns P2(a&&b):: C = 1 +18924 ns P1(a||b):: C = 1 +18924 ns P2(a||b):: C = 0 +18928 ns P1(a&&b):: C = 0 +18928 ns P2(a&&b):: C = 1 +18930 ns P1(a||b):: C = 1 +18930 ns P2(a||b):: C = 0 +18934 ns P1(a&&b):: C = 0 +18934 ns P2(a&&b):: C = 1 +18936 ns P1(a||b):: C = 1 +18936 ns P2(a||b):: C = 0 +18940 ns P1(a&&b):: C = 0 +18940 ns P2(a&&b):: C = 1 +18942 ns P1(a||b):: C = 1 +18942 ns P2(a||b):: C = 0 +18946 ns P1(a&&b):: C = 0 +18946 ns P2(a&&b):: C = 1 +18948 ns P1(a||b):: C = 0 +18948 ns P2(a||b):: C = 1 +18952 ns P1(a&&b):: C = 0 +18952 ns P2(a&&b):: C = 1 +18954 ns P1(a||b):: C = 1 +18954 ns P2(a||b):: C = 0 +18958 ns P1(a&&b):: C = 0 +18958 ns P2(a&&b):: C = 1 +18960 ns P1(a||b):: C = 1 +18960 ns P2(a||b):: C = 0 +18964 ns P1(a&&b):: C = 0 +18964 ns P2(a&&b):: C = 1 +18966 ns P1(a||b):: C = 1 +18966 ns P2(a||b):: C = 0 +18970 ns P1(a&&b):: C = 1 +18970 ns P2(a&&b):: C = 0 +18972 ns P1(a||b):: C = 1 +18972 ns P2(a||b):: C = 0 +18976 ns P1(a&&b):: C = 1 +18976 ns P2(a&&b):: C = 0 +18978 ns P1(a||b):: C = 1 +18978 ns P2(a||b):: C = 0 +18982 ns P1(a&&b):: C = 0 +18982 ns P2(a&&b):: C = 1 +18984 ns P1(a||b):: C = 1 +18984 ns P2(a||b):: C = 0 +18988 ns P1(a&&b):: C = 0 +18988 ns P2(a&&b):: C = 1 +18990 ns P1(a||b):: C = 1 +18990 ns P2(a||b):: C = 0 +18994 ns P1(a&&b):: C = 0 +18994 ns P2(a&&b):: C = 1 +18996 ns P1(a||b):: C = 1 +18996 ns P2(a||b):: C = 0 +19 us P1(a&&b):: C = 1 +19 us P2(a&&b):: C = 0 +19002 ns P1(a||b):: C = 0 +19002 ns P2(a||b):: C = 1 +19006 ns P1(a&&b):: C = 0 +19006 ns P2(a&&b):: C = 1 +19008 ns P1(a||b):: C = 1 +19008 ns P2(a||b):: C = 0 +19012 ns P1(a&&b):: C = 1 +19012 ns P2(a&&b):: C = 0 +19014 ns P1(a||b):: C = 1 +19014 ns P2(a||b):: C = 0 +19018 ns P1(a&&b):: C = 1 +19018 ns P2(a&&b):: C = 0 +19020 ns P1(a||b):: C = 1 +19020 ns P2(a||b):: C = 0 +19024 ns P1(a&&b):: C = 0 +19024 ns P2(a&&b):: C = 1 +19026 ns P1(a||b):: C = 1 +19026 ns P2(a||b):: C = 0 +19030 ns P1(a&&b):: C = 0 +19030 ns P2(a&&b):: C = 1 +19032 ns P1(a||b):: C = 1 +19032 ns P2(a||b):: C = 0 +19036 ns P1(a&&b):: C = 0 +19036 ns P2(a&&b):: C = 1 +19038 ns P1(a||b):: C = 0 +19038 ns P2(a||b):: C = 1 +19042 ns P1(a&&b):: C = 1 +19042 ns P2(a&&b):: C = 0 +19044 ns P1(a||b):: C = 0 +19044 ns P2(a||b):: C = 1 +19048 ns P1(a&&b):: C = 0 +19048 ns P2(a&&b):: C = 1 +19050 ns P1(a||b):: C = 0 +19050 ns P2(a||b):: C = 1 +19054 ns P1(a&&b):: C = 1 +19054 ns P2(a&&b):: C = 0 +19056 ns P1(a||b):: C = 1 +19056 ns P2(a||b):: C = 0 +19060 ns P1(a&&b):: C = 0 +19060 ns P2(a&&b):: C = 1 +19062 ns P1(a||b):: C = 1 +19062 ns P2(a||b):: C = 0 +19066 ns P1(a&&b):: C = 0 +19066 ns P2(a&&b):: C = 1 +19068 ns P1(a||b):: C = 1 +19068 ns P2(a||b):: C = 0 +19072 ns P1(a&&b):: C = 1 +19072 ns P2(a&&b):: C = 0 +19074 ns P1(a||b):: C = 0 +19074 ns P2(a||b):: C = 1 +19078 ns P1(a&&b):: C = 0 +19078 ns P2(a&&b):: C = 1 +19080 ns P1(a||b):: C = 0 +19080 ns P2(a||b):: C = 1 +19084 ns P1(a&&b):: C = 0 +19084 ns P2(a&&b):: C = 1 +19086 ns P1(a||b):: C = 0 +19086 ns P2(a||b):: C = 1 +19090 ns P1(a&&b):: C = 0 +19090 ns P2(a&&b):: C = 1 +19092 ns P1(a||b):: C = 1 +19092 ns P2(a||b):: C = 0 +19096 ns P1(a&&b):: C = 0 +19096 ns P2(a&&b):: C = 1 +19098 ns P1(a||b):: C = 0 +19098 ns P2(a||b):: C = 1 +19102 ns P1(a&&b):: C = 0 +19102 ns P2(a&&b):: C = 1 +19104 ns P1(a||b):: C = 1 +19104 ns P2(a||b):: C = 0 +19108 ns P1(a&&b):: C = 0 +19108 ns P2(a&&b):: C = 1 +19110 ns P1(a||b):: C = 0 +19110 ns P2(a||b):: C = 1 +19114 ns P1(a&&b):: C = 0 +19114 ns P2(a&&b):: C = 1 +19116 ns P1(a||b):: C = 1 +19116 ns P2(a||b):: C = 0 +19120 ns P1(a&&b):: C = 1 +19120 ns P2(a&&b):: C = 0 +19122 ns P1(a||b):: C = 1 +19122 ns P2(a||b):: C = 0 +19126 ns P1(a&&b):: C = 0 +19126 ns P2(a&&b):: C = 1 +19128 ns P1(a||b):: C = 1 +19128 ns P2(a||b):: C = 0 +19132 ns P1(a&&b):: C = 0 +19132 ns P2(a&&b):: C = 1 +19134 ns P1(a||b):: C = 0 +19134 ns P2(a||b):: C = 1 +19138 ns P1(a&&b):: C = 1 +19138 ns P2(a&&b):: C = 0 +19140 ns P1(a||b):: C = 1 +19140 ns P2(a||b):: C = 0 +19144 ns P1(a&&b):: C = 0 +19144 ns P2(a&&b):: C = 1 +19146 ns P1(a||b):: C = 0 +19146 ns P2(a||b):: C = 1 +19150 ns P1(a&&b):: C = 1 +19150 ns P2(a&&b):: C = 0 +19152 ns P1(a||b):: C = 1 +19152 ns P2(a||b):: C = 0 +19156 ns P1(a&&b):: C = 1 +19156 ns P2(a&&b):: C = 0 +19158 ns P1(a||b):: C = 1 +19158 ns P2(a||b):: C = 0 +19162 ns P1(a&&b):: C = 0 +19162 ns P2(a&&b):: C = 1 +19164 ns P1(a||b):: C = 0 +19164 ns P2(a||b):: C = 1 +19168 ns P1(a&&b):: C = 0 +19168 ns P2(a&&b):: C = 1 +19170 ns P1(a||b):: C = 1 +19170 ns P2(a||b):: C = 0 +19174 ns P1(a&&b):: C = 0 +19174 ns P2(a&&b):: C = 1 +19176 ns P1(a||b):: C = 1 +19176 ns P2(a||b):: C = 0 +19180 ns P1(a&&b):: C = 0 +19180 ns P2(a&&b):: C = 1 +19182 ns P1(a||b):: C = 1 +19182 ns P2(a||b):: C = 0 +19186 ns P1(a&&b):: C = 0 +19186 ns P2(a&&b):: C = 1 +19188 ns P1(a||b):: C = 1 +19188 ns P2(a||b):: C = 0 +19192 ns P1(a&&b):: C = 0 +19192 ns P2(a&&b):: C = 1 +19194 ns P1(a||b):: C = 1 +19194 ns P2(a||b):: C = 0 +19198 ns P1(a&&b):: C = 0 +19198 ns P2(a&&b):: C = 1 +19200 ns P1(a||b):: C = 1 +19200 ns P2(a||b):: C = 0 +19204 ns P1(a&&b):: C = 0 +19204 ns P2(a&&b):: C = 1 +19206 ns P1(a||b):: C = 1 +19206 ns P2(a||b):: C = 0 +19210 ns P1(a&&b):: C = 0 +19210 ns P2(a&&b):: C = 1 +19212 ns P1(a||b):: C = 0 +19212 ns P2(a||b):: C = 1 +19216 ns P1(a&&b):: C = 0 +19216 ns P2(a&&b):: C = 1 +19218 ns P1(a||b):: C = 0 +19218 ns P2(a||b):: C = 1 +19222 ns P1(a&&b):: C = 0 +19222 ns P2(a&&b):: C = 1 +19224 ns P1(a||b):: C = 1 +19224 ns P2(a||b):: C = 0 +19228 ns P1(a&&b):: C = 1 +19228 ns P2(a&&b):: C = 0 +19230 ns P1(a||b):: C = 1 +19230 ns P2(a||b):: C = 0 +19234 ns P1(a&&b):: C = 0 +19234 ns P2(a&&b):: C = 1 +19236 ns P1(a||b):: C = 1 +19236 ns P2(a||b):: C = 0 +19240 ns P1(a&&b):: C = 1 +19240 ns P2(a&&b):: C = 0 +19242 ns P1(a||b):: C = 0 +19242 ns P2(a||b):: C = 1 +19246 ns P1(a&&b):: C = 1 +19246 ns P2(a&&b):: C = 0 +19248 ns P1(a||b):: C = 1 +19248 ns P2(a||b):: C = 0 +19252 ns P1(a&&b):: C = 0 +19252 ns P2(a&&b):: C = 1 +19254 ns P1(a||b):: C = 1 +19254 ns P2(a||b):: C = 0 +19258 ns P1(a&&b):: C = 0 +19258 ns P2(a&&b):: C = 1 +19260 ns P1(a||b):: C = 1 +19260 ns P2(a||b):: C = 0 +19264 ns P1(a&&b):: C = 1 +19264 ns P2(a&&b):: C = 0 +19266 ns P1(a||b):: C = 1 +19266 ns P2(a||b):: C = 0 +19270 ns P1(a&&b):: C = 0 +19270 ns P2(a&&b):: C = 1 +19272 ns P1(a||b):: C = 1 +19272 ns P2(a||b):: C = 0 +19276 ns P1(a&&b):: C = 0 +19276 ns P2(a&&b):: C = 1 +19278 ns P1(a||b):: C = 1 +19278 ns P2(a||b):: C = 0 +19282 ns P1(a&&b):: C = 0 +19282 ns P2(a&&b):: C = 1 +19284 ns P1(a||b):: C = 1 +19284 ns P2(a||b):: C = 0 +19288 ns P1(a&&b):: C = 0 +19288 ns P2(a&&b):: C = 1 +19290 ns P1(a||b):: C = 1 +19290 ns P2(a||b):: C = 0 +19294 ns P1(a&&b):: C = 0 +19294 ns P2(a&&b):: C = 1 +19296 ns P1(a||b):: C = 1 +19296 ns P2(a||b):: C = 0 +19300 ns P1(a&&b):: C = 0 +19300 ns P2(a&&b):: C = 1 +19302 ns P1(a||b):: C = 1 +19302 ns P2(a||b):: C = 0 +19306 ns P1(a&&b):: C = 0 +19306 ns P2(a&&b):: C = 1 +19308 ns P1(a||b):: C = 1 +19308 ns P2(a||b):: C = 0 +19312 ns P1(a&&b):: C = 0 +19312 ns P2(a&&b):: C = 1 +19314 ns P1(a||b):: C = 0 +19314 ns P2(a||b):: C = 1 +19318 ns P1(a&&b):: C = 0 +19318 ns P2(a&&b):: C = 1 +19320 ns P1(a||b):: C = 1 +19320 ns P2(a||b):: C = 0 +19324 ns P1(a&&b):: C = 0 +19324 ns P2(a&&b):: C = 1 +19326 ns P1(a||b):: C = 1 +19326 ns P2(a||b):: C = 0 +19330 ns P1(a&&b):: C = 0 +19330 ns P2(a&&b):: C = 1 +19332 ns P1(a||b):: C = 1 +19332 ns P2(a||b):: C = 0 +19336 ns P1(a&&b):: C = 0 +19336 ns P2(a&&b):: C = 1 +19338 ns P1(a||b):: C = 0 +19338 ns P2(a||b):: C = 1 +19342 ns P1(a&&b):: C = 0 +19342 ns P2(a&&b):: C = 1 +19344 ns P1(a||b):: C = 1 +19344 ns P2(a||b):: C = 0 +19348 ns P1(a&&b):: C = 0 +19348 ns P2(a&&b):: C = 1 +19350 ns P1(a||b):: C = 1 +19350 ns P2(a||b):: C = 0 +19354 ns P1(a&&b):: C = 0 +19354 ns P2(a&&b):: C = 1 +19356 ns P1(a||b):: C = 1 +19356 ns P2(a||b):: C = 0 +19360 ns P1(a&&b):: C = 0 +19360 ns P2(a&&b):: C = 1 +19362 ns P1(a||b):: C = 1 +19362 ns P2(a||b):: C = 0 +19366 ns P1(a&&b):: C = 1 +19366 ns P2(a&&b):: C = 0 +19368 ns P1(a||b):: C = 1 +19368 ns P2(a||b):: C = 0 +19372 ns P1(a&&b):: C = 1 +19372 ns P2(a&&b):: C = 0 +19374 ns P1(a||b):: C = 1 +19374 ns P2(a||b):: C = 0 +19378 ns P1(a&&b):: C = 0 +19378 ns P2(a&&b):: C = 1 +19380 ns P1(a||b):: C = 1 +19380 ns P2(a||b):: C = 0 +19384 ns P1(a&&b):: C = 0 +19384 ns P2(a&&b):: C = 1 +19386 ns P1(a||b):: C = 1 +19386 ns P2(a||b):: C = 0 +19390 ns P1(a&&b):: C = 0 +19390 ns P2(a&&b):: C = 1 +19392 ns P1(a||b):: C = 1 +19392 ns P2(a||b):: C = 0 +19396 ns P1(a&&b):: C = 0 +19396 ns P2(a&&b):: C = 1 +19398 ns P1(a||b):: C = 1 +19398 ns P2(a||b):: C = 0 +19402 ns P1(a&&b):: C = 0 +19402 ns P2(a&&b):: C = 1 +19404 ns P1(a||b):: C = 1 +19404 ns P2(a||b):: C = 0 +19408 ns P1(a&&b):: C = 0 +19408 ns P2(a&&b):: C = 1 +19410 ns P1(a||b):: C = 1 +19410 ns P2(a||b):: C = 0 +19414 ns P1(a&&b):: C = 0 +19414 ns P2(a&&b):: C = 1 +19416 ns P1(a||b):: C = 1 +19416 ns P2(a||b):: C = 0 +19420 ns P1(a&&b):: C = 0 +19420 ns P2(a&&b):: C = 1 +19422 ns P1(a||b):: C = 1 +19422 ns P2(a||b):: C = 0 +19426 ns P1(a&&b):: C = 0 +19426 ns P2(a&&b):: C = 1 +19428 ns P1(a||b):: C = 1 +19428 ns P2(a||b):: C = 0 +19432 ns P1(a&&b):: C = 0 +19432 ns P2(a&&b):: C = 1 +19434 ns P1(a||b):: C = 0 +19434 ns P2(a||b):: C = 1 +19438 ns P1(a&&b):: C = 0 +19438 ns P2(a&&b):: C = 1 +19440 ns P1(a||b):: C = 1 +19440 ns P2(a||b):: C = 0 +19444 ns P1(a&&b):: C = 0 +19444 ns P2(a&&b):: C = 1 +19446 ns P1(a||b):: C = 1 +19446 ns P2(a||b):: C = 0 +19450 ns P1(a&&b):: C = 1 +19450 ns P2(a&&b):: C = 0 +19452 ns P1(a||b):: C = 0 +19452 ns P2(a||b):: C = 1 +19456 ns P1(a&&b):: C = 1 +19456 ns P2(a&&b):: C = 0 +19458 ns P1(a||b):: C = 0 +19458 ns P2(a||b):: C = 1 +19462 ns P1(a&&b):: C = 0 +19462 ns P2(a&&b):: C = 1 +19464 ns P1(a||b):: C = 1 +19464 ns P2(a||b):: C = 0 +19468 ns P1(a&&b):: C = 0 +19468 ns P2(a&&b):: C = 1 +19470 ns P1(a||b):: C = 1 +19470 ns P2(a||b):: C = 0 +19474 ns P1(a&&b):: C = 0 +19474 ns P2(a&&b):: C = 1 +19476 ns P1(a||b):: C = 1 +19476 ns P2(a||b):: C = 0 +19480 ns P1(a&&b):: C = 0 +19480 ns P2(a&&b):: C = 1 +19482 ns P1(a||b):: C = 1 +19482 ns P2(a||b):: C = 0 +19486 ns P1(a&&b):: C = 1 +19486 ns P2(a&&b):: C = 0 +19488 ns P1(a||b):: C = 0 +19488 ns P2(a||b):: C = 1 +19492 ns P1(a&&b):: C = 0 +19492 ns P2(a&&b):: C = 1 +19494 ns P1(a||b):: C = 1 +19494 ns P2(a||b):: C = 0 +19498 ns P1(a&&b):: C = 0 +19498 ns P2(a&&b):: C = 1 +19500 ns P1(a||b):: C = 0 +19500 ns P2(a||b):: C = 1 +19504 ns P1(a&&b):: C = 1 +19504 ns P2(a&&b):: C = 0 +19506 ns P1(a||b):: C = 0 +19506 ns P2(a||b):: C = 1 +19510 ns P1(a&&b):: C = 0 +19510 ns P2(a&&b):: C = 1 +19512 ns P1(a||b):: C = 1 +19512 ns P2(a||b):: C = 0 +19516 ns P1(a&&b):: C = 1 +19516 ns P2(a&&b):: C = 0 +19518 ns P1(a||b):: C = 0 +19518 ns P2(a||b):: C = 1 +19522 ns P1(a&&b):: C = 0 +19522 ns P2(a&&b):: C = 1 +19524 ns P1(a||b):: C = 1 +19524 ns P2(a||b):: C = 0 +19528 ns P1(a&&b):: C = 1 +19528 ns P2(a&&b):: C = 0 +19530 ns P1(a||b):: C = 1 +19530 ns P2(a||b):: C = 0 +19534 ns P1(a&&b):: C = 1 +19534 ns P2(a&&b):: C = 0 +19536 ns P1(a||b):: C = 1 +19536 ns P2(a||b):: C = 0 +19540 ns P1(a&&b):: C = 1 +19540 ns P2(a&&b):: C = 0 +19542 ns P1(a||b):: C = 0 +19542 ns P2(a||b):: C = 1 +19546 ns P1(a&&b):: C = 0 +19546 ns P2(a&&b):: C = 1 +19548 ns P1(a||b):: C = 1 +19548 ns P2(a||b):: C = 0 +19552 ns P1(a&&b):: C = 1 +19552 ns P2(a&&b):: C = 0 +19554 ns P1(a||b):: C = 1 +19554 ns P2(a||b):: C = 0 +19558 ns P1(a&&b):: C = 0 +19558 ns P2(a&&b):: C = 1 +19560 ns P1(a||b):: C = 1 +19560 ns P2(a||b):: C = 0 +19564 ns P1(a&&b):: C = 0 +19564 ns P2(a&&b):: C = 1 +19566 ns P1(a||b):: C = 1 +19566 ns P2(a||b):: C = 0 +19570 ns P1(a&&b):: C = 1 +19570 ns P2(a&&b):: C = 0 +19572 ns P1(a||b):: C = 1 +19572 ns P2(a||b):: C = 0 +19576 ns P1(a&&b):: C = 0 +19576 ns P2(a&&b):: C = 1 +19578 ns P1(a||b):: C = 1 +19578 ns P2(a||b):: C = 0 +19582 ns P1(a&&b):: C = 0 +19582 ns P2(a&&b):: C = 1 +19584 ns P1(a||b):: C = 1 +19584 ns P2(a||b):: C = 0 +19588 ns P1(a&&b):: C = 1 +19588 ns P2(a&&b):: C = 0 +19590 ns P1(a||b):: C = 1 +19590 ns P2(a||b):: C = 0 +19594 ns P1(a&&b):: C = 1 +19594 ns P2(a&&b):: C = 0 +19596 ns P1(a||b):: C = 0 +19596 ns P2(a||b):: C = 1 +19600 ns P1(a&&b):: C = 0 +19600 ns P2(a&&b):: C = 1 +19602 ns P1(a||b):: C = 1 +19602 ns P2(a||b):: C = 0 +19606 ns P1(a&&b):: C = 0 +19606 ns P2(a&&b):: C = 1 +19608 ns P1(a||b):: C = 1 +19608 ns P2(a||b):: C = 0 +19612 ns P1(a&&b):: C = 1 +19612 ns P2(a&&b):: C = 0 +19614 ns P1(a||b):: C = 1 +19614 ns P2(a||b):: C = 0 +19618 ns P1(a&&b):: C = 0 +19618 ns P2(a&&b):: C = 1 +19620 ns P1(a||b):: C = 1 +19620 ns P2(a||b):: C = 0 +19624 ns P1(a&&b):: C = 1 +19624 ns P2(a&&b):: C = 0 +19626 ns P1(a||b):: C = 1 +19626 ns P2(a||b):: C = 0 +19630 ns P1(a&&b):: C = 0 +19630 ns P2(a&&b):: C = 1 +19632 ns P1(a||b):: C = 1 +19632 ns P2(a||b):: C = 0 +19636 ns P1(a&&b):: C = 0 +19636 ns P2(a&&b):: C = 1 +19638 ns P1(a||b):: C = 0 +19638 ns P2(a||b):: C = 1 +19642 ns P1(a&&b):: C = 0 +19642 ns P2(a&&b):: C = 1 +19644 ns P1(a||b):: C = 1 +19644 ns P2(a||b):: C = 0 +19648 ns P1(a&&b):: C = 0 +19648 ns P2(a&&b):: C = 1 +19650 ns P1(a||b):: C = 1 +19650 ns P2(a||b):: C = 0 +19654 ns P1(a&&b):: C = 0 +19654 ns P2(a&&b):: C = 1 +19656 ns P1(a||b):: C = 0 +19656 ns P2(a||b):: C = 1 +19660 ns P1(a&&b):: C = 0 +19660 ns P2(a&&b):: C = 1 +19662 ns P1(a||b):: C = 0 +19662 ns P2(a||b):: C = 1 +19666 ns P1(a&&b):: C = 0 +19666 ns P2(a&&b):: C = 1 +19668 ns P1(a||b):: C = 1 +19668 ns P2(a||b):: C = 0 +19672 ns P1(a&&b):: C = 0 +19672 ns P2(a&&b):: C = 1 +19674 ns P1(a||b):: C = 1 +19674 ns P2(a||b):: C = 0 +19678 ns P1(a&&b):: C = 1 +19678 ns P2(a&&b):: C = 0 +19680 ns P1(a||b):: C = 1 +19680 ns P2(a||b):: C = 0 +19684 ns P1(a&&b):: C = 0 +19684 ns P2(a&&b):: C = 1 +19686 ns P1(a||b):: C = 0 +19686 ns P2(a||b):: C = 1 +19690 ns P1(a&&b):: C = 0 +19690 ns P2(a&&b):: C = 1 +19692 ns P1(a||b):: C = 1 +19692 ns P2(a||b):: C = 0 +19696 ns P1(a&&b):: C = 1 +19696 ns P2(a&&b):: C = 0 +19698 ns P1(a||b):: C = 0 +19698 ns P2(a||b):: C = 1 +19702 ns P1(a&&b):: C = 0 +19702 ns P2(a&&b):: C = 1 +19704 ns P1(a||b):: C = 1 +19704 ns P2(a||b):: C = 0 +19708 ns P1(a&&b):: C = 1 +19708 ns P2(a&&b):: C = 0 +19710 ns P1(a||b):: C = 1 +19710 ns P2(a||b):: C = 0 +19714 ns P1(a&&b):: C = 0 +19714 ns P2(a&&b):: C = 1 +19716 ns P1(a||b):: C = 1 +19716 ns P2(a||b):: C = 0 +19720 ns P1(a&&b):: C = 0 +19720 ns P2(a&&b):: C = 1 +19722 ns P1(a||b):: C = 1 +19722 ns P2(a||b):: C = 0 +19726 ns P1(a&&b):: C = 0 +19726 ns P2(a&&b):: C = 1 +19728 ns P1(a||b):: C = 1 +19728 ns P2(a||b):: C = 0 +19732 ns P1(a&&b):: C = 0 +19732 ns P2(a&&b):: C = 1 +19734 ns P1(a||b):: C = 0 +19734 ns P2(a||b):: C = 1 +19738 ns P1(a&&b):: C = 0 +19738 ns P2(a&&b):: C = 1 +19740 ns P1(a||b):: C = 1 +19740 ns P2(a||b):: C = 0 +19744 ns P1(a&&b):: C = 0 +19744 ns P2(a&&b):: C = 1 +19746 ns P1(a||b):: C = 1 +19746 ns P2(a||b):: C = 0 +19750 ns P1(a&&b):: C = 0 +19750 ns P2(a&&b):: C = 1 +19752 ns P1(a||b):: C = 1 +19752 ns P2(a||b):: C = 0 +19756 ns P1(a&&b):: C = 0 +19756 ns P2(a&&b):: C = 1 +19758 ns P1(a||b):: C = 1 +19758 ns P2(a||b):: C = 0 +19762 ns P1(a&&b):: C = 0 +19762 ns P2(a&&b):: C = 1 +19764 ns P1(a||b):: C = 1 +19764 ns P2(a||b):: C = 0 +19768 ns P1(a&&b):: C = 1 +19768 ns P2(a&&b):: C = 0 +19770 ns P1(a||b):: C = 0 +19770 ns P2(a||b):: C = 1 +19774 ns P1(a&&b):: C = 0 +19774 ns P2(a&&b):: C = 1 +19776 ns P1(a||b):: C = 0 +19776 ns P2(a||b):: C = 1 +19780 ns P1(a&&b):: C = 0 +19780 ns P2(a&&b):: C = 1 +19782 ns P1(a||b):: C = 1 +19782 ns P2(a||b):: C = 0 +19786 ns P1(a&&b):: C = 0 +19786 ns P2(a&&b):: C = 1 +19788 ns P1(a||b):: C = 1 +19788 ns P2(a||b):: C = 0 +19792 ns P1(a&&b):: C = 1 +19792 ns P2(a&&b):: C = 0 +19794 ns P1(a||b):: C = 1 +19794 ns P2(a||b):: C = 0 +19798 ns P1(a&&b):: C = 1 +19798 ns P2(a&&b):: C = 0 +19800 ns P1(a||b):: C = 1 +19800 ns P2(a||b):: C = 0 +19804 ns P1(a&&b):: C = 1 +19804 ns P2(a&&b):: C = 0 +19806 ns P1(a||b):: C = 0 +19806 ns P2(a||b):: C = 1 +19810 ns P1(a&&b):: C = 1 +19810 ns P2(a&&b):: C = 0 +19812 ns P1(a||b):: C = 1 +19812 ns P2(a||b):: C = 0 +19816 ns P1(a&&b):: C = 0 +19816 ns P2(a&&b):: C = 1 +19818 ns P1(a||b):: C = 1 +19818 ns P2(a||b):: C = 0 +19822 ns P1(a&&b):: C = 0 +19822 ns P2(a&&b):: C = 1 +19824 ns P1(a||b):: C = 1 +19824 ns P2(a||b):: C = 0 +19828 ns P1(a&&b):: C = 0 +19828 ns P2(a&&b):: C = 1 +19830 ns P1(a||b):: C = 1 +19830 ns P2(a||b):: C = 0 +19834 ns P1(a&&b):: C = 0 +19834 ns P2(a&&b):: C = 1 +19836 ns P1(a||b):: C = 0 +19836 ns P2(a||b):: C = 1 +19840 ns P1(a&&b):: C = 0 +19840 ns P2(a&&b):: C = 1 +19842 ns P1(a||b):: C = 1 +19842 ns P2(a||b):: C = 0 +19846 ns P1(a&&b):: C = 0 +19846 ns P2(a&&b):: C = 1 +19848 ns P1(a||b):: C = 0 +19848 ns P2(a||b):: C = 1 +19852 ns P1(a&&b):: C = 0 +19852 ns P2(a&&b):: C = 1 +19854 ns P1(a||b):: C = 1 +19854 ns P2(a||b):: C = 0 +19858 ns P1(a&&b):: C = 0 +19858 ns P2(a&&b):: C = 1 +19860 ns P1(a||b):: C = 1 +19860 ns P2(a||b):: C = 0 +19864 ns P1(a&&b):: C = 0 +19864 ns P2(a&&b):: C = 1 +19866 ns P1(a||b):: C = 1 +19866 ns P2(a||b):: C = 0 +19870 ns P1(a&&b):: C = 0 +19870 ns P2(a&&b):: C = 1 +19872 ns P1(a||b):: C = 1 +19872 ns P2(a||b):: C = 0 +19876 ns P1(a&&b):: C = 0 +19876 ns P2(a&&b):: C = 1 +19878 ns P1(a||b):: C = 1 +19878 ns P2(a||b):: C = 0 +19882 ns P1(a&&b):: C = 0 +19882 ns P2(a&&b):: C = 1 +19884 ns P1(a||b):: C = 0 +19884 ns P2(a||b):: C = 1 +19888 ns P1(a&&b):: C = 0 +19888 ns P2(a&&b):: C = 1 +19890 ns P1(a||b):: C = 1 +19890 ns P2(a||b):: C = 0 +19894 ns P1(a&&b):: C = 1 +19894 ns P2(a&&b):: C = 0 +19896 ns P1(a||b):: C = 1 +19896 ns P2(a||b):: C = 0 +19900 ns P1(a&&b):: C = 1 +19900 ns P2(a&&b):: C = 0 +19902 ns P1(a||b):: C = 0 +19902 ns P2(a||b):: C = 1 +19906 ns P1(a&&b):: C = 0 +19906 ns P2(a&&b):: C = 1 +19908 ns P1(a||b):: C = 1 +19908 ns P2(a||b):: C = 0 +19912 ns P1(a&&b):: C = 0 +19912 ns P2(a&&b):: C = 1 +19914 ns P1(a||b):: C = 0 +19914 ns P2(a||b):: C = 1 +19918 ns P1(a&&b):: C = 0 +19918 ns P2(a&&b):: C = 1 +19920 ns P1(a||b):: C = 1 +19920 ns P2(a||b):: C = 0 +19924 ns P1(a&&b):: C = 0 +19924 ns P2(a&&b):: C = 1 +19926 ns P1(a||b):: C = 1 +19926 ns P2(a||b):: C = 0 +19930 ns P1(a&&b):: C = 0 +19930 ns P2(a&&b):: C = 1 +19932 ns P1(a||b):: C = 1 +19932 ns P2(a||b):: C = 0 +19936 ns P1(a&&b):: C = 0 +19936 ns P2(a&&b):: C = 1 +19938 ns P1(a||b):: C = 0 +19938 ns P2(a||b):: C = 1 +19942 ns P1(a&&b):: C = 0 +19942 ns P2(a&&b):: C = 1 +19944 ns P1(a||b):: C = 0 +19944 ns P2(a||b):: C = 1 +19948 ns P1(a&&b):: C = 1 +19948 ns P2(a&&b):: C = 0 +19950 ns P1(a||b):: C = 1 +19950 ns P2(a||b):: C = 0 +19954 ns P1(a&&b):: C = 0 +19954 ns P2(a&&b):: C = 1 +19956 ns P1(a||b):: C = 1 +19956 ns P2(a||b):: C = 0 +19960 ns P1(a&&b):: C = 0 +19960 ns P2(a&&b):: C = 1 +19962 ns P1(a||b):: C = 1 +19962 ns P2(a||b):: C = 0 +19966 ns P1(a&&b):: C = 0 +19966 ns P2(a&&b):: C = 1 +19968 ns P1(a||b):: C = 1 +19968 ns P2(a||b):: C = 0 +19972 ns P1(a&&b):: C = 0 +19972 ns P2(a&&b):: C = 1 +19974 ns P1(a||b):: C = 0 +19974 ns P2(a||b):: C = 1 +19978 ns P1(a&&b):: C = 0 +19978 ns P2(a&&b):: C = 1 +19980 ns P1(a||b):: C = 1 +19980 ns P2(a||b):: C = 0 +19984 ns P1(a&&b):: C = 0 +19984 ns P2(a&&b):: C = 1 +19986 ns P1(a||b):: C = 1 +19986 ns P2(a||b):: C = 0 +19990 ns P1(a&&b):: C = 0 +19990 ns P2(a&&b):: C = 1 +19992 ns P1(a||b):: C = 1 +19992 ns P2(a||b):: C = 0 +19996 ns P1(a&&b):: C = 0 +19996 ns P2(a&&b):: C = 1 +19998 ns P1(a||b):: C = 0 +19998 ns P2(a||b):: C = 1 diff --git a/src/systemc/tests/systemc/misc/sim_tests/manual_clock/isaac.h b/src/systemc/tests/systemc/misc/sim_tests/manual_clock/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/manual_clock/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/misc/sim_tests/manual_clock/manual_clock.cpp b/src/systemc/tests/systemc/misc/sim_tests/manual_clock/manual_clock.cpp new file mode 100644 index 000000000..35729344e --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/manual_clock/manual_clock.cpp @@ -0,0 +1,174 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + manual_clock.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; // Platform independent random number generator. + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + sc_in a; + sc_in b; + sc_inout c; + + proc1( sc_module_name NAME, + sc_signal_in_if& CLK, + sc_signal& A, + sc_signal& B, + sc_signal& C ) + { + clk( CLK ); + a(A); b(B); c(C); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry() + { + while (true) { + wait(); + c = a.read() && b.read(); + wait(); + cout << sc_time_stamp() << " P1(a&&b):: C = " << c.read() + << endl; + c = a.read() || b.read(); + wait(); + cout << sc_time_stamp() << " P1(a||b):: C = " << c.read() + << endl; + c = a ^ b; + } + } +}; + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + sc_in a; + sc_in b; + sc_inout c; + + proc2( sc_module_name NAME, + sc_signal_in_if& CLK, + sc_signal& A, + sc_signal& B, + sc_signal& C ) + { + clk( CLK ); + a(A); b(B); c(C); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry() + { + while (true) { + wait(); + c = ! (a.read() && b.read()); + wait(); + cout << sc_time_stamp() << " P2(a&&b):: C = " << c.read() + << endl; + c = ! (a.read() || b.read()); + wait(); + cout << sc_time_stamp() << " P2(a||b):: C = " << c.read() + << endl; + c = ! (a ^ b); + } + } +}; + +// comparator +SC_MODULE( proc3 ) +{ + SC_HAS_PROCESS( proc3 ); + + sc_in a; + sc_in b; + sc_out c; + sc_out d; + + proc3( sc_module_name NAME, + sc_signal& A, + sc_signal& B, + sc_signal& C, + sc_signal& D ) + { + a(A); b(B); c(C); d(D); + SC_METHOD( entry ); + sensitive << a << b; + } + + void entry() + { + c = (a == b); + d = (a != b); + } +}; + +int +sc_main( int argc, char* argv[] ) +{ + sc_signal clk1("clk1"); + sc_signal clk2("clk2"); + + sc_signal a("a"), b("b"); + sc_signal p("p"), q("q"); + sc_signal zero("zero"), one("one"); + + proc1 p1( "p1", clk1, a, b, p ); + proc2 p2( "p2", clk2, a, b, q ); + proc3 p3( "p3", p, q, zero, one ); + + sc_start(0, SC_NS); + for (double t = 0; t < 0.00001; t += 1e-9) { + clk1 = 1; + clk2 = 1; + a = rng.rand() & 16; + b = rng.rand() & 32; + sc_start( 1, SC_NS ); + clk1 = 0; + clk2 = 0; + sc_start( 1, SC_NS ); + } + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/multtrans/multtrans0/golden/multtrans0.log b/src/systemc/tests/systemc/misc/sim_tests/multtrans/multtrans0/golden/multtrans0.log new file mode 100644 index 000000000..792448f11 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/multtrans/multtrans0/golden/multtrans0.log @@ -0,0 +1,59 @@ +SystemC Simulation +In state 0 :: In state 0 :: going to state 1 +Result = 0 +In state 1 :: staying in state 1 +Result = 0 +In state 1 :: staying in state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 +In state 2 :: going to state 1 +In state 1 :: going to state 2 +Result = 0 diff --git a/src/systemc/tests/systemc/misc/sim_tests/multtrans/multtrans0/multtrans0.cpp b/src/systemc/tests/systemc/misc/sim_tests/multtrans/multtrans0/multtrans0.cpp new file mode 100644 index 000000000..3179e09c7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/multtrans/multtrans0/multtrans0.cpp @@ -0,0 +1,198 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + multtrans0.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( delay1 ) +{ + SC_HAS_PROCESS( delay1 ); + + sc_in data_i; + sc_out data_o; + + // Constructor + delay1( sc_module_name NAME, + sc_signal& DATA_I, + sc_signal& DATA_O ) + { + data_i(DATA_I); + data_o(DATA_O); + SC_THREAD( entry ); + sensitive << data_i; + } + + // Functionality + void entry(); +}; + +void delay1::entry() +{ + wait(); + int buffer; + wait(); // until the first real event + buffer = data_i.read(); + wait(); // until you get the next sample to send data out + while (true) { + data_o.write(buffer); + buffer = data_i.read(); + wait(); + } +} + +SC_MODULE( state_machine ) +{ + SC_HAS_PROCESS( state_machine ); + + sc_in data_i1; + sc_in data_i2; + sc_out data_o; + + int state; + + // Constructor + state_machine( sc_module_name NAME, + sc_signal& DATA_I1, + sc_signal& DATA_I2, + sc_signal& DATA_O ) + { + data_i1(DATA_I1); data_i2(DATA_I2); data_o(DATA_O); + SC_METHOD( entry ); + sensitive << data_i1 << data_i2; + + state = 0; + } + + // Functionality + void entry(); +}; + +void state_machine::entry() +{ + switch(state) { + case 0: // initial state + cout << "In state 0 :: " << flush; + if (data_i1.event()) { + if (data_i2.event()) { + data_o.write(data_i1.read() + data_i2.read()); + cout << "staying in state 0" << endl; + } + else { + state = 1; + cout << "going to state 1" << endl; + // No output is written + } + } + else if (data_i2.event()) { + state = 2; + cout << "going to state 2" << endl; + // No output is written + } + break; + case 1: // Event on First input seen only + cout << "In state 1 :: " << flush; + if (data_i2.event()) { + if (data_i1.event()) { + state = 0; + cout << "going to state 0" << endl; + data_o.write(data_i1.read() + data_i2.read()); + } + else { + cout << "going to state 2" << endl; + state = 2; + // No output written + } + } + else { + cout << "staying in state 1" << endl; + } + break; + case 2: + cout << "In state 2 :: " << flush; + if (data_i1.event()) { + if (data_i2.event()) { + state = 0; + cout << "going to state 0" << endl; + data_o.write(data_i1.read() + data_i2.read()); + } + else { + cout << "going to state 1" << endl; + state = 1; + // No output written + } + } + else { + cout << "staying in state 2" << endl; + } + break; + default: + cout << "In bad state - resetting" << endl; + state = 0; + break; + } +} + +void testbench(sc_signal& data, const sc_signal& res) +{ + int i; + sc_start(0, SC_NS); + for (i=0; i<10; i++) { + data.write(i*10 + 123); + sc_start( 10, SC_NS ); + cout << "Result = " << res.read() << endl; + data.write(i * 11 - 34); + sc_start( 10, SC_NS ); + cout << "Result = " << res.read() << endl; + } +} + +int +sc_main(int ac, char *av[]) +{ + sc_signal data_gen("Data"); + sc_signal data_delayed("DelayedData"); + sc_signal result("Result"); + + data_gen = 0; + data_delayed = 0; + result = 0; + + delay1 D1("DL", data_gen, data_delayed); + state_machine SM("SM", data_gen, data_delayed, result); + + testbench(data_gen, result); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop1/golden/new_prop1.log b/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop1/golden/new_prop1.log new file mode 100644 index 000000000..7304e1cd2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop1/golden/new_prop1.log @@ -0,0 +1,67 @@ +SystemC Simulation +async1 executed on: + posedge i[1] +aproc0 executed on: + posedge i[2] +async3 executed on: + posedge i[3] +aproc1 executed on: + posedge i[3] +async0 executed on: + negedge i[4] +async1 executed on: + posedge i[5] +async3 executed on: + negedge i[5] +async2 executed on: + negedge i[5] +aproc3 executed on: + posedge i[6] +async2 executed on: + negedge i[6] +async1 executed on: + posedge i[7] +aproc3 executed on: + posedge i[7] +async3 executed on: + negedge i[7] +aproc2 executed on: + negedge i[8] +async1 executed on: + posedge i[9] +aproc2 executed on: + negedge i[9] +aproc3 executed on: + posedge i[10] +aproc2 executed on: + negedge i[10] +async3 executed on: + posedge i[11] +aproc3 executed on: + posedge i[11] +aproc2 executed on: + negedge i[11] +async0 executed on: + negedge i[12] +aproc1 executed on: + negedge i[12] +async2 executed on: + posedge i[13] +async0 executed on: + negedge i[13] +aproc1 executed on: + negedge i[13] +aproc3 executed on: + posedge i[14] +async0 executed on: + negedge i[14] +aproc1 executed on: + negedge i[14] +async2 executed on: + posedge i[15] +aproc3 executed on: + posedge i[15] +async0 executed on: + negedge i[15] +aproc1 executed on: + negedge i[15] diff --git a/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop1/new_prop1.cpp b/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop1/new_prop1.cpp new file mode 100644 index 000000000..5cea3cdae --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop1/new_prop1.cpp @@ -0,0 +1,159 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + new_prop1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +static int (*print_func)(const char*, ...); + +struct new_prop : sc_module { + sc_in i[16]; + + void my_print(const char*); + + void async0() { my_print("async0"); } + void async1() { my_print("async1"); } + void async2() { my_print("async2"); } + void async3() { my_print("async3"); } + + void aproc0() { wait(); while (1) { my_print("aproc0"); wait(); } } + void aproc1() { wait(); while (1) { my_print("aproc1"); wait(); } } + void aproc2() { wait(); while (1) { my_print("aproc2"); wait(); } } + void aproc3() { wait(); while (1) { my_print("aproc3"); wait(); } } + + SC_CTOR(new_prop) { + SC_METHOD(async0); + sensitive << i[4].neg(); + sensitive << i[12].neg(); + sensitive << i[13].neg(); + sensitive << i[14].neg(); + sensitive << i[15].neg(); + + SC_METHOD(async1); + sensitive << i[1].pos(); + sensitive << i[5].pos(); + sensitive << i[7].pos(); + sensitive << i[9].pos(); + + SC_METHOD(async2); + sensitive << i[5].neg(); + sensitive << i[6].neg(); + sensitive << i[13].pos(); + sensitive << i[15].pos(); + + SC_METHOD(async3); + sensitive << i[3].pos(); + sensitive << i[5].neg(); + sensitive << i[7].neg(); + sensitive << i[11].pos(); + + SC_THREAD(aproc0); + sensitive << i[2].pos(); + + SC_THREAD(aproc1); + sensitive << i[3].pos(); + sensitive << i[12].neg(); + sensitive << i[13].neg(); + sensitive << i[14].neg(); + sensitive << i[15].neg(); + + SC_THREAD(aproc2); + sensitive << i[8].neg(); + sensitive << i[9].neg(); + sensitive << i[10].neg(); + sensitive << i[11].neg(); + + SC_THREAD(aproc3); + sensitive << i[6].pos(); + sensitive << i[7].pos(); + sensitive << i[10].pos(); + sensitive << i[11].pos(); + sensitive << i[14].pos(); + sensitive << i[15].pos(); + } +}; + +void +new_prop::my_print(const char* p) +{ + (*print_func)("%s executed on:\n", p); + for (int j = 0; j < 16; ++j) { + if (i[j].posedge()) { + (*print_func)("\tposedge i[%d]\n", j); + } + if (i[j].negedge()) { + (*print_func)("\tnegedge i[%d]\n", j); + } + } +} + +static int +dont_print(const char* fmt, ...) +{ + return 0; +} + +int +sc_main(int,char**) +{ + sc_signal i[16]; + + new_prop np("np"); + + for( int j = 0; j < 16; ++ j ) { + np.i[j]( i[j] ); + } + + for (int j = 0; j < 16; ++j) { + i[j] = 0; + } + + print_func = &dont_print; + sc_start(0, SC_NS); + + print_func = &printf; + + for (int k = 0; k < 16; ++k) { + i[k] = ! i[k].read(); + sc_start(1, SC_NS); + i[k] = ! i[k].read(); + sc_start(1, SC_NS); + } + + fflush( stdout ); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop2/golden/new_prop2.log b/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop2/golden/new_prop2.log new file mode 100644 index 000000000..7304e1cd2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop2/golden/new_prop2.log @@ -0,0 +1,67 @@ +SystemC Simulation +async1 executed on: + posedge i[1] +aproc0 executed on: + posedge i[2] +async3 executed on: + posedge i[3] +aproc1 executed on: + posedge i[3] +async0 executed on: + negedge i[4] +async1 executed on: + posedge i[5] +async3 executed on: + negedge i[5] +async2 executed on: + negedge i[5] +aproc3 executed on: + posedge i[6] +async2 executed on: + negedge i[6] +async1 executed on: + posedge i[7] +aproc3 executed on: + posedge i[7] +async3 executed on: + negedge i[7] +aproc2 executed on: + negedge i[8] +async1 executed on: + posedge i[9] +aproc2 executed on: + negedge i[9] +aproc3 executed on: + posedge i[10] +aproc2 executed on: + negedge i[10] +async3 executed on: + posedge i[11] +aproc3 executed on: + posedge i[11] +aproc2 executed on: + negedge i[11] +async0 executed on: + negedge i[12] +aproc1 executed on: + negedge i[12] +async2 executed on: + posedge i[13] +async0 executed on: + negedge i[13] +aproc1 executed on: + negedge i[13] +aproc3 executed on: + posedge i[14] +async0 executed on: + negedge i[14] +aproc1 executed on: + negedge i[14] +async2 executed on: + posedge i[15] +aproc3 executed on: + posedge i[15] +async0 executed on: + negedge i[15] +aproc1 executed on: + negedge i[15] diff --git a/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop2/new_prop2.cpp b/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop2/new_prop2.cpp new file mode 100644 index 000000000..d3673ac1a --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/new_prop/new_prop2/new_prop2.cpp @@ -0,0 +1,160 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + new_prop2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +static int (*print_func)(const char*, ...); + +struct new_prop : sc_module { + sc_in i[16]; + + void my_print(const char*); + + void async0() { my_print("async0"); } + void async1() { my_print("async1"); } + void async2() { my_print("async2"); } + void async3() { my_print("async3"); } + + void aproc0() { wait(); while (1) { my_print("aproc0"); wait(); } } + void aproc1() { wait(); while (1) { my_print("aproc1"); wait(); } } + void aproc2() { wait(); while (1) { my_print("aproc2"); wait(); } } + void aproc3() { wait(); while (1) { my_print("aproc3"); wait(); } } + + SC_CTOR(new_prop) { + SC_METHOD(async0); + sensitive << i[4].neg(); + sensitive << i[12].neg(); + sensitive << i[13].neg(); + sensitive << i[14].neg(); + sensitive << i[15].neg(); + + SC_METHOD(async1); + sensitive << i[1].pos(); + sensitive << i[5].pos(); + sensitive << i[7].pos(); + sensitive << i[9].pos(); + + SC_METHOD(async2); + sensitive << i[5].neg(); + sensitive << i[6].neg(); + sensitive << i[13].pos(); + sensitive << i[15].pos(); + + SC_METHOD(async3); + sensitive << i[3].pos(); + sensitive << i[5].neg(); + sensitive << i[7].neg(); + sensitive << i[11].pos(); + + SC_THREAD(aproc0); + sensitive << i[2].pos(); + + SC_THREAD(aproc1); + sensitive << i[3].pos(); + sensitive << i[12].neg(); + sensitive << i[13].neg(); + sensitive << i[14].neg(); + sensitive << i[15].neg(); + + SC_THREAD(aproc2); + sensitive << i[8].neg(); + sensitive << i[9].neg(); + sensitive << i[10].neg(); + sensitive << i[11].neg(); + + SC_THREAD(aproc3); + sensitive << i[6].pos(); + sensitive << i[7].pos(); + sensitive << i[10].pos(); + sensitive << i[11].pos(); + sensitive << i[14].pos(); + sensitive << i[15].pos(); + } +}; + +void +new_prop::my_print(const char* p) +{ + (*print_func)("%s executed on:\n", p); + for (int j = 0; j < 16; ++j) { + if (i[j].posedge()) { + (*print_func)("\tposedge i[%d]\n", j); + } + if (i[j].negedge()) { + (*print_func)("\tnegedge i[%d]\n", j); + } + } +} + +static int +dont_print(const char* fmt, ...) +{ + return 0; +} + +int +sc_main(int,char**) +{ + // sc_clock i[16]; + sc_signal i[16]; + + new_prop np("np"); + + for( int j = 0; j < 16; ++ j ) { + np.i[j]( i[j] ); + } + + for (int j = 0; j < 16; ++j) { + i[j] = 0; + } + + print_func = &dont_print; + sc_start(0, SC_NS); + + print_func = &printf; + + for (int k = 0; k < 16; ++k) { + i[k] = ! i[k].read(); + sc_start(1, SC_NS); + i[k] = ! i[k].read(); + sc_start(1, SC_NS); + } + + fflush( stdout ); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/popc/golden/popc.log b/src/systemc/tests/systemc/misc/sim_tests/popc/golden/popc.log new file mode 100644 index 000000000..441622f1c --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/popc/golden/popc.log @@ -0,0 +1,19 @@ +SystemC Simulation +Input: 1 Population Count: 1 +Input: 3 Population Count: 2 +Input: 7 Population Count: 3 +Input: 15 Population Count: 4 +Input: 31 Population Count: 5 +Input: 63 Population Count: 6 +Input: 127 Population Count: 7 +Input: 255 Population Count: 8 +Input: 511 Population Count: 9 +Input: 1023 Population Count: 10 +Input: 2047 Population Count: 11 +Input: 4095 Population Count: 12 +Input: 8191 Population Count: 13 +Input: 16383 Population Count: 14 +Input: 32767 Population Count: 15 +Input: 65535 Population Count: 16 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/sim_tests/popc/popc.cpp b/src/systemc/tests/systemc/misc/sim_tests/popc/popc.cpp new file mode 100644 index 000000000..975b9728c --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/popc/popc.cpp @@ -0,0 +1,237 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + popc.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +/* + * Test bench + */ + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + // Inputs + sc_in data_ack; + sc_in popc; + // Outputs + sc_out reset; + sc_out data_ready; + sc_out in; + + // Constructor + proc1( sc_module_name NAME, + sc_clock& CLK, + sc_signal& DATA_ACK, + sc_signal& POPC, + sc_signal& RESET, + sc_signal& DATA_READY, + sc_signal& IN_ ) + { + clk(CLK); + data_ack(DATA_ACK); popc(POPC); + reset(RESET); data_ready(DATA_READY); in(IN_); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality goes here + void entry(); +}; + +/* + * popc - The process doing the population count + * + */ + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + // Inputs + sc_in reset; + sc_in data_ready; + sc_in in; + // Outputs + sc_out data_ack; + sc_out popc; + + // Internal variables + int c; + int t; + int no; + + proc2( sc_module_name NAME, + sc_clock& CLK, + sc_signal& RESET, + sc_signal& DATA_READY, + sc_signal& IN_, + sc_signal& DATA_ACK, + sc_signal& POPC ) + { + clk(CLK); + reset(RESET); + data_ready(DATA_READY); + in(IN_); + data_ack(DATA_ACK); + popc(POPC); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + c = 0; + t = 0; + } + + // Process functionality + void entry(); +}; + + +/* + * Testbench functionality + */ + +void proc1::entry() +{ + int i; + int j; + + j = 1; + i = 0; + data_ready.write(false); + reset.write(false); + + wait(); + + while(true){ + in.write(j); + + data_ready.write(true); + do { wait(); } while (data_ack == false); + data_ready.write(false); + do { wait(); } while (data_ack == true); + + char buf[BUFSIZ]; + sprintf( buf, "Input: %7d Population Count: %3d", j, popc.read() ); + cout << buf << endl; + + i++; + + if( i == 3){ + reset.write(true); + wait(); + reset.write(false); + wait(2); + } + + if( i == 16) + sc_stop(); + + j = (j<<1)|1; + } +} + + +/* + * popc - functionality + */ + +void proc2::entry() +{ + // Reset behavior + no = 0; + data_ack.write(false); + + wait(); + + while (true) { + do { wait(); } while (data_ready == false); + + t = in.read(); + c = 0; + while( t ){ + c++; + t &= (t-1); + wait(); + } + + no++; + popc.write(c); + + data_ack.write(true); + do { wait(); } while (data_ready == true); + data_ack.write(false); + } +} + + +int +sc_main(int argc, char *argv[]) +{ + sc_signal data_ready("Ready"); + sc_signal data_ack("Ack"); + sc_signal in; + sc_signal popc; + sc_signal reset; + + sc_clock clock("CLOCK", 10, SC_NS, 0.5, 0.0, SC_NS); + + proc1 TestBench("TestBench", clock, data_ack, popc, reset, data_ready, in); + proc2 Popc("Popc", clock, reset, data_ready, in, data_ack, popc); + + + // Create trace file + sc_trace_file *tf = sc_create_vcd_trace_file("tracefile"); + // Trace signals + sc_trace(tf, data_ready, "data_ready"); + sc_trace(tf, data_ack, "data_ack"); + sc_trace(tf, in, "in"); + sc_trace(tf, popc, "popc"); + sc_trace(tf, reset, "reset"); + // sc_trace(tf, clock.signal(), "Clock"); + sc_trace(tf, clock, "Clock"); + // Trace internal variables + sc_trace(tf, Popc.t, "Popc.t"); + sc_trace(tf, Popc.c, "Popc.c"); + sc_trace(tf, Popc.no, "Popc.no"); + + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/datamem b/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/datamem new file mode 100644 index 000000000..8cc9b815c --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/datamem @@ -0,0 +1,33 @@ +200 +0x00000007 +0x00000001 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 +0x00000000 diff --git a/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/golden/simple_cpu.log b/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/golden/simple_cpu.log new file mode 100644 index 000000000..66b206ee8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/golden/simple_cpu.log @@ -0,0 +1,85 @@ +SystemC Simulation +CPU Halted + PC = 0x0 + R[0] = 0 + R[1] = 0 + R[2] = 0 + R[3] = 0 + R[4] = 0 + R[5] = 0 + R[6] = 0 + R[7] = 0 + R[8] = 0 + R[9] = 0 + R[10] = 0 + R[11] = 0 + R[12] = 0 + R[13] = 0 + R[14] = 0 + R[15] = 0 + R[16] = 0 + R[17] = 0 + R[18] = 0 + R[19] = 0 + R[20] = 0 + R[21] = 0 + R[22] = 0 + R[23] = 0 + R[24] = 0 + R[25] = 0 + R[26] = 0 + R[27] = 0 + R[28] = 0 + R[29] = 0 + R[30] = 0 + R[31] = 0 +Load: R[5] = Memory[0x0] +Load: R[6] = Memory[0x1] +R[5] = R[5] - R[6] +JNZ R[5] 0x2 +R[5] = R[5] - R[6] +JNZ R[5] 0x2 +R[5] = R[5] - R[6] +JNZ R[5] 0x2 +R[5] = R[5] - R[6] +JNZ R[5] 0x2 +R[5] = R[5] - R[6] +JNZ R[5] 0x2 +R[5] = R[5] - R[6] +JNZ R[5] 0x2 +R[5] = R[5] - R[6] +JNZ R[5] 0x2 +CPU Halted + PC = 0x4 + R[0] = 0 + R[1] = 0 + R[2] = 0 + R[3] = 0 + R[4] = 0 + R[5] = 0 + R[6] = 1 + R[7] = 0 + R[8] = 0 + R[9] = 0 + R[10] = 0 + R[11] = 0 + R[12] = 0 + R[13] = 0 + R[14] = 0 + R[15] = 0 + R[16] = 0 + R[17] = 0 + R[18] = 0 + R[19] = 0 + R[20] = 0 + R[21] = 0 + R[22] = 0 + R[23] = 0 + R[24] = 0 + R[25] = 0 + R[26] = 0 + R[27] = 0 + R[28] = 0 + R[29] = 0 + R[30] = 0 + R[31] = 0 diff --git a/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/progmem b/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/progmem new file mode 100644 index 000000000..234d243f3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/progmem @@ -0,0 +1,14 @@ +100 +0x45000000 +0x46000001 +0x85314000 +0xe5000002 +0x00000000 +0x20000004 +0x5f000010 +0x6110c000 +0x884a8000 +0xb8d5c000 +0xcf734000 +0x00000000 + diff --git a/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/simple_cpu.cpp b/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/simple_cpu.cpp new file mode 100644 index 000000000..5e7b0cc4a --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/simple_cpu/simple_cpu.cpp @@ -0,0 +1,254 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + simple_cpu.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#define READ 0 +#define WRITE 1 + +SC_MODULE( exec_decode ) +{ + SC_HAS_PROCESS( exec_decode ); + + sc_in instruction; + sc_signal& program_counter; + + unsigned pc; // Program counter + unsigned cpu_reg[32]; // Cpu registers + + unsigned *data_mem; // The data memory + + exec_decode( sc_module_name NAME, + sc_signal& INSTRUCTION, + sc_signal& PROGRAM_COUNTER ) + : program_counter(PROGRAM_COUNTER) + { + instruction(INSTRUCTION); + SC_METHOD( entry ); + // sensitive only to the clock + sensitive << instruction; + + pc = 0x000000; // Power up reset value + for (int i =0; i<32; i++) cpu_reg[i] = 0; + + // Initialize the data memory from file datamem + FILE *fp = fopen("simple_cpu/datamem", "r"); + if (fp == (FILE *) 0) return; // No data mem file to read + // First field in this file is the size of data memory desired + int size; + fscanf(fp, "%d", &size); + data_mem = new unsigned[size]; + if (data_mem == (unsigned *) 0) { + printf("Not enough memory left\n"); + return; + } + unsigned mem_word; + size = 0; + while (fscanf(fp, "%x", &mem_word) != EOF) { + data_mem[size++] = mem_word; + } + + // Start off simulation by writing program_counter + program_counter.write(pc); + } + + // Functionality + void entry(); +}; + +void +exec_decode::entry() +{ + unsigned instr; + unsigned opcode; + unsigned regnum1, regnum2, regnum3; + unsigned addr; + + int i; + + instr = instruction.read(); + opcode = (instr & 0xe0000000) >> 29; // Extract opcode + switch(opcode) { + case 0x0: // Halt + printf("CPU Halted\n"); + printf("\tPC = 0x%x\n", pc); + for (i = 0; i < 32; i++) + printf("\tR[%d] = %x\n", i, cpu_reg[i]); + // Don't write pc and execution will stop + break; + case 0x1: // Store + regnum1 = (instr & 0x1f000000) >> 24; // Extract register number + addr = (instr & 0x00ffffff); // Extract address + printf("Store: Memory[0x%x] = R[%d]\n", addr, regnum1); + data_mem[addr] = cpu_reg[regnum1]; + pc = pc + 1; + program_counter.write(pc); + break; + case 0x2: // Load + regnum1 = (instr & 0x1f000000) >> 24; // Extract register number + addr = (instr & 0x00ffffff); // Extract address + printf("Load: R[%d] = Memory[0x%x]\n", regnum1, addr); + cpu_reg[regnum1] = data_mem[addr]; + pc = pc + 1; + program_counter.write(pc); + break; + case 0x3: // Add + regnum1 = (instr & 0x1f000000) >> 24; // Extract register number + regnum2 = (instr & 0x00f80000) >> 19; // Extract register number + regnum3 = (instr & 0x0007c000) >> 14; // Extract register number + printf("R[%d] = R[%d] + R[%d]\n", regnum3, regnum1, regnum2); + cpu_reg[regnum3] = cpu_reg[regnum1] + cpu_reg[regnum2]; + pc = pc + 1; + program_counter.write(pc); + break; + case 0x4: // Subtract + regnum1 = (instr & 0x1f000000) >> 24; // Extract register number + regnum2 = (instr & 0x00f80000) >> 19; // Extract register number + regnum3 = (instr & 0x0007c000) >> 14; // Extract register number + printf("R[%d] = R[%d] - R[%d]\n", regnum3, regnum1, regnum2); + cpu_reg[regnum3] = cpu_reg[regnum1] - cpu_reg[regnum2]; + pc = pc + 1; + program_counter.write(pc); + break; + case 0x5: // Multiply + regnum1 = (instr & 0x1f000000) >> 24; // Extract register number + regnum2 = (instr & 0x00f80000) >> 19; // Extract register number + regnum3 = (instr & 0x0007c000) >> 14; // Extract register number + printf("R[%d] = R[%d] * R[%d]\n", regnum3, regnum1, regnum2); + cpu_reg[regnum3] = cpu_reg[regnum1] * cpu_reg[regnum2]; + pc = pc + 1; + program_counter.write(pc); + break; + case 0x6: // Divide + regnum1 = (instr & 0x1f000000) >> 24; // Extract register number + regnum2 = (instr & 0x00f80000) >> 19; // Extract register number + regnum3 = (instr & 0x0007c000) >> 14; // Extract register number + printf("R[%d] = R[%d] / R[%d]\n", regnum3, regnum1, regnum2); + if (cpu_reg[regnum2] == 0) { + printf("Division exception - divide by zero\n"); + } + else { + cpu_reg[regnum3] = cpu_reg[regnum1] / cpu_reg[regnum2]; + } + pc = pc + 1; + program_counter.write(pc); + break; + case 0x7: // JNZ + regnum1 = (instr & 0x1f000000) >> 24; // Extract register number + addr = (instr & 0x00ffffff); // Extract address + printf("JNZ R[%d] 0x%x\n", regnum1, addr); + if (cpu_reg[regnum1] == 0x0) + pc = pc + 1; + else + pc = addr; + program_counter.write(pc); + break; + default: // Bad opcode + printf("Bad opcode 0x%x\n", opcode); + pc = pc + 1; + program_counter.write(pc); + break; + } +} + + +SC_MODULE( fetch ) +{ + SC_HAS_PROCESS( fetch ); + + sc_in program_counter; + sc_signal& instruction; + + unsigned *prog_mem; // The program memory + + fetch( sc_module_name NAME, + sc_signal& PROGRAM_COUNTER, + sc_signal& INSTRUCTION ) + : instruction(INSTRUCTION) + { + program_counter(PROGRAM_COUNTER); + SC_METHOD( entry ); + sensitive << program_counter; + + // Initialize the program memory from file progmem + FILE *fp = fopen("simple_cpu/progmem", "r"); + if (fp == (FILE *) 0) return; // No prog mem file to read + // First field in this file is the size of program memory desired + int size; + fscanf(fp, "%d", &size); + prog_mem = new unsigned[size]; + if (prog_mem == (unsigned *) 0) { + printf("Not enough memory left\n"); + return; + } + unsigned mem_word; + size = 0; + while (fscanf(fp, "%x", &mem_word) != EOF) { + prog_mem[size++] = mem_word; + } + instruction.write(0); + } + + // Functionality + void entry(); +}; + +void fetch::entry() +{ + unsigned pc, instr; + pc = program_counter.read(); + instr = prog_mem[pc]; + instruction.write(instr); +} + +int +sc_main(int ac, char *av[]) +{ + sc_signal pc; + sc_signal instr; + + exec_decode ED("ED", instr, pc); + fetch F("F", pc, instr); + + // instead of a testbench routine, we include the testbench here + sc_start(1, SC_NS); + sc_start( 10, SC_NS ); + + fflush( stdout ); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/srlatch/golden/srlatch.log b/src/systemc/tests/systemc/misc/sim_tests/srlatch/golden/srlatch.log new file mode 100644 index 000000000..a8c1cc302 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/srlatch/golden/srlatch.log @@ -0,0 +1,7 @@ +SystemC Simulation +SR=10 QQ'=01 +SR=01 QQ'=10 +SR=00 QQ'=10 +SR=11 QQ'=00 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/sim_tests/srlatch/main.cpp b/src/systemc/tests/systemc/misc/sim_tests/srlatch/main.cpp new file mode 100644 index 000000000..4c7929dc1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/srlatch/main.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main routine for nor-based SR latch */ + +#include "testbench.h" +#include "nor.h" + +int +sc_main(int ac, char *av[]) +{ + sc_signal s; + sc_signal r; + sc_signal q; + sc_signal qp; + + /* Signal initialization to make sure that we do not have an infinite loop of evaluate-update cycles */ + s = true; + r = true; + + sc_clock clk("Clock"); + + testbench T("TB", clk, q, qp, s, r); + nor G1("G1", s, qp, q); + nor G2("G2", r, q, qp); + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/sim_tests/srlatch/nor.cpp b/src/systemc/tests/systemc/misc/sim_tests/srlatch/nor.cpp new file mode 100644 index 000000000..199e539a1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/srlatch/nor.cpp @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + nor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename nor.cc */ +/* This is the implementation file for asynchronous process `nor' */ + +#include "nor.h" + +void nor::entry() +{ + c.write(!(a.read() | b.read())); +} // end of entry function diff --git a/src/systemc/tests/systemc/misc/sim_tests/srlatch/nor.h b/src/systemc/tests/systemc/misc/sim_tests/srlatch/nor.h new file mode 100644 index 000000000..ab9b05c2f --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/srlatch/nor.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + nor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename nor.h */ +/* This is the interface file for asynchronous process 'nor' */ + +#include "systemc.h" + +SC_MODULE( nor ) +{ + SC_HAS_PROCESS( nor ); + + sc_in a; + sc_in b; + sc_out c; + + // Constructor + nor( sc_module_name NAME, + sc_signal& A, + sc_signal& B, + sc_signal& C ) + { + a(A); + b(B); + c(C); + SC_METHOD( entry ); + sensitive << a << b; + } + + // Process functionality in member function below + void entry(); +}; + diff --git a/src/systemc/tests/systemc/misc/sim_tests/srlatch/srlatch.f b/src/systemc/tests/systemc/misc/sim_tests/srlatch/srlatch.f new file mode 100644 index 000000000..0935e227f --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/srlatch/srlatch.f @@ -0,0 +1,3 @@ +srlatch/nor.cpp +srlatch/testbench.cpp +srlatch/main.cpp diff --git a/src/systemc/tests/systemc/misc/sim_tests/srlatch/testbench.cpp b/src/systemc/tests/systemc/misc/sim_tests/srlatch/testbench.cpp new file mode 100644 index 000000000..b5c50c778 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/srlatch/testbench.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.cc */ +/* This is the implementation file for synchronous process `testbench' */ + +#include "testbench.h" + +void testbench::entry() +{ + char buf[BUFSIZ]; + s.write(true); + r.write(false); + wait(); + sprintf(buf, "SR=%x%x QQ'=%x%x", true, false, q.read(), qp.read()); + cout << buf << endl; + s.write(false); + r.write(true); + wait(); + sprintf(buf, "SR=%x%x QQ'=%x%x", false, true, q.read(), qp.read()); + cout << buf << endl; + s.write(false); + r.write(false); + wait(); + sprintf(buf, "SR=%x%x QQ'=%x%x", false, false, q.read(), qp.read()); + cout << buf << endl; + s.write(true); + r.write(true); + wait(); + sprintf(buf, "SR=%x%x QQ'=%x%x", true, true, q.read(), qp.read()); + cout << buf << endl; + sc_stop(); +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/sim_tests/srlatch/testbench.h b/src/systemc/tests/systemc/misc/sim_tests/srlatch/testbench.h new file mode 100644 index 000000000..368b3d103 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/srlatch/testbench.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.h */ +/* This is the interface file for synchronous process 'testbench' */ + +#include "systemc.h" + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + sc_in q; + sc_in qp; + sc_out s; + sc_out r; + + // Constructor + testbench( sc_module_name NAME, + sc_clock& CLK, + sc_signal& Q, + sc_signal& QP, + sc_signal& S, + sc_signal& R ) + { + clk(CLK); + q(Q); qp(QP); s(S); r(R); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/display.cpp b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/display.cpp new file mode 100644 index 000000000..a60ae744f --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/display.cpp @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.cc */ +/* This is the implementation file for asynchronous process `display' */ + +#include "display.h" + +void display::entry() +{ + cout << "Value on Bus = " << bus.read() << endl; +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/display.h b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/display.h new file mode 100644 index 000000000..47cb1ae04 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/display.h @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.h */ +/* This is the interface file for asynchronous process `display' */ + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + const sc_signal_resolved& bus; //input + + // Constructor + display( sc_module_name NAME, + const sc_signal_resolved& BUS ) + : bus(BUS) + { + SC_METHOD( entry ); + sensitive << bus; + } + + // Process functionality in member function below + void entry(); +}; + diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/driver.cpp b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/driver.cpp new file mode 100644 index 000000000..797de03cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/driver.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename driver.cc */ +/* This is the implementation file for synchronous process `driver' */ + +#include "driver.h" + +void driver::entry() +{ + control.write(true); + out.write(false); + wait(); + cout << "Input is = " << in.read() << endl; + + control.write(false); + wait(); + cout << "Input is = " << in.read() << endl; + + control.write(true); + out.write(true); + wait(); + cout << "Input is = " << in.read() << endl; + + control.write(false); + wait(); + cout << "Input is = " << in.read() << endl; + sc_stop(); +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/driver.h b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/driver.h new file mode 100644 index 000000000..2d82b1d3e --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/driver.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename driver.h */ +/* This is the interface file for synchronous process `driver' */ + +#include "systemc.h" + +SC_MODULE( driver ) +{ + SC_HAS_PROCESS( driver ); + + sc_in_clk clk; + + const sc_signal_resolved& in; //input + sc_out control; + sc_out out; + + // Constructor + driver( sc_module_name NAME, + sc_clock& CLK, + const sc_signal_resolved& IN1, + sc_signal& CONTROL, + sc_signal& OUT1 ) + : in(IN1) + { + clk(CLK); + control(CONTROL); + out(OUT1); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/golden/tri_state2.log b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/golden/tri_state2.log new file mode 100644 index 000000000..c559095d5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/golden/tri_state2.log @@ -0,0 +1,10 @@ +SystemC Simulation +Value on Bus = X +Value on Bus = Z +Value on Bus = X +Input is = X +Input is = X +Input is = X +Input is = X + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/main.cpp b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/main.cpp new file mode 100644 index 000000000..82b85ece4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/main.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main routine for tri-state simulation */ + +#include "driver.h" +#include "ts_buf.h" +#include "pullup.h" +#include "display.h" + +int sc_main(int ac, char* av[] ) +{ + sc_signal_resolved bus; + sc_signal control; + sc_signal out; + + sc_clock clock("CLK", 10.0, SC_NS, 0.5, 0.0, SC_NS); + + driver D("Driver", clock, bus, control, out); + ts_buf B("Buffer", out, control, bus); + pullup P("BusPullup", clock, bus); + display DISP("BusDisplay", bus); + + sc_start(200, SC_NS); + + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/pullup.cpp b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/pullup.cpp new file mode 100644 index 000000000..e4729a6ec --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/pullup.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pullup.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename pullup.cc */ +/* This is the implementation file for synchronous process `pullup' */ + +#include "pullup.h" + +void pullup::entry() +{ + while (true) { + pup.write(sc_logic('H')); + wait(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/pullup.h b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/pullup.h new file mode 100644 index 000000000..1bf4a4aad --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/pullup.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pullup.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename pullup.h */ +/* This is the interface file for synchronous process `pullup' */ + +#include "systemc.h" + +SC_MODULE( pullup ) +{ + SC_HAS_PROCESS( pullup ); + + sc_in_clk clk; + + sc_signal_resolved& pup; //output + + // Constructor + pullup( sc_module_name NAME, + sc_clock& CLK, + sc_signal_resolved& PUP ) + : pup(PUP) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/tri_state2.f b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/tri_state2.f new file mode 100644 index 000000000..963470209 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/tri_state2.f @@ -0,0 +1,5 @@ +tri_state2/display.cpp +tri_state2/driver.cpp +tri_state2/main.cpp +tri_state2/pullup.cpp +tri_state2/ts_buf.cpp diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/ts_buf.cpp b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/ts_buf.cpp new file mode 100644 index 000000000..85e56dc48 --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/ts_buf.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + ts_buf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename ts_buf.cc */ +/* This is the implementation file for asynchronous process `ts_buf' */ + +#include "ts_buf.h" + +void ts_buf::entry() +{ + bool c; + bool bus_val; + sc_logic val; + + c = control.read(); + + if (c == false) { + ts_out.write(sc_logic('Z')); + } + else { + bus_val = in.read(); + val = bus_val; // automatic type conversion + ts_out.write(val); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/sim_tests/tri_state2/ts_buf.h b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/ts_buf.h new file mode 100644 index 000000000..29ecb6f3e --- /dev/null +++ b/src/systemc/tests/systemc/misc/sim_tests/tri_state2/ts_buf.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + ts_buf.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename ts_buf.h */ +/* This is the interface file for asynchronous process `ts_buf' */ + +#include "systemc.h" + +SC_MODULE( ts_buf ) +{ + SC_HAS_PROCESS( ts_buf ); + + sc_in in; + sc_in control; + sc_signal_resolved& ts_out; //output + + // Constructor + ts_buf( sc_module_name NAME, + sc_signal& IN1, + sc_signal& CONTROL, + sc_signal_resolved& TS_OUT ) + : ts_out(TS_OUT) + { + in(IN1); + control(CONTROL); + SC_METHOD( entry ); + sensitive << in << control; + } + + // Process functionality in member function below + void entry(); +}; + diff --git a/src/systemc/tests/systemc/misc/stars/star102573/COMPILE b/src/systemc/tests/systemc/misc/stars/star102573/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star102573/for_nest.h b/src/systemc/tests/systemc/misc/stars/star102573/for_nest.h new file mode 100644 index 000000000..aa5ee10b8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star102573/for_nest.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + for_nest.h -- + + Original Author: Preeti Panda, Janssen, Synopsys, Inc., 2000-08-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( for_nest ) +{ + SC_HAS_PROCESS( for_nest ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + for_nest( + sc_module_name NAME, // referense name + sc_clock& CLOCK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : clk (CLOCK), // connection definition + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/stars/star102573/star102573.cpp b/src/systemc/tests/systemc/misc/stars/star102573/star102573.cpp new file mode 100644 index 000000000..60385dc6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star102573/star102573.cpp @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star102573.cpp -- + + Original Author: Preeti Panda, Synopsys, Inc., 2000-08-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "for_nest.h" + +#define max 5 +#define max1 4 +#define max2 3 +#define max3 2 + +void for_nest::entry() +{ + + sc_signed tmp2(2); + sc_signed tmp4(4); + sc_signed tmp8(8); + sc_signed tmp6(6); + + int i, j, inp_tmp; + + result.write(0); + out_valid.write(false); + wait(); + + main_loop:while(1) { + + while (in_valid.read()==false) wait(); + out_valid.write(true); + wait(); + /* unrolled loop inside rolled loop */ + loop1:for (i=1; i<=max; i++) { + tmp2 = in_value.read(); + inp_tmp = tmp2.to_int() + i ; + loop2:for (j=1; j<=max1; j++) + inp_tmp = inp_tmp - tmp2.to_int() ; + result.write(inp_tmp); + wait(); + }; + out_valid.write(false); + wait(); + out_valid.write(true); + wait(); + + inp_tmp = in_value.read(); + wait(); + /* unrolled loop inside unrolled loop */ + loop3:for (i=1; i<=max2; i++) { + inp_tmp += i ; + loop4:for (j=1; j<=max3; j++) { + inp_tmp -= j ; + } + }; + result.write(inp_tmp); + out_valid.write(false); + wait(); + out_valid.write(true); + wait(); + + } +} + diff --git a/src/systemc/tests/systemc/misc/stars/star102574/COMPILE b/src/systemc/tests/systemc/misc/stars/star102574/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star102574/star102574.cpp b/src/systemc/tests/systemc/misc/stars/star102574/star102574.cpp new file mode 100644 index 000000000..337ebde5b --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star102574/star102574.cpp @@ -0,0 +1,120 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star102574.cpp -- + + Original Author: Preeti Panda, Synopsys, Inc., 2000-08-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "while_fsm.h" + +#define max 10 + +void while_fsm::entry() +{ + + int i, inp_tmp; + + // reset_loop + if (reset.read()==true) { + result.write(0); + out_valid.write(false); + wait(); + } else wait(); + + //---------- + // main loop + //---------- + while(1) { + + // read inputs + while (in_valid.read()==false) wait(); + + // execution of for loop + out_valid.write(true); + i=1; + wait(); + while (i<=max) { + inp_tmp = in_value.read(); + result.write(inp_tmp); + i++; + wait(); + }; + out_valid.write(false); + wait(); + + // execution of for loop with continues + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (i==8) { + wait(); + continue; + } else if (in_value.read()<5 && i!=1) { + wait(); + continue; + } else { + result.write(inp_tmp); + wait(); + } + } while (i<=max); + out_valid.write(false); + wait(); + wait(3); + + // for loop with break + out_valid.write(true); + i=0; + wait(); + do { + i++; + inp_tmp = in_value.read(); + if (inp_tmp==7) { + wait(); + break; + } else { + result.write(inp_tmp); + wait(); + }; + } while (i<=max); + out_valid.write(false); + wait(); + + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/stars/star102574/while_fsm.h b/src/systemc/tests/systemc/misc/stars/star102574/while_fsm.h new file mode 100644 index 000000000..477b99652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star102574/while_fsm.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + while_fsm.h -- + + Original Author: Preeti Panda, Synopsys, Inc., 2000-08-09 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE( while_fsm ) +{ + SC_HAS_PROCESS( while_fsm ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_valid; + const sc_signal& in_value; + sc_signal& out_valid; + sc_signal& result; + + while_fsm( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal& IN_VALID, + const sc_signal& IN_VALUE, + sc_signal& OUT_VALID, + sc_signal& RESULT + ) + : + reset (RESET), + in_valid (IN_VALID), + in_value (IN_VALUE), + out_valid (OUT_VALID), + result (RESULT) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + void entry (); +}; diff --git a/src/systemc/tests/systemc/misc/stars/star103601-2/COMPILE b/src/systemc/tests/systemc/misc/stars/star103601-2/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star103601-2/star103601-2.cpp b/src/systemc/tests/systemc/misc/stars/star103601-2/star103601-2.cpp new file mode 100644 index 000000000..96da4bac9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star103601-2/star103601-2.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star103601-2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "test.h" + +void test::reset_loop() { + sc_uint<8> tmp, inp, caseexpr; + + wait(); + + done = 0; + dato = 0; + tmp = 0; + + wait(); + operational_loop: while(1 != 0) { + inp = dati.read(); + wait(); + inner : while(1 != 0) { + dato = tmp; + wait(); + + caseexpr = inp; + if(caseexpr == 1) { + tmp = 1; + } else if((caseexpr == 2) | (caseexpr == 3)) { + tmp = 2; + } else if(caseexpr != 4) { + tmp = 5; + break; + } else { + tmp = 4; + } + inp = inp + 1; + } + wait(); + done_loop : while(1) { + dato = tmp; + done = 1; + wait(); + } + } +} + diff --git a/src/systemc/tests/systemc/misc/stars/star103601-2/test.h b/src/systemc/tests/systemc/misc/stars/star103601-2/test.h new file mode 100644 index 000000000..da42797a3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star103601-2/test.h @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +struct test : sc_module { + + sc_in reset; + sc_in_clk clk; + sc_in > dati; + sc_out > dato; + sc_out done; + + SC_HAS_PROCESS( test ); + + test (const char *NAME) : sc_module(NAME) { + SC_CTHREAD( reset_loop, clk.pos() ); + reset_signal_is(reset,true); + end_module(); + } + + void reset_loop(); +}; + diff --git a/src/systemc/tests/systemc/misc/stars/star103765/COMPILE b/src/systemc/tests/systemc/misc/stars/star103765/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star103765/star103765.cpp b/src/systemc/tests/systemc/misc/stars/star103765/star103765.cpp new file mode 100644 index 000000000..3dd3cc70e --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star103765/star103765.cpp @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star103765.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "test.h" + +void test::reset_loop() { + sc_uint<8> tmp; + unsigned int i, j; + + wait(); + + done = 0; + dato = 0; + tmp = 0; + + wait(); + operational_loop: while(1 != 0) { + wait(); + + block1 : for(i = 0; i < 1; i++) { + tmp = tmp + 1; + dato = tmp; + wait(); + + tmp = tmp + 1; + if(tmp < 5) { + break; + } else { + continue; + } + tmp = tmp + 1; // should never get here + } + wait(); + done_loop : while(1) { + dato = tmp; + done = 1; + wait(); + } + } +} + diff --git a/src/systemc/tests/systemc/misc/stars/star103765/test.h b/src/systemc/tests/systemc/misc/stars/star103765/test.h new file mode 100644 index 000000000..da42797a3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star103765/test.h @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +struct test : sc_module { + + sc_in reset; + sc_in_clk clk; + sc_in > dati; + sc_out > dato; + sc_out done; + + SC_HAS_PROCESS( test ); + + test (const char *NAME) : sc_module(NAME) { + SC_CTHREAD( reset_loop, clk.pos() ); + reset_signal_is(reset,true); + end_module(); + } + + void reset_loop(); +}; + diff --git a/src/systemc/tests/systemc/misc/stars/star103832/COMPILE b/src/systemc/tests/systemc/misc/stars/star103832/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star103832/star103832.cpp b/src/systemc/tests/systemc/misc/stars/star103832/star103832.cpp new file mode 100644 index 000000000..fd0d49e19 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star103832/star103832.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star103832.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +struct test : sc_module { + + sc_in reset; + sc_in_clk clk; + sc_in > dati; + sc_out > dato; + sc_out done; + + SC_HAS_PROCESS( test ); + + test (const char *NAME) : sc_module(NAME) { + SC_CTHREAD( reset_loop, clk.pos() ); + reset_signal_is(reset,true); + end_module(); + } + + void tc_mult_8x8(sc_uint<8> A, sc_uint<8> B, sc_uint<16>& Y); + void reset_loop(); +}; + +void test::tc_mult_8x8(sc_uint<8> A, sc_uint<8> B, sc_uint<16>& Z) { + sc_uint<8> MantA; + sc_uint<16> MantC; + sc_uint<1> SignC, SignA, SignB; + sc_uint<8> MantB; + if (A == 0 || B == 0) { + Z = 0; + } else { + SignA = A[7]; + SignB = B[7]; + MantA = SignA ? sc_uint<8>(0 - A) : A; + MantB = SignB ? sc_uint<8>(0 - B) : B; + MantC = MantA * MantB; + SignC = SignA ^ SignB; + MantC = SignC ? sc_uint<16>(0 - MantC) : MantC; + Z = (SignC, MantC.range(14,0)); + } +} + +void test::reset_loop() { + sc_uint<16> tmp; + sc_uint<8> inp; + done = 0; + dato = 0; + tmp = 0; + wait(); + operational_loop : while (1 != 0) { + inp = dati.read(); + wait(); + tc_mult_8x8( inp, -2, tmp); + wait(); + done_loop: while (1) { + dato = tmp; + done = 1; + wait(); + } + } +} + diff --git a/src/systemc/tests/systemc/misc/stars/star104726/COMPILE b/src/systemc/tests/systemc/misc/stars/star104726/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star104726/global.h b/src/systemc/tests/systemc/misc/stars/star104726/global.h new file mode 100644 index 000000000..3baed2740 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star104726/global.h @@ -0,0 +1,239 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + global.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef GLOBALH +#define GLOBALH + + +// #include +#include + +#define MAXBUFLEN 64 + +// cos constants, factor 512 +#define c1d4 362L +#define c1d8 473L +#define c3d8 196L +#define c1d16 502L +#define c3d16 426L +#define c5d16 284L +#define c7d16 100L + +// correct digits +#define MSCALE(expr) (COEFF)((expr)>>9) + +typedef unsigned char BYTE; +typedef unsigned short WORD; +typedef unsigned long DWORD; + +typedef BYTE BLOCK[8][8]; +typedef BYTE COMPRESSED[MAXBUFLEN]; +typedef WORD MATRIX64x12[64]; + +// type of the coefficient arrays +typedef short COEFF; + +// typedefs for huffman tables +typedef struct { + BYTE size; + WORD code; +} HUFFMTBL_ENTRY; + + +struct Block { + BYTE b[8][8]; + + Block(); + Block(BLOCK *); + Block(const Block&); + void operator=(const Block&); + int operator==(const Block&) const; + + BYTE get(int x, int y) const; + void put(int x, int y, BYTE val); + BLOCK* get_ptr() const; +}; + +struct Compressed { + BYTE c[MAXBUFLEN]; + + Compressed(); + Compressed(const Compressed&); + void operator=(const Compressed&); + int operator==(const Compressed&) const; + + void clear(); + BYTE get(int x) const; + void put(int x, BYTE val); +}; + +struct Matrix64x12 { + WORD m[64]; + + Matrix64x12(); + Matrix64x12(const Matrix64x12&); + void operator=(const Matrix64x12&); + int operator==(const Matrix64x12&) const; + + WORD get(int x) const; + void put(int x, WORD val); +}; + +struct Coeff8 { + COEFF c[8]; + + Coeff8(); + Coeff8(const Coeff8&); + void operator=(const Coeff8&); + int operator==(const Coeff8&) const; + + COEFF get(int x) const; + void put(int x, COEFF val); +}; + +struct Coeff8x8 { + COEFF c[8][8]; + + Coeff8x8(); + Coeff8x8(const Coeff8x8&); + void operator=(const Coeff8x8&); + int operator==(const Coeff8x8&) const; + + COEFF get(int x, int y) const; + void put(int x, int y, COEFF val); +}; + +inline +void +sc_trace( sc_trace_file*, const Coeff8x8&, const std::string& ) +{ + // NOT IMPLEMENTED +} + + +// quantization table 8-bit unsigned integer +static const unsigned char coeff_quant[8][8] = { // v is row + { 16, 11, 10, 16, 24, 40, 51, 61}, + { 12, 12, 14, 19, 26, 58, 60, 55}, + { 14, 13, 16, 24, 40, 57, 69, 56}, + { 14, 17, 22, 29, 51, 87, 80, 82}, + { 18, 22, 37, 56, 68, 109, 103, 77}, + { 24, 35, 55, 64, 81, 104, 113, 92}, + { 99, 64, 78, 87, 103, 121, 120, 101}, + { 72, 92, 95, 98, 112, 100, 103, 99} +}; + + +// table of Huffman DC coefficients +static const HUFFMTBL_ENTRY huffm_dc[12] = { + { 2, 0X0000 }, { 3, 0X0002 }, { 3, 0X0003 }, { 3, 0X0004 }, + { 3, 0X0005 }, { 3, 0X0006 }, { 4, 0X000E }, { 5, 0X001E }, + { 6, 0X003E }, { 7, 0X007E }, { 8, 0X00FE }, { 9, 0X01FE } +}; + + +// table of Huffman AC coefficients +static const HUFFMTBL_ENTRY huffm_ac[256] = { + { 4, 0x000a }, { 2, 0x0000 }, { 2, 0x0001 }, { 3, 0x0004 }, + { 4, 0x000b }, { 5, 0x001a }, { 7, 0x0078 }, { 8, 0x00f8 }, + { 10, 0x03f6 }, { 16, 0xff82 }, { 16, 0xff83 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 4, 0x000c }, { 5, 0x001b }, { 7, 0x0079 }, + { 9, 0x01f6 }, { 11, 0x07f6 }, { 16, 0xff84 }, { 16, 0xff85 }, + { 16, 0xff86 }, { 16, 0xff87 }, { 16, 0xff88 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 5, 0x001c }, { 8, 0x00f9 }, { 10, 0x03f7 }, + { 12, 0x0ff4 }, { 16, 0xff89 }, { 16, 0xff8a }, { 16, 0xff8b }, + { 16, 0xff8c }, { 16, 0xff8d }, { 16, 0xff8e }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 6, 0x003a }, { 9, 0x01f7 }, { 12, 0x0ff5 }, + { 16, 0xff8f }, { 16, 0xff90 }, { 16, 0xff91 }, { 16, 0xff92 }, + { 16, 0xff93 }, { 16, 0xff94 }, { 16, 0xff95 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 6, 0x003b }, { 10, 0x03f8 }, { 16, 0xff96 }, + { 16, 0xff97 }, { 16, 0xff98 }, { 16, 0xff99 }, { 16, 0xff9a }, + { 16, 0xff9b }, { 16, 0xff9c }, { 16, 0xff9d }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 7, 0x007a }, { 11, 0x07f7 }, { 16, 0xff9e }, + { 16, 0xff9f }, { 16, 0xffa0 }, { 16, 0xffa1 }, { 16, 0xffa2 }, + { 16, 0xffa3 }, { 16, 0xffa4 }, { 16, 0xffa5 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 7, 0x007b }, { 12, 0x0ff6 }, { 16, 0xffa6 }, + { 16, 0xffa7 }, { 16, 0xffa8 }, { 16, 0xffa9 }, { 16, 0xffaa }, + { 16, 0xffab }, { 16, 0xffac }, { 16, 0xffad }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 8, 0x00fa }, { 12, 0x0ff7 }, { 16, 0xffae }, + { 16, 0xffaf }, { 16, 0xffb0 }, { 16, 0xffb1 }, { 16, 0xffb2 }, + { 16, 0xffb3 }, { 16, 0xffb4 }, { 16, 0xffb5 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 9, 0x01f8 }, { 15, 0x7fc0 }, { 16, 0xffb6 }, + { 16, 0xffb7 }, { 16, 0xffb8 }, { 16, 0xffb9 }, { 16, 0xffba }, + { 16, 0xffbb }, { 16, 0xffbc }, { 16, 0xffbd }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 9, 0x01f9 }, { 16, 0xffbe }, { 16, 0xffbf }, + { 16, 0xffc0 }, { 16, 0xffc1 }, { 16, 0xffc2 }, { 16, 0xffc3 }, + { 16, 0xffc4 }, { 16, 0xffc5 }, { 16, 0xffc6 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 9, 0x01fa }, { 16, 0xffc7 }, { 16, 0xffc8 }, + { 16, 0xffc9 }, { 16, 0xffca }, { 16, 0xffcb }, { 16, 0xffcc }, + { 16, 0xffcd }, { 16, 0xffce }, { 16, 0xffcf }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 10, 0x03f9 }, { 16, 0xffd0 }, { 16, 0xffd1 }, + { 16, 0xffd2 }, { 16, 0xffd3 }, { 16, 0xffd4 }, { 16, 0xffd5 }, + { 16, 0xffd6 }, { 16, 0xffd7 }, { 16, 0xffd8 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 10, 0x03fa }, { 16, 0xffd9 }, { 16, 0xffda }, + { 16, 0xffdb }, { 16, 0xffdc }, { 16, 0xffdd }, { 16, 0xffde }, + { 16, 0xffdf }, { 16, 0xffe0 }, { 16, 0xffe1 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 11, 0x07f8 }, { 16, 0xffe2 }, { 16, 0xffe3 }, + { 16, 0xffe4 }, { 16, 0xffe5 }, { 16, 0xffe6 }, { 16, 0xffe7 }, + { 16, 0xffe8 }, { 16, 0xffe9 }, { 16, 0xffea }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 16, 0xffeb }, { 16, 0xffec }, { 16, 0xffed }, + { 16, 0xffee }, { 16, 0xffef }, { 16, 0xfff0 }, { 16, 0xfff1 }, + { 16, 0xfff2 }, { 16, 0xfff3 }, { 16, 0xfff4 }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, + { 11, 0x07f9 }, { 16, 0xfff5 }, { 16, 0xfff6 }, { 16, 0xfff7 }, + { 16, 0xfff8 }, { 16, 0xfff9 }, { 16, 0xfffa }, { 16, 0xfffb }, + { 16, 0xfffc }, { 16, 0xfffd }, { 16, 0xfffe }, { 0, 0x0000 }, + { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 }, { 0, 0x0000 } + }; + + +#endif + diff --git a/src/systemc/tests/systemc/misc/stars/star104726/quant.h b/src/systemc/tests/systemc/misc/stars/star104726/quant.h new file mode 100644 index 000000000..24e24da4b --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star104726/quant.h @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + quant.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef QUANTH +#define QUANTH + +#include +#include "global.h" + +SC_MODULE(quant) { + + sc_in_clk clk; + + sc_in data_in; + sc_in start; + sc_in data_ok; + + sc_out data_out; + sc_out ready; + sc_out data_out_ready; + + void do_quant(); + + SC_CTOR(quant) { + SC_CTHREAD(do_quant,clk.pos()); + }; + +}; + + +#endif + diff --git a/src/systemc/tests/systemc/misc/stars/star104726/star104726.cpp b/src/systemc/tests/systemc/misc/stars/star104726/star104726.cpp new file mode 100644 index 000000000..043e230b6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star104726/star104726.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star104726.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "quant.h" + + +void quant::do_quant() +{ + Coeff8x8 c; + Coeff8x8 fuv; + COEFF ff; + int u,v; + + while(true) { + + ready.write(true); + data_out_ready.write(false); + do { wait(); } while (start==false); + ready.write(false); + + c = data_in.read(); + + // quantization + for( v=0; v<8; v++ ) { + for( u=0; u<8; u++ ) { + ff = (c.get(v,u)<<1) / (COEFF)(coeff_quant[v][u]); + fuv.put(v,u,(ff<0 ? ff : ff+1) >> 1); + } + } + + data_out.write(fuv); + + data_out_ready.write(true); + do { wait(); } while (data_ok==false); + + } +} + + diff --git a/src/systemc/tests/systemc/misc/stars/star105234/golden/star105234.log b/src/systemc/tests/systemc/misc/stars/star105234/golden/star105234.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star105234/golden/star105234.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/stars/star105234/star105234.cpp b/src/systemc/tests/systemc/misc/stars/star105234/star105234.cpp new file mode 100644 index 000000000..cb040b1a3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star105234/star105234.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star105234.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// the problem was in to_signed() method + +#include "systemc.h" + +int sc_main(int, char**) +{ + + sc_bv<3> b; + + b = "101"; + int x = b.to_int(); + + sc_assert(x==-3); + + return(0); +} diff --git a/src/systemc/tests/systemc/misc/stars/star106015/COMPILE b/src/systemc/tests/systemc/misc/stars/star106015/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star106015/mem.h b/src/systemc/tests/systemc/misc/stars/star106015/mem.h new file mode 100644 index 000000000..ab5046899 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star106015/mem.h @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mem.h -- + + Original Author: Stan Liao, Synopsys, Inc., 2000-07-11 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +struct memory : sc_module { + + sc_in_clk clk; + sc_in > in_value1; + sc_in in_valid1; + sc_out out_valid1; + + SC_HAS_PROCESS( memory ); + + memory (const char *NAME) + : sc_module (NAME) + { + SC_CTHREAD( entry, clk.pos() ); + end_module(); + }; + + void entry (); + +}; + diff --git a/src/systemc/tests/systemc/misc/stars/star106015/star106015.cpp b/src/systemc/tests/systemc/misc/stars/star106015/star106015.cpp new file mode 100644 index 000000000..282aadc8b --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star106015/star106015.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star106015.cpp -- + + Original Author: Stan Liao, Synopsys, Inc., 2000-07-11 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "mem.h" + +void memory::entry(){ + + unsigned tmp1; + sc_uint<8> mem[128]; + sc_uint<8> mem2[128]; + + out_valid1.write(false); + wait(); + + while(1) { + while(in_valid1.read()==false) { + mem[1] = 1; + wait(); + } + wait(); + out_valid1.write(true); + wait(); + } + while(1) { + out_valid1.write(false); + } + while(1) { + out_valid1.write(false); + } +} diff --git a/src/systemc/tests/systemc/misc/stars/star107460/golden/star107460.log b/src/systemc/tests/systemc/misc/stars/star107460/golden/star107460.log new file mode 100644 index 000000000..54eb6b23a --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star107460/golden/star107460.log @@ -0,0 +1,9 @@ +SystemC Simulation + +bv = 00000000 +lv = 000X0100 +Warning: (W207) sc_bv cannot contain values X and Z +In file: + +bv = 00010100 +lv = 000X0100 diff --git a/src/systemc/tests/systemc/misc/stars/star107460/star107460.cpp b/src/systemc/tests/systemc/misc/stars/star107460/star107460.cpp new file mode 100644 index 000000000..d204f21ef --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star107460/star107460.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star107460.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// If one assigns a sc_lv vector containing X or Z to +// sc_bv the error message tells you that this is not +// possible, but doesn't tell you where(which variable +// at least) this happened. In a large program such a +// message is impossible to trace + +#include "systemc.h" + +int sc_main(int, char**) +{ + sc_lv<8> lv("00X0100"); + sc_bv<8> bv; + + cout << "\nbv = "< a( -1 ); + cout << a << endl; + cout << a.to_int() << endl; + cout << a.to_uint() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star107468/golden/star107468.log b/src/systemc/tests/systemc/misc/stars/star107468/golden/star107468.log new file mode 100644 index 000000000..b80bc44e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star107468/golden/star107468.log @@ -0,0 +1,14 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: sc_bit is deprecated, use bool instead + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/misc/stars/star107468/star107468.cpp b/src/systemc/tests/systemc/misc/stars/star107468/star107468.cpp new file mode 100644 index 000000000..71d34afbd --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star107468/star107468.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star107468.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// When I assign a sc_logic with value 'X' to sc_bit +// the error message is not very helpful. Especially it +// does not mention where this wrongful assignment +// happened. At least we should mention the variable +// name. + +#include "systemc.h" + +int sc_main(int, char**) +{ + sc_logic x('X'); + sc_bit a; + a = x.to_bool(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star107755/COMPILE b/src/systemc/tests/systemc/misc/stars/star107755/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star107755/regfile.h b/src/systemc/tests/systemc/misc/stars/star107755/regfile.h new file mode 100644 index 000000000..c92583df9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star107755/regfile.h @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + regfile.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +struct test : sc_module { + + sc_in reset; + sc_in_clk clk; + sc_in > dati; + sc_out > dato; + sc_out ready, done; + + SC_HAS_PROCESS( test ); + + test (const char *NAME) : sc_module(NAME) { + SC_CTHREAD( reset_loop, clk.pos() ); + reset_signal_is(reset,true); + end_module(); + } + + void reset_loop(); +}; + diff --git a/src/systemc/tests/systemc/misc/stars/star107755/star107755.cpp b/src/systemc/tests/systemc/misc/stars/star107755/star107755.cpp new file mode 100644 index 000000000..4511b1bc3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star107755/star107755.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star107755.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "regfile.h" + +void test::reset_loop() { + sc_uint<14> cell[2]; + sc_uint<14> cell1[2]; + + sc_uint<14> dat0, dat3; + sc_uint<14> out0, out3; + + dato.write(0); + dat0 = dat3 = out0 = out3 = 0; + ready.write(sc_logic('0')); + done.write(sc_logic('0')); + + wait(); + while (1) { + ready.write(sc_logic('1')); + wait(); + + ready.write(sc_logic('0')); + dat0 = dati.read(); + wait(); + + dat3 = dati.read(); + + cell[0] = dat0; + + cell1[1] = dat3; + + out0 = cell[0]; + out3 = cell1[1]; + + dato.write(out0); + done.write(sc_logic('1')); + wait(); + + dato.write(out3); + done.write(sc_logic('0')); + wait(); + + } +} diff --git a/src/systemc/tests/systemc/misc/stars/star108117/COMPILE b/src/systemc/tests/systemc/misc/stars/star108117/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star108117/bv_arith.h b/src/systemc/tests/systemc/misc/stars/star108117/bv_arith.h new file mode 100644 index 000000000..6e2900ef9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star108117/bv_arith.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bv_arith.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + + + +/* ----- insert bv_arith_bv_arith_40.h ----- */ + +#include + +SC_MODULE(bv_arith) { + + sc_out > XX; + sc_in_clk Clock; + sc_in Reset; + sc_in eg_enable; + sc_in eg_start; + sc_out eg_exitc; + + + void COMBI(); + + SC_CTOR(bv_arith) { + SC_METHOD(COMBI); + sensitive << eg_enable << eg_start; + + } +}; + diff --git a/src/systemc/tests/systemc/misc/stars/star108117/star108117.cpp b/src/systemc/tests/systemc/misc/stars/star108117/star108117.cpp new file mode 100644 index 000000000..9f4d03629 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star108117/star108117.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star108117.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "bv_arith.h" + + + + +/* ----- insert bv_arith_bv_arith_40.cc ----- */ + +#include + + +void bv_arith::COMBI() +{ + + sc_bigint<80> XX_; + + { + /* ===== Default Ports to 0 ===== */ + + XX_ = sc_bigint<80> (0); + + } +} diff --git a/src/systemc/tests/systemc/misc/stars/star108761/COMPILE b/src/systemc/tests/systemc/misc/stars/star108761/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star108761/star108761.cpp b/src/systemc/tests/systemc/misc/stars/star108761/star108761.cpp new file mode 100644 index 000000000..929dab135 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star108761/star108761.cpp @@ -0,0 +1,1102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star108761.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(test) { + sc_in_clk clk; + sc_in reset; + sc_in > inp; + sc_out > outp; + + SC_CTOR(test) { + SC_CTHREAD(entry, clk.pos()); + reset_signal_is(reset,true); + end_module(); + } + + void entry(); +}; + + +sc_uint<10> comp_mux(sc_uint<10> invar) { + sc_uint<10> outvar; + + if(invar == 0) { + outvar = 1023; + } else if(invar == 1) { + outvar = 1022; + } else if(invar == 2) { + outvar = 1021; + } else if(invar == 3) { + outvar = 1020; + } else if(invar == 4) { + outvar = 1019; + } else if(invar == 5) { + outvar = 1018; + } else if(invar == 6) { + outvar = 1017; + } else if(invar == 7) { + outvar = 1016; + } else if(invar == 8) { + outvar = 1015; + } else if(invar == 9) { + outvar = 1014; + } else if(invar == 10) { + outvar = 1013; + } else if(invar == 11) { + outvar = 1012; + } else if(invar == 12) { + outvar = 1011; + } else if(invar == 13) { + outvar = 1010; + } else if(invar == 14) { + outvar = 1009; + } else if(invar == 15) { + outvar = 1008; + } else if(invar == 16) { + outvar = 1007; + } else if(invar == 17) { + outvar = 1006; + } else if(invar == 18) { + outvar = 1005; + } else if(invar == 19) { + outvar = 1004; + } else if(invar == 20) { + outvar = 1003; + } else if(invar == 21) { + outvar = 1002; + } else if(invar == 22) { + outvar = 1001; + } else if(invar == 23) { + outvar = 1000; + } else if(invar == 24) { + outvar = 999; + } else if(invar == 25) { + outvar = 998; + } else if(invar == 26) { + outvar = 997; + } else if(invar == 27) { + outvar = 996; + } else if(invar == 28) { + outvar = 995; + } else if(invar == 29) { + outvar = 994; + } else if(invar == 30) { + outvar = 993; + } else if(invar == 31) { + outvar = 992; + } else if(invar == 32) { + outvar = 991; + } else if(invar == 33) { + outvar = 990; + } else if(invar == 34) { + outvar = 989; + } else if(invar == 35) { + outvar = 988; + } else if(invar == 36) { + outvar = 987; + } else if(invar == 37) { + outvar = 986; + } else if(invar == 38) { + outvar = 985; + } else if(invar == 39) { + outvar = 984; + } else if(invar == 40) { + outvar = 983; + } else if(invar == 41) { + outvar = 982; + } else if(invar == 42) { + outvar = 981; + } else if(invar == 43) { + outvar = 980; + } else if(invar == 44) { + outvar = 979; + } else if(invar == 45) { + outvar = 978; + } else if(invar == 46) { + outvar = 977; + } else if(invar == 47) { + outvar = 976; + } else if(invar == 48) { + outvar = 975; + } else if(invar == 49) { + outvar = 974; + } else if(invar == 50) { + outvar = 973; + } else if(invar == 51) { + outvar = 972; + } else if(invar == 52) { + outvar = 971; + } else if(invar == 53) { + outvar = 970; + } else if(invar == 54) { + outvar = 969; + } else if(invar == 55) { + outvar = 968; + } else if(invar == 56) { + outvar = 967; + } else if(invar == 57) { + outvar = 966; + } else if(invar == 58) { + outvar = 965; + } else if(invar == 59) { + outvar = 964; + } else if(invar == 60) { + outvar = 963; + } else if(invar == 61) { + outvar = 962; + } else if(invar == 62) { + outvar = 961; + } else if(invar == 63) { + outvar = 960; + } else if(invar == 64) { + outvar = 959; + } else if(invar == 65) { + outvar = 958; + } else if(invar == 66) { + outvar = 957; + } else if(invar == 67) { + outvar = 956; + } else if(invar == 68) { + outvar = 955; + } else if(invar == 69) { + outvar = 954; + } else if(invar == 70) { + outvar = 953; + } else if(invar == 71) { + outvar = 952; + } else if(invar == 72) { + outvar = 951; + } else if(invar == 73) { + outvar = 950; + } else if(invar == 74) { + outvar = 949; + } else if(invar == 75) { + outvar = 948; + } else if(invar == 76) { + outvar = 947; + } else if(invar == 77) { + outvar = 946; + } else if(invar == 78) { + outvar = 945; + } else if(invar == 79) { + outvar = 944; + } else if(invar == 80) { + outvar = 943; + } else if(invar == 81) { + outvar = 942; + } else if(invar == 82) { + outvar = 941; + } else if(invar == 83) { + outvar = 940; + } else if(invar == 84) { + outvar = 939; + } else if(invar == 85) { + outvar = 938; + } else if(invar == 86) { + outvar = 937; + } else if(invar == 87) { + outvar = 936; + } else if(invar == 88) { + outvar = 935; + } else if(invar == 89) { + outvar = 934; + } else if(invar == 90) { + outvar = 933; + } else if(invar == 91) { + outvar = 932; + } else if(invar == 92) { + outvar = 931; + } else if(invar == 93) { + outvar = 930; + } else if(invar == 94) { + outvar = 929; + } else if(invar == 95) { + outvar = 928; + } else if(invar == 96) { + outvar = 927; + } else if(invar == 97) { + outvar = 926; + } else if(invar == 98) { + outvar = 925; + } else if(invar == 99) { + outvar = 924; + } else if(invar == 100) { + outvar = 923; + } else if(invar == 101) { + outvar = 922; + } else if(invar == 102) { + outvar = 921; + } else if(invar == 103) { + outvar = 920; + } else if(invar == 104) { + outvar = 919; + } else if(invar == 105) { + outvar = 918; + } else if(invar == 106) { + outvar = 917; + } else if(invar == 107) { + outvar = 916; + } else if(invar == 108) { + outvar = 915; + } else if(invar == 109) { + outvar = 914; + } else if(invar == 110) { + outvar = 913; + } else if(invar == 111) { + outvar = 912; + } else if(invar == 112) { + outvar = 911; + } else if(invar == 113) { + outvar = 910; + } else if(invar == 114) { + outvar = 909; + } else if(invar == 115) { + outvar = 908; + } else if(invar == 116) { + outvar = 907; + } else if(invar == 117) { + outvar = 906; + } else if(invar == 118) { + outvar = 905; + } else if(invar == 119) { + outvar = 904; + } else if(invar == 120) { + outvar = 903; + } else if(invar == 121) { + outvar = 902; +#if !defined( _MSC_VER ) + // 'cl' compiler limit: blocks nested too deeply + } else if(invar == 122) { + outvar = 901; + } else if(invar == 123) { + outvar = 900; + } else if(invar == 124) { + outvar = 899; + } else if(invar == 125) { + outvar = 898; + } else if(invar == 126) { + outvar = 897; + } else if(invar == 127) { + outvar = 896; + } else if(invar == 128) { + outvar = 895; + } else if(invar == 129) { + outvar = 894; + } else if(invar == 130) { + outvar = 893; + } else if(invar == 131) { + outvar = 892; + } else if(invar == 132) { + outvar = 891; + } else if(invar == 133) { + outvar = 890; + } else if(invar == 134) { + outvar = 889; + } else if(invar == 135) { + outvar = 888; + } else if(invar == 136) { + outvar = 887; + } else if(invar == 137) { + outvar = 886; + } else if(invar == 138) { + outvar = 885; + } else if(invar == 139) { + outvar = 884; + } else if(invar == 140) { + outvar = 883; + } else if(invar == 141) { + outvar = 882; + } else if(invar == 142) { + outvar = 881; + } else if(invar == 143) { + outvar = 880; + } else if(invar == 144) { + outvar = 879; + } else if(invar == 145) { + outvar = 878; + } else if(invar == 146) { + outvar = 877; + } else if(invar == 147) { + outvar = 876; + } else if(invar == 148) { + outvar = 875; + } else if(invar == 149) { + outvar = 874; + } else if(invar == 150) { + outvar = 873; + } else if(invar == 151) { + outvar = 872; + } else if(invar == 152) { + outvar = 871; + } else if(invar == 153) { + outvar = 870; + } else if(invar == 154) { + outvar = 869; + } else if(invar == 155) { + outvar = 868; + } else if(invar == 156) { + outvar = 867; + } else if(invar == 157) { + outvar = 866; + } else if(invar == 158) { + outvar = 865; + } else if(invar == 159) { + outvar = 864; + } else if(invar == 160) { + outvar = 863; + } else if(invar == 161) { + outvar = 862; + } else if(invar == 162) { + outvar = 861; + } else if(invar == 163) { + outvar = 860; + } else if(invar == 164) { + outvar = 859; + } else if(invar == 165) { + outvar = 858; + } else if(invar == 166) { + outvar = 857; + } else if(invar == 167) { + outvar = 856; + } else if(invar == 168) { + outvar = 855; + } else if(invar == 169) { + outvar = 854; + } else if(invar == 170) { + outvar = 853; + } else if(invar == 171) { + outvar = 852; + } else if(invar == 172) { + outvar = 851; + } else if(invar == 173) { + outvar = 850; + } else if(invar == 174) { + outvar = 849; + } else if(invar == 175) { + outvar = 848; + } else if(invar == 176) { + outvar = 847; + } else if(invar == 177) { + outvar = 846; + } else if(invar == 178) { + outvar = 845; + } else if(invar == 179) { + outvar = 844; + } else if(invar == 180) { + outvar = 843; + } else if(invar == 181) { + outvar = 842; + } else if(invar == 182) { + outvar = 841; + } else if(invar == 183) { + outvar = 840; + } else if(invar == 184) { + outvar = 839; + } else if(invar == 185) { + outvar = 838; + } else if(invar == 186) { + outvar = 837; + } else if(invar == 187) { + outvar = 836; + } else if(invar == 188) { + outvar = 835; + } else if(invar == 189) { + outvar = 834; + } else if(invar == 190) { + outvar = 833; + } else if(invar == 191) { + outvar = 832; + } else if(invar == 192) { + outvar = 831; + } else if(invar == 193) { + outvar = 830; + } else if(invar == 194) { + outvar = 829; + } else if(invar == 195) { + outvar = 828; + } else if(invar == 196) { + outvar = 827; + } else if(invar == 197) { + outvar = 826; + } else if(invar == 198) { + outvar = 825; + } else if(invar == 199) { + outvar = 824; + } else if(invar == 200) { + outvar = 823; + } else if(invar == 201) { + outvar = 822; + } else if(invar == 202) { + outvar = 821; + } else if(invar == 203) { + outvar = 820; + } else if(invar == 204) { + outvar = 819; + } else if(invar == 205) { + outvar = 818; + } else if(invar == 206) { + outvar = 817; + } else if(invar == 207) { + outvar = 816; + } else if(invar == 208) { + outvar = 815; + } else if(invar == 209) { + outvar = 814; + } else if(invar == 210) { + outvar = 813; + } else if(invar == 211) { + outvar = 812; + } else if(invar == 212) { + outvar = 811; + } else if(invar == 213) { + outvar = 810; + } else if(invar == 214) { + outvar = 809; + } else if(invar == 215) { + outvar = 808; + } else if(invar == 216) { + outvar = 807; + } else if(invar == 217) { + outvar = 806; + } else if(invar == 218) { + outvar = 805; + } else if(invar == 219) { + outvar = 804; + } else if(invar == 220) { + outvar = 803; + } else if(invar == 221) { + outvar = 802; + } else if(invar == 222) { + outvar = 801; + } else if(invar == 223) { + outvar = 800; + } else if(invar == 224) { + outvar = 799; + } else if(invar == 225) { + outvar = 798; + } else if(invar == 226) { + outvar = 797; + } else if(invar == 227) { + outvar = 796; + } else if(invar == 228) { + outvar = 795; + } else if(invar == 229) { + outvar = 794; + } else if(invar == 230) { + outvar = 793; + } else if(invar == 231) { + outvar = 792; + } else if(invar == 232) { + outvar = 791; + } else if(invar == 233) { + outvar = 790; + } else if(invar == 234) { + outvar = 789; + } else if(invar == 235) { + outvar = 788; + } else if(invar == 236) { + outvar = 787; + } else if(invar == 237) { + outvar = 786; + } else if(invar == 238) { + outvar = 785; + } else if(invar == 239) { + outvar = 784; + } else if(invar == 240) { + outvar = 783; + } else if(invar == 241) { + outvar = 782; + } else if(invar == 242) { + outvar = 781; + } else if(invar == 243) { + outvar = 780; + } else if(invar == 244) { + outvar = 779; + } else if(invar == 245) { + outvar = 778; + } else if(invar == 246) { + outvar = 777; + } else if(invar == 247) { + outvar = 776; + } else if(invar == 248) { + outvar = 775; + } else if(invar == 249) { + outvar = 774; + } else if(invar == 250) { + outvar = 773; + } else if(invar == 251) { + outvar = 772; + } else if(invar == 252) { + outvar = 771; + } else if(invar == 253) { + outvar = 770; + } else if(invar == 254) { + outvar = 769; + } else if(invar == 255) { + outvar = 768; + } else if(invar == 256) { + outvar = 767; + } else if(invar == 257) { + outvar = 766; + } else if(invar == 258) { + outvar = 765; + } else if(invar == 259) { + outvar = 764; + } else if(invar == 260) { + outvar = 763; + } else if(invar == 261) { + outvar = 762; + } else if(invar == 262) { + outvar = 761; + } else if(invar == 263) { + outvar = 760; + } else if(invar == 264) { + outvar = 759; + } else if(invar == 265) { + outvar = 758; + } else if(invar == 266) { + outvar = 757; + } else if(invar == 267) { + outvar = 756; + } else if(invar == 268) { + outvar = 755; + } else if(invar == 269) { + outvar = 754; + } else if(invar == 270) { + outvar = 753; + } else if(invar == 271) { + outvar = 752; + } else if(invar == 272) { + outvar = 751; + } else if(invar == 273) { + outvar = 750; + } else if(invar == 274) { + outvar = 749; + } else if(invar == 275) { + outvar = 748; + } else if(invar == 276) { + outvar = 747; + } else if(invar == 277) { + outvar = 746; + } else if(invar == 278) { + outvar = 745; + } else if(invar == 279) { + outvar = 744; + } else if(invar == 280) { + outvar = 743; + } else if(invar == 281) { + outvar = 742; + } else if(invar == 282) { + outvar = 741; + } else if(invar == 283) { + outvar = 740; + } else if(invar == 284) { + outvar = 739; + } else if(invar == 285) { + outvar = 738; + } else if(invar == 286) { + outvar = 737; + } else if(invar == 287) { + outvar = 736; + } else if(invar == 288) { + outvar = 735; + } else if(invar == 289) { + outvar = 734; + } else if(invar == 290) { + outvar = 733; + } else if(invar == 291) { + outvar = 732; + } else if(invar == 292) { + outvar = 731; + } else if(invar == 293) { + outvar = 730; + } else if(invar == 294) { + outvar = 729; + } else if(invar == 295) { + outvar = 728; + } else if(invar == 296) { + outvar = 727; + } else if(invar == 297) { + outvar = 726; + } else if(invar == 298) { + outvar = 725; + } else if(invar == 299) { + outvar = 724; + } else if(invar == 300) { + outvar = 723; + } else if(invar == 301) { + outvar = 722; + } else if(invar == 302) { + outvar = 721; + } else if(invar == 303) { + outvar = 720; + } else if(invar == 304) { + outvar = 719; + } else if(invar == 305) { + outvar = 718; + } else if(invar == 306) { + outvar = 717; + } else if(invar == 307) { + outvar = 716; + } else if(invar == 308) { + outvar = 715; + } else if(invar == 309) { + outvar = 714; + } else if(invar == 310) { + outvar = 713; + } else if(invar == 311) { + outvar = 712; + } else if(invar == 312) { + outvar = 711; + } else if(invar == 313) { + outvar = 710; + } else if(invar == 314) { + outvar = 709; + } else if(invar == 315) { + outvar = 708; + } else if(invar == 316) { + outvar = 707; + } else if(invar == 317) { + outvar = 706; + } else if(invar == 318) { + outvar = 705; + } else if(invar == 319) { + outvar = 704; + } else if(invar == 320) { + outvar = 703; + } else if(invar == 321) { + outvar = 702; + } else if(invar == 322) { + outvar = 701; + } else if(invar == 323) { + outvar = 700; + } else if(invar == 324) { + outvar = 699; + } else if(invar == 325) { + outvar = 698; + } else if(invar == 326) { + outvar = 697; + } else if(invar == 327) { + outvar = 696; + } else if(invar == 328) { + outvar = 695; + } else if(invar == 329) { + outvar = 694; + } else if(invar == 330) { + outvar = 693; + } else if(invar == 331) { + outvar = 692; + } else if(invar == 332) { + outvar = 691; + } else if(invar == 333) { + outvar = 690; + } else if(invar == 334) { + outvar = 689; + } else if(invar == 335) { + outvar = 688; + } else if(invar == 336) { + outvar = 687; + } else if(invar == 337) { + outvar = 686; + } else if(invar == 338) { + outvar = 685; + } else if(invar == 339) { + outvar = 684; + } else if(invar == 340) { + outvar = 683; + } else if(invar == 341) { + outvar = 682; + } else if(invar == 342) { + outvar = 681; + } else if(invar == 343) { + outvar = 680; + } else if(invar == 344) { + outvar = 679; + } else if(invar == 345) { + outvar = 678; + } else if(invar == 346) { + outvar = 677; + } else if(invar == 347) { + outvar = 676; + } else if(invar == 348) { + outvar = 675; + } else if(invar == 349) { + outvar = 674; + } else if(invar == 350) { + outvar = 673; + } else if(invar == 351) { + outvar = 672; + } else if(invar == 352) { + outvar = 671; + } else if(invar == 353) { + outvar = 670; + } else if(invar == 354) { + outvar = 669; + } else if(invar == 355) { + outvar = 668; + } else if(invar == 356) { + outvar = 667; + } else if(invar == 357) { + outvar = 666; + } else if(invar == 358) { + outvar = 665; + } else if(invar == 359) { + outvar = 664; + } else if(invar == 360) { + outvar = 663; + } else if(invar == 361) { + outvar = 662; + } else if(invar == 362) { + outvar = 661; + } else if(invar == 363) { + outvar = 660; + } else if(invar == 364) { + outvar = 659; + } else if(invar == 365) { + outvar = 658; + } else if(invar == 366) { + outvar = 657; + } else if(invar == 367) { + outvar = 656; + } else if(invar == 368) { + outvar = 655; + } else if(invar == 369) { + outvar = 654; + } else if(invar == 370) { + outvar = 653; + } else if(invar == 371) { + outvar = 652; + } else if(invar == 372) { + outvar = 651; + } else if(invar == 373) { + outvar = 650; + } else if(invar == 374) { + outvar = 649; + } else if(invar == 375) { + outvar = 648; + } else if(invar == 376) { + outvar = 647; + } else if(invar == 377) { + outvar = 646; + } else if(invar == 378) { + outvar = 645; + } else if(invar == 379) { + outvar = 644; + } else if(invar == 380) { + outvar = 643; + } else if(invar == 381) { + outvar = 642; + } else if(invar == 382) { + outvar = 641; + } else if(invar == 383) { + outvar = 640; + } else if(invar == 384) { + outvar = 639; + } else if(invar == 385) { + outvar = 638; + } else if(invar == 386) { + outvar = 637; + } else if(invar == 387) { + outvar = 636; + } else if(invar == 388) { + outvar = 635; + } else if(invar == 389) { + outvar = 634; + } else if(invar == 390) { + outvar = 633; + } else if(invar == 391) { + outvar = 632; + } else if(invar == 392) { + outvar = 631; + } else if(invar == 393) { + outvar = 630; + } else if(invar == 394) { + outvar = 629; + } else if(invar == 395) { + outvar = 628; + } else if(invar == 396) { + outvar = 627; + } else if(invar == 397) { + outvar = 626; + } else if(invar == 398) { + outvar = 625; + } else if(invar == 399) { + outvar = 624; + } else if(invar == 400) { + outvar = 623; + } else if(invar == 401) { + outvar = 622; + } else if(invar == 402) { + outvar = 621; + } else if(invar == 403) { + outvar = 620; + } else if(invar == 404) { + outvar = 619; + } else if(invar == 405) { + outvar = 618; + } else if(invar == 406) { + outvar = 617; + } else if(invar == 407) { + outvar = 616; + } else if(invar == 408) { + outvar = 615; + } else if(invar == 409) { + outvar = 614; + } else if(invar == 410) { + outvar = 613; + } else if(invar == 411) { + outvar = 612; + } else if(invar == 412) { + outvar = 611; + } else if(invar == 413) { + outvar = 610; + } else if(invar == 414) { + outvar = 609; + } else if(invar == 415) { + outvar = 608; + } else if(invar == 416) { + outvar = 607; + } else if(invar == 417) { + outvar = 606; + } else if(invar == 418) { + outvar = 605; + } else if(invar == 419) { + outvar = 604; + } else if(invar == 420) { + outvar = 603; + } else if(invar == 421) { + outvar = 602; + } else if(invar == 422) { + outvar = 601; + } else if(invar == 423) { + outvar = 600; + } else if(invar == 424) { + outvar = 599; + } else if(invar == 425) { + outvar = 598; + } else if(invar == 426) { + outvar = 597; + } else if(invar == 427) { + outvar = 596; + } else if(invar == 428) { + outvar = 595; + } else if(invar == 429) { + outvar = 594; + } else if(invar == 430) { + outvar = 593; + } else if(invar == 431) { + outvar = 592; + } else if(invar == 432) { + outvar = 591; + } else if(invar == 433) { + outvar = 590; + } else if(invar == 434) { + outvar = 589; + } else if(invar == 435) { + outvar = 588; + } else if(invar == 436) { + outvar = 587; + } else if(invar == 437) { + outvar = 586; + } else if(invar == 438) { + outvar = 585; + } else if(invar == 439) { + outvar = 584; + } else if(invar == 440) { + outvar = 583; + } else if(invar == 441) { + outvar = 582; + } else if(invar == 442) { + outvar = 581; + } else if(invar == 443) { + outvar = 580; + } else if(invar == 444) { + outvar = 579; + } else if(invar == 445) { + outvar = 578; + } else if(invar == 446) { + outvar = 577; + } else if(invar == 447) { + outvar = 576; + } else if(invar == 448) { + outvar = 575; + } else if(invar == 449) { + outvar = 574; + } else if(invar == 450) { + outvar = 573; + } else if(invar == 451) { + outvar = 572; + } else if(invar == 452) { + outvar = 571; + } else if(invar == 453) { + outvar = 570; + } else if(invar == 454) { + outvar = 569; + } else if(invar == 455) { + outvar = 568; + } else if(invar == 456) { + outvar = 567; + } else if(invar == 457) { + outvar = 566; + } else if(invar == 458) { + outvar = 565; + } else if(invar == 459) { + outvar = 564; + } else if(invar == 460) { + outvar = 563; + } else if(invar == 461) { + outvar = 562; + } else if(invar == 462) { + outvar = 561; + } else if(invar == 463) { + outvar = 560; + } else if(invar == 464) { + outvar = 559; + } else if(invar == 465) { + outvar = 558; + } else if(invar == 466) { + outvar = 557; + } else if(invar == 467) { + outvar = 556; + } else if(invar == 468) { + outvar = 555; + } else if(invar == 469) { + outvar = 554; + } else if(invar == 470) { + outvar = 553; + } else if(invar == 471) { + outvar = 552; + } else if(invar == 472) { + outvar = 551; + } else if(invar == 473) { + outvar = 550; + } else if(invar == 474) { + outvar = 549; + } else if(invar == 475) { + outvar = 548; + } else if(invar == 476) { + outvar = 547; + } else if(invar == 477) { + outvar = 546; + } else if(invar == 478) { + outvar = 545; + } else if(invar == 479) { + outvar = 544; + } else if(invar == 480) { + outvar = 543; + } else if(invar == 481) { + outvar = 542; + } else if(invar == 482) { + outvar = 541; + } else if(invar == 483) { + outvar = 540; + } else if(invar == 484) { + outvar = 539; + } else if(invar == 485) { + outvar = 538; + } else if(invar == 486) { + outvar = 537; + } else if(invar == 487) { + outvar = 536; + } else if(invar == 488) { + outvar = 535; + } else if(invar == 489) { + outvar = 534; + } else if(invar == 490) { + outvar = 533; + } else if(invar == 491) { + outvar = 532; + } else if(invar == 492) { + outvar = 531; + } else if(invar == 493) { + outvar = 530; + } else if(invar == 494) { + outvar = 529; + } else if(invar == 495) { + outvar = 528; + } else if(invar == 496) { + outvar = 527; + } else if(invar == 497) { + outvar = 526; + } else if(invar == 498) { + outvar = 525; + } else if(invar == 499) { + outvar = 524; + } else if(invar == 500) { + outvar = 523; + } else if(invar == 501) { + outvar = 522; + } else if(invar == 502) { + outvar = 521; + } else if(invar == 503) { + outvar = 520; + } else if(invar == 504) { + outvar = 519; + } else if(invar == 505) { + outvar = 518; + } else if(invar == 506) { + outvar = 517; + } else if(invar == 507) { + outvar = 516; + } else if(invar == 508) { + outvar = 515; + } else if(invar == 509) { + outvar = 514; + } else if(invar == 510) { + outvar = 513; + } else if(invar == 511) { + outvar = 512; + } else if(invar == 512) { + outvar = 511; +#endif + } return outvar; +} + +void test::entry() { + sc_uint<10> tmp; + + outp.write(0); + wait(); + while(1) { + // tmp = comp_mux(inp); + tmp = comp_mux(inp.read()); + outp.write(tmp); + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/stars/star109180/COMPILE b/src/systemc/tests/systemc/misc/stars/star109180/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star109180/regfile.h b/src/systemc/tests/systemc/misc/stars/star109180/regfile.h new file mode 100644 index 000000000..c92583df9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star109180/regfile.h @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + regfile.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +struct test : sc_module { + + sc_in reset; + sc_in_clk clk; + sc_in > dati; + sc_out > dato; + sc_out ready, done; + + SC_HAS_PROCESS( test ); + + test (const char *NAME) : sc_module(NAME) { + SC_CTHREAD( reset_loop, clk.pos() ); + reset_signal_is(reset,true); + end_module(); + } + + void reset_loop(); +}; + diff --git a/src/systemc/tests/systemc/misc/stars/star109180/star109180.cpp b/src/systemc/tests/systemc/misc/stars/star109180/star109180.cpp new file mode 100644 index 000000000..33b584cd2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star109180/star109180.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star109180.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "regfile.h" + +void test::reset_loop() { + sc_uint<14> cell[2]; + sc_uint<14> cell1[2]; + + sc_uint<14> dat0, dat3; + sc_uint<14> out0, out3; + + dato.write(0); + dat0 = dat3 = out0 = out3 = 0; + ready.write(sc_logic('0')); + done.write(sc_logic('0')); + + wait(); + while (1) { + ready.write(sc_logic('1')); + wait(); + + ready.write(sc_logic('0')); + dat0 = dati.read(); + wait(); + + dat3 = dati.read(); + + cell[0] = dat0; + + cell1[1] = dat3; + + out0 = cell[0]; + out3 = cell1[1]; + + dato.write(out0); + done.write(sc_logic('1')); + wait(); + + dato.write(out3); + done.write(sc_logic('0')); + wait(); + + } +} diff --git a/src/systemc/tests/systemc/misc/stars/star109218-2/COMPILE b/src/systemc/tests/systemc/misc/stars/star109218-2/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star109218-2/map.h b/src/systemc/tests/systemc/misc/stars/star109218-2/map.h new file mode 100644 index 000000000..c716f48f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star109218-2/map.h @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + map.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE(test) { + sc_in_clk clk; + sc_in reset; + sc_in > dati; + sc_out > dato; + sc_out done; + + SC_CTOR(test) { + SC_CTHREAD(reset_loop, clk.pos()); + reset_signal_is(reset,true); + } + + void reset_loop(void); +}; diff --git a/src/systemc/tests/systemc/misc/stars/star109218-2/star109218-2.cpp b/src/systemc/tests/systemc/misc/stars/star109218-2/star109218-2.cpp new file mode 100644 index 000000000..977b9998d --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star109218-2/star109218-2.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star109218-2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "map.h" + + +void my_mult(bool CLK, + sc_uint<8> A, + sc_uint<8> B, + sc_uint<16> &Z) { + // map_to_operator MULT_TC_OP + bool SignA, SignB; + sc_uint<8> MantA, MantB; + sc_uint<1> SignC; + sc_uint<16> MantC; + sc_lv<8> A_tmp, B_tmp; + sc_lv<16> Z_tmp; + + if(A == 0 || B == 0) { + Z = 0; + } else { + SignA = A[7]; + SignB = B[7]; + MantA = SignA? (sc_uint<8>) (0-A) : A; + MantB = SignB? (sc_uint<8>) (0-B) : B; + MantC = MantA*MantB; + SignC[0] = SignA ^ SignB; + MantC = SignC[0]? (sc_uint<16>) (0-MantC) : MantC; + Z = (SignC, MantC.range(14,0)); + } +} + + +void test::reset_loop() { + sc_uint<16> a, b, c, d, result; + + dato.write(0); + done.write((sc_logic)'0'); + wait(); + while(1) { + a = dati; + my_mult(clk.read(), a.range(7,0), a.range(15,8), result); + dato.write(result); + done.write((sc_logic)'1'); + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/stars/star109218/COMPILE b/src/systemc/tests/systemc/misc/stars/star109218/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star109218/star109218.cpp b/src/systemc/tests/systemc/misc/stars/star109218/star109218.cpp new file mode 100644 index 000000000..89eb21a20 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star109218/star109218.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star109218.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +void +star109218_imp(bool SignA, bool SignB, bool& SignC) +{ + sc_uint<1> tmpC; + tmpC[0] = SignA ^ SignB; + SignC = tmpC[0] ? 1 : 0; +} + + +void +star109218_ref(bool SignA, bool SignB, bool& SignC) +{ + SignC = (SignA != SignB); +} diff --git a/src/systemc/tests/systemc/misc/stars/star109678/COMPILE b/src/systemc/tests/systemc/misc/stars/star109678/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star109678/star109678.cpp b/src/systemc/tests/systemc/misc/stars/star109678/star109678.cpp new file mode 100644 index 000000000..afcf818a2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star109678/star109678.cpp @@ -0,0 +1,106 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star109678.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(test) { + sc_in_clk clk; + sc_in reset; + sc_in > inp; + sc_out > outp; + sc_out > outp2; + + SC_CTOR(test) { + SC_CTHREAD(entry, clk.pos()); + reset_signal_is(reset,true); + SC_CTHREAD(entry2, clk.pos()); + end_module(); + } + + void entry(); + void entry2(); +}; + + +void test::entry() { + sc_uint<10> tmp, tmp2; + + outp.write(0); + wait(); + for(;;) { + if(inp.read() == 0) { + wait(); + while(inp.read() != 0) { + wait(); + tmp = inp.read(); + break; + } + break; + } else { + tmp = 5; + wait(); + } + } + wait(); + outp = tmp; + wait(); +} + + +void test::entry2() { + sc_uint<10> tmp, tmp2; + + outp2.write(0); + wait(); + for(;;) { + if(inp.read() == 0) { + wait(); + while(inp.read() != 0) { + wait(); + tmp = inp.read(); + continue; + } + break; + } else { + tmp = 5; + wait(); + } + } + wait(); + outp2 = tmp; + wait(); +} diff --git a/src/systemc/tests/systemc/misc/stars/star110069/COMPILE b/src/systemc/tests/systemc/misc/stars/star110069/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star110069/mem0.h b/src/systemc/tests/systemc/misc/stars/star110069/mem0.h new file mode 100644 index 000000000..039e1fb3a --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star110069/mem0.h @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mem0.h -- + + Original Author: Stan Liao, Synopsys, Inc., 2000-09-19 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +typedef sc_signal > sc_signal_bool_vector; + + +SC_MODULE( mem0 ) +{ + SC_HAS_PROCESS( mem0 ); + + sc_in_clk clk; + + //==================================================================== + // [C] Always Needed Member Function + // -- constructor + // -- entry + //==================================================================== + + const sc_signal& reset ; + const sc_signal_bool_vector& in_value1; // Input port + const sc_signal_bool_vector& in_value2 ; // Input port + const sc_signal& in_valid; // Input port + sc_signal_bool_vector& out_value1; // Output port + sc_signal_bool_vector& out_value2; // Output port + sc_signal& out_valid; // Output port + int* memory; + +int test; + // + // Constructor + // + + mem0 ( + sc_module_name NAME, // referense name + sc_clock& CLK, // clock + const sc_signal& RESET, + const sc_signal_bool_vector& IN_VALUE1, + const sc_signal_bool_vector& IN_VALUE2, + const sc_signal& IN_VALID, // Input port + sc_signal_bool_vector& OUT_VALUE1, + sc_signal_bool_vector& OUT_VALUE2, + sc_signal& OUT_VALID, // Output port + int *MEMORY // Output port + ) + : + reset (RESET), + in_value1 (IN_VALUE1), + in_value2 (IN_VALUE2), + in_valid (IN_VALID), + out_value1 (OUT_VALUE1), + out_value2 (OUT_VALUE2), + out_valid (OUT_VALID), + memory (MEMORY) + + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + }; + + // + void entry (); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/stars/star110069/star110069.cpp b/src/systemc/tests/systemc/misc/stars/star110069/star110069.cpp new file mode 100644 index 000000000..a6ce0c671 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star110069/star110069.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star110069.cpp -- + + Original Author: Stan Liao, Synopsys, Inc., 2000-09-19 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "mem0.h" + +void mem0::entry(){ + + + unsigned int tmp1; + unsigned int tmp2; +int test[16]; + // reset_loop + if (reset.read() == true) { + out_valid.write(false); + wait(); + } else wait(); + + // + // main loop + // + // + while(1) { + while(in_valid.read()==false) wait(); + wait(); + + //reading the inputs + tmp1 = in_value1.read().to_uint(); + tmp2 = in_value2.read().to_uint(); + + wait(); + wait(); + tmp2 = memory[tmp1]; + cout << "memory content " << tmp2 << endl; + // write outputs + out_value1.write( sc_bv<8>( tmp1 ) ); + out_value2.write( sc_bv<8>( tmp2 ) ); + out_valid.write(true); + wait(); + out_valid.write(false); + wait(); + } +} + +// EOF + diff --git a/src/systemc/tests/systemc/misc/stars/star110089/COMPILE b/src/systemc/tests/systemc/misc/stars/star110089/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star110089/star110089.cpp b/src/systemc/tests/systemc/misc/stars/star110089/star110089.cpp new file mode 100644 index 000000000..912af5eab --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star110089/star110089.cpp @@ -0,0 +1,403 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star110089.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/*********************************************************************** + +Things I had to do to make this work with the SystemC compiler + +Remove LP_STATS-related #ifdefs + +Added SystemC module interface. Odd function wrapper, wait()s. + +Removed use of pointers into lp_table (replaced with array references). + +Global variables are not allowed, so move lp_table into the function. + +Pointers appear to have problems, so comment out test of the "dev" field. + +The LP_POLLED macro checks lp_table[minor].dev->port->irq (three dereferences), +which is not synthesizable. I replaced it with a constant. + +w_ctr writes to the control I/O port. We want to observe this, so added +a port to the module, made the function a member function (not just static). + +Want to observe successive values on the control port, so added a wait() after +it is written. + +Adding the main do loop (there's an if () return statement earlier) +gives "WAITs not balanced" errors, even without any wait() statements +at all. Adding them doesn't appear to help (Evidentally, I'm not +adding them correctly.) + +How to model memory? Specifically, how to model copy_from_user() and +accesses to buffer memory? I'll create address, data, and read/write ports +for each memory space, memory access functions that toggle these ports, +and finally a replacement for copy_from_user(). + +Pointers seem to be broken (BC gives the inscrutable + + Error: Width mismatch on port 'n5[1]' of reference to 'group1' in + 'lp_write_buf.db:loop_117_design'. (LINK-3) + +so I'll use a pchar_t type as a replacement. + +The const declarations don't work now with typedef unsigned int pchar_t, so +I removed them. + +Was getting "unschedulable" errors until I inserted a few wait() statements. +(Very unhelpful diagnostics.) + +Inserting and removing wait()s at will seems to help, but I'm still getting +width mismatch errors. + +The width mismatch errors are due to a SystemC compiler bug. Adding +-Xgroup_idx_logic=0 to the command line eliminates them. + +Many "mismatched clock" statements appear to be due to the use of nested +return stataments. BC doesn't support exits from any more than a single +level of loop nesting, so whatever hack the SystemC people did is not solid. + +if statements with a return in one branch seems to cause unsolvable wait +balance problems. I'll rewrite many of them to put the code in the "else" +branch. + +For if-then with a return within a loop, I appear to need to add an error +flag and checks for it. + +Doing this makes the system schedulable, but even these few lines of code +turn into over 1 MB of .db file, take 300MB of core and ten minutes to run. +This corresponds to roughly 140 lines of C code: four conditionals, two +nested loops, and one function call. + +***********************************************************************/ + +typedef unsigned int pchar_t; + +/********************************************************************** + +SystemC-specific things + +**********************************************************************/ + +#include "systemc.h" + +SC_MODULE(lp_write_buf) { + sc_in_clk clk; + sc_in reset; + sc_in minor; + sc_in buf; /* a pointer */ + sc_in count; + + sc_out result; /* return code */ + sc_out result_ready; /* return flag */ + + sc_out control; /* printer control port */ + + sc_inout user_addr; /* user memory address */ + sc_in user_read_data; /* user data value */ + sc_out user_read; /* user memory read flag */ + + sc_out kernel_addr; /* kernel memory address */ + sc_in kernel_read_data; /* kernel data value */ + sc_out kernel_write_data; /* kernel data value */ + sc_out kernel_read; + sc_out kernel_write; + + sc_out invalid_read; /* debugging flag: should never be true */ + + void lp_write_buf_body(); + int lp_write_buf_f(unsigned int minor, pchar_t buf, int count); + + /* User and kernel memory operations */ + char read_from_user(unsigned a); + char read_from_kernel(unsigned a); + void write_to_kernel(unsigned a, char d); + + int copy_from_user(pchar_t, pchar_t, unsigned long); + + /* Output verification */ + void check_read_address(); + + SC_CTOR(lp_write_buf) + { + SC_CTHREAD(lp_write_buf_body, clk.pos()); + reset_signal_is(reset,true); + SC_CTHREAD(check_read_address, clk.pos()); + reset_signal_is(reset,true); + } +}; + +void lp_write_buf::check_read_address() +{ + /* This causes the systemC compiler a fatal internal error */ + for (;;) { + invalid_read = user_addr < buf || user_addr >= buf + count; + wait(); + } +} + + +void lp_write_buf::lp_write_buf_body() +{ + unsigned dummy; /* These three statements compensate for BC weirdness */ + dummy = 0; + wait(); + for (;;) { + result = 0; result_ready = 0; + unsigned res = lp_write_buf_f(minor, buf, count); + result = (int) res; result_ready = 1; + wait(); + result_ready = 0; + wait(); + } +} + +char lp_write_buf::read_from_user(unsigned a) +{ + char d; + user_addr = a; + user_read = 1; + wait(); + d = user_read_data; + user_read = 0; + wait(); + return d; +} + +char lp_write_buf::read_from_kernel(unsigned a) +{ + char d; + kernel_addr = a; + kernel_read = 1; + wait(); + d = kernel_read_data; + kernel_read = 0; + wait(); + return d; +} + +void lp_write_buf::write_to_kernel(unsigned a, char d) +{ + kernel_addr = a; + kernel_write_data = d; + kernel_write = 1; + wait(); + kernel_write = 0; + wait(); +} + +int lp_write_buf::copy_from_user(pchar_t src, pchar_t dest, + unsigned long count) +{ + for ( ; count > 0 ; count--) + write_to_kernel(dest++, read_from_user(src++)); + /* What about an error? */ + return 0; +} + +/******************************************************************** + "Normal" C begins here + ********************************************************************/ + +#define ENXIO 6 /* No such device or address */ +#define EFAULT 14 /* Bad address */ + +// #define NULL 0 + +#define LP_PINTEN 0x10 /* high to read data in or-ed with data out */ +#define LP_PSELECP 0x08 /* inverted output, active low */ +#define LP_PINITP 0x04 /* unchanged output, active low */ +#define LP_PAUTOLF 0x02 /* inverted output, active low */ +#define LP_PSTROBE 0x01 /* short high output on raising edge */ + +/* #define LP_POLLED(minor) (lp_table[(minor)].dev->port->irq == PARPORT_IRQ_NONE) */ +#define LP_POLLED(minor) 1 + +#define w_ctr(dev,val) (control = (val)) + +#define LP_NO 3 +#define LP_BUFFER_SIZE 32 + +struct lp_struct { + /* struct pardevice *dev; */ + pchar_t dev; + unsigned long flags; + unsigned int chars; + unsigned int time; + /* unsigned int wait; */ + pchar_t lp_buffer; + /* struct wait_queue *wait_q; */ + unsigned int last_error; + volatile unsigned int irq_detected:1; + volatile unsigned int irq_missed:1; +}; + +/* Write count bytes starting at buf in user space to the parallel port + defined by the minor device number */ + +int lp_write_buf::lp_write_buf_f(unsigned int minor, + pchar_t buf, int count) +{ + int err; + struct lp_struct lp_table[LP_NO]; + + /* Added to fake a device */ + lp_table[minor].dev = 5; + + unsigned long copy_size; + unsigned long total_bytes_written = 0; + unsigned long bytes_written; + /* Removed because pointers are prohibited */ + /* struct lp_struct *lp = &lp_table[minor]; */ + + if (minor >= LP_NO) { + wait(); + return -ENXIO; + } else { + + /* if (lp->dev == NULL) */ /* Removed because of a pointer */ + /* The following causes a BC error (bad matching width of n15[1]) */ + if (lp_table[minor].dev == 0) { + wait(); + return -ENXIO; + } else { + + lp_table[minor].last_error = 0; + lp_table[minor].irq_detected = 0; + lp_table[minor].irq_missed = 1; + + if (LP_POLLED(minor)) + w_ctr(minor, LP_PSELECP | LP_PINITP); + else + w_ctr(minor, LP_PSELECP | LP_PINITP | LP_PINTEN); + + err = 0; + wait(); + do { + wait(); + bytes_written = 0; + copy_size = (count <= LP_BUFFER_SIZE ? count : LP_BUFFER_SIZE); + + + /* Adding this gives width mismatch errors */ + if (copy_from_user(lp_table[minor].lp_buffer, buf, copy_size)) { + wait(); + w_ctr(minor, LP_PSELECP | LP_PINITP); + // return -EFAULT; + err = -EFAULT; + } else { + + /** Fake! **/ + bytes_written = copy_size; + +#if 0 + + while (copy_size) { + if (lp_char(lp->lp_buffer[bytes_written], minor)) { + --copy_size; + ++bytes_written; + } else { + int rc = total_bytes_written + bytes_written; + + + if (signal_pending(current)) + { + w_ctr(minor, LP_PSELECP | LP_PINITP); + if (total_bytes_written + bytes_written) + return total_bytes_written + bytes_written; + else + return -EINTR; + } + + if (lp_check_status(minor)) + { + w_ctr(minor, LP_PSELECP | LP_PINITP); + return rc ? rc : -EIO; + } + + if (LP_POLLED(minor) || + lp_table[minor].irq_missed) + { + lp_polling: + current->state = TASK_INTERRUPTIBLE; + lp_schedule(minor, LP_TIME(minor)); + } else { + cli(); + if (LP_PREEMPTED(minor)) + { + /* + * We can' t sleep on the interrupt + * since another pardevice need the port. + * We must check this in a cli() protected + * envinroment to avoid parport sharing + * starvation. + */ + sti(); + goto lp_polling; + } + if (!lp_table[minor].irq_detected) + interruptible_sleep_on_timeout(&lp->wait_q, LP_TIMEOUT_INTERRUPT); + sti(); + } + } + } + +#endif + + total_bytes_written += bytes_written; + buf += bytes_written; + count -= bytes_written; + + wait(); + } + + } while (count > 0 && err >= 0); + + wait(); + + if (err >= 0 ) { + + w_ctr(minor, LP_PSELECP | LP_PINITP); + return total_bytes_written; + } else { + return err; + } + + } + } +} + diff --git a/src/systemc/tests/systemc/misc/stars/star110668/COMPILE b/src/systemc/tests/systemc/misc/stars/star110668/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star110668/star110668.cpp b/src/systemc/tests/systemc/misc/stars/star110668/star110668.cpp new file mode 100644 index 000000000..eeecd640b --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star110668/star110668.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star110668.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +typedef struct tstruct { + sc_int<16> val1; + sc_int<16> val2; +} dummy_struct; +SC_MODULE(design) { + sc_in_clk clock; + sc_in > input; + sc_out > output; + void write_in_fifo(); + SC_CTOR(design) { + SC_CTHREAD(write_in_fifo, clock.pos() ); + } +}; +void design :: write_in_fifo() { + sc_int<8> data_in; + dummy_struct foofoo; + write_loop: while (1) { + data_in = input.read(); + foofoo.val1.range(0,7) = data_in; + output.write(foofoo.val2.range(8,15)); + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/stars/star110672/COMPILE b/src/systemc/tests/systemc/misc/stars/star110672/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star110672/def.h b/src/systemc/tests/systemc/misc/stars/star110672/def.h new file mode 100644 index 000000000..adddd4e50 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star110672/def.h @@ -0,0 +1,40 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + def.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define RING_BUFFER_SIZE 16 +#define INDEX_TYPE sc_uint<5> +#define DATA_TYPE sc_int<8> diff --git a/src/systemc/tests/systemc/misc/stars/star110672/design.h b/src/systemc/tests/systemc/misc/stars/star110672/design.h new file mode 100644 index 000000000..7fc20e826 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star110672/design.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + design.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +SC_MODULE(design) { + // ports + sc_in_clk clock; + sc_in take_the_data; + sc_in data_request; + sc_out data_ready; + sc_out write_in_is_done; + sc_in input; + sc_out output; + sc_signal ring_buffer[RING_BUFFER_SIZE]; + sc_signal read_pointer; + sc_signal write_pointer; + // processes + void write_in_fifo(); + void read_out_fifo(); + SC_CTOR(design) { + SC_CTHREAD(write_in_fifo, clock.pos() ); + SC_CTHREAD(read_out_fifo, clock.pos() ); + // bad reset + write_pointer = (INDEX_TYPE)0 ; + read_pointer = (INDEX_TYPE)0 ; + } + +}; diff --git a/src/systemc/tests/systemc/misc/stars/star110672/star110672.cpp b/src/systemc/tests/systemc/misc/stars/star110672/star110672.cpp new file mode 100644 index 000000000..f894ed0bd --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star110672/star110672.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Please compile the program below with SC5.0. The output of the program is: + +sc_bit(1).to_char() = ` + +where the last char in the line is a caro in my shell. It should be + +sc_bit(1).to_char() = 1 +*/ + + +#include + +int sc_main(int argc, char* arg[]) +{ + sc_bit dummy; // to force the deprecation message to come out first + // instead of in the middle of the next message + cout << "sc_bit(1).to_char() = " << sc_bit(1).to_char() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star110998/COMPILE b/src/systemc/tests/systemc/misc/stars/star110998/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star110998/star110998.cpp b/src/systemc/tests/systemc/misc/stars/star110998/star110998.cpp new file mode 100644 index 000000000..ba2e25f22 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star110998/star110998.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star110998.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +#include "systemc.h" +#include "test1.h" +#define SCAN_INTERVAL 200000 // 200 us +#define NS *1e-9 + + +void io_controller_m::control_write() +{ + sc_uint<32> word_cnt; + wait(); + + while(true) + { + wait(unsigned ((SCAN_INTERVAL NS)/40e-9)); + wait(); + + } +} + diff --git a/src/systemc/tests/systemc/misc/stars/star110998/test1.h b/src/systemc/tests/systemc/misc/stars/star110998/test1.h new file mode 100644 index 000000000..e97a607b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star110998/test1.h @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE(io_controller_m){ + + /* ports */ + sc_in_clk clk_i486_if; + + sc_out > addr30_o; + sc_inout > data32_i; + sc_out > data32_o; + sc_out ads_n_o; + sc_out wr_n_o; + sc_in rdy_n_i; + sc_in ar_i; + sc_in res_n_i; + + sc_out > mii_data4_o; + sc_out mii_en_o; + sc_in > mii_data4_i; + sc_in mii_en_i; + sc_in mii_coll_det; + sc_in_clk clk_mii; + + /* signals */ + sc_signal > mux_data32; + sc_signal > in_fifo_data32; + sc_signal > out_fifo_data32; + sc_signal > control_data32; + sc_signal out_fifo_en; + sc_signal out_fifo_act; + sc_signal in_fifo_en; + sc_signal control_en; + sc_signal out_fifo_reset; + + /* variables */ + sc_uint<32> addr_tx_frame_ptr; + sc_uint<32> rx_ptr_array; + sc_signal value; + + SC_CTOR(io_controller_m) + { + + SC_CTHREAD(control_write, clk_i486_if.pos()); + + } + void control_write(); + +}; diff --git a/src/systemc/tests/systemc/misc/stars/star111004/COMPILE b/src/systemc/tests/systemc/misc/stars/star111004/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star111004/io_controller.h b/src/systemc/tests/systemc/misc/stars/star111004/io_controller.h new file mode 100644 index 000000000..a63274904 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star111004/io_controller.h @@ -0,0 +1,191 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + io_controller.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/*############################################################################ +# Siemens AG copyright 2000 +# All Rights Reserved +# +# File name : io_controller.h +# +# Title : I/O-Controller +# +# Purpose : definitions for I/O-Controller-module +# +# Author : Hannes Muhr +# PSE EZE MSA +# +############################################################################## +# Modification History : +# +# +##############################################################################*/ + +#ifndef IO_CONTROLLER_INC +#define IO_CONTROLLER_INC + +#ifdef LOGGING +#include +#endif +#include "systemc.h" +//#include "mii_if.h" +//#include "mbdatm.h" + +// class semaphore { + +// bool value; + +// public: +// semaphore(); +// void P(); +// void V(); +// bool get_value(); +// }; + +//void sc_trace(sc_trace_file *, const semaphore&, const std::string&); + +#ifdef LOGGING +/* stream for logging */ +extern ofstream flog; +#endif + +#define MII_FIFO_SIZE 400 +#define SCAN_INTERVAL 200000 // 200 us +#define NS *1e-9 + +SC_MODULE(io_controller_m){ + + /* ports */ + sc_in_clk clk_i486_if; + + sc_out > addr30_o; + sc_inout > data32_i; + sc_out > data32_o; + sc_out ads_n_o; + sc_out wr_n_o; + sc_in rdy_n_i; + sc_in ar_i; + sc_in res_n_i; + + sc_out > mii_data4_o; + sc_out mii_en_o; + sc_in > mii_data4_i; + sc_in mii_en_i; + sc_in mii_coll_det; + sc_in_clk clk_mii; + + /* signals */ + sc_signal > mux_data32; + sc_signal > in_fifo_data32; + sc_signal > out_fifo_data32; + sc_signal > control_data32; + sc_signal out_fifo_en; + sc_signal out_fifo_act; + sc_signal in_fifo_en; + sc_signal control_en; + sc_signal out_fifo_reset; + + /* variables */ + sc_uint<32> addr_tx_frame_ptr; + sc_uint<32> rx_ptr_array; + sc_signal value; + + void P(); + void V(); + bool get_value(); + // semaphore sem; + + /* modules */ +// mux_m *mux; +// shifter_m *shifter; +// out_fifo_m *out_fifo; +// in_fifo_m *in_fifo; + + SC_CTOR(io_controller_m){ + + SC_CTHREAD(control_read, clk_i486_if.pos()); + +// mux = new mux_m("mux"); +// mux->clk(clk_mii); +// mux->data4_o(mii_data4_o); +// mux->data32_i(mux_data32); +// mux->en_i(out_fifo_act); +// mux->en_o(mii_en_o); + +// shifter = new shifter_m("shifter"); +// shifter->clk(clk_mii); +// shifter->data32_o(in_fifo_data32); +// shifter->data4_i(mii_data4_i); +// shifter->en_i(mii_en_i); +// shifter->en_o(in_fifo_en); + +// out_fifo = new out_fifo_m("out_fifo"); +// out_fifo->clk_out(clk_mii); +// out_fifo->clk_in(clk_i486_if); +// out_fifo->data32_o(mux_data32); +// out_fifo->data32_i(out_fifo_data32); +// out_fifo->en_i(out_fifo_en); +// out_fifo->act_o(out_fifo_act); +// out_fifo->reset(out_fifo_reset); + +// in_fifo = new in_fifo_m("in_fifo"); +// in_fifo->clk_out(clk_i486_if); +// in_fifo->clk_in(clk_mii); +// in_fifo->data32_o(control_data32); +// in_fifo->data32_i(in_fifo_data32); +// in_fifo->en_i(in_fifo_en); +// in_fifo->en_o(control_en); + +// /* Initialize */ +// in_fifo_data32 = (sc_uint<32>) 0; +// mux_data32 = (sc_uint<32>) 0; +// out_fifo_en = 0; +// out_fifo_act = 0; +// //en_o = 0; +// in_fifo_en = 0; +// control_en = 0; +// out_fifo_reset = 0; + + } + void control_write(); + void control_read(); + sc_uint<32> read_from_memory(sc_uint<32>); + void write_into_memory(sc_uint<32>, sc_uint<32>); + +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/stars/star111004/star111004.cpp b/src/systemc/tests/systemc/misc/stars/star111004/star111004.cpp new file mode 100644 index 000000000..152c050d3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star111004/star111004.cpp @@ -0,0 +1,269 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star111004.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/*############################################################################ +# Siemens AG copyright 2000 +# All Rights Reserved +# +# File name : io_controller.cpp +# +# Title : I/O-Controller +# +# Purpose : functionality for I/O-Controller-module +# +# Author : Hannes Muhr +# PSE EZE MSA +# +############################################################################## +# Modification History : +# +# +##############################################################################*/ + +#include "systemc.h" +#include "io_controller.h" + +#define MII_FRAME_SIZE 400 + +// ::semaphore(){ + +// value = false; +// } + +void io_controller_m::P(){ + + while (value) wait(); + value = true; +} + +void io_controller_m::V(){ + + /*if (!value) { + cerr << "V-operation on semaphore that is not P'd\n"; + exit(-1); + }*/ + value = false; +} + +bool io_controller_m::get_value(){ + + return value; +} + +/*void sc_trace(sc_trace_file *tf, const semaphore& sem, const std::string& str){ + + sc_trace(tf, sem.get_value(), str); +}*/ + +sc_uint<32> io_controller_m::read_from_memory(sc_uint<32> mp){ + + // read from mbdatm-memory over i486-IF + + addr30_o = mp >> 2; + ads_n_o = 0; + wr_n_o = 0; + wait(); + ads_n_o = 1; + do { wait(); } while (rdy_n_i == 1); + sc_uint<32> data = data32_i.read(); + wr_n_o = 1; + addr30_o = 0; + return data; +} + +void io_controller_m::write_into_memory(sc_uint<32> mp, sc_uint<32> data){ + + addr30_o = mp >> 2; + ads_n_o = 0; + wr_n_o = 1; + wait(); + ads_n_o = 1; + data32_o = data; + do { wait(); } while (rdy_n_i == 1); + wr_n_o = 1; + addr30_o = 0; + data32_o = 0; +} + +void io_controller_m::control_write(){ + sc_uint<32> word_cnt; + + if (!res_n_i.read()){ + do { wait(); } while (!res_n_i); + + // initialize + + // wait for 1. AR (HWS-Daten) + do { wait(); } while (!ar_i); + sc_uint<32> hws = data32_i.read(); + + wait(); + + // wait for 2. AR (ACB-Pointer) + do { wait(); } while (!ar_i); + addr_tx_frame_ptr = data32_i.read(); + + } + /* else if (mii_coll_det){ + out_fifo_reset = 1; + out_fifo_en = 0; + out_fifo_data32 = (sc_uint<32>) 0; + + // reset i486-IF + addr30_o = 0; + data32_io = 0; + ads_n_o = 1; + wr_n_o = 1; + + // release Semaphore if it is set + sem.V(); + + wait(); + out_fifo_reset = 0; + }*/ + + while(true){ + // normally Attention Request - Signal from MBDATM + // would wake up IO-Controller to read data from the memory, + // but the model from Hr. Wahl said: wait for some ms !!! + + // wait(unsigned ((SCAN_INTERVAL NS)/40e-9)); + //do { wait(); } while (ar_i); + + #ifdef LOGGING + flog << sc_time_stamp()<<": "< tx_frame_ptr = read_from_memory(addr_tx_frame_ptr); + if (tx_frame_ptr != 0) + word_cnt = read_from_memory(tx_frame_ptr+(MII_FIFO_SIZE+1)*4); + V(); + + // check, if frame available and frame is full (word_cnt == MII_FRAME_SIZE) + + while (tx_frame_ptr != 0 && word_cnt == MII_FRAME_SIZE){ + #ifdef LOGGING + flog << sc_time_stamp()<<": "< data = read_from_memory(tx_frame_ptr+i*4); + V(); + + out_fifo_en = 1; + out_fifo_data32 = data; + wait(); + out_fifo_en = 0; + + } + + while (out_fifo_act.read() != 0) wait(2); + + // write 0xFFFFFFFF (>MII_FRAME_SIZE) into tx_frame_ptr + // to signal software in mbdatm that io-controller has + // read out the frames and sent successfully + P(); + write_into_memory(tx_frame_ptr+(MII_FIFO_SIZE+1)*4, 0xFFFFFFFF); + V(); + + // read next frame_pointer and word_cnt from MBDATM + P(); + tx_frame_ptr = read_from_memory(tx_frame_ptr+MII_FIFO_SIZE*4); + if (tx_frame_ptr != 0) + word_cnt = read_from_memory(tx_frame_ptr+(MII_FIFO_SIZE+1)*4); + V(); + + + } + + } +} + +void io_controller_m::control_read(){ + + int arr_ptr = 0; + + while (true){ + do { wait(); } while (!control_en); + #ifdef LOGGING + flog << sc_time_stamp()<<": "< rx_frame_ptr = read_from_memory(rx_ptr_array+arr_ptr*4); + V(); + /*if (rx_frame_ptr == 0){ + cerr << "\nIO-Controller has read NULL-ptr from rx_array in MBDATM\n"; + cerr << "MBDATM did not fill rx_array fast enough\n"; + exit(-1); + }*/ + if (++arr_ptr == MII_FIFO_SIZE) + arr_ptr = 0; + + // write data from in_fifo into MBDATM-memory + for (int i = 0; i < MII_FIFO_SIZE-1; i++){ + sc_uint<32> d = control_data32.read(); + // grab the semaphore + P(); + write_into_memory(rx_frame_ptr + i*4, d); + // release semaphore + V(); + do { wait(); } while (!control_en); + + } + // separate last loop because we don't want to wait for + // another control_en at this time + sc_uint<32> d = control_data32.read(); + P(); + write_into_memory(rx_frame_ptr + (MII_FIFO_SIZE-1)*4, d); + V(); + + // write 0xFFFFFFFF into word_cnt from frame + // to indicate the software (MBDATM) that frame has been filled + P(); + write_into_memory(rx_frame_ptr + (MII_FIFO_SIZE+1)*4, 0xFFFFFFFF); + V(); + } +} + diff --git a/src/systemc/tests/systemc/misc/stars/star111657/COMPILE b/src/systemc/tests/systemc/misc/stars/star111657/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/stars/star111657/io_controller1.h b/src/systemc/tests/systemc/misc/stars/star111657/io_controller1.h new file mode 100644 index 000000000..5d5f311df --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star111657/io_controller1.h @@ -0,0 +1,151 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + io_controller1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +############################################################################ +# Siemens AG copyright 2000 +# All Rights Reserved +# +# File name : io_controller.h +# +# Title : I/O-Controller +# +# Purpose : definitions for I/O-Controller-module +# +# Author : Hannes Muhr +# PSE EZE MSA +# +############################################################################## +# Modification History : +# +# +##############################################################################*/ + +#ifndef IO_CONTROLLER_INC +#define IO_CONTROLLER_INC + +#ifdef LOGGING +#include +#endif +#include "systemc.h" + + +#ifdef LOGGING +/* stream for logging */ +extern ofstream flog; +#endif + +#define SCAN_INTERVAL 200000 // 200 us +#define NS *1e-9 + +#define MII_FRAME_SIZE 400 + +SC_MODULE(io_controller_m){ + + /* ports */ + sc_in_clk clk_i486_if; + + sc_out > addr30_o1; + sc_out > addr30_o2; + sc_inout > data32_i; + sc_out > data32_o1; + sc_out > data32_o2; + sc_out ads_n_o1; + sc_out ads_n_o2; + sc_out wr_n_o1; + sc_out wr_n_o2; + sc_in rdy_n_i; + sc_in ar_i; + sc_in res_n_i; + + sc_out > mii_data4_o; + sc_out mii_en_o; + sc_in > mii_data4_i; + sc_in mii_en_i; + sc_in mii_coll_det; + sc_in_clk clk_mii; + + /* signals */ + sc_signal start_mux; + sc_signal ready_mux; + sc_signal start_read; + sc_signal out_fifo_reset; + + /* variables */ + sc_uint<32> addr_tx_frame_ptr; + sc_uint<32> rx_ptr_array; + sc_signal sem1; // mutual exclusion for i486-if + sc_signal sem2; // mutual exclusion for i486-if + sc_uint<32> shared_mem1[MII_FRAME_SIZE]; // for write + sc_uint<32> shared_mem2[MII_FRAME_SIZE]; // for read + + SC_CTOR(io_controller_m){ + + SC_CTHREAD(control_write, clk_i486_if.pos()); + //reset_signal_is(mii_coll_det, true); + reset_signal_is(res_n_i, false); + + SC_CTHREAD(control_read, clk_i486_if.pos()); + + SC_CTHREAD(mux, clk_mii.pos()); + SC_CTHREAD(shift, clk_mii.pos()); + + + /* Initialize */ + start_mux = 0; + ready_mux = 0; + start_read = 0; + out_fifo_reset = 0; + + sem1 = false; + sem2 = false; + // init shared memory + for (int i=0; i < MII_FRAME_SIZE; i++) + shared_mem1[i] = shared_mem2[i] = 0; + } + void control_write(); + void control_read(); + void mux(); + void shift(); + sc_uint<32> read_from_memory0(sc_uint<32>); + sc_uint<32> read_from_memory1(sc_uint<32>); + void write_into_memory0(sc_uint<32>, sc_uint<32>); + void write_into_memory1(sc_uint<32>, sc_uint<32>); + +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/stars/star111657/star111657.cpp b/src/systemc/tests/systemc/misc/stars/star111657/star111657.cpp new file mode 100644 index 000000000..5bcbaa724 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star111657/star111657.cpp @@ -0,0 +1,324 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + star111657.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/*############################################################################ +# Siemens AG copyright 2000 +# All Rights Reserved +# +# File name : io_controller.cpp +# +# Title : I/O-Controller +# +# Purpose : functionality for I/O-Controller-module +# +# Author : Hannes Muhr +# PSE EZE MSA +# +############################################################################## +# Modification History : +# +# +##############################################################################*/ + +#include "systemc.h" +#include "io_controller1.h" + + +void io_controller_m::mux(){ + + sc_uint<32> data; + + while (true){ + while (start_mux.read() == 0) wait(); + #ifdef LOGGING + flog << sc_time_stamp()<<": "< data; + + while (true){ + while (mii_en_i.read() == false) wait(); + #ifdef LOGGING + flog << sc_time_stamp()<<": "< io_controller_m::read_from_memory0(sc_uint<32> mp){ + + // read from mbdatm-memory over i486-IF + + addr30_o1 = mp >> 2; + ads_n_o1 = 0; + wr_n_o1 = 0; + wait(); + ads_n_o1 = 1; + while (rdy_n_i.read() == 1) wait(); + sc_uint<32> data = data32_i.read(); + wr_n_o1 = 1; + addr30_o1 = 0; + return data; +} + +sc_uint<32> io_controller_m::read_from_memory1(sc_uint<32> mp){ + + // read from mbdatm-memory over i486-IF + + addr30_o2 = mp >> 2; + ads_n_o2 = 0; + wr_n_o2 = 0; + wait(); + ads_n_o2 = 1; + while (rdy_n_i.read() == 1) wait(); + sc_uint<32> data = data32_i.read(); + wr_n_o2 = 1; + addr30_o2 = 0; + return data; +} + +void io_controller_m::write_into_memory0(sc_uint<32> mp, sc_uint<32> data){ + + addr30_o1 = mp >> 2; + ads_n_o1 = 0; + wr_n_o1 = 1; + wait(); + ads_n_o1 = 1; + data32_o1 = data; + while (rdy_n_i.read() == 1) wait(); + wr_n_o1 = 1; + addr30_o1 = 0; + data32_o1 = 0; +} + +void io_controller_m::write_into_memory1(sc_uint<32> mp, sc_uint<32> data){ + + addr30_o2 = mp >> 2; + ads_n_o2 = 0; + wr_n_o2 = 1; + wait(); + ads_n_o2 = 1; + data32_o2 = data; + while (rdy_n_i.read() == 1) wait(); + wr_n_o2 = 1; + addr30_o2 = 0; + data32_o2 = 0; +} + +void io_controller_m::control_write(){ + sc_uint<32> word_cnt; + + while (res_n_i.read() == 0) wait(); + + // initialize + + // wait for 1. AR (HWS-Daten) + while (ar_i.read() == 0) wait(); + sc_uint<32> hws = data32_i.read(); + + wait(); + + // wait for 2. AR (ACB-Pointer) + while (ar_i.read() == 0) wait(); + addr_tx_frame_ptr = data32_i.read(); + wait(); + + + while(true){ + // normally Attention Request - Signal from MBDATM + // would wake up IO-Controller to read data from the memory, + // but the model from Hr. Wahl said: wait for some ms !!! + + wait(1000); + + #ifdef LOGGING + flog << sc_time_stamp()<<": "< tx_frame_ptr = read_from_memory0(addr_tx_frame_ptr); + if (tx_frame_ptr != 0) + word_cnt = read_from_memory0(tx_frame_ptr+(MII_FRAME_SIZE+1)*4); + sem2 = false; // V-operation + + // check, if frame available and frame is full (word_cnt == MII_FRAME_SIZE) + + while (tx_frame_ptr != 0 && word_cnt == MII_FRAME_SIZE){ + #ifdef LOGGING + flog << sc_time_stamp()<<": "< data = read_from_memory0(tx_frame_ptr+i*4); + sem2 = false; // V-operation + + if (i == 0){ + start_mux = 1; + shared_mem1[i] = data; + wait(); + start_mux = 0; + } + else { + shared_mem1[i] = data; + wait(); + } + // wait(); ?? + } + + while (ready_mux.read() == 0) wait(); + + // write 0xFFFFFFFF (>MII_FRAME_SIZE) into tx_frame_ptr + // to signal software in mbdatm that io-controller has + // read out the frames and sent successfully + while (sem2) wait(); sem2 = true; // P-operation + write_into_memory0(tx_frame_ptr+(MII_FRAME_SIZE+1)*4, 0xFFFFFFFF); + sem2 = false; // V-operation + + // read next frame_pointer and word_cnt from MBDATM + while (sem2) wait(); sem2 = true; // P-operation + tx_frame_ptr = read_from_memory0(tx_frame_ptr+MII_FRAME_SIZE*4); + if (tx_frame_ptr != 0) + word_cnt = read_from_memory0(tx_frame_ptr+(MII_FRAME_SIZE+1)*4); + sem2 = false; // V-operation + + + } + + } +} + +void io_controller_m::control_read(){ + + int arr_ptr = 0; + + while (true){ + while (start_read.read() == 0) wait(); + #ifdef LOGGING + flog << sc_time_stamp()<<": "< rx_frame_ptr = read_from_memory1(rx_ptr_array+arr_ptr*4); + sem1 = false; // V-operation + /*if (rx_frame_ptr == 0){ + cerr << "\nIO-Controller has read NULL-ptr from rx_array in MBDATM\n"; + cerr << "MBDATM did not fill rx_array fast enough\n"; + exit(-1); + }*/ + if (++arr_ptr == MII_FRAME_SIZE) + arr_ptr = 0; + + // write data from in_fifo into MBDATM-memory + for (int i = 0; i < MII_FRAME_SIZE; i++){ + sc_uint<32> d = shared_mem2[i]; + // grab the semaphore + while (sem1) wait(); sem1 = true; // P-operation + write_into_memory1(rx_frame_ptr + i*4, d); + // release semaphore + sem1 = false; // V-operation + wait(); + + } + + // write 0xFFFFFFFF into word_cnt from frame + // to indicate the software (MBDATM) that frame has been filled + while (sem1) wait(); sem1 = true; // P-operation + write_into_memory1(rx_frame_ptr + (MII_FRAME_SIZE+1)*4, 0xFFFFFFFF); + sem1 = false; // V-operation + } +} + diff --git a/src/systemc/tests/systemc/misc/stars/star113320/golden/test.log b/src/systemc/tests/systemc/misc/stars/star113320/golden/test.log new file mode 100644 index 000000000..a3730887a --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113320/golden/test.log @@ -0,0 +1,4 @@ +SystemC Simulation +a=10 +b=0000001010 +c=10 diff --git a/src/systemc/tests/systemc/misc/stars/star113320/test.cpp b/src/systemc/tests/systemc/misc/stars/star113320/test.cpp new file mode 100644 index 000000000..6688626bd --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113320/test.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Ulli Holtmann, Nov/10/00 + +I would like to convert between sc_int and sc_bv like in this example: +*/ + +#include "systemc.h" + +int sc_main(int argc, char* arg[]) +{ + sc_int<10> a; + sc_bv<10> b; + sc_int<7> c; + + a=10; cout << "a="<< a << "\n"; + b=a; cout << "b="<< b << "\n"; + c=b; cout << "c="<< c << "\n"; + + return 0; +} + +/* +This doesn't work on with either SC5.0 or g++ for different reasons. + +SC 5.0 +------------------------------------ +compile error at assignment "c=b" == sc_int<7> = sc_bv<10> : + +"/view/ccss_ulli/vobs/abc/src/scenic/scenery/include/sc_lv.h", line 165: Error: The function "convert" must have a prototype. +"str.cc", line 12: Where: While instantiating "sc_bv_ns::sc_lv<7>::sc_lv(const sc_bv_ns::sc_bv_base&)". +"str.cc", line 12: Where: Instantiated from non-template code. + +file sc_lv.h: +#if !defined(__SUNPRO_CC) + template sc_lv(const sc_proxy& y) + {init(y.back_cast().length()); assign_(y);} + template sc_lv& operator=(const sc_proxy& t) + { sc_bv_ns::assign_(*this,t); return *this;} +#else + // at least some constructors + sc_lv(const sc_bv& t){convert(t);verify_length();} + sc_lv(const sc_lv_base& y):sc_lv_base(y){verify_length();} + sc_lv(const sc_bv_base& t){convert(t);verify_length();} +#endif + +Apparently, the "convert" function is undeclared. + + +With gcc +------------------------------------ +compiles fine, but then Abort at assignment "b=a" == sc_bv<10> = sc_int<10> : + +a=10 +Abort (core dumped) + + + +I am using SystemC 1.0.1 (stellar does not yet have a 1.0.1 release entry). on +a Solaris 5.5.1 host with SC5.0 or g++ 2.95.2 +*/ + diff --git a/src/systemc/tests/systemc/misc/stars/star113321/golden/test.log b/src/systemc/tests/systemc/misc/stars/star113321/golden/test.log new file mode 100644 index 000000000..9a9b5d67a --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113321/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +0001110000 diff --git a/src/systemc/tests/systemc/misc/stars/star113321/test.cpp b/src/systemc/tests/systemc/misc/stars/star113321/test.cpp new file mode 100644 index 000000000..97171fe7a --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113321/test.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Nov/10/00 ulrich + +The SystemC 1.0 manual says that the bit-wise AND operator is supported for +class sc_bv like here: +*/ + +#include "systemc.h" + +int sc_main(int argc, char* arg[]) +{ + sc_bv<10> a = "01111111"; + sc_bv<10> b = "11110000"; + sc_bv<10> c = a & b; + cout << c << "\n"; + + return 0; +} + +/* +It does work fine with g++. +But SC5.0 gives this compile error: + + CC -pto -g -I. -I/view/ccss_ulli/vobs/abc/src/scenic/scenery/include -I. -I/view/ccss_ulli/vobs/abc/src/scenic/scenery/include -c str.cc + "str.cc", line 7: Error: Cannot use const sc_bv_ns::sc_bitwise_and + to initialize sc_bv_ns::sc_bv<10>. + + +I used SystemC 1.0.1 on a Solaris 5.5.1 machines with SC5.0 +*/ + diff --git a/src/systemc/tests/systemc/misc/stars/star113623/golden/test.log b/src/systemc/tests/systemc/misc/stars/star113623/golden/test.log new file mode 100644 index 000000000..fb1f2d102 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113623/golden/test.log @@ -0,0 +1,4 @@ +SystemC Simulation +0 +9 +9 diff --git a/src/systemc/tests/systemc/misc/stars/star113623/test.cpp b/src/systemc/tests/systemc/misc/stars/star113623/test.cpp new file mode 100644 index 000000000..40bfc3be9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113623/test.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +I have closed the star. The testcase I'm attaching shows that Cthreads +used to sample the inputs at the beginnig and therefor it took 2 +cycles to see the results back in sc_main. Hope you could take the +action to include it in the regression systemc, since I don't know +what system you guys are using. + +Thanks, +Rocco +*/ + +#include "systemc.h" + +SC_MODULE(adder_reg) { + sc_in > a; + sc_in > b; + sc_out > c; + //sc_in clk; + sc_in_clk clk; + +void add() { + // c.write(a.read() + b.read()); // *** THIS WON'T COMPILE *** + c = a.read() + b.read(); // Must use read() method + } + +SC_CTOR(adder_reg) { + SC_CTHREAD(add, clk.pos()); + } +}; + +int sc_main(int argc, char *argv[]) +{ + sc_signal< sc_int<8> > a; + sc_signal< sc_int<8> > b; + sc_signal< sc_int<9> > c; + sc_clock clk("CLK", 10, SC_NS, 0.5, 0.0, SC_NS); + adder_reg adder_reg("adder"); + adder_reg(a, b, c, clk); + a = 3; + b = 6; + cout << c.read().to_int() << endl; + sc_start(10, SC_NS); + cout << c.read().to_int() << endl; + sc_start(10, SC_NS); + + // CynAppsTwo clocks to get the answer. + // Rocco: No with SC_METHOD it take 1 cycle + cout << c.read().to_int() << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star113632/golden/test.log b/src/systemc/tests/systemc/misc/stars/star113632/golden/test.log new file mode 100644 index 000000000..5c32209e7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113632/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +0010 diff --git a/src/systemc/tests/systemc/misc/stars/star113632/test.cpp b/src/systemc/tests/systemc/misc/stars/star113632/test.cpp new file mode 100644 index 000000000..738805343 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113632/test.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Ulli Holtmann, Nov/17/00 + +with SystemC 1.0.1, on sparcOS5, SC5.0 compiler, I can't assign a sc_bv::range() bit-slice +to a sc_bv: +*/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_bv<4> bv4; + sc_bv<10> bv10 = 5; + + bv4 = bv10.range(4,1); + // g++: OK + // SC5.0: Error + // "str.cc", line 8: Error: Cannot assign + // sc_bv_ns::sc_range to + // sc_bv_ns::sc_bv<4> without + // "sc_bv_ns::sc_bv<4>::operator=(const sc_bv_ns::sc_bv<4>&)";. + cout << bv4 << endl; + + return 0; +} + +/* +It works fine with g++, though. +*/ diff --git a/src/systemc/tests/systemc/misc/stars/star113726/golden/test.log b/src/systemc/tests/systemc/misc/stars/star113726/golden/test.log new file mode 100644 index 000000000..50ab2778d --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113726/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation +-1 +0001 diff --git a/src/systemc/tests/systemc/misc/stars/star113726/test.cpp b/src/systemc/tests/systemc/misc/stars/star113726/test.cpp new file mode 100644 index 000000000..2acf62aba --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113726/test.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_int<4> a; + a = 127; + cout << a << endl; + + sc_bv<2> b = "01"; + sc_bv<4> c = "1010"; + + c = b; + cout << c << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star113946/golden/test.log b/src/systemc/tests/systemc/misc/stars/star113946/golden/test.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113946/golden/test.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/stars/star113946/test.cpp b/src/systemc/tests/systemc/misc/stars/star113946/test.cpp new file mode 100644 index 000000000..caf9047e8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113946/test.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + // Given two signals: + sc_signal > input, new_input; + + // I cannot do the following: + new_input.write(input); // Fails g++ + + // The others combinations work: + new_input = input; // works + new_input.write(input.read()); // works + new_input = input.read(); // works + + // It would be more consistant if all 4 worked. + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star113999/golden/test.log b/src/systemc/tests/systemc/misc/stars/star113999/golden/test.log new file mode 100644 index 000000000..77cf9f907 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113999/golden/test.log @@ -0,0 +1,17 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: sc_bit is deprecated, use bool instead +0 +1 +1 + +Error: (E204) value is not valid: sc_bit( 2 ) +In file: + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/misc/stars/star113999/test.cpp b/src/systemc/tests/systemc/misc/stars/star113999/test.cpp new file mode 100644 index 000000000..7c45c1508 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star113999/test.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Nov/29/00 Ulli Holtmann + +Assignment of values other than 0 or 1 to an sc_bit results in a core dump +on Sparc SC5.0 as well as g++. I used SystemC 1.0.1 + +I can understand that only 0 and 1 make sense, so please either forbid +assignment from an integer and cast the integer to bool first. A core dump is +a bit to drastic. + +Example: +*/ + +#include + +int sc_main(int argc, char* arg[]) +{ + sc_bit res; + + // works fine + res = 0; cout << res << "\n"; + res = 1; cout << res << "\n"; + res = bool(2); cout << res << "\n"; + + // results in a core dump + res = sc_bit(2); cout << res << "\n"; + res = 2; cout << res << "\n"; + + return 0; +} + + +/* +Dec/7/00 ulrich + +Hi Gene, + +I agree that the assignment of values other than 0,1 doesn't make much sense, so please go ahead +and forbid it in one way or another. However, such an illegal assignment may easily happen in a +user-program because the compiler accepts it. It very easy to write. + +The point I dislike is that the class library immediately core dumps without any warning or +explanation. Does SystemC throw an exception? I don't know and I most likely will not write +an exception handler, therefore I will never know. I just see that the SystemC kernel core +dumps. + +What about an assert statement such like + assert(v==0 || v==1); +That should me as the user a precise and reasonable explanation that I made a mistake. I could +also accept an error message like E200x or so coming like when I enter illlegal bit characters, +e.g. sc_bv<10>="102abd00". But please, not just a core dump. + + + +Jan/9/01 ulrich + +Hi Gene, I still only ask that the program does not core dump and instead prints an error +message or warning like it does for sc_logic. I only object to the core dump itself. Example: + + +int main(int argc, char* arg[]) +{ + sc_logic l (5); + cout << l << "\n"; + + sc_bit b(2); + cout << b << "\n"; +} + +Both are invalid assignments. The first one prompt a warning (1006), the second a core +dump. Both should prompt warnings/run time errors. + +I reduce the prioity to B2 because it's now only a matter of properly reporting an error. + +Other than +this, I can share your view that assigning 2 is a user error. +*/ diff --git a/src/systemc/tests/systemc/misc/stars/star114085/golden/test.log b/src/systemc/tests/systemc/misc/stars/star114085/golden/test.log new file mode 100644 index 000000000..ee5eb4490 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114085/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +0000000000000000000000000000000000000000000000000000000000011100 diff --git a/src/systemc/tests/systemc/misc/stars/star114085/test.cpp b/src/systemc/tests/systemc/misc/stars/star114085/test.cpp new file mode 100644 index 000000000..842b416b2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114085/test.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Dec/1/00 Ulli Holtmann + +The following program works fine with gcc on Solaris but does not compile with SC5.0: +*/ + +#include + +int sc_main(int argc, char* arg[]) +{ + sc_bv<64> bv = "0111"; + sc_bv<64> res; + + res = bv << 2; + + // gcc: OK + // SC5.0: Error: Cannot assign const + // sc_bv_ns::sc_shift_left to sc_bv_ns::sc_bv<64> + // without "sc_bv_ns::sc_bv<64>::operator=(const sc_bv_ns::sc_bv<64>&)";. + + cout << res.to_string() << "\n"; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star114104/golden/test.log b/src/systemc/tests/systemc/misc/stars/star114104/golden/test.log new file mode 100644 index 000000000..930acd999 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114104/golden/test.log @@ -0,0 +1,53 @@ +SystemC Simulation +0 s: 0 +0 s: negedge +3 ns: 1 +3 ns: posedge +6 ns: Z +9 ns: X +12 ns: 0 +12 ns: negedge +15 ns: 1 +15 ns: posedge +18 ns: Z +21 ns: X +24 ns: 0 +24 ns: negedge +27 ns: 1 +27 ns: posedge +30 ns: Z +33 ns: X +36 ns: 0 +36 ns: negedge +39 ns: 1 +39 ns: posedge +42 ns: Z +45 ns: X +48 ns: 0 +48 ns: negedge +51 ns: 1 +51 ns: posedge +54 ns: Z +57 ns: X +60 ns: 0 +60 ns: negedge +63 ns: 1 +63 ns: posedge +66 ns: Z +69 ns: X +72 ns: 0 +72 ns: negedge +75 ns: 1 +75 ns: posedge +78 ns: Z +81 ns: X +84 ns: 0 +84 ns: negedge +87 ns: 1 +87 ns: posedge +90 ns: Z +93 ns: X +96 ns: 0 +96 ns: negedge +99 ns: 1 +99 ns: posedge diff --git a/src/systemc/tests/systemc/misc/stars/star114104/test.cpp b/src/systemc/tests/systemc/misc/stars/star114104/test.cpp new file mode 100644 index 000000000..a9da5b8cc --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114104/test.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_signal posedge and negedge + +#include "systemc.h" + +SC_MODULE( pro ) +{ + sc_out out; + + void main_action() + { + int i = 0; + while( true ) { + sc_logic tmp( i ); + out.write( tmp ); + cout << sc_time_stamp() << ": " << tmp.to_char() << endl; + wait( 3, SC_NS ); + i = (i + 1) % 4; + } + } + + SC_CTOR( pro ) + { + SC_THREAD( main_action ); + } +}; + +SC_MODULE( con ) +{ + sc_in in; + + void pos_action() + { + cout << sc_time_stamp() << ": posedge" << endl; + } + + void neg_action() + { + cout << sc_time_stamp() << ": negedge" << endl; + } + + SC_CTOR( con ) + { + SC_METHOD( pos_action ); + sensitive << in.pos(); + dont_initialize(); + SC_METHOD( neg_action ); + sensitive << in.neg(); + dont_initialize(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_signal sig; + pro p( "p" ); + con c( "c" ); + p.out( sig ); + c.in( sig ); + sc_start( 100, SC_NS ); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star114203/golden/test.log b/src/systemc/tests/systemc/misc/stars/star114203/golden/test.log new file mode 100644 index 000000000..4cc6a08b9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114203/golden/test.log @@ -0,0 +1,4 @@ +SystemC Simulation +0000111100 +0b0000111100 +0b00000111100 diff --git a/src/systemc/tests/systemc/misc/stars/star114203/test.cpp b/src/systemc/tests/systemc/misc/stars/star114203/test.cpp new file mode 100644 index 000000000..eeecc1fc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114203/test.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Dec/5/00 ulrich + +The constructor of an sc_biguint with an sc_bv as an argument does not +compile. That happens with SystemC 1.0.1 on Solaris with both SC5.0 +and gcc. +*/ + +#include + +int sc_main(int argc, char* arg[]) +{ + sc_bv<10> bv10 = "0000111100"; + sc_bigint<10> bi10; + sc_biguint<10> bu10; + + // works fine + bi10 = sc_bigint<10> (bv10); + + // causes errors on g++, SC5.0 : + // g++ : + // .../include/numeric_bit/sc_biguint.h: + // In method `sc_biguint<10>::sc_biguint(const sc_bv_ns::sc_bv<10> &)': + // str.cc:10: instantiated from here + // .../include/numeric_bit/sc_biguint.h:186: type `sc_signed' + // is not a base type for type `sc_biguint<10>' + // .../include/numeric_bit/sc_unsigned.h:1365: + // `sc_unsigned::sc_unsigned()' is private + // .../include/numeric_bit/sc_biguint.h:186: within this context + // SC5.0: + // ".../include/numeric_bit/sc_biguint.h", line 186: + // Error: sc_signed is not a direct base class of sc_biguint<10>. + // ".../include/numeric_bit/sc_biguint.h", line 187: + // Error: sc_unsigned::sc_unsigned() is not accessible from . + + bu10 = sc_biguint<10>(bv10); + + + cout << bv10.to_string() << endl; + cout << bi10.to_string(SC_BIN) << endl; + cout << bu10.to_string(SC_BIN) << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star114477/design.h b/src/systemc/tests/systemc/misc/stars/star114477/design.h new file mode 100644 index 000000000..59b82d72c --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114477/design.h @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + design.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +struct fun:sc_module +{ + sc_in clk; + sc_in count; + sc_bv<9> x,y,z; + sc_out > out_a0, out_a1; + + SC_CTOR(fun) { + SC_METHOD(entry1); + sensitive << clk; + SC_METHOD(entry2); + sensitive << clk; +} + + void entry1(); + void entry2(); +}; + +void fun::entry1() +{ + z = 0; + z[0] = x[1]&y[2]; + z[0] = x[1]|y[2]; + z[0] = x[1]^y[2]; + out_a0 = z; + out_a1 = x; +} + + +void fun::entry2() +{ + if (count%3==0) { + x = 120; + y = 10; + } + else { + x = 44; + y = 5; + } +} diff --git a/src/systemc/tests/systemc/misc/stars/star114477/design_rtl.h b/src/systemc/tests/systemc/misc/stars/star114477/design_rtl.h new file mode 100644 index 000000000..fb88969c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114477/design_rtl.h @@ -0,0 +1,203 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + design_rtl.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +SC_MODULE(fun) { +public: + sc_in > clk; + sc_in > count; + sc_out > out_a0; + sc_out > out_a1; + SC_CTOR(fun) { + SC_METHOD(p1); + sensitive << count << out_a1; + }; +private: + + template sc_int int_conv_from_sc_uint_to_sc_int ( sc_uint + a) { + sc_int a_temp; + for (int i=0;i sc_bigint int_conv_from_sc_biguint_to_sc_bigint ( + sc_biguint a) { + sc_bigint a_temp; + for (int i=0;i sc_int int_conv_from_sc_uint_to_sc_int ( bool a) { + sc_int a_temp; + a_temp[0] = a; + return a_temp; + } + + + sc_uint<32> C18_B, C18_REMAINDER; + bool N73, N74, N75, N76, N77, N78, N79, N80, N81, N82, N83, N84, N85, + N86, N87, N88, N89, N90, N91, N92, N93, N94, N95, N96, N97, N98, + N99, N100, N101, N102, N103, N104, N105, N106, N107, N108, N109, + N110, N111, N112, N113, N114, N115, N116, N117, N118, N119, N120, + N121, N122, N123, N124, N125, N126, N127, N128, N129, N130, N131, + N132, N133, N134; + + void p1( ) { + out_a1[0].write( 0 ); + out_a1[1].write( 0 ); + out_a1[3].write( 1 ); + out_a1[5].write( 1 ); + out_a1[7].write( 0 ); + out_a1[8].write( 0 ); + out_a0[2].write( (0 ^ 1) ); + out_a0[5].write( (0 ^ 1) ); + C18_B[31] = 0 ; + C18_B[30] = 0 ; + C18_B[29] = 0 ; + C18_B[28] = 0 ; + C18_B[27] = 0 ; + C18_B[26] = 0 ; + C18_B[25] = 0 ; + C18_B[24] = 0 ; + C18_B[23] = 0 ; + C18_B[22] = 0 ; + C18_B[21] = 0 ; + C18_B[20] = 0 ; + C18_B[19] = 0 ; + C18_B[18] = 0 ; + C18_B[17] = 0 ; + C18_B[16] = 0 ; + C18_B[15] = 0 ; + C18_B[14] = 0 ; + C18_B[13] = 0 ; + C18_B[12] = 0 ; + C18_B[11] = 0 ; + C18_B[10] = 0 ; + C18_B[9] = 0 ; + C18_B[8] = 0 ; + C18_B[7] = 0 ; + C18_B[6] = 0 ; + C18_B[5] = 0 ; + C18_B[4] = 0 ; + C18_B[3] = 0 ; + C18_B[2] = 0 ; + C18_B[1] = 1 ; + C18_B[0] = 1 ; + + // REM_UNS_OP(A,B,REMAINDER) + REM_UNS_OP( count.read(), C18_B, C18_REMAINDER ); + } + out_a0[7].write( (0 ^ 0) ); + out_a0[8].write( (0 ^ 0) ); + N73 = !(C18_REMAINDER[31]); + N74 = !(C18_REMAINDER[30]); + N76 = !(C18_REMAINDER[29]); + N78 = !(C18_REMAINDER[28]); + N80 = !(C18_REMAINDER[27]); + N82 = !(C18_REMAINDER[26]); + N84 = !(C18_REMAINDER[25]); + N86 = !(C18_REMAINDER[24]); + N88 = !(C18_REMAINDER[23]); + N90 = !(C18_REMAINDER[22]); + N92 = !(C18_REMAINDER[21]); + N94 = !(C18_REMAINDER[20]); + N96 = !(C18_REMAINDER[19]); + N98 = !(C18_REMAINDER[18]); + N100 = !(C18_REMAINDER[17]); + N102 = !(C18_REMAINDER[16]); + N104 = !(C18_REMAINDER[15]); + N106 = !(C18_REMAINDER[14]); + N108 = !(C18_REMAINDER[13]); + N110 = !(C18_REMAINDER[12]); + N112 = !(C18_REMAINDER[11]); + N114 = !(C18_REMAINDER[10]); + N116 = !(C18_REMAINDER[9]); + N118 = !(C18_REMAINDER[8]); + N120 = !(C18_REMAINDER[7]); + N122 = !(C18_REMAINDER[6]); + N124 = !(C18_REMAINDER[5]); + N126 = !(C18_REMAINDER[4]); + N128 = !(C18_REMAINDER[3]); + N130 = !(C18_REMAINDER[2]); + N132 = !(C18_REMAINDER[1]); + N134 = !(C18_REMAINDER[0]); + N75 = (N73 && N74); + N77 = (N75 && N76); + N79 = (N77 && N78); + N81 = (N79 && N80); + N83 = (N81 && N82); + N85 = (N83 && N84); + N87 = (N85 && N86); + N89 = (N87 && N88); + N91 = (N89 && N90); + N93 = (N91 && N92); + N95 = (N93 && N94); + N97 = (N95 && N96); + N99 = (N97 && N98); + N101 = (N99 && N100); + N103 = (N101 && N102); + N105 = (N103 && N104); + N107 = (N105 && N106); + N109 = (N107 && N108); + N111 = (N109 && N110); + N113 = (N111 && N112); + N115 = (N113 && N114); + N117 = (N115 && N116); + N119 = (N117 && N118); + N121 = (N119 && N120); + N123 = (N121 && N122); + N125 = (N123 && N124); + N127 = (N125 && N126); + N129 = (N127 && N128); + N131 = (N129 && N130); + N133 = (N131 && N132); + out_a1[6].write( (N133 && N134) ); + out_a1[4].write( out_a1.read()[6] ); + out_a0[3].write( (0 ^ out_a1.read()[6]) ); + out_a0[4].write( (0 ^ out_a1.read()[6]) ); + out_a0[6].write( (0 ^ out_a1.read()[6]) ); + out_a1[2].write( !(out_a1.read()[6]) ); + out_a0[0].write( (out_a1.read()[2] ^ 0) ); + out_a0[1].write( (out_a1.read()[6] ^ out_a1.read()[2]) ); + + } + +}; diff --git a/src/systemc/tests/systemc/misc/stars/star114477/golden/test.log b/src/systemc/tests/systemc/misc/stars/star114477/golden/test.log new file mode 100644 index 000000000..4c75a8959 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114477/golden/test.log @@ -0,0 +1,11 @@ +SystemC Simulation +constants 000000000 001111000 +constants 000000001 000101100 +constants 000000001 000101100 +constants 000000000 001111000 +constants 000000001 000101100 +constants 000000001 000101100 +constants 000000000 001111000 +constants 000000001 000101100 +constants 000000001 000101100 +constants 000000000 001111000 diff --git a/src/systemc/tests/systemc/misc/stars/star114477/test.cpp b/src/systemc/tests/systemc/misc/stars/star114477/test.cpp new file mode 100644 index 000000000..6d67240d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114477/test.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifdef RTL +#include "design_rtl.h" +#else +#include "design.h" +#endif + +int sc_main(int ac, char *av[]) +{ + // Signals + sc_signal clk; + sc_signal > out_a0, out_a1; + sc_signal count; + + fun c_block("fun_block"); + c_block.clk(clk); + c_block.count(count); + c_block.out_a0(out_a0); + c_block.out_a1(out_a1); + + sc_start(0, SC_NS); + + count = 0; + + for(int i = 0; i < 10; i++){ + clk.write(1); + sc_start( 5, SC_NS ); + clk.write(0); + sc_start( 5, SC_NS ); + count = count + 1; + cout << "constants " << out_a0 << "\t" << out_a1 << endl; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star114566/golden/test.log b/src/systemc/tests/systemc/misc/stars/star114566/golden/test.log new file mode 100644 index 000000000..06d98f903 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114566/golden/test.log @@ -0,0 +1,9 @@ +SystemC Simulation + +Warning: (W212) sc_logic value 'X' cannot be converted to bool +In file: + +Warning: (W211) sc_logic value 'Z' cannot be converted to bool +In file: +01ZX +7 diff --git a/src/systemc/tests/systemc/misc/stars/star114566/test.cpp b/src/systemc/tests/systemc/misc/stars/star114566/test.cpp new file mode 100644 index 000000000..4e28fde3c --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114566/test.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_lv<4> a = "01ZX"; + sc_uint<4> b = a; + cout << a << endl; + cout << b << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star114633/golden/test.log b/src/systemc/tests/systemc/misc/stars/star114633/golden/test.log new file mode 100644 index 000000000..4b4b49112 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114633/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +0000 diff --git a/src/systemc/tests/systemc/misc/stars/star114633/test.cpp b/src/systemc/tests/systemc/misc/stars/star114633/test.cpp new file mode 100644 index 000000000..c2a52cc5a --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114633/test.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Dec/18/00 ulrich + +Assignment on an integer to an sc_lv results in an core dump for SystemC 1.0.1 +using SC5.0 on Solaris. It works fine with gcc, though. +*/ + +#include + +int sc_main(int argc, char* arg[]) +{ + int i =0; + sc_lv<4> lv4; + + lv4 = i; + cout << lv4 << "\n"; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star114639/golden/test.log b/src/systemc/tests/systemc/misc/stars/star114639/golden/test.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114639/golden/test.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/stars/star114639/test.cpp b/src/systemc/tests/systemc/misc/stars/star114639/test.cpp new file mode 100644 index 000000000..5317afa50 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114639/test.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_signal > tmp; + + sc_clock clk( "clk" ); + sc_start( 100, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star114678/golden/test.log b/src/systemc/tests/systemc/misc/stars/star114678/golden/test.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114678/golden/test.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/stars/star114678/test.cpp b/src/systemc/tests/systemc/misc/stars/star114678/test.cpp new file mode 100644 index 000000000..2a13a0256 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114678/test.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Dec/19/00 ulrich + +Assignment to a bit-slice of an sc_bv, even with an sc_bv with proper size, does not +compile on Solaris SC5.0. It works for gcc, though. + +It works for sc_int and sc_bigint on both compilers. + + +I am using SystemC 1.0.1 (someone **PLEASE** add 1.0.1 to the Stellar list of release!) + +Example: +*/ + +#include + +int sc_main(int argc, char* arg[]) +{ + sc_bv<8> bv8 = 3; + sc_bv<4> bv4 = 3; + sc_int<8> i8 = 3; + sc_int<4> i4 = 3; + sc_bigint<8> bi8=3; + sc_bigint<4> bi4=3; + + // OK + bi8.range(5,2) = bi4.range(3,0); + bi8.range(5,2) = bi4; + bi8.range(5,2) = 3; + bi8.range(5,2) = (sc_bigint<4>(3)).range(3,0); + + // OK + i8.range(5,2) = i4.range(3,0); + i8.range(5,2) = i4; + i8.range(5,2) = 3; + i8.range(5,2) = (sc_int<4>(3)).range(3,0); + + + // OK + bv8.range(5,2) = bv4.range(3,0); + + // OK gcc, error SC5.0 + bv8.range(5,2) = bv4; + bv8.range(5,2) = (sc_bv<4>(3)).range(3,0); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star114716/golden/test.log b/src/systemc/tests/systemc/misc/stars/star114716/golden/test.log new file mode 100644 index 000000000..b575d26ea --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114716/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +1 diff --git a/src/systemc/tests/systemc/misc/stars/star114716/test.cpp b/src/systemc/tests/systemc/misc/stars/star114716/test.cpp new file mode 100644 index 000000000..db256625e --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star114716/test.cpp @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Dec/20/00 ulrich + +I am using SystemC 1.0.1 + +This example causes some really ugly warnings when compiled with Solaris SC5.0. +Please note that there are actually 3 time more warnings than the one below. +Although the simulation result is correct, all these warnings make my hair stand up +and I wonder what I did wrong in my application code. + +It works fine with gcc. +*/ + +#include "systemc.h" + +int sc_main(int argc, char* arg[]) +{ + sc_bv<8> bv8 = 3; + int i; + + // gcc: OK + // SC5.0: works but strange warnings: + // "/home/pumba0/systemc-1.0.1/include/sc_bit_proxies.h", line 169: + // Warning: bv hides sc_bv_ns::sc_range::bv. + // "/home/pumba0/systemc-1.0.1/include/sc_proxy.h", line 487: + // Where: While instantiating "sc_bv_ns::sc_range + // ::sc_range(sc_bv_ns::sc_bv_base&, unsigned, unsigned)". + // "/home/pumba0/systemc-1.0.1/include/sc_proxy.h", line 487: + // Where: Instantiated from non-template code. + i = (bv8.range(4, 1)).to_uint(); + + cout << i << "\n"; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star115038/golden/test.log b/src/systemc/tests/systemc/misc/stars/star115038/golden/test.log new file mode 100644 index 000000000..d439cbfbc --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star115038/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation +00000000000000000000000000001010 +00000000000000000000000000001010 diff --git a/src/systemc/tests/systemc/misc/stars/star115038/test.cpp b/src/systemc/tests/systemc/misc/stars/star115038/test.cpp new file mode 100644 index 000000000..5f42c2810 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star115038/test.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Jan/4/00 ulrich + +In SystemC 1.0.1: +Conversion (via assignment or constructor) from an integer to sc_lv<32> is broken +on Sun SC5.0. I think it's an endless recursion. + +It works fine with gcc. + +Example: +*/ + +#include "systemc.h" + +int sc_main(int argc, char* arg[]) +{ + int a; + sc_lv<32> b; + a=10; + + b=a; // core dump + cout << b << endl; + b=sc_lv<32>(a); // core dump + cout << b << endl; + + return 0; +} + + + diff --git a/src/systemc/tests/systemc/misc/stars/star115165/golden/test.log b/src/systemc/tests/systemc/misc/stars/star115165/golden/test.log new file mode 100644 index 000000000..352ed734d --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star115165/golden/test.log @@ -0,0 +1,6 @@ +SystemC Simulation +0 s + +Error: (E525) wait(n) is only valid for n > 0: n = 0 +In file: +In process: a.main_action @ 0 s diff --git a/src/systemc/tests/systemc/misc/stars/star115165/test.cpp b/src/systemc/tests/systemc/misc/stars/star115165/test.cpp new file mode 100644 index 000000000..2f6ec6ef2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star115165/test.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + void main_action() + { + while( true ) { + cout << sc_time_stamp() << endl; + // wait( 1 ); // fine + wait( 0 ); + } + } + + SC_CTOR( mod_a ) + { + SC_CTHREAD( main_action, clk.pos() ); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + mod_a a( "a" ); + + a.clk( clk ); + + sc_start( 20, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star116072/golden/test.log b/src/systemc/tests/systemc/misc/stars/star116072/golden/test.log new file mode 100644 index 000000000..365b390f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star116072/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +sc_bit(1).to_char() = 1 diff --git a/src/systemc/tests/systemc/misc/stars/star116072/test.cpp b/src/systemc/tests/systemc/misc/stars/star116072/test.cpp new file mode 100644 index 000000000..af11c83af --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star116072/test.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Please compile the program below with SC5.0. The output of the program is: + +sc_bit(1).to_char() = ` + +where the last char in the line is a caro in my shell. It should be + +sc_bit(1).to_char() = 1 +*/ + + +#include + +int sc_main(int argc, char* arg[]) +{ + sc_report_handler::set_actions("/IEEE_Std_1666/deprecated", SC_DO_NOTHING); + cout << "sc_bit(1).to_char() = " << sc_bit(1).to_char() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star116406/golden/test.log b/src/systemc/tests/systemc/misc/stars/star116406/golden/test.log new file mode 100644 index 000000000..f071f84bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star116406/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +a = 4 diff --git a/src/systemc/tests/systemc/misc/stars/star116406/test.cpp b/src/systemc/tests/systemc/misc/stars/star116406/test.cpp new file mode 100644 index 000000000..dc3b5e75b --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star116406/test.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +The following testcase runs on gcc but crashes with SC5.0: +*/ + +#include + +int sc_main(int argc, char* arg[]) +{ + sc_int<8> a = 5; + + a = 12 & a; + + cout << "a = " << a << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star116568/golden/test.log b/src/systemc/tests/systemc/misc/stars/star116568/golden/test.log new file mode 100644 index 000000000..0612092dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star116568/golden/test.log @@ -0,0 +1,4 @@ +SystemC Simulation +00000001 +00000010 +00000011 diff --git a/src/systemc/tests/systemc/misc/stars/star116568/test.cpp b/src/systemc/tests/systemc/misc/stars/star116568/test.cpp new file mode 100644 index 000000000..422fb6cd4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star116568/test.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + + +SC_MODULE(xyz) { + + sc_in > A; + sc_out > X; + + void convert(const sc_lv<8>& I, sc_int<8>& O) { + O=I; + } + + void convert2(const sc_int<8>& I, sc_lv<8>& O) { + O=I; + } + + void entry() { + sc_int<8> tmp; + sc_lv<8> tmp2; + + convert(sc_lv<8>(A.read()),tmp); + convert2(tmp,tmp2); + X.write(tmp2); + } + + SC_CTOR(xyz) { + SC_METHOD(entry); + sensitive << A; + } +}; + + +#define NS * 1e-9 + +int sc_main(int ac, char *av[]) +{ + //Signals + sc_signal > A; + sc_signal > X; + + xyz UUT("UUT"); + UUT.A(A); + UUT.X(X); + + sc_start(0, SC_NS); + + A.write(1); + sc_start( 10, SC_NS ); + cout << X.read() << endl; + + A.write(2); + sc_start( 10, SC_NS ); + cout << X.read() << endl; + + A.write(3); + sc_start( 10, SC_NS ); + cout << X.read() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star117831/golden/test.log b/src/systemc/tests/systemc/misc/stars/star117831/golden/test.log new file mode 100644 index 000000000..21365d22b --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star117831/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +11010001 diff --git a/src/systemc/tests/systemc/misc/stars/star117831/test.cpp b/src/systemc/tests/systemc/misc/stars/star117831/test.cpp new file mode 100644 index 000000000..1b2672b64 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star117831/test.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Mar/9/01 ulrich + +This is SystemC version 1.0.1 + +The concat or comma operator "(,)" doesn't work for sc_bv on Solaris +SC5.0. It works fine with g++ though. +*/ + +#include + +int sc_main(int argc, char* arg[]) +{ + sc_bv<4> a("1101"), b("0001"); + sc_bv<8> c; + + c = (a,b); + + // OK with g++ + // + // Error with SC5.0: + // Cannot assign sc_bv_ns::sc_concat + // to sc_bv_ns::sc_bv<8> without + // "sc_bv_ns::sc_bv<8>::operator=(const sc_bv_ns::sc_bv<8>&)";. + + cout << c << "\n"; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star123845/golden/test.log b/src/systemc/tests/systemc/misc/stars/star123845/golden/test.log new file mode 100644 index 000000000..88d04ac4a --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star123845/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Info: (I704) VCD delta cycle tracing with pseudo timesteps (1 unit): 1 ps diff --git a/src/systemc/tests/systemc/misc/stars/star123845/test.cpp b/src/systemc/tests/systemc/misc/stars/star123845/test.cpp new file mode 100644 index 000000000..190a65cb3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star123845/test.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test for star 123845 + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "clk" ); + + sc_trace_file* tf = sc_create_vcd_trace_file( "foobar" ); + sc_trace( tf, clk, "clock" ); + sc_trace_delta_cycles( tf, true ); + + sc_start( 100, SC_NS ); + sc_close_vcd_trace_file( tf ); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star124010/golden/test.log b/src/systemc/tests/systemc/misc/stars/star124010/golden/test.log new file mode 100644 index 000000000..2e7758ea1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star124010/golden/test.log @@ -0,0 +1,4 @@ +SystemC Simulation +4 +-1 +0 diff --git a/src/systemc/tests/systemc/misc/stars/star124010/test.cpp b/src/systemc/tests/systemc/misc/stars/star124010/test.cpp new file mode 100644 index 000000000..67cb46902 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star124010/test.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_dt::sc_string_old's pos() method -- star 124010 + +#ifdef SC_USE_STD_STRING +# undef SC_USE_STD_STRING +#endif +#define SC_USE_SC_STRING_OLD +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_dt::sc_string_old a( "aap noot mies" ); + + cout << a.pos( "noot" ) << endl; + cout << a.pos( "not" ) << endl; + cout << a.pos( "" ) << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star125338/golden/test.log b/src/systemc/tests/systemc/misc/stars/star125338/golden/test.log new file mode 100644 index 000000000..3681df549 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star125338/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +-5 +5 +4294967291 +5 diff --git a/src/systemc/tests/systemc/misc/stars/star125338/test.cpp b/src/systemc/tests/systemc/misc/stars/star125338/test.cpp new file mode 100644 index 000000000..1760641e7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star125338/test.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test for star 125338 + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_bigint<32> x; + sc_biguint<32> y; + sc_int<10> a = -5; + sc_uint<10> b = 5; + + x = a; + cout << x << endl; + x = b; + cout << x << endl; + y = a; + cout << y << endl; + y = b; + cout << y << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star125412/golden/test.log b/src/systemc/tests/systemc/misc/stars/star125412/golden/test.log new file mode 100644 index 000000000..f892f5148 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star125412/golden/test.log @@ -0,0 +1,11 @@ +SystemC Simulation +main thread at time 10 ns +main thread at time 20 ns +main thread at time 30 ns +main thread at time 40 ns +main thread at time 50 ns +main thread at time 60 ns +main thread at time 70 ns +main thread at time 80 ns +main thread at time 90 ns +main thread at time 100 ns diff --git a/src/systemc/tests/systemc/misc/stars/star125412/test.cpp b/src/systemc/tests/systemc/misc/stars/star125412/test.cpp new file mode 100644 index 000000000..9d8e17f14 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star125412/test.cpp @@ -0,0 +1,119 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +I believe there is a bug in SystemC 2.0 beta 1 which +causes simulation to end prematurely in certain cases. +Specifically, if an event notification occurs at a particular +time but no processes are ready to run at that time, +simulation will end. However, there may still be processes +that need to be run at future times. + +Below I've included an example which demonstrates the bug, +and below that I've provided a proposed fix for the bug. + +// This SystemC 2.0 example shows the bug... +*/ + +#include + +class top : public sc_module +{ + public: + SC_HAS_PROCESS(top); + + top(sc_module_name name) : sc_module(name) + { + SC_THREAD(main); + } + + void main() + { + sc_event e; + + // comment out the following line to see bug go away + + e.notify(55, SC_NS); + + for (int i = 0; i < 10; i++) + { + wait(10, SC_NS); + cout << "main thread at time " << sc_time_stamp() << endl; + } + } +}; + +int sc_main (int argc , char *argv[]) +{ + top top1("Top1"); + sc_start(); + return 0; +} + +/* +/////// End of example + +The proposed fix for this in SystemC 2.0 beta 1 is: + +Edit src/sysc/kernel/sc_simcontext.cpp + +Lines 801-802, which read: + +// no more runnable processes +break; + +Should be changed to read: + +// no runnable processes at current time, but maybe in future +t = next_time(); +continue; + +The same changes should be applied at lines 845-846 +Then rebuild and reinstall the SystemC library. + + +___________________________________________________ +Stuart Swan, Senior Architect +System Level Design Group, Cadence Design Systems +Building 11 +2670 Seely Avenue +San Jose, CA 95134 +Phone: +1 408 895 4579 +Email: stuart@cadence.com +___________________________________________________ + +*/ diff --git a/src/systemc/tests/systemc/misc/stars/star125422/golden/test.log b/src/systemc/tests/systemc/misc/stars/star125422/golden/test.log new file mode 100644 index 000000000..8b59b28a2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star125422/golden/test.log @@ -0,0 +1,7 @@ +SystemC Simulation +0 s +15 ns +30 ns +45 ns +60 ns +75 ns diff --git a/src/systemc/tests/systemc/misc/stars/star125422/test.cpp b/src/systemc/tests/systemc/misc/stars/star125422/test.cpp new file mode 100644 index 000000000..6f67fb70d --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star125422/test.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of simulate_until by calling sc_start mutiple times + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "clk", 20, SC_NS ); + + for( int i = 0; i < 5; ++ i ) { + cout << sc_time_stamp() << endl; + sc_start( 15, SC_NS ); + } + cout << sc_time_stamp() << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star125788/golden/test.log b/src/systemc/tests/systemc/misc/stars/star125788/golden/test.log new file mode 100644 index 000000000..318d65ef3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star125788/golden/test.log @@ -0,0 +1,40 @@ +SystemC Simulation +8 +9 +10 +11 + +8 +9 +10 +11 + +8 +9 +10 +11 + +8 +9 +10 +11 + +8 +9 +10 +11 + +8 +9 +10 +11 + +8 +9 +10 +11 + +8 +9 +10 +11 diff --git a/src/systemc/tests/systemc/misc/stars/star125788/test.cpp b/src/systemc/tests/systemc/misc/stars/star125788/test.cpp new file mode 100644 index 000000000..9d5729b09 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star125788/test.cpp @@ -0,0 +1,149 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Please add support in form of constructors and assigment operators +such that assigments between types sc_int, sc_uint, sc_bigint, sc_biguint +work in all cases. Currently, assigning a sc_int or sc_uint does not +work in most cases. + +The following test case shows were things don't work. I tried it with +g++ 2.92.5 and Sun SC6.1 on Solaris. +*/ + +#include + +int sc_main( int, char*[] ) +{ + sc_int<8> i8 = 8; + sc_uint<9> u9 = 9; + sc_bigint<10> bi10 = 10; + sc_biguint<11> bu11 = 11; + + sc_int<8> i8_2; + sc_uint<9> u9_2; + sc_bigint<10> bi10_2; + sc_biguint<11> bu11_2; + + i8_2 = sc_int<8>(i8); + cout << i8_2 << endl; + i8_2 = sc_int<8>(u9); // g++ 2.95.2: ambiguous + cout << i8_2 << endl; + i8_2 = sc_int<8>(bi10); + cout << i8_2 << endl; + i8_2 = sc_int<8>(bu11); + cout << i8_2 << endl; + + cout << endl; + + u9_2 = sc_uint<9>(i8); // g++ 2.95.2: ambiguous + cout << u9_2 << endl; + u9_2 = sc_uint<9>(u9); + cout << u9_2 << endl; + u9_2 = sc_uint<9>(bi10); + cout << u9_2 << endl; + u9_2 = sc_uint<9>(bu11); + cout << u9_2 << endl; + + cout << endl; + + bi10_2 = sc_bigint<10>(i8); + cout << bi10_2 << endl; + bi10_2 = sc_bigint<10>(u9); + cout << bi10_2 << endl; + bi10_2 = sc_bigint<10>(bi10); + cout << bi10_2 << endl; + bi10_2 = sc_bigint<10>(bu11); + cout << bi10_2 << endl; + + cout << endl; + + bu11_2 = sc_biguint<11>(i8); // g++ 2.95.2: ambiguous, SC6.1: error + cout << bu11_2 << endl; + bu11_2 = sc_biguint<11>(u9); // g++ 2.95.2: ambiguous, SC6.1: error + cout << bu11_2 << endl; + bu11_2 = sc_biguint<11>(bi10); + cout << bu11_2 << endl; + bu11_2 = sc_biguint<11>(bu11); + cout << bu11_2 << endl; + + cout << endl; + + i8_2 = i8; + cout << i8_2 << endl; + i8_2 = u9; + cout << i8_2 << endl; + i8_2 = bi10; + cout << i8_2 << endl; + i8_2 = bu11; + cout << i8_2 << endl; + + cout << endl; + + u9_2 = i8; + cout << u9_2 << endl; + u9_2 = u9; + cout << u9_2 << endl; + u9_2 = bi10; + cout << u9_2 << endl; + u9_2 = bu11; + cout << u9_2 << endl; + + cout << endl; + + bi10_2 = i8; + cout << bi10_2 << endl; + bi10_2 = u9; + cout << bi10_2 << endl; + bi10_2 = bi10; + cout << bi10_2 << endl; + bi10_2 = bu11; + cout << bi10_2 << endl; + + cout << endl; + + bu11_2 = i8; + cout << bu11_2 << endl; + bu11_2 = u9; + cout << bu11_2 << endl; + bu11_2 = bi10; + cout << bu11_2 << endl; + bu11_2 = bu11; + cout << bu11_2 << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star126360/golden/test.log b/src/systemc/tests/systemc/misc/stars/star126360/golden/test.log new file mode 100644 index 000000000..1f4fa7045 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star126360/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/stars/star126360/test.cpp b/src/systemc/tests/systemc/misc/stars/star126360/test.cpp new file mode 100644 index 000000000..7cc84cb68 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star126360/test.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of sc_stop() inside end_of_elaboration() + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + void main_action() + { + cout << "main_action\n"; + } + + SC_CTOR( mod_a ) + { + SC_METHOD( main_action ); + sensitive << clk.pos(); + } + + virtual void end_of_elaboration() + { + sc_stop(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + mod_a a("a"); + a.clk( clk ); + sc_start( 100, SC_NS ); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star127536/golden/test.log b/src/systemc/tests/systemc/misc/stars/star127536/golden/test.log new file mode 100644 index 000000000..9cc4e2a49 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127536/golden/test.log @@ -0,0 +1,32 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: deprecated function: sc_set_default_time_unit +5 ns: trigger1 : 0 +6 ns: trigger2 : 0 +15 ns: trigger1 : 1 +16 ns: trigger2 : 1 +25 ns: trigger1 : 2 +26 ns: trigger2 : 2 +35 ns: trigger1 : 3 +36 ns: trigger2 : 3 +45 ns: trigger1 : 4 +46 ns: trigger2 : 4 +55 ns: trigger1 : 5 +56 ns: trigger2 : 5 +65 ns: trigger1 : 6 +66 ns: trigger2 : 6 +75 ns: trigger1 : 7 +76 ns: trigger2 : 7 +85 ns: trigger1 : 8 +86 ns: trigger2 : 8 +95 ns: trigger1 : 9 +96 ns: trigger2 : 9 +finishing at 100 ns + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/misc/stars/star127536/test.cpp b/src/systemc/tests/systemc/misc/stars/star127536/test.cpp new file mode 100644 index 000000000..58ac9941c --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127536/test.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Hello, + +sorry for asking again about the sc_start/sc_cycle problem but... + +The following program causes trouble (SystemC V2.0b2): +*/ + +#include "systemc.h" + +SC_MODULE(createpulse) + { + public: + sc_in_clk i_clk; + private: + int trigger1,trigger2; + void pulse() + { + while(true) + { + wait(); + cout << sc_time_stamp() << ": trigger1 : " < clk1; + + sc_set_time_resolution(1,SC_NS); + sc_set_default_time_unit(1,SC_NS); + + // sc_clock dummy( "dummy", 2, SC_NS ); + + createpulse dut("testpulse"); + + dut.i_clk(clk1); // see other posting + + tf=sc_create_vcd_trace_file("vcdtrace"); + sc_trace(tf,clk1,"clock"); + + // sc_initialize(); // comment out for sc_start version + for(i=0;i<10;i++) + { + clk1=0; + // sc_cycle(5,SC_NS); // change to sc_start + sc_start( 5, SC_NS ); + clk1=1; + // sc_cycle(5,SC_NS); // change to sc_start + sc_start( 5, SC_NS ); + } + + cout << "finishing at " << sc_time_stamp() << endl; + sc_close_vcd_trace_file(tf); + + return(EXIT_SUCCESS); + } + +/* +With this programm, the clk1 is generated as can be seen in the trace file. +But the pulse procedure gets stuck in the second wait function. With SystemC +V1.x, this worked with replacing sc_cycle with sc_start (and removing the +sc_initialize), however calling sc_start multiple was an undocumented feature +and it doesnt work in V2.0b2 (no clk is generated). +I know that this problem can be solved by creating an own clock generation +module using wait()s and just a single sc_start in sc_main, but IMHO +sometimes it is desirable to do it the way shown above. So is this possible +with SystemC V2.0 ? + +Regards, Sven Heithecker + +-- +Sven Heithecker IDA, Hans-Sommer-Str. 66 +Technical University of Braunschweig 38106 Braunschweig +Tel. +49-(0)531-391-3751(voice)/4587(fax) Germany +http://www.ida.ing.tu-bs.de/~svenh heithecker@ida.ing.tu-bs.de +*/ diff --git a/src/systemc/tests/systemc/misc/stars/star127624/golden/test.log b/src/systemc/tests/systemc/misc/stars/star127624/golden/test.log new file mode 100644 index 000000000..515454b33 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127624/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation +15 +7 diff --git a/src/systemc/tests/systemc/misc/stars/star127624/test.cpp b/src/systemc/tests/systemc/misc/stars/star127624/test.cpp new file mode 100644 index 000000000..484c56b9c --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127624/test.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_uint<3> ia; + sc_uint<1> ib; + sc_uint<4> ic; + + ia = 7; + ib = 1; + ic = ( ia[2] & ib, ia ); + cout << ic << endl; + + ib = 0; + ic = ( ia[2] & ib, ia ); + cout << ic << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star127712/golden/test.log b/src/systemc/tests/systemc/misc/stars/star127712/golden/test.log new file mode 100644 index 000000000..34c5fb6d4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127712/golden/test.log @@ -0,0 +1,6 @@ +SystemC Simulation +0 s: Method Activated +0 s: Method Activated +1 ns: Method Activated +2 ns: Method Activated +3 ns: Method Activated diff --git a/src/systemc/tests/systemc/misc/stars/star127712/test.cpp b/src/systemc/tests/systemc/misc/stars/star127712/test.cpp new file mode 100644 index 000000000..af918b25d --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127712/test.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +If a process is sensitive to sc_port, N> and +this port is bind to two signals, the process is responding +to only the events on first signal, it's not responding to +events on second (or other) signals. it seems to me as a +bug. how to resolve this problem?? + +Thanks in advance, +kiran + +when i run the following program i got this output. +0: Method Activated +0: Method Activated +3: Method Activated + +but expected output is, +0: Method Activated +0: Method Activated +1: Method Activated +2: Method Activated +3: Method Activated +*/ + +#include "systemc.h" + +SC_MODULE(tst) { + sc_port, 2> INP; + + void print_mthd() { + cout < INP1, INP2; + + tst tsti("tsti"); + tsti.INP(INP1); + tsti.INP(INP2); + + sc_start(0, SC_NS); + + INP1.write(1); + sc_start(1, SC_NS); + INP2.write(1); + sc_start(1, SC_NS); + INP2.write(0); + sc_start(1, SC_NS); + INP1.write(0); + sc_start(1, SC_NS); + + return 0; +} + + +/* +===== +M.N.V.Satya Kiran,M.Tech +Project Trainee, ED&T Synthesis, +Building: WAY- 3.24, +Phone: +31-40-2743924. +NatLab-Philips Research Laboratories, +Prof.Holstlaan 4, 5656 AA Eindhoven, +The Netherlands. +*/ diff --git a/src/systemc/tests/systemc/misc/stars/star127848/golden/test.log b/src/systemc/tests/systemc/misc/stars/star127848/golden/test.log new file mode 100644 index 000000000..2438e7a97 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127848/golden/test.log @@ -0,0 +1,8 @@ +SystemC Simulation +11001100 +01100 +00110 +11100110 +11100110 +10110011 +10110011 diff --git a/src/systemc/tests/systemc/misc/stars/star127848/test.cpp b/src/systemc/tests/systemc/misc/stars/star127848/test.cpp new file mode 100644 index 000000000..9be8fe1c5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127848/test.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_bv<8> foo = "11001100"; + cout << foo << endl; + sc_bv<5> a = foo.range( 4, 0 ); + sc_bv<5> b = foo.range( 0, 4 ); + cout << a << endl; + cout << b << endl; + + sc_bv<8> bar = foo; + foo.range( 0, 6 ) = foo.range( 1, 7 ); + cout << foo << endl; + foo = bar; + foo.range( 6, 0 ) = foo.range( 7, 1 ); + cout << foo << endl; + foo = bar; + foo.range( 0, 6 ) = foo.range( 7, 1 ); + cout << foo << endl; + foo = bar; + foo.range( 6, 0 ) = foo.range( 1, 7 ); + cout << foo << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star127914/golden/test.log b/src/systemc/tests/systemc/misc/stars/star127914/golden/test.log new file mode 100644 index 000000000..9e20fd3c9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127914/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +sum is 5 diff --git a/src/systemc/tests/systemc/misc/stars/star127914/test.cpp b/src/systemc/tests/systemc/misc/stars/star127914/test.cpp new file mode 100644 index 000000000..3b4c93910 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star127914/test.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +When I do an sc_biguint + sc_int addition, then the +code is compiled fine but links fails because the +operator was never defined. + +This happens with SystemC 1.0.2 on Solaris with both +gcc and Sun SC compiler. +*/ + +#include + +int sc_main(int, char**) +{ + sc_int<8> i8; + sc_biguint<8> bu8; + + i8=2; + bu8=3; + bu8 = bu8 + i8; + cout << "sum is " << bu8 << "\n"; + + return 0; +} + +/* +Undefined first referenced + symbol in file +operator+(sc_unsigned const &, sc_int_base const &)str.o +*/ diff --git a/src/systemc/tests/systemc/misc/stars/star129901/golden/test.log b/src/systemc/tests/systemc/misc/stars/star129901/golden/test.log new file mode 100644 index 000000000..b575d26ea --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star129901/golden/test.log @@ -0,0 +1,2 @@ +SystemC Simulation +1 diff --git a/src/systemc/tests/systemc/misc/stars/star129901/test.cpp b/src/systemc/tests/systemc/misc/stars/star129901/test.cpp new file mode 100644 index 000000000..5e9a8c5a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star129901/test.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +I found this while trying to improve coverage of the SystemC regression tests. + +Compile the following program, bug.cpp, with + +g++ -g -I /u/scp/src/systemc-2.0/include bug.cpp /u/scp/src/systemc-2.0/lib-gccsparcOS5/libsystemc.a +(in mountain view, elsewhere use SYSTEMC_HOME pointing to the 2.0 release) + +------------------------------------------------------------------------------- +*/ + +#define SC_INCLUDE_FX 1 +#include "systemc.h" + +double bug() +{ + sc_fxval_fast fast(2); + sc_fxval slow(1); + fast = slow; + fast += slow; + fast -= slow; + fast *= slow; + fast /= slow; + return fast.to_double(); +} + +int sc_main(int, char*[]) +{ + cout << bug() << endl; + return 0; +} + +/* +------------------------------------------------------------------------------- +It fails to link, giving the message + +Undefined first referenced + symbol in file +sc_fxval_fast::operator+=(sc_fxval const &) /var/tmp/ccNbIiHN.o +sc_fxval_fast::operator-=(sc_fxval const &) /var/tmp/cclXNLsO.o +sc_fxval_fast::operator/=(sc_fxval const &) /var/tmp/cclXNLsO.o +sc_fxval_fast::operator*=(sc_fxval const &) /var/tmp/cclXNLsO.o +*/ + diff --git a/src/systemc/tests/systemc/misc/stars/star130782/golden/test.log b/src/systemc/tests/systemc/misc/stars/star130782/golden/test.log new file mode 100644 index 000000000..d6cee7b36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star130782/golden/test.log @@ -0,0 +1,16 @@ +SystemC Simulation +A = 0x000000000000000000000000000000000 +Y = 0x000000000000000000000000000000000 + +A = 0x0ffffffffffffffffffffffffffffffff +B = 00000 +Y = 0x0ffffffffffffffffffffffffffffffff + +A = 0x000000000000000000000000000000000 +B = 00000 +Y = 0x000000000000000000000000000000000 + +A = 0x000000000000000000000000000000000 +B = 00000 +Y = 0x000000000000000000000000000000000 + diff --git a/src/systemc/tests/systemc/misc/stars/star130782/test.cpp b/src/systemc/tests/systemc/misc/stars/star130782/test.cpp new file mode 100644 index 000000000..8d28c00bc --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star130782/test.cpp @@ -0,0 +1,138 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Subject: range() of sc_biguint +From: "Masahiro Taniguchi" +Date: Mon, 12 Nov 2001 16:29:04 +0900 +To: "systemc-forum" + +Hi all, + +I found a strange simulation result regarding sc_biguint. +I attached the example about it. +The example described 3 case. + 1. Write non-0 + 2. Write 0 without cast + 3. Write 0 with cast (sc_biguint<8>) +The wrong result appears in the 2nd case. +Is this a bug of SystemC? + +-------Environment------- + SystemC V1.0.2 and V2.0 + GCC 2.95.2 + Sun Solaris +------------------------- + +Regards, + +Masahiro Taniguchi +Mitsubishi Electric Corporation +JAPAN + +------------------------------------------------------------ +*/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + int i; + int index0,index1; + sc_biguint<128> A; + sc_uint<16> B; + sc_biguint<128> Y; + + A = 0; + Y = 0; + cout << "A = " << A.to_string(SC_HEX) << endl; + cout << "Y = " << Y.to_string(SC_HEX) << endl << endl; + + // 1st Case + A = "0xffffffffffffffffffffffffffffffff"; + B = 0; + + for(i=15;i>=0;i--) + { + index0 = 8*(i+1)-1; + index1 = 8* i; + if(B[i] == 0) { + Y.range(index0,index1) = A.range(index0,index1); + } + } + + cout << "A = " << A.to_string(SC_HEX) << endl; + cout << "B = " << hex << B << endl; + cout << "Y = " << Y.to_string(SC_HEX) << endl << endl; + + // 2nd Case + A = 0; + B = 0; + + for(i=15;i>=0;i--) + { + index0 = 8*(i+1)-1; + index1 = 8* i; + if(B[i] == 0) { + Y.range(index0,index1) = A.range(index0,index1); + } + } + + cout << "A = " << A.to_string(SC_HEX) << endl; + cout << "B = " << hex << B << endl; + cout << "Y = " << Y.to_string(SC_HEX) << endl << endl; + + // 3rd Case + A = 0; + B = 0; + + for(i=15;i>=0;i--) + { + index0 = 8*(i+1)-1; + index1 = 8* i; + if(B[i] == 0) { + Y.range(index0,index1) = (sc_biguint<8>)A.range(index0,index1); + } + } + + cout << "A = " << A.to_string(SC_HEX) << endl; + cout << "B = " << hex << B << endl; + cout << "Y = " << Y.to_string(SC_HEX) << endl << endl; + + return(0); +} diff --git a/src/systemc/tests/systemc/misc/stars/star130786/golden/test.log b/src/systemc/tests/systemc/misc/stars/star130786/golden/test.log new file mode 100644 index 000000000..7fd18a00e --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star130786/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation +a = 10 +a = 10 diff --git a/src/systemc/tests/systemc/misc/stars/star130786/test.cpp b/src/systemc/tests/systemc/misc/stars/star130786/test.cpp new file mode 100644 index 000000000..fcebd8d1e --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star130786/test.cpp @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Demo Code for SystemC 2.0 Casting Problem +// +// Rob Slater +// Motorola, Inc. +// r.slater@motorola.com +// +// +// Compile this file with: +// g++ -Wall +// (use g++ version 2.95.2) +// +// With SystemC 1.0.2 the file compiles and prints +// "a = 10" to stdout. +// +// With SystemC 2.0 (release) line 32 fails compilation +// with the error: +// sc_main.cc:32: `const class sc_uint<16>' used where a `unsigned int' was expected +// + +#include + +// sc_uint<16> unused; + +SC_MODULE(Test) +{ + sc_in_clk clk; + sc_in > in; + + void meth() + { + unsigned int a; + + a = in.read(); + cout << "a = " << a << endl; + + } // meth() + + SC_CTOR(Test) + { + SC_METHOD(meth); + sensitive << clk.pos(); + + } // SC_CTOR(Test) + +}; // SC_MODULE(Test) + + +int sc_main(int argc, char *argv[]) +{ + // Declare the clock + sc_clock clk("clk", 50, SC_NS, 0.5, 0, SC_NS, false); + + sc_signal > in; + + Test test("test"); + test.clk(clk); + test.in(in); + + in.write(10); // Initialize "in" with "10" + sc_start(75, SC_NS); // Run for 1-1/2 clock cycles + + return 0; + +} // sc_main() diff --git a/src/systemc/tests/systemc/misc/stars/star132075/golden/test.log b/src/systemc/tests/systemc/misc/stars/star132075/golden/test.log new file mode 100644 index 000000000..5052222ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star132075/golden/test.log @@ -0,0 +1,9 @@ +SystemC Simulation +1 +1 +0 +0 +1 +1 +0 +0 diff --git a/src/systemc/tests/systemc/misc/stars/star132075/test.cpp b/src/systemc/tests/systemc/misc/stars/star132075/test.cpp new file mode 100644 index 000000000..57b4ff3b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star132075/test.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Dec/6/01 ulrich + +Comparison of bit-slices of sc_int and sc_uint vectors +does not work due to ambiguity. See example below. +It does work with sc_bigint, however. +*/ + +#include + +int sc_main(int, char**) +{ + { + // sc_biguint<32> a,b; + sc_uint<32> a,b; + a=15; + b=45; + + cout << (a.range(5,2) < b.range(5,2)) << "\n"; + cout << (a.range(5,2) <= b.range(5,2)) << "\n"; + cout << (a.range(5,2) > b.range(5,2)) << "\n"; + cout << (a.range(5,2) >= b.range(5,2)) << "\n"; + } + + { + // sc_bigint<32> a,b; + sc_int<32> a,b; + a=15; + b=45; + + cout << (a.range(5,2) < b.range(5,2)) << "\n"; + cout << (a.range(5,2) <= b.range(5,2)) << "\n"; + cout << (a.range(5,2) > b.range(5,2)) << "\n"; + cout << (a.range(5,2) >= b.range(5,2)) << "\n"; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star132136/golden/test.log b/src/systemc/tests/systemc/misc/stars/star132136/golden/test.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star132136/golden/test.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/stars/star132136/test.cpp b/src/systemc/tests/systemc/misc/stars/star132136/test.cpp new file mode 100644 index 000000000..9e651f6b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star132136/test.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Assignment of an integer to a bit-slice of a bit-vector + works fine for sc_[u]int, sc_bug[u]int but not sc_bv + and sc_lv. That's very strange, especially since it + it allowed to assign an integer to the entire sc_bv/sc_lv + vector. The error message from SC6.1 is + + no match for `sc_bv_ns::sc_range = int &' + + Example: +*/ + +#include + +int sc_main(int, char**) +{ + sc_int<32> i; + sc_uint<32> u; + sc_bigint<32> bi; + sc_biguint<32> bu; + sc_lv<32> lv; + sc_bv<32> bv; + int I = 42; + + i.range(14,1) = I; + u.range(14,1) = I; + bi.range(14,1) = I; + bu.range(14,1) = I; + lv.range(14,1) = I; // ERROR + bv.range(14,1) = I; // ERROR + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star133377/golden/test.log b/src/systemc/tests/systemc/misc/stars/star133377/golden/test.log new file mode 100644 index 000000000..88fbca79c --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star133377/golden/test.log @@ -0,0 +1,11 @@ +SystemC Simulation +sc_int (1) 0b1110101111101011 +sc_int (2) 0b1110101110111011 +sc_uint (1) 0b01110101111101011 +sc_uint (2) 0b01110101110111011 +sc_bigint (2) 0b1110101110111011 +sc_biguint (2) 0b01110101110111011 +sc_bv (1) 1110101111101011 +sc_bv (2) 1110101110111011 +sc_lv (1) 1110101111101011 +sc_lv (2) 1110101110111011 diff --git a/src/systemc/tests/systemc/misc/stars/star133377/test.cpp b/src/systemc/tests/systemc/misc/stars/star133377/test.cpp new file mode 100644 index 000000000..f7555e06d --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star133377/test.cpp @@ -0,0 +1,130 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +int +sc_main(int, char**) +{ + { // sc_int works fine + sc_int<8> a; + sc_int<16> x; + a=sc_bigint<8>("0b11101011"); + + x=(a,a); + cout << "sc_int (1) " << sc_bigint<16>(x).to_string(SC_BIN) << endl; + + x=(a.range(7,0), a.range(3,0), a.range(3,0)); + cout << "sc_int (2) " + << sc_bigint<16>(x).to_string(SC_BIN) << endl; + } + { // sc_uint works fine + sc_uint<8> a; + sc_uint<16> x; + a=sc_biguint<8>("0b11101011"); + + x=(a,a); + cout << "sc_uint (1) " << sc_biguint<16>(x).to_string(SC_BIN) << endl; + + x=(a.range(7,0), a.range(3,0), a.range(3,0)); + cout << "sc_uint (2) " + << sc_biguint<16>(x).to_string(SC_BIN) << endl; + } + { + sc_bigint<8> a; + sc_bigint<16> x; + a="0b11101011"; + + // compile error (SC6.1): + // Error: Overloading ambiguity between "operator,(const sc_uint_base&, const sc_uint_base&)" + // and "operator,(const sc_int_base&, const sc_int_base&)". + // Error: Overloading ambiguity between "sc_bigint<16>::operator=(const sc_uint_base&)" + // and "sc_bigint<16>::operator=(long long)". + // ---- + // x=(a,a); + // cout << "sc_bigint (1) " << x.to_string(SC_BIN) << endl; + + // runtime error: concat yields wrong result + // returned value is 1111111111111011 + // but should be 1110101110111011 + x=(a.range(7,0), a.range(3,0), a.range(3,0)); + cout << "sc_bigint (2) "<< x.to_string(SC_BIN) << endl; + } + { + sc_biguint<8> a; + sc_biguint<16> x; + a="0b11101011"; + + // compile error (SC6.1): + // Error: Overloading ambiguity between "operator,(const sc_uint_base&, const sc_uint_base&)" + // and "operator,(const sc_int_base&, const sc_int_base&)". + // Error: Overloading ambiguity between "sc_bigint<16>::operator=(const sc_uint_base&)" + // and "sc_bigint<16>::operator=(long long)". + // ---- + // x=(a,a); + // cout << "sc_biguint (1) " << x.to_string(SC_BIN) << endl; + + // runtime error: concat yields wrong result + // returned value is 0000000000001011 + // but should be 1110101110111011 + x=(a.range(7,0), a.range(3,0), a.range(3,0)); + cout << "sc_biguint (2) " << x.to_string(SC_BIN) << endl; + } + { // sc_bv works fine + sc_bv<8> a; + sc_bv<16> x; + a="11101011"; + + x=(a,a); + cout << "sc_bv (1) " << x.to_string() << endl; + + x=(a.range(7,0), a.range(3,0), a.range(3,0)); + cout << "sc_bv (2) " << x.to_string() << endl; + } + { // sc_lv works fine + sc_lv<8> a; + sc_lv<16> x; + a="11101011"; + + x=(a,a); + cout << "sc_lv (1) " << x.to_string() << endl; + + x=(a.range(7,0), a.range(3,0), a.range(3,0)); + cout << "sc_lv (2) " << x.to_string() << endl; + } + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star135771/golden/test.log b/src/systemc/tests/systemc/misc/stars/star135771/golden/test.log new file mode 100644 index 000000000..f928eb5b3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star135771/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation +01ZX0000111101ZX +111101ZXXXXXXXXX diff --git a/src/systemc/tests/systemc/misc/stars/star135771/test.cpp b/src/systemc/tests/systemc/misc/stars/star135771/test.cpp new file mode 100644 index 000000000..eeffdc138 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star135771/test.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* +Hi, + +Im using SystemC 2.0b2 with gcc 2.95.3 (Linux). If I create an sc_lv +assignment with range methods on every side like + +lv1.range(15,8) = lv2.range(7,0); + +and the lv2 vector contains "z", I get the warning message + +WARNING: (E2004) sc_bv cannot contain values X and Z : + - ../../../../../src/sysc/datatypes/bit/sc_bv.h: 340 + +and the assignment is not done. Further investigation revealed that the +vector seems to get mistakenly converted to a sc_bv in between. Removing the +range method on one side or adding a cast + +lv1.range(15,8) = (sc_lv<8>)lv2.range(7,0); + +solves that problem. + +Regards, S. Heithecker +*/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_lv<16> a( "01ZX0000111101ZX" ); + sc_lv<16> b; + + b.range( 15, 8 ) = a.range( 7, 0 ); + cout << a << endl; + cout << b << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/star137040/golden/test.log b/src/systemc/tests/systemc/misc/stars/star137040/golden/test.log new file mode 100644 index 000000000..3511464d9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star137040/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +10 +10 +6 +6 diff --git a/src/systemc/tests/systemc/misc/stars/star137040/test.cpp b/src/systemc/tests/systemc/misc/stars/star137040/test.cpp new file mode 100644 index 000000000..a119df1ba --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/star137040/test.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-03-22 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + sc_uint<5> a = 10; + const sc_uint<5> b = 10; + + sc_uint<5> x = ( a[2], a[4], a[3], a[1], a[0] ); + + sc_uint<5> y = ( b[2], b[4], b[3], b[1], b[0] ); + + cout << a << endl; + cout << b << endl; + cout << x << endl; + cout << y << endl; + + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/stars/vcd_trace/star126273/golden/test.vcd b/src/systemc/tests/systemc/misc/stars/vcd_trace/star126273/golden/test.vcd new file mode 100644 index 000000000..0f16ae536 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/vcd_trace/star126273/golden/test.vcd @@ -0,0 +1,49 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 1 aaaaa clk1 $end +$var wire 1 aaaab clk2 $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +0aaaaa +0aaaab +$end + +#3000 +1aaaab + +#5000 +1aaaaa + +#9000 +0aaaab + +#10000 +0aaaaa + +#15000 +1aaaaa +1aaaab + +#20000 +0aaaaa + +#21000 +0aaaab + +#25000 +1aaaaa + +#27000 +1aaaab + +#30000 diff --git a/src/systemc/tests/systemc/misc/stars/vcd_trace/star126273/test.cpp b/src/systemc/tests/systemc/misc/stars/vcd_trace/star126273/test.cpp new file mode 100644 index 000000000..be8f38566 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/vcd_trace/star126273/test.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// bug in sc_vcd_trace::cycle() +// in SystemC 1.2.1Beta (also 1.0.2). +// Simulates correctly (two clock edges at time 15). +// But VCD is corrupt - has #0 instead of #15. +// Also, this message should be printed but isn't: +// VCD Trace Warning: +// Multiple cycles found with same (15) time units count. +// Waveform viewers will only show the states of the last one. +// Use ((vcd_trace_file*)vcdfile)->sc_set_vcd_time_unit(int exponent10_seconds) +// to increase time resolution. +// +// + +#include "systemc.h" +// #include + +// class foo: sc_module { +class foo: public sc_module { +public: + sc_in clk1; + sc_in clk2; + + SC_CTOR(foo) { + SC_METHOD(do_clk1); + sensitive << clk1.pos(); + SC_METHOD(do_clk2); + sensitive << clk2.pos(); + } + void do_clk1() { + cout << "foo: clk1 + " << sc_time_stamp() << endl; + } + void do_clk2() { + cout << "foo: clk2 + " << sc_time_stamp() << endl; + } +}; + +int +sc_main(int argc, char *argv[]) +{ + // sc_clock clk1("clk1", 10, SC_NS, 0.5); + // sc_clock clk2("clk2", 12, SC_NS, 0.5); + sc_signal clk1( "clk1" ); + sc_signal clk2( "clk2" ); + + foo FOO("FOO"); + + FOO.clk1(clk1); + FOO.clk2(clk2); + + sc_trace_file *tf = sc_create_vcd_trace_file("test"); + // sc_trace(tf, clk1.signal(), "clk1"); + // sc_trace(tf, clk2.signal(), "clk2"); + sc_trace(tf, clk1, "clk1"); + sc_trace(tf, clk2, "clk2"); + + sc_start(0, SC_NS); + + clk1 = 0; + clk2 = 0; // 0 ns + sc_start(3, SC_NS); + clk2 = 1; // 3 ns + + sc_start(2, SC_NS); + clk1 = 1; // 5 ns + + sc_start(4, SC_NS); + clk2 = 0; // 9 ns + sc_start(1, SC_NS); + clk1 = 0; // 10 ns + sc_start(5, SC_NS); + clk2 = 1; // 15 ns + + sc_start(0, SC_NS); + clk1 = 1; // 15 ns + + sc_start(5, SC_NS); + clk1 = 0; // 20 ns + sc_start(1, SC_NS); + clk2 = 0; // 21 ns + sc_start(4, SC_NS); + clk1 = 1; // 25 ns + + sc_start(2, SC_NS); + clk2 = 1; // 27 ns + + sc_start(3, SC_NS); + clk1 = 0; // 30 ns + + sc_close_vcd_trace_file(tf); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/stars/wif_trace/star115332/flop.h b/src/systemc/tests/systemc/misc/stars/wif_trace/star115332/flop.h new file mode 100644 index 000000000..77990cf12 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/wif_trace/star115332/flop.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + flop.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(flop) +{ + sc_in_clk clk; + sc_in > in; + sc_out > out; + + SC_CTOR(flop) { + SC_CTHREAD(entry,clk.pos() ); + } + + void entry(); +}; + + +// #include "flop.h" + +void flop::entry() +{ + while (true) { + out = in; + wait(); +}; +} + diff --git a/src/systemc/tests/systemc/misc/stars/wif_trace/star115332/golden/test.awif b/src/systemc/tests/systemc/misc/stars/wif_trace/star115332/golden/test.awif new file mode 100644 index 000000000..fec891c67 --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/wif_trace/star115332/golden/test.awif @@ -0,0 +1,312 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "clk" BIT variable ; +start_trace O0 ; +declare O1 "int1" BIT 0 0 variable ; +start_trace O1 ; +declare O2 "int2" BIT 0 0 variable ; +start_trace O2 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 '1' ; +assign O1 "0" ; +assign O2 "0" ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + diff --git a/src/systemc/tests/systemc/misc/stars/wif_trace/star115332/test.cpp b/src/systemc/tests/systemc/misc/stars/wif_trace/star115332/test.cpp new file mode 100644 index 000000000..220710a4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/stars/wif_trace/star115332/test.cpp @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "flop.h" +#include "systemc.h" + + +int sc_main(int argc, char *argv[]) //(int ac, char** av) + +{ + + sc_signal > int1 ; + sc_signal > int2 ; + + + sc_clock clk("clk", 20, SC_NS, 0.5); + + + +// instanciate Processes + + flop FLOP("flip_flop"); + FLOP.clk(clk) ; + FLOP.in(int1) ; + FLOP.out(int2) ; + + sc_trace_file * tf = sc_create_wif_trace_file("test"); + sc_trace( tf, clk, "clk"); + sc_trace( tf, int1, "int1"); + sc_trace( tf, int2, "int2"); + + /* + sc_trace_file * tf2 = sc_create_vcd_trace_file("dump_vcd"); + sc_trace( tf2, clk, "clk"); + sc_trace( tf2, int1, "int1"); + sc_trace( tf2, int2, "int2"); + */ + + sc_start(1000, SC_NS); + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/add_chain.cpp b/src/systemc/tests/systemc/misc/synth/add_chain/add_chain.cpp new file mode 100644 index 000000000..56132f484 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/add_chain.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + add_chain.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: add_chain.cpp,v $ +// Revision 1.2 2011/09/05 21:23:35 acg +// Philipp A. Hartmann: eliminate compiler warnings. +// +// Revision 1.1.1.1 2006/12/15 20:26:13 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:23 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/20 00:43:19 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.2 2006/01/19 00:47:26 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "define.h" +#include "display.h" +#include "data_gen.h" +#include "reset_stim.h" +#include "add_chain.h" +#include "tb.h" + +int +sc_main(int ac, char *av[]) +{ + sc_clock clk( "CLOCK", 20, SC_NS, 0.5, 0, SC_NS, false); // Clock function + testbench tb1("TB1", clk ); // Testbench Instance + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/add_chain.dat b/src/systemc/tests/systemc/misc/synth/add_chain/add_chain.dat new file mode 100644 index 000000000..f6352869f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/add_chain.dat @@ -0,0 +1,257 @@ +11111111 +00000000 +00000001 +00000010 +00000011 +00000100 +00000101 +00000110 +00000111 +00001000 +00001001 +00001010 +00001011 +00001100 +00001101 +00001110 +00001111 +00010000 +00010001 +00010010 +00010011 +00010100 +00010101 +00010110 +00010111 +00011000 +00011001 +00011010 +00011011 +00011100 +00011101 +00011110 +00011111 +00100000 +00100001 +00100010 +00100011 +00100100 +00100101 +00100110 +00100111 +00101000 +00101001 +00101010 +00101011 +00101100 +00101101 +00101110 +00101111 +00110000 +00110001 +00110010 +00110011 +00110100 +00110101 +00110110 +00110111 +00111000 +00111001 +00111010 +00111011 +00111100 +00111101 +00111110 +00111111 +01000000 +01000001 +01000010 +01000011 +01000100 +01000101 +01000110 +01000111 +01001000 +01001001 +01001010 +01001011 +01001100 +01001101 +01001110 +01001111 +01010000 +01010001 +01010010 +01010011 +01010100 +01010101 +01010110 +01010111 +01011000 +01011001 +01011010 +01011011 +01011100 +01011101 +01011110 +01011111 +01100000 +01100001 +01100010 +01100011 +01100100 +01100101 +01100110 +01100111 +01101000 +01101001 +01101010 +01101011 +01101100 +01101101 +01101110 +01101111 +01110000 +01110001 +01110010 +01110011 +01110100 +01110101 +01110110 +01110111 +01111000 +01111001 +01111010 +01111011 +01111100 +01111101 +01111110 +01111111 +10000000 +10000001 +10000010 +10000011 +10000100 +10000101 +10000110 +10000111 +10001000 +10001001 +10001010 +10001011 +10001100 +10001101 +10001110 +10001111 +10010000 +10010001 +10010010 +10010011 +10010100 +10010101 +10010110 +10010111 +10011000 +10011001 +10011010 +10011011 +10011100 +10011101 +10011110 +10011111 +10100000 +10100001 +10100010 +10100011 +10100100 +10100101 +10100110 +10100111 +10101000 +10101001 +10101010 +10101011 +10101100 +10101101 +10101110 +10101111 +10110000 +10110001 +10110010 +10110011 +10110100 +10110101 +10110110 +10110111 +10111000 +10111001 +10111010 +10111011 +10111100 +10111101 +10111110 +10111111 +11000000 +11000001 +11000010 +11000011 +11000100 +11000101 +11000110 +11000111 +11001000 +11001001 +11001010 +11001011 +11001100 +11001101 +11001110 +11001111 +11010000 +11010001 +11010010 +11010011 +11010100 +11010101 +11010110 +11010111 +11011000 +11011001 +11011010 +11011011 +11011100 +11011101 +11011110 +11011111 +11100000 +11100001 +11100010 +11100011 +11100100 +11100101 +11100110 +11100111 +11101000 +11101001 +11101010 +11101011 +11101100 +11101101 +11101110 +11101111 +11110000 +11110001 +11110010 +11110011 +11110100 +11110101 +11110110 +11110111 +11111000 +11111001 +11111010 +11111011 +11111100 +11111101 +11111110 +11111111 diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/add_chain.h b/src/systemc/tests/systemc/misc/synth/add_chain/add_chain.h new file mode 100644 index 000000000..3162903bb --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/add_chain.h @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + add_chain.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +/******************************************************************************/ +/*************************** add_chain Class Definition ********************/ +/******************************************************************************/ + +SC_MODULE( ADD_CHAIN ) +{ + SC_HAS_PROCESS( ADD_CHAIN ); + + sc_in_clk clk; + + const sc_signal& rst; + const signal_bool_vector8& a_in; + signal_bool_vector4& sum_out; + sc_signal& ready; + + ADD_CHAIN( sc_module_name NAME, + sc_clock& TICK_P, + + const sc_signal& RST, + const signal_bool_vector8& A_IN, + signal_bool_vector4& SUM_OUT, + sc_signal& READY + ) + : + rst (RST), + a_in (A_IN), + sum_out (SUM_OUT), + ready (READY) + { + clk(TICK_P); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(rst, false); + } + void entry(); +}; + +/******************************************************************************/ +/*************************** add_chain Entry Function **********************/ +/******************************************************************************/ +/** **/ +/** This function sums the number of 1's contained in a 8-bit data stream **/ +/** **/ +/******************************************************************************/ +void +ADD_CHAIN::entry() +{ + bool_vector4 sum; + bool_vector8 a; + + /***** Reset Initialization *****/ + sum_out.write(0); + ready.write(1); + wait(); + + /***** MAIN LOOP *****/ + while(true) { + + /***** Handshake *****/ + ready.write(0); + wait(); + + /***** Computation *****/ + sum = 0; + a = a_in.read(); + + for (int i=0; i<=7; i=i+1) { + sum = sum.to_uint() + a[i].to_bool(); + } + + sum_out.write(sum); + + /***** Handshake *****/ + ready.write(1); + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/common.h b/src/systemc/tests/systemc/misc/synth/add_chain/common.h new file mode 100644 index 000000000..850b96ab7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#define SC_NO_WRITE_CHECK +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<8> bool_vector8; +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/data_gen.h b/src/systemc/tests/systemc/misc/synth/add_chain/data_gen.h new file mode 100644 index 000000000..18df486d3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/data_gen.h @@ -0,0 +1,100 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + data_gen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "define.h" + +/******************************************************************************/ +/*************************** data_gen Function **********************/ +/******************************************************************************/ + +SC_MODULE( DATA_GEN ) +{ + SC_HAS_PROCESS( DATA_GEN ); + + sc_in_clk clk; + + /*** Input and Output Ports ***/ + const sc_signal& ready; + signal_bool_vector8& data; + sc_signal& addr; + + /*** Constructor ***/ + DATA_GEN ( sc_module_name NAME, + sc_clock& TICK_N, + const sc_signal& READY, + signal_bool_vector8& DATA, + sc_signal& ADDR ) + + : + ready (READY), + data (DATA), // 8 bits + addr (ADDR) + + { + clk (TICK_N); + SC_CTHREAD( entry, clk.neg() ); + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +DATA_GEN::entry() +{ + + while(true) { + +// WAIT FOR POSEDGE OF ready + + at_posedge(ready); + +// CHECK TO SEE IF THE END OF MEMORY HAS BEEN REACHED + + if(addr.read() > LIMIT) { // if(addr > LIMIT) + break; + } + +// WRITE VALUE OF MEMORY AT CURRENT ADDRESS TO data +// INCREMENT addr BY 1 + + data.write(mem[addr.read()]); // data = mem[addr] + addr.write(addr.read() + 1); // addr = addr + 1 + } + +} diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/define.h b/src/systemc/tests/systemc/misc/synth/add_chain/define.h new file mode 100644 index 000000000..99f950a1a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/define.h @@ -0,0 +1,44 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +#define LIMIT 257 // Last stimulus vector memory address location +#define WIDTH 8 // Width of stimulus vector +#define LATENCY 3 // Latency of sum + +extern bool_vector8 mem[]; diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/display.h b/src/systemc/tests/systemc/misc/synth/add_chain/display.h new file mode 100644 index 000000000..bef1bf3b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/display.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "define.h" + + +/******************************************************************************/ +/*************************** Output Display Function **********************/ +/******************************************************************************/ + +SC_MODULE( DISPLAY ) +{ + SC_HAS_PROCESS( DISPLAY ); + + /*** Input and Output Ports ***/ + const sc_signal& ready; // Input + const signal_bool_vector8& data; // Input + const signal_bool_vector4& sum; // Input + + /*** Constructor ***/ + DISPLAY ( sc_module_name NAME, + const sc_signal& READY, + const signal_bool_vector8& DATA, + const signal_bool_vector4& SUM ) + + : ready (READY), + data (DATA), // 8 bits + sum (SUM) + + { + SC_METHOD( entry ); + sensitive << ready; + sensitive << data; + sensitive << sum; + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +DISPLAY::entry() +{ +// DISPLAY NUMBER OF 1'S IN DATA AT NEGEDGE ready + + if( ready.posedge() ) { + cout << "Sum of " + << data.read() + << " is " << sum.read().to_uint() + << endl; + } +} diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/golden/add_chain.log b/src/systemc/tests/systemc/misc/synth/add_chain/golden/add_chain.log new file mode 100644 index 000000000..35db754ef --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/golden/add_chain.log @@ -0,0 +1,262 @@ +SystemC Simulation +Sum of 00000000 is 0 +Sum of 11111111 is 8 +Sum of 00000000 is 0 +Sum of 00000001 is 1 +Sum of 00000010 is 1 +Sum of 00000011 is 2 +Sum of 00000100 is 1 +Sum of 00000101 is 2 +Sum of 00000110 is 2 +Sum of 00000111 is 3 +Sum of 00001000 is 1 +Sum of 00001001 is 2 +Sum of 00001010 is 2 +Sum of 00001011 is 3 +Sum of 00001100 is 2 +Sum of 00001101 is 3 +Sum of 00001110 is 3 +Sum of 00001111 is 4 +Sum of 00010000 is 1 +Sum of 00010001 is 2 +Sum of 00010010 is 2 +Sum of 00010011 is 3 +Sum of 00010100 is 2 +Sum of 00010101 is 3 +Sum of 00010110 is 3 +Sum of 00010111 is 4 +Sum of 00011000 is 2 +Sum of 00011001 is 3 +Sum of 00011010 is 3 +Sum of 00011011 is 4 +Sum of 00011100 is 3 +Sum of 00011101 is 4 +Sum of 00011110 is 4 +Sum of 00011111 is 5 +Sum of 00100000 is 1 +Sum of 00100001 is 2 +Sum of 00100010 is 2 +Sum of 00100011 is 3 +Sum of 00100100 is 2 +Sum of 00100101 is 3 +Sum of 00100110 is 3 +Sum of 00100111 is 4 +Sum of 00101000 is 2 +Sum of 00101001 is 3 +Sum of 00101010 is 3 +Sum of 00101011 is 4 +Sum of 00101100 is 3 +Sum of 00101101 is 4 +Sum of 00101110 is 4 +Sum of 00101111 is 5 +Sum of 00110000 is 2 +Sum of 00110001 is 3 +Sum of 00110010 is 3 +Sum of 00110011 is 4 +Sum of 00110100 is 3 +Sum of 00110101 is 4 +Sum of 00110110 is 4 +Sum of 00110111 is 5 +Sum of 00111000 is 3 +Sum of 00111001 is 4 +Sum of 00111010 is 4 +Sum of 00111011 is 5 +Sum of 00111100 is 4 +Sum of 00111101 is 5 +Sum of 00111110 is 5 +Sum of 00111111 is 6 +Sum of 01000000 is 1 +Sum of 01000001 is 2 +Sum of 01000010 is 2 +Sum of 01000011 is 3 +Sum of 01000100 is 2 +Sum of 01000101 is 3 +Sum of 01000110 is 3 +Sum of 01000111 is 4 +Sum of 01001000 is 2 +Sum of 01001001 is 3 +Sum of 01001010 is 3 +Sum of 01001011 is 4 +Sum of 01001100 is 3 +Sum of 01001101 is 4 +Sum of 01001110 is 4 +Sum of 01001111 is 5 +Sum of 01010000 is 2 +Sum of 01010001 is 3 +Sum of 01010010 is 3 +Sum of 01010011 is 4 +Sum of 01010100 is 3 +Sum of 01010101 is 4 +Sum of 01010110 is 4 +Sum of 01010111 is 5 +Sum of 01011000 is 3 +Sum of 01011001 is 4 +Sum of 01011010 is 4 +Sum of 01011011 is 5 +Sum of 01011100 is 4 +Sum of 01011101 is 5 +Sum of 01011110 is 5 +Sum of 01011111 is 6 +Sum of 01100000 is 2 +Sum of 01100001 is 3 +Sum of 01100010 is 3 +Sum of 01100011 is 4 +Sum of 01100100 is 3 +Sum of 01100101 is 4 +Sum of 01100110 is 4 +Sum of 01100111 is 5 +Sum of 01101000 is 3 +Sum of 01101001 is 4 +Sum of 01101010 is 4 +Sum of 01101011 is 5 +Sum of 01101100 is 4 +Sum of 01101101 is 5 +Sum of 01101110 is 5 +Sum of 01101111 is 6 +Sum of 01110000 is 3 +Sum of 01110001 is 4 +Sum of 01110010 is 4 +Sum of 01110011 is 5 +Sum of 01110100 is 4 +Sum of 01110101 is 5 +Sum of 01110110 is 5 +Sum of 01110111 is 6 +Sum of 01111000 is 4 +Sum of 01111001 is 5 +Sum of 01111010 is 5 +Sum of 01111011 is 6 +Sum of 01111100 is 5 +Sum of 01111101 is 6 +Sum of 01111110 is 6 +Sum of 01111111 is 7 +Sum of 10000000 is 1 +Sum of 10000001 is 2 +Sum of 10000010 is 2 +Sum of 10000011 is 3 +Sum of 10000100 is 2 +Sum of 10000101 is 3 +Sum of 10000110 is 3 +Sum of 10000111 is 4 +Sum of 10001000 is 2 +Sum of 10001001 is 3 +Sum of 10001010 is 3 +Sum of 10001011 is 4 +Sum of 10001100 is 3 +Sum of 10001101 is 4 +Sum of 10001110 is 4 +Sum of 10001111 is 5 +Sum of 10010000 is 2 +Sum of 10010001 is 3 +Sum of 10010010 is 3 +Sum of 10010011 is 4 +Sum of 10010100 is 3 +Sum of 10010101 is 4 +Sum of 10010110 is 4 +Sum of 10010111 is 5 +Sum of 10011000 is 3 +Sum of 10011001 is 4 +Sum of 10011010 is 4 +Sum of 10011011 is 5 +Sum of 10011100 is 4 +Sum of 10011101 is 5 +Sum of 10011110 is 5 +Sum of 10011111 is 6 +Sum of 10100000 is 2 +Sum of 10100001 is 3 +Sum of 10100010 is 3 +Sum of 10100011 is 4 +Sum of 10100100 is 3 +Sum of 10100101 is 4 +Sum of 10100110 is 4 +Sum of 10100111 is 5 +Sum of 10101000 is 3 +Sum of 10101001 is 4 +Sum of 10101010 is 4 +Sum of 10101011 is 5 +Sum of 10101100 is 4 +Sum of 10101101 is 5 +Sum of 10101110 is 5 +Sum of 10101111 is 6 +Sum of 10110000 is 3 +Sum of 10110001 is 4 +Sum of 10110010 is 4 +Sum of 10110011 is 5 +Sum of 10110100 is 4 +Sum of 10110101 is 5 +Sum of 10110110 is 5 +Sum of 10110111 is 6 +Sum of 10111000 is 4 +Sum of 10111001 is 5 +Sum of 10111010 is 5 +Sum of 10111011 is 6 +Sum of 10111100 is 5 +Sum of 10111101 is 6 +Sum of 10111110 is 6 +Sum of 10111111 is 7 +Sum of 11000000 is 2 +Sum of 11000001 is 3 +Sum of 11000010 is 3 +Sum of 11000011 is 4 +Sum of 11000100 is 3 +Sum of 11000101 is 4 +Sum of 11000110 is 4 +Sum of 11000111 is 5 +Sum of 11001000 is 3 +Sum of 11001001 is 4 +Sum of 11001010 is 4 +Sum of 11001011 is 5 +Sum of 11001100 is 4 +Sum of 11001101 is 5 +Sum of 11001110 is 5 +Sum of 11001111 is 6 +Sum of 11010000 is 3 +Sum of 11010001 is 4 +Sum of 11010010 is 4 +Sum of 11010011 is 5 +Sum of 11010100 is 4 +Sum of 11010101 is 5 +Sum of 11010110 is 5 +Sum of 11010111 is 6 +Sum of 11011000 is 4 +Sum of 11011001 is 5 +Sum of 11011010 is 5 +Sum of 11011011 is 6 +Sum of 11011100 is 5 +Sum of 11011101 is 6 +Sum of 11011110 is 6 +Sum of 11011111 is 7 +Sum of 11100000 is 3 +Sum of 11100001 is 4 +Sum of 11100010 is 4 +Sum of 11100011 is 5 +Sum of 11100100 is 4 +Sum of 11100101 is 5 +Sum of 11100110 is 5 +Sum of 11100111 is 6 +Sum of 11101000 is 4 +Sum of 11101001 is 5 +Sum of 11101010 is 5 +Sum of 11101011 is 6 +Sum of 11101100 is 5 +Sum of 11101101 is 6 +Sum of 11101110 is 6 +Sum of 11101111 is 7 +Sum of 11110000 is 4 +Sum of 11110001 is 5 +Sum of 11110010 is 5 +Sum of 11110011 is 6 +Sum of 11110100 is 5 +Sum of 11110101 is 6 +Sum of 11110110 is 6 +Sum of 11110111 is 7 +Sum of 11111000 is 5 +Sum of 11111001 is 6 +Sum of 11111010 is 6 +Sum of 11111011 is 7 +Sum of 11111100 is 6 +Sum of 11111101 is 7 +Sum of 11111110 is 7 +Sum of 11111111 is 8 +Sum of 11111111 is 8 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/reset_stim.h b/src/systemc/tests/systemc/misc/synth/add_chain/reset_stim.h new file mode 100644 index 000000000..437e52b2f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/reset_stim.h @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + reset_stim.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "define.h" + +/******************************************************************************/ +/*************************** reset_stim Function **********************/ +/******************************************************************************/ +bool_vector8 mem [LIMIT + 1]; // Stimulus input memory + +SC_MODULE( RESET_STIM ) +{ + SC_HAS_PROCESS( RESET_STIM ); + + sc_in_clk clk; + + /*** Input and Output Ports ***/ + sc_signal& ready; + sc_signal& reset; + sc_signal& addr; + + /*** Constructor ***/ + RESET_STIM ( sc_module_name NAME, + sc_clock& TICK_N, + sc_signal& READY, + sc_signal& RESET, + sc_signal& ADDR ) + + : + ready (READY), + reset (RESET), + addr (ADDR) + + { + clk (TICK_N); + SC_CTHREAD( entry, clk.neg() ); + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +RESET_STIM::entry() +{ + +// LOAD MEMORY WITH DATA AT TIME ZERO + + ifstream stimulus ("add_chain/add_chain.dat"); + char buffer[WIDTH+1]; + + for(int i=1; i < LIMIT+1; i++) { + stimulus >> buffer; + mem[i] = buffer; + } + + stimulus.close(); + +// INITIALIZE reset AND addr, THEN REMOVE RESET AFTER 2 CLOCK CYCLES + + reset.write(0); // reset = 0 + addr.write(1); // addr = 1 + wait(2); + + reset.write(1); // reset = 1 + wait(); + +// WAIT FOR LAST MEMORY ADDRESS, THEN 3 CLOCKS, THEN STOP SIMULATION + + // do { wait(); } while (addr == LIMIT); + do { wait(); } while (!(addr == LIMIT)); + wait(LATENCY); + do { wait(); } while (ready != 1); + sc_stop(); + halt(); +} diff --git a/src/systemc/tests/systemc/misc/synth/add_chain/tb.h b/src/systemc/tests/systemc/misc/synth/add_chain/tb.h new file mode 100644 index 000000000..bf96292dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain/tb.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** Testbench Function **********************/ +/******************************************************************************/ +/* */ +/* The testbench module has the following hierarchy: */ +/* */ +/* testbench */ +/* - RESET_STIM */ +/* - DATA_GEN */ +/* */ +/******************************************************************************/ + +struct testbench : public sc_module { + sc_signal addr; // Address of input memory + sc_signal reset; + sc_signal ready; + signal_bool_vector8 data; + signal_bool_vector4 sum; + RESET_STIM rd1; + DATA_GEN dg1; + ADD_CHAIN ac1; + DISPLAY d1; + + /*** Constructor ***/ + testbench ( const sc_module_name& NAME, + sc_clock& TICK ) + + : sc_module(), + rd1 ("RD1", TICK, ready, reset, addr), + dg1 ("DG1", TICK, ready, data, addr), + ac1 ("AC1", TICK, reset, data, sum, ready), + d1 ("D1", ready, data, sum) + + { + end_module(); + } +}; diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain.cpp b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain.cpp new file mode 100644 index 000000000..143d1aa67 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + add_chain.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +/******************************************************************************/ +/*************************** add_chain Class Definition ********************/ +/******************************************************************************/ + +SC_MODULE( add_chain ) +{ + SC_HAS_PROCESS( add_chain ); + + sc_in_clk clk; + + const sc_signal& rst; + const signal_bool_vector8& a_in; + signal_bool_vector4& sum_out; + sc_signal& ready; + + add_chain( sc_module_name NAME, + sc_clock& TICK_P, + + const sc_signal& RST, + const signal_bool_vector8& A_IN, + signal_bool_vector4& SUM_OUT, + sc_signal& READY + ) + : + rst (RST), + a_in (A_IN), + sum_out (SUM_OUT), + ready (READY) + { + clk(TICK_P); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(rst,0); + } + void entry(); +}; + +/******************************************************************************/ +/*************************** add_chain Entry Function **********************/ +/******************************************************************************/ +/** **/ +/** This function sums the number of 1's contained in a 8-bit data stream **/ +/** **/ +/******************************************************************************/ +void +add_chain::entry() +{ + bool_vector4 sum; + bool_vector8 a; + + /***** Reset Initialization *****/ + sum_out.write(0); + ready.write(1); + wait(); + + /***** MAIN LOOP *****/ + while(true) { + a = a_in; + + /***** Handshake *****/ + ready.write(0); + wait(); + + /***** Computation *****/ + sum = 0; + + for (int i=0; i<=7; i=i+1) { + sum = sum.to_uint() + a[i].to_bool(); + } + + sum_out.write(sum); + + /***** Handshake *****/ + ready.write(1); + wait(); + } +} + +void +f_add_chain( const char* NAME, + sc_clock& TICK, + const sc_signal& RST, + const signal_bool_vector8& A_IN, + signal_bool_vector4& SUM_OUT, + sc_signal& READY ) + +{ + new add_chain(NAME, TICK, RST, A_IN, SUM_OUT, READY); +} + diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain.dat b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain.dat new file mode 100644 index 000000000..f6352869f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain.dat @@ -0,0 +1,257 @@ +11111111 +00000000 +00000001 +00000010 +00000011 +00000100 +00000101 +00000110 +00000111 +00001000 +00001001 +00001010 +00001011 +00001100 +00001101 +00001110 +00001111 +00010000 +00010001 +00010010 +00010011 +00010100 +00010101 +00010110 +00010111 +00011000 +00011001 +00011010 +00011011 +00011100 +00011101 +00011110 +00011111 +00100000 +00100001 +00100010 +00100011 +00100100 +00100101 +00100110 +00100111 +00101000 +00101001 +00101010 +00101011 +00101100 +00101101 +00101110 +00101111 +00110000 +00110001 +00110010 +00110011 +00110100 +00110101 +00110110 +00110111 +00111000 +00111001 +00111010 +00111011 +00111100 +00111101 +00111110 +00111111 +01000000 +01000001 +01000010 +01000011 +01000100 +01000101 +01000110 +01000111 +01001000 +01001001 +01001010 +01001011 +01001100 +01001101 +01001110 +01001111 +01010000 +01010001 +01010010 +01010011 +01010100 +01010101 +01010110 +01010111 +01011000 +01011001 +01011010 +01011011 +01011100 +01011101 +01011110 +01011111 +01100000 +01100001 +01100010 +01100011 +01100100 +01100101 +01100110 +01100111 +01101000 +01101001 +01101010 +01101011 +01101100 +01101101 +01101110 +01101111 +01110000 +01110001 +01110010 +01110011 +01110100 +01110101 +01110110 +01110111 +01111000 +01111001 +01111010 +01111011 +01111100 +01111101 +01111110 +01111111 +10000000 +10000001 +10000010 +10000011 +10000100 +10000101 +10000110 +10000111 +10001000 +10001001 +10001010 +10001011 +10001100 +10001101 +10001110 +10001111 +10010000 +10010001 +10010010 +10010011 +10010100 +10010101 +10010110 +10010111 +10011000 +10011001 +10011010 +10011011 +10011100 +10011101 +10011110 +10011111 +10100000 +10100001 +10100010 +10100011 +10100100 +10100101 +10100110 +10100111 +10101000 +10101001 +10101010 +10101011 +10101100 +10101101 +10101110 +10101111 +10110000 +10110001 +10110010 +10110011 +10110100 +10110101 +10110110 +10110111 +10111000 +10111001 +10111010 +10111011 +10111100 +10111101 +10111110 +10111111 +11000000 +11000001 +11000010 +11000011 +11000100 +11000101 +11000110 +11000111 +11001000 +11001001 +11001010 +11001011 +11001100 +11001101 +11001110 +11001111 +11010000 +11010001 +11010010 +11010011 +11010100 +11010101 +11010110 +11010111 +11011000 +11011001 +11011010 +11011011 +11011100 +11011101 +11011110 +11011111 +11100000 +11100001 +11100010 +11100011 +11100100 +11100101 +11100110 +11100111 +11101000 +11101001 +11101010 +11101011 +11101100 +11101101 +11101110 +11101111 +11110000 +11110001 +11110010 +11110011 +11110100 +11110101 +11110110 +11110111 +11111000 +11111001 +11111010 +11111011 +11111100 +11111101 +11111110 +11111111 diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain.h b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain.h new file mode 100644 index 000000000..61214c3bc --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + add_chain.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define LIMIT 257 // Last stimulus vector memory address location +#define WIDTH 8 // Width of stimulus vector +#define LATENCY 3 // Latency of sum + + + +extern bool_vector8 mem[]; + +extern void f_RESET_STIM (const char*, + sc_clock&, + sc_signal&, + sc_signal&, + sc_signal& ); + +extern void f_DATA_GEN (const char*, + sc_clock&, + const sc_signal&, + signal_bool_vector8&, + sc_signal& ); + +extern void f_add_chain (const char*, + sc_clock&, + const sc_signal&, + const signal_bool_vector8&, + signal_bool_vector4&, + sc_signal& ); + +extern void f_DISPLAY (const char*, + const sc_signal&, + const signal_bool_vector8&, + const signal_bool_vector4&); + diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain_FUNC.f b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain_FUNC.f new file mode 100644 index 000000000..e7ac3f3b0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain_FUNC.f @@ -0,0 +1,5 @@ +add_chain_FUNC/add_chain.cpp +add_chain_FUNC/reset_stim.cpp +add_chain_FUNC/data_gen.cpp +add_chain_FUNC/display.cpp +add_chain_FUNC/add_chain_main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain_main.cpp b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain_main.cpp new file mode 100644 index 000000000..5bb91b5d9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain_main.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + add_chain_main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: add_chain_main.cpp,v $ +// Revision 1.2 2011/09/05 21:23:35 acg +// Philipp A. Hartmann: eliminate compiler warnings. +// +// Revision 1.1.1.1 2006/12/15 20:26:13 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:23 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/20 00:43:23 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.2 2006/01/19 00:47:31 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// + +#include "common.h" +#include "add_chain.h" +#include "add_chain_tb.h" /** Definition of testbench Structure **/ + +int +sc_main(int ac, char *av[]) +{ + sc_clock clk( "CLOCK", 20, SC_NS, 0.5, 10, SC_NS); // Clock function + testbench tb1("TB1", clk ); // Testbench Instance + sc_start(); // Simulation runs forever + // due to negative value + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain_tb.h b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain_tb.h new file mode 100644 index 000000000..6900f7fc0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/add_chain_tb.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + add_chain_tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** Testbench Function **********************/ +/******************************************************************************/ +/* */ +/* The testbench module has the following hierarchy: */ +/* */ +/* testbench */ +/* - RESET_STIM */ +/* - DATA_GEN */ +/* */ +/******************************************************************************/ + +#include "common.h" + +struct testbench : public sc_module { + sc_signal addr; // Address of input memory + sc_signal reset; + sc_signal ready; + signal_bool_vector8 data; + signal_bool_vector4 sum; + + /*** Constructor ***/ + testbench ( const sc_module_name& NAME, + sc_clock& TICK ) + + : sc_module() + { + f_RESET_STIM ("RD1", TICK, ready, reset, addr); + f_DATA_GEN ("DG1", TICK, ready, data, addr); + f_add_chain ("AC1", TICK, reset, data, sum, ready); + f_DISPLAY ("D1", ready, data, sum); + } +}; diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/common.h b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/common.h new file mode 100644 index 000000000..850b96ab7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#define SC_NO_WRITE_CHECK +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<8> bool_vector8; +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/data_gen.cpp b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/data_gen.cpp new file mode 100644 index 000000000..6b0ea3306 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/data_gen.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + data_gen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" +#include "add_chain.h" + +/******************************************************************************/ +/*************************** data_gen Function **********************/ +/******************************************************************************/ + +SC_MODULE( DATA_GEN ) +{ + SC_HAS_PROCESS( DATA_GEN ); + + sc_in_clk clk; + + /*** Input and Output Ports ***/ + const sc_signal& ready; + signal_bool_vector8& data; + sc_signal& addr; + + /*** Constructor ***/ + DATA_GEN ( sc_module_name NAME, + sc_clock& TICK_N, + const sc_signal& READY, + signal_bool_vector8& DATA, + sc_signal& ADDR ) + + : + ready (READY), + data (DATA), // 8 bits + addr (ADDR) + + { + clk (TICK_N); + SC_CTHREAD( entry, clk.neg() ); + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +DATA_GEN::entry() +{ + while(true) { + +/** WAIT FOR POSEDGE OF ready **/ + + do { wait(); } while (ready == 1); // Posedge ready + do { wait(); } while (ready == 0); + +/** CHECK TO SEE IF THE END OF MEMORY HAS BEEN REACHED **/ + + if(addr.read() > LIMIT) { // if(addr > LIMIT) + break; + } + +/** WRITE VALUE OF MEMORY AT CURRENT ADDRESS TO data **/ + + data.write(mem[addr.read()]); // data = mem[addr] + +/** INCREMENT addr BY 1 **/ + + addr.write(addr.read() + 1); // addr = addr + 1 + } + +} + +void +f_DATA_GEN ( const char* NAME, + sc_clock& TICK, + const sc_signal& READY, + signal_bool_vector8& DATA, + sc_signal& ADDR ) + +{ + new DATA_GEN(NAME, TICK, READY, DATA, ADDR); +} + diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/display.cpp b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/display.cpp new file mode 100644 index 000000000..ebda9e56e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/display.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" +#include "add_chain.h" + +/******************************************************************************/ +/*************************** Output Display Function **********************/ +/******************************************************************************/ + +SC_MODULE( DISPLAY ) +{ + SC_HAS_PROCESS( DISPLAY ); + + /*** Input and Output Ports ***/ + const sc_signal& ready; // Input + const signal_bool_vector8& data; // Input + const signal_bool_vector4& sum; // Input + + /*** Constructor ***/ + DISPLAY ( sc_module_name NAME, + const sc_signal& READY, + const signal_bool_vector8& DATA, + const signal_bool_vector4& SUM ) + + : ready (READY), + data (DATA), // 8 bits + sum (SUM) + + { + SC_METHOD( entry ); + sensitive << ready; + sensitive << data; + sensitive << sum; + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +DISPLAY::entry() +{ +// DISPLAY NUMBER OF 1'S IN DATA AT NEGEDGE ready + + if( ready.posedge() ) { + cout << "Sum of " + << data.read() + << " is " << sum.read().to_uint() + << endl; + } +} + +void +f_DISPLAY ( const char* NAME, + const sc_signal& READY, + const signal_bool_vector8& DATA, + const signal_bool_vector4& SUM ) + +{ + new DISPLAY(NAME, READY, DATA, SUM); +} + diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/golden/add_chain_FUNC.log b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/golden/add_chain_FUNC.log new file mode 100644 index 000000000..0b991ff63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/golden/add_chain_FUNC.log @@ -0,0 +1,263 @@ +SystemC Simulation +Sum of 00000000 is 0 +Sum of 00000000 is 0 +Sum of 11111111 is 8 +Sum of 00000000 is 0 +Sum of 00000001 is 1 +Sum of 00000010 is 1 +Sum of 00000011 is 2 +Sum of 00000100 is 1 +Sum of 00000101 is 2 +Sum of 00000110 is 2 +Sum of 00000111 is 3 +Sum of 00001000 is 1 +Sum of 00001001 is 2 +Sum of 00001010 is 2 +Sum of 00001011 is 3 +Sum of 00001100 is 2 +Sum of 00001101 is 3 +Sum of 00001110 is 3 +Sum of 00001111 is 4 +Sum of 00010000 is 1 +Sum of 00010001 is 2 +Sum of 00010010 is 2 +Sum of 00010011 is 3 +Sum of 00010100 is 2 +Sum of 00010101 is 3 +Sum of 00010110 is 3 +Sum of 00010111 is 4 +Sum of 00011000 is 2 +Sum of 00011001 is 3 +Sum of 00011010 is 3 +Sum of 00011011 is 4 +Sum of 00011100 is 3 +Sum of 00011101 is 4 +Sum of 00011110 is 4 +Sum of 00011111 is 5 +Sum of 00100000 is 1 +Sum of 00100001 is 2 +Sum of 00100010 is 2 +Sum of 00100011 is 3 +Sum of 00100100 is 2 +Sum of 00100101 is 3 +Sum of 00100110 is 3 +Sum of 00100111 is 4 +Sum of 00101000 is 2 +Sum of 00101001 is 3 +Sum of 00101010 is 3 +Sum of 00101011 is 4 +Sum of 00101100 is 3 +Sum of 00101101 is 4 +Sum of 00101110 is 4 +Sum of 00101111 is 5 +Sum of 00110000 is 2 +Sum of 00110001 is 3 +Sum of 00110010 is 3 +Sum of 00110011 is 4 +Sum of 00110100 is 3 +Sum of 00110101 is 4 +Sum of 00110110 is 4 +Sum of 00110111 is 5 +Sum of 00111000 is 3 +Sum of 00111001 is 4 +Sum of 00111010 is 4 +Sum of 00111011 is 5 +Sum of 00111100 is 4 +Sum of 00111101 is 5 +Sum of 00111110 is 5 +Sum of 00111111 is 6 +Sum of 01000000 is 1 +Sum of 01000001 is 2 +Sum of 01000010 is 2 +Sum of 01000011 is 3 +Sum of 01000100 is 2 +Sum of 01000101 is 3 +Sum of 01000110 is 3 +Sum of 01000111 is 4 +Sum of 01001000 is 2 +Sum of 01001001 is 3 +Sum of 01001010 is 3 +Sum of 01001011 is 4 +Sum of 01001100 is 3 +Sum of 01001101 is 4 +Sum of 01001110 is 4 +Sum of 01001111 is 5 +Sum of 01010000 is 2 +Sum of 01010001 is 3 +Sum of 01010010 is 3 +Sum of 01010011 is 4 +Sum of 01010100 is 3 +Sum of 01010101 is 4 +Sum of 01010110 is 4 +Sum of 01010111 is 5 +Sum of 01011000 is 3 +Sum of 01011001 is 4 +Sum of 01011010 is 4 +Sum of 01011011 is 5 +Sum of 01011100 is 4 +Sum of 01011101 is 5 +Sum of 01011110 is 5 +Sum of 01011111 is 6 +Sum of 01100000 is 2 +Sum of 01100001 is 3 +Sum of 01100010 is 3 +Sum of 01100011 is 4 +Sum of 01100100 is 3 +Sum of 01100101 is 4 +Sum of 01100110 is 4 +Sum of 01100111 is 5 +Sum of 01101000 is 3 +Sum of 01101001 is 4 +Sum of 01101010 is 4 +Sum of 01101011 is 5 +Sum of 01101100 is 4 +Sum of 01101101 is 5 +Sum of 01101110 is 5 +Sum of 01101111 is 6 +Sum of 01110000 is 3 +Sum of 01110001 is 4 +Sum of 01110010 is 4 +Sum of 01110011 is 5 +Sum of 01110100 is 4 +Sum of 01110101 is 5 +Sum of 01110110 is 5 +Sum of 01110111 is 6 +Sum of 01111000 is 4 +Sum of 01111001 is 5 +Sum of 01111010 is 5 +Sum of 01111011 is 6 +Sum of 01111100 is 5 +Sum of 01111101 is 6 +Sum of 01111110 is 6 +Sum of 01111111 is 7 +Sum of 10000000 is 1 +Sum of 10000001 is 2 +Sum of 10000010 is 2 +Sum of 10000011 is 3 +Sum of 10000100 is 2 +Sum of 10000101 is 3 +Sum of 10000110 is 3 +Sum of 10000111 is 4 +Sum of 10001000 is 2 +Sum of 10001001 is 3 +Sum of 10001010 is 3 +Sum of 10001011 is 4 +Sum of 10001100 is 3 +Sum of 10001101 is 4 +Sum of 10001110 is 4 +Sum of 10001111 is 5 +Sum of 10010000 is 2 +Sum of 10010001 is 3 +Sum of 10010010 is 3 +Sum of 10010011 is 4 +Sum of 10010100 is 3 +Sum of 10010101 is 4 +Sum of 10010110 is 4 +Sum of 10010111 is 5 +Sum of 10011000 is 3 +Sum of 10011001 is 4 +Sum of 10011010 is 4 +Sum of 10011011 is 5 +Sum of 10011100 is 4 +Sum of 10011101 is 5 +Sum of 10011110 is 5 +Sum of 10011111 is 6 +Sum of 10100000 is 2 +Sum of 10100001 is 3 +Sum of 10100010 is 3 +Sum of 10100011 is 4 +Sum of 10100100 is 3 +Sum of 10100101 is 4 +Sum of 10100110 is 4 +Sum of 10100111 is 5 +Sum of 10101000 is 3 +Sum of 10101001 is 4 +Sum of 10101010 is 4 +Sum of 10101011 is 5 +Sum of 10101100 is 4 +Sum of 10101101 is 5 +Sum of 10101110 is 5 +Sum of 10101111 is 6 +Sum of 10110000 is 3 +Sum of 10110001 is 4 +Sum of 10110010 is 4 +Sum of 10110011 is 5 +Sum of 10110100 is 4 +Sum of 10110101 is 5 +Sum of 10110110 is 5 +Sum of 10110111 is 6 +Sum of 10111000 is 4 +Sum of 10111001 is 5 +Sum of 10111010 is 5 +Sum of 10111011 is 6 +Sum of 10111100 is 5 +Sum of 10111101 is 6 +Sum of 10111110 is 6 +Sum of 10111111 is 7 +Sum of 11000000 is 2 +Sum of 11000001 is 3 +Sum of 11000010 is 3 +Sum of 11000011 is 4 +Sum of 11000100 is 3 +Sum of 11000101 is 4 +Sum of 11000110 is 4 +Sum of 11000111 is 5 +Sum of 11001000 is 3 +Sum of 11001001 is 4 +Sum of 11001010 is 4 +Sum of 11001011 is 5 +Sum of 11001100 is 4 +Sum of 11001101 is 5 +Sum of 11001110 is 5 +Sum of 11001111 is 6 +Sum of 11010000 is 3 +Sum of 11010001 is 4 +Sum of 11010010 is 4 +Sum of 11010011 is 5 +Sum of 11010100 is 4 +Sum of 11010101 is 5 +Sum of 11010110 is 5 +Sum of 11010111 is 6 +Sum of 11011000 is 4 +Sum of 11011001 is 5 +Sum of 11011010 is 5 +Sum of 11011011 is 6 +Sum of 11011100 is 5 +Sum of 11011101 is 6 +Sum of 11011110 is 6 +Sum of 11011111 is 7 +Sum of 11100000 is 3 +Sum of 11100001 is 4 +Sum of 11100010 is 4 +Sum of 11100011 is 5 +Sum of 11100100 is 4 +Sum of 11100101 is 5 +Sum of 11100110 is 5 +Sum of 11100111 is 6 +Sum of 11101000 is 4 +Sum of 11101001 is 5 +Sum of 11101010 is 5 +Sum of 11101011 is 6 +Sum of 11101100 is 5 +Sum of 11101101 is 6 +Sum of 11101110 is 6 +Sum of 11101111 is 7 +Sum of 11110000 is 4 +Sum of 11110001 is 5 +Sum of 11110010 is 5 +Sum of 11110011 is 6 +Sum of 11110100 is 5 +Sum of 11110101 is 6 +Sum of 11110110 is 6 +Sum of 11110111 is 7 +Sum of 11111000 is 5 +Sum of 11111001 is 6 +Sum of 11111010 is 6 +Sum of 11111011 is 7 +Sum of 11111100 is 6 +Sum of 11111101 is 7 +Sum of 11111110 is 7 +Sum of 11111111 is 8 +Sum of 11111111 is 8 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/reset_stim.cpp b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/reset_stim.cpp new file mode 100644 index 000000000..7ce054971 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/reset_stim.cpp @@ -0,0 +1,122 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + reset_stim.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" +#include "add_chain.h" + +/******************************************************************************/ +/*************************** reset_stim Function **********************/ +/******************************************************************************/ +bool_vector8 mem[LIMIT + 1]; // Stimulus input memory + +SC_MODULE( RESET_STIM ) +{ + SC_HAS_PROCESS( RESET_STIM ); + + sc_in_clk clk; + + /*** Input and Output Ports ***/ + sc_signal& ready; + sc_signal& reset; + sc_signal& addr; + + /*** Constructor ***/ + RESET_STIM ( sc_module_name NAME, + sc_clock& TICK_N, + sc_signal& READY, + sc_signal& RESET, + sc_signal& ADDR ) + + : + ready (READY), + reset (RESET), + addr (ADDR) + + { + clk (TICK_N); + SC_CTHREAD( entry, clk.neg() ); + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +RESET_STIM::entry() +{ + +/** LOAD MEMORY WITH DATA AT TIME ZERO **/ + + ifstream stimulus ("add_chain_FUNC/add_chain.dat"); + char buffer[WIDTH+1]; + + for(int i=1; i < LIMIT+1; i++) { + stimulus >> buffer; + mem[i] = buffer; + } + + stimulus.close(); + +/** INITIALIZE reset AND addr, THEN REMOVE RESET AFTER 2 CLOCK CYCLES **/ + + reset.write(0); // reset = 0 + addr.write(1); // addr = 1 + wait(2); + + reset.write(1); // reset = 1 + +/** WAIT FOR LAST MEMORY ADDRESS, THEN 3 CLOCKS, THEN STOP SIMULATION **/ + +// do { wait(); } while (addr == LIMIT); + do { wait(); } while (!(addr == LIMIT)); + wait(LATENCY); + do { wait(); } while (ready != 1); + sc_stop(); + halt(); +} + +void +f_RESET_STIM ( const char* NAME, + sc_clock& TICK, + sc_signal& READY, + sc_signal& RESET, + sc_signal& ADDR ) + +{ + new RESET_STIM(NAME, TICK, READY,RESET, ADDR); +} diff --git a/src/systemc/tests/systemc/misc/synth/blast/blast1/blast1.cpp b/src/systemc/tests/systemc/misc/synth/blast/blast1/blast1.cpp new file mode 100644 index 000000000..7e422a0ad --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/blast/blast1/blast1.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + blast1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( array ) +{ + SC_HAS_PROCESS( array ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + + char mem[4]; + sc_unsigned i, j; + + array( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESET, + const sc_signal& A, + const sc_signal& B, + sc_signal& C ) + : + reset(RESET), a(A), b(B), c(C), + i(2), j(2) + { + clk(CLK); + SC_CTHREAD( entry, clk ); + reset_signal_is(reset,true); + } + void entry(); +}; + +void +array::entry() +{ + i = 1; + j = 2; + mem[i.to_uint()] = a.read(); + mem[j.to_uint()] = b.read(); + c = mem[i.to_uint()] * mem[j.to_uint()]; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/blast/blast1/golden/blast1.log b/src/systemc/tests/systemc/misc/synth/blast/blast1/golden/blast1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/blast/blast1/golden/blast1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/blast/blast2/blast2.cpp b/src/systemc/tests/systemc/misc/synth/blast/blast2/blast2.cpp new file mode 100644 index 000000000..51035fea1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/blast/blast2/blast2.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + blast2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( array ) +{ + SC_HAS_PROCESS( array ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + + char mem[9]; + sc_unsigned i, j; + + array( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESET, + const sc_signal& A, + const sc_signal& B, + sc_signal& C ) + : + reset(RESET), a(A), b(B), c(C), + i(2), j(2) + { + clk(CLK); + SC_CTHREAD( entry, clk ); + reset_signal_is(reset,true); + } + void entry(); +}; + +void +array::entry() +{ + i = 2; + j = 1; + mem[i.to_uint()] = a.read(); + mem[j.to_uint()] = b.read(); + mem[7] = i.to_uint(); + mem[8] = j.to_uint(); + mem[mem[7]] = a + 1; + mem[mem[8]] = b - 2; + c = mem[i.to_uint()] * mem[j.to_uint()]; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/blast/blast2/golden/blast2.log b/src/systemc/tests/systemc/misc/synth/blast/blast2/golden/blast2.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/blast/blast2/golden/blast2.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/blast/blast3/blast3.cpp b/src/systemc/tests/systemc/misc/synth/blast/blast3/blast3.cpp new file mode 100644 index 000000000..73d831d56 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/blast/blast3/blast3.cpp @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + blast3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( array ) +{ + SC_HAS_PROCESS( array ); + + sc_in_clk clk; + + const sc_signal& reset; + sc_signal& ready; + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + + char mem[17]; + sc_unsigned i, j; + + array( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESET, + sc_signal& READY, + const sc_signal& A, + const sc_signal& B, + sc_signal& C ) + : + reset(RESET), ready(READY), + a(A), b(B), c(C), + i(2), j(2) + { + clk(CLK); + SC_CTHREAD( entry, clk ); + reset_signal_is(reset,true); + } + void entry(); +}; + +void +array::entry() +{ + i = 2; + j = 1; + ready = 0; + mem[i.to_uint()] = a.read(); + mem[j.to_uint()] = b.read(); + mem[14] = i.to_uint(); + mem[12] = j.to_uint(); + wait(); + mem[mem[14]] = a + 1; + mem[mem[12]] = b - 2; + c = mem[i.to_uint()] * mem[j.to_uint()]; + ready = 1; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/synth/blast/blast3/golden/blast3.log b/src/systemc/tests/systemc/misc/synth/blast/blast3/golden/blast3.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/blast/blast3/golden/blast3.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/bubble/bubble.cpp b/src/systemc/tests/systemc/misc/synth/bubble/bubble.cpp new file mode 100644 index 000000000..5c4e0bc58 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/bubble/bubble.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bubble.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "display.h" +#include "stim.h" +#include "bubble.h" +#include "tb.h" + +int +sc_main(int ac, char *av[]) +{ + sc_clock clk( "clk", 20, SC_NS, 0.5, 0, SC_NS, false); // Clock function + + TESTBENCH tb("TB", clk ); + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/bubble/bubble.h b/src/systemc/tests/systemc/misc/synth/bubble/bubble.h new file mode 100644 index 000000000..0ac59374c --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/bubble/bubble.h @@ -0,0 +1,216 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bubble.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** bubble Class Definition ********************/ +/******************************************************************************/ + +#include "common.h" + +SC_MODULE( BUBBLE ) +{ + SC_HAS_PROCESS( BUBBLE ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& in_ok; + const sc_signal& out_ok; + sc_signal& instrb; + sc_signal& outstrb; + const signal_bool_vector &a1,&a2,&a3,&a4,&a5,&a6,&a7,&a8;// -128 to 127 + signal_bool_vector &d1,&d2,&d3,&d4,&d5,&d6,&d7,&d8;// -128 to 127 + + BUBBLE( sc_module_name NAME, + sc_clock& TICK_P, + const sc_signal& RESET, + const sc_signal& IN_OK, + const sc_signal& OUT_OK, + sc_signal& INSTRB, + sc_signal& OUTSTRB, + const signal_bool_vector& A1, + const signal_bool_vector& A2, + const signal_bool_vector& A3, + const signal_bool_vector& A4, + const signal_bool_vector& A5, + const signal_bool_vector& A6, + const signal_bool_vector& A7, + const signal_bool_vector& A8, + signal_bool_vector& D1, + signal_bool_vector& D2, + signal_bool_vector& D3, + signal_bool_vector& D4, + signal_bool_vector& D5, + signal_bool_vector& D6, + signal_bool_vector& D7, + signal_bool_vector& D8 + ) + : + reset (RESET), + in_ok (IN_OK), + out_ok (OUT_OK), + instrb (INSTRB), + outstrb (OUTSTRB), + a1 (A1), a2(A2), a3(A3), a4(A4), + a5 (A5), a6(A6), a7(A7), a8(A8), + d1 (D1), d2(D2), d3(D3), d4(D4), + d5 (D5), d6(D6), d7(D7), d8(D8) + { + clk(TICK_P); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + } + void entry(); +}; + +/******************************************************************************/ +/*************************** bubble Entry Function **********************/ +/******************************************************************************/ +/** **/ +/** This function is most likely a bubble sort algorithm ??? **/ +/** **/ +/******************************************************************************/ +void +BUBBLE::entry() +{ + bool_vector B[9]; + bool_vector C[9]; + int minel; + int x; + int i; + int j; + +// RESET INITIALIZATION + + while(true) { + + instrb.write(false); + outstrb.write(false); + minel = -500; + x = 0; + d1.write(0); + d2.write(0); + d3.write(0); + d4.write(0); + d5.write(0); + d6.write(0); + d7.write(0); + d8.write(0); + for (i = 1; i <= 8; i++) { + B[i] = 0; + } + for (i = 1; i <= 8; i++) { + C[i] = 0; + } + wait(); + +// READY SIGNAL FOR INPUT DATA + + wait(); + instrb.write(true); + wait(); + +// INPUT HANDSHAKE & INPUT READ + + do { wait(); } while (!in_ok); + + instrb.write(false); + wait(); + + B[1] = a1.read(); B[2] = a2.read(); B[3] = a3.read(); B[4] = a4.read(); + B[5] = a5.read(); B[6] = a6.read(); B[7] = a7.read(); B[8] = a8.read(); + wait(); + +lout << "STARTING BUBBLE SORT" << endl; +// BUBBLE SORT ALGORITHM + + // EVERY ELEMENT + for (i = 1; i <= 7; i++) { + + if (B[i].to_int() > B[i+1].to_int()) { // if #1 + for (j = 1; j <= 8; j++) { + C[j] = B[j]; // COPY + } + + B[i] = B[i+1]; + B[i+1] = C[i]; + minel = C[i].to_int(); // MOVE + + for (j = 1; j <= 8; j++) { + C[j] = B[j]; // COPY + } + + if (i >= 2) { // if #2 + x = i; + while (x > 1) { + if (B[x].to_int() > B[x-1].to_int()) { + break; + } + else { + for (j = 1; j <= 8; j++) { + C[j] = B[j]; + } + + B[x] = B[x-1]; + B[x-1] = C[x]; // MOVE + + for (j = 1; j <= 8; j++) { + C[j] = B[j]; // COPY + } + } // end else + x = x-1; + } // end WHL Loop + } // end if #2 + } // end if #1; + } // end FL3 Loop + wait(); + +// WRITE OUTPUT & OUTPUT HANDSHAKE + + d1.write(C[1]); d2.write(C[2]); d3.write(C[3]); d4.write(C[4]); + d5.write(C[5]); d6.write(C[6]); d7.write(C[7]); d8.write(C[8]); + outstrb.write(true); // Ready to give output data + wait(); + + do { wait(); } while (!out_ok); + + outstrb.write(false); + wait(); + + } // end Reset Loop + +} diff --git a/src/systemc/tests/systemc/misc/synth/bubble/common.h b/src/systemc/tests/systemc/misc/synth/bubble/common.h new file mode 100644 index 000000000..3ea41ad75 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/bubble/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<8> bool_vector; +typedef sc_signal signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/synth/bubble/display.h b/src/systemc/tests/systemc/misc/synth/bubble/display.h new file mode 100644 index 000000000..b66c02626 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/bubble/display.h @@ -0,0 +1,163 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +/****************************************************************/ +/** Display to standard out and to logfile "systemc.log" **/ +/****************************************************************/ + +ofstream lout ("systemc.log"); // Output log file + +/******************************************************************************/ +/*************************** Output Display Function **********************/ +/******************************************************************************/ + +SC_MODULE( DISPLAY ) +{ + SC_HAS_PROCESS( DISPLAY ); + +// INPUTS & OUTPUTS TO DISPLAY + + const sc_signal& reset; + const sc_signal& in_ok; + const sc_signal& out_ok; + const sc_signal& instrb; + const sc_signal& outstrb; + const signal_bool_vector &a1,&a2,&a3,&a4,&a5,&a6,&a7,&a8; + const signal_bool_vector &d1,&d2,&d3,&d4,&d5,&d6,&d7,&d8; + +// CONSTRUCTOR DEFINITION + + DISPLAY( sc_module_name NAME, + const sc_signal& RESET, + const sc_signal& IN_OK, + const sc_signal& OUT_OK, + const sc_signal& INSTRB, + const sc_signal& OUTSTRB, + const signal_bool_vector& A1, + const signal_bool_vector& A2, + const signal_bool_vector& A3, + const signal_bool_vector& A4, + const signal_bool_vector& A5, + const signal_bool_vector& A6, + const signal_bool_vector& A7, + const signal_bool_vector& A8, + const signal_bool_vector& D1, + const signal_bool_vector& D2, + const signal_bool_vector& D3, + const signal_bool_vector& D4, + const signal_bool_vector& D5, + const signal_bool_vector& D6, + const signal_bool_vector& D7, + const signal_bool_vector& D8 + ) + + : + reset (RESET), + in_ok (IN_OK), + out_ok (OUT_OK), + instrb (INSTRB), + outstrb (OUTSTRB), + a1 (A1), a2(A2), a3(A3), a4(A4), + a5 (A5), a6(A6), a7(A7), a8(A8), + d1 (D1), d2(D2), d3(D3), d4(D4), + d5 (D5), d6(D6), d7(D7), d8(D8) + + { + SC_METHOD( entry ); + sensitive << reset; + sensitive << in_ok; + sensitive << out_ok; + sensitive << instrb; + sensitive << outstrb; + sensitive << a1; + sensitive << a2; + sensitive << a3; + sensitive << a4; + sensitive << a5; + sensitive << a6; + sensitive << a7; + sensitive << a8; + sensitive << d1; + sensitive << d2; + sensitive << d3; + sensitive << d4; + sensitive << d5; + sensitive << d6; + sensitive << d7; + sensitive << d8; + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +DISPLAY::entry() +{ +// DISPLAYS ALL SIGNALS USED TO DEBUG DESIGN + + lout << " reset = " << reset + << " in_ok = " << in_ok + << " out_ok = " << out_ok + << " instrb = " << instrb + << " outstrb = " << outstrb + << "\n" + << " a1 = " << a1 + << " a2 = " << a2 + << " a3 = " << a3 + << " a4 = " << a4 + << "\n" + << " a5 = " << a5 + << " a6 = " << a6 + << " a7 = " << a7 + << " a8 = " << a8 + << "\n" + << " d1 = " << d1 + << " d2 = " << d2 + << " d3 = " << d3 + << " d4 = " << d4 + << "\n" + << " d5 = " << d5 + << " d6 = " << d6 + << " d7 = " << d7 + << " d8 = " << d8 + << endl; + +} diff --git a/src/systemc/tests/systemc/misc/synth/bubble/golden/bubble.log b/src/systemc/tests/systemc/misc/synth/bubble/golden/bubble.log new file mode 100644 index 000000000..4c745ae88 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/bubble/golden/bubble.log @@ -0,0 +1,16 @@ +SystemC Simulation + + + INPUT DATA SORTED DATA + -76 -76 + 1 -2 + 12 1 + 85 3 + 15 12 + 103 15 + -2 85 + 3 103 + + + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/bubble/stim.h b/src/systemc/tests/systemc/misc/synth/bubble/stim.h new file mode 100644 index 000000000..50a02a06d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/bubble/stim.h @@ -0,0 +1,178 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stim.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** stimulus Class Definition ********************/ +/******************************************************************************/ + +#include "common.h" + +SC_MODULE( STIM ) +{ + SC_HAS_PROCESS( STIM ); + + sc_in_clk clk; + + sc_signal& reset; + sc_signal& in_ok; + sc_signal& out_ok; + const sc_signal& instrb; + const sc_signal& outstrb; + signal_bool_vector &a1,&a2,&a3,&a4,&a5,&a6,&a7,&a8;// -128 to 127 + const signal_bool_vector &d1,&d2,&d3,&d4,&d5,&d6,&d7,&d8; + + + STIM( sc_module_name NAME, + sc_clock& TICK_P, + sc_signal& RESET, + sc_signal& IN_OK, + sc_signal& OUT_OK, + const sc_signal& INSTRB, + const sc_signal& OUTSTRB, + signal_bool_vector& A1, + signal_bool_vector& A2, + signal_bool_vector& A3, + signal_bool_vector& A4, + signal_bool_vector& A5, + signal_bool_vector& A6, + signal_bool_vector& A7, + signal_bool_vector& A8, + signal_bool_vector& D1, + signal_bool_vector& D2, + signal_bool_vector& D3, + signal_bool_vector& D4, + signal_bool_vector& D5, + signal_bool_vector& D6, + signal_bool_vector& D7, + signal_bool_vector& D8 + ) + : + reset (RESET), + in_ok (IN_OK), + out_ok (OUT_OK), + instrb (INSTRB), + outstrb (OUTSTRB), + a1 (A1), a2(A2), a3(A3), a4(A4), + a5 (A5), a6(A6), a7(A7), a8(A8), + d1 (D1), d2(D2), d3(D3), d4(D4), + d5 (D5), d6(D6), d7(D7), d8(D8) + { + clk(TICK_P); + SC_CTHREAD( entry, clk.neg() ); + } + void entry(); +}; + +/******************************************************************************/ +/*************************** testbench Entry Function **********************/ +/******************************************************************************/ +void +STIM::entry() +{ + +// INITIAL INPUT VALUES + + a1.write(0); // Are quotes necessary ??? + a2.write(0); + a3.write(0); + a4.write(0); + a5.write(0); + a6.write(0); + a7.write(0); + a8.write(0); + in_ok.write(0); + out_ok.write(0); + reset.write(1); + wait(2); + +// REMOVE RESET + + reset.write(0); + wait(); + +// WAIT FOR REQUEST FOR INPUT + + do { wait(); } while (instrb == 0); + +// SEND INPUT DATA TO BE SORTED + a1.write(-76); + a2.write( 1); + a3.write( 12); + a4.write( 85); + a5.write( 15); + a6.write(103); + a7.write( -2); + a8.write( 3); + in_ok.write(1); + wait(); + +// WAIT FOR OUTPUT READY + + do { wait(); } while (outstrb == 0); + +// READ OUTPUT & DISPLAY RESULTS + + cout << "\n" << endl; + cout << "\t\t INPUT DATA \t\t SORTED DATA" << endl; + cout << "\t\t " << a1.read().to_int() << " \t\t " + << d1.read().to_int() << endl; + cout << "\t\t " << a2.read().to_int() << " \t\t " + << d2.read().to_int() << endl; + cout << "\t\t " << a3.read().to_int() << " \t\t " + << d3.read().to_int() << endl; + cout << "\t\t " << a4.read().to_int() << " \t\t " + << d4.read().to_int() << endl; + cout << "\t\t " << a5.read().to_int() << " \t\t " + << d5.read().to_int() << endl; + cout << "\t\t " << a6.read().to_int() << " \t\t " + << d6.read().to_int() << endl; + cout << "\t\t " << a7.read().to_int() << " \t\t " + << d7.read().to_int() << endl; + cout << "\t\t " << a8.read().to_int() << " \t\t " + << d8.read().to_int() << endl; + cout << "\n" << endl; + +// SEND FINISHED READING OUTPUT FLAG + + in_ok.write(0); + out_ok.write(1); + wait(); + +// STOP SIMULATION + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/synth/bubble/tb.h b/src/systemc/tests/systemc/misc/synth/bubble/tb.h new file mode 100644 index 000000000..136accc25 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/bubble/tb.h @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** testbench Class Definition ********************/ +/******************************************************************************/ + +#include "common.h" + +SC_MODULE( TESTBENCH ) +{ + sc_signal reset; + sc_signal in_ok; + sc_signal out_ok; + sc_signal instrb; + sc_signal outstrb; + signal_bool_vector a1,a2,a3,a4,a5,a6,a7,a8; // -128 to 127 + signal_bool_vector d1,d2,d3,d4,d5,d6,d7,d8; // -128 to 127 + STIM st1; + BUBBLE bubble; + DISPLAY disp1; + + TESTBENCH( sc_module_name NAME, + sc_clock& TICK ) + + : st1 ("ST1", TICK, reset, in_ok, out_ok, instrb, outstrb, + a1, a2, a3, a4, a5, a6, a7, a8, + d1, d2, d3, d4, d5, d6, d7, d8) , + + bubble ("B1", TICK, reset, in_ok, out_ok, instrb, outstrb, + a1, a2, a3, a4, a5, a6, a7, a8, + d1, d2, d3, d4, d5, d6, d7, d8) , + + disp1 ("D1", reset, in_ok, out_ok, instrb, outstrb, + a1, a2, a3, a4, a5, a6, a7, a8, + d1, d2, d3, d4, d5, d6, d7, d8) + {} +}; diff --git a/src/systemc/tests/systemc/misc/synth/circle/circ48.cpp b/src/systemc/tests/systemc/misc/synth/circle/circ48.cpp new file mode 100644 index 000000000..918fc5418 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/circle/circ48.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + circ48.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "circ48.h" + +int +sc_main( int, char *[] ) +{ + sc_clock clk( "clk", 20, SC_NS, 0.5, 10, SC_NS ); + + sc_signal I_reset; + sc_signal I_x_ok; + sc_signal I_y_ok; + sc_signal O_out_wr; + sc_signal O_out_sel; + signal_bool_vector O_out_xy; + signal_bool_vector O_diffs; + + testbench tb( "TB", clk, I_reset, I_x_ok, I_y_ok, + O_out_wr, O_out_sel, O_out_xy ); + + circ48 c1( "C1", clk, I_reset, I_x_ok, I_y_ok, + O_out_wr, O_out_sel, O_out_xy, O_diffs ); + + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/circle/circ48.h b/src/systemc/tests/systemc/misc/synth/circle/circ48.h new file mode 100644 index 000000000..e26234a2e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/circle/circ48.h @@ -0,0 +1,197 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + circ48.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( circ48 ) +{ + SC_HAS_PROCESS( circ48 ); + + sc_in_clk clk; + + sc_in reset; + sc_in x_ok; + sc_in y_ok; + sc_out out_wr; + sc_out out_sel; + sc_out out_xy; + sc_out diffs; + + void entry(); + + circ48( sc_module_name name_, + const sc_clock& clk_, + const sc_signal& reset_, + const sc_signal& x_ok_, + const sc_signal& y_ok_, + sc_signal& out_wr_, + sc_signal& out_sel_, + signal_bool_vector& out_xy_, + signal_bool_vector& diffs_ ) + : sc_module( name_ ) + { + clk( clk_ ); + reset( reset_ ); + x_ok( x_ok_ ); + y_ok( y_ok_ ); + out_wr( out_wr_ ); + out_sel( out_sel_ ); + out_xy( out_xy_ ); + diffs( diffs_ ); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + } +}; + + +/*****************************************************************************/ +/** **/ +/** This function is the "clean" behavior (i.e. not written with synthesis **/ +/** or implementation in mind. This is a circle generator, that uses an **/ +/** algorithmic, interpolating technique. Origin of circle is fixed to **/ +/** point (0,0) **/ +/** NOTE: Extra WAIT at end for VGB (requires waits after signal assign) **/ +/** **/ +/*****************************************************************************/ + +void +circ48::entry() +{ + sc_signed x(4); + sc_signed y(4); + sc_signed x_end(4); + sc_signed y_end(4); + sc_signed diff(8); + bool first; + + // reset initialization + + out_wr.write( 0 ); // Initialize at time zero ???? + out_sel.write( 0 ); + + // setup counter-clockwise circle generation + + while(true) { // Reset_loop + x_end = 4; + x = x_end; + diff = 0; + diffs.write(diff); + y_end = 4; + y = y_end; + first = true; + wait(); + + // perform counter-clockwise circle generation + + while(first || (x != x_end) || (y != y_end)) { // Main_loop + first = false; + diff = diff + 1; + + if (diff > 1) { + if ((x >= 0) && (y >= 0)) { + diff = diff - x - x; + x = x - 1; + } + else { // else_1_begin + if ((x < 0) && (y >= 0)) { + diff = diff - y - y; + y = y - 1; + } + else { // else_2_begin + if ((x < 0) && (y < 0)) { + diff = diff + x + x; + x = x + 1; + } + else { + diff = diff + y + y; + y = y + 1; + } + } // else_2_end + } // else_1_end + } + else { + if ((x >= 0) && (y >= 0)) { + diff = diff + y + y; + y = y + 1; + } + else { // else_3_begin + if ((x < 0) && (y >= 0)) { + diff = diff - x - x; + x = x - 1; + } + else { // else_4_begin + if ((x < 0) && (y < 0)) { + diff = diff - y - y; + y = y - 1; + } + else { + diff = x + x; + x = x + 1; + } + } // else_4_end + } // else_3_end + } + + // send the intermediate x value to port + + out_sel.write(0); // Select x + out_wr.write(1); // Output ready signal + out_xy.write(x); + diffs.write(diff); + wait(); + + // handshake x.. + + do { wait(); } while (x_ok == 0); + out_wr.write(0); + wait(); + + // send the intermediate y value to port + + out_sel.write(1); // Select y + out_wr.write(1); // Output ready signal + out_xy.write(y); + wait(); + + // handshake y.. + + do { wait(); } while (y_ok == 0); + out_wr.write(0); + wait(); + } // End of Main_loop + } // End of Reset_loop +} diff --git a/src/systemc/tests/systemc/misc/synth/circle/common.h b/src/systemc/tests/systemc/misc/synth/circle/common.h new file mode 100644 index 000000000..3ea41ad75 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/circle/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<8> bool_vector; +typedef sc_signal signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/synth/circle/golden/circ48.log b/src/systemc/tests/systemc/misc/synth/circle/golden/circ48.log new file mode 100644 index 000000000..136e1c7c1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/circle/golden/circ48.log @@ -0,0 +1,21 @@ +SystemC Simulation + + FINAL MEMORY VALUES +Memory Location 1 : 0000000000000000 +Memory Location 2 : 0000000111100000 +Memory Location 3 : 0000011101111000 +Memory Location 4 : 0001110001110000 +Memory Location 5 : 0001000000010000 +Memory Location 6 : 0011000000011000 +Memory Location 7 : 0010000000001000 +Memory Location 8 : 0010000000001100 +Memory Location 9 : 0011000000001100 +Memory Location 10 : 0001000000001000 +Memory Location 11 : 0001100000011000 +Memory Location 12 : 0000100000110000 +Memory Location 13 : 0000111011100000 +Memory Location 14 : 0000001110000000 +Memory Location 15 : 0000000000000000 +Memory Location 16 : 0000000000000000 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/circle/tb.h b/src/systemc/tests/systemc/misc/synth/circle/tb.h new file mode 100644 index 000000000..3004bb35c --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/circle/tb.h @@ -0,0 +1,196 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "common.h" + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + sc_out reset; + sc_out x_ok; + sc_out y_ok; + sc_in data_ready; + sc_in select_xy; + sc_in coord_xy; + + void entry(); + + testbench( sc_module_name name_, + const sc_clock& clk_, + sc_signal& reset_, + sc_signal& x_ok_, + sc_signal& y_ok_, + const sc_signal& data_ready_, + const sc_signal& select_xy_, + const signal_bool_vector& coord_xy_ ) + : sc_module( name_ ) + { + clk( clk_ ); + reset( reset_ ); + x_ok( x_ok_ ); + y_ok( y_ok_ ); + data_ready( data_ready_ ); + select_xy( select_xy_ ); + coord_xy( coord_xy_ ); + SC_CTHREAD( entry, clk.neg() ); + } +}; + +sc_bv<16> mem[17]; + +void +testbench::entry() +{ + bool_vector x_coord; + bool_vector y_coord; + int x_flag = 0; + int y_flag = 0; + int i; // Counter variable + int x = 0; // Memory location of x_coord + int y = 1; // Memory location of y_coord + + // reset initialization + + reset.write(1); + x_ok.write(0); + y_ok.write(0); + wait(); + reset.write(0); + wait(); + + // fill display memory with zeros + + for (i = 1; i < 17; i++) + mem[i] = 0; + + // capture of (x,y) coordinates + + while(true) { + + // wait for new x or y coordinate to be calculated + + do { wait(); } while (data_ready == 0); + + // capture x coordinate + + if(select_xy.read() == 0) { + x_coord = coord_xy.read(); + x_flag = x_flag + 1; + x_ok.write(1); + } + + // capture y coordinate + + if(select_xy.read() == 1) { + y_coord = coord_xy.read(); + y_flag = y_flag + 1; + y_ok.write(1); + } + + wait(); + x_ok.write(0); + y_ok.write(0); + + // debug display of coordinate sets + /* + if (x_flag == y_flag) { + cout << " Coordinate Set #" << x_flag + << " X = " << x_coord.to_int() + << " Y = " << y_coord.to_int() + << endl; + } + */ + + // conversion of x coordinate values to memory column locations + + if (x_coord.to_int() == -8) x = 15; + if (x_coord.to_int() == -7) x = 14; + if (x_coord.to_int() == -6) x = 13; + if (x_coord.to_int() == -5) x = 12; + if (x_coord.to_int() == -4) x = 11; + if (x_coord.to_int() == -3) x = 10; + if (x_coord.to_int() == -2) x = 9; + if (x_coord.to_int() == -1) x = 8; + if (x_coord.to_int() == 0) x = 7; + if (x_coord.to_int() == 1) x = 6; + if (x_coord.to_int() == 2) x = 5; + if (x_coord.to_int() == 3) x = 4; + if (x_coord.to_int() == 4) x = 3; + if (x_coord.to_int() == 5) x = 2; + if (x_coord.to_int() == 6) x = 1; + if (x_coord.to_int() == 7) x = 0; + + // conversion of y coordinate values to memory row locations + + if (y_coord.to_int() == -8) y = 16; + if (y_coord.to_int() == -7) y = 15; + if (y_coord.to_int() == -6) y = 14; + if (y_coord.to_int() == -5) y = 13; + if (y_coord.to_int() == -4) y = 12; + if (y_coord.to_int() == -3) y = 11; + if (y_coord.to_int() == -2) y = 10; + if (y_coord.to_int() == -1) y = 9; + if (y_coord.to_int() == 0) y = 8; + if (y_coord.to_int() == 1) y = 7; + if (y_coord.to_int() == 2) y = 6; + if (y_coord.to_int() == 3) y = 5; + if (y_coord.to_int() == 4) y = 4; + if (y_coord.to_int() == 5) y = 3; + if (y_coord.to_int() == 6) y = 2; + if (y_coord.to_int() == 7) y = 1; + + // turn bit high in memory for calculated coordinate + + mem[y][x] = 1; + + // stop simulation after 100 coordinates + + if (y_flag == 100) break; + + } // End of while loop + + cout << "\n\t FINAL MEMORY VALUES" << endl; + + for (i = 1; i < 17; i++) + cout << "Memory Location " << i + << " : \t" << mem[i] << endl; + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/synth/combo/share/golden/share.log b/src/systemc/tests/systemc/misc/synth/combo/share/golden/share.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/share/golden/share.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/combo/share/share.cpp b/src/systemc/tests/systemc/misc/synth/combo/share/share.cpp new file mode 100644 index 000000000..44cd9fb59 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/share/share.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + share.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +sc_signed +share( const sc_unsigned& u, + const sc_unsigned& v ) +{ + return (u - v) * (v + u); +} + +int +sc_main( int, char** argv ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/combo/switch3/golden/switch3.log b/src/systemc/tests/systemc/misc/synth/combo/switch3/golden/switch3.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/switch3/golden/switch3.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/combo/switch3/switch3.cpp b/src/systemc/tests/systemc/misc/synth/combo/switch3/switch3.cpp new file mode 100644 index 000000000..f464142ae --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/switch3/switch3.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + switch3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +short +select( int a, int b, int c ) +{ + sc_signed x(7); + + switch ((c >> 2) & 3) { + default: + case 0: + x = a + b; + return x.to_int(); + case 1: + x = a - b; + return x.to_int(); + case 2: + x = (a >> 16) + (b << 16); + return x.to_int(); + case 3: + x = (a << 16) - (b >> 16); + return x.to_int(); + } +} + +int +sc_main( int, char** argv ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/combo/switch4/golden/switch4.log b/src/systemc/tests/systemc/misc/synth/combo/switch4/golden/switch4.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/switch4/golden/switch4.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/combo/switch4/switch4.cpp b/src/systemc/tests/systemc/misc/synth/combo/switch4/switch4.cpp new file mode 100644 index 000000000..f467aebc0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/switch4/switch4.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + switch4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +short +select( int a, int b, int c ) +{ + sc_signed x(7); + sc_signed y(9); + + switch ((c >> 2) & 3) { + case 0: + x = a + b; + return x.to_int(); + case 1: + x = a - b; + break; + case 2: + x = (a >> 16) + (b << 16); + return x.to_int(); + case 3: + x = (a << 16) - (b >> 16); + break; + } + + y = 2 * x; + return y.to_int(); +} + +int +sc_main( int, char** argv ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/combo/switch5/golden/switch5.log b/src/systemc/tests/systemc/misc/synth/combo/switch5/golden/switch5.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/switch5/golden/switch5.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/combo/switch5/switch5.cpp b/src/systemc/tests/systemc/misc/synth/combo/switch5/switch5.cpp new file mode 100644 index 000000000..36685e487 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/switch5/switch5.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + switch5.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +unsigned short +select( unsigned a, unsigned b, unsigned c ) +{ + sc_unsigned x(7); + sc_unsigned y(9); + + switch ((c >> 2) & 3) { + case 0: + x = a + b; + return x.to_uint(); + case 1: + x = a - b; + break; + case 2: + x = (a >> 16) + (b << 16); + return x.to_uint(); + case 3: + x = (a << 16) - (b >> 16); + break; + } + + y = 2 * x; + return y.to_uint(); +} + +int +sc_main( int, char** argv ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/combo/switch6/golden/switch6.log b/src/systemc/tests/systemc/misc/synth/combo/switch6/golden/switch6.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/switch6/golden/switch6.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/combo/switch6/switch6.cpp b/src/systemc/tests/systemc/misc/synth/combo/switch6/switch6.cpp new file mode 100644 index 000000000..84e489e76 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/combo/switch6/switch6.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + switch6.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +unsigned short +select( unsigned a, unsigned b, unsigned c ) +{ + sc_unsigned x(7); + sc_unsigned y(9); + + switch ((c >> 2) & 3) { + case 0: + x = a + b; + if (a > 23349212) { + x = x + 1; + break; + } else { + x = x - 1; + } + return x.to_uint(); + case 1: + x = a - b; + break; + case 2: + x = (a >> 16) + (b << 16); + return x.to_uint(); + case 3: + x = (a << 16) - (b >> 16); + if (b < 234328112) { + x = x - 1; + break; + } else { + x = x + 1; + return x.to_uint(); + } + break; + } + + y = 2 * x; + return y.to_uint(); +} + +int +sc_main( int, char** argv ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/define.h b/src/systemc/tests/systemc/misc/synth/concat/fncall/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/golden/test.log b/src/systemc/tests/systemc/misc/synth/concat/fncall/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/main.cpp b/src/systemc/tests/systemc/misc/synth/concat/fncall/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/monitor.cpp b/src/systemc/tests/systemc/misc/synth/concat/fncall/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/monitor.h b/src/systemc/tests/systemc/misc/synth/concat/fncall/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/tb.cpp b/src/systemc/tests/systemc/misc/synth/concat/fncall/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/tb.h b/src/systemc/tests/systemc/misc/synth/concat/fncall/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/test.cpp b/src/systemc/tests/systemc/misc/synth/concat/fncall/test.cpp new file mode 100644 index 000000000..1cb0672fc --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/test.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies the functionality of concanetation operation. +// Operands are arguments to a function +// +// Author: PRP +// Date Created: 19 Feb 99 +// + + +#include "systemc.h" +#include "test.h" + +sc_lv_base AND_fn (const sc_lv_base &a, const sc_lv_base &b) +{ + return a | b; +} + +sc_lv_base OR_fn (const sc_lv_base &a, const sc_lv_base &b) +{ + return a & b; +} + +void test::entry() +{ + sc_lv<8> a; + sc_lv<8> b; + sc_lv<8> c; + sc_lv<8> d; + sc_lv<24> e; + sc_lv<24> f; + + sc_logic k; + sc_logic n; + sc_logic m, o, p, q, r, s, t, u; + + sc_lv<32> x; + sc_lv<32> y; + sc_lv<32> z; + sc_lv<32> z1; + + + while (true) { + + wait (); + + a = "00000000"; // 0 + b = "00000001"; // 1 + c = "00000011"; // 3 + d = "00001111"; // 15 + e = "000000000000000000000001"; // 1 + f = "000000000000000000001010"; // 10 + + // =============== Array + Array ==================================== + // variable + variable, cascading + x = OR_fn ((a, b, c, d), (d, c, b, a)); + // x = 00001111 00000011 00000011 00001111 + + // variable + constant, cascading, composition + y = AND_fn (((a, b, c), "00000000"), (d, "00000000", b, a)); + // y = 00000000 00000000 00000001 00000000 + + // constant + constant + z = OR_fn (( sc_lv_base( "0000000000000000" ), "1000000000000000"), x); + // z = 00001111 00000011 10000011 00001111 + + z = z & (~y); + // z = 00001111 00000011 10000010 00001111 + + // =============== Array (variable) + Scalar ============================== + + n = '1'; + o = '0'; + z = OR_fn (z, ( sc_lv_base( n ), "000000000000000", "0000000000000000")); + // z = 10001111 00000011 10000010 00001111 + + z = OR_fn (z, ( sc_lv_base( "00000000" ), o, n, d, "00000000000000")); + // z = 10001111 01000011 11000010 00001111 + + k = '1'; + z = OR_fn (z, ( sc_lv_base( "00000000" ), "00", k, "00000", "0000000000000000")); + // z = 10001111 01100011 11000010 00001111 + + // =============== Null Vector ==================================== + + z = AND_fn (z, (( sc_lv_base( o ), sc_lv_base( k ), "111111"), "111111111111111111111111")); + // z = 00001111 01100011 11000010 00001111 + + // =============== LHS/RHS of different widths ============================== + + z1 = OR_fn (z, sc_lv_base( "00000000000000000000000000000000" )); // length of string = 32 + + o1 = z.to_int(); // o1 = 00001111 01100011 11000010 00001111 + wait(); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/test.f b/src/systemc/tests/systemc/misc/synth/concat/fncall/test.f new file mode 100644 index 000000000..050983dc0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/test.f @@ -0,0 +1,4 @@ +fncall/test.cpp +fncall/tb.cpp +fncall/monitor.cpp +fncall/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/concat/fncall/test.h b/src/systemc/tests/systemc/misc/synth/concat/fncall/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/fncall/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/define.h b/src/systemc/tests/systemc/misc/synth/concat/lvalue/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/golden/test.log b/src/systemc/tests/systemc/misc/synth/concat/lvalue/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/main.cpp b/src/systemc/tests/systemc/misc/synth/concat/lvalue/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/monitor.cpp b/src/systemc/tests/systemc/misc/synth/concat/lvalue/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/monitor.h b/src/systemc/tests/systemc/misc/synth/concat/lvalue/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/tb.cpp b/src/systemc/tests/systemc/misc/synth/concat/lvalue/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/tb.h b/src/systemc/tests/systemc/misc/synth/concat/lvalue/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/test.cpp b/src/systemc/tests/systemc/misc/synth/concat/lvalue/test.cpp new file mode 100644 index 000000000..e20874af6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/test.cpp @@ -0,0 +1,131 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies the functionality of concanetation operation. +// Operands form the rvalue of an assignment +// +// Author: PRP +// Date Created: 19 Feb 99 +// + + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + sc_lv<8> a; + sc_lv<8> b; + sc_lv<8> c; + sc_lv<8> d; + sc_lv<24> e; + sc_lv<24> f; + + // sc_logic k; + // sc_logic n; + // sc_logic m, o, p, q, r, s, t, u; + sc_lv<1> k, n, m, o, p, q, r, s, t, u; + + sc_lv<32> x; + sc_lv<32> y; + sc_lv<32> z; + + int i,j; + + while (true) { + + wait (); + + + b = "00000001"; // 1 + c = "00000011"; // 3 + d = "00001111"; // 15 + + // =============== Array + Array ==================================== + + (a, f) = "00000000000000000000000000000011"; // a = 0, f = 3 + + // =============== Cascading ==================================== + // cascading array variables + (a, f) = (b, c, d, a); + // a = 00000001 f = "00000011 00001111 00000000" + z = (a, f); + + // composing cascaded array variables + x = ( sc_lv_base( "00000011" ), "00000011", "00000011", "00000101"); + (a, (b, c, d)) = x; + z = z | x; // z = 00000011 00000011 00001111 00000101 + + // =============== Array (variable) + Scalar ============================== + + (b, c, d, a.range (7, 2), k, n) = (a, b, c, d); + // b = 00000011 c = 00000011 d = 00000011 a = 00000111 + // k = 0 n = 1 + z = z | (a, b, c, d); // z = 00000111 00000011 00001111 00000111 + + ( k, m, a.range (5, 0)) = z.range (15, 8); + // k = 0 m = 0 a = 00001111 + z = z | ( sc_lv_base( n ), m, k, n, "0000", a, "0000000000000000"); + // z = 10010111 00001111 00001111 00000111 + + // =============== Null Vector ==================================== + + ( m, n, o, p, q, r, s, t ) = "11011010"; + a = ( sc_lv_base( s ), t, q, r, o, m, n, p); // a = "10100111" + z = (z.range (31, 8), a); // z = 10010111 00001111 00001111 10100111 + + b = "00000000"; + + z = z | (b, b, b, z.range (7, 0)); + + // =============== LHS/RHS of different widths ============================== + + (x.range (15, 0), x.range (31, 16)) = ("1001011100001111000011111010011101"); + // RHS is (z, "01") + // x = 00111110 10011101 01011100 00111100 + + (z.range (31, 16), z.range (15, 0)) = (x.range (7, 0), x.range (23, 16), + x.range (15, 8), x.range (31, 24)); + // z = 00111100 10011101 01011100 00111110 + + o1 = z.to_int(); + wait(); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/test.f b/src/systemc/tests/systemc/misc/synth/concat/lvalue/test.f new file mode 100644 index 000000000..5fccdcdd7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/test.f @@ -0,0 +1,4 @@ +lvalue/test.cpp +lvalue/tb.cpp +lvalue/monitor.cpp +lvalue/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/concat/lvalue/test.h b/src/systemc/tests/systemc/misc/synth/concat/lvalue/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/lvalue/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/define.h b/src/systemc/tests/systemc/misc/synth/concat/rvalue/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/golden/test.log b/src/systemc/tests/systemc/misc/synth/concat/rvalue/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/main.cpp b/src/systemc/tests/systemc/misc/synth/concat/rvalue/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/monitor.cpp b/src/systemc/tests/systemc/misc/synth/concat/rvalue/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/monitor.h b/src/systemc/tests/systemc/misc/synth/concat/rvalue/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/tb.cpp b/src/systemc/tests/systemc/misc/synth/concat/rvalue/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/tb.h b/src/systemc/tests/systemc/misc/synth/concat/rvalue/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/test.cpp b/src/systemc/tests/systemc/misc/synth/concat/rvalue/test.cpp new file mode 100644 index 000000000..3a1c86093 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/test.cpp @@ -0,0 +1,160 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// +// Verifies the functionality of concanetation operation. +// Operands form the rvalue of an assignment +// +// Author: PRP +// Date Created: 19 Feb 99 +// + + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + sc_lv<8> a; + sc_lv<8> b; + sc_lv<8> c; + sc_lv<8> d; + sc_lv<24> e; + sc_lv<24> f; + + sc_logic k; + sc_logic n; + sc_logic m; + + sc_lv<32> x; + sc_lv<32> y; + sc_lv<32> z; + + sc_lv<2> kk; + + int i,j; + + while (true) { + + wait (); + + // ------- rvalue --------------------------------------------- + + a = "00000000"; // 0 + b = "00000001"; // 1 + c = "00000011"; // 3 + d = "00001111"; // 15 + e = "000000000000000000000001"; // 1 + f = "000000000000000000001010"; // 10 + + // =============== Array + Array ==================================== + // array constant + array constant + x = ( sc_lv_base( "000000000000000000000000" ), "00010000"); // x = 32 + + // array constant + array variable + y = ("000000000000000000000000", b); // y = 1 + z = x | y; // z = 00000000 00000000 00000000 00010001 + + // array variable + array constant + x = (a, "000000000000000000000011"); // x = 3 + z = z & x; // z = 00000000 00000000 00000000 00000001 + + // array variable + array variable + x = (a, f); // x = 10 + z = z | x; // z = 00000000 00000000 00000000 00001011 + + // =============== Cascading ==================================== + // cascading array variables + x = (a, b, c, d); // x = 00000000 00000001 00000011 00001111 + z = z & x; // z = 00000000 00000000 00000000 00001011 + + // cascading array constants + x = ( sc_lv_base( "00000011" ), "00000011", "00000011", "00000011"); + // x = 00000011 00000011 00000011 00000011 + z = z | x; // z = 00000011 00000011 00000011 00001011 + + // composing array concats + x = ( sc_lv_base( "00000011" ), ( sc_lv_base( "11111111" ), "00000011", "00000011")); + // x = 00000011 11111111 00000011 00000011 + z = z | x; // z = 00000011 11111111 00000011 00001011 + + // =============== Array (variable) + Scalar ============================== + // array variable + scalar constant + m = '0'; + n = '1'; + x = (a, b, c, d.range (6, 0), m); + // x = 00000000 00000001 00000011 00011110 + z = z | x; // z = 00000011 11111111 00000011 00011111 + + k = '1'; + // array variable + scalar variable + x = (a, b, k, c.range (6, 0), x.range (7, 0)); + // x = 00000000 00000001 10000001 00011110 + z = z & x; // z = 00000000 00000001 00000001 00011110 + + // =============== Null Vector ==================================== + // null vector - variable + kk = ~( sc_lv_base( k ), k); // "00" + z = (z.range (31, 2), kk); // z = 00000000 00000001 00000001 00011100 + + // null vector - constant + kk = ( sc_lv_base( n ), n); // "11" + z = (kk, z.range (29, 0)); // z = 11000000 00000001 00000001 00011100 + + // =============== Array (constant) + Scalar ============================== + // scalar constant + array constant + x = ( sc_lv_base( n ), "1111111000000000000000000000011"); + // x = 01111111 00000000 00000000 00000011 + z = z | x; // z = 11111111 00000001 00000001 00011111 + + // array constant + scalar variable + x = ( sc_lv_base( "1111111000000000000000000000011" ), k); + // x = 11111110 00000000 00000000 00000111 + z = z & x; // z = 11111110 00000000 00000000 00000111 + + // =============== LHS/RHS of different widths ============================== + // lhs and rhs of different widths + x = "100001111000000000000000000001111"; // warning should be issued + z = z & x; + // z = 00001110 00000000 00000000 00000111 + + o1 = z.to_int(); + wait(); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/test.f b/src/systemc/tests/systemc/misc/synth/concat/rvalue/test.f new file mode 100644 index 000000000..2399ece43 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/test.f @@ -0,0 +1,4 @@ +rvalue/test.cpp +rvalue/tb.cpp +rvalue/monitor.cpp +rvalue/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/concat/rvalue/test.h b/src/systemc/tests/systemc/misc/synth/concat/rvalue/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/concat/rvalue/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test1/golden/test1.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test1/golden/test1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test1/golden/test1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test1/interface.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test1/interface.h new file mode 100644 index 000000000..e2c229b67 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test1/interface.h @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + interface.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + const sc_signal& reset_sig; + + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), i3(I3), i4(I4), + i5(I5), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test1/test1.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test1/test1.cpp new file mode 100644 index 000000000..62a92a2db --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test1/test1.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "interface.h" + +void t::entry() +{ + int i; + + o1 = 1; + + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test2/golden/test2.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test2/golden/test2.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test2/golden/test2.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test2/interface.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test2/interface.h new file mode 100644 index 000000000..e2c229b67 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test2/interface.h @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + interface.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + const sc_signal& reset_sig; + + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), i3(I3), i4(I4), + i5(I5), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test2/test2.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test2/test2.cpp new file mode 100644 index 000000000..985092b65 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test2/test2.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "interface.h" + +void t::entry() +{ + int i; + + o3 = i1 + i2; + o3 = i1 + i2; + o3 = i1 + i2; + + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test3/golden/test3.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test3/golden/test3.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test3/golden/test3.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test3/interface.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test3/interface.h new file mode 100644 index 000000000..e2c229b67 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test3/interface.h @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + interface.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + const sc_signal& reset_sig; + + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), i3(I3), i4(I4), + i5(I5), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test3/test3.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test3/test3.cpp new file mode 100644 index 000000000..22ad8972f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/misc/test3/test3.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "interface.h" + +void t::entry() +{ + int i; + + if (i1 == 1) + { + o1 = 1; + } + o2 = i1 + i2; + o2 = i1 + i2; + + wait(); +} + + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/define.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/tb.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/test.cpp new file mode 100644 index 000000000..9beae954a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/test.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case line_label: 7.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j; + + { + int i; + + a:i = 2; + if (i == 2) + i = 4; + else + i = 7; + } + b:i = 3; + j = 5; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/test.f b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/test.f new file mode 100644 index 000000000..df637f6d7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/test.f @@ -0,0 +1,4 @@ +test1/test.cpp +test1/tb.cpp +test1/monitor.cpp +test1/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/test.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test1/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/define.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/tb.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/test.cpp new file mode 100644 index 000000000..323500d36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/test.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case line_label: 8.cc +*/ + +#include "systemc.h" +#include "test.h" + + +void test::entry() +{ + int i,j; + + { + int i; + + a:i = 2; + if (i == 2) { + i = 5; + i = 4; + i = 5; + } + else + i = 7; + } + b:i = 3; + j = 5; + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/test.f b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/test.f new file mode 100644 index 000000000..0ff8be826 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/test.f @@ -0,0 +1,4 @@ +test2/test.cpp +test2/tb.cpp +test2/monitor.cpp +test2/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/test.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test2/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/define.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/tb.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/test.cpp new file mode 100644 index 000000000..b9a651cd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/test.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case line_label: 9.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j; + + { + int i; + + a:i = 2; + if (i == 2) { + i = 7; + i = 4; + i = 5; + } + else + i = 7; + } + b:i = 3; + j = 5; + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/test.f b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/test.f new file mode 100644 index 000000000..f4bc5ed9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/test.f @@ -0,0 +1,4 @@ +test3/test.cpp +test3/tb.cpp +test3/monitor.cpp +test3/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/test.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test3/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/define.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/tb.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/test.cpp new file mode 100644 index 000000000..965ab956f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/test.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case line_label: 10.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j; + + { + int i; + + a:i = 2; + if (i == 2) { + j = 0; + i = 7; + i = 4; + i = 5; + } + else + i = 7; + } + b:i = 3; + j = 5; + + wait(); + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/test.f b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/test.f new file mode 100644 index 000000000..4ac7cda08 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/test.f @@ -0,0 +1,4 @@ +test4/test.cpp +test4/tb.cpp +test4/monitor.cpp +test4/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/test.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test4/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/define.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/tb.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/test.cpp new file mode 100644 index 000000000..91cc0eb22 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/test.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case line_label: 11.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j; + + { + int i; + + a:i = 2; + if (i == 2) { + foobart: i = 7; + i = 4; + i = 5; + } + else + i = 7; + } + b:i = 3; + j = 5; + + wait(); + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/test.f b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/test.f new file mode 100644 index 000000000..48933f17e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/test.f @@ -0,0 +1,4 @@ +test5/test.cpp +test5/tb.cpp +test5/monitor.cpp +test5/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/test.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test5/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/define.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/tb.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/test.cpp new file mode 100644 index 000000000..29e13b1d4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/test.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case line_label: 7.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j; + + { + int i; + + a:i = 2; + if (i == 2) + { + foobart: i = 7; + i = 4; + i = 5; + } + else + i = 7; + } + b:i = 3; + j = 5; + + wait(); + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/test.f b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/test.f new file mode 100644 index 000000000..208a2e652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/test.f @@ -0,0 +1,4 @@ +test6/test.cpp +test6/tb.cpp +test6/monitor.cpp +test6/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/test.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test6/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/define.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/tb.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/test.cpp new file mode 100644 index 000000000..c057884c3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/test.cpp @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case line_label: 13.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + { + int i; + + a:i = 2; + if (i == 2) + { + foobart: i = 7; + i = 4; + i = 5; + } + else + i = 7; + + y = 2; + if (y == 3) { + z = 1; + } else { + z = 2; + } + } + b:i = 3; + j = 5; + + wait(); + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/test.f b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/test.f new file mode 100644 index 000000000..772c5048e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/test.f @@ -0,0 +1,4 @@ +test7/test.cpp +test7/tb.cpp +test7/monitor.cpp +test7/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/test.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test7/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/1 b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/1 new file mode 100644 index 000000000..73e4da4d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/1 @@ -0,0 +1,62 @@ +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + const char* NAME, + sc_clock_edge& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : sc_sync (NAME, CLK), reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/define.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/main.cpp new file mode 100644 index 000000000..134947889 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS , DUTY_CYCLE, 0, SC_NS ); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS , DUTY_CYCLE, 0, SC_NS ); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS , DUTY_CYCLE, 75, SC_NS ); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/tb.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/test.cpp new file mode 100644 index 000000000..e120e54b9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/test.cpp @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case line_label: 7.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + { + int i; + int x = 0; + + a:i = 2; + if (i == 2) + { + foobart: i = 7; + i = 4; + i = 5; + } + else + i = 7; + + y = 2; + if (y == 3) { + z = 1; + } else { + z = 2; + } + + switch (x) { + case 1: break; + case 3: break; + default: ; + } + } + b:i = 3; + j = 5; + + while (i == 4) { + j = 7; + y = 4; + i++; + + wait(); + } + do + { + j = 7; + y = 4; + i++; + + wait(); + } while (i < 4); + if (i == 4) { + i = 5; + } else { + i = 9; + } + + wait(); + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/test.f b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/test.f new file mode 100644 index 000000000..3607d345c --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/test.f @@ -0,0 +1,4 @@ +test8/test.cpp +test8/tb.cpp +test8/monitor.cpp +test8/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/test.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test8/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/define.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/tb.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/test.cpp new file mode 100644 index 000000000..abe2967d7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/test.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From PR 358 - Check that directive is accepted when followed + by a labelled statement +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int y,j,i; + + y = 3; + + i = 3; + + switch (i) { + case 0: + y = 1; + j = 2; + case 1: + y = y + 1; + break; + case 2: + y = y + 1; + j = 2; + default: + y = y + 1; + break; + } + j = 4; + j = 2; + pp: j = 8; + wait(); + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/test.f b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/test.f new file mode 100644 index 000000000..8ce95f804 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/test.f @@ -0,0 +1,4 @@ +test9/test.cpp +test9/tb.cpp +test9/monitor.cpp +test9/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/test.h b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/line_label/test9/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/define.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/tb.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/test.cpp new file mode 100644 index 000000000..11a11d34b --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/test.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case misc: 18.sc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i; + + i = 4; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/test.f b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/test.f new file mode 100644 index 000000000..df637f6d7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/test.f @@ -0,0 +1,4 @@ +test1/test.cpp +test1/tb.cpp +test1/monitor.cpp +test1/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test1/test.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test1/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/define.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/tb.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/test.cpp new file mode 100644 index 000000000..b1c2968e0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/test.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case misc: 19.sc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i; + + i = 4; + + wait(); + + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/test.f b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/test.f new file mode 100644 index 000000000..0ff8be826 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/test.f @@ -0,0 +1,4 @@ +test2/test.cpp +test2/tb.cpp +test2/monitor.cpp +test2/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test2/test.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test2/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/define.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/tb.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/test.cpp new file mode 100644 index 000000000..92e432bd9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/test.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case misc: 20.sc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i; + + i = 4; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/test.f b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/test.f new file mode 100644 index 000000000..f4bc5ed9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/test.f @@ -0,0 +1,4 @@ +test3/test.cpp +test3/tb.cpp +test3/monitor.cpp +test3/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test3/test.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test3/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/define.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/tb.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/test.cpp new file mode 100644 index 000000000..912d271f1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/test.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case misc: 21.sc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j=0,y=0,z=0; + + + for (i = 0; i < 7; i++) + { + i = z + + y; + y = z + j; + + wait(); + } + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/test.f b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/test.f new file mode 100644 index 000000000..4ac7cda08 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/test.f @@ -0,0 +1,4 @@ +test4/test.cpp +test4/tb.cpp +test4/monitor.cpp +test4/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test4/test.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test4/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/define.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/tb.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/test.cpp new file mode 100644 index 000000000..8216ac816 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/test.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case misc: 22.sc +*/ + +#include "systemc.h" +#include "test.h" + +int foobar (int a); + +void test::entry() +{ + int i,j=0,y=0,z=0; + + + for (i = 0; i < 7; i++) + { + z = z + + y; + y = z + j; + y = foobar (z); + wait(); + } + wait(); + +} + +int foobar (int a) +{ + return a + 1; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/test.f b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/test.f new file mode 100644 index 000000000..48933f17e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/test.f @@ -0,0 +1,4 @@ +test5/test.cpp +test5/tb.cpp +test5/monitor.cpp +test5/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test5/test.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test5/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/define.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/tb.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/test.cpp new file mode 100644 index 000000000..138f5ff1e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/test.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case misc: 23.sc +*/ + +#include "systemc.h" +#include "test.h" + +int foobar (int a, int b) +{ + return a + b; +} + +void test::entry() +{ + int i,j=0,y=0,z=0; + + + for (i = 0; i < 7; i++) + { + i = z + + y; + y = z + j; + y = z + j + i; + y = z + j + i; + y = z + j; + y = z + j + i; + y = z + (j - i); + y = z + (j - i); + y = z + (j - i); + y = z + (j - i); + + foobar (z,y); + foobar ( z,y); + y = foobar (z,y); + y = foobar ( z, y); + y = foobar ( + y, z); + y = foobar (z,y); + y = foobar (z,y) + ; + y = foobar (z,y); + y = foobar (foobar (y,z),y); + y = foobar (foobar ( z,y), y); + + wait(); + } + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/test.f b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/test.f new file mode 100644 index 000000000..208a2e652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/test.f @@ -0,0 +1,4 @@ +test6/test.cpp +test6/tb.cpp +test6/monitor.cpp +test6/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test6/test.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test6/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/define.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/tb.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/test.cpp new file mode 100644 index 000000000..c474d4c5b --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/test.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directive line_label. + Author: PRP + From Test Case misc: 24.sc +*/ + +#include "systemc.h" +#include "test.h" + +int a(int b) +{ + int i,j,y,z; + + + YY: for (i = 0; i < 7; i++) + { + z = 1; + } + + ::sc_core::wait(); + return 0; +} + +void test::entry() +{ + a(1); + ::sc_core::wait(); +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/test.f b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/test.f new file mode 100644 index 000000000..772c5048e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/test.f @@ -0,0 +1,4 @@ +test7/test.cpp +test7/tb.cpp +test7/monitor.cpp +test7/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/misc/test7/test.h b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/misc/test7/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test1/golden/test1.log b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test1/golden/test1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test1/golden/test1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test1/interface.h b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test1/interface.h new file mode 100644 index 000000000..e2c229b67 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test1/interface.h @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + interface.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + const sc_signal& reset_sig; + + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), i3(I3), i4(I4), + i5(I5), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test1/test1.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test1/test1.cpp new file mode 100644 index 000000000..62774b719 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test1/test1.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "interface.h" + +void t::entry() +{ + int i; + + o1 = i1 + i2; + + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test2/golden/test2.log b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test2/golden/test2.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test2/golden/test2.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test2/interface.h b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test2/interface.h new file mode 100644 index 000000000..e2c229b67 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test2/interface.h @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + interface.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + const sc_signal& reset_sig; + + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), i3(I3), i4(I4), + i5(I5), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test2/test2.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test2/test2.cpp new file mode 100644 index 000000000..40824db36 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test2/test2.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "interface.h" + +int x (int y, int z) +{ + return y+z; +} + +void t::entry() +{ + o1 = i1 + i2; + o2 = i1 + i2; + o3 = x (1,2); + o4 = x (1,2); + o5 = x ( 1,2); + o5 = x ( x(1,2),2); + o5 = x ( 1, x(1,2)); + + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test3/golden/test3.log b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test3/golden/test3.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test3/golden/test3.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test3/interface.h b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test3/interface.h new file mode 100644 index 000000000..e2c229b67 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test3/interface.h @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + interface.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + const sc_signal& reset_sig; + + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), i3(I3), i4(I4), + i5(I5), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test3/test3.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test3/test3.cpp new file mode 100644 index 000000000..179ac9b46 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/misc/test3/test3.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "interface.h" + +void t::entry() +{ + int i; + + o1 = i1 + i2; + o1 = i1 + i2; + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/define.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/tb.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/test.cpp new file mode 100644 index 000000000..356af707a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/test.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies resource directive + Author: PRP + From Test Case resource: 25.cc +*/ +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + + int i,j; + + i = 9 + i1.read(); + o1 = 8 + i; + o2 = i2; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/test.f b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/test.f new file mode 100644 index 000000000..df637f6d7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/test.f @@ -0,0 +1,4 @@ +test1/test.cpp +test1/tb.cpp +test1/monitor.cpp +test1/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test1/test.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test1/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/define.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/tb.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/test.cpp new file mode 100644 index 000000000..33c500faf --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/test.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +/* + Verifies resource directive + Author: PRP + From Test Case resource: 26.cc +*/ +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + + YY: for (i = 0; i < 7; i++) + { + y = i - 1; + j = i + 2; + } + + o1 = y + j; + wait(); + + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/test.f b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/test.f new file mode 100644 index 000000000..0ff8be826 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/test.f @@ -0,0 +1,4 @@ +test2/test.cpp +test2/tb.cpp +test2/monitor.cpp +test2/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test2/test.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test2/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/define.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/tb.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/test.cpp new file mode 100644 index 000000000..0e7dea5fe --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/test.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies resource directive + Author: PRP + From Test Case resource: 28.cc +*/ +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + + YY: for (i = 0; i < 7; i++) + { + y = i - 1; + j = i + 2; + } + o1 = y + j; + + wait(); + + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/test.f b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/test.f new file mode 100644 index 000000000..f4bc5ed9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/test.f @@ -0,0 +1,4 @@ +test3/test.cpp +test3/tb.cpp +test3/monitor.cpp +test3/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test3/test.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test3/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/define.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/tb.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/test.cpp new file mode 100644 index 000000000..1be7a4d86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/test.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies resource directive + Author: PRP + From Test Case resource: 29.cc +*/ +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + + YY: for (i = 0; i < 7; i++) + { + y = i - 1; + j = i + 2; + } + o1 = y + j; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/test.f b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/test.f new file mode 100644 index 000000000..4ac7cda08 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/test.f @@ -0,0 +1,4 @@ +test4/test.cpp +test4/tb.cpp +test4/monitor.cpp +test4/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test4/test.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test4/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/define.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/tb.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/test.cpp new file mode 100644 index 000000000..d579684ab --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/test.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies resource directive + Author: PRP + From Test Case resource: 30.cc +*/ +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + + YY: for (i = 0; i < 7; i++) + { + y = i - 1; + j = i + 2; + } + y = i - 1; + j = i + 2; + o1 = y + j; + + wait(); + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/test.f b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/test.f new file mode 100644 index 000000000..48933f17e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/test.f @@ -0,0 +1,4 @@ +test5/test.cpp +test5/tb.cpp +test5/monitor.cpp +test5/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test5/test.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test5/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/define.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/tb.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/test.cpp new file mode 100644 index 000000000..485e38bcf --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/test.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies resource directive + Author: PRP + From Test Case resource: 31.cc +*/ +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i; + int a[10], b[12]; + + for (i = 0; i < 10; i++) { + a[i] = 7; + b[i] = 6; + } + + wait(); + o1 = b[i]; + wait(); + +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/test.f b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/test.f new file mode 100644 index 000000000..208a2e652 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/test.f @@ -0,0 +1,4 @@ +test6/test.cpp +test6/tb.cpp +test6/monitor.cpp +test6/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/resource/test6/test.h b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/resource/test6/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/define.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/tb.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/test.cpp new file mode 100644 index 000000000..bcfdbea64 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/test.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directives translate_on/translate_off + Author: PRP + From Test Case translate_on: 15.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + a:i = 2; + if (i == 2) + { + foobart: i = 7; + i = 4; + i = 5; + } + else + i = 7; + + y = 3; + y = 2; + if (y == 3) { + z = 1; + } else { + z = 2; + } + + b:i = 3; + j = 5; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/test.f b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/test.f new file mode 100644 index 000000000..df637f6d7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/test.f @@ -0,0 +1,4 @@ +test1/test.cpp +test1/tb.cpp +test1/monitor.cpp +test1/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/test.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test1/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/define.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/tb.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/test.cpp new file mode 100644 index 000000000..c0e17e185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/test.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directives translate_on/translate_off + Author: PRP + From Test Case translate_on: 16.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + + i = 7; + + y = 3; + + y = 2; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/test.f b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/test.f new file mode 100644 index 000000000..0ff8be826 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/test.f @@ -0,0 +1,4 @@ +test2/test.cpp +test2/tb.cpp +test2/monitor.cpp +test2/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/test.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test2/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/define.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/tb.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/test.cpp new file mode 100644 index 000000000..02fe30454 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/test.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directives translate_on/translate_off + Author: PRP + From Test Case translate_on: 17.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i; + + i = 4; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/test.f b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/test.f new file mode 100644 index 000000000..f4bc5ed9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/test.f @@ -0,0 +1,4 @@ +test3/test.cpp +test3/tb.cpp +test3/monitor.cpp +test3/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/test.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/test.h new file mode 100644 index 000000000..07408cfa9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test3/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/define.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/tb.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/test.cpp new file mode 100644 index 000000000..6290e9682 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/test.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directives synthesis_on/synthesis_off + Author: PRP + From Test Case translate_on: syn1.cc +*/ + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + + i = 7; + + y = 3; + + y = 2; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/test.f b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/test.f new file mode 100644 index 000000000..4ac7cda08 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/test.f @@ -0,0 +1,4 @@ +test4/test.cpp +test4/tb.cpp +test4/monitor.cpp +test4/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/test.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/test.h new file mode 100644 index 000000000..7a9366b25 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test4/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is( reset_sig, true ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/define.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/golden/test.log b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/main.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/main.cpp new file mode 100644 index 000000000..852905b57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/main.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/monitor.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/monitor.cpp new file mode 100644 index 000000000..103437eee --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/monitor.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/monitor.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/monitor.h new file mode 100644 index 000000000..a827f7c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/monitor.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/tb.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/tb.cpp new file mode 100644 index 000000000..dfc57d75a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/tb.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/tb.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/test.cpp b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/test.cpp new file mode 100644 index 000000000..2fec4ea5b --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/test.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Verifies directives synthesis_on/synthesis_off + Author: PRP + From Test Case translate_on: syn2.cc +*/ + + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,y,z; + + + i = 7; + + y = 3; + + y = 2; + o1 = 7; + if (i2 == 4) { + o2 = 8; + } else { + o2 = 9; + } + + o1 = 6; + + wait(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/test.f b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/test.f new file mode 100644 index 000000000..48933f17e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/test.f @@ -0,0 +1,4 @@ +test5/test.cpp +test5/tb.cpp +test5/monitor.cpp +test5/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/test.h b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/directives/translate_on/test5/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/gcd/gcd.cpp b/src/systemc/tests/systemc/misc/synth/gcd/gcd.cpp new file mode 100644 index 000000000..2b6c45b21 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/gcd/gcd.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + gcd.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( gcd_cc ) +{ + SC_HAS_PROCESS( gcd_cc ); + + sc_in_clk clk; + + const sc_signal& reset; + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + sc_signal& ready; + + gcd_cc( sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESET, + const sc_signal& A, + const sc_signal& B, + sc_signal& C, + sc_signal& READY ) + : + reset(RESET), + a(A), + b(B), + c(C), + ready(READY) + { + clk( CLK ); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + } + + void entry(); +}; + +void +gcd_cc::entry() +{ + unsigned tmp_a; + wait(); // Note that this wait() is required, otherwise, + // the reset is wrong! This is a problem with BC, + // not our frontend. + + while (true) { + unsigned tmp_b; + + c = tmp_a; + ready = true; + wait(); + + tmp_a = a; + tmp_b = b; + ready = false; + wait(); + + while (tmp_b != 0) { + + unsigned tmp_c = tmp_a; + tmp_a = tmp_b; + wait(); + + while (tmp_c >= tmp_b) { + tmp_c = tmp_c - tmp_b; + wait(); + } + + tmp_b = tmp_c; + wait(); + } + } +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/gcd/golden/gcd.log b/src/systemc/tests/systemc/misc/synth/gcd/golden/gcd.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/gcd/golden/gcd.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test1/define.h b/src/systemc/tests/systemc/misc/synth/inlining/test1/define.h new file mode 100644 index 000000000..9b4c36e61 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test1/define.h @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(5*CLOCK_PERIOD) +#define single_cycle wait() +#define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME) +#define test_value(actual, expected) \ + wait (TEST_TIME); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait (CLOCK_PERIOD - TEST_TIME) +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test1/golden/test1.log b/src/systemc/tests/systemc/misc/synth/inlining/test1/golden/test1.log new file mode 100644 index 000000000..1f4fa7045 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test1/golden/test1.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test1/main.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test1/main.cpp new file mode 100644 index 000000000..60cc94641 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test1/main.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test1/tb.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test1/tb.cpp new file mode 100644 index 000000000..a412a90f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test1/tb.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test1/tb.h b/src/systemc/tests/systemc/misc/synth/inlining/test1/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test1/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test1/test.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test1/test.cpp new file mode 100644 index 000000000..e8426d024 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test1/test.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "define.h" +#include "test.h" + +int incr (int x, int y) +{ + return x + y; +} + + +void test::entry() +{ + int i; + + wait(); + + o1 = incr (i1.read(), i2.read()); +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test1/test.h b/src/systemc/tests/systemc/misc/synth/inlining/test1/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test1/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test1/test1.f b/src/systemc/tests/systemc/misc/synth/inlining/test1/test1.f new file mode 100644 index 000000000..77d5ef1d5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test1/test1.f @@ -0,0 +1,3 @@ +test1/test.cpp +test1/tb.cpp +test1/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test2/define.h b/src/systemc/tests/systemc/misc/synth/inlining/test2/define.h new file mode 100644 index 000000000..9b4c36e61 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test2/define.h @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(5*CLOCK_PERIOD) +#define single_cycle wait() +#define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME) +#define test_value(actual, expected) \ + wait (TEST_TIME); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait (CLOCK_PERIOD - TEST_TIME) +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test2/golden/test2.log b/src/systemc/tests/systemc/misc/synth/inlining/test2/golden/test2.log new file mode 100644 index 000000000..1f4fa7045 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test2/golden/test2.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test2/main.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test2/main.cpp new file mode 100644 index 000000000..60cc94641 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test2/main.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test2/tb.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test2/tb.cpp new file mode 100644 index 000000000..a412a90f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test2/tb.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test2/tb.h b/src/systemc/tests/systemc/misc/synth/inlining/test2/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test2/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test2/test.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test2/test.cpp new file mode 100644 index 000000000..b9d408d10 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test2/test.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// +// Verifies function inlining +// +// Author: PRP +// Date Created: 26 Feb 99 +// + +#include "systemc.h" +#include "define.h" +#include "test.h" + + +int incr1 (int x, int y) +{ + return x + y; +} + + +int incr (int x, int y) +{ + return incr1 (x, y); +} + + +void test::entry() +{ + int i; + + wait(); + + i = incr (i1.read(), i2.read()); + o1 = i; +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test2/test.h b/src/systemc/tests/systemc/misc/synth/inlining/test2/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test2/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test2/test2.f b/src/systemc/tests/systemc/misc/synth/inlining/test2/test2.f new file mode 100644 index 000000000..6ff147280 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test2/test2.f @@ -0,0 +1,3 @@ +test2/test.cpp +test2/tb.cpp +test2/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test3/define.h b/src/systemc/tests/systemc/misc/synth/inlining/test3/define.h new file mode 100644 index 000000000..9b4c36e61 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test3/define.h @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(5*CLOCK_PERIOD) +#define single_cycle wait() +#define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME) +#define test_value(actual, expected) \ + wait (TEST_TIME); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait (CLOCK_PERIOD - TEST_TIME) +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test3/golden/test.log b/src/systemc/tests/systemc/misc/synth/inlining/test3/golden/test.log new file mode 100644 index 000000000..1f4fa7045 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test3/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test3/main.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test3/main.cpp new file mode 100644 index 000000000..60cc94641 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test3/main.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test3/tb.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test3/tb.cpp new file mode 100644 index 000000000..a412a90f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test3/tb.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test3/tb.h b/src/systemc/tests/systemc/misc/synth/inlining/test3/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test3/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test3/test.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test3/test.cpp new file mode 100644 index 000000000..b40e892be --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test3/test.cpp @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// +// Verifies function inlining +// +// Author: PRP +// Date Created: 26 Feb 99 +// + +#include "systemc.h" +#include "define.h" +#include "test.h" + + + +int incr (int x, int y) +{ + if (y > 0) + return y; + if (x > 0) + return x; + else + return x + y; +} + + +void test::entry() +{ + int i; + + wait(); + + i = incr (i1.read(), i2.read()); + o1 = i; +} + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test3/test.f b/src/systemc/tests/systemc/misc/synth/inlining/test3/test.f new file mode 100644 index 000000000..9cb5d8fb4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test3/test.f @@ -0,0 +1,3 @@ +test3/test.cpp +test3/tb.cpp +test3/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test3/test.h b/src/systemc/tests/systemc/misc/synth/inlining/test3/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test3/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test4/define.h b/src/systemc/tests/systemc/misc/synth/inlining/test4/define.h new file mode 100644 index 000000000..9b4c36e61 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test4/define.h @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(5*CLOCK_PERIOD) +#define single_cycle wait() +#define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME) +#define test_value(actual, expected) \ + wait (TEST_TIME); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait (CLOCK_PERIOD - TEST_TIME) +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test4/golden/test.log b/src/systemc/tests/systemc/misc/synth/inlining/test4/golden/test.log new file mode 100644 index 000000000..1f4fa7045 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test4/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test4/main.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test4/main.cpp new file mode 100644 index 000000000..60cc94641 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test4/main.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test4/tb.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test4/tb.cpp new file mode 100644 index 000000000..a412a90f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test4/tb.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test4/tb.h b/src/systemc/tests/systemc/misc/synth/inlining/test4/tb.h new file mode 100644 index 000000000..306b5a4ae --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test4/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test4/test.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test4/test.cpp new file mode 100644 index 000000000..609bbf3eb --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test4/test.cpp @@ -0,0 +1,73 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// +// Verifies function inlining +// +// Author: PRP +// Date Created: 26 Feb 99 +// + +#include "systemc.h" +#include "define.h" +#include "test.h" + + + +int incr (int x, int y) +{ + ::sc_core::wait (); + while (x < 4) { + ::sc_core::wait(); + return x; + } + ::sc_core::wait(); + return y; +} + + +void test::entry() +{ + int i; + + ::sc_core::wait(); + + i = incr (i1.read(), i2.read()); + o1 = i; + ::sc_core::wait(); +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test4/test.f b/src/systemc/tests/systemc/misc/synth/inlining/test4/test.f new file mode 100644 index 000000000..75eba86b7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test4/test.f @@ -0,0 +1,3 @@ +test4/test.cpp +test4/tb.cpp +test4/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test4/test.h b/src/systemc/tests/systemc/misc/synth/inlining/test4/test.h new file mode 100644 index 000000000..5596f1f8d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test4/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test5/define.h b/src/systemc/tests/systemc/misc/synth/inlining/test5/define.h new file mode 100644 index 000000000..9b4c36e61 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test5/define.h @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(5*CLOCK_PERIOD) +#define single_cycle wait() +#define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME) +#define test_value(actual, expected) \ + wait (TEST_TIME); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait (CLOCK_PERIOD - TEST_TIME) +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test5/golden/test.log b/src/systemc/tests/systemc/misc/synth/inlining/test5/golden/test.log new file mode 100644 index 000000000..1f4fa7045 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test5/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test5/main.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test5/main.cpp new file mode 100644 index 000000000..60cc94641 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test5/main.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test5/tb.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test5/tb.cpp new file mode 100644 index 000000000..a412a90f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test5/tb.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test5/tb.h b/src/systemc/tests/systemc/misc/synth/inlining/test5/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test5/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test5/test.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test5/test.cpp new file mode 100644 index 000000000..25e8a4a7f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test5/test.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// +// Verifies function inlining +// +// Author: PRP +// Date Created: 26 Feb 99 +// + +#include "systemc.h" +#include "test.h" + +int test::incr (int x) +{ + int a, b, c; + + a = x + 1; + b = a + x; + o1 = x + i2.read() + b; + return b + c; +} + +void test::entry() +{ + int i; + + wait(); + + o2 = incr (i1); + wait(); +} + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test5/test.f b/src/systemc/tests/systemc/misc/synth/inlining/test5/test.f new file mode 100644 index 000000000..ff087ee5b --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test5/test.f @@ -0,0 +1,3 @@ +test5/test.cpp +test5/tb.cpp +test5/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test5/test.h b/src/systemc/tests/systemc/misc/synth/inlining/test5/test.h new file mode 100644 index 000000000..31bb57a4a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test5/test.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + int incr (int); + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test6/define.h b/src/systemc/tests/systemc/misc/synth/inlining/test6/define.h new file mode 100644 index 000000000..9b4c36e61 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test6/define.h @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(5*CLOCK_PERIOD) +#define single_cycle wait() +#define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME) +#define test_value(actual, expected) \ + wait (TEST_TIME); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait (CLOCK_PERIOD - TEST_TIME) +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test6/golden/test.log b/src/systemc/tests/systemc/misc/synth/inlining/test6/golden/test.log new file mode 100644 index 000000000..1f4fa7045 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test6/golden/test.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test6/main.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test6/main.cpp new file mode 100644 index 000000000..60cc94641 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test6/main.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "systemc.h" +#include "test.h" +#include "tb.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test6/tb.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test6/tb.cpp new file mode 100644 index 000000000..a412a90f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test6/tb.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test6/tb.h b/src/systemc/tests/systemc/misc/synth/inlining/test6/tb.h new file mode 100644 index 000000000..5e76fb35d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test6/tb.h @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test6/test.cpp b/src/systemc/tests/systemc/misc/synth/inlining/test6/test.cpp new file mode 100644 index 000000000..e492286d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test6/test.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +// +// Verifies function inlining +// +// Author: PRP +// Date Created: 26 Feb 99 +// + +#include "systemc.h" +#include "test.h" + +void test::entry() +{ + int i,j,h, temp; + + wait (); + j = i1.read(); + for (i = 0; i < 4; i = i + 1) + { // Default: no unrolling + j = j + 1; + wait(); + } + wait (); + temp = 4+j; + modify (o1, temp); + h = (i1 > i2) ? i3 : i4; + o2 = h; + wait (); + i= 9; + noModify (i); + wait(); +} + + +void test::modify (sc_signal& i, int& j) +{ + i = i1 + j; +} + +void test::noModify (int i) +{ + o3 = i; +} diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test6/test.f b/src/systemc/tests/systemc/misc/synth/inlining/test6/test.f new file mode 100644 index 000000000..5fe85ff15 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test6/test.f @@ -0,0 +1,3 @@ +test6/test.cpp +test6/tb.cpp +test6/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/inlining/test6/test.h b/src/systemc/tests/systemc/misc/synth/inlining/test6/test.h new file mode 100644 index 000000000..8df47ed52 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/inlining/test6/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void modify (sc_signal&, int&); + void noModify (int); + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/common.h b/src/systemc/tests/systemc/misc/synth/prime_flag/common.h new file mode 100644 index 000000000..c868bf6a6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<16> bool_vector; +typedef sc_signal signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/display.cpp b/src/systemc/tests/systemc/misc/synth/prime_flag/display.cpp new file mode 100644 index 000000000..e4f8ae94e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/display.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: display.cc */ + /*****************************************/ + +#include "display.h" + +void displayp::entry() +{ + bool_vector last_prime; + + while (true) { + + last_prime = prime.read(); + wait(); + + do { wait(); } while (prime_ready == 0); + cout << prime.read().to_uint() << endl; + + if (prime.read().to_uint() > 40) { + sc_stop(); + } + } +} diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/display.h b/src/systemc/tests/systemc/misc/synth/prime_flag/display.h new file mode 100644 index 000000000..44b7a90dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/display.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: display.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( displayp ) +{ + SC_HAS_PROCESS( displayp ); + + sc_in_clk clk; + + // Inputs + const sc_signal& prime_ready; + const signal_bool_vector& prime; + + // Constructor + displayp (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& PRIME_READY, + const signal_bool_vector& PRIME ) + + : + prime_ready (PRIME_READY), + prime (PRIME) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/golden/prime_flag.log b/src/systemc/tests/systemc/misc/synth/prime_flag/golden/prime_flag.log new file mode 100644 index 000000000..147abf5fd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/golden/prime_flag.log @@ -0,0 +1,18 @@ +SystemC Simulation +1 +Terminating process T1.entry +2 +3 +5 +7 +11 +13 +17 +19 +23 +29 +31 +37 +41 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/main.cpp b/src/systemc/tests/systemc/misc/synth/prime_flag/main.cpp new file mode 100644 index 000000000..cf63b5e05 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/main.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + +#include "reset.h" +#include "display.h" +#include "prime_numgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal reset ("reset"); + sc_signal prime_ready ("prime_ready"); + signal_bool_vector prime ("prime"); + +// Clock Instantiation + sc_clock clk ("CLK", 6, SC_NS, 0.5, 10, SC_NS, false); // 167 Mhz + +// Process Instantiation + prime_numgen D1 ("D1", clk, reset, prime_ready, prime); + + resetp T1 ("T1", clk, reset); + + displayp T2 ("T2", clk, prime_ready, prime); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/prime_flag.f b/src/systemc/tests/systemc/misc/synth/prime_flag/prime_flag.f new file mode 100644 index 000000000..baf7285c1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/prime_flag.f @@ -0,0 +1,4 @@ +prime_flag/reset.cpp +prime_flag/display.cpp +prime_flag/prime_numgen.cpp +prime_flag/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/prime_numgen.cpp b/src/systemc/tests/systemc/misc/synth/prime_flag/prime_numgen.cpp new file mode 100644 index 000000000..07c937abe --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/prime_numgen.cpp @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + prime_numgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*** Prime Number Generator ***/ +/*** Implementation Filename: prime_numgen.cc ***/ +/******************************************************************************/ + +#include "prime_numgen.h" + +void prime_numgen::entry() +{ + + static unsigned int p2 = 1, + p3 = 0, + p5 = 0, + p7 = 0, + p11 = 0, + p13 = 0, + p17 = 0, + p19 = 0, + p23 = 0, + p29 = 0; + + // HANDSHAKING + prime_ready.write(0); + wait(); + + // COMPUTE LOOP + while (true) { + + // PRINT prime IF ALL OTHER VALUES ARE ZERO AND p2 IS NONZERO + if (p2 && !p3 && !p5 && !p7 && !p11 && !p13 && !p17 && !p19 && !p23 && !p29) + { + prime_ready.write(1); + prime.write(p2); // Printing prime value p2 + wait(); + + prime_ready.write(0); + } + wait(); + + // DETERMINE NEW PRIME NUMBER + if (p7 && p13) { p7--, p13--, p17++; } + else if (p5 && p17) { p5--, p17--, p2++, p3++, p13++; } + else if (p3 && p17) { p3--, p17--, p19++; } + else if (p2 && p19) { p2--, p19--, p23++; } + else if (p3 && p11) { p3--, p11--, p29++; } + else if (p29) { p29--, p7++, p11++; } + else if (p23) { p23--, p5++, p19++; } + else if (p19) { p19--, p7++, p11++; } + else if (p17) { p17 = 0; } + else if (p13) { p13--, p11++; } + else if (p11) { p11--, p13++; } + else if (p2 && p7) { p2--, p7--, p3++, p5++; } + else if (p2) { p2--, p3++, p5++; } + else { p5++, p11++; } + } +} diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/prime_numgen.h b/src/systemc/tests/systemc/misc/synth/prime_flag/prime_numgen.h new file mode 100644 index 000000000..f01ea57bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/prime_numgen.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + prime_numgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: prime_numgen.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( prime_numgen ) +{ + SC_HAS_PROCESS( prime_numgen ); + + sc_in_clk clk; + + // Inputs + const sc_signal& reset; + // Outputs + sc_signal& prime_ready; + signal_bool_vector& prime; + + // Constructor + prime_numgen (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& RESET, + sc_signal& PRIME_READY, + signal_bool_vector& PRIME ) + + : + reset (RESET), + prime_ready (PRIME_READY), + prime (PRIME) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,false); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/reset.cpp b/src/systemc/tests/systemc/misc/synth/prime_flag/reset.cpp new file mode 100644 index 000000000..43e3ce8d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/reset.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + reset.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Implementation Filename: reset.cc */ + /***************************************/ + +#include "reset.h" + +void resetp::entry() +{ + reset.write(0); + wait(3); + + reset.write(1); + wait(); + + halt(); +} diff --git a/src/systemc/tests/systemc/misc/synth/prime_flag/reset.h b/src/systemc/tests/systemc/misc/synth/prime_flag/reset.h new file mode 100644 index 000000000..c918604e5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/prime_flag/reset.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + reset.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: reset.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( resetp ) +{ + SC_HAS_PROCESS( resetp ); + + sc_in_clk clk; + + // Outputs + sc_signal& reset; + + // Constructor + resetp (sc_module_name NAME, + sc_clock& TICK, + sc_signal& RESET ) + + : + reset (RESET) + + { + clk (TICK); + SC_CTHREAD( entry, clk.neg() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/reduce/golden/reduce.log b/src/systemc/tests/systemc/misc/synth/reduce/golden/reduce.log new file mode 100644 index 000000000..a17537cd2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/reduce/golden/reduce.log @@ -0,0 +1,6 @@ +SystemC Simulation +1690 +1690 +1625 +2665 +1365 diff --git a/src/systemc/tests/systemc/misc/synth/reduce/reduce.cpp b/src/systemc/tests/systemc/misc/synth/reduce/reduce.cpp new file mode 100644 index 000000000..073aa86b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/reduce/reduce.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + reduce.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +unsigned +reduce_imp(const sc_bv<8>& x) +{ + unsigned r = 0; + r = (r << 1) | x.and_reduce(); + r = (r << 1) | x.nand_reduce(); + r = (r << 1) | x.or_reduce(); + r = (r << 1) | x.nor_reduce(); + r = (r << 1) | x.xor_reduce(); + r = (r << 1) | x.xnor_reduce(); + + r = (r << 1) | and_reduce(x); + r = (r << 1) | nand_reduce(x); + r = (r << 1) | or_reduce(x); + r = (r << 1) | nor_reduce(x); + r = (r << 1) | xor_reduce(x); + r = (r << 1) | xnor_reduce(x); + + return r; +} + +int +sc_main(int argc, char* argv[]) +{ + sc_bv<8> u; + u = "10011011"; + cout << reduce_imp(u) << endl; + u = "11101001"; + cout << reduce_imp(u) << endl; + u = "01101001"; + cout << reduce_imp(u) << endl; + u = "11111111"; + cout << reduce_imp(u) << endl; + u = "00000000"; + cout << reduce_imp(u) << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/scflow/t/golden/t.log b/src/systemc/tests/systemc/misc/synth/scflow/t/golden/t.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/scflow/t/golden/t.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/scflow/t/main.cpp b/src/systemc/tests/systemc/misc/synth/scflow/t/main.cpp new file mode 100644 index 000000000..d24ab5b6b --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/scflow/t/main.cpp @@ -0,0 +1,43 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int ac, char* av[]) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/scflow/t/t.cpp b/src/systemc/tests/systemc/misc/synth/scflow/t/t.cpp new file mode 100644 index 000000000..44eaf3c52 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/scflow/t/t.cpp @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + t.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "test.h" + +void t::entry() +{ + wait(); + wait (); + do { wait(); } while (cont1 == 0); + wait (); + o1 = 4; + wait (); + wait (); + wait (); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/scflow/t/t.f b/src/systemc/tests/systemc/misc/synth/scflow/t/t.f new file mode 100644 index 000000000..37c5d2058 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/scflow/t/t.f @@ -0,0 +1,2 @@ +t/t.cpp +t/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/scflow/t/test.h b/src/systemc/tests/systemc/misc/synth/scflow/t/test.h new file mode 100644 index 000000000..638eff008 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/scflow/t/test.h @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/synth-1.0/gcd/gcd.cpp b/src/systemc/tests/systemc/misc/synth/synth-1.0/gcd/gcd.cpp new file mode 100644 index 000000000..370324974 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/synth-1.0/gcd/gcd.cpp @@ -0,0 +1,175 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + gcd.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +struct gcd_cc : public sc_module { + sc_in_clk clk; + sc_in reset; + sc_in a; + sc_in b; + sc_out c; + sc_out ready; + + void gcd_compute(); + + SC_HAS_PROCESS( gcd_cc ); + + gcd_cc( sc_module_name name ) + { + SC_CTHREAD( gcd_compute, clk.pos() ); + reset_signal_is(reset,true); + } +}; + +void +gcd_cc::gcd_compute() +{ + unsigned tmp_a = 0; + wait(); // Note that this wait() is required, otherwise, + // the reset is wrong! This is a problem with BC, + // not our frontend. + + while (true) { + unsigned tmp_b; + + c = tmp_a; + ready = true; + wait(); + + tmp_a = a; + tmp_b = b; + ready = false; + wait(); + + while (tmp_b != 0) { + + unsigned tmp_c = tmp_a; + tmp_a = tmp_b; + wait(); + + while (tmp_c >= tmp_b) { + tmp_c = tmp_c - tmp_b; + wait(); + } + + tmp_b = tmp_c; + wait(); + } + } +} + +static int numbers[] = { 49597, 41218, 20635, 40894, 16767, 17233, 36246, 28171, 60879, 49566, 10971, 24107, 30561, 49648, 50031, 12559, 23787, 35674, 43320, 37558, 840, 18689, 62466, 6308, 46271, 49801, 43433, 22683, 35494, 35259, 29020, 19555, 10941, 49656, 60450, 27709, 1353, 31160, 55880, 62232, 15190, 1315, 20803, 45751, 50963, 5298, 58311, 9215, 2378 }; +static unsigned numbers_index = 0; + +struct testbench : public sc_module { + sc_in_clk clk; + sc_inout reset; + sc_in ready; + sc_inout a; + sc_inout b; + sc_in c; + + void reset_gen(); + void stimu_gen(); + void display(); + + SC_HAS_PROCESS( testbench ); + + testbench( sc_module_name name ) + { + SC_CTHREAD( reset_gen, clk.pos() ); + SC_CTHREAD( stimu_gen, clk.pos() ); + SC_METHOD( display ); + sensitive << ready; + } +}; + +void +testbench::reset_gen() +{ + reset = 0; + wait(); + reset = 1; + wait(); + wait(); + reset = 0; + wait(); + /* die */ +} + +void +testbench::stimu_gen() +{ + while (true) { + do { wait(); } while (ready == 0); + a = (unsigned) numbers[numbers_index++ % (sizeof(numbers)/sizeof(numbers[0]))]; + b = (unsigned) numbers[(numbers_index*numbers_index) % (sizeof(numbers)/sizeof(numbers[0]))]; + numbers_index++; + } +} + +void +testbench::display() +{ + if (ready) { + cout << "reset = " << reset << " ready = " << ready + << " a = " << a << " b = " << b << " c = " << c << endl; + } +} + +int sc_main(int argc, char* argv[] ) +{ + sc_signal a("a"), b("b"), c("c"); + sc_clock clk("clk", 20, SC_NS); + sc_signal reset("reset"), ready("ready"); + + a = 0; + b = 0; + c = 0; + reset = false; + ready = false; + + gcd_cc gcd("gcd"); + gcd(clk, reset, a, b, c, ready); + + testbench tb("tb"); + tb(clk, reset, ready, a, b, c); + + sc_start(2000000, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/synth-1.0/gcd/golden/gcd.log b/src/systemc/tests/systemc/misc/synth/synth-1.0/gcd/golden/gcd.log new file mode 100644 index 000000000..77a93afc2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/synth-1.0/gcd/golden/gcd.log @@ -0,0 +1,1109 @@ +SystemC Simulation +reset = 1 ready = 1 a = 0 b = 0 c = 0 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 +reset = 0 ready = 1 a = 12559 b = 24107 c = 1 +reset = 0 ready = 1 a = 35674 b = 29020 c = 1 +reset = 0 ready = 1 a = 37558 b = 60879 c = 2 +reset = 0 ready = 1 a = 18689 b = 45751 c = 1 +reset = 0 ready = 1 a = 6308 b = 31160 c = 1 +reset = 0 ready = 1 a = 49801 b = 62232 c = 76 +reset = 0 ready = 1 a = 22683 b = 49597 c = 1 +reset = 0 ready = 1 a = 35259 b = 43320 c = 1 +reset = 0 ready = 1 a = 19555 b = 50963 c = 3 +reset = 0 ready = 1 a = 49656 b = 35259 c = 1 +reset = 0 ready = 1 a = 27709 b = 62466 c = 3 +reset = 0 ready = 1 a = 31160 b = 6308 c = 1 +reset = 0 ready = 1 a = 62232 b = 10941 c = 76 +reset = 0 ready = 1 a = 1315 b = 49597 c = 3 +reset = 0 ready = 1 a = 45751 b = 49801 c = 1 +reset = 0 ready = 1 a = 5298 b = 49566 c = 1 +reset = 0 ready = 1 a = 9215 b = 41218 c = 6 +reset = 0 ready = 1 a = 49597 b = 41218 c = 1 +reset = 0 ready = 1 a = 20635 b = 49566 c = 1 +reset = 0 ready = 1 a = 16767 b = 49801 c = 1 +reset = 0 ready = 1 a = 36246 b = 49597 c = 1 +reset = 0 ready = 1 a = 60879 b = 10941 c = 1 +reset = 0 ready = 1 a = 10971 b = 6308 c = 21 +reset = 0 ready = 1 a = 30561 b = 62466 c = 1 +reset = 0 ready = 1 a = 50031 b = 35259 c = 3 +reset = 0 ready = 1 a = 23787 b = 50963 c = 3 +reset = 0 ready = 1 a = 43320 b = 43320 c = 1 +reset = 0 ready = 1 a = 840 b = 49597 c = 43320 +reset = 0 ready = 1 a = 62466 b = 62232 c = 1 +reset = 0 ready = 1 a = 46271 b = 31160 c = 6 +reset = 0 ready = 1 a = 43433 b = 45751 c = 1 +reset = 0 ready = 1 a = 35494 b = 60879 c = 1 +reset = 0 ready = 1 a = 29020 b = 29020 c = 1 +reset = 0 ready = 1 a = 10941 b = 24107 c = 29020 +reset = 0 ready = 1 a = 60450 b = 49597 c = 1 +reset = 0 ready = 1 a = 1353 b = 58311 c = 1 +reset = 0 ready = 1 a = 55880 b = 20635 c = 33 +reset = 0 ready = 1 a = 15190 b = 12559 c = 5 +reset = 0 ready = 1 a = 20803 b = 1353 c = 1 +reset = 0 ready = 1 a = 50963 b = 23787 c = 1 +reset = 0 ready = 1 a = 58311 b = 16767 c = 1 +reset = 0 ready = 1 a = 2378 b = 49597 c = 9 +reset = 0 ready = 1 a = 41218 b = 16767 c = 1 +reset = 0 ready = 1 a = 40894 b = 23787 c = 1 +reset = 0 ready = 1 a = 17233 b = 1353 c = 1 +reset = 0 ready = 1 a = 28171 b = 12559 c = 1 +reset = 0 ready = 1 a = 49566 b = 20635 c = 1 +reset = 0 ready = 1 a = 24107 b = 58311 c = 1 +reset = 0 ready = 1 a = 49648 b = 49597 c = 1 diff --git a/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_blast/golden/pr-207_blast.log b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_blast/golden/pr-207_blast.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_blast/golden/pr-207_blast.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_blast/pr-207_blast.cpp b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_blast/pr-207_blast.cpp new file mode 100644 index 000000000..acf33e58b --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_blast/pr-207_blast.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-207_blast.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + +struct my_pair { + char x; + char y; +}; + +typedef sc_signal sig_bool; +typedef sc_signal sig_char; +typedef sc_signal sig_uchar; + +SC_MODULE( pr207 ) +{ + SC_HAS_PROCESS( pr207 ); + + sc_in_clk clk; + + pr207(sc_module_name NAME, + sc_clock& CLK, + + const sig_bool& RESET, + const sig_bool& START, + const sig_char& C1, + const sig_char& C2, + const sig_uchar& IDX1, + const sig_uchar& IDX2, + sig_char& D1, + sig_char& D2, + sig_bool& READY + ) + : + reset(RESET), + start(START), + c1(C1), + c2(C2), + idx1(IDX1), + idx2(IDX2), + d1(D1), + d2(D2), + ready(READY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + } + void entry(); + + const sig_bool& reset; + const sig_bool& start; + const sig_char& c1; + const sig_char& c2; + const sig_uchar& idx1; + const sig_uchar& idx2; + sig_char& d1; + sig_char& d2; + sig_bool& ready; + +}; + +void +pr207::entry() +{ + my_pair pair_array[10]; + + ready = true; + d1 = 0; + d2 = 0; + wait(); + while (true) { + do { wait(); } while (start == 0); + ready = false; + wait(); + pair_array[idx1.read()].x = c1; + pair_array[idx1.read()].y = c2; + wait(); + pair_array[idx2.read()] = pair_array[idx1.read()]; + wait(); + char d1_tmp = pair_array[idx2.read()].y; + wait(); + char d2_tmp = pair_array[idx2.read()].x; + wait(); + d1 = d1_tmp; + d2 = d2_tmp; + ready = true; + } +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_mem/golden/pr-207_mem.log b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_mem/golden/pr-207_mem.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_mem/golden/pr-207_mem.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_mem/pr-207_mem.cpp b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_mem/pr-207_mem.cpp new file mode 100644 index 000000000..ea4967f8f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_mem/pr-207_mem.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-207_mem.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +struct my_pair { + char x; + char y; +}; + +typedef sc_signal sig_bool; +typedef sc_signal sig_char; +typedef sc_signal sig_uchar; + +SC_MODULE( pr207 ) +{ + SC_HAS_PROCESS( pr207 ); + + sc_in_clk clk; + + pr207(sc_module_name NAME, + sc_clock& CLK, + + const sig_bool& RESET, + const sig_bool& START, + const sig_char& C1, + const sig_char& C2, + const sig_uchar& IDX1, + const sig_uchar& IDX2, + sig_char& D1, + sig_char& D2, + sig_bool& READY + ) + : + reset(RESET), + start(START), + c1(C1), + c2(C2), + idx1(IDX1), + idx2(IDX2), + d1(D1), + d2(D2), + ready(READY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + } + void entry(); + + const sig_bool& reset; + const sig_bool& start; + const sig_char& c1; + const sig_char& c2; + const sig_uchar& idx1; + const sig_uchar& idx2; + sig_char& d1; + sig_char& d2; + sig_bool& ready; + +}; + +void +pr207::entry() +{ + my_pair pair_array[10]; + + ready = true; + d1 = 0; + d2 = 0; + wait(); + while (true) { + do { wait(); } while (start == 0); + ready = false; + wait(); + pair_array[idx1.read()].x = c1; + pair_array[idx1.read()].y = c2; + wait(); + pair_array[idx2.read()] = pair_array[idx1.read()]; + wait(); + char d1_tmp = pair_array[idx2.read()].y; + wait(); + char d2_tmp = pair_array[idx2.read()].x; + wait(); + d1 = d1_tmp; + d2 = d2_tmp; + ready = true; + } +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_rf/golden/pr-207_rf.log b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_rf/golden/pr-207_rf.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_rf/golden/pr-207_rf.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_rf/pr-207_rf.cpp b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_rf/pr-207_rf.cpp new file mode 100644 index 000000000..37b62a95b --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_rf/pr-207_rf.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pr-207_rf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +struct my_pair { + char x; + char y; +}; + +typedef sc_signal sig_bool; +typedef sc_signal sig_char; +typedef sc_signal sig_uchar; + +SC_MODULE( pr207 ) +{ + SC_HAS_PROCESS( pr207 ); + + sc_in_clk clk; + + pr207(sc_module_name NAME, + sc_clock& CLK, + + const sig_bool& RESET, + const sig_bool& START, + const sig_char& C1, + const sig_char& C2, + const sig_uchar& IDX1, + const sig_uchar& IDX2, + sig_char& D1, + sig_char& D2, + sig_bool& READY + ) + : + reset(RESET), + start(START), + c1(C1), + c2(C2), + idx1(IDX1), + idx2(IDX2), + d1(D1), + d2(D2), + ready(READY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,true); + } + void entry(); + + const sig_bool& reset; + const sig_bool& start; + const sig_char& c1; + const sig_char& c2; + const sig_uchar& idx1; + const sig_uchar& idx2; + sig_char& d1; + sig_char& d2; + sig_bool& ready; + +}; + +void +pr207::entry() +{ + my_pair pair_array[10]; + + ready = true; + d1 = 0; + d2 = 0; + wait(); + while (true) { + do { wait(); } while (start == 0); + ready = false; + wait(); + pair_array[idx1.read()].x = c1; + pair_array[idx1.read()].y = c2; + wait(); + pair_array[idx2.read()] = pair_array[idx1.read()]; + wait(); + char d1_tmp = pair_array[idx2.read()].y; + wait(); + char d2_tmp = pair_array[idx2.read()].x; + wait(); + d1 = d1_tmp; + d2 = d2_tmp; + ready = true; + } +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test1/golden/test1.log b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test1/golden/test1.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test1/golden/test1.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test1/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test1/test.h new file mode 100644 index 000000000..4a591ce30 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test1/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test1/test1.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test1/test1.cpp new file mode 100644 index 000000000..4ff400163 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test1/test1.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void t::entry() +{ + wait(); + wait (); + + do { wait(); } while (cont1 == 0); + + + +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test2/golden/test2.log b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test2/golden/test2.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test2/golden/test2.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test2/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test2/test.h new file mode 100644 index 000000000..4a591ce30 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test2/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test2/test2.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test2/test2.cpp new file mode 100644 index 000000000..e128e0372 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test2/test2.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void t::entry() +{ + wait(); + while (1) { + do { wait(); } while (cont1 == 0); + if (i2 == 1) + break; + /* error: wait needs to be inserted between do { wait(); } while + and break */ + } + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test3/golden/test3.log b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test3/golden/test3.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test3/golden/test3.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test3/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test3/test.h new file mode 100644 index 000000000..5bd25d99e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test3/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test3/test3.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test3/test3.cpp new file mode 100644 index 000000000..411e2f4e7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test3/test3.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void t::entry() +{ + wait(); + while (1) { + if (i2 == 1) + continue; + /* error: do { wait(); } while transformation does not allow continue stmt + before it if no wait follows the do { wait(); } while */ + do { wait(); } while (cont1 == 0); + if (i2 == 1) + break; + } + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test4/golden/test4.log b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test4/golden/test4.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test4/golden/test4.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test4/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test4/test.h new file mode 100644 index 000000000..5bd25d99e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test4/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test4/test4.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test4/test4.cpp new file mode 100644 index 000000000..d8c42acd3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test4/test4.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void t::entry() +{ + wait(); + if (i1 == 1) { + while (i1 == 1) { + do { wait(); } while (cont1 == 1); + } + } else { + wait(); + } + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test5/golden/test5.log b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test5/golden/test5.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test5/golden/test5.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test5/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test5/test.h new file mode 100644 index 000000000..5bd25d99e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test5/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk (CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test5/test5.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test5/test5.cpp new file mode 100644 index 000000000..74a0f56e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test5/test5.cpp @@ -0,0 +1,179 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test5.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void t::entry() +{ + wait(); + /* error: control nesting too deep - error reported in siu_do { wait(); } while .c */ + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) +#if !defined( _MSC_VER ) + // running into limitations of VC6 here + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) + if (i1 == 1) +#endif + wait(); + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test6/golden/test6.log b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test6/golden/test6.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test6/golden/test6.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test6/test1.h b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test6/test1.h new file mode 100644 index 000000000..570465d8e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test6/test1.h @@ -0,0 +1,105 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( t ) +{ + SC_HAS_PROCESS( t ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + t ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); + void a(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/misc/test6/test6.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test6/test6.cpp new file mode 100644 index 000000000..3f1f002d4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/misc/test6/test6.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test6.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test1.h" + +void t::a() +{ + do { wait(); } while (cont1 == 1); + +} + +void t::entry() +{ + a(); + wait(); +} + +int sc_main(int argc, char* argv[] ) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test01/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test01/define.h new file mode 100644 index 000000000..9b4c36e61 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test01/define.h @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(5*CLOCK_PERIOD) +#define single_cycle wait() +#define set_value(var,val) wait(EVENT_TIME); var = val; wait(CLOCK_PERIOD - EVENT_TIME) +#define test_value(actual, expected) \ + wait (TEST_TIME); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait (CLOCK_PERIOD - TEST_TIME) +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test01/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test01/golden/test.log new file mode 100644 index 000000000..d75ef208f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test01/golden/test.log @@ -0,0 +1,4 @@ +SystemC Simulation +Begin Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test01/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test01/main.cpp new file mode 100644 index 000000000..b754b436b --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test01/main.cpp @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test01/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test01/tb.cpp new file mode 100644 index 000000000..7c819fbf9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test01/tb.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + reset_sig = 1; + cont1 = 0; + single_cycle; + single_cycle; + reset_sig = 0; + + long_wait; + + set_value(cont1,1); + single_cycle; + test_value(o1.read(),4); + long_wait; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test01/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test01/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test01/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test01/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test01/test.cpp new file mode 100644 index 000000000..ca94c1583 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test01/test.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void test::entry() +{ + wait(); + wait (); + do { wait(); } while (cont1 == 1); + wait (); + o1 = 4; + wait (); + wait (); + wait (); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test01/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test01/test.f new file mode 100644 index 000000000..18d0009a8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test01/test.f @@ -0,0 +1,3 @@ +test01/test.cpp +test01/tb.cpp +test01/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test01/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test01/test.h new file mode 100644 index 000000000..56820dca5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test01/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test02/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test02/golden/test.log new file mode 100644 index 000000000..ae1be6e37 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/golden/test.log @@ -0,0 +1,30 @@ +SystemC Simulation +Begin Simulation +[Cycle No: 0] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 1] i1 = 5 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 2] i1 = 5 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 3] i1 = 5 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 4] i1 = 5 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 5] i1 = 5 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 6] i1 = 5 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 7] i1 = 5 o1 = 0 o2 = 0 cont1 = 1 +[Cycle No: 8] i1 = 5 o1 = 0 o2 = 0 cont1 = 1 +[Cycle No: 9] i1 = 5 o1 = 0 o2 = 0 cont1 = 1 +[Cycle No: 10] i1 = 5 o1 = 2 o2 = 0 cont1 = 1 +[Cycle No: 11] i1 = 5 o1 = 2 o2 = 3 cont1 = 1 +[Cycle No: 12] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 13] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 14] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 15] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +Mismatch. Expected: 2. Actual: 0 +[Cycle No: 16] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +Mismatch. Expected: 3. Actual: 0 +[Cycle No: 17] i1 = 0 o1 = 2 o2 = 0 cont1 = 0 +[Cycle No: 18] i1 = 0 o1 = 2 o2 = 3 cont1 = 0 +[Cycle No: 19] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 20] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 21] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +[Cycle No: 22] i1 = 0 o1 = 0 o2 = 0 cont1 = 0 +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test02/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test02/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test02/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test02/tb.cpp new file mode 100644 index 000000000..97bb148ec --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/tb.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + reset_sig = 1; + cont1 = 0; + i1 = 0; + i2 = 0; + single_cycle; + reset_sig = 0; + + i1 = 5; + single_cycle; + single_cycle; + single_cycle; + single_cycle; + single_cycle; + single_cycle; + + set_value(cont1,1); + single_cycle; + single_cycle; + + test_value(o1,2); + test_value(o2,3); + + // 2nd iteration. Test 'else' clause. + i1 = 0; + i2 = 0; + cont1 = 0; + single_cycle; + single_cycle; + single_cycle; + single_cycle; + + test_value(o1,2); + test_value(o2,3); + + long_wait; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test02/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test02/test.cpp new file mode 100644 index 000000000..bbd1a5933 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/test.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void test::entry() +{ + while (true) { + o1 = 0; o2 = 0; + wait(); + wait(); + wait (); + if (i1 == 5) { + do { wait(); } while (cont1 == 0); + wait (); + } else { + wait (); + } + wait (); + o1 = 2; + wait (); + o2 = 3; + wait (); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test02/test.f new file mode 100644 index 000000000..030dc67dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/test.f @@ -0,0 +1,4 @@ +test02/test.cpp +test02/tb.cpp +test02/monitor.cpp +test02/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test02/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test02/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test02/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test03/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test03/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test03/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test03/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test03/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test03/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test03/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test03/test.cpp new file mode 100644 index 000000000..92b753daa --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/test.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void test::entry() +{ + while (true) { + o1 = 0; + do { wait(); } while (cont1 == 1); + wait(); + wait (); + if (i1 == 5) { + if (i2 == 5) { + do { wait(); } while (cont2 == 1); + wait (); + o1 = 1; + } else { + wait(); + o1 = 2; + } + } else { + wait(); + o1 = 3; + } + wait (); + wait (); + wait (); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test03/test.f new file mode 100644 index 000000000..44bca3f91 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/test.f @@ -0,0 +1,4 @@ +test03/test.cpp +test03/tb.cpp +test03/monitor.cpp +test03/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test03/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test03/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test03/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test04/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test04/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test04/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test04/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test04/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test04/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test04/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test04/test.cpp new file mode 100644 index 000000000..b10e4c6a7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/test.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 == 1); + wait(); + o1 = 0; + wait (); + if (i1 == 5) { + do { wait(); } while (cont2 == 1); + } else { + wait (); + } + o1 = 6; + wait (); + wait (); + wait (); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test04/test.f new file mode 100644 index 000000000..2a530a6e3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/test.f @@ -0,0 +1,4 @@ +test04/test.cpp +test04/tb.cpp +test04/monitor.cpp +test04/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test04/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test04/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test04/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test05/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test05/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test05/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test05/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test05/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test05/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test05/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test05/test.cpp new file mode 100644 index 000000000..b6a5cc9b0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/test.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 == 1); + wait(); + o1 = 0; + o2 = 0; + o3 = 0; + o4 = 0; + o5 = 0; + wait (); + if (i1 == 5) { + if (i2 == 5) { + if (i3 == 5) { + do { wait(); } while (cont2 == 1); + } else { + wait (); + } + o1 = 9; + o2 = 10; + wait(); + } else { + wait (); + } + o3 = 5; + o4 = 10; + wait(); + wait(); + } else { + wait (); + } + o5 = 6; + wait (); + wait (); + wait (); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test05/test.f new file mode 100644 index 000000000..a2d56602a --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/test.f @@ -0,0 +1,4 @@ +test05/test.cpp +test05/tb.cpp +test05/monitor.cpp +test05/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test05/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test05/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test05/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test06/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test06/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test06/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test06/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test06/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test06/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test06/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test06/test.cpp new file mode 100644 index 000000000..8e0b65f6c --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/test.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 50.sc */ +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 == 0); + wait(); + o1 = 0; + o2 = 0; + o3 = 0; + o4 = 0; + o5 = 0; + wait (); + if (i1 == 5) { + if (i2 == 5) { + if (i3 == 5) { + do { wait(); } while (cont2 == 0); + } else { + wait (); + } + o1 = 9; + o2 = 10; + } else { + wait (); + } + o3 = 5; + o4 = 10; + wait(); + wait(); + } else { + wait (); + } + o5 = 6; + wait (); + wait (); + wait (); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test06/test.f new file mode 100644 index 000000000..687c574e6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/test.f @@ -0,0 +1,4 @@ +test06/test.cpp +test06/tb.cpp +test06/monitor.cpp +test06/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test06/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test06/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test06/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test07/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test07/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test07/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test07/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test07/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test07/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test07/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test07/test.cpp new file mode 100644 index 000000000..5c3f91119 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/test.cpp @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 51.sc */ +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 == 0); + wait(); + o1 = 0; + o2 = 0; + o3 = 0; + o4 = 0; + o5 = 0; + wait (); + if (i1 == 25) { + if (i2 == 15) { + if (i3 == 5) { + wait (); + } else { + if (i4 == 1) { + wait (); + o5 = 2; + } else { + do { wait(); } while (cont2 != 8); + } + } + o1 = 9; + o2 = 10; + } else { + wait(); + wait(); + } + o3 = 5; + o4 = 20; + wait(); + wait(); + } else { + wait(); + } + o5 = 6; + wait (); + wait (); + wait (); + + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test07/test.f new file mode 100644 index 000000000..06081cb35 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/test.f @@ -0,0 +1,4 @@ +test07/test.cpp +test07/tb.cpp +test07/monitor.cpp +test07/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test07/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test07/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test07/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test08/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test08/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test08/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test08/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test08/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test08/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test08/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test08/test.cpp new file mode 100644 index 000000000..d59304852 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/test.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 52.sc */ +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 == 0); + wait(); + o1 = 0; + o2 = 0; + o3 = 0; + o4 = 0; + o5 = 0; + wait (); + if (i1 == 25) { + if (i2 == 15) { + if (i3 == 5) { + wait (); + } else { + if (i4 == 1) { + wait (); + o5 = 2; + } else { + do { wait(); } while (cont2 != 8); + wait (); + } + } + o1 = 9; + o2 = 10; + } else { + wait(); + wait(); + } + o3 = 5; + o4 = 20; + wait(); + wait(); + } else { + wait(); + } + o5 = 6; + wait (); + wait (); + wait (); + + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test08/test.f new file mode 100644 index 000000000..97efb0322 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/test.f @@ -0,0 +1,4 @@ +test08/test.cpp +test08/tb.cpp +test08/monitor.cpp +test08/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test08/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test08/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test08/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test09/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test09/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test09/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test09/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test09/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test09/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test09/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test09/test.cpp new file mode 100644 index 000000000..2a4edae69 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/test.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 53.sc */ +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 != 1); + + wait(); + while (i1 < 4) { + o1 = 0; + wait (); + do { wait(); } while (cont2 != 1); + o1 = 1; + wait (); + } + wait(); + + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test09/test.f new file mode 100644 index 000000000..1dd8094ef --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/test.f @@ -0,0 +1,4 @@ +test09/test.cpp +test09/tb.cpp +test09/monitor.cpp +test09/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test09/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test09/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test09/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test10/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test10/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test10/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test10/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test10/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test10/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test10/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test10/test.cpp new file mode 100644 index 000000000..d6cdb4529 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/test.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 54.sc */ +void test::entry() +{ + while (true) { + + wait(); + o1 = 2; + do { wait(); } while (cont1 != 1); + wait(); + while (1) { + wait (); + o1 = i2 + 1; + do { wait(); } while (cont1 != 1); + } + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test10/test.f new file mode 100644 index 000000000..328dc35a0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/test.f @@ -0,0 +1,4 @@ +test10/test.cpp +test10/tb.cpp +test10/monitor.cpp +test10/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test10/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test10/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test10/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test11/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test11/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test11/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test11/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test11/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test11/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test11/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test11/test.cpp new file mode 100644 index 000000000..4eca67444 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/test.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 55.sc */ +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 != 1); + wait(); + if (i2 == 1) + o1 = 9; + else + o1 = 10; + wait (); + switch (i3) { + case 1: o2 = 8; do { wait(); } while (cont2 != 1); break; + case 2: o2 = 9; wait(); break; + case 3: o2 = 10; wait(); break; + default: o2 = 11; wait(); break; + } + wait(); + o1 = 5; + wait(); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test11/test.f new file mode 100644 index 000000000..715ba8512 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/test.f @@ -0,0 +1,4 @@ +test11/test.cpp +test11/tb.cpp +test11/monitor.cpp +test11/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test11/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test11/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test11/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test12/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test12/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test12/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test12/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test12/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test12/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test12/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test12/test.cpp new file mode 100644 index 000000000..c517882da --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/test.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 56.sc */ +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 != 1); + wait(); + o1 = 9; + switch (i3) { + case 1: o2 = 8; + if (i2 > 4) + do { wait(); } while (cont1 != 1); + else + wait(); + break; + case 2: o2 = 9; wait(); break; + case 3: o2 = 10; wait(); break; + default: o2 = 11; wait(); break; + } + wait(); + o1 = 5; + wait(); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test12/test.f new file mode 100644 index 000000000..e193e228f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/test.f @@ -0,0 +1,4 @@ +test12/test.cpp +test12/tb.cpp +test12/monitor.cpp +test12/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test12/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test12/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test12/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test13/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test13/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test13/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test13/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test13/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test13/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test13/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test13/test.cpp new file mode 100644 index 000000000..26c93fdcf --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/test.cpp @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 57.sc */ +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 != 1); + wait (); + o1 = 9; + + switch (i5) { + case 1: + if (i2 > 4) { + o2 = 80; + do { wait(); } while (cont2 != 1); + } else { + o2 = 81; + wait(); + } + break; + case 2: + o2 = 9; + if (i4 == 5) { + wait(); wait(); break; + } + else + wait(); + break; + case 3: + o2 = 10; + wait(); + while (i3 < 5) { + wait(); + o3 = i4 + 1; + if (i4 > 7) break; + wait(); + } + wait (); + break; + default: o2 = 11; wait(); break; + } + if (i3 == 3) { + o1 = 4; + wait(); + } else { + o1 = 5; + wait(); + } + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test13/test.f new file mode 100644 index 000000000..b12d0f35b --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/test.f @@ -0,0 +1,4 @@ +test13/test.cpp +test13/tb.cpp +test13/monitor.cpp +test13/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test13/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test13/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test13/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test14/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test14/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test14/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test14/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test14/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test14/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test14/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test14/test.cpp new file mode 100644 index 000000000..5c82a908d --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/test.cpp @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 58.sc */ +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 != 1); + wait(); + o1 = 0; + wait (); + if (i1 > 5) { + if (i2 > 3) { + do { wait(); } while (cont2 != 1); + o1 = 9; + if (i2 > 6) + o2 = 6; + else + o2 = 7; + wait (); + if (i2 > 9) + o2 = 8; + else + o2 = 9; + } else { + o2 = 10; + wait(); + } + } else { + o2 = 11; + wait(); + } + wait (); + o1 = 1; + wait (); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test14/test.f new file mode 100644 index 000000000..5db160f14 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/test.f @@ -0,0 +1,4 @@ +test14/test.cpp +test14/tb.cpp +test14/monitor.cpp +test14/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test14/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test14/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test14/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test15/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test15/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test15/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test15/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test15/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test15/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test15/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test15/test.cpp new file mode 100644 index 000000000..faf5894a1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/test.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 59.sc */ +void test::entry() +{ + while (true) { + + do { wait(); } while (cont1 != 1); + wait(); + o1 = 5; + do { wait(); } while (cont2 != 1); + o1 = 1; + do { wait(); } while (cont1 != 1); + o1 = 2; + wait (); + o1 = 3; + if (i2 == 5) { + do { wait(); } while (cont2 != 1); + do { wait(); } while (cont1 != 1); + o1 = 4; + wait (); + wait (); + do { wait(); } while (cont2 != 1); + do { wait(); } while (cont1 != 1); + } else { + wait(); + } + o1 = 0; + wait (); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test15/test.f new file mode 100644 index 000000000..418eb1dff --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/test.f @@ -0,0 +1,4 @@ +test15/test.cpp +test15/tb.cpp +test15/monitor.cpp +test15/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test15/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test15/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test15/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test16/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test16/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test16/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test16/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test16/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test16/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test16/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test16/test.cpp new file mode 100644 index 000000000..c85de0a63 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/test.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 62.sc */ +void test::entry() +{ + while (true) { + + wait(); + do { wait(); } while (cont1 != 1); + wait(); + o2 = 8; + wait(); + while (i2 < 6) { + wait(); + o1 = 7; + do { wait(); } while (cont2 != 1); + } + wait(); + o2 = 0; + wait(); + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test16/test.f new file mode 100644 index 000000000..6593d828f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/test.f @@ -0,0 +1,4 @@ +test16/test.cpp +test16/tb.cpp +test16/monitor.cpp +test16/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test16/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test16/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test16/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/define.h b/src/systemc/tests/systemc/misc/synth/wait_until/test17/define.h new file mode 100644 index 000000000..d671993cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/define.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + define.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#define CLOCK_PERIOD 100 +#define TB_CLOCK_PERIOD 50 +#define DUTY_CYCLE 0.5 +#define EVENT_TIME 50 +#define TEST_TIME 50 + +#define long_wait wait(10) +#define single_cycle wait(2) +#define set_value(var,val) wait(); var = val; wait() +#define test_value(actual, expected) \ + wait (); if (expected != actual) \ + cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; \ + wait () +#define test_value_now(actual, expected) \ + if (expected != actual) cout << "Mismatch. Expected: " << expected \ + << ". Actual: " << actual << endl; + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/golden/test.log b/src/systemc/tests/systemc/misc/synth/wait_until/test17/golden/test.log new file mode 100644 index 000000000..510bd7f39 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/golden/test.log @@ -0,0 +1,5 @@ +SystemC Simulation +Begin Simulation +End Simulation + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/main.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test17/main.cpp new file mode 100644 index 000000000..f63c6fde6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "test.h" +#include "tb.h" +#include "monitor.h" +#include "define.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock tb_clock("TBClock", TB_CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 0, SC_NS); + sc_clock mon_clock("MonClock", CLOCK_PERIOD, SC_NS, DUTY_CYCLE, 75, SC_NS); + + sc_signal reset_sig; + + sc_signal i1; + sc_signal i2; + sc_signal i3; + sc_signal i4; + sc_signal i5; + + sc_signal cont1; + sc_signal cont2; + sc_signal cont3; + + sc_signal o1; + sc_signal o2; + sc_signal o3; + sc_signal o4; + sc_signal o5; + + test TEST ("TEST", clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + tb TB ("TB", tb_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + monitor MONITOR ("MONITOR", mon_clock, reset_sig, i1, i2, i3, i4, i5, + cont1, cont2, cont3, o1, o2, o3, o4, o5); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/monitor.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test17/monitor.cpp new file mode 100644 index 000000000..0a1f6643e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/monitor.cpp @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int cycleNo = 0; + + while (true) { + cout << "[Cycle No: " << cycleNo << "]" << + " i1 = " << i1 << + " o1 = " << o1 << + " o2 = " << o2 << + " cont1 = " << cont1 << + endl; + cycleNo++; + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/monitor.h b/src/systemc/tests/systemc/misc/synth/wait_until/test17/monitor.h new file mode 100644 index 000000000..d8f80b16e --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/monitor.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for monitor process + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + monitor ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/tb.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test17/tb.cpp new file mode 100644 index 000000000..6dc93138f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/tb.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "tb.h" +#include "define.h" + +void tb::entry() +{ + cout << "Begin Simulation" << endl; + + + cout << "End Simulation" << endl; + + sc_stop(); + +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/tb.h b/src/systemc/tests/systemc/misc/synth/wait_until/test17/tb.h new file mode 100644 index 000000000..1fecb570f --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/tb.h @@ -0,0 +1,103 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test bench + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( tb ) +{ + SC_HAS_PROCESS( tb ); + + sc_in_clk clk; + + // Output Reset Port + sc_signal& reset_sig; + + // Output Data Ports + sc_signal& i1; + sc_signal& i2; + sc_signal& i3; + sc_signal& i4; + sc_signal& i5; + + // Output Control Ports + sc_signal& cont1; + sc_signal& cont2; + sc_signal& cont3; + + // Input Data Ports + const sc_signal& o1; + const sc_signal& o2; + const sc_signal& o3; + const sc_signal& o4; + const sc_signal& o5; + + // Constructor + tb ( + sc_module_name NAME, + sc_clock& CLK, + + sc_signal& RESET_SIG, + + sc_signal& I1, + sc_signal& I2, + sc_signal& I3, + sc_signal& I4, + sc_signal& I5, + + sc_signal& CONT1, + sc_signal& CONT2, + sc_signal& CONT3, + + const sc_signal& O1, + const sc_signal& O2, + const sc_signal& O3, + const sc_signal& O4, + const sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/test.cpp b/src/systemc/tests/systemc/misc/synth/wait_until/test17/test.cpp new file mode 100644 index 000000000..ec4680efb --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/test.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "test.h" + +/* From Test Case 61.sc */ +void test::entry() +{ + while (true) { + + wait(); + o1 = 2; + do { wait(); } while (cont1 != 1); + wait(); + if (i3 == 4) { + wait(); + while (1) { + wait (); + o1 = i2 + 1; + do { wait(); } while (cont2 != 2); + } + } else { + wait(); + } + + } +} + diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/test.f b/src/systemc/tests/systemc/misc/synth/wait_until/test17/test.f new file mode 100644 index 000000000..b2695ac54 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/test.f @@ -0,0 +1,4 @@ +test17/test.cpp +test17/tb.cpp +test17/monitor.cpp +test17/main.cpp diff --git a/src/systemc/tests/systemc/misc/synth/wait_until/test17/test.h b/src/systemc/tests/systemc/misc/synth/wait_until/test17/test.h new file mode 100644 index 000000000..ccf974819 --- /dev/null +++ b/src/systemc/tests/systemc/misc/synth/wait_until/test17/test.h @@ -0,0 +1,104 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Common interface file for test cases + Author: PRP + */ + +#include "systemc.h" + +SC_MODULE( test ) +{ + SC_HAS_PROCESS( test ); + + sc_in_clk clk; + + // Input Reset Port + const sc_signal& reset_sig; + + // Input Data Ports + const sc_signal& i1; + const sc_signal& i2; + const sc_signal& i3; + const sc_signal& i4; + const sc_signal& i5; + + // Input Control Ports + const sc_signal& cont1; + const sc_signal& cont2; + const sc_signal& cont3; + + // Output Data Ports + sc_signal& o1; + sc_signal& o2; + sc_signal& o3; + sc_signal& o4; + sc_signal& o5; + + // Constructor + test ( + sc_module_name NAME, + sc_clock& CLK, + + const sc_signal& RESET_SIG, + + const sc_signal& I1, + const sc_signal& I2, + const sc_signal& I3, + const sc_signal& I4, + const sc_signal& I5, + + const sc_signal& CONT1, + const sc_signal& CONT2, + const sc_signal& CONT3, + + sc_signal& O1, + sc_signal& O2, + sc_signal& O3, + sc_signal& O4, + sc_signal& O5) + : reset_sig(RESET_SIG), i1(I1), i2(I2), + i3(I3), i4(I4), i5(I5), cont1 (CONT1), cont2 (CONT2), + cont3 (CONT3), o1(O1), o2(O2), o3(O3), o4(O4), o5(O5) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset_sig,true); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/systemc_header/test01/golden/test01.log b/src/systemc/tests/systemc/misc/systemc_header/test01/golden/test01.log new file mode 100644 index 000000000..2ea2d337e --- /dev/null +++ b/src/systemc/tests/systemc/misc/systemc_header/test01/golden/test01.log @@ -0,0 +1,31 @@ +SystemC Simulation +x: Hello World +x: Hello World +y: Hello World +x: Hello World +y: Hello World +z: Hello World +x: Hello World +y: Hello World +z: Hello World +x: Hello World +y: Hello World +z: Hello World +x: Hello World +y: Hello World +z: Hello World +x: Hello World +y: Hello World +z: Hello World +x: Hello World +y: Hello World +z: Hello World +x: Hello World +y: Hello World +z: Hello World +x: Hello World +y: Hello World +z: Hello World +x: Hello World +y: Hello World +z: Hello World diff --git a/src/systemc/tests/systemc/misc/systemc_header/test01/test01.cpp b/src/systemc/tests/systemc/misc/systemc_header/test01/test01.cpp new file mode 100644 index 000000000..bff7d7f2e --- /dev/null +++ b/src/systemc/tests/systemc/misc/systemc_header/test01/test01.cpp @@ -0,0 +1,94 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Andy Goodrich Forte Design Systems - 2005-10-10 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test01.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:18 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/24 21:05:38 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// + + +// Test inclusion of systemc rather than systemc.h + +#include "systemc" + + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_METHOD(x); + sensitive << m_clk.pos(); + SC_CTHREAD(z, m_clk.pos()); + SC_THREAD(y); + sensitive << m_clk.pos(); + } + void x() + { + std::cout << "x: Hello World" << std::endl; + } + void y() + { + for (;;) + { + wait(); + std::cout << "y: Hello World" << std::endl; + } + } + void z() + { + for (;;) + { + wait(); + std::cout << "z: Hello World" << std::endl; + } + } + ::sc_core::sc_in m_clk; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_core::sc_clock clock; + DUT dut("dut"); + + dut.m_clk(clock); + sc_core::sc_start(10, sc_core::SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_imp/COMPILE b/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_imp/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_imp/test2_imp.cpp b/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_imp/test2_imp.cpp new file mode 100644 index 000000000..889273ea6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_imp/test2_imp.cpp @@ -0,0 +1,44 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2_imp.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +sc_int<32> +test2_imp(sc_int<4> x) +{ + return -339 * (x * 12 * 26); +} diff --git a/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_ref/COMPILE b/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_ref/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_ref/test2_ref.cpp b/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_ref/test2_ref.cpp new file mode 100644 index 000000000..eefa67155 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/alg_simp/rule10/test2/test2_ref/test2_ref.cpp @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2_ref.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +sc_int<32> +test2_ref(sc_int<4> x) +{ + sc_int<32> y; + y = x * 12; + y = y * 26; + return -339 * y; +} diff --git a/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc1/disaproc1.cpp b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc1/disaproc1.cpp new file mode 100644 index 000000000..02642e792 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc1/disaproc1.cpp @@ -0,0 +1,200 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + disaproc1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int val1[17] = { 34329, 32492, 1034, 12000, 102, 12981, 1902, 19409, + 10029, 2149, 12030, 20099, 90, 10009, 9345, 57483, + 10903 }; + +int val2[19] = { 239, 923, 1240, 129, 191, 101, 1010, 190, + 19820, 2349, 24039, 34728, 5745, 78234, 17838, 37482, + 17498, 1347, 3721 }; + +SC_MODULE( aproc1 ) +{ + SC_HAS_PROCESS( aproc1 ); + + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + + aproc1( sc_module_name NAME, + + const sc_signal& A, + const sc_signal& B, + sc_signal& C ) + : a(A), b(B), c(C) + { + SC_THREAD( entry ); + sensitive << a << b; + } + void entry(); +}; + +void +aproc1::entry() +{ + wait(); + c = a + b; + cout << "c is (a + b)" << endl; + wait(); + c = a - b; + cout << "c is (a - b)" << endl; + wait(); + cout << name() << " is exiting." << endl; +} + + +SC_MODULE( aproc2 ) +{ + SC_HAS_PROCESS( aproc2 ); + + const sc_signal& a; + const sc_signal& b; + sc_signal& d; + + aproc2( sc_module_name NAME, + + const sc_signal& A, + const sc_signal& B, + sc_signal& D ) + : a(A), b(B), d(D) + { + SC_THREAD( entry ); + sensitive << a << b; + } + void entry(); +}; + +void +aproc2::entry() +{ + wait(); + int loops = 0; + while (true) { + d = a * b; + cout << "d is (a * b)" << endl; + wait(); + if ((bool) b == 0) { + d = a / (b + 1); + cout << "d is (a / (b + 1))" << endl; + } else { + d = a / b; + cout << "d is (a / b)" << endl; + } + wait(); + if (loops < 1) { + // sc_assert( a.sensitive_aprocs_neg.size() == 2 ); + // sc_assert( a.sensitive_aprocs.size() == 2 ); + } + if (loops > 5) { + /* By this time aproc1 should have died. */ + // sc_assert( a.sensitive_aprocs_neg.size() == 1 ); + // sc_assert( a.sensitive_aprocs.size() == 1 ); + } + loops++; + } +} + +SC_MODULE( sync1 ) +{ + SC_HAS_PROCESS( sync1 ); + + sc_in_clk clk; + + sc_signal& a; + sc_signal& b; + const sc_signal& c; + const sc_signal& d; + + int count; + sync1( sc_module_name NAME, + sc_clock& CLK, + sc_signal& A, + sc_signal& B, + const sc_signal& C, + const sc_signal& D ) + : + a(A), b(B), c(C), d(D) + + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + count = 0; + } + void entry(); +}; + +void +sync1::entry() +{ + while (true) { + a = (val1[count % (sizeof(val1)/sizeof(val1[0]))] & 1); + b = (val2[count % (sizeof(val2)/sizeof(val2[0]))] & 1); + count++; + wait(); + cout << " a = " << a; + cout << " b = " << b; + cout << " c = " << c; + cout << " d = " << d << endl; + } +} + + + +int +sc_main(int argc, char** argv) +{ + sc_clock clk("clk"); + sc_signal a("a"); + sc_signal b("b"); + sc_signal c("c"); + sc_signal d("d"); + + a = 0; + b = 0; + c = 0; + d = 0; + + aproc1 p1("p1", a, b, c); + aproc2 p2("p2", a, b, d); + sync1 s1("s1", clk, a, b, c, d); + + sc_start(2000, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc1/golden/disaproc1.log b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc1/golden/disaproc1.log new file mode 100644 index 000000000..c1cf53e3b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc1/golden/disaproc1.log @@ -0,0 +1,3392 @@ +SystemC Simulation +d is (a * b) +c is (a + b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) +c is (a - b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) +p1 is exiting. + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 1 b = 0 c = 1 d = 1 +d is (a * b) + a = 0 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 + a = 0 b = 0 c = 1 d = 0 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 0 b = 1 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) + a = 1 b = 0 c = 1 d = 0 +d is (a / b) + a = 1 b = 1 c = 1 d = 1 +d is (a * b) diff --git a/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc2/disaproc2.cpp b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc2/disaproc2.cpp new file mode 100644 index 000000000..9502185e9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc2/disaproc2.cpp @@ -0,0 +1,207 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + disaproc2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +int val1[17] = { 34329, 32492, 1034, 12000, 102, 12981, 1902, 19409, + 10029, 2149, 12030, 20099, 90, 10009, 9345, 57483, + 10903 }; + +int val2[19] = { 239, 923, 1240, 129, 191, 101, 1010, 190, + 19820, 2349, 24039, 34728, 5745, 78234, 17838, 37482, + 17498, 1347, 3721 }; + +SC_MODULE( aproc1 ) +{ + SC_HAS_PROCESS( aproc1 ); + + const sc_signal_bool_vector& a; + const sc_signal_bool_vector& b; + sc_signal_bool_vector& c; + + aproc1( sc_module_name NAME, + + const sc_signal_bool_vector& A, + const sc_signal_bool_vector& B, + sc_signal_bool_vector& C ) + : a(A), b(B), c(C) + { + SC_THREAD( entry ); + sensitive << a << b; + } + void entry(); +}; + +void +aproc1::entry() +{ + wait(); + wait(); + c = a.read().to_int() + b.read().to_int(); + cout << "c is (a + b)" << endl; + wait(); + c = a.read().to_int() - b.read().to_int(); + cout << "c is (a - b)" << endl; + wait(); + cout << name() << " is exiting." << endl; +} + + +SC_MODULE( aproc2 ) +{ + SC_HAS_PROCESS( aproc2 ); + + const sc_signal_bool_vector& a; + const sc_signal_bool_vector& b; + sc_signal_bool_vector& d; + + aproc2( sc_module_name NAME, + + const sc_signal_bool_vector& A, + const sc_signal_bool_vector& B, + sc_signal_bool_vector& D ) + : a(A), b(B), d(D) + { + SC_THREAD( entry ); + sensitive << a << b; + } + void entry(); +}; + +void +aproc2::entry() +{ + wait(); + int loops = 0; + while (true) { + wait(); + d = a.read().to_int() * b.read().to_int(); + cout << "d is (a * b)" << endl; + wait(); + if (b.read().to_int() == 0) { + d = a.read().to_int() / (b.read().to_int() + 1); + cout << "d is (a / (b + 1))" << endl; + } else { + d = a.read().to_int() / b.read().to_int(); + cout << "d is (a / b)" << endl; + } + if (loops < 1) { + // for (int i = 0; i < a.length(); ++i) { + // sc_assert( a[i].sensitive_aprocs_neg.size() == 2 ); + // sc_assert( a[i].sensitive_aprocs.size() == 2 ); + // } + } + if (loops > 5) { + // for (int i = 0; i < a.length(); ++i) { + // /* By this time aproc1 should have died. */ + // sc_assert( a[i].sensitive_aprocs_neg.size() == 1 ); + // sc_assert( a[i].sensitive_aprocs.size() == 1 ); + // } + } + loops++; + } +} + +SC_MODULE( sync1 ) +{ + SC_HAS_PROCESS( sync1 ); + + sc_in_clk clk; + + sc_signal_bool_vector& a; + sc_signal_bool_vector& b; + const sc_signal_bool_vector& c; + const sc_signal_bool_vector& d; + + int count; + sync1( sc_module_name NAME, + sc_clock& CLK, + sc_signal_bool_vector& A, + sc_signal_bool_vector& B, + const sc_signal_bool_vector& C, + const sc_signal_bool_vector& D ) + : + a(A), b(B), c(C), d(D) + + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + count = 0; + } + void entry(); +}; + +void +sync1::entry() +{ + while (true) { + a = (val1[count % (sizeof(val1)/sizeof(val1[0]))]); + b = (val2[count % (sizeof(val2)/sizeof(val2[0]))]); + count++; + wait(); + cout << " a = " << a.read().to_int(); + cout << " b = " << b.read().to_int(); + cout << " c = " << c.read().to_int(); + cout << " d = " << d.read().to_int() << endl; + } +} + + + +int +sc_main(int argc, char** argv) +{ + sc_clock clk("clk"); + sc_signal_bool_vector a("a"); + sc_signal_bool_vector b("b"); + sc_signal_bool_vector c("c"); + sc_signal_bool_vector d("d"); + + a = 0; + b = 0; + c = 0; + d = 0; + + aproc1 p1("p1", a, b, c); + aproc2 p2("p2", a, b, d); + sync1 s1("s1", clk, a, b, c, d); + + sc_start(2000, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc2/golden/disaproc2.log b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc2/golden/disaproc2.log new file mode 100644 index 000000000..8b6538486 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc2/golden/disaproc2.log @@ -0,0 +1,4002 @@ +SystemC Simulation + a = 34329 b = 239 c = 0 d = 0 +d is (a * b) +c is (a + b) + a = 32492 b = 923 c = 33415 d = 29990116 +d is (a / b) +c is (a - b) + a = 1034 b = 1240 c = -206 d = 0 +d is (a * b) +p1 is exiting. + a = 12000 b = 129 c = -206 d = 1548000 +d is (a / b) + a = 102 b = 191 c = -206 d = 0 +d is (a * b) + a = 12981 b = 101 c = -206 d = 1311081 +d is (a / b) + a = 1902 b = 1010 c = -206 d = 1 +d is (a * b) + a = 19409 b = 190 c = -206 d = 3687710 +d is (a / b) + a = 10029 b = 19820 c = -206 d = 0 +d is (a * b) + a = 2149 b = 2349 c = -206 d = 5048001 +d is (a / b) + a = 12030 b = 24039 c = -206 d = 0 +d is (a * b) + a = 20099 b = 34728 c = -206 d = 697998072 +d is (a / b) + a = 90 b = 5745 c = -206 d = 0 +d is (a * b) + a = 10009 b = 78234 c = -206 d = 783044106 +d is (a / b) + a = 9345 b = 17838 c = -206 d = 0 +d is (a * b) + a = 57483 b = 37482 c = -206 d = -2140389490 +d is (a / b) + a = 10903 b = 17498 c = -206 d = 0 +d is (a * b) + a = 34329 b = 1347 c = -206 d = 46241163 +d is (a / b) + a = 32492 b = 3721 c = -206 d = 8 +d is (a * b) + a = 1034 b = 239 c = -206 d = 247126 +d is (a / b) + a = 12000 b = 923 c = -206 d = 13 +d is (a * b) + a = 102 b = 1240 c = -206 d = 126480 +d is (a / b) + a = 12981 b = 129 c = -206 d = 100 +d is (a * b) + a = 1902 b = 191 c = -206 d = 363282 +d is (a / b) + a = 19409 b = 101 c = -206 d = 192 +d is (a * b) + a = 10029 b = 1010 c = -206 d = 10129290 +d is (a / b) + a = 2149 b = 190 c = -206 d = 11 +d is (a * b) + a = 12030 b = 19820 c = -206 d = 238434600 +d is (a / b) + a = 20099 b = 2349 c = -206 d = 8 +d is (a * b) + a = 90 b = 24039 c = -206 d = 2163510 +d is (a / b) + a = 10009 b = 34728 c = -206 d = 0 +d is (a * b) + a = 9345 b = 5745 c = -206 d = 53687025 +d is (a / b) + a = 57483 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10903 b = 17838 c = -206 d = 194487714 +d is (a / b) + a = 34329 b = 37482 c = -206 d = 0 +d is (a * b) + a = 32492 b = 17498 c = -206 d = 568545016 +d is (a / b) + a = 1034 b = 1347 c = -206 d = 0 +d is (a * b) + a = 12000 b = 3721 c = -206 d = 44652000 +d is (a / b) + a = 102 b = 239 c = -206 d = 0 +d is (a * b) + a = 12981 b = 923 c = -206 d = 11981463 +d is (a / b) + a = 1902 b = 1240 c = -206 d = 1 +d is (a * b) + a = 19409 b = 129 c = -206 d = 2503761 +d is (a / b) + a = 10029 b = 191 c = -206 d = 52 +d is (a * b) + a = 2149 b = 101 c = -206 d = 217049 +d is (a / b) + a = 12030 b = 1010 c = -206 d = 11 +d is (a * b) + a = 20099 b = 190 c = -206 d = 3818810 +d is (a / b) + a = 90 b = 19820 c = -206 d = 0 +d is (a * b) + a = 10009 b = 2349 c = -206 d = 23511141 +d is (a / b) + a = 9345 b = 24039 c = -206 d = 0 +d is (a * b) + a = 57483 b = 34728 c = -206 d = 1996269624 +d is (a / b) + a = 10903 b = 5745 c = -206 d = 1 +d is (a * b) + a = 34329 b = 78234 c = -206 d = -1609272310 +d is (a / b) + a = 32492 b = 17838 c = -206 d = 1 +d is (a * b) + a = 1034 b = 37482 c = -206 d = 38756388 +d is (a / b) + a = 12000 b = 17498 c = -206 d = 0 +d is (a * b) + a = 102 b = 1347 c = -206 d = 137394 +d is (a / b) + a = 12981 b = 3721 c = -206 d = 3 +d is (a * b) + a = 1902 b = 239 c = -206 d = 454578 +d is (a / b) + a = 19409 b = 923 c = -206 d = 21 +d is (a * b) + a = 10029 b = 1240 c = -206 d = 12435960 +d is (a / b) + a = 2149 b = 129 c = -206 d = 16 +d is (a * b) + a = 12030 b = 191 c = -206 d = 2297730 +d is (a / b) + a = 20099 b = 101 c = -206 d = 199 +d is (a * b) + a = 90 b = 1010 c = -206 d = 90900 +d is (a / b) + a = 10009 b = 190 c = -206 d = 52 +d is (a * b) + a = 9345 b = 19820 c = -206 d = 185217900 +d is (a / b) + a = 57483 b = 2349 c = -206 d = 24 +d is (a * b) + a = 10903 b = 24039 c = -206 d = 262097217 +d is (a / b) + a = 34329 b = 34728 c = -206 d = 0 +d is (a * b) + a = 32492 b = 5745 c = -206 d = 186666540 +d is (a / b) + a = 1034 b = 78234 c = -206 d = 0 +d is (a * b) + a = 12000 b = 17838 c = -206 d = 214056000 +d is (a / b) + a = 102 b = 37482 c = -206 d = 0 +d is (a * b) + a = 12981 b = 17498 c = -206 d = 227141538 +d is (a / b) + a = 1902 b = 1347 c = -206 d = 1 +d is (a * b) + a = 19409 b = 3721 c = -206 d = 72220889 +d is (a / b) + a = 10029 b = 239 c = -206 d = 41 +d is (a * b) + a = 2149 b = 923 c = -206 d = 1983527 +d is (a / b) + a = 12030 b = 1240 c = -206 d = 9 +d is (a * b) + a = 20099 b = 129 c = -206 d = 2592771 +d is (a / b) + a = 90 b = 191 c = -206 d = 0 +d is (a * b) + a = 10009 b = 101 c = -206 d = 1010909 +d is (a / b) + a = 9345 b = 1010 c = -206 d = 9 +d is (a * b) + a = 57483 b = 190 c = -206 d = 10921770 +d is (a / b) + a = 10903 b = 19820 c = -206 d = 0 +d is (a * b) + a = 34329 b = 2349 c = -206 d = 80638821 +d is (a / b) + a = 32492 b = 24039 c = -206 d = 1 +d is (a * b) + a = 1034 b = 34728 c = -206 d = 35908752 +d is (a / b) + a = 12000 b = 5745 c = -206 d = 2 +d is (a * b) + a = 102 b = 78234 c = -206 d = 7979868 +d is (a / b) + a = 12981 b = 17838 c = -206 d = 0 +d is (a * b) + a = 1902 b = 37482 c = -206 d = 71290764 +d is (a / b) + a = 19409 b = 17498 c = -206 d = 1 +d is (a * b) + a = 10029 b = 1347 c = -206 d = 13509063 +d is (a / b) + a = 2149 b = 3721 c = -206 d = 0 +d is (a * b) + a = 12030 b = 239 c = -206 d = 2875170 +d is (a / b) + a = 20099 b = 923 c = -206 d = 21 +d is (a * b) + a = 90 b = 1240 c = -206 d = 111600 +d is (a / b) + a = 10009 b = 129 c = -206 d = 77 +d is (a * b) + a = 9345 b = 191 c = -206 d = 1784895 +d is (a / b) + a = 57483 b = 101 c = -206 d = 569 +d is (a * b) + a = 10903 b = 1010 c = -206 d = 11012030 +d is (a / b) + a = 34329 b = 190 c = -206 d = 180 +d is (a * b) + a = 32492 b = 19820 c = -206 d = 643991440 +d is (a / b) + a = 1034 b = 2349 c = -206 d = 0 +d is (a * b) + a = 12000 b = 24039 c = -206 d = 288468000 +d is (a / b) + a = 102 b = 34728 c = -206 d = 0 +d is (a * b) + a = 12981 b = 5745 c = -206 d = 74575845 +d is (a / b) + a = 1902 b = 78234 c = -206 d = 0 +d is (a * b) + a = 19409 b = 17838 c = -206 d = 346217742 +d is (a / b) + a = 10029 b = 37482 c = -206 d = 0 +d is (a * b) + a = 2149 b = 17498 c = -206 d = 37603202 +d is (a / b) + a = 12030 b = 1347 c = -206 d = 8 +d is (a * b) + a = 20099 b = 3721 c = -206 d = 74788379 +d is (a / b) + a = 90 b = 239 c = -206 d = 0 +d is (a * b) + a = 10009 b = 923 c = -206 d = 9238307 +d is (a / b) + a = 9345 b = 1240 c = -206 d = 7 +d is (a * b) + a = 57483 b = 129 c = -206 d = 7415307 +d is (a / b) + a = 10903 b = 191 c = -206 d = 57 +d is (a * b) + a = 34329 b = 101 c = -206 d = 3467229 +d is (a / b) + a = 32492 b = 1010 c = -206 d = 32 +d is (a * b) + a = 1034 b = 190 c = -206 d = 196460 +d is (a / b) + a = 12000 b = 19820 c = -206 d = 0 +d is (a * b) + a = 102 b = 2349 c = -206 d = 239598 +d is (a / b) + a = 12981 b = 24039 c = -206 d = 0 +d is (a * b) + a = 1902 b = 34728 c = -206 d = 66052656 +d is (a / b) + a = 19409 b = 5745 c = -206 d = 3 +d is (a * b) + a = 10029 b = 78234 c = -206 d = 784608786 +d is (a / b) + a = 2149 b = 17838 c = -206 d = 0 +d is (a * b) + a = 12030 b = 37482 c = -206 d = 450908460 +d is (a / b) + a = 20099 b = 17498 c = -206 d = 1 +d is (a * b) + a = 90 b = 1347 c = -206 d = 121230 +d is (a / b) + a = 10009 b = 3721 c = -206 d = 2 +d is (a * b) + a = 9345 b = 239 c = -206 d = 2233455 +d is (a / b) + a = 57483 b = 923 c = -206 d = 62 +d is (a * b) + a = 10903 b = 1240 c = -206 d = 13519720 +d is (a / b) + a = 34329 b = 129 c = -206 d = 266 +d is (a * b) + a = 32492 b = 191 c = -206 d = 6205972 +d is (a / b) + a = 1034 b = 101 c = -206 d = 10 +d is (a * b) + a = 12000 b = 1010 c = -206 d = 12120000 +d is (a / b) + a = 102 b = 190 c = -206 d = 0 +d is (a * b) + a = 12981 b = 19820 c = -206 d = 257283420 +d is (a / b) + a = 1902 b = 2349 c = -206 d = 0 +d is (a * b) + a = 19409 b = 24039 c = -206 d = 466572951 +d is (a / b) + a = 10029 b = 34728 c = -206 d = 0 +d is (a * b) + a = 2149 b = 5745 c = -206 d = 12346005 +d is (a / b) + a = 12030 b = 78234 c = -206 d = 0 +d is (a * b) + a = 20099 b = 17838 c = -206 d = 358525962 +d is (a / b) + a = 90 b = 37482 c = -206 d = 0 +d is (a * b) + a = 10009 b = 17498 c = -206 d = 175137482 +d is (a / b) + a = 9345 b = 1347 c = -206 d = 6 +d is (a * b) + a = 57483 b = 3721 c = -206 d = 213894243 +d is (a / b) + a = 10903 b = 239 c = -206 d = 45 +d is (a * b) + a = 34329 b = 923 c = -206 d = 31685667 +d is (a / b) + a = 32492 b = 1240 c = -206 d = 26 +d is (a * b) + a = 1034 b = 129 c = -206 d = 133386 +d is (a / b) + a = 12000 b = 191 c = -206 d = 62 +d is (a * b) + a = 102 b = 101 c = -206 d = 10302 +d is (a / b) + a = 12981 b = 1010 c = -206 d = 12 +d is (a * b) + a = 1902 b = 190 c = -206 d = 361380 +d is (a / b) + a = 19409 b = 19820 c = -206 d = 0 +d is (a * b) + a = 10029 b = 2349 c = -206 d = 23558121 +d is (a / b) + a = 2149 b = 24039 c = -206 d = 0 +d is (a * b) + a = 12030 b = 34728 c = -206 d = 417777840 +d is (a / b) + a = 20099 b = 5745 c = -206 d = 3 +d is (a * b) + a = 90 b = 78234 c = -206 d = 7041060 +d is (a / b) + a = 10009 b = 17838 c = -206 d = 0 +d is (a * b) + a = 9345 b = 37482 c = -206 d = 350269290 +d is (a / b) + a = 57483 b = 17498 c = -206 d = 3 +d is (a * b) + a = 10903 b = 1347 c = -206 d = 14686341 +d is (a / b) + a = 34329 b = 3721 c = -206 d = 9 +d is (a * b) + a = 32492 b = 239 c = -206 d = 7765588 +d is (a / b) + a = 1034 b = 923 c = -206 d = 1 +d is (a * b) + a = 12000 b = 1240 c = -206 d = 14880000 +d is (a / b) + a = 102 b = 129 c = -206 d = 0 +d is (a * b) + a = 12981 b = 191 c = -206 d = 2479371 +d is (a / b) + a = 1902 b = 101 c = -206 d = 18 +d is (a * b) + a = 19409 b = 1010 c = -206 d = 19603090 +d is (a / b) + a = 10029 b = 190 c = -206 d = 52 +d is (a * b) + a = 2149 b = 19820 c = -206 d = 42593180 +d is (a / b) + a = 12030 b = 2349 c = -206 d = 5 +d is (a * b) + a = 20099 b = 24039 c = -206 d = 483159861 +d is (a / b) + a = 90 b = 34728 c = -206 d = 0 +d is (a * b) + a = 10009 b = 5745 c = -206 d = 57501705 +d is (a / b) + a = 9345 b = 78234 c = -206 d = 0 +d is (a * b) + a = 57483 b = 17838 c = -206 d = 1025381754 +d is (a / b) + a = 10903 b = 37482 c = -206 d = 0 +d is (a * b) + a = 34329 b = 17498 c = -206 d = 600688842 +d is (a / b) + a = 32492 b = 1347 c = -206 d = 24 +d is (a * b) + a = 1034 b = 3721 c = -206 d = 3847514 +d is (a / b) + a = 12000 b = 239 c = -206 d = 50 +d is (a * b) + a = 102 b = 923 c = -206 d = 94146 +d is (a / b) + a = 12981 b = 1240 c = -206 d = 10 +d is (a * b) + a = 1902 b = 129 c = -206 d = 245358 +d is (a / b) + a = 19409 b = 191 c = -206 d = 101 +d is (a * b) + a = 10029 b = 101 c = -206 d = 1012929 +d is (a / b) + a = 2149 b = 1010 c = -206 d = 2 +d is (a * b) + a = 12030 b = 190 c = -206 d = 2285700 +d is (a / b) + a = 20099 b = 19820 c = -206 d = 1 +d is (a * b) + a = 90 b = 2349 c = -206 d = 211410 +d is (a / b) + a = 10009 b = 24039 c = -206 d = 0 +d is (a * b) + a = 9345 b = 34728 c = -206 d = 324533160 +d is (a / b) + a = 57483 b = 5745 c = -206 d = 10 +d is (a * b) + a = 10903 b = 78234 c = -206 d = 852985302 +d is (a / b) + a = 34329 b = 17838 c = -206 d = 1 +d is (a * b) + a = 32492 b = 37482 c = -206 d = 1217865144 +d is (a / b) + a = 1034 b = 17498 c = -206 d = 0 +d is (a * b) + a = 12000 b = 1347 c = -206 d = 16164000 +d is (a / b) + a = 102 b = 3721 c = -206 d = 0 +d is (a * b) + a = 12981 b = 239 c = -206 d = 3102459 +d is (a / b) + a = 1902 b = 923 c = -206 d = 2 +d is (a * b) + a = 19409 b = 1240 c = -206 d = 24067160 +d is (a / b) + a = 10029 b = 129 c = -206 d = 77 +d is (a * b) + a = 2149 b = 191 c = -206 d = 410459 +d is (a / b) + a = 12030 b = 101 c = -206 d = 119 +d is (a * b) + a = 20099 b = 1010 c = -206 d = 20299990 +d is (a / b) + a = 90 b = 190 c = -206 d = 0 +d is (a * b) + a = 10009 b = 19820 c = -206 d = 198378380 +d is (a / b) + a = 9345 b = 2349 c = -206 d = 3 +d is (a * b) + a = 57483 b = 24039 c = -206 d = 1381833837 +d is (a / b) + a = 10903 b = 34728 c = -206 d = 0 +d is (a * b) + a = 34329 b = 5745 c = -206 d = 197220105 +d is (a / b) + a = 32492 b = 78234 c = -206 d = 0 +d is (a * b) + a = 1034 b = 17838 c = -206 d = 18444492 +d is (a / b) + a = 12000 b = 37482 c = -206 d = 0 +d is (a * b) + a = 102 b = 17498 c = -206 d = 1784796 +d is (a / b) + a = 12981 b = 1347 c = -206 d = 9 +d is (a * b) + a = 1902 b = 3721 c = -206 d = 7077342 +d is (a / b) + a = 19409 b = 239 c = -206 d = 81 +d is (a * b) + a = 10029 b = 923 c = -206 d = 9256767 +d is (a / b) + a = 2149 b = 1240 c = -206 d = 1 +d is (a * b) + a = 12030 b = 129 c = -206 d = 1551870 +d is (a / b) + a = 20099 b = 191 c = -206 d = 105 +d is (a * b) + a = 90 b = 101 c = -206 d = 9090 +d is (a / b) + a = 10009 b = 1010 c = -206 d = 9 +d is (a * b) + a = 9345 b = 190 c = -206 d = 1775550 +d is (a / b) + a = 57483 b = 19820 c = -206 d = 2 +d is (a * b) + a = 10903 b = 2349 c = -206 d = 25611147 +d is (a / b) + a = 34329 b = 24039 c = -206 d = 1 +d is (a * b) + a = 32492 b = 34728 c = -206 d = 1128382176 +d is (a / b) + a = 1034 b = 5745 c = -206 d = 0 +d is (a * b) + a = 12000 b = 78234 c = -206 d = 938808000 +d is (a / b) + a = 102 b = 17838 c = -206 d = 0 +d is (a * b) + a = 12981 b = 37482 c = -206 d = 486553842 +d is (a / b) + a = 1902 b = 17498 c = -206 d = 0 +d is (a * b) + a = 19409 b = 1347 c = -206 d = 26143923 +d is (a / b) + a = 10029 b = 3721 c = -206 d = 2 +d is (a * b) + a = 2149 b = 239 c = -206 d = 513611 +d is (a / b) + a = 12030 b = 923 c = -206 d = 13 +d is (a * b) + a = 20099 b = 1240 c = -206 d = 24922760 +d is (a / b) + a = 90 b = 129 c = -206 d = 0 +d is (a * b) + a = 10009 b = 191 c = -206 d = 1911719 +d is (a / b) + a = 9345 b = 101 c = -206 d = 92 +d is (a * b) + a = 57483 b = 1010 c = -206 d = 58057830 +d is (a / b) + a = 10903 b = 190 c = -206 d = 57 +d is (a * b) + a = 34329 b = 19820 c = -206 d = 680400780 +d is (a / b) + a = 32492 b = 2349 c = -206 d = 13 +d is (a * b) + a = 1034 b = 24039 c = -206 d = 24856326 +d is (a / b) + a = 12000 b = 34728 c = -206 d = 0 +d is (a * b) + a = 102 b = 5745 c = -206 d = 585990 +d is (a / b) + a = 12981 b = 78234 c = -206 d = 0 +d is (a * b) + a = 1902 b = 17838 c = -206 d = 33927876 +d is (a / b) + a = 19409 b = 37482 c = -206 d = 0 +d is (a * b) + a = 10029 b = 17498 c = -206 d = 175487442 +d is (a / b) + a = 2149 b = 1347 c = -206 d = 1 +d is (a * b) + a = 12030 b = 3721 c = -206 d = 44763630 +d is (a / b) + a = 20099 b = 239 c = -206 d = 84 +d is (a * b) + a = 90 b = 923 c = -206 d = 83070 +d is (a / b) + a = 10009 b = 1240 c = -206 d = 8 +d is (a * b) + a = 9345 b = 129 c = -206 d = 1205505 +d is (a / b) + a = 57483 b = 191 c = -206 d = 300 +d is (a * b) + a = 10903 b = 101 c = -206 d = 1101203 +d is (a / b) + a = 34329 b = 1010 c = -206 d = 33 +d is (a * b) + a = 32492 b = 190 c = -206 d = 6173480 +d is (a / b) + a = 1034 b = 19820 c = -206 d = 0 +d is (a * b) + a = 12000 b = 2349 c = -206 d = 28188000 +d is (a / b) + a = 102 b = 24039 c = -206 d = 0 +d is (a * b) + a = 12981 b = 34728 c = -206 d = 450804168 +d is (a / b) + a = 1902 b = 5745 c = -206 d = 0 +d is (a * b) + a = 19409 b = 78234 c = -206 d = 1518443706 +d is (a / b) + a = 10029 b = 17838 c = -206 d = 0 +d is (a * b) + a = 2149 b = 37482 c = -206 d = 80548818 +d is (a / b) + a = 12030 b = 17498 c = -206 d = 0 +d is (a * b) + a = 20099 b = 1347 c = -206 d = 27073353 +d is (a / b) + a = 90 b = 3721 c = -206 d = 0 +d is (a * b) + a = 10009 b = 239 c = -206 d = 2392151 +d is (a / b) + a = 9345 b = 923 c = -206 d = 10 +d is (a * b) + a = 57483 b = 1240 c = -206 d = 71278920 +d is (a / b) + a = 10903 b = 129 c = -206 d = 84 +d is (a * b) + a = 34329 b = 191 c = -206 d = 6556839 +d is (a / b) + a = 32492 b = 101 c = -206 d = 321 +d is (a * b) + a = 1034 b = 1010 c = -206 d = 1044340 +d is (a / b) + a = 12000 b = 190 c = -206 d = 63 +d is (a * b) + a = 102 b = 19820 c = -206 d = 2021640 +d is (a / b) + a = 12981 b = 2349 c = -206 d = 5 +d is (a * b) + a = 1902 b = 24039 c = -206 d = 45722178 +d is (a / b) + a = 19409 b = 34728 c = -206 d = 0 +d is (a * b) + a = 10029 b = 5745 c = -206 d = 57616605 +d is (a / b) + a = 2149 b = 78234 c = -206 d = 0 +d is (a * b) + a = 12030 b = 17838 c = -206 d = 214591140 +d is (a / b) + a = 20099 b = 37482 c = -206 d = 0 +d is (a * b) + a = 90 b = 17498 c = -206 d = 1574820 +d is (a / b) + a = 10009 b = 1347 c = -206 d = 7 +d is (a * b) + a = 9345 b = 3721 c = -206 d = 34772745 +d is (a / b) + a = 57483 b = 239 c = -206 d = 240 +d is (a * b) + a = 10903 b = 923 c = -206 d = 10063469 +d is (a / b) + a = 34329 b = 1240 c = -206 d = 27 +d is (a * b) + a = 32492 b = 129 c = -206 d = 4191468 +d is (a / b) + a = 1034 b = 191 c = -206 d = 5 +d is (a * b) + a = 12000 b = 101 c = -206 d = 1212000 +d is (a / b) + a = 102 b = 1010 c = -206 d = 0 +d is (a * b) + a = 12981 b = 190 c = -206 d = 2466390 +d is (a / b) + a = 1902 b = 19820 c = -206 d = 0 +d is (a * b) + a = 19409 b = 2349 c = -206 d = 45591741 +d is (a / b) + a = 10029 b = 24039 c = -206 d = 0 +d is (a * b) + a = 2149 b = 34728 c = -206 d = 74630472 +d is (a / b) + a = 12030 b = 5745 c = -206 d = 2 +d is (a * b) + a = 20099 b = 78234 c = -206 d = 1572425166 +d is (a / b) + a = 90 b = 17838 c = -206 d = 0 +d is (a * b) + a = 10009 b = 37482 c = -206 d = 375157338 +d is (a / b) + a = 9345 b = 17498 c = -206 d = 0 +d is (a * b) + a = 57483 b = 1347 c = -206 d = 77429601 +d is (a / b) + a = 10903 b = 3721 c = -206 d = 2 +d is (a * b) + a = 34329 b = 239 c = -206 d = 8204631 +d is (a / b) + a = 32492 b = 923 c = -206 d = 35 +d is (a * b) + a = 1034 b = 1240 c = -206 d = 1282160 +d is (a / b) + a = 12000 b = 129 c = -206 d = 93 +d is (a * b) + a = 102 b = 191 c = -206 d = 19482 +d is (a / b) + a = 12981 b = 101 c = -206 d = 128 +d is (a * b) + a = 1902 b = 1010 c = -206 d = 1921020 +d is (a / b) + a = 19409 b = 190 c = -206 d = 102 +d is (a * b) + a = 10029 b = 19820 c = -206 d = 198774780 +d is (a / b) + a = 2149 b = 2349 c = -206 d = 0 +d is (a * b) + a = 12030 b = 24039 c = -206 d = 289189170 +d is (a / b) + a = 20099 b = 34728 c = -206 d = 0 +d is (a * b) + a = 90 b = 5745 c = -206 d = 517050 +d is (a / b) + a = 10009 b = 78234 c = -206 d = 0 +d is (a * b) + a = 9345 b = 17838 c = -206 d = 166696110 +d is (a / b) + a = 57483 b = 37482 c = -206 d = 1 +d is (a * b) + a = 10903 b = 17498 c = -206 d = 190780694 +d is (a / b) + a = 34329 b = 1347 c = -206 d = 25 +d is (a * b) + a = 32492 b = 3721 c = -206 d = 120902732 +d is (a / b) + a = 1034 b = 239 c = -206 d = 4 +d is (a * b) + a = 12000 b = 923 c = -206 d = 11076000 +d is (a / b) + a = 102 b = 1240 c = -206 d = 0 +d is (a * b) + a = 12981 b = 129 c = -206 d = 1674549 +d is (a / b) + a = 1902 b = 191 c = -206 d = 9 +d is (a * b) + a = 19409 b = 101 c = -206 d = 1960309 +d is (a / b) + a = 10029 b = 1010 c = -206 d = 9 +d is (a * b) + a = 2149 b = 190 c = -206 d = 408310 +d is (a / b) + a = 12030 b = 19820 c = -206 d = 0 +d is (a * b) + a = 20099 b = 2349 c = -206 d = 47212551 +d is (a / b) + a = 90 b = 24039 c = -206 d = 0 +d is (a * b) + a = 10009 b = 34728 c = -206 d = 347592552 +d is (a / b) + a = 9345 b = 5745 c = -206 d = 1 +d is (a * b) + a = 57483 b = 78234 c = -206 d = 202157726 +d is (a / b) + a = 10903 b = 17838 c = -206 d = 0 +d is (a * b) + a = 34329 b = 37482 c = -206 d = 1286719578 +d is (a / b) + a = 32492 b = 17498 c = -206 d = 1 +d is (a * b) + a = 1034 b = 1347 c = -206 d = 1392798 +d is (a / b) + a = 12000 b = 3721 c = -206 d = 3 +d is (a * b) + a = 102 b = 239 c = -206 d = 24378 +d is (a / b) + a = 12981 b = 923 c = -206 d = 14 +d is (a * b) + a = 1902 b = 1240 c = -206 d = 2358480 +d is (a / b) + a = 19409 b = 129 c = -206 d = 150 +d is (a * b) + a = 10029 b = 191 c = -206 d = 1915539 +d is (a / b) + a = 2149 b = 101 c = -206 d = 21 +d is (a * b) + a = 12030 b = 1010 c = -206 d = 12150300 +d is (a / b) + a = 20099 b = 190 c = -206 d = 105 +d is (a * b) + a = 90 b = 19820 c = -206 d = 1783800 +d is (a / b) + a = 10009 b = 2349 c = -206 d = 4 +d is (a * b) + a = 9345 b = 24039 c = -206 d = 224644455 +d is (a / b) + a = 57483 b = 34728 c = -206 d = 1 +d is (a * b) + a = 10903 b = 5745 c = -206 d = 62637735 +d is (a / b) + a = 34329 b = 78234 c = -206 d = 0 +d is (a * b) + a = 32492 b = 17838 c = -206 d = 579592296 +d is (a / b) + a = 1034 b = 37482 c = -206 d = 0 +d is (a * b) + a = 12000 b = 17498 c = -206 d = 209976000 +d is (a / b) + a = 102 b = 1347 c = -206 d = 0 +d is (a * b) + a = 12981 b = 3721 c = -206 d = 48302301 +d is (a / b) + a = 1902 b = 239 c = -206 d = 7 +d is (a * b) + a = 19409 b = 923 c = -206 d = 17914507 +d is (a / b) + a = 10029 b = 1240 c = -206 d = 8 +d is (a * b) + a = 2149 b = 129 c = -206 d = 277221 +d is (a / b) + a = 12030 b = 191 c = -206 d = 62 +d is (a * b) + a = 20099 b = 101 c = -206 d = 2029999 +d is (a / b) + a = 90 b = 1010 c = -206 d = 0 +d is (a * b) + a = 10009 b = 190 c = -206 d = 1901710 +d is (a / b) + a = 9345 b = 19820 c = -206 d = 0 +d is (a * b) + a = 57483 b = 2349 c = -206 d = 135027567 +d is (a / b) + a = 10903 b = 24039 c = -206 d = 0 +d is (a * b) + a = 34329 b = 34728 c = -206 d = 1192177512 +d is (a / b) + a = 32492 b = 5745 c = -206 d = 5 +d is (a * b) + a = 1034 b = 78234 c = -206 d = 80893956 +d is (a / b) + a = 12000 b = 17838 c = -206 d = 0 +d is (a * b) + a = 102 b = 37482 c = -206 d = 3823164 +d is (a / b) + a = 12981 b = 17498 c = -206 d = 0 +d is (a * b) + a = 1902 b = 1347 c = -206 d = 2561994 +d is (a / b) + a = 19409 b = 3721 c = -206 d = 5 +d is (a * b) + a = 10029 b = 239 c = -206 d = 2396931 +d is (a / b) + a = 2149 b = 923 c = -206 d = 2 +d is (a * b) + a = 12030 b = 1240 c = -206 d = 14917200 +d is (a / b) + a = 20099 b = 129 c = -206 d = 155 +d is (a * b) + a = 90 b = 191 c = -206 d = 17190 +d is (a / b) + a = 10009 b = 101 c = -206 d = 99 +d is (a * b) + a = 9345 b = 1010 c = -206 d = 9438450 +d is (a / b) + a = 57483 b = 190 c = -206 d = 302 +d is (a * b) + a = 10903 b = 19820 c = -206 d = 216097460 +d is (a / b) + a = 34329 b = 2349 c = -206 d = 14 +d is (a * b) + a = 32492 b = 24039 c = -206 d = 781075188 +d is (a / b) + a = 1034 b = 34728 c = -206 d = 0 +d is (a * b) + a = 12000 b = 5745 c = -206 d = 68940000 +d is (a / b) + a = 102 b = 78234 c = -206 d = 0 +d is (a * b) + a = 12981 b = 17838 c = -206 d = 231555078 +d is (a / b) + a = 1902 b = 37482 c = -206 d = 0 +d is (a * b) + a = 19409 b = 17498 c = -206 d = 339618682 +d is (a / b) + a = 10029 b = 1347 c = -206 d = 7 +d is (a * b) + a = 2149 b = 3721 c = -206 d = 7996429 +d is (a / b) + a = 12030 b = 239 c = -206 d = 50 +d is (a * b) + a = 20099 b = 923 c = -206 d = 18551377 +d is (a / b) + a = 90 b = 1240 c = -206 d = 0 +d is (a * b) + a = 10009 b = 129 c = -206 d = 1291161 +d is (a / b) + a = 9345 b = 191 c = -206 d = 48 +d is (a * b) + a = 57483 b = 101 c = -206 d = 5805783 +d is (a / b) + a = 10903 b = 1010 c = -206 d = 10 +d is (a * b) + a = 34329 b = 190 c = -206 d = 6522510 +d is (a / b) + a = 32492 b = 19820 c = -206 d = 1 +d is (a * b) + a = 1034 b = 2349 c = -206 d = 2428866 +d is (a / b) + a = 12000 b = 24039 c = -206 d = 0 +d is (a * b) + a = 102 b = 34728 c = -206 d = 3542256 +d is (a / b) + a = 12981 b = 5745 c = -206 d = 2 +d is (a * b) + a = 1902 b = 78234 c = -206 d = 148801068 +d is (a / b) + a = 19409 b = 17838 c = -206 d = 1 +d is (a * b) + a = 10029 b = 37482 c = -206 d = 375906978 +d is (a / b) + a = 2149 b = 17498 c = -206 d = 0 +d is (a * b) + a = 12030 b = 1347 c = -206 d = 16204410 +d is (a / b) + a = 20099 b = 3721 c = -206 d = 5 +d is (a * b) + a = 90 b = 239 c = -206 d = 21510 +d is (a / b) + a = 10009 b = 923 c = -206 d = 10 +d is (a * b) + a = 9345 b = 1240 c = -206 d = 11587800 +d is (a / b) + a = 57483 b = 129 c = -206 d = 445 +d is (a * b) + a = 10903 b = 191 c = -206 d = 2082473 +d is (a / b) + a = 34329 b = 101 c = -206 d = 339 +d is (a * b) + a = 32492 b = 1010 c = -206 d = 32816920 +d is (a / b) + a = 1034 b = 190 c = -206 d = 5 +d is (a * b) + a = 12000 b = 19820 c = -206 d = 237840000 +d is (a / b) + a = 102 b = 2349 c = -206 d = 0 +d is (a * b) + a = 12981 b = 24039 c = -206 d = 312050259 +d is (a / b) + a = 1902 b = 34728 c = -206 d = 0 +d is (a * b) + a = 19409 b = 5745 c = -206 d = 111504705 +d is (a / b) + a = 10029 b = 78234 c = -206 d = 0 +d is (a * b) + a = 2149 b = 17838 c = -206 d = 38333862 +d is (a / b) + a = 12030 b = 37482 c = -206 d = 0 +d is (a * b) + a = 20099 b = 17498 c = -206 d = 351692302 +d is (a / b) + a = 90 b = 1347 c = -206 d = 0 +d is (a * b) + a = 10009 b = 3721 c = -206 d = 37243489 +d is (a / b) + a = 9345 b = 239 c = -206 d = 39 +d is (a * b) + a = 57483 b = 923 c = -206 d = 53056809 +d is (a / b) + a = 10903 b = 1240 c = -206 d = 8 +d is (a * b) + a = 34329 b = 129 c = -206 d = 4428441 +d is (a / b) + a = 32492 b = 191 c = -206 d = 170 +d is (a * b) + a = 1034 b = 101 c = -206 d = 104434 +d is (a / b) + a = 12000 b = 1010 c = -206 d = 11 +d is (a * b) + a = 102 b = 190 c = -206 d = 19380 +d is (a / b) + a = 12981 b = 19820 c = -206 d = 0 +d is (a * b) + a = 1902 b = 2349 c = -206 d = 4467798 +d is (a / b) + a = 19409 b = 24039 c = -206 d = 0 +d is (a * b) + a = 10029 b = 34728 c = -206 d = 348287112 +d is (a / b) + a = 2149 b = 5745 c = -206 d = 0 +d is (a * b) + a = 12030 b = 78234 c = -206 d = 941155020 +d is (a / b) + a = 20099 b = 17838 c = -206 d = 1 +d is (a * b) + a = 90 b = 37482 c = -206 d = 3373380 +d is (a / b) + a = 10009 b = 17498 c = -206 d = 0 +d is (a * b) + a = 9345 b = 1347 c = -206 d = 12587715 +d is (a / b) + a = 57483 b = 3721 c = -206 d = 15 +d is (a * b) + a = 10903 b = 239 c = -206 d = 2605817 +d is (a / b) + a = 34329 b = 923 c = -206 d = 37 +d is (a * b) + a = 32492 b = 1240 c = -206 d = 40290080 +d is (a / b) + a = 1034 b = 129 c = -206 d = 8 +d is (a * b) + a = 12000 b = 191 c = -206 d = 2292000 +d is (a / b) + a = 102 b = 101 c = -206 d = 1 +d is (a * b) + a = 12981 b = 1010 c = -206 d = 13110810 +d is (a / b) + a = 1902 b = 190 c = -206 d = 10 +d is (a * b) + a = 19409 b = 19820 c = -206 d = 384686380 +d is (a / b) + a = 10029 b = 2349 c = -206 d = 4 +d is (a * b) + a = 2149 b = 24039 c = -206 d = 51659811 +d is (a / b) + a = 12030 b = 34728 c = -206 d = 0 +d is (a * b) + a = 20099 b = 5745 c = -206 d = 115468755 +d is (a / b) + a = 90 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10009 b = 17838 c = -206 d = 178540542 +d is (a / b) + a = 9345 b = 37482 c = -206 d = 0 +d is (a * b) + a = 57483 b = 17498 c = -206 d = 1005837534 +d is (a / b) + a = 10903 b = 1347 c = -206 d = 8 +d is (a * b) + a = 34329 b = 3721 c = -206 d = 127738209 +d is (a / b) + a = 32492 b = 239 c = -206 d = 135 +d is (a * b) + a = 1034 b = 923 c = -206 d = 954382 +d is (a / b) + a = 12000 b = 1240 c = -206 d = 9 +d is (a * b) + a = 102 b = 129 c = -206 d = 13158 +d is (a / b) + a = 12981 b = 191 c = -206 d = 67 +d is (a * b) + a = 1902 b = 101 c = -206 d = 192102 +d is (a / b) + a = 19409 b = 1010 c = -206 d = 19 +d is (a * b) + a = 10029 b = 190 c = -206 d = 1905510 +d is (a / b) + a = 2149 b = 19820 c = -206 d = 0 +d is (a * b) + a = 12030 b = 2349 c = -206 d = 28258470 +d is (a / b) + a = 20099 b = 24039 c = -206 d = 0 +d is (a * b) + a = 90 b = 34728 c = -206 d = 3125520 +d is (a / b) + a = 10009 b = 5745 c = -206 d = 1 +d is (a * b) + a = 9345 b = 78234 c = -206 d = 731096730 +d is (a / b) + a = 57483 b = 17838 c = -206 d = 3 +d is (a * b) + a = 10903 b = 37482 c = -206 d = 408666246 +d is (a / b) + a = 34329 b = 17498 c = -206 d = 1 +d is (a * b) + a = 32492 b = 1347 c = -206 d = 43766724 +d is (a / b) + a = 1034 b = 3721 c = -206 d = 0 +d is (a * b) + a = 12000 b = 239 c = -206 d = 2868000 +d is (a / b) + a = 102 b = 923 c = -206 d = 0 +d is (a * b) + a = 12981 b = 1240 c = -206 d = 16096440 +d is (a / b) + a = 1902 b = 129 c = -206 d = 14 +d is (a * b) + a = 19409 b = 191 c = -206 d = 3707119 +d is (a / b) + a = 10029 b = 101 c = -206 d = 99 +d is (a * b) + a = 2149 b = 1010 c = -206 d = 2170490 +d is (a / b) + a = 12030 b = 190 c = -206 d = 63 +d is (a * b) + a = 20099 b = 19820 c = -206 d = 398362180 +d is (a / b) + a = 90 b = 2349 c = -206 d = 0 +d is (a * b) + a = 10009 b = 24039 c = -206 d = 240606351 +d is (a / b) + a = 9345 b = 34728 c = -206 d = 0 +d is (a * b) + a = 57483 b = 5745 c = -206 d = 330239835 +d is (a / b) + a = 10903 b = 78234 c = -206 d = 0 +d is (a * b) + a = 34329 b = 17838 c = -206 d = 612360702 +d is (a / b) + a = 32492 b = 37482 c = -206 d = 0 +d is (a * b) + a = 1034 b = 17498 c = -206 d = 18092932 +d is (a / b) + a = 12000 b = 1347 c = -206 d = 8 +d is (a * b) + a = 102 b = 3721 c = -206 d = 379542 +d is (a / b) + a = 12981 b = 239 c = -206 d = 54 +d is (a * b) + a = 1902 b = 923 c = -206 d = 1755546 +d is (a / b) + a = 19409 b = 1240 c = -206 d = 15 +d is (a * b) + a = 10029 b = 129 c = -206 d = 1293741 +d is (a / b) + a = 2149 b = 191 c = -206 d = 11 +d is (a * b) + a = 12030 b = 101 c = -206 d = 1215030 +d is (a / b) + a = 20099 b = 1010 c = -206 d = 19 +d is (a * b) + a = 90 b = 190 c = -206 d = 17100 +d is (a / b) + a = 10009 b = 19820 c = -206 d = 0 +d is (a * b) + a = 9345 b = 2349 c = -206 d = 21951405 +d is (a / b) + a = 57483 b = 24039 c = -206 d = 2 +d is (a * b) + a = 10903 b = 34728 c = -206 d = 378639384 +d is (a / b) + a = 34329 b = 5745 c = -206 d = 5 +d is (a * b) + a = 32492 b = 78234 c = -206 d = -1752988168 +d is (a / b) + a = 1034 b = 17838 c = -206 d = 0 +d is (a * b) + a = 12000 b = 37482 c = -206 d = 449784000 +d is (a / b) + a = 102 b = 17498 c = -206 d = 0 +d is (a * b) + a = 12981 b = 1347 c = -206 d = 17485407 +d is (a / b) + a = 1902 b = 3721 c = -206 d = 0 +d is (a * b) + a = 19409 b = 239 c = -206 d = 4638751 +d is (a / b) + a = 10029 b = 923 c = -206 d = 10 +d is (a * b) + a = 2149 b = 1240 c = -206 d = 2664760 +d is (a / b) + a = 12030 b = 129 c = -206 d = 93 +d is (a * b) + a = 20099 b = 191 c = -206 d = 3838909 +d is (a / b) + a = 90 b = 101 c = -206 d = 0 +d is (a * b) + a = 10009 b = 1010 c = -206 d = 10109090 +d is (a / b) + a = 9345 b = 190 c = -206 d = 49 +d is (a * b) + a = 57483 b = 19820 c = -206 d = 1139313060 +d is (a / b) + a = 10903 b = 2349 c = -206 d = 4 +d is (a * b) + a = 34329 b = 24039 c = -206 d = 825234831 +d is (a / b) + a = 32492 b = 34728 c = -206 d = 0 +d is (a * b) + a = 1034 b = 5745 c = -206 d = 5940330 +d is (a / b) + a = 12000 b = 78234 c = -206 d = 0 +d is (a * b) + a = 102 b = 17838 c = -206 d = 1819476 +d is (a / b) + a = 12981 b = 37482 c = -206 d = 0 +d is (a * b) + a = 1902 b = 17498 c = -206 d = 33281196 +d is (a / b) + a = 19409 b = 1347 c = -206 d = 14 +d is (a * b) + a = 10029 b = 3721 c = -206 d = 37317909 +d is (a / b) + a = 2149 b = 239 c = -206 d = 8 +d is (a * b) + a = 12030 b = 923 c = -206 d = 11103690 +d is (a / b) + a = 20099 b = 1240 c = -206 d = 16 +d is (a * b) + a = 90 b = 129 c = -206 d = 11610 +d is (a / b) + a = 10009 b = 191 c = -206 d = 52 +d is (a * b) + a = 9345 b = 101 c = -206 d = 943845 +d is (a / b) + a = 57483 b = 1010 c = -206 d = 56 +d is (a * b) + a = 10903 b = 190 c = -206 d = 2071570 +d is (a / b) + a = 34329 b = 19820 c = -206 d = 1 +d is (a * b) + a = 32492 b = 2349 c = -206 d = 76323708 +d is (a / b) + a = 1034 b = 24039 c = -206 d = 0 +d is (a * b) + a = 12000 b = 34728 c = -206 d = 416736000 +d is (a / b) + a = 102 b = 5745 c = -206 d = 0 +d is (a * b) + a = 12981 b = 78234 c = -206 d = 1015555554 +d is (a / b) + a = 1902 b = 17838 c = -206 d = 0 +d is (a * b) + a = 19409 b = 37482 c = -206 d = 727488138 +d is (a / b) + a = 10029 b = 17498 c = -206 d = 0 +d is (a * b) + a = 2149 b = 1347 c = -206 d = 2894703 +d is (a / b) + a = 12030 b = 3721 c = -206 d = 3 +d is (a * b) + a = 20099 b = 239 c = -206 d = 4803661 +d is (a / b) + a = 90 b = 923 c = -206 d = 0 +d is (a * b) + a = 10009 b = 1240 c = -206 d = 12411160 +d is (a / b) + a = 9345 b = 129 c = -206 d = 72 +d is (a * b) + a = 57483 b = 191 c = -206 d = 10979253 +d is (a / b) + a = 10903 b = 101 c = -206 d = 107 +d is (a * b) + a = 34329 b = 1010 c = -206 d = 34672290 +d is (a / b) + a = 32492 b = 190 c = -206 d = 171 +d is (a * b) + a = 1034 b = 19820 c = -206 d = 20493880 +d is (a / b) + a = 12000 b = 2349 c = -206 d = 5 +d is (a * b) + a = 102 b = 24039 c = -206 d = 2451978 +d is (a / b) + a = 12981 b = 34728 c = -206 d = 0 +d is (a * b) + a = 1902 b = 5745 c = -206 d = 10926990 +d is (a / b) + a = 19409 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10029 b = 17838 c = -206 d = 178897302 +d is (a / b) + a = 2149 b = 37482 c = -206 d = 0 +d is (a * b) + a = 12030 b = 17498 c = -206 d = 210500940 +d is (a / b) + a = 20099 b = 1347 c = -206 d = 14 +d is (a * b) + a = 90 b = 3721 c = -206 d = 334890 +d is (a / b) + a = 10009 b = 239 c = -206 d = 41 +d is (a * b) + a = 9345 b = 923 c = -206 d = 8625435 +d is (a / b) + a = 57483 b = 1240 c = -206 d = 46 +d is (a * b) + a = 10903 b = 129 c = -206 d = 1406487 +d is (a / b) + a = 34329 b = 191 c = -206 d = 179 +d is (a * b) + a = 32492 b = 101 c = -206 d = 3281692 +d is (a / b) + a = 1034 b = 1010 c = -206 d = 1 +d is (a * b) + a = 12000 b = 190 c = -206 d = 2280000 +d is (a / b) + a = 102 b = 19820 c = -206 d = 0 +d is (a * b) + a = 12981 b = 2349 c = -206 d = 30492369 +d is (a / b) + a = 1902 b = 24039 c = -206 d = 0 +d is (a * b) + a = 19409 b = 34728 c = -206 d = 674035752 +d is (a / b) + a = 10029 b = 5745 c = -206 d = 1 +d is (a * b) + a = 2149 b = 78234 c = -206 d = 168124866 +d is (a / b) + a = 12030 b = 17838 c = -206 d = 0 +d is (a * b) + a = 20099 b = 37482 c = -206 d = 753350718 +d is (a / b) + a = 90 b = 17498 c = -206 d = 0 +d is (a * b) + a = 10009 b = 1347 c = -206 d = 13482123 +d is (a / b) + a = 9345 b = 3721 c = -206 d = 2 +d is (a * b) + a = 57483 b = 239 c = -206 d = 13738437 +d is (a / b) + a = 10903 b = 923 c = -206 d = 11 +d is (a * b) + a = 34329 b = 1240 c = -206 d = 42567960 +d is (a / b) + a = 32492 b = 129 c = -206 d = 251 +d is (a * b) + a = 1034 b = 191 c = -206 d = 197494 +d is (a / b) + a = 12000 b = 101 c = -206 d = 118 +d is (a * b) + a = 102 b = 1010 c = -206 d = 103020 +d is (a / b) + a = 12981 b = 190 c = -206 d = 68 +d is (a * b) + a = 1902 b = 19820 c = -206 d = 37697640 +d is (a / b) + a = 19409 b = 2349 c = -206 d = 8 +d is (a * b) + a = 10029 b = 24039 c = -206 d = 241087131 +d is (a / b) + a = 2149 b = 34728 c = -206 d = 0 +d is (a * b) + a = 12030 b = 5745 c = -206 d = 69112350 +d is (a / b) + a = 20099 b = 78234 c = -206 d = 0 +d is (a * b) + a = 90 b = 17838 c = -206 d = 1605420 +d is (a / b) + a = 10009 b = 37482 c = -206 d = 0 +d is (a * b) + a = 9345 b = 17498 c = -206 d = 163518810 +d is (a / b) + a = 57483 b = 1347 c = -206 d = 42 +d is (a * b) + a = 10903 b = 3721 c = -206 d = 40570063 +d is (a / b) + a = 34329 b = 239 c = -206 d = 143 +d is (a * b) + a = 32492 b = 923 c = -206 d = 29990116 +d is (a / b) + a = 1034 b = 1240 c = -206 d = 0 +d is (a * b) + a = 12000 b = 129 c = -206 d = 1548000 +d is (a / b) + a = 102 b = 191 c = -206 d = 0 +d is (a * b) + a = 12981 b = 101 c = -206 d = 1311081 +d is (a / b) + a = 1902 b = 1010 c = -206 d = 1 +d is (a * b) + a = 19409 b = 190 c = -206 d = 3687710 +d is (a / b) + a = 10029 b = 19820 c = -206 d = 0 +d is (a * b) + a = 2149 b = 2349 c = -206 d = 5048001 +d is (a / b) + a = 12030 b = 24039 c = -206 d = 0 +d is (a * b) + a = 20099 b = 34728 c = -206 d = 697998072 +d is (a / b) + a = 90 b = 5745 c = -206 d = 0 +d is (a * b) + a = 10009 b = 78234 c = -206 d = 783044106 +d is (a / b) + a = 9345 b = 17838 c = -206 d = 0 +d is (a * b) + a = 57483 b = 37482 c = -206 d = -2140389490 +d is (a / b) + a = 10903 b = 17498 c = -206 d = 0 +d is (a * b) + a = 34329 b = 1347 c = -206 d = 46241163 +d is (a / b) + a = 32492 b = 3721 c = -206 d = 8 +d is (a * b) + a = 1034 b = 239 c = -206 d = 247126 +d is (a / b) + a = 12000 b = 923 c = -206 d = 13 +d is (a * b) + a = 102 b = 1240 c = -206 d = 126480 +d is (a / b) + a = 12981 b = 129 c = -206 d = 100 +d is (a * b) + a = 1902 b = 191 c = -206 d = 363282 +d is (a / b) + a = 19409 b = 101 c = -206 d = 192 +d is (a * b) + a = 10029 b = 1010 c = -206 d = 10129290 +d is (a / b) + a = 2149 b = 190 c = -206 d = 11 +d is (a * b) + a = 12030 b = 19820 c = -206 d = 238434600 +d is (a / b) + a = 20099 b = 2349 c = -206 d = 8 +d is (a * b) + a = 90 b = 24039 c = -206 d = 2163510 +d is (a / b) + a = 10009 b = 34728 c = -206 d = 0 +d is (a * b) + a = 9345 b = 5745 c = -206 d = 53687025 +d is (a / b) + a = 57483 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10903 b = 17838 c = -206 d = 194487714 +d is (a / b) + a = 34329 b = 37482 c = -206 d = 0 +d is (a * b) + a = 32492 b = 17498 c = -206 d = 568545016 +d is (a / b) + a = 1034 b = 1347 c = -206 d = 0 +d is (a * b) + a = 12000 b = 3721 c = -206 d = 44652000 +d is (a / b) + a = 102 b = 239 c = -206 d = 0 +d is (a * b) + a = 12981 b = 923 c = -206 d = 11981463 +d is (a / b) + a = 1902 b = 1240 c = -206 d = 1 +d is (a * b) + a = 19409 b = 129 c = -206 d = 2503761 +d is (a / b) + a = 10029 b = 191 c = -206 d = 52 +d is (a * b) + a = 2149 b = 101 c = -206 d = 217049 +d is (a / b) + a = 12030 b = 1010 c = -206 d = 11 +d is (a * b) + a = 20099 b = 190 c = -206 d = 3818810 +d is (a / b) + a = 90 b = 19820 c = -206 d = 0 +d is (a * b) + a = 10009 b = 2349 c = -206 d = 23511141 +d is (a / b) + a = 9345 b = 24039 c = -206 d = 0 +d is (a * b) + a = 57483 b = 34728 c = -206 d = 1996269624 +d is (a / b) + a = 10903 b = 5745 c = -206 d = 1 +d is (a * b) + a = 34329 b = 78234 c = -206 d = -1609272310 +d is (a / b) + a = 32492 b = 17838 c = -206 d = 1 +d is (a * b) + a = 1034 b = 37482 c = -206 d = 38756388 +d is (a / b) + a = 12000 b = 17498 c = -206 d = 0 +d is (a * b) + a = 102 b = 1347 c = -206 d = 137394 +d is (a / b) + a = 12981 b = 3721 c = -206 d = 3 +d is (a * b) + a = 1902 b = 239 c = -206 d = 454578 +d is (a / b) + a = 19409 b = 923 c = -206 d = 21 +d is (a * b) + a = 10029 b = 1240 c = -206 d = 12435960 +d is (a / b) + a = 2149 b = 129 c = -206 d = 16 +d is (a * b) + a = 12030 b = 191 c = -206 d = 2297730 +d is (a / b) + a = 20099 b = 101 c = -206 d = 199 +d is (a * b) + a = 90 b = 1010 c = -206 d = 90900 +d is (a / b) + a = 10009 b = 190 c = -206 d = 52 +d is (a * b) + a = 9345 b = 19820 c = -206 d = 185217900 +d is (a / b) + a = 57483 b = 2349 c = -206 d = 24 +d is (a * b) + a = 10903 b = 24039 c = -206 d = 262097217 +d is (a / b) + a = 34329 b = 34728 c = -206 d = 0 +d is (a * b) + a = 32492 b = 5745 c = -206 d = 186666540 +d is (a / b) + a = 1034 b = 78234 c = -206 d = 0 +d is (a * b) + a = 12000 b = 17838 c = -206 d = 214056000 +d is (a / b) + a = 102 b = 37482 c = -206 d = 0 +d is (a * b) + a = 12981 b = 17498 c = -206 d = 227141538 +d is (a / b) + a = 1902 b = 1347 c = -206 d = 1 +d is (a * b) + a = 19409 b = 3721 c = -206 d = 72220889 +d is (a / b) + a = 10029 b = 239 c = -206 d = 41 +d is (a * b) + a = 2149 b = 923 c = -206 d = 1983527 +d is (a / b) + a = 12030 b = 1240 c = -206 d = 9 +d is (a * b) + a = 20099 b = 129 c = -206 d = 2592771 +d is (a / b) + a = 90 b = 191 c = -206 d = 0 +d is (a * b) + a = 10009 b = 101 c = -206 d = 1010909 +d is (a / b) + a = 9345 b = 1010 c = -206 d = 9 +d is (a * b) + a = 57483 b = 190 c = -206 d = 10921770 +d is (a / b) + a = 10903 b = 19820 c = -206 d = 0 +d is (a * b) + a = 34329 b = 2349 c = -206 d = 80638821 +d is (a / b) + a = 32492 b = 24039 c = -206 d = 1 +d is (a * b) + a = 1034 b = 34728 c = -206 d = 35908752 +d is (a / b) + a = 12000 b = 5745 c = -206 d = 2 +d is (a * b) + a = 102 b = 78234 c = -206 d = 7979868 +d is (a / b) + a = 12981 b = 17838 c = -206 d = 0 +d is (a * b) + a = 1902 b = 37482 c = -206 d = 71290764 +d is (a / b) + a = 19409 b = 17498 c = -206 d = 1 +d is (a * b) + a = 10029 b = 1347 c = -206 d = 13509063 +d is (a / b) + a = 2149 b = 3721 c = -206 d = 0 +d is (a * b) + a = 12030 b = 239 c = -206 d = 2875170 +d is (a / b) + a = 20099 b = 923 c = -206 d = 21 +d is (a * b) + a = 90 b = 1240 c = -206 d = 111600 +d is (a / b) + a = 10009 b = 129 c = -206 d = 77 +d is (a * b) + a = 9345 b = 191 c = -206 d = 1784895 +d is (a / b) + a = 57483 b = 101 c = -206 d = 569 +d is (a * b) + a = 10903 b = 1010 c = -206 d = 11012030 +d is (a / b) + a = 34329 b = 190 c = -206 d = 180 +d is (a * b) + a = 32492 b = 19820 c = -206 d = 643991440 +d is (a / b) + a = 1034 b = 2349 c = -206 d = 0 +d is (a * b) + a = 12000 b = 24039 c = -206 d = 288468000 +d is (a / b) + a = 102 b = 34728 c = -206 d = 0 +d is (a * b) + a = 12981 b = 5745 c = -206 d = 74575845 +d is (a / b) + a = 1902 b = 78234 c = -206 d = 0 +d is (a * b) + a = 19409 b = 17838 c = -206 d = 346217742 +d is (a / b) + a = 10029 b = 37482 c = -206 d = 0 +d is (a * b) + a = 2149 b = 17498 c = -206 d = 37603202 +d is (a / b) + a = 12030 b = 1347 c = -206 d = 8 +d is (a * b) + a = 20099 b = 3721 c = -206 d = 74788379 +d is (a / b) + a = 90 b = 239 c = -206 d = 0 +d is (a * b) + a = 10009 b = 923 c = -206 d = 9238307 +d is (a / b) + a = 9345 b = 1240 c = -206 d = 7 +d is (a * b) + a = 57483 b = 129 c = -206 d = 7415307 +d is (a / b) + a = 10903 b = 191 c = -206 d = 57 +d is (a * b) + a = 34329 b = 101 c = -206 d = 3467229 +d is (a / b) + a = 32492 b = 1010 c = -206 d = 32 +d is (a * b) + a = 1034 b = 190 c = -206 d = 196460 +d is (a / b) + a = 12000 b = 19820 c = -206 d = 0 +d is (a * b) + a = 102 b = 2349 c = -206 d = 239598 +d is (a / b) + a = 12981 b = 24039 c = -206 d = 0 +d is (a * b) + a = 1902 b = 34728 c = -206 d = 66052656 +d is (a / b) + a = 19409 b = 5745 c = -206 d = 3 +d is (a * b) + a = 10029 b = 78234 c = -206 d = 784608786 +d is (a / b) + a = 2149 b = 17838 c = -206 d = 0 +d is (a * b) + a = 12030 b = 37482 c = -206 d = 450908460 +d is (a / b) + a = 20099 b = 17498 c = -206 d = 1 +d is (a * b) + a = 90 b = 1347 c = -206 d = 121230 +d is (a / b) + a = 10009 b = 3721 c = -206 d = 2 +d is (a * b) + a = 9345 b = 239 c = -206 d = 2233455 +d is (a / b) + a = 57483 b = 923 c = -206 d = 62 +d is (a * b) + a = 10903 b = 1240 c = -206 d = 13519720 +d is (a / b) + a = 34329 b = 129 c = -206 d = 266 +d is (a * b) + a = 32492 b = 191 c = -206 d = 6205972 +d is (a / b) + a = 1034 b = 101 c = -206 d = 10 +d is (a * b) + a = 12000 b = 1010 c = -206 d = 12120000 +d is (a / b) + a = 102 b = 190 c = -206 d = 0 +d is (a * b) + a = 12981 b = 19820 c = -206 d = 257283420 +d is (a / b) + a = 1902 b = 2349 c = -206 d = 0 +d is (a * b) + a = 19409 b = 24039 c = -206 d = 466572951 +d is (a / b) + a = 10029 b = 34728 c = -206 d = 0 +d is (a * b) + a = 2149 b = 5745 c = -206 d = 12346005 +d is (a / b) + a = 12030 b = 78234 c = -206 d = 0 +d is (a * b) + a = 20099 b = 17838 c = -206 d = 358525962 +d is (a / b) + a = 90 b = 37482 c = -206 d = 0 +d is (a * b) + a = 10009 b = 17498 c = -206 d = 175137482 +d is (a / b) + a = 9345 b = 1347 c = -206 d = 6 +d is (a * b) + a = 57483 b = 3721 c = -206 d = 213894243 +d is (a / b) + a = 10903 b = 239 c = -206 d = 45 +d is (a * b) + a = 34329 b = 923 c = -206 d = 31685667 +d is (a / b) + a = 32492 b = 1240 c = -206 d = 26 +d is (a * b) + a = 1034 b = 129 c = -206 d = 133386 +d is (a / b) + a = 12000 b = 191 c = -206 d = 62 +d is (a * b) + a = 102 b = 101 c = -206 d = 10302 +d is (a / b) + a = 12981 b = 1010 c = -206 d = 12 +d is (a * b) + a = 1902 b = 190 c = -206 d = 361380 +d is (a / b) + a = 19409 b = 19820 c = -206 d = 0 +d is (a * b) + a = 10029 b = 2349 c = -206 d = 23558121 +d is (a / b) + a = 2149 b = 24039 c = -206 d = 0 +d is (a * b) + a = 12030 b = 34728 c = -206 d = 417777840 +d is (a / b) + a = 20099 b = 5745 c = -206 d = 3 +d is (a * b) + a = 90 b = 78234 c = -206 d = 7041060 +d is (a / b) + a = 10009 b = 17838 c = -206 d = 0 +d is (a * b) + a = 9345 b = 37482 c = -206 d = 350269290 +d is (a / b) + a = 57483 b = 17498 c = -206 d = 3 +d is (a * b) + a = 10903 b = 1347 c = -206 d = 14686341 +d is (a / b) + a = 34329 b = 3721 c = -206 d = 9 +d is (a * b) + a = 32492 b = 239 c = -206 d = 7765588 +d is (a / b) + a = 1034 b = 923 c = -206 d = 1 +d is (a * b) + a = 12000 b = 1240 c = -206 d = 14880000 +d is (a / b) + a = 102 b = 129 c = -206 d = 0 +d is (a * b) + a = 12981 b = 191 c = -206 d = 2479371 +d is (a / b) + a = 1902 b = 101 c = -206 d = 18 +d is (a * b) + a = 19409 b = 1010 c = -206 d = 19603090 +d is (a / b) + a = 10029 b = 190 c = -206 d = 52 +d is (a * b) + a = 2149 b = 19820 c = -206 d = 42593180 +d is (a / b) + a = 12030 b = 2349 c = -206 d = 5 +d is (a * b) + a = 20099 b = 24039 c = -206 d = 483159861 +d is (a / b) + a = 90 b = 34728 c = -206 d = 0 +d is (a * b) + a = 10009 b = 5745 c = -206 d = 57501705 +d is (a / b) + a = 9345 b = 78234 c = -206 d = 0 +d is (a * b) + a = 57483 b = 17838 c = -206 d = 1025381754 +d is (a / b) + a = 10903 b = 37482 c = -206 d = 0 +d is (a * b) + a = 34329 b = 17498 c = -206 d = 600688842 +d is (a / b) + a = 32492 b = 1347 c = -206 d = 24 +d is (a * b) + a = 1034 b = 3721 c = -206 d = 3847514 +d is (a / b) + a = 12000 b = 239 c = -206 d = 50 +d is (a * b) + a = 102 b = 923 c = -206 d = 94146 +d is (a / b) + a = 12981 b = 1240 c = -206 d = 10 +d is (a * b) + a = 1902 b = 129 c = -206 d = 245358 +d is (a / b) + a = 19409 b = 191 c = -206 d = 101 +d is (a * b) + a = 10029 b = 101 c = -206 d = 1012929 +d is (a / b) + a = 2149 b = 1010 c = -206 d = 2 +d is (a * b) + a = 12030 b = 190 c = -206 d = 2285700 +d is (a / b) + a = 20099 b = 19820 c = -206 d = 1 +d is (a * b) + a = 90 b = 2349 c = -206 d = 211410 +d is (a / b) + a = 10009 b = 24039 c = -206 d = 0 +d is (a * b) + a = 9345 b = 34728 c = -206 d = 324533160 +d is (a / b) + a = 57483 b = 5745 c = -206 d = 10 +d is (a * b) + a = 10903 b = 78234 c = -206 d = 852985302 +d is (a / b) + a = 34329 b = 17838 c = -206 d = 1 +d is (a * b) + a = 32492 b = 37482 c = -206 d = 1217865144 +d is (a / b) + a = 1034 b = 17498 c = -206 d = 0 +d is (a * b) + a = 12000 b = 1347 c = -206 d = 16164000 +d is (a / b) + a = 102 b = 3721 c = -206 d = 0 +d is (a * b) + a = 12981 b = 239 c = -206 d = 3102459 +d is (a / b) + a = 1902 b = 923 c = -206 d = 2 +d is (a * b) + a = 19409 b = 1240 c = -206 d = 24067160 +d is (a / b) + a = 10029 b = 129 c = -206 d = 77 +d is (a * b) + a = 2149 b = 191 c = -206 d = 410459 +d is (a / b) + a = 12030 b = 101 c = -206 d = 119 +d is (a * b) + a = 20099 b = 1010 c = -206 d = 20299990 +d is (a / b) + a = 90 b = 190 c = -206 d = 0 +d is (a * b) + a = 10009 b = 19820 c = -206 d = 198378380 +d is (a / b) + a = 9345 b = 2349 c = -206 d = 3 +d is (a * b) + a = 57483 b = 24039 c = -206 d = 1381833837 +d is (a / b) + a = 10903 b = 34728 c = -206 d = 0 +d is (a * b) + a = 34329 b = 5745 c = -206 d = 197220105 +d is (a / b) + a = 32492 b = 78234 c = -206 d = 0 +d is (a * b) + a = 1034 b = 17838 c = -206 d = 18444492 +d is (a / b) + a = 12000 b = 37482 c = -206 d = 0 +d is (a * b) + a = 102 b = 17498 c = -206 d = 1784796 +d is (a / b) + a = 12981 b = 1347 c = -206 d = 9 +d is (a * b) + a = 1902 b = 3721 c = -206 d = 7077342 +d is (a / b) + a = 19409 b = 239 c = -206 d = 81 +d is (a * b) + a = 10029 b = 923 c = -206 d = 9256767 +d is (a / b) + a = 2149 b = 1240 c = -206 d = 1 +d is (a * b) + a = 12030 b = 129 c = -206 d = 1551870 +d is (a / b) + a = 20099 b = 191 c = -206 d = 105 +d is (a * b) + a = 90 b = 101 c = -206 d = 9090 +d is (a / b) + a = 10009 b = 1010 c = -206 d = 9 +d is (a * b) + a = 9345 b = 190 c = -206 d = 1775550 +d is (a / b) + a = 57483 b = 19820 c = -206 d = 2 +d is (a * b) + a = 10903 b = 2349 c = -206 d = 25611147 +d is (a / b) + a = 34329 b = 24039 c = -206 d = 1 +d is (a * b) + a = 32492 b = 34728 c = -206 d = 1128382176 +d is (a / b) + a = 1034 b = 5745 c = -206 d = 0 +d is (a * b) + a = 12000 b = 78234 c = -206 d = 938808000 +d is (a / b) + a = 102 b = 17838 c = -206 d = 0 +d is (a * b) + a = 12981 b = 37482 c = -206 d = 486553842 +d is (a / b) + a = 1902 b = 17498 c = -206 d = 0 +d is (a * b) + a = 19409 b = 1347 c = -206 d = 26143923 +d is (a / b) + a = 10029 b = 3721 c = -206 d = 2 +d is (a * b) + a = 2149 b = 239 c = -206 d = 513611 +d is (a / b) + a = 12030 b = 923 c = -206 d = 13 +d is (a * b) + a = 20099 b = 1240 c = -206 d = 24922760 +d is (a / b) + a = 90 b = 129 c = -206 d = 0 +d is (a * b) + a = 10009 b = 191 c = -206 d = 1911719 +d is (a / b) + a = 9345 b = 101 c = -206 d = 92 +d is (a * b) + a = 57483 b = 1010 c = -206 d = 58057830 +d is (a / b) + a = 10903 b = 190 c = -206 d = 57 +d is (a * b) + a = 34329 b = 19820 c = -206 d = 680400780 +d is (a / b) + a = 32492 b = 2349 c = -206 d = 13 +d is (a * b) + a = 1034 b = 24039 c = -206 d = 24856326 +d is (a / b) + a = 12000 b = 34728 c = -206 d = 0 +d is (a * b) + a = 102 b = 5745 c = -206 d = 585990 +d is (a / b) + a = 12981 b = 78234 c = -206 d = 0 +d is (a * b) + a = 1902 b = 17838 c = -206 d = 33927876 +d is (a / b) + a = 19409 b = 37482 c = -206 d = 0 +d is (a * b) + a = 10029 b = 17498 c = -206 d = 175487442 +d is (a / b) + a = 2149 b = 1347 c = -206 d = 1 +d is (a * b) + a = 12030 b = 3721 c = -206 d = 44763630 +d is (a / b) + a = 20099 b = 239 c = -206 d = 84 +d is (a * b) + a = 90 b = 923 c = -206 d = 83070 +d is (a / b) + a = 10009 b = 1240 c = -206 d = 8 +d is (a * b) + a = 9345 b = 129 c = -206 d = 1205505 +d is (a / b) + a = 57483 b = 191 c = -206 d = 300 +d is (a * b) + a = 10903 b = 101 c = -206 d = 1101203 +d is (a / b) + a = 34329 b = 1010 c = -206 d = 33 +d is (a * b) + a = 32492 b = 190 c = -206 d = 6173480 +d is (a / b) + a = 1034 b = 19820 c = -206 d = 0 +d is (a * b) + a = 12000 b = 2349 c = -206 d = 28188000 +d is (a / b) + a = 102 b = 24039 c = -206 d = 0 +d is (a * b) + a = 12981 b = 34728 c = -206 d = 450804168 +d is (a / b) + a = 1902 b = 5745 c = -206 d = 0 +d is (a * b) + a = 19409 b = 78234 c = -206 d = 1518443706 +d is (a / b) + a = 10029 b = 17838 c = -206 d = 0 +d is (a * b) + a = 2149 b = 37482 c = -206 d = 80548818 +d is (a / b) + a = 12030 b = 17498 c = -206 d = 0 +d is (a * b) + a = 20099 b = 1347 c = -206 d = 27073353 +d is (a / b) + a = 90 b = 3721 c = -206 d = 0 +d is (a * b) + a = 10009 b = 239 c = -206 d = 2392151 +d is (a / b) + a = 9345 b = 923 c = -206 d = 10 +d is (a * b) + a = 57483 b = 1240 c = -206 d = 71278920 +d is (a / b) + a = 10903 b = 129 c = -206 d = 84 +d is (a * b) + a = 34329 b = 191 c = -206 d = 6556839 +d is (a / b) + a = 32492 b = 101 c = -206 d = 321 +d is (a * b) + a = 1034 b = 1010 c = -206 d = 1044340 +d is (a / b) + a = 12000 b = 190 c = -206 d = 63 +d is (a * b) + a = 102 b = 19820 c = -206 d = 2021640 +d is (a / b) + a = 12981 b = 2349 c = -206 d = 5 +d is (a * b) + a = 1902 b = 24039 c = -206 d = 45722178 +d is (a / b) + a = 19409 b = 34728 c = -206 d = 0 +d is (a * b) + a = 10029 b = 5745 c = -206 d = 57616605 +d is (a / b) + a = 2149 b = 78234 c = -206 d = 0 +d is (a * b) + a = 12030 b = 17838 c = -206 d = 214591140 +d is (a / b) + a = 20099 b = 37482 c = -206 d = 0 +d is (a * b) + a = 90 b = 17498 c = -206 d = 1574820 +d is (a / b) + a = 10009 b = 1347 c = -206 d = 7 +d is (a * b) + a = 9345 b = 3721 c = -206 d = 34772745 +d is (a / b) + a = 57483 b = 239 c = -206 d = 240 +d is (a * b) + a = 10903 b = 923 c = -206 d = 10063469 +d is (a / b) + a = 34329 b = 1240 c = -206 d = 27 +d is (a * b) + a = 32492 b = 129 c = -206 d = 4191468 +d is (a / b) + a = 1034 b = 191 c = -206 d = 5 +d is (a * b) + a = 12000 b = 101 c = -206 d = 1212000 +d is (a / b) + a = 102 b = 1010 c = -206 d = 0 +d is (a * b) + a = 12981 b = 190 c = -206 d = 2466390 +d is (a / b) + a = 1902 b = 19820 c = -206 d = 0 +d is (a * b) + a = 19409 b = 2349 c = -206 d = 45591741 +d is (a / b) + a = 10029 b = 24039 c = -206 d = 0 +d is (a * b) + a = 2149 b = 34728 c = -206 d = 74630472 +d is (a / b) + a = 12030 b = 5745 c = -206 d = 2 +d is (a * b) + a = 20099 b = 78234 c = -206 d = 1572425166 +d is (a / b) + a = 90 b = 17838 c = -206 d = 0 +d is (a * b) + a = 10009 b = 37482 c = -206 d = 375157338 +d is (a / b) + a = 9345 b = 17498 c = -206 d = 0 +d is (a * b) + a = 57483 b = 1347 c = -206 d = 77429601 +d is (a / b) + a = 10903 b = 3721 c = -206 d = 2 +d is (a * b) + a = 34329 b = 239 c = -206 d = 8204631 +d is (a / b) + a = 32492 b = 923 c = -206 d = 35 +d is (a * b) + a = 1034 b = 1240 c = -206 d = 1282160 +d is (a / b) + a = 12000 b = 129 c = -206 d = 93 +d is (a * b) + a = 102 b = 191 c = -206 d = 19482 +d is (a / b) + a = 12981 b = 101 c = -206 d = 128 +d is (a * b) + a = 1902 b = 1010 c = -206 d = 1921020 +d is (a / b) + a = 19409 b = 190 c = -206 d = 102 +d is (a * b) + a = 10029 b = 19820 c = -206 d = 198774780 +d is (a / b) + a = 2149 b = 2349 c = -206 d = 0 +d is (a * b) + a = 12030 b = 24039 c = -206 d = 289189170 +d is (a / b) + a = 20099 b = 34728 c = -206 d = 0 +d is (a * b) + a = 90 b = 5745 c = -206 d = 517050 +d is (a / b) + a = 10009 b = 78234 c = -206 d = 0 +d is (a * b) + a = 9345 b = 17838 c = -206 d = 166696110 +d is (a / b) + a = 57483 b = 37482 c = -206 d = 1 +d is (a * b) + a = 10903 b = 17498 c = -206 d = 190780694 +d is (a / b) + a = 34329 b = 1347 c = -206 d = 25 +d is (a * b) + a = 32492 b = 3721 c = -206 d = 120902732 +d is (a / b) + a = 1034 b = 239 c = -206 d = 4 +d is (a * b) + a = 12000 b = 923 c = -206 d = 11076000 +d is (a / b) + a = 102 b = 1240 c = -206 d = 0 +d is (a * b) + a = 12981 b = 129 c = -206 d = 1674549 +d is (a / b) + a = 1902 b = 191 c = -206 d = 9 +d is (a * b) + a = 19409 b = 101 c = -206 d = 1960309 +d is (a / b) + a = 10029 b = 1010 c = -206 d = 9 +d is (a * b) + a = 2149 b = 190 c = -206 d = 408310 +d is (a / b) + a = 12030 b = 19820 c = -206 d = 0 +d is (a * b) + a = 20099 b = 2349 c = -206 d = 47212551 +d is (a / b) + a = 90 b = 24039 c = -206 d = 0 +d is (a * b) + a = 10009 b = 34728 c = -206 d = 347592552 +d is (a / b) + a = 9345 b = 5745 c = -206 d = 1 +d is (a * b) + a = 57483 b = 78234 c = -206 d = 202157726 +d is (a / b) + a = 10903 b = 17838 c = -206 d = 0 +d is (a * b) + a = 34329 b = 37482 c = -206 d = 1286719578 +d is (a / b) + a = 32492 b = 17498 c = -206 d = 1 +d is (a * b) + a = 1034 b = 1347 c = -206 d = 1392798 +d is (a / b) + a = 12000 b = 3721 c = -206 d = 3 +d is (a * b) + a = 102 b = 239 c = -206 d = 24378 +d is (a / b) + a = 12981 b = 923 c = -206 d = 14 +d is (a * b) + a = 1902 b = 1240 c = -206 d = 2358480 +d is (a / b) + a = 19409 b = 129 c = -206 d = 150 +d is (a * b) + a = 10029 b = 191 c = -206 d = 1915539 +d is (a / b) + a = 2149 b = 101 c = -206 d = 21 +d is (a * b) + a = 12030 b = 1010 c = -206 d = 12150300 +d is (a / b) + a = 20099 b = 190 c = -206 d = 105 +d is (a * b) + a = 90 b = 19820 c = -206 d = 1783800 +d is (a / b) + a = 10009 b = 2349 c = -206 d = 4 +d is (a * b) + a = 9345 b = 24039 c = -206 d = 224644455 +d is (a / b) + a = 57483 b = 34728 c = -206 d = 1 +d is (a * b) + a = 10903 b = 5745 c = -206 d = 62637735 +d is (a / b) + a = 34329 b = 78234 c = -206 d = 0 +d is (a * b) + a = 32492 b = 17838 c = -206 d = 579592296 +d is (a / b) + a = 1034 b = 37482 c = -206 d = 0 +d is (a * b) + a = 12000 b = 17498 c = -206 d = 209976000 +d is (a / b) + a = 102 b = 1347 c = -206 d = 0 +d is (a * b) + a = 12981 b = 3721 c = -206 d = 48302301 +d is (a / b) + a = 1902 b = 239 c = -206 d = 7 +d is (a * b) + a = 19409 b = 923 c = -206 d = 17914507 +d is (a / b) + a = 10029 b = 1240 c = -206 d = 8 +d is (a * b) + a = 2149 b = 129 c = -206 d = 277221 +d is (a / b) + a = 12030 b = 191 c = -206 d = 62 +d is (a * b) + a = 20099 b = 101 c = -206 d = 2029999 +d is (a / b) + a = 90 b = 1010 c = -206 d = 0 +d is (a * b) + a = 10009 b = 190 c = -206 d = 1901710 +d is (a / b) + a = 9345 b = 19820 c = -206 d = 0 +d is (a * b) + a = 57483 b = 2349 c = -206 d = 135027567 +d is (a / b) + a = 10903 b = 24039 c = -206 d = 0 +d is (a * b) + a = 34329 b = 34728 c = -206 d = 1192177512 +d is (a / b) + a = 32492 b = 5745 c = -206 d = 5 +d is (a * b) + a = 1034 b = 78234 c = -206 d = 80893956 +d is (a / b) + a = 12000 b = 17838 c = -206 d = 0 +d is (a * b) + a = 102 b = 37482 c = -206 d = 3823164 +d is (a / b) + a = 12981 b = 17498 c = -206 d = 0 +d is (a * b) + a = 1902 b = 1347 c = -206 d = 2561994 +d is (a / b) + a = 19409 b = 3721 c = -206 d = 5 +d is (a * b) + a = 10029 b = 239 c = -206 d = 2396931 +d is (a / b) + a = 2149 b = 923 c = -206 d = 2 +d is (a * b) + a = 12030 b = 1240 c = -206 d = 14917200 +d is (a / b) + a = 20099 b = 129 c = -206 d = 155 +d is (a * b) + a = 90 b = 191 c = -206 d = 17190 +d is (a / b) + a = 10009 b = 101 c = -206 d = 99 +d is (a * b) + a = 9345 b = 1010 c = -206 d = 9438450 +d is (a / b) + a = 57483 b = 190 c = -206 d = 302 +d is (a * b) + a = 10903 b = 19820 c = -206 d = 216097460 +d is (a / b) + a = 34329 b = 2349 c = -206 d = 14 +d is (a * b) + a = 32492 b = 24039 c = -206 d = 781075188 +d is (a / b) + a = 1034 b = 34728 c = -206 d = 0 +d is (a * b) + a = 12000 b = 5745 c = -206 d = 68940000 +d is (a / b) + a = 102 b = 78234 c = -206 d = 0 +d is (a * b) + a = 12981 b = 17838 c = -206 d = 231555078 +d is (a / b) + a = 1902 b = 37482 c = -206 d = 0 +d is (a * b) + a = 19409 b = 17498 c = -206 d = 339618682 +d is (a / b) + a = 10029 b = 1347 c = -206 d = 7 +d is (a * b) + a = 2149 b = 3721 c = -206 d = 7996429 +d is (a / b) + a = 12030 b = 239 c = -206 d = 50 +d is (a * b) + a = 20099 b = 923 c = -206 d = 18551377 +d is (a / b) + a = 90 b = 1240 c = -206 d = 0 +d is (a * b) + a = 10009 b = 129 c = -206 d = 1291161 +d is (a / b) + a = 9345 b = 191 c = -206 d = 48 +d is (a * b) + a = 57483 b = 101 c = -206 d = 5805783 +d is (a / b) + a = 10903 b = 1010 c = -206 d = 10 +d is (a * b) + a = 34329 b = 190 c = -206 d = 6522510 +d is (a / b) + a = 32492 b = 19820 c = -206 d = 1 +d is (a * b) + a = 1034 b = 2349 c = -206 d = 2428866 +d is (a / b) + a = 12000 b = 24039 c = -206 d = 0 +d is (a * b) + a = 102 b = 34728 c = -206 d = 3542256 +d is (a / b) + a = 12981 b = 5745 c = -206 d = 2 +d is (a * b) + a = 1902 b = 78234 c = -206 d = 148801068 +d is (a / b) + a = 19409 b = 17838 c = -206 d = 1 +d is (a * b) + a = 10029 b = 37482 c = -206 d = 375906978 +d is (a / b) + a = 2149 b = 17498 c = -206 d = 0 +d is (a * b) + a = 12030 b = 1347 c = -206 d = 16204410 +d is (a / b) + a = 20099 b = 3721 c = -206 d = 5 +d is (a * b) + a = 90 b = 239 c = -206 d = 21510 +d is (a / b) + a = 10009 b = 923 c = -206 d = 10 +d is (a * b) + a = 9345 b = 1240 c = -206 d = 11587800 +d is (a / b) + a = 57483 b = 129 c = -206 d = 445 +d is (a * b) + a = 10903 b = 191 c = -206 d = 2082473 +d is (a / b) + a = 34329 b = 101 c = -206 d = 339 +d is (a * b) + a = 32492 b = 1010 c = -206 d = 32816920 +d is (a / b) + a = 1034 b = 190 c = -206 d = 5 +d is (a * b) + a = 12000 b = 19820 c = -206 d = 237840000 +d is (a / b) + a = 102 b = 2349 c = -206 d = 0 +d is (a * b) + a = 12981 b = 24039 c = -206 d = 312050259 +d is (a / b) + a = 1902 b = 34728 c = -206 d = 0 +d is (a * b) + a = 19409 b = 5745 c = -206 d = 111504705 +d is (a / b) + a = 10029 b = 78234 c = -206 d = 0 +d is (a * b) + a = 2149 b = 17838 c = -206 d = 38333862 +d is (a / b) + a = 12030 b = 37482 c = -206 d = 0 +d is (a * b) + a = 20099 b = 17498 c = -206 d = 351692302 +d is (a / b) + a = 90 b = 1347 c = -206 d = 0 +d is (a * b) + a = 10009 b = 3721 c = -206 d = 37243489 +d is (a / b) + a = 9345 b = 239 c = -206 d = 39 +d is (a * b) + a = 57483 b = 923 c = -206 d = 53056809 +d is (a / b) + a = 10903 b = 1240 c = -206 d = 8 +d is (a * b) + a = 34329 b = 129 c = -206 d = 4428441 +d is (a / b) + a = 32492 b = 191 c = -206 d = 170 +d is (a * b) + a = 1034 b = 101 c = -206 d = 104434 +d is (a / b) + a = 12000 b = 1010 c = -206 d = 11 +d is (a * b) + a = 102 b = 190 c = -206 d = 19380 +d is (a / b) + a = 12981 b = 19820 c = -206 d = 0 +d is (a * b) + a = 1902 b = 2349 c = -206 d = 4467798 +d is (a / b) + a = 19409 b = 24039 c = -206 d = 0 +d is (a * b) + a = 10029 b = 34728 c = -206 d = 348287112 +d is (a / b) + a = 2149 b = 5745 c = -206 d = 0 +d is (a * b) + a = 12030 b = 78234 c = -206 d = 941155020 +d is (a / b) + a = 20099 b = 17838 c = -206 d = 1 +d is (a * b) + a = 90 b = 37482 c = -206 d = 3373380 +d is (a / b) + a = 10009 b = 17498 c = -206 d = 0 +d is (a * b) + a = 9345 b = 1347 c = -206 d = 12587715 +d is (a / b) + a = 57483 b = 3721 c = -206 d = 15 +d is (a * b) + a = 10903 b = 239 c = -206 d = 2605817 +d is (a / b) + a = 34329 b = 923 c = -206 d = 37 +d is (a * b) + a = 32492 b = 1240 c = -206 d = 40290080 +d is (a / b) + a = 1034 b = 129 c = -206 d = 8 +d is (a * b) + a = 12000 b = 191 c = -206 d = 2292000 +d is (a / b) + a = 102 b = 101 c = -206 d = 1 +d is (a * b) + a = 12981 b = 1010 c = -206 d = 13110810 +d is (a / b) + a = 1902 b = 190 c = -206 d = 10 +d is (a * b) + a = 19409 b = 19820 c = -206 d = 384686380 +d is (a / b) + a = 10029 b = 2349 c = -206 d = 4 +d is (a * b) + a = 2149 b = 24039 c = -206 d = 51659811 +d is (a / b) + a = 12030 b = 34728 c = -206 d = 0 +d is (a * b) + a = 20099 b = 5745 c = -206 d = 115468755 +d is (a / b) + a = 90 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10009 b = 17838 c = -206 d = 178540542 +d is (a / b) + a = 9345 b = 37482 c = -206 d = 0 +d is (a * b) + a = 57483 b = 17498 c = -206 d = 1005837534 +d is (a / b) + a = 10903 b = 1347 c = -206 d = 8 +d is (a * b) + a = 34329 b = 3721 c = -206 d = 127738209 +d is (a / b) + a = 32492 b = 239 c = -206 d = 135 +d is (a * b) + a = 1034 b = 923 c = -206 d = 954382 +d is (a / b) + a = 12000 b = 1240 c = -206 d = 9 +d is (a * b) + a = 102 b = 129 c = -206 d = 13158 +d is (a / b) + a = 12981 b = 191 c = -206 d = 67 +d is (a * b) + a = 1902 b = 101 c = -206 d = 192102 +d is (a / b) + a = 19409 b = 1010 c = -206 d = 19 +d is (a * b) + a = 10029 b = 190 c = -206 d = 1905510 +d is (a / b) + a = 2149 b = 19820 c = -206 d = 0 +d is (a * b) + a = 12030 b = 2349 c = -206 d = 28258470 +d is (a / b) + a = 20099 b = 24039 c = -206 d = 0 +d is (a * b) + a = 90 b = 34728 c = -206 d = 3125520 +d is (a / b) + a = 10009 b = 5745 c = -206 d = 1 +d is (a * b) + a = 9345 b = 78234 c = -206 d = 731096730 +d is (a / b) + a = 57483 b = 17838 c = -206 d = 3 +d is (a * b) + a = 10903 b = 37482 c = -206 d = 408666246 +d is (a / b) + a = 34329 b = 17498 c = -206 d = 1 +d is (a * b) + a = 32492 b = 1347 c = -206 d = 43766724 +d is (a / b) + a = 1034 b = 3721 c = -206 d = 0 +d is (a * b) + a = 12000 b = 239 c = -206 d = 2868000 +d is (a / b) + a = 102 b = 923 c = -206 d = 0 +d is (a * b) + a = 12981 b = 1240 c = -206 d = 16096440 +d is (a / b) + a = 1902 b = 129 c = -206 d = 14 +d is (a * b) + a = 19409 b = 191 c = -206 d = 3707119 +d is (a / b) + a = 10029 b = 101 c = -206 d = 99 +d is (a * b) + a = 2149 b = 1010 c = -206 d = 2170490 +d is (a / b) + a = 12030 b = 190 c = -206 d = 63 +d is (a * b) + a = 20099 b = 19820 c = -206 d = 398362180 +d is (a / b) + a = 90 b = 2349 c = -206 d = 0 +d is (a * b) + a = 10009 b = 24039 c = -206 d = 240606351 +d is (a / b) + a = 9345 b = 34728 c = -206 d = 0 +d is (a * b) + a = 57483 b = 5745 c = -206 d = 330239835 +d is (a / b) + a = 10903 b = 78234 c = -206 d = 0 +d is (a * b) + a = 34329 b = 17838 c = -206 d = 612360702 +d is (a / b) + a = 32492 b = 37482 c = -206 d = 0 +d is (a * b) + a = 1034 b = 17498 c = -206 d = 18092932 +d is (a / b) + a = 12000 b = 1347 c = -206 d = 8 +d is (a * b) + a = 102 b = 3721 c = -206 d = 379542 +d is (a / b) + a = 12981 b = 239 c = -206 d = 54 +d is (a * b) + a = 1902 b = 923 c = -206 d = 1755546 +d is (a / b) + a = 19409 b = 1240 c = -206 d = 15 +d is (a * b) + a = 10029 b = 129 c = -206 d = 1293741 +d is (a / b) + a = 2149 b = 191 c = -206 d = 11 +d is (a * b) + a = 12030 b = 101 c = -206 d = 1215030 +d is (a / b) + a = 20099 b = 1010 c = -206 d = 19 +d is (a * b) + a = 90 b = 190 c = -206 d = 17100 +d is (a / b) + a = 10009 b = 19820 c = -206 d = 0 +d is (a * b) + a = 9345 b = 2349 c = -206 d = 21951405 +d is (a / b) + a = 57483 b = 24039 c = -206 d = 2 +d is (a * b) + a = 10903 b = 34728 c = -206 d = 378639384 +d is (a / b) + a = 34329 b = 5745 c = -206 d = 5 +d is (a * b) + a = 32492 b = 78234 c = -206 d = -1752988168 +d is (a / b) + a = 1034 b = 17838 c = -206 d = 0 +d is (a * b) + a = 12000 b = 37482 c = -206 d = 449784000 +d is (a / b) + a = 102 b = 17498 c = -206 d = 0 +d is (a * b) + a = 12981 b = 1347 c = -206 d = 17485407 +d is (a / b) + a = 1902 b = 3721 c = -206 d = 0 +d is (a * b) + a = 19409 b = 239 c = -206 d = 4638751 +d is (a / b) + a = 10029 b = 923 c = -206 d = 10 +d is (a * b) + a = 2149 b = 1240 c = -206 d = 2664760 +d is (a / b) + a = 12030 b = 129 c = -206 d = 93 +d is (a * b) + a = 20099 b = 191 c = -206 d = 3838909 +d is (a / b) + a = 90 b = 101 c = -206 d = 0 +d is (a * b) + a = 10009 b = 1010 c = -206 d = 10109090 +d is (a / b) + a = 9345 b = 190 c = -206 d = 49 +d is (a * b) + a = 57483 b = 19820 c = -206 d = 1139313060 +d is (a / b) + a = 10903 b = 2349 c = -206 d = 4 +d is (a * b) + a = 34329 b = 24039 c = -206 d = 825234831 +d is (a / b) + a = 32492 b = 34728 c = -206 d = 0 +d is (a * b) + a = 1034 b = 5745 c = -206 d = 5940330 +d is (a / b) + a = 12000 b = 78234 c = -206 d = 0 +d is (a * b) + a = 102 b = 17838 c = -206 d = 1819476 +d is (a / b) + a = 12981 b = 37482 c = -206 d = 0 +d is (a * b) + a = 1902 b = 17498 c = -206 d = 33281196 +d is (a / b) + a = 19409 b = 1347 c = -206 d = 14 +d is (a * b) + a = 10029 b = 3721 c = -206 d = 37317909 +d is (a / b) + a = 2149 b = 239 c = -206 d = 8 +d is (a * b) + a = 12030 b = 923 c = -206 d = 11103690 +d is (a / b) + a = 20099 b = 1240 c = -206 d = 16 +d is (a * b) + a = 90 b = 129 c = -206 d = 11610 +d is (a / b) + a = 10009 b = 191 c = -206 d = 52 +d is (a * b) + a = 9345 b = 101 c = -206 d = 943845 +d is (a / b) + a = 57483 b = 1010 c = -206 d = 56 +d is (a * b) + a = 10903 b = 190 c = -206 d = 2071570 +d is (a / b) + a = 34329 b = 19820 c = -206 d = 1 +d is (a * b) + a = 32492 b = 2349 c = -206 d = 76323708 +d is (a / b) + a = 1034 b = 24039 c = -206 d = 0 +d is (a * b) + a = 12000 b = 34728 c = -206 d = 416736000 +d is (a / b) + a = 102 b = 5745 c = -206 d = 0 +d is (a * b) + a = 12981 b = 78234 c = -206 d = 1015555554 +d is (a / b) + a = 1902 b = 17838 c = -206 d = 0 +d is (a * b) + a = 19409 b = 37482 c = -206 d = 727488138 +d is (a / b) + a = 10029 b = 17498 c = -206 d = 0 +d is (a * b) + a = 2149 b = 1347 c = -206 d = 2894703 +d is (a / b) + a = 12030 b = 3721 c = -206 d = 3 +d is (a * b) + a = 20099 b = 239 c = -206 d = 4803661 +d is (a / b) + a = 90 b = 923 c = -206 d = 0 +d is (a * b) + a = 10009 b = 1240 c = -206 d = 12411160 +d is (a / b) + a = 9345 b = 129 c = -206 d = 72 +d is (a * b) + a = 57483 b = 191 c = -206 d = 10979253 +d is (a / b) + a = 10903 b = 101 c = -206 d = 107 +d is (a * b) + a = 34329 b = 1010 c = -206 d = 34672290 +d is (a / b) + a = 32492 b = 190 c = -206 d = 171 +d is (a * b) + a = 1034 b = 19820 c = -206 d = 20493880 +d is (a / b) + a = 12000 b = 2349 c = -206 d = 5 +d is (a * b) + a = 102 b = 24039 c = -206 d = 2451978 +d is (a / b) + a = 12981 b = 34728 c = -206 d = 0 +d is (a * b) + a = 1902 b = 5745 c = -206 d = 10926990 +d is (a / b) + a = 19409 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10029 b = 17838 c = -206 d = 178897302 +d is (a / b) + a = 2149 b = 37482 c = -206 d = 0 +d is (a * b) + a = 12030 b = 17498 c = -206 d = 210500940 +d is (a / b) + a = 20099 b = 1347 c = -206 d = 14 +d is (a * b) + a = 90 b = 3721 c = -206 d = 334890 +d is (a / b) + a = 10009 b = 239 c = -206 d = 41 +d is (a * b) + a = 9345 b = 923 c = -206 d = 8625435 +d is (a / b) + a = 57483 b = 1240 c = -206 d = 46 +d is (a * b) + a = 10903 b = 129 c = -206 d = 1406487 +d is (a / b) + a = 34329 b = 191 c = -206 d = 179 +d is (a * b) + a = 32492 b = 101 c = -206 d = 3281692 +d is (a / b) + a = 1034 b = 1010 c = -206 d = 1 +d is (a * b) + a = 12000 b = 190 c = -206 d = 2280000 +d is (a / b) + a = 102 b = 19820 c = -206 d = 0 +d is (a * b) + a = 12981 b = 2349 c = -206 d = 30492369 +d is (a / b) + a = 1902 b = 24039 c = -206 d = 0 +d is (a * b) + a = 19409 b = 34728 c = -206 d = 674035752 +d is (a / b) + a = 10029 b = 5745 c = -206 d = 1 +d is (a * b) + a = 2149 b = 78234 c = -206 d = 168124866 +d is (a / b) + a = 12030 b = 17838 c = -206 d = 0 +d is (a * b) + a = 20099 b = 37482 c = -206 d = 753350718 +d is (a / b) + a = 90 b = 17498 c = -206 d = 0 +d is (a * b) + a = 10009 b = 1347 c = -206 d = 13482123 +d is (a / b) + a = 9345 b = 3721 c = -206 d = 2 +d is (a * b) + a = 57483 b = 239 c = -206 d = 13738437 +d is (a / b) + a = 10903 b = 923 c = -206 d = 11 +d is (a * b) + a = 34329 b = 1240 c = -206 d = 42567960 +d is (a / b) + a = 32492 b = 129 c = -206 d = 251 +d is (a * b) + a = 1034 b = 191 c = -206 d = 197494 +d is (a / b) + a = 12000 b = 101 c = -206 d = 118 +d is (a * b) + a = 102 b = 1010 c = -206 d = 103020 +d is (a / b) + a = 12981 b = 190 c = -206 d = 68 +d is (a * b) + a = 1902 b = 19820 c = -206 d = 37697640 +d is (a / b) + a = 19409 b = 2349 c = -206 d = 8 +d is (a * b) + a = 10029 b = 24039 c = -206 d = 241087131 +d is (a / b) + a = 2149 b = 34728 c = -206 d = 0 +d is (a * b) + a = 12030 b = 5745 c = -206 d = 69112350 +d is (a / b) + a = 20099 b = 78234 c = -206 d = 0 +d is (a * b) + a = 90 b = 17838 c = -206 d = 1605420 +d is (a / b) + a = 10009 b = 37482 c = -206 d = 0 +d is (a * b) + a = 9345 b = 17498 c = -206 d = 163518810 +d is (a / b) + a = 57483 b = 1347 c = -206 d = 42 +d is (a * b) + a = 10903 b = 3721 c = -206 d = 40570063 +d is (a / b) + a = 34329 b = 239 c = -206 d = 143 +d is (a * b) + a = 32492 b = 923 c = -206 d = 29990116 +d is (a / b) + a = 1034 b = 1240 c = -206 d = 0 +d is (a * b) + a = 12000 b = 129 c = -206 d = 1548000 +d is (a / b) + a = 102 b = 191 c = -206 d = 0 +d is (a * b) + a = 12981 b = 101 c = -206 d = 1311081 +d is (a / b) + a = 1902 b = 1010 c = -206 d = 1 +d is (a * b) + a = 19409 b = 190 c = -206 d = 3687710 +d is (a / b) + a = 10029 b = 19820 c = -206 d = 0 +d is (a * b) + a = 2149 b = 2349 c = -206 d = 5048001 +d is (a / b) + a = 12030 b = 24039 c = -206 d = 0 +d is (a * b) + a = 20099 b = 34728 c = -206 d = 697998072 +d is (a / b) + a = 90 b = 5745 c = -206 d = 0 +d is (a * b) + a = 10009 b = 78234 c = -206 d = 783044106 +d is (a / b) + a = 9345 b = 17838 c = -206 d = 0 +d is (a * b) + a = 57483 b = 37482 c = -206 d = -2140389490 +d is (a / b) + a = 10903 b = 17498 c = -206 d = 0 +d is (a * b) + a = 34329 b = 1347 c = -206 d = 46241163 +d is (a / b) + a = 32492 b = 3721 c = -206 d = 8 +d is (a * b) + a = 1034 b = 239 c = -206 d = 247126 +d is (a / b) + a = 12000 b = 923 c = -206 d = 13 +d is (a * b) + a = 102 b = 1240 c = -206 d = 126480 +d is (a / b) + a = 12981 b = 129 c = -206 d = 100 +d is (a * b) + a = 1902 b = 191 c = -206 d = 363282 +d is (a / b) + a = 19409 b = 101 c = -206 d = 192 +d is (a * b) + a = 10029 b = 1010 c = -206 d = 10129290 +d is (a / b) + a = 2149 b = 190 c = -206 d = 11 +d is (a * b) + a = 12030 b = 19820 c = -206 d = 238434600 +d is (a / b) + a = 20099 b = 2349 c = -206 d = 8 +d is (a * b) + a = 90 b = 24039 c = -206 d = 2163510 +d is (a / b) + a = 10009 b = 34728 c = -206 d = 0 +d is (a * b) + a = 9345 b = 5745 c = -206 d = 53687025 +d is (a / b) + a = 57483 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10903 b = 17838 c = -206 d = 194487714 +d is (a / b) + a = 34329 b = 37482 c = -206 d = 0 +d is (a * b) + a = 32492 b = 17498 c = -206 d = 568545016 +d is (a / b) + a = 1034 b = 1347 c = -206 d = 0 +d is (a * b) + a = 12000 b = 3721 c = -206 d = 44652000 +d is (a / b) + a = 102 b = 239 c = -206 d = 0 +d is (a * b) + a = 12981 b = 923 c = -206 d = 11981463 +d is (a / b) + a = 1902 b = 1240 c = -206 d = 1 +d is (a * b) + a = 19409 b = 129 c = -206 d = 2503761 +d is (a / b) + a = 10029 b = 191 c = -206 d = 52 +d is (a * b) + a = 2149 b = 101 c = -206 d = 217049 +d is (a / b) + a = 12030 b = 1010 c = -206 d = 11 +d is (a * b) + a = 20099 b = 190 c = -206 d = 3818810 +d is (a / b) + a = 90 b = 19820 c = -206 d = 0 +d is (a * b) + a = 10009 b = 2349 c = -206 d = 23511141 +d is (a / b) + a = 9345 b = 24039 c = -206 d = 0 +d is (a * b) + a = 57483 b = 34728 c = -206 d = 1996269624 +d is (a / b) + a = 10903 b = 5745 c = -206 d = 1 +d is (a * b) + a = 34329 b = 78234 c = -206 d = -1609272310 +d is (a / b) + a = 32492 b = 17838 c = -206 d = 1 +d is (a * b) + a = 1034 b = 37482 c = -206 d = 38756388 +d is (a / b) + a = 12000 b = 17498 c = -206 d = 0 +d is (a * b) + a = 102 b = 1347 c = -206 d = 137394 +d is (a / b) + a = 12981 b = 3721 c = -206 d = 3 +d is (a * b) + a = 1902 b = 239 c = -206 d = 454578 +d is (a / b) + a = 19409 b = 923 c = -206 d = 21 +d is (a * b) + a = 10029 b = 1240 c = -206 d = 12435960 +d is (a / b) + a = 2149 b = 129 c = -206 d = 16 +d is (a * b) + a = 12030 b = 191 c = -206 d = 2297730 +d is (a / b) + a = 20099 b = 101 c = -206 d = 199 +d is (a * b) + a = 90 b = 1010 c = -206 d = 90900 +d is (a / b) + a = 10009 b = 190 c = -206 d = 52 +d is (a * b) + a = 9345 b = 19820 c = -206 d = 185217900 +d is (a / b) + a = 57483 b = 2349 c = -206 d = 24 +d is (a * b) + a = 10903 b = 24039 c = -206 d = 262097217 +d is (a / b) + a = 34329 b = 34728 c = -206 d = 0 +d is (a * b) + a = 32492 b = 5745 c = -206 d = 186666540 +d is (a / b) + a = 1034 b = 78234 c = -206 d = 0 +d is (a * b) + a = 12000 b = 17838 c = -206 d = 214056000 +d is (a / b) + a = 102 b = 37482 c = -206 d = 0 +d is (a * b) + a = 12981 b = 17498 c = -206 d = 227141538 +d is (a / b) + a = 1902 b = 1347 c = -206 d = 1 +d is (a * b) + a = 19409 b = 3721 c = -206 d = 72220889 +d is (a / b) + a = 10029 b = 239 c = -206 d = 41 +d is (a * b) + a = 2149 b = 923 c = -206 d = 1983527 +d is (a / b) + a = 12030 b = 1240 c = -206 d = 9 +d is (a * b) + a = 20099 b = 129 c = -206 d = 2592771 +d is (a / b) + a = 90 b = 191 c = -206 d = 0 +d is (a * b) + a = 10009 b = 101 c = -206 d = 1010909 +d is (a / b) + a = 9345 b = 1010 c = -206 d = 9 +d is (a * b) + a = 57483 b = 190 c = -206 d = 10921770 +d is (a / b) + a = 10903 b = 19820 c = -206 d = 0 +d is (a * b) + a = 34329 b = 2349 c = -206 d = 80638821 +d is (a / b) + a = 32492 b = 24039 c = -206 d = 1 +d is (a * b) + a = 1034 b = 34728 c = -206 d = 35908752 +d is (a / b) + a = 12000 b = 5745 c = -206 d = 2 +d is (a * b) + a = 102 b = 78234 c = -206 d = 7979868 +d is (a / b) + a = 12981 b = 17838 c = -206 d = 0 +d is (a * b) + a = 1902 b = 37482 c = -206 d = 71290764 +d is (a / b) + a = 19409 b = 17498 c = -206 d = 1 +d is (a * b) + a = 10029 b = 1347 c = -206 d = 13509063 +d is (a / b) + a = 2149 b = 3721 c = -206 d = 0 +d is (a * b) + a = 12030 b = 239 c = -206 d = 2875170 +d is (a / b) + a = 20099 b = 923 c = -206 d = 21 +d is (a * b) + a = 90 b = 1240 c = -206 d = 111600 +d is (a / b) + a = 10009 b = 129 c = -206 d = 77 +d is (a * b) + a = 9345 b = 191 c = -206 d = 1784895 +d is (a / b) + a = 57483 b = 101 c = -206 d = 569 +d is (a * b) + a = 10903 b = 1010 c = -206 d = 11012030 +d is (a / b) + a = 34329 b = 190 c = -206 d = 180 +d is (a * b) + a = 32492 b = 19820 c = -206 d = 643991440 +d is (a / b) + a = 1034 b = 2349 c = -206 d = 0 +d is (a * b) + a = 12000 b = 24039 c = -206 d = 288468000 +d is (a / b) + a = 102 b = 34728 c = -206 d = 0 +d is (a * b) + a = 12981 b = 5745 c = -206 d = 74575845 +d is (a / b) + a = 1902 b = 78234 c = -206 d = 0 +d is (a * b) + a = 19409 b = 17838 c = -206 d = 346217742 +d is (a / b) + a = 10029 b = 37482 c = -206 d = 0 +d is (a * b) + a = 2149 b = 17498 c = -206 d = 37603202 +d is (a / b) + a = 12030 b = 1347 c = -206 d = 8 +d is (a * b) + a = 20099 b = 3721 c = -206 d = 74788379 +d is (a / b) + a = 90 b = 239 c = -206 d = 0 +d is (a * b) + a = 10009 b = 923 c = -206 d = 9238307 +d is (a / b) + a = 9345 b = 1240 c = -206 d = 7 +d is (a * b) + a = 57483 b = 129 c = -206 d = 7415307 +d is (a / b) + a = 10903 b = 191 c = -206 d = 57 +d is (a * b) + a = 34329 b = 101 c = -206 d = 3467229 +d is (a / b) + a = 32492 b = 1010 c = -206 d = 32 +d is (a * b) + a = 1034 b = 190 c = -206 d = 196460 +d is (a / b) + a = 12000 b = 19820 c = -206 d = 0 +d is (a * b) + a = 102 b = 2349 c = -206 d = 239598 +d is (a / b) + a = 12981 b = 24039 c = -206 d = 0 +d is (a * b) + a = 1902 b = 34728 c = -206 d = 66052656 +d is (a / b) + a = 19409 b = 5745 c = -206 d = 3 +d is (a * b) + a = 10029 b = 78234 c = -206 d = 784608786 +d is (a / b) + a = 2149 b = 17838 c = -206 d = 0 +d is (a * b) + a = 12030 b = 37482 c = -206 d = 450908460 +d is (a / b) + a = 20099 b = 17498 c = -206 d = 1 +d is (a * b) + a = 90 b = 1347 c = -206 d = 121230 +d is (a / b) + a = 10009 b = 3721 c = -206 d = 2 +d is (a * b) + a = 9345 b = 239 c = -206 d = 2233455 +d is (a / b) + a = 57483 b = 923 c = -206 d = 62 +d is (a * b) + a = 10903 b = 1240 c = -206 d = 13519720 +d is (a / b) + a = 34329 b = 129 c = -206 d = 266 +d is (a * b) + a = 32492 b = 191 c = -206 d = 6205972 +d is (a / b) + a = 1034 b = 101 c = -206 d = 10 +d is (a * b) + a = 12000 b = 1010 c = -206 d = 12120000 +d is (a / b) + a = 102 b = 190 c = -206 d = 0 +d is (a * b) + a = 12981 b = 19820 c = -206 d = 257283420 +d is (a / b) + a = 1902 b = 2349 c = -206 d = 0 +d is (a * b) + a = 19409 b = 24039 c = -206 d = 466572951 +d is (a / b) + a = 10029 b = 34728 c = -206 d = 0 +d is (a * b) + a = 2149 b = 5745 c = -206 d = 12346005 +d is (a / b) + a = 12030 b = 78234 c = -206 d = 0 +d is (a * b) + a = 20099 b = 17838 c = -206 d = 358525962 +d is (a / b) + a = 90 b = 37482 c = -206 d = 0 +d is (a * b) + a = 10009 b = 17498 c = -206 d = 175137482 +d is (a / b) + a = 9345 b = 1347 c = -206 d = 6 +d is (a * b) + a = 57483 b = 3721 c = -206 d = 213894243 +d is (a / b) + a = 10903 b = 239 c = -206 d = 45 +d is (a * b) + a = 34329 b = 923 c = -206 d = 31685667 +d is (a / b) + a = 32492 b = 1240 c = -206 d = 26 +d is (a * b) + a = 1034 b = 129 c = -206 d = 133386 +d is (a / b) + a = 12000 b = 191 c = -206 d = 62 +d is (a * b) + a = 102 b = 101 c = -206 d = 10302 +d is (a / b) + a = 12981 b = 1010 c = -206 d = 12 +d is (a * b) + a = 1902 b = 190 c = -206 d = 361380 +d is (a / b) + a = 19409 b = 19820 c = -206 d = 0 +d is (a * b) + a = 10029 b = 2349 c = -206 d = 23558121 +d is (a / b) + a = 2149 b = 24039 c = -206 d = 0 +d is (a * b) + a = 12030 b = 34728 c = -206 d = 417777840 +d is (a / b) + a = 20099 b = 5745 c = -206 d = 3 +d is (a * b) + a = 90 b = 78234 c = -206 d = 7041060 +d is (a / b) + a = 10009 b = 17838 c = -206 d = 0 +d is (a * b) + a = 9345 b = 37482 c = -206 d = 350269290 +d is (a / b) + a = 57483 b = 17498 c = -206 d = 3 +d is (a * b) + a = 10903 b = 1347 c = -206 d = 14686341 +d is (a / b) + a = 34329 b = 3721 c = -206 d = 9 +d is (a * b) + a = 32492 b = 239 c = -206 d = 7765588 +d is (a / b) + a = 1034 b = 923 c = -206 d = 1 +d is (a * b) + a = 12000 b = 1240 c = -206 d = 14880000 +d is (a / b) + a = 102 b = 129 c = -206 d = 0 +d is (a * b) + a = 12981 b = 191 c = -206 d = 2479371 +d is (a / b) + a = 1902 b = 101 c = -206 d = 18 +d is (a * b) + a = 19409 b = 1010 c = -206 d = 19603090 +d is (a / b) + a = 10029 b = 190 c = -206 d = 52 +d is (a * b) + a = 2149 b = 19820 c = -206 d = 42593180 +d is (a / b) + a = 12030 b = 2349 c = -206 d = 5 +d is (a * b) + a = 20099 b = 24039 c = -206 d = 483159861 +d is (a / b) + a = 90 b = 34728 c = -206 d = 0 +d is (a * b) + a = 10009 b = 5745 c = -206 d = 57501705 +d is (a / b) + a = 9345 b = 78234 c = -206 d = 0 +d is (a * b) + a = 57483 b = 17838 c = -206 d = 1025381754 +d is (a / b) + a = 10903 b = 37482 c = -206 d = 0 +d is (a * b) + a = 34329 b = 17498 c = -206 d = 600688842 +d is (a / b) + a = 32492 b = 1347 c = -206 d = 24 +d is (a * b) + a = 1034 b = 3721 c = -206 d = 3847514 +d is (a / b) + a = 12000 b = 239 c = -206 d = 50 +d is (a * b) + a = 102 b = 923 c = -206 d = 94146 +d is (a / b) + a = 12981 b = 1240 c = -206 d = 10 +d is (a * b) + a = 1902 b = 129 c = -206 d = 245358 +d is (a / b) + a = 19409 b = 191 c = -206 d = 101 +d is (a * b) + a = 10029 b = 101 c = -206 d = 1012929 +d is (a / b) + a = 2149 b = 1010 c = -206 d = 2 +d is (a * b) + a = 12030 b = 190 c = -206 d = 2285700 +d is (a / b) + a = 20099 b = 19820 c = -206 d = 1 +d is (a * b) + a = 90 b = 2349 c = -206 d = 211410 +d is (a / b) + a = 10009 b = 24039 c = -206 d = 0 +d is (a * b) + a = 9345 b = 34728 c = -206 d = 324533160 +d is (a / b) + a = 57483 b = 5745 c = -206 d = 10 +d is (a * b) + a = 10903 b = 78234 c = -206 d = 852985302 +d is (a / b) + a = 34329 b = 17838 c = -206 d = 1 +d is (a * b) + a = 32492 b = 37482 c = -206 d = 1217865144 +d is (a / b) + a = 1034 b = 17498 c = -206 d = 0 +d is (a * b) + a = 12000 b = 1347 c = -206 d = 16164000 +d is (a / b) + a = 102 b = 3721 c = -206 d = 0 +d is (a * b) + a = 12981 b = 239 c = -206 d = 3102459 +d is (a / b) + a = 1902 b = 923 c = -206 d = 2 +d is (a * b) + a = 19409 b = 1240 c = -206 d = 24067160 +d is (a / b) + a = 10029 b = 129 c = -206 d = 77 +d is (a * b) + a = 2149 b = 191 c = -206 d = 410459 +d is (a / b) + a = 12030 b = 101 c = -206 d = 119 +d is (a * b) + a = 20099 b = 1010 c = -206 d = 20299990 +d is (a / b) + a = 90 b = 190 c = -206 d = 0 +d is (a * b) + a = 10009 b = 19820 c = -206 d = 198378380 +d is (a / b) + a = 9345 b = 2349 c = -206 d = 3 +d is (a * b) + a = 57483 b = 24039 c = -206 d = 1381833837 +d is (a / b) + a = 10903 b = 34728 c = -206 d = 0 +d is (a * b) + a = 34329 b = 5745 c = -206 d = 197220105 +d is (a / b) + a = 32492 b = 78234 c = -206 d = 0 +d is (a * b) + a = 1034 b = 17838 c = -206 d = 18444492 +d is (a / b) + a = 12000 b = 37482 c = -206 d = 0 +d is (a * b) + a = 102 b = 17498 c = -206 d = 1784796 +d is (a / b) + a = 12981 b = 1347 c = -206 d = 9 +d is (a * b) + a = 1902 b = 3721 c = -206 d = 7077342 +d is (a / b) + a = 19409 b = 239 c = -206 d = 81 +d is (a * b) + a = 10029 b = 923 c = -206 d = 9256767 +d is (a / b) + a = 2149 b = 1240 c = -206 d = 1 +d is (a * b) + a = 12030 b = 129 c = -206 d = 1551870 +d is (a / b) + a = 20099 b = 191 c = -206 d = 105 +d is (a * b) + a = 90 b = 101 c = -206 d = 9090 +d is (a / b) + a = 10009 b = 1010 c = -206 d = 9 +d is (a * b) + a = 9345 b = 190 c = -206 d = 1775550 +d is (a / b) + a = 57483 b = 19820 c = -206 d = 2 +d is (a * b) + a = 10903 b = 2349 c = -206 d = 25611147 +d is (a / b) + a = 34329 b = 24039 c = -206 d = 1 +d is (a * b) + a = 32492 b = 34728 c = -206 d = 1128382176 +d is (a / b) + a = 1034 b = 5745 c = -206 d = 0 +d is (a * b) + a = 12000 b = 78234 c = -206 d = 938808000 +d is (a / b) + a = 102 b = 17838 c = -206 d = 0 +d is (a * b) + a = 12981 b = 37482 c = -206 d = 486553842 +d is (a / b) + a = 1902 b = 17498 c = -206 d = 0 +d is (a * b) + a = 19409 b = 1347 c = -206 d = 26143923 +d is (a / b) + a = 10029 b = 3721 c = -206 d = 2 +d is (a * b) + a = 2149 b = 239 c = -206 d = 513611 +d is (a / b) + a = 12030 b = 923 c = -206 d = 13 +d is (a * b) + a = 20099 b = 1240 c = -206 d = 24922760 +d is (a / b) + a = 90 b = 129 c = -206 d = 0 +d is (a * b) + a = 10009 b = 191 c = -206 d = 1911719 +d is (a / b) + a = 9345 b = 101 c = -206 d = 92 +d is (a * b) + a = 57483 b = 1010 c = -206 d = 58057830 +d is (a / b) + a = 10903 b = 190 c = -206 d = 57 +d is (a * b) + a = 34329 b = 19820 c = -206 d = 680400780 +d is (a / b) + a = 32492 b = 2349 c = -206 d = 13 +d is (a * b) + a = 1034 b = 24039 c = -206 d = 24856326 +d is (a / b) + a = 12000 b = 34728 c = -206 d = 0 +d is (a * b) + a = 102 b = 5745 c = -206 d = 585990 +d is (a / b) + a = 12981 b = 78234 c = -206 d = 0 +d is (a * b) + a = 1902 b = 17838 c = -206 d = 33927876 +d is (a / b) + a = 19409 b = 37482 c = -206 d = 0 +d is (a * b) + a = 10029 b = 17498 c = -206 d = 175487442 +d is (a / b) + a = 2149 b = 1347 c = -206 d = 1 +d is (a * b) + a = 12030 b = 3721 c = -206 d = 44763630 +d is (a / b) + a = 20099 b = 239 c = -206 d = 84 +d is (a * b) + a = 90 b = 923 c = -206 d = 83070 +d is (a / b) + a = 10009 b = 1240 c = -206 d = 8 +d is (a * b) + a = 9345 b = 129 c = -206 d = 1205505 +d is (a / b) + a = 57483 b = 191 c = -206 d = 300 +d is (a * b) + a = 10903 b = 101 c = -206 d = 1101203 +d is (a / b) + a = 34329 b = 1010 c = -206 d = 33 +d is (a * b) + a = 32492 b = 190 c = -206 d = 6173480 +d is (a / b) + a = 1034 b = 19820 c = -206 d = 0 +d is (a * b) + a = 12000 b = 2349 c = -206 d = 28188000 +d is (a / b) + a = 102 b = 24039 c = -206 d = 0 +d is (a * b) + a = 12981 b = 34728 c = -206 d = 450804168 +d is (a / b) + a = 1902 b = 5745 c = -206 d = 0 +d is (a * b) + a = 19409 b = 78234 c = -206 d = 1518443706 +d is (a / b) + a = 10029 b = 17838 c = -206 d = 0 +d is (a * b) + a = 2149 b = 37482 c = -206 d = 80548818 +d is (a / b) + a = 12030 b = 17498 c = -206 d = 0 +d is (a * b) + a = 20099 b = 1347 c = -206 d = 27073353 +d is (a / b) + a = 90 b = 3721 c = -206 d = 0 +d is (a * b) + a = 10009 b = 239 c = -206 d = 2392151 +d is (a / b) + a = 9345 b = 923 c = -206 d = 10 +d is (a * b) + a = 57483 b = 1240 c = -206 d = 71278920 +d is (a / b) + a = 10903 b = 129 c = -206 d = 84 +d is (a * b) + a = 34329 b = 191 c = -206 d = 6556839 +d is (a / b) + a = 32492 b = 101 c = -206 d = 321 +d is (a * b) + a = 1034 b = 1010 c = -206 d = 1044340 +d is (a / b) + a = 12000 b = 190 c = -206 d = 63 +d is (a * b) + a = 102 b = 19820 c = -206 d = 2021640 +d is (a / b) + a = 12981 b = 2349 c = -206 d = 5 +d is (a * b) + a = 1902 b = 24039 c = -206 d = 45722178 +d is (a / b) + a = 19409 b = 34728 c = -206 d = 0 +d is (a * b) + a = 10029 b = 5745 c = -206 d = 57616605 +d is (a / b) + a = 2149 b = 78234 c = -206 d = 0 +d is (a * b) + a = 12030 b = 17838 c = -206 d = 214591140 +d is (a / b) + a = 20099 b = 37482 c = -206 d = 0 +d is (a * b) + a = 90 b = 17498 c = -206 d = 1574820 +d is (a / b) + a = 10009 b = 1347 c = -206 d = 7 +d is (a * b) + a = 9345 b = 3721 c = -206 d = 34772745 +d is (a / b) + a = 57483 b = 239 c = -206 d = 240 +d is (a * b) + a = 10903 b = 923 c = -206 d = 10063469 +d is (a / b) + a = 34329 b = 1240 c = -206 d = 27 +d is (a * b) + a = 32492 b = 129 c = -206 d = 4191468 +d is (a / b) + a = 1034 b = 191 c = -206 d = 5 +d is (a * b) + a = 12000 b = 101 c = -206 d = 1212000 +d is (a / b) + a = 102 b = 1010 c = -206 d = 0 +d is (a * b) + a = 12981 b = 190 c = -206 d = 2466390 +d is (a / b) + a = 1902 b = 19820 c = -206 d = 0 +d is (a * b) + a = 19409 b = 2349 c = -206 d = 45591741 +d is (a / b) + a = 10029 b = 24039 c = -206 d = 0 +d is (a * b) + a = 2149 b = 34728 c = -206 d = 74630472 +d is (a / b) + a = 12030 b = 5745 c = -206 d = 2 +d is (a * b) + a = 20099 b = 78234 c = -206 d = 1572425166 +d is (a / b) + a = 90 b = 17838 c = -206 d = 0 +d is (a * b) + a = 10009 b = 37482 c = -206 d = 375157338 +d is (a / b) + a = 9345 b = 17498 c = -206 d = 0 +d is (a * b) + a = 57483 b = 1347 c = -206 d = 77429601 +d is (a / b) + a = 10903 b = 3721 c = -206 d = 2 +d is (a * b) + a = 34329 b = 239 c = -206 d = 8204631 +d is (a / b) + a = 32492 b = 923 c = -206 d = 35 +d is (a * b) + a = 1034 b = 1240 c = -206 d = 1282160 +d is (a / b) + a = 12000 b = 129 c = -206 d = 93 +d is (a * b) + a = 102 b = 191 c = -206 d = 19482 +d is (a / b) + a = 12981 b = 101 c = -206 d = 128 +d is (a * b) + a = 1902 b = 1010 c = -206 d = 1921020 +d is (a / b) + a = 19409 b = 190 c = -206 d = 102 +d is (a * b) + a = 10029 b = 19820 c = -206 d = 198774780 +d is (a / b) + a = 2149 b = 2349 c = -206 d = 0 +d is (a * b) + a = 12030 b = 24039 c = -206 d = 289189170 +d is (a / b) + a = 20099 b = 34728 c = -206 d = 0 +d is (a * b) + a = 90 b = 5745 c = -206 d = 517050 +d is (a / b) + a = 10009 b = 78234 c = -206 d = 0 +d is (a * b) + a = 9345 b = 17838 c = -206 d = 166696110 +d is (a / b) + a = 57483 b = 37482 c = -206 d = 1 +d is (a * b) + a = 10903 b = 17498 c = -206 d = 190780694 +d is (a / b) + a = 34329 b = 1347 c = -206 d = 25 +d is (a * b) + a = 32492 b = 3721 c = -206 d = 120902732 +d is (a / b) + a = 1034 b = 239 c = -206 d = 4 +d is (a * b) + a = 12000 b = 923 c = -206 d = 11076000 +d is (a / b) + a = 102 b = 1240 c = -206 d = 0 +d is (a * b) + a = 12981 b = 129 c = -206 d = 1674549 +d is (a / b) + a = 1902 b = 191 c = -206 d = 9 +d is (a * b) + a = 19409 b = 101 c = -206 d = 1960309 +d is (a / b) + a = 10029 b = 1010 c = -206 d = 9 +d is (a * b) + a = 2149 b = 190 c = -206 d = 408310 +d is (a / b) + a = 12030 b = 19820 c = -206 d = 0 +d is (a * b) + a = 20099 b = 2349 c = -206 d = 47212551 +d is (a / b) + a = 90 b = 24039 c = -206 d = 0 +d is (a * b) + a = 10009 b = 34728 c = -206 d = 347592552 +d is (a / b) + a = 9345 b = 5745 c = -206 d = 1 +d is (a * b) + a = 57483 b = 78234 c = -206 d = 202157726 +d is (a / b) + a = 10903 b = 17838 c = -206 d = 0 +d is (a * b) + a = 34329 b = 37482 c = -206 d = 1286719578 +d is (a / b) + a = 32492 b = 17498 c = -206 d = 1 +d is (a * b) + a = 1034 b = 1347 c = -206 d = 1392798 +d is (a / b) + a = 12000 b = 3721 c = -206 d = 3 +d is (a * b) + a = 102 b = 239 c = -206 d = 24378 +d is (a / b) + a = 12981 b = 923 c = -206 d = 14 +d is (a * b) + a = 1902 b = 1240 c = -206 d = 2358480 +d is (a / b) + a = 19409 b = 129 c = -206 d = 150 +d is (a * b) + a = 10029 b = 191 c = -206 d = 1915539 +d is (a / b) + a = 2149 b = 101 c = -206 d = 21 +d is (a * b) + a = 12030 b = 1010 c = -206 d = 12150300 +d is (a / b) + a = 20099 b = 190 c = -206 d = 105 +d is (a * b) + a = 90 b = 19820 c = -206 d = 1783800 +d is (a / b) + a = 10009 b = 2349 c = -206 d = 4 +d is (a * b) + a = 9345 b = 24039 c = -206 d = 224644455 +d is (a / b) + a = 57483 b = 34728 c = -206 d = 1 +d is (a * b) + a = 10903 b = 5745 c = -206 d = 62637735 +d is (a / b) + a = 34329 b = 78234 c = -206 d = 0 +d is (a * b) + a = 32492 b = 17838 c = -206 d = 579592296 +d is (a / b) + a = 1034 b = 37482 c = -206 d = 0 +d is (a * b) + a = 12000 b = 17498 c = -206 d = 209976000 +d is (a / b) + a = 102 b = 1347 c = -206 d = 0 +d is (a * b) + a = 12981 b = 3721 c = -206 d = 48302301 +d is (a / b) + a = 1902 b = 239 c = -206 d = 7 +d is (a * b) + a = 19409 b = 923 c = -206 d = 17914507 +d is (a / b) + a = 10029 b = 1240 c = -206 d = 8 +d is (a * b) + a = 2149 b = 129 c = -206 d = 277221 +d is (a / b) + a = 12030 b = 191 c = -206 d = 62 +d is (a * b) + a = 20099 b = 101 c = -206 d = 2029999 +d is (a / b) + a = 90 b = 1010 c = -206 d = 0 +d is (a * b) + a = 10009 b = 190 c = -206 d = 1901710 +d is (a / b) + a = 9345 b = 19820 c = -206 d = 0 +d is (a * b) + a = 57483 b = 2349 c = -206 d = 135027567 +d is (a / b) + a = 10903 b = 24039 c = -206 d = 0 +d is (a * b) + a = 34329 b = 34728 c = -206 d = 1192177512 +d is (a / b) + a = 32492 b = 5745 c = -206 d = 5 +d is (a * b) + a = 1034 b = 78234 c = -206 d = 80893956 +d is (a / b) + a = 12000 b = 17838 c = -206 d = 0 +d is (a * b) + a = 102 b = 37482 c = -206 d = 3823164 +d is (a / b) + a = 12981 b = 17498 c = -206 d = 0 +d is (a * b) + a = 1902 b = 1347 c = -206 d = 2561994 +d is (a / b) + a = 19409 b = 3721 c = -206 d = 5 +d is (a * b) + a = 10029 b = 239 c = -206 d = 2396931 +d is (a / b) + a = 2149 b = 923 c = -206 d = 2 +d is (a * b) + a = 12030 b = 1240 c = -206 d = 14917200 +d is (a / b) + a = 20099 b = 129 c = -206 d = 155 +d is (a * b) + a = 90 b = 191 c = -206 d = 17190 +d is (a / b) + a = 10009 b = 101 c = -206 d = 99 +d is (a * b) + a = 9345 b = 1010 c = -206 d = 9438450 +d is (a / b) + a = 57483 b = 190 c = -206 d = 302 +d is (a * b) + a = 10903 b = 19820 c = -206 d = 216097460 +d is (a / b) + a = 34329 b = 2349 c = -206 d = 14 +d is (a * b) + a = 32492 b = 24039 c = -206 d = 781075188 +d is (a / b) + a = 1034 b = 34728 c = -206 d = 0 +d is (a * b) + a = 12000 b = 5745 c = -206 d = 68940000 +d is (a / b) + a = 102 b = 78234 c = -206 d = 0 +d is (a * b) + a = 12981 b = 17838 c = -206 d = 231555078 +d is (a / b) + a = 1902 b = 37482 c = -206 d = 0 +d is (a * b) + a = 19409 b = 17498 c = -206 d = 339618682 +d is (a / b) + a = 10029 b = 1347 c = -206 d = 7 +d is (a * b) + a = 2149 b = 3721 c = -206 d = 7996429 +d is (a / b) + a = 12030 b = 239 c = -206 d = 50 +d is (a * b) + a = 20099 b = 923 c = -206 d = 18551377 +d is (a / b) + a = 90 b = 1240 c = -206 d = 0 +d is (a * b) + a = 10009 b = 129 c = -206 d = 1291161 +d is (a / b) + a = 9345 b = 191 c = -206 d = 48 +d is (a * b) + a = 57483 b = 101 c = -206 d = 5805783 +d is (a / b) + a = 10903 b = 1010 c = -206 d = 10 +d is (a * b) + a = 34329 b = 190 c = -206 d = 6522510 +d is (a / b) + a = 32492 b = 19820 c = -206 d = 1 +d is (a * b) + a = 1034 b = 2349 c = -206 d = 2428866 +d is (a / b) + a = 12000 b = 24039 c = -206 d = 0 +d is (a * b) + a = 102 b = 34728 c = -206 d = 3542256 +d is (a / b) + a = 12981 b = 5745 c = -206 d = 2 +d is (a * b) + a = 1902 b = 78234 c = -206 d = 148801068 +d is (a / b) + a = 19409 b = 17838 c = -206 d = 1 +d is (a * b) + a = 10029 b = 37482 c = -206 d = 375906978 +d is (a / b) + a = 2149 b = 17498 c = -206 d = 0 +d is (a * b) + a = 12030 b = 1347 c = -206 d = 16204410 +d is (a / b) + a = 20099 b = 3721 c = -206 d = 5 +d is (a * b) + a = 90 b = 239 c = -206 d = 21510 +d is (a / b) + a = 10009 b = 923 c = -206 d = 10 +d is (a * b) + a = 9345 b = 1240 c = -206 d = 11587800 +d is (a / b) + a = 57483 b = 129 c = -206 d = 445 +d is (a * b) + a = 10903 b = 191 c = -206 d = 2082473 +d is (a / b) + a = 34329 b = 101 c = -206 d = 339 +d is (a * b) + a = 32492 b = 1010 c = -206 d = 32816920 +d is (a / b) + a = 1034 b = 190 c = -206 d = 5 +d is (a * b) + a = 12000 b = 19820 c = -206 d = 237840000 +d is (a / b) + a = 102 b = 2349 c = -206 d = 0 +d is (a * b) + a = 12981 b = 24039 c = -206 d = 312050259 +d is (a / b) + a = 1902 b = 34728 c = -206 d = 0 +d is (a * b) + a = 19409 b = 5745 c = -206 d = 111504705 +d is (a / b) + a = 10029 b = 78234 c = -206 d = 0 +d is (a * b) + a = 2149 b = 17838 c = -206 d = 38333862 +d is (a / b) + a = 12030 b = 37482 c = -206 d = 0 +d is (a * b) + a = 20099 b = 17498 c = -206 d = 351692302 +d is (a / b) + a = 90 b = 1347 c = -206 d = 0 +d is (a * b) + a = 10009 b = 3721 c = -206 d = 37243489 +d is (a / b) + a = 9345 b = 239 c = -206 d = 39 +d is (a * b) + a = 57483 b = 923 c = -206 d = 53056809 +d is (a / b) + a = 10903 b = 1240 c = -206 d = 8 +d is (a * b) + a = 34329 b = 129 c = -206 d = 4428441 +d is (a / b) + a = 32492 b = 191 c = -206 d = 170 +d is (a * b) + a = 1034 b = 101 c = -206 d = 104434 +d is (a / b) + a = 12000 b = 1010 c = -206 d = 11 +d is (a * b) + a = 102 b = 190 c = -206 d = 19380 +d is (a / b) + a = 12981 b = 19820 c = -206 d = 0 +d is (a * b) + a = 1902 b = 2349 c = -206 d = 4467798 +d is (a / b) + a = 19409 b = 24039 c = -206 d = 0 +d is (a * b) + a = 10029 b = 34728 c = -206 d = 348287112 +d is (a / b) + a = 2149 b = 5745 c = -206 d = 0 +d is (a * b) + a = 12030 b = 78234 c = -206 d = 941155020 +d is (a / b) + a = 20099 b = 17838 c = -206 d = 1 +d is (a * b) + a = 90 b = 37482 c = -206 d = 3373380 +d is (a / b) + a = 10009 b = 17498 c = -206 d = 0 +d is (a * b) + a = 9345 b = 1347 c = -206 d = 12587715 +d is (a / b) + a = 57483 b = 3721 c = -206 d = 15 +d is (a * b) + a = 10903 b = 239 c = -206 d = 2605817 +d is (a / b) + a = 34329 b = 923 c = -206 d = 37 +d is (a * b) + a = 32492 b = 1240 c = -206 d = 40290080 +d is (a / b) + a = 1034 b = 129 c = -206 d = 8 +d is (a * b) + a = 12000 b = 191 c = -206 d = 2292000 +d is (a / b) + a = 102 b = 101 c = -206 d = 1 +d is (a * b) + a = 12981 b = 1010 c = -206 d = 13110810 +d is (a / b) + a = 1902 b = 190 c = -206 d = 10 +d is (a * b) + a = 19409 b = 19820 c = -206 d = 384686380 +d is (a / b) + a = 10029 b = 2349 c = -206 d = 4 +d is (a * b) + a = 2149 b = 24039 c = -206 d = 51659811 +d is (a / b) + a = 12030 b = 34728 c = -206 d = 0 +d is (a * b) + a = 20099 b = 5745 c = -206 d = 115468755 +d is (a / b) + a = 90 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10009 b = 17838 c = -206 d = 178540542 +d is (a / b) + a = 9345 b = 37482 c = -206 d = 0 +d is (a * b) + a = 57483 b = 17498 c = -206 d = 1005837534 +d is (a / b) + a = 10903 b = 1347 c = -206 d = 8 +d is (a * b) + a = 34329 b = 3721 c = -206 d = 127738209 +d is (a / b) + a = 32492 b = 239 c = -206 d = 135 +d is (a * b) + a = 1034 b = 923 c = -206 d = 954382 +d is (a / b) + a = 12000 b = 1240 c = -206 d = 9 +d is (a * b) + a = 102 b = 129 c = -206 d = 13158 +d is (a / b) + a = 12981 b = 191 c = -206 d = 67 +d is (a * b) + a = 1902 b = 101 c = -206 d = 192102 +d is (a / b) + a = 19409 b = 1010 c = -206 d = 19 +d is (a * b) + a = 10029 b = 190 c = -206 d = 1905510 +d is (a / b) + a = 2149 b = 19820 c = -206 d = 0 +d is (a * b) + a = 12030 b = 2349 c = -206 d = 28258470 +d is (a / b) + a = 20099 b = 24039 c = -206 d = 0 +d is (a * b) + a = 90 b = 34728 c = -206 d = 3125520 +d is (a / b) + a = 10009 b = 5745 c = -206 d = 1 +d is (a * b) + a = 9345 b = 78234 c = -206 d = 731096730 +d is (a / b) + a = 57483 b = 17838 c = -206 d = 3 +d is (a * b) + a = 10903 b = 37482 c = -206 d = 408666246 +d is (a / b) + a = 34329 b = 17498 c = -206 d = 1 +d is (a * b) + a = 32492 b = 1347 c = -206 d = 43766724 +d is (a / b) + a = 1034 b = 3721 c = -206 d = 0 +d is (a * b) + a = 12000 b = 239 c = -206 d = 2868000 +d is (a / b) + a = 102 b = 923 c = -206 d = 0 +d is (a * b) + a = 12981 b = 1240 c = -206 d = 16096440 +d is (a / b) + a = 1902 b = 129 c = -206 d = 14 +d is (a * b) + a = 19409 b = 191 c = -206 d = 3707119 +d is (a / b) + a = 10029 b = 101 c = -206 d = 99 +d is (a * b) + a = 2149 b = 1010 c = -206 d = 2170490 +d is (a / b) + a = 12030 b = 190 c = -206 d = 63 +d is (a * b) + a = 20099 b = 19820 c = -206 d = 398362180 +d is (a / b) + a = 90 b = 2349 c = -206 d = 0 +d is (a * b) + a = 10009 b = 24039 c = -206 d = 240606351 +d is (a / b) + a = 9345 b = 34728 c = -206 d = 0 +d is (a * b) + a = 57483 b = 5745 c = -206 d = 330239835 +d is (a / b) + a = 10903 b = 78234 c = -206 d = 0 +d is (a * b) + a = 34329 b = 17838 c = -206 d = 612360702 +d is (a / b) + a = 32492 b = 37482 c = -206 d = 0 +d is (a * b) + a = 1034 b = 17498 c = -206 d = 18092932 +d is (a / b) + a = 12000 b = 1347 c = -206 d = 8 +d is (a * b) + a = 102 b = 3721 c = -206 d = 379542 +d is (a / b) + a = 12981 b = 239 c = -206 d = 54 +d is (a * b) + a = 1902 b = 923 c = -206 d = 1755546 +d is (a / b) + a = 19409 b = 1240 c = -206 d = 15 +d is (a * b) + a = 10029 b = 129 c = -206 d = 1293741 +d is (a / b) + a = 2149 b = 191 c = -206 d = 11 +d is (a * b) + a = 12030 b = 101 c = -206 d = 1215030 +d is (a / b) + a = 20099 b = 1010 c = -206 d = 19 +d is (a * b) + a = 90 b = 190 c = -206 d = 17100 +d is (a / b) + a = 10009 b = 19820 c = -206 d = 0 +d is (a * b) + a = 9345 b = 2349 c = -206 d = 21951405 +d is (a / b) + a = 57483 b = 24039 c = -206 d = 2 +d is (a * b) + a = 10903 b = 34728 c = -206 d = 378639384 +d is (a / b) + a = 34329 b = 5745 c = -206 d = 5 +d is (a * b) + a = 32492 b = 78234 c = -206 d = -1752988168 +d is (a / b) + a = 1034 b = 17838 c = -206 d = 0 +d is (a * b) + a = 12000 b = 37482 c = -206 d = 449784000 +d is (a / b) + a = 102 b = 17498 c = -206 d = 0 +d is (a * b) + a = 12981 b = 1347 c = -206 d = 17485407 +d is (a / b) + a = 1902 b = 3721 c = -206 d = 0 +d is (a * b) + a = 19409 b = 239 c = -206 d = 4638751 +d is (a / b) + a = 10029 b = 923 c = -206 d = 10 +d is (a * b) + a = 2149 b = 1240 c = -206 d = 2664760 +d is (a / b) + a = 12030 b = 129 c = -206 d = 93 +d is (a * b) + a = 20099 b = 191 c = -206 d = 3838909 +d is (a / b) + a = 90 b = 101 c = -206 d = 0 +d is (a * b) + a = 10009 b = 1010 c = -206 d = 10109090 +d is (a / b) + a = 9345 b = 190 c = -206 d = 49 +d is (a * b) + a = 57483 b = 19820 c = -206 d = 1139313060 +d is (a / b) + a = 10903 b = 2349 c = -206 d = 4 +d is (a * b) + a = 34329 b = 24039 c = -206 d = 825234831 +d is (a / b) + a = 32492 b = 34728 c = -206 d = 0 +d is (a * b) + a = 1034 b = 5745 c = -206 d = 5940330 +d is (a / b) + a = 12000 b = 78234 c = -206 d = 0 +d is (a * b) + a = 102 b = 17838 c = -206 d = 1819476 +d is (a / b) + a = 12981 b = 37482 c = -206 d = 0 +d is (a * b) + a = 1902 b = 17498 c = -206 d = 33281196 +d is (a / b) + a = 19409 b = 1347 c = -206 d = 14 +d is (a * b) + a = 10029 b = 3721 c = -206 d = 37317909 +d is (a / b) + a = 2149 b = 239 c = -206 d = 8 +d is (a * b) + a = 12030 b = 923 c = -206 d = 11103690 +d is (a / b) + a = 20099 b = 1240 c = -206 d = 16 +d is (a * b) + a = 90 b = 129 c = -206 d = 11610 +d is (a / b) + a = 10009 b = 191 c = -206 d = 52 +d is (a * b) + a = 9345 b = 101 c = -206 d = 943845 +d is (a / b) + a = 57483 b = 1010 c = -206 d = 56 +d is (a * b) + a = 10903 b = 190 c = -206 d = 2071570 +d is (a / b) + a = 34329 b = 19820 c = -206 d = 1 +d is (a * b) + a = 32492 b = 2349 c = -206 d = 76323708 +d is (a / b) + a = 1034 b = 24039 c = -206 d = 0 +d is (a * b) + a = 12000 b = 34728 c = -206 d = 416736000 +d is (a / b) + a = 102 b = 5745 c = -206 d = 0 +d is (a * b) + a = 12981 b = 78234 c = -206 d = 1015555554 +d is (a / b) + a = 1902 b = 17838 c = -206 d = 0 +d is (a * b) + a = 19409 b = 37482 c = -206 d = 727488138 +d is (a / b) + a = 10029 b = 17498 c = -206 d = 0 +d is (a * b) + a = 2149 b = 1347 c = -206 d = 2894703 +d is (a / b) + a = 12030 b = 3721 c = -206 d = 3 +d is (a * b) + a = 20099 b = 239 c = -206 d = 4803661 +d is (a / b) + a = 90 b = 923 c = -206 d = 0 +d is (a * b) + a = 10009 b = 1240 c = -206 d = 12411160 +d is (a / b) + a = 9345 b = 129 c = -206 d = 72 +d is (a * b) + a = 57483 b = 191 c = -206 d = 10979253 +d is (a / b) + a = 10903 b = 101 c = -206 d = 107 +d is (a * b) + a = 34329 b = 1010 c = -206 d = 34672290 +d is (a / b) + a = 32492 b = 190 c = -206 d = 171 +d is (a * b) + a = 1034 b = 19820 c = -206 d = 20493880 +d is (a / b) + a = 12000 b = 2349 c = -206 d = 5 +d is (a * b) + a = 102 b = 24039 c = -206 d = 2451978 +d is (a / b) + a = 12981 b = 34728 c = -206 d = 0 +d is (a * b) + a = 1902 b = 5745 c = -206 d = 10926990 +d is (a / b) + a = 19409 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10029 b = 17838 c = -206 d = 178897302 +d is (a / b) + a = 2149 b = 37482 c = -206 d = 0 +d is (a * b) + a = 12030 b = 17498 c = -206 d = 210500940 +d is (a / b) + a = 20099 b = 1347 c = -206 d = 14 +d is (a * b) + a = 90 b = 3721 c = -206 d = 334890 +d is (a / b) + a = 10009 b = 239 c = -206 d = 41 +d is (a * b) + a = 9345 b = 923 c = -206 d = 8625435 +d is (a / b) + a = 57483 b = 1240 c = -206 d = 46 +d is (a * b) + a = 10903 b = 129 c = -206 d = 1406487 +d is (a / b) + a = 34329 b = 191 c = -206 d = 179 +d is (a * b) + a = 32492 b = 101 c = -206 d = 3281692 +d is (a / b) + a = 1034 b = 1010 c = -206 d = 1 +d is (a * b) + a = 12000 b = 190 c = -206 d = 2280000 +d is (a / b) + a = 102 b = 19820 c = -206 d = 0 +d is (a * b) + a = 12981 b = 2349 c = -206 d = 30492369 +d is (a / b) + a = 1902 b = 24039 c = -206 d = 0 +d is (a * b) + a = 19409 b = 34728 c = -206 d = 674035752 +d is (a / b) + a = 10029 b = 5745 c = -206 d = 1 +d is (a * b) + a = 2149 b = 78234 c = -206 d = 168124866 +d is (a / b) + a = 12030 b = 17838 c = -206 d = 0 +d is (a * b) + a = 20099 b = 37482 c = -206 d = 753350718 +d is (a / b) + a = 90 b = 17498 c = -206 d = 0 +d is (a * b) + a = 10009 b = 1347 c = -206 d = 13482123 +d is (a / b) + a = 9345 b = 3721 c = -206 d = 2 +d is (a * b) + a = 57483 b = 239 c = -206 d = 13738437 +d is (a / b) + a = 10903 b = 923 c = -206 d = 11 +d is (a * b) + a = 34329 b = 1240 c = -206 d = 42567960 +d is (a / b) + a = 32492 b = 129 c = -206 d = 251 +d is (a * b) + a = 1034 b = 191 c = -206 d = 197494 +d is (a / b) + a = 12000 b = 101 c = -206 d = 118 +d is (a * b) + a = 102 b = 1010 c = -206 d = 103020 +d is (a / b) + a = 12981 b = 190 c = -206 d = 68 +d is (a * b) + a = 1902 b = 19820 c = -206 d = 37697640 +d is (a / b) + a = 19409 b = 2349 c = -206 d = 8 +d is (a * b) + a = 10029 b = 24039 c = -206 d = 241087131 +d is (a / b) + a = 2149 b = 34728 c = -206 d = 0 +d is (a * b) + a = 12030 b = 5745 c = -206 d = 69112350 +d is (a / b) + a = 20099 b = 78234 c = -206 d = 0 +d is (a * b) + a = 90 b = 17838 c = -206 d = 1605420 +d is (a / b) + a = 10009 b = 37482 c = -206 d = 0 +d is (a * b) + a = 9345 b = 17498 c = -206 d = 163518810 +d is (a / b) + a = 57483 b = 1347 c = -206 d = 42 +d is (a * b) + a = 10903 b = 3721 c = -206 d = 40570063 +d is (a / b) + a = 34329 b = 239 c = -206 d = 143 +d is (a * b) + a = 32492 b = 923 c = -206 d = 29990116 +d is (a / b) + a = 1034 b = 1240 c = -206 d = 0 +d is (a * b) + a = 12000 b = 129 c = -206 d = 1548000 +d is (a / b) + a = 102 b = 191 c = -206 d = 0 +d is (a * b) + a = 12981 b = 101 c = -206 d = 1311081 +d is (a / b) + a = 1902 b = 1010 c = -206 d = 1 +d is (a * b) + a = 19409 b = 190 c = -206 d = 3687710 +d is (a / b) + a = 10029 b = 19820 c = -206 d = 0 +d is (a * b) + a = 2149 b = 2349 c = -206 d = 5048001 +d is (a / b) + a = 12030 b = 24039 c = -206 d = 0 +d is (a * b) + a = 20099 b = 34728 c = -206 d = 697998072 +d is (a / b) + a = 90 b = 5745 c = -206 d = 0 +d is (a * b) + a = 10009 b = 78234 c = -206 d = 783044106 +d is (a / b) + a = 9345 b = 17838 c = -206 d = 0 +d is (a * b) + a = 57483 b = 37482 c = -206 d = -2140389490 +d is (a / b) + a = 10903 b = 17498 c = -206 d = 0 +d is (a * b) + a = 34329 b = 1347 c = -206 d = 46241163 +d is (a / b) + a = 32492 b = 3721 c = -206 d = 8 +d is (a * b) + a = 1034 b = 239 c = -206 d = 247126 +d is (a / b) + a = 12000 b = 923 c = -206 d = 13 +d is (a * b) + a = 102 b = 1240 c = -206 d = 126480 +d is (a / b) + a = 12981 b = 129 c = -206 d = 100 +d is (a * b) + a = 1902 b = 191 c = -206 d = 363282 +d is (a / b) + a = 19409 b = 101 c = -206 d = 192 +d is (a * b) + a = 10029 b = 1010 c = -206 d = 10129290 +d is (a / b) + a = 2149 b = 190 c = -206 d = 11 +d is (a * b) + a = 12030 b = 19820 c = -206 d = 238434600 +d is (a / b) + a = 20099 b = 2349 c = -206 d = 8 +d is (a * b) + a = 90 b = 24039 c = -206 d = 2163510 +d is (a / b) + a = 10009 b = 34728 c = -206 d = 0 +d is (a * b) + a = 9345 b = 5745 c = -206 d = 53687025 +d is (a / b) + a = 57483 b = 78234 c = -206 d = 0 +d is (a * b) + a = 10903 b = 17838 c = -206 d = 194487714 +d is (a / b) + a = 34329 b = 37482 c = -206 d = 0 +d is (a * b) + a = 32492 b = 17498 c = -206 d = 568545016 +d is (a / b) + a = 1034 b = 1347 c = -206 d = 0 +d is (a * b) + a = 12000 b = 3721 c = -206 d = 44652000 +d is (a / b) + a = 102 b = 239 c = -206 d = 0 +d is (a * b) + a = 12981 b = 923 c = -206 d = 11981463 +d is (a / b) + a = 1902 b = 1240 c = -206 d = 1 +d is (a * b) + a = 19409 b = 129 c = -206 d = 2503761 +d is (a / b) + a = 10029 b = 191 c = -206 d = 52 +d is (a * b) + a = 2149 b = 101 c = -206 d = 217049 +d is (a / b) + a = 12030 b = 1010 c = -206 d = 11 +d is (a * b) + a = 20099 b = 190 c = -206 d = 3818810 +d is (a / b) + a = 90 b = 19820 c = -206 d = 0 +d is (a * b) + a = 10009 b = 2349 c = -206 d = 23511141 +d is (a / b) + a = 9345 b = 24039 c = -206 d = 0 +d is (a * b) + a = 57483 b = 34728 c = -206 d = 1996269624 +d is (a / b) + a = 10903 b = 5745 c = -206 d = 1 +d is (a * b) + a = 34329 b = 78234 c = -206 d = -1609272310 +d is (a / b) + a = 32492 b = 17838 c = -206 d = 1 +d is (a * b) + a = 1034 b = 37482 c = -206 d = 38756388 +d is (a / b) + a = 12000 b = 17498 c = -206 d = 0 +d is (a * b) + a = 102 b = 1347 c = -206 d = 137394 +d is (a / b) + a = 12981 b = 3721 c = -206 d = 3 +d is (a * b) + a = 1902 b = 239 c = -206 d = 454578 +d is (a / b) + a = 19409 b = 923 c = -206 d = 21 +d is (a * b) + a = 10029 b = 1240 c = -206 d = 12435960 +d is (a / b) + a = 2149 b = 129 c = -206 d = 16 +d is (a * b) diff --git a/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc3/disaproc3.cpp b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc3/disaproc3.cpp new file mode 100644 index 000000000..5b2e021d4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc3/disaproc3.cpp @@ -0,0 +1,211 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + disaproc3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int val1[17] = { 34329, 32492, 1034, 12000, 102, 12981, 1902, 19409, + 10029, 2149, 12030, 20099, 90, 10009, 9345, 57483, + 10903 }; + +int val2[19] = { 239, 923, 1240, 129, 191, 101, 1010, 190, + 19820, 2349, 24039, 34728, 5745, 78234, 17838, 37482, + 17498, 1347, 3721 }; + +SC_MODULE( aproc1 ) +{ + SC_HAS_PROCESS( aproc1 ); + + const sc_signal& a; + const sc_signal& b; + sc_signal& c; + + aproc1( sc_module_name NAME, + + const sc_signal& A, + const sc_signal& B, + sc_signal& C ) + : a(A), b(B), c(C) + { + SC_THREAD( entry ); + sensitive << a.posedge_event(); + sensitive << b.negedge_event(); + } + void entry(); +}; + +void +aproc1::entry() +{ + wait(); + c = a + b; + cout << "c is (a + b)" << endl; + wait(); + c = a - b; + cout << "c is (a - b)" << endl; + wait(); + cout << name() << " is exiting." << endl; +} + + +SC_MODULE( aproc2 ) +{ + SC_HAS_PROCESS( aproc2 ); + + const sc_signal& a; + const sc_signal& b; + sc_signal& d; + + aproc2( sc_module_name NAME, + + const sc_signal& A, + const sc_signal& B, + sc_signal& D ) + : a(A), b(B), d(D) + { + SC_THREAD( entry ); + sensitive << a.negedge_event(); + sensitive << b.posedge_event(); + } + void entry(); +}; + +void +aproc2::entry() +{ + wait(); + int loops = 0; + while (true) { + d = a * b; + cout << "d is (a * b)" << endl; + wait(); + if ((bool) b == 0) { + d = a / (b + 1); + cout << "d is (a / (b + 1))" << endl; + } else { + d = a / b; + cout << "d is (a / b)" << endl; + } + wait(); + if (loops < 1) { + // sc_assert( a.sensitive_aprocs_neg.size() == 1 ); + // sc_assert( a.sensitive_aprocs.size() == 1 ); + // sc_assert( b.sensitive_aprocs_neg.size() == 1 ); + // sc_assert( b.sensitive_aprocs.size() == 1 ); + } + if (loops > 5) { + // /* By this time aproc1 should have died. */ + // sc_assert( a.sensitive_aprocs_neg.size() == 1 ); + // sc_assert( a.sensitive_aprocs.size() == 0 ); + // sc_assert( b.sensitive_aprocs_neg.size() == 0 ); + // sc_assert( b.sensitive_aprocs.size() == 1 ); + } + loops++; + } +} + +SC_MODULE( sync1 ) +{ + SC_HAS_PROCESS( sync1 ); + + sc_in_clk clk; + + sc_signal& a; + sc_signal& b; + const sc_signal& c; + const sc_signal& d; + + int count; + sync1( sc_module_name NAME, + sc_clock& CLK, + sc_signal& A, + sc_signal& B, + const sc_signal& C, + const sc_signal& D ) + : + a(A), b(B), c(C), d(D) + + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + count = 0; + } + void entry(); +}; + +void +sync1::entry() +{ + while (true) { + a = (val1[count % (sizeof(val1)/sizeof(val1[0]))] & 1); + b = (val2[count % (sizeof(val2)/sizeof(val2[0]))] & 1); + count++; + wait(); + cout << " a = " << a; + cout << " b = " << b; + cout << " c = " << c; + cout << " d = " << d << endl; + } +} + + + +int +sc_main(int argc, char** argv) +{ + sc_clock clk("clk"); + sc_signal a("a"); + sc_signal b("b"); + sc_signal c("c"); + sc_signal d("d"); + + a = 0; + b = 0; + c = 0; + d = 0; + + aproc1 p1("p1", a, b, c); + aproc2 p2("p2", a, b, d); + sync1 s1("s1", clk, a, b, c, d); + + // sc_assert( p1.aproc_handle->trigger_signals[0] == &a ); + // sc_assert( p1.aproc_handle->trigger_signals_edgy_neg[0] == &b ); + // sc_assert( p2.aproc_handle->trigger_signals[0] == &b ); + // sc_assert( p2.aproc_handle->trigger_signals_edgy_neg[0] == &a ); + + sc_start(2000, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc3/golden/disaproc3.log b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc3/golden/disaproc3.log new file mode 100644 index 000000000..5eb42bb25 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc3/golden/disaproc3.log @@ -0,0 +1,2799 @@ +SystemC Simulation +c is (a + b) +d is (a * b) + a = 1 b = 1 c = 1 d = 1 +d is (a / b) + a = 0 b = 1 c = 1 d = 0 +c is (a - b) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 +p1 is exiting. + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 0 c = 0 d = 0 +d is (a / b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 + a = 1 b = 0 c = 0 d = 1 +d is (a / (b + 1)) + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 + a = 0 b = 0 c = 0 d = 0 +d is (a * b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 +d is (a / b) + a = 0 b = 1 c = 0 d = 0 + a = 1 b = 1 c = 0 d = 0 + a = 1 b = 0 c = 0 d = 0 +d is (a * b) + a = 1 b = 1 c = 0 d = 1 +d is (a / b) diff --git a/src/systemc/tests/systemc/misc/unit/control/demo1/demo1.f b/src/systemc/tests/systemc/misc/unit/control/demo1/demo1.f new file mode 100644 index 000000000..a9e7a24d8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/demo1/demo1.f @@ -0,0 +1,3 @@ +demo1/main.cpp +demo1/proc1.cpp +demo1/proc2.cpp diff --git a/src/systemc/tests/systemc/misc/unit/control/demo1/golden/demo1.log b/src/systemc/tests/systemc/misc/unit/control/demo1/golden/demo1.log new file mode 100644 index 000000000..bbcbfa1b2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/demo1/golden/demo1.log @@ -0,0 +1,11 @@ +SystemC Simulation +Ready = False +Ack = False +Ready = True +Ack = True +Ready = False +Ack = False +Ready = True +Ack = True +Ready = False +Ack = False diff --git a/src/systemc/tests/systemc/misc/unit/control/demo1/main.cpp b/src/systemc/tests/systemc/misc/unit/control/demo1/main.cpp new file mode 100644 index 000000000..386c9dec7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/demo1/main.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for handshaking simulation */ + +#include "systemc.h" +#include "proc1.h" +#include "proc2.h" + +int sc_main(int ac, char *av[]) +{ + sc_signal data_ready("Ready"); + sc_signal data_ack("Ack"); + + sc_clock clock("CLOCK", 10, SC_NS, 0.5, 0.0, SC_NS); + + proc1 Master("MasterProcess", clock, data_ack, data_ready); + proc2 Slave("SlaveProcess", clock, data_ready, data_ack); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/control/demo1/proc1.cpp b/src/systemc/tests/systemc/misc/unit/control/demo1/proc1.cpp new file mode 100644 index 000000000..6c0fb35fb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/demo1/proc1.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc1.cc */ +/* This is the implementation file for synchronous process `proc1' */ + +#include "systemc.h" +#include "proc1.h" + +void proc1::entry() +{ + data_ready.write(false); + wait(); + cout << "Ready \t = False" << endl; + + while(true) { + data_ready.write(true); + do { wait(); } while (data_ack != true); + cout << "Ack \t = True" << endl; + + data_ready.write(false); + do { wait(); } while (data_ack != false); + cout << "Ack \t = False" << endl; + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/unit/control/demo1/proc1.h b/src/systemc/tests/systemc/misc/unit/control/demo1/proc1.h new file mode 100644 index 000000000..873170e65 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/demo1/proc1.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc1.h */ +/* This is the interface file for synchronous process `proc1' */ + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + const sc_signal& data_ack; //input + sc_signal& data_ready; //output + + //Constructor + proc1(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& DATA_ACK, + sc_signal& DATA_READY) + : data_ack(DATA_ACK), data_ready(DATA_READY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + diff --git a/src/systemc/tests/systemc/misc/unit/control/demo1/proc2.cpp b/src/systemc/tests/systemc/misc/unit/control/demo1/proc2.cpp new file mode 100644 index 000000000..ef0c0e004 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/demo1/proc2.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc2.cc */ +/* This is the implementation file for synchronous process `proc2' */ + +#include "systemc.h" +#include "proc2.h" + +void proc2::entry() +{ + data_ack.write(false); + wait(); + cout << "Ack \t = False" << endl; + + while (true) { + do { wait(); } while (data_ready != true); + data_ack.write(true); + cout << "Ready \t = True" << endl; + + do { wait(); } while (data_ready != false); + data_ack.write(false); + cout << "Ready \t = False" << endl; + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/unit/control/demo1/proc2.h b/src/systemc/tests/systemc/misc/unit/control/demo1/proc2.h new file mode 100644 index 000000000..1c6ad7c77 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/demo1/proc2.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc2.h */ +/* This is the interface file for synchronous process `proc2' */ + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + const sc_signal& data_ready; //input + sc_signal& data_ack; //output + + //Constructor + proc2(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& DATA_READY, + sc_signal& DATA_ACK) + : data_ready(DATA_READY), data_ack(DATA_ACK) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + diff --git a/src/systemc/tests/systemc/misc/unit/control/posedge/golden/posedge.log b/src/systemc/tests/systemc/misc/unit/control/posedge/golden/posedge.log new file mode 100644 index 000000000..38978c665 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/posedge/golden/posedge.log @@ -0,0 +1,9 @@ +SystemC Simulation +10 ns : ready = 0 (RDY) +30 ns : ready = 0 (RDY) +40 ns : POSEDGE READY DETECTED +50 ns : ready = 1 (RDY) +70 ns : ready = 0 (RDY) +80 ns : POSEDGE READY DETECTED +90 ns : ready = 1 (RDY) +Terminating process TB1.RD1.entry diff --git a/src/systemc/tests/systemc/misc/unit/control/posedge/posedge.cpp b/src/systemc/tests/systemc/misc/unit/control/posedge/posedge.cpp new file mode 100644 index 000000000..89968ae01 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/posedge/posedge.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + posedge.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "rdy.h" +#include "stim.h" +#include "tb.h" /** Definition of testbench Structure **/ + +/******************************************************************************/ +/*************************** Main Function *********************************/ +/******************************************************************************/ +int sc_main(int ac, char *av[]) +{ + sc_clock clk( "CLK", 20, SC_NS, 0.5, 0, SC_NS); // Clock function + testbench tb1("TB1", clk); // Testbench Instantiation + sc_start( 120, SC_NS ); // Simulation control + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/control/posedge/rdy.h b/src/systemc/tests/systemc/misc/unit/control/posedge/rdy.h new file mode 100644 index 000000000..d9c988538 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/posedge/rdy.h @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + rdy.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +/******************************************************************************/ +/*************************** rdy Function **********************/ +/******************************************************************************/ + +SC_MODULE( RDY ) +{ + SC_HAS_PROCESS( RDY ); + + sc_in_clk clk; + + /*** Input and Output Ports ***/ + sc_signal& data; + + /*** Constructor ***/ + RDY ( sc_module_name NAME, + sc_clock& TICK_N, + sc_signal& DATA ) + + : + data (DATA) + + { + clk (TICK_N); + SC_CTHREAD( entry, clk.neg() ); + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +RDY::entry() +{ + // IMPLICIT wait(); AT FIRST NEGEDGE + cout << sc_time_stamp() << " : " // Time 10 + << "ready = " << data + << "\t\t (RDY) " + << endl; + data.write(0); + + wait(); // Time 30 + cout << sc_time_stamp() << " : " + << "ready = " << data + << "\t\t (RDY) " + << endl; + data.write(1); + + wait(); // Time 50 + cout << sc_time_stamp() << " : " + << "ready = " << data + << "\t\t (RDY) " + << endl; + data.write(0); + + wait(); // Time 70 + cout << sc_time_stamp() << " : " + << "ready = " << data + << "\t\t (RDY) " + << endl; + data.write(1); + + wait(); // Time 90 + cout << sc_time_stamp() << " : " + << "ready = " << data + << "\t\t (RDY) " + << endl; + + halt(); +} diff --git a/src/systemc/tests/systemc/misc/unit/control/posedge/stim.h b/src/systemc/tests/systemc/misc/unit/control/posedge/stim.h new file mode 100644 index 000000000..18e2dd617 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/posedge/stim.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stim.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +/******************************************************************************/ +/*************************** stim Function **********************/ +/******************************************************************************/ + +SC_MODULE( STIM ) +{ + SC_HAS_PROCESS( STIM ); + + sc_in_clk clk; + + /*** Input and Output Ports ***/ + const sc_signal& data; + + /*** Constructor ***/ + STIM ( sc_module_name NAME, + sc_clock& TICK_P, + const sc_signal& DATA ) + + : + data (DATA) + + { + clk (TICK_P); + SC_CTHREAD( entry, clk.pos() ); + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +STIM::entry() +{ + while(true) { + at_posedge(data); + cout << sc_time_stamp() << " : " + << "POSEDGE READY DETECTED" + << endl; + } +} diff --git a/src/systemc/tests/systemc/misc/unit/control/posedge/tb.h b/src/systemc/tests/systemc/misc/unit/control/posedge/tb.h new file mode 100644 index 000000000..095450002 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/posedge/tb.h @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** Testbench Function **********************/ +/******************************************************************************/ + +SC_MODULE( testbench ) +{ + sc_signal ready; + STIM st1; + RDY rd1; + + /*** Constructor ***/ + testbench ( sc_module_name NAME, + sc_clock& TICK ) + + : sc_module(), + st1 ("ST1", TICK, ready), + rd1 ("RD1", TICK, ready) + { + end_module(); + } +}; diff --git a/src/systemc/tests/systemc/misc/unit/control/timing/golden/timing.log b/src/systemc/tests/systemc/misc/unit/control/timing/golden/timing.log new file mode 100644 index 000000000..fcf7ffb4a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/timing/golden/timing.log @@ -0,0 +1,33 @@ +SystemC Simulation + +START OF SIM -- CLOCK AT NEGEDGE (10,30,50,...) +10 ns : ready[S] = 0 a[V] = 0 + a = 0 +10 ns : ready[S] = 0 a[V] = 0 + ready = 0 +10 ns : ready[S] = 0 a[V] = 0 + +CLK +30 ns : ready[S] = 0 a[V] = 0 + a = 1 +30 ns : ready[S] = 0 a[V] = 1 + ready = 1 +30 ns : ready[S] = 0 a[V] = 1 + +CLK +50 ns : ready[S] = 1 a[V] = 1 + a = 0 +50 ns : ready[S] = 1 a[V] = 0 + ready = 0 +50 ns : ready[S] = 1 a[V] = 0 + +CLK +70 ns : ready[S] = 0 a[V] = 0 + a = 1 +70 ns : ready[S] = 0 a[V] = 1 + ready = 1 +70 ns : ready[S] = 0 a[V] = 1 + +CLK +90 ns : ready[S] = 1 a[V] = 1 +Terminating process TB1.RD1.entry diff --git a/src/systemc/tests/systemc/misc/unit/control/timing/rdy.h b/src/systemc/tests/systemc/misc/unit/control/timing/rdy.h new file mode 100644 index 000000000..a4e825581 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/timing/rdy.h @@ -0,0 +1,148 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + rdy.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +/******************************************************************************/ +/*************************** rdy Function **********************/ +/******************************************************************************/ + +SC_MODULE( RDY ) +{ + SC_HAS_PROCESS( RDY ); + + sc_in_clk clk; + + /*** Input and Output Ports ***/ + sc_signal& data; + + /*** Constructor ***/ + RDY ( sc_module_name NAME, + sc_clock& TICK_N, + sc_signal& DATA ) + + : + data (DATA) + + { + clk (TICK_N); + SC_CTHREAD( entry, clk.neg() ); + } + + /*** Call to Process Functionality ***/ + void entry(); + +}; + +void +RDY::entry() +{ + // int a; + int a = 0; + + cout << "\nSTART OF SIM -- CLOCK AT NEGEDGE (10,30,50,...) " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + + a = 0; cout << "\t\t\t a = 0 " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + data.write(0); cout << " ready = 0 " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + wait(); cout << "\nCLK " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + + a = 1; cout << "\t\t a = 1 " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + data.write(1); cout << " ready = 1 " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + wait(); cout << "\nCLK " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + + a = 0; cout << "\t\t a = 0 " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + data.write(0); cout << " ready = 0 " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + wait(); cout << "\nCLK " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + + a = 1; cout << "\t\t a = 1 " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + data.write(1); cout << " ready = 1 " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + wait(); cout << "\nCLK " << endl; + cout << sc_time_stamp() << " : " + << " ready[S] = " << data + << " a[V] = " << a + << endl; + + halt(); +} diff --git a/src/systemc/tests/systemc/misc/unit/control/timing/tb.h b/src/systemc/tests/systemc/misc/unit/control/timing/tb.h new file mode 100644 index 000000000..08790979f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/timing/tb.h @@ -0,0 +1,53 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** Testbench Function **********************/ +/******************************************************************************/ + +SC_MODULE( testbench ) +{ + sc_signal ready; + RDY rd1; + + testbench ( sc_module_name NAME, + sc_clock& TICK_N ) + + : ready ("ready"), + rd1 ("RD1", TICK_N, ready) + {} +}; diff --git a/src/systemc/tests/systemc/misc/unit/control/timing/timing.cpp b/src/systemc/tests/systemc/misc/unit/control/timing/timing.cpp new file mode 100644 index 000000000..db47e9b6e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/timing/timing.cpp @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + timing.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "rdy.h" +#include "tb.h" /** Definition of testbench Structure **/ + +int sc_main(int ac, char *av[]) +{ + sc_clock clk( "CLK", 20, SC_NS, 0.5, 0, SC_NS); // Clock function + testbench tb1("TB1", clk); // Testbench Instantiation + sc_start( 120, SC_NS ); // Simulation control + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/control/wait/golden/wait.log b/src/systemc/tests/systemc/misc/unit/control/wait/golden/wait.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/wait/golden/wait.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/unit/control/wait/wait.cpp b/src/systemc/tests/systemc/misc/unit/control/wait/wait.cpp new file mode 100644 index 000000000..bc3044caa --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/wait/wait.cpp @@ -0,0 +1,153 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + wait.cpp -- + + Original Author: Daniel Aarno, Intel, Corp 2015-07-23 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +using sc_core::sc_time; +using sc_core::SC_US; + +namespace { +int first_line = 0; + +bool endsWith(const std::string &str, const std::string &ending) { + if (ending.size() > str.size()) { + return false; + } + return std::equal(ending.rbegin(), ending.rend(), str.rbegin()); +} + +bool waitFunIsTrue() { + if (sc_core::sc_time_stamp() < sc_time(2000, SC_US)) { + return false; + } + + if (sc_core::sc_time_stamp() < sc_time(3000, SC_US)) { + sc_time delay(10, SC_US); + SC_WAITN(delay); + return false; + } + + if (sc_core::sc_time_stamp() < sc_time(4000, SC_US)) { + return false; + } + + return true; +} + +SC_MODULE(Wait) { + SC_CTOR(Wait) : clk( "clk", 10, SC_US, 0.5, 100, SC_US) { + SC_THREAD(thread); + sensitive << clk; + } + + void thread() { + sc_time delay(10, SC_US); + wait(delay); // 1st + + first_line = __LINE__ + 1; + SC_WAITN(delay); // Wait some time + wait(delay); // 2nd + + SC_WAIT(); // Wait for clk + wait(delay); // 3rd + + SC_WAIT_UNTIL(sc_core::sc_time_stamp() > sc_time(1000, SC_US)); + wait(delay); // 4th + + SC_WAIT_UNTIL(waitFunIsTrue()); + } + + sc_core::sc_clock clk; +}; + +} // namespace + +int sc_main(int argc, char ** argv) { + Wait w("dut"); + + sc_core::sc_process_handle hnd( sc_core::sc_find_object("dut.thread") ); + const sc_core::sc_process_b *thread + = dynamic_cast(hnd.get_process_object()); + sc_assert(hnd.valid() && thread); + + sc_assert(thread->file == NULL); // 1st wait(delay) + sc_assert(thread->lineno == 0); + sc_core::sc_start(sc_time(15, SC_US)); + + int lineno = first_line; + sc_assert(endsWith(thread->file, "wait.cpp")); // SC_WAITN + sc_assert(thread->lineno == lineno); + sc_core::sc_start(sc_time(10, SC_US)); + sc_assert(thread->file == NULL); // 2nd wait(delay) + sc_assert(thread->lineno == 0); + sc_core::sc_start(sc_time(10, SC_US)); + + lineno += 3; + sc_assert(endsWith(thread->file, "wait.cpp")); // SC_WAIT + sc_assert(thread->lineno == lineno); + sc_core::sc_start(sc_time(70, SC_US)); + sc_assert(thread->file == NULL); // 3rd wait(delay) + sc_assert(thread->lineno == 0); + sc_core::sc_start(sc_time(10, SC_US)); + + lineno += 3; + sc_assert(endsWith(thread->file, "wait.cpp")); // SC_WAIT_UNTIL + sc_assert(thread->lineno == lineno); + sc_core::sc_start(sc_time(900, SC_US)); + sc_assert(thread->file == NULL); // 4th wait(delay) + sc_assert(thread->lineno == 0); + + // Ensure that SC_WAIT_UNTIL can handle nested wait calls + sc_core::sc_start(sc_time(10, SC_US)); + lineno += 3; + sc_assert(endsWith(thread->file, "wait.cpp")); // 2nd SC_WAIT_UNTIL + sc_assert(thread->lineno == lineno); + sc_core::sc_start(sc_time(980, SC_US)); // time should be 2005 + sc_assert(endsWith(thread->file, "wait.cpp")); // SC_WAITN in waitFunIsTrue + sc_assert(thread->lineno == 60); + sc_core::sc_start(sc_time(95, SC_US)); + sc_assert(endsWith(thread->file, "wait.cpp")); + sc_assert(thread->lineno == 60); + sc_core::sc_start(sc_time(910, SC_US)); + sc_assert(endsWith(thread->file, "wait.cpp")); // 2nd SC_WAIT_UNTIL + sc_assert(thread->lineno == lineno); + sc_core::sc_start(sc_time(1000, SC_US)); + sc_assert(thread->file == NULL); // done + sc_assert(thread->lineno == 0); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/control/wait_until/golden/waiting.log b/src/systemc/tests/systemc/misc/unit/control/wait_until/golden/waiting.log new file mode 100644 index 000000000..680547393 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/wait_until/golden/waiting.log @@ -0,0 +1,8 @@ +SystemC Simulation +20 ns : WRITING ready = 1 +20 ns : READY = 1 DETECTED +40 ns : WRITING ready = 0 +60 ns : WRITING ready = 1 +60 ns : READY = 1 DETECTED +80 ns : READY = 1 DETECTED +100 ns : READY = 1 DETECTED diff --git a/src/systemc/tests/systemc/misc/unit/control/wait_until/rdy_gen.h b/src/systemc/tests/systemc/misc/unit/control/wait_until/rdy_gen.h new file mode 100644 index 000000000..70d10e356 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/wait_until/rdy_gen.h @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + rdy_gen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** RDY_GEN **********************/ +/******************************************************************************/ + +SC_MODULE( RDY_GEN ) +{ + SC_HAS_PROCESS( RDY_GEN ); + + sc_in_clk clk; + + sc_signal& ready; // Output + + RDY_GEN ( sc_module_name NAME, + sc_clock& TICK_P, + sc_signal& READY ) + + : + ready (READY) + + { + clk (TICK_P); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); + +}; + +void +RDY_GEN::entry() +{ + ready.write(1); + wait(); + cout << sc_time_stamp() << " : " + << "WRITING ready = 1" << endl; + + ready.write(0); + wait(); + cout << sc_time_stamp() << " : " + << "WRITING ready = 0" << endl; + + ready.write(1); + wait(); + cout << sc_time_stamp() << " : " + << "WRITING ready = 1" << endl; +} diff --git a/src/systemc/tests/systemc/misc/unit/control/wait_until/tb.h b/src/systemc/tests/systemc/misc/unit/control/wait_until/tb.h new file mode 100644 index 000000000..cf43c63e9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/wait_until/tb.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** Testbench Function **********************/ +/******************************************************************************/ + +SC_MODULE( testbench ) +{ + sc_signal ready; + RDY_GEN rd1; + WAIT_RDY wt1; + + testbench ( sc_module_name NAME, + sc_clock& TICK_P ) + + : ready ("ready"), + rd1 ("RD1", TICK_P, ready), + wt1 ("WT1", TICK_P, ready) + {} +}; diff --git a/src/systemc/tests/systemc/misc/unit/control/wait_until/wait_rdy.h b/src/systemc/tests/systemc/misc/unit/control/wait_until/wait_rdy.h new file mode 100644 index 000000000..bfd36bbac --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/wait_until/wait_rdy.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + wait_rdy.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** WAIT_RDY **********************/ +/******************************************************************************/ + +SC_MODULE( WAIT_RDY ) +{ + SC_HAS_PROCESS( WAIT_RDY ); + + sc_in_clk clk; + + const sc_signal& ready; // Input + + WAIT_RDY ( sc_module_name NAME, + sc_clock& TICK_P, + const sc_signal& READY ) + + : + ready (READY) + + { + clk (TICK_P); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); + +}; + +void +WAIT_RDY::entry() +{ + while (true) { + do { wait(); } while (ready != 1); + + cout << sc_time_stamp() << " : " + << "READY = 1 DETECTED" << endl; + } +} diff --git a/src/systemc/tests/systemc/misc/unit/control/wait_until/waiting.cpp b/src/systemc/tests/systemc/misc/unit/control/wait_until/waiting.cpp new file mode 100644 index 000000000..8eaa80da9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/control/wait_until/waiting.cpp @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + waiting.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "rdy_gen.h" +#include "wait_rdy.h" +#include "tb.h" /** Definition of testbench Structure **/ + +int +sc_main(int ac, char *av[]) +{ + sc_clock clk( "CLK", 20, SC_NS, 0.5, 0, SC_NS); // Clock function + testbench tb1("TB1", clk); // Testbench Instantiation + + sc_start( 120, SC_NS ); // Simulation control + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/README b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/README new file mode 100644 index 000000000..6d77c7cbb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/README @@ -0,0 +1,9 @@ +bits_to_bits 7-bit = 6-bit + 6-bit +lost_carry 6-bit = 6-bit + 6-bit +extension 9-bit = 6-bit + 6-bit +truncation 4-bit = 6-bit + 6-bit + +promote 7-bit = 4-bit + 6-bit +promote_lost_carry 6-bit = 4-bit + 6-bit +promote_extension 9-bit = 4-bit + 6-bit +promote_truncation 4-bit = 4-bit + 6-bit diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/bits_to_bits.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/bits_to_bits.f new file mode 100644 index 000000000..9fcbb2977 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/bits_to_bits.f @@ -0,0 +1,3 @@ +bits_to_bits/datawidth.cpp +bits_to_bits/stimgen.cpp +bits_to_bits/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/common.h new file mode 100644 index 000000000..e56acdb9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<6> bool_vector6; +typedef sc_bv<7> bool_vector7; + +typedef sc_signal signal_bool_vector6; +typedef sc_signal signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/datawidth.cpp new file mode 100644 index 000000000..e6a4ae2c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/datawidth.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector6 tmp_a; + bool_vector6 tmp_b; + bool_vector7 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + + tmp_result = tmp_a.to_int() + tmp_b.to_int(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/datawidth.h new file mode 100644 index 000000000..df7ca5b2e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector7& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector7& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/golden/bits_to_bits.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/golden/bits_to_bits.log new file mode 100644 index 000000000..4bf4390b9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/golden/bits_to_bits.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + -32 = -32 (1100000) +0 + -31 = -31 (1100001) +0 + -30 = -30 (1100010) +0 + -29 = -29 (1100011) +0 + -28 = -28 (1100100) +0 + -27 = -27 (1100101) +0 + -26 = -26 (1100110) +0 + -25 = -25 (1100111) +0 + -24 = -24 (1101000) +0 + -23 = -23 (1101001) +0 + -22 = -22 (1101010) +0 + -21 = -21 (1101011) +0 + -20 = -20 (1101100) +0 + -19 = -19 (1101101) +0 + -18 = -18 (1101110) +0 + -17 = -17 (1101111) +0 + -16 = -16 (1110000) +0 + -15 = -15 (1110001) +0 + -14 = -14 (1110010) +0 + -13 = -13 (1110011) +0 + -12 = -12 (1110100) +0 + -11 = -11 (1110101) +0 + -10 = -10 (1110110) +0 + -9 = -9 (1110111) +0 + -8 = -8 (1111000) +0 + -7 = -7 (1111001) +0 + -6 = -6 (1111010) +0 + -5 = -5 (1111011) +0 + -4 = -4 (1111100) +0 + -3 = -3 (1111101) +0 + -2 = -2 (1111110) +0 + -1 = -1 (1111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + -32 = -31 (1100001) +1 + -31 = -30 (1100010) +1 + -30 = -29 (1100011) +1 + -29 = -28 (1100100) +1 + -28 = -27 (1100101) +1 + -27 = -26 (1100110) +1 + -26 = -25 (1100111) +1 + -25 = -24 (1101000) +1 + -24 = -23 (1101001) +1 + -23 = -22 (1101010) +1 + -22 = -21 (1101011) +1 + -21 = -20 (1101100) +1 + -20 = -19 (1101101) +1 + -19 = -18 (1101110) +1 + -18 = -17 (1101111) +1 + -17 = -16 (1110000) +1 + -16 = -15 (1110001) +1 + -15 = -14 (1110010) +1 + -14 = -13 (1110011) +1 + -13 = -12 (1110100) +1 + -12 = -11 (1110101) +1 + -11 = -10 (1110110) +1 + -10 = -9 (1110111) +1 + -9 = -8 (1111000) +1 + -8 = -7 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15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + -32 = -29 (1100011) +3 + -31 = -28 (1100100) +3 + -30 = -27 (1100101) +3 + -29 = -26 (1100110) +3 + -28 = -25 (1100111) +3 + -27 = -24 (1101000) +3 + -26 = -23 (1101001) +3 + -25 = -22 (1101010) +3 + -24 = -21 (1101011) +3 + -23 = -20 (1101100) +3 + -22 = -19 (1101101) +3 + -21 = -18 (1101110) +3 + -20 = -17 (1101111) +3 + -19 = -16 (1110000) +3 + -18 = -15 (1110001) +3 + -17 = -14 (1110010) +3 + -16 = -13 (1110011) +3 + -15 = -12 (1110100) +3 + -14 = -11 (1110101) +3 + -13 = -10 (1110110) +3 + -12 = -9 (1110111) +3 + -11 = -8 (1111000) +3 + -10 = -7 (1111001) +3 + -9 = -6 (1111010) +3 + -8 = -5 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= 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + -32 = -27 (1100101) +5 + -31 = -26 (1100110) +5 + -30 = -25 (1100111) +5 + -29 = -24 (1101000) +5 + -28 = -23 (1101001) +5 + -27 = -22 (1101010) +5 + -26 = -21 (1101011) +5 + -25 = -20 (1101100) +5 + -24 = -19 (1101101) +5 + -23 = -18 (1101110) +5 + -22 = -17 (1101111) +5 + -21 = -16 (1110000) +5 + -20 = -15 (1110001) +5 + -19 = -14 (1110010) +5 + -18 = -13 (1110011) +5 + -17 = -12 (1110100) +5 + -16 = -11 (1110101) +5 + -15 = -10 (1110110) +5 + -14 = -9 (1110111) +5 + -13 = -8 (1111000) +5 + -12 = -7 (1111001) +5 + -11 = -6 (1111010) +5 + -10 = -5 (1111011) +5 + -9 = -4 (1111100) +5 + -8 = -3 (1111101) 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(0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + -32 = -25 (1100111) +7 + -31 = -24 (1101000) +7 + -30 = -23 (1101001) +7 + -29 = -22 (1101010) +7 + -28 = -21 (1101011) +7 + -27 = -20 (1101100) +7 + -26 = -19 (1101101) +7 + -25 = -18 (1101110) +7 + -24 = -17 (1101111) +7 + -23 = -16 (1110000) +7 + -22 = -15 (1110001) +7 + -21 = -14 (1110010) +7 + -20 = -13 (1110011) +7 + -19 = -12 (1110100) +7 + -18 = -11 (1110101) +7 + -17 = -10 (1110110) +7 + -16 = -9 (1110111) +7 + -15 = -8 (1111000) +7 + -14 = -7 (1111001) +7 + -13 = -6 (1111010) +7 + -12 = -5 (1111011) +7 + -11 = -4 (1111100) +7 + -10 = -3 (1111101) +7 + -9 = -2 (1111110) +7 + -8 = -1 (1111111) +7 + -7 = 0 (0000000) +7 + -6 = 1 (0000001) +7 + -5 = 2 (0000010) +7 + -4 = 3 (0000011) +7 + -3 = 4 (0000100) +7 + -2 = 5 (0000101) +7 + -1 = 6 (0000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + -32 = -24 (1101000) +8 + -31 = -23 (1101001) +8 + -30 = -22 (1101010) +8 + -29 = -21 (1101011) +8 + -28 = -20 (1101100) +8 + -27 = -19 (1101101) +8 + -26 = -18 (1101110) +8 + -25 = -17 (1101111) +8 + -24 = -16 (1110000) +8 + -23 = -15 (1110001) +8 + -22 = -14 (1110010) +8 + -21 = -13 (1110011) +8 + -20 = -12 (1110100) +8 + -19 = -11 (1110101) +8 + -18 = -10 (1110110) +8 + -17 = -9 (1110111) +8 + -16 = -8 (1111000) +8 + -15 = -7 (1111001) +8 + -14 = -6 (1111010) +8 + -13 = -5 (1111011) +8 + -12 = -4 (1111100) +8 + -11 = -3 (1111101) +8 + -10 = -2 (1111110) +8 + -9 = -1 (1111111) +8 + -8 = 0 (0000000) +8 + -7 = 1 (0000001) +8 + -6 = 2 (0000010) +8 + -5 = 3 (0000011) +8 + -4 = 4 (0000100) +8 + -3 = 5 (0000101) +8 + -2 = 6 (0000110) +8 + -1 = 7 (0000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + -32 = -23 (1101001) +9 + -31 = -22 (1101010) +9 + -30 = -21 (1101011) +9 + -29 = -20 (1101100) +9 + -28 = -19 (1101101) +9 + -27 = -18 (1101110) +9 + -26 = -17 (1101111) +9 + -25 = -16 (1110000) +9 + -24 = -15 (1110001) +9 + -23 = -14 (1110010) +9 + -22 = -13 (1110011) +9 + -21 = -12 (1110100) +9 + -20 = -11 (1110101) +9 + -19 = -10 (1110110) +9 + -18 = -9 (1110111) +9 + -17 = -8 (1111000) +9 + -16 = -7 (1111001) +9 + -15 = -6 (1111010) +9 + -14 = -5 (1111011) +9 + -13 = -4 (1111100) +9 + -12 = -3 (1111101) +9 + -11 = -2 (1111110) +9 + -10 = -1 (1111111) +9 + -9 = 0 (0000000) +9 + -8 = 1 (0000001) +9 + -7 = 2 (0000010) +9 + -6 = 3 (0000011) +9 + -5 = 4 (0000100) +9 + -4 = 5 (0000101) +9 + -3 = 6 (0000110) +9 + -2 = 7 (0000111) +9 + -1 = 8 (0001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + -32 = -22 (1101010) +10 + -31 = -21 (1101011) +10 + -30 = -20 (1101100) +10 + -29 = -19 (1101101) +10 + -28 = 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(0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + -32 = -21 (1101011) +11 + -31 = -20 (1101100) +11 + -30 = -19 (1101101) +11 + -29 = -18 (1101110) +11 + -28 = -17 (1101111) +11 + -27 = -16 (1110000) +11 + -26 = -15 (1110001) +11 + -25 = -14 (1110010) +11 + -24 = -13 (1110011) +11 + -23 = -12 (1110100) +11 + -22 = -11 (1110101) +11 + -21 = -10 (1110110) +11 + -20 = -9 (1110111) +11 + -19 = -8 (1111000) +11 + -18 = -7 (1111001) +11 + -17 = -6 (1111010) +11 + -16 = -5 (1111011) +11 + -15 = -4 (1111100) +11 + -14 = -3 (1111101) +11 + -13 = -2 (1111110) +11 + -12 = -1 (1111111) +11 + -11 = 0 (0000000) +11 + -10 = 1 (0000001) +11 + -9 = 2 (0000010) +11 + -8 = 3 (0000011) +11 + -7 = 4 (0000100) +11 + -6 = 5 (0000101) +11 + -5 = 6 (0000110) +11 + -4 = 7 (0000111) +11 + -3 = 8 (0001000) +11 + -2 = 9 (0001001) +11 + -1 = 10 (0001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + -32 = -20 (1101100) +12 + -31 = -19 (1101101) +12 + -30 = -18 (1101110) +12 + -29 = -17 (1101111) +12 + -28 = -16 (1110000) +12 + -27 = -15 (1110001) +12 + -26 = -14 (1110010) +12 + -25 = -13 (1110011) +12 + -24 = -12 (1110100) +12 + -23 = -11 (1110101) +12 + -22 = -10 (1110110) +12 + -21 = -9 (1110111) +12 + -20 = -8 (1111000) +12 + -19 = -7 (1111001) +12 + -18 = -6 (1111010) +12 + -17 = -5 (1111011) +12 + -16 = -4 (1111100) +12 + -15 = -3 (1111101) +12 + -14 = -2 (1111110) +12 + -13 = -1 (1111111) +12 + -12 = 0 (0000000) +12 + -11 = 1 (0000001) +12 + -10 = 2 (0000010) +12 + -9 = 3 (0000011) +12 + -8 = 4 (0000100) +12 + -7 = 5 (0000101) +12 + -6 = 6 (0000110) +12 + -5 = 7 (0000111) +12 + -4 = 8 (0001000) +12 + -3 = 9 (0001001) +12 + -2 = 10 (0001010) +12 + -1 = 11 (0001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + -32 = -19 (1101101) +13 + -31 = -18 (1101110) +13 + -30 = -17 (1101111) +13 + -29 = -16 (1110000) +13 + -28 = -15 (1110001) +13 + -27 = -14 (1110010) +13 + -26 = -13 (1110011) +13 + -25 = -12 (1110100) +13 + -24 = -11 (1110101) +13 + -23 = -10 (1110110) +13 + -22 = -9 (1110111) +13 + -21 = -8 (1111000) +13 + -20 = -7 (1111001) +13 + -19 = -6 (1111010) +13 + -18 = -5 (1111011) +13 + -17 = -4 (1111100) +13 + -16 = -3 (1111101) +13 + -15 = -2 (1111110) +13 + -14 = -1 (1111111) +13 + -13 = 0 (0000000) +13 + -12 = 1 (0000001) +13 + -11 = 2 (0000010) +13 + -10 = 3 (0000011) +13 + -9 = 4 (0000100) +13 + -8 = 5 (0000101) +13 + -7 = 6 (0000110) +13 + -6 = 7 (0000111) +13 + -5 = 8 (0001000) +13 + -4 = 9 (0001001) +13 + -3 = 10 (0001010) +13 + -2 = 11 (0001011) +13 + -1 = 12 (0001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + -32 = -18 (1101110) +14 + -31 = -17 (1101111) +14 + -30 = -16 (1110000) +14 + -29 = -15 (1110001) +14 + -28 = -14 (1110010) +14 + -27 = -13 (1110011) +14 + -26 = -12 (1110100) +14 + -25 = -11 (1110101) +14 + -24 = -10 (1110110) +14 + -23 = -9 (1110111) +14 + -22 = -8 (1111000) +14 + -21 = -7 (1111001) +14 + -20 = -6 (1111010) +14 + -19 = -5 (1111011) +14 + -18 = -4 (1111100) +14 + -17 = -3 (1111101) +14 + -16 = -2 (1111110) +14 + -15 = -1 (1111111) +14 + -14 = 0 (0000000) +14 + -13 = 1 (0000001) +14 + -12 = 2 (0000010) +14 + -11 = 3 (0000011) +14 + -10 = 4 (0000100) +14 + -9 = 5 (0000101) +14 + -8 = 6 (0000110) +14 + -7 = 7 (0000111) +14 + -6 = 8 (0001000) +14 + -5 = 9 (0001001) +14 + -4 = 10 (0001010) +14 + -3 = 11 (0001011) +14 + -2 = 12 (0001100) +14 + -1 = 13 (0001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + -32 = -17 (1101111) +15 + -31 = -16 (1110000) +15 + -30 = -15 (1110001) +15 + -29 = -14 (1110010) +15 + -28 = -13 (1110011) +15 + -27 = -12 (1110100) +15 + -26 = -11 (1110101) +15 + -25 = -10 (1110110) +15 + -24 = -9 (1110111) +15 + -23 = -8 (1111000) +15 + -22 = -7 (1111001) +15 + -21 = -6 (1111010) +15 + -20 = -5 (1111011) +15 + -19 = -4 (1111100) +15 + -18 = -3 (1111101) +15 + -17 = -2 (1111110) +15 + -16 = -1 (1111111) +15 + -15 = 0 (0000000) +15 + -14 = 1 (0000001) +15 + -13 = 2 (0000010) +15 + -12 = 3 (0000011) +15 + -11 = 4 (0000100) +15 + -10 = 5 (0000101) +15 + -9 = 6 (0000110) +15 + -8 = 7 (0000111) +15 + -7 = 8 (0001000) +15 + -6 = 9 (0001001) +15 + -5 = 10 (0001010) +15 + -4 = 11 (0001011) +15 + -3 = 12 (0001100) +15 + -2 = 13 (0001101) +15 + -1 = 14 (0001110) +16 + 0 = 16 (0010000) +16 + 1 = 17 (0010001) +16 + 2 = 18 (0010010) +16 + 3 = 19 (0010011) +16 + 4 = 20 (0010100) +16 + 5 = 21 (0010101) +16 + 6 = 22 (0010110) +16 + 7 = 23 (0010111) +16 + 8 = 24 (0011000) +16 + 9 = 25 (0011001) +16 + 10 = 26 (0011010) +16 + 11 = 27 (0011011) +16 + 12 = 28 (0011100) +16 + 13 = 29 (0011101) +16 + 14 = 30 (0011110) +16 + 15 = 31 (0011111) +16 + 16 = 32 (0100000) +16 + 17 = 33 (0100001) +16 + 18 = 34 (0100010) +16 + 19 = 35 (0100011) +16 + 20 = 36 (0100100) +16 + 21 = 37 (0100101) +16 + 22 = 38 (0100110) +16 + 23 = 39 (0100111) +16 + 24 = 40 (0101000) +16 + 25 = 41 (0101001) +16 + 26 = 42 (0101010) +16 + 27 = 43 (0101011) +16 + 28 = 44 (0101100) +16 + 29 = 45 (0101101) +16 + 30 = 46 (0101110) +16 + 31 = 47 (0101111) +16 + -32 = -16 (1110000) +16 + -31 = -15 (1110001) +16 + -30 = -14 (1110010) +16 + -29 = -13 (1110011) +16 + -28 = -12 (1110100) +16 + -27 = -11 (1110101) +16 + -26 = -10 (1110110) +16 + -25 = -9 (1110111) +16 + -24 = -8 (1111000) +16 + -23 = -7 (1111001) +16 + -22 = -6 (1111010) +16 + -21 = -5 (1111011) +16 + -20 = -4 (1111100) +16 + -19 = -3 (1111101) +16 + -18 = -2 (1111110) +16 + -17 = -1 (1111111) +16 + -16 = 0 (0000000) +16 + -15 = 1 (0000001) +16 + -14 = 2 (0000010) +16 + -13 = 3 (0000011) +16 + -12 = 4 (0000100) +16 + -11 = 5 (0000101) +16 + -10 = 6 (0000110) +16 + -9 = 7 (0000111) +16 + -8 = 8 (0001000) +16 + -7 = 9 (0001001) +16 + -6 = 10 (0001010) +16 + -5 = 11 (0001011) +16 + -4 = 12 (0001100) +16 + -3 = 13 (0001101) +16 + -2 = 14 (0001110) +16 + -1 = 15 (0001111) +17 + 0 = 17 (0010001) +17 + 1 = 18 (0010010) +17 + 2 = 19 (0010011) +17 + 3 = 20 (0010100) +17 + 4 = 21 (0010101) +17 + 5 = 22 (0010110) +17 + 6 = 23 (0010111) +17 + 7 = 24 (0011000) +17 + 8 = 25 (0011001) +17 + 9 = 26 (0011010) +17 + 10 = 27 (0011011) +17 + 11 = 28 (0011100) +17 + 12 = 29 (0011101) +17 + 13 = 30 (0011110) +17 + 14 = 31 (0011111) +17 + 15 = 32 (0100000) +17 + 16 = 33 (0100001) +17 + 17 = 34 (0100010) +17 + 18 = 35 (0100011) +17 + 19 = 36 (0100100) +17 + 20 = 37 (0100101) +17 + 21 = 38 (0100110) +17 + 22 = 39 (0100111) +17 + 23 = 40 (0101000) +17 + 24 = 41 (0101001) +17 + 25 = 42 (0101010) +17 + 26 = 43 (0101011) +17 + 27 = 44 (0101100) +17 + 28 = 45 (0101101) +17 + 29 = 46 (0101110) +17 + 30 = 47 (0101111) +17 + 31 = 48 (0110000) +17 + -32 = -15 (1110001) +17 + -31 = -14 (1110010) +17 + -30 = -13 (1110011) +17 + -29 = -12 (1110100) +17 + -28 = -11 (1110101) +17 + -27 = -10 (1110110) +17 + -26 = -9 (1110111) +17 + -25 = -8 (1111000) +17 + -24 = -7 (1111001) +17 + -23 = -6 (1111010) +17 + -22 = -5 (1111011) +17 + -21 = -4 (1111100) +17 + -20 = -3 (1111101) +17 + -19 = -2 (1111110) +17 + -18 = -1 (1111111) +17 + -17 = 0 (0000000) +17 + -16 = 1 (0000001) +17 + -15 = 2 (0000010) +17 + -14 = 3 (0000011) +17 + -13 = 4 (0000100) +17 + -12 = 5 (0000101) +17 + -11 = 6 (0000110) +17 + -10 = 7 (0000111) +17 + -9 = 8 (0001000) +17 + -8 = 9 (0001001) +17 + -7 = 10 (0001010) +17 + -6 = 11 (0001011) +17 + -5 = 12 (0001100) +17 + -4 = 13 (0001101) +17 + -3 = 14 (0001110) +17 + -2 = 15 (0001111) +17 + -1 = 16 (0010000) +18 + 0 = 18 (0010010) +18 + 1 = 19 (0010011) +18 + 2 = 20 (0010100) +18 + 3 = 21 (0010101) +18 + 4 = 22 (0010110) +18 + 5 = 23 (0010111) +18 + 6 = 24 (0011000) +18 + 7 = 25 (0011001) +18 + 8 = 26 (0011010) +18 + 9 = 27 (0011011) +18 + 10 = 28 (0011100) +18 + 11 = 29 (0011101) +18 + 12 = 30 (0011110) +18 + 13 = 31 (0011111) +18 + 14 = 32 (0100000) +18 + 15 = 33 (0100001) +18 + 16 = 34 (0100010) +18 + 17 = 35 (0100011) +18 + 18 = 36 (0100100) +18 + 19 = 37 (0100101) +18 + 20 = 38 (0100110) +18 + 21 = 39 (0100111) +18 + 22 = 40 (0101000) +18 + 23 = 41 (0101001) +18 + 24 = 42 (0101010) +18 + 25 = 43 (0101011) +18 + 26 = 44 (0101100) +18 + 27 = 45 (0101101) +18 + 28 = 46 (0101110) +18 + 29 = 47 (0101111) +18 + 30 = 48 (0110000) +18 + 31 = 49 (0110001) +18 + -32 = -14 (1110010) +18 + -31 = -13 (1110011) +18 + -30 = -12 (1110100) +18 + -29 = -11 (1110101) +18 + -28 = -10 (1110110) +18 + -27 = -9 (1110111) +18 + -26 = -8 (1111000) +18 + -25 = -7 (1111001) +18 + -24 = -6 (1111010) +18 + -23 = -5 (1111011) +18 + -22 = -4 (1111100) +18 + -21 = -3 (1111101) +18 + -20 = -2 (1111110) +18 + -19 = -1 (1111111) +18 + -18 = 0 (0000000) +18 + -17 = 1 (0000001) +18 + -16 = 2 (0000010) +18 + -15 = 3 (0000011) +18 + -14 = 4 (0000100) +18 + -13 = 5 (0000101) +18 + -12 = 6 (0000110) +18 + -11 = 7 (0000111) +18 + -10 = 8 (0001000) +18 + -9 = 9 (0001001) +18 + -8 = 10 (0001010) +18 + -7 = 11 (0001011) +18 + -6 = 12 (0001100) +18 + -5 = 13 (0001101) +18 + -4 = 14 (0001110) +18 + -3 = 15 (0001111) +18 + -2 = 16 (0010000) +18 + -1 = 17 (0010001) +19 + 0 = 19 (0010011) +19 + 1 = 20 (0010100) +19 + 2 = 21 (0010101) +19 + 3 = 22 (0010110) +19 + 4 = 23 (0010111) +19 + 5 = 24 (0011000) +19 + 6 = 25 (0011001) +19 + 7 = 26 (0011010) +19 + 8 = 27 (0011011) +19 + 9 = 28 (0011100) +19 + 10 = 29 (0011101) +19 + 11 = 30 (0011110) +19 + 12 = 31 (0011111) +19 + 13 = 32 (0100000) +19 + 14 = 33 (0100001) +19 + 15 = 34 (0100010) +19 + 16 = 35 (0100011) +19 + 17 = 36 (0100100) +19 + 18 = 37 (0100101) +19 + 19 = 38 (0100110) +19 + 20 = 39 (0100111) +19 + 21 = 40 (0101000) +19 + 22 = 41 (0101001) +19 + 23 = 42 (0101010) +19 + 24 = 43 (0101011) +19 + 25 = 44 (0101100) +19 + 26 = 45 (0101101) +19 + 27 = 46 (0101110) +19 + 28 = 47 (0101111) +19 + 29 = 48 (0110000) +19 + 30 = 49 (0110001) +19 + 31 = 50 (0110010) +19 + -32 = -13 (1110011) +19 + -31 = -12 (1110100) +19 + -30 = -11 (1110101) +19 + -29 = -10 (1110110) +19 + -28 = -9 (1110111) +19 + -27 = -8 (1111000) +19 + -26 = -7 (1111001) +19 + -25 = -6 (1111010) +19 + -24 = -5 (1111011) +19 + -23 = -4 (1111100) +19 + -22 = -3 (1111101) +19 + -21 = -2 (1111110) +19 + -20 = -1 (1111111) +19 + -19 = 0 (0000000) +19 + -18 = 1 (0000001) +19 + -17 = 2 (0000010) +19 + -16 = 3 (0000011) +19 + -15 = 4 (0000100) +19 + -14 = 5 (0000101) +19 + -13 = 6 (0000110) +19 + -12 = 7 (0000111) +19 + -11 = 8 (0001000) +19 + -10 = 9 (0001001) +19 + -9 = 10 (0001010) +19 + -8 = 11 (0001011) +19 + -7 = 12 (0001100) +19 + -6 = 13 (0001101) +19 + -5 = 14 (0001110) +19 + -4 = 15 (0001111) +19 + -3 = 16 (0010000) +19 + -2 = 17 (0010001) +19 + -1 = 18 (0010010) +20 + 0 = 20 (0010100) +20 + 1 = 21 (0010101) +20 + 2 = 22 (0010110) +20 + 3 = 23 (0010111) +20 + 4 = 24 (0011000) +20 + 5 = 25 (0011001) +20 + 6 = 26 (0011010) +20 + 7 = 27 (0011011) +20 + 8 = 28 (0011100) +20 + 9 = 29 (0011101) +20 + 10 = 30 (0011110) +20 + 11 = 31 (0011111) +20 + 12 = 32 (0100000) +20 + 13 = 33 (0100001) +20 + 14 = 34 (0100010) +20 + 15 = 35 (0100011) +20 + 16 = 36 (0100100) +20 + 17 = 37 (0100101) +20 + 18 = 38 (0100110) +20 + 19 = 39 (0100111) +20 + 20 = 40 (0101000) +20 + 21 = 41 (0101001) +20 + 22 = 42 (0101010) +20 + 23 = 43 (0101011) +20 + 24 = 44 (0101100) +20 + 25 = 45 (0101101) +20 + 26 = 46 (0101110) +20 + 27 = 47 (0101111) +20 + 28 = 48 (0110000) +20 + 29 = 49 (0110001) +20 + 30 = 50 (0110010) +20 + 31 = 51 (0110011) +20 + -32 = -12 (1110100) +20 + -31 = -11 (1110101) +20 + -30 = -10 (1110110) +20 + -29 = -9 (1110111) +20 + -28 = -8 (1111000) +20 + -27 = -7 (1111001) +20 + -26 = -6 (1111010) +20 + -25 = -5 (1111011) +20 + -24 = -4 (1111100) +20 + -23 = -3 (1111101) +20 + -22 = -2 (1111110) +20 + -21 = -1 (1111111) +20 + -20 = 0 (0000000) +20 + -19 = 1 (0000001) +20 + -18 = 2 (0000010) +20 + -17 = 3 (0000011) +20 + -16 = 4 (0000100) +20 + -15 = 5 (0000101) +20 + -14 = 6 (0000110) +20 + -13 = 7 (0000111) +20 + -12 = 8 (0001000) +20 + -11 = 9 (0001001) +20 + -10 = 10 (0001010) +20 + -9 = 11 (0001011) +20 + -8 = 12 (0001100) +20 + -7 = 13 (0001101) +20 + -6 = 14 (0001110) +20 + -5 = 15 (0001111) +20 + -4 = 16 (0010000) +20 + -3 = 17 (0010001) +20 + -2 = 18 (0010010) +20 + -1 = 19 (0010011) +21 + 0 = 21 (0010101) +21 + 1 = 22 (0010110) +21 + 2 = 23 (0010111) +21 + 3 = 24 (0011000) +21 + 4 = 25 (0011001) +21 + 5 = 26 (0011010) +21 + 6 = 27 (0011011) +21 + 7 = 28 (0011100) +21 + 8 = 29 (0011101) +21 + 9 = 30 (0011110) +21 + 10 = 31 (0011111) +21 + 11 = 32 (0100000) +21 + 12 = 33 (0100001) +21 + 13 = 34 (0100010) +21 + 14 = 35 (0100011) +21 + 15 = 36 (0100100) +21 + 16 = 37 (0100101) +21 + 17 = 38 (0100110) +21 + 18 = 39 (0100111) +21 + 19 = 40 (0101000) +21 + 20 = 41 (0101001) +21 + 21 = 42 (0101010) +21 + 22 = 43 (0101011) +21 + 23 = 44 (0101100) +21 + 24 = 45 (0101101) +21 + 25 = 46 (0101110) +21 + 26 = 47 (0101111) +21 + 27 = 48 (0110000) +21 + 28 = 49 (0110001) +21 + 29 = 50 (0110010) +21 + 30 = 51 (0110011) +21 + 31 = 52 (0110100) +21 + -32 = -11 (1110101) +21 + -31 = -10 (1110110) +21 + -30 = -9 (1110111) +21 + -29 = -8 (1111000) +21 + -28 = -7 (1111001) +21 + -27 = -6 (1111010) +21 + -26 = -5 (1111011) +21 + -25 = -4 (1111100) +21 + -24 = -3 (1111101) +21 + -23 = -2 (1111110) +21 + -22 = -1 (1111111) +21 + -21 = 0 (0000000) +21 + -20 = 1 (0000001) +21 + -19 = 2 (0000010) +21 + -18 = 3 (0000011) +21 + -17 = 4 (0000100) +21 + -16 = 5 (0000101) +21 + -15 = 6 (0000110) +21 + -14 = 7 (0000111) +21 + -13 = 8 (0001000) +21 + -12 = 9 (0001001) +21 + -11 = 10 (0001010) +21 + -10 = 11 (0001011) +21 + -9 = 12 (0001100) +21 + -8 = 13 (0001101) +21 + -7 = 14 (0001110) +21 + -6 = 15 (0001111) +21 + -5 = 16 (0010000) +21 + -4 = 17 (0010001) +21 + -3 = 18 (0010010) +21 + -2 = 19 (0010011) +21 + -1 = 20 (0010100) +22 + 0 = 22 (0010110) +22 + 1 = 23 (0010111) +22 + 2 = 24 (0011000) +22 + 3 = 25 (0011001) +22 + 4 = 26 (0011010) +22 + 5 = 27 (0011011) +22 + 6 = 28 (0011100) +22 + 7 = 29 (0011101) +22 + 8 = 30 (0011110) +22 + 9 = 31 (0011111) +22 + 10 = 32 (0100000) +22 + 11 = 33 (0100001) +22 + 12 = 34 (0100010) +22 + 13 = 35 (0100011) +22 + 14 = 36 (0100100) +22 + 15 = 37 (0100101) +22 + 16 = 38 (0100110) +22 + 17 = 39 (0100111) +22 + 18 = 40 (0101000) +22 + 19 = 41 (0101001) +22 + 20 = 42 (0101010) +22 + 21 = 43 (0101011) +22 + 22 = 44 (0101100) +22 + 23 = 45 (0101101) +22 + 24 = 46 (0101110) +22 + 25 = 47 (0101111) +22 + 26 = 48 (0110000) +22 + 27 = 49 (0110001) +22 + 28 = 50 (0110010) +22 + 29 = 51 (0110011) +22 + 30 = 52 (0110100) +22 + 31 = 53 (0110101) +22 + -32 = -10 (1110110) +22 + -31 = -9 (1110111) +22 + -30 = -8 (1111000) +22 + -29 = -7 (1111001) +22 + -28 = -6 (1111010) +22 + -27 = -5 (1111011) +22 + -26 = -4 (1111100) +22 + -25 = -3 (1111101) +22 + -24 = -2 (1111110) +22 + -23 = -1 (1111111) +22 + -22 = 0 (0000000) +22 + -21 = 1 (0000001) +22 + -20 = 2 (0000010) +22 + -19 = 3 (0000011) +22 + -18 = 4 (0000100) +22 + -17 = 5 (0000101) +22 + -16 = 6 (0000110) +22 + -15 = 7 (0000111) +22 + -14 = 8 (0001000) +22 + -13 = 9 (0001001) +22 + -12 = 10 (0001010) +22 + -11 = 11 (0001011) +22 + -10 = 12 (0001100) +22 + -9 = 13 (0001101) +22 + -8 = 14 (0001110) +22 + -7 = 15 (0001111) +22 + -6 = 16 (0010000) +22 + -5 = 17 (0010001) +22 + -4 = 18 (0010010) +22 + -3 = 19 (0010011) +22 + -2 = 20 (0010100) +22 + -1 = 21 (0010101) +23 + 0 = 23 (0010111) +23 + 1 = 24 (0011000) +23 + 2 = 25 (0011001) +23 + 3 = 26 (0011010) +23 + 4 = 27 (0011011) +23 + 5 = 28 (0011100) +23 + 6 = 29 (0011101) +23 + 7 = 30 (0011110) +23 + 8 = 31 (0011111) +23 + 9 = 32 (0100000) +23 + 10 = 33 (0100001) +23 + 11 = 34 (0100010) +23 + 12 = 35 (0100011) +23 + 13 = 36 (0100100) +23 + 14 = 37 (0100101) +23 + 15 = 38 (0100110) +23 + 16 = 39 (0100111) +23 + 17 = 40 (0101000) +23 + 18 = 41 (0101001) +23 + 19 = 42 (0101010) +23 + 20 = 43 (0101011) +23 + 21 = 44 (0101100) +23 + 22 = 45 (0101101) +23 + 23 = 46 (0101110) +23 + 24 = 47 (0101111) +23 + 25 = 48 (0110000) +23 + 26 = 49 (0110001) +23 + 27 = 50 (0110010) +23 + 28 = 51 (0110011) +23 + 29 = 52 (0110100) +23 + 30 = 53 (0110101) +23 + 31 = 54 (0110110) +23 + -32 = -9 (1110111) +23 + -31 = -8 (1111000) +23 + -30 = -7 (1111001) +23 + -29 = -6 (1111010) +23 + -28 = -5 (1111011) +23 + -27 = -4 (1111100) +23 + -26 = -3 (1111101) +23 + -25 = -2 (1111110) +23 + -24 = -1 (1111111) +23 + -23 = 0 (0000000) +23 + -22 = 1 (0000001) +23 + -21 = 2 (0000010) +23 + -20 = 3 (0000011) +23 + -19 = 4 (0000100) +23 + -18 = 5 (0000101) +23 + -17 = 6 (0000110) +23 + -16 = 7 (0000111) +23 + -15 = 8 (0001000) +23 + -14 = 9 (0001001) +23 + -13 = 10 (0001010) +23 + -12 = 11 (0001011) +23 + -11 = 12 (0001100) +23 + -10 = 13 (0001101) +23 + -9 = 14 (0001110) +23 + -8 = 15 (0001111) +23 + -7 = 16 (0010000) +23 + -6 = 17 (0010001) +23 + -5 = 18 (0010010) +23 + -4 = 19 (0010011) +23 + -3 = 20 (0010100) +23 + -2 = 21 (0010101) +23 + -1 = 22 (0010110) +24 + 0 = 24 (0011000) +24 + 1 = 25 (0011001) +24 + 2 = 26 (0011010) +24 + 3 = 27 (0011011) +24 + 4 = 28 (0011100) +24 + 5 = 29 (0011101) +24 + 6 = 30 (0011110) +24 + 7 = 31 (0011111) +24 + 8 = 32 (0100000) +24 + 9 = 33 (0100001) +24 + 10 = 34 (0100010) +24 + 11 = 35 (0100011) +24 + 12 = 36 (0100100) +24 + 13 = 37 (0100101) +24 + 14 = 38 (0100110) +24 + 15 = 39 (0100111) +24 + 16 = 40 (0101000) +24 + 17 = 41 (0101001) +24 + 18 = 42 (0101010) +24 + 19 = 43 (0101011) +24 + 20 = 44 (0101100) +24 + 21 = 45 (0101101) +24 + 22 = 46 (0101110) +24 + 23 = 47 (0101111) +24 + 24 = 48 (0110000) +24 + 25 = 49 (0110001) +24 + 26 = 50 (0110010) +24 + 27 = 51 (0110011) +24 + 28 = 52 (0110100) +24 + 29 = 53 (0110101) +24 + 30 = 54 (0110110) +24 + 31 = 55 (0110111) +24 + -32 = -8 (1111000) +24 + -31 = -7 (1111001) +24 + -30 = -6 (1111010) +24 + -29 = -5 (1111011) +24 + -28 = -4 (1111100) +24 + -27 = -3 (1111101) +24 + -26 = -2 (1111110) +24 + -25 = -1 (1111111) +24 + -24 = 0 (0000000) +24 + -23 = 1 (0000001) +24 + -22 = 2 (0000010) +24 + -21 = 3 (0000011) +24 + -20 = 4 (0000100) +24 + -19 = 5 (0000101) +24 + -18 = 6 (0000110) +24 + -17 = 7 (0000111) +24 + -16 = 8 (0001000) +24 + -15 = 9 (0001001) +24 + -14 = 10 (0001010) +24 + -13 = 11 (0001011) +24 + -12 = 12 (0001100) +24 + -11 = 13 (0001101) +24 + -10 = 14 (0001110) +24 + -9 = 15 (0001111) +24 + -8 = 16 (0010000) +24 + -7 = 17 (0010001) +24 + -6 = 18 (0010010) +24 + -5 = 19 (0010011) +24 + -4 = 20 (0010100) +24 + -3 = 21 (0010101) +24 + -2 = 22 (0010110) +24 + -1 = 23 (0010111) +25 + 0 = 25 (0011001) +25 + 1 = 26 (0011010) +25 + 2 = 27 (0011011) +25 + 3 = 28 (0011100) +25 + 4 = 29 (0011101) +25 + 5 = 30 (0011110) +25 + 6 = 31 (0011111) +25 + 7 = 32 (0100000) +25 + 8 = 33 (0100001) +25 + 9 = 34 (0100010) +25 + 10 = 35 (0100011) +25 + 11 = 36 (0100100) +25 + 12 = 37 (0100101) +25 + 13 = 38 (0100110) +25 + 14 = 39 (0100111) +25 + 15 = 40 (0101000) +25 + 16 = 41 (0101001) +25 + 17 = 42 (0101010) +25 + 18 = 43 (0101011) +25 + 19 = 44 (0101100) +25 + 20 = 45 (0101101) +25 + 21 = 46 (0101110) +25 + 22 = 47 (0101111) +25 + 23 = 48 (0110000) +25 + 24 = 49 (0110001) +25 + 25 = 50 (0110010) +25 + 26 = 51 (0110011) +25 + 27 = 52 (0110100) +25 + 28 = 53 (0110101) +25 + 29 = 54 (0110110) +25 + 30 = 55 (0110111) +25 + 31 = 56 (0111000) +25 + -32 = -7 (1111001) +25 + -31 = -6 (1111010) +25 + -30 = -5 (1111011) +25 + -29 = -4 (1111100) +25 + -28 = -3 (1111101) +25 + -27 = -2 (1111110) +25 + -26 = -1 (1111111) +25 + -25 = 0 (0000000) +25 + -24 = 1 (0000001) +25 + -23 = 2 (0000010) +25 + -22 = 3 (0000011) +25 + -21 = 4 (0000100) +25 + -20 = 5 (0000101) +25 + -19 = 6 (0000110) +25 + -18 = 7 (0000111) +25 + -17 = 8 (0001000) +25 + -16 = 9 (0001001) +25 + -15 = 10 (0001010) +25 + -14 = 11 (0001011) +25 + -13 = 12 (0001100) +25 + -12 = 13 (0001101) +25 + -11 = 14 (0001110) +25 + -10 = 15 (0001111) +25 + -9 = 16 (0010000) +25 + -8 = 17 (0010001) +25 + -7 = 18 (0010010) +25 + -6 = 19 (0010011) +25 + -5 = 20 (0010100) +25 + -4 = 21 (0010101) +25 + -3 = 22 (0010110) +25 + -2 = 23 (0010111) +25 + -1 = 24 (0011000) +26 + 0 = 26 (0011010) +26 + 1 = 27 (0011011) +26 + 2 = 28 (0011100) +26 + 3 = 29 (0011101) +26 + 4 = 30 (0011110) +26 + 5 = 31 (0011111) +26 + 6 = 32 (0100000) +26 + 7 = 33 (0100001) +26 + 8 = 34 (0100010) +26 + 9 = 35 (0100011) +26 + 10 = 36 (0100100) +26 + 11 = 37 (0100101) +26 + 12 = 38 (0100110) +26 + 13 = 39 (0100111) +26 + 14 = 40 (0101000) +26 + 15 = 41 (0101001) +26 + 16 = 42 (0101010) +26 + 17 = 43 (0101011) +26 + 18 = 44 (0101100) +26 + 19 = 45 (0101101) +26 + 20 = 46 (0101110) +26 + 21 = 47 (0101111) +26 + 22 = 48 (0110000) +26 + 23 = 49 (0110001) +26 + 24 = 50 (0110010) +26 + 25 = 51 (0110011) +26 + 26 = 52 (0110100) +26 + 27 = 53 (0110101) +26 + 28 = 54 (0110110) +26 + 29 = 55 (0110111) +26 + 30 = 56 (0111000) +26 + 31 = 57 (0111001) +26 + -32 = -6 (1111010) +26 + -31 = -5 (1111011) +26 + -30 = -4 (1111100) +26 + -29 = -3 (1111101) +26 + -28 = -2 (1111110) +26 + -27 = -1 (1111111) +26 + -26 = 0 (0000000) +26 + -25 = 1 (0000001) +26 + -24 = 2 (0000010) +26 + -23 = 3 (0000011) +26 + -22 = 4 (0000100) +26 + -21 = 5 (0000101) +26 + -20 = 6 (0000110) +26 + -19 = 7 (0000111) +26 + -18 = 8 (0001000) +26 + -17 = 9 (0001001) +26 + -16 = 10 (0001010) +26 + -15 = 11 (0001011) +26 + -14 = 12 (0001100) +26 + -13 = 13 (0001101) +26 + -12 = 14 (0001110) +26 + -11 = 15 (0001111) +26 + -10 = 16 (0010000) +26 + -9 = 17 (0010001) +26 + -8 = 18 (0010010) +26 + -7 = 19 (0010011) +26 + -6 = 20 (0010100) +26 + -5 = 21 (0010101) +26 + -4 = 22 (0010110) +26 + -3 = 23 (0010111) +26 + -2 = 24 (0011000) +26 + -1 = 25 (0011001) +27 + 0 = 27 (0011011) +27 + 1 = 28 (0011100) +27 + 2 = 29 (0011101) +27 + 3 = 30 (0011110) +27 + 4 = 31 (0011111) +27 + 5 = 32 (0100000) +27 + 6 = 33 (0100001) +27 + 7 = 34 (0100010) +27 + 8 = 35 (0100011) +27 + 9 = 36 (0100100) +27 + 10 = 37 (0100101) +27 + 11 = 38 (0100110) +27 + 12 = 39 (0100111) +27 + 13 = 40 (0101000) +27 + 14 = 41 (0101001) +27 + 15 = 42 (0101010) +27 + 16 = 43 (0101011) +27 + 17 = 44 (0101100) +27 + 18 = 45 (0101101) +27 + 19 = 46 (0101110) +27 + 20 = 47 (0101111) +27 + 21 = 48 (0110000) +27 + 22 = 49 (0110001) +27 + 23 = 50 (0110010) +27 + 24 = 51 (0110011) +27 + 25 = 52 (0110100) +27 + 26 = 53 (0110101) +27 + 27 = 54 (0110110) +27 + 28 = 55 (0110111) +27 + 29 = 56 (0111000) +27 + 30 = 57 (0111001) +27 + 31 = 58 (0111010) +27 + -32 = -5 (1111011) +27 + -31 = -4 (1111100) +27 + -30 = -3 (1111101) +27 + -29 = -2 (1111110) +27 + -28 = -1 (1111111) +27 + -27 = 0 (0000000) +27 + -26 = 1 (0000001) +27 + -25 = 2 (0000010) +27 + -24 = 3 (0000011) +27 + -23 = 4 (0000100) +27 + -22 = 5 (0000101) +27 + -21 = 6 (0000110) +27 + -20 = 7 (0000111) +27 + -19 = 8 (0001000) +27 + -18 = 9 (0001001) +27 + -17 = 10 (0001010) +27 + -16 = 11 (0001011) +27 + -15 = 12 (0001100) +27 + -14 = 13 (0001101) +27 + -13 = 14 (0001110) +27 + -12 = 15 (0001111) +27 + -11 = 16 (0010000) +27 + -10 = 17 (0010001) +27 + -9 = 18 (0010010) +27 + -8 = 19 (0010011) +27 + -7 = 20 (0010100) +27 + -6 = 21 (0010101) +27 + -5 = 22 (0010110) +27 + -4 = 23 (0010111) +27 + -3 = 24 (0011000) +27 + -2 = 25 (0011001) +27 + -1 = 26 (0011010) +28 + 0 = 28 (0011100) +28 + 1 = 29 (0011101) +28 + 2 = 30 (0011110) +28 + 3 = 31 (0011111) +28 + 4 = 32 (0100000) +28 + 5 = 33 (0100001) +28 + 6 = 34 (0100010) +28 + 7 = 35 (0100011) +28 + 8 = 36 (0100100) +28 + 9 = 37 (0100101) +28 + 10 = 38 (0100110) +28 + 11 = 39 (0100111) +28 + 12 = 40 (0101000) +28 + 13 = 41 (0101001) +28 + 14 = 42 (0101010) +28 + 15 = 43 (0101011) +28 + 16 = 44 (0101100) +28 + 17 = 45 (0101101) +28 + 18 = 46 (0101110) +28 + 19 = 47 (0101111) +28 + 20 = 48 (0110000) +28 + 21 = 49 (0110001) +28 + 22 = 50 (0110010) +28 + 23 = 51 (0110011) +28 + 24 = 52 (0110100) +28 + 25 = 53 (0110101) +28 + 26 = 54 (0110110) +28 + 27 = 55 (0110111) +28 + 28 = 56 (0111000) +28 + 29 = 57 (0111001) +28 + 30 = 58 (0111010) +28 + 31 = 59 (0111011) +28 + -32 = -4 (1111100) +28 + -31 = -3 (1111101) +28 + -30 = -2 (1111110) +28 + -29 = -1 (1111111) +28 + -28 = 0 (0000000) +28 + -27 = 1 (0000001) +28 + -26 = 2 (0000010) +28 + -25 = 3 (0000011) +28 + -24 = 4 (0000100) +28 + -23 = 5 (0000101) +28 + -22 = 6 (0000110) +28 + -21 = 7 (0000111) +28 + -20 = 8 (0001000) +28 + -19 = 9 (0001001) +28 + -18 = 10 (0001010) +28 + -17 = 11 (0001011) +28 + -16 = 12 (0001100) +28 + -15 = 13 (0001101) +28 + -14 = 14 (0001110) +28 + -13 = 15 (0001111) +28 + -12 = 16 (0010000) +28 + -11 = 17 (0010001) +28 + -10 = 18 (0010010) +28 + -9 = 19 (0010011) +28 + -8 = 20 (0010100) +28 + -7 = 21 (0010101) +28 + -6 = 22 (0010110) +28 + -5 = 23 (0010111) +28 + -4 = 24 (0011000) +28 + -3 = 25 (0011001) +28 + -2 = 26 (0011010) +28 + -1 = 27 (0011011) +29 + 0 = 29 (0011101) +29 + 1 = 30 (0011110) +29 + 2 = 31 (0011111) +29 + 3 = 32 (0100000) +29 + 4 = 33 (0100001) +29 + 5 = 34 (0100010) +29 + 6 = 35 (0100011) +29 + 7 = 36 (0100100) +29 + 8 = 37 (0100101) +29 + 9 = 38 (0100110) +29 + 10 = 39 (0100111) +29 + 11 = 40 (0101000) +29 + 12 = 41 (0101001) +29 + 13 = 42 (0101010) +29 + 14 = 43 (0101011) +29 + 15 = 44 (0101100) +29 + 16 = 45 (0101101) +29 + 17 = 46 (0101110) +29 + 18 = 47 (0101111) +29 + 19 = 48 (0110000) +29 + 20 = 49 (0110001) +29 + 21 = 50 (0110010) +29 + 22 = 51 (0110011) +29 + 23 = 52 (0110100) +29 + 24 = 53 (0110101) +29 + 25 = 54 (0110110) +29 + 26 = 55 (0110111) +29 + 27 = 56 (0111000) +29 + 28 = 57 (0111001) +29 + 29 = 58 (0111010) +29 + 30 = 59 (0111011) +29 + 31 = 60 (0111100) +29 + -32 = -3 (1111101) +29 + -31 = -2 (1111110) +29 + -30 = -1 (1111111) +29 + -29 = 0 (0000000) +29 + -28 = 1 (0000001) +29 + -27 = 2 (0000010) +29 + -26 = 3 (0000011) +29 + -25 = 4 (0000100) +29 + -24 = 5 (0000101) +29 + -23 = 6 (0000110) +29 + -22 = 7 (0000111) +29 + -21 = 8 (0001000) +29 + -20 = 9 (0001001) +29 + -19 = 10 (0001010) +29 + -18 = 11 (0001011) +29 + -17 = 12 (0001100) +29 + -16 = 13 (0001101) +29 + -15 = 14 (0001110) +29 + -14 = 15 (0001111) +29 + -13 = 16 (0010000) +29 + -12 = 17 (0010001) +29 + -11 = 18 (0010010) +29 + -10 = 19 (0010011) +29 + -9 = 20 (0010100) +29 + -8 = 21 (0010101) +29 + -7 = 22 (0010110) +29 + -6 = 23 (0010111) +29 + -5 = 24 (0011000) +29 + -4 = 25 (0011001) +29 + -3 = 26 (0011010) +29 + -2 = 27 (0011011) +29 + -1 = 28 (0011100) +30 + 0 = 30 (0011110) +30 + 1 = 31 (0011111) +30 + 2 = 32 (0100000) +30 + 3 = 33 (0100001) +30 + 4 = 34 (0100010) +30 + 5 = 35 (0100011) +30 + 6 = 36 (0100100) +30 + 7 = 37 (0100101) +30 + 8 = 38 (0100110) +30 + 9 = 39 (0100111) +30 + 10 = 40 (0101000) +30 + 11 = 41 (0101001) +30 + 12 = 42 (0101010) +30 + 13 = 43 (0101011) +30 + 14 = 44 (0101100) +30 + 15 = 45 (0101101) +30 + 16 = 46 (0101110) +30 + 17 = 47 (0101111) +30 + 18 = 48 (0110000) +30 + 19 = 49 (0110001) +30 + 20 = 50 (0110010) +30 + 21 = 51 (0110011) +30 + 22 = 52 (0110100) +30 + 23 = 53 (0110101) +30 + 24 = 54 (0110110) +30 + 25 = 55 (0110111) +30 + 26 = 56 (0111000) +30 + 27 = 57 (0111001) +30 + 28 = 58 (0111010) +30 + 29 = 59 (0111011) +30 + 30 = 60 (0111100) +30 + 31 = 61 (0111101) +30 + -32 = -2 (1111110) +30 + -31 = -1 (1111111) +30 + -30 = 0 (0000000) +30 + -29 = 1 (0000001) +30 + -28 = 2 (0000010) +30 + -27 = 3 (0000011) +30 + -26 = 4 (0000100) +30 + -25 = 5 (0000101) +30 + -24 = 6 (0000110) +30 + -23 = 7 (0000111) +30 + -22 = 8 (0001000) +30 + -21 = 9 (0001001) +30 + -20 = 10 (0001010) +30 + -19 = 11 (0001011) +30 + -18 = 12 (0001100) +30 + -17 = 13 (0001101) +30 + -16 = 14 (0001110) +30 + -15 = 15 (0001111) +30 + -14 = 16 (0010000) +30 + -13 = 17 (0010001) +30 + -12 = 18 (0010010) +30 + -11 = 19 (0010011) +30 + -10 = 20 (0010100) +30 + -9 = 21 (0010101) +30 + -8 = 22 (0010110) +30 + -7 = 23 (0010111) +30 + -6 = 24 (0011000) +30 + -5 = 25 (0011001) +30 + -4 = 26 (0011010) +30 + -3 = 27 (0011011) +30 + -2 = 28 (0011100) +30 + -1 = 29 (0011101) +31 + 0 = 31 (0011111) +31 + 1 = 32 (0100000) +31 + 2 = 33 (0100001) +31 + 3 = 34 (0100010) +31 + 4 = 35 (0100011) +31 + 5 = 36 (0100100) +31 + 6 = 37 (0100101) +31 + 7 = 38 (0100110) +31 + 8 = 39 (0100111) +31 + 9 = 40 (0101000) +31 + 10 = 41 (0101001) +31 + 11 = 42 (0101010) +31 + 12 = 43 (0101011) +31 + 13 = 44 (0101100) +31 + 14 = 45 (0101101) +31 + 15 = 46 (0101110) +31 + 16 = 47 (0101111) +31 + 17 = 48 (0110000) +31 + 18 = 49 (0110001) +31 + 19 = 50 (0110010) +31 + 20 = 51 (0110011) +31 + 21 = 52 (0110100) +31 + 22 = 53 (0110101) +31 + 23 = 54 (0110110) +31 + 24 = 55 (0110111) +31 + 25 = 56 (0111000) +31 + 26 = 57 (0111001) +31 + 27 = 58 (0111010) +31 + 28 = 59 (0111011) +31 + 29 = 60 (0111100) +31 + 30 = 61 (0111101) +31 + 31 = 62 (0111110) +31 + -32 = -1 (1111111) +31 + -31 = 0 (0000000) +31 + -30 = 1 (0000001) +31 + -29 = 2 (0000010) +31 + -28 = 3 (0000011) +31 + -27 = 4 (0000100) +31 + -26 = 5 (0000101) +31 + -25 = 6 (0000110) +31 + -24 = 7 (0000111) +31 + -23 = 8 (0001000) +31 + -22 = 9 (0001001) +31 + -21 = 10 (0001010) +31 + -20 = 11 (0001011) +31 + -19 = 12 (0001100) +31 + -18 = 13 (0001101) +31 + -17 = 14 (0001110) +31 + -16 = 15 (0001111) +31 + -15 = 16 (0010000) +31 + -14 = 17 (0010001) +31 + -13 = 18 (0010010) +31 + -12 = 19 (0010011) +31 + -11 = 20 (0010100) +31 + -10 = 21 (0010101) +31 + -9 = 22 (0010110) +31 + -8 = 23 (0010111) +31 + -7 = 24 (0011000) +31 + -6 = 25 (0011001) +31 + -5 = 26 (0011010) +31 + -4 = 27 (0011011) +31 + -3 = 28 (0011100) +31 + -2 = 29 (0011101) +31 + -1 = 30 (0011110) +-32 + 0 = -32 (1100000) +-32 + 1 = -31 (1100001) +-32 + 2 = -30 (1100010) +-32 + 3 = -29 (1100011) +-32 + 4 = -28 (1100100) +-32 + 5 = -27 (1100101) +-32 + 6 = -26 (1100110) +-32 + 7 = -25 (1100111) +-32 + 8 = -24 (1101000) +-32 + 9 = -23 (1101001) +-32 + 10 = -22 (1101010) +-32 + 11 = -21 (1101011) +-32 + 12 = -20 (1101100) +-32 + 13 = -19 (1101101) +-32 + 14 = -18 (1101110) +-32 + 15 = -17 (1101111) +-32 + 16 = -16 (1110000) +-32 + 17 = -15 (1110001) +-32 + 18 = -14 (1110010) +-32 + 19 = -13 (1110011) +-32 + 20 = -12 (1110100) +-32 + 21 = -11 (1110101) +-32 + 22 = -10 (1110110) +-32 + 23 = -9 (1110111) +-32 + 24 = -8 (1111000) +-32 + 25 = -7 (1111001) +-32 + 26 = -6 (1111010) +-32 + 27 = -5 (1111011) +-32 + 28 = -4 (1111100) +-32 + 29 = -3 (1111101) +-32 + 30 = -2 (1111110) +-32 + 31 = -1 (1111111) +-32 + -32 = -64 (1000000) +-32 + -31 = -63 (1000001) +-32 + -30 = -62 (1000010) +-32 + -29 = -61 (1000011) +-32 + -28 = -60 (1000100) +-32 + -27 = -59 (1000101) +-32 + -26 = -58 (1000110) +-32 + -25 = -57 (1000111) +-32 + -24 = -56 (1001000) +-32 + -23 = -55 (1001001) +-32 + -22 = -54 (1001010) +-32 + -21 = -53 (1001011) +-32 + -20 = -52 (1001100) +-32 + -19 = -51 (1001101) +-32 + -18 = -50 (1001110) +-32 + -17 = -49 (1001111) +-32 + -16 = -48 (1010000) +-32 + -15 = -47 (1010001) +-32 + -14 = -46 (1010010) +-32 + -13 = -45 (1010011) +-32 + -12 = -44 (1010100) +-32 + -11 = -43 (1010101) +-32 + -10 = -42 (1010110) +-32 + -9 = -41 (1010111) +-32 + -8 = -40 (1011000) +-32 + -7 = -39 (1011001) +-32 + -6 = -38 (1011010) +-32 + -5 = -37 (1011011) +-32 + -4 = -36 (1011100) +-32 + -3 = -35 (1011101) +-32 + -2 = -34 (1011110) +-32 + -1 = -33 (1011111) +-31 + 0 = -31 (1100001) +-31 + 1 = -30 (1100010) +-31 + 2 = -29 (1100011) +-31 + 3 = -28 (1100100) +-31 + 4 = -27 (1100101) +-31 + 5 = -26 (1100110) +-31 + 6 = -25 (1100111) +-31 + 7 = -24 (1101000) +-31 + 8 = -23 (1101001) +-31 + 9 = -22 (1101010) +-31 + 10 = -21 (1101011) +-31 + 11 = -20 (1101100) +-31 + 12 = -19 (1101101) +-31 + 13 = -18 (1101110) +-31 + 14 = -17 (1101111) +-31 + 15 = -16 (1110000) +-31 + 16 = -15 (1110001) +-31 + 17 = -14 (1110010) +-31 + 18 = -13 (1110011) +-31 + 19 = -12 (1110100) +-31 + 20 = -11 (1110101) +-31 + 21 = -10 (1110110) +-31 + 22 = -9 (1110111) +-31 + 23 = -8 (1111000) +-31 + 24 = -7 (1111001) +-31 + 25 = -6 (1111010) +-31 + 26 = -5 (1111011) +-31 + 27 = -4 (1111100) +-31 + 28 = -3 (1111101) +-31 + 29 = -2 (1111110) +-31 + 30 = -1 (1111111) +-31 + 31 = 0 (0000000) +-31 + -32 = -63 (1000001) +-31 + -31 = -62 (1000010) +-31 + -30 = -61 (1000011) +-31 + -29 = -60 (1000100) +-31 + -28 = -59 (1000101) +-31 + -27 = -58 (1000110) +-31 + -26 = -57 (1000111) +-31 + -25 = -56 (1001000) +-31 + -24 = -55 (1001001) +-31 + -23 = -54 (1001010) +-31 + -22 = -53 (1001011) +-31 + -21 = -52 (1001100) +-31 + -20 = -51 (1001101) +-31 + -19 = -50 (1001110) +-31 + -18 = -49 (1001111) +-31 + -17 = -48 (1010000) +-31 + -16 = -47 (1010001) +-31 + -15 = -46 (1010010) +-31 + -14 = -45 (1010011) +-31 + -13 = -44 (1010100) +-31 + -12 = -43 (1010101) +-31 + -11 = -42 (1010110) +-31 + -10 = -41 (1010111) +-31 + -9 = -40 (1011000) +-31 + -8 = -39 (1011001) +-31 + -7 = -38 (1011010) +-31 + -6 = -37 (1011011) +-31 + -5 = -36 (1011100) +-31 + -4 = -35 (1011101) +-31 + -3 = -34 (1011110) +-31 + -2 = -33 (1011111) +-31 + -1 = -32 (1100000) +-30 + 0 = -30 (1100010) +-30 + 1 = -29 (1100011) +-30 + 2 = -28 (1100100) +-30 + 3 = -27 (1100101) +-30 + 4 = -26 (1100110) +-30 + 5 = -25 (1100111) +-30 + 6 = -24 (1101000) +-30 + 7 = -23 (1101001) +-30 + 8 = -22 (1101010) +-30 + 9 = -21 (1101011) +-30 + 10 = -20 (1101100) +-30 + 11 = -19 (1101101) +-30 + 12 = -18 (1101110) +-30 + 13 = -17 (1101111) +-30 + 14 = -16 (1110000) +-30 + 15 = -15 (1110001) +-30 + 16 = -14 (1110010) +-30 + 17 = -13 (1110011) +-30 + 18 = -12 (1110100) +-30 + 19 = -11 (1110101) +-30 + 20 = -10 (1110110) +-30 + 21 = -9 (1110111) +-30 + 22 = -8 (1111000) +-30 + 23 = -7 (1111001) +-30 + 24 = -6 (1111010) +-30 + 25 = -5 (1111011) +-30 + 26 = -4 (1111100) +-30 + 27 = -3 (1111101) +-30 + 28 = -2 (1111110) +-30 + 29 = -1 (1111111) +-30 + 30 = 0 (0000000) +-30 + 31 = 1 (0000001) +-30 + -32 = -62 (1000010) +-30 + -31 = -61 (1000011) +-30 + -30 = -60 (1000100) +-30 + -29 = -59 (1000101) +-30 + -28 = -58 (1000110) +-30 + -27 = -57 (1000111) +-30 + -26 = -56 (1001000) +-30 + -25 = -55 (1001001) +-30 + -24 = -54 (1001010) +-30 + -23 = -53 (1001011) +-30 + -22 = -52 (1001100) +-30 + -21 = -51 (1001101) +-30 + -20 = -50 (1001110) +-30 + -19 = -49 (1001111) +-30 + -18 = -48 (1010000) +-30 + -17 = -47 (1010001) +-30 + -16 = -46 (1010010) +-30 + -15 = -45 (1010011) +-30 + -14 = -44 (1010100) +-30 + -13 = -43 (1010101) +-30 + -12 = -42 (1010110) +-30 + -11 = -41 (1010111) +-30 + -10 = -40 (1011000) +-30 + -9 = -39 (1011001) +-30 + -8 = -38 (1011010) +-30 + -7 = -37 (1011011) +-30 + -6 = -36 (1011100) +-30 + -5 = -35 (1011101) +-30 + -4 = -34 (1011110) +-30 + -3 = -33 (1011111) +-30 + -2 = -32 (1100000) +-30 + -1 = -31 (1100001) +-29 + 0 = -29 (1100011) +-29 + 1 = -28 (1100100) +-29 + 2 = -27 (1100101) +-29 + 3 = -26 (1100110) +-29 + 4 = -25 (1100111) +-29 + 5 = -24 (1101000) +-29 + 6 = -23 (1101001) +-29 + 7 = -22 (1101010) +-29 + 8 = -21 (1101011) +-29 + 9 = -20 (1101100) +-29 + 10 = -19 (1101101) +-29 + 11 = -18 (1101110) +-29 + 12 = -17 (1101111) +-29 + 13 = -16 (1110000) +-29 + 14 = -15 (1110001) +-29 + 15 = -14 (1110010) +-29 + 16 = -13 (1110011) +-29 + 17 = -12 (1110100) +-29 + 18 = -11 (1110101) +-29 + 19 = -10 (1110110) +-29 + 20 = -9 (1110111) +-29 + 21 = -8 (1111000) +-29 + 22 = -7 (1111001) +-29 + 23 = -6 (1111010) +-29 + 24 = -5 (1111011) +-29 + 25 = -4 (1111100) +-29 + 26 = -3 (1111101) +-29 + 27 = -2 (1111110) +-29 + 28 = -1 (1111111) +-29 + 29 = 0 (0000000) +-29 + 30 = 1 (0000001) +-29 + 31 = 2 (0000010) +-29 + -32 = -61 (1000011) +-29 + -31 = -60 (1000100) +-29 + -30 = -59 (1000101) +-29 + -29 = -58 (1000110) +-29 + -28 = -57 (1000111) +-29 + -27 = -56 (1001000) +-29 + -26 = -55 (1001001) +-29 + -25 = -54 (1001010) +-29 + -24 = -53 (1001011) +-29 + -23 = -52 (1001100) +-29 + -22 = -51 (1001101) +-29 + -21 = -50 (1001110) +-29 + -20 = -49 (1001111) +-29 + -19 = -48 (1010000) +-29 + -18 = -47 (1010001) +-29 + -17 = -46 (1010010) +-29 + -16 = -45 (1010011) +-29 + -15 = -44 (1010100) +-29 + -14 = -43 (1010101) +-29 + -13 = -42 (1010110) +-29 + -12 = -41 (1010111) +-29 + -11 = -40 (1011000) +-29 + -10 = -39 (1011001) +-29 + -9 = -38 (1011010) +-29 + -8 = -37 (1011011) +-29 + -7 = -36 (1011100) +-29 + -6 = -35 (1011101) +-29 + -5 = -34 (1011110) +-29 + -4 = -33 (1011111) +-29 + -3 = -32 (1100000) +-29 + -2 = -31 (1100001) +-29 + -1 = -30 (1100010) +-28 + 0 = -28 (1100100) +-28 + 1 = -27 (1100101) +-28 + 2 = -26 (1100110) +-28 + 3 = -25 (1100111) +-28 + 4 = -24 (1101000) +-28 + 5 = -23 (1101001) +-28 + 6 = -22 (1101010) +-28 + 7 = -21 (1101011) +-28 + 8 = -20 (1101100) +-28 + 9 = -19 (1101101) +-28 + 10 = -18 (1101110) +-28 + 11 = -17 (1101111) +-28 + 12 = -16 (1110000) +-28 + 13 = -15 (1110001) +-28 + 14 = -14 (1110010) +-28 + 15 = -13 (1110011) +-28 + 16 = -12 (1110100) +-28 + 17 = -11 (1110101) +-28 + 18 = -10 (1110110) +-28 + 19 = -9 (1110111) +-28 + 20 = -8 (1111000) +-28 + 21 = -7 (1111001) +-28 + 22 = -6 (1111010) +-28 + 23 = -5 (1111011) +-28 + 24 = -4 (1111100) +-28 + 25 = -3 (1111101) +-28 + 26 = -2 (1111110) +-28 + 27 = -1 (1111111) +-28 + 28 = 0 (0000000) +-28 + 29 = 1 (0000001) +-28 + 30 = 2 (0000010) +-28 + 31 = 3 (0000011) +-28 + -32 = -60 (1000100) +-28 + -31 = -59 (1000101) +-28 + -30 = -58 (1000110) +-28 + -29 = -57 (1000111) +-28 + -28 = -56 (1001000) +-28 + -27 = -55 (1001001) +-28 + -26 = -54 (1001010) +-28 + -25 = -53 (1001011) +-28 + -24 = -52 (1001100) +-28 + -23 = -51 (1001101) +-28 + -22 = -50 (1001110) +-28 + -21 = -49 (1001111) +-28 + -20 = -48 (1010000) +-28 + -19 = -47 (1010001) +-28 + -18 = -46 (1010010) +-28 + -17 = -45 (1010011) +-28 + -16 = -44 (1010100) +-28 + -15 = -43 (1010101) +-28 + -14 = -42 (1010110) +-28 + -13 = -41 (1010111) +-28 + -12 = -40 (1011000) +-28 + -11 = -39 (1011001) +-28 + -10 = -38 (1011010) +-28 + -9 = -37 (1011011) +-28 + -8 = -36 (1011100) +-28 + -7 = -35 (1011101) +-28 + -6 = -34 (1011110) +-28 + -5 = -33 (1011111) +-28 + -4 = -32 (1100000) +-28 + -3 = -31 (1100001) +-28 + -2 = -30 (1100010) +-28 + -1 = -29 (1100011) +-27 + 0 = -27 (1100101) +-27 + 1 = -26 (1100110) +-27 + 2 = -25 (1100111) +-27 + 3 = -24 (1101000) +-27 + 4 = -23 (1101001) +-27 + 5 = -22 (1101010) +-27 + 6 = -21 (1101011) +-27 + 7 = -20 (1101100) +-27 + 8 = -19 (1101101) +-27 + 9 = -18 (1101110) +-27 + 10 = -17 (1101111) +-27 + 11 = -16 (1110000) +-27 + 12 = -15 (1110001) +-27 + 13 = -14 (1110010) +-27 + 14 = -13 (1110011) +-27 + 15 = -12 (1110100) +-27 + 16 = -11 (1110101) +-27 + 17 = -10 (1110110) +-27 + 18 = -9 (1110111) +-27 + 19 = -8 (1111000) +-27 + 20 = -7 (1111001) +-27 + 21 = -6 (1111010) +-27 + 22 = -5 (1111011) +-27 + 23 = -4 (1111100) +-27 + 24 = -3 (1111101) +-27 + 25 = -2 (1111110) +-27 + 26 = -1 (1111111) +-27 + 27 = 0 (0000000) +-27 + 28 = 1 (0000001) +-27 + 29 = 2 (0000010) +-27 + 30 = 3 (0000011) +-27 + 31 = 4 (0000100) +-27 + -32 = -59 (1000101) +-27 + -31 = -58 (1000110) +-27 + -30 = -57 (1000111) +-27 + -29 = -56 (1001000) +-27 + -28 = -55 (1001001) +-27 + -27 = -54 (1001010) +-27 + -26 = -53 (1001011) +-27 + -25 = -52 (1001100) +-27 + -24 = -51 (1001101) +-27 + -23 = -50 (1001110) +-27 + -22 = -49 (1001111) +-27 + -21 = -48 (1010000) +-27 + -20 = -47 (1010001) +-27 + -19 = -46 (1010010) +-27 + -18 = -45 (1010011) +-27 + -17 = -44 (1010100) +-27 + -16 = -43 (1010101) +-27 + -15 = -42 (1010110) +-27 + -14 = -41 (1010111) +-27 + -13 = -40 (1011000) +-27 + -12 = -39 (1011001) +-27 + -11 = -38 (1011010) +-27 + -10 = -37 (1011011) +-27 + -9 = -36 (1011100) +-27 + -8 = -35 (1011101) +-27 + -7 = -34 (1011110) +-27 + -6 = -33 (1011111) +-27 + -5 = -32 (1100000) +-27 + -4 = -31 (1100001) +-27 + -3 = -30 (1100010) +-27 + -2 = -29 (1100011) +-27 + -1 = -28 (1100100) +-26 + 0 = -26 (1100110) +-26 + 1 = -25 (1100111) +-26 + 2 = -24 (1101000) +-26 + 3 = -23 (1101001) +-26 + 4 = -22 (1101010) +-26 + 5 = -21 (1101011) +-26 + 6 = -20 (1101100) +-26 + 7 = -19 (1101101) +-26 + 8 = -18 (1101110) +-26 + 9 = -17 (1101111) +-26 + 10 = -16 (1110000) +-26 + 11 = -15 (1110001) +-26 + 12 = -14 (1110010) +-26 + 13 = -13 (1110011) +-26 + 14 = -12 (1110100) +-26 + 15 = -11 (1110101) +-26 + 16 = -10 (1110110) +-26 + 17 = -9 (1110111) +-26 + 18 = -8 (1111000) +-26 + 19 = -7 (1111001) +-26 + 20 = -6 (1111010) +-26 + 21 = -5 (1111011) +-26 + 22 = -4 (1111100) +-26 + 23 = -3 (1111101) +-26 + 24 = -2 (1111110) +-26 + 25 = -1 (1111111) +-26 + 26 = 0 (0000000) +-26 + 27 = 1 (0000001) +-26 + 28 = 2 (0000010) +-26 + 29 = 3 (0000011) +-26 + 30 = 4 (0000100) +-26 + 31 = 5 (0000101) +-26 + -32 = -58 (1000110) +-26 + -31 = -57 (1000111) +-26 + -30 = -56 (1001000) +-26 + -29 = -55 (1001001) +-26 + -28 = -54 (1001010) +-26 + -27 = -53 (1001011) +-26 + -26 = -52 (1001100) +-26 + -25 = -51 (1001101) +-26 + -24 = -50 (1001110) +-26 + -23 = -49 (1001111) +-26 + -22 = -48 (1010000) +-26 + -21 = -47 (1010001) +-26 + -20 = -46 (1010010) +-26 + -19 = -45 (1010011) +-26 + -18 = -44 (1010100) +-26 + -17 = -43 (1010101) +-26 + -16 = -42 (1010110) +-26 + -15 = -41 (1010111) +-26 + -14 = -40 (1011000) +-26 + -13 = -39 (1011001) +-26 + -12 = -38 (1011010) +-26 + -11 = -37 (1011011) +-26 + -10 = -36 (1011100) +-26 + -9 = -35 (1011101) +-26 + -8 = -34 (1011110) +-26 + -7 = -33 (1011111) +-26 + -6 = -32 (1100000) +-26 + -5 = -31 (1100001) +-26 + -4 = -30 (1100010) +-26 + -3 = -29 (1100011) +-26 + -2 = -28 (1100100) +-26 + -1 = -27 (1100101) +-25 + 0 = -25 (1100111) +-25 + 1 = -24 (1101000) +-25 + 2 = -23 (1101001) +-25 + 3 = -22 (1101010) +-25 + 4 = -21 (1101011) +-25 + 5 = -20 (1101100) +-25 + 6 = -19 (1101101) +-25 + 7 = -18 (1101110) +-25 + 8 = -17 (1101111) +-25 + 9 = -16 (1110000) +-25 + 10 = -15 (1110001) +-25 + 11 = -14 (1110010) +-25 + 12 = -13 (1110011) +-25 + 13 = -12 (1110100) +-25 + 14 = -11 (1110101) +-25 + 15 = -10 (1110110) +-25 + 16 = -9 (1110111) +-25 + 17 = -8 (1111000) +-25 + 18 = -7 (1111001) +-25 + 19 = -6 (1111010) +-25 + 20 = -5 (1111011) +-25 + 21 = -4 (1111100) +-25 + 22 = -3 (1111101) +-25 + 23 = -2 (1111110) +-25 + 24 = -1 (1111111) +-25 + 25 = 0 (0000000) +-25 + 26 = 1 (0000001) +-25 + 27 = 2 (0000010) +-25 + 28 = 3 (0000011) +-25 + 29 = 4 (0000100) +-25 + 30 = 5 (0000101) +-25 + 31 = 6 (0000110) +-25 + -32 = -57 (1000111) +-25 + -31 = -56 (1001000) +-25 + -30 = -55 (1001001) +-25 + -29 = -54 (1001010) +-25 + -28 = -53 (1001011) +-25 + -27 = -52 (1001100) +-25 + -26 = -51 (1001101) +-25 + -25 = -50 (1001110) +-25 + -24 = -49 (1001111) +-25 + -23 = -48 (1010000) +-25 + -22 = -47 (1010001) +-25 + -21 = -46 (1010010) +-25 + -20 = -45 (1010011) +-25 + -19 = -44 (1010100) +-25 + -18 = -43 (1010101) +-25 + -17 = -42 (1010110) +-25 + -16 = -41 (1010111) +-25 + -15 = -40 (1011000) +-25 + -14 = -39 (1011001) +-25 + -13 = -38 (1011010) +-25 + -12 = -37 (1011011) +-25 + -11 = -36 (1011100) +-25 + -10 = -35 (1011101) +-25 + -9 = -34 (1011110) +-25 + -8 = -33 (1011111) +-25 + -7 = -32 (1100000) +-25 + -6 = -31 (1100001) +-25 + -5 = -30 (1100010) +-25 + -4 = -29 (1100011) +-25 + -3 = -28 (1100100) +-25 + -2 = -27 (1100101) +-25 + -1 = -26 (1100110) +-24 + 0 = -24 (1101000) +-24 + 1 = -23 (1101001) +-24 + 2 = -22 (1101010) +-24 + 3 = -21 (1101011) +-24 + 4 = -20 (1101100) +-24 + 5 = -19 (1101101) +-24 + 6 = -18 (1101110) +-24 + 7 = -17 (1101111) +-24 + 8 = -16 (1110000) +-24 + 9 = -15 (1110001) +-24 + 10 = -14 (1110010) +-24 + 11 = -13 (1110011) +-24 + 12 = -12 (1110100) +-24 + 13 = -11 (1110101) +-24 + 14 = -10 (1110110) +-24 + 15 = -9 (1110111) +-24 + 16 = -8 (1111000) +-24 + 17 = -7 (1111001) +-24 + 18 = -6 (1111010) +-24 + 19 = -5 (1111011) +-24 + 20 = -4 (1111100) +-24 + 21 = -3 (1111101) +-24 + 22 = -2 (1111110) +-24 + 23 = -1 (1111111) +-24 + 24 = 0 (0000000) +-24 + 25 = 1 (0000001) +-24 + 26 = 2 (0000010) +-24 + 27 = 3 (0000011) +-24 + 28 = 4 (0000100) +-24 + 29 = 5 (0000101) +-24 + 30 = 6 (0000110) +-24 + 31 = 7 (0000111) +-24 + -32 = -56 (1001000) +-24 + -31 = -55 (1001001) +-24 + -30 = -54 (1001010) +-24 + -29 = -53 (1001011) +-24 + -28 = -52 (1001100) +-24 + -27 = -51 (1001101) +-24 + -26 = -50 (1001110) +-24 + -25 = -49 (1001111) +-24 + -24 = -48 (1010000) +-24 + -23 = -47 (1010001) +-24 + -22 = -46 (1010010) +-24 + -21 = -45 (1010011) +-24 + -20 = -44 (1010100) +-24 + -19 = -43 (1010101) +-24 + -18 = -42 (1010110) +-24 + -17 = -41 (1010111) +-24 + -16 = -40 (1011000) +-24 + -15 = -39 (1011001) +-24 + -14 = -38 (1011010) +-24 + -13 = -37 (1011011) +-24 + -12 = -36 (1011100) +-24 + -11 = -35 (1011101) +-24 + -10 = -34 (1011110) +-24 + -9 = -33 (1011111) +-24 + -8 = -32 (1100000) +-24 + -7 = -31 (1100001) +-24 + -6 = -30 (1100010) +-24 + -5 = -29 (1100011) +-24 + -4 = -28 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= -12 (1110100) +-22 + 11 = -11 (1110101) +-22 + 12 = -10 (1110110) +-22 + 13 = -9 (1110111) +-22 + 14 = -8 (1111000) +-22 + 15 = -7 (1111001) +-22 + 16 = -6 (1111010) +-22 + 17 = -5 (1111011) +-22 + 18 = -4 (1111100) +-22 + 19 = -3 (1111101) +-22 + 20 = -2 (1111110) +-22 + 21 = -1 (1111111) +-22 + 22 = 0 (0000000) +-22 + 23 = 1 (0000001) +-22 + 24 = 2 (0000010) +-22 + 25 = 3 (0000011) +-22 + 26 = 4 (0000100) +-22 + 27 = 5 (0000101) +-22 + 28 = 6 (0000110) +-22 + 29 = 7 (0000111) +-22 + 30 = 8 (0001000) +-22 + 31 = 9 (0001001) +-22 + -32 = -54 (1001010) +-22 + -31 = -53 (1001011) +-22 + -30 = -52 (1001100) +-22 + -29 = -51 (1001101) +-22 + -28 = -50 (1001110) +-22 + -27 = -49 (1001111) +-22 + -26 = -48 (1010000) +-22 + -25 = -47 (1010001) +-22 + -24 = -46 (1010010) +-22 + -23 = -45 (1010011) +-22 + -22 = -44 (1010100) +-22 + -21 = -43 (1010101) +-22 + -20 = -42 (1010110) +-22 + -19 = -41 (1010111) +-22 + -18 = -40 (1011000) +-22 + -17 = -39 (1011001) +-22 + -16 = -38 (1011010) +-22 + -15 = -37 (1011011) +-22 + -14 = -36 (1011100) +-22 + -13 = -35 (1011101) +-22 + -12 = -34 (1011110) +-22 + -11 = -33 (1011111) +-22 + -10 = -32 (1100000) +-22 + -9 = -31 (1100001) +-22 + -8 = -30 (1100010) +-22 + -7 = -29 (1100011) +-22 + -6 = -28 (1100100) +-22 + -5 = -27 (1100101) +-22 + -4 = -26 (1100110) +-22 + -3 = -25 (1100111) +-22 + -2 = -24 (1101000) +-22 + -1 = -23 (1101001) +-21 + 0 = -21 (1101011) +-21 + 1 = -20 (1101100) +-21 + 2 = -19 (1101101) +-21 + 3 = -18 (1101110) +-21 + 4 = -17 (1101111) +-21 + 5 = -16 (1110000) +-21 + 6 = -15 (1110001) +-21 + 7 = -14 (1110010) +-21 + 8 = -13 (1110011) +-21 + 9 = -12 (1110100) +-21 + 10 = -11 (1110101) +-21 + 11 = -10 (1110110) +-21 + 12 = -9 (1110111) +-21 + 13 = -8 (1111000) +-21 + 14 = -7 (1111001) +-21 + 15 = -6 (1111010) +-21 + 16 = -5 (1111011) +-21 + 17 = -4 (1111100) +-21 + 18 = -3 (1111101) +-21 + 19 = -2 (1111110) +-21 + 20 = -1 (1111111) +-21 + 21 = 0 (0000000) +-21 + 22 = 1 (0000001) +-21 + 23 = 2 (0000010) +-21 + 24 = 3 (0000011) +-21 + 25 = 4 (0000100) +-21 + 26 = 5 (0000101) +-21 + 27 = 6 (0000110) +-21 + 28 = 7 (0000111) +-21 + 29 = 8 (0001000) +-21 + 30 = 9 (0001001) +-21 + 31 = 10 (0001010) +-21 + -32 = -53 (1001011) +-21 + -31 = -52 (1001100) +-21 + -30 = -51 (1001101) +-21 + -29 = -50 (1001110) +-21 + -28 = -49 (1001111) +-21 + -27 = -48 (1010000) +-21 + -26 = -47 (1010001) +-21 + -25 = -46 (1010010) +-21 + -24 = -45 (1010011) +-21 + -23 = -44 (1010100) +-21 + -22 = -43 (1010101) +-21 + -21 = -42 (1010110) +-21 + -20 = -41 (1010111) +-21 + -19 = -40 (1011000) +-21 + -18 = -39 (1011001) +-21 + -17 = -38 (1011010) +-21 + -16 = -37 (1011011) +-21 + -15 = -36 (1011100) +-21 + -14 = -35 (1011101) +-21 + -13 = -34 (1011110) +-21 + -12 = -33 (1011111) +-21 + -11 = -32 (1100000) +-21 + -10 = -31 (1100001) +-21 + -9 = -30 (1100010) +-21 + -8 = -29 (1100011) +-21 + -7 = -28 (1100100) +-21 + -6 = -27 (1100101) +-21 + -5 = -26 (1100110) +-21 + -4 = -25 (1100111) +-21 + -3 = -24 (1101000) +-21 + -2 = -23 (1101001) +-21 + -1 = -22 (1101010) +-20 + 0 = -20 (1101100) +-20 + 1 = -19 (1101101) +-20 + 2 = -18 (1101110) +-20 + 3 = -17 (1101111) +-20 + 4 = -16 (1110000) +-20 + 5 = -15 (1110001) +-20 + 6 = -14 (1110010) +-20 + 7 = -13 (1110011) +-20 + 8 = -12 (1110100) +-20 + 9 = -11 (1110101) +-20 + 10 = -10 (1110110) +-20 + 11 = -9 (1110111) +-20 + 12 = -8 (1111000) +-20 + 13 = -7 (1111001) +-20 + 14 = -6 (1111010) +-20 + 15 = -5 (1111011) +-20 + 16 = -4 (1111100) +-20 + 17 = -3 (1111101) +-20 + 18 = -2 (1111110) +-20 + 19 = -1 (1111111) +-20 + 20 = 0 (0000000) +-20 + 21 = 1 (0000001) +-20 + 22 = 2 (0000010) +-20 + 23 = 3 (0000011) +-20 + 24 = 4 (0000100) +-20 + 25 = 5 (0000101) +-20 + 26 = 6 (0000110) +-20 + 27 = 7 (0000111) +-20 + 28 = 8 (0001000) +-20 + 29 = 9 (0001001) +-20 + 30 = 10 (0001010) +-20 + 31 = 11 (0001011) +-20 + -32 = -52 (1001100) +-20 + -31 = -51 (1001101) +-20 + -30 = -50 (1001110) +-20 + -29 = -49 (1001111) +-20 + -28 = -48 (1010000) +-20 + -27 = -47 (1010001) +-20 + -26 = -46 (1010010) +-20 + -25 = -45 (1010011) +-20 + -24 = -44 (1010100) +-20 + -23 = -43 (1010101) +-20 + -22 = -42 (1010110) +-20 + -21 = -41 (1010111) +-20 + -20 = -40 (1011000) +-20 + -19 = -39 (1011001) +-20 + -18 = -38 (1011010) +-20 + -17 = -37 (1011011) +-20 + -16 = -36 (1011100) +-20 + -15 = -35 (1011101) +-20 + -14 = -34 (1011110) +-20 + -13 = -33 (1011111) +-20 + -12 = -32 (1100000) +-20 + -11 = -31 (1100001) +-20 + -10 = -30 (1100010) +-20 + -9 = -29 (1100011) +-20 + -8 = -28 (1100100) +-20 + -7 = -27 (1100101) +-20 + -6 = -26 (1100110) +-20 + -5 = -25 (1100111) +-20 + -4 = -24 (1101000) +-20 + -3 = -23 (1101001) +-20 + -2 = -22 (1101010) +-20 + -1 = -21 (1101011) +-19 + 0 = -19 (1101101) +-19 + 1 = -18 (1101110) +-19 + 2 = -17 (1101111) +-19 + 3 = -16 (1110000) +-19 + 4 = -15 (1110001) +-19 + 5 = -14 (1110010) +-19 + 6 = -13 (1110011) +-19 + 7 = -12 (1110100) +-19 + 8 = -11 (1110101) +-19 + 9 = -10 (1110110) +-19 + 10 = -9 (1110111) +-19 + 11 = -8 (1111000) +-19 + 12 = -7 (1111001) +-19 + 13 = -6 (1111010) +-19 + 14 = -5 (1111011) +-19 + 15 = -4 (1111100) +-19 + 16 = -3 (1111101) +-19 + 17 = -2 (1111110) +-19 + 18 = -1 (1111111) +-19 + 19 = 0 (0000000) +-19 + 20 = 1 (0000001) +-19 + 21 = 2 (0000010) +-19 + 22 = 3 (0000011) +-19 + 23 = 4 (0000100) +-19 + 24 = 5 (0000101) +-19 + 25 = 6 (0000110) +-19 + 26 = 7 (0000111) +-19 + 27 = 8 (0001000) +-19 + 28 = 9 (0001001) +-19 + 29 = 10 (0001010) +-19 + 30 = 11 (0001011) +-19 + 31 = 12 (0001100) +-19 + -32 = -51 (1001101) +-19 + -31 = -50 (1001110) +-19 + -30 = -49 (1001111) +-19 + -29 = -48 (1010000) +-19 + -28 = -47 (1010001) +-19 + -27 = -46 (1010010) +-19 + -26 = -45 (1010011) +-19 + -25 = -44 (1010100) +-19 + -24 = -43 (1010101) +-19 + -23 = -42 (1010110) +-19 + -22 = -41 (1010111) +-19 + -21 = -40 (1011000) +-19 + -20 = -39 (1011001) +-19 + -19 = -38 (1011010) +-19 + -18 = -37 (1011011) +-19 + -17 = -36 (1011100) +-19 + -16 = -35 (1011101) +-19 + -15 = -34 (1011110) +-19 + -14 = -33 (1011111) +-19 + -13 = -32 (1100000) +-19 + -12 = -31 (1100001) +-19 + -11 = -30 (1100010) +-19 + -10 = -29 (1100011) +-19 + -9 = -28 (1100100) +-19 + -8 = -27 (1100101) +-19 + -7 = -26 (1100110) +-19 + -6 = -25 (1100111) +-19 + -5 = -24 (1101000) +-19 + -4 = -23 (1101001) +-19 + -3 = -22 (1101010) +-19 + -2 = -21 (1101011) +-19 + -1 = -20 (1101100) +-18 + 0 = -18 (1101110) +-18 + 1 = -17 (1101111) +-18 + 2 = -16 (1110000) +-18 + 3 = -15 (1110001) +-18 + 4 = -14 (1110010) +-18 + 5 = -13 (1110011) +-18 + 6 = -12 (1110100) +-18 + 7 = -11 (1110101) +-18 + 8 = -10 (1110110) +-18 + 9 = -9 (1110111) +-18 + 10 = -8 (1111000) +-18 + 11 = -7 (1111001) +-18 + 12 = -6 (1111010) +-18 + 13 = -5 (1111011) +-18 + 14 = -4 (1111100) +-18 + 15 = -3 (1111101) +-18 + 16 = -2 (1111110) +-18 + 17 = -1 (1111111) +-18 + 18 = 0 (0000000) +-18 + 19 = 1 (0000001) +-18 + 20 = 2 (0000010) +-18 + 21 = 3 (0000011) +-18 + 22 = 4 (0000100) +-18 + 23 = 5 (0000101) +-18 + 24 = 6 (0000110) +-18 + 25 = 7 (0000111) +-18 + 26 = 8 (0001000) +-18 + 27 = 9 (0001001) +-18 + 28 = 10 (0001010) +-18 + 29 = 11 (0001011) +-18 + 30 = 12 (0001100) +-18 + 31 = 13 (0001101) +-18 + -32 = -50 (1001110) +-18 + -31 = -49 (1001111) +-18 + -30 = -48 (1010000) +-18 + -29 = -47 (1010001) +-18 + -28 = -46 (1010010) +-18 + -27 = -45 (1010011) +-18 + -26 = -44 (1010100) +-18 + -25 = -43 (1010101) +-18 + -24 = -42 (1010110) +-18 + -23 = -41 (1010111) +-18 + -22 = -40 (1011000) +-18 + -21 = -39 (1011001) +-18 + -20 = -38 (1011010) +-18 + -19 = -37 (1011011) +-18 + -18 = -36 (1011100) +-18 + -17 = -35 (1011101) +-18 + -16 = -34 (1011110) +-18 + -15 = -33 (1011111) +-18 + -14 = -32 (1100000) +-18 + -13 = -31 (1100001) +-18 + -12 = -30 (1100010) +-18 + -11 = -29 (1100011) +-18 + -10 = -28 (1100100) +-18 + -9 = -27 (1100101) +-18 + -8 = -26 (1100110) +-18 + -7 = -25 (1100111) +-18 + -6 = -24 (1101000) +-18 + -5 = -23 (1101001) +-18 + -4 = -22 (1101010) +-18 + -3 = -21 (1101011) +-18 + -2 = -20 (1101100) +-18 + -1 = -19 (1101101) +-17 + 0 = -17 (1101111) +-17 + 1 = -16 (1110000) +-17 + 2 = -15 (1110001) +-17 + 3 = -14 (1110010) +-17 + 4 = -13 (1110011) +-17 + 5 = -12 (1110100) +-17 + 6 = -11 (1110101) +-17 + 7 = -10 (1110110) +-17 + 8 = -9 (1110111) +-17 + 9 = -8 (1111000) +-17 + 10 = -7 (1111001) +-17 + 11 = -6 (1111010) +-17 + 12 = -5 (1111011) +-17 + 13 = -4 (1111100) +-17 + 14 = -3 (1111101) +-17 + 15 = -2 (1111110) +-17 + 16 = -1 (1111111) +-17 + 17 = 0 (0000000) +-17 + 18 = 1 (0000001) +-17 + 19 = 2 (0000010) +-17 + 20 = 3 (0000011) +-17 + 21 = 4 (0000100) +-17 + 22 = 5 (0000101) +-17 + 23 = 6 (0000110) +-17 + 24 = 7 (0000111) +-17 + 25 = 8 (0001000) +-17 + 26 = 9 (0001001) +-17 + 27 = 10 (0001010) +-17 + 28 = 11 (0001011) +-17 + 29 = 12 (0001100) +-17 + 30 = 13 (0001101) +-17 + 31 = 14 (0001110) +-17 + -32 = -49 (1001111) +-17 + -31 = -48 (1010000) +-17 + -30 = -47 (1010001) +-17 + -29 = -46 (1010010) +-17 + -28 = -45 (1010011) +-17 + -27 = -44 (1010100) +-17 + -26 = -43 (1010101) +-17 + -25 = -42 (1010110) +-17 + -24 = -41 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15 = -1 (1111111) +-16 + 16 = 0 (0000000) +-16 + 17 = 1 (0000001) +-16 + 18 = 2 (0000010) +-16 + 19 = 3 (0000011) +-16 + 20 = 4 (0000100) +-16 + 21 = 5 (0000101) +-16 + 22 = 6 (0000110) +-16 + 23 = 7 (0000111) +-16 + 24 = 8 (0001000) +-16 + 25 = 9 (0001001) +-16 + 26 = 10 (0001010) +-16 + 27 = 11 (0001011) +-16 + 28 = 12 (0001100) +-16 + 29 = 13 (0001101) +-16 + 30 = 14 (0001110) +-16 + 31 = 15 (0001111) +-16 + -32 = -48 (1010000) +-16 + -31 = -47 (1010001) +-16 + -30 = -46 (1010010) +-16 + -29 = -45 (1010011) +-16 + -28 = -44 (1010100) +-16 + -27 = -43 (1010101) +-16 + -26 = -42 (1010110) +-16 + -25 = -41 (1010111) +-16 + -24 = -40 (1011000) +-16 + -23 = -39 (1011001) +-16 + -22 = -38 (1011010) +-16 + -21 = -37 (1011011) +-16 + -20 = -36 (1011100) +-16 + -19 = -35 (1011101) +-16 + -18 = -34 (1011110) +-16 + -17 = -33 (1011111) +-16 + -16 = -32 (1100000) +-16 + -15 = -31 (1100001) +-16 + -14 = -30 (1100010) +-16 + -13 = -29 (1100011) +-16 + -12 = -28 (1100100) +-16 + -11 = -27 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(0001110) +-15 + 30 = 15 (0001111) +-15 + 31 = 16 (0010000) +-15 + -32 = -47 (1010001) +-15 + -31 = -46 (1010010) +-15 + -30 = -45 (1010011) +-15 + -29 = -44 (1010100) +-15 + -28 = -43 (1010101) +-15 + -27 = -42 (1010110) +-15 + -26 = -41 (1010111) +-15 + -25 = -40 (1011000) +-15 + -24 = -39 (1011001) +-15 + -23 = -38 (1011010) +-15 + -22 = -37 (1011011) +-15 + -21 = -36 (1011100) +-15 + -20 = -35 (1011101) +-15 + -19 = -34 (1011110) +-15 + -18 = -33 (1011111) +-15 + -17 = -32 (1100000) +-15 + -16 = -31 (1100001) +-15 + -15 = -30 (1100010) +-15 + -14 = -29 (1100011) +-15 + -13 = -28 (1100100) +-15 + -12 = -27 (1100101) +-15 + -11 = -26 (1100110) +-15 + -10 = -25 (1100111) +-15 + -9 = -24 (1101000) +-15 + -8 = -23 (1101001) +-15 + -7 = -22 (1101010) +-15 + -6 = -21 (1101011) +-15 + -5 = -20 (1101100) +-15 + -4 = -19 (1101101) +-15 + -3 = -18 (1101110) +-15 + -2 = -17 (1101111) +-15 + -1 = -16 (1110000) +-14 + 0 = -14 (1110010) +-14 + 1 = -13 (1110011) +-14 + 2 = -12 (1110100) +-14 + 3 = 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18 = 5 (0000101) +-13 + 19 = 6 (0000110) +-13 + 20 = 7 (0000111) +-13 + 21 = 8 (0001000) +-13 + 22 = 9 (0001001) +-13 + 23 = 10 (0001010) +-13 + 24 = 11 (0001011) +-13 + 25 = 12 (0001100) +-13 + 26 = 13 (0001101) +-13 + 27 = 14 (0001110) +-13 + 28 = 15 (0001111) +-13 + 29 = 16 (0010000) +-13 + 30 = 17 (0010001) +-13 + 31 = 18 (0010010) +-13 + -32 = -45 (1010011) +-13 + -31 = -44 (1010100) +-13 + -30 = -43 (1010101) +-13 + -29 = -42 (1010110) +-13 + -28 = -41 (1010111) +-13 + -27 = -40 (1011000) +-13 + -26 = -39 (1011001) +-13 + -25 = -38 (1011010) +-13 + -24 = -37 (1011011) +-13 + -23 = -36 (1011100) +-13 + -22 = -35 (1011101) +-13 + -21 = -34 (1011110) +-13 + -20 = -33 (1011111) +-13 + -19 = -32 (1100000) +-13 + -18 = -31 (1100001) +-13 + -17 = -30 (1100010) +-13 + -16 = -29 (1100011) +-13 + -15 = -28 (1100100) +-13 + -14 = -27 (1100101) +-13 + -13 = -26 (1100110) +-13 + -12 = -25 (1100111) +-13 + -11 = -24 (1101000) +-13 + -10 = -23 (1101001) +-13 + -9 = -22 (1101010) +-13 + -8 = -21 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(1111011) +-11 + 7 = -4 (1111100) +-11 + 8 = -3 (1111101) +-11 + 9 = -2 (1111110) +-11 + 10 = -1 (1111111) +-11 + 11 = 0 (0000000) +-11 + 12 = 1 (0000001) +-11 + 13 = 2 (0000010) +-11 + 14 = 3 (0000011) +-11 + 15 = 4 (0000100) +-11 + 16 = 5 (0000101) +-11 + 17 = 6 (0000110) +-11 + 18 = 7 (0000111) +-11 + 19 = 8 (0001000) +-11 + 20 = 9 (0001001) +-11 + 21 = 10 (0001010) +-11 + 22 = 11 (0001011) +-11 + 23 = 12 (0001100) +-11 + 24 = 13 (0001101) +-11 + 25 = 14 (0001110) +-11 + 26 = 15 (0001111) +-11 + 27 = 16 (0010000) +-11 + 28 = 17 (0010001) +-11 + 29 = 18 (0010010) +-11 + 30 = 19 (0010011) +-11 + 31 = 20 (0010100) +-11 + -32 = -43 (1010101) +-11 + -31 = -42 (1010110) +-11 + -30 = -41 (1010111) +-11 + -29 = -40 (1011000) +-11 + -28 = -39 (1011001) +-11 + -27 = -38 (1011010) +-11 + -26 = -37 (1011011) +-11 + -25 = -36 (1011100) +-11 + -24 = -35 (1011101) +-11 + -23 = -34 (1011110) +-11 + -22 = -33 (1011111) +-11 + -21 = -32 (1100000) +-11 + -20 = -31 (1100001) +-11 + -19 = -30 (1100010) +-11 + -18 = -29 (1100011) +-11 + -17 = -28 (1100100) +-11 + -16 = -27 (1100101) +-11 + -15 = -26 (1100110) +-11 + -14 = -25 (1100111) +-11 + -13 = -24 (1101000) +-11 + -12 = -23 (1101001) +-11 + -11 = -22 (1101010) +-11 + -10 = -21 (1101011) +-11 + -9 = -20 (1101100) +-11 + -8 = -19 (1101101) +-11 + -7 = -18 (1101110) +-11 + -6 = -17 (1101111) +-11 + -5 = -16 (1110000) +-11 + -4 = -15 (1110001) +-11 + -3 = -14 (1110010) +-11 + -2 = -13 (1110011) +-11 + -1 = -12 (1110100) +-10 + 0 = -10 (1110110) +-10 + 1 = -9 (1110111) +-10 + 2 = -8 (1111000) +-10 + 3 = -7 (1111001) +-10 + 4 = -6 (1111010) +-10 + 5 = -5 (1111011) +-10 + 6 = -4 (1111100) +-10 + 7 = -3 (1111101) +-10 + 8 = -2 (1111110) +-10 + 9 = -1 (1111111) +-10 + 10 = 0 (0000000) +-10 + 11 = 1 (0000001) +-10 + 12 = 2 (0000010) +-10 + 13 = 3 (0000011) +-10 + 14 = 4 (0000100) +-10 + 15 = 5 (0000101) +-10 + 16 = 6 (0000110) +-10 + 17 = 7 (0000111) +-10 + 18 = 8 (0001000) +-10 + 19 = 9 (0001001) +-10 + 20 = 10 (0001010) +-10 + 21 = 11 (0001011) +-10 + 22 = 12 (0001100) +-10 + 23 = 13 (0001101) +-10 + 24 = 14 (0001110) +-10 + 25 = 15 (0001111) +-10 + 26 = 16 (0010000) +-10 + 27 = 17 (0010001) +-10 + 28 = 18 (0010010) +-10 + 29 = 19 (0010011) +-10 + 30 = 20 (0010100) +-10 + 31 = 21 (0010101) +-10 + -32 = -42 (1010110) +-10 + -31 = -41 (1010111) +-10 + -30 = -40 (1011000) +-10 + -29 = -39 (1011001) +-10 + -28 = -38 (1011010) +-10 + -27 = -37 (1011011) +-10 + -26 = -36 (1011100) +-10 + -25 = -35 (1011101) +-10 + -24 = -34 (1011110) +-10 + -23 = -33 (1011111) +-10 + -22 = -32 (1100000) +-10 + -21 = -31 (1100001) +-10 + -20 = -30 (1100010) +-10 + -19 = -29 (1100011) +-10 + -18 = -28 (1100100) +-10 + -17 = -27 (1100101) +-10 + -16 = -26 (1100110) +-10 + -15 = -25 (1100111) +-10 + -14 = -24 (1101000) +-10 + -13 = -23 (1101001) +-10 + -12 = -22 (1101010) +-10 + -11 = -21 (1101011) +-10 + -10 = -20 (1101100) +-10 + -9 = -19 (1101101) +-10 + -8 = -18 (1101110) +-10 + -7 = -17 (1101111) +-10 + -6 = -16 (1110000) +-10 + -5 = -15 (1110001) +-10 + -4 = -14 (1110010) +-10 + -3 = -13 (1110011) +-10 + -2 = -12 (1110100) +-10 + -1 = -11 (1110101) +-9 + 0 = -9 (1110111) +-9 + 1 = -8 (1111000) +-9 + 2 = -7 (1111001) +-9 + 3 = -6 (1111010) +-9 + 4 = -5 (1111011) +-9 + 5 = -4 (1111100) +-9 + 6 = -3 (1111101) +-9 + 7 = -2 (1111110) +-9 + 8 = -1 (1111111) +-9 + 9 = 0 (0000000) +-9 + 10 = 1 (0000001) +-9 + 11 = 2 (0000010) +-9 + 12 = 3 (0000011) +-9 + 13 = 4 (0000100) +-9 + 14 = 5 (0000101) +-9 + 15 = 6 (0000110) +-9 + 16 = 7 (0000111) +-9 + 17 = 8 (0001000) +-9 + 18 = 9 (0001001) +-9 + 19 = 10 (0001010) +-9 + 20 = 11 (0001011) +-9 + 21 = 12 (0001100) +-9 + 22 = 13 (0001101) +-9 + 23 = 14 (0001110) +-9 + 24 = 15 (0001111) +-9 + 25 = 16 (0010000) +-9 + 26 = 17 (0010001) +-9 + 27 = 18 (0010010) +-9 + 28 = 19 (0010011) +-9 + 29 = 20 (0010100) +-9 + 30 = 21 (0010101) +-9 + 31 = 22 (0010110) +-9 + -32 = -41 (1010111) +-9 + -31 = -40 (1011000) +-9 + -30 = -39 (1011001) +-9 + -29 = -38 (1011010) +-9 + -28 = -37 (1011011) +-9 + -27 = -36 (1011100) +-9 + -26 = -35 (1011101) +-9 + -25 = -34 (1011110) +-9 + -24 = -33 (1011111) +-9 + -23 = -32 (1100000) +-9 + -22 = -31 (1100001) +-9 + -21 = -30 (1100010) +-9 + -20 = -29 (1100011) +-9 + -19 = -28 (1100100) +-9 + -18 = -27 (1100101) +-9 + -17 = -26 (1100110) +-9 + -16 = -25 (1100111) +-9 + -15 = -24 (1101000) +-9 + -14 = -23 (1101001) +-9 + -13 = -22 (1101010) +-9 + -12 = -21 (1101011) +-9 + -11 = -20 (1101100) +-9 + -10 = -19 (1101101) +-9 + -9 = -18 (1101110) +-9 + -8 = -17 (1101111) +-9 + -7 = -16 (1110000) +-9 + -6 = -15 (1110001) +-9 + -5 = -14 (1110010) +-9 + -4 = -13 (1110011) +-9 + -3 = -12 (1110100) +-9 + -2 = -11 (1110101) +-9 + -1 = -10 (1110110) +-8 + 0 = -8 (1111000) +-8 + 1 = -7 (1111001) +-8 + 2 = -6 (1111010) +-8 + 3 = -5 (1111011) +-8 + 4 = -4 (1111100) +-8 + 5 = -3 (1111101) +-8 + 6 = -2 (1111110) +-8 + 7 = -1 (1111111) +-8 + 8 = 0 (0000000) +-8 + 9 = 1 (0000001) +-8 + 10 = 2 (0000010) +-8 + 11 = 3 (0000011) +-8 + 12 = 4 (0000100) +-8 + 13 = 5 (0000101) +-8 + 14 = 6 (0000110) +-8 + 15 = 7 (0000111) +-8 + 16 = 8 (0001000) +-8 + 17 = 9 (0001001) +-8 + 18 = 10 (0001010) +-8 + 19 = 11 (0001011) +-8 + 20 = 12 (0001100) +-8 + 21 = 13 (0001101) +-8 + 22 = 14 (0001110) +-8 + 23 = 15 (0001111) +-8 + 24 = 16 (0010000) +-8 + 25 = 17 (0010001) +-8 + 26 = 18 (0010010) +-8 + 27 = 19 (0010011) +-8 + 28 = 20 (0010100) +-8 + 29 = 21 (0010101) +-8 + 30 = 22 (0010110) +-8 + 31 = 23 (0010111) +-8 + -32 = -40 (1011000) +-8 + -31 = -39 (1011001) +-8 + -30 = -38 (1011010) +-8 + -29 = -37 (1011011) +-8 + -28 = -36 (1011100) +-8 + -27 = -35 (1011101) +-8 + -26 = -34 (1011110) +-8 + -25 = -33 (1011111) +-8 + -24 = -32 (1100000) +-8 + -23 = -31 (1100001) +-8 + -22 = -30 (1100010) +-8 + -21 = -29 (1100011) +-8 + -20 = -28 (1100100) +-8 + -19 = -27 (1100101) +-8 + -18 = -26 (1100110) +-8 + -17 = -25 (1100111) +-8 + -16 = -24 (1101000) +-8 + -15 = -23 (1101001) +-8 + -14 = -22 (1101010) +-8 + -13 = -21 (1101011) +-8 + -12 = -20 (1101100) +-8 + -11 = -19 (1101101) +-8 + -10 = -18 (1101110) +-8 + -9 = -17 (1101111) +-8 + -8 = -16 (1110000) +-8 + -7 = -15 (1110001) +-8 + -6 = -14 (1110010) +-8 + -5 = -13 (1110011) +-8 + -4 = -12 (1110100) +-8 + -3 = -11 (1110101) +-8 + -2 = -10 (1110110) +-8 + -1 = -9 (1110111) +-7 + 0 = -7 (1111001) +-7 + 1 = -6 (1111010) +-7 + 2 = -5 (1111011) +-7 + 3 = -4 (1111100) +-7 + 4 = -3 (1111101) +-7 + 5 = -2 (1111110) +-7 + 6 = -1 (1111111) +-7 + 7 = 0 (0000000) +-7 + 8 = 1 (0000001) +-7 + 9 = 2 (0000010) +-7 + 10 = 3 (0000011) +-7 + 11 = 4 (0000100) +-7 + 12 = 5 (0000101) +-7 + 13 = 6 (0000110) +-7 + 14 = 7 (0000111) +-7 + 15 = 8 (0001000) +-7 + 16 = 9 (0001001) +-7 + 17 = 10 (0001010) +-7 + 18 = 11 (0001011) +-7 + 19 = 12 (0001100) +-7 + 20 = 13 (0001101) +-7 + 21 = 14 (0001110) +-7 + 22 = 15 (0001111) +-7 + 23 = 16 (0010000) +-7 + 24 = 17 (0010001) +-7 + 25 = 18 (0010010) +-7 + 26 = 19 (0010011) +-7 + 27 = 20 (0010100) +-7 + 28 = 21 (0010101) +-7 + 29 = 22 (0010110) +-7 + 30 = 23 (0010111) +-7 + 31 = 24 (0011000) +-7 + -32 = -39 (1011001) +-7 + -31 = -38 (1011010) +-7 + -30 = -37 (1011011) +-7 + -29 = -36 (1011100) +-7 + -28 = -35 (1011101) +-7 + -27 = -34 (1011110) +-7 + -26 = -33 (1011111) +-7 + -25 = -32 (1100000) +-7 + -24 = -31 (1100001) +-7 + -23 = -30 (1100010) +-7 + -22 = -29 (1100011) +-7 + -21 = -28 (1100100) +-7 + -20 = -27 (1100101) +-7 + -19 = -26 (1100110) +-7 + -18 = -25 (1100111) +-7 + -17 = -24 (1101000) +-7 + -16 = -23 (1101001) +-7 + -15 = -22 (1101010) +-7 + -14 = -21 (1101011) +-7 + -13 = -20 (1101100) +-7 + -12 = -19 (1101101) +-7 + -11 = -18 (1101110) +-7 + -10 = -17 (1101111) +-7 + -9 = -16 (1110000) +-7 + -8 = -15 (1110001) +-7 + -7 = -14 (1110010) +-7 + -6 = -13 (1110011) +-7 + -5 = -12 (1110100) +-7 + -4 = -11 (1110101) +-7 + -3 = -10 (1110110) +-7 + -2 = -9 (1110111) +-7 + -1 = -8 (1111000) +-6 + 0 = -6 (1111010) +-6 + 1 = -5 (1111011) +-6 + 2 = -4 (1111100) +-6 + 3 = -3 (1111101) +-6 + 4 = -2 (1111110) +-6 + 5 = -1 (1111111) +-6 + 6 = 0 (0000000) +-6 + 7 = 1 (0000001) +-6 + 8 = 2 (0000010) +-6 + 9 = 3 (0000011) +-6 + 10 = 4 (0000100) +-6 + 11 = 5 (0000101) +-6 + 12 = 6 (0000110) +-6 + 13 = 7 (0000111) +-6 + 14 = 8 (0001000) +-6 + 15 = 9 (0001001) +-6 + 16 = 10 (0001010) +-6 + 17 = 11 (0001011) +-6 + 18 = 12 (0001100) +-6 + 19 = 13 (0001101) +-6 + 20 = 14 (0001110) +-6 + 21 = 15 (0001111) +-6 + 22 = 16 (0010000) +-6 + 23 = 17 (0010001) +-6 + 24 = 18 (0010010) +-6 + 25 = 19 (0010011) +-6 + 26 = 20 (0010100) +-6 + 27 = 21 (0010101) +-6 + 28 = 22 (0010110) +-6 + 29 = 23 (0010111) +-6 + 30 = 24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + -16 = -22 (1101010) +-6 + -15 = -21 (1101011) +-6 + -14 = -20 (1101100) +-6 + -13 = -19 (1101101) +-6 + -12 = -18 (1101110) +-6 + -11 = -17 (1101111) +-6 + -10 = -16 (1110000) +-6 + -9 = -15 (1110001) +-6 + -8 = -14 (1110010) +-6 + -7 = -13 (1110011) +-6 + -6 = -12 (1110100) +-6 + -5 = -11 (1110101) +-6 + -4 = -10 (1110110) +-6 + -3 = -9 (1110111) +-6 + -2 = -8 (1111000) +-6 + -1 = -7 (1111001) +-5 + 0 = -5 (1111011) +-5 + 1 = -4 (1111100) +-5 + 2 = -3 (1111101) +-5 + 3 = -2 (1111110) +-5 + 4 = -1 (1111111) +-5 + 5 = 0 (0000000) +-5 + 6 = 1 (0000001) +-5 + 7 = 2 (0000010) +-5 + 8 = 3 (0000011) +-5 + 9 = 4 (0000100) +-5 + 10 = 5 (0000101) +-5 + 11 = 6 (0000110) +-5 + 12 = 7 (0000111) +-5 + 13 = 8 (0001000) +-5 + 14 = 9 (0001001) +-5 + 15 = 10 (0001010) +-5 + 16 = 11 (0001011) +-5 + 17 = 12 (0001100) +-5 + 18 = 13 (0001101) +-5 + 19 = 14 (0001110) +-5 + 20 = 15 (0001111) +-5 + 21 = 16 (0010000) +-5 + 22 = 17 (0010001) +-5 + 23 = 18 (0010010) +-5 + 24 = 19 (0010011) +-5 + 25 = 20 (0010100) +-5 + 26 = 21 (0010101) +-5 + 27 = 22 (0010110) +-5 + 28 = 23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 + 1 = -3 (1111101) +-4 + 2 = -2 (1111110) +-4 + 3 = -1 (1111111) +-4 + 4 = 0 (0000000) +-4 + 5 = 1 (0000001) +-4 + 6 = 2 (0000010) +-4 + 7 = 3 (0000011) +-4 + 8 = 4 (0000100) +-4 + 9 = 5 (0000101) +-4 + 10 = 6 (0000110) +-4 + 11 = 7 (0000111) +-4 + 12 = 8 (0001000) +-4 + 13 = 9 (0001001) +-4 + 14 = 10 (0001010) +-4 + 15 = 11 (0001011) +-4 + 16 = 12 (0001100) +-4 + 17 = 13 (0001101) +-4 + 18 = 14 (0001110) +-4 + 19 = 15 (0001111) +-4 + 20 = 16 (0010000) +-4 + 21 = 17 (0010001) +-4 + 22 = 18 (0010010) +-4 + 23 = 19 (0010011) +-4 + 24 = 20 (0010100) +-4 + 25 = 21 (0010101) +-4 + 26 = 22 (0010110) +-4 + 27 = 23 (0010111) +-4 + 28 = 24 (0011000) +-4 + 29 = 25 (0011001) +-4 + 30 = 26 (0011010) +-4 + 31 = 27 (0011011) +-4 + -32 = -36 (1011100) +-4 + -31 = -35 (1011101) +-4 + -30 = -34 (1011110) +-4 + -29 = -33 (1011111) +-4 + -28 = -32 (1100000) +-4 + -27 = -31 (1100001) +-4 + -26 = -30 (1100010) +-4 + -25 = -29 (1100011) +-4 + -24 = -28 (1100100) +-4 + -23 = -27 (1100101) +-4 + -22 = -26 (1100110) +-4 + -21 = -25 (1100111) +-4 + -20 = -24 (1101000) +-4 + -19 = -23 (1101001) +-4 + -18 = -22 (1101010) +-4 + -17 = -21 (1101011) +-4 + -16 = -20 (1101100) +-4 + -15 = -19 (1101101) +-4 + -14 = -18 (1101110) +-4 + -13 = -17 (1101111) +-4 + -12 = -16 (1110000) +-4 + -11 = -15 (1110001) +-4 + -10 = -14 (1110010) +-4 + -9 = -13 (1110011) +-4 + -8 = -12 (1110100) +-4 + -7 = -11 (1110101) +-4 + -6 = -10 (1110110) +-4 + -5 = -9 (1110111) +-4 + -4 = -8 (1111000) +-4 + -3 = -7 (1111001) +-4 + -2 = -6 (1111010) +-4 + -1 = -5 (1111011) +-3 + 0 = -3 (1111101) +-3 + 1 = -2 (1111110) +-3 + 2 = -1 (1111111) +-3 + 3 = 0 (0000000) +-3 + 4 = 1 (0000001) +-3 + 5 = 2 (0000010) +-3 + 6 = 3 (0000011) +-3 + 7 = 4 (0000100) +-3 + 8 = 5 (0000101) +-3 + 9 = 6 (0000110) +-3 + 10 = 7 (0000111) +-3 + 11 = 8 (0001000) +-3 + 12 = 9 (0001001) +-3 + 13 = 10 (0001010) +-3 + 14 = 11 (0001011) +-3 + 15 = 12 (0001100) +-3 + 16 = 13 (0001101) +-3 + 17 = 14 (0001110) +-3 + 18 = 15 (0001111) +-3 + 19 = 16 (0010000) +-3 + 20 = 17 (0010001) +-3 + 21 = 18 (0010010) +-3 + 22 = 19 (0010011) +-3 + 23 = 20 (0010100) +-3 + 24 = 21 (0010101) +-3 + 25 = 22 (0010110) +-3 + 26 = 23 (0010111) +-3 + 27 = 24 (0011000) +-3 + 28 = 25 (0011001) +-3 + 29 = 26 (0011010) +-3 + 30 = 27 (0011011) +-3 + 31 = 28 (0011100) +-3 + -32 = -35 (1011101) +-3 + -31 = -34 (1011110) +-3 + -30 = -33 (1011111) +-3 + -29 = -32 (1100000) +-3 + -28 = -31 (1100001) +-3 + -27 = -30 (1100010) +-3 + -26 = -29 (1100011) +-3 + -25 = -28 (1100100) +-3 + -24 = -27 (1100101) +-3 + -23 = -26 (1100110) +-3 + -22 = -25 (1100111) +-3 + -21 = -24 (1101000) +-3 + -20 = -23 (1101001) +-3 + -19 = -22 (1101010) +-3 + -18 = -21 (1101011) +-3 + -17 = -20 (1101100) +-3 + -16 = -19 (1101101) +-3 + -15 = -18 (1101110) +-3 + -14 = -17 (1101111) +-3 + -13 = -16 (1110000) +-3 + -12 = -15 (1110001) +-3 + -11 = -14 (1110010) +-3 + -10 = -13 (1110011) +-3 + -9 = -12 (1110100) +-3 + -8 = -11 (1110101) +-3 + -7 = -10 (1110110) +-3 + -6 = -9 (1110111) +-3 + -5 = -8 (1111000) +-3 + -4 = -7 (1111001) +-3 + -3 = -6 (1111010) +-3 + -2 = -5 (1111011) +-3 + -1 = -4 (1111100) +-2 + 0 = -2 (1111110) +-2 + 1 = -1 (1111111) +-2 + 2 = 0 (0000000) +-2 + 3 = 1 (0000001) +-2 + 4 = 2 (0000010) +-2 + 5 = 3 (0000011) +-2 + 6 = 4 (0000100) +-2 + 7 = 5 (0000101) +-2 + 8 = 6 (0000110) +-2 + 9 = 7 (0000111) +-2 + 10 = 8 (0001000) +-2 + 11 = 9 (0001001) +-2 + 12 = 10 (0001010) +-2 + 13 = 11 (0001011) +-2 + 14 = 12 (0001100) +-2 + 15 = 13 (0001101) +-2 + 16 = 14 (0001110) +-2 + 17 = 15 (0001111) +-2 + 18 = 16 (0010000) +-2 + 19 = 17 (0010001) +-2 + 20 = 18 (0010010) +-2 + 21 = 19 (0010011) +-2 + 22 = 20 (0010100) +-2 + 23 = 21 (0010101) +-2 + 24 = 22 (0010110) +-2 + 25 = 23 (0010111) +-2 + 26 = 24 (0011000) +-2 + 27 = 25 (0011001) +-2 + 28 = 26 (0011010) +-2 + 29 = 27 (0011011) +-2 + 30 = 28 (0011100) +-2 + 31 = 29 (0011101) +-2 + -32 = -34 (1011110) +-2 + -31 = -33 (1011111) +-2 + -30 = -32 (1100000) +-2 + -29 = -31 (1100001) +-2 + -28 = -30 (1100010) +-2 + -27 = -29 (1100011) +-2 + -26 = -28 (1100100) +-2 + -25 = -27 (1100101) +-2 + -24 = -26 (1100110) +-2 + -23 = -25 (1100111) +-2 + -22 = -24 (1101000) +-2 + -21 = -23 (1101001) +-2 + -20 = -22 (1101010) +-2 + -19 = -21 (1101011) +-2 + -18 = -20 (1101100) +-2 + -17 = -19 (1101101) +-2 + -16 = -18 (1101110) +-2 + -15 = -17 (1101111) +-2 + -14 = -16 (1110000) +-2 + -13 = -15 (1110001) +-2 + -12 = -14 (1110010) +-2 + -11 = -13 (1110011) +-2 + -10 = -12 (1110100) +-2 + -9 = -11 (1110101) +-2 + -8 = -10 (1110110) +-2 + -7 = -9 (1110111) +-2 + -6 = -8 (1111000) +-2 + -5 = -7 (1111001) +-2 + -4 = -6 (1111010) +-2 + -3 = -5 (1111011) +-2 + -2 = -4 (1111100) +-2 + -1 = -3 (1111101) +-1 + 0 = -1 (1111111) +-1 + 1 = 0 (0000000) +-1 + 2 = 1 (0000001) +-1 + 3 = 2 (0000010) +-1 + 4 = 3 (0000011) +-1 + 5 = 4 (0000100) +-1 + 6 = 5 (0000101) +-1 + 7 = 6 (0000110) +-1 + 8 = 7 (0000111) +-1 + 9 = 8 (0001000) +-1 + 10 = 9 (0001001) +-1 + 11 = 10 (0001010) +-1 + 12 = 11 (0001011) +-1 + 13 = 12 (0001100) +-1 + 14 = 13 (0001101) +-1 + 15 = 14 (0001110) +-1 + 16 = 15 (0001111) +-1 + 17 = 16 (0010000) +-1 + 18 = 17 (0010001) +-1 + 19 = 18 (0010010) +-1 + 20 = 19 (0010011) +-1 + 21 = 20 (0010100) +-1 + 22 = 21 (0010101) +-1 + 23 = 22 (0010110) +-1 + 24 = 23 (0010111) +-1 + 25 = 24 (0011000) +-1 + 26 = 25 (0011001) +-1 + 27 = 26 (0011010) +-1 + 28 = 27 (0011011) +-1 + 29 = 28 (0011100) +-1 + 30 = 29 (0011101) +-1 + 31 = 30 (0011110) +-1 + -32 = -33 (1011111) +-1 + -31 = -32 (1100000) +-1 + -30 = -31 (1100001) +-1 + -29 = -30 (1100010) +-1 + -28 = -29 (1100011) +-1 + -27 = -28 (1100100) +-1 + -26 = -27 (1100101) +-1 + -25 = -26 (1100110) +-1 + -24 = -25 (1100111) +-1 + -23 = -24 (1101000) +-1 + -22 = -23 (1101001) +-1 + -21 = -22 (1101010) +-1 + -20 = -21 (1101011) +-1 + -19 = -20 (1101100) +-1 + -18 = -19 (1101101) +-1 + -17 = -18 (1101110) +-1 + -16 = -17 (1101111) +-1 + -15 = -16 (1110000) +-1 + -14 = -15 (1110001) +-1 + -13 = -14 (1110010) +-1 + -12 = -13 (1110011) +-1 + -11 = -12 (1110100) +-1 + -10 = -11 (1110101) +-1 + -9 = -10 (1110110) +-1 + -8 = -9 (1110111) +-1 + -7 = -8 (1111000) +-1 + -6 = -7 (1111001) +-1 + -5 = -6 (1111010) +-1 + -4 = -5 (1111011) +-1 + -3 = -4 (1111100) +-1 + -2 = -3 (1111101) +-1 + -1 = -2 (1111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/main.cpp new file mode 100644 index 000000000..c29f9b2b6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 7-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 7; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/stimgen.h new file mode 100644 index 000000000..feeda4215 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/bits_to_bits/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector7& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector7& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/common.h new file mode 100644 index 000000000..85b300c4d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<6> bool_vector6; +typedef sc_bv<9> bool_vector9; + +typedef sc_signal signal_bool_vector6; +typedef sc_signal signal_bool_vector9; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/datawidth.cpp new file mode 100644 index 000000000..7c5feb07b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector6 tmp_a; + bool_vector6 tmp_b; + bool_vector9 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_int() + tmp_b.to_int(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/datawidth.h new file mode 100644 index 000000000..911b72c4f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector9& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector9& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/extension.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/extension.f new file mode 100644 index 000000000..673123bd2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/extension.f @@ -0,0 +1,3 @@ +extension/datawidth.cpp +extension/stimgen.cpp +extension/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/golden/extension.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/golden/extension.log new file mode 100644 index 000000000..e7488d162 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/golden/extension.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + -32 = -24 (111101000) +8 + -31 = -23 (111101001) +8 + -30 = -22 (111101010) +8 + -29 = -21 (111101011) +8 + -28 = -20 (111101100) +8 + -27 = -19 (111101101) +8 + -26 = -18 (111101110) +8 + -25 = -17 (111101111) +8 + -24 = -16 (111110000) +8 + -23 = -15 (111110001) +8 + -22 = -14 (111110010) +8 + -21 = -13 (111110011) +8 + -20 = -12 (111110100) +8 + -19 = -11 (111110101) +8 + -18 = -10 (111110110) +8 + -17 = -9 (111110111) +8 + -16 = -8 (111111000) +8 + -15 = -7 (111111001) +8 + -14 = -6 (111111010) +8 + -13 = -5 (111111011) +8 + -12 = -4 (111111100) +8 + -11 = -3 (111111101) +8 + -10 = -2 (111111110) +8 + -9 = -1 (111111111) +8 + -8 = 0 (000000000) +8 + -7 = 1 (000000001) +8 + -6 = 2 (000000010) +8 + -5 = 3 (000000011) +8 + -4 = 4 (000000100) +8 + -3 = 5 (000000101) +8 + -2 = 6 (000000110) +8 + -1 = 7 (000000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + -32 = -23 (111101001) +9 + -31 = -22 (111101010) +9 + -30 = -21 (111101011) +9 + -29 = -20 (111101100) +9 + -28 = -19 (111101101) +9 + -27 = -18 (111101110) +9 + -26 = -17 (111101111) +9 + -25 = -16 (111110000) +9 + -24 = -15 (111110001) +9 + -23 = -14 (111110010) +9 + -22 = -13 (111110011) +9 + -21 = -12 (111110100) +9 + -20 = -11 (111110101) +9 + -19 = -10 (111110110) +9 + -18 = -9 (111110111) +9 + -17 = -8 (111111000) +9 + -16 = -7 (111111001) +9 + -15 = -6 (111111010) +9 + -14 = -5 (111111011) +9 + -13 = -4 (111111100) +9 + -12 = -3 (111111101) +9 + -11 = -2 (111111110) +9 + -10 = -1 (111111111) +9 + -9 = 0 (000000000) +9 + -8 = 1 (000000001) +9 + -7 = 2 (000000010) +9 + -6 = 3 (000000011) +9 + -5 = 4 (000000100) +9 + -4 = 5 (000000101) +9 + -3 = 6 (000000110) +9 + -2 = 7 (000000111) +9 + -1 = 8 (000001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + -32 = -22 (111101010) +10 + -31 = -21 (111101011) +10 + -30 = -20 (111101100) +10 + -29 = -19 (111101101) +10 + -28 = -18 (111101110) +10 + -27 = -17 (111101111) +10 + -26 = -16 (111110000) +10 + -25 = -15 (111110001) +10 + -24 = -14 (111110010) +10 + -23 = -13 (111110011) +10 + -22 = -12 (111110100) +10 + -21 = -11 (111110101) +10 + -20 = -10 (111110110) +10 + -19 = -9 (111110111) +10 + -18 = -8 (111111000) +10 + -17 = -7 (111111001) +10 + -16 = -6 (111111010) +10 + -15 = -5 (111111011) +10 + -14 = -4 (111111100) +10 + -13 = -3 (111111101) +10 + -12 = -2 (111111110) +10 + -11 = -1 (111111111) +10 + -10 = 0 (000000000) +10 + -9 = 1 (000000001) +10 + -8 = 2 (000000010) +10 + -7 = 3 (000000011) +10 + -6 = 4 (000000100) +10 + -5 = 5 (000000101) +10 + -4 = 6 (000000110) +10 + -3 = 7 (000000111) +10 + -2 = 8 (000001000) +10 + -1 = 9 (000001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + -32 = -21 (111101011) +11 + -31 = -20 (111101100) +11 + -30 = -19 (111101101) +11 + -29 = -18 (111101110) +11 + -28 = -17 (111101111) +11 + -27 = -16 (111110000) +11 + -26 = -15 (111110001) +11 + -25 = -14 (111110010) +11 + -24 = -13 (111110011) +11 + -23 = -12 (111110100) +11 + -22 = -11 (111110101) +11 + -21 = -10 (111110110) +11 + -20 = -9 (111110111) +11 + -19 = -8 (111111000) +11 + -18 = -7 (111111001) +11 + -17 = -6 (111111010) +11 + -16 = -5 (111111011) +11 + -15 = -4 (111111100) +11 + -14 = -3 (111111101) +11 + -13 = -2 (111111110) +11 + -12 = -1 (111111111) +11 + -11 = 0 (000000000) +11 + -10 = 1 (000000001) +11 + -9 = 2 (000000010) +11 + -8 = 3 (000000011) +11 + -7 = 4 (000000100) +11 + -6 = 5 (000000101) +11 + -5 = 6 (000000110) +11 + -4 = 7 (000000111) +11 + -3 = 8 (000001000) +11 + -2 = 9 (000001001) +11 + -1 = 10 (000001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + -32 = -20 (111101100) +12 + -31 = -19 (111101101) +12 + -30 = -18 (111101110) +12 + -29 = -17 (111101111) +12 + -28 = -16 (111110000) +12 + -27 = -15 (111110001) +12 + -26 = -14 (111110010) +12 + -25 = -13 (111110011) +12 + -24 = -12 (111110100) +12 + -23 = -11 (111110101) +12 + -22 = -10 (111110110) +12 + -21 = -9 (111110111) +12 + -20 = -8 (111111000) +12 + -19 = -7 (111111001) +12 + -18 = -6 (111111010) +12 + -17 = -5 (111111011) +12 + -16 = -4 (111111100) +12 + -15 = -3 (111111101) +12 + -14 = -2 (111111110) +12 + -13 = -1 (111111111) +12 + -12 = 0 (000000000) +12 + -11 = 1 (000000001) +12 + -10 = 2 (000000010) +12 + -9 = 3 (000000011) +12 + -8 = 4 (000000100) +12 + -7 = 5 (000000101) +12 + -6 = 6 (000000110) +12 + -5 = 7 (000000111) +12 + -4 = 8 (000001000) +12 + -3 = 9 (000001001) +12 + -2 = 10 (000001010) +12 + -1 = 11 (000001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + -32 = -19 (111101101) +13 + -31 = -18 (111101110) +13 + -30 = -17 (111101111) +13 + -29 = -16 (111110000) +13 + -28 = -15 (111110001) +13 + -27 = -14 (111110010) +13 + -26 = -13 (111110011) +13 + -25 = -12 (111110100) +13 + -24 = -11 (111110101) +13 + -23 = -10 (111110110) +13 + -22 = -9 (111110111) +13 + -21 = -8 (111111000) +13 + -20 = -7 (111111001) +13 + -19 = -6 (111111010) +13 + -18 = -5 (111111011) +13 + -17 = -4 (111111100) +13 + -16 = -3 (111111101) +13 + -15 = -2 (111111110) +13 + -14 = -1 (111111111) +13 + -13 = 0 (000000000) +13 + -12 = 1 (000000001) +13 + -11 = 2 (000000010) +13 + -10 = 3 (000000011) +13 + -9 = 4 (000000100) +13 + -8 = 5 (000000101) +13 + -7 = 6 (000000110) +13 + -6 = 7 (000000111) +13 + -5 = 8 (000001000) +13 + -4 = 9 (000001001) +13 + -3 = 10 (000001010) +13 + -2 = 11 (000001011) +13 + -1 = 12 (000001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + -32 = -18 (111101110) +14 + -31 = -17 (111101111) +14 + -30 = -16 (111110000) +14 + -29 = -15 (111110001) +14 + -28 = -14 (111110010) +14 + -27 = -13 (111110011) +14 + -26 = -12 (111110100) +14 + -25 = -11 (111110101) +14 + -24 = -10 (111110110) +14 + -23 = -9 (111110111) +14 + -22 = -8 (111111000) +14 + -21 = -7 (111111001) +14 + -20 = -6 (111111010) +14 + -19 = -5 (111111011) +14 + -18 = -4 (111111100) +14 + -17 = -3 (111111101) +14 + -16 = -2 (111111110) +14 + -15 = -1 (111111111) +14 + -14 = 0 (000000000) +14 + -13 = 1 (000000001) +14 + -12 = 2 (000000010) +14 + -11 = 3 (000000011) +14 + -10 = 4 (000000100) +14 + -9 = 5 (000000101) +14 + -8 = 6 (000000110) +14 + -7 = 7 (000000111) +14 + -6 = 8 (000001000) +14 + -5 = 9 (000001001) +14 + -4 = 10 (000001010) +14 + -3 = 11 (000001011) +14 + -2 = 12 (000001100) +14 + -1 = 13 (000001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + -32 = -17 (111101111) +15 + -31 = -16 (111110000) +15 + -30 = -15 (111110001) +15 + -29 = -14 (111110010) +15 + -28 = -13 (111110011) +15 + -27 = -12 (111110100) +15 + -26 = -11 (111110101) +15 + -25 = -10 (111110110) +15 + -24 = -9 (111110111) +15 + -23 = -8 (111111000) +15 + -22 = -7 (111111001) +15 + -21 = -6 (111111010) +15 + -20 = -5 (111111011) +15 + -19 = -4 (111111100) +15 + -18 = -3 (111111101) +15 + -17 = -2 (111111110) +15 + -16 = -1 (111111111) +15 + -15 = 0 (000000000) +15 + -14 = 1 (000000001) +15 + -13 = 2 (000000010) +15 + -12 = 3 (000000011) +15 + -11 = 4 (000000100) +15 + -10 = 5 (000000101) +15 + -9 = 6 (000000110) +15 + -8 = 7 (000000111) +15 + -7 = 8 (000001000) +15 + -6 = 9 (000001001) +15 + -5 = 10 (000001010) +15 + -4 = 11 (000001011) +15 + -3 = 12 (000001100) +15 + -2 = 13 (000001101) +15 + -1 = 14 (000001110) +16 + 0 = 16 (000010000) +16 + 1 = 17 (000010001) +16 + 2 = 18 (000010010) +16 + 3 = 19 (000010011) +16 + 4 = 20 (000010100) +16 + 5 = 21 (000010101) +16 + 6 = 22 (000010110) +16 + 7 = 23 (000010111) +16 + 8 = 24 (000011000) +16 + 9 = 25 (000011001) +16 + 10 = 26 (000011010) +16 + 11 = 27 (000011011) +16 + 12 = 28 (000011100) +16 + 13 = 29 (000011101) +16 + 14 = 30 (000011110) +16 + 15 = 31 (000011111) +16 + 16 = 32 (000100000) +16 + 17 = 33 (000100001) +16 + 18 = 34 (000100010) +16 + 19 = 35 (000100011) +16 + 20 = 36 (000100100) +16 + 21 = 37 (000100101) +16 + 22 = 38 (000100110) +16 + 23 = 39 (000100111) +16 + 24 = 40 (000101000) +16 + 25 = 41 (000101001) +16 + 26 = 42 (000101010) +16 + 27 = 43 (000101011) +16 + 28 = 44 (000101100) +16 + 29 = 45 (000101101) +16 + 30 = 46 (000101110) +16 + 31 = 47 (000101111) +16 + -32 = -16 (111110000) +16 + -31 = -15 (111110001) +16 + -30 = -14 (111110010) +16 + -29 = -13 (111110011) +16 + -28 = -12 (111110100) +16 + -27 = -11 (111110101) +16 + -26 = -10 (111110110) +16 + -25 = -9 (111110111) +16 + -24 = -8 (111111000) +16 + -23 = -7 (111111001) +16 + -22 = -6 (111111010) +16 + -21 = -5 (111111011) +16 + -20 = -4 (111111100) +16 + -19 = -3 (111111101) +16 + -18 = -2 (111111110) +16 + -17 = -1 (111111111) +16 + -16 = 0 (000000000) +16 + -15 = 1 (000000001) +16 + -14 = 2 (000000010) +16 + -13 = 3 (000000011) +16 + -12 = 4 (000000100) +16 + -11 = 5 (000000101) +16 + -10 = 6 (000000110) +16 + -9 = 7 (000000111) +16 + -8 = 8 (000001000) +16 + -7 = 9 (000001001) +16 + -6 = 10 (000001010) +16 + -5 = 11 (000001011) +16 + -4 = 12 (000001100) +16 + -3 = 13 (000001101) +16 + -2 = 14 (000001110) +16 + -1 = 15 (000001111) +17 + 0 = 17 (000010001) +17 + 1 = 18 (000010010) +17 + 2 = 19 (000010011) +17 + 3 = 20 (000010100) +17 + 4 = 21 (000010101) +17 + 5 = 22 (000010110) +17 + 6 = 23 (000010111) +17 + 7 = 24 (000011000) +17 + 8 = 25 (000011001) +17 + 9 = 26 (000011010) +17 + 10 = 27 (000011011) +17 + 11 = 28 (000011100) +17 + 12 = 29 (000011101) +17 + 13 = 30 (000011110) +17 + 14 = 31 (000011111) +17 + 15 = 32 (000100000) +17 + 16 = 33 (000100001) +17 + 17 = 34 (000100010) +17 + 18 = 35 (000100011) +17 + 19 = 36 (000100100) +17 + 20 = 37 (000100101) +17 + 21 = 38 (000100110) +17 + 22 = 39 (000100111) +17 + 23 = 40 (000101000) +17 + 24 = 41 (000101001) +17 + 25 = 42 (000101010) +17 + 26 = 43 (000101011) +17 + 27 = 44 (000101100) +17 + 28 = 45 (000101101) +17 + 29 = 46 (000101110) +17 + 30 = 47 (000101111) +17 + 31 = 48 (000110000) +17 + -32 = -15 (111110001) +17 + -31 = -14 (111110010) +17 + -30 = -13 (111110011) +17 + -29 = -12 (111110100) +17 + -28 = -11 (111110101) +17 + -27 = -10 (111110110) +17 + -26 = -9 (111110111) +17 + -25 = -8 (111111000) +17 + -24 = -7 (111111001) +17 + -23 = -6 (111111010) +17 + -22 = -5 (111111011) +17 + -21 = -4 (111111100) +17 + -20 = -3 (111111101) +17 + -19 = -2 (111111110) +17 + -18 = -1 (111111111) +17 + -17 = 0 (000000000) +17 + -16 = 1 (000000001) +17 + -15 = 2 (000000010) +17 + -14 = 3 (000000011) +17 + -13 = 4 (000000100) +17 + -12 = 5 (000000101) +17 + -11 = 6 (000000110) +17 + -10 = 7 (000000111) +17 + -9 = 8 (000001000) +17 + -8 = 9 (000001001) +17 + -7 = 10 (000001010) +17 + -6 = 11 (000001011) +17 + -5 = 12 (000001100) +17 + -4 = 13 (000001101) +17 + -3 = 14 (000001110) +17 + -2 = 15 (000001111) +17 + -1 = 16 (000010000) +18 + 0 = 18 (000010010) +18 + 1 = 19 (000010011) +18 + 2 = 20 (000010100) +18 + 3 = 21 (000010101) +18 + 4 = 22 (000010110) +18 + 5 = 23 (000010111) +18 + 6 = 24 (000011000) +18 + 7 = 25 (000011001) +18 + 8 = 26 (000011010) +18 + 9 = 27 (000011011) +18 + 10 = 28 (000011100) +18 + 11 = 29 (000011101) +18 + 12 = 30 (000011110) +18 + 13 = 31 (000011111) +18 + 14 = 32 (000100000) +18 + 15 = 33 (000100001) +18 + 16 = 34 (000100010) +18 + 17 = 35 (000100011) +18 + 18 = 36 (000100100) +18 + 19 = 37 (000100101) +18 + 20 = 38 (000100110) +18 + 21 = 39 (000100111) +18 + 22 = 40 (000101000) +18 + 23 = 41 (000101001) +18 + 24 = 42 (000101010) +18 + 25 = 43 (000101011) +18 + 26 = 44 (000101100) +18 + 27 = 45 (000101101) +18 + 28 = 46 (000101110) +18 + 29 = 47 (000101111) +18 + 30 = 48 (000110000) +18 + 31 = 49 (000110001) +18 + -32 = -14 (111110010) +18 + -31 = -13 (111110011) +18 + -30 = -12 (111110100) +18 + -29 = -11 (111110101) +18 + -28 = -10 (111110110) +18 + -27 = -9 (111110111) +18 + -26 = -8 (111111000) +18 + -25 = -7 (111111001) +18 + -24 = -6 (111111010) +18 + -23 = -5 (111111011) +18 + -22 = -4 (111111100) +18 + -21 = -3 (111111101) +18 + -20 = -2 (111111110) +18 + -19 = -1 (111111111) +18 + -18 = 0 (000000000) +18 + -17 = 1 (000000001) +18 + -16 = 2 (000000010) +18 + -15 = 3 (000000011) +18 + -14 = 4 (000000100) +18 + -13 = 5 (000000101) +18 + -12 = 6 (000000110) +18 + -11 = 7 (000000111) +18 + -10 = 8 (000001000) +18 + -9 = 9 (000001001) +18 + -8 = 10 (000001010) +18 + -7 = 11 (000001011) +18 + -6 = 12 (000001100) +18 + -5 = 13 (000001101) +18 + -4 = 14 (000001110) +18 + -3 = 15 (000001111) +18 + -2 = 16 (000010000) +18 + -1 = 17 (000010001) +19 + 0 = 19 (000010011) +19 + 1 = 20 (000010100) +19 + 2 = 21 (000010101) +19 + 3 = 22 (000010110) +19 + 4 = 23 (000010111) +19 + 5 = 24 (000011000) +19 + 6 = 25 (000011001) +19 + 7 = 26 (000011010) +19 + 8 = 27 (000011011) +19 + 9 = 28 (000011100) +19 + 10 = 29 (000011101) +19 + 11 = 30 (000011110) +19 + 12 = 31 (000011111) +19 + 13 = 32 (000100000) +19 + 14 = 33 (000100001) +19 + 15 = 34 (000100010) +19 + 16 = 35 (000100011) +19 + 17 = 36 (000100100) +19 + 18 = 37 (000100101) +19 + 19 = 38 (000100110) +19 + 20 = 39 (000100111) +19 + 21 = 40 (000101000) +19 + 22 = 41 (000101001) +19 + 23 = 42 (000101010) +19 + 24 = 43 (000101011) +19 + 25 = 44 (000101100) +19 + 26 = 45 (000101101) +19 + 27 = 46 (000101110) +19 + 28 = 47 (000101111) +19 + 29 = 48 (000110000) +19 + 30 = 49 (000110001) +19 + 31 = 50 (000110010) +19 + -32 = -13 (111110011) +19 + -31 = -12 (111110100) +19 + -30 = -11 (111110101) +19 + -29 = -10 (111110110) +19 + -28 = -9 (111110111) +19 + -27 = -8 (111111000) +19 + -26 = -7 (111111001) +19 + -25 = -6 (111111010) +19 + -24 = -5 (111111011) +19 + -23 = -4 (111111100) +19 + -22 = -3 (111111101) +19 + -21 = -2 (111111110) +19 + -20 = -1 (111111111) +19 + -19 = 0 (000000000) +19 + -18 = 1 (000000001) +19 + -17 = 2 (000000010) +19 + -16 = 3 (000000011) +19 + -15 = 4 (000000100) +19 + -14 = 5 (000000101) +19 + -13 = 6 (000000110) +19 + -12 = 7 (000000111) +19 + -11 = 8 (000001000) +19 + -10 = 9 (000001001) +19 + -9 = 10 (000001010) +19 + -8 = 11 (000001011) +19 + -7 = 12 (000001100) +19 + -6 = 13 (000001101) +19 + -5 = 14 (000001110) +19 + -4 = 15 (000001111) +19 + -3 = 16 (000010000) +19 + -2 = 17 (000010001) +19 + -1 = 18 (000010010) +20 + 0 = 20 (000010100) +20 + 1 = 21 (000010101) +20 + 2 = 22 (000010110) +20 + 3 = 23 (000010111) +20 + 4 = 24 (000011000) +20 + 5 = 25 (000011001) +20 + 6 = 26 (000011010) +20 + 7 = 27 (000011011) +20 + 8 = 28 (000011100) +20 + 9 = 29 (000011101) +20 + 10 = 30 (000011110) +20 + 11 = 31 (000011111) +20 + 12 = 32 (000100000) +20 + 13 = 33 (000100001) +20 + 14 = 34 (000100010) +20 + 15 = 35 (000100011) +20 + 16 = 36 (000100100) +20 + 17 = 37 (000100101) +20 + 18 = 38 (000100110) +20 + 19 = 39 (000100111) +20 + 20 = 40 (000101000) +20 + 21 = 41 (000101001) +20 + 22 = 42 (000101010) +20 + 23 = 43 (000101011) +20 + 24 = 44 (000101100) +20 + 25 = 45 (000101101) +20 + 26 = 46 (000101110) +20 + 27 = 47 (000101111) +20 + 28 = 48 (000110000) +20 + 29 = 49 (000110001) +20 + 30 = 50 (000110010) +20 + 31 = 51 (000110011) +20 + -32 = -12 (111110100) +20 + -31 = -11 (111110101) +20 + -30 = -10 (111110110) +20 + -29 = -9 (111110111) +20 + -28 = -8 (111111000) +20 + -27 = -7 (111111001) +20 + -26 = -6 (111111010) +20 + -25 = -5 (111111011) +20 + -24 = -4 (111111100) +20 + -23 = -3 (111111101) +20 + -22 = -2 (111111110) +20 + -21 = -1 (111111111) +20 + -20 = 0 (000000000) +20 + -19 = 1 (000000001) +20 + -18 = 2 (000000010) +20 + -17 = 3 (000000011) +20 + -16 = 4 (000000100) +20 + -15 = 5 (000000101) +20 + -14 = 6 (000000110) +20 + -13 = 7 (000000111) +20 + -12 = 8 (000001000) +20 + -11 = 9 (000001001) +20 + -10 = 10 (000001010) +20 + -9 = 11 (000001011) +20 + -8 = 12 (000001100) +20 + -7 = 13 (000001101) +20 + -6 = 14 (000001110) +20 + -5 = 15 (000001111) +20 + -4 = 16 (000010000) +20 + -3 = 17 (000010001) +20 + -2 = 18 (000010010) +20 + -1 = 19 (000010011) +21 + 0 = 21 (000010101) +21 + 1 = 22 (000010110) +21 + 2 = 23 (000010111) +21 + 3 = 24 (000011000) +21 + 4 = 25 (000011001) +21 + 5 = 26 (000011010) +21 + 6 = 27 (000011011) +21 + 7 = 28 (000011100) +21 + 8 = 29 (000011101) +21 + 9 = 30 (000011110) +21 + 10 = 31 (000011111) +21 + 11 = 32 (000100000) +21 + 12 = 33 (000100001) +21 + 13 = 34 (000100010) +21 + 14 = 35 (000100011) +21 + 15 = 36 (000100100) +21 + 16 = 37 (000100101) +21 + 17 = 38 (000100110) +21 + 18 = 39 (000100111) +21 + 19 = 40 (000101000) +21 + 20 = 41 (000101001) +21 + 21 = 42 (000101010) +21 + 22 = 43 (000101011) +21 + 23 = 44 (000101100) +21 + 24 = 45 (000101101) +21 + 25 = 46 (000101110) +21 + 26 = 47 (000101111) +21 + 27 = 48 (000110000) +21 + 28 = 49 (000110001) +21 + 29 = 50 (000110010) +21 + 30 = 51 (000110011) +21 + 31 = 52 (000110100) +21 + -32 = -11 (111110101) +21 + -31 = -10 (111110110) +21 + -30 = -9 (111110111) +21 + -29 = -8 (111111000) +21 + -28 = -7 (111111001) +21 + -27 = -6 (111111010) +21 + -26 = -5 (111111011) +21 + -25 = -4 (111111100) +21 + -24 = -3 (111111101) +21 + -23 = -2 (111111110) +21 + -22 = -1 (111111111) +21 + -21 = 0 (000000000) +21 + -20 = 1 (000000001) +21 + -19 = 2 (000000010) +21 + -18 = 3 (000000011) +21 + -17 = 4 (000000100) +21 + -16 = 5 (000000101) +21 + -15 = 6 (000000110) +21 + -14 = 7 (000000111) +21 + -13 = 8 (000001000) +21 + -12 = 9 (000001001) +21 + -11 = 10 (000001010) +21 + -10 = 11 (000001011) +21 + -9 = 12 (000001100) +21 + -8 = 13 (000001101) +21 + -7 = 14 (000001110) +21 + -6 = 15 (000001111) +21 + -5 = 16 (000010000) +21 + -4 = 17 (000010001) +21 + -3 = 18 (000010010) +21 + -2 = 19 (000010011) +21 + -1 = 20 (000010100) +22 + 0 = 22 (000010110) +22 + 1 = 23 (000010111) +22 + 2 = 24 (000011000) +22 + 3 = 25 (000011001) +22 + 4 = 26 (000011010) +22 + 5 = 27 (000011011) +22 + 6 = 28 (000011100) +22 + 7 = 29 (000011101) +22 + 8 = 30 (000011110) +22 + 9 = 31 (000011111) +22 + 10 = 32 (000100000) +22 + 11 = 33 (000100001) +22 + 12 = 34 (000100010) +22 + 13 = 35 (000100011) +22 + 14 = 36 (000100100) +22 + 15 = 37 (000100101) +22 + 16 = 38 (000100110) +22 + 17 = 39 (000100111) +22 + 18 = 40 (000101000) +22 + 19 = 41 (000101001) +22 + 20 = 42 (000101010) +22 + 21 = 43 (000101011) +22 + 22 = 44 (000101100) +22 + 23 = 45 (000101101) +22 + 24 = 46 (000101110) +22 + 25 = 47 (000101111) +22 + 26 = 48 (000110000) +22 + 27 = 49 (000110001) +22 + 28 = 50 (000110010) +22 + 29 = 51 (000110011) +22 + 30 = 52 (000110100) +22 + 31 = 53 (000110101) +22 + -32 = -10 (111110110) +22 + -31 = -9 (111110111) +22 + -30 = -8 (111111000) +22 + -29 = -7 (111111001) +22 + -28 = -6 (111111010) +22 + -27 = -5 (111111011) +22 + -26 = -4 (111111100) +22 + -25 = -3 (111111101) +22 + -24 = -2 (111111110) +22 + -23 = -1 (111111111) +22 + -22 = 0 (000000000) +22 + -21 = 1 (000000001) +22 + -20 = 2 (000000010) +22 + -19 = 3 (000000011) +22 + -18 = 4 (000000100) +22 + -17 = 5 (000000101) +22 + -16 = 6 (000000110) +22 + -15 = 7 (000000111) +22 + -14 = 8 (000001000) +22 + -13 = 9 (000001001) +22 + -12 = 10 (000001010) +22 + -11 = 11 (000001011) +22 + -10 = 12 (000001100) +22 + -9 = 13 (000001101) +22 + -8 = 14 (000001110) +22 + -7 = 15 (000001111) +22 + -6 = 16 (000010000) +22 + -5 = 17 (000010001) +22 + -4 = 18 (000010010) +22 + -3 = 19 (000010011) +22 + -2 = 20 (000010100) +22 + -1 = 21 (000010101) +23 + 0 = 23 (000010111) +23 + 1 = 24 (000011000) +23 + 2 = 25 (000011001) +23 + 3 = 26 (000011010) +23 + 4 = 27 (000011011) +23 + 5 = 28 (000011100) +23 + 6 = 29 (000011101) +23 + 7 = 30 (000011110) +23 + 8 = 31 (000011111) +23 + 9 = 32 (000100000) +23 + 10 = 33 (000100001) +23 + 11 = 34 (000100010) +23 + 12 = 35 (000100011) +23 + 13 = 36 (000100100) +23 + 14 = 37 (000100101) +23 + 15 = 38 (000100110) +23 + 16 = 39 (000100111) +23 + 17 = 40 (000101000) +23 + 18 = 41 (000101001) +23 + 19 = 42 (000101010) +23 + 20 = 43 (000101011) +23 + 21 = 44 (000101100) +23 + 22 = 45 (000101101) +23 + 23 = 46 (000101110) +23 + 24 = 47 (000101111) +23 + 25 = 48 (000110000) +23 + 26 = 49 (000110001) +23 + 27 = 50 (000110010) +23 + 28 = 51 (000110011) +23 + 29 = 52 (000110100) +23 + 30 = 53 (000110101) +23 + 31 = 54 (000110110) +23 + -32 = -9 (111110111) +23 + -31 = -8 (111111000) +23 + -30 = -7 (111111001) +23 + -29 = -6 (111111010) +23 + -28 = -5 (111111011) +23 + -27 = -4 (111111100) +23 + -26 = -3 (111111101) +23 + -25 = -2 (111111110) +23 + -24 = -1 (111111111) +23 + -23 = 0 (000000000) +23 + -22 = 1 (000000001) +23 + -21 = 2 (000000010) +23 + -20 = 3 (000000011) +23 + -19 = 4 (000000100) +23 + -18 = 5 (000000101) +23 + -17 = 6 (000000110) +23 + -16 = 7 (000000111) +23 + -15 = 8 (000001000) +23 + -14 = 9 (000001001) +23 + -13 = 10 (000001010) +23 + -12 = 11 (000001011) +23 + -11 = 12 (000001100) +23 + -10 = 13 (000001101) +23 + -9 = 14 (000001110) +23 + -8 = 15 (000001111) +23 + -7 = 16 (000010000) +23 + -6 = 17 (000010001) +23 + -5 = 18 (000010010) +23 + -4 = 19 (000010011) +23 + -3 = 20 (000010100) +23 + -2 = 21 (000010101) +23 + -1 = 22 (000010110) +24 + 0 = 24 (000011000) +24 + 1 = 25 (000011001) +24 + 2 = 26 (000011010) +24 + 3 = 27 (000011011) +24 + 4 = 28 (000011100) +24 + 5 = 29 (000011101) +24 + 6 = 30 (000011110) +24 + 7 = 31 (000011111) +24 + 8 = 32 (000100000) +24 + 9 = 33 (000100001) +24 + 10 = 34 (000100010) +24 + 11 = 35 (000100011) +24 + 12 = 36 (000100100) +24 + 13 = 37 (000100101) +24 + 14 = 38 (000100110) +24 + 15 = 39 (000100111) +24 + 16 = 40 (000101000) +24 + 17 = 41 (000101001) +24 + 18 = 42 (000101010) +24 + 19 = 43 (000101011) +24 + 20 = 44 (000101100) +24 + 21 = 45 (000101101) +24 + 22 = 46 (000101110) +24 + 23 = 47 (000101111) +24 + 24 = 48 (000110000) +24 + 25 = 49 (000110001) +24 + 26 = 50 (000110010) +24 + 27 = 51 (000110011) +24 + 28 = 52 (000110100) +24 + 29 = 53 (000110101) +24 + 30 = 54 (000110110) +24 + 31 = 55 (000110111) +24 + -32 = -8 (111111000) +24 + -31 = -7 (111111001) +24 + -30 = -6 (111111010) +24 + -29 = -5 (111111011) +24 + -28 = -4 (111111100) +24 + -27 = -3 (111111101) +24 + -26 = -2 (111111110) +24 + -25 = -1 (111111111) +24 + -24 = 0 (000000000) +24 + -23 = 1 (000000001) +24 + -22 = 2 (000000010) +24 + -21 = 3 (000000011) +24 + -20 = 4 (000000100) +24 + -19 = 5 (000000101) +24 + -18 = 6 (000000110) +24 + -17 = 7 (000000111) +24 + -16 = 8 (000001000) +24 + -15 = 9 (000001001) +24 + -14 = 10 (000001010) +24 + -13 = 11 (000001011) +24 + -12 = 12 (000001100) +24 + -11 = 13 (000001101) +24 + -10 = 14 (000001110) +24 + -9 = 15 (000001111) +24 + -8 = 16 (000010000) +24 + -7 = 17 (000010001) +24 + -6 = 18 (000010010) +24 + -5 = 19 (000010011) +24 + -4 = 20 (000010100) +24 + -3 = 21 (000010101) +24 + -2 = 22 (000010110) +24 + -1 = 23 (000010111) +25 + 0 = 25 (000011001) +25 + 1 = 26 (000011010) +25 + 2 = 27 (000011011) +25 + 3 = 28 (000011100) +25 + 4 = 29 (000011101) +25 + 5 = 30 (000011110) +25 + 6 = 31 (000011111) +25 + 7 = 32 (000100000) +25 + 8 = 33 (000100001) +25 + 9 = 34 (000100010) +25 + 10 = 35 (000100011) +25 + 11 = 36 (000100100) +25 + 12 = 37 (000100101) +25 + 13 = 38 (000100110) +25 + 14 = 39 (000100111) +25 + 15 = 40 (000101000) +25 + 16 = 41 (000101001) +25 + 17 = 42 (000101010) +25 + 18 = 43 (000101011) +25 + 19 = 44 (000101100) +25 + 20 = 45 (000101101) +25 + 21 = 46 (000101110) +25 + 22 = 47 (000101111) +25 + 23 = 48 (000110000) +25 + 24 = 49 (000110001) +25 + 25 = 50 (000110010) +25 + 26 = 51 (000110011) +25 + 27 = 52 (000110100) +25 + 28 = 53 (000110101) +25 + 29 = 54 (000110110) +25 + 30 = 55 (000110111) +25 + 31 = 56 (000111000) +25 + -32 = -7 (111111001) +25 + -31 = -6 (111111010) +25 + -30 = -5 (111111011) +25 + -29 = -4 (111111100) +25 + -28 = -3 (111111101) +25 + -27 = -2 (111111110) +25 + -26 = -1 (111111111) +25 + -25 = 0 (000000000) +25 + -24 = 1 (000000001) +25 + -23 = 2 (000000010) +25 + -22 = 3 (000000011) +25 + -21 = 4 (000000100) +25 + -20 = 5 (000000101) +25 + -19 = 6 (000000110) +25 + -18 = 7 (000000111) +25 + -17 = 8 (000001000) +25 + -16 = 9 (000001001) +25 + -15 = 10 (000001010) +25 + -14 = 11 (000001011) +25 + -13 = 12 (000001100) +25 + -12 = 13 (000001101) +25 + -11 = 14 (000001110) +25 + -10 = 15 (000001111) +25 + -9 = 16 (000010000) +25 + -8 = 17 (000010001) +25 + -7 = 18 (000010010) +25 + -6 = 19 (000010011) +25 + -5 = 20 (000010100) +25 + -4 = 21 (000010101) +25 + -3 = 22 (000010110) +25 + -2 = 23 (000010111) +25 + -1 = 24 (000011000) +26 + 0 = 26 (000011010) +26 + 1 = 27 (000011011) +26 + 2 = 28 (000011100) +26 + 3 = 29 (000011101) +26 + 4 = 30 (000011110) +26 + 5 = 31 (000011111) +26 + 6 = 32 (000100000) +26 + 7 = 33 (000100001) +26 + 8 = 34 (000100010) +26 + 9 = 35 (000100011) +26 + 10 = 36 (000100100) +26 + 11 = 37 (000100101) +26 + 12 = 38 (000100110) +26 + 13 = 39 (000100111) +26 + 14 = 40 (000101000) +26 + 15 = 41 (000101001) +26 + 16 = 42 (000101010) +26 + 17 = 43 (000101011) +26 + 18 = 44 (000101100) +26 + 19 = 45 (000101101) +26 + 20 = 46 (000101110) +26 + 21 = 47 (000101111) +26 + 22 = 48 (000110000) +26 + 23 = 49 (000110001) +26 + 24 = 50 (000110010) +26 + 25 = 51 (000110011) +26 + 26 = 52 (000110100) +26 + 27 = 53 (000110101) +26 + 28 = 54 (000110110) +26 + 29 = 55 (000110111) +26 + 30 = 56 (000111000) +26 + 31 = 57 (000111001) +26 + -32 = -6 (111111010) +26 + -31 = -5 (111111011) +26 + -30 = -4 (111111100) +26 + -29 = -3 (111111101) +26 + -28 = -2 (111111110) +26 + -27 = -1 (111111111) +26 + -26 = 0 (000000000) +26 + -25 = 1 (000000001) +26 + -24 = 2 (000000010) +26 + -23 = 3 (000000011) +26 + -22 = 4 (000000100) +26 + -21 = 5 (000000101) +26 + -20 = 6 (000000110) +26 + -19 = 7 (000000111) +26 + -18 = 8 (000001000) +26 + -17 = 9 (000001001) +26 + -16 = 10 (000001010) +26 + -15 = 11 (000001011) +26 + -14 = 12 (000001100) +26 + -13 = 13 (000001101) +26 + -12 = 14 (000001110) +26 + -11 = 15 (000001111) +26 + -10 = 16 (000010000) +26 + -9 = 17 (000010001) +26 + -8 = 18 (000010010) +26 + -7 = 19 (000010011) +26 + -6 = 20 (000010100) +26 + -5 = 21 (000010101) +26 + -4 = 22 (000010110) +26 + -3 = 23 (000010111) +26 + -2 = 24 (000011000) +26 + -1 = 25 (000011001) +27 + 0 = 27 (000011011) +27 + 1 = 28 (000011100) +27 + 2 = 29 (000011101) +27 + 3 = 30 (000011110) +27 + 4 = 31 (000011111) +27 + 5 = 32 (000100000) +27 + 6 = 33 (000100001) +27 + 7 = 34 (000100010) +27 + 8 = 35 (000100011) +27 + 9 = 36 (000100100) +27 + 10 = 37 (000100101) +27 + 11 = 38 (000100110) +27 + 12 = 39 (000100111) +27 + 13 = 40 (000101000) +27 + 14 = 41 (000101001) +27 + 15 = 42 (000101010) +27 + 16 = 43 (000101011) +27 + 17 = 44 (000101100) +27 + 18 = 45 (000101101) +27 + 19 = 46 (000101110) +27 + 20 = 47 (000101111) +27 + 21 = 48 (000110000) +27 + 22 = 49 (000110001) +27 + 23 = 50 (000110010) +27 + 24 = 51 (000110011) +27 + 25 = 52 (000110100) +27 + 26 = 53 (000110101) +27 + 27 = 54 (000110110) +27 + 28 = 55 (000110111) +27 + 29 = 56 (000111000) +27 + 30 = 57 (000111001) +27 + 31 = 58 (000111010) +27 + -32 = -5 (111111011) +27 + -31 = -4 (111111100) +27 + -30 = -3 (111111101) +27 + -29 = -2 (111111110) +27 + -28 = -1 (111111111) +27 + -27 = 0 (000000000) +27 + -26 = 1 (000000001) +27 + -25 = 2 (000000010) +27 + -24 = 3 (000000011) +27 + -23 = 4 (000000100) +27 + -22 = 5 (000000101) +27 + -21 = 6 (000000110) +27 + -20 = 7 (000000111) +27 + -19 = 8 (000001000) +27 + -18 = 9 (000001001) +27 + -17 = 10 (000001010) +27 + -16 = 11 (000001011) +27 + -15 = 12 (000001100) +27 + -14 = 13 (000001101) +27 + -13 = 14 (000001110) +27 + -12 = 15 (000001111) +27 + -11 = 16 (000010000) +27 + -10 = 17 (000010001) +27 + -9 = 18 (000010010) +27 + -8 = 19 (000010011) +27 + -7 = 20 (000010100) +27 + -6 = 21 (000010101) +27 + -5 = 22 (000010110) +27 + -4 = 23 (000010111) +27 + -3 = 24 (000011000) +27 + -2 = 25 (000011001) +27 + -1 = 26 (000011010) +28 + 0 = 28 (000011100) +28 + 1 = 29 (000011101) +28 + 2 = 30 (000011110) +28 + 3 = 31 (000011111) +28 + 4 = 32 (000100000) +28 + 5 = 33 (000100001) +28 + 6 = 34 (000100010) +28 + 7 = 35 (000100011) +28 + 8 = 36 (000100100) +28 + 9 = 37 (000100101) +28 + 10 = 38 (000100110) +28 + 11 = 39 (000100111) +28 + 12 = 40 (000101000) +28 + 13 = 41 (000101001) +28 + 14 = 42 (000101010) +28 + 15 = 43 (000101011) +28 + 16 = 44 (000101100) +28 + 17 = 45 (000101101) +28 + 18 = 46 (000101110) +28 + 19 = 47 (000101111) +28 + 20 = 48 (000110000) +28 + 21 = 49 (000110001) +28 + 22 = 50 (000110010) +28 + 23 = 51 (000110011) +28 + 24 = 52 (000110100) +28 + 25 = 53 (000110101) +28 + 26 = 54 (000110110) +28 + 27 = 55 (000110111) +28 + 28 = 56 (000111000) +28 + 29 = 57 (000111001) +28 + 30 = 58 (000111010) +28 + 31 = 59 (000111011) +28 + -32 = -4 (111111100) +28 + -31 = -3 (111111101) +28 + -30 = -2 (111111110) +28 + -29 = -1 (111111111) +28 + -28 = 0 (000000000) +28 + -27 = 1 (000000001) +28 + -26 = 2 (000000010) +28 + -25 = 3 (000000011) +28 + -24 = 4 (000000100) +28 + -23 = 5 (000000101) +28 + -22 = 6 (000000110) +28 + -21 = 7 (000000111) +28 + -20 = 8 (000001000) +28 + -19 = 9 (000001001) +28 + -18 = 10 (000001010) +28 + -17 = 11 (000001011) +28 + -16 = 12 (000001100) +28 + -15 = 13 (000001101) +28 + -14 = 14 (000001110) +28 + -13 = 15 (000001111) +28 + -12 = 16 (000010000) +28 + -11 = 17 (000010001) +28 + -10 = 18 (000010010) +28 + -9 = 19 (000010011) +28 + -8 = 20 (000010100) +28 + -7 = 21 (000010101) +28 + -6 = 22 (000010110) +28 + -5 = 23 (000010111) +28 + -4 = 24 (000011000) +28 + -3 = 25 (000011001) +28 + -2 = 26 (000011010) +28 + -1 = 27 (000011011) +29 + 0 = 29 (000011101) +29 + 1 = 30 (000011110) +29 + 2 = 31 (000011111) +29 + 3 = 32 (000100000) +29 + 4 = 33 (000100001) +29 + 5 = 34 (000100010) +29 + 6 = 35 (000100011) +29 + 7 = 36 (000100100) +29 + 8 = 37 (000100101) +29 + 9 = 38 (000100110) +29 + 10 = 39 (000100111) +29 + 11 = 40 (000101000) +29 + 12 = 41 (000101001) +29 + 13 = 42 (000101010) +29 + 14 = 43 (000101011) +29 + 15 = 44 (000101100) +29 + 16 = 45 (000101101) +29 + 17 = 46 (000101110) +29 + 18 = 47 (000101111) +29 + 19 = 48 (000110000) +29 + 20 = 49 (000110001) +29 + 21 = 50 (000110010) +29 + 22 = 51 (000110011) +29 + 23 = 52 (000110100) +29 + 24 = 53 (000110101) +29 + 25 = 54 (000110110) +29 + 26 = 55 (000110111) +29 + 27 = 56 (000111000) +29 + 28 = 57 (000111001) +29 + 29 = 58 (000111010) +29 + 30 = 59 (000111011) +29 + 31 = 60 (000111100) +29 + -32 = -3 (111111101) +29 + -31 = -2 (111111110) +29 + -30 = -1 (111111111) +29 + -29 = 0 (000000000) +29 + -28 = 1 (000000001) +29 + -27 = 2 (000000010) +29 + -26 = 3 (000000011) +29 + -25 = 4 (000000100) +29 + -24 = 5 (000000101) +29 + -23 = 6 (000000110) +29 + -22 = 7 (000000111) +29 + -21 = 8 (000001000) +29 + -20 = 9 (000001001) +29 + -19 = 10 (000001010) +29 + -18 = 11 (000001011) +29 + -17 = 12 (000001100) +29 + -16 = 13 (000001101) +29 + -15 = 14 (000001110) +29 + -14 = 15 (000001111) +29 + -13 = 16 (000010000) +29 + -12 = 17 (000010001) +29 + -11 = 18 (000010010) +29 + -10 = 19 (000010011) +29 + -9 = 20 (000010100) +29 + -8 = 21 (000010101) +29 + -7 = 22 (000010110) +29 + -6 = 23 (000010111) +29 + -5 = 24 (000011000) +29 + -4 = 25 (000011001) +29 + -3 = 26 (000011010) +29 + -2 = 27 (000011011) +29 + -1 = 28 (000011100) +30 + 0 = 30 (000011110) +30 + 1 = 31 (000011111) +30 + 2 = 32 (000100000) +30 + 3 = 33 (000100001) +30 + 4 = 34 (000100010) +30 + 5 = 35 (000100011) +30 + 6 = 36 (000100100) +30 + 7 = 37 (000100101) +30 + 8 = 38 (000100110) +30 + 9 = 39 (000100111) +30 + 10 = 40 (000101000) +30 + 11 = 41 (000101001) +30 + 12 = 42 (000101010) +30 + 13 = 43 (000101011) +30 + 14 = 44 (000101100) +30 + 15 = 45 (000101101) +30 + 16 = 46 (000101110) +30 + 17 = 47 (000101111) +30 + 18 = 48 (000110000) +30 + 19 = 49 (000110001) +30 + 20 = 50 (000110010) +30 + 21 = 51 (000110011) +30 + 22 = 52 (000110100) +30 + 23 = 53 (000110101) +30 + 24 = 54 (000110110) +30 + 25 = 55 (000110111) +30 + 26 = 56 (000111000) +30 + 27 = 57 (000111001) +30 + 28 = 58 (000111010) +30 + 29 = 59 (000111011) +30 + 30 = 60 (000111100) +30 + 31 = 61 (000111101) +30 + -32 = -2 (111111110) +30 + -31 = -1 (111111111) +30 + -30 = 0 (000000000) +30 + -29 = 1 (000000001) +30 + -28 = 2 (000000010) +30 + -27 = 3 (000000011) +30 + -26 = 4 (000000100) +30 + -25 = 5 (000000101) +30 + -24 = 6 (000000110) +30 + -23 = 7 (000000111) +30 + -22 = 8 (000001000) +30 + -21 = 9 (000001001) +30 + -20 = 10 (000001010) +30 + -19 = 11 (000001011) +30 + -18 = 12 (000001100) +30 + -17 = 13 (000001101) +30 + -16 = 14 (000001110) +30 + -15 = 15 (000001111) +30 + -14 = 16 (000010000) +30 + -13 = 17 (000010001) +30 + -12 = 18 (000010010) +30 + -11 = 19 (000010011) +30 + -10 = 20 (000010100) +30 + -9 = 21 (000010101) +30 + -8 = 22 (000010110) +30 + -7 = 23 (000010111) +30 + -6 = 24 (000011000) +30 + -5 = 25 (000011001) +30 + -4 = 26 (000011010) +30 + -3 = 27 (000011011) +30 + -2 = 28 (000011100) +30 + -1 = 29 (000011101) +31 + 0 = 31 (000011111) +31 + 1 = 32 (000100000) +31 + 2 = 33 (000100001) +31 + 3 = 34 (000100010) +31 + 4 = 35 (000100011) +31 + 5 = 36 (000100100) +31 + 6 = 37 (000100101) +31 + 7 = 38 (000100110) +31 + 8 = 39 (000100111) +31 + 9 = 40 (000101000) +31 + 10 = 41 (000101001) +31 + 11 = 42 (000101010) +31 + 12 = 43 (000101011) +31 + 13 = 44 (000101100) +31 + 14 = 45 (000101101) +31 + 15 = 46 (000101110) +31 + 16 = 47 (000101111) +31 + 17 = 48 (000110000) +31 + 18 = 49 (000110001) +31 + 19 = 50 (000110010) +31 + 20 = 51 (000110011) +31 + 21 = 52 (000110100) +31 + 22 = 53 (000110101) +31 + 23 = 54 (000110110) +31 + 24 = 55 (000110111) +31 + 25 = 56 (000111000) +31 + 26 = 57 (000111001) +31 + 27 = 58 (000111010) +31 + 28 = 59 (000111011) +31 + 29 = 60 (000111100) +31 + 30 = 61 (000111101) +31 + 31 = 62 (000111110) +31 + -32 = -1 (111111111) +31 + -31 = 0 (000000000) +31 + -30 = 1 (000000001) +31 + -29 = 2 (000000010) +31 + -28 = 3 (000000011) +31 + -27 = 4 (000000100) +31 + -26 = 5 (000000101) +31 + -25 = 6 (000000110) +31 + -24 = 7 (000000111) +31 + -23 = 8 (000001000) +31 + -22 = 9 (000001001) +31 + -21 = 10 (000001010) +31 + -20 = 11 (000001011) +31 + -19 = 12 (000001100) +31 + -18 = 13 (000001101) +31 + -17 = 14 (000001110) +31 + -16 = 15 (000001111) +31 + -15 = 16 (000010000) +31 + -14 = 17 (000010001) +31 + -13 = 18 (000010010) +31 + -12 = 19 (000010011) +31 + -11 = 20 (000010100) +31 + -10 = 21 (000010101) +31 + -9 = 22 (000010110) +31 + -8 = 23 (000010111) +31 + -7 = 24 (000011000) +31 + -6 = 25 (000011001) +31 + -5 = 26 (000011010) +31 + -4 = 27 (000011011) +31 + -3 = 28 (000011100) +31 + -2 = 29 (000011101) +31 + -1 = 30 (000011110) +-32 + 0 = -32 (111100000) +-32 + 1 = -31 (111100001) +-32 + 2 = -30 (111100010) +-32 + 3 = -29 (111100011) +-32 + 4 = -28 (111100100) +-32 + 5 = -27 (111100101) +-32 + 6 = -26 (111100110) +-32 + 7 = -25 (111100111) +-32 + 8 = -24 (111101000) +-32 + 9 = -23 (111101001) +-32 + 10 = -22 (111101010) +-32 + 11 = -21 (111101011) +-32 + 12 = -20 (111101100) +-32 + 13 = -19 (111101101) +-32 + 14 = -18 (111101110) +-32 + 15 = -17 (111101111) +-32 + 16 = -16 (111110000) +-32 + 17 = -15 (111110001) +-32 + 18 = -14 (111110010) +-32 + 19 = -13 (111110011) +-32 + 20 = -12 (111110100) +-32 + 21 = -11 (111110101) +-32 + 22 = -10 (111110110) +-32 + 23 = -9 (111110111) +-32 + 24 = -8 (111111000) +-32 + 25 = -7 (111111001) +-32 + 26 = -6 (111111010) +-32 + 27 = -5 (111111011) +-32 + 28 = -4 (111111100) +-32 + 29 = -3 (111111101) +-32 + 30 = -2 (111111110) +-32 + 31 = -1 (111111111) +-32 + -32 = -64 (111000000) +-32 + -31 = -63 (111000001) +-32 + -30 = -62 (111000010) +-32 + -29 = -61 (111000011) +-32 + -28 = -60 (111000100) +-32 + -27 = -59 (111000101) +-32 + -26 = -58 (111000110) +-32 + -25 = -57 (111000111) +-32 + -24 = -56 (111001000) +-32 + -23 = -55 (111001001) +-32 + -22 = -54 (111001010) +-32 + -21 = -53 (111001011) +-32 + -20 = -52 (111001100) +-32 + -19 = -51 (111001101) +-32 + -18 = -50 (111001110) +-32 + -17 = -49 (111001111) +-32 + -16 = -48 (111010000) +-32 + -15 = -47 (111010001) +-32 + -14 = -46 (111010010) +-32 + -13 = -45 (111010011) +-32 + -12 = -44 (111010100) +-32 + -11 = -43 (111010101) +-32 + -10 = -42 (111010110) +-32 + -9 = -41 (111010111) +-32 + -8 = -40 (111011000) +-32 + -7 = -39 (111011001) +-32 + -6 = -38 (111011010) +-32 + -5 = -37 (111011011) +-32 + -4 = -36 (111011100) +-32 + -3 = -35 (111011101) +-32 + -2 = -34 (111011110) +-32 + -1 = -33 (111011111) +-31 + 0 = -31 (111100001) +-31 + 1 = -30 (111100010) +-31 + 2 = -29 (111100011) +-31 + 3 = -28 (111100100) +-31 + 4 = -27 (111100101) +-31 + 5 = -26 (111100110) +-31 + 6 = -25 (111100111) +-31 + 7 = -24 (111101000) +-31 + 8 = -23 (111101001) +-31 + 9 = -22 (111101010) +-31 + 10 = -21 (111101011) +-31 + 11 = -20 (111101100) +-31 + 12 = -19 (111101101) +-31 + 13 = -18 (111101110) +-31 + 14 = -17 (111101111) +-31 + 15 = -16 (111110000) +-31 + 16 = -15 (111110001) +-31 + 17 = -14 (111110010) +-31 + 18 = -13 (111110011) +-31 + 19 = -12 (111110100) +-31 + 20 = -11 (111110101) +-31 + 21 = -10 (111110110) +-31 + 22 = -9 (111110111) +-31 + 23 = -8 (111111000) +-31 + 24 = -7 (111111001) +-31 + 25 = -6 (111111010) +-31 + 26 = -5 (111111011) +-31 + 27 = -4 (111111100) +-31 + 28 = -3 (111111101) +-31 + 29 = -2 (111111110) +-31 + 30 = -1 (111111111) +-31 + 31 = 0 (000000000) +-31 + -32 = -63 (111000001) +-31 + -31 = -62 (111000010) +-31 + -30 = -61 (111000011) +-31 + -29 = -60 (111000100) +-31 + -28 = -59 (111000101) +-31 + -27 = -58 (111000110) +-31 + -26 = -57 (111000111) +-31 + -25 = -56 (111001000) +-31 + -24 = -55 (111001001) +-31 + -23 = -54 (111001010) +-31 + -22 = -53 (111001011) +-31 + -21 = -52 (111001100) +-31 + -20 = -51 (111001101) +-31 + -19 = -50 (111001110) +-31 + -18 = -49 (111001111) +-31 + -17 = -48 (111010000) +-31 + -16 = -47 (111010001) +-31 + -15 = -46 (111010010) +-31 + -14 = -45 (111010011) +-31 + -13 = -44 (111010100) +-31 + -12 = -43 (111010101) +-31 + -11 = -42 (111010110) +-31 + -10 = -41 (111010111) +-31 + -9 = -40 (111011000) +-31 + -8 = -39 (111011001) +-31 + -7 = -38 (111011010) +-31 + -6 = -37 (111011011) +-31 + -5 = -36 (111011100) +-31 + -4 = -35 (111011101) +-31 + -3 = -34 (111011110) +-31 + -2 = -33 (111011111) +-31 + -1 = -32 (111100000) +-30 + 0 = -30 (111100010) +-30 + 1 = -29 (111100011) +-30 + 2 = -28 (111100100) +-30 + 3 = -27 (111100101) +-30 + 4 = -26 (111100110) +-30 + 5 = -25 (111100111) +-30 + 6 = -24 (111101000) +-30 + 7 = -23 (111101001) +-30 + 8 = -22 (111101010) +-30 + 9 = -21 (111101011) +-30 + 10 = -20 (111101100) +-30 + 11 = -19 (111101101) +-30 + 12 = -18 (111101110) +-30 + 13 = -17 (111101111) +-30 + 14 = -16 (111110000) +-30 + 15 = -15 (111110001) +-30 + 16 = -14 (111110010) +-30 + 17 = -13 (111110011) +-30 + 18 = -12 (111110100) +-30 + 19 = -11 (111110101) +-30 + 20 = -10 (111110110) +-30 + 21 = -9 (111110111) +-30 + 22 = -8 (111111000) +-30 + 23 = -7 (111111001) +-30 + 24 = -6 (111111010) +-30 + 25 = -5 (111111011) +-30 + 26 = -4 (111111100) +-30 + 27 = -3 (111111101) +-30 + 28 = -2 (111111110) +-30 + 29 = -1 (111111111) +-30 + 30 = 0 (000000000) +-30 + 31 = 1 (000000001) +-30 + -32 = -62 (111000010) +-30 + -31 = -61 (111000011) +-30 + -30 = -60 (111000100) +-30 + -29 = -59 (111000101) +-30 + -28 = -58 (111000110) +-30 + -27 = -57 (111000111) +-30 + -26 = -56 (111001000) +-30 + -25 = -55 (111001001) +-30 + -24 = -54 (111001010) +-30 + -23 = -53 (111001011) +-30 + -22 = -52 (111001100) +-30 + -21 = -51 (111001101) +-30 + -20 = -50 (111001110) +-30 + -19 = -49 (111001111) +-30 + -18 = -48 (111010000) +-30 + -17 = -47 (111010001) +-30 + -16 = -46 (111010010) +-30 + -15 = -45 (111010011) +-30 + -14 = -44 (111010100) +-30 + -13 = -43 (111010101) +-30 + -12 = -42 (111010110) +-30 + -11 = -41 (111010111) +-30 + -10 = -40 (111011000) +-30 + -9 = -39 (111011001) +-30 + -8 = -38 (111011010) +-30 + -7 = -37 (111011011) +-30 + -6 = -36 (111011100) +-30 + -5 = -35 (111011101) +-30 + -4 = -34 (111011110) +-30 + -3 = -33 (111011111) +-30 + -2 = -32 (111100000) +-30 + -1 = -31 (111100001) +-29 + 0 = -29 (111100011) +-29 + 1 = -28 (111100100) +-29 + 2 = -27 (111100101) +-29 + 3 = -26 (111100110) +-29 + 4 = -25 (111100111) +-29 + 5 = -24 (111101000) +-29 + 6 = -23 (111101001) +-29 + 7 = -22 (111101010) +-29 + 8 = -21 (111101011) +-29 + 9 = -20 (111101100) +-29 + 10 = -19 (111101101) +-29 + 11 = -18 (111101110) +-29 + 12 = -17 (111101111) +-29 + 13 = -16 (111110000) +-29 + 14 = -15 (111110001) +-29 + 15 = -14 (111110010) +-29 + 16 = -13 (111110011) +-29 + 17 = -12 (111110100) +-29 + 18 = -11 (111110101) +-29 + 19 = -10 (111110110) +-29 + 20 = -9 (111110111) +-29 + 21 = -8 (111111000) +-29 + 22 = -7 (111111001) +-29 + 23 = -6 (111111010) +-29 + 24 = -5 (111111011) +-29 + 25 = -4 (111111100) +-29 + 26 = -3 (111111101) +-29 + 27 = -2 (111111110) +-29 + 28 = -1 (111111111) +-29 + 29 = 0 (000000000) +-29 + 30 = 1 (000000001) +-29 + 31 = 2 (000000010) +-29 + -32 = -61 (111000011) +-29 + -31 = -60 (111000100) +-29 + -30 = -59 (111000101) +-29 + -29 = -58 (111000110) +-29 + -28 = -57 (111000111) +-29 + -27 = -56 (111001000) +-29 + -26 = -55 (111001001) +-29 + -25 = -54 (111001010) +-29 + -24 = -53 (111001011) +-29 + -23 = -52 (111001100) +-29 + -22 = -51 (111001101) +-29 + -21 = -50 (111001110) +-29 + -20 = -49 (111001111) +-29 + -19 = -48 (111010000) +-29 + -18 = -47 (111010001) +-29 + -17 = -46 (111010010) +-29 + -16 = -45 (111010011) +-29 + -15 = -44 (111010100) +-29 + -14 = -43 (111010101) +-29 + -13 = -42 (111010110) +-29 + -12 = -41 (111010111) +-29 + -11 = -40 (111011000) +-29 + -10 = -39 (111011001) +-29 + -9 = -38 (111011010) +-29 + -8 = -37 (111011011) +-29 + -7 = -36 (111011100) +-29 + -6 = -35 (111011101) +-29 + -5 = -34 (111011110) +-29 + -4 = -33 (111011111) +-29 + -3 = -32 (111100000) +-29 + -2 = -31 (111100001) +-29 + -1 = -30 (111100010) +-28 + 0 = -28 (111100100) +-28 + 1 = -27 (111100101) +-28 + 2 = -26 (111100110) +-28 + 3 = -25 (111100111) +-28 + 4 = -24 (111101000) +-28 + 5 = -23 (111101001) +-28 + 6 = -22 (111101010) +-28 + 7 = -21 (111101011) +-28 + 8 = -20 (111101100) +-28 + 9 = -19 (111101101) +-28 + 10 = -18 (111101110) +-28 + 11 = -17 (111101111) +-28 + 12 = -16 (111110000) +-28 + 13 = -15 (111110001) +-28 + 14 = -14 (111110010) +-28 + 15 = -13 (111110011) +-28 + 16 = -12 (111110100) +-28 + 17 = -11 (111110101) +-28 + 18 = -10 (111110110) +-28 + 19 = -9 (111110111) +-28 + 20 = -8 (111111000) +-28 + 21 = -7 (111111001) +-28 + 22 = -6 (111111010) +-28 + 23 = -5 (111111011) +-28 + 24 = -4 (111111100) +-28 + 25 = -3 (111111101) +-28 + 26 = -2 (111111110) +-28 + 27 = -1 (111111111) +-28 + 28 = 0 (000000000) +-28 + 29 = 1 (000000001) +-28 + 30 = 2 (000000010) +-28 + 31 = 3 (000000011) +-28 + -32 = -60 (111000100) +-28 + -31 = -59 (111000101) +-28 + -30 = -58 (111000110) +-28 + -29 = -57 (111000111) +-28 + -28 = -56 (111001000) +-28 + -27 = -55 (111001001) +-28 + -26 = -54 (111001010) +-28 + -25 = -53 (111001011) +-28 + -24 = -52 (111001100) +-28 + -23 = -51 (111001101) +-28 + -22 = -50 (111001110) +-28 + -21 = -49 (111001111) +-28 + -20 = -48 (111010000) +-28 + -19 = -47 (111010001) +-28 + -18 = -46 (111010010) +-28 + -17 = -45 (111010011) +-28 + -16 = -44 (111010100) +-28 + -15 = -43 (111010101) +-28 + -14 = -42 (111010110) +-28 + -13 = -41 (111010111) +-28 + -12 = -40 (111011000) +-28 + -11 = -39 (111011001) +-28 + -10 = -38 (111011010) +-28 + -9 = -37 (111011011) +-28 + -8 = -36 (111011100) +-28 + -7 = -35 (111011101) +-28 + -6 = -34 (111011110) +-28 + -5 = -33 (111011111) +-28 + -4 = -32 (111100000) +-28 + -3 = -31 (111100001) +-28 + -2 = -30 (111100010) +-28 + -1 = -29 (111100011) +-27 + 0 = -27 (111100101) +-27 + 1 = -26 (111100110) +-27 + 2 = -25 (111100111) +-27 + 3 = -24 (111101000) +-27 + 4 = -23 (111101001) +-27 + 5 = -22 (111101010) +-27 + 6 = -21 (111101011) +-27 + 7 = -20 (111101100) +-27 + 8 = -19 (111101101) +-27 + 9 = -18 (111101110) +-27 + 10 = -17 (111101111) +-27 + 11 = -16 (111110000) +-27 + 12 = -15 (111110001) +-27 + 13 = -14 (111110010) +-27 + 14 = -13 (111110011) +-27 + 15 = -12 (111110100) +-27 + 16 = -11 (111110101) +-27 + 17 = -10 (111110110) +-27 + 18 = -9 (111110111) +-27 + 19 = -8 (111111000) +-27 + 20 = -7 (111111001) +-27 + 21 = -6 (111111010) +-27 + 22 = -5 (111111011) +-27 + 23 = -4 (111111100) +-27 + 24 = -3 (111111101) +-27 + 25 = -2 (111111110) +-27 + 26 = -1 (111111111) +-27 + 27 = 0 (000000000) +-27 + 28 = 1 (000000001) +-27 + 29 = 2 (000000010) +-27 + 30 = 3 (000000011) +-27 + 31 = 4 (000000100) +-27 + -32 = -59 (111000101) +-27 + -31 = -58 (111000110) +-27 + -30 = -57 (111000111) +-27 + -29 = -56 (111001000) +-27 + -28 = -55 (111001001) +-27 + -27 = -54 (111001010) +-27 + -26 = -53 (111001011) +-27 + -25 = -52 (111001100) +-27 + -24 = -51 (111001101) +-27 + -23 = -50 (111001110) +-27 + -22 = -49 (111001111) +-27 + -21 = -48 (111010000) +-27 + -20 = -47 (111010001) +-27 + -19 = -46 (111010010) +-27 + -18 = -45 (111010011) +-27 + -17 = -44 (111010100) +-27 + -16 = -43 (111010101) +-27 + -15 = -42 (111010110) +-27 + -14 = -41 (111010111) +-27 + -13 = -40 (111011000) +-27 + -12 = -39 (111011001) +-27 + -11 = -38 (111011010) +-27 + -10 = -37 (111011011) +-27 + -9 = -36 (111011100) +-27 + -8 = -35 (111011101) +-27 + -7 = -34 (111011110) +-27 + -6 = -33 (111011111) +-27 + -5 = -32 (111100000) +-27 + -4 = -31 (111100001) +-27 + -3 = -30 (111100010) +-27 + -2 = -29 (111100011) +-27 + -1 = -28 (111100100) +-26 + 0 = -26 (111100110) +-26 + 1 = -25 (111100111) +-26 + 2 = -24 (111101000) +-26 + 3 = -23 (111101001) +-26 + 4 = -22 (111101010) +-26 + 5 = -21 (111101011) +-26 + 6 = -20 (111101100) +-26 + 7 = -19 (111101101) +-26 + 8 = -18 (111101110) +-26 + 9 = -17 (111101111) +-26 + 10 = -16 (111110000) +-26 + 11 = -15 (111110001) +-26 + 12 = -14 (111110010) +-26 + 13 = -13 (111110011) +-26 + 14 = -12 (111110100) +-26 + 15 = -11 (111110101) +-26 + 16 = -10 (111110110) +-26 + 17 = -9 (111110111) +-26 + 18 = -8 (111111000) +-26 + 19 = -7 (111111001) +-26 + 20 = -6 (111111010) +-26 + 21 = -5 (111111011) +-26 + 22 = -4 (111111100) +-26 + 23 = -3 (111111101) +-26 + 24 = -2 (111111110) +-26 + 25 = -1 (111111111) +-26 + 26 = 0 (000000000) +-26 + 27 = 1 (000000001) +-26 + 28 = 2 (000000010) +-26 + 29 = 3 (000000011) +-26 + 30 = 4 (000000100) +-26 + 31 = 5 (000000101) +-26 + -32 = -58 (111000110) +-26 + -31 = -57 (111000111) +-26 + -30 = -56 (111001000) +-26 + -29 = -55 (111001001) +-26 + -28 = -54 (111001010) +-26 + -27 = -53 (111001011) +-26 + -26 = -52 (111001100) +-26 + -25 = -51 (111001101) +-26 + -24 = -50 (111001110) +-26 + -23 = -49 (111001111) +-26 + -22 = -48 (111010000) +-26 + -21 = -47 (111010001) +-26 + -20 = -46 (111010010) +-26 + -19 = -45 (111010011) +-26 + -18 = -44 (111010100) +-26 + -17 = -43 (111010101) +-26 + -16 = -42 (111010110) +-26 + -15 = -41 (111010111) +-26 + -14 = -40 (111011000) +-26 + -13 = -39 (111011001) +-26 + -12 = -38 (111011010) +-26 + -11 = -37 (111011011) +-26 + -10 = -36 (111011100) +-26 + -9 = -35 (111011101) +-26 + -8 = -34 (111011110) +-26 + -7 = -33 (111011111) +-26 + -6 = -32 (111100000) +-26 + -5 = -31 (111100001) +-26 + -4 = -30 (111100010) +-26 + -3 = -29 (111100011) +-26 + -2 = -28 (111100100) +-26 + -1 = -27 (111100101) +-25 + 0 = -25 (111100111) +-25 + 1 = -24 (111101000) +-25 + 2 = -23 (111101001) +-25 + 3 = -22 (111101010) +-25 + 4 = -21 (111101011) +-25 + 5 = -20 (111101100) +-25 + 6 = -19 (111101101) +-25 + 7 = -18 (111101110) +-25 + 8 = -17 (111101111) +-25 + 9 = -16 (111110000) +-25 + 10 = -15 (111110001) +-25 + 11 = -14 (111110010) +-25 + 12 = -13 (111110011) +-25 + 13 = -12 (111110100) +-25 + 14 = -11 (111110101) +-25 + 15 = -10 (111110110) +-25 + 16 = -9 (111110111) +-25 + 17 = -8 (111111000) +-25 + 18 = -7 (111111001) +-25 + 19 = -6 (111111010) +-25 + 20 = -5 (111111011) +-25 + 21 = -4 (111111100) +-25 + 22 = -3 (111111101) +-25 + 23 = -2 (111111110) +-25 + 24 = -1 (111111111) +-25 + 25 = 0 (000000000) +-25 + 26 = 1 (000000001) +-25 + 27 = 2 (000000010) +-25 + 28 = 3 (000000011) +-25 + 29 = 4 (000000100) +-25 + 30 = 5 (000000101) +-25 + 31 = 6 (000000110) +-25 + -32 = -57 (111000111) +-25 + -31 = -56 (111001000) +-25 + -30 = -55 (111001001) +-25 + -29 = -54 (111001010) +-25 + -28 = -53 (111001011) +-25 + -27 = -52 (111001100) +-25 + -26 = -51 (111001101) +-25 + -25 = -50 (111001110) +-25 + -24 = -49 (111001111) +-25 + -23 = -48 (111010000) +-25 + -22 = -47 (111010001) +-25 + -21 = -46 (111010010) +-25 + -20 = -45 (111010011) +-25 + -19 = -44 (111010100) +-25 + -18 = -43 (111010101) +-25 + -17 = -42 (111010110) +-25 + -16 = -41 (111010111) +-25 + -15 = -40 (111011000) +-25 + -14 = -39 (111011001) +-25 + -13 = -38 (111011010) +-25 + -12 = -37 (111011011) +-25 + -11 = -36 (111011100) +-25 + -10 = -35 (111011101) +-25 + -9 = -34 (111011110) +-25 + -8 = -33 (111011111) +-25 + -7 = -32 (111100000) +-25 + -6 = -31 (111100001) +-25 + -5 = -30 (111100010) +-25 + -4 = -29 (111100011) +-25 + -3 = -28 (111100100) +-25 + -2 = -27 (111100101) +-25 + -1 = -26 (111100110) +-24 + 0 = -24 (111101000) +-24 + 1 = -23 (111101001) +-24 + 2 = -22 (111101010) +-24 + 3 = -21 (111101011) +-24 + 4 = -20 (111101100) +-24 + 5 = -19 (111101101) +-24 + 6 = -18 (111101110) +-24 + 7 = -17 (111101111) +-24 + 8 = -16 (111110000) +-24 + 9 = -15 (111110001) +-24 + 10 = -14 (111110010) +-24 + 11 = -13 (111110011) +-24 + 12 = -12 (111110100) +-24 + 13 = -11 (111110101) +-24 + 14 = -10 (111110110) +-24 + 15 = -9 (111110111) +-24 + 16 = -8 (111111000) +-24 + 17 = -7 (111111001) +-24 + 18 = -6 (111111010) +-24 + 19 = -5 (111111011) +-24 + 20 = -4 (111111100) +-24 + 21 = -3 (111111101) +-24 + 22 = -2 (111111110) +-24 + 23 = -1 (111111111) +-24 + 24 = 0 (000000000) +-24 + 25 = 1 (000000001) +-24 + 26 = 2 (000000010) +-24 + 27 = 3 (000000011) +-24 + 28 = 4 (000000100) +-24 + 29 = 5 (000000101) +-24 + 30 = 6 (000000110) +-24 + 31 = 7 (000000111) +-24 + -32 = -56 (111001000) +-24 + -31 = -55 (111001001) +-24 + -30 = -54 (111001010) +-24 + -29 = -53 (111001011) +-24 + -28 = -52 (111001100) +-24 + -27 = -51 (111001101) +-24 + -26 = -50 (111001110) +-24 + -25 = -49 (111001111) +-24 + -24 = -48 (111010000) +-24 + -23 = -47 (111010001) +-24 + -22 = -46 (111010010) +-24 + -21 = -45 (111010011) +-24 + -20 = -44 (111010100) +-24 + -19 = -43 (111010101) +-24 + -18 = -42 (111010110) +-24 + -17 = -41 (111010111) +-24 + -16 = -40 (111011000) +-24 + -15 = -39 (111011001) +-24 + -14 = -38 (111011010) +-24 + -13 = -37 (111011011) +-24 + -12 = -36 (111011100) +-24 + -11 = -35 (111011101) +-24 + -10 = -34 (111011110) +-24 + -9 = -33 (111011111) +-24 + -8 = -32 (111100000) +-24 + -7 = -31 (111100001) +-24 + -6 = -30 (111100010) +-24 + -5 = -29 (111100011) +-24 + -4 = -28 (111100100) +-24 + -3 = -27 (111100101) +-24 + -2 = -26 (111100110) +-24 + -1 = -25 (111100111) +-23 + 0 = -23 (111101001) +-23 + 1 = -22 (111101010) +-23 + 2 = -21 (111101011) +-23 + 3 = -20 (111101100) +-23 + 4 = -19 (111101101) +-23 + 5 = -18 (111101110) +-23 + 6 = -17 (111101111) +-23 + 7 = -16 (111110000) +-23 + 8 = -15 (111110001) +-23 + 9 = -14 (111110010) +-23 + 10 = -13 (111110011) +-23 + 11 = -12 (111110100) +-23 + 12 = -11 (111110101) +-23 + 13 = -10 (111110110) +-23 + 14 = -9 (111110111) +-23 + 15 = -8 (111111000) +-23 + 16 = -7 (111111001) +-23 + 17 = -6 (111111010) +-23 + 18 = -5 (111111011) +-23 + 19 = -4 (111111100) +-23 + 20 = -3 (111111101) +-23 + 21 = -2 (111111110) +-23 + 22 = -1 (111111111) +-23 + 23 = 0 (000000000) +-23 + 24 = 1 (000000001) +-23 + 25 = 2 (000000010) +-23 + 26 = 3 (000000011) +-23 + 27 = 4 (000000100) +-23 + 28 = 5 (000000101) +-23 + 29 = 6 (000000110) +-23 + 30 = 7 (000000111) +-23 + 31 = 8 (000001000) +-23 + -32 = -55 (111001001) +-23 + -31 = -54 (111001010) +-23 + -30 = -53 (111001011) +-23 + -29 = -52 (111001100) +-23 + -28 = -51 (111001101) +-23 + -27 = -50 (111001110) +-23 + -26 = -49 (111001111) +-23 + -25 = -48 (111010000) +-23 + -24 = -47 (111010001) +-23 + -23 = -46 (111010010) +-23 + -22 = -45 (111010011) +-23 + -21 = -44 (111010100) +-23 + -20 = -43 (111010101) +-23 + -19 = -42 (111010110) +-23 + -18 = -41 (111010111) +-23 + -17 = -40 (111011000) +-23 + -16 = -39 (111011001) +-23 + -15 = -38 (111011010) +-23 + -14 = -37 (111011011) +-23 + -13 = -36 (111011100) +-23 + -12 = -35 (111011101) +-23 + -11 = -34 (111011110) +-23 + -10 = -33 (111011111) +-23 + -9 = -32 (111100000) +-23 + -8 = -31 (111100001) +-23 + -7 = -30 (111100010) +-23 + -6 = -29 (111100011) +-23 + -5 = -28 (111100100) +-23 + -4 = -27 (111100101) +-23 + -3 = -26 (111100110) +-23 + -2 = -25 (111100111) +-23 + -1 = -24 (111101000) +-22 + 0 = -22 (111101010) +-22 + 1 = -21 (111101011) +-22 + 2 = -20 (111101100) +-22 + 3 = -19 (111101101) +-22 + 4 = -18 (111101110) +-22 + 5 = -17 (111101111) +-22 + 6 = -16 (111110000) +-22 + 7 = -15 (111110001) +-22 + 8 = -14 (111110010) +-22 + 9 = -13 (111110011) +-22 + 10 = -12 (111110100) +-22 + 11 = -11 (111110101) +-22 + 12 = -10 (111110110) +-22 + 13 = -9 (111110111) +-22 + 14 = -8 (111111000) +-22 + 15 = -7 (111111001) +-22 + 16 = -6 (111111010) +-22 + 17 = -5 (111111011) +-22 + 18 = -4 (111111100) +-22 + 19 = -3 (111111101) +-22 + 20 = -2 (111111110) +-22 + 21 = -1 (111111111) +-22 + 22 = 0 (000000000) +-22 + 23 = 1 (000000001) +-22 + 24 = 2 (000000010) +-22 + 25 = 3 (000000011) +-22 + 26 = 4 (000000100) +-22 + 27 = 5 (000000101) +-22 + 28 = 6 (000000110) +-22 + 29 = 7 (000000111) +-22 + 30 = 8 (000001000) +-22 + 31 = 9 (000001001) +-22 + -32 = -54 (111001010) +-22 + -31 = -53 (111001011) +-22 + -30 = -52 (111001100) +-22 + -29 = -51 (111001101) +-22 + -28 = -50 (111001110) +-22 + -27 = -49 (111001111) +-22 + -26 = -48 (111010000) +-22 + -25 = -47 (111010001) +-22 + -24 = -46 (111010010) +-22 + -23 = -45 (111010011) +-22 + -22 = -44 (111010100) +-22 + -21 = -43 (111010101) +-22 + -20 = -42 (111010110) +-22 + -19 = -41 (111010111) +-22 + -18 = -40 (111011000) +-22 + -17 = -39 (111011001) +-22 + -16 = -38 (111011010) +-22 + -15 = -37 (111011011) +-22 + -14 = -36 (111011100) +-22 + -13 = -35 (111011101) +-22 + -12 = -34 (111011110) +-22 + -11 = -33 (111011111) +-22 + -10 = -32 (111100000) +-22 + -9 = -31 (111100001) +-22 + -8 = -30 (111100010) +-22 + -7 = -29 (111100011) +-22 + -6 = -28 (111100100) +-22 + -5 = -27 (111100101) +-22 + -4 = -26 (111100110) +-22 + -3 = -25 (111100111) +-22 + -2 = -24 (111101000) +-22 + -1 = -23 (111101001) +-21 + 0 = -21 (111101011) +-21 + 1 = -20 (111101100) +-21 + 2 = -19 (111101101) +-21 + 3 = -18 (111101110) +-21 + 4 = -17 (111101111) +-21 + 5 = -16 (111110000) +-21 + 6 = -15 (111110001) +-21 + 7 = -14 (111110010) +-21 + 8 = -13 (111110011) +-21 + 9 = -12 (111110100) +-21 + 10 = -11 (111110101) +-21 + 11 = -10 (111110110) +-21 + 12 = -9 (111110111) +-21 + 13 = -8 (111111000) +-21 + 14 = -7 (111111001) +-21 + 15 = -6 (111111010) +-21 + 16 = -5 (111111011) +-21 + 17 = -4 (111111100) +-21 + 18 = -3 (111111101) +-21 + 19 = -2 (111111110) +-21 + 20 = -1 (111111111) +-21 + 21 = 0 (000000000) +-21 + 22 = 1 (000000001) +-21 + 23 = 2 (000000010) +-21 + 24 = 3 (000000011) +-21 + 25 = 4 (000000100) +-21 + 26 = 5 (000000101) +-21 + 27 = 6 (000000110) +-21 + 28 = 7 (000000111) +-21 + 29 = 8 (000001000) +-21 + 30 = 9 (000001001) +-21 + 31 = 10 (000001010) +-21 + -32 = -53 (111001011) +-21 + -31 = -52 (111001100) +-21 + -30 = -51 (111001101) +-21 + -29 = -50 (111001110) +-21 + -28 = -49 (111001111) +-21 + -27 = -48 (111010000) +-21 + -26 = -47 (111010001) +-21 + -25 = -46 (111010010) +-21 + -24 = -45 (111010011) +-21 + -23 = -44 (111010100) +-21 + -22 = -43 (111010101) +-21 + -21 = -42 (111010110) +-21 + -20 = -41 (111010111) +-21 + -19 = -40 (111011000) +-21 + -18 = -39 (111011001) +-21 + -17 = -38 (111011010) +-21 + -16 = -37 (111011011) +-21 + -15 = -36 (111011100) +-21 + -14 = -35 (111011101) +-21 + -13 = -34 (111011110) +-21 + -12 = -33 (111011111) +-21 + -11 = -32 (111100000) +-21 + -10 = -31 (111100001) +-21 + -9 = -30 (111100010) +-21 + -8 = -29 (111100011) +-21 + -7 = -28 (111100100) +-21 + -6 = -27 (111100101) +-21 + -5 = -26 (111100110) +-21 + -4 = -25 (111100111) +-21 + -3 = -24 (111101000) +-21 + -2 = -23 (111101001) +-21 + -1 = -22 (111101010) +-20 + 0 = -20 (111101100) +-20 + 1 = -19 (111101101) +-20 + 2 = -18 (111101110) +-20 + 3 = -17 (111101111) +-20 + 4 = -16 (111110000) +-20 + 5 = -15 (111110001) +-20 + 6 = -14 (111110010) +-20 + 7 = -13 (111110011) +-20 + 8 = -12 (111110100) +-20 + 9 = -11 (111110101) +-20 + 10 = -10 (111110110) +-20 + 11 = -9 (111110111) +-20 + 12 = -8 (111111000) +-20 + 13 = -7 (111111001) +-20 + 14 = -6 (111111010) +-20 + 15 = -5 (111111011) +-20 + 16 = -4 (111111100) +-20 + 17 = -3 (111111101) +-20 + 18 = -2 (111111110) +-20 + 19 = -1 (111111111) +-20 + 20 = 0 (000000000) +-20 + 21 = 1 (000000001) +-20 + 22 = 2 (000000010) +-20 + 23 = 3 (000000011) +-20 + 24 = 4 (000000100) +-20 + 25 = 5 (000000101) +-20 + 26 = 6 (000000110) +-20 + 27 = 7 (000000111) +-20 + 28 = 8 (000001000) +-20 + 29 = 9 (000001001) +-20 + 30 = 10 (000001010) +-20 + 31 = 11 (000001011) +-20 + -32 = -52 (111001100) +-20 + -31 = -51 (111001101) +-20 + -30 = -50 (111001110) +-20 + -29 = -49 (111001111) +-20 + -28 = -48 (111010000) +-20 + -27 = -47 (111010001) +-20 + -26 = -46 (111010010) +-20 + -25 = -45 (111010011) +-20 + -24 = -44 (111010100) +-20 + -23 = -43 (111010101) +-20 + -22 = -42 (111010110) +-20 + -21 = -41 (111010111) +-20 + -20 = -40 (111011000) +-20 + -19 = -39 (111011001) +-20 + -18 = -38 (111011010) +-20 + -17 = -37 (111011011) +-20 + -16 = -36 (111011100) +-20 + -15 = -35 (111011101) +-20 + -14 = -34 (111011110) +-20 + -13 = -33 (111011111) +-20 + -12 = -32 (111100000) +-20 + -11 = -31 (111100001) +-20 + -10 = -30 (111100010) +-20 + -9 = -29 (111100011) +-20 + -8 = -28 (111100100) +-20 + -7 = -27 (111100101) +-20 + -6 = -26 (111100110) +-20 + -5 = -25 (111100111) +-20 + -4 = -24 (111101000) +-20 + -3 = -23 (111101001) +-20 + -2 = -22 (111101010) +-20 + -1 = -21 (111101011) +-19 + 0 = -19 (111101101) +-19 + 1 = -18 (111101110) +-19 + 2 = -17 (111101111) +-19 + 3 = -16 (111110000) +-19 + 4 = -15 (111110001) +-19 + 5 = -14 (111110010) +-19 + 6 = -13 (111110011) +-19 + 7 = -12 (111110100) +-19 + 8 = -11 (111110101) +-19 + 9 = -10 (111110110) +-19 + 10 = -9 (111110111) +-19 + 11 = -8 (111111000) +-19 + 12 = -7 (111111001) +-19 + 13 = -6 (111111010) +-19 + 14 = -5 (111111011) +-19 + 15 = -4 (111111100) +-19 + 16 = -3 (111111101) +-19 + 17 = -2 (111111110) +-19 + 18 = -1 (111111111) +-19 + 19 = 0 (000000000) +-19 + 20 = 1 (000000001) +-19 + 21 = 2 (000000010) +-19 + 22 = 3 (000000011) +-19 + 23 = 4 (000000100) +-19 + 24 = 5 (000000101) +-19 + 25 = 6 (000000110) +-19 + 26 = 7 (000000111) +-19 + 27 = 8 (000001000) +-19 + 28 = 9 (000001001) +-19 + 29 = 10 (000001010) +-19 + 30 = 11 (000001011) +-19 + 31 = 12 (000001100) +-19 + -32 = -51 (111001101) +-19 + -31 = -50 (111001110) +-19 + -30 = -49 (111001111) +-19 + -29 = -48 (111010000) +-19 + -28 = -47 (111010001) +-19 + -27 = -46 (111010010) +-19 + -26 = -45 (111010011) +-19 + -25 = -44 (111010100) +-19 + -24 = -43 (111010101) +-19 + -23 = -42 (111010110) +-19 + -22 = -41 (111010111) +-19 + -21 = -40 (111011000) +-19 + -20 = -39 (111011001) +-19 + -19 = -38 (111011010) +-19 + -18 = -37 (111011011) +-19 + -17 = -36 (111011100) +-19 + -16 = -35 (111011101) +-19 + -15 = -34 (111011110) +-19 + -14 = -33 (111011111) +-19 + -13 = -32 (111100000) +-19 + -12 = -31 (111100001) +-19 + -11 = -30 (111100010) +-19 + -10 = -29 (111100011) +-19 + -9 = -28 (111100100) +-19 + -8 = -27 (111100101) +-19 + -7 = -26 (111100110) +-19 + -6 = -25 (111100111) +-19 + -5 = -24 (111101000) +-19 + -4 = -23 (111101001) +-19 + -3 = -22 (111101010) +-19 + -2 = -21 (111101011) +-19 + -1 = -20 (111101100) +-18 + 0 = -18 (111101110) +-18 + 1 = -17 (111101111) +-18 + 2 = -16 (111110000) +-18 + 3 = -15 (111110001) +-18 + 4 = -14 (111110010) +-18 + 5 = -13 (111110011) +-18 + 6 = -12 (111110100) +-18 + 7 = -11 (111110101) +-18 + 8 = -10 (111110110) +-18 + 9 = -9 (111110111) +-18 + 10 = -8 (111111000) +-18 + 11 = -7 (111111001) +-18 + 12 = -6 (111111010) +-18 + 13 = -5 (111111011) +-18 + 14 = -4 (111111100) +-18 + 15 = -3 (111111101) +-18 + 16 = -2 (111111110) +-18 + 17 = -1 (111111111) +-18 + 18 = 0 (000000000) +-18 + 19 = 1 (000000001) +-18 + 20 = 2 (000000010) +-18 + 21 = 3 (000000011) +-18 + 22 = 4 (000000100) +-18 + 23 = 5 (000000101) +-18 + 24 = 6 (000000110) +-18 + 25 = 7 (000000111) +-18 + 26 = 8 (000001000) +-18 + 27 = 9 (000001001) +-18 + 28 = 10 (000001010) +-18 + 29 = 11 (000001011) +-18 + 30 = 12 (000001100) +-18 + 31 = 13 (000001101) +-18 + -32 = -50 (111001110) +-18 + -31 = -49 (111001111) +-18 + -30 = -48 (111010000) +-18 + -29 = -47 (111010001) +-18 + -28 = -46 (111010010) +-18 + -27 = -45 (111010011) +-18 + -26 = -44 (111010100) +-18 + -25 = -43 (111010101) +-18 + -24 = -42 (111010110) +-18 + -23 = -41 (111010111) +-18 + -22 = -40 (111011000) +-18 + -21 = -39 (111011001) +-18 + -20 = -38 (111011010) +-18 + -19 = -37 (111011011) +-18 + -18 = -36 (111011100) +-18 + -17 = -35 (111011101) +-18 + -16 = -34 (111011110) +-18 + -15 = -33 (111011111) +-18 + -14 = -32 (111100000) +-18 + -13 = -31 (111100001) +-18 + -12 = -30 (111100010) +-18 + -11 = -29 (111100011) +-18 + -10 = -28 (111100100) +-18 + -9 = -27 (111100101) +-18 + -8 = -26 (111100110) +-18 + -7 = -25 (111100111) +-18 + -6 = -24 (111101000) +-18 + -5 = -23 (111101001) +-18 + -4 = -22 (111101010) +-18 + -3 = -21 (111101011) +-18 + -2 = -20 (111101100) +-18 + -1 = -19 (111101101) +-17 + 0 = -17 (111101111) +-17 + 1 = -16 (111110000) +-17 + 2 = -15 (111110001) +-17 + 3 = -14 (111110010) +-17 + 4 = -13 (111110011) +-17 + 5 = -12 (111110100) +-17 + 6 = -11 (111110101) +-17 + 7 = -10 (111110110) +-17 + 8 = -9 (111110111) +-17 + 9 = -8 (111111000) +-17 + 10 = -7 (111111001) +-17 + 11 = -6 (111111010) +-17 + 12 = -5 (111111011) +-17 + 13 = -4 (111111100) +-17 + 14 = -3 (111111101) +-17 + 15 = -2 (111111110) +-17 + 16 = -1 (111111111) +-17 + 17 = 0 (000000000) +-17 + 18 = 1 (000000001) +-17 + 19 = 2 (000000010) +-17 + 20 = 3 (000000011) +-17 + 21 = 4 (000000100) +-17 + 22 = 5 (000000101) +-17 + 23 = 6 (000000110) +-17 + 24 = 7 (000000111) +-17 + 25 = 8 (000001000) +-17 + 26 = 9 (000001001) +-17 + 27 = 10 (000001010) +-17 + 28 = 11 (000001011) +-17 + 29 = 12 (000001100) +-17 + 30 = 13 (000001101) +-17 + 31 = 14 (000001110) +-17 + -32 = -49 (111001111) +-17 + -31 = -48 (111010000) +-17 + -30 = -47 (111010001) +-17 + -29 = -46 (111010010) +-17 + -28 = -45 (111010011) +-17 + -27 = -44 (111010100) +-17 + -26 = -43 (111010101) +-17 + -25 = -42 (111010110) +-17 + -24 = -41 (111010111) +-17 + -23 = -40 (111011000) +-17 + -22 = -39 (111011001) +-17 + -21 = -38 (111011010) +-17 + -20 = -37 (111011011) +-17 + -19 = -36 (111011100) +-17 + -18 = -35 (111011101) +-17 + -17 = -34 (111011110) +-17 + -16 = -33 (111011111) +-17 + -15 = -32 (111100000) +-17 + -14 = -31 (111100001) +-17 + -13 = -30 (111100010) +-17 + -12 = -29 (111100011) +-17 + -11 = -28 (111100100) +-17 + -10 = -27 (111100101) +-17 + -9 = -26 (111100110) +-17 + -8 = -25 (111100111) +-17 + -7 = -24 (111101000) +-17 + -6 = -23 (111101001) +-17 + -5 = -22 (111101010) +-17 + -4 = -21 (111101011) +-17 + -3 = -20 (111101100) +-17 + -2 = -19 (111101101) +-17 + -1 = -18 (111101110) +-16 + 0 = -16 (111110000) +-16 + 1 = -15 (111110001) +-16 + 2 = -14 (111110010) +-16 + 3 = -13 (111110011) +-16 + 4 = -12 (111110100) +-16 + 5 = -11 (111110101) +-16 + 6 = -10 (111110110) +-16 + 7 = -9 (111110111) +-16 + 8 = -8 (111111000) +-16 + 9 = -7 (111111001) +-16 + 10 = -6 (111111010) +-16 + 11 = -5 (111111011) +-16 + 12 = -4 (111111100) +-16 + 13 = -3 (111111101) +-16 + 14 = -2 (111111110) +-16 + 15 = -1 (111111111) +-16 + 16 = 0 (000000000) +-16 + 17 = 1 (000000001) +-16 + 18 = 2 (000000010) +-16 + 19 = 3 (000000011) +-16 + 20 = 4 (000000100) +-16 + 21 = 5 (000000101) +-16 + 22 = 6 (000000110) +-16 + 23 = 7 (000000111) +-16 + 24 = 8 (000001000) +-16 + 25 = 9 (000001001) +-16 + 26 = 10 (000001010) +-16 + 27 = 11 (000001011) +-16 + 28 = 12 (000001100) +-16 + 29 = 13 (000001101) +-16 + 30 = 14 (000001110) +-16 + 31 = 15 (000001111) +-16 + -32 = -48 (111010000) +-16 + -31 = -47 (111010001) +-16 + -30 = -46 (111010010) +-16 + -29 = -45 (111010011) +-16 + -28 = -44 (111010100) +-16 + -27 = -43 (111010101) +-16 + -26 = -42 (111010110) +-16 + -25 = -41 (111010111) +-16 + -24 = -40 (111011000) +-16 + -23 = -39 (111011001) +-16 + -22 = -38 (111011010) +-16 + -21 = -37 (111011011) +-16 + -20 = -36 (111011100) +-16 + -19 = -35 (111011101) +-16 + -18 = -34 (111011110) +-16 + -17 = -33 (111011111) +-16 + -16 = -32 (111100000) +-16 + -15 = -31 (111100001) +-16 + -14 = -30 (111100010) +-16 + -13 = -29 (111100011) +-16 + -12 = -28 (111100100) +-16 + -11 = -27 (111100101) +-16 + -10 = -26 (111100110) +-16 + -9 = -25 (111100111) +-16 + -8 = -24 (111101000) +-16 + -7 = -23 (111101001) +-16 + -6 = -22 (111101010) +-16 + -5 = -21 (111101011) +-16 + -4 = -20 (111101100) +-16 + -3 = -19 (111101101) +-16 + -2 = -18 (111101110) +-16 + -1 = -17 (111101111) +-15 + 0 = -15 (111110001) +-15 + 1 = -14 (111110010) +-15 + 2 = -13 (111110011) +-15 + 3 = -12 (111110100) +-15 + 4 = -11 (111110101) +-15 + 5 = -10 (111110110) +-15 + 6 = -9 (111110111) +-15 + 7 = -8 (111111000) +-15 + 8 = -7 (111111001) +-15 + 9 = -6 (111111010) +-15 + 10 = -5 (111111011) +-15 + 11 = -4 (111111100) +-15 + 12 = -3 (111111101) +-15 + 13 = -2 (111111110) +-15 + 14 = -1 (111111111) +-15 + 15 = 0 (000000000) +-15 + 16 = 1 (000000001) +-15 + 17 = 2 (000000010) +-15 + 18 = 3 (000000011) +-15 + 19 = 4 (000000100) +-15 + 20 = 5 (000000101) +-15 + 21 = 6 (000000110) +-15 + 22 = 7 (000000111) +-15 + 23 = 8 (000001000) +-15 + 24 = 9 (000001001) +-15 + 25 = 10 (000001010) +-15 + 26 = 11 (000001011) +-15 + 27 = 12 (000001100) +-15 + 28 = 13 (000001101) +-15 + 29 = 14 (000001110) +-15 + 30 = 15 (000001111) +-15 + 31 = 16 (000010000) +-15 + -32 = -47 (111010001) +-15 + -31 = -46 (111010010) +-15 + -30 = -45 (111010011) +-15 + -29 = -44 (111010100) +-15 + -28 = -43 (111010101) +-15 + -27 = -42 (111010110) +-15 + -26 = -41 (111010111) +-15 + -25 = -40 (111011000) +-15 + -24 = -39 (111011001) +-15 + -23 = -38 (111011010) +-15 + -22 = -37 (111011011) +-15 + -21 = -36 (111011100) +-15 + -20 = -35 (111011101) +-15 + -19 = -34 (111011110) +-15 + -18 = -33 (111011111) +-15 + -17 = -32 (111100000) +-15 + -16 = -31 (111100001) +-15 + -15 = -30 (111100010) +-15 + -14 = -29 (111100011) +-15 + -13 = -28 (111100100) +-15 + -12 = -27 (111100101) +-15 + -11 = -26 (111100110) +-15 + -10 = -25 (111100111) +-15 + -9 = -24 (111101000) +-15 + -8 = -23 (111101001) +-15 + -7 = -22 (111101010) +-15 + -6 = -21 (111101011) +-15 + -5 = -20 (111101100) +-15 + -4 = -19 (111101101) +-15 + -3 = -18 (111101110) +-15 + -2 = -17 (111101111) +-15 + -1 = -16 (111110000) +-14 + 0 = -14 (111110010) +-14 + 1 = -13 (111110011) +-14 + 2 = -12 (111110100) +-14 + 3 = -11 (111110101) +-14 + 4 = -10 (111110110) +-14 + 5 = -9 (111110111) +-14 + 6 = -8 (111111000) +-14 + 7 = -7 (111111001) +-14 + 8 = -6 (111111010) +-14 + 9 = -5 (111111011) +-14 + 10 = -4 (111111100) +-14 + 11 = -3 (111111101) +-14 + 12 = -2 (111111110) +-14 + 13 = -1 (111111111) +-14 + 14 = 0 (000000000) +-14 + 15 = 1 (000000001) +-14 + 16 = 2 (000000010) +-14 + 17 = 3 (000000011) +-14 + 18 = 4 (000000100) +-14 + 19 = 5 (000000101) +-14 + 20 = 6 (000000110) +-14 + 21 = 7 (000000111) +-14 + 22 = 8 (000001000) +-14 + 23 = 9 (000001001) +-14 + 24 = 10 (000001010) +-14 + 25 = 11 (000001011) +-14 + 26 = 12 (000001100) +-14 + 27 = 13 (000001101) +-14 + 28 = 14 (000001110) +-14 + 29 = 15 (000001111) +-14 + 30 = 16 (000010000) +-14 + 31 = 17 (000010001) +-14 + -32 = -46 (111010010) +-14 + -31 = -45 (111010011) +-14 + -30 = -44 (111010100) +-14 + -29 = -43 (111010101) +-14 + -28 = -42 (111010110) +-14 + -27 = -41 (111010111) +-14 + -26 = -40 (111011000) +-14 + -25 = -39 (111011001) +-14 + -24 = -38 (111011010) +-14 + -23 = -37 (111011011) +-14 + -22 = -36 (111011100) +-14 + -21 = -35 (111011101) +-14 + -20 = -34 (111011110) +-14 + -19 = -33 (111011111) +-14 + -18 = -32 (111100000) +-14 + -17 = -31 (111100001) +-14 + -16 = -30 (111100010) +-14 + -15 = -29 (111100011) +-14 + -14 = -28 (111100100) +-14 + -13 = -27 (111100101) +-14 + -12 = -26 (111100110) +-14 + -11 = -25 (111100111) +-14 + -10 = -24 (111101000) +-14 + -9 = -23 (111101001) +-14 + -8 = -22 (111101010) +-14 + -7 = -21 (111101011) +-14 + -6 = -20 (111101100) +-14 + -5 = -19 (111101101) +-14 + -4 = -18 (111101110) +-14 + -3 = -17 (111101111) +-14 + -2 = -16 (111110000) +-14 + -1 = -15 (111110001) +-13 + 0 = -13 (111110011) +-13 + 1 = -12 (111110100) +-13 + 2 = -11 (111110101) +-13 + 3 = -10 (111110110) +-13 + 4 = -9 (111110111) +-13 + 5 = -8 (111111000) +-13 + 6 = -7 (111111001) +-13 + 7 = -6 (111111010) +-13 + 8 = -5 (111111011) +-13 + 9 = -4 (111111100) +-13 + 10 = -3 (111111101) +-13 + 11 = -2 (111111110) +-13 + 12 = -1 (111111111) +-13 + 13 = 0 (000000000) +-13 + 14 = 1 (000000001) +-13 + 15 = 2 (000000010) +-13 + 16 = 3 (000000011) +-13 + 17 = 4 (000000100) +-13 + 18 = 5 (000000101) +-13 + 19 = 6 (000000110) +-13 + 20 = 7 (000000111) +-13 + 21 = 8 (000001000) +-13 + 22 = 9 (000001001) +-13 + 23 = 10 (000001010) +-13 + 24 = 11 (000001011) +-13 + 25 = 12 (000001100) +-13 + 26 = 13 (000001101) +-13 + 27 = 14 (000001110) +-13 + 28 = 15 (000001111) +-13 + 29 = 16 (000010000) +-13 + 30 = 17 (000010001) +-13 + 31 = 18 (000010010) +-13 + -32 = -45 (111010011) +-13 + -31 = -44 (111010100) +-13 + -30 = -43 (111010101) +-13 + -29 = -42 (111010110) +-13 + -28 = -41 (111010111) +-13 + -27 = -40 (111011000) +-13 + -26 = -39 (111011001) +-13 + -25 = -38 (111011010) +-13 + -24 = -37 (111011011) +-13 + -23 = -36 (111011100) +-13 + -22 = -35 (111011101) +-13 + -21 = -34 (111011110) +-13 + -20 = -33 (111011111) +-13 + -19 = -32 (111100000) +-13 + -18 = -31 (111100001) +-13 + -17 = -30 (111100010) +-13 + -16 = -29 (111100011) +-13 + -15 = -28 (111100100) +-13 + -14 = -27 (111100101) +-13 + -13 = -26 (111100110) +-13 + -12 = -25 (111100111) +-13 + -11 = -24 (111101000) +-13 + -10 = -23 (111101001) +-13 + -9 = -22 (111101010) +-13 + -8 = -21 (111101011) +-13 + -7 = -20 (111101100) +-13 + -6 = -19 (111101101) +-13 + -5 = -18 (111101110) +-13 + -4 = -17 (111101111) +-13 + -3 = -16 (111110000) +-13 + -2 = -15 (111110001) +-13 + -1 = -14 (111110010) +-12 + 0 = -12 (111110100) +-12 + 1 = -11 (111110101) +-12 + 2 = -10 (111110110) +-12 + 3 = -9 (111110111) +-12 + 4 = -8 (111111000) +-12 + 5 = -7 (111111001) +-12 + 6 = -6 (111111010) +-12 + 7 = -5 (111111011) +-12 + 8 = -4 (111111100) +-12 + 9 = -3 (111111101) +-12 + 10 = -2 (111111110) +-12 + 11 = -1 (111111111) +-12 + 12 = 0 (000000000) +-12 + 13 = 1 (000000001) +-12 + 14 = 2 (000000010) +-12 + 15 = 3 (000000011) +-12 + 16 = 4 (000000100) +-12 + 17 = 5 (000000101) +-12 + 18 = 6 (000000110) +-12 + 19 = 7 (000000111) +-12 + 20 = 8 (000001000) +-12 + 21 = 9 (000001001) +-12 + 22 = 10 (000001010) +-12 + 23 = 11 (000001011) +-12 + 24 = 12 (000001100) +-12 + 25 = 13 (000001101) +-12 + 26 = 14 (000001110) +-12 + 27 = 15 (000001111) +-12 + 28 = 16 (000010000) +-12 + 29 = 17 (000010001) +-12 + 30 = 18 (000010010) +-12 + 31 = 19 (000010011) +-12 + -32 = -44 (111010100) +-12 + -31 = -43 (111010101) +-12 + -30 = -42 (111010110) +-12 + -29 = -41 (111010111) +-12 + -28 = -40 (111011000) +-12 + -27 = -39 (111011001) +-12 + -26 = -38 (111011010) +-12 + -25 = -37 (111011011) +-12 + -24 = -36 (111011100) +-12 + -23 = -35 (111011101) +-12 + -22 = -34 (111011110) +-12 + -21 = -33 (111011111) +-12 + -20 = -32 (111100000) +-12 + -19 = -31 (111100001) +-12 + -18 = -30 (111100010) +-12 + -17 = -29 (111100011) +-12 + -16 = -28 (111100100) +-12 + -15 = -27 (111100101) +-12 + -14 = -26 (111100110) +-12 + -13 = -25 (111100111) +-12 + -12 = -24 (111101000) +-12 + -11 = -23 (111101001) +-12 + -10 = -22 (111101010) +-12 + -9 = -21 (111101011) +-12 + -8 = -20 (111101100) +-12 + -7 = -19 (111101101) +-12 + -6 = -18 (111101110) +-12 + -5 = -17 (111101111) +-12 + -4 = -16 (111110000) +-12 + -3 = -15 (111110001) +-12 + -2 = -14 (111110010) +-12 + -1 = -13 (111110011) +-11 + 0 = -11 (111110101) +-11 + 1 = -10 (111110110) +-11 + 2 = -9 (111110111) +-11 + 3 = -8 (111111000) +-11 + 4 = -7 (111111001) +-11 + 5 = -6 (111111010) +-11 + 6 = -5 (111111011) +-11 + 7 = -4 (111111100) +-11 + 8 = -3 (111111101) +-11 + 9 = -2 (111111110) +-11 + 10 = -1 (111111111) +-11 + 11 = 0 (000000000) +-11 + 12 = 1 (000000001) +-11 + 13 = 2 (000000010) +-11 + 14 = 3 (000000011) +-11 + 15 = 4 (000000100) +-11 + 16 = 5 (000000101) +-11 + 17 = 6 (000000110) +-11 + 18 = 7 (000000111) +-11 + 19 = 8 (000001000) +-11 + 20 = 9 (000001001) +-11 + 21 = 10 (000001010) +-11 + 22 = 11 (000001011) +-11 + 23 = 12 (000001100) +-11 + 24 = 13 (000001101) +-11 + 25 = 14 (000001110) +-11 + 26 = 15 (000001111) +-11 + 27 = 16 (000010000) +-11 + 28 = 17 (000010001) +-11 + 29 = 18 (000010010) +-11 + 30 = 19 (000010011) +-11 + 31 = 20 (000010100) +-11 + -32 = -43 (111010101) +-11 + -31 = -42 (111010110) +-11 + -30 = -41 (111010111) +-11 + -29 = -40 (111011000) +-11 + -28 = -39 (111011001) +-11 + -27 = -38 (111011010) +-11 + -26 = -37 (111011011) +-11 + -25 = -36 (111011100) +-11 + -24 = -35 (111011101) +-11 + -23 = -34 (111011110) +-11 + -22 = -33 (111011111) +-11 + -21 = -32 (111100000) +-11 + -20 = -31 (111100001) +-11 + -19 = -30 (111100010) +-11 + -18 = -29 (111100011) +-11 + -17 = -28 (111100100) +-11 + -16 = -27 (111100101) +-11 + -15 = -26 (111100110) +-11 + -14 = -25 (111100111) +-11 + -13 = -24 (111101000) +-11 + -12 = -23 (111101001) +-11 + -11 = -22 (111101010) +-11 + -10 = -21 (111101011) +-11 + -9 = -20 (111101100) +-11 + -8 = -19 (111101101) +-11 + -7 = -18 (111101110) +-11 + -6 = -17 (111101111) +-11 + -5 = -16 (111110000) +-11 + -4 = -15 (111110001) +-11 + -3 = -14 (111110010) +-11 + -2 = -13 (111110011) +-11 + -1 = -12 (111110100) +-10 + 0 = -10 (111110110) +-10 + 1 = -9 (111110111) +-10 + 2 = -8 (111111000) +-10 + 3 = -7 (111111001) +-10 + 4 = -6 (111111010) +-10 + 5 = -5 (111111011) +-10 + 6 = -4 (111111100) +-10 + 7 = -3 (111111101) +-10 + 8 = -2 (111111110) +-10 + 9 = -1 (111111111) +-10 + 10 = 0 (000000000) +-10 + 11 = 1 (000000001) +-10 + 12 = 2 (000000010) +-10 + 13 = 3 (000000011) +-10 + 14 = 4 (000000100) +-10 + 15 = 5 (000000101) +-10 + 16 = 6 (000000110) +-10 + 17 = 7 (000000111) +-10 + 18 = 8 (000001000) +-10 + 19 = 9 (000001001) +-10 + 20 = 10 (000001010) +-10 + 21 = 11 (000001011) +-10 + 22 = 12 (000001100) +-10 + 23 = 13 (000001101) +-10 + 24 = 14 (000001110) +-10 + 25 = 15 (000001111) +-10 + 26 = 16 (000010000) +-10 + 27 = 17 (000010001) +-10 + 28 = 18 (000010010) +-10 + 29 = 19 (000010011) +-10 + 30 = 20 (000010100) +-10 + 31 = 21 (000010101) +-10 + -32 = -42 (111010110) +-10 + -31 = -41 (111010111) +-10 + -30 = -40 (111011000) +-10 + -29 = -39 (111011001) +-10 + -28 = -38 (111011010) +-10 + -27 = -37 (111011011) +-10 + -26 = -36 (111011100) +-10 + -25 = -35 (111011101) +-10 + -24 = -34 (111011110) +-10 + -23 = -33 (111011111) +-10 + -22 = -32 (111100000) +-10 + -21 = -31 (111100001) +-10 + -20 = -30 (111100010) +-10 + -19 = -29 (111100011) +-10 + -18 = -28 (111100100) +-10 + -17 = -27 (111100101) +-10 + -16 = -26 (111100110) +-10 + -15 = -25 (111100111) +-10 + -14 = -24 (111101000) +-10 + -13 = -23 (111101001) +-10 + -12 = -22 (111101010) +-10 + -11 = -21 (111101011) +-10 + -10 = -20 (111101100) +-10 + -9 = -19 (111101101) +-10 + -8 = -18 (111101110) +-10 + -7 = -17 (111101111) +-10 + -6 = -16 (111110000) +-10 + -5 = -15 (111110001) +-10 + -4 = -14 (111110010) +-10 + -3 = -13 (111110011) +-10 + -2 = -12 (111110100) +-10 + -1 = -11 (111110101) +-9 + 0 = -9 (111110111) +-9 + 1 = -8 (111111000) +-9 + 2 = -7 (111111001) +-9 + 3 = -6 (111111010) +-9 + 4 = -5 (111111011) +-9 + 5 = -4 (111111100) +-9 + 6 = -3 (111111101) +-9 + 7 = -2 (111111110) +-9 + 8 = -1 (111111111) +-9 + 9 = 0 (000000000) +-9 + 10 = 1 (000000001) +-9 + 11 = 2 (000000010) +-9 + 12 = 3 (000000011) +-9 + 13 = 4 (000000100) +-9 + 14 = 5 (000000101) +-9 + 15 = 6 (000000110) +-9 + 16 = 7 (000000111) +-9 + 17 = 8 (000001000) +-9 + 18 = 9 (000001001) +-9 + 19 = 10 (000001010) +-9 + 20 = 11 (000001011) +-9 + 21 = 12 (000001100) +-9 + 22 = 13 (000001101) +-9 + 23 = 14 (000001110) +-9 + 24 = 15 (000001111) +-9 + 25 = 16 (000010000) +-9 + 26 = 17 (000010001) +-9 + 27 = 18 (000010010) +-9 + 28 = 19 (000010011) +-9 + 29 = 20 (000010100) +-9 + 30 = 21 (000010101) +-9 + 31 = 22 (000010110) +-9 + -32 = -41 (111010111) +-9 + -31 = -40 (111011000) +-9 + -30 = -39 (111011001) +-9 + -29 = -38 (111011010) +-9 + -28 = -37 (111011011) +-9 + -27 = -36 (111011100) +-9 + -26 = -35 (111011101) +-9 + -25 = -34 (111011110) +-9 + -24 = -33 (111011111) +-9 + -23 = -32 (111100000) +-9 + -22 = -31 (111100001) +-9 + -21 = -30 (111100010) +-9 + -20 = -29 (111100011) +-9 + -19 = -28 (111100100) +-9 + -18 = -27 (111100101) +-9 + -17 = -26 (111100110) +-9 + -16 = -25 (111100111) +-9 + -15 = -24 (111101000) +-9 + -14 = -23 (111101001) +-9 + -13 = -22 (111101010) +-9 + -12 = -21 (111101011) +-9 + -11 = -20 (111101100) +-9 + -10 = -19 (111101101) +-9 + -9 = -18 (111101110) +-9 + -8 = -17 (111101111) +-9 + -7 = -16 (111110000) +-9 + -6 = -15 (111110001) +-9 + -5 = -14 (111110010) +-9 + -4 = -13 (111110011) +-9 + -3 = -12 (111110100) +-9 + -2 = -11 (111110101) +-9 + -1 = -10 (111110110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/main.cpp new file mode 100644 index 000000000..ccfbe280b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 9-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 9; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector9 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/stimgen.h new file mode 100644 index 000000000..3988984dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/extension/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector9& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector9& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/common.h new file mode 100644 index 000000000..390c0c407 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<6> bool_vector; +typedef sc_signal signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/datawidth.cpp new file mode 100644 index 000000000..e07285cbf --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector tmp_a; + bool_vector tmp_b; + bool_vector tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_int() + tmp_b.to_int(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/datawidth.h new file mode 100644 index 000000000..a8aaf9061 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& in1; + const signal_bool_vector& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& IN1, + const signal_bool_vector& IN2, + const sc_signal& READY, + signal_bool_vector& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/golden/lost_carry.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/golden/lost_carry.log new file mode 100644 index 000000000..f36976512 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/golden/lost_carry.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + -32 = -32 (100000) +0 + -31 = -31 (100001) +0 + -30 = -30 (100010) +0 + -29 = -29 (100011) +0 + -28 = -28 (100100) +0 + -27 = -27 (100101) +0 + -26 = -26 (100110) +0 + -25 = -25 (100111) +0 + -24 = -24 (101000) +0 + -23 = -23 (101001) +0 + -22 = -22 (101010) +0 + -21 = -21 (101011) +0 + -20 = -20 (101100) +0 + -19 = -19 (101101) +0 + -18 = -18 (101110) +0 + -17 = -17 (101111) +0 + -16 = -16 (110000) +0 + -15 = -15 (110001) +0 + -14 = -14 (110010) +0 + -13 = -13 (110011) +0 + -12 = -12 (110100) +0 + -11 = -11 (110101) +0 + -10 = -10 (110110) +0 + -9 = -9 (110111) +0 + -8 = -8 (111000) +0 + -7 = -7 (111001) +0 + -6 = -6 (111010) +0 + -5 = -5 (111011) +0 + -4 = -4 (111100) +0 + -3 = -3 (111101) +0 + -2 = -2 (111110) +0 + -1 = -1 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = -32 (100000) +1 + -32 = -31 (100001) +1 + -31 = -30 (100010) +1 + -30 = -29 (100011) +1 + -29 = -28 (100100) +1 + -28 = -27 (100101) +1 + -27 = -26 (100110) +1 + -26 = -25 (100111) +1 + -25 = -24 (101000) +1 + -24 = -23 (101001) +1 + -23 = -22 (101010) +1 + -22 = -21 (101011) +1 + -21 = -20 (101100) +1 + -20 = -19 (101101) +1 + -19 = -18 (101110) +1 + -18 = -17 (101111) +1 + -17 = -16 (110000) +1 + -16 = -15 (110001) +1 + -15 = -14 (110010) +1 + -14 = -13 (110011) +1 + -13 = -12 (110100) +1 + -12 = -11 (110101) +1 + -11 = -10 (110110) +1 + -10 = -9 (110111) +1 + -9 = -8 (111000) +1 + -8 = -7 (111001) +1 + -7 = -6 (111010) +1 + -6 = -5 (111011) +1 + -5 = -4 (111100) +1 + -4 = -3 (111101) +1 + -3 = -2 (111110) +1 + -2 = -1 (111111) +1 + -1 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = -32 (100000) +2 + 31 = -31 (100001) +2 + -32 = -30 (100010) +2 + -31 = -29 (100011) +2 + -30 = -28 (100100) +2 + -29 = -27 (100101) +2 + -28 = -26 (100110) +2 + -27 = -25 (100111) +2 + -26 = -24 (101000) +2 + -25 = -23 (101001) +2 + -24 = -22 (101010) +2 + -23 = -21 (101011) +2 + -22 = -20 (101100) +2 + -21 = -19 (101101) +2 + -20 = -18 (101110) +2 + -19 = -17 (101111) +2 + -18 = -16 (110000) +2 + -17 = -15 (110001) +2 + -16 = -14 (110010) +2 + -15 = -13 (110011) +2 + -14 = -12 (110100) +2 + -13 = -11 (110101) +2 + -12 = -10 (110110) +2 + -11 = -9 (110111) +2 + -10 = -8 (111000) +2 + -9 = -7 (111001) +2 + -8 = -6 (111010) +2 + -7 = -5 (111011) +2 + -6 = -4 (111100) +2 + -5 = -3 (111101) +2 + -4 = -2 (111110) +2 + -3 = -1 (111111) +2 + -2 = 0 (000000) +2 + -1 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = -32 (100000) +3 + 30 = -31 (100001) +3 + 31 = -30 (100010) +3 + -32 = -29 (100011) +3 + -31 = -28 (100100) +3 + -30 = -27 (100101) +3 + -29 = -26 (100110) +3 + -28 = -25 (100111) +3 + -27 = -24 (101000) +3 + -26 = -23 (101001) +3 + -25 = -22 (101010) +3 + -24 = -21 (101011) +3 + -23 = -20 (101100) +3 + -22 = -19 (101101) +3 + -21 = -18 (101110) +3 + -20 = -17 (101111) +3 + -19 = -16 (110000) +3 + -18 = -15 (110001) +3 + -17 = -14 (110010) +3 + -16 = -13 (110011) +3 + -15 = -12 (110100) +3 + -14 = -11 (110101) +3 + -13 = -10 (110110) +3 + -12 = -9 (110111) +3 + -11 = -8 (111000) +3 + -10 = -7 (111001) +3 + -9 = -6 (111010) +3 + -8 = -5 (111011) +3 + -7 = -4 (111100) +3 + -6 = -3 (111101) +3 + -5 = -2 (111110) +3 + -4 = -1 (111111) +3 + -3 = 0 (000000) +3 + -2 = 1 (000001) +3 + -1 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = -32 (100000) +4 + 29 = -31 (100001) +4 + 30 = -30 (100010) +4 + 31 = -29 (100011) +4 + -32 = -28 (100100) +4 + -31 = -27 (100101) +4 + -30 = -26 (100110) +4 + -29 = -25 (100111) +4 + -28 = -24 (101000) +4 + -27 = -23 (101001) +4 + -26 = -22 (101010) +4 + -25 = -21 (101011) +4 + -24 = -20 (101100) +4 + -23 = -19 (101101) +4 + -22 = -18 (101110) +4 + -21 = -17 (101111) +4 + -20 = -16 (110000) +4 + -19 = -15 (110001) +4 + -18 = -14 (110010) +4 + -17 = -13 (110011) +4 + -16 = -12 (110100) +4 + -15 = -11 (110101) +4 + -14 = -10 (110110) +4 + -13 = -9 (110111) +4 + -12 = -8 (111000) +4 + -11 = -7 (111001) +4 + -10 = -6 (111010) +4 + -9 = -5 (111011) +4 + -8 = -4 (111100) +4 + -7 = -3 (111101) +4 + -6 = -2 (111110) +4 + -5 = -1 (111111) +4 + -4 = 0 (000000) +4 + -3 = 1 (000001) +4 + -2 = 2 (000010) +4 + -1 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = -32 (100000) +5 + 28 = -31 (100001) +5 + 29 = -30 (100010) +5 + 30 = -29 (100011) +5 + 31 = -28 (100100) +5 + -32 = -27 (100101) +5 + -31 = -26 (100110) +5 + -30 = -25 (100111) +5 + -29 = -24 (101000) +5 + -28 = -23 (101001) +5 + -27 = -22 (101010) +5 + -26 = -21 (101011) +5 + -25 = -20 (101100) +5 + -24 = -19 (101101) +5 + -23 = -18 (101110) +5 + -22 = -17 (101111) +5 + -21 = -16 (110000) +5 + -20 = -15 (110001) +5 + -19 = -14 (110010) +5 + -18 = -13 (110011) +5 + -17 = -12 (110100) +5 + -16 = -11 (110101) +5 + -15 = -10 (110110) +5 + -14 = -9 (110111) +5 + -13 = -8 (111000) +5 + -12 = -7 (111001) +5 + -11 = -6 (111010) +5 + -10 = -5 (111011) +5 + -9 = -4 (111100) +5 + -8 = -3 (111101) +5 + -7 = -2 (111110) +5 + -6 = -1 (111111) +5 + -5 = 0 (000000) +5 + -4 = 1 (000001) +5 + -3 = 2 (000010) +5 + -2 = 3 (000011) +5 + -1 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = -32 (100000) +6 + 27 = -31 (100001) +6 + 28 = -30 (100010) +6 + 29 = -29 (100011) +6 + 30 = -28 (100100) +6 + 31 = -27 (100101) +6 + -32 = -26 (100110) +6 + -31 = -25 (100111) +6 + -30 = -24 (101000) +6 + -29 = -23 (101001) +6 + -28 = -22 (101010) +6 + -27 = -21 (101011) +6 + -26 = -20 (101100) +6 + -25 = -19 (101101) +6 + -24 = -18 (101110) +6 + -23 = -17 (101111) +6 + -22 = -16 (110000) +6 + -21 = -15 (110001) +6 + -20 = -14 (110010) +6 + -19 = -13 (110011) +6 + -18 = -12 (110100) +6 + -17 = -11 (110101) +6 + -16 = -10 (110110) +6 + -15 = -9 (110111) +6 + -14 = -8 (111000) +6 + -13 = -7 (111001) +6 + -12 = -6 (111010) +6 + -11 = -5 (111011) +6 + -10 = -4 (111100) +6 + -9 = -3 (111101) +6 + -8 = -2 (111110) +6 + -7 = -1 (111111) +6 + -6 = 0 (000000) +6 + -5 = 1 (000001) +6 + -4 = 2 (000010) +6 + -3 = 3 (000011) +6 + -2 = 4 (000100) +6 + -1 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = -32 (100000) +7 + 26 = -31 (100001) +7 + 27 = -30 (100010) +7 + 28 = -29 (100011) +7 + 29 = -28 (100100) +7 + 30 = -27 (100101) +7 + 31 = -26 (100110) +7 + -32 = -25 (100111) +7 + -31 = -24 (101000) +7 + -30 = -23 (101001) +7 + -29 = -22 (101010) +7 + -28 = -21 (101011) +7 + -27 = -20 (101100) +7 + -26 = -19 (101101) +7 + -25 = -18 (101110) +7 + -24 = -17 (101111) +7 + -23 = -16 (110000) +7 + -22 = -15 (110001) +7 + -21 = -14 (110010) +7 + -20 = -13 (110011) +7 + -19 = -12 (110100) +7 + -18 = -11 (110101) +7 + -17 = -10 (110110) +7 + -16 = -9 (110111) +7 + -15 = -8 (111000) +7 + -14 = -7 (111001) +7 + -13 = -6 (111010) +7 + -12 = -5 (111011) +7 + -11 = -4 (111100) +7 + -10 = -3 (111101) +7 + -9 = -2 (111110) +7 + -8 = -1 (111111) +7 + -7 = 0 (000000) +7 + -6 = 1 (000001) +7 + -5 = 2 (000010) +7 + -4 = 3 (000011) +7 + -3 = 4 (000100) +7 + -2 = 5 (000101) +7 + -1 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = -32 (100000) +8 + 25 = -31 (100001) +8 + 26 = -30 (100010) +8 + 27 = -29 (100011) +8 + 28 = -28 (100100) +8 + 29 = -27 (100101) +8 + 30 = -26 (100110) +8 + 31 = -25 (100111) +8 + -32 = -24 (101000) +8 + -31 = -23 (101001) +8 + -30 = -22 (101010) +8 + -29 = -21 (101011) +8 + -28 = -20 (101100) +8 + -27 = -19 (101101) +8 + -26 = -18 (101110) +8 + -25 = -17 (101111) +8 + -24 = -16 (110000) +8 + -23 = -15 (110001) +8 + -22 = -14 (110010) +8 + -21 = -13 (110011) +8 + -20 = -12 (110100) +8 + -19 = -11 (110101) +8 + -18 = -10 (110110) +8 + -17 = -9 (110111) +8 + -16 = -8 (111000) +8 + -15 = -7 (111001) +8 + -14 = -6 (111010) +8 + -13 = -5 (111011) +8 + -12 = -4 (111100) +8 + -11 = -3 (111101) +8 + -10 = -2 (111110) +8 + -9 = -1 (111111) +8 + -8 = 0 (000000) +8 + -7 = 1 (000001) +8 + -6 = 2 (000010) +8 + -5 = 3 (000011) +8 + -4 = 4 (000100) +8 + -3 = 5 (000101) +8 + -2 = 6 (000110) +8 + -1 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = -32 (100000) +9 + 24 = -31 (100001) +9 + 25 = -30 (100010) +9 + 26 = -29 (100011) +9 + 27 = -28 (100100) +9 + 28 = -27 (100101) +9 + 29 = -26 (100110) +9 + 30 = -25 (100111) +9 + 31 = -24 (101000) +9 + -32 = -23 (101001) +9 + -31 = -22 (101010) +9 + -30 = -21 (101011) +9 + -29 = -20 (101100) +9 + -28 = -19 (101101) +9 + -27 = -18 (101110) +9 + -26 = -17 (101111) +9 + -25 = -16 (110000) +9 + -24 = -15 (110001) +9 + -23 = -14 (110010) +9 + -22 = -13 (110011) +9 + -21 = -12 (110100) +9 + -20 = -11 (110101) +9 + -19 = -10 (110110) +9 + -18 = -9 (110111) +9 + -17 = -8 (111000) +9 + -16 = -7 (111001) +9 + -15 = -6 (111010) +9 + -14 = -5 (111011) +9 + -13 = -4 (111100) +9 + -12 = -3 (111101) +9 + -11 = -2 (111110) +9 + -10 = -1 (111111) +9 + -9 = 0 (000000) +9 + -8 = 1 (000001) +9 + -7 = 2 (000010) +9 + -6 = 3 (000011) +9 + -5 = 4 (000100) +9 + -4 = 5 (000101) +9 + -3 = 6 (000110) +9 + -2 = 7 (000111) +9 + -1 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 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1 (000001) +23 + -21 = 2 (000010) +23 + -20 = 3 (000011) +23 + -19 = 4 (000100) +23 + -18 = 5 (000101) +23 + -17 = 6 (000110) +23 + -16 = 7 (000111) +23 + -15 = 8 (001000) +23 + -14 = 9 (001001) +23 + -13 = 10 (001010) +23 + -12 = 11 (001011) +23 + -11 = 12 (001100) +23 + -10 = 13 (001101) +23 + -9 = 14 (001110) +23 + -8 = 15 (001111) +23 + -7 = 16 (010000) +23 + -6 = 17 (010001) +23 + -5 = 18 (010010) +23 + -4 = 19 (010011) +23 + -3 = 20 (010100) +23 + -2 = 21 (010101) +23 + -1 = 22 (010110) +24 + 0 = 24 (011000) +24 + 1 = 25 (011001) +24 + 2 = 26 (011010) +24 + 3 = 27 (011011) +24 + 4 = 28 (011100) +24 + 5 = 29 (011101) +24 + 6 = 30 (011110) +24 + 7 = 31 (011111) +24 + 8 = -32 (100000) +24 + 9 = -31 (100001) +24 + 10 = -30 (100010) +24 + 11 = -29 (100011) +24 + 12 = -28 (100100) +24 + 13 = -27 (100101) +24 + 14 = -26 (100110) +24 + 15 = -25 (100111) +24 + 16 = -24 (101000) +24 + 17 = -23 (101001) +24 + 18 = -22 (101010) +24 + 19 = -21 (101011) +24 + 20 = -20 (101100) +24 + 21 = -19 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0 = 27 (011011) +27 + 1 = 28 (011100) +27 + 2 = 29 (011101) +27 + 3 = 30 (011110) +27 + 4 = 31 (011111) +27 + 5 = -32 (100000) +27 + 6 = -31 (100001) +27 + 7 = -30 (100010) +27 + 8 = -29 (100011) +27 + 9 = -28 (100100) +27 + 10 = -27 (100101) +27 + 11 = -26 (100110) +27 + 12 = -25 (100111) +27 + 13 = -24 (101000) +27 + 14 = -23 (101001) +27 + 15 = -22 (101010) +27 + 16 = -21 (101011) +27 + 17 = -20 (101100) +27 + 18 = -19 (101101) +27 + 19 = -18 (101110) +27 + 20 = -17 (101111) +27 + 21 = -16 (110000) +27 + 22 = -15 (110001) +27 + 23 = -14 (110010) +27 + 24 = -13 (110011) +27 + 25 = -12 (110100) +27 + 26 = -11 (110101) +27 + 27 = -10 (110110) +27 + 28 = -9 (110111) +27 + 29 = -8 (111000) +27 + 30 = -7 (111001) +27 + 31 = -6 (111010) +27 + -32 = -5 (111011) +27 + -31 = -4 (111100) +27 + -30 = -3 (111101) +27 + -29 = -2 (111110) +27 + -28 = -1 (111111) +27 + -27 = 0 (000000) +27 + -26 = 1 (000001) +27 + -25 = 2 (000010) +27 + -24 = 3 (000011) +27 + -23 = 4 (000100) +27 + -22 = 5 (000101) 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(110001) +28 + 22 = -14 (110010) +28 + 23 = -13 (110011) +28 + 24 = -12 (110100) +28 + 25 = -11 (110101) +28 + 26 = -10 (110110) +28 + 27 = -9 (110111) +28 + 28 = -8 (111000) +28 + 29 = -7 (111001) +28 + 30 = -6 (111010) +28 + 31 = -5 (111011) +28 + -32 = -4 (111100) +28 + -31 = -3 (111101) +28 + -30 = -2 (111110) +28 + -29 = -1 (111111) +28 + -28 = 0 (000000) +28 + -27 = 1 (000001) +28 + -26 = 2 (000010) +28 + -25 = 3 (000011) +28 + -24 = 4 (000100) +28 + -23 = 5 (000101) +28 + -22 = 6 (000110) +28 + -21 = 7 (000111) +28 + -20 = 8 (001000) +28 + -19 = 9 (001001) +28 + -18 = 10 (001010) +28 + -17 = 11 (001011) +28 + -16 = 12 (001100) +28 + -15 = 13 (001101) +28 + -14 = 14 (001110) +28 + -13 = 15 (001111) +28 + -12 = 16 (010000) +28 + -11 = 17 (010001) +28 + -10 = 18 (010010) +28 + -9 = 19 (010011) +28 + -8 = 20 (010100) +28 + -7 = 21 (010101) +28 + -6 = 22 (010110) +28 + -5 = 23 (010111) +28 + -4 = 24 (011000) +28 + -3 = 25 (011001) +28 + -2 = 26 (011010) +28 + -1 = 27 (011011) +29 + 0 = 29 (011101) +29 + 1 = 30 (011110) +29 + 2 = 31 (011111) +29 + 3 = -32 (100000) +29 + 4 = -31 (100001) +29 + 5 = -30 (100010) +29 + 6 = -29 (100011) +29 + 7 = -28 (100100) +29 + 8 = -27 (100101) +29 + 9 = -26 (100110) +29 + 10 = -25 (100111) +29 + 11 = -24 (101000) +29 + 12 = -23 (101001) +29 + 13 = -22 (101010) +29 + 14 = -21 (101011) +29 + 15 = -20 (101100) +29 + 16 = -19 (101101) +29 + 17 = -18 (101110) +29 + 18 = -17 (101111) +29 + 19 = -16 (110000) +29 + 20 = -15 (110001) +29 + 21 = -14 (110010) +29 + 22 = -13 (110011) +29 + 23 = -12 (110100) +29 + 24 = -11 (110101) +29 + 25 = -10 (110110) +29 + 26 = -9 (110111) +29 + 27 = -8 (111000) +29 + 28 = -7 (111001) +29 + 29 = -6 (111010) +29 + 30 = -5 (111011) +29 + 31 = -4 (111100) +29 + -32 = -3 (111101) +29 + -31 = -2 (111110) +29 + -30 = -1 (111111) +29 + -29 = 0 (000000) +29 + -28 = 1 (000001) +29 + -27 = 2 (000010) +29 + -26 = 3 (000011) +29 + -25 = 4 (000100) +29 + -24 = 5 (000101) +29 + -23 = 6 (000110) +29 + -22 = 7 (000111) +29 + -21 = 8 (001000) +29 + -20 = 9 (001001) +29 + -19 = 10 (001010) +29 + -18 = 11 (001011) +29 + -17 = 12 (001100) +29 + -16 = 13 (001101) +29 + -15 = 14 (001110) +29 + -14 = 15 (001111) +29 + -13 = 16 (010000) +29 + -12 = 17 (010001) +29 + -11 = 18 (010010) +29 + -10 = 19 (010011) +29 + -9 = 20 (010100) +29 + -8 = 21 (010101) +29 + -7 = 22 (010110) +29 + -6 = 23 (010111) +29 + -5 = 24 (011000) +29 + -4 = 25 (011001) +29 + -3 = 26 (011010) +29 + -2 = 27 (011011) +29 + -1 = 28 (011100) +30 + 0 = 30 (011110) +30 + 1 = 31 (011111) +30 + 2 = -32 (100000) +30 + 3 = -31 (100001) +30 + 4 = -30 (100010) +30 + 5 = -29 (100011) +30 + 6 = -28 (100100) +30 + 7 = -27 (100101) +30 + 8 = -26 (100110) +30 + 9 = -25 (100111) +30 + 10 = -24 (101000) +30 + 11 = -23 (101001) +30 + 12 = -22 (101010) +30 + 13 = -21 (101011) +30 + 14 = -20 (101100) +30 + 15 = -19 (101101) +30 + 16 = -18 (101110) +30 + 17 = -17 (101111) +30 + 18 = -16 (110000) +30 + 19 = -15 (110001) +30 + 20 = -14 (110010) +30 + 21 = -13 (110011) +30 + 22 = -12 (110100) +30 + 23 = -11 (110101) +30 + 24 = -10 (110110) +30 + 25 = -9 (110111) +30 + 26 = -8 (111000) +30 + 27 = -7 (111001) +30 + 28 = -6 (111010) +30 + 29 = -5 (111011) +30 + 30 = -4 (111100) +30 + 31 = -3 (111101) +30 + -32 = -2 (111110) +30 + -31 = -1 (111111) +30 + -30 = 0 (000000) +30 + -29 = 1 (000001) +30 + -28 = 2 (000010) +30 + -27 = 3 (000011) +30 + -26 = 4 (000100) +30 + -25 = 5 (000101) +30 + -24 = 6 (000110) +30 + -23 = 7 (000111) +30 + -22 = 8 (001000) +30 + -21 = 9 (001001) +30 + -20 = 10 (001010) +30 + -19 = 11 (001011) +30 + -18 = 12 (001100) +30 + -17 = 13 (001101) +30 + -16 = 14 (001110) +30 + -15 = 15 (001111) +30 + -14 = 16 (010000) +30 + -13 = 17 (010001) +30 + -12 = 18 (010010) +30 + -11 = 19 (010011) +30 + -10 = 20 (010100) +30 + -9 = 21 (010101) +30 + -8 = 22 (010110) +30 + -7 = 23 (010111) +30 + -6 = 24 (011000) +30 + -5 = 25 (011001) +30 + -4 = 26 (011010) +30 + -3 = 27 (011011) +30 + -2 = 28 (011100) +30 + -1 = 29 (011101) +31 + 0 = 31 (011111) +31 + 1 = -32 (100000) +31 + 2 = -31 (100001) +31 + 3 = -30 (100010) +31 + 4 = -29 (100011) +31 + 5 = -28 (100100) +31 + 6 = -27 (100101) +31 + 7 = -26 (100110) +31 + 8 = -25 (100111) +31 + 9 = -24 (101000) +31 + 10 = -23 (101001) +31 + 11 = -22 (101010) +31 + 12 = -21 (101011) +31 + 13 = -20 (101100) +31 + 14 = -19 (101101) +31 + 15 = -18 (101110) +31 + 16 = -17 (101111) +31 + 17 = -16 (110000) +31 + 18 = -15 (110001) +31 + 19 = -14 (110010) +31 + 20 = -13 (110011) +31 + 21 = -12 (110100) +31 + 22 = -11 (110101) +31 + 23 = -10 (110110) +31 + 24 = -9 (110111) +31 + 25 = -8 (111000) +31 + 26 = -7 (111001) +31 + 27 = -6 (111010) +31 + 28 = -5 (111011) +31 + 29 = -4 (111100) +31 + 30 = -3 (111101) +31 + 31 = -2 (111110) +31 + -32 = -1 (111111) +31 + -31 = 0 (000000) +31 + -30 = 1 (000001) +31 + -29 = 2 (000010) +31 + -28 = 3 (000011) +31 + -27 = 4 (000100) +31 + -26 = 5 (000101) +31 + -25 = 6 (000110) +31 + -24 = 7 (000111) +31 + -23 = 8 (001000) +31 + -22 = 9 (001001) +31 + -21 = 10 (001010) +31 + -20 = 11 (001011) +31 + -19 = 12 (001100) +31 + -18 = 13 (001101) +31 + -17 = 14 (001110) +31 + -16 = 15 (001111) +31 + -15 = 16 (010000) +31 + -14 = 17 (010001) +31 + -13 = 18 (010010) +31 + -12 = 19 (010011) +31 + -11 = 20 (010100) +31 + -10 = 21 (010101) +31 + -9 = 22 (010110) +31 + -8 = 23 (010111) +31 + -7 = 24 (011000) +31 + -6 = 25 (011001) +31 + -5 = 26 (011010) +31 + -4 = 27 (011011) +31 + -3 = 28 (011100) +31 + -2 = 29 (011101) +31 + -1 = 30 (011110) +-32 + 0 = -32 (100000) +-32 + 1 = -31 (100001) +-32 + 2 = -30 (100010) +-32 + 3 = -29 (100011) +-32 + 4 = -28 (100100) +-32 + 5 = -27 (100101) +-32 + 6 = -26 (100110) +-32 + 7 = -25 (100111) +-32 + 8 = -24 (101000) +-32 + 9 = -23 (101001) +-32 + 10 = -22 (101010) +-32 + 11 = -21 (101011) +-32 + 12 = -20 (101100) +-32 + 13 = -19 (101101) +-32 + 14 = -18 (101110) +-32 + 15 = -17 (101111) +-32 + 16 = -16 (110000) +-32 + 17 = -15 (110001) +-32 + 18 = -14 (110010) +-32 + 19 = -13 (110011) +-32 + 20 = -12 (110100) +-32 + 21 = -11 (110101) +-32 + 22 = -10 (110110) +-32 + 23 = -9 (110111) +-32 + 24 = -8 (111000) +-32 + 25 = -7 (111001) +-32 + 26 = -6 (111010) +-32 + 27 = -5 (111011) +-32 + 28 = -4 (111100) +-32 + 29 = -3 (111101) +-32 + 30 = -2 (111110) +-32 + 31 = -1 (111111) +-32 + -32 = 0 (000000) +-32 + -31 = 1 (000001) +-32 + -30 = 2 (000010) +-32 + -29 = 3 (000011) +-32 + -28 = 4 (000100) +-32 + -27 = 5 (000101) +-32 + -26 = 6 (000110) +-32 + -25 = 7 (000111) +-32 + -24 = 8 (001000) +-32 + -23 = 9 (001001) +-32 + -22 = 10 (001010) +-32 + -21 = 11 (001011) +-32 + -20 = 12 (001100) +-32 + -19 = 13 (001101) +-32 + -18 = 14 (001110) +-32 + -17 = 15 (001111) +-32 + -16 = 16 (010000) +-32 + -15 = 17 (010001) +-32 + -14 = 18 (010010) +-32 + -13 = 19 (010011) +-32 + -12 = 20 (010100) +-32 + -11 = 21 (010101) +-32 + -10 = 22 (010110) +-32 + -9 = 23 (010111) +-32 + -8 = 24 (011000) +-32 + -7 = 25 (011001) +-32 + -6 = 26 (011010) +-32 + -5 = 27 (011011) +-32 + -4 = 28 (011100) +-32 + -3 = 29 (011101) +-32 + -2 = 30 (011110) +-32 + -1 = 31 (011111) +-31 + 0 = -31 (100001) +-31 + 1 = -30 (100010) +-31 + 2 = -29 (100011) +-31 + 3 = -28 (100100) +-31 + 4 = -27 (100101) +-31 + 5 = -26 (100110) +-31 + 6 = -25 (100111) +-31 + 7 = -24 (101000) +-31 + 8 = -23 (101001) +-31 + 9 = -22 (101010) +-31 + 10 = -21 (101011) +-31 + 11 = -20 (101100) +-31 + 12 = -19 (101101) +-31 + 13 = -18 (101110) +-31 + 14 = -17 (101111) +-31 + 15 = -16 (110000) +-31 + 16 = -15 (110001) +-31 + 17 = -14 (110010) +-31 + 18 = -13 (110011) +-31 + 19 = -12 (110100) +-31 + 20 = -11 (110101) +-31 + 21 = -10 (110110) +-31 + 22 = -9 (110111) +-31 + 23 = -8 (111000) +-31 + 24 = -7 (111001) +-31 + 25 = -6 (111010) +-31 + 26 = -5 (111011) +-31 + 27 = -4 (111100) +-31 + 28 = -3 (111101) +-31 + 29 = -2 (111110) +-31 + 30 = -1 (111111) +-31 + 31 = 0 (000000) +-31 + -32 = 1 (000001) +-31 + -31 = 2 (000010) +-31 + -30 = 3 (000011) +-31 + -29 = 4 (000100) +-31 + -28 = 5 (000101) +-31 + -27 = 6 (000110) +-31 + -26 = 7 (000111) +-31 + -25 = 8 (001000) +-31 + -24 = 9 (001001) +-31 + -23 = 10 (001010) +-31 + -22 = 11 (001011) +-31 + -21 = 12 (001100) +-31 + -20 = 13 (001101) +-31 + -19 = 14 (001110) +-31 + -18 = 15 (001111) +-31 + -17 = 16 (010000) +-31 + -16 = 17 (010001) +-31 + -15 = 18 (010010) +-31 + -14 = 19 (010011) +-31 + -13 = 20 (010100) +-31 + -12 = 21 (010101) +-31 + -11 = 22 (010110) +-31 + -10 = 23 (010111) +-31 + -9 = 24 (011000) +-31 + -8 = 25 (011001) +-31 + -7 = 26 (011010) +-31 + -6 = 27 (011011) +-31 + -5 = 28 (011100) +-31 + -4 = 29 (011101) +-31 + -3 = 30 (011110) +-31 + -2 = 31 (011111) +-31 + -1 = -32 (100000) +-30 + 0 = -30 (100010) +-30 + 1 = -29 (100011) +-30 + 2 = -28 (100100) +-30 + 3 = -27 (100101) +-30 + 4 = -26 (100110) +-30 + 5 = -25 (100111) +-30 + 6 = -24 (101000) +-30 + 7 = -23 (101001) +-30 + 8 = -22 (101010) +-30 + 9 = -21 (101011) +-30 + 10 = -20 (101100) +-30 + 11 = -19 (101101) +-30 + 12 = -18 (101110) +-30 + 13 = -17 (101111) +-30 + 14 = -16 (110000) +-30 + 15 = -15 (110001) +-30 + 16 = -14 (110010) +-30 + 17 = -13 (110011) +-30 + 18 = -12 (110100) +-30 + 19 = -11 (110101) +-30 + 20 = -10 (110110) +-30 + 21 = -9 (110111) +-30 + 22 = -8 (111000) +-30 + 23 = -7 (111001) +-30 + 24 = -6 (111010) +-30 + 25 = -5 (111011) +-30 + 26 = -4 (111100) +-30 + 27 = -3 (111101) +-30 + 28 = -2 (111110) +-30 + 29 = -1 (111111) +-30 + 30 = 0 (000000) +-30 + 31 = 1 (000001) +-30 + -32 = 2 (000010) +-30 + -31 = 3 (000011) +-30 + -30 = 4 (000100) +-30 + -29 = 5 (000101) +-30 + -28 = 6 (000110) +-30 + -27 = 7 (000111) +-30 + -26 = 8 (001000) +-30 + -25 = 9 (001001) +-30 + -24 = 10 (001010) +-30 + -23 = 11 (001011) +-30 + -22 = 12 (001100) +-30 + -21 = 13 (001101) +-30 + -20 = 14 (001110) +-30 + -19 = 15 (001111) +-30 + -18 = 16 (010000) +-30 + -17 = 17 (010001) +-30 + -16 = 18 (010010) +-30 + -15 = 19 (010011) +-30 + -14 = 20 (010100) +-30 + -13 = 21 (010101) +-30 + -12 = 22 (010110) +-30 + -11 = 23 (010111) +-30 + -10 = 24 (011000) +-30 + -9 = 25 (011001) +-30 + -8 = 26 (011010) +-30 + -7 = 27 (011011) +-30 + -6 = 28 (011100) +-30 + -5 = 29 (011101) +-30 + -4 = 30 (011110) +-30 + -3 = 31 (011111) +-30 + -2 = -32 (100000) +-30 + -1 = -31 (100001) +-29 + 0 = -29 (100011) +-29 + 1 = -28 (100100) +-29 + 2 = -27 (100101) +-29 + 3 = -26 (100110) +-29 + 4 = -25 (100111) +-29 + 5 = -24 (101000) +-29 + 6 = -23 (101001) +-29 + 7 = -22 (101010) +-29 + 8 = -21 (101011) +-29 + 9 = -20 (101100) +-29 + 10 = -19 (101101) +-29 + 11 = -18 (101110) +-29 + 12 = -17 (101111) +-29 + 13 = -16 (110000) +-29 + 14 = -15 (110001) +-29 + 15 = -14 (110010) +-29 + 16 = -13 (110011) +-29 + 17 = -12 (110100) +-29 + 18 = -11 (110101) +-29 + 19 = -10 (110110) +-29 + 20 = -9 (110111) +-29 + 21 = -8 (111000) +-29 + 22 = -7 (111001) +-29 + 23 = -6 (111010) +-29 + 24 = -5 (111011) +-29 + 25 = -4 (111100) +-29 + 26 = -3 (111101) +-29 + 27 = -2 (111110) +-29 + 28 = -1 (111111) +-29 + 29 = 0 (000000) +-29 + 30 = 1 (000001) +-29 + 31 = 2 (000010) +-29 + -32 = 3 (000011) +-29 + -31 = 4 (000100) +-29 + -30 = 5 (000101) +-29 + -29 = 6 (000110) +-29 + -28 = 7 (000111) +-29 + -27 = 8 (001000) +-29 + -26 = 9 (001001) +-29 + -25 = 10 (001010) +-29 + -24 = 11 (001011) +-29 + -23 = 12 (001100) +-29 + -22 = 13 (001101) +-29 + -21 = 14 (001110) +-29 + -20 = 15 (001111) +-29 + -19 = 16 (010000) +-29 + -18 = 17 (010001) +-29 + -17 = 18 (010010) +-29 + -16 = 19 (010011) +-29 + -15 = 20 (010100) +-29 + -14 = 21 (010101) +-29 + -13 = 22 (010110) +-29 + -12 = 23 (010111) +-29 + -11 = 24 (011000) +-29 + -10 = 25 (011001) +-29 + -9 = 26 (011010) +-29 + -8 = 27 (011011) +-29 + -7 = 28 (011100) +-29 + -6 = 29 (011101) +-29 + -5 = 30 (011110) +-29 + -4 = 31 (011111) +-29 + -3 = -32 (100000) +-29 + -2 = -31 (100001) +-29 + -1 = -30 (100010) +-28 + 0 = -28 (100100) +-28 + 1 = -27 (100101) +-28 + 2 = -26 (100110) +-28 + 3 = -25 (100111) +-28 + 4 = -24 (101000) +-28 + 5 = -23 (101001) +-28 + 6 = -22 (101010) +-28 + 7 = -21 (101011) +-28 + 8 = -20 (101100) +-28 + 9 = -19 (101101) +-28 + 10 = -18 (101110) +-28 + 11 = -17 (101111) +-28 + 12 = -16 (110000) +-28 + 13 = -15 (110001) +-28 + 14 = -14 (110010) +-28 + 15 = -13 (110011) +-28 + 16 = -12 (110100) +-28 + 17 = -11 (110101) +-28 + 18 = -10 (110110) +-28 + 19 = -9 (110111) +-28 + 20 = -8 (111000) +-28 + 21 = -7 (111001) +-28 + 22 = -6 (111010) +-28 + 23 = -5 (111011) +-28 + 24 = -4 (111100) +-28 + 25 = -3 (111101) +-28 + 26 = -2 (111110) +-28 + 27 = -1 (111111) +-28 + 28 = 0 (000000) +-28 + 29 = 1 (000001) +-28 + 30 = 2 (000010) +-28 + 31 = 3 (000011) +-28 + -32 = 4 (000100) +-28 + -31 = 5 (000101) +-28 + -30 = 6 (000110) +-28 + -29 = 7 (000111) +-28 + -28 = 8 (001000) +-28 + -27 = 9 (001001) +-28 + -26 = 10 (001010) +-28 + -25 = 11 (001011) +-28 + -24 = 12 (001100) +-28 + -23 = 13 (001101) +-28 + -22 = 14 (001110) +-28 + -21 = 15 (001111) +-28 + -20 = 16 (010000) +-28 + -19 = 17 (010001) +-28 + -18 = 18 (010010) +-28 + -17 = 19 (010011) +-28 + -16 = 20 (010100) +-28 + -15 = 21 (010101) +-28 + -14 = 22 (010110) +-28 + -13 = 23 (010111) +-28 + -12 = 24 (011000) +-28 + -11 = 25 (011001) +-28 + -10 = 26 (011010) +-28 + -9 = 27 (011011) +-28 + -8 = 28 (011100) +-28 + -7 = 29 (011101) +-28 + -6 = 30 (011110) +-28 + -5 = 31 (011111) +-28 + -4 = -32 (100000) +-28 + -3 = -31 (100001) +-28 + -2 = -30 (100010) +-28 + -1 = -29 (100011) +-27 + 0 = -27 (100101) +-27 + 1 = -26 (100110) +-27 + 2 = -25 (100111) +-27 + 3 = -24 (101000) +-27 + 4 = -23 (101001) +-27 + 5 = -22 (101010) +-27 + 6 = -21 (101011) +-27 + 7 = -20 (101100) +-27 + 8 = -19 (101101) +-27 + 9 = -18 (101110) +-27 + 10 = -17 (101111) +-27 + 11 = -16 (110000) +-27 + 12 = -15 (110001) +-27 + 13 = -14 (110010) +-27 + 14 = -13 (110011) +-27 + 15 = -12 (110100) +-27 + 16 = -11 (110101) +-27 + 17 = -10 (110110) +-27 + 18 = -9 (110111) +-27 + 19 = -8 (111000) +-27 + 20 = -7 (111001) +-27 + 21 = -6 (111010) +-27 + 22 = -5 (111011) +-27 + 23 = -4 (111100) +-27 + 24 = -3 (111101) +-27 + 25 = -2 (111110) +-27 + 26 = -1 (111111) +-27 + 27 = 0 (000000) +-27 + 28 = 1 (000001) +-27 + 29 = 2 (000010) +-27 + 30 = 3 (000011) +-27 + 31 = 4 (000100) +-27 + -32 = 5 (000101) +-27 + -31 = 6 (000110) +-27 + -30 = 7 (000111) +-27 + -29 = 8 (001000) +-27 + -28 = 9 (001001) +-27 + -27 = 10 (001010) +-27 + -26 = 11 (001011) +-27 + -25 = 12 (001100) +-27 + -24 = 13 (001101) +-27 + -23 = 14 (001110) +-27 + -22 = 15 (001111) +-27 + -21 = 16 (010000) +-27 + -20 = 17 (010001) +-27 + -19 = 18 (010010) +-27 + -18 = 19 (010011) +-27 + -17 = 20 (010100) +-27 + -16 = 21 (010101) +-27 + -15 = 22 (010110) +-27 + -14 = 23 (010111) +-27 + -13 = 24 (011000) +-27 + -12 = 25 (011001) +-27 + -11 = 26 (011010) +-27 + -10 = 27 (011011) +-27 + -9 = 28 (011100) +-27 + -8 = 29 (011101) +-27 + -7 = 30 (011110) +-27 + -6 = 31 (011111) +-27 + -5 = -32 (100000) +-27 + -4 = -31 (100001) +-27 + -3 = -30 (100010) +-27 + -2 = -29 (100011) +-27 + -1 = -28 (100100) +-26 + 0 = -26 (100110) +-26 + 1 = -25 (100111) +-26 + 2 = -24 (101000) +-26 + 3 = -23 (101001) +-26 + 4 = -22 (101010) +-26 + 5 = -21 (101011) +-26 + 6 = -20 (101100) +-26 + 7 = -19 (101101) +-26 + 8 = -18 (101110) +-26 + 9 = -17 (101111) +-26 + 10 = -16 (110000) +-26 + 11 = -15 (110001) +-26 + 12 = -14 (110010) +-26 + 13 = -13 (110011) +-26 + 14 = -12 (110100) +-26 + 15 = -11 (110101) +-26 + 16 = -10 (110110) +-26 + 17 = -9 (110111) +-26 + 18 = -8 (111000) +-26 + 19 = -7 (111001) +-26 + 20 = -6 (111010) +-26 + 21 = -5 (111011) +-26 + 22 = -4 (111100) +-26 + 23 = -3 (111101) +-26 + 24 = -2 (111110) +-26 + 25 = -1 (111111) +-26 + 26 = 0 (000000) +-26 + 27 = 1 (000001) +-26 + 28 = 2 (000010) +-26 + 29 = 3 (000011) +-26 + 30 = 4 (000100) +-26 + 31 = 5 (000101) +-26 + -32 = 6 (000110) +-26 + -31 = 7 (000111) +-26 + -30 = 8 (001000) +-26 + -29 = 9 (001001) +-26 + -28 = 10 (001010) +-26 + -27 = 11 (001011) +-26 + -26 = 12 (001100) +-26 + -25 = 13 (001101) +-26 + -24 = 14 (001110) +-26 + -23 = 15 (001111) +-26 + -22 = 16 (010000) +-26 + -21 = 17 (010001) +-26 + -20 = 18 (010010) +-26 + -19 = 19 (010011) +-26 + -18 = 20 (010100) +-26 + -17 = 21 (010101) +-26 + -16 = 22 (010110) +-26 + -15 = 23 (010111) +-26 + -14 = 24 (011000) +-26 + -13 = 25 (011001) +-26 + -12 = 26 (011010) +-26 + -11 = 27 (011011) +-26 + -10 = 28 (011100) +-26 + -9 = 29 (011101) +-26 + -8 = 30 (011110) +-26 + -7 = 31 (011111) +-26 + -6 = -32 (100000) +-26 + -5 = -31 (100001) +-26 + -4 = -30 (100010) +-26 + -3 = -29 (100011) +-26 + -2 = -28 (100100) +-26 + -1 = -27 (100101) +-25 + 0 = -25 (100111) +-25 + 1 = -24 (101000) +-25 + 2 = -23 (101001) +-25 + 3 = -22 (101010) +-25 + 4 = -21 (101011) +-25 + 5 = -20 (101100) +-25 + 6 = -19 (101101) +-25 + 7 = -18 (101110) +-25 + 8 = -17 (101111) +-25 + 9 = -16 (110000) +-25 + 10 = -15 (110001) +-25 + 11 = -14 (110010) +-25 + 12 = -13 (110011) +-25 + 13 = -12 (110100) +-25 + 14 = -11 (110101) +-25 + 15 = -10 (110110) +-25 + 16 = -9 (110111) +-25 + 17 = -8 (111000) +-25 + 18 = -7 (111001) +-25 + 19 = -6 (111010) +-25 + 20 = -5 (111011) +-25 + 21 = -4 (111100) +-25 + 22 = -3 (111101) +-25 + 23 = -2 (111110) +-25 + 24 = -1 (111111) +-25 + 25 = 0 (000000) +-25 + 26 = 1 (000001) +-25 + 27 = 2 (000010) +-25 + 28 = 3 (000011) +-25 + 29 = 4 (000100) +-25 + 30 = 5 (000101) +-25 + 31 = 6 (000110) +-25 + -32 = 7 (000111) +-25 + -31 = 8 (001000) +-25 + -30 = 9 (001001) +-25 + -29 = 10 (001010) +-25 + -28 = 11 (001011) +-25 + -27 = 12 (001100) +-25 + -26 = 13 (001101) +-25 + -25 = 14 (001110) +-25 + -24 = 15 (001111) +-25 + -23 = 16 (010000) +-25 + -22 = 17 (010001) +-25 + -21 = 18 (010010) +-25 + -20 = 19 (010011) +-25 + -19 = 20 (010100) +-25 + -18 = 21 (010101) +-25 + -17 = 22 (010110) +-25 + -16 = 23 (010111) +-25 + -15 = 24 (011000) +-25 + -14 = 25 (011001) +-25 + -13 = 26 (011010) +-25 + -12 = 27 (011011) +-25 + -11 = 28 (011100) +-25 + -10 = 29 (011101) +-25 + -9 = 30 (011110) +-25 + -8 = 31 (011111) +-25 + -7 = -32 (100000) +-25 + -6 = -31 (100001) +-25 + -5 = -30 (100010) +-25 + -4 = -29 (100011) +-25 + -3 = -28 (100100) +-25 + -2 = -27 (100101) +-25 + -1 = -26 (100110) +-24 + 0 = -24 (101000) +-24 + 1 = -23 (101001) +-24 + 2 = -22 (101010) +-24 + 3 = -21 (101011) +-24 + 4 = -20 (101100) +-24 + 5 = -19 (101101) +-24 + 6 = -18 (101110) +-24 + 7 = -17 (101111) +-24 + 8 = -16 (110000) +-24 + 9 = -15 (110001) +-24 + 10 = -14 (110010) +-24 + 11 = -13 (110011) +-24 + 12 = -12 (110100) +-24 + 13 = -11 (110101) +-24 + 14 = -10 (110110) +-24 + 15 = -9 (110111) +-24 + 16 = -8 (111000) +-24 + 17 = -7 (111001) +-24 + 18 = -6 (111010) +-24 + 19 = -5 (111011) +-24 + 20 = -4 (111100) +-24 + 21 = -3 (111101) +-24 + 22 = -2 (111110) +-24 + 23 = -1 (111111) +-24 + 24 = 0 (000000) +-24 + 25 = 1 (000001) +-24 + 26 = 2 (000010) +-24 + 27 = 3 (000011) +-24 + 28 = 4 (000100) +-24 + 29 = 5 (000101) +-24 + 30 = 6 (000110) +-24 + 31 = 7 (000111) +-24 + -32 = 8 (001000) +-24 + -31 = 9 (001001) +-24 + -30 = 10 (001010) +-24 + -29 = 11 (001011) +-24 + -28 = 12 (001100) +-24 + -27 = 13 (001101) +-24 + -26 = 14 (001110) +-24 + -25 = 15 (001111) +-24 + -24 = 16 (010000) +-24 + -23 = 17 (010001) +-24 + -22 = 18 (010010) +-24 + -21 = 19 (010011) +-24 + -20 = 20 (010100) +-24 + -19 = 21 (010101) +-24 + -18 = 22 (010110) +-24 + -17 = 23 (010111) +-24 + -16 = 24 (011000) +-24 + -15 = 25 (011001) +-24 + -14 = 26 (011010) +-24 + -13 = 27 (011011) +-24 + -12 = 28 (011100) +-24 + -11 = 29 (011101) +-24 + -10 = 30 (011110) +-24 + -9 = 31 (011111) +-24 + -8 = -32 (100000) +-24 + -7 = -31 (100001) +-24 + -6 = -30 (100010) +-24 + -5 = -29 (100011) +-24 + -4 = -28 (100100) +-24 + -3 = -27 (100101) +-24 + -2 = -26 (100110) +-24 + -1 = -25 (100111) +-23 + 0 = -23 (101001) +-23 + 1 = -22 (101010) +-23 + 2 = -21 (101011) +-23 + 3 = -20 (101100) +-23 + 4 = -19 (101101) +-23 + 5 = -18 (101110) +-23 + 6 = -17 (101111) +-23 + 7 = -16 (110000) +-23 + 8 = -15 (110001) +-23 + 9 = -14 (110010) +-23 + 10 = -13 (110011) +-23 + 11 = -12 (110100) +-23 + 12 = -11 (110101) +-23 + 13 = -10 (110110) +-23 + 14 = -9 (110111) +-23 + 15 = -8 (111000) +-23 + 16 = -7 (111001) +-23 + 17 = -6 (111010) +-23 + 18 = -5 (111011) +-23 + 19 = -4 (111100) +-23 + 20 = -3 (111101) +-23 + 21 = -2 (111110) +-23 + 22 = -1 (111111) +-23 + 23 = 0 (000000) +-23 + 24 = 1 (000001) +-23 + 25 = 2 (000010) +-23 + 26 = 3 (000011) +-23 + 27 = 4 (000100) +-23 + 28 = 5 (000101) +-23 + 29 = 6 (000110) +-23 + 30 = 7 (000111) +-23 + 31 = 8 (001000) +-23 + -32 = 9 (001001) +-23 + -31 = 10 (001010) +-23 + -30 = 11 (001011) +-23 + -29 = 12 (001100) +-23 + -28 = 13 (001101) +-23 + -27 = 14 (001110) +-23 + -26 = 15 (001111) +-23 + -25 = 16 (010000) +-23 + -24 = 17 (010001) +-23 + -23 = 18 (010010) +-23 + -22 = 19 (010011) +-23 + -21 = 20 (010100) +-23 + -20 = 21 (010101) +-23 + -19 = 22 (010110) +-23 + -18 = 23 (010111) +-23 + -17 = 24 (011000) +-23 + -16 = 25 (011001) +-23 + -15 = 26 (011010) +-23 + -14 = 27 (011011) +-23 + -13 = 28 (011100) +-23 + -12 = 29 (011101) +-23 + -11 = 30 (011110) +-23 + -10 = 31 (011111) +-23 + -9 = -32 (100000) +-23 + -8 = -31 (100001) +-23 + -7 = -30 (100010) +-23 + -6 = -29 (100011) +-23 + -5 = -28 (100100) +-23 + -4 = -27 (100101) +-23 + -3 = -26 (100110) +-23 + -2 = -25 (100111) +-23 + -1 = -24 (101000) +-22 + 0 = -22 (101010) +-22 + 1 = -21 (101011) +-22 + 2 = -20 (101100) +-22 + 3 = -19 (101101) +-22 + 4 = -18 (101110) +-22 + 5 = -17 (101111) +-22 + 6 = -16 (110000) +-22 + 7 = -15 (110001) +-22 + 8 = -14 (110010) +-22 + 9 = -13 (110011) +-22 + 10 = -12 (110100) +-22 + 11 = -11 (110101) +-22 + 12 = -10 (110110) +-22 + 13 = -9 (110111) +-22 + 14 = -8 (111000) +-22 + 15 = -7 (111001) +-22 + 16 = -6 (111010) +-22 + 17 = -5 (111011) +-22 + 18 = -4 (111100) +-22 + 19 = -3 (111101) +-22 + 20 = -2 (111110) +-22 + 21 = -1 (111111) +-22 + 22 = 0 (000000) +-22 + 23 = 1 (000001) +-22 + 24 = 2 (000010) +-22 + 25 = 3 (000011) +-22 + 26 = 4 (000100) +-22 + 27 = 5 (000101) +-22 + 28 = 6 (000110) +-22 + 29 = 7 (000111) +-22 + 30 = 8 (001000) +-22 + 31 = 9 (001001) +-22 + -32 = 10 (001010) +-22 + -31 = 11 (001011) +-22 + -30 = 12 (001100) +-22 + -29 = 13 (001101) +-22 + -28 = 14 (001110) +-22 + -27 = 15 (001111) +-22 + -26 = 16 (010000) +-22 + -25 = 17 (010001) +-22 + -24 = 18 (010010) +-22 + -23 = 19 (010011) +-22 + -22 = 20 (010100) +-22 + -21 = 21 (010101) +-22 + -20 = 22 (010110) +-22 + -19 = 23 (010111) +-22 + -18 = 24 (011000) +-22 + -17 = 25 (011001) +-22 + -16 = 26 (011010) +-22 + -15 = 27 (011011) +-22 + -14 = 28 (011100) +-22 + -13 = 29 (011101) +-22 + -12 = 30 (011110) +-22 + -11 = 31 (011111) +-22 + -10 = -32 (100000) +-22 + -9 = -31 (100001) +-22 + -8 = -30 (100010) +-22 + -7 = -29 (100011) +-22 + -6 = -28 (100100) +-22 + -5 = -27 (100101) +-22 + -4 = -26 (100110) +-22 + -3 = -25 (100111) +-22 + -2 = -24 (101000) +-22 + -1 = -23 (101001) +-21 + 0 = -21 (101011) +-21 + 1 = -20 (101100) +-21 + 2 = -19 (101101) +-21 + 3 = -18 (101110) +-21 + 4 = -17 (101111) +-21 + 5 = -16 (110000) +-21 + 6 = -15 (110001) +-21 + 7 = -14 (110010) +-21 + 8 = -13 (110011) +-21 + 9 = -12 (110100) +-21 + 10 = -11 (110101) +-21 + 11 = -10 (110110) +-21 + 12 = -9 (110111) +-21 + 13 = -8 (111000) +-21 + 14 = -7 (111001) +-21 + 15 = -6 (111010) +-21 + 16 = -5 (111011) +-21 + 17 = -4 (111100) +-21 + 18 = -3 (111101) +-21 + 19 = -2 (111110) +-21 + 20 = -1 (111111) +-21 + 21 = 0 (000000) +-21 + 22 = 1 (000001) +-21 + 23 = 2 (000010) +-21 + 24 = 3 (000011) +-21 + 25 = 4 (000100) +-21 + 26 = 5 (000101) +-21 + 27 = 6 (000110) +-21 + 28 = 7 (000111) +-21 + 29 = 8 (001000) +-21 + 30 = 9 (001001) +-21 + 31 = 10 (001010) +-21 + -32 = 11 (001011) +-21 + -31 = 12 (001100) +-21 + -30 = 13 (001101) +-21 + -29 = 14 (001110) +-21 + -28 = 15 (001111) +-21 + -27 = 16 (010000) +-21 + -26 = 17 (010001) +-21 + -25 = 18 (010010) +-21 + -24 = 19 (010011) +-21 + -23 = 20 (010100) +-21 + -22 = 21 (010101) +-21 + -21 = 22 (010110) +-21 + -20 = 23 (010111) +-21 + -19 = 24 (011000) +-21 + -18 = 25 (011001) +-21 + -17 = 26 (011010) +-21 + -16 = 27 (011011) +-21 + -15 = 28 (011100) +-21 + -14 = 29 (011101) +-21 + -13 = 30 (011110) +-21 + -12 = 31 (011111) +-21 + -11 = -32 (100000) +-21 + -10 = -31 (100001) +-21 + -9 = -30 (100010) +-21 + -8 = -29 (100011) +-21 + -7 = -28 (100100) +-21 + -6 = -27 (100101) +-21 + -5 = -26 (100110) +-21 + -4 = -25 (100111) +-21 + -3 = -24 (101000) +-21 + -2 = -23 (101001) +-21 + -1 = -22 (101010) +-20 + 0 = -20 (101100) +-20 + 1 = -19 (101101) +-20 + 2 = -18 (101110) +-20 + 3 = -17 (101111) +-20 + 4 = -16 (110000) +-20 + 5 = -15 (110001) +-20 + 6 = -14 (110010) +-20 + 7 = -13 (110011) +-20 + 8 = -12 (110100) +-20 + 9 = -11 (110101) +-20 + 10 = -10 (110110) +-20 + 11 = -9 (110111) +-20 + 12 = -8 (111000) +-20 + 13 = -7 (111001) +-20 + 14 = -6 (111010) +-20 + 15 = -5 (111011) +-20 + 16 = -4 (111100) +-20 + 17 = -3 (111101) +-20 + 18 = -2 (111110) +-20 + 19 = -1 (111111) +-20 + 20 = 0 (000000) +-20 + 21 = 1 (000001) +-20 + 22 = 2 (000010) +-20 + 23 = 3 (000011) +-20 + 24 = 4 (000100) +-20 + 25 = 5 (000101) +-20 + 26 = 6 (000110) +-20 + 27 = 7 (000111) +-20 + 28 = 8 (001000) +-20 + 29 = 9 (001001) +-20 + 30 = 10 (001010) +-20 + 31 = 11 (001011) +-20 + -32 = 12 (001100) +-20 + -31 = 13 (001101) +-20 + -30 = 14 (001110) +-20 + -29 = 15 (001111) +-20 + -28 = 16 (010000) +-20 + -27 = 17 (010001) +-20 + -26 = 18 (010010) +-20 + -25 = 19 (010011) +-20 + -24 = 20 (010100) +-20 + -23 = 21 (010101) +-20 + -22 = 22 (010110) +-20 + -21 = 23 (010111) +-20 + -20 = 24 (011000) +-20 + -19 = 25 (011001) +-20 + -18 = 26 (011010) +-20 + -17 = 27 (011011) +-20 + -16 = 28 (011100) +-20 + -15 = 29 (011101) +-20 + -14 = 30 (011110) +-20 + -13 = 31 (011111) +-20 + -12 = -32 (100000) +-20 + -11 = -31 (100001) +-20 + -10 = -30 (100010) +-20 + -9 = -29 (100011) +-20 + -8 = -28 (100100) +-20 + -7 = -27 (100101) +-20 + -6 = -26 (100110) +-20 + -5 = -25 (100111) +-20 + -4 = -24 (101000) +-20 + -3 = -23 (101001) +-20 + -2 = -22 (101010) +-20 + -1 = -21 (101011) +-19 + 0 = -19 (101101) +-19 + 1 = -18 (101110) +-19 + 2 = -17 (101111) +-19 + 3 = -16 (110000) +-19 + 4 = -15 (110001) +-19 + 5 = -14 (110010) +-19 + 6 = -13 (110011) +-19 + 7 = -12 (110100) +-19 + 8 = -11 (110101) +-19 + 9 = -10 (110110) +-19 + 10 = -9 (110111) +-19 + 11 = -8 (111000) +-19 + 12 = -7 (111001) +-19 + 13 = -6 (111010) +-19 + 14 = -5 (111011) +-19 + 15 = -4 (111100) +-19 + 16 = -3 (111101) +-19 + 17 = -2 (111110) +-19 + 18 = -1 (111111) +-19 + 19 = 0 (000000) +-19 + 20 = 1 (000001) +-19 + 21 = 2 (000010) +-19 + 22 = 3 (000011) +-19 + 23 = 4 (000100) +-19 + 24 = 5 (000101) +-19 + 25 = 6 (000110) +-19 + 26 = 7 (000111) +-19 + 27 = 8 (001000) +-19 + 28 = 9 (001001) +-19 + 29 = 10 (001010) +-19 + 30 = 11 (001011) +-19 + 31 = 12 (001100) +-19 + -32 = 13 (001101) +-19 + -31 = 14 (001110) +-19 + -30 = 15 (001111) +-19 + -29 = 16 (010000) +-19 + -28 = 17 (010001) +-19 + -27 = 18 (010010) +-19 + -26 = 19 (010011) +-19 + -25 = 20 (010100) +-19 + -24 = 21 (010101) +-19 + -23 = 22 (010110) +-19 + -22 = 23 (010111) +-19 + -21 = 24 (011000) +-19 + -20 = 25 (011001) +-19 + -19 = 26 (011010) +-19 + -18 = 27 (011011) +-19 + -17 = 28 (011100) +-19 + -16 = 29 (011101) +-19 + -15 = 30 (011110) +-19 + -14 = 31 (011111) +-19 + -13 = -32 (100000) +-19 + -12 = -31 (100001) +-19 + -11 = -30 (100010) +-19 + -10 = -29 (100011) +-19 + -9 = -28 (100100) +-19 + -8 = -27 (100101) +-19 + -7 = -26 (100110) +-19 + -6 = -25 (100111) +-19 + -5 = -24 (101000) +-19 + -4 = -23 (101001) +-19 + -3 = -22 (101010) +-19 + -2 = -21 (101011) +-19 + -1 = -20 (101100) +-18 + 0 = -18 (101110) +-18 + 1 = -17 (101111) +-18 + 2 = -16 (110000) +-18 + 3 = -15 (110001) +-18 + 4 = -14 (110010) +-18 + 5 = -13 (110011) +-18 + 6 = -12 (110100) +-18 + 7 = -11 (110101) +-18 + 8 = -10 (110110) +-18 + 9 = -9 (110111) +-18 + 10 = -8 (111000) +-18 + 11 = -7 (111001) +-18 + 12 = -6 (111010) +-18 + 13 = -5 (111011) +-18 + 14 = -4 (111100) +-18 + 15 = -3 (111101) +-18 + 16 = -2 (111110) +-18 + 17 = -1 (111111) +-18 + 18 = 0 (000000) +-18 + 19 = 1 (000001) +-18 + 20 = 2 (000010) +-18 + 21 = 3 (000011) +-18 + 22 = 4 (000100) +-18 + 23 = 5 (000101) +-18 + 24 = 6 (000110) +-18 + 25 = 7 (000111) +-18 + 26 = 8 (001000) +-18 + 27 = 9 (001001) +-18 + 28 = 10 (001010) +-18 + 29 = 11 (001011) +-18 + 30 = 12 (001100) +-18 + 31 = 13 (001101) +-18 + -32 = 14 (001110) +-18 + -31 = 15 (001111) +-18 + -30 = 16 (010000) +-18 + -29 = 17 (010001) +-18 + -28 = 18 (010010) +-18 + -27 = 19 (010011) +-18 + -26 = 20 (010100) +-18 + -25 = 21 (010101) +-18 + -24 = 22 (010110) +-18 + -23 = 23 (010111) +-18 + -22 = 24 (011000) +-18 + -21 = 25 (011001) +-18 + -20 = 26 (011010) +-18 + -19 = 27 (011011) +-18 + -18 = 28 (011100) +-18 + -17 = 29 (011101) +-18 + -16 = 30 (011110) +-18 + -15 = 31 (011111) +-18 + -14 = -32 (100000) +-18 + -13 = -31 (100001) +-18 + -12 = -30 (100010) +-18 + -11 = -29 (100011) +-18 + -10 = -28 (100100) +-18 + -9 = -27 (100101) +-18 + -8 = -26 (100110) +-18 + -7 = -25 (100111) +-18 + -6 = -24 (101000) +-18 + -5 = -23 (101001) +-18 + -4 = -22 (101010) +-18 + -3 = -21 (101011) +-18 + -2 = -20 (101100) +-18 + -1 = -19 (101101) +-17 + 0 = -17 (101111) +-17 + 1 = -16 (110000) +-17 + 2 = -15 (110001) +-17 + 3 = -14 (110010) +-17 + 4 = -13 (110011) +-17 + 5 = -12 (110100) +-17 + 6 = -11 (110101) +-17 + 7 = -10 (110110) +-17 + 8 = -9 (110111) +-17 + 9 = -8 (111000) +-17 + 10 = -7 (111001) +-17 + 11 = -6 (111010) +-17 + 12 = -5 (111011) +-17 + 13 = -4 (111100) +-17 + 14 = -3 (111101) +-17 + 15 = -2 (111110) +-17 + 16 = -1 (111111) +-17 + 17 = 0 (000000) +-17 + 18 = 1 (000001) +-17 + 19 = 2 (000010) +-17 + 20 = 3 (000011) +-17 + 21 = 4 (000100) +-17 + 22 = 5 (000101) +-17 + 23 = 6 (000110) +-17 + 24 = 7 (000111) +-17 + 25 = 8 (001000) +-17 + 26 = 9 (001001) +-17 + 27 = 10 (001010) +-17 + 28 = 11 (001011) +-17 + 29 = 12 (001100) +-17 + 30 = 13 (001101) +-17 + 31 = 14 (001110) +-17 + -32 = 15 (001111) +-17 + -31 = 16 (010000) +-17 + -30 = 17 (010001) +-17 + -29 = 18 (010010) +-17 + -28 = 19 (010011) +-17 + -27 = 20 (010100) +-17 + -26 = 21 (010101) +-17 + -25 = 22 (010110) +-17 + -24 = 23 (010111) +-17 + -23 = 24 (011000) +-17 + -22 = 25 (011001) +-17 + -21 = 26 (011010) +-17 + -20 = 27 (011011) +-17 + -19 = 28 (011100) +-17 + -18 = 29 (011101) +-17 + -17 = 30 (011110) +-17 + -16 = 31 (011111) +-17 + -15 = -32 (100000) +-17 + -14 = -31 (100001) +-17 + -13 = -30 (100010) +-17 + -12 = -29 (100011) +-17 + -11 = -28 (100100) +-17 + -10 = -27 (100101) +-17 + -9 = -26 (100110) +-17 + -8 = -25 (100111) +-17 + -7 = -24 (101000) +-17 + -6 = -23 (101001) +-17 + -5 = -22 (101010) +-17 + -4 = -21 (101011) +-17 + -3 = -20 (101100) +-17 + -2 = -19 (101101) +-17 + -1 = -18 (101110) +-16 + 0 = -16 (110000) +-16 + 1 = -15 (110001) +-16 + 2 = -14 (110010) +-16 + 3 = -13 (110011) +-16 + 4 = -12 (110100) +-16 + 5 = -11 (110101) +-16 + 6 = -10 (110110) +-16 + 7 = -9 (110111) +-16 + 8 = -8 (111000) +-16 + 9 = -7 (111001) +-16 + 10 = -6 (111010) +-16 + 11 = -5 (111011) +-16 + 12 = -4 (111100) +-16 + 13 = -3 (111101) +-16 + 14 = -2 (111110) +-16 + 15 = -1 (111111) +-16 + 16 = 0 (000000) +-16 + 17 = 1 (000001) +-16 + 18 = 2 (000010) +-16 + 19 = 3 (000011) +-16 + 20 = 4 (000100) +-16 + 21 = 5 (000101) +-16 + 22 = 6 (000110) +-16 + 23 = 7 (000111) +-16 + 24 = 8 (001000) +-16 + 25 = 9 (001001) +-16 + 26 = 10 (001010) +-16 + 27 = 11 (001011) +-16 + 28 = 12 (001100) +-16 + 29 = 13 (001101) +-16 + 30 = 14 (001110) +-16 + 31 = 15 (001111) +-16 + -32 = 16 (010000) +-16 + -31 = 17 (010001) +-16 + -30 = 18 (010010) +-16 + -29 = 19 (010011) +-16 + -28 = 20 (010100) +-16 + -27 = 21 (010101) +-16 + -26 = 22 (010110) +-16 + -25 = 23 (010111) +-16 + -24 = 24 (011000) +-16 + -23 = 25 (011001) +-16 + -22 = 26 (011010) +-16 + -21 = 27 (011011) +-16 + -20 = 28 (011100) +-16 + -19 = 29 (011101) +-16 + -18 = 30 (011110) +-16 + -17 = 31 (011111) +-16 + -16 = -32 (100000) +-16 + -15 = -31 (100001) +-16 + -14 = -30 (100010) +-16 + -13 = -29 (100011) +-16 + -12 = -28 (100100) +-16 + -11 = -27 (100101) +-16 + -10 = -26 (100110) +-16 + -9 = -25 (100111) +-16 + -8 = -24 (101000) +-16 + -7 = -23 (101001) +-16 + -6 = -22 (101010) +-16 + -5 = -21 (101011) +-16 + -4 = -20 (101100) +-16 + -3 = -19 (101101) +-16 + -2 = -18 (101110) +-16 + -1 = -17 (101111) +-15 + 0 = -15 (110001) +-15 + 1 = -14 (110010) +-15 + 2 = -13 (110011) +-15 + 3 = -12 (110100) +-15 + 4 = -11 (110101) +-15 + 5 = -10 (110110) +-15 + 6 = -9 (110111) +-15 + 7 = -8 (111000) +-15 + 8 = -7 (111001) +-15 + 9 = -6 (111010) +-15 + 10 = -5 (111011) +-15 + 11 = -4 (111100) +-15 + 12 = -3 (111101) +-15 + 13 = -2 (111110) +-15 + 14 = -1 (111111) +-15 + 15 = 0 (000000) +-15 + 16 = 1 (000001) +-15 + 17 = 2 (000010) +-15 + 18 = 3 (000011) +-15 + 19 = 4 (000100) +-15 + 20 = 5 (000101) +-15 + 21 = 6 (000110) +-15 + 22 = 7 (000111) +-15 + 23 = 8 (001000) +-15 + 24 = 9 (001001) +-15 + 25 = 10 (001010) +-15 + 26 = 11 (001011) +-15 + 27 = 12 (001100) +-15 + 28 = 13 (001101) +-15 + 29 = 14 (001110) +-15 + 30 = 15 (001111) +-15 + 31 = 16 (010000) +-15 + -32 = 17 (010001) +-15 + -31 = 18 (010010) +-15 + -30 = 19 (010011) +-15 + -29 = 20 (010100) +-15 + -28 = 21 (010101) +-15 + -27 = 22 (010110) +-15 + -26 = 23 (010111) +-15 + -25 = 24 (011000) +-15 + -24 = 25 (011001) +-15 + -23 = 26 (011010) +-15 + -22 = 27 (011011) +-15 + -21 = 28 (011100) +-15 + -20 = 29 (011101) +-15 + -19 = 30 (011110) +-15 + -18 = 31 (011111) +-15 + -17 = -32 (100000) +-15 + -16 = -31 (100001) +-15 + -15 = -30 (100010) +-15 + -14 = -29 (100011) +-15 + -13 = -28 (100100) +-15 + -12 = -27 (100101) +-15 + -11 = -26 (100110) +-15 + -10 = -25 (100111) +-15 + -9 = -24 (101000) +-15 + -8 = -23 (101001) +-15 + -7 = -22 (101010) +-15 + -6 = -21 (101011) +-15 + -5 = -20 (101100) +-15 + -4 = -19 (101101) +-15 + -3 = -18 (101110) +-15 + -2 = -17 (101111) +-15 + -1 = -16 (110000) +-14 + 0 = -14 (110010) +-14 + 1 = -13 (110011) +-14 + 2 = -12 (110100) +-14 + 3 = -11 (110101) +-14 + 4 = -10 (110110) +-14 + 5 = -9 (110111) +-14 + 6 = -8 (111000) +-14 + 7 = -7 (111001) +-14 + 8 = -6 (111010) +-14 + 9 = -5 (111011) +-14 + 10 = -4 (111100) +-14 + 11 = -3 (111101) +-14 + 12 = -2 (111110) +-14 + 13 = -1 (111111) +-14 + 14 = 0 (000000) +-14 + 15 = 1 (000001) +-14 + 16 = 2 (000010) +-14 + 17 = 3 (000011) +-14 + 18 = 4 (000100) +-14 + 19 = 5 (000101) +-14 + 20 = 6 (000110) +-14 + 21 = 7 (000111) +-14 + 22 = 8 (001000) +-14 + 23 = 9 (001001) +-14 + 24 = 10 (001010) +-14 + 25 = 11 (001011) +-14 + 26 = 12 (001100) +-14 + 27 = 13 (001101) +-14 + 28 = 14 (001110) +-14 + 29 = 15 (001111) +-14 + 30 = 16 (010000) +-14 + 31 = 17 (010001) +-14 + -32 = 18 (010010) +-14 + -31 = 19 (010011) +-14 + -30 = 20 (010100) +-14 + -29 = 21 (010101) +-14 + -28 = 22 (010110) +-14 + -27 = 23 (010111) +-14 + -26 = 24 (011000) +-14 + -25 = 25 (011001) +-14 + -24 = 26 (011010) +-14 + -23 = 27 (011011) +-14 + -22 = 28 (011100) +-14 + -21 = 29 (011101) +-14 + -20 = 30 (011110) +-14 + -19 = 31 (011111) +-14 + -18 = -32 (100000) +-14 + -17 = -31 (100001) +-14 + -16 = -30 (100010) +-14 + -15 = -29 (100011) +-14 + -14 = -28 (100100) +-14 + -13 = -27 (100101) +-14 + -12 = -26 (100110) +-14 + -11 = -25 (100111) +-14 + -10 = -24 (101000) +-14 + -9 = -23 (101001) +-14 + -8 = -22 (101010) +-14 + -7 = -21 (101011) +-14 + -6 = -20 (101100) +-14 + -5 = -19 (101101) +-14 + -4 = -18 (101110) +-14 + -3 = -17 (101111) +-14 + -2 = -16 (110000) +-14 + -1 = -15 (110001) +-13 + 0 = -13 (110011) +-13 + 1 = -12 (110100) +-13 + 2 = -11 (110101) +-13 + 3 = -10 (110110) +-13 + 4 = -9 (110111) +-13 + 5 = -8 (111000) +-13 + 6 = -7 (111001) +-13 + 7 = -6 (111010) +-13 + 8 = -5 (111011) +-13 + 9 = -4 (111100) +-13 + 10 = -3 (111101) +-13 + 11 = -2 (111110) +-13 + 12 = -1 (111111) +-13 + 13 = 0 (000000) +-13 + 14 = 1 (000001) +-13 + 15 = 2 (000010) +-13 + 16 = 3 (000011) +-13 + 17 = 4 (000100) +-13 + 18 = 5 (000101) +-13 + 19 = 6 (000110) +-13 + 20 = 7 (000111) +-13 + 21 = 8 (001000) +-13 + 22 = 9 (001001) +-13 + 23 = 10 (001010) +-13 + 24 = 11 (001011) +-13 + 25 = 12 (001100) +-13 + 26 = 13 (001101) +-13 + 27 = 14 (001110) +-13 + 28 = 15 (001111) +-13 + 29 = 16 (010000) +-13 + 30 = 17 (010001) +-13 + 31 = 18 (010010) +-13 + -32 = 19 (010011) +-13 + -31 = 20 (010100) +-13 + -30 = 21 (010101) +-13 + -29 = 22 (010110) +-13 + -28 = 23 (010111) +-13 + -27 = 24 (011000) +-13 + -26 = 25 (011001) +-13 + -25 = 26 (011010) +-13 + -24 = 27 (011011) +-13 + -23 = 28 (011100) +-13 + -22 = 29 (011101) +-13 + -21 = 30 (011110) +-13 + -20 = 31 (011111) +-13 + -19 = -32 (100000) +-13 + -18 = -31 (100001) +-13 + -17 = -30 (100010) +-13 + -16 = -29 (100011) +-13 + -15 = -28 (100100) +-13 + -14 = -27 (100101) +-13 + -13 = -26 (100110) +-13 + -12 = -25 (100111) +-13 + -11 = -24 (101000) +-13 + -10 = -23 (101001) +-13 + -9 = -22 (101010) +-13 + -8 = -21 (101011) +-13 + -7 = -20 (101100) +-13 + -6 = -19 (101101) +-13 + -5 = -18 (101110) +-13 + -4 = -17 (101111) +-13 + -3 = -16 (110000) +-13 + -2 = -15 (110001) +-13 + -1 = -14 (110010) +-12 + 0 = -12 (110100) +-12 + 1 = -11 (110101) +-12 + 2 = -10 (110110) +-12 + 3 = -9 (110111) +-12 + 4 = -8 (111000) +-12 + 5 = -7 (111001) +-12 + 6 = -6 (111010) +-12 + 7 = -5 (111011) +-12 + 8 = -4 (111100) +-12 + 9 = -3 (111101) +-12 + 10 = -2 (111110) +-12 + 11 = -1 (111111) +-12 + 12 = 0 (000000) +-12 + 13 = 1 (000001) +-12 + 14 = 2 (000010) +-12 + 15 = 3 (000011) +-12 + 16 = 4 (000100) +-12 + 17 = 5 (000101) +-12 + 18 = 6 (000110) +-12 + 19 = 7 (000111) +-12 + 20 = 8 (001000) +-12 + 21 = 9 (001001) +-12 + 22 = 10 (001010) +-12 + 23 = 11 (001011) +-12 + 24 = 12 (001100) +-12 + 25 = 13 (001101) +-12 + 26 = 14 (001110) +-12 + 27 = 15 (001111) +-12 + 28 = 16 (010000) +-12 + 29 = 17 (010001) +-12 + 30 = 18 (010010) +-12 + 31 = 19 (010011) +-12 + -32 = 20 (010100) +-12 + -31 = 21 (010101) +-12 + -30 = 22 (010110) +-12 + -29 = 23 (010111) +-12 + -28 = 24 (011000) +-12 + -27 = 25 (011001) +-12 + -26 = 26 (011010) +-12 + -25 = 27 (011011) +-12 + -24 = 28 (011100) +-12 + -23 = 29 (011101) +-12 + -22 = 30 (011110) +-12 + -21 = 31 (011111) +-12 + -20 = -32 (100000) +-12 + -19 = -31 (100001) +-12 + -18 = -30 (100010) +-12 + -17 = -29 (100011) +-12 + -16 = -28 (100100) +-12 + -15 = -27 (100101) +-12 + -14 = -26 (100110) +-12 + -13 = -25 (100111) +-12 + -12 = -24 (101000) +-12 + -11 = -23 (101001) +-12 + -10 = -22 (101010) +-12 + -9 = -21 (101011) +-12 + -8 = -20 (101100) +-12 + -7 = -19 (101101) +-12 + -6 = -18 (101110) +-12 + -5 = -17 (101111) +-12 + -4 = -16 (110000) +-12 + -3 = -15 (110001) +-12 + -2 = -14 (110010) +-12 + -1 = -13 (110011) +-11 + 0 = -11 (110101) +-11 + 1 = -10 (110110) +-11 + 2 = -9 (110111) +-11 + 3 = -8 (111000) +-11 + 4 = -7 (111001) +-11 + 5 = -6 (111010) +-11 + 6 = -5 (111011) +-11 + 7 = -4 (111100) +-11 + 8 = -3 (111101) +-11 + 9 = -2 (111110) +-11 + 10 = -1 (111111) +-11 + 11 = 0 (000000) +-11 + 12 = 1 (000001) +-11 + 13 = 2 (000010) +-11 + 14 = 3 (000011) +-11 + 15 = 4 (000100) +-11 + 16 = 5 (000101) +-11 + 17 = 6 (000110) +-11 + 18 = 7 (000111) +-11 + 19 = 8 (001000) +-11 + 20 = 9 (001001) +-11 + 21 = 10 (001010) +-11 + 22 = 11 (001011) +-11 + 23 = 12 (001100) +-11 + 24 = 13 (001101) +-11 + 25 = 14 (001110) +-11 + 26 = 15 (001111) +-11 + 27 = 16 (010000) +-11 + 28 = 17 (010001) +-11 + 29 = 18 (010010) +-11 + 30 = 19 (010011) +-11 + 31 = 20 (010100) +-11 + -32 = 21 (010101) +-11 + -31 = 22 (010110) +-11 + -30 = 23 (010111) +-11 + -29 = 24 (011000) +-11 + -28 = 25 (011001) +-11 + -27 = 26 (011010) +-11 + -26 = 27 (011011) +-11 + -25 = 28 (011100) +-11 + -24 = 29 (011101) +-11 + -23 = 30 (011110) +-11 + -22 = 31 (011111) +-11 + -21 = -32 (100000) +-11 + -20 = -31 (100001) +-11 + -19 = -30 (100010) +-11 + -18 = -29 (100011) +-11 + -17 = -28 (100100) +-11 + -16 = -27 (100101) +-11 + -15 = -26 (100110) +-11 + -14 = -25 (100111) +-11 + -13 = -24 (101000) +-11 + -12 = -23 (101001) +-11 + -11 = -22 (101010) +-11 + -10 = -21 (101011) +-11 + -9 = -20 (101100) +-11 + -8 = -19 (101101) +-11 + -7 = -18 (101110) +-11 + -6 = -17 (101111) +-11 + -5 = -16 (110000) +-11 + -4 = -15 (110001) +-11 + -3 = -14 (110010) +-11 + -2 = -13 (110011) +-11 + -1 = -12 (110100) +-10 + 0 = -10 (110110) +-10 + 1 = -9 (110111) +-10 + 2 = -8 (111000) +-10 + 3 = -7 (111001) +-10 + 4 = -6 (111010) +-10 + 5 = -5 (111011) +-10 + 6 = -4 (111100) +-10 + 7 = -3 (111101) +-10 + 8 = -2 (111110) +-10 + 9 = -1 (111111) +-10 + 10 = 0 (000000) +-10 + 11 = 1 (000001) +-10 + 12 = 2 (000010) +-10 + 13 = 3 (000011) +-10 + 14 = 4 (000100) +-10 + 15 = 5 (000101) +-10 + 16 = 6 (000110) +-10 + 17 = 7 (000111) +-10 + 18 = 8 (001000) +-10 + 19 = 9 (001001) +-10 + 20 = 10 (001010) +-10 + 21 = 11 (001011) +-10 + 22 = 12 (001100) +-10 + 23 = 13 (001101) +-10 + 24 = 14 (001110) +-10 + 25 = 15 (001111) +-10 + 26 = 16 (010000) +-10 + 27 = 17 (010001) +-10 + 28 = 18 (010010) +-10 + 29 = 19 (010011) +-10 + 30 = 20 (010100) +-10 + 31 = 21 (010101) +-10 + -32 = 22 (010110) +-10 + -31 = 23 (010111) +-10 + -30 = 24 (011000) +-10 + -29 = 25 (011001) +-10 + -28 = 26 (011010) +-10 + -27 = 27 (011011) +-10 + -26 = 28 (011100) +-10 + -25 = 29 (011101) +-10 + -24 = 30 (011110) +-10 + -23 = 31 (011111) +-10 + -22 = -32 (100000) +-10 + -21 = -31 (100001) +-10 + -20 = -30 (100010) +-10 + -19 = -29 (100011) +-10 + -18 = -28 (100100) +-10 + -17 = -27 (100101) +-10 + -16 = -26 (100110) +-10 + -15 = -25 (100111) +-10 + -14 = -24 (101000) +-10 + -13 = -23 (101001) +-10 + -12 = -22 (101010) +-10 + -11 = -21 (101011) +-10 + -10 = -20 (101100) +-10 + -9 = -19 (101101) +-10 + -8 = -18 (101110) +-10 + -7 = -17 (101111) +-10 + -6 = -16 (110000) +-10 + -5 = -15 (110001) +-10 + -4 = -14 (110010) +-10 + -3 = -13 (110011) +-10 + -2 = -12 (110100) +-10 + -1 = -11 (110101) +-9 + 0 = -9 (110111) +-9 + 1 = -8 (111000) +-9 + 2 = -7 (111001) +-9 + 3 = -6 (111010) +-9 + 4 = -5 (111011) +-9 + 5 = -4 (111100) +-9 + 6 = -3 (111101) +-9 + 7 = -2 (111110) +-9 + 8 = -1 (111111) +-9 + 9 = 0 (000000) +-9 + 10 = 1 (000001) +-9 + 11 = 2 (000010) +-9 + 12 = 3 (000011) +-9 + 13 = 4 (000100) +-9 + 14 = 5 (000101) +-9 + 15 = 6 (000110) +-9 + 16 = 7 (000111) +-9 + 17 = 8 (001000) +-9 + 18 = 9 (001001) +-9 + 19 = 10 (001010) +-9 + 20 = 11 (001011) +-9 + 21 = 12 (001100) +-9 + 22 = 13 (001101) +-9 + 23 = 14 (001110) +-9 + 24 = 15 (001111) +-9 + 25 = 16 (010000) +-9 + 26 = 17 (010001) +-9 + 27 = 18 (010010) +-9 + 28 = 19 (010011) +-9 + 29 = 20 (010100) +-9 + 30 = 21 (010101) +-9 + 31 = 22 (010110) +-9 + -32 = 23 (010111) +-9 + -31 = 24 (011000) +-9 + -30 = 25 (011001) +-9 + -29 = 26 (011010) +-9 + -28 = 27 (011011) +-9 + -27 = 28 (011100) +-9 + -26 = 29 (011101) +-9 + -25 = 30 (011110) +-9 + -24 = 31 (011111) +-9 + -23 = -32 (100000) +-9 + -22 = -31 (100001) +-9 + -21 = -30 (100010) +-9 + -20 = -29 (100011) +-9 + -19 = -28 (100100) +-9 + -18 = -27 (100101) +-9 + -17 = -26 (100110) +-9 + -16 = -25 (100111) +-9 + -15 = -24 (101000) +-9 + -14 = -23 (101001) +-9 + -13 = -22 (101010) +-9 + -12 = -21 (101011) +-9 + -11 = -20 (101100) +-9 + -10 = -19 (101101) +-9 + -9 = -18 (101110) +-9 + -8 = -17 (101111) +-9 + -7 = -16 (110000) +-9 + -6 = -15 (110001) +-9 + -5 = -14 (110010) +-9 + -4 = -13 (110011) +-9 + -3 = -12 (110100) +-9 + -2 = -11 (110101) +-9 + -1 = -10 (110110) +-8 + 0 = -8 (111000) +-8 + 1 = -7 (111001) +-8 + 2 = -6 (111010) +-8 + 3 = -5 (111011) +-8 + 4 = -4 (111100) +-8 + 5 = -3 (111101) +-8 + 6 = -2 (111110) +-8 + 7 = -1 (111111) +-8 + 8 = 0 (000000) +-8 + 9 = 1 (000001) +-8 + 10 = 2 (000010) +-8 + 11 = 3 (000011) +-8 + 12 = 4 (000100) +-8 + 13 = 5 (000101) +-8 + 14 = 6 (000110) +-8 + 15 = 7 (000111) +-8 + 16 = 8 (001000) +-8 + 17 = 9 (001001) +-8 + 18 = 10 (001010) +-8 + 19 = 11 (001011) +-8 + 20 = 12 (001100) +-8 + 21 = 13 (001101) +-8 + 22 = 14 (001110) +-8 + 23 = 15 (001111) +-8 + 24 = 16 (010000) +-8 + 25 = 17 (010001) +-8 + 26 = 18 (010010) +-8 + 27 = 19 (010011) +-8 + 28 = 20 (010100) +-8 + 29 = 21 (010101) +-8 + 30 = 22 (010110) +-8 + 31 = 23 (010111) +-8 + -32 = 24 (011000) +-8 + -31 = 25 (011001) +-8 + -30 = 26 (011010) +-8 + -29 = 27 (011011) +-8 + -28 = 28 (011100) +-8 + -27 = 29 (011101) +-8 + -26 = 30 (011110) +-8 + -25 = 31 (011111) +-8 + -24 = -32 (100000) +-8 + -23 = -31 (100001) +-8 + -22 = -30 (100010) +-8 + -21 = -29 (100011) +-8 + -20 = -28 (100100) +-8 + -19 = -27 (100101) +-8 + -18 = -26 (100110) +-8 + -17 = -25 (100111) +-8 + -16 = -24 (101000) +-8 + -15 = -23 (101001) +-8 + -14 = -22 (101010) +-8 + -13 = -21 (101011) +-8 + -12 = -20 (101100) +-8 + -11 = -19 (101101) +-8 + -10 = -18 (101110) +-8 + -9 = -17 (101111) +-8 + -8 = -16 (110000) +-8 + -7 = -15 (110001) +-8 + -6 = -14 (110010) +-8 + -5 = -13 (110011) +-8 + -4 = -12 (110100) +-8 + -3 = -11 (110101) +-8 + -2 = -10 (110110) +-8 + -1 = -9 (110111) +-7 + 0 = -7 (111001) +-7 + 1 = -6 (111010) +-7 + 2 = -5 (111011) +-7 + 3 = -4 (111100) +-7 + 4 = -3 (111101) +-7 + 5 = -2 (111110) +-7 + 6 = -1 (111111) +-7 + 7 = 0 (000000) +-7 + 8 = 1 (000001) +-7 + 9 = 2 (000010) +-7 + 10 = 3 (000011) +-7 + 11 = 4 (000100) +-7 + 12 = 5 (000101) +-7 + 13 = 6 (000110) +-7 + 14 = 7 (000111) +-7 + 15 = 8 (001000) +-7 + 16 = 9 (001001) +-7 + 17 = 10 (001010) +-7 + 18 = 11 (001011) +-7 + 19 = 12 (001100) +-7 + 20 = 13 (001101) +-7 + 21 = 14 (001110) +-7 + 22 = 15 (001111) +-7 + 23 = 16 (010000) +-7 + 24 = 17 (010001) +-7 + 25 = 18 (010010) +-7 + 26 = 19 (010011) +-7 + 27 = 20 (010100) +-7 + 28 = 21 (010101) +-7 + 29 = 22 (010110) +-7 + 30 = 23 (010111) +-7 + 31 = 24 (011000) +-7 + -32 = 25 (011001) +-7 + -31 = 26 (011010) +-7 + -30 = 27 (011011) +-7 + -29 = 28 (011100) +-7 + -28 = 29 (011101) +-7 + -27 = 30 (011110) +-7 + -26 = 31 (011111) +-7 + -25 = -32 (100000) +-7 + -24 = -31 (100001) +-7 + -23 = -30 (100010) +-7 + -22 = -29 (100011) +-7 + -21 = -28 (100100) +-7 + -20 = -27 (100101) +-7 + -19 = -26 (100110) +-7 + -18 = -25 (100111) +-7 + -17 = -24 (101000) +-7 + -16 = -23 (101001) +-7 + -15 = -22 (101010) +-7 + -14 = -21 (101011) +-7 + -13 = -20 (101100) +-7 + -12 = -19 (101101) +-7 + -11 = -18 (101110) +-7 + -10 = -17 (101111) +-7 + -9 = -16 (110000) +-7 + -8 = -15 (110001) +-7 + -7 = -14 (110010) +-7 + -6 = -13 (110011) +-7 + -5 = -12 (110100) +-7 + -4 = -11 (110101) +-7 + -3 = -10 (110110) +-7 + -2 = -9 (110111) +-7 + -1 = -8 (111000) +-6 + 0 = -6 (111010) +-6 + 1 = -5 (111011) +-6 + 2 = -4 (111100) +-6 + 3 = -3 (111101) +-6 + 4 = -2 (111110) +-6 + 5 = -1 (111111) +-6 + 6 = 0 (000000) +-6 + 7 = 1 (000001) +-6 + 8 = 2 (000010) +-6 + 9 = 3 (000011) +-6 + 10 = 4 (000100) +-6 + 11 = 5 (000101) +-6 + 12 = 6 (000110) +-6 + 13 = 7 (000111) +-6 + 14 = 8 (001000) +-6 + 15 = 9 (001001) +-6 + 16 = 10 (001010) +-6 + 17 = 11 (001011) +-6 + 18 = 12 (001100) +-6 + 19 = 13 (001101) +-6 + 20 = 14 (001110) +-6 + 21 = 15 (001111) +-6 + 22 = 16 (010000) +-6 + 23 = 17 (010001) +-6 + 24 = 18 (010010) +-6 + 25 = 19 (010011) +-6 + 26 = 20 (010100) +-6 + 27 = 21 (010101) +-6 + 28 = 22 (010110) +-6 + 29 = 23 (010111) +-6 + 30 = 24 (011000) +-6 + 31 = 25 (011001) +-6 + -32 = 26 (011010) +-6 + -31 = 27 (011011) +-6 + -30 = 28 (011100) +-6 + -29 = 29 (011101) +-6 + -28 = 30 (011110) +-6 + -27 = 31 (011111) +-6 + -26 = -32 (100000) +-6 + -25 = -31 (100001) +-6 + -24 = -30 (100010) +-6 + -23 = -29 (100011) +-6 + -22 = -28 (100100) +-6 + -21 = -27 (100101) +-6 + -20 = -26 (100110) +-6 + -19 = -25 (100111) +-6 + -18 = -24 (101000) +-6 + -17 = -23 (101001) +-6 + -16 = -22 (101010) +-6 + -15 = -21 (101011) +-6 + -14 = -20 (101100) +-6 + -13 = -19 (101101) +-6 + -12 = -18 (101110) +-6 + -11 = -17 (101111) +-6 + -10 = -16 (110000) +-6 + -9 = -15 (110001) +-6 + -8 = -14 (110010) +-6 + -7 = -13 (110011) +-6 + -6 = -12 (110100) +-6 + -5 = -11 (110101) +-6 + -4 = -10 (110110) +-6 + -3 = -9 (110111) +-6 + -2 = -8 (111000) +-6 + -1 = -7 (111001) +-5 + 0 = -5 (111011) +-5 + 1 = -4 (111100) +-5 + 2 = -3 (111101) +-5 + 3 = -2 (111110) +-5 + 4 = -1 (111111) +-5 + 5 = 0 (000000) +-5 + 6 = 1 (000001) +-5 + 7 = 2 (000010) +-5 + 8 = 3 (000011) +-5 + 9 = 4 (000100) +-5 + 10 = 5 (000101) +-5 + 11 = 6 (000110) +-5 + 12 = 7 (000111) +-5 + 13 = 8 (001000) +-5 + 14 = 9 (001001) +-5 + 15 = 10 (001010) +-5 + 16 = 11 (001011) +-5 + 17 = 12 (001100) +-5 + 18 = 13 (001101) +-5 + 19 = 14 (001110) +-5 + 20 = 15 (001111) +-5 + 21 = 16 (010000) +-5 + 22 = 17 (010001) +-5 + 23 = 18 (010010) +-5 + 24 = 19 (010011) +-5 + 25 = 20 (010100) +-5 + 26 = 21 (010101) +-5 + 27 = 22 (010110) +-5 + 28 = 23 (010111) +-5 + 29 = 24 (011000) +-5 + 30 = 25 (011001) +-5 + 31 = 26 (011010) +-5 + -32 = 27 (011011) +-5 + -31 = 28 (011100) +-5 + -30 = 29 (011101) +-5 + -29 = 30 (011110) +-5 + -28 = 31 (011111) +-5 + -27 = -32 (100000) +-5 + -26 = -31 (100001) +-5 + -25 = -30 (100010) +-5 + -24 = -29 (100011) +-5 + -23 = -28 (100100) +-5 + -22 = -27 (100101) +-5 + -21 = -26 (100110) +-5 + -20 = -25 (100111) +-5 + -19 = -24 (101000) +-5 + -18 = -23 (101001) +-5 + -17 = -22 (101010) +-5 + -16 = -21 (101011) +-5 + -15 = -20 (101100) +-5 + -14 = -19 (101101) +-5 + -13 = -18 (101110) +-5 + -12 = -17 (101111) +-5 + -11 = -16 (110000) +-5 + -10 = -15 (110001) +-5 + -9 = -14 (110010) +-5 + -8 = -13 (110011) +-5 + -7 = -12 (110100) +-5 + -6 = -11 (110101) +-5 + -5 = -10 (110110) +-5 + -4 = -9 (110111) +-5 + -3 = -8 (111000) +-5 + -2 = -7 (111001) +-5 + -1 = -6 (111010) +-4 + 0 = -4 (111100) +-4 + 1 = -3 (111101) +-4 + 2 = -2 (111110) +-4 + 3 = -1 (111111) +-4 + 4 = 0 (000000) +-4 + 5 = 1 (000001) +-4 + 6 = 2 (000010) +-4 + 7 = 3 (000011) +-4 + 8 = 4 (000100) +-4 + 9 = 5 (000101) +-4 + 10 = 6 (000110) +-4 + 11 = 7 (000111) +-4 + 12 = 8 (001000) +-4 + 13 = 9 (001001) +-4 + 14 = 10 (001010) +-4 + 15 = 11 (001011) +-4 + 16 = 12 (001100) +-4 + 17 = 13 (001101) +-4 + 18 = 14 (001110) +-4 + 19 = 15 (001111) +-4 + 20 = 16 (010000) +-4 + 21 = 17 (010001) +-4 + 22 = 18 (010010) +-4 + 23 = 19 (010011) +-4 + 24 = 20 (010100) +-4 + 25 = 21 (010101) +-4 + 26 = 22 (010110) +-4 + 27 = 23 (010111) +-4 + 28 = 24 (011000) +-4 + 29 = 25 (011001) +-4 + 30 = 26 (011010) +-4 + 31 = 27 (011011) +-4 + -32 = 28 (011100) +-4 + -31 = 29 (011101) +-4 + -30 = 30 (011110) +-4 + -29 = 31 (011111) +-4 + -28 = -32 (100000) +-4 + -27 = -31 (100001) +-4 + -26 = -30 (100010) +-4 + -25 = -29 (100011) +-4 + -24 = -28 (100100) +-4 + -23 = -27 (100101) +-4 + -22 = -26 (100110) +-4 + -21 = -25 (100111) +-4 + -20 = -24 (101000) +-4 + -19 = -23 (101001) +-4 + -18 = -22 (101010) +-4 + -17 = -21 (101011) +-4 + -16 = -20 (101100) +-4 + -15 = -19 (101101) +-4 + -14 = -18 (101110) +-4 + -13 = -17 (101111) +-4 + -12 = -16 (110000) +-4 + -11 = -15 (110001) +-4 + -10 = -14 (110010) +-4 + -9 = -13 (110011) +-4 + -8 = -12 (110100) +-4 + -7 = -11 (110101) +-4 + -6 = -10 (110110) +-4 + -5 = -9 (110111) +-4 + -4 = -8 (111000) +-4 + -3 = -7 (111001) +-4 + -2 = -6 (111010) +-4 + -1 = -5 (111011) +-3 + 0 = -3 (111101) +-3 + 1 = -2 (111110) +-3 + 2 = -1 (111111) +-3 + 3 = 0 (000000) +-3 + 4 = 1 (000001) +-3 + 5 = 2 (000010) +-3 + 6 = 3 (000011) +-3 + 7 = 4 (000100) +-3 + 8 = 5 (000101) +-3 + 9 = 6 (000110) +-3 + 10 = 7 (000111) +-3 + 11 = 8 (001000) +-3 + 12 = 9 (001001) +-3 + 13 = 10 (001010) +-3 + 14 = 11 (001011) +-3 + 15 = 12 (001100) +-3 + 16 = 13 (001101) +-3 + 17 = 14 (001110) +-3 + 18 = 15 (001111) +-3 + 19 = 16 (010000) +-3 + 20 = 17 (010001) +-3 + 21 = 18 (010010) +-3 + 22 = 19 (010011) +-3 + 23 = 20 (010100) +-3 + 24 = 21 (010101) +-3 + 25 = 22 (010110) +-3 + 26 = 23 (010111) +-3 + 27 = 24 (011000) +-3 + 28 = 25 (011001) +-3 + 29 = 26 (011010) +-3 + 30 = 27 (011011) +-3 + 31 = 28 (011100) +-3 + -32 = 29 (011101) +-3 + -31 = 30 (011110) +-3 + -30 = 31 (011111) +-3 + -29 = -32 (100000) +-3 + -28 = -31 (100001) +-3 + -27 = -30 (100010) +-3 + -26 = -29 (100011) +-3 + -25 = -28 (100100) +-3 + -24 = -27 (100101) +-3 + -23 = -26 (100110) +-3 + -22 = -25 (100111) +-3 + -21 = -24 (101000) +-3 + -20 = -23 (101001) +-3 + -19 = -22 (101010) +-3 + -18 = -21 (101011) +-3 + -17 = -20 (101100) +-3 + -16 = -19 (101101) +-3 + -15 = -18 (101110) +-3 + -14 = -17 (101111) +-3 + -13 = -16 (110000) +-3 + -12 = -15 (110001) +-3 + -11 = -14 (110010) +-3 + -10 = -13 (110011) +-3 + -9 = -12 (110100) +-3 + -8 = -11 (110101) +-3 + -7 = -10 (110110) +-3 + -6 = -9 (110111) +-3 + -5 = -8 (111000) +-3 + -4 = -7 (111001) +-3 + -3 = -6 (111010) +-3 + -2 = -5 (111011) +-3 + -1 = -4 (111100) +-2 + 0 = -2 (111110) +-2 + 1 = -1 (111111) +-2 + 2 = 0 (000000) +-2 + 3 = 1 (000001) +-2 + 4 = 2 (000010) +-2 + 5 = 3 (000011) +-2 + 6 = 4 (000100) +-2 + 7 = 5 (000101) +-2 + 8 = 6 (000110) +-2 + 9 = 7 (000111) +-2 + 10 = 8 (001000) +-2 + 11 = 9 (001001) +-2 + 12 = 10 (001010) +-2 + 13 = 11 (001011) +-2 + 14 = 12 (001100) +-2 + 15 = 13 (001101) +-2 + 16 = 14 (001110) +-2 + 17 = 15 (001111) +-2 + 18 = 16 (010000) +-2 + 19 = 17 (010001) +-2 + 20 = 18 (010010) +-2 + 21 = 19 (010011) +-2 + 22 = 20 (010100) +-2 + 23 = 21 (010101) +-2 + 24 = 22 (010110) +-2 + 25 = 23 (010111) +-2 + 26 = 24 (011000) +-2 + 27 = 25 (011001) +-2 + 28 = 26 (011010) +-2 + 29 = 27 (011011) +-2 + 30 = 28 (011100) +-2 + 31 = 29 (011101) +-2 + -32 = 30 (011110) +-2 + -31 = 31 (011111) +-2 + -30 = -32 (100000) +-2 + -29 = -31 (100001) +-2 + -28 = -30 (100010) +-2 + -27 = -29 (100011) +-2 + -26 = -28 (100100) +-2 + -25 = -27 (100101) +-2 + -24 = -26 (100110) +-2 + -23 = -25 (100111) +-2 + -22 = -24 (101000) +-2 + -21 = -23 (101001) +-2 + -20 = -22 (101010) +-2 + -19 = -21 (101011) +-2 + -18 = -20 (101100) +-2 + -17 = -19 (101101) +-2 + -16 = -18 (101110) +-2 + -15 = -17 (101111) +-2 + -14 = -16 (110000) +-2 + -13 = -15 (110001) +-2 + -12 = -14 (110010) +-2 + -11 = -13 (110011) +-2 + -10 = -12 (110100) +-2 + -9 = -11 (110101) +-2 + -8 = -10 (110110) +-2 + -7 = -9 (110111) +-2 + -6 = -8 (111000) +-2 + -5 = -7 (111001) +-2 + -4 = -6 (111010) +-2 + -3 = -5 (111011) +-2 + -2 = -4 (111100) +-2 + -1 = -3 (111101) +-1 + 0 = -1 (111111) +-1 + 1 = 0 (000000) +-1 + 2 = 1 (000001) +-1 + 3 = 2 (000010) +-1 + 4 = 3 (000011) +-1 + 5 = 4 (000100) +-1 + 6 = 5 (000101) +-1 + 7 = 6 (000110) +-1 + 8 = 7 (000111) +-1 + 9 = 8 (001000) +-1 + 10 = 9 (001001) +-1 + 11 = 10 (001010) +-1 + 12 = 11 (001011) +-1 + 13 = 12 (001100) +-1 + 14 = 13 (001101) +-1 + 15 = 14 (001110) +-1 + 16 = 15 (001111) +-1 + 17 = 16 (010000) +-1 + 18 = 17 (010001) +-1 + 19 = 18 (010010) +-1 + 20 = 19 (010011) +-1 + 21 = 20 (010100) +-1 + 22 = 21 (010101) +-1 + 23 = 22 (010110) +-1 + 24 = 23 (010111) +-1 + 25 = 24 (011000) +-1 + 26 = 25 (011001) +-1 + 27 = 26 (011010) +-1 + 28 = 27 (011011) +-1 + 29 = 28 (011100) +-1 + 30 = 29 (011101) +-1 + 31 = 30 (011110) +-1 + -32 = 31 (011111) +-1 + -31 = -32 (100000) +-1 + -30 = -31 (100001) +-1 + -29 = -30 (100010) +-1 + -28 = -29 (100011) +-1 + -27 = -28 (100100) +-1 + -26 = -27 (100101) +-1 + -25 = -26 (100110) +-1 + -24 = -25 (100111) +-1 + -23 = -24 (101000) +-1 + -22 = -23 (101001) +-1 + -21 = -22 (101010) +-1 + -20 = -21 (101011) +-1 + -19 = -20 (101100) +-1 + -18 = -19 (101101) +-1 + -17 = -18 (101110) +-1 + -16 = -17 (101111) +-1 + -15 = -16 (110000) +-1 + -14 = -15 (110001) +-1 + -13 = -14 (110010) +-1 + -12 = -13 (110011) +-1 + -11 = -12 (110100) +-1 + -10 = -11 (110101) +-1 + -9 = -10 (110110) +-1 + -8 = -9 (110111) +-1 + -7 = -8 (111000) +-1 + -6 = -7 (111001) +-1 + -5 = -6 (111010) +-1 + -4 = -5 (111011) +-1 + -3 = -4 (111100) +-1 + -2 = -3 (111101) +-1 + -1 = -2 (111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/lost_carry.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/lost_carry.f new file mode 100644 index 000000000..e5ebe3a3b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/lost_carry.f @@ -0,0 +1,3 @@ +lost_carry/datawidth.cpp +lost_carry/stimgen.cpp +lost_carry/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/main.cpp new file mode 100644 index 000000000..3191d0641 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 6-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 6; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector in1 ("in1"); + signal_bool_vector in2 ("in2"); + signal_bool_vector result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/stimgen.h new file mode 100644 index 000000000..0a0e9900d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/lost_carry/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& result; + // Outputs + signal_bool_vector& in1; + signal_bool_vector& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& RESULT, + signal_bool_vector& IN1, + signal_bool_vector& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/common.h new file mode 100644 index 000000000..55e8fa28e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/common.h @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; +typedef sc_bv<7> bool_vector7; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; +typedef sc_signal signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/datawidth.cpp new file mode 100644 index 000000000..541d86238 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector4 tmp_a; + bool_vector6 tmp_b; + bool_vector7 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_int() + tmp_b.to_int(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/datawidth.h new file mode 100644 index 000000000..618250503 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector7& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector7& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/golden/promote.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/golden/promote.log new file mode 100644 index 000000000..293408127 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/golden/promote.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + -32 = -32 (1100000) +0 + -31 = -31 (1100001) +0 + -30 = -30 (1100010) +0 + -29 = -29 (1100011) +0 + -28 = -28 (1100100) +0 + -27 = -27 (1100101) +0 + -26 = -26 (1100110) +0 + -25 = -25 (1100111) +0 + -24 = -24 (1101000) +0 + -23 = -23 (1101001) +0 + -22 = -22 (1101010) +0 + -21 = -21 (1101011) +0 + -20 = -20 (1101100) +0 + -19 = -19 (1101101) +0 + -18 = -18 (1101110) +0 + -17 = -17 (1101111) +0 + -16 = -16 (1110000) +0 + -15 = -15 (1110001) +0 + -14 = -14 (1110010) +0 + -13 = -13 (1110011) +0 + -12 = -12 (1110100) +0 + -11 = -11 (1110101) +0 + -10 = -10 (1110110) +0 + -9 = -9 (1110111) +0 + -8 = -8 (1111000) +0 + -7 = -7 (1111001) +0 + -6 = -6 (1111010) +0 + -5 = -5 (1111011) +0 + -4 = -4 (1111100) +0 + -3 = -3 (1111101) +0 + -2 = -2 (1111110) +0 + -1 = -1 (1111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + -32 = -31 (1100001) +1 + -31 = -30 (1100010) +1 + -30 = -29 (1100011) +1 + -29 = -28 (1100100) +1 + -28 = -27 (1100101) +1 + -27 = -26 (1100110) +1 + -26 = -25 (1100111) +1 + -25 = -24 (1101000) +1 + -24 = -23 (1101001) +1 + -23 = -22 (1101010) +1 + -22 = -21 (1101011) +1 + -21 = -20 (1101100) +1 + -20 = -19 (1101101) +1 + -19 = -18 (1101110) +1 + -18 = -17 (1101111) +1 + -17 = -16 (1110000) +1 + -16 = -15 (1110001) +1 + -15 = -14 (1110010) +1 + -14 = -13 (1110011) +1 + -13 = -12 (1110100) +1 + -12 = -11 (1110101) +1 + -11 = -10 (1110110) +1 + -10 = -9 (1110111) +1 + -9 = -8 (1111000) +1 + -8 = -7 (1111001) +1 + -7 = -6 (1111010) +1 + -6 = -5 (1111011) +1 + -5 = -4 (1111100) +1 + -4 = -3 (1111101) +1 + -3 = -2 (1111110) +1 + -2 = -1 (1111111) +1 + -1 = 0 (0000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + -32 = -30 (1100010) +2 + -31 = -29 (1100011) +2 + -30 = -28 (1100100) +2 + -29 = -27 (1100101) +2 + -28 = -26 (1100110) +2 + -27 = -25 (1100111) +2 + -26 = -24 (1101000) +2 + -25 = -23 (1101001) +2 + -24 = -22 (1101010) +2 + -23 = -21 (1101011) +2 + -22 = -20 (1101100) +2 + -21 = -19 (1101101) +2 + -20 = -18 (1101110) +2 + -19 = -17 (1101111) +2 + -18 = -16 (1110000) +2 + -17 = -15 (1110001) +2 + -16 = -14 (1110010) +2 + -15 = -13 (1110011) +2 + -14 = -12 (1110100) +2 + -13 = -11 (1110101) +2 + -12 = -10 (1110110) +2 + -11 = -9 (1110111) +2 + -10 = -8 (1111000) +2 + -9 = -7 (1111001) +2 + -8 = -6 (1111010) +2 + -7 = -5 (1111011) +2 + -6 = -4 (1111100) +2 + -5 = -3 (1111101) +2 + -4 = -2 (1111110) +2 + -3 = -1 (1111111) +2 + -2 = 0 (0000000) +2 + -1 = 1 (0000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + -32 = -29 (1100011) +3 + -31 = -28 (1100100) +3 + -30 = -27 (1100101) +3 + -29 = -26 (1100110) +3 + -28 = -25 (1100111) +3 + -27 = -24 (1101000) +3 + -26 = -23 (1101001) +3 + -25 = -22 (1101010) +3 + -24 = -21 (1101011) +3 + -23 = -20 (1101100) +3 + -22 = -19 (1101101) +3 + -21 = -18 (1101110) +3 + -20 = -17 (1101111) +3 + -19 = -16 (1110000) +3 + -18 = -15 (1110001) +3 + -17 = -14 (1110010) +3 + -16 = -13 (1110011) +3 + -15 = -12 (1110100) +3 + -14 = -11 (1110101) +3 + -13 = -10 (1110110) +3 + -12 = -9 (1110111) +3 + -11 = -8 (1111000) +3 + -10 = -7 (1111001) +3 + -9 = -6 (1111010) +3 + -8 = -5 (1111011) +3 + -7 = -4 (1111100) +3 + -6 = -3 (1111101) +3 + -5 = -2 (1111110) +3 + -4 = -1 (1111111) +3 + -3 = 0 (0000000) +3 + -2 = 1 (0000001) +3 + -1 = 2 (0000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + -32 = -28 (1100100) +4 + -31 = -27 (1100101) +4 + -30 = -26 (1100110) +4 + -29 = -25 (1100111) +4 + -28 = -24 (1101000) +4 + -27 = -23 (1101001) +4 + -26 = -22 (1101010) +4 + -25 = -21 (1101011) +4 + -24 = -20 (1101100) +4 + -23 = -19 (1101101) +4 + -22 = -18 (1101110) +4 + -21 = -17 (1101111) +4 + -20 = -16 (1110000) +4 + -19 = -15 (1110001) +4 + -18 = -14 (1110010) +4 + -17 = -13 (1110011) +4 + -16 = -12 (1110100) +4 + -15 = -11 (1110101) +4 + -14 = -10 (1110110) +4 + -13 = -9 (1110111) +4 + -12 = -8 (1111000) +4 + -11 = -7 (1111001) +4 + -10 = -6 (1111010) +4 + -9 = -5 (1111011) +4 + -8 = -4 (1111100) +4 + -7 = -3 (1111101) +4 + -6 = -2 (1111110) +4 + -5 = -1 (1111111) +4 + -4 = 0 (0000000) +4 + -3 = 1 (0000001) +4 + -2 = 2 (0000010) +4 + -1 = 3 (0000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + -32 = -27 (1100101) +5 + -31 = -26 (1100110) +5 + -30 = -25 (1100111) +5 + -29 = -24 (1101000) +5 + -28 = -23 (1101001) +5 + -27 = -22 (1101010) +5 + -26 = -21 (1101011) +5 + -25 = -20 (1101100) +5 + -24 = -19 (1101101) +5 + -23 = -18 (1101110) +5 + -22 = -17 (1101111) +5 + -21 = -16 (1110000) +5 + -20 = -15 (1110001) +5 + -19 = -14 (1110010) +5 + -18 = -13 (1110011) +5 + -17 = -12 (1110100) +5 + -16 = -11 (1110101) +5 + -15 = -10 (1110110) +5 + -14 = -9 (1110111) +5 + -13 = -8 (1111000) +5 + -12 = -7 (1111001) +5 + -11 = -6 (1111010) +5 + -10 = -5 (1111011) +5 + -9 = -4 (1111100) +5 + -8 = -3 (1111101) +5 + -7 = -2 (1111110) +5 + -6 = -1 (1111111) +5 + -5 = 0 (0000000) +5 + -4 = 1 (0000001) +5 + -3 = 2 (0000010) +5 + -2 = 3 (0000011) +5 + -1 = 4 (0000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + -32 = -26 (1100110) +6 + -31 = -25 (1100111) +6 + -30 = -24 (1101000) +6 + -29 = -23 (1101001) +6 + -28 = -22 (1101010) +6 + -27 = -21 (1101011) +6 + -26 = -20 (1101100) +6 + -25 = -19 (1101101) +6 + -24 = -18 (1101110) +6 + -23 = -17 (1101111) +6 + -22 = -16 (1110000) +6 + -21 = -15 (1110001) +6 + -20 = -14 (1110010) +6 + -19 = -13 (1110011) +6 + -18 = -12 (1110100) +6 + -17 = -11 (1110101) +6 + -16 = -10 (1110110) +6 + -15 = -9 (1110111) +6 + -14 = -8 (1111000) +6 + -13 = -7 (1111001) +6 + -12 = -6 (1111010) +6 + -11 = -5 (1111011) +6 + -10 = -4 (1111100) +6 + -9 = -3 (1111101) +6 + -8 = -2 (1111110) +6 + -7 = -1 (1111111) +6 + -6 = 0 (0000000) +6 + -5 = 1 (0000001) +6 + -4 = 2 (0000010) +6 + -3 = 3 (0000011) +6 + -2 = 4 (0000100) +6 + -1 = 5 (0000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + -32 = -25 (1100111) +7 + -31 = -24 (1101000) +7 + -30 = -23 (1101001) +7 + -29 = -22 (1101010) +7 + -28 = -21 (1101011) +7 + -27 = -20 (1101100) +7 + -26 = -19 (1101101) +7 + -25 = -18 (1101110) +7 + -24 = -17 (1101111) +7 + -23 = -16 (1110000) +7 + -22 = -15 (1110001) +7 + -21 = -14 (1110010) +7 + -20 = -13 (1110011) +7 + -19 = -12 (1110100) +7 + -18 = -11 (1110101) +7 + -17 = -10 (1110110) +7 + -16 = -9 (1110111) +7 + -15 = -8 (1111000) +7 + -14 = -7 (1111001) +7 + -13 = -6 (1111010) +7 + -12 = -5 (1111011) +7 + -11 = -4 (1111100) +7 + -10 = -3 (1111101) +7 + -9 = -2 (1111110) +7 + -8 = -1 (1111111) +7 + -7 = 0 (0000000) +7 + -6 = 1 (0000001) +7 + -5 = 2 (0000010) +7 + -4 = 3 (0000011) +7 + -3 = 4 (0000100) +7 + -2 = 5 (0000101) +7 + -1 = 6 (0000110) +-8 + 0 = -8 (1111000) +-8 + 1 = -7 (1111001) +-8 + 2 = -6 (1111010) +-8 + 3 = -5 (1111011) +-8 + 4 = -4 (1111100) +-8 + 5 = -3 (1111101) +-8 + 6 = -2 (1111110) +-8 + 7 = -1 (1111111) +-8 + 8 = 0 (0000000) +-8 + 9 = 1 (0000001) +-8 + 10 = 2 (0000010) +-8 + 11 = 3 (0000011) +-8 + 12 = 4 (0000100) +-8 + 13 = 5 (0000101) +-8 + 14 = 6 (0000110) +-8 + 15 = 7 (0000111) +-8 + 16 = 8 (0001000) +-8 + 17 = 9 (0001001) +-8 + 18 = 10 (0001010) +-8 + 19 = 11 (0001011) +-8 + 20 = 12 (0001100) +-8 + 21 = 13 (0001101) +-8 + 22 = 14 (0001110) +-8 + 23 = 15 (0001111) +-8 + 24 = 16 (0010000) +-8 + 25 = 17 (0010001) +-8 + 26 = 18 (0010010) +-8 + 27 = 19 (0010011) +-8 + 28 = 20 (0010100) +-8 + 29 = 21 (0010101) +-8 + 30 = 22 (0010110) +-8 + 31 = 23 (0010111) +-8 + -32 = -40 (1011000) +-8 + -31 = -39 (1011001) +-8 + -30 = -38 (1011010) +-8 + -29 = -37 (1011011) +-8 + -28 = -36 (1011100) +-8 + -27 = -35 (1011101) +-8 + -26 = -34 (1011110) +-8 + -25 = -33 (1011111) +-8 + -24 = -32 (1100000) +-8 + -23 = -31 (1100001) +-8 + -22 = -30 (1100010) +-8 + -21 = -29 (1100011) +-8 + -20 = -28 (1100100) +-8 + -19 = -27 (1100101) +-8 + -18 = -26 (1100110) +-8 + -17 = -25 (1100111) +-8 + -16 = -24 (1101000) +-8 + -15 = -23 (1101001) +-8 + -14 = -22 (1101010) +-8 + -13 = -21 (1101011) +-8 + -12 = -20 (1101100) +-8 + -11 = -19 (1101101) +-8 + -10 = -18 (1101110) +-8 + -9 = -17 (1101111) +-8 + -8 = -16 (1110000) +-8 + -7 = -15 (1110001) +-8 + -6 = -14 (1110010) +-8 + -5 = -13 (1110011) +-8 + -4 = -12 (1110100) +-8 + -3 = -11 (1110101) +-8 + -2 = -10 (1110110) +-8 + -1 = -9 (1110111) +-7 + 0 = -7 (1111001) +-7 + 1 = -6 (1111010) +-7 + 2 = -5 (1111011) +-7 + 3 = -4 (1111100) +-7 + 4 = -3 (1111101) +-7 + 5 = -2 (1111110) +-7 + 6 = -1 (1111111) +-7 + 7 = 0 (0000000) +-7 + 8 = 1 (0000001) +-7 + 9 = 2 (0000010) +-7 + 10 = 3 (0000011) +-7 + 11 = 4 (0000100) +-7 + 12 = 5 (0000101) +-7 + 13 = 6 (0000110) +-7 + 14 = 7 (0000111) +-7 + 15 = 8 (0001000) +-7 + 16 = 9 (0001001) +-7 + 17 = 10 (0001010) +-7 + 18 = 11 (0001011) +-7 + 19 = 12 (0001100) +-7 + 20 = 13 (0001101) +-7 + 21 = 14 (0001110) +-7 + 22 = 15 (0001111) +-7 + 23 = 16 (0010000) +-7 + 24 = 17 (0010001) +-7 + 25 = 18 (0010010) +-7 + 26 = 19 (0010011) +-7 + 27 = 20 (0010100) +-7 + 28 = 21 (0010101) +-7 + 29 = 22 (0010110) +-7 + 30 = 23 (0010111) +-7 + 31 = 24 (0011000) +-7 + -32 = -39 (1011001) +-7 + -31 = -38 (1011010) +-7 + -30 = -37 (1011011) +-7 + -29 = -36 (1011100) +-7 + -28 = -35 (1011101) +-7 + -27 = -34 (1011110) +-7 + -26 = -33 (1011111) +-7 + -25 = -32 (1100000) +-7 + -24 = -31 (1100001) +-7 + -23 = -30 (1100010) +-7 + -22 = -29 (1100011) +-7 + -21 = -28 (1100100) +-7 + -20 = -27 (1100101) +-7 + -19 = -26 (1100110) +-7 + -18 = -25 (1100111) +-7 + -17 = -24 (1101000) +-7 + -16 = -23 (1101001) +-7 + -15 = -22 (1101010) +-7 + -14 = -21 (1101011) +-7 + -13 = -20 (1101100) +-7 + -12 = -19 (1101101) +-7 + -11 = -18 (1101110) +-7 + -10 = -17 (1101111) +-7 + -9 = -16 (1110000) +-7 + -8 = -15 (1110001) +-7 + -7 = -14 (1110010) +-7 + -6 = -13 (1110011) +-7 + -5 = -12 (1110100) +-7 + -4 = -11 (1110101) +-7 + -3 = -10 (1110110) +-7 + -2 = -9 (1110111) +-7 + -1 = -8 (1111000) +-6 + 0 = -6 (1111010) +-6 + 1 = -5 (1111011) +-6 + 2 = -4 (1111100) +-6 + 3 = -3 (1111101) +-6 + 4 = -2 (1111110) +-6 + 5 = -1 (1111111) +-6 + 6 = 0 (0000000) +-6 + 7 = 1 (0000001) +-6 + 8 = 2 (0000010) +-6 + 9 = 3 (0000011) +-6 + 10 = 4 (0000100) +-6 + 11 = 5 (0000101) +-6 + 12 = 6 (0000110) +-6 + 13 = 7 (0000111) +-6 + 14 = 8 (0001000) +-6 + 15 = 9 (0001001) +-6 + 16 = 10 (0001010) +-6 + 17 = 11 (0001011) +-6 + 18 = 12 (0001100) +-6 + 19 = 13 (0001101) +-6 + 20 = 14 (0001110) +-6 + 21 = 15 (0001111) +-6 + 22 = 16 (0010000) +-6 + 23 = 17 (0010001) +-6 + 24 = 18 (0010010) +-6 + 25 = 19 (0010011) +-6 + 26 = 20 (0010100) +-6 + 27 = 21 (0010101) +-6 + 28 = 22 (0010110) +-6 + 29 = 23 (0010111) +-6 + 30 = 24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + -16 = -22 (1101010) +-6 + -15 = -21 (1101011) +-6 + -14 = -20 (1101100) +-6 + -13 = -19 (1101101) +-6 + -12 = -18 (1101110) +-6 + -11 = -17 (1101111) +-6 + -10 = -16 (1110000) +-6 + -9 = -15 (1110001) +-6 + -8 = -14 (1110010) +-6 + -7 = -13 (1110011) +-6 + -6 = -12 (1110100) +-6 + -5 = -11 (1110101) +-6 + -4 = -10 (1110110) +-6 + -3 = -9 (1110111) +-6 + -2 = -8 (1111000) +-6 + -1 = -7 (1111001) +-5 + 0 = -5 (1111011) +-5 + 1 = -4 (1111100) +-5 + 2 = -3 (1111101) +-5 + 3 = -2 (1111110) +-5 + 4 = -1 (1111111) +-5 + 5 = 0 (0000000) +-5 + 6 = 1 (0000001) +-5 + 7 = 2 (0000010) +-5 + 8 = 3 (0000011) +-5 + 9 = 4 (0000100) +-5 + 10 = 5 (0000101) +-5 + 11 = 6 (0000110) +-5 + 12 = 7 (0000111) +-5 + 13 = 8 (0001000) +-5 + 14 = 9 (0001001) +-5 + 15 = 10 (0001010) +-5 + 16 = 11 (0001011) +-5 + 17 = 12 (0001100) +-5 + 18 = 13 (0001101) +-5 + 19 = 14 (0001110) +-5 + 20 = 15 (0001111) +-5 + 21 = 16 (0010000) +-5 + 22 = 17 (0010001) +-5 + 23 = 18 (0010010) +-5 + 24 = 19 (0010011) +-5 + 25 = 20 (0010100) +-5 + 26 = 21 (0010101) +-5 + 27 = 22 (0010110) +-5 + 28 = 23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 + 1 = -3 (1111101) +-4 + 2 = -2 (1111110) +-4 + 3 = -1 (1111111) +-4 + 4 = 0 (0000000) +-4 + 5 = 1 (0000001) +-4 + 6 = 2 (0000010) +-4 + 7 = 3 (0000011) +-4 + 8 = 4 (0000100) +-4 + 9 = 5 (0000101) +-4 + 10 = 6 (0000110) +-4 + 11 = 7 (0000111) +-4 + 12 = 8 (0001000) +-4 + 13 = 9 (0001001) +-4 + 14 = 10 (0001010) +-4 + 15 = 11 (0001011) +-4 + 16 = 12 (0001100) +-4 + 17 = 13 (0001101) +-4 + 18 = 14 (0001110) +-4 + 19 = 15 (0001111) +-4 + 20 = 16 (0010000) +-4 + 21 = 17 (0010001) +-4 + 22 = 18 (0010010) +-4 + 23 = 19 (0010011) +-4 + 24 = 20 (0010100) +-4 + 25 = 21 (0010101) +-4 + 26 = 22 (0010110) +-4 + 27 = 23 (0010111) +-4 + 28 = 24 (0011000) +-4 + 29 = 25 (0011001) +-4 + 30 = 26 (0011010) +-4 + 31 = 27 (0011011) +-4 + -32 = -36 (1011100) +-4 + -31 = -35 (1011101) +-4 + -30 = -34 (1011110) +-4 + -29 = -33 (1011111) +-4 + -28 = -32 (1100000) +-4 + -27 = -31 (1100001) +-4 + -26 = -30 (1100010) +-4 + -25 = -29 (1100011) +-4 + -24 = -28 (1100100) +-4 + -23 = -27 (1100101) +-4 + -22 = -26 (1100110) +-4 + -21 = -25 (1100111) +-4 + -20 = -24 (1101000) +-4 + -19 = -23 (1101001) +-4 + -18 = -22 (1101010) +-4 + -17 = -21 (1101011) +-4 + -16 = -20 (1101100) +-4 + -15 = -19 (1101101) +-4 + -14 = -18 (1101110) +-4 + -13 = -17 (1101111) +-4 + -12 = -16 (1110000) +-4 + -11 = -15 (1110001) +-4 + -10 = -14 (1110010) +-4 + -9 = -13 (1110011) +-4 + -8 = -12 (1110100) +-4 + -7 = -11 (1110101) +-4 + -6 = -10 (1110110) +-4 + -5 = -9 (1110111) +-4 + -4 = -8 (1111000) +-4 + -3 = -7 (1111001) +-4 + -2 = -6 (1111010) +-4 + -1 = -5 (1111011) +-3 + 0 = -3 (1111101) +-3 + 1 = -2 (1111110) +-3 + 2 = -1 (1111111) +-3 + 3 = 0 (0000000) +-3 + 4 = 1 (0000001) +-3 + 5 = 2 (0000010) +-3 + 6 = 3 (0000011) +-3 + 7 = 4 (0000100) +-3 + 8 = 5 (0000101) +-3 + 9 = 6 (0000110) +-3 + 10 = 7 (0000111) +-3 + 11 = 8 (0001000) +-3 + 12 = 9 (0001001) +-3 + 13 = 10 (0001010) +-3 + 14 = 11 (0001011) +-3 + 15 = 12 (0001100) +-3 + 16 = 13 (0001101) +-3 + 17 = 14 (0001110) +-3 + 18 = 15 (0001111) +-3 + 19 = 16 (0010000) +-3 + 20 = 17 (0010001) +-3 + 21 = 18 (0010010) +-3 + 22 = 19 (0010011) +-3 + 23 = 20 (0010100) +-3 + 24 = 21 (0010101) +-3 + 25 = 22 (0010110) +-3 + 26 = 23 (0010111) +-3 + 27 = 24 (0011000) +-3 + 28 = 25 (0011001) +-3 + 29 = 26 (0011010) +-3 + 30 = 27 (0011011) +-3 + 31 = 28 (0011100) +-3 + -32 = -35 (1011101) +-3 + -31 = -34 (1011110) +-3 + -30 = -33 (1011111) +-3 + -29 = -32 (1100000) +-3 + -28 = -31 (1100001) +-3 + -27 = -30 (1100010) +-3 + -26 = -29 (1100011) +-3 + -25 = -28 (1100100) +-3 + -24 = -27 (1100101) +-3 + -23 = -26 (1100110) +-3 + -22 = -25 (1100111) +-3 + -21 = -24 (1101000) +-3 + -20 = -23 (1101001) +-3 + -19 = -22 (1101010) +-3 + -18 = -21 (1101011) +-3 + -17 = -20 (1101100) +-3 + -16 = -19 (1101101) +-3 + -15 = -18 (1101110) +-3 + -14 = -17 (1101111) +-3 + -13 = -16 (1110000) +-3 + -12 = -15 (1110001) +-3 + -11 = -14 (1110010) +-3 + -10 = -13 (1110011) +-3 + -9 = -12 (1110100) +-3 + -8 = -11 (1110101) +-3 + -7 = -10 (1110110) +-3 + -6 = -9 (1110111) +-3 + -5 = -8 (1111000) +-3 + -4 = -7 (1111001) +-3 + -3 = -6 (1111010) +-3 + -2 = -5 (1111011) +-3 + -1 = -4 (1111100) +-2 + 0 = -2 (1111110) +-2 + 1 = -1 (1111111) +-2 + 2 = 0 (0000000) +-2 + 3 = 1 (0000001) +-2 + 4 = 2 (0000010) +-2 + 5 = 3 (0000011) +-2 + 6 = 4 (0000100) +-2 + 7 = 5 (0000101) +-2 + 8 = 6 (0000110) +-2 + 9 = 7 (0000111) +-2 + 10 = 8 (0001000) +-2 + 11 = 9 (0001001) +-2 + 12 = 10 (0001010) +-2 + 13 = 11 (0001011) +-2 + 14 = 12 (0001100) +-2 + 15 = 13 (0001101) +-2 + 16 = 14 (0001110) +-2 + 17 = 15 (0001111) +-2 + 18 = 16 (0010000) +-2 + 19 = 17 (0010001) +-2 + 20 = 18 (0010010) +-2 + 21 = 19 (0010011) +-2 + 22 = 20 (0010100) +-2 + 23 = 21 (0010101) +-2 + 24 = 22 (0010110) +-2 + 25 = 23 (0010111) +-2 + 26 = 24 (0011000) +-2 + 27 = 25 (0011001) +-2 + 28 = 26 (0011010) +-2 + 29 = 27 (0011011) +-2 + 30 = 28 (0011100) +-2 + 31 = 29 (0011101) +-2 + -32 = -34 (1011110) +-2 + -31 = -33 (1011111) +-2 + -30 = -32 (1100000) +-2 + -29 = -31 (1100001) +-2 + -28 = -30 (1100010) +-2 + -27 = -29 (1100011) +-2 + -26 = -28 (1100100) +-2 + -25 = -27 (1100101) +-2 + -24 = -26 (1100110) +-2 + -23 = -25 (1100111) +-2 + -22 = -24 (1101000) +-2 + -21 = -23 (1101001) +-2 + -20 = -22 (1101010) +-2 + -19 = -21 (1101011) +-2 + -18 = -20 (1101100) +-2 + -17 = -19 (1101101) +-2 + -16 = -18 (1101110) +-2 + -15 = -17 (1101111) +-2 + -14 = -16 (1110000) +-2 + -13 = -15 (1110001) +-2 + -12 = -14 (1110010) +-2 + -11 = -13 (1110011) +-2 + -10 = -12 (1110100) +-2 + -9 = -11 (1110101) +-2 + -8 = -10 (1110110) +-2 + -7 = -9 (1110111) +-2 + -6 = -8 (1111000) +-2 + -5 = -7 (1111001) +-2 + -4 = -6 (1111010) +-2 + -3 = -5 (1111011) +-2 + -2 = -4 (1111100) +-2 + -1 = -3 (1111101) +-1 + 0 = -1 (1111111) +-1 + 1 = 0 (0000000) +-1 + 2 = 1 (0000001) +-1 + 3 = 2 (0000010) +-1 + 4 = 3 (0000011) +-1 + 5 = 4 (0000100) +-1 + 6 = 5 (0000101) +-1 + 7 = 6 (0000110) +-1 + 8 = 7 (0000111) +-1 + 9 = 8 (0001000) +-1 + 10 = 9 (0001001) +-1 + 11 = 10 (0001010) +-1 + 12 = 11 (0001011) +-1 + 13 = 12 (0001100) +-1 + 14 = 13 (0001101) +-1 + 15 = 14 (0001110) +-1 + 16 = 15 (0001111) +-1 + 17 = 16 (0010000) +-1 + 18 = 17 (0010001) +-1 + 19 = 18 (0010010) +-1 + 20 = 19 (0010011) +-1 + 21 = 20 (0010100) +-1 + 22 = 21 (0010101) +-1 + 23 = 22 (0010110) +-1 + 24 = 23 (0010111) +-1 + 25 = 24 (0011000) +-1 + 26 = 25 (0011001) +-1 + 27 = 26 (0011010) +-1 + 28 = 27 (0011011) +-1 + 29 = 28 (0011100) +-1 + 30 = 29 (0011101) +-1 + 31 = 30 (0011110) +-1 + -32 = -33 (1011111) +-1 + -31 = -32 (1100000) +-1 + -30 = -31 (1100001) +-1 + -29 = -30 (1100010) +-1 + -28 = -29 (1100011) +-1 + -27 = -28 (1100100) +-1 + -26 = -27 (1100101) +-1 + -25 = -26 (1100110) +-1 + -24 = -25 (1100111) +-1 + -23 = -24 (1101000) +-1 + -22 = -23 (1101001) +-1 + -21 = -22 (1101010) +-1 + -20 = -21 (1101011) +-1 + -19 = -20 (1101100) +-1 + -18 = -19 (1101101) +-1 + -17 = -18 (1101110) +-1 + -16 = -17 (1101111) +-1 + -15 = -16 (1110000) +-1 + -14 = -15 (1110001) +-1 + -13 = -14 (1110010) +-1 + -12 = -13 (1110011) +-1 + -11 = -12 (1110100) +-1 + -10 = -11 (1110101) +-1 + -9 = -10 (1110110) +-1 + -8 = -9 (1110111) +-1 + -7 = -8 (1111000) +-1 + -6 = -7 (1111001) +-1 + -5 = -6 (1111010) +-1 + -4 = -5 (1111011) +-1 + -3 = -4 (1111100) +-1 + -2 = -3 (1111101) +-1 + -1 = -2 (1111110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) 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= 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + -32 = -28 (1100100) +4 + -31 = -27 (1100101) +4 + -30 = -26 (1100110) +4 + -29 = -25 (1100111) +4 + -28 = -24 (1101000) +4 + -27 = -23 (1101001) +4 + -26 = -22 (1101010) +4 + -25 = -21 (1101011) +4 + -24 = -20 (1101100) +4 + -23 = -19 (1101101) +4 + -22 = -18 (1101110) +4 + -21 = -17 (1101111) +4 + -20 = -16 (1110000) +4 + -19 = -15 (1110001) +4 + -18 = -14 (1110010) +4 + -17 = -13 (1110011) +4 + -16 = -12 (1110100) +4 + -15 = -11 (1110101) +4 + -14 = -10 (1110110) +4 + -13 = -9 (1110111) +4 + -12 = -8 (1111000) +4 + -11 = -7 (1111001) +4 + -10 = -6 (1111010) +4 + -9 = -5 (1111011) +4 + -8 = -4 (1111100) +4 + -7 = -3 (1111101) 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(0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + -32 = -26 (1100110) +6 + -31 = -25 (1100111) +6 + -30 = -24 (1101000) +6 + -29 = -23 (1101001) +6 + -28 = -22 (1101010) +6 + -27 = -21 (1101011) +6 + -26 = -20 (1101100) +6 + -25 = -19 (1101101) +6 + -24 = -18 (1101110) +6 + -23 = -17 (1101111) +6 + -22 = -16 (1110000) +6 + -21 = -15 (1110001) +6 + -20 = -14 (1110010) +6 + -19 = -13 (1110011) +6 + -18 = -12 (1110100) +6 + -17 = -11 (1110101) +6 + -16 = -10 (1110110) +6 + -15 = -9 (1110111) +6 + -14 = -8 (1111000) +6 + -13 = -7 (1111001) +6 + -12 = -6 (1111010) +6 + -11 = -5 (1111011) +6 + -10 = -4 (1111100) +6 + -9 = -3 (1111101) +6 + -8 = -2 (1111110) +6 + -7 = -1 (1111111) +6 + -6 = 0 (0000000) +6 + -5 = 1 (0000001) +6 + -4 = 2 (0000010) +6 + -3 = 3 (0000011) +6 + -2 = 4 (0000100) +6 + -1 = 5 (0000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + -32 = -25 (1100111) +7 + -31 = -24 (1101000) +7 + -30 = -23 (1101001) +7 + -29 = -22 (1101010) +7 + -28 = -21 (1101011) +7 + -27 = -20 (1101100) +7 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(0001000) +-8 + 17 = 9 (0001001) +-8 + 18 = 10 (0001010) +-8 + 19 = 11 (0001011) +-8 + 20 = 12 (0001100) +-8 + 21 = 13 (0001101) +-8 + 22 = 14 (0001110) +-8 + 23 = 15 (0001111) +-8 + 24 = 16 (0010000) +-8 + 25 = 17 (0010001) +-8 + 26 = 18 (0010010) +-8 + 27 = 19 (0010011) +-8 + 28 = 20 (0010100) +-8 + 29 = 21 (0010101) +-8 + 30 = 22 (0010110) +-8 + 31 = 23 (0010111) +-8 + -32 = -40 (1011000) +-8 + -31 = -39 (1011001) +-8 + -30 = -38 (1011010) +-8 + -29 = -37 (1011011) +-8 + -28 = -36 (1011100) +-8 + -27 = -35 (1011101) +-8 + -26 = -34 (1011110) +-8 + -25 = -33 (1011111) +-8 + -24 = -32 (1100000) +-8 + -23 = -31 (1100001) +-8 + -22 = -30 (1100010) +-8 + -21 = -29 (1100011) +-8 + -20 = -28 (1100100) +-8 + -19 = -27 (1100101) +-8 + -18 = -26 (1100110) +-8 + -17 = -25 (1100111) +-8 + -16 = -24 (1101000) +-8 + -15 = -23 (1101001) +-8 + -14 = -22 (1101010) +-8 + -13 = -21 (1101011) +-8 + -12 = -20 (1101100) +-8 + -11 = -19 (1101101) +-8 + -10 = -18 (1101110) +-8 + -9 = -17 (1101111) +-8 + -8 = -16 (1110000) +-8 + -7 = -15 (1110001) +-8 + -6 = -14 (1110010) +-8 + -5 = -13 (1110011) +-8 + -4 = -12 (1110100) +-8 + -3 = -11 (1110101) +-8 + -2 = -10 (1110110) +-8 + -1 = -9 (1110111) +-7 + 0 = -7 (1111001) +-7 + 1 = -6 (1111010) +-7 + 2 = -5 (1111011) +-7 + 3 = -4 (1111100) +-7 + 4 = -3 (1111101) +-7 + 5 = -2 (1111110) +-7 + 6 = -1 (1111111) +-7 + 7 = 0 (0000000) +-7 + 8 = 1 (0000001) +-7 + 9 = 2 (0000010) +-7 + 10 = 3 (0000011) +-7 + 11 = 4 (0000100) +-7 + 12 = 5 (0000101) +-7 + 13 = 6 (0000110) +-7 + 14 = 7 (0000111) +-7 + 15 = 8 (0001000) +-7 + 16 = 9 (0001001) +-7 + 17 = 10 (0001010) +-7 + 18 = 11 (0001011) +-7 + 19 = 12 (0001100) +-7 + 20 = 13 (0001101) +-7 + 21 = 14 (0001110) +-7 + 22 = 15 (0001111) +-7 + 23 = 16 (0010000) +-7 + 24 = 17 (0010001) +-7 + 25 = 18 (0010010) +-7 + 26 = 19 (0010011) +-7 + 27 = 20 (0010100) +-7 + 28 = 21 (0010101) +-7 + 29 = 22 (0010110) +-7 + 30 = 23 (0010111) +-7 + 31 = 24 (0011000) +-7 + -32 = -39 (1011001) +-7 + -31 = -38 (1011010) +-7 + -30 = -37 (1011011) +-7 + -29 = -36 (1011100) +-7 + -28 = -35 (1011101) +-7 + -27 = -34 (1011110) +-7 + -26 = -33 (1011111) +-7 + -25 = -32 (1100000) +-7 + -24 = -31 (1100001) +-7 + -23 = -30 (1100010) +-7 + -22 = -29 (1100011) +-7 + -21 = -28 (1100100) +-7 + -20 = -27 (1100101) +-7 + -19 = -26 (1100110) +-7 + -18 = -25 (1100111) +-7 + -17 = -24 (1101000) +-7 + -16 = -23 (1101001) +-7 + -15 = -22 (1101010) +-7 + -14 = -21 (1101011) +-7 + -13 = -20 (1101100) +-7 + -12 = -19 (1101101) +-7 + -11 = -18 (1101110) +-7 + -10 = -17 (1101111) +-7 + -9 = -16 (1110000) +-7 + -8 = -15 (1110001) +-7 + -7 = -14 (1110010) +-7 + -6 = -13 (1110011) +-7 + -5 = -12 (1110100) +-7 + -4 = -11 (1110101) +-7 + -3 = -10 (1110110) +-7 + -2 = -9 (1110111) +-7 + -1 = -8 (1111000) +-6 + 0 = -6 (1111010) +-6 + 1 = -5 (1111011) +-6 + 2 = -4 (1111100) +-6 + 3 = -3 (1111101) +-6 + 4 = -2 (1111110) +-6 + 5 = -1 (1111111) +-6 + 6 = 0 (0000000) +-6 + 7 = 1 (0000001) +-6 + 8 = 2 (0000010) +-6 + 9 = 3 (0000011) +-6 + 10 = 4 (0000100) +-6 + 11 = 5 (0000101) +-6 + 12 = 6 (0000110) +-6 + 13 = 7 (0000111) +-6 + 14 = 8 (0001000) +-6 + 15 = 9 (0001001) +-6 + 16 = 10 (0001010) +-6 + 17 = 11 (0001011) +-6 + 18 = 12 (0001100) +-6 + 19 = 13 (0001101) +-6 + 20 = 14 (0001110) +-6 + 21 = 15 (0001111) +-6 + 22 = 16 (0010000) +-6 + 23 = 17 (0010001) +-6 + 24 = 18 (0010010) +-6 + 25 = 19 (0010011) +-6 + 26 = 20 (0010100) +-6 + 27 = 21 (0010101) +-6 + 28 = 22 (0010110) +-6 + 29 = 23 (0010111) +-6 + 30 = 24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + -16 = -22 (1101010) +-6 + -15 = -21 (1101011) +-6 + -14 = -20 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23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 + 1 = -3 (1111101) +-4 + 2 = -2 (1111110) +-4 + 3 = -1 (1111111) +-4 + 4 = 0 (0000000) +-4 + 5 = 1 (0000001) +-4 + 6 = 2 (0000010) +-4 + 7 = 3 (0000011) +-4 + 8 = 4 (0000100) +-4 + 9 = 5 (0000101) +-4 + 10 = 6 (0000110) +-4 + 11 = 7 (0000111) +-4 + 12 = 8 (0001000) +-4 + 13 = 9 (0001001) +-4 + 14 = 10 (0001010) +-4 + 15 = 11 (0001011) +-4 + 16 = 12 (0001100) +-4 + 17 = 13 (0001101) +-4 + 18 = 14 (0001110) +-4 + 19 = 15 (0001111) +-4 + 20 = 16 (0010000) +-4 + 21 = 17 (0010001) +-4 + 22 = 18 (0010010) +-4 + 23 = 19 (0010011) +-4 + 24 = 20 (0010100) +-4 + 25 = 21 (0010101) +-4 + 26 = 22 (0010110) +-4 + 27 = 23 (0010111) +-4 + 28 = 24 (0011000) +-4 + 29 = 25 (0011001) +-4 + 30 = 26 (0011010) +-4 + 31 = 27 (0011011) +-4 + -32 = -36 (1011100) +-4 + -31 = -35 (1011101) +-4 + -30 = -34 (1011110) +-4 + -29 = -33 (1011111) +-4 + -28 = -32 (1100000) +-4 + -27 = -31 (1100001) +-4 + -26 = -30 (1100010) +-4 + -25 = -29 (1100011) +-4 + -24 = -28 (1100100) +-4 + -23 = -27 (1100101) +-4 + -22 = -26 (1100110) +-4 + -21 = -25 (1100111) +-4 + -20 = -24 (1101000) +-4 + -19 = -23 (1101001) +-4 + -18 = -22 (1101010) +-4 + -17 = -21 (1101011) +-4 + -16 = -20 (1101100) +-4 + -15 = -19 (1101101) +-4 + -14 = -18 (1101110) +-4 + -13 = -17 (1101111) +-4 + -12 = -16 (1110000) +-4 + -11 = -15 (1110001) +-4 + -10 = -14 (1110010) +-4 + -9 = -13 (1110011) +-4 + -8 = -12 (1110100) +-4 + -7 = -11 (1110101) +-4 + -6 = -10 (1110110) +-4 + -5 = -9 (1110111) +-4 + -4 = -8 (1111000) +-4 + -3 = -7 (1111001) +-4 + -2 = -6 (1111010) +-4 + -1 = -5 (1111011) +-3 + 0 = -3 (1111101) +-3 + 1 = -2 (1111110) +-3 + 2 = -1 (1111111) +-3 + 3 = 0 (0000000) +-3 + 4 = 1 (0000001) +-3 + 5 = 2 (0000010) +-3 + 6 = 3 (0000011) +-3 + 7 = 4 (0000100) +-3 + 8 = 5 (0000101) +-3 + 9 = 6 (0000110) +-3 + 10 = 7 (0000111) +-3 + 11 = 8 (0001000) +-3 + 12 = 9 (0001001) +-3 + 13 = 10 (0001010) +-3 + 14 = 11 (0001011) +-3 + 15 = 12 (0001100) +-3 + 16 = 13 (0001101) +-3 + 17 = 14 (0001110) +-3 + 18 = 15 (0001111) +-3 + 19 = 16 (0010000) +-3 + 20 = 17 (0010001) +-3 + 21 = 18 (0010010) +-3 + 22 = 19 (0010011) +-3 + 23 = 20 (0010100) +-3 + 24 = 21 (0010101) +-3 + 25 = 22 (0010110) +-3 + 26 = 23 (0010111) +-3 + 27 = 24 (0011000) +-3 + 28 = 25 (0011001) +-3 + 29 = 26 (0011010) +-3 + 30 = 27 (0011011) +-3 + 31 = 28 (0011100) +-3 + -32 = -35 (1011101) +-3 + -31 = -34 (1011110) +-3 + -30 = -33 (1011111) +-3 + -29 = -32 (1100000) +-3 + -28 = -31 (1100001) +-3 + -27 = -30 (1100010) +-3 + -26 = -29 (1100011) +-3 + -25 = -28 (1100100) +-3 + -24 = -27 (1100101) +-3 + -23 = -26 (1100110) +-3 + -22 = -25 (1100111) +-3 + -21 = -24 (1101000) +-3 + -20 = -23 (1101001) +-3 + -19 = -22 (1101010) +-3 + -18 = -21 (1101011) +-3 + -17 = -20 (1101100) +-3 + -16 = -19 (1101101) +-3 + -15 = -18 (1101110) +-3 + -14 = -17 (1101111) +-3 + -13 = -16 (1110000) +-3 + -12 = -15 (1110001) +-3 + -11 = -14 (1110010) +-3 + -10 = -13 (1110011) +-3 + -9 = -12 (1110100) +-3 + -8 = -11 (1110101) +-3 + -7 = -10 (1110110) +-3 + -6 = -9 (1110111) +-3 + -5 = -8 (1111000) +-3 + -4 = -7 (1111001) +-3 + -3 = -6 (1111010) +-3 + -2 = -5 (1111011) +-3 + -1 = -4 (1111100) +-2 + 0 = -2 (1111110) +-2 + 1 = -1 (1111111) +-2 + 2 = 0 (0000000) +-2 + 3 = 1 (0000001) +-2 + 4 = 2 (0000010) +-2 + 5 = 3 (0000011) +-2 + 6 = 4 (0000100) +-2 + 7 = 5 (0000101) +-2 + 8 = 6 (0000110) +-2 + 9 = 7 (0000111) +-2 + 10 = 8 (0001000) +-2 + 11 = 9 (0001001) +-2 + 12 = 10 (0001010) +-2 + 13 = 11 (0001011) +-2 + 14 = 12 (0001100) +-2 + 15 = 13 (0001101) +-2 + 16 = 14 (0001110) +-2 + 17 = 15 (0001111) +-2 + 18 = 16 (0010000) +-2 + 19 = 17 (0010001) +-2 + 20 = 18 (0010010) +-2 + 21 = 19 (0010011) +-2 + 22 = 20 (0010100) +-2 + 23 = 21 (0010101) +-2 + 24 = 22 (0010110) +-2 + 25 = 23 (0010111) +-2 + 26 = 24 (0011000) +-2 + 27 = 25 (0011001) +-2 + 28 = 26 (0011010) +-2 + 29 = 27 (0011011) +-2 + 30 = 28 (0011100) +-2 + 31 = 29 (0011101) +-2 + -32 = -34 (1011110) +-2 + -31 = -33 (1011111) +-2 + -30 = -32 (1100000) +-2 + -29 = -31 (1100001) +-2 + -28 = -30 (1100010) +-2 + -27 = -29 (1100011) +-2 + -26 = -28 (1100100) +-2 + -25 = -27 (1100101) +-2 + -24 = -26 (1100110) +-2 + -23 = -25 (1100111) +-2 + -22 = -24 (1101000) +-2 + -21 = -23 (1101001) +-2 + -20 = -22 (1101010) +-2 + -19 = -21 (1101011) +-2 + -18 = -20 (1101100) +-2 + -17 = -19 (1101101) +-2 + -16 = -18 (1101110) +-2 + -15 = -17 (1101111) +-2 + -14 = -16 (1110000) +-2 + -13 = -15 (1110001) +-2 + -12 = -14 (1110010) +-2 + -11 = -13 (1110011) +-2 + -10 = -12 (1110100) +-2 + -9 = -11 (1110101) +-2 + -8 = -10 (1110110) +-2 + -7 = -9 (1110111) +-2 + -6 = -8 (1111000) +-2 + -5 = -7 (1111001) +-2 + -4 = -6 (1111010) +-2 + -3 = -5 (1111011) +-2 + -2 = -4 (1111100) +-2 + -1 = -3 (1111101) +-1 + 0 = -1 (1111111) +-1 + 1 = 0 (0000000) +-1 + 2 = 1 (0000001) +-1 + 3 = 2 (0000010) +-1 + 4 = 3 (0000011) +-1 + 5 = 4 (0000100) +-1 + 6 = 5 (0000101) +-1 + 7 = 6 (0000110) +-1 + 8 = 7 (0000111) +-1 + 9 = 8 (0001000) +-1 + 10 = 9 (0001001) +-1 + 11 = 10 (0001010) +-1 + 12 = 11 (0001011) +-1 + 13 = 12 (0001100) +-1 + 14 = 13 (0001101) +-1 + 15 = 14 (0001110) +-1 + 16 = 15 (0001111) +-1 + 17 = 16 (0010000) +-1 + 18 = 17 (0010001) +-1 + 19 = 18 (0010010) +-1 + 20 = 19 (0010011) +-1 + 21 = 20 (0010100) +-1 + 22 = 21 (0010101) +-1 + 23 = 22 (0010110) +-1 + 24 = 23 (0010111) +-1 + 25 = 24 (0011000) +-1 + 26 = 25 (0011001) +-1 + 27 = 26 (0011010) +-1 + 28 = 27 (0011011) +-1 + 29 = 28 (0011100) +-1 + 30 = 29 (0011101) +-1 + 31 = 30 (0011110) +-1 + -32 = -33 (1011111) +-1 + -31 = -32 (1100000) +-1 + -30 = -31 (1100001) +-1 + -29 = -30 (1100010) +-1 + -28 = -29 (1100011) +-1 + -27 = -28 (1100100) +-1 + -26 = -27 (1100101) +-1 + -25 = -26 (1100110) +-1 + -24 = -25 (1100111) +-1 + -23 = -24 (1101000) +-1 + -22 = -23 (1101001) +-1 + -21 = -22 (1101010) +-1 + -20 = -21 (1101011) +-1 + -19 = -20 (1101100) +-1 + -18 = -19 (1101101) +-1 + -17 = -18 (1101110) +-1 + -16 = -17 (1101111) +-1 + -15 = -16 (1110000) +-1 + -14 = -15 (1110001) +-1 + -13 = -14 (1110010) +-1 + -12 = -13 (1110011) +-1 + -11 = -12 (1110100) +-1 + -10 = -11 (1110101) +-1 + -9 = -10 (1110110) +-1 + -8 = -9 (1110111) +-1 + -7 = -8 (1111000) +-1 + -6 = -7 (1111001) +-1 + -5 = -6 (1111010) +-1 + -4 = -5 (1111011) +-1 + -3 = -4 (1111100) +-1 + -2 = -3 (1111101) +-1 + -1 = -2 (1111110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + -32 = -32 (1100000) +0 + -31 = -31 (1100001) +0 + -30 = -30 (1100010) +0 + -29 = -29 (1100011) +0 + -28 = -28 (1100100) +0 + -27 = -27 (1100101) +0 + -26 = -26 (1100110) +0 + -25 = -25 (1100111) +0 + -24 = -24 (1101000) +0 + -23 = -23 (1101001) +0 + -22 = -22 (1101010) +0 + -21 = -21 (1101011) +0 + -20 = -20 (1101100) +0 + -19 = -19 (1101101) +0 + -18 = -18 (1101110) +0 + -17 = -17 (1101111) +0 + -16 = -16 (1110000) +0 + -15 = -15 (1110001) +0 + -14 = -14 (1110010) +0 + -13 = -13 (1110011) +0 + -12 = -12 (1110100) +0 + -11 = -11 (1110101) +0 + -10 = -10 (1110110) +0 + -9 = -9 (1110111) +0 + -8 = -8 (1111000) +0 + -7 = -7 (1111001) +0 + -6 = -6 (1111010) +0 + -5 = -5 (1111011) +0 + -4 = -4 (1111100) +0 + -3 = -3 (1111101) +0 + -2 = -2 (1111110) +0 + -1 = -1 (1111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + -32 = -31 (1100001) +1 + -31 = -30 (1100010) +1 + -30 = -29 (1100011) +1 + -29 = -28 (1100100) +1 + -28 = -27 (1100101) +1 + -27 = -26 (1100110) +1 + -26 = -25 (1100111) +1 + -25 = -24 (1101000) +1 + -24 = -23 (1101001) +1 + -23 = -22 (1101010) +1 + -22 = -21 (1101011) +1 + -21 = -20 (1101100) +1 + -20 = -19 (1101101) +1 + -19 = -18 (1101110) +1 + -18 = -17 (1101111) +1 + -17 = -16 (1110000) +1 + -16 = -15 (1110001) +1 + -15 = -14 (1110010) +1 + -14 = -13 (1110011) +1 + -13 = -12 (1110100) +1 + -12 = -11 (1110101) +1 + -11 = -10 (1110110) +1 + -10 = -9 (1110111) +1 + -9 = -8 (1111000) +1 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22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + -32 = -25 (1100111) +7 + -31 = -24 (1101000) +7 + -30 = -23 (1101001) +7 + -29 = -22 (1101010) +7 + -28 = -21 (1101011) +7 + -27 = -20 (1101100) +7 + -26 = -19 (1101101) +7 + -25 = -18 (1101110) +7 + -24 = -17 (1101111) +7 + -23 = -16 (1110000) +7 + -22 = -15 (1110001) +7 + -21 = -14 (1110010) +7 + -20 = -13 (1110011) +7 + -19 = -12 (1110100) +7 + -18 = -11 (1110101) +7 + -17 = -10 (1110110) +7 + -16 = -9 (1110111) +7 + -15 = -8 (1111000) +7 + -14 = -7 (1111001) +7 + -13 = -6 (1111010) +7 + -12 = -5 (1111011) +7 + -11 = -4 (1111100) +7 + -10 = -3 (1111101) +7 + -9 = -2 (1111110) +7 + -8 = -1 (1111111) +7 + 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= 5 (0000101) +-7 + 13 = 6 (0000110) +-7 + 14 = 7 (0000111) +-7 + 15 = 8 (0001000) +-7 + 16 = 9 (0001001) +-7 + 17 = 10 (0001010) +-7 + 18 = 11 (0001011) +-7 + 19 = 12 (0001100) +-7 + 20 = 13 (0001101) +-7 + 21 = 14 (0001110) +-7 + 22 = 15 (0001111) +-7 + 23 = 16 (0010000) +-7 + 24 = 17 (0010001) +-7 + 25 = 18 (0010010) +-7 + 26 = 19 (0010011) +-7 + 27 = 20 (0010100) +-7 + 28 = 21 (0010101) +-7 + 29 = 22 (0010110) +-7 + 30 = 23 (0010111) +-7 + 31 = 24 (0011000) +-7 + -32 = -39 (1011001) +-7 + -31 = -38 (1011010) +-7 + -30 = -37 (1011011) +-7 + -29 = -36 (1011100) +-7 + -28 = -35 (1011101) +-7 + -27 = -34 (1011110) +-7 + -26 = -33 (1011111) +-7 + -25 = -32 (1100000) +-7 + -24 = -31 (1100001) +-7 + -23 = -30 (1100010) +-7 + -22 = -29 (1100011) +-7 + -21 = -28 (1100100) +-7 + -20 = -27 (1100101) +-7 + -19 = -26 (1100110) +-7 + -18 = -25 (1100111) +-7 + -17 = -24 (1101000) +-7 + -16 = -23 (1101001) +-7 + -15 = -22 (1101010) +-7 + -14 = -21 (1101011) +-7 + -13 = -20 (1101100) +-7 + -12 = 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24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + -16 = -22 (1101010) +-6 + -15 = -21 (1101011) +-6 + -14 = -20 (1101100) +-6 + -13 = -19 (1101101) +-6 + -12 = -18 (1101110) +-6 + -11 = -17 (1101111) +-6 + -10 = -16 (1110000) +-6 + -9 = -15 (1110001) +-6 + -8 = -14 (1110010) +-6 + -7 = -13 (1110011) +-6 + -6 = -12 (1110100) +-6 + -5 = -11 (1110101) +-6 + -4 = -10 (1110110) +-6 + -3 = -9 (1110111) +-6 + -2 = -8 (1111000) +-6 + -1 = -7 (1111001) +-5 + 0 = -5 (1111011) +-5 + 1 = -4 (1111100) +-5 + 2 = -3 (1111101) +-5 + 3 = -2 (1111110) +-5 + 4 = -1 (1111111) +-5 + 5 = 0 (0000000) +-5 + 6 = 1 (0000001) +-5 + 7 = 2 (0000010) +-5 + 8 = 3 (0000011) +-5 + 9 = 4 (0000100) +-5 + 10 = 5 (0000101) +-5 + 11 = 6 (0000110) +-5 + 12 = 7 (0000111) +-5 + 13 = 8 (0001000) +-5 + 14 = 9 (0001001) +-5 + 15 = 10 (0001010) +-5 + 16 = 11 (0001011) +-5 + 17 = 12 (0001100) +-5 + 18 = 13 (0001101) +-5 + 19 = 14 (0001110) +-5 + 20 = 15 (0001111) +-5 + 21 = 16 (0010000) +-5 + 22 = 17 (0010001) +-5 + 23 = 18 (0010010) +-5 + 24 = 19 (0010011) +-5 + 25 = 20 (0010100) +-5 + 26 = 21 (0010101) +-5 + 27 = 22 (0010110) +-5 + 28 = 23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 + 1 = -3 (1111101) +-4 + 2 = -2 (1111110) +-4 + 3 = -1 (1111111) +-4 + 4 = 0 (0000000) +-4 + 5 = 1 (0000001) +-4 + 6 = 2 (0000010) +-4 + 7 = 3 (0000011) +-4 + 8 = 4 (0000100) +-4 + 9 = 5 (0000101) +-4 + 10 = 6 (0000110) +-4 + 11 = 7 (0000111) +-4 + 12 = 8 (0001000) +-4 + 13 = 9 (0001001) +-4 + 14 = 10 (0001010) +-4 + 15 = 11 (0001011) +-4 + 16 = 12 (0001100) +-4 + 17 = 13 (0001101) +-4 + 18 = 14 (0001110) +-4 + 19 = 15 (0001111) +-4 + 20 = 16 (0010000) +-4 + 21 = 17 (0010001) +-4 + 22 = 18 (0010010) +-4 + 23 = 19 (0010011) +-4 + 24 = 20 (0010100) +-4 + 25 = 21 (0010101) +-4 + 26 = 22 (0010110) +-4 + 27 = 23 (0010111) +-4 + 28 = 24 (0011000) +-4 + 29 = 25 (0011001) +-4 + 30 = 26 (0011010) +-4 + 31 = 27 (0011011) +-4 + -32 = -36 (1011100) +-4 + -31 = -35 (1011101) +-4 + -30 = -34 (1011110) +-4 + -29 = -33 (1011111) +-4 + -28 = -32 (1100000) +-4 + -27 = -31 (1100001) +-4 + -26 = -30 (1100010) +-4 + -25 = -29 (1100011) +-4 + -24 = -28 (1100100) +-4 + -23 = -27 (1100101) +-4 + -22 = -26 (1100110) +-4 + -21 = -25 (1100111) +-4 + -20 = -24 (1101000) +-4 + -19 = -23 (1101001) +-4 + -18 = -22 (1101010) +-4 + -17 = -21 (1101011) +-4 + -16 = -20 (1101100) +-4 + -15 = -19 (1101101) +-4 + -14 = -18 (1101110) +-4 + -13 = -17 (1101111) +-4 + -12 = -16 (1110000) +-4 + -11 = -15 (1110001) +-4 + -10 = -14 (1110010) +-4 + -9 = -13 (1110011) +-4 + -8 = -12 (1110100) +-4 + -7 = -11 (1110101) +-4 + -6 = -10 (1110110) +-4 + -5 = -9 (1110111) +-4 + -4 = -8 (1111000) +-4 + -3 = -7 (1111001) +-4 + -2 = -6 (1111010) +-4 + -1 = -5 (1111011) +-3 + 0 = -3 (1111101) +-3 + 1 = -2 (1111110) +-3 + 2 = -1 (1111111) +-3 + 3 = 0 (0000000) +-3 + 4 = 1 (0000001) +-3 + 5 = 2 (0000010) +-3 + 6 = 3 (0000011) +-3 + 7 = 4 (0000100) +-3 + 8 = 5 (0000101) +-3 + 9 = 6 (0000110) +-3 + 10 = 7 (0000111) +-3 + 11 = 8 (0001000) +-3 + 12 = 9 (0001001) +-3 + 13 = 10 (0001010) +-3 + 14 = 11 (0001011) +-3 + 15 = 12 (0001100) +-3 + 16 = 13 (0001101) +-3 + 17 = 14 (0001110) +-3 + 18 = 15 (0001111) +-3 + 19 = 16 (0010000) +-3 + 20 = 17 (0010001) +-3 + 21 = 18 (0010010) +-3 + 22 = 19 (0010011) +-3 + 23 = 20 (0010100) +-3 + 24 = 21 (0010101) +-3 + 25 = 22 (0010110) +-3 + 26 = 23 (0010111) +-3 + 27 = 24 (0011000) +-3 + 28 = 25 (0011001) +-3 + 29 = 26 (0011010) +-3 + 30 = 27 (0011011) +-3 + 31 = 28 (0011100) +-3 + -32 = -35 (1011101) +-3 + -31 = -34 (1011110) +-3 + -30 = -33 (1011111) +-3 + -29 = -32 (1100000) +-3 + -28 = -31 (1100001) +-3 + -27 = -30 (1100010) +-3 + -26 = -29 (1100011) +-3 + -25 = -28 (1100100) +-3 + -24 = -27 (1100101) +-3 + -23 = -26 (1100110) +-3 + -22 = -25 (1100111) +-3 + -21 = -24 (1101000) +-3 + -20 = -23 (1101001) +-3 + -19 = -22 (1101010) +-3 + -18 = -21 (1101011) +-3 + -17 = -20 (1101100) +-3 + -16 = -19 (1101101) +-3 + -15 = -18 (1101110) +-3 + -14 = -17 (1101111) +-3 + -13 = -16 (1110000) +-3 + -12 = -15 (1110001) +-3 + -11 = -14 (1110010) +-3 + -10 = -13 (1110011) +-3 + -9 = -12 (1110100) +-3 + -8 = -11 (1110101) +-3 + -7 = -10 (1110110) +-3 + -6 = -9 (1110111) +-3 + -5 = -8 (1111000) +-3 + -4 = -7 (1111001) +-3 + -3 = -6 (1111010) +-3 + -2 = -5 (1111011) +-3 + -1 = -4 (1111100) +-2 + 0 = -2 (1111110) +-2 + 1 = -1 (1111111) +-2 + 2 = 0 (0000000) +-2 + 3 = 1 (0000001) +-2 + 4 = 2 (0000010) +-2 + 5 = 3 (0000011) +-2 + 6 = 4 (0000100) +-2 + 7 = 5 (0000101) +-2 + 8 = 6 (0000110) +-2 + 9 = 7 (0000111) +-2 + 10 = 8 (0001000) +-2 + 11 = 9 (0001001) +-2 + 12 = 10 (0001010) +-2 + 13 = 11 (0001011) +-2 + 14 = 12 (0001100) +-2 + 15 = 13 (0001101) +-2 + 16 = 14 (0001110) +-2 + 17 = 15 (0001111) +-2 + 18 = 16 (0010000) +-2 + 19 = 17 (0010001) +-2 + 20 = 18 (0010010) +-2 + 21 = 19 (0010011) +-2 + 22 = 20 (0010100) +-2 + 23 = 21 (0010101) +-2 + 24 = 22 (0010110) +-2 + 25 = 23 (0010111) +-2 + 26 = 24 (0011000) +-2 + 27 = 25 (0011001) +-2 + 28 = 26 (0011010) +-2 + 29 = 27 (0011011) +-2 + 30 = 28 (0011100) +-2 + 31 = 29 (0011101) +-2 + -32 = -34 (1011110) +-2 + -31 = -33 (1011111) +-2 + -30 = -32 (1100000) +-2 + -29 = -31 (1100001) +-2 + -28 = -30 (1100010) +-2 + -27 = -29 (1100011) +-2 + -26 = -28 (1100100) +-2 + -25 = -27 (1100101) +-2 + -24 = -26 (1100110) +-2 + -23 = -25 (1100111) +-2 + -22 = -24 (1101000) +-2 + -21 = -23 (1101001) +-2 + -20 = -22 (1101010) +-2 + -19 = -21 (1101011) +-2 + -18 = -20 (1101100) +-2 + -17 = -19 (1101101) +-2 + -16 = -18 (1101110) +-2 + -15 = -17 (1101111) +-2 + -14 = -16 (1110000) +-2 + -13 = -15 (1110001) +-2 + -12 = -14 (1110010) +-2 + -11 = -13 (1110011) +-2 + -10 = -12 (1110100) +-2 + -9 = -11 (1110101) +-2 + -8 = -10 (1110110) +-2 + -7 = -9 (1110111) +-2 + -6 = -8 (1111000) +-2 + -5 = -7 (1111001) +-2 + -4 = -6 (1111010) +-2 + -3 = -5 (1111011) +-2 + -2 = -4 (1111100) +-2 + -1 = -3 (1111101) +-1 + 0 = -1 (1111111) +-1 + 1 = 0 (0000000) +-1 + 2 = 1 (0000001) +-1 + 3 = 2 (0000010) +-1 + 4 = 3 (0000011) +-1 + 5 = 4 (0000100) +-1 + 6 = 5 (0000101) +-1 + 7 = 6 (0000110) +-1 + 8 = 7 (0000111) +-1 + 9 = 8 (0001000) +-1 + 10 = 9 (0001001) +-1 + 11 = 10 (0001010) +-1 + 12 = 11 (0001011) +-1 + 13 = 12 (0001100) +-1 + 14 = 13 (0001101) +-1 + 15 = 14 (0001110) +-1 + 16 = 15 (0001111) +-1 + 17 = 16 (0010000) +-1 + 18 = 17 (0010001) +-1 + 19 = 18 (0010010) +-1 + 20 = 19 (0010011) +-1 + 21 = 20 (0010100) +-1 + 22 = 21 (0010101) +-1 + 23 = 22 (0010110) +-1 + 24 = 23 (0010111) +-1 + 25 = 24 (0011000) +-1 + 26 = 25 (0011001) +-1 + 27 = 26 (0011010) +-1 + 28 = 27 (0011011) +-1 + 29 = 28 (0011100) +-1 + 30 = 29 (0011101) +-1 + 31 = 30 (0011110) +-1 + -32 = -33 (1011111) +-1 + -31 = -32 (1100000) +-1 + -30 = -31 (1100001) +-1 + -29 = -30 (1100010) +-1 + -28 = -29 (1100011) +-1 + -27 = -28 (1100100) +-1 + -26 = -27 (1100101) +-1 + -25 = -26 (1100110) +-1 + -24 = -25 (1100111) +-1 + -23 = -24 (1101000) +-1 + -22 = -23 (1101001) +-1 + -21 = -22 (1101010) +-1 + -20 = -21 (1101011) +-1 + -19 = -20 (1101100) +-1 + -18 = -19 (1101101) +-1 + -17 = -18 (1101110) +-1 + -16 = -17 (1101111) +-1 + -15 = -16 (1110000) +-1 + -14 = -15 (1110001) +-1 + -13 = -14 (1110010) +-1 + -12 = -13 (1110011) +-1 + -11 = -12 (1110100) +-1 + -10 = -11 (1110101) +-1 + -9 = -10 (1110110) +-1 + -8 = -9 (1110111) +-1 + -7 = -8 (1111000) +-1 + -6 = -7 (1111001) +-1 + -5 = -6 (1111010) +-1 + -4 = -5 (1111011) +-1 + -3 = -4 (1111100) +-1 + -2 = -3 (1111101) +-1 + -1 = -2 (1111110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + -32 = -32 (1100000) +0 + -31 = -31 (1100001) +0 + -30 = -30 (1100010) +0 + -29 = -29 (1100011) +0 + -28 = -28 (1100100) +0 + -27 = -27 (1100101) +0 + -26 = -26 (1100110) +0 + -25 = -25 (1100111) +0 + -24 = -24 (1101000) +0 + -23 = -23 (1101001) +0 + -22 = -22 (1101010) +0 + -21 = -21 (1101011) +0 + -20 = -20 (1101100) +0 + -19 = -19 (1101101) +0 + -18 = -18 (1101110) +0 + -17 = -17 (1101111) +0 + -16 = -16 (1110000) +0 + -15 = -15 (1110001) +0 + -14 = -14 (1110010) +0 + -13 = -13 (1110011) +0 + -12 = -12 (1110100) +0 + -11 = -11 (1110101) +0 + -10 = -10 (1110110) +0 + -9 = -9 (1110111) +0 + -8 = -8 (1111000) +0 + -7 = -7 (1111001) +0 + -6 = -6 (1111010) +0 + -5 = -5 (1111011) +0 + -4 = -4 (1111100) +0 + -3 = -3 (1111101) +0 + -2 = -2 (1111110) +0 + -1 = -1 (1111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + -32 = -31 (1100001) +1 + -31 = -30 (1100010) +1 + -30 = -29 (1100011) +1 + -29 = -28 (1100100) +1 + -28 = -27 (1100101) +1 + -27 = -26 (1100110) +1 + -26 = -25 (1100111) +1 + -25 = -24 (1101000) +1 + -24 = -23 (1101001) +1 + -23 = -22 (1101010) +1 + -22 = -21 (1101011) +1 + -21 = -20 (1101100) +1 + -20 = -19 (1101101) +1 + -19 = -18 (1101110) +1 + -18 = -17 (1101111) +1 + -17 = -16 (1110000) +1 + -16 = -15 (1110001) +1 + -15 = -14 (1110010) +1 + -14 = -13 (1110011) +1 + -13 = -12 (1110100) +1 + -12 = -11 (1110101) +1 + -11 = -10 (1110110) +1 + -10 = -9 (1110111) +1 + -9 = -8 (1111000) +1 + -8 = -7 (1111001) +1 + -7 = -6 (1111010) +1 + -6 = -5 (1111011) +1 + -5 = -4 (1111100) +1 + -4 = -3 (1111101) +1 + -3 = -2 (1111110) +1 + -2 = -1 (1111111) +1 + -1 = 0 (0000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + -32 = -30 (1100010) +2 + -31 = -29 (1100011) +2 + -30 = -28 (1100100) +2 + -29 = -27 (1100101) +2 + -28 = -26 (1100110) +2 + -27 = -25 (1100111) +2 + -26 = -24 (1101000) +2 + -25 = -23 (1101001) +2 + -24 = -22 (1101010) +2 + -23 = -21 (1101011) +2 + -22 = -20 (1101100) +2 + -21 = -19 (1101101) +2 + -20 = -18 (1101110) +2 + -19 = -17 (1101111) +2 + -18 = -16 (1110000) +2 + -17 = -15 (1110001) +2 + -16 = -14 (1110010) +2 + -15 = -13 (1110011) +2 + -14 = -12 (1110100) +2 + -13 = -11 (1110101) +2 + -12 = -10 (1110110) +2 + -11 = -9 (1110111) +2 + -10 = -8 (1111000) +2 + -9 = -7 (1111001) +2 + -8 = -6 (1111010) +2 + -7 = -5 (1111011) +2 + -6 = -4 (1111100) +2 + -5 = -3 (1111101) +2 + -4 = -2 (1111110) +2 + -3 = -1 (1111111) +2 + -2 = 0 (0000000) +2 + -1 = 1 (0000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + -32 = -29 (1100011) +3 + -31 = -28 (1100100) +3 + -30 = -27 (1100101) +3 + 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(0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + -32 = -28 (1100100) +4 + -31 = -27 (1100101) +4 + -30 = -26 (1100110) +4 + -29 = -25 (1100111) +4 + -28 = -24 (1101000) +4 + -27 = -23 (1101001) +4 + -26 = -22 (1101010) +4 + -25 = -21 (1101011) +4 + -24 = -20 (1101100) +4 + -23 = -19 (1101101) +4 + -22 = -18 (1101110) +4 + -21 = -17 (1101111) +4 + -20 = -16 (1110000) +4 + -19 = -15 (1110001) +4 + -18 = -14 (1110010) +4 + -17 = -13 (1110011) +4 + -16 = -12 (1110100) +4 + -15 = -11 (1110101) +4 + -14 = -10 (1110110) +4 + -13 = -9 (1110111) +4 + -12 = -8 (1111000) +4 + -11 = -7 (1111001) +4 + -10 = -6 (1111010) +4 + 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+-8 + 14 = 6 (0000110) +-8 + 15 = 7 (0000111) +-8 + 16 = 8 (0001000) +-8 + 17 = 9 (0001001) +-8 + 18 = 10 (0001010) +-8 + 19 = 11 (0001011) +-8 + 20 = 12 (0001100) +-8 + 21 = 13 (0001101) +-8 + 22 = 14 (0001110) +-8 + 23 = 15 (0001111) +-8 + 24 = 16 (0010000) +-8 + 25 = 17 (0010001) +-8 + 26 = 18 (0010010) +-8 + 27 = 19 (0010011) +-8 + 28 = 20 (0010100) +-8 + 29 = 21 (0010101) +-8 + 30 = 22 (0010110) +-8 + 31 = 23 (0010111) +-8 + -32 = -40 (1011000) +-8 + -31 = -39 (1011001) +-8 + -30 = -38 (1011010) +-8 + -29 = -37 (1011011) +-8 + -28 = -36 (1011100) +-8 + -27 = -35 (1011101) +-8 + -26 = -34 (1011110) +-8 + -25 = -33 (1011111) +-8 + -24 = -32 (1100000) +-8 + -23 = -31 (1100001) +-8 + -22 = -30 (1100010) +-8 + -21 = -29 (1100011) +-8 + -20 = -28 (1100100) +-8 + -19 = -27 (1100101) +-8 + -18 = -26 (1100110) +-8 + -17 = -25 (1100111) +-8 + -16 = -24 (1101000) +-8 + -15 = -23 (1101001) +-8 + -14 = -22 (1101010) +-8 + -13 = -21 (1101011) +-8 + -12 = -20 (1101100) +-8 + -11 = -19 (1101101) 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(0000001) +-6 + 8 = 2 (0000010) +-6 + 9 = 3 (0000011) +-6 + 10 = 4 (0000100) +-6 + 11 = 5 (0000101) +-6 + 12 = 6 (0000110) +-6 + 13 = 7 (0000111) +-6 + 14 = 8 (0001000) +-6 + 15 = 9 (0001001) +-6 + 16 = 10 (0001010) +-6 + 17 = 11 (0001011) +-6 + 18 = 12 (0001100) +-6 + 19 = 13 (0001101) +-6 + 20 = 14 (0001110) +-6 + 21 = 15 (0001111) +-6 + 22 = 16 (0010000) +-6 + 23 = 17 (0010001) +-6 + 24 = 18 (0010010) +-6 + 25 = 19 (0010011) +-6 + 26 = 20 (0010100) +-6 + 27 = 21 (0010101) +-6 + 28 = 22 (0010110) +-6 + 29 = 23 (0010111) +-6 + 30 = 24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + 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(0010100) +-5 + 26 = 21 (0010101) +-5 + 27 = 22 (0010110) +-5 + 28 = 23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 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(1100110) +-4 + -21 = -25 (1100111) +-4 + -20 = -24 (1101000) +-4 + -19 = -23 (1101001) +-4 + -18 = -22 (1101010) +-4 + -17 = -21 (1101011) +-4 + -16 = -20 (1101100) +-4 + -15 = -19 (1101101) +-4 + -14 = -18 (1101110) +-4 + -13 = -17 (1101111) +-4 + -12 = -16 (1110000) +-4 + -11 = -15 (1110001) +-4 + -10 = -14 (1110010) +-4 + -9 = -13 (1110011) +-4 + -8 = -12 (1110100) +-4 + -7 = -11 (1110101) +-4 + -6 = -10 (1110110) +-4 + -5 = -9 (1110111) +-4 + -4 = -8 (1111000) +-4 + -3 = -7 (1111001) +-4 + -2 = -6 (1111010) +-4 + -1 = -5 (1111011) +-3 + 0 = -3 (1111101) +-3 + 1 = -2 (1111110) +-3 + 2 = -1 (1111111) +-3 + 3 = 0 (0000000) +-3 + 4 = 1 (0000001) +-3 + 5 = 2 (0000010) +-3 + 6 = 3 (0000011) +-3 + 7 = 4 (0000100) +-3 + 8 = 5 (0000101) +-3 + 9 = 6 (0000110) +-3 + 10 = 7 (0000111) +-3 + 11 = 8 (0001000) +-3 + 12 = 9 (0001001) +-3 + 13 = 10 (0001010) +-3 + 14 = 11 (0001011) +-3 + 15 = 12 (0001100) +-3 + 16 = 13 (0001101) +-3 + 17 = 14 (0001110) +-3 + 18 = 15 (0001111) +-3 + 19 = 16 (0010000) +-3 + 20 = 17 (0010001) +-3 + 21 = 18 (0010010) +-3 + 22 = 19 (0010011) +-3 + 23 = 20 (0010100) +-3 + 24 = 21 (0010101) +-3 + 25 = 22 (0010110) +-3 + 26 = 23 (0010111) +-3 + 27 = 24 (0011000) +-3 + 28 = 25 (0011001) +-3 + 29 = 26 (0011010) +-3 + 30 = 27 (0011011) +-3 + 31 = 28 (0011100) +-3 + -32 = -35 (1011101) +-3 + -31 = -34 (1011110) +-3 + -30 = -33 (1011111) +-3 + -29 = -32 (1100000) +-3 + -28 = -31 (1100001) +-3 + -27 = -30 (1100010) +-3 + -26 = -29 (1100011) +-3 + -25 = -28 (1100100) +-3 + -24 = -27 (1100101) +-3 + -23 = -26 (1100110) +-3 + -22 = -25 (1100111) +-3 + -21 = -24 (1101000) +-3 + -20 = -23 (1101001) +-3 + -19 = -22 (1101010) +-3 + -18 = -21 (1101011) +-3 + -17 = -20 (1101100) +-3 + -16 = -19 (1101101) +-3 + -15 = -18 (1101110) +-3 + -14 = -17 (1101111) +-3 + -13 = -16 (1110000) +-3 + -12 = -15 (1110001) +-3 + -11 = -14 (1110010) +-3 + -10 = -13 (1110011) +-3 + -9 = -12 (1110100) +-3 + -8 = -11 (1110101) +-3 + -7 = -10 (1110110) +-3 + -6 = -9 (1110111) +-3 + -5 = -8 (1111000) +-3 + -4 = -7 (1111001) +-3 + -3 = -6 (1111010) +-3 + -2 = -5 (1111011) +-3 + -1 = -4 (1111100) +-2 + 0 = -2 (1111110) +-2 + 1 = -1 (1111111) +-2 + 2 = 0 (0000000) +-2 + 3 = 1 (0000001) +-2 + 4 = 2 (0000010) +-2 + 5 = 3 (0000011) +-2 + 6 = 4 (0000100) +-2 + 7 = 5 (0000101) +-2 + 8 = 6 (0000110) +-2 + 9 = 7 (0000111) +-2 + 10 = 8 (0001000) +-2 + 11 = 9 (0001001) +-2 + 12 = 10 (0001010) +-2 + 13 = 11 (0001011) +-2 + 14 = 12 (0001100) +-2 + 15 = 13 (0001101) +-2 + 16 = 14 (0001110) +-2 + 17 = 15 (0001111) +-2 + 18 = 16 (0010000) +-2 + 19 = 17 (0010001) +-2 + 20 = 18 (0010010) +-2 + 21 = 19 (0010011) +-2 + 22 = 20 (0010100) +-2 + 23 = 21 (0010101) +-2 + 24 = 22 (0010110) +-2 + 25 = 23 (0010111) +-2 + 26 = 24 (0011000) +-2 + 27 = 25 (0011001) +-2 + 28 = 26 (0011010) +-2 + 29 = 27 (0011011) +-2 + 30 = 28 (0011100) +-2 + 31 = 29 (0011101) +-2 + -32 = -34 (1011110) +-2 + -31 = -33 (1011111) +-2 + -30 = -32 (1100000) +-2 + -29 = -31 (1100001) +-2 + -28 = -30 (1100010) +-2 + -27 = -29 (1100011) +-2 + -26 = -28 (1100100) +-2 + -25 = -27 (1100101) +-2 + -24 = -26 (1100110) +-2 + -23 = -25 (1100111) +-2 + -22 = -24 (1101000) +-2 + -21 = -23 (1101001) +-2 + -20 = -22 (1101010) +-2 + -19 = -21 (1101011) +-2 + -18 = -20 (1101100) +-2 + -17 = -19 (1101101) +-2 + -16 = -18 (1101110) +-2 + -15 = -17 (1101111) +-2 + -14 = -16 (1110000) +-2 + -13 = -15 (1110001) +-2 + -12 = -14 (1110010) +-2 + -11 = -13 (1110011) +-2 + -10 = -12 (1110100) +-2 + -9 = -11 (1110101) +-2 + -8 = -10 (1110110) +-2 + -7 = -9 (1110111) +-2 + -6 = -8 (1111000) +-2 + -5 = -7 (1111001) +-2 + -4 = -6 (1111010) +-2 + -3 = -5 (1111011) +-2 + -2 = -4 (1111100) +-2 + -1 = -3 (1111101) +-1 + 0 = -1 (1111111) +-1 + 1 = 0 (0000000) +-1 + 2 = 1 (0000001) +-1 + 3 = 2 (0000010) +-1 + 4 = 3 (0000011) +-1 + 5 = 4 (0000100) +-1 + 6 = 5 (0000101) +-1 + 7 = 6 (0000110) +-1 + 8 = 7 (0000111) +-1 + 9 = 8 (0001000) +-1 + 10 = 9 (0001001) +-1 + 11 = 10 (0001010) +-1 + 12 = 11 (0001011) +-1 + 13 = 12 (0001100) +-1 + 14 = 13 (0001101) +-1 + 15 = 14 (0001110) +-1 + 16 = 15 (0001111) +-1 + 17 = 16 (0010000) +-1 + 18 = 17 (0010001) +-1 + 19 = 18 (0010010) +-1 + 20 = 19 (0010011) +-1 + 21 = 20 (0010100) +-1 + 22 = 21 (0010101) +-1 + 23 = 22 (0010110) +-1 + 24 = 23 (0010111) +-1 + 25 = 24 (0011000) +-1 + 26 = 25 (0011001) +-1 + 27 = 26 (0011010) +-1 + 28 = 27 (0011011) +-1 + 29 = 28 (0011100) +-1 + 30 = 29 (0011101) +-1 + 31 = 30 (0011110) +-1 + -32 = -33 (1011111) +-1 + -31 = -32 (1100000) +-1 + -30 = -31 (1100001) +-1 + -29 = -30 (1100010) +-1 + -28 = -29 (1100011) +-1 + -27 = -28 (1100100) +-1 + -26 = -27 (1100101) +-1 + -25 = -26 (1100110) +-1 + -24 = -25 (1100111) +-1 + -23 = -24 (1101000) +-1 + -22 = -23 (1101001) +-1 + -21 = -22 (1101010) +-1 + -20 = -21 (1101011) +-1 + -19 = -20 (1101100) +-1 + -18 = -19 (1101101) +-1 + -17 = -18 (1101110) +-1 + -16 = -17 (1101111) +-1 + -15 = -16 (1110000) +-1 + -14 = -15 (1110001) +-1 + -13 = -14 (1110010) +-1 + -12 = -13 (1110011) +-1 + -11 = -12 (1110100) +-1 + -10 = -11 (1110101) +-1 + -9 = -10 (1110110) +-1 + -8 = -9 (1110111) +-1 + -7 = -8 (1111000) +-1 + -6 = -7 (1111001) +-1 + -5 = -6 (1111010) +-1 + -4 = -5 (1111011) +-1 + -3 = -4 (1111100) +-1 + -2 = -3 (1111101) +-1 + -1 = -2 (1111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/main.cpp new file mode 100644 index 000000000..4d28d0a65 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 7-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 7; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/promote.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/promote.f new file mode 100644 index 000000000..4f270dbe0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/promote.f @@ -0,0 +1,3 @@ +promote/datawidth.cpp +promote/stimgen.cpp +promote/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/stimgen.h new file mode 100644 index 000000000..723f5103f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector7& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector7& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/common.h new file mode 100644 index 000000000..f5bf2658c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/common.h @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; +typedef sc_bv<9> bool_vector9; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; +typedef sc_signal signal_bool_vector9; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/datawidth.cpp new file mode 100644 index 000000000..c3c12c90a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector4 tmp_a; + bool_vector6 tmp_b; + bool_vector9 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_int() + tmp_b.to_int(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/datawidth.h new file mode 100644 index 000000000..284757aeb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector9& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector9& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/golden/promote_extension.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/golden/promote_extension.log new file mode 100644 index 000000000..3290f802a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/golden/promote_extension.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/main.cpp new file mode 100644 index 000000000..dda8095a1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 9-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 9; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector9 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/promote_extension.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/promote_extension.f new file mode 100644 index 000000000..3c46f3738 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/promote_extension.f @@ -0,0 +1,3 @@ +promote_extension/datawidth.cpp +promote_extension/stimgen.cpp +promote_extension/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/stimgen.h new file mode 100644 index 000000000..1c35e4175 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_extension/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector9& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector9& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/common.h new file mode 100644 index 000000000..d7f26e029 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/datawidth.cpp new file mode 100644 index 000000000..b954dfe88 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector4 tmp_a; + bool_vector6 tmp_b; + bool_vector6 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_int() + tmp_b.to_int(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/datawidth.h new file mode 100644 index 000000000..6adbfd87b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector6& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector6& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/golden/promote_lost_carry.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/golden/promote_lost_carry.log new file mode 100644 index 000000000..833493d33 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/golden/promote_lost_carry.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + -32 = -32 (100000) +0 + -31 = -31 (100001) +0 + -30 = -30 (100010) +0 + -29 = -29 (100011) +0 + -28 = -28 (100100) +0 + -27 = -27 (100101) +0 + -26 = -26 (100110) +0 + -25 = -25 (100111) +0 + -24 = -24 (101000) +0 + -23 = -23 (101001) +0 + -22 = -22 (101010) +0 + -21 = -21 (101011) +0 + -20 = -20 (101100) +0 + -19 = -19 (101101) +0 + -18 = -18 (101110) +0 + -17 = -17 (101111) +0 + -16 = -16 (110000) +0 + -15 = -15 (110001) +0 + -14 = -14 (110010) +0 + -13 = -13 (110011) +0 + -12 = -12 (110100) +0 + -11 = -11 (110101) +0 + -10 = -10 (110110) +0 + -9 = -9 (110111) +0 + -8 = -8 (111000) +0 + -7 = -7 (111001) +0 + -6 = -6 (111010) +0 + -5 = -5 (111011) +0 + -4 = -4 (111100) +0 + -3 = -3 (111101) +0 + -2 = -2 (111110) +0 + -1 = -1 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = -32 (100000) +1 + -32 = -31 (100001) +1 + -31 = -30 (100010) +1 + -30 = -29 (100011) +1 + -29 = -28 (100100) +1 + -28 = -27 (100101) +1 + -27 = -26 (100110) +1 + -26 = -25 (100111) +1 + -25 = -24 (101000) +1 + -24 = -23 (101001) +1 + -23 = -22 (101010) +1 + -22 = -21 (101011) +1 + -21 = -20 (101100) +1 + -20 = -19 (101101) +1 + -19 = -18 (101110) +1 + -18 = -17 (101111) +1 + -17 = -16 (110000) +1 + -16 = -15 (110001) +1 + -15 = -14 (110010) +1 + -14 = -13 (110011) +1 + -13 = -12 (110100) +1 + -12 = -11 (110101) +1 + -11 = -10 (110110) +1 + -10 = -9 (110111) +1 + -9 = -8 (111000) +1 + -8 = -7 (111001) +1 + -7 = -6 (111010) +1 + -6 = -5 (111011) +1 + -5 = -4 (111100) +1 + -4 = -3 (111101) +1 + -3 = -2 (111110) +1 + -2 = -1 (111111) +1 + -1 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = -32 (100000) +2 + 31 = -31 (100001) +2 + -32 = -30 (100010) +2 + -31 = -29 (100011) +2 + -30 = -28 (100100) +2 + -29 = -27 (100101) +2 + -28 = -26 (100110) +2 + -27 = -25 (100111) +2 + -26 = -24 (101000) +2 + -25 = -23 (101001) +2 + -24 = -22 (101010) +2 + -23 = -21 (101011) +2 + -22 = -20 (101100) +2 + -21 = -19 (101101) +2 + -20 = -18 (101110) +2 + -19 = -17 (101111) +2 + -18 = -16 (110000) +2 + -17 = -15 (110001) +2 + -16 = -14 (110010) +2 + -15 = -13 (110011) +2 + -14 = -12 (110100) +2 + -13 = -11 (110101) +2 + -12 = -10 (110110) +2 + -11 = -9 (110111) +2 + -10 = -8 (111000) +2 + -9 = -7 (111001) +2 + -8 = -6 (111010) +2 + -7 = -5 (111011) +2 + -6 = -4 (111100) +2 + -5 = -3 (111101) +2 + -4 = -2 (111110) +2 + -3 = -1 (111111) +2 + -2 = 0 (000000) +2 + -1 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = -32 (100000) +3 + 30 = -31 (100001) +3 + 31 = -30 (100010) +3 + -32 = -29 (100011) +3 + -31 = -28 (100100) +3 + -30 = -27 (100101) +3 + -29 = -26 (100110) +3 + -28 = -25 (100111) +3 + -27 = -24 (101000) +3 + -26 = -23 (101001) +3 + -25 = -22 (101010) +3 + -24 = -21 (101011) +3 + -23 = -20 (101100) +3 + -22 = -19 (101101) +3 + -21 = -18 (101110) +3 + -20 = -17 (101111) +3 + -19 = -16 (110000) +3 + -18 = -15 (110001) +3 + -17 = -14 (110010) +3 + -16 = -13 (110011) +3 + -15 = -12 (110100) +3 + -14 = -11 (110101) +3 + -13 = -10 (110110) +3 + -12 = -9 (110111) +3 + -11 = -8 (111000) +3 + -10 = -7 (111001) +3 + -9 = -6 (111010) +3 + -8 = -5 (111011) +3 + -7 = -4 (111100) +3 + -6 = -3 (111101) +3 + -5 = -2 (111110) +3 + -4 = -1 (111111) +3 + -3 = 0 (000000) +3 + -2 = 1 (000001) +3 + -1 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = -32 (100000) +4 + 29 = -31 (100001) +4 + 30 = -30 (100010) +4 + 31 = -29 (100011) +4 + -32 = -28 (100100) +4 + -31 = -27 (100101) +4 + -30 = -26 (100110) +4 + -29 = -25 (100111) +4 + -28 = -24 (101000) +4 + -27 = -23 (101001) +4 + -26 = -22 (101010) +4 + -25 = -21 (101011) +4 + -24 = -20 (101100) +4 + -23 = -19 (101101) +4 + -22 = -18 (101110) +4 + -21 = -17 (101111) +4 + -20 = -16 (110000) +4 + -19 = -15 (110001) +4 + -18 = -14 (110010) +4 + -17 = -13 (110011) +4 + -16 = -12 (110100) +4 + -15 = -11 (110101) +4 + -14 = -10 (110110) +4 + -13 = -9 (110111) +4 + -12 = -8 (111000) +4 + -11 = -7 (111001) +4 + -10 = -6 (111010) +4 + -9 = -5 (111011) +4 + -8 = -4 (111100) +4 + -7 = -3 (111101) +4 + -6 = -2 (111110) +4 + -5 = -1 (111111) +4 + -4 = 0 (000000) +4 + -3 = 1 (000001) +4 + -2 = 2 (000010) +4 + -1 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = -32 (100000) +5 + 28 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28 (011100) +-7 + -28 = 29 (011101) +-7 + -27 = 30 (011110) +-7 + -26 = 31 (011111) +-7 + -25 = -32 (100000) +-7 + -24 = -31 (100001) +-7 + -23 = -30 (100010) +-7 + -22 = -29 (100011) +-7 + -21 = -28 (100100) +-7 + -20 = -27 (100101) +-7 + -19 = -26 (100110) +-7 + -18 = -25 (100111) +-7 + -17 = -24 (101000) +-7 + -16 = -23 (101001) +-7 + -15 = -22 (101010) +-7 + -14 = -21 (101011) +-7 + -13 = -20 (101100) +-7 + -12 = -19 (101101) +-7 + -11 = -18 (101110) +-7 + -10 = -17 (101111) +-7 + -9 = -16 (110000) +-7 + -8 = -15 (110001) +-7 + -7 = -14 (110010) +-7 + -6 = -13 (110011) +-7 + -5 = -12 (110100) +-7 + -4 = -11 (110101) +-7 + -3 = -10 (110110) +-7 + -2 = -9 (110111) +-7 + -1 = -8 (111000) +-6 + 0 = -6 (111010) +-6 + 1 = -5 (111011) +-6 + 2 = -4 (111100) +-6 + 3 = -3 (111101) +-6 + 4 = -2 (111110) +-6 + 5 = -1 (111111) +-6 + 6 = 0 (000000) +-6 + 7 = 1 (000001) +-6 + 8 = 2 (000010) +-6 + 9 = 3 (000011) +-6 + 10 = 4 (000100) +-6 + 11 = 5 (000101) +-6 + 12 = 6 (000110) +-6 + 13 = 7 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= 30 (011110) +-5 + -28 = 31 (011111) +-5 + -27 = -32 (100000) +-5 + -26 = -31 (100001) +-5 + -25 = -30 (100010) +-5 + -24 = -29 (100011) +-5 + -23 = -28 (100100) +-5 + -22 = -27 (100101) +-5 + -21 = -26 (100110) +-5 + -20 = -25 (100111) +-5 + -19 = -24 (101000) +-5 + -18 = -23 (101001) +-5 + -17 = -22 (101010) +-5 + -16 = -21 (101011) +-5 + -15 = -20 (101100) +-5 + -14 = -19 (101101) +-5 + -13 = -18 (101110) +-5 + -12 = -17 (101111) +-5 + -11 = -16 (110000) +-5 + -10 = -15 (110001) +-5 + -9 = -14 (110010) +-5 + -8 = -13 (110011) +-5 + -7 = -12 (110100) +-5 + -6 = -11 (110101) +-5 + -5 = -10 (110110) +-5 + -4 = -9 (110111) +-5 + -3 = -8 (111000) +-5 + -2 = -7 (111001) +-5 + -1 = -6 (111010) +-4 + 0 = -4 (111100) +-4 + 1 = -3 (111101) +-4 + 2 = -2 (111110) +-4 + 3 = -1 (111111) +-4 + 4 = 0 (000000) +-4 + 5 = 1 (000001) +-4 + 6 = 2 (000010) +-4 + 7 = 3 (000011) +-4 + 8 = 4 (000100) +-4 + 9 = 5 (000101) +-4 + 10 = 6 (000110) +-4 + 11 = 7 (000111) +-4 + 12 = 8 (001000) +-4 + 13 = 9 (001001) +-4 + 14 = 10 (001010) +-4 + 15 = 11 (001011) +-4 + 16 = 12 (001100) +-4 + 17 = 13 (001101) +-4 + 18 = 14 (001110) +-4 + 19 = 15 (001111) +-4 + 20 = 16 (010000) +-4 + 21 = 17 (010001) +-4 + 22 = 18 (010010) +-4 + 23 = 19 (010011) +-4 + 24 = 20 (010100) +-4 + 25 = 21 (010101) +-4 + 26 = 22 (010110) +-4 + 27 = 23 (010111) +-4 + 28 = 24 (011000) +-4 + 29 = 25 (011001) +-4 + 30 = 26 (011010) +-4 + 31 = 27 (011011) +-4 + -32 = 28 (011100) +-4 + -31 = 29 (011101) +-4 + -30 = 30 (011110) +-4 + -29 = 31 (011111) +-4 + -28 = -32 (100000) +-4 + -27 = -31 (100001) +-4 + -26 = -30 (100010) +-4 + -25 = -29 (100011) +-4 + -24 = -28 (100100) +-4 + -23 = -27 (100101) +-4 + -22 = -26 (100110) +-4 + -21 = -25 (100111) +-4 + -20 = -24 (101000) +-4 + -19 = -23 (101001) +-4 + -18 = -22 (101010) +-4 + -17 = -21 (101011) +-4 + -16 = -20 (101100) +-4 + -15 = -19 (101101) +-4 + -14 = -18 (101110) +-4 + -13 = -17 (101111) +-4 + -12 = -16 (110000) +-4 + -11 = -15 (110001) +-4 + -10 = -14 (110010) +-4 + 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+-7 + 14 = 7 (000111) +-7 + 15 = 8 (001000) +-7 + 16 = 9 (001001) +-7 + 17 = 10 (001010) +-7 + 18 = 11 (001011) +-7 + 19 = 12 (001100) +-7 + 20 = 13 (001101) +-7 + 21 = 14 (001110) +-7 + 22 = 15 (001111) +-7 + 23 = 16 (010000) +-7 + 24 = 17 (010001) +-7 + 25 = 18 (010010) +-7 + 26 = 19 (010011) +-7 + 27 = 20 (010100) +-7 + 28 = 21 (010101) +-7 + 29 = 22 (010110) +-7 + 30 = 23 (010111) +-7 + 31 = 24 (011000) +-7 + -32 = 25 (011001) +-7 + -31 = 26 (011010) +-7 + -30 = 27 (011011) +-7 + -29 = 28 (011100) +-7 + -28 = 29 (011101) +-7 + -27 = 30 (011110) +-7 + -26 = 31 (011111) +-7 + -25 = -32 (100000) +-7 + -24 = -31 (100001) +-7 + -23 = -30 (100010) +-7 + -22 = -29 (100011) +-7 + -21 = -28 (100100) +-7 + -20 = -27 (100101) +-7 + -19 = -26 (100110) +-7 + -18 = -25 (100111) +-7 + -17 = -24 (101000) +-7 + -16 = -23 (101001) +-7 + -15 = -22 (101010) +-7 + -14 = -21 (101011) +-7 + -13 = -20 (101100) +-7 + -12 = -19 (101101) +-7 + -11 = -18 (101110) +-7 + -10 = -17 (101111) +-7 + -9 = -16 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29 (011101) +-6 + -28 = 30 (011110) +-6 + -27 = 31 (011111) +-6 + -26 = -32 (100000) +-6 + -25 = -31 (100001) +-6 + -24 = -30 (100010) +-6 + -23 = -29 (100011) +-6 + -22 = -28 (100100) +-6 + -21 = -27 (100101) +-6 + -20 = -26 (100110) +-6 + -19 = -25 (100111) +-6 + -18 = -24 (101000) +-6 + -17 = -23 (101001) +-6 + -16 = -22 (101010) +-6 + -15 = -21 (101011) +-6 + -14 = -20 (101100) +-6 + -13 = -19 (101101) +-6 + -12 = -18 (101110) +-6 + -11 = -17 (101111) +-6 + -10 = -16 (110000) +-6 + -9 = -15 (110001) +-6 + -8 = -14 (110010) +-6 + -7 = -13 (110011) +-6 + -6 = -12 (110100) +-6 + -5 = -11 (110101) +-6 + -4 = -10 (110110) +-6 + -3 = -9 (110111) +-6 + -2 = -8 (111000) +-6 + -1 = -7 (111001) +-5 + 0 = -5 (111011) +-5 + 1 = -4 (111100) +-5 + 2 = -3 (111101) +-5 + 3 = -2 (111110) +-5 + 4 = -1 (111111) +-5 + 5 = 0 (000000) +-5 + 6 = 1 (000001) +-5 + 7 = 2 (000010) +-5 + 8 = 3 (000011) +-5 + 9 = 4 (000100) +-5 + 10 = 5 (000101) +-5 + 11 = 6 (000110) +-5 + 12 = 7 (000111) +-5 + 13 = 8 (001000) +-5 + 14 = 9 (001001) +-5 + 15 = 10 (001010) +-5 + 16 = 11 (001011) +-5 + 17 = 12 (001100) +-5 + 18 = 13 (001101) +-5 + 19 = 14 (001110) +-5 + 20 = 15 (001111) +-5 + 21 = 16 (010000) +-5 + 22 = 17 (010001) +-5 + 23 = 18 (010010) +-5 + 24 = 19 (010011) +-5 + 25 = 20 (010100) +-5 + 26 = 21 (010101) +-5 + 27 = 22 (010110) +-5 + 28 = 23 (010111) +-5 + 29 = 24 (011000) +-5 + 30 = 25 (011001) +-5 + 31 = 26 (011010) +-5 + -32 = 27 (011011) +-5 + -31 = 28 (011100) +-5 + -30 = 29 (011101) +-5 + -29 = 30 (011110) +-5 + -28 = 31 (011111) +-5 + -27 = -32 (100000) +-5 + -26 = -31 (100001) +-5 + -25 = -30 (100010) +-5 + -24 = -29 (100011) +-5 + -23 = -28 (100100) +-5 + -22 = -27 (100101) +-5 + -21 = -26 (100110) +-5 + -20 = -25 (100111) +-5 + -19 = -24 (101000) +-5 + -18 = -23 (101001) +-5 + -17 = -22 (101010) +-5 + -16 = -21 (101011) +-5 + -15 = -20 (101100) +-5 + -14 = -19 (101101) +-5 + -13 = -18 (101110) +-5 + -12 = -17 (101111) +-5 + -11 = -16 (110000) +-5 + -10 = -15 (110001) +-5 + -9 = -14 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+ 14 = 11 (001011) +-3 + 15 = 12 (001100) +-3 + 16 = 13 (001101) +-3 + 17 = 14 (001110) +-3 + 18 = 15 (001111) +-3 + 19 = 16 (010000) +-3 + 20 = 17 (010001) +-3 + 21 = 18 (010010) +-3 + 22 = 19 (010011) +-3 + 23 = 20 (010100) +-3 + 24 = 21 (010101) +-3 + 25 = 22 (010110) +-3 + 26 = 23 (010111) +-3 + 27 = 24 (011000) +-3 + 28 = 25 (011001) +-3 + 29 = 26 (011010) +-3 + 30 = 27 (011011) +-3 + 31 = 28 (011100) +-3 + -32 = 29 (011101) +-3 + -31 = 30 (011110) +-3 + -30 = 31 (011111) +-3 + -29 = -32 (100000) +-3 + -28 = -31 (100001) +-3 + -27 = -30 (100010) +-3 + -26 = -29 (100011) +-3 + -25 = -28 (100100) +-3 + -24 = -27 (100101) +-3 + -23 = -26 (100110) +-3 + -22 = -25 (100111) +-3 + -21 = -24 (101000) +-3 + -20 = -23 (101001) +-3 + -19 = -22 (101010) +-3 + -18 = -21 (101011) +-3 + -17 = -20 (101100) +-3 + -16 = -19 (101101) +-3 + -15 = -18 (101110) +-3 + -14 = -17 (101111) +-3 + -13 = -16 (110000) +-3 + -12 = -15 (110001) +-3 + -11 = -14 (110010) +-3 + -10 = -13 (110011) +-3 + -9 = -12 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(100001) +-2 + -28 = -30 (100010) +-2 + -27 = -29 (100011) +-2 + -26 = -28 (100100) +-2 + -25 = -27 (100101) +-2 + -24 = -26 (100110) +-2 + -23 = -25 (100111) +-2 + -22 = -24 (101000) +-2 + -21 = -23 (101001) +-2 + -20 = -22 (101010) +-2 + -19 = -21 (101011) +-2 + -18 = -20 (101100) +-2 + -17 = -19 (101101) +-2 + -16 = -18 (101110) +-2 + -15 = -17 (101111) +-2 + -14 = -16 (110000) +-2 + -13 = -15 (110001) +-2 + -12 = -14 (110010) +-2 + -11 = -13 (110011) +-2 + -10 = -12 (110100) +-2 + -9 = -11 (110101) +-2 + -8 = -10 (110110) +-2 + -7 = -9 (110111) +-2 + -6 = -8 (111000) +-2 + -5 = -7 (111001) +-2 + -4 = -6 (111010) +-2 + -3 = -5 (111011) +-2 + -2 = -4 (111100) +-2 + -1 = -3 (111101) +-1 + 0 = -1 (111111) +-1 + 1 = 0 (000000) +-1 + 2 = 1 (000001) +-1 + 3 = 2 (000010) +-1 + 4 = 3 (000011) +-1 + 5 = 4 (000100) +-1 + 6 = 5 (000101) +-1 + 7 = 6 (000110) +-1 + 8 = 7 (000111) +-1 + 9 = 8 (001000) +-1 + 10 = 9 (001001) +-1 + 11 = 10 (001010) +-1 + 12 = 11 (001011) +-1 + 13 = 12 (001100) +-1 + 14 = 13 (001101) +-1 + 15 = 14 (001110) +-1 + 16 = 15 (001111) +-1 + 17 = 16 (010000) +-1 + 18 = 17 (010001) +-1 + 19 = 18 (010010) +-1 + 20 = 19 (010011) +-1 + 21 = 20 (010100) +-1 + 22 = 21 (010101) +-1 + 23 = 22 (010110) +-1 + 24 = 23 (010111) +-1 + 25 = 24 (011000) +-1 + 26 = 25 (011001) +-1 + 27 = 26 (011010) +-1 + 28 = 27 (011011) +-1 + 29 = 28 (011100) +-1 + 30 = 29 (011101) +-1 + 31 = 30 (011110) +-1 + -32 = 31 (011111) +-1 + -31 = -32 (100000) +-1 + -30 = -31 (100001) +-1 + -29 = -30 (100010) +-1 + -28 = -29 (100011) +-1 + -27 = -28 (100100) +-1 + -26 = -27 (100101) +-1 + -25 = -26 (100110) +-1 + -24 = -25 (100111) +-1 + -23 = -24 (101000) +-1 + -22 = -23 (101001) +-1 + -21 = -22 (101010) +-1 + -20 = -21 (101011) +-1 + -19 = -20 (101100) +-1 + -18 = -19 (101101) +-1 + -17 = -18 (101110) +-1 + -16 = -17 (101111) +-1 + -15 = -16 (110000) +-1 + -14 = -15 (110001) +-1 + -13 = -14 (110010) +-1 + -12 = -13 (110011) +-1 + -11 = -12 (110100) +-1 + -10 = -11 (110101) +-1 + -9 = -10 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15 = 13 (001101) +-2 + 16 = 14 (001110) +-2 + 17 = 15 (001111) +-2 + 18 = 16 (010000) +-2 + 19 = 17 (010001) +-2 + 20 = 18 (010010) +-2 + 21 = 19 (010011) +-2 + 22 = 20 (010100) +-2 + 23 = 21 (010101) +-2 + 24 = 22 (010110) +-2 + 25 = 23 (010111) +-2 + 26 = 24 (011000) +-2 + 27 = 25 (011001) +-2 + 28 = 26 (011010) +-2 + 29 = 27 (011011) +-2 + 30 = 28 (011100) +-2 + 31 = 29 (011101) +-2 + -32 = 30 (011110) +-2 + -31 = 31 (011111) +-2 + -30 = -32 (100000) +-2 + -29 = -31 (100001) +-2 + -28 = -30 (100010) +-2 + -27 = -29 (100011) +-2 + -26 = -28 (100100) +-2 + -25 = -27 (100101) +-2 + -24 = -26 (100110) +-2 + -23 = -25 (100111) +-2 + -22 = -24 (101000) +-2 + -21 = -23 (101001) +-2 + -20 = -22 (101010) +-2 + -19 = -21 (101011) +-2 + -18 = -20 (101100) +-2 + -17 = -19 (101101) +-2 + -16 = -18 (101110) +-2 + -15 = -17 (101111) +-2 + -14 = -16 (110000) +-2 + -13 = -15 (110001) +-2 + -12 = -14 (110010) +-2 + -11 = -13 (110011) +-2 + -10 = -12 (110100) +-2 + -9 = -11 (110101) +-2 + -8 = -10 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(010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = -32 (100000) +2 + 31 = -31 (100001) +2 + -32 = -30 (100010) +2 + -31 = -29 (100011) +2 + -30 = -28 (100100) +2 + -29 = -27 (100101) +2 + -28 = -26 (100110) +2 + -27 = -25 (100111) +2 + -26 = -24 (101000) +2 + -25 = -23 (101001) +2 + -24 = -22 (101010) +2 + -23 = -21 (101011) +2 + -22 = -20 (101100) +2 + -21 = -19 (101101) +2 + -20 = -18 (101110) +2 + -19 = -17 (101111) +2 + -18 = -16 (110000) +2 + -17 = -15 (110001) +2 + -16 = -14 (110010) +2 + -15 = -13 (110011) +2 + -14 = -12 (110100) +2 + -13 = -11 (110101) +2 + -12 = -10 (110110) +2 + -11 = -9 (110111) +2 + -10 = -8 (111000) +2 + -9 = -7 (111001) +2 + -8 = -6 (111010) +2 + -7 = -5 (111011) +2 + -6 = -4 (111100) +2 + -5 = -3 (111101) +2 + -4 = -2 (111110) +2 + -3 = -1 (111111) +2 + -2 = 0 (000000) +2 + -1 = 1 (000001) +3 + 0 = 3 (000011) +3 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(001010) +-5 + 16 = 11 (001011) +-5 + 17 = 12 (001100) +-5 + 18 = 13 (001101) +-5 + 19 = 14 (001110) +-5 + 20 = 15 (001111) +-5 + 21 = 16 (010000) +-5 + 22 = 17 (010001) +-5 + 23 = 18 (010010) +-5 + 24 = 19 (010011) +-5 + 25 = 20 (010100) +-5 + 26 = 21 (010101) +-5 + 27 = 22 (010110) +-5 + 28 = 23 (010111) +-5 + 29 = 24 (011000) +-5 + 30 = 25 (011001) +-5 + 31 = 26 (011010) +-5 + -32 = 27 (011011) +-5 + -31 = 28 (011100) +-5 + -30 = 29 (011101) +-5 + -29 = 30 (011110) +-5 + -28 = 31 (011111) +-5 + -27 = -32 (100000) +-5 + -26 = -31 (100001) +-5 + -25 = -30 (100010) +-5 + -24 = -29 (100011) +-5 + -23 = -28 (100100) +-5 + -22 = -27 (100101) +-5 + -21 = -26 (100110) +-5 + -20 = -25 (100111) +-5 + -19 = -24 (101000) +-5 + -18 = -23 (101001) +-5 + -17 = -22 (101010) +-5 + -16 = -21 (101011) +-5 + -15 = -20 (101100) +-5 + -14 = -19 (101101) +-5 + -13 = -18 (101110) +-5 + -12 = -17 (101111) +-5 + -11 = -16 (110000) +-5 + -10 = -15 (110001) +-5 + -9 = -14 (110010) +-5 + -8 = -13 (110011) +-5 + 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(001100) +-3 + 16 = 13 (001101) +-3 + 17 = 14 (001110) +-3 + 18 = 15 (001111) +-3 + 19 = 16 (010000) +-3 + 20 = 17 (010001) +-3 + 21 = 18 (010010) +-3 + 22 = 19 (010011) +-3 + 23 = 20 (010100) +-3 + 24 = 21 (010101) +-3 + 25 = 22 (010110) +-3 + 26 = 23 (010111) +-3 + 27 = 24 (011000) +-3 + 28 = 25 (011001) +-3 + 29 = 26 (011010) +-3 + 30 = 27 (011011) +-3 + 31 = 28 (011100) +-3 + -32 = 29 (011101) +-3 + -31 = 30 (011110) +-3 + -30 = 31 (011111) +-3 + -29 = -32 (100000) +-3 + -28 = -31 (100001) +-3 + -27 = -30 (100010) +-3 + -26 = -29 (100011) +-3 + -25 = -28 (100100) +-3 + -24 = -27 (100101) +-3 + -23 = -26 (100110) +-3 + -22 = -25 (100111) +-3 + -21 = -24 (101000) +-3 + -20 = -23 (101001) +-3 + -19 = -22 (101010) +-3 + -18 = -21 (101011) +-3 + -17 = -20 (101100) +-3 + -16 = -19 (101101) +-3 + -15 = -18 (101110) +-3 + -14 = -17 (101111) +-3 + -13 = -16 (110000) +-3 + -12 = -15 (110001) +-3 + -11 = -14 (110010) +-3 + -10 = -13 (110011) +-3 + -9 = -12 (110100) +-3 + -8 = -11 (110101) +-3 + -7 = -10 (110110) +-3 + -6 = -9 (110111) +-3 + -5 = -8 (111000) +-3 + -4 = -7 (111001) +-3 + -3 = -6 (111010) +-3 + -2 = -5 (111011) +-3 + -1 = -4 (111100) +-2 + 0 = -2 (111110) +-2 + 1 = -1 (111111) +-2 + 2 = 0 (000000) +-2 + 3 = 1 (000001) +-2 + 4 = 2 (000010) +-2 + 5 = 3 (000011) +-2 + 6 = 4 (000100) +-2 + 7 = 5 (000101) +-2 + 8 = 6 (000110) +-2 + 9 = 7 (000111) +-2 + 10 = 8 (001000) +-2 + 11 = 9 (001001) +-2 + 12 = 10 (001010) +-2 + 13 = 11 (001011) +-2 + 14 = 12 (001100) +-2 + 15 = 13 (001101) +-2 + 16 = 14 (001110) +-2 + 17 = 15 (001111) +-2 + 18 = 16 (010000) +-2 + 19 = 17 (010001) +-2 + 20 = 18 (010010) +-2 + 21 = 19 (010011) +-2 + 22 = 20 (010100) +-2 + 23 = 21 (010101) +-2 + 24 = 22 (010110) +-2 + 25 = 23 (010111) +-2 + 26 = 24 (011000) +-2 + 27 = 25 (011001) +-2 + 28 = 26 (011010) +-2 + 29 = 27 (011011) +-2 + 30 = 28 (011100) +-2 + 31 = 29 (011101) +-2 + -32 = 30 (011110) +-2 + -31 = 31 (011111) +-2 + -30 = -32 (100000) +-2 + -29 = -31 (100001) +-2 + -28 = -30 (100010) +-2 + -27 = -29 (100011) +-2 + -26 = -28 (100100) +-2 + -25 = -27 (100101) +-2 + -24 = -26 (100110) +-2 + -23 = -25 (100111) +-2 + -22 = -24 (101000) +-2 + -21 = -23 (101001) +-2 + -20 = -22 (101010) +-2 + -19 = -21 (101011) +-2 + -18 = -20 (101100) +-2 + -17 = -19 (101101) +-2 + -16 = -18 (101110) +-2 + -15 = -17 (101111) +-2 + -14 = -16 (110000) +-2 + -13 = -15 (110001) +-2 + -12 = -14 (110010) +-2 + -11 = -13 (110011) +-2 + -10 = -12 (110100) +-2 + -9 = -11 (110101) +-2 + -8 = -10 (110110) +-2 + -7 = -9 (110111) +-2 + -6 = -8 (111000) +-2 + -5 = -7 (111001) +-2 + -4 = -6 (111010) +-2 + -3 = -5 (111011) +-2 + -2 = -4 (111100) +-2 + -1 = -3 (111101) +-1 + 0 = -1 (111111) +-1 + 1 = 0 (000000) +-1 + 2 = 1 (000001) +-1 + 3 = 2 (000010) +-1 + 4 = 3 (000011) +-1 + 5 = 4 (000100) +-1 + 6 = 5 (000101) +-1 + 7 = 6 (000110) +-1 + 8 = 7 (000111) +-1 + 9 = 8 (001000) +-1 + 10 = 9 (001001) +-1 + 11 = 10 (001010) +-1 + 12 = 11 (001011) +-1 + 13 = 12 (001100) +-1 + 14 = 13 (001101) +-1 + 15 = 14 (001110) +-1 + 16 = 15 (001111) +-1 + 17 = 16 (010000) +-1 + 18 = 17 (010001) +-1 + 19 = 18 (010010) +-1 + 20 = 19 (010011) +-1 + 21 = 20 (010100) +-1 + 22 = 21 (010101) +-1 + 23 = 22 (010110) +-1 + 24 = 23 (010111) +-1 + 25 = 24 (011000) +-1 + 26 = 25 (011001) +-1 + 27 = 26 (011010) +-1 + 28 = 27 (011011) +-1 + 29 = 28 (011100) +-1 + 30 = 29 (011101) +-1 + 31 = 30 (011110) +-1 + -32 = 31 (011111) +-1 + -31 = -32 (100000) +-1 + -30 = -31 (100001) +-1 + -29 = -30 (100010) +-1 + -28 = -29 (100011) +-1 + -27 = -28 (100100) +-1 + -26 = -27 (100101) +-1 + -25 = -26 (100110) +-1 + -24 = -25 (100111) +-1 + -23 = -24 (101000) +-1 + -22 = -23 (101001) +-1 + -21 = -22 (101010) +-1 + -20 = -21 (101011) +-1 + -19 = -20 (101100) +-1 + -18 = -19 (101101) +-1 + -17 = -18 (101110) +-1 + -16 = -17 (101111) +-1 + -15 = -16 (110000) +-1 + -14 = -15 (110001) +-1 + -13 = -14 (110010) +-1 + -12 = -13 (110011) +-1 + -11 = -12 (110100) +-1 + -10 = -11 (110101) +-1 + -9 = -10 (110110) +-1 + -8 = -9 (110111) +-1 + -7 = -8 (111000) +-1 + -6 = -7 (111001) +-1 + -5 = -6 (111010) +-1 + -4 = -5 (111011) +-1 + -3 = -4 (111100) +-1 + -2 = -3 (111101) +-1 + -1 = -2 (111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/main.cpp new file mode 100644 index 000000000..5990e96a7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 6-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 6; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector6 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/promote_lost_carry.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/promote_lost_carry.f new file mode 100644 index 000000000..052991cee --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/promote_lost_carry.f @@ -0,0 +1,3 @@ +promote_lost_carry/datawidth.cpp +promote_lost_carry/stimgen.cpp +promote_lost_carry/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/stimgen.h new file mode 100644 index 000000000..e2675e0b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_lost_carry/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/common.h new file mode 100644 index 000000000..d7f26e029 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/datawidth.cpp new file mode 100644 index 000000000..cb847948e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector4 tmp_a; + bool_vector6 tmp_b; + bool_vector4 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_int() + tmp_b.to_int(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/datawidth.h new file mode 100644 index 000000000..12f04c9be --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector4& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector4& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/golden/promote_truncation.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/golden/promote_truncation.log new file mode 100644 index 000000000..081cff3dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/golden/promote_truncation.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000) +0 + 1 = 1 (0001) +0 + 2 = 2 (0010) +0 + 3 = 3 (0011) +0 + 4 = 4 (0100) +0 + 5 = 5 (0101) +0 + 6 = 6 (0110) +0 + 7 = 7 (0111) +0 + 8 = -8 (1000) +0 + 9 = -7 (1001) +0 + 10 = -6 (1010) +0 + 11 = -5 (1011) +0 + 12 = -4 (1100) +0 + 13 = -3 (1101) +0 + 14 = -2 (1110) +0 + 15 = -1 (1111) +0 + 16 = 0 (0000) +0 + 17 = 1 (0001) +0 + 18 = 2 (0010) +0 + 19 = 3 (0011) +0 + 20 = 4 (0100) +0 + 21 = 5 (0101) +0 + 22 = 6 (0110) +0 + 23 = 7 (0111) +0 + 24 = -8 (1000) +0 + 25 = -7 (1001) +0 + 26 = -6 (1010) +0 + 27 = -5 (1011) +0 + 28 = -4 (1100) +0 + 29 = -3 (1101) +0 + 30 = -2 (1110) +0 + 31 = -1 (1111) +0 + -32 = 0 (0000) +0 + -31 = 1 (0001) +0 + -30 = 2 (0010) +0 + -29 = 3 (0011) +0 + -28 = 4 (0100) +0 + -27 = 5 (0101) +0 + -26 = 6 (0110) +0 + -25 = 7 (0111) +0 + -24 = -8 (1000) +0 + -23 = -7 (1001) +0 + -22 = -6 (1010) +0 + -21 = -5 (1011) +0 + -20 = -4 (1100) +0 + -19 = -3 (1101) +0 + -18 = -2 (1110) +0 + -17 = -1 (1111) +0 + -16 = 0 (0000) +0 + -15 = 1 (0001) +0 + -14 = 2 (0010) +0 + -13 = 3 (0011) +0 + -12 = 4 (0100) +0 + -11 = 5 (0101) +0 + -10 = 6 (0110) +0 + -9 = 7 (0111) +0 + -8 = -8 (1000) +0 + -7 = -7 (1001) +0 + -6 = -6 (1010) +0 + -5 = -5 (1011) +0 + -4 = -4 (1100) +0 + -3 = -3 (1101) +0 + -2 = -2 (1110) +0 + -1 = -1 (1111) +1 + 0 = 1 (0001) +1 + 1 = 2 (0010) +1 + 2 = 3 (0011) +1 + 3 = 4 (0100) +1 + 4 = 5 (0101) +1 + 5 = 6 (0110) +1 + 6 = 7 (0111) +1 + 7 = -8 (1000) +1 + 8 = -7 (1001) +1 + 9 = -6 (1010) +1 + 10 = -5 (1011) +1 + 11 = -4 (1100) +1 + 12 = -3 (1101) +1 + 13 = -2 (1110) +1 + 14 = -1 (1111) +1 + 15 = 0 (0000) +1 + 16 = 1 (0001) +1 + 17 = 2 (0010) +1 + 18 = 3 (0011) +1 + 19 = 4 (0100) +1 + 20 = 5 (0101) +1 + 21 = 6 (0110) +1 + 22 = 7 (0111) +1 + 23 = -8 (1000) +1 + 24 = -7 (1001) +1 + 25 = -6 (1010) +1 + 26 = -5 (1011) +1 + 27 = -4 (1100) +1 + 28 = -3 (1101) +1 + 29 = -2 (1110) +1 + 30 = -1 (1111) +1 + 31 = 0 (0000) +1 + -32 = 1 (0001) +1 + -31 = 2 (0010) +1 + -30 = 3 (0011) +1 + -29 = 4 (0100) +1 + -28 = 5 (0101) +1 + -27 = 6 (0110) +1 + -26 = 7 (0111) +1 + -25 = -8 (1000) +1 + -24 = -7 (1001) +1 + -23 = -6 (1010) +1 + -22 = -5 (1011) +1 + -21 = -4 (1100) +1 + -20 = -3 (1101) +1 + -19 = -2 (1110) +1 + -18 = -1 (1111) +1 + -17 = 0 (0000) +1 + -16 = 1 (0001) +1 + -15 = 2 (0010) +1 + -14 = 3 (0011) +1 + -13 = 4 (0100) +1 + -12 = 5 (0101) +1 + -11 = 6 (0110) +1 + -10 = 7 (0111) +1 + -9 = -8 (1000) +1 + -8 = -7 (1001) +1 + -7 = -6 (1010) +1 + -6 = -5 (1011) +1 + -5 = -4 (1100) +1 + -4 = -3 (1101) +1 + -3 = -2 (1110) +1 + -2 = -1 (1111) +1 + -1 = 0 (0000) +2 + 0 = 2 (0010) +2 + 1 = 3 (0011) +2 + 2 = 4 (0100) +2 + 3 = 5 (0101) +2 + 4 = 6 (0110) +2 + 5 = 7 (0111) +2 + 6 = -8 (1000) +2 + 7 = -7 (1001) +2 + 8 = -6 (1010) +2 + 9 = -5 (1011) +2 + 10 = -4 (1100) +2 + 11 = -3 (1101) +2 + 12 = -2 (1110) +2 + 13 = -1 (1111) +2 + 14 = 0 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+ -1 = -5 (1011) +-3 + 0 = -3 (1101) +-3 + 1 = -2 (1110) +-3 + 2 = -1 (1111) +-3 + 3 = 0 (0000) +-3 + 4 = 1 (0001) +-3 + 5 = 2 (0010) +-3 + 6 = 3 (0011) +-3 + 7 = 4 (0100) +-3 + 8 = 5 (0101) +-3 + 9 = 6 (0110) +-3 + 10 = 7 (0111) +-3 + 11 = -8 (1000) +-3 + 12 = -7 (1001) +-3 + 13 = -6 (1010) +-3 + 14 = -5 (1011) +-3 + 15 = -4 (1100) +-3 + 16 = -3 (1101) +-3 + 17 = -2 (1110) +-3 + 18 = -1 (1111) +-3 + 19 = 0 (0000) +-3 + 20 = 1 (0001) +-3 + 21 = 2 (0010) +-3 + 22 = 3 (0011) +-3 + 23 = 4 (0100) +-3 + 24 = 5 (0101) +-3 + 25 = 6 (0110) +-3 + 26 = 7 (0111) +-3 + 27 = -8 (1000) +-3 + 28 = -7 (1001) +-3 + 29 = -6 (1010) +-3 + 30 = -5 (1011) +-3 + 31 = -4 (1100) +-3 + -32 = -3 (1101) +-3 + -31 = -2 (1110) +-3 + -30 = -1 (1111) +-3 + -29 = 0 (0000) +-3 + -28 = 1 (0001) +-3 + -27 = 2 (0010) +-3 + -26 = 3 (0011) +-3 + -25 = 4 (0100) +-3 + -24 = 5 (0101) +-3 + -23 = 6 (0110) +-3 + -22 = 7 (0111) +-3 + -21 = -8 (1000) +-3 + -20 = -7 (1001) +-3 + -19 = -6 (1010) +-3 + -18 = -5 (1011) +-3 + -17 = -4 (1100) +-3 + -16 = -3 (1101) +-3 + -15 = -2 (1110) +-3 + -14 = -1 (1111) +-3 + -13 = 0 (0000) +-3 + -12 = 1 (0001) +-3 + -11 = 2 (0010) +-3 + -10 = 3 (0011) +-3 + -9 = 4 (0100) +-3 + -8 = 5 (0101) +-3 + -7 = 6 (0110) +-3 + -6 = 7 (0111) +-3 + -5 = -8 (1000) +-3 + -4 = -7 (1001) +-3 + -3 = -6 (1010) +-3 + -2 = -5 (1011) +-3 + -1 = -4 (1100) +-2 + 0 = -2 (1110) +-2 + 1 = -1 (1111) +-2 + 2 = 0 (0000) +-2 + 3 = 1 (0001) +-2 + 4 = 2 (0010) +-2 + 5 = 3 (0011) +-2 + 6 = 4 (0100) +-2 + 7 = 5 (0101) +-2 + 8 = 6 (0110) +-2 + 9 = 7 (0111) +-2 + 10 = -8 (1000) +-2 + 11 = -7 (1001) +-2 + 12 = -6 (1010) +-2 + 13 = -5 (1011) +-2 + 14 = -4 (1100) +-2 + 15 = -3 (1101) +-2 + 16 = -2 (1110) +-2 + 17 = -1 (1111) +-2 + 18 = 0 (0000) +-2 + 19 = 1 (0001) +-2 + 20 = 2 (0010) +-2 + 21 = 3 (0011) +-2 + 22 = 4 (0100) +-2 + 23 = 5 (0101) +-2 + 24 = 6 (0110) +-2 + 25 = 7 (0111) +-2 + 26 = -8 (1000) +-2 + 27 = -7 (1001) +-2 + 28 = -6 (1010) +-2 + 29 = -5 (1011) +-2 + 30 = -4 (1100) +-2 + 31 = -3 (1101) +-2 + -32 = -2 (1110) +-2 + -31 = -1 (1111) +-2 + -30 = 0 (0000) +-2 + -29 = 1 (0001) +-2 + -28 = 2 (0010) +-2 + -27 = 3 (0011) +-2 + -26 = 4 (0100) +-2 + -25 = 5 (0101) +-2 + -24 = 6 (0110) +-2 + -23 = 7 (0111) +-2 + -22 = -8 (1000) +-2 + -21 = -7 (1001) +-2 + -20 = -6 (1010) +-2 + -19 = -5 (1011) +-2 + -18 = -4 (1100) +-2 + -17 = -3 (1101) +-2 + -16 = -2 (1110) +-2 + -15 = -1 (1111) +-2 + -14 = 0 (0000) +-2 + -13 = 1 (0001) +-2 + -12 = 2 (0010) +-2 + -11 = 3 (0011) +-2 + -10 = 4 (0100) +-2 + -9 = 5 (0101) +-2 + -8 = 6 (0110) +-2 + -7 = 7 (0111) +-2 + -6 = -8 (1000) +-2 + -5 = -7 (1001) +-2 + -4 = -6 (1010) +-2 + -3 = -5 (1011) +-2 + -2 = -4 (1100) +-2 + -1 = -3 (1101) +-1 + 0 = -1 (1111) +-1 + 1 = 0 (0000) +-1 + 2 = 1 (0001) +-1 + 3 = 2 (0010) +-1 + 4 = 3 (0011) +-1 + 5 = 4 (0100) +-1 + 6 = 5 (0101) +-1 + 7 = 6 (0110) +-1 + 8 = 7 (0111) +-1 + 9 = -8 (1000) +-1 + 10 = -7 (1001) +-1 + 11 = -6 (1010) +-1 + 12 = -5 (1011) +-1 + 13 = -4 (1100) +-1 + 14 = -3 (1101) +-1 + 15 = -2 (1110) +-1 + 16 = -1 (1111) +-1 + 17 = 0 (0000) +-1 + 18 = 1 (0001) +-1 + 19 = 2 (0010) +-1 + 20 = 3 (0011) +-1 + 21 = 4 (0100) +-1 + 22 = 5 (0101) +-1 + 23 = 6 (0110) +-1 + 24 = 7 (0111) +-1 + 25 = -8 (1000) +-1 + 26 = -7 (1001) +-1 + 27 = -6 (1010) +-1 + 28 = -5 (1011) +-1 + 29 = -4 (1100) +-1 + 30 = -3 (1101) +-1 + 31 = -2 (1110) +-1 + -32 = -1 (1111) +-1 + -31 = 0 (0000) +-1 + -30 = 1 (0001) +-1 + -29 = 2 (0010) +-1 + -28 = 3 (0011) +-1 + -27 = 4 (0100) +-1 + -26 = 5 (0101) +-1 + -25 = 6 (0110) +-1 + -24 = 7 (0111) +-1 + -23 = -8 (1000) +-1 + -22 = -7 (1001) +-1 + -21 = -6 (1010) +-1 + -20 = -5 (1011) +-1 + -19 = -4 (1100) +-1 + -18 = -3 (1101) +-1 + -17 = -2 (1110) +-1 + -16 = -1 (1111) +-1 + -15 = 0 (0000) +-1 + -14 = 1 (0001) +-1 + -13 = 2 (0010) +-1 + -12 = 3 (0011) +-1 + -11 = 4 (0100) +-1 + -10 = 5 (0101) +-1 + -9 = 6 (0110) +-1 + -8 = 7 (0111) +-1 + -7 = -8 (1000) +-1 + -6 = -7 (1001) +-1 + -5 = -6 (1010) +-1 + -4 = -5 (1011) +-1 + -3 = -4 (1100) +-1 + -2 = -3 (1101) +-1 + -1 = -2 (1110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/main.cpp new file mode 100644 index 000000000..657543508 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 4-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 4; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector4 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/promote_truncation.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/promote_truncation.f new file mode 100644 index 000000000..90b689aca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/promote_truncation.f @@ -0,0 +1,3 @@ +promote_truncation/datawidth.cpp +promote_truncation/stimgen.cpp +promote_truncation/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/stimgen.h new file mode 100644 index 000000000..959122edf --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/common.h new file mode 100644 index 000000000..d7f26e029 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/datawidth.cpp new file mode 100644 index 000000000..6daffa7b6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector6 tmp_a; + bool_vector6 tmp_b; + bool_vector4 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_int() + tmp_b.to_int(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/datawidth.h new file mode 100644 index 000000000..98681b45a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector4& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector4& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/golden/truncation.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/golden/truncation.log new file mode 100644 index 000000000..0787b97b7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/golden/truncation.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000) +0 + 1 = 1 (0001) +0 + 2 = 2 (0010) +0 + 3 = 3 (0011) +0 + 4 = 4 (0100) +0 + 5 = 5 (0101) +0 + 6 = 6 (0110) +0 + 7 = 7 (0111) +0 + 8 = -8 (1000) +0 + 9 = -7 (1001) +0 + 10 = -6 (1010) +0 + 11 = -5 (1011) +0 + 12 = -4 (1100) +0 + 13 = -3 (1101) +0 + 14 = -2 (1110) +0 + 15 = -1 (1111) +0 + 16 = 0 (0000) +0 + 17 = 1 (0001) +0 + 18 = 2 (0010) +0 + 19 = 3 (0011) +0 + 20 = 4 (0100) +0 + 21 = 5 (0101) +0 + 22 = 6 (0110) +0 + 23 = 7 (0111) +0 + 24 = -8 (1000) +0 + 25 = -7 (1001) +0 + 26 = -6 (1010) +0 + 27 = -5 (1011) +0 + 28 = -4 (1100) +0 + 29 = -3 (1101) +0 + 30 = -2 (1110) +0 + 31 = -1 (1111) +0 + -32 = 0 (0000) +0 + -31 = 1 (0001) +0 + -30 = 2 (0010) +0 + -29 = 3 (0011) +0 + -28 = 4 (0100) +0 + -27 = 5 (0101) +0 + -26 = 6 (0110) +0 + -25 = 7 (0111) +0 + -24 = -8 (1000) +0 + -23 = -7 (1001) +0 + -22 = -6 (1010) +0 + -21 = -5 (1011) +0 + -20 = -4 (1100) +0 + -19 = -3 (1101) +0 + -18 = -2 (1110) +0 + -17 = -1 (1111) +0 + -16 = 0 (0000) +0 + -15 = 1 (0001) +0 + -14 = 2 (0010) +0 + -13 = 3 (0011) +0 + -12 = 4 (0100) +0 + -11 = 5 (0101) +0 + -10 = 6 (0110) +0 + -9 = 7 (0111) +0 + -8 = -8 (1000) +0 + -7 = -7 (1001) +0 + -6 = -6 (1010) +0 + -5 = -5 (1011) +0 + -4 = -4 (1100) +0 + -3 = -3 (1101) +0 + -2 = -2 (1110) +0 + -1 = -1 (1111) +1 + 0 = 1 (0001) +1 + 1 = 2 (0010) +1 + 2 = 3 (0011) +1 + 3 = 4 (0100) +1 + 4 = 5 (0101) +1 + 5 = 6 (0110) +1 + 6 = 7 (0111) +1 + 7 = -8 (1000) +1 + 8 = -7 (1001) +1 + 9 = -6 (1010) +1 + 10 = -5 (1011) +1 + 11 = -4 (1100) +1 + 12 = -3 (1101) +1 + 13 = -2 (1110) +1 + 14 = -1 (1111) +1 + 15 = 0 (0000) +1 + 16 = 1 (0001) +1 + 17 = 2 (0010) +1 + 18 = 3 (0011) +1 + 19 = 4 (0100) +1 + 20 = 5 (0101) +1 + 21 = 6 (0110) +1 + 22 = 7 (0111) +1 + 23 = -8 (1000) +1 + 24 = -7 (1001) +1 + 25 = -6 (1010) +1 + 26 = -5 (1011) +1 + 27 = -4 (1100) +1 + 28 = -3 (1101) +1 + 29 = -2 (1110) +1 + 30 = -1 (1111) +1 + 31 = 0 (0000) +1 + -32 = 1 (0001) +1 + -31 = 2 (0010) +1 + -30 = 3 (0011) +1 + -29 = 4 (0100) +1 + -28 = 5 (0101) +1 + -27 = 6 (0110) +1 + -26 = 7 (0111) +1 + -25 = -8 (1000) +1 + -24 = -7 (1001) +1 + -23 = -6 (1010) +1 + -22 = -5 (1011) +1 + -21 = -4 (1100) +1 + -20 = -3 (1101) +1 + -19 = -2 (1110) +1 + -18 = -1 (1111) +1 + -17 = 0 (0000) +1 + -16 = 1 (0001) +1 + -15 = 2 (0010) +1 + -14 = 3 (0011) +1 + -13 = 4 (0100) +1 + -12 = 5 (0101) +1 + -11 = 6 (0110) +1 + -10 = 7 (0111) +1 + -9 = -8 (1000) +1 + -8 = -7 (1001) +1 + -7 = -6 (1010) +1 + -6 = -5 (1011) +1 + -5 = -4 (1100) +1 + -4 = -3 (1101) +1 + -3 = -2 (1110) +1 + -2 = -1 (1111) +1 + -1 = 0 (0000) +2 + 0 = 2 (0010) +2 + 1 = 3 (0011) +2 + 2 = 4 (0100) +2 + 3 = 5 (0101) +2 + 4 = 6 (0110) +2 + 5 = 7 (0111) +2 + 6 = -8 (1000) +2 + 7 = -7 (1001) +2 + 8 = -6 (1010) +2 + 9 = -5 (1011) +2 + 10 = -4 (1100) +2 + 11 = -3 (1101) +2 + 12 = -2 (1110) +2 + 13 = -1 (1111) +2 + 14 = 0 (0000) +2 + 15 = 1 (0001) +2 + 16 = 2 (0010) +2 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+-4 + 22 = 2 (0010) +-4 + 23 = 3 (0011) +-4 + 24 = 4 (0100) +-4 + 25 = 5 (0101) +-4 + 26 = 6 (0110) +-4 + 27 = 7 (0111) +-4 + 28 = -8 (1000) +-4 + 29 = -7 (1001) +-4 + 30 = -6 (1010) +-4 + 31 = -5 (1011) +-4 + -32 = -4 (1100) +-4 + -31 = -3 (1101) +-4 + -30 = -2 (1110) +-4 + -29 = -1 (1111) +-4 + -28 = 0 (0000) +-4 + -27 = 1 (0001) +-4 + -26 = 2 (0010) +-4 + -25 = 3 (0011) +-4 + -24 = 4 (0100) +-4 + -23 = 5 (0101) +-4 + -22 = 6 (0110) +-4 + -21 = 7 (0111) +-4 + -20 = -8 (1000) +-4 + -19 = -7 (1001) +-4 + -18 = -6 (1010) +-4 + -17 = -5 (1011) +-4 + -16 = -4 (1100) +-4 + -15 = -3 (1101) +-4 + -14 = -2 (1110) +-4 + -13 = -1 (1111) +-4 + -12 = 0 (0000) +-4 + -11 = 1 (0001) +-4 + -10 = 2 (0010) +-4 + -9 = 3 (0011) +-4 + -8 = 4 (0100) +-4 + -7 = 5 (0101) +-4 + -6 = 6 (0110) +-4 + -5 = 7 (0111) +-4 + -4 = -8 (1000) +-4 + -3 = -7 (1001) +-4 + -2 = -6 (1010) +-4 + -1 = -5 (1011) +-3 + 0 = -3 (1101) +-3 + 1 = -2 (1110) +-3 + 2 = -1 (1111) +-3 + 3 = 0 (0000) +-3 + 4 = 1 (0001) +-3 + 5 = 2 (0010) +-3 + 6 = 3 (0011) +-3 + 7 = 4 (0100) +-3 + 8 = 5 (0101) +-3 + 9 = 6 (0110) +-3 + 10 = 7 (0111) +-3 + 11 = -8 (1000) +-3 + 12 = -7 (1001) +-3 + 13 = -6 (1010) +-3 + 14 = -5 (1011) +-3 + 15 = -4 (1100) +-3 + 16 = -3 (1101) +-3 + 17 = -2 (1110) +-3 + 18 = -1 (1111) +-3 + 19 = 0 (0000) +-3 + 20 = 1 (0001) +-3 + 21 = 2 (0010) +-3 + 22 = 3 (0011) +-3 + 23 = 4 (0100) +-3 + 24 = 5 (0101) +-3 + 25 = 6 (0110) +-3 + 26 = 7 (0111) +-3 + 27 = -8 (1000) +-3 + 28 = -7 (1001) +-3 + 29 = -6 (1010) +-3 + 30 = -5 (1011) +-3 + 31 = -4 (1100) +-3 + -32 = -3 (1101) +-3 + -31 = -2 (1110) +-3 + -30 = -1 (1111) +-3 + -29 = 0 (0000) +-3 + -28 = 1 (0001) +-3 + -27 = 2 (0010) +-3 + -26 = 3 (0011) +-3 + -25 = 4 (0100) +-3 + -24 = 5 (0101) +-3 + -23 = 6 (0110) +-3 + -22 = 7 (0111) +-3 + -21 = -8 (1000) +-3 + -20 = -7 (1001) +-3 + -19 = -6 (1010) +-3 + -18 = -5 (1011) +-3 + -17 = -4 (1100) +-3 + -16 = -3 (1101) +-3 + -15 = -2 (1110) +-3 + -14 = -1 (1111) +-3 + -13 = 0 (0000) +-3 + -12 = 1 (0001) +-3 + -11 = 2 (0010) +-3 + -10 = 3 (0011) +-3 + -9 = 4 (0100) +-3 + -8 = 5 (0101) +-3 + -7 = 6 (0110) +-3 + -6 = 7 (0111) +-3 + -5 = -8 (1000) +-3 + -4 = -7 (1001) +-3 + -3 = -6 (1010) +-3 + -2 = -5 (1011) +-3 + -1 = -4 (1100) +-2 + 0 = -2 (1110) +-2 + 1 = -1 (1111) +-2 + 2 = 0 (0000) +-2 + 3 = 1 (0001) +-2 + 4 = 2 (0010) +-2 + 5 = 3 (0011) +-2 + 6 = 4 (0100) +-2 + 7 = 5 (0101) +-2 + 8 = 6 (0110) +-2 + 9 = 7 (0111) +-2 + 10 = -8 (1000) +-2 + 11 = -7 (1001) +-2 + 12 = -6 (1010) +-2 + 13 = -5 (1011) +-2 + 14 = -4 (1100) +-2 + 15 = -3 (1101) +-2 + 16 = -2 (1110) +-2 + 17 = -1 (1111) +-2 + 18 = 0 (0000) +-2 + 19 = 1 (0001) +-2 + 20 = 2 (0010) +-2 + 21 = 3 (0011) +-2 + 22 = 4 (0100) +-2 + 23 = 5 (0101) +-2 + 24 = 6 (0110) +-2 + 25 = 7 (0111) +-2 + 26 = -8 (1000) +-2 + 27 = -7 (1001) +-2 + 28 = -6 (1010) +-2 + 29 = -5 (1011) +-2 + 30 = -4 (1100) +-2 + 31 = -3 (1101) +-2 + -32 = -2 (1110) +-2 + -31 = -1 (1111) +-2 + -30 = 0 (0000) +-2 + -29 = 1 (0001) +-2 + -28 = 2 (0010) +-2 + -27 = 3 (0011) +-2 + -26 = 4 (0100) +-2 + -25 = 5 (0101) +-2 + -24 = 6 (0110) +-2 + -23 = 7 (0111) +-2 + -22 = -8 (1000) +-2 + -21 = -7 (1001) +-2 + -20 = -6 (1010) +-2 + -19 = -5 (1011) +-2 + -18 = -4 (1100) +-2 + -17 = -3 (1101) +-2 + -16 = -2 (1110) +-2 + -15 = -1 (1111) +-2 + -14 = 0 (0000) +-2 + -13 = 1 (0001) +-2 + -12 = 2 (0010) +-2 + -11 = 3 (0011) +-2 + -10 = 4 (0100) +-2 + -9 = 5 (0101) +-2 + -8 = 6 (0110) +-2 + -7 = 7 (0111) +-2 + -6 = -8 (1000) +-2 + -5 = -7 (1001) +-2 + -4 = -6 (1010) +-2 + -3 = -5 (1011) +-2 + -2 = -4 (1100) +-2 + -1 = -3 (1101) +-1 + 0 = -1 (1111) +-1 + 1 = 0 (0000) +-1 + 2 = 1 (0001) +-1 + 3 = 2 (0010) +-1 + 4 = 3 (0011) +-1 + 5 = 4 (0100) +-1 + 6 = 5 (0101) +-1 + 7 = 6 (0110) +-1 + 8 = 7 (0111) +-1 + 9 = -8 (1000) +-1 + 10 = -7 (1001) +-1 + 11 = -6 (1010) +-1 + 12 = -5 (1011) +-1 + 13 = -4 (1100) +-1 + 14 = -3 (1101) +-1 + 15 = -2 (1110) +-1 + 16 = -1 (1111) +-1 + 17 = 0 (0000) +-1 + 18 = 1 (0001) +-1 + 19 = 2 (0010) +-1 + 20 = 3 (0011) +-1 + 21 = 4 (0100) +-1 + 22 = 5 (0101) +-1 + 23 = 6 (0110) +-1 + 24 = 7 (0111) +-1 + 25 = -8 (1000) +-1 + 26 = -7 (1001) +-1 + 27 = -6 (1010) +-1 + 28 = -5 (1011) +-1 + 29 = -4 (1100) +-1 + 30 = -3 (1101) +-1 + 31 = -2 (1110) +-1 + -32 = -1 (1111) +-1 + -31 = 0 (0000) +-1 + -30 = 1 (0001) +-1 + -29 = 2 (0010) +-1 + -28 = 3 (0011) +-1 + -27 = 4 (0100) +-1 + -26 = 5 (0101) +-1 + -25 = 6 (0110) +-1 + -24 = 7 (0111) +-1 + -23 = -8 (1000) +-1 + -22 = -7 (1001) +-1 + -21 = -6 (1010) +-1 + -20 = -5 (1011) +-1 + -19 = -4 (1100) +-1 + -18 = -3 (1101) +-1 + -17 = -2 (1110) +-1 + -16 = -1 (1111) +-1 + -15 = 0 (0000) +-1 + -14 = 1 (0001) +-1 + -13 = 2 (0010) +-1 + -12 = 3 (0011) +-1 + -11 = 4 (0100) +-1 + -10 = 5 (0101) +-1 + -9 = 6 (0110) +-1 + -8 = 7 (0111) +-1 + -7 = -8 (1000) +-1 + -6 = -7 (1001) +-1 + -5 = -6 (1010) +-1 + -4 = -5 (1011) +-1 + -3 = -4 (1100) +-1 + -2 = -3 (1101) +-1 + -1 = -2 (1110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/main.cpp new file mode 100644 index 000000000..be64495c4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 4-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 4; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector4 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/stimgen.h new file mode 100644 index 000000000..5a95ce7a8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/truncation.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/truncation.f new file mode 100644 index 000000000..d35040a90 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/truncation.f @@ -0,0 +1,3 @@ +truncation/datawidth.cpp +truncation/stimgen.cpp +truncation/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/README b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/README new file mode 100644 index 000000000..6d77c7cbb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/README @@ -0,0 +1,9 @@ +bits_to_bits 7-bit = 6-bit + 6-bit +lost_carry 6-bit = 6-bit + 6-bit +extension 9-bit = 6-bit + 6-bit +truncation 4-bit = 6-bit + 6-bit + +promote 7-bit = 4-bit + 6-bit +promote_lost_carry 6-bit = 4-bit + 6-bit +promote_extension 9-bit = 4-bit + 6-bit +promote_truncation 4-bit = 4-bit + 6-bit diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/bits_to_bits.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/bits_to_bits.f new file mode 100644 index 000000000..9fcbb2977 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/bits_to_bits.f @@ -0,0 +1,3 @@ +bits_to_bits/datawidth.cpp +bits_to_bits/stimgen.cpp +bits_to_bits/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/common.h new file mode 100644 index 000000000..e56acdb9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<6> bool_vector6; +typedef sc_bv<7> bool_vector7; + +typedef sc_signal signal_bool_vector6; +typedef sc_signal signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/datawidth.cpp new file mode 100644 index 000000000..c48e158c0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector6 tmp_a; + bool_vector6 tmp_b; + bool_vector7 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_uint() + tmp_b.to_uint(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/datawidth.h new file mode 100644 index 000000000..df7ca5b2e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector7& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector7& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/golden/bits_to_bits.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/golden/bits_to_bits.log new file mode 100644 index 000000000..c41483f55 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/golden/bits_to_bits.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) +16 + 0 = 16 (0010000) +16 + 1 = 17 (0010001) +16 + 2 = 18 (0010010) +16 + 3 = 19 (0010011) +16 + 4 = 20 (0010100) +16 + 5 = 21 (0010101) +16 + 6 = 22 (0010110) +16 + 7 = 23 (0010111) +16 + 8 = 24 (0011000) +16 + 9 = 25 (0011001) +16 + 10 = 26 (0011010) +16 + 11 = 27 (0011011) +16 + 12 = 28 (0011100) +16 + 13 = 29 (0011101) +16 + 14 = 30 (0011110) +16 + 15 = 31 (0011111) +16 + 16 = 32 (0100000) +16 + 17 = 33 (0100001) +16 + 18 = 34 (0100010) +16 + 19 = 35 (0100011) +16 + 20 = 36 (0100100) +16 + 21 = 37 (0100101) +16 + 22 = 38 (0100110) +16 + 23 = 39 (0100111) +16 + 24 = 40 (0101000) +16 + 25 = 41 (0101001) +16 + 26 = 42 (0101010) +16 + 27 = 43 (0101011) +16 + 28 = 44 (0101100) +16 + 29 = 45 (0101101) +16 + 30 = 46 (0101110) +16 + 31 = 47 (0101111) +16 + 32 = 48 (0110000) +16 + 33 = 49 (0110001) +16 + 34 = 50 (0110010) +16 + 35 = 51 (0110011) +16 + 36 = 52 (0110100) +16 + 37 = 53 (0110101) +16 + 38 = 54 (0110110) +16 + 39 = 55 (0110111) +16 + 40 = 56 (0111000) +16 + 41 = 57 (0111001) +16 + 42 = 58 (0111010) +16 + 43 = 59 (0111011) +16 + 44 = 60 (0111100) +16 + 45 = 61 (0111101) +16 + 46 = 62 (0111110) +16 + 47 = 63 (0111111) +16 + 48 = 64 (1000000) +16 + 49 = 65 (1000001) +16 + 50 = 66 (1000010) +16 + 51 = 67 (1000011) +16 + 52 = 68 (1000100) +16 + 53 = 69 (1000101) +16 + 54 = 70 (1000110) +16 + 55 = 71 (1000111) +16 + 56 = 72 (1001000) +16 + 57 = 73 (1001001) +16 + 58 = 74 (1001010) +16 + 59 = 75 (1001011) +16 + 60 = 76 (1001100) +16 + 61 = 77 (1001101) +16 + 62 = 78 (1001110) +16 + 63 = 79 (1001111) +17 + 0 = 17 (0010001) +17 + 1 = 18 (0010010) +17 + 2 = 19 (0010011) +17 + 3 = 20 (0010100) +17 + 4 = 21 (0010101) +17 + 5 = 22 (0010110) +17 + 6 = 23 (0010111) +17 + 7 = 24 (0011000) +17 + 8 = 25 (0011001) +17 + 9 = 26 (0011010) +17 + 10 = 27 (0011011) +17 + 11 = 28 (0011100) +17 + 12 = 29 (0011101) +17 + 13 = 30 (0011110) +17 + 14 = 31 (0011111) +17 + 15 = 32 (0100000) +17 + 16 = 33 (0100001) +17 + 17 = 34 (0100010) +17 + 18 = 35 (0100011) +17 + 19 = 36 (0100100) +17 + 20 = 37 (0100101) +17 + 21 = 38 (0100110) +17 + 22 = 39 (0100111) +17 + 23 = 40 (0101000) +17 + 24 = 41 (0101001) +17 + 25 = 42 (0101010) +17 + 26 = 43 (0101011) +17 + 27 = 44 (0101100) +17 + 28 = 45 (0101101) +17 + 29 = 46 (0101110) +17 + 30 = 47 (0101111) +17 + 31 = 48 (0110000) +17 + 32 = 49 (0110001) +17 + 33 = 50 (0110010) +17 + 34 = 51 (0110011) +17 + 35 = 52 (0110100) +17 + 36 = 53 (0110101) +17 + 37 = 54 (0110110) +17 + 38 = 55 (0110111) +17 + 39 = 56 (0111000) +17 + 40 = 57 (0111001) +17 + 41 = 58 (0111010) +17 + 42 = 59 (0111011) +17 + 43 = 60 (0111100) +17 + 44 = 61 (0111101) +17 + 45 = 62 (0111110) +17 + 46 = 63 (0111111) +17 + 47 = 64 (1000000) +17 + 48 = 65 (1000001) +17 + 49 = 66 (1000010) +17 + 50 = 67 (1000011) +17 + 51 = 68 (1000100) +17 + 52 = 69 (1000101) +17 + 53 = 70 (1000110) +17 + 54 = 71 (1000111) +17 + 55 = 72 (1001000) +17 + 56 = 73 (1001001) +17 + 57 = 74 (1001010) +17 + 58 = 75 (1001011) +17 + 59 = 76 (1001100) +17 + 60 = 77 (1001101) +17 + 61 = 78 (1001110) +17 + 62 = 79 (1001111) +17 + 63 = 80 (1010000) +18 + 0 = 18 (0010010) +18 + 1 = 19 (0010011) +18 + 2 = 20 (0010100) +18 + 3 = 21 (0010101) +18 + 4 = 22 (0010110) +18 + 5 = 23 (0010111) +18 + 6 = 24 (0011000) +18 + 7 = 25 (0011001) +18 + 8 = 26 (0011010) +18 + 9 = 27 (0011011) +18 + 10 = 28 (0011100) +18 + 11 = 29 (0011101) +18 + 12 = 30 (0011110) +18 + 13 = 31 (0011111) +18 + 14 = 32 (0100000) +18 + 15 = 33 (0100001) +18 + 16 = 34 (0100010) +18 + 17 = 35 (0100011) +18 + 18 = 36 (0100100) +18 + 19 = 37 (0100101) +18 + 20 = 38 (0100110) +18 + 21 = 39 (0100111) +18 + 22 = 40 (0101000) +18 + 23 = 41 (0101001) +18 + 24 = 42 (0101010) +18 + 25 = 43 (0101011) +18 + 26 = 44 (0101100) +18 + 27 = 45 (0101101) +18 + 28 = 46 (0101110) +18 + 29 = 47 (0101111) +18 + 30 = 48 (0110000) +18 + 31 = 49 (0110001) +18 + 32 = 50 (0110010) +18 + 33 = 51 (0110011) +18 + 34 = 52 (0110100) +18 + 35 = 53 (0110101) +18 + 36 = 54 (0110110) +18 + 37 = 55 (0110111) +18 + 38 = 56 (0111000) +18 + 39 = 57 (0111001) +18 + 40 = 58 (0111010) +18 + 41 = 59 (0111011) +18 + 42 = 60 (0111100) +18 + 43 = 61 (0111101) +18 + 44 = 62 (0111110) +18 + 45 = 63 (0111111) +18 + 46 = 64 (1000000) +18 + 47 = 65 (1000001) +18 + 48 = 66 (1000010) +18 + 49 = 67 (1000011) +18 + 50 = 68 (1000100) +18 + 51 = 69 (1000101) +18 + 52 = 70 (1000110) +18 + 53 = 71 (1000111) +18 + 54 = 72 (1001000) +18 + 55 = 73 (1001001) +18 + 56 = 74 (1001010) +18 + 57 = 75 (1001011) +18 + 58 = 76 (1001100) +18 + 59 = 77 (1001101) +18 + 60 = 78 (1001110) +18 + 61 = 79 (1001111) +18 + 62 = 80 (1010000) +18 + 63 = 81 (1010001) +19 + 0 = 19 (0010011) +19 + 1 = 20 (0010100) +19 + 2 = 21 (0010101) +19 + 3 = 22 (0010110) +19 + 4 = 23 (0010111) +19 + 5 = 24 (0011000) +19 + 6 = 25 (0011001) +19 + 7 = 26 (0011010) +19 + 8 = 27 (0011011) +19 + 9 = 28 (0011100) +19 + 10 = 29 (0011101) +19 + 11 = 30 (0011110) +19 + 12 = 31 (0011111) +19 + 13 = 32 (0100000) +19 + 14 = 33 (0100001) +19 + 15 = 34 (0100010) +19 + 16 = 35 (0100011) +19 + 17 = 36 (0100100) +19 + 18 = 37 (0100101) +19 + 19 = 38 (0100110) +19 + 20 = 39 (0100111) +19 + 21 = 40 (0101000) +19 + 22 = 41 (0101001) +19 + 23 = 42 (0101010) +19 + 24 = 43 (0101011) +19 + 25 = 44 (0101100) +19 + 26 = 45 (0101101) +19 + 27 = 46 (0101110) +19 + 28 = 47 (0101111) +19 + 29 = 48 (0110000) +19 + 30 = 49 (0110001) +19 + 31 = 50 (0110010) +19 + 32 = 51 (0110011) +19 + 33 = 52 (0110100) +19 + 34 = 53 (0110101) +19 + 35 = 54 (0110110) +19 + 36 = 55 (0110111) +19 + 37 = 56 (0111000) +19 + 38 = 57 (0111001) +19 + 39 = 58 (0111010) +19 + 40 = 59 (0111011) +19 + 41 = 60 (0111100) +19 + 42 = 61 (0111101) +19 + 43 = 62 (0111110) +19 + 44 = 63 (0111111) +19 + 45 = 64 (1000000) +19 + 46 = 65 (1000001) +19 + 47 = 66 (1000010) +19 + 48 = 67 (1000011) +19 + 49 = 68 (1000100) +19 + 50 = 69 (1000101) +19 + 51 = 70 (1000110) +19 + 52 = 71 (1000111) +19 + 53 = 72 (1001000) +19 + 54 = 73 (1001001) +19 + 55 = 74 (1001010) +19 + 56 = 75 (1001011) +19 + 57 = 76 (1001100) +19 + 58 = 77 (1001101) +19 + 59 = 78 (1001110) +19 + 60 = 79 (1001111) +19 + 61 = 80 (1010000) +19 + 62 = 81 (1010001) +19 + 63 = 82 (1010010) +20 + 0 = 20 (0010100) +20 + 1 = 21 (0010101) +20 + 2 = 22 (0010110) +20 + 3 = 23 (0010111) +20 + 4 = 24 (0011000) +20 + 5 = 25 (0011001) +20 + 6 = 26 (0011010) +20 + 7 = 27 (0011011) +20 + 8 = 28 (0011100) +20 + 9 = 29 (0011101) +20 + 10 = 30 (0011110) +20 + 11 = 31 (0011111) +20 + 12 = 32 (0100000) +20 + 13 = 33 (0100001) +20 + 14 = 34 (0100010) +20 + 15 = 35 (0100011) +20 + 16 = 36 (0100100) +20 + 17 = 37 (0100101) +20 + 18 = 38 (0100110) +20 + 19 = 39 (0100111) +20 + 20 = 40 (0101000) +20 + 21 = 41 (0101001) +20 + 22 = 42 (0101010) +20 + 23 = 43 (0101011) +20 + 24 = 44 (0101100) +20 + 25 = 45 (0101101) +20 + 26 = 46 (0101110) +20 + 27 = 47 (0101111) +20 + 28 = 48 (0110000) +20 + 29 = 49 (0110001) +20 + 30 = 50 (0110010) +20 + 31 = 51 (0110011) +20 + 32 = 52 (0110100) +20 + 33 = 53 (0110101) +20 + 34 = 54 (0110110) +20 + 35 = 55 (0110111) +20 + 36 = 56 (0111000) +20 + 37 = 57 (0111001) +20 + 38 = 58 (0111010) +20 + 39 = 59 (0111011) +20 + 40 = 60 (0111100) +20 + 41 = 61 (0111101) +20 + 42 = 62 (0111110) +20 + 43 = 63 (0111111) +20 + 44 = 64 (1000000) +20 + 45 = 65 (1000001) +20 + 46 = 66 (1000010) +20 + 47 = 67 (1000011) +20 + 48 = 68 (1000100) +20 + 49 = 69 (1000101) +20 + 50 = 70 (1000110) +20 + 51 = 71 (1000111) +20 + 52 = 72 (1001000) +20 + 53 = 73 (1001001) +20 + 54 = 74 (1001010) +20 + 55 = 75 (1001011) +20 + 56 = 76 (1001100) +20 + 57 = 77 (1001101) +20 + 58 = 78 (1001110) +20 + 59 = 79 (1001111) +20 + 60 = 80 (1010000) +20 + 61 = 81 (1010001) +20 + 62 = 82 (1010010) +20 + 63 = 83 (1010011) +21 + 0 = 21 (0010101) +21 + 1 = 22 (0010110) +21 + 2 = 23 (0010111) +21 + 3 = 24 (0011000) +21 + 4 = 25 (0011001) +21 + 5 = 26 (0011010) +21 + 6 = 27 (0011011) +21 + 7 = 28 (0011100) +21 + 8 = 29 (0011101) +21 + 9 = 30 (0011110) +21 + 10 = 31 (0011111) +21 + 11 = 32 (0100000) +21 + 12 = 33 (0100001) +21 + 13 = 34 (0100010) +21 + 14 = 35 (0100011) +21 + 15 = 36 (0100100) +21 + 16 = 37 (0100101) +21 + 17 = 38 (0100110) +21 + 18 = 39 (0100111) +21 + 19 = 40 (0101000) +21 + 20 = 41 (0101001) +21 + 21 = 42 (0101010) +21 + 22 = 43 (0101011) +21 + 23 = 44 (0101100) +21 + 24 = 45 (0101101) +21 + 25 = 46 (0101110) +21 + 26 = 47 (0101111) +21 + 27 = 48 (0110000) +21 + 28 = 49 (0110001) +21 + 29 = 50 (0110010) +21 + 30 = 51 (0110011) +21 + 31 = 52 (0110100) +21 + 32 = 53 (0110101) +21 + 33 = 54 (0110110) +21 + 34 = 55 (0110111) +21 + 35 = 56 (0111000) +21 + 36 = 57 (0111001) +21 + 37 = 58 (0111010) +21 + 38 = 59 (0111011) +21 + 39 = 60 (0111100) +21 + 40 = 61 (0111101) +21 + 41 = 62 (0111110) +21 + 42 = 63 (0111111) +21 + 43 = 64 (1000000) +21 + 44 = 65 (1000001) +21 + 45 = 66 (1000010) +21 + 46 = 67 (1000011) +21 + 47 = 68 (1000100) +21 + 48 = 69 (1000101) +21 + 49 = 70 (1000110) +21 + 50 = 71 (1000111) +21 + 51 = 72 (1001000) +21 + 52 = 73 (1001001) +21 + 53 = 74 (1001010) +21 + 54 = 75 (1001011) +21 + 55 = 76 (1001100) +21 + 56 = 77 (1001101) +21 + 57 = 78 (1001110) +21 + 58 = 79 (1001111) +21 + 59 = 80 (1010000) +21 + 60 = 81 (1010001) +21 + 61 = 82 (1010010) +21 + 62 = 83 (1010011) +21 + 63 = 84 (1010100) +22 + 0 = 22 (0010110) +22 + 1 = 23 (0010111) +22 + 2 = 24 (0011000) +22 + 3 = 25 (0011001) +22 + 4 = 26 (0011010) +22 + 5 = 27 (0011011) +22 + 6 = 28 (0011100) +22 + 7 = 29 (0011101) +22 + 8 = 30 (0011110) +22 + 9 = 31 (0011111) +22 + 10 = 32 (0100000) +22 + 11 = 33 (0100001) +22 + 12 = 34 (0100010) +22 + 13 = 35 (0100011) +22 + 14 = 36 (0100100) +22 + 15 = 37 (0100101) +22 + 16 = 38 (0100110) +22 + 17 = 39 (0100111) +22 + 18 = 40 (0101000) +22 + 19 = 41 (0101001) +22 + 20 = 42 (0101010) +22 + 21 = 43 (0101011) +22 + 22 = 44 (0101100) +22 + 23 = 45 (0101101) +22 + 24 = 46 (0101110) +22 + 25 = 47 (0101111) +22 + 26 = 48 (0110000) +22 + 27 = 49 (0110001) +22 + 28 = 50 (0110010) +22 + 29 = 51 (0110011) +22 + 30 = 52 (0110100) +22 + 31 = 53 (0110101) +22 + 32 = 54 (0110110) +22 + 33 = 55 (0110111) +22 + 34 = 56 (0111000) +22 + 35 = 57 (0111001) +22 + 36 = 58 (0111010) +22 + 37 = 59 (0111011) +22 + 38 = 60 (0111100) +22 + 39 = 61 (0111101) +22 + 40 = 62 (0111110) +22 + 41 = 63 (0111111) +22 + 42 = 64 (1000000) +22 + 43 = 65 (1000001) +22 + 44 = 66 (1000010) +22 + 45 = 67 (1000011) +22 + 46 = 68 (1000100) +22 + 47 = 69 (1000101) +22 + 48 = 70 (1000110) +22 + 49 = 71 (1000111) +22 + 50 = 72 (1001000) +22 + 51 = 73 (1001001) +22 + 52 = 74 (1001010) +22 + 53 = 75 (1001011) +22 + 54 = 76 (1001100) +22 + 55 = 77 (1001101) +22 + 56 = 78 (1001110) +22 + 57 = 79 (1001111) +22 + 58 = 80 (1010000) +22 + 59 = 81 (1010001) +22 + 60 = 82 (1010010) +22 + 61 = 83 (1010011) +22 + 62 = 84 (1010100) +22 + 63 = 85 (1010101) +23 + 0 = 23 (0010111) +23 + 1 = 24 (0011000) +23 + 2 = 25 (0011001) +23 + 3 = 26 (0011010) +23 + 4 = 27 (0011011) +23 + 5 = 28 (0011100) +23 + 6 = 29 (0011101) +23 + 7 = 30 (0011110) +23 + 8 = 31 (0011111) +23 + 9 = 32 (0100000) +23 + 10 = 33 (0100001) +23 + 11 = 34 (0100010) +23 + 12 = 35 (0100011) +23 + 13 = 36 (0100100) +23 + 14 = 37 (0100101) +23 + 15 = 38 (0100110) +23 + 16 = 39 (0100111) +23 + 17 = 40 (0101000) +23 + 18 = 41 (0101001) +23 + 19 = 42 (0101010) +23 + 20 = 43 (0101011) +23 + 21 = 44 (0101100) +23 + 22 = 45 (0101101) +23 + 23 = 46 (0101110) +23 + 24 = 47 (0101111) +23 + 25 = 48 (0110000) +23 + 26 = 49 (0110001) +23 + 27 = 50 (0110010) +23 + 28 = 51 (0110011) +23 + 29 = 52 (0110100) +23 + 30 = 53 (0110101) +23 + 31 = 54 (0110110) +23 + 32 = 55 (0110111) +23 + 33 = 56 (0111000) +23 + 34 = 57 (0111001) +23 + 35 = 58 (0111010) +23 + 36 = 59 (0111011) +23 + 37 = 60 (0111100) +23 + 38 = 61 (0111101) +23 + 39 = 62 (0111110) +23 + 40 = 63 (0111111) +23 + 41 = 64 (1000000) +23 + 42 = 65 (1000001) +23 + 43 = 66 (1000010) +23 + 44 = 67 (1000011) +23 + 45 = 68 (1000100) +23 + 46 = 69 (1000101) +23 + 47 = 70 (1000110) +23 + 48 = 71 (1000111) +23 + 49 = 72 (1001000) +23 + 50 = 73 (1001001) +23 + 51 = 74 (1001010) +23 + 52 = 75 (1001011) +23 + 53 = 76 (1001100) +23 + 54 = 77 (1001101) +23 + 55 = 78 (1001110) +23 + 56 = 79 (1001111) +23 + 57 = 80 (1010000) +23 + 58 = 81 (1010001) +23 + 59 = 82 (1010010) +23 + 60 = 83 (1010011) +23 + 61 = 84 (1010100) +23 + 62 = 85 (1010101) +23 + 63 = 86 (1010110) +24 + 0 = 24 (0011000) +24 + 1 = 25 (0011001) +24 + 2 = 26 (0011010) +24 + 3 = 27 (0011011) +24 + 4 = 28 (0011100) +24 + 5 = 29 (0011101) +24 + 6 = 30 (0011110) +24 + 7 = 31 (0011111) +24 + 8 = 32 (0100000) +24 + 9 = 33 (0100001) +24 + 10 = 34 (0100010) +24 + 11 = 35 (0100011) +24 + 12 = 36 (0100100) +24 + 13 = 37 (0100101) +24 + 14 = 38 (0100110) +24 + 15 = 39 (0100111) +24 + 16 = 40 (0101000) +24 + 17 = 41 (0101001) +24 + 18 = 42 (0101010) +24 + 19 = 43 (0101011) +24 + 20 = 44 (0101100) +24 + 21 = 45 (0101101) +24 + 22 = 46 (0101110) +24 + 23 = 47 (0101111) +24 + 24 = 48 (0110000) +24 + 25 = 49 (0110001) +24 + 26 = 50 (0110010) +24 + 27 = 51 (0110011) +24 + 28 = 52 (0110100) +24 + 29 = 53 (0110101) +24 + 30 = 54 (0110110) +24 + 31 = 55 (0110111) +24 + 32 = 56 (0111000) +24 + 33 = 57 (0111001) +24 + 34 = 58 (0111010) +24 + 35 = 59 (0111011) +24 + 36 = 60 (0111100) +24 + 37 = 61 (0111101) +24 + 38 = 62 (0111110) +24 + 39 = 63 (0111111) +24 + 40 = 64 (1000000) +24 + 41 = 65 (1000001) +24 + 42 = 66 (1000010) +24 + 43 = 67 (1000011) +24 + 44 = 68 (1000100) +24 + 45 = 69 (1000101) +24 + 46 = 70 (1000110) +24 + 47 = 71 (1000111) +24 + 48 = 72 (1001000) +24 + 49 = 73 (1001001) +24 + 50 = 74 (1001010) +24 + 51 = 75 (1001011) +24 + 52 = 76 (1001100) +24 + 53 = 77 (1001101) +24 + 54 = 78 (1001110) +24 + 55 = 79 (1001111) +24 + 56 = 80 (1010000) +24 + 57 = 81 (1010001) +24 + 58 = 82 (1010010) +24 + 59 = 83 (1010011) +24 + 60 = 84 (1010100) +24 + 61 = 85 (1010101) +24 + 62 = 86 (1010110) +24 + 63 = 87 (1010111) +25 + 0 = 25 (0011001) +25 + 1 = 26 (0011010) +25 + 2 = 27 (0011011) +25 + 3 = 28 (0011100) +25 + 4 = 29 (0011101) +25 + 5 = 30 (0011110) +25 + 6 = 31 (0011111) +25 + 7 = 32 (0100000) +25 + 8 = 33 (0100001) +25 + 9 = 34 (0100010) +25 + 10 = 35 (0100011) +25 + 11 = 36 (0100100) +25 + 12 = 37 (0100101) +25 + 13 = 38 (0100110) +25 + 14 = 39 (0100111) +25 + 15 = 40 (0101000) +25 + 16 = 41 (0101001) +25 + 17 = 42 (0101010) +25 + 18 = 43 (0101011) +25 + 19 = 44 (0101100) +25 + 20 = 45 (0101101) +25 + 21 = 46 (0101110) +25 + 22 = 47 (0101111) +25 + 23 = 48 (0110000) +25 + 24 = 49 (0110001) +25 + 25 = 50 (0110010) +25 + 26 = 51 (0110011) +25 + 27 = 52 (0110100) +25 + 28 = 53 (0110101) +25 + 29 = 54 (0110110) +25 + 30 = 55 (0110111) +25 + 31 = 56 (0111000) +25 + 32 = 57 (0111001) +25 + 33 = 58 (0111010) +25 + 34 = 59 (0111011) +25 + 35 = 60 (0111100) +25 + 36 = 61 (0111101) +25 + 37 = 62 (0111110) +25 + 38 = 63 (0111111) +25 + 39 = 64 (1000000) +25 + 40 = 65 (1000001) +25 + 41 = 66 (1000010) +25 + 42 = 67 (1000011) +25 + 43 = 68 (1000100) +25 + 44 = 69 (1000101) +25 + 45 = 70 (1000110) +25 + 46 = 71 (1000111) +25 + 47 = 72 (1001000) +25 + 48 = 73 (1001001) +25 + 49 = 74 (1001010) +25 + 50 = 75 (1001011) +25 + 51 = 76 (1001100) +25 + 52 = 77 (1001101) +25 + 53 = 78 (1001110) +25 + 54 = 79 (1001111) +25 + 55 = 80 (1010000) +25 + 56 = 81 (1010001) +25 + 57 = 82 (1010010) +25 + 58 = 83 (1010011) +25 + 59 = 84 (1010100) +25 + 60 = 85 (1010101) +25 + 61 = 86 (1010110) +25 + 62 = 87 (1010111) +25 + 63 = 88 (1011000) +26 + 0 = 26 (0011010) +26 + 1 = 27 (0011011) +26 + 2 = 28 (0011100) +26 + 3 = 29 (0011101) +26 + 4 = 30 (0011110) +26 + 5 = 31 (0011111) +26 + 6 = 32 (0100000) +26 + 7 = 33 (0100001) +26 + 8 = 34 (0100010) +26 + 9 = 35 (0100011) +26 + 10 = 36 (0100100) +26 + 11 = 37 (0100101) +26 + 12 = 38 (0100110) +26 + 13 = 39 (0100111) +26 + 14 = 40 (0101000) +26 + 15 = 41 (0101001) +26 + 16 = 42 (0101010) +26 + 17 = 43 (0101011) +26 + 18 = 44 (0101100) +26 + 19 = 45 (0101101) +26 + 20 = 46 (0101110) +26 + 21 = 47 (0101111) +26 + 22 = 48 (0110000) +26 + 23 = 49 (0110001) +26 + 24 = 50 (0110010) +26 + 25 = 51 (0110011) +26 + 26 = 52 (0110100) +26 + 27 = 53 (0110101) +26 + 28 = 54 (0110110) +26 + 29 = 55 (0110111) +26 + 30 = 56 (0111000) +26 + 31 = 57 (0111001) +26 + 32 = 58 (0111010) +26 + 33 = 59 (0111011) +26 + 34 = 60 (0111100) +26 + 35 = 61 (0111101) +26 + 36 = 62 (0111110) +26 + 37 = 63 (0111111) +26 + 38 = 64 (1000000) +26 + 39 = 65 (1000001) +26 + 40 = 66 (1000010) +26 + 41 = 67 (1000011) +26 + 42 = 68 (1000100) +26 + 43 = 69 (1000101) +26 + 44 = 70 (1000110) +26 + 45 = 71 (1000111) +26 + 46 = 72 (1001000) +26 + 47 = 73 (1001001) +26 + 48 = 74 (1001010) +26 + 49 = 75 (1001011) +26 + 50 = 76 (1001100) +26 + 51 = 77 (1001101) +26 + 52 = 78 (1001110) +26 + 53 = 79 (1001111) +26 + 54 = 80 (1010000) +26 + 55 = 81 (1010001) +26 + 56 = 82 (1010010) +26 + 57 = 83 (1010011) +26 + 58 = 84 (1010100) +26 + 59 = 85 (1010101) +26 + 60 = 86 (1010110) +26 + 61 = 87 (1010111) +26 + 62 = 88 (1011000) +26 + 63 = 89 (1011001) +27 + 0 = 27 (0011011) +27 + 1 = 28 (0011100) +27 + 2 = 29 (0011101) +27 + 3 = 30 (0011110) +27 + 4 = 31 (0011111) +27 + 5 = 32 (0100000) +27 + 6 = 33 (0100001) +27 + 7 = 34 (0100010) +27 + 8 = 35 (0100011) +27 + 9 = 36 (0100100) +27 + 10 = 37 (0100101) +27 + 11 = 38 (0100110) +27 + 12 = 39 (0100111) +27 + 13 = 40 (0101000) +27 + 14 = 41 (0101001) +27 + 15 = 42 (0101010) +27 + 16 = 43 (0101011) +27 + 17 = 44 (0101100) +27 + 18 = 45 (0101101) +27 + 19 = 46 (0101110) +27 + 20 = 47 (0101111) +27 + 21 = 48 (0110000) +27 + 22 = 49 (0110001) +27 + 23 = 50 (0110010) +27 + 24 = 51 (0110011) +27 + 25 = 52 (0110100) +27 + 26 = 53 (0110101) +27 + 27 = 54 (0110110) +27 + 28 = 55 (0110111) +27 + 29 = 56 (0111000) +27 + 30 = 57 (0111001) +27 + 31 = 58 (0111010) +27 + 32 = 59 (0111011) +27 + 33 = 60 (0111100) +27 + 34 = 61 (0111101) +27 + 35 = 62 (0111110) +27 + 36 = 63 (0111111) +27 + 37 = 64 (1000000) +27 + 38 = 65 (1000001) +27 + 39 = 66 (1000010) +27 + 40 = 67 (1000011) +27 + 41 = 68 (1000100) +27 + 42 = 69 (1000101) +27 + 43 = 70 (1000110) +27 + 44 = 71 (1000111) +27 + 45 = 72 (1001000) +27 + 46 = 73 (1001001) +27 + 47 = 74 (1001010) +27 + 48 = 75 (1001011) +27 + 49 = 76 (1001100) +27 + 50 = 77 (1001101) +27 + 51 = 78 (1001110) +27 + 52 = 79 (1001111) +27 + 53 = 80 (1010000) +27 + 54 = 81 (1010001) +27 + 55 = 82 (1010010) +27 + 56 = 83 (1010011) +27 + 57 = 84 (1010100) +27 + 58 = 85 (1010101) +27 + 59 = 86 (1010110) +27 + 60 = 87 (1010111) +27 + 61 = 88 (1011000) +27 + 62 = 89 (1011001) +27 + 63 = 90 (1011010) +28 + 0 = 28 (0011100) +28 + 1 = 29 (0011101) +28 + 2 = 30 (0011110) +28 + 3 = 31 (0011111) +28 + 4 = 32 (0100000) +28 + 5 = 33 (0100001) +28 + 6 = 34 (0100010) +28 + 7 = 35 (0100011) +28 + 8 = 36 (0100100) +28 + 9 = 37 (0100101) +28 + 10 = 38 (0100110) +28 + 11 = 39 (0100111) +28 + 12 = 40 (0101000) +28 + 13 = 41 (0101001) +28 + 14 = 42 (0101010) +28 + 15 = 43 (0101011) +28 + 16 = 44 (0101100) +28 + 17 = 45 (0101101) +28 + 18 = 46 (0101110) +28 + 19 = 47 (0101111) +28 + 20 = 48 (0110000) +28 + 21 = 49 (0110001) +28 + 22 = 50 (0110010) +28 + 23 = 51 (0110011) +28 + 24 = 52 (0110100) +28 + 25 = 53 (0110101) +28 + 26 = 54 (0110110) +28 + 27 = 55 (0110111) +28 + 28 = 56 (0111000) +28 + 29 = 57 (0111001) +28 + 30 = 58 (0111010) +28 + 31 = 59 (0111011) +28 + 32 = 60 (0111100) +28 + 33 = 61 (0111101) +28 + 34 = 62 (0111110) +28 + 35 = 63 (0111111) +28 + 36 = 64 (1000000) +28 + 37 = 65 (1000001) +28 + 38 = 66 (1000010) +28 + 39 = 67 (1000011) +28 + 40 = 68 (1000100) +28 + 41 = 69 (1000101) +28 + 42 = 70 (1000110) +28 + 43 = 71 (1000111) +28 + 44 = 72 (1001000) +28 + 45 = 73 (1001001) +28 + 46 = 74 (1001010) +28 + 47 = 75 (1001011) +28 + 48 = 76 (1001100) +28 + 49 = 77 (1001101) +28 + 50 = 78 (1001110) +28 + 51 = 79 (1001111) +28 + 52 = 80 (1010000) +28 + 53 = 81 (1010001) +28 + 54 = 82 (1010010) +28 + 55 = 83 (1010011) +28 + 56 = 84 (1010100) +28 + 57 = 85 (1010101) +28 + 58 = 86 (1010110) +28 + 59 = 87 (1010111) +28 + 60 = 88 (1011000) +28 + 61 = 89 (1011001) +28 + 62 = 90 (1011010) +28 + 63 = 91 (1011011) +29 + 0 = 29 (0011101) +29 + 1 = 30 (0011110) +29 + 2 = 31 (0011111) +29 + 3 = 32 (0100000) +29 + 4 = 33 (0100001) +29 + 5 = 34 (0100010) +29 + 6 = 35 (0100011) +29 + 7 = 36 (0100100) +29 + 8 = 37 (0100101) +29 + 9 = 38 (0100110) +29 + 10 = 39 (0100111) +29 + 11 = 40 (0101000) +29 + 12 = 41 (0101001) +29 + 13 = 42 (0101010) +29 + 14 = 43 (0101011) +29 + 15 = 44 (0101100) +29 + 16 = 45 (0101101) +29 + 17 = 46 (0101110) +29 + 18 = 47 (0101111) +29 + 19 = 48 (0110000) +29 + 20 = 49 (0110001) +29 + 21 = 50 (0110010) +29 + 22 = 51 (0110011) +29 + 23 = 52 (0110100) +29 + 24 = 53 (0110101) +29 + 25 = 54 (0110110) +29 + 26 = 55 (0110111) +29 + 27 = 56 (0111000) +29 + 28 = 57 (0111001) +29 + 29 = 58 (0111010) +29 + 30 = 59 (0111011) +29 + 31 = 60 (0111100) +29 + 32 = 61 (0111101) +29 + 33 = 62 (0111110) +29 + 34 = 63 (0111111) +29 + 35 = 64 (1000000) +29 + 36 = 65 (1000001) +29 + 37 = 66 (1000010) +29 + 38 = 67 (1000011) +29 + 39 = 68 (1000100) +29 + 40 = 69 (1000101) +29 + 41 = 70 (1000110) +29 + 42 = 71 (1000111) +29 + 43 = 72 (1001000) +29 + 44 = 73 (1001001) +29 + 45 = 74 (1001010) +29 + 46 = 75 (1001011) +29 + 47 = 76 (1001100) +29 + 48 = 77 (1001101) +29 + 49 = 78 (1001110) +29 + 50 = 79 (1001111) +29 + 51 = 80 (1010000) +29 + 52 = 81 (1010001) +29 + 53 = 82 (1010010) +29 + 54 = 83 (1010011) +29 + 55 = 84 (1010100) +29 + 56 = 85 (1010101) +29 + 57 = 86 (1010110) +29 + 58 = 87 (1010111) +29 + 59 = 88 (1011000) +29 + 60 = 89 (1011001) +29 + 61 = 90 (1011010) +29 + 62 = 91 (1011011) +29 + 63 = 92 (1011100) +30 + 0 = 30 (0011110) +30 + 1 = 31 (0011111) +30 + 2 = 32 (0100000) +30 + 3 = 33 (0100001) +30 + 4 = 34 (0100010) +30 + 5 = 35 (0100011) +30 + 6 = 36 (0100100) +30 + 7 = 37 (0100101) +30 + 8 = 38 (0100110) +30 + 9 = 39 (0100111) +30 + 10 = 40 (0101000) +30 + 11 = 41 (0101001) +30 + 12 = 42 (0101010) +30 + 13 = 43 (0101011) +30 + 14 = 44 (0101100) +30 + 15 = 45 (0101101) +30 + 16 = 46 (0101110) +30 + 17 = 47 (0101111) +30 + 18 = 48 (0110000) +30 + 19 = 49 (0110001) +30 + 20 = 50 (0110010) +30 + 21 = 51 (0110011) +30 + 22 = 52 (0110100) +30 + 23 = 53 (0110101) +30 + 24 = 54 (0110110) +30 + 25 = 55 (0110111) +30 + 26 = 56 (0111000) +30 + 27 = 57 (0111001) +30 + 28 = 58 (0111010) +30 + 29 = 59 (0111011) +30 + 30 = 60 (0111100) +30 + 31 = 61 (0111101) +30 + 32 = 62 (0111110) +30 + 33 = 63 (0111111) +30 + 34 = 64 (1000000) +30 + 35 = 65 (1000001) +30 + 36 = 66 (1000010) +30 + 37 = 67 (1000011) +30 + 38 = 68 (1000100) +30 + 39 = 69 (1000101) +30 + 40 = 70 (1000110) +30 + 41 = 71 (1000111) +30 + 42 = 72 (1001000) +30 + 43 = 73 (1001001) +30 + 44 = 74 (1001010) +30 + 45 = 75 (1001011) +30 + 46 = 76 (1001100) +30 + 47 = 77 (1001101) +30 + 48 = 78 (1001110) +30 + 49 = 79 (1001111) +30 + 50 = 80 (1010000) +30 + 51 = 81 (1010001) +30 + 52 = 82 (1010010) +30 + 53 = 83 (1010011) +30 + 54 = 84 (1010100) +30 + 55 = 85 (1010101) +30 + 56 = 86 (1010110) +30 + 57 = 87 (1010111) +30 + 58 = 88 (1011000) +30 + 59 = 89 (1011001) +30 + 60 = 90 (1011010) +30 + 61 = 91 (1011011) +30 + 62 = 92 (1011100) +30 + 63 = 93 (1011101) +31 + 0 = 31 (0011111) +31 + 1 = 32 (0100000) +31 + 2 = 33 (0100001) +31 + 3 = 34 (0100010) +31 + 4 = 35 (0100011) +31 + 5 = 36 (0100100) +31 + 6 = 37 (0100101) +31 + 7 = 38 (0100110) +31 + 8 = 39 (0100111) +31 + 9 = 40 (0101000) +31 + 10 = 41 (0101001) +31 + 11 = 42 (0101010) +31 + 12 = 43 (0101011) +31 + 13 = 44 (0101100) +31 + 14 = 45 (0101101) +31 + 15 = 46 (0101110) +31 + 16 = 47 (0101111) +31 + 17 = 48 (0110000) +31 + 18 = 49 (0110001) +31 + 19 = 50 (0110010) +31 + 20 = 51 (0110011) +31 + 21 = 52 (0110100) +31 + 22 = 53 (0110101) +31 + 23 = 54 (0110110) +31 + 24 = 55 (0110111) +31 + 25 = 56 (0111000) +31 + 26 = 57 (0111001) +31 + 27 = 58 (0111010) +31 + 28 = 59 (0111011) +31 + 29 = 60 (0111100) +31 + 30 = 61 (0111101) +31 + 31 = 62 (0111110) +31 + 32 = 63 (0111111) +31 + 33 = 64 (1000000) +31 + 34 = 65 (1000001) +31 + 35 = 66 (1000010) +31 + 36 = 67 (1000011) +31 + 37 = 68 (1000100) +31 + 38 = 69 (1000101) +31 + 39 = 70 (1000110) +31 + 40 = 71 (1000111) +31 + 41 = 72 (1001000) +31 + 42 = 73 (1001001) +31 + 43 = 74 (1001010) +31 + 44 = 75 (1001011) +31 + 45 = 76 (1001100) +31 + 46 = 77 (1001101) +31 + 47 = 78 (1001110) +31 + 48 = 79 (1001111) +31 + 49 = 80 (1010000) +31 + 50 = 81 (1010001) +31 + 51 = 82 (1010010) +31 + 52 = 83 (1010011) +31 + 53 = 84 (1010100) +31 + 54 = 85 (1010101) +31 + 55 = 86 (1010110) +31 + 56 = 87 (1010111) +31 + 57 = 88 (1011000) +31 + 58 = 89 (1011001) +31 + 59 = 90 (1011010) +31 + 60 = 91 (1011011) +31 + 61 = 92 (1011100) +31 + 62 = 93 (1011101) +31 + 63 = 94 (1011110) +32 + 0 = 32 (0100000) +32 + 1 = 33 (0100001) +32 + 2 = 34 (0100010) +32 + 3 = 35 (0100011) +32 + 4 = 36 (0100100) +32 + 5 = 37 (0100101) +32 + 6 = 38 (0100110) +32 + 7 = 39 (0100111) +32 + 8 = 40 (0101000) +32 + 9 = 41 (0101001) +32 + 10 = 42 (0101010) +32 + 11 = 43 (0101011) +32 + 12 = 44 (0101100) +32 + 13 = 45 (0101101) +32 + 14 = 46 (0101110) +32 + 15 = 47 (0101111) +32 + 16 = 48 (0110000) +32 + 17 = 49 (0110001) +32 + 18 = 50 (0110010) +32 + 19 = 51 (0110011) +32 + 20 = 52 (0110100) +32 + 21 = 53 (0110101) +32 + 22 = 54 (0110110) +32 + 23 = 55 (0110111) +32 + 24 = 56 (0111000) +32 + 25 = 57 (0111001) +32 + 26 = 58 (0111010) +32 + 27 = 59 (0111011) +32 + 28 = 60 (0111100) +32 + 29 = 61 (0111101) +32 + 30 = 62 (0111110) +32 + 31 = 63 (0111111) +32 + 32 = 64 (1000000) +32 + 33 = 65 (1000001) +32 + 34 = 66 (1000010) +32 + 35 = 67 (1000011) +32 + 36 = 68 (1000100) +32 + 37 = 69 (1000101) +32 + 38 = 70 (1000110) +32 + 39 = 71 (1000111) +32 + 40 = 72 (1001000) +32 + 41 = 73 (1001001) +32 + 42 = 74 (1001010) +32 + 43 = 75 (1001011) +32 + 44 = 76 (1001100) +32 + 45 = 77 (1001101) +32 + 46 = 78 (1001110) +32 + 47 = 79 (1001111) +32 + 48 = 80 (1010000) +32 + 49 = 81 (1010001) +32 + 50 = 82 (1010010) +32 + 51 = 83 (1010011) +32 + 52 = 84 (1010100) +32 + 53 = 85 (1010101) +32 + 54 = 86 (1010110) +32 + 55 = 87 (1010111) +32 + 56 = 88 (1011000) +32 + 57 = 89 (1011001) +32 + 58 = 90 (1011010) +32 + 59 = 91 (1011011) +32 + 60 = 92 (1011100) +32 + 61 = 93 (1011101) +32 + 62 = 94 (1011110) +32 + 63 = 95 (1011111) +33 + 0 = 33 (0100001) +33 + 1 = 34 (0100010) +33 + 2 = 35 (0100011) +33 + 3 = 36 (0100100) +33 + 4 = 37 (0100101) +33 + 5 = 38 (0100110) +33 + 6 = 39 (0100111) +33 + 7 = 40 (0101000) +33 + 8 = 41 (0101001) +33 + 9 = 42 (0101010) +33 + 10 = 43 (0101011) +33 + 11 = 44 (0101100) +33 + 12 = 45 (0101101) +33 + 13 = 46 (0101110) +33 + 14 = 47 (0101111) +33 + 15 = 48 (0110000) +33 + 16 = 49 (0110001) +33 + 17 = 50 (0110010) +33 + 18 = 51 (0110011) +33 + 19 = 52 (0110100) +33 + 20 = 53 (0110101) +33 + 21 = 54 (0110110) +33 + 22 = 55 (0110111) +33 + 23 = 56 (0111000) +33 + 24 = 57 (0111001) +33 + 25 = 58 (0111010) +33 + 26 = 59 (0111011) +33 + 27 = 60 (0111100) +33 + 28 = 61 (0111101) +33 + 29 = 62 (0111110) +33 + 30 = 63 (0111111) +33 + 31 = 64 (1000000) +33 + 32 = 65 (1000001) +33 + 33 = 66 (1000010) +33 + 34 = 67 (1000011) +33 + 35 = 68 (1000100) +33 + 36 = 69 (1000101) +33 + 37 = 70 (1000110) +33 + 38 = 71 (1000111) +33 + 39 = 72 (1001000) +33 + 40 = 73 (1001001) +33 + 41 = 74 (1001010) +33 + 42 = 75 (1001011) +33 + 43 = 76 (1001100) +33 + 44 = 77 (1001101) +33 + 45 = 78 (1001110) +33 + 46 = 79 (1001111) +33 + 47 = 80 (1010000) +33 + 48 = 81 (1010001) +33 + 49 = 82 (1010010) +33 + 50 = 83 (1010011) +33 + 51 = 84 (1010100) +33 + 52 = 85 (1010101) +33 + 53 = 86 (1010110) +33 + 54 = 87 (1010111) +33 + 55 = 88 (1011000) +33 + 56 = 89 (1011001) +33 + 57 = 90 (1011010) +33 + 58 = 91 (1011011) +33 + 59 = 92 (1011100) +33 + 60 = 93 (1011101) +33 + 61 = 94 (1011110) +33 + 62 = 95 (1011111) +33 + 63 = 96 (1100000) +34 + 0 = 34 (0100010) +34 + 1 = 35 (0100011) +34 + 2 = 36 (0100100) +34 + 3 = 37 (0100101) +34 + 4 = 38 (0100110) +34 + 5 = 39 (0100111) +34 + 6 = 40 (0101000) +34 + 7 = 41 (0101001) +34 + 8 = 42 (0101010) +34 + 9 = 43 (0101011) +34 + 10 = 44 (0101100) +34 + 11 = 45 (0101101) +34 + 12 = 46 (0101110) +34 + 13 = 47 (0101111) +34 + 14 = 48 (0110000) +34 + 15 = 49 (0110001) +34 + 16 = 50 (0110010) +34 + 17 = 51 (0110011) +34 + 18 = 52 (0110100) +34 + 19 = 53 (0110101) +34 + 20 = 54 (0110110) +34 + 21 = 55 (0110111) +34 + 22 = 56 (0111000) +34 + 23 = 57 (0111001) +34 + 24 = 58 (0111010) +34 + 25 = 59 (0111011) +34 + 26 = 60 (0111100) +34 + 27 = 61 (0111101) +34 + 28 = 62 (0111110) +34 + 29 = 63 (0111111) +34 + 30 = 64 (1000000) +34 + 31 = 65 (1000001) +34 + 32 = 66 (1000010) +34 + 33 = 67 (1000011) +34 + 34 = 68 (1000100) +34 + 35 = 69 (1000101) +34 + 36 = 70 (1000110) +34 + 37 = 71 (1000111) +34 + 38 = 72 (1001000) +34 + 39 = 73 (1001001) +34 + 40 = 74 (1001010) +34 + 41 = 75 (1001011) +34 + 42 = 76 (1001100) +34 + 43 = 77 (1001101) +34 + 44 = 78 (1001110) +34 + 45 = 79 (1001111) +34 + 46 = 80 (1010000) +34 + 47 = 81 (1010001) +34 + 48 = 82 (1010010) +34 + 49 = 83 (1010011) +34 + 50 = 84 (1010100) +34 + 51 = 85 (1010101) +34 + 52 = 86 (1010110) +34 + 53 = 87 (1010111) +34 + 54 = 88 (1011000) +34 + 55 = 89 (1011001) +34 + 56 = 90 (1011010) +34 + 57 = 91 (1011011) +34 + 58 = 92 (1011100) +34 + 59 = 93 (1011101) +34 + 60 = 94 (1011110) +34 + 61 = 95 (1011111) +34 + 62 = 96 (1100000) +34 + 63 = 97 (1100001) +35 + 0 = 35 (0100011) +35 + 1 = 36 (0100100) +35 + 2 = 37 (0100101) +35 + 3 = 38 (0100110) +35 + 4 = 39 (0100111) +35 + 5 = 40 (0101000) +35 + 6 = 41 (0101001) +35 + 7 = 42 (0101010) +35 + 8 = 43 (0101011) +35 + 9 = 44 (0101100) +35 + 10 = 45 (0101101) +35 + 11 = 46 (0101110) +35 + 12 = 47 (0101111) +35 + 13 = 48 (0110000) +35 + 14 = 49 (0110001) +35 + 15 = 50 (0110010) +35 + 16 = 51 (0110011) +35 + 17 = 52 (0110100) +35 + 18 = 53 (0110101) +35 + 19 = 54 (0110110) +35 + 20 = 55 (0110111) +35 + 21 = 56 (0111000) +35 + 22 = 57 (0111001) +35 + 23 = 58 (0111010) +35 + 24 = 59 (0111011) +35 + 25 = 60 (0111100) +35 + 26 = 61 (0111101) +35 + 27 = 62 (0111110) +35 + 28 = 63 (0111111) +35 + 29 = 64 (1000000) +35 + 30 = 65 (1000001) +35 + 31 = 66 (1000010) +35 + 32 = 67 (1000011) +35 + 33 = 68 (1000100) +35 + 34 = 69 (1000101) +35 + 35 = 70 (1000110) +35 + 36 = 71 (1000111) +35 + 37 = 72 (1001000) +35 + 38 = 73 (1001001) +35 + 39 = 74 (1001010) +35 + 40 = 75 (1001011) +35 + 41 = 76 (1001100) +35 + 42 = 77 (1001101) +35 + 43 = 78 (1001110) +35 + 44 = 79 (1001111) +35 + 45 = 80 (1010000) +35 + 46 = 81 (1010001) +35 + 47 = 82 (1010010) +35 + 48 = 83 (1010011) +35 + 49 = 84 (1010100) +35 + 50 = 85 (1010101) +35 + 51 = 86 (1010110) +35 + 52 = 87 (1010111) +35 + 53 = 88 (1011000) +35 + 54 = 89 (1011001) +35 + 55 = 90 (1011010) +35 + 56 = 91 (1011011) +35 + 57 = 92 (1011100) +35 + 58 = 93 (1011101) +35 + 59 = 94 (1011110) +35 + 60 = 95 (1011111) +35 + 61 = 96 (1100000) +35 + 62 = 97 (1100001) +35 + 63 = 98 (1100010) +36 + 0 = 36 (0100100) +36 + 1 = 37 (0100101) +36 + 2 = 38 (0100110) +36 + 3 = 39 (0100111) +36 + 4 = 40 (0101000) +36 + 5 = 41 (0101001) +36 + 6 = 42 (0101010) +36 + 7 = 43 (0101011) +36 + 8 = 44 (0101100) +36 + 9 = 45 (0101101) +36 + 10 = 46 (0101110) +36 + 11 = 47 (0101111) +36 + 12 = 48 (0110000) +36 + 13 = 49 (0110001) +36 + 14 = 50 (0110010) +36 + 15 = 51 (0110011) +36 + 16 = 52 (0110100) +36 + 17 = 53 (0110101) +36 + 18 = 54 (0110110) +36 + 19 = 55 (0110111) +36 + 20 = 56 (0111000) +36 + 21 = 57 (0111001) +36 + 22 = 58 (0111010) +36 + 23 = 59 (0111011) +36 + 24 = 60 (0111100) +36 + 25 = 61 (0111101) +36 + 26 = 62 (0111110) +36 + 27 = 63 (0111111) +36 + 28 = 64 (1000000) +36 + 29 = 65 (1000001) +36 + 30 = 66 (1000010) +36 + 31 = 67 (1000011) +36 + 32 = 68 (1000100) +36 + 33 = 69 (1000101) +36 + 34 = 70 (1000110) +36 + 35 = 71 (1000111) +36 + 36 = 72 (1001000) +36 + 37 = 73 (1001001) +36 + 38 = 74 (1001010) +36 + 39 = 75 (1001011) +36 + 40 = 76 (1001100) +36 + 41 = 77 (1001101) +36 + 42 = 78 (1001110) +36 + 43 = 79 (1001111) +36 + 44 = 80 (1010000) +36 + 45 = 81 (1010001) +36 + 46 = 82 (1010010) +36 + 47 = 83 (1010011) +36 + 48 = 84 (1010100) +36 + 49 = 85 (1010101) +36 + 50 = 86 (1010110) +36 + 51 = 87 (1010111) +36 + 52 = 88 (1011000) +36 + 53 = 89 (1011001) +36 + 54 = 90 (1011010) +36 + 55 = 91 (1011011) +36 + 56 = 92 (1011100) +36 + 57 = 93 (1011101) +36 + 58 = 94 (1011110) +36 + 59 = 95 (1011111) +36 + 60 = 96 (1100000) +36 + 61 = 97 (1100001) +36 + 62 = 98 (1100010) +36 + 63 = 99 (1100011) +37 + 0 = 37 (0100101) +37 + 1 = 38 (0100110) +37 + 2 = 39 (0100111) +37 + 3 = 40 (0101000) +37 + 4 = 41 (0101001) +37 + 5 = 42 (0101010) +37 + 6 = 43 (0101011) +37 + 7 = 44 (0101100) +37 + 8 = 45 (0101101) +37 + 9 = 46 (0101110) +37 + 10 = 47 (0101111) +37 + 11 = 48 (0110000) +37 + 12 = 49 (0110001) +37 + 13 = 50 (0110010) +37 + 14 = 51 (0110011) +37 + 15 = 52 (0110100) +37 + 16 = 53 (0110101) +37 + 17 = 54 (0110110) +37 + 18 = 55 (0110111) +37 + 19 = 56 (0111000) +37 + 20 = 57 (0111001) +37 + 21 = 58 (0111010) +37 + 22 = 59 (0111011) +37 + 23 = 60 (0111100) +37 + 24 = 61 (0111101) +37 + 25 = 62 (0111110) +37 + 26 = 63 (0111111) +37 + 27 = 64 (1000000) +37 + 28 = 65 (1000001) +37 + 29 = 66 (1000010) +37 + 30 = 67 (1000011) +37 + 31 = 68 (1000100) +37 + 32 = 69 (1000101) +37 + 33 = 70 (1000110) +37 + 34 = 71 (1000111) +37 + 35 = 72 (1001000) +37 + 36 = 73 (1001001) +37 + 37 = 74 (1001010) +37 + 38 = 75 (1001011) +37 + 39 = 76 (1001100) +37 + 40 = 77 (1001101) +37 + 41 = 78 (1001110) +37 + 42 = 79 (1001111) +37 + 43 = 80 (1010000) +37 + 44 = 81 (1010001) +37 + 45 = 82 (1010010) +37 + 46 = 83 (1010011) +37 + 47 = 84 (1010100) +37 + 48 = 85 (1010101) +37 + 49 = 86 (1010110) +37 + 50 = 87 (1010111) +37 + 51 = 88 (1011000) +37 + 52 = 89 (1011001) +37 + 53 = 90 (1011010) +37 + 54 = 91 (1011011) +37 + 55 = 92 (1011100) +37 + 56 = 93 (1011101) +37 + 57 = 94 (1011110) +37 + 58 = 95 (1011111) +37 + 59 = 96 (1100000) +37 + 60 = 97 (1100001) +37 + 61 = 98 (1100010) +37 + 62 = 99 (1100011) +37 + 63 = 100 (1100100) +38 + 0 = 38 (0100110) +38 + 1 = 39 (0100111) +38 + 2 = 40 (0101000) +38 + 3 = 41 (0101001) +38 + 4 = 42 (0101010) +38 + 5 = 43 (0101011) +38 + 6 = 44 (0101100) +38 + 7 = 45 (0101101) +38 + 8 = 46 (0101110) +38 + 9 = 47 (0101111) +38 + 10 = 48 (0110000) +38 + 11 = 49 (0110001) +38 + 12 = 50 (0110010) +38 + 13 = 51 (0110011) +38 + 14 = 52 (0110100) +38 + 15 = 53 (0110101) +38 + 16 = 54 (0110110) +38 + 17 = 55 (0110111) +38 + 18 = 56 (0111000) +38 + 19 = 57 (0111001) +38 + 20 = 58 (0111010) +38 + 21 = 59 (0111011) +38 + 22 = 60 (0111100) +38 + 23 = 61 (0111101) +38 + 24 = 62 (0111110) +38 + 25 = 63 (0111111) +38 + 26 = 64 (1000000) +38 + 27 = 65 (1000001) +38 + 28 = 66 (1000010) +38 + 29 = 67 (1000011) +38 + 30 = 68 (1000100) +38 + 31 = 69 (1000101) +38 + 32 = 70 (1000110) +38 + 33 = 71 (1000111) +38 + 34 = 72 (1001000) +38 + 35 = 73 (1001001) +38 + 36 = 74 (1001010) +38 + 37 = 75 (1001011) +38 + 38 = 76 (1001100) +38 + 39 = 77 (1001101) +38 + 40 = 78 (1001110) +38 + 41 = 79 (1001111) +38 + 42 = 80 (1010000) +38 + 43 = 81 (1010001) +38 + 44 = 82 (1010010) +38 + 45 = 83 (1010011) +38 + 46 = 84 (1010100) +38 + 47 = 85 (1010101) +38 + 48 = 86 (1010110) +38 + 49 = 87 (1010111) +38 + 50 = 88 (1011000) +38 + 51 = 89 (1011001) +38 + 52 = 90 (1011010) +38 + 53 = 91 (1011011) +38 + 54 = 92 (1011100) +38 + 55 = 93 (1011101) +38 + 56 = 94 (1011110) +38 + 57 = 95 (1011111) +38 + 58 = 96 (1100000) +38 + 59 = 97 (1100001) +38 + 60 = 98 (1100010) +38 + 61 = 99 (1100011) +38 + 62 = 100 (1100100) +38 + 63 = 101 (1100101) +39 + 0 = 39 (0100111) +39 + 1 = 40 (0101000) +39 + 2 = 41 (0101001) +39 + 3 = 42 (0101010) +39 + 4 = 43 (0101011) +39 + 5 = 44 (0101100) +39 + 6 = 45 (0101101) +39 + 7 = 46 (0101110) +39 + 8 = 47 (0101111) +39 + 9 = 48 (0110000) +39 + 10 = 49 (0110001) +39 + 11 = 50 (0110010) +39 + 12 = 51 (0110011) +39 + 13 = 52 (0110100) +39 + 14 = 53 (0110101) +39 + 15 = 54 (0110110) +39 + 16 = 55 (0110111) +39 + 17 = 56 (0111000) +39 + 18 = 57 (0111001) +39 + 19 = 58 (0111010) +39 + 20 = 59 (0111011) +39 + 21 = 60 (0111100) +39 + 22 = 61 (0111101) +39 + 23 = 62 (0111110) +39 + 24 = 63 (0111111) +39 + 25 = 64 (1000000) +39 + 26 = 65 (1000001) +39 + 27 = 66 (1000010) +39 + 28 = 67 (1000011) +39 + 29 = 68 (1000100) +39 + 30 = 69 (1000101) +39 + 31 = 70 (1000110) +39 + 32 = 71 (1000111) +39 + 33 = 72 (1001000) +39 + 34 = 73 (1001001) +39 + 35 = 74 (1001010) +39 + 36 = 75 (1001011) +39 + 37 = 76 (1001100) +39 + 38 = 77 (1001101) +39 + 39 = 78 (1001110) +39 + 40 = 79 (1001111) +39 + 41 = 80 (1010000) +39 + 42 = 81 (1010001) +39 + 43 = 82 (1010010) +39 + 44 = 83 (1010011) +39 + 45 = 84 (1010100) +39 + 46 = 85 (1010101) +39 + 47 = 86 (1010110) +39 + 48 = 87 (1010111) +39 + 49 = 88 (1011000) +39 + 50 = 89 (1011001) +39 + 51 = 90 (1011010) +39 + 52 = 91 (1011011) +39 + 53 = 92 (1011100) +39 + 54 = 93 (1011101) +39 + 55 = 94 (1011110) +39 + 56 = 95 (1011111) +39 + 57 = 96 (1100000) +39 + 58 = 97 (1100001) +39 + 59 = 98 (1100010) +39 + 60 = 99 (1100011) +39 + 61 = 100 (1100100) +39 + 62 = 101 (1100101) +39 + 63 = 102 (1100110) +40 + 0 = 40 (0101000) +40 + 1 = 41 (0101001) +40 + 2 = 42 (0101010) +40 + 3 = 43 (0101011) +40 + 4 = 44 (0101100) +40 + 5 = 45 (0101101) +40 + 6 = 46 (0101110) +40 + 7 = 47 (0101111) +40 + 8 = 48 (0110000) +40 + 9 = 49 (0110001) +40 + 10 = 50 (0110010) +40 + 11 = 51 (0110011) +40 + 12 = 52 (0110100) +40 + 13 = 53 (0110101) +40 + 14 = 54 (0110110) +40 + 15 = 55 (0110111) +40 + 16 = 56 (0111000) +40 + 17 = 57 (0111001) +40 + 18 = 58 (0111010) +40 + 19 = 59 (0111011) +40 + 20 = 60 (0111100) +40 + 21 = 61 (0111101) +40 + 22 = 62 (0111110) +40 + 23 = 63 (0111111) +40 + 24 = 64 (1000000) +40 + 25 = 65 (1000001) +40 + 26 = 66 (1000010) +40 + 27 = 67 (1000011) +40 + 28 = 68 (1000100) +40 + 29 = 69 (1000101) +40 + 30 = 70 (1000110) +40 + 31 = 71 (1000111) +40 + 32 = 72 (1001000) +40 + 33 = 73 (1001001) +40 + 34 = 74 (1001010) +40 + 35 = 75 (1001011) +40 + 36 = 76 (1001100) +40 + 37 = 77 (1001101) +40 + 38 = 78 (1001110) +40 + 39 = 79 (1001111) +40 + 40 = 80 (1010000) +40 + 41 = 81 (1010001) +40 + 42 = 82 (1010010) +40 + 43 = 83 (1010011) +40 + 44 = 84 (1010100) +40 + 45 = 85 (1010101) +40 + 46 = 86 (1010110) +40 + 47 = 87 (1010111) +40 + 48 = 88 (1011000) +40 + 49 = 89 (1011001) +40 + 50 = 90 (1011010) +40 + 51 = 91 (1011011) +40 + 52 = 92 (1011100) +40 + 53 = 93 (1011101) +40 + 54 = 94 (1011110) +40 + 55 = 95 (1011111) +40 + 56 = 96 (1100000) +40 + 57 = 97 (1100001) +40 + 58 = 98 (1100010) +40 + 59 = 99 (1100011) +40 + 60 = 100 (1100100) +40 + 61 = 101 (1100101) +40 + 62 = 102 (1100110) +40 + 63 = 103 (1100111) +41 + 0 = 41 (0101001) +41 + 1 = 42 (0101010) +41 + 2 = 43 (0101011) +41 + 3 = 44 (0101100) +41 + 4 = 45 (0101101) +41 + 5 = 46 (0101110) +41 + 6 = 47 (0101111) +41 + 7 = 48 (0110000) +41 + 8 = 49 (0110001) +41 + 9 = 50 (0110010) +41 + 10 = 51 (0110011) +41 + 11 = 52 (0110100) +41 + 12 = 53 (0110101) +41 + 13 = 54 (0110110) +41 + 14 = 55 (0110111) +41 + 15 = 56 (0111000) +41 + 16 = 57 (0111001) +41 + 17 = 58 (0111010) +41 + 18 = 59 (0111011) +41 + 19 = 60 (0111100) +41 + 20 = 61 (0111101) +41 + 21 = 62 (0111110) +41 + 22 = 63 (0111111) +41 + 23 = 64 (1000000) +41 + 24 = 65 (1000001) +41 + 25 = 66 (1000010) +41 + 26 = 67 (1000011) +41 + 27 = 68 (1000100) +41 + 28 = 69 (1000101) +41 + 29 = 70 (1000110) +41 + 30 = 71 (1000111) +41 + 31 = 72 (1001000) +41 + 32 = 73 (1001001) +41 + 33 = 74 (1001010) +41 + 34 = 75 (1001011) +41 + 35 = 76 (1001100) +41 + 36 = 77 (1001101) +41 + 37 = 78 (1001110) +41 + 38 = 79 (1001111) +41 + 39 = 80 (1010000) +41 + 40 = 81 (1010001) +41 + 41 = 82 (1010010) +41 + 42 = 83 (1010011) +41 + 43 = 84 (1010100) +41 + 44 = 85 (1010101) +41 + 45 = 86 (1010110) +41 + 46 = 87 (1010111) +41 + 47 = 88 (1011000) +41 + 48 = 89 (1011001) +41 + 49 = 90 (1011010) +41 + 50 = 91 (1011011) +41 + 51 = 92 (1011100) +41 + 52 = 93 (1011101) +41 + 53 = 94 (1011110) +41 + 54 = 95 (1011111) +41 + 55 = 96 (1100000) +41 + 56 = 97 (1100001) +41 + 57 = 98 (1100010) +41 + 58 = 99 (1100011) +41 + 59 = 100 (1100100) +41 + 60 = 101 (1100101) +41 + 61 = 102 (1100110) +41 + 62 = 103 (1100111) +41 + 63 = 104 (1101000) +42 + 0 = 42 (0101010) +42 + 1 = 43 (0101011) +42 + 2 = 44 (0101100) +42 + 3 = 45 (0101101) +42 + 4 = 46 (0101110) +42 + 5 = 47 (0101111) +42 + 6 = 48 (0110000) +42 + 7 = 49 (0110001) +42 + 8 = 50 (0110010) +42 + 9 = 51 (0110011) +42 + 10 = 52 (0110100) +42 + 11 = 53 (0110101) +42 + 12 = 54 (0110110) +42 + 13 = 55 (0110111) +42 + 14 = 56 (0111000) +42 + 15 = 57 (0111001) +42 + 16 = 58 (0111010) +42 + 17 = 59 (0111011) +42 + 18 = 60 (0111100) +42 + 19 = 61 (0111101) +42 + 20 = 62 (0111110) +42 + 21 = 63 (0111111) +42 + 22 = 64 (1000000) +42 + 23 = 65 (1000001) +42 + 24 = 66 (1000010) +42 + 25 = 67 (1000011) +42 + 26 = 68 (1000100) +42 + 27 = 69 (1000101) +42 + 28 = 70 (1000110) +42 + 29 = 71 (1000111) +42 + 30 = 72 (1001000) +42 + 31 = 73 (1001001) +42 + 32 = 74 (1001010) +42 + 33 = 75 (1001011) +42 + 34 = 76 (1001100) +42 + 35 = 77 (1001101) +42 + 36 = 78 (1001110) +42 + 37 = 79 (1001111) +42 + 38 = 80 (1010000) +42 + 39 = 81 (1010001) +42 + 40 = 82 (1010010) +42 + 41 = 83 (1010011) +42 + 42 = 84 (1010100) +42 + 43 = 85 (1010101) +42 + 44 = 86 (1010110) +42 + 45 = 87 (1010111) +42 + 46 = 88 (1011000) +42 + 47 = 89 (1011001) +42 + 48 = 90 (1011010) +42 + 49 = 91 (1011011) +42 + 50 = 92 (1011100) +42 + 51 = 93 (1011101) +42 + 52 = 94 (1011110) +42 + 53 = 95 (1011111) +42 + 54 = 96 (1100000) +42 + 55 = 97 (1100001) +42 + 56 = 98 (1100010) +42 + 57 = 99 (1100011) +42 + 58 = 100 (1100100) +42 + 59 = 101 (1100101) +42 + 60 = 102 (1100110) +42 + 61 = 103 (1100111) +42 + 62 = 104 (1101000) +42 + 63 = 105 (1101001) +43 + 0 = 43 (0101011) +43 + 1 = 44 (0101100) +43 + 2 = 45 (0101101) +43 + 3 = 46 (0101110) +43 + 4 = 47 (0101111) +43 + 5 = 48 (0110000) +43 + 6 = 49 (0110001) +43 + 7 = 50 (0110010) +43 + 8 = 51 (0110011) +43 + 9 = 52 (0110100) +43 + 10 = 53 (0110101) +43 + 11 = 54 (0110110) +43 + 12 = 55 (0110111) +43 + 13 = 56 (0111000) +43 + 14 = 57 (0111001) +43 + 15 = 58 (0111010) +43 + 16 = 59 (0111011) +43 + 17 = 60 (0111100) +43 + 18 = 61 (0111101) +43 + 19 = 62 (0111110) +43 + 20 = 63 (0111111) +43 + 21 = 64 (1000000) +43 + 22 = 65 (1000001) +43 + 23 = 66 (1000010) +43 + 24 = 67 (1000011) +43 + 25 = 68 (1000100) +43 + 26 = 69 (1000101) +43 + 27 = 70 (1000110) +43 + 28 = 71 (1000111) +43 + 29 = 72 (1001000) +43 + 30 = 73 (1001001) +43 + 31 = 74 (1001010) +43 + 32 = 75 (1001011) +43 + 33 = 76 (1001100) +43 + 34 = 77 (1001101) +43 + 35 = 78 (1001110) +43 + 36 = 79 (1001111) +43 + 37 = 80 (1010000) +43 + 38 = 81 (1010001) +43 + 39 = 82 (1010010) +43 + 40 = 83 (1010011) +43 + 41 = 84 (1010100) +43 + 42 = 85 (1010101) +43 + 43 = 86 (1010110) +43 + 44 = 87 (1010111) +43 + 45 = 88 (1011000) +43 + 46 = 89 (1011001) +43 + 47 = 90 (1011010) +43 + 48 = 91 (1011011) +43 + 49 = 92 (1011100) +43 + 50 = 93 (1011101) +43 + 51 = 94 (1011110) +43 + 52 = 95 (1011111) +43 + 53 = 96 (1100000) +43 + 54 = 97 (1100001) +43 + 55 = 98 (1100010) +43 + 56 = 99 (1100011) +43 + 57 = 100 (1100100) +43 + 58 = 101 (1100101) +43 + 59 = 102 (1100110) +43 + 60 = 103 (1100111) +43 + 61 = 104 (1101000) +43 + 62 = 105 (1101001) +43 + 63 = 106 (1101010) +44 + 0 = 44 (0101100) +44 + 1 = 45 (0101101) +44 + 2 = 46 (0101110) +44 + 3 = 47 (0101111) +44 + 4 = 48 (0110000) +44 + 5 = 49 (0110001) +44 + 6 = 50 (0110010) +44 + 7 = 51 (0110011) +44 + 8 = 52 (0110100) +44 + 9 = 53 (0110101) +44 + 10 = 54 (0110110) +44 + 11 = 55 (0110111) +44 + 12 = 56 (0111000) +44 + 13 = 57 (0111001) +44 + 14 = 58 (0111010) +44 + 15 = 59 (0111011) +44 + 16 = 60 (0111100) +44 + 17 = 61 (0111101) +44 + 18 = 62 (0111110) +44 + 19 = 63 (0111111) +44 + 20 = 64 (1000000) +44 + 21 = 65 (1000001) +44 + 22 = 66 (1000010) +44 + 23 = 67 (1000011) +44 + 24 = 68 (1000100) +44 + 25 = 69 (1000101) +44 + 26 = 70 (1000110) +44 + 27 = 71 (1000111) +44 + 28 = 72 (1001000) +44 + 29 = 73 (1001001) +44 + 30 = 74 (1001010) +44 + 31 = 75 (1001011) +44 + 32 = 76 (1001100) +44 + 33 = 77 (1001101) +44 + 34 = 78 (1001110) +44 + 35 = 79 (1001111) +44 + 36 = 80 (1010000) +44 + 37 = 81 (1010001) +44 + 38 = 82 (1010010) +44 + 39 = 83 (1010011) +44 + 40 = 84 (1010100) +44 + 41 = 85 (1010101) +44 + 42 = 86 (1010110) +44 + 43 = 87 (1010111) +44 + 44 = 88 (1011000) +44 + 45 = 89 (1011001) +44 + 46 = 90 (1011010) +44 + 47 = 91 (1011011) +44 + 48 = 92 (1011100) +44 + 49 = 93 (1011101) +44 + 50 = 94 (1011110) +44 + 51 = 95 (1011111) +44 + 52 = 96 (1100000) +44 + 53 = 97 (1100001) +44 + 54 = 98 (1100010) +44 + 55 = 99 (1100011) +44 + 56 = 100 (1100100) +44 + 57 = 101 (1100101) +44 + 58 = 102 (1100110) +44 + 59 = 103 (1100111) +44 + 60 = 104 (1101000) +44 + 61 = 105 (1101001) +44 + 62 = 106 (1101010) +44 + 63 = 107 (1101011) +45 + 0 = 45 (0101101) +45 + 1 = 46 (0101110) +45 + 2 = 47 (0101111) +45 + 3 = 48 (0110000) +45 + 4 = 49 (0110001) +45 + 5 = 50 (0110010) +45 + 6 = 51 (0110011) +45 + 7 = 52 (0110100) +45 + 8 = 53 (0110101) +45 + 9 = 54 (0110110) +45 + 10 = 55 (0110111) +45 + 11 = 56 (0111000) +45 + 12 = 57 (0111001) +45 + 13 = 58 (0111010) +45 + 14 = 59 (0111011) +45 + 15 = 60 (0111100) +45 + 16 = 61 (0111101) +45 + 17 = 62 (0111110) +45 + 18 = 63 (0111111) +45 + 19 = 64 (1000000) +45 + 20 = 65 (1000001) +45 + 21 = 66 (1000010) +45 + 22 = 67 (1000011) +45 + 23 = 68 (1000100) +45 + 24 = 69 (1000101) +45 + 25 = 70 (1000110) +45 + 26 = 71 (1000111) +45 + 27 = 72 (1001000) +45 + 28 = 73 (1001001) +45 + 29 = 74 (1001010) +45 + 30 = 75 (1001011) +45 + 31 = 76 (1001100) +45 + 32 = 77 (1001101) +45 + 33 = 78 (1001110) +45 + 34 = 79 (1001111) +45 + 35 = 80 (1010000) +45 + 36 = 81 (1010001) +45 + 37 = 82 (1010010) +45 + 38 = 83 (1010011) +45 + 39 = 84 (1010100) +45 + 40 = 85 (1010101) +45 + 41 = 86 (1010110) +45 + 42 = 87 (1010111) +45 + 43 = 88 (1011000) +45 + 44 = 89 (1011001) +45 + 45 = 90 (1011010) +45 + 46 = 91 (1011011) +45 + 47 = 92 (1011100) +45 + 48 = 93 (1011101) +45 + 49 = 94 (1011110) +45 + 50 = 95 (1011111) +45 + 51 = 96 (1100000) +45 + 52 = 97 (1100001) +45 + 53 = 98 (1100010) +45 + 54 = 99 (1100011) +45 + 55 = 100 (1100100) +45 + 56 = 101 (1100101) +45 + 57 = 102 (1100110) +45 + 58 = 103 (1100111) +45 + 59 = 104 (1101000) +45 + 60 = 105 (1101001) +45 + 61 = 106 (1101010) +45 + 62 = 107 (1101011) +45 + 63 = 108 (1101100) +46 + 0 = 46 (0101110) +46 + 1 = 47 (0101111) +46 + 2 = 48 (0110000) +46 + 3 = 49 (0110001) +46 + 4 = 50 (0110010) +46 + 5 = 51 (0110011) +46 + 6 = 52 (0110100) +46 + 7 = 53 (0110101) +46 + 8 = 54 (0110110) +46 + 9 = 55 (0110111) +46 + 10 = 56 (0111000) +46 + 11 = 57 (0111001) +46 + 12 = 58 (0111010) +46 + 13 = 59 (0111011) +46 + 14 = 60 (0111100) +46 + 15 = 61 (0111101) +46 + 16 = 62 (0111110) +46 + 17 = 63 (0111111) +46 + 18 = 64 (1000000) +46 + 19 = 65 (1000001) +46 + 20 = 66 (1000010) +46 + 21 = 67 (1000011) +46 + 22 = 68 (1000100) +46 + 23 = 69 (1000101) +46 + 24 = 70 (1000110) +46 + 25 = 71 (1000111) +46 + 26 = 72 (1001000) +46 + 27 = 73 (1001001) +46 + 28 = 74 (1001010) +46 + 29 = 75 (1001011) +46 + 30 = 76 (1001100) +46 + 31 = 77 (1001101) +46 + 32 = 78 (1001110) +46 + 33 = 79 (1001111) +46 + 34 = 80 (1010000) +46 + 35 = 81 (1010001) +46 + 36 = 82 (1010010) +46 + 37 = 83 (1010011) +46 + 38 = 84 (1010100) +46 + 39 = 85 (1010101) +46 + 40 = 86 (1010110) +46 + 41 = 87 (1010111) +46 + 42 = 88 (1011000) +46 + 43 = 89 (1011001) +46 + 44 = 90 (1011010) +46 + 45 = 91 (1011011) +46 + 46 = 92 (1011100) +46 + 47 = 93 (1011101) +46 + 48 = 94 (1011110) +46 + 49 = 95 (1011111) +46 + 50 = 96 (1100000) +46 + 51 = 97 (1100001) +46 + 52 = 98 (1100010) +46 + 53 = 99 (1100011) +46 + 54 = 100 (1100100) +46 + 55 = 101 (1100101) +46 + 56 = 102 (1100110) +46 + 57 = 103 (1100111) +46 + 58 = 104 (1101000) +46 + 59 = 105 (1101001) +46 + 60 = 106 (1101010) +46 + 61 = 107 (1101011) +46 + 62 = 108 (1101100) +46 + 63 = 109 (1101101) +47 + 0 = 47 (0101111) +47 + 1 = 48 (0110000) +47 + 2 = 49 (0110001) +47 + 3 = 50 (0110010) +47 + 4 = 51 (0110011) +47 + 5 = 52 (0110100) +47 + 6 = 53 (0110101) +47 + 7 = 54 (0110110) +47 + 8 = 55 (0110111) +47 + 9 = 56 (0111000) +47 + 10 = 57 (0111001) +47 + 11 = 58 (0111010) +47 + 12 = 59 (0111011) +47 + 13 = 60 (0111100) +47 + 14 = 61 (0111101) +47 + 15 = 62 (0111110) +47 + 16 = 63 (0111111) +47 + 17 = 64 (1000000) +47 + 18 = 65 (1000001) +47 + 19 = 66 (1000010) +47 + 20 = 67 (1000011) +47 + 21 = 68 (1000100) +47 + 22 = 69 (1000101) +47 + 23 = 70 (1000110) +47 + 24 = 71 (1000111) +47 + 25 = 72 (1001000) +47 + 26 = 73 (1001001) +47 + 27 = 74 (1001010) +47 + 28 = 75 (1001011) +47 + 29 = 76 (1001100) +47 + 30 = 77 (1001101) +47 + 31 = 78 (1001110) +47 + 32 = 79 (1001111) +47 + 33 = 80 (1010000) +47 + 34 = 81 (1010001) +47 + 35 = 82 (1010010) +47 + 36 = 83 (1010011) +47 + 37 = 84 (1010100) +47 + 38 = 85 (1010101) +47 + 39 = 86 (1010110) +47 + 40 = 87 (1010111) +47 + 41 = 88 (1011000) +47 + 42 = 89 (1011001) +47 + 43 = 90 (1011010) +47 + 44 = 91 (1011011) +47 + 45 = 92 (1011100) +47 + 46 = 93 (1011101) +47 + 47 = 94 (1011110) +47 + 48 = 95 (1011111) +47 + 49 = 96 (1100000) +47 + 50 = 97 (1100001) +47 + 51 = 98 (1100010) +47 + 52 = 99 (1100011) +47 + 53 = 100 (1100100) +47 + 54 = 101 (1100101) +47 + 55 = 102 (1100110) +47 + 56 = 103 (1100111) +47 + 57 = 104 (1101000) +47 + 58 = 105 (1101001) +47 + 59 = 106 (1101010) +47 + 60 = 107 (1101011) +47 + 61 = 108 (1101100) +47 + 62 = 109 (1101101) +47 + 63 = 110 (1101110) +48 + 0 = 48 (0110000) +48 + 1 = 49 (0110001) +48 + 2 = 50 (0110010) +48 + 3 = 51 (0110011) +48 + 4 = 52 (0110100) +48 + 5 = 53 (0110101) +48 + 6 = 54 (0110110) +48 + 7 = 55 (0110111) +48 + 8 = 56 (0111000) +48 + 9 = 57 (0111001) +48 + 10 = 58 (0111010) +48 + 11 = 59 (0111011) +48 + 12 = 60 (0111100) +48 + 13 = 61 (0111101) +48 + 14 = 62 (0111110) +48 + 15 = 63 (0111111) +48 + 16 = 64 (1000000) +48 + 17 = 65 (1000001) +48 + 18 = 66 (1000010) +48 + 19 = 67 (1000011) +48 + 20 = 68 (1000100) +48 + 21 = 69 (1000101) +48 + 22 = 70 (1000110) +48 + 23 = 71 (1000111) +48 + 24 = 72 (1001000) +48 + 25 = 73 (1001001) +48 + 26 = 74 (1001010) +48 + 27 = 75 (1001011) +48 + 28 = 76 (1001100) +48 + 29 = 77 (1001101) +48 + 30 = 78 (1001110) +48 + 31 = 79 (1001111) +48 + 32 = 80 (1010000) +48 + 33 = 81 (1010001) +48 + 34 = 82 (1010010) +48 + 35 = 83 (1010011) +48 + 36 = 84 (1010100) +48 + 37 = 85 (1010101) +48 + 38 = 86 (1010110) +48 + 39 = 87 (1010111) +48 + 40 = 88 (1011000) +48 + 41 = 89 (1011001) +48 + 42 = 90 (1011010) +48 + 43 = 91 (1011011) +48 + 44 = 92 (1011100) +48 + 45 = 93 (1011101) +48 + 46 = 94 (1011110) +48 + 47 = 95 (1011111) +48 + 48 = 96 (1100000) +48 + 49 = 97 (1100001) +48 + 50 = 98 (1100010) +48 + 51 = 99 (1100011) +48 + 52 = 100 (1100100) +48 + 53 = 101 (1100101) +48 + 54 = 102 (1100110) +48 + 55 = 103 (1100111) +48 + 56 = 104 (1101000) +48 + 57 = 105 (1101001) +48 + 58 = 106 (1101010) +48 + 59 = 107 (1101011) +48 + 60 = 108 (1101100) +48 + 61 = 109 (1101101) +48 + 62 = 110 (1101110) +48 + 63 = 111 (1101111) +49 + 0 = 49 (0110001) +49 + 1 = 50 (0110010) +49 + 2 = 51 (0110011) +49 + 3 = 52 (0110100) +49 + 4 = 53 (0110101) +49 + 5 = 54 (0110110) +49 + 6 = 55 (0110111) +49 + 7 = 56 (0111000) +49 + 8 = 57 (0111001) +49 + 9 = 58 (0111010) +49 + 10 = 59 (0111011) +49 + 11 = 60 (0111100) +49 + 12 = 61 (0111101) +49 + 13 = 62 (0111110) +49 + 14 = 63 (0111111) +49 + 15 = 64 (1000000) +49 + 16 = 65 (1000001) +49 + 17 = 66 (1000010) +49 + 18 = 67 (1000011) +49 + 19 = 68 (1000100) +49 + 20 = 69 (1000101) +49 + 21 = 70 (1000110) +49 + 22 = 71 (1000111) +49 + 23 = 72 (1001000) +49 + 24 = 73 (1001001) +49 + 25 = 74 (1001010) +49 + 26 = 75 (1001011) +49 + 27 = 76 (1001100) +49 + 28 = 77 (1001101) +49 + 29 = 78 (1001110) +49 + 30 = 79 (1001111) +49 + 31 = 80 (1010000) +49 + 32 = 81 (1010001) +49 + 33 = 82 (1010010) +49 + 34 = 83 (1010011) +49 + 35 = 84 (1010100) +49 + 36 = 85 (1010101) +49 + 37 = 86 (1010110) +49 + 38 = 87 (1010111) +49 + 39 = 88 (1011000) +49 + 40 = 89 (1011001) +49 + 41 = 90 (1011010) +49 + 42 = 91 (1011011) +49 + 43 = 92 (1011100) +49 + 44 = 93 (1011101) +49 + 45 = 94 (1011110) +49 + 46 = 95 (1011111) +49 + 47 = 96 (1100000) +49 + 48 = 97 (1100001) +49 + 49 = 98 (1100010) +49 + 50 = 99 (1100011) +49 + 51 = 100 (1100100) +49 + 52 = 101 (1100101) +49 + 53 = 102 (1100110) +49 + 54 = 103 (1100111) +49 + 55 = 104 (1101000) +49 + 56 = 105 (1101001) +49 + 57 = 106 (1101010) +49 + 58 = 107 (1101011) +49 + 59 = 108 (1101100) +49 + 60 = 109 (1101101) +49 + 61 = 110 (1101110) +49 + 62 = 111 (1101111) +49 + 63 = 112 (1110000) +50 + 0 = 50 (0110010) +50 + 1 = 51 (0110011) +50 + 2 = 52 (0110100) +50 + 3 = 53 (0110101) +50 + 4 = 54 (0110110) +50 + 5 = 55 (0110111) +50 + 6 = 56 (0111000) +50 + 7 = 57 (0111001) +50 + 8 = 58 (0111010) +50 + 9 = 59 (0111011) +50 + 10 = 60 (0111100) +50 + 11 = 61 (0111101) +50 + 12 = 62 (0111110) +50 + 13 = 63 (0111111) +50 + 14 = 64 (1000000) +50 + 15 = 65 (1000001) +50 + 16 = 66 (1000010) +50 + 17 = 67 (1000011) +50 + 18 = 68 (1000100) +50 + 19 = 69 (1000101) +50 + 20 = 70 (1000110) +50 + 21 = 71 (1000111) +50 + 22 = 72 (1001000) +50 + 23 = 73 (1001001) +50 + 24 = 74 (1001010) +50 + 25 = 75 (1001011) +50 + 26 = 76 (1001100) +50 + 27 = 77 (1001101) +50 + 28 = 78 (1001110) +50 + 29 = 79 (1001111) +50 + 30 = 80 (1010000) +50 + 31 = 81 (1010001) +50 + 32 = 82 (1010010) +50 + 33 = 83 (1010011) +50 + 34 = 84 (1010100) +50 + 35 = 85 (1010101) +50 + 36 = 86 (1010110) +50 + 37 = 87 (1010111) +50 + 38 = 88 (1011000) +50 + 39 = 89 (1011001) +50 + 40 = 90 (1011010) +50 + 41 = 91 (1011011) +50 + 42 = 92 (1011100) +50 + 43 = 93 (1011101) +50 + 44 = 94 (1011110) +50 + 45 = 95 (1011111) +50 + 46 = 96 (1100000) +50 + 47 = 97 (1100001) +50 + 48 = 98 (1100010) +50 + 49 = 99 (1100011) +50 + 50 = 100 (1100100) +50 + 51 = 101 (1100101) +50 + 52 = 102 (1100110) +50 + 53 = 103 (1100111) +50 + 54 = 104 (1101000) +50 + 55 = 105 (1101001) +50 + 56 = 106 (1101010) +50 + 57 = 107 (1101011) +50 + 58 = 108 (1101100) +50 + 59 = 109 (1101101) +50 + 60 = 110 (1101110) +50 + 61 = 111 (1101111) +50 + 62 = 112 (1110000) +50 + 63 = 113 (1110001) +51 + 0 = 51 (0110011) +51 + 1 = 52 (0110100) +51 + 2 = 53 (0110101) +51 + 3 = 54 (0110110) +51 + 4 = 55 (0110111) +51 + 5 = 56 (0111000) +51 + 6 = 57 (0111001) +51 + 7 = 58 (0111010) +51 + 8 = 59 (0111011) +51 + 9 = 60 (0111100) +51 + 10 = 61 (0111101) +51 + 11 = 62 (0111110) +51 + 12 = 63 (0111111) +51 + 13 = 64 (1000000) +51 + 14 = 65 (1000001) +51 + 15 = 66 (1000010) +51 + 16 = 67 (1000011) +51 + 17 = 68 (1000100) +51 + 18 = 69 (1000101) +51 + 19 = 70 (1000110) +51 + 20 = 71 (1000111) +51 + 21 = 72 (1001000) +51 + 22 = 73 (1001001) +51 + 23 = 74 (1001010) +51 + 24 = 75 (1001011) +51 + 25 = 76 (1001100) +51 + 26 = 77 (1001101) +51 + 27 = 78 (1001110) +51 + 28 = 79 (1001111) +51 + 29 = 80 (1010000) +51 + 30 = 81 (1010001) +51 + 31 = 82 (1010010) +51 + 32 = 83 (1010011) +51 + 33 = 84 (1010100) +51 + 34 = 85 (1010101) +51 + 35 = 86 (1010110) +51 + 36 = 87 (1010111) +51 + 37 = 88 (1011000) +51 + 38 = 89 (1011001) +51 + 39 = 90 (1011010) +51 + 40 = 91 (1011011) +51 + 41 = 92 (1011100) +51 + 42 = 93 (1011101) +51 + 43 = 94 (1011110) +51 + 44 = 95 (1011111) +51 + 45 = 96 (1100000) +51 + 46 = 97 (1100001) +51 + 47 = 98 (1100010) +51 + 48 = 99 (1100011) +51 + 49 = 100 (1100100) +51 + 50 = 101 (1100101) +51 + 51 = 102 (1100110) +51 + 52 = 103 (1100111) +51 + 53 = 104 (1101000) +51 + 54 = 105 (1101001) +51 + 55 = 106 (1101010) +51 + 56 = 107 (1101011) +51 + 57 = 108 (1101100) +51 + 58 = 109 (1101101) +51 + 59 = 110 (1101110) +51 + 60 = 111 (1101111) +51 + 61 = 112 (1110000) +51 + 62 = 113 (1110001) +51 + 63 = 114 (1110010) +52 + 0 = 52 (0110100) +52 + 1 = 53 (0110101) +52 + 2 = 54 (0110110) +52 + 3 = 55 (0110111) +52 + 4 = 56 (0111000) +52 + 5 = 57 (0111001) +52 + 6 = 58 (0111010) +52 + 7 = 59 (0111011) +52 + 8 = 60 (0111100) +52 + 9 = 61 (0111101) +52 + 10 = 62 (0111110) +52 + 11 = 63 (0111111) +52 + 12 = 64 (1000000) +52 + 13 = 65 (1000001) +52 + 14 = 66 (1000010) +52 + 15 = 67 (1000011) +52 + 16 = 68 (1000100) +52 + 17 = 69 (1000101) +52 + 18 = 70 (1000110) +52 + 19 = 71 (1000111) +52 + 20 = 72 (1001000) +52 + 21 = 73 (1001001) +52 + 22 = 74 (1001010) +52 + 23 = 75 (1001011) +52 + 24 = 76 (1001100) +52 + 25 = 77 (1001101) +52 + 26 = 78 (1001110) +52 + 27 = 79 (1001111) +52 + 28 = 80 (1010000) +52 + 29 = 81 (1010001) +52 + 30 = 82 (1010010) +52 + 31 = 83 (1010011) +52 + 32 = 84 (1010100) +52 + 33 = 85 (1010101) +52 + 34 = 86 (1010110) +52 + 35 = 87 (1010111) +52 + 36 = 88 (1011000) +52 + 37 = 89 (1011001) +52 + 38 = 90 (1011010) +52 + 39 = 91 (1011011) +52 + 40 = 92 (1011100) +52 + 41 = 93 (1011101) +52 + 42 = 94 (1011110) +52 + 43 = 95 (1011111) +52 + 44 = 96 (1100000) +52 + 45 = 97 (1100001) +52 + 46 = 98 (1100010) +52 + 47 = 99 (1100011) +52 + 48 = 100 (1100100) +52 + 49 = 101 (1100101) +52 + 50 = 102 (1100110) +52 + 51 = 103 (1100111) +52 + 52 = 104 (1101000) +52 + 53 = 105 (1101001) +52 + 54 = 106 (1101010) +52 + 55 = 107 (1101011) +52 + 56 = 108 (1101100) +52 + 57 = 109 (1101101) +52 + 58 = 110 (1101110) +52 + 59 = 111 (1101111) +52 + 60 = 112 (1110000) +52 + 61 = 113 (1110001) +52 + 62 = 114 (1110010) +52 + 63 = 115 (1110011) +53 + 0 = 53 (0110101) +53 + 1 = 54 (0110110) +53 + 2 = 55 (0110111) +53 + 3 = 56 (0111000) +53 + 4 = 57 (0111001) +53 + 5 = 58 (0111010) +53 + 6 = 59 (0111011) +53 + 7 = 60 (0111100) +53 + 8 = 61 (0111101) +53 + 9 = 62 (0111110) +53 + 10 = 63 (0111111) +53 + 11 = 64 (1000000) +53 + 12 = 65 (1000001) +53 + 13 = 66 (1000010) +53 + 14 = 67 (1000011) +53 + 15 = 68 (1000100) +53 + 16 = 69 (1000101) +53 + 17 = 70 (1000110) +53 + 18 = 71 (1000111) +53 + 19 = 72 (1001000) +53 + 20 = 73 (1001001) +53 + 21 = 74 (1001010) +53 + 22 = 75 (1001011) +53 + 23 = 76 (1001100) +53 + 24 = 77 (1001101) +53 + 25 = 78 (1001110) +53 + 26 = 79 (1001111) +53 + 27 = 80 (1010000) +53 + 28 = 81 (1010001) +53 + 29 = 82 (1010010) +53 + 30 = 83 (1010011) +53 + 31 = 84 (1010100) +53 + 32 = 85 (1010101) +53 + 33 = 86 (1010110) +53 + 34 = 87 (1010111) +53 + 35 = 88 (1011000) +53 + 36 = 89 (1011001) +53 + 37 = 90 (1011010) +53 + 38 = 91 (1011011) +53 + 39 = 92 (1011100) +53 + 40 = 93 (1011101) +53 + 41 = 94 (1011110) +53 + 42 = 95 (1011111) +53 + 43 = 96 (1100000) +53 + 44 = 97 (1100001) +53 + 45 = 98 (1100010) +53 + 46 = 99 (1100011) +53 + 47 = 100 (1100100) +53 + 48 = 101 (1100101) +53 + 49 = 102 (1100110) +53 + 50 = 103 (1100111) +53 + 51 = 104 (1101000) +53 + 52 = 105 (1101001) +53 + 53 = 106 (1101010) +53 + 54 = 107 (1101011) +53 + 55 = 108 (1101100) +53 + 56 = 109 (1101101) +53 + 57 = 110 (1101110) +53 + 58 = 111 (1101111) +53 + 59 = 112 (1110000) +53 + 60 = 113 (1110001) +53 + 61 = 114 (1110010) +53 + 62 = 115 (1110011) +53 + 63 = 116 (1110100) +54 + 0 = 54 (0110110) +54 + 1 = 55 (0110111) +54 + 2 = 56 (0111000) +54 + 3 = 57 (0111001) +54 + 4 = 58 (0111010) +54 + 5 = 59 (0111011) +54 + 6 = 60 (0111100) +54 + 7 = 61 (0111101) +54 + 8 = 62 (0111110) +54 + 9 = 63 (0111111) +54 + 10 = 64 (1000000) +54 + 11 = 65 (1000001) +54 + 12 = 66 (1000010) +54 + 13 = 67 (1000011) +54 + 14 = 68 (1000100) +54 + 15 = 69 (1000101) +54 + 16 = 70 (1000110) +54 + 17 = 71 (1000111) +54 + 18 = 72 (1001000) +54 + 19 = 73 (1001001) +54 + 20 = 74 (1001010) +54 + 21 = 75 (1001011) +54 + 22 = 76 (1001100) +54 + 23 = 77 (1001101) +54 + 24 = 78 (1001110) +54 + 25 = 79 (1001111) +54 + 26 = 80 (1010000) +54 + 27 = 81 (1010001) +54 + 28 = 82 (1010010) +54 + 29 = 83 (1010011) +54 + 30 = 84 (1010100) +54 + 31 = 85 (1010101) +54 + 32 = 86 (1010110) +54 + 33 = 87 (1010111) +54 + 34 = 88 (1011000) +54 + 35 = 89 (1011001) +54 + 36 = 90 (1011010) +54 + 37 = 91 (1011011) +54 + 38 = 92 (1011100) +54 + 39 = 93 (1011101) +54 + 40 = 94 (1011110) +54 + 41 = 95 (1011111) +54 + 42 = 96 (1100000) +54 + 43 = 97 (1100001) +54 + 44 = 98 (1100010) +54 + 45 = 99 (1100011) +54 + 46 = 100 (1100100) +54 + 47 = 101 (1100101) +54 + 48 = 102 (1100110) +54 + 49 = 103 (1100111) +54 + 50 = 104 (1101000) +54 + 51 = 105 (1101001) +54 + 52 = 106 (1101010) +54 + 53 = 107 (1101011) +54 + 54 = 108 (1101100) +54 + 55 = 109 (1101101) +54 + 56 = 110 (1101110) +54 + 57 = 111 (1101111) +54 + 58 = 112 (1110000) +54 + 59 = 113 (1110001) +54 + 60 = 114 (1110010) +54 + 61 = 115 (1110011) +54 + 62 = 116 (1110100) +54 + 63 = 117 (1110101) +55 + 0 = 55 (0110111) +55 + 1 = 56 (0111000) +55 + 2 = 57 (0111001) +55 + 3 = 58 (0111010) +55 + 4 = 59 (0111011) +55 + 5 = 60 (0111100) +55 + 6 = 61 (0111101) +55 + 7 = 62 (0111110) +55 + 8 = 63 (0111111) +55 + 9 = 64 (1000000) +55 + 10 = 65 (1000001) +55 + 11 = 66 (1000010) +55 + 12 = 67 (1000011) +55 + 13 = 68 (1000100) +55 + 14 = 69 (1000101) +55 + 15 = 70 (1000110) +55 + 16 = 71 (1000111) +55 + 17 = 72 (1001000) +55 + 18 = 73 (1001001) +55 + 19 = 74 (1001010) +55 + 20 = 75 (1001011) +55 + 21 = 76 (1001100) +55 + 22 = 77 (1001101) +55 + 23 = 78 (1001110) +55 + 24 = 79 (1001111) +55 + 25 = 80 (1010000) +55 + 26 = 81 (1010001) +55 + 27 = 82 (1010010) +55 + 28 = 83 (1010011) +55 + 29 = 84 (1010100) +55 + 30 = 85 (1010101) +55 + 31 = 86 (1010110) +55 + 32 = 87 (1010111) +55 + 33 = 88 (1011000) +55 + 34 = 89 (1011001) +55 + 35 = 90 (1011010) +55 + 36 = 91 (1011011) +55 + 37 = 92 (1011100) +55 + 38 = 93 (1011101) +55 + 39 = 94 (1011110) +55 + 40 = 95 (1011111) +55 + 41 = 96 (1100000) +55 + 42 = 97 (1100001) +55 + 43 = 98 (1100010) +55 + 44 = 99 (1100011) +55 + 45 = 100 (1100100) +55 + 46 = 101 (1100101) +55 + 47 = 102 (1100110) +55 + 48 = 103 (1100111) +55 + 49 = 104 (1101000) +55 + 50 = 105 (1101001) +55 + 51 = 106 (1101010) +55 + 52 = 107 (1101011) +55 + 53 = 108 (1101100) +55 + 54 = 109 (1101101) +55 + 55 = 110 (1101110) +55 + 56 = 111 (1101111) +55 + 57 = 112 (1110000) +55 + 58 = 113 (1110001) +55 + 59 = 114 (1110010) +55 + 60 = 115 (1110011) +55 + 61 = 116 (1110100) +55 + 62 = 117 (1110101) +55 + 63 = 118 (1110110) +56 + 0 = 56 (0111000) +56 + 1 = 57 (0111001) +56 + 2 = 58 (0111010) +56 + 3 = 59 (0111011) +56 + 4 = 60 (0111100) +56 + 5 = 61 (0111101) +56 + 6 = 62 (0111110) +56 + 7 = 63 (0111111) +56 + 8 = 64 (1000000) +56 + 9 = 65 (1000001) +56 + 10 = 66 (1000010) +56 + 11 = 67 (1000011) +56 + 12 = 68 (1000100) +56 + 13 = 69 (1000101) +56 + 14 = 70 (1000110) +56 + 15 = 71 (1000111) +56 + 16 = 72 (1001000) +56 + 17 = 73 (1001001) +56 + 18 = 74 (1001010) +56 + 19 = 75 (1001011) +56 + 20 = 76 (1001100) +56 + 21 = 77 (1001101) +56 + 22 = 78 (1001110) +56 + 23 = 79 (1001111) +56 + 24 = 80 (1010000) +56 + 25 = 81 (1010001) +56 + 26 = 82 (1010010) +56 + 27 = 83 (1010011) +56 + 28 = 84 (1010100) +56 + 29 = 85 (1010101) +56 + 30 = 86 (1010110) +56 + 31 = 87 (1010111) +56 + 32 = 88 (1011000) +56 + 33 = 89 (1011001) +56 + 34 = 90 (1011010) +56 + 35 = 91 (1011011) +56 + 36 = 92 (1011100) +56 + 37 = 93 (1011101) +56 + 38 = 94 (1011110) +56 + 39 = 95 (1011111) +56 + 40 = 96 (1100000) +56 + 41 = 97 (1100001) +56 + 42 = 98 (1100010) +56 + 43 = 99 (1100011) +56 + 44 = 100 (1100100) +56 + 45 = 101 (1100101) +56 + 46 = 102 (1100110) +56 + 47 = 103 (1100111) +56 + 48 = 104 (1101000) +56 + 49 = 105 (1101001) +56 + 50 = 106 (1101010) +56 + 51 = 107 (1101011) +56 + 52 = 108 (1101100) +56 + 53 = 109 (1101101) +56 + 54 = 110 (1101110) +56 + 55 = 111 (1101111) +56 + 56 = 112 (1110000) +56 + 57 = 113 (1110001) +56 + 58 = 114 (1110010) +56 + 59 = 115 (1110011) +56 + 60 = 116 (1110100) +56 + 61 = 117 (1110101) +56 + 62 = 118 (1110110) +56 + 63 = 119 (1110111) +57 + 0 = 57 (0111001) +57 + 1 = 58 (0111010) +57 + 2 = 59 (0111011) +57 + 3 = 60 (0111100) +57 + 4 = 61 (0111101) +57 + 5 = 62 (0111110) +57 + 6 = 63 (0111111) +57 + 7 = 64 (1000000) +57 + 8 = 65 (1000001) +57 + 9 = 66 (1000010) +57 + 10 = 67 (1000011) +57 + 11 = 68 (1000100) +57 + 12 = 69 (1000101) +57 + 13 = 70 (1000110) +57 + 14 = 71 (1000111) +57 + 15 = 72 (1001000) +57 + 16 = 73 (1001001) +57 + 17 = 74 (1001010) +57 + 18 = 75 (1001011) +57 + 19 = 76 (1001100) +57 + 20 = 77 (1001101) +57 + 21 = 78 (1001110) +57 + 22 = 79 (1001111) +57 + 23 = 80 (1010000) +57 + 24 = 81 (1010001) +57 + 25 = 82 (1010010) +57 + 26 = 83 (1010011) +57 + 27 = 84 (1010100) +57 + 28 = 85 (1010101) +57 + 29 = 86 (1010110) +57 + 30 = 87 (1010111) +57 + 31 = 88 (1011000) +57 + 32 = 89 (1011001) +57 + 33 = 90 (1011010) +57 + 34 = 91 (1011011) +57 + 35 = 92 (1011100) +57 + 36 = 93 (1011101) +57 + 37 = 94 (1011110) +57 + 38 = 95 (1011111) +57 + 39 = 96 (1100000) +57 + 40 = 97 (1100001) +57 + 41 = 98 (1100010) +57 + 42 = 99 (1100011) +57 + 43 = 100 (1100100) +57 + 44 = 101 (1100101) +57 + 45 = 102 (1100110) +57 + 46 = 103 (1100111) +57 + 47 = 104 (1101000) +57 + 48 = 105 (1101001) +57 + 49 = 106 (1101010) +57 + 50 = 107 (1101011) +57 + 51 = 108 (1101100) +57 + 52 = 109 (1101101) +57 + 53 = 110 (1101110) +57 + 54 = 111 (1101111) +57 + 55 = 112 (1110000) +57 + 56 = 113 (1110001) +57 + 57 = 114 (1110010) +57 + 58 = 115 (1110011) +57 + 59 = 116 (1110100) +57 + 60 = 117 (1110101) +57 + 61 = 118 (1110110) +57 + 62 = 119 (1110111) +57 + 63 = 120 (1111000) +58 + 0 = 58 (0111010) +58 + 1 = 59 (0111011) +58 + 2 = 60 (0111100) +58 + 3 = 61 (0111101) +58 + 4 = 62 (0111110) +58 + 5 = 63 (0111111) +58 + 6 = 64 (1000000) +58 + 7 = 65 (1000001) +58 + 8 = 66 (1000010) +58 + 9 = 67 (1000011) +58 + 10 = 68 (1000100) +58 + 11 = 69 (1000101) +58 + 12 = 70 (1000110) +58 + 13 = 71 (1000111) +58 + 14 = 72 (1001000) +58 + 15 = 73 (1001001) +58 + 16 = 74 (1001010) +58 + 17 = 75 (1001011) +58 + 18 = 76 (1001100) +58 + 19 = 77 (1001101) +58 + 20 = 78 (1001110) +58 + 21 = 79 (1001111) +58 + 22 = 80 (1010000) +58 + 23 = 81 (1010001) +58 + 24 = 82 (1010010) +58 + 25 = 83 (1010011) +58 + 26 = 84 (1010100) +58 + 27 = 85 (1010101) +58 + 28 = 86 (1010110) +58 + 29 = 87 (1010111) +58 + 30 = 88 (1011000) +58 + 31 = 89 (1011001) +58 + 32 = 90 (1011010) +58 + 33 = 91 (1011011) +58 + 34 = 92 (1011100) +58 + 35 = 93 (1011101) +58 + 36 = 94 (1011110) +58 + 37 = 95 (1011111) +58 + 38 = 96 (1100000) +58 + 39 = 97 (1100001) +58 + 40 = 98 (1100010) +58 + 41 = 99 (1100011) +58 + 42 = 100 (1100100) +58 + 43 = 101 (1100101) +58 + 44 = 102 (1100110) +58 + 45 = 103 (1100111) +58 + 46 = 104 (1101000) +58 + 47 = 105 (1101001) +58 + 48 = 106 (1101010) +58 + 49 = 107 (1101011) +58 + 50 = 108 (1101100) +58 + 51 = 109 (1101101) +58 + 52 = 110 (1101110) +58 + 53 = 111 (1101111) +58 + 54 = 112 (1110000) +58 + 55 = 113 (1110001) +58 + 56 = 114 (1110010) +58 + 57 = 115 (1110011) +58 + 58 = 116 (1110100) +58 + 59 = 117 (1110101) +58 + 60 = 118 (1110110) +58 + 61 = 119 (1110111) +58 + 62 = 120 (1111000) +58 + 63 = 121 (1111001) +59 + 0 = 59 (0111011) +59 + 1 = 60 (0111100) +59 + 2 = 61 (0111101) +59 + 3 = 62 (0111110) +59 + 4 = 63 (0111111) +59 + 5 = 64 (1000000) +59 + 6 = 65 (1000001) +59 + 7 = 66 (1000010) +59 + 8 = 67 (1000011) +59 + 9 = 68 (1000100) +59 + 10 = 69 (1000101) +59 + 11 = 70 (1000110) +59 + 12 = 71 (1000111) +59 + 13 = 72 (1001000) +59 + 14 = 73 (1001001) +59 + 15 = 74 (1001010) +59 + 16 = 75 (1001011) +59 + 17 = 76 (1001100) +59 + 18 = 77 (1001101) +59 + 19 = 78 (1001110) +59 + 20 = 79 (1001111) +59 + 21 = 80 (1010000) +59 + 22 = 81 (1010001) +59 + 23 = 82 (1010010) +59 + 24 = 83 (1010011) +59 + 25 = 84 (1010100) +59 + 26 = 85 (1010101) +59 + 27 = 86 (1010110) +59 + 28 = 87 (1010111) +59 + 29 = 88 (1011000) +59 + 30 = 89 (1011001) +59 + 31 = 90 (1011010) +59 + 32 = 91 (1011011) +59 + 33 = 92 (1011100) +59 + 34 = 93 (1011101) +59 + 35 = 94 (1011110) +59 + 36 = 95 (1011111) +59 + 37 = 96 (1100000) +59 + 38 = 97 (1100001) +59 + 39 = 98 (1100010) +59 + 40 = 99 (1100011) +59 + 41 = 100 (1100100) +59 + 42 = 101 (1100101) +59 + 43 = 102 (1100110) +59 + 44 = 103 (1100111) +59 + 45 = 104 (1101000) +59 + 46 = 105 (1101001) +59 + 47 = 106 (1101010) +59 + 48 = 107 (1101011) +59 + 49 = 108 (1101100) +59 + 50 = 109 (1101101) +59 + 51 = 110 (1101110) +59 + 52 = 111 (1101111) +59 + 53 = 112 (1110000) +59 + 54 = 113 (1110001) +59 + 55 = 114 (1110010) +59 + 56 = 115 (1110011) +59 + 57 = 116 (1110100) +59 + 58 = 117 (1110101) +59 + 59 = 118 (1110110) +59 + 60 = 119 (1110111) +59 + 61 = 120 (1111000) +59 + 62 = 121 (1111001) +59 + 63 = 122 (1111010) +60 + 0 = 60 (0111100) +60 + 1 = 61 (0111101) +60 + 2 = 62 (0111110) +60 + 3 = 63 (0111111) +60 + 4 = 64 (1000000) +60 + 5 = 65 (1000001) +60 + 6 = 66 (1000010) +60 + 7 = 67 (1000011) +60 + 8 = 68 (1000100) +60 + 9 = 69 (1000101) +60 + 10 = 70 (1000110) +60 + 11 = 71 (1000111) +60 + 12 = 72 (1001000) +60 + 13 = 73 (1001001) +60 + 14 = 74 (1001010) +60 + 15 = 75 (1001011) +60 + 16 = 76 (1001100) +60 + 17 = 77 (1001101) +60 + 18 = 78 (1001110) +60 + 19 = 79 (1001111) +60 + 20 = 80 (1010000) +60 + 21 = 81 (1010001) +60 + 22 = 82 (1010010) +60 + 23 = 83 (1010011) +60 + 24 = 84 (1010100) +60 + 25 = 85 (1010101) +60 + 26 = 86 (1010110) +60 + 27 = 87 (1010111) +60 + 28 = 88 (1011000) +60 + 29 = 89 (1011001) +60 + 30 = 90 (1011010) +60 + 31 = 91 (1011011) +60 + 32 = 92 (1011100) +60 + 33 = 93 (1011101) +60 + 34 = 94 (1011110) +60 + 35 = 95 (1011111) +60 + 36 = 96 (1100000) +60 + 37 = 97 (1100001) +60 + 38 = 98 (1100010) +60 + 39 = 99 (1100011) +60 + 40 = 100 (1100100) +60 + 41 = 101 (1100101) +60 + 42 = 102 (1100110) +60 + 43 = 103 (1100111) +60 + 44 = 104 (1101000) +60 + 45 = 105 (1101001) +60 + 46 = 106 (1101010) +60 + 47 = 107 (1101011) +60 + 48 = 108 (1101100) +60 + 49 = 109 (1101101) +60 + 50 = 110 (1101110) +60 + 51 = 111 (1101111) +60 + 52 = 112 (1110000) +60 + 53 = 113 (1110001) +60 + 54 = 114 (1110010) +60 + 55 = 115 (1110011) +60 + 56 = 116 (1110100) +60 + 57 = 117 (1110101) +60 + 58 = 118 (1110110) +60 + 59 = 119 (1110111) +60 + 60 = 120 (1111000) +60 + 61 = 121 (1111001) +60 + 62 = 122 (1111010) +60 + 63 = 123 (1111011) +61 + 0 = 61 (0111101) +61 + 1 = 62 (0111110) +61 + 2 = 63 (0111111) +61 + 3 = 64 (1000000) +61 + 4 = 65 (1000001) +61 + 5 = 66 (1000010) +61 + 6 = 67 (1000011) +61 + 7 = 68 (1000100) +61 + 8 = 69 (1000101) +61 + 9 = 70 (1000110) +61 + 10 = 71 (1000111) +61 + 11 = 72 (1001000) +61 + 12 = 73 (1001001) +61 + 13 = 74 (1001010) +61 + 14 = 75 (1001011) +61 + 15 = 76 (1001100) +61 + 16 = 77 (1001101) +61 + 17 = 78 (1001110) +61 + 18 = 79 (1001111) +61 + 19 = 80 (1010000) +61 + 20 = 81 (1010001) +61 + 21 = 82 (1010010) +61 + 22 = 83 (1010011) +61 + 23 = 84 (1010100) +61 + 24 = 85 (1010101) +61 + 25 = 86 (1010110) +61 + 26 = 87 (1010111) +61 + 27 = 88 (1011000) +61 + 28 = 89 (1011001) +61 + 29 = 90 (1011010) +61 + 30 = 91 (1011011) +61 + 31 = 92 (1011100) +61 + 32 = 93 (1011101) +61 + 33 = 94 (1011110) +61 + 34 = 95 (1011111) +61 + 35 = 96 (1100000) +61 + 36 = 97 (1100001) +61 + 37 = 98 (1100010) +61 + 38 = 99 (1100011) +61 + 39 = 100 (1100100) +61 + 40 = 101 (1100101) +61 + 41 = 102 (1100110) +61 + 42 = 103 (1100111) +61 + 43 = 104 (1101000) +61 + 44 = 105 (1101001) +61 + 45 = 106 (1101010) +61 + 46 = 107 (1101011) +61 + 47 = 108 (1101100) +61 + 48 = 109 (1101101) +61 + 49 = 110 (1101110) +61 + 50 = 111 (1101111) +61 + 51 = 112 (1110000) +61 + 52 = 113 (1110001) +61 + 53 = 114 (1110010) +61 + 54 = 115 (1110011) +61 + 55 = 116 (1110100) +61 + 56 = 117 (1110101) +61 + 57 = 118 (1110110) +61 + 58 = 119 (1110111) +61 + 59 = 120 (1111000) +61 + 60 = 121 (1111001) +61 + 61 = 122 (1111010) +61 + 62 = 123 (1111011) +61 + 63 = 124 (1111100) +62 + 0 = 62 (0111110) +62 + 1 = 63 (0111111) +62 + 2 = 64 (1000000) +62 + 3 = 65 (1000001) +62 + 4 = 66 (1000010) +62 + 5 = 67 (1000011) +62 + 6 = 68 (1000100) +62 + 7 = 69 (1000101) +62 + 8 = 70 (1000110) +62 + 9 = 71 (1000111) +62 + 10 = 72 (1001000) +62 + 11 = 73 (1001001) +62 + 12 = 74 (1001010) +62 + 13 = 75 (1001011) +62 + 14 = 76 (1001100) +62 + 15 = 77 (1001101) +62 + 16 = 78 (1001110) +62 + 17 = 79 (1001111) +62 + 18 = 80 (1010000) +62 + 19 = 81 (1010001) +62 + 20 = 82 (1010010) +62 + 21 = 83 (1010011) +62 + 22 = 84 (1010100) +62 + 23 = 85 (1010101) +62 + 24 = 86 (1010110) +62 + 25 = 87 (1010111) +62 + 26 = 88 (1011000) +62 + 27 = 89 (1011001) +62 + 28 = 90 (1011010) +62 + 29 = 91 (1011011) +62 + 30 = 92 (1011100) +62 + 31 = 93 (1011101) +62 + 32 = 94 (1011110) +62 + 33 = 95 (1011111) +62 + 34 = 96 (1100000) +62 + 35 = 97 (1100001) +62 + 36 = 98 (1100010) +62 + 37 = 99 (1100011) +62 + 38 = 100 (1100100) +62 + 39 = 101 (1100101) +62 + 40 = 102 (1100110) +62 + 41 = 103 (1100111) +62 + 42 = 104 (1101000) +62 + 43 = 105 (1101001) +62 + 44 = 106 (1101010) +62 + 45 = 107 (1101011) +62 + 46 = 108 (1101100) +62 + 47 = 109 (1101101) +62 + 48 = 110 (1101110) +62 + 49 = 111 (1101111) +62 + 50 = 112 (1110000) +62 + 51 = 113 (1110001) +62 + 52 = 114 (1110010) +62 + 53 = 115 (1110011) +62 + 54 = 116 (1110100) +62 + 55 = 117 (1110101) +62 + 56 = 118 (1110110) +62 + 57 = 119 (1110111) +62 + 58 = 120 (1111000) +62 + 59 = 121 (1111001) +62 + 60 = 122 (1111010) +62 + 61 = 123 (1111011) +62 + 62 = 124 (1111100) +62 + 63 = 125 (1111101) +63 + 0 = 63 (0111111) +63 + 1 = 64 (1000000) +63 + 2 = 65 (1000001) +63 + 3 = 66 (1000010) +63 + 4 = 67 (1000011) +63 + 5 = 68 (1000100) +63 + 6 = 69 (1000101) +63 + 7 = 70 (1000110) +63 + 8 = 71 (1000111) +63 + 9 = 72 (1001000) +63 + 10 = 73 (1001001) +63 + 11 = 74 (1001010) +63 + 12 = 75 (1001011) +63 + 13 = 76 (1001100) +63 + 14 = 77 (1001101) +63 + 15 = 78 (1001110) +63 + 16 = 79 (1001111) +63 + 17 = 80 (1010000) +63 + 18 = 81 (1010001) +63 + 19 = 82 (1010010) +63 + 20 = 83 (1010011) +63 + 21 = 84 (1010100) +63 + 22 = 85 (1010101) +63 + 23 = 86 (1010110) +63 + 24 = 87 (1010111) +63 + 25 = 88 (1011000) +63 + 26 = 89 (1011001) +63 + 27 = 90 (1011010) +63 + 28 = 91 (1011011) +63 + 29 = 92 (1011100) +63 + 30 = 93 (1011101) +63 + 31 = 94 (1011110) +63 + 32 = 95 (1011111) +63 + 33 = 96 (1100000) +63 + 34 = 97 (1100001) +63 + 35 = 98 (1100010) +63 + 36 = 99 (1100011) +63 + 37 = 100 (1100100) +63 + 38 = 101 (1100101) +63 + 39 = 102 (1100110) +63 + 40 = 103 (1100111) +63 + 41 = 104 (1101000) +63 + 42 = 105 (1101001) +63 + 43 = 106 (1101010) +63 + 44 = 107 (1101011) +63 + 45 = 108 (1101100) +63 + 46 = 109 (1101101) +63 + 47 = 110 (1101110) +63 + 48 = 111 (1101111) +63 + 49 = 112 (1110000) +63 + 50 = 113 (1110001) +63 + 51 = 114 (1110010) +63 + 52 = 115 (1110011) +63 + 53 = 116 (1110100) +63 + 54 = 117 (1110101) +63 + 55 = 118 (1110110) +63 + 56 = 119 (1110111) +63 + 57 = 120 (1111000) +63 + 58 = 121 (1111001) +63 + 59 = 122 (1111010) +63 + 60 = 123 (1111011) +63 + 61 = 124 (1111100) +63 + 62 = 125 (1111101) +63 + 63 = 126 (1111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/main.cpp new file mode 100644 index 000000000..24eb43ae7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 7-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 7; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/stimgen.h new file mode 100644 index 000000000..feeda4215 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector7& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector7& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/common.h new file mode 100644 index 000000000..85b300c4d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<6> bool_vector6; +typedef sc_bv<9> bool_vector9; + +typedef sc_signal signal_bool_vector6; +typedef sc_signal signal_bool_vector9; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/datawidth.cpp new file mode 100644 index 000000000..e21c6eb6d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector6 tmp_a; + bool_vector6 tmp_b; + bool_vector9 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_uint() + tmp_b.to_uint(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/datawidth.h new file mode 100644 index 000000000..911b72c4f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector9& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector9& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/extension.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/extension.f new file mode 100644 index 000000000..673123bd2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/extension.f @@ -0,0 +1,3 @@ +extension/datawidth.cpp +extension/stimgen.cpp +extension/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/golden/extension.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/golden/extension.log new file mode 100644 index 000000000..529ae2755 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/golden/extension.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) +16 + 0 = 16 (000010000) +16 + 1 = 17 (000010001) +16 + 2 = 18 (000010010) +16 + 3 = 19 (000010011) +16 + 4 = 20 (000010100) +16 + 5 = 21 (000010101) +16 + 6 = 22 (000010110) +16 + 7 = 23 (000010111) +16 + 8 = 24 (000011000) +16 + 9 = 25 (000011001) +16 + 10 = 26 (000011010) +16 + 11 = 27 (000011011) +16 + 12 = 28 (000011100) +16 + 13 = 29 (000011101) +16 + 14 = 30 (000011110) +16 + 15 = 31 (000011111) +16 + 16 = 32 (000100000) +16 + 17 = 33 (000100001) +16 + 18 = 34 (000100010) +16 + 19 = 35 (000100011) +16 + 20 = 36 (000100100) +16 + 21 = 37 (000100101) +16 + 22 = 38 (000100110) +16 + 23 = 39 (000100111) +16 + 24 = 40 (000101000) +16 + 25 = 41 (000101001) +16 + 26 = 42 (000101010) +16 + 27 = 43 (000101011) +16 + 28 = 44 (000101100) +16 + 29 = 45 (000101101) +16 + 30 = 46 (000101110) +16 + 31 = 47 (000101111) +16 + 32 = 48 (000110000) +16 + 33 = 49 (000110001) +16 + 34 = 50 (000110010) +16 + 35 = 51 (000110011) +16 + 36 = 52 (000110100) +16 + 37 = 53 (000110101) +16 + 38 = 54 (000110110) +16 + 39 = 55 (000110111) +16 + 40 = 56 (000111000) +16 + 41 = 57 (000111001) +16 + 42 = 58 (000111010) +16 + 43 = 59 (000111011) +16 + 44 = 60 (000111100) +16 + 45 = 61 (000111101) +16 + 46 = 62 (000111110) +16 + 47 = 63 (000111111) +16 + 48 = 64 (001000000) +16 + 49 = 65 (001000001) +16 + 50 = 66 (001000010) +16 + 51 = 67 (001000011) +16 + 52 = 68 (001000100) +16 + 53 = 69 (001000101) +16 + 54 = 70 (001000110) +16 + 55 = 71 (001000111) +16 + 56 = 72 (001001000) +16 + 57 = 73 (001001001) +16 + 58 = 74 (001001010) +16 + 59 = 75 (001001011) +16 + 60 = 76 (001001100) +16 + 61 = 77 (001001101) +16 + 62 = 78 (001001110) +16 + 63 = 79 (001001111) +17 + 0 = 17 (000010001) +17 + 1 = 18 (000010010) +17 + 2 = 19 (000010011) +17 + 3 = 20 (000010100) +17 + 4 = 21 (000010101) +17 + 5 = 22 (000010110) +17 + 6 = 23 (000010111) +17 + 7 = 24 (000011000) +17 + 8 = 25 (000011001) +17 + 9 = 26 (000011010) +17 + 10 = 27 (000011011) +17 + 11 = 28 (000011100) +17 + 12 = 29 (000011101) +17 + 13 = 30 (000011110) +17 + 14 = 31 (000011111) +17 + 15 = 32 (000100000) +17 + 16 = 33 (000100001) +17 + 17 = 34 (000100010) +17 + 18 = 35 (000100011) +17 + 19 = 36 (000100100) +17 + 20 = 37 (000100101) +17 + 21 = 38 (000100110) +17 + 22 = 39 (000100111) +17 + 23 = 40 (000101000) +17 + 24 = 41 (000101001) +17 + 25 = 42 (000101010) +17 + 26 = 43 (000101011) +17 + 27 = 44 (000101100) +17 + 28 = 45 (000101101) +17 + 29 = 46 (000101110) +17 + 30 = 47 (000101111) +17 + 31 = 48 (000110000) +17 + 32 = 49 (000110001) +17 + 33 = 50 (000110010) +17 + 34 = 51 (000110011) +17 + 35 = 52 (000110100) +17 + 36 = 53 (000110101) +17 + 37 = 54 (000110110) +17 + 38 = 55 (000110111) +17 + 39 = 56 (000111000) +17 + 40 = 57 (000111001) +17 + 41 = 58 (000111010) +17 + 42 = 59 (000111011) +17 + 43 = 60 (000111100) +17 + 44 = 61 (000111101) +17 + 45 = 62 (000111110) +17 + 46 = 63 (000111111) +17 + 47 = 64 (001000000) +17 + 48 = 65 (001000001) +17 + 49 = 66 (001000010) +17 + 50 = 67 (001000011) +17 + 51 = 68 (001000100) +17 + 52 = 69 (001000101) +17 + 53 = 70 (001000110) +17 + 54 = 71 (001000111) +17 + 55 = 72 (001001000) +17 + 56 = 73 (001001001) +17 + 57 = 74 (001001010) +17 + 58 = 75 (001001011) +17 + 59 = 76 (001001100) +17 + 60 = 77 (001001101) +17 + 61 = 78 (001001110) +17 + 62 = 79 (001001111) +17 + 63 = 80 (001010000) +18 + 0 = 18 (000010010) +18 + 1 = 19 (000010011) +18 + 2 = 20 (000010100) +18 + 3 = 21 (000010101) +18 + 4 = 22 (000010110) +18 + 5 = 23 (000010111) +18 + 6 = 24 (000011000) +18 + 7 = 25 (000011001) +18 + 8 = 26 (000011010) +18 + 9 = 27 (000011011) +18 + 10 = 28 (000011100) +18 + 11 = 29 (000011101) +18 + 12 = 30 (000011110) +18 + 13 = 31 (000011111) +18 + 14 = 32 (000100000) +18 + 15 = 33 (000100001) +18 + 16 = 34 (000100010) +18 + 17 = 35 (000100011) +18 + 18 = 36 (000100100) +18 + 19 = 37 (000100101) +18 + 20 = 38 (000100110) +18 + 21 = 39 (000100111) +18 + 22 = 40 (000101000) +18 + 23 = 41 (000101001) +18 + 24 = 42 (000101010) +18 + 25 = 43 (000101011) +18 + 26 = 44 (000101100) +18 + 27 = 45 (000101101) +18 + 28 = 46 (000101110) +18 + 29 = 47 (000101111) +18 + 30 = 48 (000110000) +18 + 31 = 49 (000110001) +18 + 32 = 50 (000110010) +18 + 33 = 51 (000110011) +18 + 34 = 52 (000110100) +18 + 35 = 53 (000110101) +18 + 36 = 54 (000110110) +18 + 37 = 55 (000110111) +18 + 38 = 56 (000111000) +18 + 39 = 57 (000111001) +18 + 40 = 58 (000111010) +18 + 41 = 59 (000111011) +18 + 42 = 60 (000111100) +18 + 43 = 61 (000111101) +18 + 44 = 62 (000111110) +18 + 45 = 63 (000111111) +18 + 46 = 64 (001000000) +18 + 47 = 65 (001000001) +18 + 48 = 66 (001000010) +18 + 49 = 67 (001000011) +18 + 50 = 68 (001000100) +18 + 51 = 69 (001000101) +18 + 52 = 70 (001000110) +18 + 53 = 71 (001000111) +18 + 54 = 72 (001001000) +18 + 55 = 73 (001001001) +18 + 56 = 74 (001001010) +18 + 57 = 75 (001001011) +18 + 58 = 76 (001001100) +18 + 59 = 77 (001001101) +18 + 60 = 78 (001001110) +18 + 61 = 79 (001001111) +18 + 62 = 80 (001010000) +18 + 63 = 81 (001010001) +19 + 0 = 19 (000010011) +19 + 1 = 20 (000010100) +19 + 2 = 21 (000010101) +19 + 3 = 22 (000010110) +19 + 4 = 23 (000010111) +19 + 5 = 24 (000011000) +19 + 6 = 25 (000011001) +19 + 7 = 26 (000011010) +19 + 8 = 27 (000011011) +19 + 9 = 28 (000011100) +19 + 10 = 29 (000011101) +19 + 11 = 30 (000011110) +19 + 12 = 31 (000011111) +19 + 13 = 32 (000100000) +19 + 14 = 33 (000100001) +19 + 15 = 34 (000100010) +19 + 16 = 35 (000100011) +19 + 17 = 36 (000100100) +19 + 18 = 37 (000100101) +19 + 19 = 38 (000100110) +19 + 20 = 39 (000100111) +19 + 21 = 40 (000101000) +19 + 22 = 41 (000101001) +19 + 23 = 42 (000101010) +19 + 24 = 43 (000101011) +19 + 25 = 44 (000101100) +19 + 26 = 45 (000101101) +19 + 27 = 46 (000101110) +19 + 28 = 47 (000101111) +19 + 29 = 48 (000110000) +19 + 30 = 49 (000110001) +19 + 31 = 50 (000110010) +19 + 32 = 51 (000110011) +19 + 33 = 52 (000110100) +19 + 34 = 53 (000110101) +19 + 35 = 54 (000110110) +19 + 36 = 55 (000110111) +19 + 37 = 56 (000111000) +19 + 38 = 57 (000111001) +19 + 39 = 58 (000111010) +19 + 40 = 59 (000111011) +19 + 41 = 60 (000111100) +19 + 42 = 61 (000111101) +19 + 43 = 62 (000111110) +19 + 44 = 63 (000111111) +19 + 45 = 64 (001000000) +19 + 46 = 65 (001000001) +19 + 47 = 66 (001000010) +19 + 48 = 67 (001000011) +19 + 49 = 68 (001000100) +19 + 50 = 69 (001000101) +19 + 51 = 70 (001000110) +19 + 52 = 71 (001000111) +19 + 53 = 72 (001001000) +19 + 54 = 73 (001001001) +19 + 55 = 74 (001001010) +19 + 56 = 75 (001001011) +19 + 57 = 76 (001001100) +19 + 58 = 77 (001001101) +19 + 59 = 78 (001001110) +19 + 60 = 79 (001001111) +19 + 61 = 80 (001010000) +19 + 62 = 81 (001010001) +19 + 63 = 82 (001010010) +20 + 0 = 20 (000010100) +20 + 1 = 21 (000010101) +20 + 2 = 22 (000010110) +20 + 3 = 23 (000010111) +20 + 4 = 24 (000011000) +20 + 5 = 25 (000011001) +20 + 6 = 26 (000011010) +20 + 7 = 27 (000011011) +20 + 8 = 28 (000011100) +20 + 9 = 29 (000011101) +20 + 10 = 30 (000011110) +20 + 11 = 31 (000011111) +20 + 12 = 32 (000100000) +20 + 13 = 33 (000100001) +20 + 14 = 34 (000100010) +20 + 15 = 35 (000100011) +20 + 16 = 36 (000100100) +20 + 17 = 37 (000100101) +20 + 18 = 38 (000100110) +20 + 19 = 39 (000100111) +20 + 20 = 40 (000101000) +20 + 21 = 41 (000101001) +20 + 22 = 42 (000101010) +20 + 23 = 43 (000101011) +20 + 24 = 44 (000101100) +20 + 25 = 45 (000101101) +20 + 26 = 46 (000101110) +20 + 27 = 47 (000101111) +20 + 28 = 48 (000110000) +20 + 29 = 49 (000110001) +20 + 30 = 50 (000110010) +20 + 31 = 51 (000110011) +20 + 32 = 52 (000110100) +20 + 33 = 53 (000110101) +20 + 34 = 54 (000110110) +20 + 35 = 55 (000110111) +20 + 36 = 56 (000111000) +20 + 37 = 57 (000111001) +20 + 38 = 58 (000111010) +20 + 39 = 59 (000111011) +20 + 40 = 60 (000111100) +20 + 41 = 61 (000111101) +20 + 42 = 62 (000111110) +20 + 43 = 63 (000111111) +20 + 44 = 64 (001000000) +20 + 45 = 65 (001000001) +20 + 46 = 66 (001000010) +20 + 47 = 67 (001000011) +20 + 48 = 68 (001000100) +20 + 49 = 69 (001000101) +20 + 50 = 70 (001000110) +20 + 51 = 71 (001000111) +20 + 52 = 72 (001001000) +20 + 53 = 73 (001001001) +20 + 54 = 74 (001001010) +20 + 55 = 75 (001001011) +20 + 56 = 76 (001001100) +20 + 57 = 77 (001001101) +20 + 58 = 78 (001001110) +20 + 59 = 79 (001001111) +20 + 60 = 80 (001010000) +20 + 61 = 81 (001010001) +20 + 62 = 82 (001010010) +20 + 63 = 83 (001010011) +21 + 0 = 21 (000010101) +21 + 1 = 22 (000010110) +21 + 2 = 23 (000010111) +21 + 3 = 24 (000011000) +21 + 4 = 25 (000011001) +21 + 5 = 26 (000011010) +21 + 6 = 27 (000011011) +21 + 7 = 28 (000011100) +21 + 8 = 29 (000011101) +21 + 9 = 30 (000011110) +21 + 10 = 31 (000011111) +21 + 11 = 32 (000100000) +21 + 12 = 33 (000100001) +21 + 13 = 34 (000100010) +21 + 14 = 35 (000100011) +21 + 15 = 36 (000100100) +21 + 16 = 37 (000100101) +21 + 17 = 38 (000100110) +21 + 18 = 39 (000100111) +21 + 19 = 40 (000101000) +21 + 20 = 41 (000101001) +21 + 21 = 42 (000101010) +21 + 22 = 43 (000101011) +21 + 23 = 44 (000101100) +21 + 24 = 45 (000101101) +21 + 25 = 46 (000101110) +21 + 26 = 47 (000101111) +21 + 27 = 48 (000110000) +21 + 28 = 49 (000110001) +21 + 29 = 50 (000110010) +21 + 30 = 51 (000110011) +21 + 31 = 52 (000110100) +21 + 32 = 53 (000110101) +21 + 33 = 54 (000110110) +21 + 34 = 55 (000110111) +21 + 35 = 56 (000111000) +21 + 36 = 57 (000111001) +21 + 37 = 58 (000111010) +21 + 38 = 59 (000111011) +21 + 39 = 60 (000111100) +21 + 40 = 61 (000111101) +21 + 41 = 62 (000111110) +21 + 42 = 63 (000111111) +21 + 43 = 64 (001000000) +21 + 44 = 65 (001000001) +21 + 45 = 66 (001000010) +21 + 46 = 67 (001000011) +21 + 47 = 68 (001000100) +21 + 48 = 69 (001000101) +21 + 49 = 70 (001000110) +21 + 50 = 71 (001000111) +21 + 51 = 72 (001001000) +21 + 52 = 73 (001001001) +21 + 53 = 74 (001001010) +21 + 54 = 75 (001001011) +21 + 55 = 76 (001001100) +21 + 56 = 77 (001001101) +21 + 57 = 78 (001001110) +21 + 58 = 79 (001001111) +21 + 59 = 80 (001010000) +21 + 60 = 81 (001010001) +21 + 61 = 82 (001010010) +21 + 62 = 83 (001010011) +21 + 63 = 84 (001010100) +22 + 0 = 22 (000010110) +22 + 1 = 23 (000010111) +22 + 2 = 24 (000011000) +22 + 3 = 25 (000011001) +22 + 4 = 26 (000011010) +22 + 5 = 27 (000011011) +22 + 6 = 28 (000011100) +22 + 7 = 29 (000011101) +22 + 8 = 30 (000011110) +22 + 9 = 31 (000011111) +22 + 10 = 32 (000100000) +22 + 11 = 33 (000100001) +22 + 12 = 34 (000100010) +22 + 13 = 35 (000100011) +22 + 14 = 36 (000100100) +22 + 15 = 37 (000100101) +22 + 16 = 38 (000100110) +22 + 17 = 39 (000100111) +22 + 18 = 40 (000101000) +22 + 19 = 41 (000101001) +22 + 20 = 42 (000101010) +22 + 21 = 43 (000101011) +22 + 22 = 44 (000101100) +22 + 23 = 45 (000101101) +22 + 24 = 46 (000101110) +22 + 25 = 47 (000101111) +22 + 26 = 48 (000110000) +22 + 27 = 49 (000110001) +22 + 28 = 50 (000110010) +22 + 29 = 51 (000110011) +22 + 30 = 52 (000110100) +22 + 31 = 53 (000110101) +22 + 32 = 54 (000110110) +22 + 33 = 55 (000110111) +22 + 34 = 56 (000111000) +22 + 35 = 57 (000111001) +22 + 36 = 58 (000111010) +22 + 37 = 59 (000111011) +22 + 38 = 60 (000111100) +22 + 39 = 61 (000111101) +22 + 40 = 62 (000111110) +22 + 41 = 63 (000111111) +22 + 42 = 64 (001000000) +22 + 43 = 65 (001000001) +22 + 44 = 66 (001000010) +22 + 45 = 67 (001000011) +22 + 46 = 68 (001000100) +22 + 47 = 69 (001000101) +22 + 48 = 70 (001000110) +22 + 49 = 71 (001000111) +22 + 50 = 72 (001001000) +22 + 51 = 73 (001001001) +22 + 52 = 74 (001001010) +22 + 53 = 75 (001001011) +22 + 54 = 76 (001001100) +22 + 55 = 77 (001001101) +22 + 56 = 78 (001001110) +22 + 57 = 79 (001001111) +22 + 58 = 80 (001010000) +22 + 59 = 81 (001010001) +22 + 60 = 82 (001010010) +22 + 61 = 83 (001010011) +22 + 62 = 84 (001010100) +22 + 63 = 85 (001010101) +23 + 0 = 23 (000010111) +23 + 1 = 24 (000011000) +23 + 2 = 25 (000011001) +23 + 3 = 26 (000011010) +23 + 4 = 27 (000011011) +23 + 5 = 28 (000011100) +23 + 6 = 29 (000011101) +23 + 7 = 30 (000011110) +23 + 8 = 31 (000011111) +23 + 9 = 32 (000100000) +23 + 10 = 33 (000100001) +23 + 11 = 34 (000100010) +23 + 12 = 35 (000100011) +23 + 13 = 36 (000100100) +23 + 14 = 37 (000100101) +23 + 15 = 38 (000100110) +23 + 16 = 39 (000100111) +23 + 17 = 40 (000101000) +23 + 18 = 41 (000101001) +23 + 19 = 42 (000101010) +23 + 20 = 43 (000101011) +23 + 21 = 44 (000101100) +23 + 22 = 45 (000101101) +23 + 23 = 46 (000101110) +23 + 24 = 47 (000101111) +23 + 25 = 48 (000110000) +23 + 26 = 49 (000110001) +23 + 27 = 50 (000110010) +23 + 28 = 51 (000110011) +23 + 29 = 52 (000110100) +23 + 30 = 53 (000110101) +23 + 31 = 54 (000110110) +23 + 32 = 55 (000110111) +23 + 33 = 56 (000111000) +23 + 34 = 57 (000111001) +23 + 35 = 58 (000111010) +23 + 36 = 59 (000111011) +23 + 37 = 60 (000111100) +23 + 38 = 61 (000111101) +23 + 39 = 62 (000111110) +23 + 40 = 63 (000111111) +23 + 41 = 64 (001000000) +23 + 42 = 65 (001000001) +23 + 43 = 66 (001000010) +23 + 44 = 67 (001000011) +23 + 45 = 68 (001000100) +23 + 46 = 69 (001000101) +23 + 47 = 70 (001000110) +23 + 48 = 71 (001000111) +23 + 49 = 72 (001001000) +23 + 50 = 73 (001001001) +23 + 51 = 74 (001001010) +23 + 52 = 75 (001001011) +23 + 53 = 76 (001001100) +23 + 54 = 77 (001001101) +23 + 55 = 78 (001001110) +23 + 56 = 79 (001001111) +23 + 57 = 80 (001010000) +23 + 58 = 81 (001010001) +23 + 59 = 82 (001010010) +23 + 60 = 83 (001010011) +23 + 61 = 84 (001010100) +23 + 62 = 85 (001010101) +23 + 63 = 86 (001010110) +24 + 0 = 24 (000011000) +24 + 1 = 25 (000011001) +24 + 2 = 26 (000011010) +24 + 3 = 27 (000011011) +24 + 4 = 28 (000011100) +24 + 5 = 29 (000011101) +24 + 6 = 30 (000011110) +24 + 7 = 31 (000011111) +24 + 8 = 32 (000100000) +24 + 9 = 33 (000100001) +24 + 10 = 34 (000100010) +24 + 11 = 35 (000100011) +24 + 12 = 36 (000100100) +24 + 13 = 37 (000100101) +24 + 14 = 38 (000100110) +24 + 15 = 39 (000100111) +24 + 16 = 40 (000101000) +24 + 17 = 41 (000101001) +24 + 18 = 42 (000101010) +24 + 19 = 43 (000101011) +24 + 20 = 44 (000101100) +24 + 21 = 45 (000101101) +24 + 22 = 46 (000101110) +24 + 23 = 47 (000101111) +24 + 24 = 48 (000110000) +24 + 25 = 49 (000110001) +24 + 26 = 50 (000110010) +24 + 27 = 51 (000110011) +24 + 28 = 52 (000110100) +24 + 29 = 53 (000110101) +24 + 30 = 54 (000110110) +24 + 31 = 55 (000110111) +24 + 32 = 56 (000111000) +24 + 33 = 57 (000111001) +24 + 34 = 58 (000111010) +24 + 35 = 59 (000111011) +24 + 36 = 60 (000111100) +24 + 37 = 61 (000111101) +24 + 38 = 62 (000111110) +24 + 39 = 63 (000111111) +24 + 40 = 64 (001000000) +24 + 41 = 65 (001000001) +24 + 42 = 66 (001000010) +24 + 43 = 67 (001000011) +24 + 44 = 68 (001000100) +24 + 45 = 69 (001000101) +24 + 46 = 70 (001000110) +24 + 47 = 71 (001000111) +24 + 48 = 72 (001001000) +24 + 49 = 73 (001001001) +24 + 50 = 74 (001001010) +24 + 51 = 75 (001001011) +24 + 52 = 76 (001001100) +24 + 53 = 77 (001001101) +24 + 54 = 78 (001001110) +24 + 55 = 79 (001001111) +24 + 56 = 80 (001010000) +24 + 57 = 81 (001010001) +24 + 58 = 82 (001010010) +24 + 59 = 83 (001010011) +24 + 60 = 84 (001010100) +24 + 61 = 85 (001010101) +24 + 62 = 86 (001010110) +24 + 63 = 87 (001010111) +25 + 0 = 25 (000011001) +25 + 1 = 26 (000011010) +25 + 2 = 27 (000011011) +25 + 3 = 28 (000011100) +25 + 4 = 29 (000011101) +25 + 5 = 30 (000011110) +25 + 6 = 31 (000011111) +25 + 7 = 32 (000100000) +25 + 8 = 33 (000100001) +25 + 9 = 34 (000100010) +25 + 10 = 35 (000100011) +25 + 11 = 36 (000100100) +25 + 12 = 37 (000100101) +25 + 13 = 38 (000100110) +25 + 14 = 39 (000100111) +25 + 15 = 40 (000101000) +25 + 16 = 41 (000101001) +25 + 17 = 42 (000101010) +25 + 18 = 43 (000101011) +25 + 19 = 44 (000101100) +25 + 20 = 45 (000101101) +25 + 21 = 46 (000101110) +25 + 22 = 47 (000101111) +25 + 23 = 48 (000110000) +25 + 24 = 49 (000110001) +25 + 25 = 50 (000110010) +25 + 26 = 51 (000110011) +25 + 27 = 52 (000110100) +25 + 28 = 53 (000110101) +25 + 29 = 54 (000110110) +25 + 30 = 55 (000110111) +25 + 31 = 56 (000111000) +25 + 32 = 57 (000111001) +25 + 33 = 58 (000111010) +25 + 34 = 59 (000111011) +25 + 35 = 60 (000111100) +25 + 36 = 61 (000111101) +25 + 37 = 62 (000111110) +25 + 38 = 63 (000111111) +25 + 39 = 64 (001000000) +25 + 40 = 65 (001000001) +25 + 41 = 66 (001000010) +25 + 42 = 67 (001000011) +25 + 43 = 68 (001000100) +25 + 44 = 69 (001000101) +25 + 45 = 70 (001000110) +25 + 46 = 71 (001000111) +25 + 47 = 72 (001001000) +25 + 48 = 73 (001001001) +25 + 49 = 74 (001001010) +25 + 50 = 75 (001001011) +25 + 51 = 76 (001001100) +25 + 52 = 77 (001001101) +25 + 53 = 78 (001001110) +25 + 54 = 79 (001001111) +25 + 55 = 80 (001010000) +25 + 56 = 81 (001010001) +25 + 57 = 82 (001010010) +25 + 58 = 83 (001010011) +25 + 59 = 84 (001010100) +25 + 60 = 85 (001010101) +25 + 61 = 86 (001010110) +25 + 62 = 87 (001010111) +25 + 63 = 88 (001011000) +26 + 0 = 26 (000011010) +26 + 1 = 27 (000011011) +26 + 2 = 28 (000011100) +26 + 3 = 29 (000011101) +26 + 4 = 30 (000011110) +26 + 5 = 31 (000011111) +26 + 6 = 32 (000100000) +26 + 7 = 33 (000100001) +26 + 8 = 34 (000100010) +26 + 9 = 35 (000100011) +26 + 10 = 36 (000100100) +26 + 11 = 37 (000100101) +26 + 12 = 38 (000100110) +26 + 13 = 39 (000100111) +26 + 14 = 40 (000101000) +26 + 15 = 41 (000101001) +26 + 16 = 42 (000101010) +26 + 17 = 43 (000101011) +26 + 18 = 44 (000101100) +26 + 19 = 45 (000101101) +26 + 20 = 46 (000101110) +26 + 21 = 47 (000101111) +26 + 22 = 48 (000110000) +26 + 23 = 49 (000110001) +26 + 24 = 50 (000110010) +26 + 25 = 51 (000110011) +26 + 26 = 52 (000110100) +26 + 27 = 53 (000110101) +26 + 28 = 54 (000110110) +26 + 29 = 55 (000110111) +26 + 30 = 56 (000111000) +26 + 31 = 57 (000111001) +26 + 32 = 58 (000111010) +26 + 33 = 59 (000111011) +26 + 34 = 60 (000111100) +26 + 35 = 61 (000111101) +26 + 36 = 62 (000111110) +26 + 37 = 63 (000111111) +26 + 38 = 64 (001000000) +26 + 39 = 65 (001000001) +26 + 40 = 66 (001000010) +26 + 41 = 67 (001000011) +26 + 42 = 68 (001000100) +26 + 43 = 69 (001000101) +26 + 44 = 70 (001000110) +26 + 45 = 71 (001000111) +26 + 46 = 72 (001001000) +26 + 47 = 73 (001001001) +26 + 48 = 74 (001001010) +26 + 49 = 75 (001001011) +26 + 50 = 76 (001001100) +26 + 51 = 77 (001001101) +26 + 52 = 78 (001001110) +26 + 53 = 79 (001001111) +26 + 54 = 80 (001010000) +26 + 55 = 81 (001010001) +26 + 56 = 82 (001010010) +26 + 57 = 83 (001010011) +26 + 58 = 84 (001010100) +26 + 59 = 85 (001010101) +26 + 60 = 86 (001010110) +26 + 61 = 87 (001010111) +26 + 62 = 88 (001011000) +26 + 63 = 89 (001011001) +27 + 0 = 27 (000011011) +27 + 1 = 28 (000011100) +27 + 2 = 29 (000011101) +27 + 3 = 30 (000011110) +27 + 4 = 31 (000011111) +27 + 5 = 32 (000100000) +27 + 6 = 33 (000100001) +27 + 7 = 34 (000100010) +27 + 8 = 35 (000100011) +27 + 9 = 36 (000100100) +27 + 10 = 37 (000100101) +27 + 11 = 38 (000100110) +27 + 12 = 39 (000100111) +27 + 13 = 40 (000101000) +27 + 14 = 41 (000101001) +27 + 15 = 42 (000101010) +27 + 16 = 43 (000101011) +27 + 17 = 44 (000101100) +27 + 18 = 45 (000101101) +27 + 19 = 46 (000101110) +27 + 20 = 47 (000101111) +27 + 21 = 48 (000110000) +27 + 22 = 49 (000110001) +27 + 23 = 50 (000110010) +27 + 24 = 51 (000110011) +27 + 25 = 52 (000110100) +27 + 26 = 53 (000110101) +27 + 27 = 54 (000110110) +27 + 28 = 55 (000110111) +27 + 29 = 56 (000111000) +27 + 30 = 57 (000111001) +27 + 31 = 58 (000111010) +27 + 32 = 59 (000111011) +27 + 33 = 60 (000111100) +27 + 34 = 61 (000111101) +27 + 35 = 62 (000111110) +27 + 36 = 63 (000111111) +27 + 37 = 64 (001000000) +27 + 38 = 65 (001000001) +27 + 39 = 66 (001000010) +27 + 40 = 67 (001000011) +27 + 41 = 68 (001000100) +27 + 42 = 69 (001000101) +27 + 43 = 70 (001000110) +27 + 44 = 71 (001000111) +27 + 45 = 72 (001001000) +27 + 46 = 73 (001001001) +27 + 47 = 74 (001001010) +27 + 48 = 75 (001001011) +27 + 49 = 76 (001001100) +27 + 50 = 77 (001001101) +27 + 51 = 78 (001001110) +27 + 52 = 79 (001001111) +27 + 53 = 80 (001010000) +27 + 54 = 81 (001010001) +27 + 55 = 82 (001010010) +27 + 56 = 83 (001010011) +27 + 57 = 84 (001010100) +27 + 58 = 85 (001010101) +27 + 59 = 86 (001010110) +27 + 60 = 87 (001010111) +27 + 61 = 88 (001011000) +27 + 62 = 89 (001011001) +27 + 63 = 90 (001011010) +28 + 0 = 28 (000011100) +28 + 1 = 29 (000011101) +28 + 2 = 30 (000011110) +28 + 3 = 31 (000011111) +28 + 4 = 32 (000100000) +28 + 5 = 33 (000100001) +28 + 6 = 34 (000100010) +28 + 7 = 35 (000100011) +28 + 8 = 36 (000100100) +28 + 9 = 37 (000100101) +28 + 10 = 38 (000100110) +28 + 11 = 39 (000100111) +28 + 12 = 40 (000101000) +28 + 13 = 41 (000101001) +28 + 14 = 42 (000101010) +28 + 15 = 43 (000101011) +28 + 16 = 44 (000101100) +28 + 17 = 45 (000101101) +28 + 18 = 46 (000101110) +28 + 19 = 47 (000101111) +28 + 20 = 48 (000110000) +28 + 21 = 49 (000110001) +28 + 22 = 50 (000110010) +28 + 23 = 51 (000110011) +28 + 24 = 52 (000110100) +28 + 25 = 53 (000110101) +28 + 26 = 54 (000110110) +28 + 27 = 55 (000110111) +28 + 28 = 56 (000111000) +28 + 29 = 57 (000111001) +28 + 30 = 58 (000111010) +28 + 31 = 59 (000111011) +28 + 32 = 60 (000111100) +28 + 33 = 61 (000111101) +28 + 34 = 62 (000111110) +28 + 35 = 63 (000111111) +28 + 36 = 64 (001000000) +28 + 37 = 65 (001000001) +28 + 38 = 66 (001000010) +28 + 39 = 67 (001000011) +28 + 40 = 68 (001000100) +28 + 41 = 69 (001000101) +28 + 42 = 70 (001000110) +28 + 43 = 71 (001000111) +28 + 44 = 72 (001001000) +28 + 45 = 73 (001001001) +28 + 46 = 74 (001001010) +28 + 47 = 75 (001001011) +28 + 48 = 76 (001001100) +28 + 49 = 77 (001001101) +28 + 50 = 78 (001001110) +28 + 51 = 79 (001001111) +28 + 52 = 80 (001010000) +28 + 53 = 81 (001010001) +28 + 54 = 82 (001010010) +28 + 55 = 83 (001010011) +28 + 56 = 84 (001010100) +28 + 57 = 85 (001010101) +28 + 58 = 86 (001010110) +28 + 59 = 87 (001010111) +28 + 60 = 88 (001011000) +28 + 61 = 89 (001011001) +28 + 62 = 90 (001011010) +28 + 63 = 91 (001011011) +29 + 0 = 29 (000011101) +29 + 1 = 30 (000011110) +29 + 2 = 31 (000011111) +29 + 3 = 32 (000100000) +29 + 4 = 33 (000100001) +29 + 5 = 34 (000100010) +29 + 6 = 35 (000100011) +29 + 7 = 36 (000100100) +29 + 8 = 37 (000100101) +29 + 9 = 38 (000100110) +29 + 10 = 39 (000100111) +29 + 11 = 40 (000101000) +29 + 12 = 41 (000101001) +29 + 13 = 42 (000101010) +29 + 14 = 43 (000101011) +29 + 15 = 44 (000101100) +29 + 16 = 45 (000101101) +29 + 17 = 46 (000101110) +29 + 18 = 47 (000101111) +29 + 19 = 48 (000110000) +29 + 20 = 49 (000110001) +29 + 21 = 50 (000110010) +29 + 22 = 51 (000110011) +29 + 23 = 52 (000110100) +29 + 24 = 53 (000110101) +29 + 25 = 54 (000110110) +29 + 26 = 55 (000110111) +29 + 27 = 56 (000111000) +29 + 28 = 57 (000111001) +29 + 29 = 58 (000111010) +29 + 30 = 59 (000111011) +29 + 31 = 60 (000111100) +29 + 32 = 61 (000111101) +29 + 33 = 62 (000111110) +29 + 34 = 63 (000111111) +29 + 35 = 64 (001000000) +29 + 36 = 65 (001000001) +29 + 37 = 66 (001000010) +29 + 38 = 67 (001000011) +29 + 39 = 68 (001000100) +29 + 40 = 69 (001000101) +29 + 41 = 70 (001000110) +29 + 42 = 71 (001000111) +29 + 43 = 72 (001001000) +29 + 44 = 73 (001001001) +29 + 45 = 74 (001001010) +29 + 46 = 75 (001001011) +29 + 47 = 76 (001001100) +29 + 48 = 77 (001001101) +29 + 49 = 78 (001001110) +29 + 50 = 79 (001001111) +29 + 51 = 80 (001010000) +29 + 52 = 81 (001010001) +29 + 53 = 82 (001010010) +29 + 54 = 83 (001010011) +29 + 55 = 84 (001010100) +29 + 56 = 85 (001010101) +29 + 57 = 86 (001010110) +29 + 58 = 87 (001010111) +29 + 59 = 88 (001011000) +29 + 60 = 89 (001011001) +29 + 61 = 90 (001011010) +29 + 62 = 91 (001011011) +29 + 63 = 92 (001011100) +30 + 0 = 30 (000011110) +30 + 1 = 31 (000011111) +30 + 2 = 32 (000100000) +30 + 3 = 33 (000100001) +30 + 4 = 34 (000100010) +30 + 5 = 35 (000100011) +30 + 6 = 36 (000100100) +30 + 7 = 37 (000100101) +30 + 8 = 38 (000100110) +30 + 9 = 39 (000100111) +30 + 10 = 40 (000101000) +30 + 11 = 41 (000101001) +30 + 12 = 42 (000101010) +30 + 13 = 43 (000101011) +30 + 14 = 44 (000101100) +30 + 15 = 45 (000101101) +30 + 16 = 46 (000101110) +30 + 17 = 47 (000101111) +30 + 18 = 48 (000110000) +30 + 19 = 49 (000110001) +30 + 20 = 50 (000110010) +30 + 21 = 51 (000110011) +30 + 22 = 52 (000110100) +30 + 23 = 53 (000110101) +30 + 24 = 54 (000110110) +30 + 25 = 55 (000110111) +30 + 26 = 56 (000111000) +30 + 27 = 57 (000111001) +30 + 28 = 58 (000111010) +30 + 29 = 59 (000111011) +30 + 30 = 60 (000111100) +30 + 31 = 61 (000111101) +30 + 32 = 62 (000111110) +30 + 33 = 63 (000111111) +30 + 34 = 64 (001000000) +30 + 35 = 65 (001000001) +30 + 36 = 66 (001000010) +30 + 37 = 67 (001000011) +30 + 38 = 68 (001000100) +30 + 39 = 69 (001000101) +30 + 40 = 70 (001000110) +30 + 41 = 71 (001000111) +30 + 42 = 72 (001001000) +30 + 43 = 73 (001001001) +30 + 44 = 74 (001001010) +30 + 45 = 75 (001001011) +30 + 46 = 76 (001001100) +30 + 47 = 77 (001001101) +30 + 48 = 78 (001001110) +30 + 49 = 79 (001001111) +30 + 50 = 80 (001010000) +30 + 51 = 81 (001010001) +30 + 52 = 82 (001010010) +30 + 53 = 83 (001010011) +30 + 54 = 84 (001010100) +30 + 55 = 85 (001010101) +30 + 56 = 86 (001010110) +30 + 57 = 87 (001010111) +30 + 58 = 88 (001011000) +30 + 59 = 89 (001011001) +30 + 60 = 90 (001011010) +30 + 61 = 91 (001011011) +30 + 62 = 92 (001011100) +30 + 63 = 93 (001011101) +31 + 0 = 31 (000011111) +31 + 1 = 32 (000100000) +31 + 2 = 33 (000100001) +31 + 3 = 34 (000100010) +31 + 4 = 35 (000100011) +31 + 5 = 36 (000100100) +31 + 6 = 37 (000100101) +31 + 7 = 38 (000100110) +31 + 8 = 39 (000100111) +31 + 9 = 40 (000101000) +31 + 10 = 41 (000101001) +31 + 11 = 42 (000101010) +31 + 12 = 43 (000101011) +31 + 13 = 44 (000101100) +31 + 14 = 45 (000101101) +31 + 15 = 46 (000101110) +31 + 16 = 47 (000101111) +31 + 17 = 48 (000110000) +31 + 18 = 49 (000110001) +31 + 19 = 50 (000110010) +31 + 20 = 51 (000110011) +31 + 21 = 52 (000110100) +31 + 22 = 53 (000110101) +31 + 23 = 54 (000110110) +31 + 24 = 55 (000110111) +31 + 25 = 56 (000111000) +31 + 26 = 57 (000111001) +31 + 27 = 58 (000111010) +31 + 28 = 59 (000111011) +31 + 29 = 60 (000111100) +31 + 30 = 61 (000111101) +31 + 31 = 62 (000111110) +31 + 32 = 63 (000111111) +31 + 33 = 64 (001000000) +31 + 34 = 65 (001000001) +31 + 35 = 66 (001000010) +31 + 36 = 67 (001000011) +31 + 37 = 68 (001000100) +31 + 38 = 69 (001000101) +31 + 39 = 70 (001000110) +31 + 40 = 71 (001000111) +31 + 41 = 72 (001001000) +31 + 42 = 73 (001001001) +31 + 43 = 74 (001001010) +31 + 44 = 75 (001001011) +31 + 45 = 76 (001001100) +31 + 46 = 77 (001001101) +31 + 47 = 78 (001001110) +31 + 48 = 79 (001001111) +31 + 49 = 80 (001010000) +31 + 50 = 81 (001010001) +31 + 51 = 82 (001010010) +31 + 52 = 83 (001010011) +31 + 53 = 84 (001010100) +31 + 54 = 85 (001010101) +31 + 55 = 86 (001010110) +31 + 56 = 87 (001010111) +31 + 57 = 88 (001011000) +31 + 58 = 89 (001011001) +31 + 59 = 90 (001011010) +31 + 60 = 91 (001011011) +31 + 61 = 92 (001011100) +31 + 62 = 93 (001011101) +31 + 63 = 94 (001011110) +32 + 0 = 32 (000100000) +32 + 1 = 33 (000100001) +32 + 2 = 34 (000100010) +32 + 3 = 35 (000100011) +32 + 4 = 36 (000100100) +32 + 5 = 37 (000100101) +32 + 6 = 38 (000100110) +32 + 7 = 39 (000100111) +32 + 8 = 40 (000101000) +32 + 9 = 41 (000101001) +32 + 10 = 42 (000101010) +32 + 11 = 43 (000101011) +32 + 12 = 44 (000101100) +32 + 13 = 45 (000101101) +32 + 14 = 46 (000101110) +32 + 15 = 47 (000101111) +32 + 16 = 48 (000110000) +32 + 17 = 49 (000110001) +32 + 18 = 50 (000110010) +32 + 19 = 51 (000110011) +32 + 20 = 52 (000110100) +32 + 21 = 53 (000110101) +32 + 22 = 54 (000110110) +32 + 23 = 55 (000110111) +32 + 24 = 56 (000111000) +32 + 25 = 57 (000111001) +32 + 26 = 58 (000111010) +32 + 27 = 59 (000111011) +32 + 28 = 60 (000111100) +32 + 29 = 61 (000111101) +32 + 30 = 62 (000111110) +32 + 31 = 63 (000111111) +32 + 32 = 64 (001000000) +32 + 33 = 65 (001000001) +32 + 34 = 66 (001000010) +32 + 35 = 67 (001000011) +32 + 36 = 68 (001000100) +32 + 37 = 69 (001000101) +32 + 38 = 70 (001000110) +32 + 39 = 71 (001000111) +32 + 40 = 72 (001001000) +32 + 41 = 73 (001001001) +32 + 42 = 74 (001001010) +32 + 43 = 75 (001001011) +32 + 44 = 76 (001001100) +32 + 45 = 77 (001001101) +32 + 46 = 78 (001001110) +32 + 47 = 79 (001001111) +32 + 48 = 80 (001010000) +32 + 49 = 81 (001010001) +32 + 50 = 82 (001010010) +32 + 51 = 83 (001010011) +32 + 52 = 84 (001010100) +32 + 53 = 85 (001010101) +32 + 54 = 86 (001010110) +32 + 55 = 87 (001010111) +32 + 56 = 88 (001011000) +32 + 57 = 89 (001011001) +32 + 58 = 90 (001011010) +32 + 59 = 91 (001011011) +32 + 60 = 92 (001011100) +32 + 61 = 93 (001011101) +32 + 62 = 94 (001011110) +32 + 63 = 95 (001011111) +33 + 0 = 33 (000100001) +33 + 1 = 34 (000100010) +33 + 2 = 35 (000100011) +33 + 3 = 36 (000100100) +33 + 4 = 37 (000100101) +33 + 5 = 38 (000100110) +33 + 6 = 39 (000100111) +33 + 7 = 40 (000101000) +33 + 8 = 41 (000101001) +33 + 9 = 42 (000101010) +33 + 10 = 43 (000101011) +33 + 11 = 44 (000101100) +33 + 12 = 45 (000101101) +33 + 13 = 46 (000101110) +33 + 14 = 47 (000101111) +33 + 15 = 48 (000110000) +33 + 16 = 49 (000110001) +33 + 17 = 50 (000110010) +33 + 18 = 51 (000110011) +33 + 19 = 52 (000110100) +33 + 20 = 53 (000110101) +33 + 21 = 54 (000110110) +33 + 22 = 55 (000110111) +33 + 23 = 56 (000111000) +33 + 24 = 57 (000111001) +33 + 25 = 58 (000111010) +33 + 26 = 59 (000111011) +33 + 27 = 60 (000111100) +33 + 28 = 61 (000111101) +33 + 29 = 62 (000111110) +33 + 30 = 63 (000111111) +33 + 31 = 64 (001000000) +33 + 32 = 65 (001000001) +33 + 33 = 66 (001000010) +33 + 34 = 67 (001000011) +33 + 35 = 68 (001000100) +33 + 36 = 69 (001000101) +33 + 37 = 70 (001000110) +33 + 38 = 71 (001000111) +33 + 39 = 72 (001001000) +33 + 40 = 73 (001001001) +33 + 41 = 74 (001001010) +33 + 42 = 75 (001001011) +33 + 43 = 76 (001001100) +33 + 44 = 77 (001001101) +33 + 45 = 78 (001001110) +33 + 46 = 79 (001001111) +33 + 47 = 80 (001010000) +33 + 48 = 81 (001010001) +33 + 49 = 82 (001010010) +33 + 50 = 83 (001010011) +33 + 51 = 84 (001010100) +33 + 52 = 85 (001010101) +33 + 53 = 86 (001010110) +33 + 54 = 87 (001010111) +33 + 55 = 88 (001011000) +33 + 56 = 89 (001011001) +33 + 57 = 90 (001011010) +33 + 58 = 91 (001011011) +33 + 59 = 92 (001011100) +33 + 60 = 93 (001011101) +33 + 61 = 94 (001011110) +33 + 62 = 95 (001011111) +33 + 63 = 96 (001100000) +34 + 0 = 34 (000100010) +34 + 1 = 35 (000100011) +34 + 2 = 36 (000100100) +34 + 3 = 37 (000100101) +34 + 4 = 38 (000100110) +34 + 5 = 39 (000100111) +34 + 6 = 40 (000101000) +34 + 7 = 41 (000101001) +34 + 8 = 42 (000101010) +34 + 9 = 43 (000101011) +34 + 10 = 44 (000101100) +34 + 11 = 45 (000101101) +34 + 12 = 46 (000101110) +34 + 13 = 47 (000101111) +34 + 14 = 48 (000110000) +34 + 15 = 49 (000110001) +34 + 16 = 50 (000110010) +34 + 17 = 51 (000110011) +34 + 18 = 52 (000110100) +34 + 19 = 53 (000110101) +34 + 20 = 54 (000110110) +34 + 21 = 55 (000110111) +34 + 22 = 56 (000111000) +34 + 23 = 57 (000111001) +34 + 24 = 58 (000111010) +34 + 25 = 59 (000111011) +34 + 26 = 60 (000111100) +34 + 27 = 61 (000111101) +34 + 28 = 62 (000111110) +34 + 29 = 63 (000111111) +34 + 30 = 64 (001000000) +34 + 31 = 65 (001000001) +34 + 32 = 66 (001000010) +34 + 33 = 67 (001000011) +34 + 34 = 68 (001000100) +34 + 35 = 69 (001000101) +34 + 36 = 70 (001000110) +34 + 37 = 71 (001000111) +34 + 38 = 72 (001001000) +34 + 39 = 73 (001001001) +34 + 40 = 74 (001001010) +34 + 41 = 75 (001001011) +34 + 42 = 76 (001001100) +34 + 43 = 77 (001001101) +34 + 44 = 78 (001001110) +34 + 45 = 79 (001001111) +34 + 46 = 80 (001010000) +34 + 47 = 81 (001010001) +34 + 48 = 82 (001010010) +34 + 49 = 83 (001010011) +34 + 50 = 84 (001010100) +34 + 51 = 85 (001010101) +34 + 52 = 86 (001010110) +34 + 53 = 87 (001010111) +34 + 54 = 88 (001011000) +34 + 55 = 89 (001011001) +34 + 56 = 90 (001011010) +34 + 57 = 91 (001011011) +34 + 58 = 92 (001011100) +34 + 59 = 93 (001011101) +34 + 60 = 94 (001011110) +34 + 61 = 95 (001011111) +34 + 62 = 96 (001100000) +34 + 63 = 97 (001100001) +35 + 0 = 35 (000100011) +35 + 1 = 36 (000100100) +35 + 2 = 37 (000100101) +35 + 3 = 38 (000100110) +35 + 4 = 39 (000100111) +35 + 5 = 40 (000101000) +35 + 6 = 41 (000101001) +35 + 7 = 42 (000101010) +35 + 8 = 43 (000101011) +35 + 9 = 44 (000101100) +35 + 10 = 45 (000101101) +35 + 11 = 46 (000101110) +35 + 12 = 47 (000101111) +35 + 13 = 48 (000110000) +35 + 14 = 49 (000110001) +35 + 15 = 50 (000110010) +35 + 16 = 51 (000110011) +35 + 17 = 52 (000110100) +35 + 18 = 53 (000110101) +35 + 19 = 54 (000110110) +35 + 20 = 55 (000110111) +35 + 21 = 56 (000111000) +35 + 22 = 57 (000111001) +35 + 23 = 58 (000111010) +35 + 24 = 59 (000111011) +35 + 25 = 60 (000111100) +35 + 26 = 61 (000111101) +35 + 27 = 62 (000111110) +35 + 28 = 63 (000111111) +35 + 29 = 64 (001000000) +35 + 30 = 65 (001000001) +35 + 31 = 66 (001000010) +35 + 32 = 67 (001000011) +35 + 33 = 68 (001000100) +35 + 34 = 69 (001000101) +35 + 35 = 70 (001000110) +35 + 36 = 71 (001000111) +35 + 37 = 72 (001001000) +35 + 38 = 73 (001001001) +35 + 39 = 74 (001001010) +35 + 40 = 75 (001001011) +35 + 41 = 76 (001001100) +35 + 42 = 77 (001001101) +35 + 43 = 78 (001001110) +35 + 44 = 79 (001001111) +35 + 45 = 80 (001010000) +35 + 46 = 81 (001010001) +35 + 47 = 82 (001010010) +35 + 48 = 83 (001010011) +35 + 49 = 84 (001010100) +35 + 50 = 85 (001010101) +35 + 51 = 86 (001010110) +35 + 52 = 87 (001010111) +35 + 53 = 88 (001011000) +35 + 54 = 89 (001011001) +35 + 55 = 90 (001011010) +35 + 56 = 91 (001011011) +35 + 57 = 92 (001011100) +35 + 58 = 93 (001011101) +35 + 59 = 94 (001011110) +35 + 60 = 95 (001011111) +35 + 61 = 96 (001100000) +35 + 62 = 97 (001100001) +35 + 63 = 98 (001100010) +36 + 0 = 36 (000100100) +36 + 1 = 37 (000100101) +36 + 2 = 38 (000100110) +36 + 3 = 39 (000100111) +36 + 4 = 40 (000101000) +36 + 5 = 41 (000101001) +36 + 6 = 42 (000101010) +36 + 7 = 43 (000101011) +36 + 8 = 44 (000101100) +36 + 9 = 45 (000101101) +36 + 10 = 46 (000101110) +36 + 11 = 47 (000101111) +36 + 12 = 48 (000110000) +36 + 13 = 49 (000110001) +36 + 14 = 50 (000110010) +36 + 15 = 51 (000110011) +36 + 16 = 52 (000110100) +36 + 17 = 53 (000110101) +36 + 18 = 54 (000110110) +36 + 19 = 55 (000110111) +36 + 20 = 56 (000111000) +36 + 21 = 57 (000111001) +36 + 22 = 58 (000111010) +36 + 23 = 59 (000111011) +36 + 24 = 60 (000111100) +36 + 25 = 61 (000111101) +36 + 26 = 62 (000111110) +36 + 27 = 63 (000111111) +36 + 28 = 64 (001000000) +36 + 29 = 65 (001000001) +36 + 30 = 66 (001000010) +36 + 31 = 67 (001000011) +36 + 32 = 68 (001000100) +36 + 33 = 69 (001000101) +36 + 34 = 70 (001000110) +36 + 35 = 71 (001000111) +36 + 36 = 72 (001001000) +36 + 37 = 73 (001001001) +36 + 38 = 74 (001001010) +36 + 39 = 75 (001001011) +36 + 40 = 76 (001001100) +36 + 41 = 77 (001001101) +36 + 42 = 78 (001001110) +36 + 43 = 79 (001001111) +36 + 44 = 80 (001010000) +36 + 45 = 81 (001010001) +36 + 46 = 82 (001010010) +36 + 47 = 83 (001010011) +36 + 48 = 84 (001010100) +36 + 49 = 85 (001010101) +36 + 50 = 86 (001010110) +36 + 51 = 87 (001010111) +36 + 52 = 88 (001011000) +36 + 53 = 89 (001011001) +36 + 54 = 90 (001011010) +36 + 55 = 91 (001011011) +36 + 56 = 92 (001011100) +36 + 57 = 93 (001011101) +36 + 58 = 94 (001011110) +36 + 59 = 95 (001011111) +36 + 60 = 96 (001100000) +36 + 61 = 97 (001100001) +36 + 62 = 98 (001100010) +36 + 63 = 99 (001100011) +37 + 0 = 37 (000100101) +37 + 1 = 38 (000100110) +37 + 2 = 39 (000100111) +37 + 3 = 40 (000101000) +37 + 4 = 41 (000101001) +37 + 5 = 42 (000101010) +37 + 6 = 43 (000101011) +37 + 7 = 44 (000101100) +37 + 8 = 45 (000101101) +37 + 9 = 46 (000101110) +37 + 10 = 47 (000101111) +37 + 11 = 48 (000110000) +37 + 12 = 49 (000110001) +37 + 13 = 50 (000110010) +37 + 14 = 51 (000110011) +37 + 15 = 52 (000110100) +37 + 16 = 53 (000110101) +37 + 17 = 54 (000110110) +37 + 18 = 55 (000110111) +37 + 19 = 56 (000111000) +37 + 20 = 57 (000111001) +37 + 21 = 58 (000111010) +37 + 22 = 59 (000111011) +37 + 23 = 60 (000111100) +37 + 24 = 61 (000111101) +37 + 25 = 62 (000111110) +37 + 26 = 63 (000111111) +37 + 27 = 64 (001000000) +37 + 28 = 65 (001000001) +37 + 29 = 66 (001000010) +37 + 30 = 67 (001000011) +37 + 31 = 68 (001000100) +37 + 32 = 69 (001000101) +37 + 33 = 70 (001000110) +37 + 34 = 71 (001000111) +37 + 35 = 72 (001001000) +37 + 36 = 73 (001001001) +37 + 37 = 74 (001001010) +37 + 38 = 75 (001001011) +37 + 39 = 76 (001001100) +37 + 40 = 77 (001001101) +37 + 41 = 78 (001001110) +37 + 42 = 79 (001001111) +37 + 43 = 80 (001010000) +37 + 44 = 81 (001010001) +37 + 45 = 82 (001010010) +37 + 46 = 83 (001010011) +37 + 47 = 84 (001010100) +37 + 48 = 85 (001010101) +37 + 49 = 86 (001010110) +37 + 50 = 87 (001010111) +37 + 51 = 88 (001011000) +37 + 52 = 89 (001011001) +37 + 53 = 90 (001011010) +37 + 54 = 91 (001011011) +37 + 55 = 92 (001011100) +37 + 56 = 93 (001011101) +37 + 57 = 94 (001011110) +37 + 58 = 95 (001011111) +37 + 59 = 96 (001100000) +37 + 60 = 97 (001100001) +37 + 61 = 98 (001100010) +37 + 62 = 99 (001100011) +37 + 63 = 100 (001100100) +38 + 0 = 38 (000100110) +38 + 1 = 39 (000100111) +38 + 2 = 40 (000101000) +38 + 3 = 41 (000101001) +38 + 4 = 42 (000101010) +38 + 5 = 43 (000101011) +38 + 6 = 44 (000101100) +38 + 7 = 45 (000101101) +38 + 8 = 46 (000101110) +38 + 9 = 47 (000101111) +38 + 10 = 48 (000110000) +38 + 11 = 49 (000110001) +38 + 12 = 50 (000110010) +38 + 13 = 51 (000110011) +38 + 14 = 52 (000110100) +38 + 15 = 53 (000110101) +38 + 16 = 54 (000110110) +38 + 17 = 55 (000110111) +38 + 18 = 56 (000111000) +38 + 19 = 57 (000111001) +38 + 20 = 58 (000111010) +38 + 21 = 59 (000111011) +38 + 22 = 60 (000111100) +38 + 23 = 61 (000111101) +38 + 24 = 62 (000111110) +38 + 25 = 63 (000111111) +38 + 26 = 64 (001000000) +38 + 27 = 65 (001000001) +38 + 28 = 66 (001000010) +38 + 29 = 67 (001000011) +38 + 30 = 68 (001000100) +38 + 31 = 69 (001000101) +38 + 32 = 70 (001000110) +38 + 33 = 71 (001000111) +38 + 34 = 72 (001001000) +38 + 35 = 73 (001001001) +38 + 36 = 74 (001001010) +38 + 37 = 75 (001001011) +38 + 38 = 76 (001001100) +38 + 39 = 77 (001001101) +38 + 40 = 78 (001001110) +38 + 41 = 79 (001001111) +38 + 42 = 80 (001010000) +38 + 43 = 81 (001010001) +38 + 44 = 82 (001010010) +38 + 45 = 83 (001010011) +38 + 46 = 84 (001010100) +38 + 47 = 85 (001010101) +38 + 48 = 86 (001010110) +38 + 49 = 87 (001010111) +38 + 50 = 88 (001011000) +38 + 51 = 89 (001011001) +38 + 52 = 90 (001011010) +38 + 53 = 91 (001011011) +38 + 54 = 92 (001011100) +38 + 55 = 93 (001011101) +38 + 56 = 94 (001011110) +38 + 57 = 95 (001011111) +38 + 58 = 96 (001100000) +38 + 59 = 97 (001100001) +38 + 60 = 98 (001100010) +38 + 61 = 99 (001100011) +38 + 62 = 100 (001100100) +38 + 63 = 101 (001100101) +39 + 0 = 39 (000100111) +39 + 1 = 40 (000101000) +39 + 2 = 41 (000101001) +39 + 3 = 42 (000101010) +39 + 4 = 43 (000101011) +39 + 5 = 44 (000101100) +39 + 6 = 45 (000101101) +39 + 7 = 46 (000101110) +39 + 8 = 47 (000101111) +39 + 9 = 48 (000110000) +39 + 10 = 49 (000110001) +39 + 11 = 50 (000110010) +39 + 12 = 51 (000110011) +39 + 13 = 52 (000110100) +39 + 14 = 53 (000110101) +39 + 15 = 54 (000110110) +39 + 16 = 55 (000110111) +39 + 17 = 56 (000111000) +39 + 18 = 57 (000111001) +39 + 19 = 58 (000111010) +39 + 20 = 59 (000111011) +39 + 21 = 60 (000111100) +39 + 22 = 61 (000111101) +39 + 23 = 62 (000111110) +39 + 24 = 63 (000111111) +39 + 25 = 64 (001000000) +39 + 26 = 65 (001000001) +39 + 27 = 66 (001000010) +39 + 28 = 67 (001000011) +39 + 29 = 68 (001000100) +39 + 30 = 69 (001000101) +39 + 31 = 70 (001000110) +39 + 32 = 71 (001000111) +39 + 33 = 72 (001001000) +39 + 34 = 73 (001001001) +39 + 35 = 74 (001001010) +39 + 36 = 75 (001001011) +39 + 37 = 76 (001001100) +39 + 38 = 77 (001001101) +39 + 39 = 78 (001001110) +39 + 40 = 79 (001001111) +39 + 41 = 80 (001010000) +39 + 42 = 81 (001010001) +39 + 43 = 82 (001010010) +39 + 44 = 83 (001010011) +39 + 45 = 84 (001010100) +39 + 46 = 85 (001010101) +39 + 47 = 86 (001010110) +39 + 48 = 87 (001010111) +39 + 49 = 88 (001011000) +39 + 50 = 89 (001011001) +39 + 51 = 90 (001011010) +39 + 52 = 91 (001011011) +39 + 53 = 92 (001011100) +39 + 54 = 93 (001011101) +39 + 55 = 94 (001011110) +39 + 56 = 95 (001011111) +39 + 57 = 96 (001100000) +39 + 58 = 97 (001100001) +39 + 59 = 98 (001100010) +39 + 60 = 99 (001100011) +39 + 61 = 100 (001100100) +39 + 62 = 101 (001100101) +39 + 63 = 102 (001100110) +40 + 0 = 40 (000101000) +40 + 1 = 41 (000101001) +40 + 2 = 42 (000101010) +40 + 3 = 43 (000101011) +40 + 4 = 44 (000101100) +40 + 5 = 45 (000101101) +40 + 6 = 46 (000101110) +40 + 7 = 47 (000101111) +40 + 8 = 48 (000110000) +40 + 9 = 49 (000110001) +40 + 10 = 50 (000110010) +40 + 11 = 51 (000110011) +40 + 12 = 52 (000110100) +40 + 13 = 53 (000110101) +40 + 14 = 54 (000110110) +40 + 15 = 55 (000110111) +40 + 16 = 56 (000111000) +40 + 17 = 57 (000111001) +40 + 18 = 58 (000111010) +40 + 19 = 59 (000111011) +40 + 20 = 60 (000111100) +40 + 21 = 61 (000111101) +40 + 22 = 62 (000111110) +40 + 23 = 63 (000111111) +40 + 24 = 64 (001000000) +40 + 25 = 65 (001000001) +40 + 26 = 66 (001000010) +40 + 27 = 67 (001000011) +40 + 28 = 68 (001000100) +40 + 29 = 69 (001000101) +40 + 30 = 70 (001000110) +40 + 31 = 71 (001000111) +40 + 32 = 72 (001001000) +40 + 33 = 73 (001001001) +40 + 34 = 74 (001001010) +40 + 35 = 75 (001001011) +40 + 36 = 76 (001001100) +40 + 37 = 77 (001001101) +40 + 38 = 78 (001001110) +40 + 39 = 79 (001001111) +40 + 40 = 80 (001010000) +40 + 41 = 81 (001010001) +40 + 42 = 82 (001010010) +40 + 43 = 83 (001010011) +40 + 44 = 84 (001010100) +40 + 45 = 85 (001010101) +40 + 46 = 86 (001010110) +40 + 47 = 87 (001010111) +40 + 48 = 88 (001011000) +40 + 49 = 89 (001011001) +40 + 50 = 90 (001011010) +40 + 51 = 91 (001011011) +40 + 52 = 92 (001011100) +40 + 53 = 93 (001011101) +40 + 54 = 94 (001011110) +40 + 55 = 95 (001011111) +40 + 56 = 96 (001100000) +40 + 57 = 97 (001100001) +40 + 58 = 98 (001100010) +40 + 59 = 99 (001100011) +40 + 60 = 100 (001100100) +40 + 61 = 101 (001100101) +40 + 62 = 102 (001100110) +40 + 63 = 103 (001100111) +41 + 0 = 41 (000101001) +41 + 1 = 42 (000101010) +41 + 2 = 43 (000101011) +41 + 3 = 44 (000101100) +41 + 4 = 45 (000101101) +41 + 5 = 46 (000101110) +41 + 6 = 47 (000101111) +41 + 7 = 48 (000110000) +41 + 8 = 49 (000110001) +41 + 9 = 50 (000110010) +41 + 10 = 51 (000110011) +41 + 11 = 52 (000110100) +41 + 12 = 53 (000110101) +41 + 13 = 54 (000110110) +41 + 14 = 55 (000110111) +41 + 15 = 56 (000111000) +41 + 16 = 57 (000111001) +41 + 17 = 58 (000111010) +41 + 18 = 59 (000111011) +41 + 19 = 60 (000111100) +41 + 20 = 61 (000111101) +41 + 21 = 62 (000111110) +41 + 22 = 63 (000111111) +41 + 23 = 64 (001000000) +41 + 24 = 65 (001000001) +41 + 25 = 66 (001000010) +41 + 26 = 67 (001000011) +41 + 27 = 68 (001000100) +41 + 28 = 69 (001000101) +41 + 29 = 70 (001000110) +41 + 30 = 71 (001000111) +41 + 31 = 72 (001001000) +41 + 32 = 73 (001001001) +41 + 33 = 74 (001001010) +41 + 34 = 75 (001001011) +41 + 35 = 76 (001001100) +41 + 36 = 77 (001001101) +41 + 37 = 78 (001001110) +41 + 38 = 79 (001001111) +41 + 39 = 80 (001010000) +41 + 40 = 81 (001010001) +41 + 41 = 82 (001010010) +41 + 42 = 83 (001010011) +41 + 43 = 84 (001010100) +41 + 44 = 85 (001010101) +41 + 45 = 86 (001010110) +41 + 46 = 87 (001010111) +41 + 47 = 88 (001011000) +41 + 48 = 89 (001011001) +41 + 49 = 90 (001011010) +41 + 50 = 91 (001011011) +41 + 51 = 92 (001011100) +41 + 52 = 93 (001011101) +41 + 53 = 94 (001011110) +41 + 54 = 95 (001011111) +41 + 55 = 96 (001100000) +41 + 56 = 97 (001100001) +41 + 57 = 98 (001100010) +41 + 58 = 99 (001100011) +41 + 59 = 100 (001100100) +41 + 60 = 101 (001100101) +41 + 61 = 102 (001100110) +41 + 62 = 103 (001100111) +41 + 63 = 104 (001101000) +42 + 0 = 42 (000101010) +42 + 1 = 43 (000101011) +42 + 2 = 44 (000101100) +42 + 3 = 45 (000101101) +42 + 4 = 46 (000101110) +42 + 5 = 47 (000101111) +42 + 6 = 48 (000110000) +42 + 7 = 49 (000110001) +42 + 8 = 50 (000110010) +42 + 9 = 51 (000110011) +42 + 10 = 52 (000110100) +42 + 11 = 53 (000110101) +42 + 12 = 54 (000110110) +42 + 13 = 55 (000110111) +42 + 14 = 56 (000111000) +42 + 15 = 57 (000111001) +42 + 16 = 58 (000111010) +42 + 17 = 59 (000111011) +42 + 18 = 60 (000111100) +42 + 19 = 61 (000111101) +42 + 20 = 62 (000111110) +42 + 21 = 63 (000111111) +42 + 22 = 64 (001000000) +42 + 23 = 65 (001000001) +42 + 24 = 66 (001000010) +42 + 25 = 67 (001000011) +42 + 26 = 68 (001000100) +42 + 27 = 69 (001000101) +42 + 28 = 70 (001000110) +42 + 29 = 71 (001000111) +42 + 30 = 72 (001001000) +42 + 31 = 73 (001001001) +42 + 32 = 74 (001001010) +42 + 33 = 75 (001001011) +42 + 34 = 76 (001001100) +42 + 35 = 77 (001001101) +42 + 36 = 78 (001001110) +42 + 37 = 79 (001001111) +42 + 38 = 80 (001010000) +42 + 39 = 81 (001010001) +42 + 40 = 82 (001010010) +42 + 41 = 83 (001010011) +42 + 42 = 84 (001010100) +42 + 43 = 85 (001010101) +42 + 44 = 86 (001010110) +42 + 45 = 87 (001010111) +42 + 46 = 88 (001011000) +42 + 47 = 89 (001011001) +42 + 48 = 90 (001011010) +42 + 49 = 91 (001011011) +42 + 50 = 92 (001011100) +42 + 51 = 93 (001011101) +42 + 52 = 94 (001011110) +42 + 53 = 95 (001011111) +42 + 54 = 96 (001100000) +42 + 55 = 97 (001100001) +42 + 56 = 98 (001100010) +42 + 57 = 99 (001100011) +42 + 58 = 100 (001100100) +42 + 59 = 101 (001100101) +42 + 60 = 102 (001100110) +42 + 61 = 103 (001100111) +42 + 62 = 104 (001101000) +42 + 63 = 105 (001101001) +43 + 0 = 43 (000101011) +43 + 1 = 44 (000101100) +43 + 2 = 45 (000101101) +43 + 3 = 46 (000101110) +43 + 4 = 47 (000101111) +43 + 5 = 48 (000110000) +43 + 6 = 49 (000110001) +43 + 7 = 50 (000110010) +43 + 8 = 51 (000110011) +43 + 9 = 52 (000110100) +43 + 10 = 53 (000110101) +43 + 11 = 54 (000110110) +43 + 12 = 55 (000110111) +43 + 13 = 56 (000111000) +43 + 14 = 57 (000111001) +43 + 15 = 58 (000111010) +43 + 16 = 59 (000111011) +43 + 17 = 60 (000111100) +43 + 18 = 61 (000111101) +43 + 19 = 62 (000111110) +43 + 20 = 63 (000111111) +43 + 21 = 64 (001000000) +43 + 22 = 65 (001000001) +43 + 23 = 66 (001000010) +43 + 24 = 67 (001000011) +43 + 25 = 68 (001000100) +43 + 26 = 69 (001000101) +43 + 27 = 70 (001000110) +43 + 28 = 71 (001000111) +43 + 29 = 72 (001001000) +43 + 30 = 73 (001001001) +43 + 31 = 74 (001001010) +43 + 32 = 75 (001001011) +43 + 33 = 76 (001001100) +43 + 34 = 77 (001001101) +43 + 35 = 78 (001001110) +43 + 36 = 79 (001001111) +43 + 37 = 80 (001010000) +43 + 38 = 81 (001010001) +43 + 39 = 82 (001010010) +43 + 40 = 83 (001010011) +43 + 41 = 84 (001010100) +43 + 42 = 85 (001010101) +43 + 43 = 86 (001010110) +43 + 44 = 87 (001010111) +43 + 45 = 88 (001011000) +43 + 46 = 89 (001011001) +43 + 47 = 90 (001011010) +43 + 48 = 91 (001011011) +43 + 49 = 92 (001011100) +43 + 50 = 93 (001011101) +43 + 51 = 94 (001011110) +43 + 52 = 95 (001011111) +43 + 53 = 96 (001100000) +43 + 54 = 97 (001100001) +43 + 55 = 98 (001100010) +43 + 56 = 99 (001100011) +43 + 57 = 100 (001100100) +43 + 58 = 101 (001100101) +43 + 59 = 102 (001100110) +43 + 60 = 103 (001100111) +43 + 61 = 104 (001101000) +43 + 62 = 105 (001101001) +43 + 63 = 106 (001101010) +44 + 0 = 44 (000101100) +44 + 1 = 45 (000101101) +44 + 2 = 46 (000101110) +44 + 3 = 47 (000101111) +44 + 4 = 48 (000110000) +44 + 5 = 49 (000110001) +44 + 6 = 50 (000110010) +44 + 7 = 51 (000110011) +44 + 8 = 52 (000110100) +44 + 9 = 53 (000110101) +44 + 10 = 54 (000110110) +44 + 11 = 55 (000110111) +44 + 12 = 56 (000111000) +44 + 13 = 57 (000111001) +44 + 14 = 58 (000111010) +44 + 15 = 59 (000111011) +44 + 16 = 60 (000111100) +44 + 17 = 61 (000111101) +44 + 18 = 62 (000111110) +44 + 19 = 63 (000111111) +44 + 20 = 64 (001000000) +44 + 21 = 65 (001000001) +44 + 22 = 66 (001000010) +44 + 23 = 67 (001000011) +44 + 24 = 68 (001000100) +44 + 25 = 69 (001000101) +44 + 26 = 70 (001000110) +44 + 27 = 71 (001000111) +44 + 28 = 72 (001001000) +44 + 29 = 73 (001001001) +44 + 30 = 74 (001001010) +44 + 31 = 75 (001001011) +44 + 32 = 76 (001001100) +44 + 33 = 77 (001001101) +44 + 34 = 78 (001001110) +44 + 35 = 79 (001001111) +44 + 36 = 80 (001010000) +44 + 37 = 81 (001010001) +44 + 38 = 82 (001010010) +44 + 39 = 83 (001010011) +44 + 40 = 84 (001010100) +44 + 41 = 85 (001010101) +44 + 42 = 86 (001010110) +44 + 43 = 87 (001010111) +44 + 44 = 88 (001011000) +44 + 45 = 89 (001011001) +44 + 46 = 90 (001011010) +44 + 47 = 91 (001011011) +44 + 48 = 92 (001011100) +44 + 49 = 93 (001011101) +44 + 50 = 94 (001011110) +44 + 51 = 95 (001011111) +44 + 52 = 96 (001100000) +44 + 53 = 97 (001100001) +44 + 54 = 98 (001100010) +44 + 55 = 99 (001100011) +44 + 56 = 100 (001100100) +44 + 57 = 101 (001100101) +44 + 58 = 102 (001100110) +44 + 59 = 103 (001100111) +44 + 60 = 104 (001101000) +44 + 61 = 105 (001101001) +44 + 62 = 106 (001101010) +44 + 63 = 107 (001101011) +45 + 0 = 45 (000101101) +45 + 1 = 46 (000101110) +45 + 2 = 47 (000101111) +45 + 3 = 48 (000110000) +45 + 4 = 49 (000110001) +45 + 5 = 50 (000110010) +45 + 6 = 51 (000110011) +45 + 7 = 52 (000110100) +45 + 8 = 53 (000110101) +45 + 9 = 54 (000110110) +45 + 10 = 55 (000110111) +45 + 11 = 56 (000111000) +45 + 12 = 57 (000111001) +45 + 13 = 58 (000111010) +45 + 14 = 59 (000111011) +45 + 15 = 60 (000111100) +45 + 16 = 61 (000111101) +45 + 17 = 62 (000111110) +45 + 18 = 63 (000111111) +45 + 19 = 64 (001000000) +45 + 20 = 65 (001000001) +45 + 21 = 66 (001000010) +45 + 22 = 67 (001000011) +45 + 23 = 68 (001000100) +45 + 24 = 69 (001000101) +45 + 25 = 70 (001000110) +45 + 26 = 71 (001000111) +45 + 27 = 72 (001001000) +45 + 28 = 73 (001001001) +45 + 29 = 74 (001001010) +45 + 30 = 75 (001001011) +45 + 31 = 76 (001001100) +45 + 32 = 77 (001001101) +45 + 33 = 78 (001001110) +45 + 34 = 79 (001001111) +45 + 35 = 80 (001010000) +45 + 36 = 81 (001010001) +45 + 37 = 82 (001010010) +45 + 38 = 83 (001010011) +45 + 39 = 84 (001010100) +45 + 40 = 85 (001010101) +45 + 41 = 86 (001010110) +45 + 42 = 87 (001010111) +45 + 43 = 88 (001011000) +45 + 44 = 89 (001011001) +45 + 45 = 90 (001011010) +45 + 46 = 91 (001011011) +45 + 47 = 92 (001011100) +45 + 48 = 93 (001011101) +45 + 49 = 94 (001011110) +45 + 50 = 95 (001011111) +45 + 51 = 96 (001100000) +45 + 52 = 97 (001100001) +45 + 53 = 98 (001100010) +45 + 54 = 99 (001100011) +45 + 55 = 100 (001100100) +45 + 56 = 101 (001100101) +45 + 57 = 102 (001100110) +45 + 58 = 103 (001100111) +45 + 59 = 104 (001101000) +45 + 60 = 105 (001101001) +45 + 61 = 106 (001101010) +45 + 62 = 107 (001101011) +45 + 63 = 108 (001101100) +46 + 0 = 46 (000101110) +46 + 1 = 47 (000101111) +46 + 2 = 48 (000110000) +46 + 3 = 49 (000110001) +46 + 4 = 50 (000110010) +46 + 5 = 51 (000110011) +46 + 6 = 52 (000110100) +46 + 7 = 53 (000110101) +46 + 8 = 54 (000110110) +46 + 9 = 55 (000110111) +46 + 10 = 56 (000111000) +46 + 11 = 57 (000111001) +46 + 12 = 58 (000111010) +46 + 13 = 59 (000111011) +46 + 14 = 60 (000111100) +46 + 15 = 61 (000111101) +46 + 16 = 62 (000111110) +46 + 17 = 63 (000111111) +46 + 18 = 64 (001000000) +46 + 19 = 65 (001000001) +46 + 20 = 66 (001000010) +46 + 21 = 67 (001000011) +46 + 22 = 68 (001000100) +46 + 23 = 69 (001000101) +46 + 24 = 70 (001000110) +46 + 25 = 71 (001000111) +46 + 26 = 72 (001001000) +46 + 27 = 73 (001001001) +46 + 28 = 74 (001001010) +46 + 29 = 75 (001001011) +46 + 30 = 76 (001001100) +46 + 31 = 77 (001001101) +46 + 32 = 78 (001001110) +46 + 33 = 79 (001001111) +46 + 34 = 80 (001010000) +46 + 35 = 81 (001010001) +46 + 36 = 82 (001010010) +46 + 37 = 83 (001010011) +46 + 38 = 84 (001010100) +46 + 39 = 85 (001010101) +46 + 40 = 86 (001010110) +46 + 41 = 87 (001010111) +46 + 42 = 88 (001011000) +46 + 43 = 89 (001011001) +46 + 44 = 90 (001011010) +46 + 45 = 91 (001011011) +46 + 46 = 92 (001011100) +46 + 47 = 93 (001011101) +46 + 48 = 94 (001011110) +46 + 49 = 95 (001011111) +46 + 50 = 96 (001100000) +46 + 51 = 97 (001100001) +46 + 52 = 98 (001100010) +46 + 53 = 99 (001100011) +46 + 54 = 100 (001100100) +46 + 55 = 101 (001100101) +46 + 56 = 102 (001100110) +46 + 57 = 103 (001100111) +46 + 58 = 104 (001101000) +46 + 59 = 105 (001101001) +46 + 60 = 106 (001101010) +46 + 61 = 107 (001101011) +46 + 62 = 108 (001101100) +46 + 63 = 109 (001101101) +47 + 0 = 47 (000101111) +47 + 1 = 48 (000110000) +47 + 2 = 49 (000110001) +47 + 3 = 50 (000110010) +47 + 4 = 51 (000110011) +47 + 5 = 52 (000110100) +47 + 6 = 53 (000110101) +47 + 7 = 54 (000110110) +47 + 8 = 55 (000110111) +47 + 9 = 56 (000111000) +47 + 10 = 57 (000111001) +47 + 11 = 58 (000111010) +47 + 12 = 59 (000111011) +47 + 13 = 60 (000111100) +47 + 14 = 61 (000111101) +47 + 15 = 62 (000111110) +47 + 16 = 63 (000111111) +47 + 17 = 64 (001000000) +47 + 18 = 65 (001000001) +47 + 19 = 66 (001000010) +47 + 20 = 67 (001000011) +47 + 21 = 68 (001000100) +47 + 22 = 69 (001000101) +47 + 23 = 70 (001000110) +47 + 24 = 71 (001000111) +47 + 25 = 72 (001001000) +47 + 26 = 73 (001001001) +47 + 27 = 74 (001001010) +47 + 28 = 75 (001001011) +47 + 29 = 76 (001001100) +47 + 30 = 77 (001001101) +47 + 31 = 78 (001001110) +47 + 32 = 79 (001001111) +47 + 33 = 80 (001010000) +47 + 34 = 81 (001010001) +47 + 35 = 82 (001010010) +47 + 36 = 83 (001010011) +47 + 37 = 84 (001010100) +47 + 38 = 85 (001010101) +47 + 39 = 86 (001010110) +47 + 40 = 87 (001010111) +47 + 41 = 88 (001011000) +47 + 42 = 89 (001011001) +47 + 43 = 90 (001011010) +47 + 44 = 91 (001011011) +47 + 45 = 92 (001011100) +47 + 46 = 93 (001011101) +47 + 47 = 94 (001011110) +47 + 48 = 95 (001011111) +47 + 49 = 96 (001100000) +47 + 50 = 97 (001100001) +47 + 51 = 98 (001100010) +47 + 52 = 99 (001100011) +47 + 53 = 100 (001100100) +47 + 54 = 101 (001100101) +47 + 55 = 102 (001100110) +47 + 56 = 103 (001100111) +47 + 57 = 104 (001101000) +47 + 58 = 105 (001101001) +47 + 59 = 106 (001101010) +47 + 60 = 107 (001101011) +47 + 61 = 108 (001101100) +47 + 62 = 109 (001101101) +47 + 63 = 110 (001101110) +48 + 0 = 48 (000110000) +48 + 1 = 49 (000110001) +48 + 2 = 50 (000110010) +48 + 3 = 51 (000110011) +48 + 4 = 52 (000110100) +48 + 5 = 53 (000110101) +48 + 6 = 54 (000110110) +48 + 7 = 55 (000110111) +48 + 8 = 56 (000111000) +48 + 9 = 57 (000111001) +48 + 10 = 58 (000111010) +48 + 11 = 59 (000111011) +48 + 12 = 60 (000111100) +48 + 13 = 61 (000111101) +48 + 14 = 62 (000111110) +48 + 15 = 63 (000111111) +48 + 16 = 64 (001000000) +48 + 17 = 65 (001000001) +48 + 18 = 66 (001000010) +48 + 19 = 67 (001000011) +48 + 20 = 68 (001000100) +48 + 21 = 69 (001000101) +48 + 22 = 70 (001000110) +48 + 23 = 71 (001000111) +48 + 24 = 72 (001001000) +48 + 25 = 73 (001001001) +48 + 26 = 74 (001001010) +48 + 27 = 75 (001001011) +48 + 28 = 76 (001001100) +48 + 29 = 77 (001001101) +48 + 30 = 78 (001001110) +48 + 31 = 79 (001001111) +48 + 32 = 80 (001010000) +48 + 33 = 81 (001010001) +48 + 34 = 82 (001010010) +48 + 35 = 83 (001010011) +48 + 36 = 84 (001010100) +48 + 37 = 85 (001010101) +48 + 38 = 86 (001010110) +48 + 39 = 87 (001010111) +48 + 40 = 88 (001011000) +48 + 41 = 89 (001011001) +48 + 42 = 90 (001011010) +48 + 43 = 91 (001011011) +48 + 44 = 92 (001011100) +48 + 45 = 93 (001011101) +48 + 46 = 94 (001011110) +48 + 47 = 95 (001011111) +48 + 48 = 96 (001100000) +48 + 49 = 97 (001100001) +48 + 50 = 98 (001100010) +48 + 51 = 99 (001100011) +48 + 52 = 100 (001100100) +48 + 53 = 101 (001100101) +48 + 54 = 102 (001100110) +48 + 55 = 103 (001100111) +48 + 56 = 104 (001101000) +48 + 57 = 105 (001101001) +48 + 58 = 106 (001101010) +48 + 59 = 107 (001101011) +48 + 60 = 108 (001101100) +48 + 61 = 109 (001101101) +48 + 62 = 110 (001101110) +48 + 63 = 111 (001101111) +49 + 0 = 49 (000110001) +49 + 1 = 50 (000110010) +49 + 2 = 51 (000110011) +49 + 3 = 52 (000110100) +49 + 4 = 53 (000110101) +49 + 5 = 54 (000110110) +49 + 6 = 55 (000110111) +49 + 7 = 56 (000111000) +49 + 8 = 57 (000111001) +49 + 9 = 58 (000111010) +49 + 10 = 59 (000111011) +49 + 11 = 60 (000111100) +49 + 12 = 61 (000111101) +49 + 13 = 62 (000111110) +49 + 14 = 63 (000111111) +49 + 15 = 64 (001000000) +49 + 16 = 65 (001000001) +49 + 17 = 66 (001000010) +49 + 18 = 67 (001000011) +49 + 19 = 68 (001000100) +49 + 20 = 69 (001000101) +49 + 21 = 70 (001000110) +49 + 22 = 71 (001000111) +49 + 23 = 72 (001001000) +49 + 24 = 73 (001001001) +49 + 25 = 74 (001001010) +49 + 26 = 75 (001001011) +49 + 27 = 76 (001001100) +49 + 28 = 77 (001001101) +49 + 29 = 78 (001001110) +49 + 30 = 79 (001001111) +49 + 31 = 80 (001010000) +49 + 32 = 81 (001010001) +49 + 33 = 82 (001010010) +49 + 34 = 83 (001010011) +49 + 35 = 84 (001010100) +49 + 36 = 85 (001010101) +49 + 37 = 86 (001010110) +49 + 38 = 87 (001010111) +49 + 39 = 88 (001011000) +49 + 40 = 89 (001011001) +49 + 41 = 90 (001011010) +49 + 42 = 91 (001011011) +49 + 43 = 92 (001011100) +49 + 44 = 93 (001011101) +49 + 45 = 94 (001011110) +49 + 46 = 95 (001011111) +49 + 47 = 96 (001100000) +49 + 48 = 97 (001100001) +49 + 49 = 98 (001100010) +49 + 50 = 99 (001100011) +49 + 51 = 100 (001100100) +49 + 52 = 101 (001100101) +49 + 53 = 102 (001100110) +49 + 54 = 103 (001100111) +49 + 55 = 104 (001101000) +49 + 56 = 105 (001101001) +49 + 57 = 106 (001101010) +49 + 58 = 107 (001101011) +49 + 59 = 108 (001101100) +49 + 60 = 109 (001101101) +49 + 61 = 110 (001101110) +49 + 62 = 111 (001101111) +49 + 63 = 112 (001110000) +50 + 0 = 50 (000110010) +50 + 1 = 51 (000110011) +50 + 2 = 52 (000110100) +50 + 3 = 53 (000110101) +50 + 4 = 54 (000110110) +50 + 5 = 55 (000110111) +50 + 6 = 56 (000111000) +50 + 7 = 57 (000111001) +50 + 8 = 58 (000111010) +50 + 9 = 59 (000111011) +50 + 10 = 60 (000111100) +50 + 11 = 61 (000111101) +50 + 12 = 62 (000111110) +50 + 13 = 63 (000111111) +50 + 14 = 64 (001000000) +50 + 15 = 65 (001000001) +50 + 16 = 66 (001000010) +50 + 17 = 67 (001000011) +50 + 18 = 68 (001000100) +50 + 19 = 69 (001000101) +50 + 20 = 70 (001000110) +50 + 21 = 71 (001000111) +50 + 22 = 72 (001001000) +50 + 23 = 73 (001001001) +50 + 24 = 74 (001001010) +50 + 25 = 75 (001001011) +50 + 26 = 76 (001001100) +50 + 27 = 77 (001001101) +50 + 28 = 78 (001001110) +50 + 29 = 79 (001001111) +50 + 30 = 80 (001010000) +50 + 31 = 81 (001010001) +50 + 32 = 82 (001010010) +50 + 33 = 83 (001010011) +50 + 34 = 84 (001010100) +50 + 35 = 85 (001010101) +50 + 36 = 86 (001010110) +50 + 37 = 87 (001010111) +50 + 38 = 88 (001011000) +50 + 39 = 89 (001011001) +50 + 40 = 90 (001011010) +50 + 41 = 91 (001011011) +50 + 42 = 92 (001011100) +50 + 43 = 93 (001011101) +50 + 44 = 94 (001011110) +50 + 45 = 95 (001011111) +50 + 46 = 96 (001100000) +50 + 47 = 97 (001100001) +50 + 48 = 98 (001100010) +50 + 49 = 99 (001100011) +50 + 50 = 100 (001100100) +50 + 51 = 101 (001100101) +50 + 52 = 102 (001100110) +50 + 53 = 103 (001100111) +50 + 54 = 104 (001101000) +50 + 55 = 105 (001101001) +50 + 56 = 106 (001101010) +50 + 57 = 107 (001101011) +50 + 58 = 108 (001101100) +50 + 59 = 109 (001101101) +50 + 60 = 110 (001101110) +50 + 61 = 111 (001101111) +50 + 62 = 112 (001110000) +50 + 63 = 113 (001110001) +51 + 0 = 51 (000110011) +51 + 1 = 52 (000110100) +51 + 2 = 53 (000110101) +51 + 3 = 54 (000110110) +51 + 4 = 55 (000110111) +51 + 5 = 56 (000111000) +51 + 6 = 57 (000111001) +51 + 7 = 58 (000111010) +51 + 8 = 59 (000111011) +51 + 9 = 60 (000111100) +51 + 10 = 61 (000111101) +51 + 11 = 62 (000111110) +51 + 12 = 63 (000111111) +51 + 13 = 64 (001000000) +51 + 14 = 65 (001000001) +51 + 15 = 66 (001000010) +51 + 16 = 67 (001000011) +51 + 17 = 68 (001000100) +51 + 18 = 69 (001000101) +51 + 19 = 70 (001000110) +51 + 20 = 71 (001000111) +51 + 21 = 72 (001001000) +51 + 22 = 73 (001001001) +51 + 23 = 74 (001001010) +51 + 24 = 75 (001001011) +51 + 25 = 76 (001001100) +51 + 26 = 77 (001001101) +51 + 27 = 78 (001001110) +51 + 28 = 79 (001001111) +51 + 29 = 80 (001010000) +51 + 30 = 81 (001010001) +51 + 31 = 82 (001010010) +51 + 32 = 83 (001010011) +51 + 33 = 84 (001010100) +51 + 34 = 85 (001010101) +51 + 35 = 86 (001010110) +51 + 36 = 87 (001010111) +51 + 37 = 88 (001011000) +51 + 38 = 89 (001011001) +51 + 39 = 90 (001011010) +51 + 40 = 91 (001011011) +51 + 41 = 92 (001011100) +51 + 42 = 93 (001011101) +51 + 43 = 94 (001011110) +51 + 44 = 95 (001011111) +51 + 45 = 96 (001100000) +51 + 46 = 97 (001100001) +51 + 47 = 98 (001100010) +51 + 48 = 99 (001100011) +51 + 49 = 100 (001100100) +51 + 50 = 101 (001100101) +51 + 51 = 102 (001100110) +51 + 52 = 103 (001100111) +51 + 53 = 104 (001101000) +51 + 54 = 105 (001101001) +51 + 55 = 106 (001101010) +51 + 56 = 107 (001101011) +51 + 57 = 108 (001101100) +51 + 58 = 109 (001101101) +51 + 59 = 110 (001101110) +51 + 60 = 111 (001101111) +51 + 61 = 112 (001110000) +51 + 62 = 113 (001110001) +51 + 63 = 114 (001110010) +52 + 0 = 52 (000110100) +52 + 1 = 53 (000110101) +52 + 2 = 54 (000110110) +52 + 3 = 55 (000110111) +52 + 4 = 56 (000111000) +52 + 5 = 57 (000111001) +52 + 6 = 58 (000111010) +52 + 7 = 59 (000111011) +52 + 8 = 60 (000111100) +52 + 9 = 61 (000111101) +52 + 10 = 62 (000111110) +52 + 11 = 63 (000111111) +52 + 12 = 64 (001000000) +52 + 13 = 65 (001000001) +52 + 14 = 66 (001000010) +52 + 15 = 67 (001000011) +52 + 16 = 68 (001000100) +52 + 17 = 69 (001000101) +52 + 18 = 70 (001000110) +52 + 19 = 71 (001000111) +52 + 20 = 72 (001001000) +52 + 21 = 73 (001001001) +52 + 22 = 74 (001001010) +52 + 23 = 75 (001001011) +52 + 24 = 76 (001001100) +52 + 25 = 77 (001001101) +52 + 26 = 78 (001001110) +52 + 27 = 79 (001001111) +52 + 28 = 80 (001010000) +52 + 29 = 81 (001010001) +52 + 30 = 82 (001010010) +52 + 31 = 83 (001010011) +52 + 32 = 84 (001010100) +52 + 33 = 85 (001010101) +52 + 34 = 86 (001010110) +52 + 35 = 87 (001010111) +52 + 36 = 88 (001011000) +52 + 37 = 89 (001011001) +52 + 38 = 90 (001011010) +52 + 39 = 91 (001011011) +52 + 40 = 92 (001011100) +52 + 41 = 93 (001011101) +52 + 42 = 94 (001011110) +52 + 43 = 95 (001011111) +52 + 44 = 96 (001100000) +52 + 45 = 97 (001100001) +52 + 46 = 98 (001100010) +52 + 47 = 99 (001100011) +52 + 48 = 100 (001100100) +52 + 49 = 101 (001100101) +52 + 50 = 102 (001100110) +52 + 51 = 103 (001100111) +52 + 52 = 104 (001101000) +52 + 53 = 105 (001101001) +52 + 54 = 106 (001101010) +52 + 55 = 107 (001101011) +52 + 56 = 108 (001101100) +52 + 57 = 109 (001101101) +52 + 58 = 110 (001101110) +52 + 59 = 111 (001101111) +52 + 60 = 112 (001110000) +52 + 61 = 113 (001110001) +52 + 62 = 114 (001110010) +52 + 63 = 115 (001110011) +53 + 0 = 53 (000110101) +53 + 1 = 54 (000110110) +53 + 2 = 55 (000110111) +53 + 3 = 56 (000111000) +53 + 4 = 57 (000111001) +53 + 5 = 58 (000111010) +53 + 6 = 59 (000111011) +53 + 7 = 60 (000111100) +53 + 8 = 61 (000111101) +53 + 9 = 62 (000111110) +53 + 10 = 63 (000111111) +53 + 11 = 64 (001000000) +53 + 12 = 65 (001000001) +53 + 13 = 66 (001000010) +53 + 14 = 67 (001000011) +53 + 15 = 68 (001000100) +53 + 16 = 69 (001000101) +53 + 17 = 70 (001000110) +53 + 18 = 71 (001000111) +53 + 19 = 72 (001001000) +53 + 20 = 73 (001001001) +53 + 21 = 74 (001001010) +53 + 22 = 75 (001001011) +53 + 23 = 76 (001001100) +53 + 24 = 77 (001001101) +53 + 25 = 78 (001001110) +53 + 26 = 79 (001001111) +53 + 27 = 80 (001010000) +53 + 28 = 81 (001010001) +53 + 29 = 82 (001010010) +53 + 30 = 83 (001010011) +53 + 31 = 84 (001010100) +53 + 32 = 85 (001010101) +53 + 33 = 86 (001010110) +53 + 34 = 87 (001010111) +53 + 35 = 88 (001011000) +53 + 36 = 89 (001011001) +53 + 37 = 90 (001011010) +53 + 38 = 91 (001011011) +53 + 39 = 92 (001011100) +53 + 40 = 93 (001011101) +53 + 41 = 94 (001011110) +53 + 42 = 95 (001011111) +53 + 43 = 96 (001100000) +53 + 44 = 97 (001100001) +53 + 45 = 98 (001100010) +53 + 46 = 99 (001100011) +53 + 47 = 100 (001100100) +53 + 48 = 101 (001100101) +53 + 49 = 102 (001100110) +53 + 50 = 103 (001100111) +53 + 51 = 104 (001101000) +53 + 52 = 105 (001101001) +53 + 53 = 106 (001101010) +53 + 54 = 107 (001101011) +53 + 55 = 108 (001101100) +53 + 56 = 109 (001101101) +53 + 57 = 110 (001101110) +53 + 58 = 111 (001101111) +53 + 59 = 112 (001110000) +53 + 60 = 113 (001110001) +53 + 61 = 114 (001110010) +53 + 62 = 115 (001110011) +53 + 63 = 116 (001110100) +54 + 0 = 54 (000110110) +54 + 1 = 55 (000110111) +54 + 2 = 56 (000111000) +54 + 3 = 57 (000111001) +54 + 4 = 58 (000111010) +54 + 5 = 59 (000111011) +54 + 6 = 60 (000111100) +54 + 7 = 61 (000111101) +54 + 8 = 62 (000111110) +54 + 9 = 63 (000111111) +54 + 10 = 64 (001000000) +54 + 11 = 65 (001000001) +54 + 12 = 66 (001000010) +54 + 13 = 67 (001000011) +54 + 14 = 68 (001000100) +54 + 15 = 69 (001000101) +54 + 16 = 70 (001000110) +54 + 17 = 71 (001000111) +54 + 18 = 72 (001001000) +54 + 19 = 73 (001001001) +54 + 20 = 74 (001001010) +54 + 21 = 75 (001001011) +54 + 22 = 76 (001001100) +54 + 23 = 77 (001001101) +54 + 24 = 78 (001001110) +54 + 25 = 79 (001001111) +54 + 26 = 80 (001010000) +54 + 27 = 81 (001010001) +54 + 28 = 82 (001010010) +54 + 29 = 83 (001010011) +54 + 30 = 84 (001010100) +54 + 31 = 85 (001010101) +54 + 32 = 86 (001010110) +54 + 33 = 87 (001010111) +54 + 34 = 88 (001011000) +54 + 35 = 89 (001011001) +54 + 36 = 90 (001011010) +54 + 37 = 91 (001011011) +54 + 38 = 92 (001011100) +54 + 39 = 93 (001011101) +54 + 40 = 94 (001011110) +54 + 41 = 95 (001011111) +54 + 42 = 96 (001100000) +54 + 43 = 97 (001100001) +54 + 44 = 98 (001100010) +54 + 45 = 99 (001100011) +54 + 46 = 100 (001100100) +54 + 47 = 101 (001100101) +54 + 48 = 102 (001100110) +54 + 49 = 103 (001100111) +54 + 50 = 104 (001101000) +54 + 51 = 105 (001101001) +54 + 52 = 106 (001101010) +54 + 53 = 107 (001101011) +54 + 54 = 108 (001101100) +54 + 55 = 109 (001101101) +54 + 56 = 110 (001101110) +54 + 57 = 111 (001101111) +54 + 58 = 112 (001110000) +54 + 59 = 113 (001110001) +54 + 60 = 114 (001110010) +54 + 61 = 115 (001110011) +54 + 62 = 116 (001110100) +54 + 63 = 117 (001110101) +55 + 0 = 55 (000110111) +55 + 1 = 56 (000111000) +55 + 2 = 57 (000111001) +55 + 3 = 58 (000111010) +55 + 4 = 59 (000111011) +55 + 5 = 60 (000111100) +55 + 6 = 61 (000111101) +55 + 7 = 62 (000111110) +55 + 8 = 63 (000111111) +55 + 9 = 64 (001000000) +55 + 10 = 65 (001000001) +55 + 11 = 66 (001000010) +55 + 12 = 67 (001000011) +55 + 13 = 68 (001000100) +55 + 14 = 69 (001000101) +55 + 15 = 70 (001000110) +55 + 16 = 71 (001000111) +55 + 17 = 72 (001001000) +55 + 18 = 73 (001001001) +55 + 19 = 74 (001001010) +55 + 20 = 75 (001001011) +55 + 21 = 76 (001001100) +55 + 22 = 77 (001001101) +55 + 23 = 78 (001001110) +55 + 24 = 79 (001001111) +55 + 25 = 80 (001010000) +55 + 26 = 81 (001010001) +55 + 27 = 82 (001010010) +55 + 28 = 83 (001010011) +55 + 29 = 84 (001010100) +55 + 30 = 85 (001010101) +55 + 31 = 86 (001010110) +55 + 32 = 87 (001010111) +55 + 33 = 88 (001011000) +55 + 34 = 89 (001011001) +55 + 35 = 90 (001011010) +55 + 36 = 91 (001011011) +55 + 37 = 92 (001011100) +55 + 38 = 93 (001011101) +55 + 39 = 94 (001011110) +55 + 40 = 95 (001011111) +55 + 41 = 96 (001100000) +55 + 42 = 97 (001100001) +55 + 43 = 98 (001100010) +55 + 44 = 99 (001100011) +55 + 45 = 100 (001100100) +55 + 46 = 101 (001100101) +55 + 47 = 102 (001100110) +55 + 48 = 103 (001100111) +55 + 49 = 104 (001101000) +55 + 50 = 105 (001101001) +55 + 51 = 106 (001101010) +55 + 52 = 107 (001101011) +55 + 53 = 108 (001101100) +55 + 54 = 109 (001101101) +55 + 55 = 110 (001101110) +55 + 56 = 111 (001101111) +55 + 57 = 112 (001110000) +55 + 58 = 113 (001110001) +55 + 59 = 114 (001110010) +55 + 60 = 115 (001110011) +55 + 61 = 116 (001110100) +55 + 62 = 117 (001110101) +55 + 63 = 118 (001110110) +56 + 0 = 56 (000111000) +56 + 1 = 57 (000111001) +56 + 2 = 58 (000111010) +56 + 3 = 59 (000111011) +56 + 4 = 60 (000111100) +56 + 5 = 61 (000111101) +56 + 6 = 62 (000111110) +56 + 7 = 63 (000111111) +56 + 8 = 64 (001000000) +56 + 9 = 65 (001000001) +56 + 10 = 66 (001000010) +56 + 11 = 67 (001000011) +56 + 12 = 68 (001000100) +56 + 13 = 69 (001000101) +56 + 14 = 70 (001000110) +56 + 15 = 71 (001000111) +56 + 16 = 72 (001001000) +56 + 17 = 73 (001001001) +56 + 18 = 74 (001001010) +56 + 19 = 75 (001001011) +56 + 20 = 76 (001001100) +56 + 21 = 77 (001001101) +56 + 22 = 78 (001001110) +56 + 23 = 79 (001001111) +56 + 24 = 80 (001010000) +56 + 25 = 81 (001010001) +56 + 26 = 82 (001010010) +56 + 27 = 83 (001010011) +56 + 28 = 84 (001010100) +56 + 29 = 85 (001010101) +56 + 30 = 86 (001010110) +56 + 31 = 87 (001010111) +56 + 32 = 88 (001011000) +56 + 33 = 89 (001011001) +56 + 34 = 90 (001011010) +56 + 35 = 91 (001011011) +56 + 36 = 92 (001011100) +56 + 37 = 93 (001011101) +56 + 38 = 94 (001011110) +56 + 39 = 95 (001011111) +56 + 40 = 96 (001100000) +56 + 41 = 97 (001100001) +56 + 42 = 98 (001100010) +56 + 43 = 99 (001100011) +56 + 44 = 100 (001100100) +56 + 45 = 101 (001100101) +56 + 46 = 102 (001100110) +56 + 47 = 103 (001100111) +56 + 48 = 104 (001101000) +56 + 49 = 105 (001101001) +56 + 50 = 106 (001101010) +56 + 51 = 107 (001101011) +56 + 52 = 108 (001101100) +56 + 53 = 109 (001101101) +56 + 54 = 110 (001101110) +56 + 55 = 111 (001101111) +56 + 56 = 112 (001110000) +56 + 57 = 113 (001110001) +56 + 58 = 114 (001110010) +56 + 59 = 115 (001110011) +56 + 60 = 116 (001110100) +56 + 61 = 117 (001110101) +56 + 62 = 118 (001110110) +56 + 63 = 119 (001110111) +57 + 0 = 57 (000111001) +57 + 1 = 58 (000111010) +57 + 2 = 59 (000111011) +57 + 3 = 60 (000111100) +57 + 4 = 61 (000111101) +57 + 5 = 62 (000111110) +57 + 6 = 63 (000111111) +57 + 7 = 64 (001000000) +57 + 8 = 65 (001000001) +57 + 9 = 66 (001000010) +57 + 10 = 67 (001000011) +57 + 11 = 68 (001000100) +57 + 12 = 69 (001000101) +57 + 13 = 70 (001000110) +57 + 14 = 71 (001000111) +57 + 15 = 72 (001001000) +57 + 16 = 73 (001001001) +57 + 17 = 74 (001001010) +57 + 18 = 75 (001001011) +57 + 19 = 76 (001001100) +57 + 20 = 77 (001001101) +57 + 21 = 78 (001001110) +57 + 22 = 79 (001001111) +57 + 23 = 80 (001010000) +57 + 24 = 81 (001010001) +57 + 25 = 82 (001010010) +57 + 26 = 83 (001010011) +57 + 27 = 84 (001010100) +57 + 28 = 85 (001010101) +57 + 29 = 86 (001010110) +57 + 30 = 87 (001010111) +57 + 31 = 88 (001011000) +57 + 32 = 89 (001011001) +57 + 33 = 90 (001011010) +57 + 34 = 91 (001011011) +57 + 35 = 92 (001011100) +57 + 36 = 93 (001011101) +57 + 37 = 94 (001011110) +57 + 38 = 95 (001011111) +57 + 39 = 96 (001100000) +57 + 40 = 97 (001100001) +57 + 41 = 98 (001100010) +57 + 42 = 99 (001100011) +57 + 43 = 100 (001100100) +57 + 44 = 101 (001100101) +57 + 45 = 102 (001100110) +57 + 46 = 103 (001100111) +57 + 47 = 104 (001101000) +57 + 48 = 105 (001101001) +57 + 49 = 106 (001101010) +57 + 50 = 107 (001101011) +57 + 51 = 108 (001101100) +57 + 52 = 109 (001101101) +57 + 53 = 110 (001101110) +57 + 54 = 111 (001101111) +57 + 55 = 112 (001110000) +57 + 56 = 113 (001110001) +57 + 57 = 114 (001110010) +57 + 58 = 115 (001110011) +57 + 59 = 116 (001110100) +57 + 60 = 117 (001110101) +57 + 61 = 118 (001110110) +57 + 62 = 119 (001110111) +57 + 63 = 120 (001111000) +58 + 0 = 58 (000111010) +58 + 1 = 59 (000111011) +58 + 2 = 60 (000111100) +58 + 3 = 61 (000111101) +58 + 4 = 62 (000111110) +58 + 5 = 63 (000111111) +58 + 6 = 64 (001000000) +58 + 7 = 65 (001000001) +58 + 8 = 66 (001000010) +58 + 9 = 67 (001000011) +58 + 10 = 68 (001000100) +58 + 11 = 69 (001000101) +58 + 12 = 70 (001000110) +58 + 13 = 71 (001000111) +58 + 14 = 72 (001001000) +58 + 15 = 73 (001001001) +58 + 16 = 74 (001001010) +58 + 17 = 75 (001001011) +58 + 18 = 76 (001001100) +58 + 19 = 77 (001001101) +58 + 20 = 78 (001001110) +58 + 21 = 79 (001001111) +58 + 22 = 80 (001010000) +58 + 23 = 81 (001010001) +58 + 24 = 82 (001010010) +58 + 25 = 83 (001010011) +58 + 26 = 84 (001010100) +58 + 27 = 85 (001010101) +58 + 28 = 86 (001010110) +58 + 29 = 87 (001010111) +58 + 30 = 88 (001011000) +58 + 31 = 89 (001011001) +58 + 32 = 90 (001011010) +58 + 33 = 91 (001011011) +58 + 34 = 92 (001011100) +58 + 35 = 93 (001011101) +58 + 36 = 94 (001011110) +58 + 37 = 95 (001011111) +58 + 38 = 96 (001100000) +58 + 39 = 97 (001100001) +58 + 40 = 98 (001100010) +58 + 41 = 99 (001100011) +58 + 42 = 100 (001100100) +58 + 43 = 101 (001100101) +58 + 44 = 102 (001100110) +58 + 45 = 103 (001100111) +58 + 46 = 104 (001101000) +58 + 47 = 105 (001101001) +58 + 48 = 106 (001101010) +58 + 49 = 107 (001101011) +58 + 50 = 108 (001101100) +58 + 51 = 109 (001101101) +58 + 52 = 110 (001101110) +58 + 53 = 111 (001101111) +58 + 54 = 112 (001110000) +58 + 55 = 113 (001110001) +58 + 56 = 114 (001110010) +58 + 57 = 115 (001110011) +58 + 58 = 116 (001110100) +58 + 59 = 117 (001110101) +58 + 60 = 118 (001110110) +58 + 61 = 119 (001110111) +58 + 62 = 120 (001111000) +58 + 63 = 121 (001111001) +59 + 0 = 59 (000111011) +59 + 1 = 60 (000111100) +59 + 2 = 61 (000111101) +59 + 3 = 62 (000111110) +59 + 4 = 63 (000111111) +59 + 5 = 64 (001000000) +59 + 6 = 65 (001000001) +59 + 7 = 66 (001000010) +59 + 8 = 67 (001000011) +59 + 9 = 68 (001000100) +59 + 10 = 69 (001000101) +59 + 11 = 70 (001000110) +59 + 12 = 71 (001000111) +59 + 13 = 72 (001001000) +59 + 14 = 73 (001001001) +59 + 15 = 74 (001001010) +59 + 16 = 75 (001001011) +59 + 17 = 76 (001001100) +59 + 18 = 77 (001001101) +59 + 19 = 78 (001001110) +59 + 20 = 79 (001001111) +59 + 21 = 80 (001010000) +59 + 22 = 81 (001010001) +59 + 23 = 82 (001010010) +59 + 24 = 83 (001010011) +59 + 25 = 84 (001010100) +59 + 26 = 85 (001010101) +59 + 27 = 86 (001010110) +59 + 28 = 87 (001010111) +59 + 29 = 88 (001011000) +59 + 30 = 89 (001011001) +59 + 31 = 90 (001011010) +59 + 32 = 91 (001011011) +59 + 33 = 92 (001011100) +59 + 34 = 93 (001011101) +59 + 35 = 94 (001011110) +59 + 36 = 95 (001011111) +59 + 37 = 96 (001100000) +59 + 38 = 97 (001100001) +59 + 39 = 98 (001100010) +59 + 40 = 99 (001100011) +59 + 41 = 100 (001100100) +59 + 42 = 101 (001100101) +59 + 43 = 102 (001100110) +59 + 44 = 103 (001100111) +59 + 45 = 104 (001101000) +59 + 46 = 105 (001101001) +59 + 47 = 106 (001101010) +59 + 48 = 107 (001101011) +59 + 49 = 108 (001101100) +59 + 50 = 109 (001101101) +59 + 51 = 110 (001101110) +59 + 52 = 111 (001101111) +59 + 53 = 112 (001110000) +59 + 54 = 113 (001110001) +59 + 55 = 114 (001110010) +59 + 56 = 115 (001110011) +59 + 57 = 116 (001110100) +59 + 58 = 117 (001110101) +59 + 59 = 118 (001110110) +59 + 60 = 119 (001110111) +59 + 61 = 120 (001111000) +59 + 62 = 121 (001111001) +59 + 63 = 122 (001111010) +60 + 0 = 60 (000111100) +60 + 1 = 61 (000111101) +60 + 2 = 62 (000111110) +60 + 3 = 63 (000111111) +60 + 4 = 64 (001000000) +60 + 5 = 65 (001000001) +60 + 6 = 66 (001000010) +60 + 7 = 67 (001000011) +60 + 8 = 68 (001000100) +60 + 9 = 69 (001000101) +60 + 10 = 70 (001000110) +60 + 11 = 71 (001000111) +60 + 12 = 72 (001001000) +60 + 13 = 73 (001001001) +60 + 14 = 74 (001001010) +60 + 15 = 75 (001001011) +60 + 16 = 76 (001001100) +60 + 17 = 77 (001001101) +60 + 18 = 78 (001001110) +60 + 19 = 79 (001001111) +60 + 20 = 80 (001010000) +60 + 21 = 81 (001010001) +60 + 22 = 82 (001010010) +60 + 23 = 83 (001010011) +60 + 24 = 84 (001010100) +60 + 25 = 85 (001010101) +60 + 26 = 86 (001010110) +60 + 27 = 87 (001010111) +60 + 28 = 88 (001011000) +60 + 29 = 89 (001011001) +60 + 30 = 90 (001011010) +60 + 31 = 91 (001011011) +60 + 32 = 92 (001011100) +60 + 33 = 93 (001011101) +60 + 34 = 94 (001011110) +60 + 35 = 95 (001011111) +60 + 36 = 96 (001100000) +60 + 37 = 97 (001100001) +60 + 38 = 98 (001100010) +60 + 39 = 99 (001100011) +60 + 40 = 100 (001100100) +60 + 41 = 101 (001100101) +60 + 42 = 102 (001100110) +60 + 43 = 103 (001100111) +60 + 44 = 104 (001101000) +60 + 45 = 105 (001101001) +60 + 46 = 106 (001101010) +60 + 47 = 107 (001101011) +60 + 48 = 108 (001101100) +60 + 49 = 109 (001101101) +60 + 50 = 110 (001101110) +60 + 51 = 111 (001101111) +60 + 52 = 112 (001110000) +60 + 53 = 113 (001110001) +60 + 54 = 114 (001110010) +60 + 55 = 115 (001110011) +60 + 56 = 116 (001110100) +60 + 57 = 117 (001110101) +60 + 58 = 118 (001110110) +60 + 59 = 119 (001110111) +60 + 60 = 120 (001111000) +60 + 61 = 121 (001111001) +60 + 62 = 122 (001111010) +60 + 63 = 123 (001111011) +61 + 0 = 61 (000111101) +61 + 1 = 62 (000111110) +61 + 2 = 63 (000111111) +61 + 3 = 64 (001000000) +61 + 4 = 65 (001000001) +61 + 5 = 66 (001000010) +61 + 6 = 67 (001000011) +61 + 7 = 68 (001000100) +61 + 8 = 69 (001000101) +61 + 9 = 70 (001000110) +61 + 10 = 71 (001000111) +61 + 11 = 72 (001001000) +61 + 12 = 73 (001001001) +61 + 13 = 74 (001001010) +61 + 14 = 75 (001001011) +61 + 15 = 76 (001001100) +61 + 16 = 77 (001001101) +61 + 17 = 78 (001001110) +61 + 18 = 79 (001001111) +61 + 19 = 80 (001010000) +61 + 20 = 81 (001010001) +61 + 21 = 82 (001010010) +61 + 22 = 83 (001010011) +61 + 23 = 84 (001010100) +61 + 24 = 85 (001010101) +61 + 25 = 86 (001010110) +61 + 26 = 87 (001010111) +61 + 27 = 88 (001011000) +61 + 28 = 89 (001011001) +61 + 29 = 90 (001011010) +61 + 30 = 91 (001011011) +61 + 31 = 92 (001011100) +61 + 32 = 93 (001011101) +61 + 33 = 94 (001011110) +61 + 34 = 95 (001011111) +61 + 35 = 96 (001100000) +61 + 36 = 97 (001100001) +61 + 37 = 98 (001100010) +61 + 38 = 99 (001100011) +61 + 39 = 100 (001100100) +61 + 40 = 101 (001100101) +61 + 41 = 102 (001100110) +61 + 42 = 103 (001100111) +61 + 43 = 104 (001101000) +61 + 44 = 105 (001101001) +61 + 45 = 106 (001101010) +61 + 46 = 107 (001101011) +61 + 47 = 108 (001101100) +61 + 48 = 109 (001101101) +61 + 49 = 110 (001101110) +61 + 50 = 111 (001101111) +61 + 51 = 112 (001110000) +61 + 52 = 113 (001110001) +61 + 53 = 114 (001110010) +61 + 54 = 115 (001110011) +61 + 55 = 116 (001110100) +61 + 56 = 117 (001110101) +61 + 57 = 118 (001110110) +61 + 58 = 119 (001110111) +61 + 59 = 120 (001111000) +61 + 60 = 121 (001111001) +61 + 61 = 122 (001111010) +61 + 62 = 123 (001111011) +61 + 63 = 124 (001111100) +62 + 0 = 62 (000111110) +62 + 1 = 63 (000111111) +62 + 2 = 64 (001000000) +62 + 3 = 65 (001000001) +62 + 4 = 66 (001000010) +62 + 5 = 67 (001000011) +62 + 6 = 68 (001000100) +62 + 7 = 69 (001000101) +62 + 8 = 70 (001000110) +62 + 9 = 71 (001000111) +62 + 10 = 72 (001001000) +62 + 11 = 73 (001001001) +62 + 12 = 74 (001001010) +62 + 13 = 75 (001001011) +62 + 14 = 76 (001001100) +62 + 15 = 77 (001001101) +62 + 16 = 78 (001001110) +62 + 17 = 79 (001001111) +62 + 18 = 80 (001010000) +62 + 19 = 81 (001010001) +62 + 20 = 82 (001010010) +62 + 21 = 83 (001010011) +62 + 22 = 84 (001010100) +62 + 23 = 85 (001010101) +62 + 24 = 86 (001010110) +62 + 25 = 87 (001010111) +62 + 26 = 88 (001011000) +62 + 27 = 89 (001011001) +62 + 28 = 90 (001011010) +62 + 29 = 91 (001011011) +62 + 30 = 92 (001011100) +62 + 31 = 93 (001011101) +62 + 32 = 94 (001011110) +62 + 33 = 95 (001011111) +62 + 34 = 96 (001100000) +62 + 35 = 97 (001100001) +62 + 36 = 98 (001100010) +62 + 37 = 99 (001100011) +62 + 38 = 100 (001100100) +62 + 39 = 101 (001100101) +62 + 40 = 102 (001100110) +62 + 41 = 103 (001100111) +62 + 42 = 104 (001101000) +62 + 43 = 105 (001101001) +62 + 44 = 106 (001101010) +62 + 45 = 107 (001101011) +62 + 46 = 108 (001101100) +62 + 47 = 109 (001101101) +62 + 48 = 110 (001101110) +62 + 49 = 111 (001101111) +62 + 50 = 112 (001110000) +62 + 51 = 113 (001110001) +62 + 52 = 114 (001110010) +62 + 53 = 115 (001110011) +62 + 54 = 116 (001110100) +62 + 55 = 117 (001110101) +62 + 56 = 118 (001110110) +62 + 57 = 119 (001110111) +62 + 58 = 120 (001111000) +62 + 59 = 121 (001111001) +62 + 60 = 122 (001111010) +62 + 61 = 123 (001111011) +62 + 62 = 124 (001111100) +62 + 63 = 125 (001111101) +63 + 0 = 63 (000111111) +63 + 1 = 64 (001000000) +63 + 2 = 65 (001000001) +63 + 3 = 66 (001000010) +63 + 4 = 67 (001000011) +63 + 5 = 68 (001000100) +63 + 6 = 69 (001000101) +63 + 7 = 70 (001000110) +63 + 8 = 71 (001000111) +63 + 9 = 72 (001001000) +63 + 10 = 73 (001001001) +63 + 11 = 74 (001001010) +63 + 12 = 75 (001001011) +63 + 13 = 76 (001001100) +63 + 14 = 77 (001001101) +63 + 15 = 78 (001001110) +63 + 16 = 79 (001001111) +63 + 17 = 80 (001010000) +63 + 18 = 81 (001010001) +63 + 19 = 82 (001010010) +63 + 20 = 83 (001010011) +63 + 21 = 84 (001010100) +63 + 22 = 85 (001010101) +63 + 23 = 86 (001010110) +63 + 24 = 87 (001010111) +63 + 25 = 88 (001011000) +63 + 26 = 89 (001011001) +63 + 27 = 90 (001011010) +63 + 28 = 91 (001011011) +63 + 29 = 92 (001011100) +63 + 30 = 93 (001011101) +63 + 31 = 94 (001011110) +63 + 32 = 95 (001011111) +63 + 33 = 96 (001100000) +63 + 34 = 97 (001100001) +63 + 35 = 98 (001100010) +63 + 36 = 99 (001100011) +63 + 37 = 100 (001100100) +63 + 38 = 101 (001100101) +63 + 39 = 102 (001100110) +63 + 40 = 103 (001100111) +63 + 41 = 104 (001101000) +63 + 42 = 105 (001101001) +63 + 43 = 106 (001101010) +63 + 44 = 107 (001101011) +63 + 45 = 108 (001101100) +63 + 46 = 109 (001101101) +63 + 47 = 110 (001101110) +63 + 48 = 111 (001101111) +63 + 49 = 112 (001110000) +63 + 50 = 113 (001110001) +63 + 51 = 114 (001110010) +63 + 52 = 115 (001110011) +63 + 53 = 116 (001110100) +63 + 54 = 117 (001110101) +63 + 55 = 118 (001110110) +63 + 56 = 119 (001110111) +63 + 57 = 120 (001111000) +63 + 58 = 121 (001111001) +63 + 59 = 122 (001111010) +63 + 60 = 123 (001111011) +63 + 61 = 124 (001111100) +63 + 62 = 125 (001111101) +63 + 63 = 126 (001111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/main.cpp new file mode 100644 index 000000000..5c1049d14 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 9-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 9; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector9 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/stimgen.h new file mode 100644 index 000000000..3988984dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector9& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector9& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/common.h new file mode 100644 index 000000000..e838eacda --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<6> bool_vector; + +typedef sc_signal signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/datawidth.cpp new file mode 100644 index 000000000..0bf98cd87 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector tmp_a; + bool_vector tmp_b; + bool_vector tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_uint() + tmp_b.to_uint(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/datawidth.h new file mode 100644 index 000000000..a8aaf9061 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& in1; + const signal_bool_vector& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& IN1, + const signal_bool_vector& IN2, + const sc_signal& READY, + signal_bool_vector& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/golden/lost_carry.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/golden/lost_carry.log new file mode 100644 index 000000000..32a6933bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/golden/lost_carry.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) +16 + 0 = 16 (010000) +16 + 1 = 17 (010001) +16 + 2 = 18 (010010) +16 + 3 = 19 (010011) +16 + 4 = 20 (010100) +16 + 5 = 21 (010101) +16 + 6 = 22 (010110) +16 + 7 = 23 (010111) +16 + 8 = 24 (011000) +16 + 9 = 25 (011001) +16 + 10 = 26 (011010) +16 + 11 = 27 (011011) +16 + 12 = 28 (011100) +16 + 13 = 29 (011101) +16 + 14 = 30 (011110) +16 + 15 = 31 (011111) +16 + 16 = 32 (100000) +16 + 17 = 33 (100001) +16 + 18 = 34 (100010) +16 + 19 = 35 (100011) +16 + 20 = 36 (100100) +16 + 21 = 37 (100101) +16 + 22 = 38 (100110) +16 + 23 = 39 (100111) +16 + 24 = 40 (101000) +16 + 25 = 41 (101001) +16 + 26 = 42 (101010) +16 + 27 = 43 (101011) +16 + 28 = 44 (101100) +16 + 29 = 45 (101101) +16 + 30 = 46 (101110) +16 + 31 = 47 (101111) +16 + 32 = 48 (110000) +16 + 33 = 49 (110001) +16 + 34 = 50 (110010) +16 + 35 = 51 (110011) +16 + 36 = 52 (110100) +16 + 37 = 53 (110101) +16 + 38 = 54 (110110) +16 + 39 = 55 (110111) +16 + 40 = 56 (111000) +16 + 41 = 57 (111001) +16 + 42 = 58 (111010) +16 + 43 = 59 (111011) +16 + 44 = 60 (111100) +16 + 45 = 61 (111101) +16 + 46 = 62 (111110) +16 + 47 = 63 (111111) +16 + 48 = 0 (000000) +16 + 49 = 1 (000001) +16 + 50 = 2 (000010) +16 + 51 = 3 (000011) +16 + 52 = 4 (000100) +16 + 53 = 5 (000101) +16 + 54 = 6 (000110) +16 + 55 = 7 (000111) +16 + 56 = 8 (001000) +16 + 57 = 9 (001001) +16 + 58 = 10 (001010) +16 + 59 = 11 (001011) +16 + 60 = 12 (001100) +16 + 61 = 13 (001101) +16 + 62 = 14 (001110) +16 + 63 = 15 (001111) +17 + 0 = 17 (010001) +17 + 1 = 18 (010010) +17 + 2 = 19 (010011) +17 + 3 = 20 (010100) +17 + 4 = 21 (010101) +17 + 5 = 22 (010110) +17 + 6 = 23 (010111) +17 + 7 = 24 (011000) +17 + 8 = 25 (011001) +17 + 9 = 26 (011010) +17 + 10 = 27 (011011) +17 + 11 = 28 (011100) +17 + 12 = 29 (011101) +17 + 13 = 30 (011110) +17 + 14 = 31 (011111) +17 + 15 = 32 (100000) +17 + 16 = 33 (100001) +17 + 17 = 34 (100010) +17 + 18 = 35 (100011) +17 + 19 = 36 (100100) +17 + 20 = 37 (100101) +17 + 21 = 38 (100110) +17 + 22 = 39 (100111) +17 + 23 = 40 (101000) +17 + 24 = 41 (101001) +17 + 25 = 42 (101010) +17 + 26 = 43 (101011) +17 + 27 = 44 (101100) +17 + 28 = 45 (101101) +17 + 29 = 46 (101110) +17 + 30 = 47 (101111) +17 + 31 = 48 (110000) +17 + 32 = 49 (110001) +17 + 33 = 50 (110010) +17 + 34 = 51 (110011) +17 + 35 = 52 (110100) +17 + 36 = 53 (110101) +17 + 37 = 54 (110110) +17 + 38 = 55 (110111) +17 + 39 = 56 (111000) +17 + 40 = 57 (111001) +17 + 41 = 58 (111010) +17 + 42 = 59 (111011) +17 + 43 = 60 (111100) +17 + 44 = 61 (111101) +17 + 45 = 62 (111110) +17 + 46 = 63 (111111) +17 + 47 = 0 (000000) +17 + 48 = 1 (000001) +17 + 49 = 2 (000010) +17 + 50 = 3 (000011) +17 + 51 = 4 (000100) +17 + 52 = 5 (000101) +17 + 53 = 6 (000110) +17 + 54 = 7 (000111) +17 + 55 = 8 (001000) +17 + 56 = 9 (001001) +17 + 57 = 10 (001010) +17 + 58 = 11 (001011) +17 + 59 = 12 (001100) +17 + 60 = 13 (001101) +17 + 61 = 14 (001110) +17 + 62 = 15 (001111) +17 + 63 = 16 (010000) +18 + 0 = 18 (010010) +18 + 1 = 19 (010011) +18 + 2 = 20 (010100) +18 + 3 = 21 (010101) +18 + 4 = 22 (010110) +18 + 5 = 23 (010111) +18 + 6 = 24 (011000) +18 + 7 = 25 (011001) +18 + 8 = 26 (011010) +18 + 9 = 27 (011011) +18 + 10 = 28 (011100) +18 + 11 = 29 (011101) +18 + 12 = 30 (011110) +18 + 13 = 31 (011111) +18 + 14 = 32 (100000) +18 + 15 = 33 (100001) +18 + 16 = 34 (100010) +18 + 17 = 35 (100011) +18 + 18 = 36 (100100) +18 + 19 = 37 (100101) +18 + 20 = 38 (100110) +18 + 21 = 39 (100111) +18 + 22 = 40 (101000) +18 + 23 = 41 (101001) +18 + 24 = 42 (101010) +18 + 25 = 43 (101011) +18 + 26 = 44 (101100) +18 + 27 = 45 (101101) +18 + 28 = 46 (101110) +18 + 29 = 47 (101111) +18 + 30 = 48 (110000) +18 + 31 = 49 (110001) +18 + 32 = 50 (110010) +18 + 33 = 51 (110011) +18 + 34 = 52 (110100) +18 + 35 = 53 (110101) +18 + 36 = 54 (110110) +18 + 37 = 55 (110111) +18 + 38 = 56 (111000) +18 + 39 = 57 (111001) +18 + 40 = 58 (111010) +18 + 41 = 59 (111011) +18 + 42 = 60 (111100) +18 + 43 = 61 (111101) +18 + 44 = 62 (111110) +18 + 45 = 63 (111111) +18 + 46 = 0 (000000) +18 + 47 = 1 (000001) +18 + 48 = 2 (000010) +18 + 49 = 3 (000011) +18 + 50 = 4 (000100) +18 + 51 = 5 (000101) +18 + 52 = 6 (000110) +18 + 53 = 7 (000111) +18 + 54 = 8 (001000) +18 + 55 = 9 (001001) +18 + 56 = 10 (001010) +18 + 57 = 11 (001011) +18 + 58 = 12 (001100) +18 + 59 = 13 (001101) +18 + 60 = 14 (001110) +18 + 61 = 15 (001111) +18 + 62 = 16 (010000) +18 + 63 = 17 (010001) +19 + 0 = 19 (010011) +19 + 1 = 20 (010100) +19 + 2 = 21 (010101) +19 + 3 = 22 (010110) +19 + 4 = 23 (010111) +19 + 5 = 24 (011000) +19 + 6 = 25 (011001) +19 + 7 = 26 (011010) +19 + 8 = 27 (011011) +19 + 9 = 28 (011100) +19 + 10 = 29 (011101) +19 + 11 = 30 (011110) +19 + 12 = 31 (011111) +19 + 13 = 32 (100000) +19 + 14 = 33 (100001) +19 + 15 = 34 (100010) +19 + 16 = 35 (100011) +19 + 17 = 36 (100100) +19 + 18 = 37 (100101) +19 + 19 = 38 (100110) +19 + 20 = 39 (100111) +19 + 21 = 40 (101000) +19 + 22 = 41 (101001) +19 + 23 = 42 (101010) +19 + 24 = 43 (101011) +19 + 25 = 44 (101100) +19 + 26 = 45 (101101) +19 + 27 = 46 (101110) +19 + 28 = 47 (101111) +19 + 29 = 48 (110000) +19 + 30 = 49 (110001) +19 + 31 = 50 (110010) +19 + 32 = 51 (110011) +19 + 33 = 52 (110100) +19 + 34 = 53 (110101) +19 + 35 = 54 (110110) +19 + 36 = 55 (110111) +19 + 37 = 56 (111000) +19 + 38 = 57 (111001) +19 + 39 = 58 (111010) +19 + 40 = 59 (111011) +19 + 41 = 60 (111100) +19 + 42 = 61 (111101) +19 + 43 = 62 (111110) +19 + 44 = 63 (111111) +19 + 45 = 0 (000000) +19 + 46 = 1 (000001) +19 + 47 = 2 (000010) +19 + 48 = 3 (000011) +19 + 49 = 4 (000100) +19 + 50 = 5 (000101) +19 + 51 = 6 (000110) +19 + 52 = 7 (000111) +19 + 53 = 8 (001000) +19 + 54 = 9 (001001) +19 + 55 = 10 (001010) +19 + 56 = 11 (001011) +19 + 57 = 12 (001100) +19 + 58 = 13 (001101) +19 + 59 = 14 (001110) +19 + 60 = 15 (001111) +19 + 61 = 16 (010000) +19 + 62 = 17 (010001) +19 + 63 = 18 (010010) +20 + 0 = 20 (010100) +20 + 1 = 21 (010101) +20 + 2 = 22 (010110) +20 + 3 = 23 (010111) +20 + 4 = 24 (011000) +20 + 5 = 25 (011001) +20 + 6 = 26 (011010) +20 + 7 = 27 (011011) +20 + 8 = 28 (011100) +20 + 9 = 29 (011101) +20 + 10 = 30 (011110) +20 + 11 = 31 (011111) +20 + 12 = 32 (100000) +20 + 13 = 33 (100001) +20 + 14 = 34 (100010) +20 + 15 = 35 (100011) +20 + 16 = 36 (100100) +20 + 17 = 37 (100101) +20 + 18 = 38 (100110) +20 + 19 = 39 (100111) +20 + 20 = 40 (101000) +20 + 21 = 41 (101001) +20 + 22 = 42 (101010) +20 + 23 = 43 (101011) +20 + 24 = 44 (101100) +20 + 25 = 45 (101101) +20 + 26 = 46 (101110) +20 + 27 = 47 (101111) +20 + 28 = 48 (110000) +20 + 29 = 49 (110001) +20 + 30 = 50 (110010) +20 + 31 = 51 (110011) +20 + 32 = 52 (110100) +20 + 33 = 53 (110101) +20 + 34 = 54 (110110) +20 + 35 = 55 (110111) +20 + 36 = 56 (111000) +20 + 37 = 57 (111001) +20 + 38 = 58 (111010) +20 + 39 = 59 (111011) +20 + 40 = 60 (111100) +20 + 41 = 61 (111101) +20 + 42 = 62 (111110) +20 + 43 = 63 (111111) +20 + 44 = 0 (000000) +20 + 45 = 1 (000001) +20 + 46 = 2 (000010) +20 + 47 = 3 (000011) +20 + 48 = 4 (000100) +20 + 49 = 5 (000101) +20 + 50 = 6 (000110) +20 + 51 = 7 (000111) +20 + 52 = 8 (001000) +20 + 53 = 9 (001001) +20 + 54 = 10 (001010) +20 + 55 = 11 (001011) +20 + 56 = 12 (001100) +20 + 57 = 13 (001101) +20 + 58 = 14 (001110) +20 + 59 = 15 (001111) +20 + 60 = 16 (010000) +20 + 61 = 17 (010001) +20 + 62 = 18 (010010) +20 + 63 = 19 (010011) +21 + 0 = 21 (010101) +21 + 1 = 22 (010110) +21 + 2 = 23 (010111) +21 + 3 = 24 (011000) +21 + 4 = 25 (011001) +21 + 5 = 26 (011010) +21 + 6 = 27 (011011) +21 + 7 = 28 (011100) +21 + 8 = 29 (011101) +21 + 9 = 30 (011110) +21 + 10 = 31 (011111) +21 + 11 = 32 (100000) +21 + 12 = 33 (100001) +21 + 13 = 34 (100010) +21 + 14 = 35 (100011) +21 + 15 = 36 (100100) +21 + 16 = 37 (100101) +21 + 17 = 38 (100110) +21 + 18 = 39 (100111) +21 + 19 = 40 (101000) +21 + 20 = 41 (101001) +21 + 21 = 42 (101010) +21 + 22 = 43 (101011) +21 + 23 = 44 (101100) +21 + 24 = 45 (101101) +21 + 25 = 46 (101110) +21 + 26 = 47 (101111) +21 + 27 = 48 (110000) +21 + 28 = 49 (110001) +21 + 29 = 50 (110010) +21 + 30 = 51 (110011) +21 + 31 = 52 (110100) +21 + 32 = 53 (110101) +21 + 33 = 54 (110110) +21 + 34 = 55 (110111) +21 + 35 = 56 (111000) +21 + 36 = 57 (111001) +21 + 37 = 58 (111010) +21 + 38 = 59 (111011) +21 + 39 = 60 (111100) +21 + 40 = 61 (111101) +21 + 41 = 62 (111110) +21 + 42 = 63 (111111) +21 + 43 = 0 (000000) +21 + 44 = 1 (000001) +21 + 45 = 2 (000010) +21 + 46 = 3 (000011) +21 + 47 = 4 (000100) +21 + 48 = 5 (000101) +21 + 49 = 6 (000110) +21 + 50 = 7 (000111) +21 + 51 = 8 (001000) +21 + 52 = 9 (001001) +21 + 53 = 10 (001010) +21 + 54 = 11 (001011) +21 + 55 = 12 (001100) +21 + 56 = 13 (001101) +21 + 57 = 14 (001110) +21 + 58 = 15 (001111) +21 + 59 = 16 (010000) +21 + 60 = 17 (010001) +21 + 61 = 18 (010010) +21 + 62 = 19 (010011) +21 + 63 = 20 (010100) +22 + 0 = 22 (010110) +22 + 1 = 23 (010111) +22 + 2 = 24 (011000) +22 + 3 = 25 (011001) +22 + 4 = 26 (011010) +22 + 5 = 27 (011011) +22 + 6 = 28 (011100) +22 + 7 = 29 (011101) +22 + 8 = 30 (011110) +22 + 9 = 31 (011111) +22 + 10 = 32 (100000) +22 + 11 = 33 (100001) +22 + 12 = 34 (100010) +22 + 13 = 35 (100011) +22 + 14 = 36 (100100) +22 + 15 = 37 (100101) +22 + 16 = 38 (100110) +22 + 17 = 39 (100111) +22 + 18 = 40 (101000) +22 + 19 = 41 (101001) +22 + 20 = 42 (101010) +22 + 21 = 43 (101011) +22 + 22 = 44 (101100) +22 + 23 = 45 (101101) +22 + 24 = 46 (101110) +22 + 25 = 47 (101111) +22 + 26 = 48 (110000) +22 + 27 = 49 (110001) +22 + 28 = 50 (110010) +22 + 29 = 51 (110011) +22 + 30 = 52 (110100) +22 + 31 = 53 (110101) +22 + 32 = 54 (110110) +22 + 33 = 55 (110111) +22 + 34 = 56 (111000) +22 + 35 = 57 (111001) +22 + 36 = 58 (111010) +22 + 37 = 59 (111011) +22 + 38 = 60 (111100) +22 + 39 = 61 (111101) +22 + 40 = 62 (111110) +22 + 41 = 63 (111111) +22 + 42 = 0 (000000) +22 + 43 = 1 (000001) +22 + 44 = 2 (000010) +22 + 45 = 3 (000011) +22 + 46 = 4 (000100) +22 + 47 = 5 (000101) +22 + 48 = 6 (000110) +22 + 49 = 7 (000111) +22 + 50 = 8 (001000) +22 + 51 = 9 (001001) +22 + 52 = 10 (001010) +22 + 53 = 11 (001011) +22 + 54 = 12 (001100) +22 + 55 = 13 (001101) +22 + 56 = 14 (001110) +22 + 57 = 15 (001111) +22 + 58 = 16 (010000) +22 + 59 = 17 (010001) +22 + 60 = 18 (010010) +22 + 61 = 19 (010011) +22 + 62 = 20 (010100) +22 + 63 = 21 (010101) +23 + 0 = 23 (010111) +23 + 1 = 24 (011000) +23 + 2 = 25 (011001) +23 + 3 = 26 (011010) +23 + 4 = 27 (011011) +23 + 5 = 28 (011100) +23 + 6 = 29 (011101) +23 + 7 = 30 (011110) +23 + 8 = 31 (011111) +23 + 9 = 32 (100000) +23 + 10 = 33 (100001) +23 + 11 = 34 (100010) +23 + 12 = 35 (100011) +23 + 13 = 36 (100100) +23 + 14 = 37 (100101) +23 + 15 = 38 (100110) +23 + 16 = 39 (100111) +23 + 17 = 40 (101000) +23 + 18 = 41 (101001) +23 + 19 = 42 (101010) +23 + 20 = 43 (101011) +23 + 21 = 44 (101100) +23 + 22 = 45 (101101) +23 + 23 = 46 (101110) +23 + 24 = 47 (101111) +23 + 25 = 48 (110000) +23 + 26 = 49 (110001) +23 + 27 = 50 (110010) +23 + 28 = 51 (110011) +23 + 29 = 52 (110100) +23 + 30 = 53 (110101) +23 + 31 = 54 (110110) +23 + 32 = 55 (110111) +23 + 33 = 56 (111000) +23 + 34 = 57 (111001) +23 + 35 = 58 (111010) +23 + 36 = 59 (111011) +23 + 37 = 60 (111100) +23 + 38 = 61 (111101) +23 + 39 = 62 (111110) +23 + 40 = 63 (111111) +23 + 41 = 0 (000000) +23 + 42 = 1 (000001) +23 + 43 = 2 (000010) +23 + 44 = 3 (000011) +23 + 45 = 4 (000100) +23 + 46 = 5 (000101) +23 + 47 = 6 (000110) +23 + 48 = 7 (000111) +23 + 49 = 8 (001000) +23 + 50 = 9 (001001) +23 + 51 = 10 (001010) +23 + 52 = 11 (001011) +23 + 53 = 12 (001100) +23 + 54 = 13 (001101) +23 + 55 = 14 (001110) +23 + 56 = 15 (001111) +23 + 57 = 16 (010000) +23 + 58 = 17 (010001) +23 + 59 = 18 (010010) +23 + 60 = 19 (010011) +23 + 61 = 20 (010100) +23 + 62 = 21 (010101) +23 + 63 = 22 (010110) +24 + 0 = 24 (011000) +24 + 1 = 25 (011001) +24 + 2 = 26 (011010) +24 + 3 = 27 (011011) +24 + 4 = 28 (011100) +24 + 5 = 29 (011101) +24 + 6 = 30 (011110) +24 + 7 = 31 (011111) +24 + 8 = 32 (100000) +24 + 9 = 33 (100001) +24 + 10 = 34 (100010) +24 + 11 = 35 (100011) +24 + 12 = 36 (100100) +24 + 13 = 37 (100101) +24 + 14 = 38 (100110) +24 + 15 = 39 (100111) +24 + 16 = 40 (101000) +24 + 17 = 41 (101001) +24 + 18 = 42 (101010) +24 + 19 = 43 (101011) +24 + 20 = 44 (101100) +24 + 21 = 45 (101101) +24 + 22 = 46 (101110) +24 + 23 = 47 (101111) +24 + 24 = 48 (110000) +24 + 25 = 49 (110001) +24 + 26 = 50 (110010) +24 + 27 = 51 (110011) +24 + 28 = 52 (110100) +24 + 29 = 53 (110101) +24 + 30 = 54 (110110) +24 + 31 = 55 (110111) +24 + 32 = 56 (111000) +24 + 33 = 57 (111001) +24 + 34 = 58 (111010) +24 + 35 = 59 (111011) +24 + 36 = 60 (111100) +24 + 37 = 61 (111101) +24 + 38 = 62 (111110) +24 + 39 = 63 (111111) +24 + 40 = 0 (000000) +24 + 41 = 1 (000001) +24 + 42 = 2 (000010) +24 + 43 = 3 (000011) +24 + 44 = 4 (000100) +24 + 45 = 5 (000101) +24 + 46 = 6 (000110) +24 + 47 = 7 (000111) +24 + 48 = 8 (001000) +24 + 49 = 9 (001001) +24 + 50 = 10 (001010) +24 + 51 = 11 (001011) +24 + 52 = 12 (001100) +24 + 53 = 13 (001101) +24 + 54 = 14 (001110) +24 + 55 = 15 (001111) +24 + 56 = 16 (010000) +24 + 57 = 17 (010001) +24 + 58 = 18 (010010) +24 + 59 = 19 (010011) +24 + 60 = 20 (010100) +24 + 61 = 21 (010101) +24 + 62 = 22 (010110) +24 + 63 = 23 (010111) +25 + 0 = 25 (011001) +25 + 1 = 26 (011010) +25 + 2 = 27 (011011) +25 + 3 = 28 (011100) +25 + 4 = 29 (011101) +25 + 5 = 30 (011110) +25 + 6 = 31 (011111) +25 + 7 = 32 (100000) +25 + 8 = 33 (100001) +25 + 9 = 34 (100010) +25 + 10 = 35 (100011) +25 + 11 = 36 (100100) +25 + 12 = 37 (100101) +25 + 13 = 38 (100110) +25 + 14 = 39 (100111) +25 + 15 = 40 (101000) +25 + 16 = 41 (101001) +25 + 17 = 42 (101010) +25 + 18 = 43 (101011) +25 + 19 = 44 (101100) +25 + 20 = 45 (101101) +25 + 21 = 46 (101110) +25 + 22 = 47 (101111) +25 + 23 = 48 (110000) +25 + 24 = 49 (110001) +25 + 25 = 50 (110010) +25 + 26 = 51 (110011) +25 + 27 = 52 (110100) +25 + 28 = 53 (110101) +25 + 29 = 54 (110110) +25 + 30 = 55 (110111) +25 + 31 = 56 (111000) +25 + 32 = 57 (111001) +25 + 33 = 58 (111010) +25 + 34 = 59 (111011) +25 + 35 = 60 (111100) +25 + 36 = 61 (111101) +25 + 37 = 62 (111110) +25 + 38 = 63 (111111) +25 + 39 = 0 (000000) +25 + 40 = 1 (000001) +25 + 41 = 2 (000010) +25 + 42 = 3 (000011) +25 + 43 = 4 (000100) +25 + 44 = 5 (000101) +25 + 45 = 6 (000110) +25 + 46 = 7 (000111) +25 + 47 = 8 (001000) +25 + 48 = 9 (001001) +25 + 49 = 10 (001010) +25 + 50 = 11 (001011) +25 + 51 = 12 (001100) +25 + 52 = 13 (001101) +25 + 53 = 14 (001110) +25 + 54 = 15 (001111) +25 + 55 = 16 (010000) +25 + 56 = 17 (010001) +25 + 57 = 18 (010010) +25 + 58 = 19 (010011) +25 + 59 = 20 (010100) +25 + 60 = 21 (010101) +25 + 61 = 22 (010110) +25 + 62 = 23 (010111) +25 + 63 = 24 (011000) +26 + 0 = 26 (011010) +26 + 1 = 27 (011011) +26 + 2 = 28 (011100) +26 + 3 = 29 (011101) +26 + 4 = 30 (011110) +26 + 5 = 31 (011111) +26 + 6 = 32 (100000) +26 + 7 = 33 (100001) +26 + 8 = 34 (100010) +26 + 9 = 35 (100011) +26 + 10 = 36 (100100) +26 + 11 = 37 (100101) +26 + 12 = 38 (100110) +26 + 13 = 39 (100111) +26 + 14 = 40 (101000) +26 + 15 = 41 (101001) +26 + 16 = 42 (101010) +26 + 17 = 43 (101011) +26 + 18 = 44 (101100) +26 + 19 = 45 (101101) +26 + 20 = 46 (101110) +26 + 21 = 47 (101111) +26 + 22 = 48 (110000) +26 + 23 = 49 (110001) +26 + 24 = 50 (110010) +26 + 25 = 51 (110011) +26 + 26 = 52 (110100) +26 + 27 = 53 (110101) +26 + 28 = 54 (110110) +26 + 29 = 55 (110111) +26 + 30 = 56 (111000) +26 + 31 = 57 (111001) +26 + 32 = 58 (111010) +26 + 33 = 59 (111011) +26 + 34 = 60 (111100) +26 + 35 = 61 (111101) +26 + 36 = 62 (111110) +26 + 37 = 63 (111111) +26 + 38 = 0 (000000) +26 + 39 = 1 (000001) +26 + 40 = 2 (000010) +26 + 41 = 3 (000011) +26 + 42 = 4 (000100) +26 + 43 = 5 (000101) +26 + 44 = 6 (000110) +26 + 45 = 7 (000111) +26 + 46 = 8 (001000) +26 + 47 = 9 (001001) +26 + 48 = 10 (001010) +26 + 49 = 11 (001011) +26 + 50 = 12 (001100) +26 + 51 = 13 (001101) +26 + 52 = 14 (001110) +26 + 53 = 15 (001111) +26 + 54 = 16 (010000) +26 + 55 = 17 (010001) +26 + 56 = 18 (010010) +26 + 57 = 19 (010011) +26 + 58 = 20 (010100) +26 + 59 = 21 (010101) +26 + 60 = 22 (010110) +26 + 61 = 23 (010111) +26 + 62 = 24 (011000) +26 + 63 = 25 (011001) +27 + 0 = 27 (011011) +27 + 1 = 28 (011100) +27 + 2 = 29 (011101) +27 + 3 = 30 (011110) +27 + 4 = 31 (011111) +27 + 5 = 32 (100000) +27 + 6 = 33 (100001) +27 + 7 = 34 (100010) +27 + 8 = 35 (100011) +27 + 9 = 36 (100100) +27 + 10 = 37 (100101) +27 + 11 = 38 (100110) +27 + 12 = 39 (100111) +27 + 13 = 40 (101000) +27 + 14 = 41 (101001) +27 + 15 = 42 (101010) +27 + 16 = 43 (101011) +27 + 17 = 44 (101100) +27 + 18 = 45 (101101) +27 + 19 = 46 (101110) +27 + 20 = 47 (101111) +27 + 21 = 48 (110000) +27 + 22 = 49 (110001) +27 + 23 = 50 (110010) +27 + 24 = 51 (110011) +27 + 25 = 52 (110100) +27 + 26 = 53 (110101) +27 + 27 = 54 (110110) +27 + 28 = 55 (110111) +27 + 29 = 56 (111000) +27 + 30 = 57 (111001) +27 + 31 = 58 (111010) +27 + 32 = 59 (111011) +27 + 33 = 60 (111100) +27 + 34 = 61 (111101) +27 + 35 = 62 (111110) +27 + 36 = 63 (111111) +27 + 37 = 0 (000000) +27 + 38 = 1 (000001) +27 + 39 = 2 (000010) +27 + 40 = 3 (000011) +27 + 41 = 4 (000100) +27 + 42 = 5 (000101) +27 + 43 = 6 (000110) +27 + 44 = 7 (000111) +27 + 45 = 8 (001000) +27 + 46 = 9 (001001) +27 + 47 = 10 (001010) +27 + 48 = 11 (001011) +27 + 49 = 12 (001100) +27 + 50 = 13 (001101) +27 + 51 = 14 (001110) +27 + 52 = 15 (001111) +27 + 53 = 16 (010000) +27 + 54 = 17 (010001) +27 + 55 = 18 (010010) +27 + 56 = 19 (010011) +27 + 57 = 20 (010100) +27 + 58 = 21 (010101) +27 + 59 = 22 (010110) +27 + 60 = 23 (010111) +27 + 61 = 24 (011000) +27 + 62 = 25 (011001) +27 + 63 = 26 (011010) +28 + 0 = 28 (011100) +28 + 1 = 29 (011101) +28 + 2 = 30 (011110) +28 + 3 = 31 (011111) +28 + 4 = 32 (100000) +28 + 5 = 33 (100001) +28 + 6 = 34 (100010) +28 + 7 = 35 (100011) +28 + 8 = 36 (100100) +28 + 9 = 37 (100101) +28 + 10 = 38 (100110) +28 + 11 = 39 (100111) +28 + 12 = 40 (101000) +28 + 13 = 41 (101001) +28 + 14 = 42 (101010) +28 + 15 = 43 (101011) +28 + 16 = 44 (101100) +28 + 17 = 45 (101101) +28 + 18 = 46 (101110) +28 + 19 = 47 (101111) +28 + 20 = 48 (110000) +28 + 21 = 49 (110001) +28 + 22 = 50 (110010) +28 + 23 = 51 (110011) +28 + 24 = 52 (110100) +28 + 25 = 53 (110101) +28 + 26 = 54 (110110) +28 + 27 = 55 (110111) +28 + 28 = 56 (111000) +28 + 29 = 57 (111001) +28 + 30 = 58 (111010) +28 + 31 = 59 (111011) +28 + 32 = 60 (111100) +28 + 33 = 61 (111101) +28 + 34 = 62 (111110) +28 + 35 = 63 (111111) +28 + 36 = 0 (000000) +28 + 37 = 1 (000001) +28 + 38 = 2 (000010) +28 + 39 = 3 (000011) +28 + 40 = 4 (000100) +28 + 41 = 5 (000101) +28 + 42 = 6 (000110) +28 + 43 = 7 (000111) +28 + 44 = 8 (001000) +28 + 45 = 9 (001001) +28 + 46 = 10 (001010) +28 + 47 = 11 (001011) +28 + 48 = 12 (001100) +28 + 49 = 13 (001101) +28 + 50 = 14 (001110) +28 + 51 = 15 (001111) +28 + 52 = 16 (010000) +28 + 53 = 17 (010001) +28 + 54 = 18 (010010) +28 + 55 = 19 (010011) +28 + 56 = 20 (010100) +28 + 57 = 21 (010101) +28 + 58 = 22 (010110) +28 + 59 = 23 (010111) +28 + 60 = 24 (011000) +28 + 61 = 25 (011001) +28 + 62 = 26 (011010) +28 + 63 = 27 (011011) +29 + 0 = 29 (011101) +29 + 1 = 30 (011110) +29 + 2 = 31 (011111) +29 + 3 = 32 (100000) +29 + 4 = 33 (100001) +29 + 5 = 34 (100010) +29 + 6 = 35 (100011) +29 + 7 = 36 (100100) +29 + 8 = 37 (100101) +29 + 9 = 38 (100110) +29 + 10 = 39 (100111) +29 + 11 = 40 (101000) +29 + 12 = 41 (101001) +29 + 13 = 42 (101010) +29 + 14 = 43 (101011) +29 + 15 = 44 (101100) +29 + 16 = 45 (101101) +29 + 17 = 46 (101110) +29 + 18 = 47 (101111) +29 + 19 = 48 (110000) +29 + 20 = 49 (110001) +29 + 21 = 50 (110010) +29 + 22 = 51 (110011) +29 + 23 = 52 (110100) +29 + 24 = 53 (110101) +29 + 25 = 54 (110110) +29 + 26 = 55 (110111) +29 + 27 = 56 (111000) +29 + 28 = 57 (111001) +29 + 29 = 58 (111010) +29 + 30 = 59 (111011) +29 + 31 = 60 (111100) +29 + 32 = 61 (111101) +29 + 33 = 62 (111110) +29 + 34 = 63 (111111) +29 + 35 = 0 (000000) +29 + 36 = 1 (000001) +29 + 37 = 2 (000010) +29 + 38 = 3 (000011) +29 + 39 = 4 (000100) +29 + 40 = 5 (000101) +29 + 41 = 6 (000110) +29 + 42 = 7 (000111) +29 + 43 = 8 (001000) +29 + 44 = 9 (001001) +29 + 45 = 10 (001010) +29 + 46 = 11 (001011) +29 + 47 = 12 (001100) +29 + 48 = 13 (001101) +29 + 49 = 14 (001110) +29 + 50 = 15 (001111) +29 + 51 = 16 (010000) +29 + 52 = 17 (010001) +29 + 53 = 18 (010010) +29 + 54 = 19 (010011) +29 + 55 = 20 (010100) +29 + 56 = 21 (010101) +29 + 57 = 22 (010110) +29 + 58 = 23 (010111) +29 + 59 = 24 (011000) +29 + 60 = 25 (011001) +29 + 61 = 26 (011010) +29 + 62 = 27 (011011) +29 + 63 = 28 (011100) +30 + 0 = 30 (011110) +30 + 1 = 31 (011111) +30 + 2 = 32 (100000) +30 + 3 = 33 (100001) +30 + 4 = 34 (100010) +30 + 5 = 35 (100011) +30 + 6 = 36 (100100) +30 + 7 = 37 (100101) +30 + 8 = 38 (100110) +30 + 9 = 39 (100111) +30 + 10 = 40 (101000) +30 + 11 = 41 (101001) +30 + 12 = 42 (101010) +30 + 13 = 43 (101011) +30 + 14 = 44 (101100) +30 + 15 = 45 (101101) +30 + 16 = 46 (101110) +30 + 17 = 47 (101111) +30 + 18 = 48 (110000) +30 + 19 = 49 (110001) +30 + 20 = 50 (110010) +30 + 21 = 51 (110011) +30 + 22 = 52 (110100) +30 + 23 = 53 (110101) +30 + 24 = 54 (110110) +30 + 25 = 55 (110111) +30 + 26 = 56 (111000) +30 + 27 = 57 (111001) +30 + 28 = 58 (111010) +30 + 29 = 59 (111011) +30 + 30 = 60 (111100) +30 + 31 = 61 (111101) +30 + 32 = 62 (111110) +30 + 33 = 63 (111111) +30 + 34 = 0 (000000) +30 + 35 = 1 (000001) +30 + 36 = 2 (000010) +30 + 37 = 3 (000011) +30 + 38 = 4 (000100) +30 + 39 = 5 (000101) +30 + 40 = 6 (000110) +30 + 41 = 7 (000111) +30 + 42 = 8 (001000) +30 + 43 = 9 (001001) +30 + 44 = 10 (001010) +30 + 45 = 11 (001011) +30 + 46 = 12 (001100) +30 + 47 = 13 (001101) +30 + 48 = 14 (001110) +30 + 49 = 15 (001111) +30 + 50 = 16 (010000) +30 + 51 = 17 (010001) +30 + 52 = 18 (010010) +30 + 53 = 19 (010011) +30 + 54 = 20 (010100) +30 + 55 = 21 (010101) +30 + 56 = 22 (010110) +30 + 57 = 23 (010111) +30 + 58 = 24 (011000) +30 + 59 = 25 (011001) +30 + 60 = 26 (011010) +30 + 61 = 27 (011011) +30 + 62 = 28 (011100) +30 + 63 = 29 (011101) +31 + 0 = 31 (011111) +31 + 1 = 32 (100000) +31 + 2 = 33 (100001) +31 + 3 = 34 (100010) +31 + 4 = 35 (100011) +31 + 5 = 36 (100100) +31 + 6 = 37 (100101) +31 + 7 = 38 (100110) +31 + 8 = 39 (100111) +31 + 9 = 40 (101000) +31 + 10 = 41 (101001) +31 + 11 = 42 (101010) +31 + 12 = 43 (101011) +31 + 13 = 44 (101100) +31 + 14 = 45 (101101) +31 + 15 = 46 (101110) +31 + 16 = 47 (101111) +31 + 17 = 48 (110000) +31 + 18 = 49 (110001) +31 + 19 = 50 (110010) +31 + 20 = 51 (110011) +31 + 21 = 52 (110100) +31 + 22 = 53 (110101) +31 + 23 = 54 (110110) +31 + 24 = 55 (110111) +31 + 25 = 56 (111000) +31 + 26 = 57 (111001) +31 + 27 = 58 (111010) +31 + 28 = 59 (111011) +31 + 29 = 60 (111100) +31 + 30 = 61 (111101) +31 + 31 = 62 (111110) +31 + 32 = 63 (111111) +31 + 33 = 0 (000000) +31 + 34 = 1 (000001) +31 + 35 = 2 (000010) +31 + 36 = 3 (000011) +31 + 37 = 4 (000100) +31 + 38 = 5 (000101) +31 + 39 = 6 (000110) +31 + 40 = 7 (000111) +31 + 41 = 8 (001000) +31 + 42 = 9 (001001) +31 + 43 = 10 (001010) +31 + 44 = 11 (001011) +31 + 45 = 12 (001100) +31 + 46 = 13 (001101) +31 + 47 = 14 (001110) +31 + 48 = 15 (001111) +31 + 49 = 16 (010000) +31 + 50 = 17 (010001) +31 + 51 = 18 (010010) +31 + 52 = 19 (010011) +31 + 53 = 20 (010100) +31 + 54 = 21 (010101) +31 + 55 = 22 (010110) +31 + 56 = 23 (010111) +31 + 57 = 24 (011000) +31 + 58 = 25 (011001) +31 + 59 = 26 (011010) +31 + 60 = 27 (011011) +31 + 61 = 28 (011100) +31 + 62 = 29 (011101) +31 + 63 = 30 (011110) +32 + 0 = 32 (100000) +32 + 1 = 33 (100001) +32 + 2 = 34 (100010) +32 + 3 = 35 (100011) +32 + 4 = 36 (100100) +32 + 5 = 37 (100101) +32 + 6 = 38 (100110) +32 + 7 = 39 (100111) +32 + 8 = 40 (101000) +32 + 9 = 41 (101001) +32 + 10 = 42 (101010) +32 + 11 = 43 (101011) +32 + 12 = 44 (101100) +32 + 13 = 45 (101101) +32 + 14 = 46 (101110) +32 + 15 = 47 (101111) +32 + 16 = 48 (110000) +32 + 17 = 49 (110001) +32 + 18 = 50 (110010) +32 + 19 = 51 (110011) +32 + 20 = 52 (110100) +32 + 21 = 53 (110101) +32 + 22 = 54 (110110) +32 + 23 = 55 (110111) +32 + 24 = 56 (111000) +32 + 25 = 57 (111001) +32 + 26 = 58 (111010) +32 + 27 = 59 (111011) +32 + 28 = 60 (111100) +32 + 29 = 61 (111101) +32 + 30 = 62 (111110) +32 + 31 = 63 (111111) +32 + 32 = 0 (000000) +32 + 33 = 1 (000001) +32 + 34 = 2 (000010) +32 + 35 = 3 (000011) +32 + 36 = 4 (000100) +32 + 37 = 5 (000101) +32 + 38 = 6 (000110) +32 + 39 = 7 (000111) +32 + 40 = 8 (001000) +32 + 41 = 9 (001001) +32 + 42 = 10 (001010) +32 + 43 = 11 (001011) +32 + 44 = 12 (001100) +32 + 45 = 13 (001101) +32 + 46 = 14 (001110) +32 + 47 = 15 (001111) +32 + 48 = 16 (010000) +32 + 49 = 17 (010001) +32 + 50 = 18 (010010) +32 + 51 = 19 (010011) +32 + 52 = 20 (010100) +32 + 53 = 21 (010101) +32 + 54 = 22 (010110) +32 + 55 = 23 (010111) +32 + 56 = 24 (011000) +32 + 57 = 25 (011001) +32 + 58 = 26 (011010) +32 + 59 = 27 (011011) +32 + 60 = 28 (011100) +32 + 61 = 29 (011101) +32 + 62 = 30 (011110) +32 + 63 = 31 (011111) +33 + 0 = 33 (100001) +33 + 1 = 34 (100010) +33 + 2 = 35 (100011) +33 + 3 = 36 (100100) +33 + 4 = 37 (100101) +33 + 5 = 38 (100110) +33 + 6 = 39 (100111) +33 + 7 = 40 (101000) +33 + 8 = 41 (101001) +33 + 9 = 42 (101010) +33 + 10 = 43 (101011) +33 + 11 = 44 (101100) +33 + 12 = 45 (101101) +33 + 13 = 46 (101110) +33 + 14 = 47 (101111) +33 + 15 = 48 (110000) +33 + 16 = 49 (110001) +33 + 17 = 50 (110010) +33 + 18 = 51 (110011) +33 + 19 = 52 (110100) +33 + 20 = 53 (110101) +33 + 21 = 54 (110110) +33 + 22 = 55 (110111) +33 + 23 = 56 (111000) +33 + 24 = 57 (111001) +33 + 25 = 58 (111010) +33 + 26 = 59 (111011) +33 + 27 = 60 (111100) +33 + 28 = 61 (111101) +33 + 29 = 62 (111110) +33 + 30 = 63 (111111) +33 + 31 = 0 (000000) +33 + 32 = 1 (000001) +33 + 33 = 2 (000010) +33 + 34 = 3 (000011) +33 + 35 = 4 (000100) +33 + 36 = 5 (000101) +33 + 37 = 6 (000110) +33 + 38 = 7 (000111) +33 + 39 = 8 (001000) +33 + 40 = 9 (001001) +33 + 41 = 10 (001010) +33 + 42 = 11 (001011) +33 + 43 = 12 (001100) +33 + 44 = 13 (001101) +33 + 45 = 14 (001110) +33 + 46 = 15 (001111) +33 + 47 = 16 (010000) +33 + 48 = 17 (010001) +33 + 49 = 18 (010010) +33 + 50 = 19 (010011) +33 + 51 = 20 (010100) +33 + 52 = 21 (010101) +33 + 53 = 22 (010110) +33 + 54 = 23 (010111) +33 + 55 = 24 (011000) +33 + 56 = 25 (011001) +33 + 57 = 26 (011010) +33 + 58 = 27 (011011) +33 + 59 = 28 (011100) +33 + 60 = 29 (011101) +33 + 61 = 30 (011110) +33 + 62 = 31 (011111) +33 + 63 = 32 (100000) +34 + 0 = 34 (100010) +34 + 1 = 35 (100011) +34 + 2 = 36 (100100) +34 + 3 = 37 (100101) +34 + 4 = 38 (100110) +34 + 5 = 39 (100111) +34 + 6 = 40 (101000) +34 + 7 = 41 (101001) +34 + 8 = 42 (101010) +34 + 9 = 43 (101011) +34 + 10 = 44 (101100) +34 + 11 = 45 (101101) +34 + 12 = 46 (101110) +34 + 13 = 47 (101111) +34 + 14 = 48 (110000) +34 + 15 = 49 (110001) +34 + 16 = 50 (110010) +34 + 17 = 51 (110011) +34 + 18 = 52 (110100) +34 + 19 = 53 (110101) +34 + 20 = 54 (110110) +34 + 21 = 55 (110111) +34 + 22 = 56 (111000) +34 + 23 = 57 (111001) +34 + 24 = 58 (111010) +34 + 25 = 59 (111011) +34 + 26 = 60 (111100) +34 + 27 = 61 (111101) +34 + 28 = 62 (111110) +34 + 29 = 63 (111111) +34 + 30 = 0 (000000) +34 + 31 = 1 (000001) +34 + 32 = 2 (000010) +34 + 33 = 3 (000011) +34 + 34 = 4 (000100) +34 + 35 = 5 (000101) +34 + 36 = 6 (000110) +34 + 37 = 7 (000111) +34 + 38 = 8 (001000) +34 + 39 = 9 (001001) +34 + 40 = 10 (001010) +34 + 41 = 11 (001011) +34 + 42 = 12 (001100) +34 + 43 = 13 (001101) +34 + 44 = 14 (001110) +34 + 45 = 15 (001111) +34 + 46 = 16 (010000) +34 + 47 = 17 (010001) +34 + 48 = 18 (010010) +34 + 49 = 19 (010011) +34 + 50 = 20 (010100) +34 + 51 = 21 (010101) +34 + 52 = 22 (010110) +34 + 53 = 23 (010111) +34 + 54 = 24 (011000) +34 + 55 = 25 (011001) +34 + 56 = 26 (011010) +34 + 57 = 27 (011011) +34 + 58 = 28 (011100) +34 + 59 = 29 (011101) +34 + 60 = 30 (011110) +34 + 61 = 31 (011111) +34 + 62 = 32 (100000) +34 + 63 = 33 (100001) +35 + 0 = 35 (100011) +35 + 1 = 36 (100100) +35 + 2 = 37 (100101) +35 + 3 = 38 (100110) +35 + 4 = 39 (100111) +35 + 5 = 40 (101000) +35 + 6 = 41 (101001) +35 + 7 = 42 (101010) +35 + 8 = 43 (101011) +35 + 9 = 44 (101100) +35 + 10 = 45 (101101) +35 + 11 = 46 (101110) +35 + 12 = 47 (101111) +35 + 13 = 48 (110000) +35 + 14 = 49 (110001) +35 + 15 = 50 (110010) +35 + 16 = 51 (110011) +35 + 17 = 52 (110100) +35 + 18 = 53 (110101) +35 + 19 = 54 (110110) +35 + 20 = 55 (110111) +35 + 21 = 56 (111000) +35 + 22 = 57 (111001) +35 + 23 = 58 (111010) +35 + 24 = 59 (111011) +35 + 25 = 60 (111100) +35 + 26 = 61 (111101) +35 + 27 = 62 (111110) +35 + 28 = 63 (111111) +35 + 29 = 0 (000000) +35 + 30 = 1 (000001) +35 + 31 = 2 (000010) +35 + 32 = 3 (000011) +35 + 33 = 4 (000100) +35 + 34 = 5 (000101) +35 + 35 = 6 (000110) +35 + 36 = 7 (000111) +35 + 37 = 8 (001000) +35 + 38 = 9 (001001) +35 + 39 = 10 (001010) +35 + 40 = 11 (001011) +35 + 41 = 12 (001100) +35 + 42 = 13 (001101) +35 + 43 = 14 (001110) +35 + 44 = 15 (001111) +35 + 45 = 16 (010000) +35 + 46 = 17 (010001) +35 + 47 = 18 (010010) +35 + 48 = 19 (010011) +35 + 49 = 20 (010100) +35 + 50 = 21 (010101) +35 + 51 = 22 (010110) +35 + 52 = 23 (010111) +35 + 53 = 24 (011000) +35 + 54 = 25 (011001) +35 + 55 = 26 (011010) +35 + 56 = 27 (011011) +35 + 57 = 28 (011100) +35 + 58 = 29 (011101) +35 + 59 = 30 (011110) +35 + 60 = 31 (011111) +35 + 61 = 32 (100000) +35 + 62 = 33 (100001) +35 + 63 = 34 (100010) +36 + 0 = 36 (100100) +36 + 1 = 37 (100101) +36 + 2 = 38 (100110) +36 + 3 = 39 (100111) +36 + 4 = 40 (101000) +36 + 5 = 41 (101001) +36 + 6 = 42 (101010) +36 + 7 = 43 (101011) +36 + 8 = 44 (101100) +36 + 9 = 45 (101101) +36 + 10 = 46 (101110) +36 + 11 = 47 (101111) +36 + 12 = 48 (110000) +36 + 13 = 49 (110001) +36 + 14 = 50 (110010) +36 + 15 = 51 (110011) +36 + 16 = 52 (110100) +36 + 17 = 53 (110101) +36 + 18 = 54 (110110) +36 + 19 = 55 (110111) +36 + 20 = 56 (111000) +36 + 21 = 57 (111001) +36 + 22 = 58 (111010) +36 + 23 = 59 (111011) +36 + 24 = 60 (111100) +36 + 25 = 61 (111101) +36 + 26 = 62 (111110) +36 + 27 = 63 (111111) +36 + 28 = 0 (000000) +36 + 29 = 1 (000001) +36 + 30 = 2 (000010) +36 + 31 = 3 (000011) +36 + 32 = 4 (000100) +36 + 33 = 5 (000101) +36 + 34 = 6 (000110) +36 + 35 = 7 (000111) +36 + 36 = 8 (001000) +36 + 37 = 9 (001001) +36 + 38 = 10 (001010) +36 + 39 = 11 (001011) +36 + 40 = 12 (001100) +36 + 41 = 13 (001101) +36 + 42 = 14 (001110) +36 + 43 = 15 (001111) +36 + 44 = 16 (010000) +36 + 45 = 17 (010001) +36 + 46 = 18 (010010) +36 + 47 = 19 (010011) +36 + 48 = 20 (010100) +36 + 49 = 21 (010101) +36 + 50 = 22 (010110) +36 + 51 = 23 (010111) +36 + 52 = 24 (011000) +36 + 53 = 25 (011001) +36 + 54 = 26 (011010) +36 + 55 = 27 (011011) +36 + 56 = 28 (011100) +36 + 57 = 29 (011101) +36 + 58 = 30 (011110) +36 + 59 = 31 (011111) +36 + 60 = 32 (100000) +36 + 61 = 33 (100001) +36 + 62 = 34 (100010) +36 + 63 = 35 (100011) +37 + 0 = 37 (100101) +37 + 1 = 38 (100110) +37 + 2 = 39 (100111) +37 + 3 = 40 (101000) +37 + 4 = 41 (101001) +37 + 5 = 42 (101010) +37 + 6 = 43 (101011) +37 + 7 = 44 (101100) +37 + 8 = 45 (101101) +37 + 9 = 46 (101110) +37 + 10 = 47 (101111) +37 + 11 = 48 (110000) +37 + 12 = 49 (110001) +37 + 13 = 50 (110010) +37 + 14 = 51 (110011) +37 + 15 = 52 (110100) +37 + 16 = 53 (110101) +37 + 17 = 54 (110110) +37 + 18 = 55 (110111) +37 + 19 = 56 (111000) +37 + 20 = 57 (111001) +37 + 21 = 58 (111010) +37 + 22 = 59 (111011) +37 + 23 = 60 (111100) +37 + 24 = 61 (111101) +37 + 25 = 62 (111110) +37 + 26 = 63 (111111) +37 + 27 = 0 (000000) +37 + 28 = 1 (000001) +37 + 29 = 2 (000010) +37 + 30 = 3 (000011) +37 + 31 = 4 (000100) +37 + 32 = 5 (000101) +37 + 33 = 6 (000110) +37 + 34 = 7 (000111) +37 + 35 = 8 (001000) +37 + 36 = 9 (001001) +37 + 37 = 10 (001010) +37 + 38 = 11 (001011) +37 + 39 = 12 (001100) +37 + 40 = 13 (001101) +37 + 41 = 14 (001110) +37 + 42 = 15 (001111) +37 + 43 = 16 (010000) +37 + 44 = 17 (010001) +37 + 45 = 18 (010010) +37 + 46 = 19 (010011) +37 + 47 = 20 (010100) +37 + 48 = 21 (010101) +37 + 49 = 22 (010110) +37 + 50 = 23 (010111) +37 + 51 = 24 (011000) +37 + 52 = 25 (011001) +37 + 53 = 26 (011010) +37 + 54 = 27 (011011) +37 + 55 = 28 (011100) +37 + 56 = 29 (011101) +37 + 57 = 30 (011110) +37 + 58 = 31 (011111) +37 + 59 = 32 (100000) +37 + 60 = 33 (100001) +37 + 61 = 34 (100010) +37 + 62 = 35 (100011) +37 + 63 = 36 (100100) +38 + 0 = 38 (100110) +38 + 1 = 39 (100111) +38 + 2 = 40 (101000) +38 + 3 = 41 (101001) +38 + 4 = 42 (101010) +38 + 5 = 43 (101011) +38 + 6 = 44 (101100) +38 + 7 = 45 (101101) +38 + 8 = 46 (101110) +38 + 9 = 47 (101111) +38 + 10 = 48 (110000) +38 + 11 = 49 (110001) +38 + 12 = 50 (110010) +38 + 13 = 51 (110011) +38 + 14 = 52 (110100) +38 + 15 = 53 (110101) +38 + 16 = 54 (110110) +38 + 17 = 55 (110111) +38 + 18 = 56 (111000) +38 + 19 = 57 (111001) +38 + 20 = 58 (111010) +38 + 21 = 59 (111011) +38 + 22 = 60 (111100) +38 + 23 = 61 (111101) +38 + 24 = 62 (111110) +38 + 25 = 63 (111111) +38 + 26 = 0 (000000) +38 + 27 = 1 (000001) +38 + 28 = 2 (000010) +38 + 29 = 3 (000011) +38 + 30 = 4 (000100) +38 + 31 = 5 (000101) +38 + 32 = 6 (000110) +38 + 33 = 7 (000111) +38 + 34 = 8 (001000) +38 + 35 = 9 (001001) +38 + 36 = 10 (001010) +38 + 37 = 11 (001011) +38 + 38 = 12 (001100) +38 + 39 = 13 (001101) +38 + 40 = 14 (001110) +38 + 41 = 15 (001111) +38 + 42 = 16 (010000) +38 + 43 = 17 (010001) +38 + 44 = 18 (010010) +38 + 45 = 19 (010011) +38 + 46 = 20 (010100) +38 + 47 = 21 (010101) +38 + 48 = 22 (010110) +38 + 49 = 23 (010111) +38 + 50 = 24 (011000) +38 + 51 = 25 (011001) +38 + 52 = 26 (011010) +38 + 53 = 27 (011011) +38 + 54 = 28 (011100) +38 + 55 = 29 (011101) +38 + 56 = 30 (011110) +38 + 57 = 31 (011111) +38 + 58 = 32 (100000) +38 + 59 = 33 (100001) +38 + 60 = 34 (100010) +38 + 61 = 35 (100011) +38 + 62 = 36 (100100) +38 + 63 = 37 (100101) +39 + 0 = 39 (100111) +39 + 1 = 40 (101000) +39 + 2 = 41 (101001) +39 + 3 = 42 (101010) +39 + 4 = 43 (101011) +39 + 5 = 44 (101100) +39 + 6 = 45 (101101) +39 + 7 = 46 (101110) +39 + 8 = 47 (101111) +39 + 9 = 48 (110000) +39 + 10 = 49 (110001) +39 + 11 = 50 (110010) +39 + 12 = 51 (110011) +39 + 13 = 52 (110100) +39 + 14 = 53 (110101) +39 + 15 = 54 (110110) +39 + 16 = 55 (110111) +39 + 17 = 56 (111000) +39 + 18 = 57 (111001) +39 + 19 = 58 (111010) +39 + 20 = 59 (111011) +39 + 21 = 60 (111100) +39 + 22 = 61 (111101) +39 + 23 = 62 (111110) +39 + 24 = 63 (111111) +39 + 25 = 0 (000000) +39 + 26 = 1 (000001) +39 + 27 = 2 (000010) +39 + 28 = 3 (000011) +39 + 29 = 4 (000100) +39 + 30 = 5 (000101) +39 + 31 = 6 (000110) +39 + 32 = 7 (000111) +39 + 33 = 8 (001000) +39 + 34 = 9 (001001) +39 + 35 = 10 (001010) +39 + 36 = 11 (001011) +39 + 37 = 12 (001100) +39 + 38 = 13 (001101) +39 + 39 = 14 (001110) +39 + 40 = 15 (001111) +39 + 41 = 16 (010000) +39 + 42 = 17 (010001) +39 + 43 = 18 (010010) +39 + 44 = 19 (010011) +39 + 45 = 20 (010100) +39 + 46 = 21 (010101) +39 + 47 = 22 (010110) +39 + 48 = 23 (010111) +39 + 49 = 24 (011000) +39 + 50 = 25 (011001) +39 + 51 = 26 (011010) +39 + 52 = 27 (011011) +39 + 53 = 28 (011100) +39 + 54 = 29 (011101) +39 + 55 = 30 (011110) +39 + 56 = 31 (011111) +39 + 57 = 32 (100000) +39 + 58 = 33 (100001) +39 + 59 = 34 (100010) +39 + 60 = 35 (100011) +39 + 61 = 36 (100100) +39 + 62 = 37 (100101) +39 + 63 = 38 (100110) +40 + 0 = 40 (101000) +40 + 1 = 41 (101001) +40 + 2 = 42 (101010) +40 + 3 = 43 (101011) +40 + 4 = 44 (101100) +40 + 5 = 45 (101101) +40 + 6 = 46 (101110) +40 + 7 = 47 (101111) +40 + 8 = 48 (110000) +40 + 9 = 49 (110001) +40 + 10 = 50 (110010) +40 + 11 = 51 (110011) +40 + 12 = 52 (110100) +40 + 13 = 53 (110101) +40 + 14 = 54 (110110) +40 + 15 = 55 (110111) +40 + 16 = 56 (111000) +40 + 17 = 57 (111001) +40 + 18 = 58 (111010) +40 + 19 = 59 (111011) +40 + 20 = 60 (111100) +40 + 21 = 61 (111101) +40 + 22 = 62 (111110) +40 + 23 = 63 (111111) +40 + 24 = 0 (000000) +40 + 25 = 1 (000001) +40 + 26 = 2 (000010) +40 + 27 = 3 (000011) +40 + 28 = 4 (000100) +40 + 29 = 5 (000101) +40 + 30 = 6 (000110) +40 + 31 = 7 (000111) +40 + 32 = 8 (001000) +40 + 33 = 9 (001001) +40 + 34 = 10 (001010) +40 + 35 = 11 (001011) +40 + 36 = 12 (001100) +40 + 37 = 13 (001101) +40 + 38 = 14 (001110) +40 + 39 = 15 (001111) +40 + 40 = 16 (010000) +40 + 41 = 17 (010001) +40 + 42 = 18 (010010) +40 + 43 = 19 (010011) +40 + 44 = 20 (010100) +40 + 45 = 21 (010101) +40 + 46 = 22 (010110) +40 + 47 = 23 (010111) +40 + 48 = 24 (011000) +40 + 49 = 25 (011001) +40 + 50 = 26 (011010) +40 + 51 = 27 (011011) +40 + 52 = 28 (011100) +40 + 53 = 29 (011101) +40 + 54 = 30 (011110) +40 + 55 = 31 (011111) +40 + 56 = 32 (100000) +40 + 57 = 33 (100001) +40 + 58 = 34 (100010) +40 + 59 = 35 (100011) +40 + 60 = 36 (100100) +40 + 61 = 37 (100101) +40 + 62 = 38 (100110) +40 + 63 = 39 (100111) +41 + 0 = 41 (101001) +41 + 1 = 42 (101010) +41 + 2 = 43 (101011) +41 + 3 = 44 (101100) +41 + 4 = 45 (101101) +41 + 5 = 46 (101110) +41 + 6 = 47 (101111) +41 + 7 = 48 (110000) +41 + 8 = 49 (110001) +41 + 9 = 50 (110010) +41 + 10 = 51 (110011) +41 + 11 = 52 (110100) +41 + 12 = 53 (110101) +41 + 13 = 54 (110110) +41 + 14 = 55 (110111) +41 + 15 = 56 (111000) +41 + 16 = 57 (111001) +41 + 17 = 58 (111010) +41 + 18 = 59 (111011) +41 + 19 = 60 (111100) +41 + 20 = 61 (111101) +41 + 21 = 62 (111110) +41 + 22 = 63 (111111) +41 + 23 = 0 (000000) +41 + 24 = 1 (000001) +41 + 25 = 2 (000010) +41 + 26 = 3 (000011) +41 + 27 = 4 (000100) +41 + 28 = 5 (000101) +41 + 29 = 6 (000110) +41 + 30 = 7 (000111) +41 + 31 = 8 (001000) +41 + 32 = 9 (001001) +41 + 33 = 10 (001010) +41 + 34 = 11 (001011) +41 + 35 = 12 (001100) +41 + 36 = 13 (001101) +41 + 37 = 14 (001110) +41 + 38 = 15 (001111) +41 + 39 = 16 (010000) +41 + 40 = 17 (010001) +41 + 41 = 18 (010010) +41 + 42 = 19 (010011) +41 + 43 = 20 (010100) +41 + 44 = 21 (010101) +41 + 45 = 22 (010110) +41 + 46 = 23 (010111) +41 + 47 = 24 (011000) +41 + 48 = 25 (011001) +41 + 49 = 26 (011010) +41 + 50 = 27 (011011) +41 + 51 = 28 (011100) +41 + 52 = 29 (011101) +41 + 53 = 30 (011110) +41 + 54 = 31 (011111) +41 + 55 = 32 (100000) +41 + 56 = 33 (100001) +41 + 57 = 34 (100010) +41 + 58 = 35 (100011) +41 + 59 = 36 (100100) +41 + 60 = 37 (100101) +41 + 61 = 38 (100110) +41 + 62 = 39 (100111) +41 + 63 = 40 (101000) +42 + 0 = 42 (101010) +42 + 1 = 43 (101011) +42 + 2 = 44 (101100) +42 + 3 = 45 (101101) +42 + 4 = 46 (101110) +42 + 5 = 47 (101111) +42 + 6 = 48 (110000) +42 + 7 = 49 (110001) +42 + 8 = 50 (110010) +42 + 9 = 51 (110011) +42 + 10 = 52 (110100) +42 + 11 = 53 (110101) +42 + 12 = 54 (110110) +42 + 13 = 55 (110111) +42 + 14 = 56 (111000) +42 + 15 = 57 (111001) +42 + 16 = 58 (111010) +42 + 17 = 59 (111011) +42 + 18 = 60 (111100) +42 + 19 = 61 (111101) +42 + 20 = 62 (111110) +42 + 21 = 63 (111111) +42 + 22 = 0 (000000) +42 + 23 = 1 (000001) +42 + 24 = 2 (000010) +42 + 25 = 3 (000011) +42 + 26 = 4 (000100) +42 + 27 = 5 (000101) +42 + 28 = 6 (000110) +42 + 29 = 7 (000111) +42 + 30 = 8 (001000) +42 + 31 = 9 (001001) +42 + 32 = 10 (001010) +42 + 33 = 11 (001011) +42 + 34 = 12 (001100) +42 + 35 = 13 (001101) +42 + 36 = 14 (001110) +42 + 37 = 15 (001111) +42 + 38 = 16 (010000) +42 + 39 = 17 (010001) +42 + 40 = 18 (010010) +42 + 41 = 19 (010011) +42 + 42 = 20 (010100) +42 + 43 = 21 (010101) +42 + 44 = 22 (010110) +42 + 45 = 23 (010111) +42 + 46 = 24 (011000) +42 + 47 = 25 (011001) +42 + 48 = 26 (011010) +42 + 49 = 27 (011011) +42 + 50 = 28 (011100) +42 + 51 = 29 (011101) +42 + 52 = 30 (011110) +42 + 53 = 31 (011111) +42 + 54 = 32 (100000) +42 + 55 = 33 (100001) +42 + 56 = 34 (100010) +42 + 57 = 35 (100011) +42 + 58 = 36 (100100) +42 + 59 = 37 (100101) +42 + 60 = 38 (100110) +42 + 61 = 39 (100111) +42 + 62 = 40 (101000) +42 + 63 = 41 (101001) +43 + 0 = 43 (101011) +43 + 1 = 44 (101100) +43 + 2 = 45 (101101) +43 + 3 = 46 (101110) +43 + 4 = 47 (101111) +43 + 5 = 48 (110000) +43 + 6 = 49 (110001) +43 + 7 = 50 (110010) +43 + 8 = 51 (110011) +43 + 9 = 52 (110100) +43 + 10 = 53 (110101) +43 + 11 = 54 (110110) +43 + 12 = 55 (110111) +43 + 13 = 56 (111000) +43 + 14 = 57 (111001) +43 + 15 = 58 (111010) +43 + 16 = 59 (111011) +43 + 17 = 60 (111100) +43 + 18 = 61 (111101) +43 + 19 = 62 (111110) +43 + 20 = 63 (111111) +43 + 21 = 0 (000000) +43 + 22 = 1 (000001) +43 + 23 = 2 (000010) +43 + 24 = 3 (000011) +43 + 25 = 4 (000100) +43 + 26 = 5 (000101) +43 + 27 = 6 (000110) +43 + 28 = 7 (000111) +43 + 29 = 8 (001000) +43 + 30 = 9 (001001) +43 + 31 = 10 (001010) +43 + 32 = 11 (001011) +43 + 33 = 12 (001100) +43 + 34 = 13 (001101) +43 + 35 = 14 (001110) +43 + 36 = 15 (001111) +43 + 37 = 16 (010000) +43 + 38 = 17 (010001) +43 + 39 = 18 (010010) +43 + 40 = 19 (010011) +43 + 41 = 20 (010100) +43 + 42 = 21 (010101) +43 + 43 = 22 (010110) +43 + 44 = 23 (010111) +43 + 45 = 24 (011000) +43 + 46 = 25 (011001) +43 + 47 = 26 (011010) +43 + 48 = 27 (011011) +43 + 49 = 28 (011100) +43 + 50 = 29 (011101) +43 + 51 = 30 (011110) +43 + 52 = 31 (011111) +43 + 53 = 32 (100000) +43 + 54 = 33 (100001) +43 + 55 = 34 (100010) +43 + 56 = 35 (100011) +43 + 57 = 36 (100100) +43 + 58 = 37 (100101) +43 + 59 = 38 (100110) +43 + 60 = 39 (100111) +43 + 61 = 40 (101000) +43 + 62 = 41 (101001) +43 + 63 = 42 (101010) +44 + 0 = 44 (101100) +44 + 1 = 45 (101101) +44 + 2 = 46 (101110) +44 + 3 = 47 (101111) +44 + 4 = 48 (110000) +44 + 5 = 49 (110001) +44 + 6 = 50 (110010) +44 + 7 = 51 (110011) +44 + 8 = 52 (110100) +44 + 9 = 53 (110101) +44 + 10 = 54 (110110) +44 + 11 = 55 (110111) +44 + 12 = 56 (111000) +44 + 13 = 57 (111001) +44 + 14 = 58 (111010) +44 + 15 = 59 (111011) +44 + 16 = 60 (111100) +44 + 17 = 61 (111101) +44 + 18 = 62 (111110) +44 + 19 = 63 (111111) +44 + 20 = 0 (000000) +44 + 21 = 1 (000001) +44 + 22 = 2 (000010) +44 + 23 = 3 (000011) +44 + 24 = 4 (000100) +44 + 25 = 5 (000101) +44 + 26 = 6 (000110) +44 + 27 = 7 (000111) +44 + 28 = 8 (001000) +44 + 29 = 9 (001001) +44 + 30 = 10 (001010) +44 + 31 = 11 (001011) +44 + 32 = 12 (001100) +44 + 33 = 13 (001101) +44 + 34 = 14 (001110) +44 + 35 = 15 (001111) +44 + 36 = 16 (010000) +44 + 37 = 17 (010001) +44 + 38 = 18 (010010) +44 + 39 = 19 (010011) +44 + 40 = 20 (010100) +44 + 41 = 21 (010101) +44 + 42 = 22 (010110) +44 + 43 = 23 (010111) +44 + 44 = 24 (011000) +44 + 45 = 25 (011001) +44 + 46 = 26 (011010) +44 + 47 = 27 (011011) +44 + 48 = 28 (011100) +44 + 49 = 29 (011101) +44 + 50 = 30 (011110) +44 + 51 = 31 (011111) +44 + 52 = 32 (100000) +44 + 53 = 33 (100001) +44 + 54 = 34 (100010) +44 + 55 = 35 (100011) +44 + 56 = 36 (100100) +44 + 57 = 37 (100101) +44 + 58 = 38 (100110) +44 + 59 = 39 (100111) +44 + 60 = 40 (101000) +44 + 61 = 41 (101001) +44 + 62 = 42 (101010) +44 + 63 = 43 (101011) +45 + 0 = 45 (101101) +45 + 1 = 46 (101110) +45 + 2 = 47 (101111) +45 + 3 = 48 (110000) +45 + 4 = 49 (110001) +45 + 5 = 50 (110010) +45 + 6 = 51 (110011) +45 + 7 = 52 (110100) +45 + 8 = 53 (110101) +45 + 9 = 54 (110110) +45 + 10 = 55 (110111) +45 + 11 = 56 (111000) +45 + 12 = 57 (111001) +45 + 13 = 58 (111010) +45 + 14 = 59 (111011) +45 + 15 = 60 (111100) +45 + 16 = 61 (111101) +45 + 17 = 62 (111110) +45 + 18 = 63 (111111) +45 + 19 = 0 (000000) +45 + 20 = 1 (000001) +45 + 21 = 2 (000010) +45 + 22 = 3 (000011) +45 + 23 = 4 (000100) +45 + 24 = 5 (000101) +45 + 25 = 6 (000110) +45 + 26 = 7 (000111) +45 + 27 = 8 (001000) +45 + 28 = 9 (001001) +45 + 29 = 10 (001010) +45 + 30 = 11 (001011) +45 + 31 = 12 (001100) +45 + 32 = 13 (001101) +45 + 33 = 14 (001110) +45 + 34 = 15 (001111) +45 + 35 = 16 (010000) +45 + 36 = 17 (010001) +45 + 37 = 18 (010010) +45 + 38 = 19 (010011) +45 + 39 = 20 (010100) +45 + 40 = 21 (010101) +45 + 41 = 22 (010110) +45 + 42 = 23 (010111) +45 + 43 = 24 (011000) +45 + 44 = 25 (011001) +45 + 45 = 26 (011010) +45 + 46 = 27 (011011) +45 + 47 = 28 (011100) +45 + 48 = 29 (011101) +45 + 49 = 30 (011110) +45 + 50 = 31 (011111) +45 + 51 = 32 (100000) +45 + 52 = 33 (100001) +45 + 53 = 34 (100010) +45 + 54 = 35 (100011) +45 + 55 = 36 (100100) +45 + 56 = 37 (100101) +45 + 57 = 38 (100110) +45 + 58 = 39 (100111) +45 + 59 = 40 (101000) +45 + 60 = 41 (101001) +45 + 61 = 42 (101010) +45 + 62 = 43 (101011) +45 + 63 = 44 (101100) +46 + 0 = 46 (101110) +46 + 1 = 47 (101111) +46 + 2 = 48 (110000) +46 + 3 = 49 (110001) +46 + 4 = 50 (110010) +46 + 5 = 51 (110011) +46 + 6 = 52 (110100) +46 + 7 = 53 (110101) +46 + 8 = 54 (110110) +46 + 9 = 55 (110111) +46 + 10 = 56 (111000) +46 + 11 = 57 (111001) +46 + 12 = 58 (111010) +46 + 13 = 59 (111011) +46 + 14 = 60 (111100) +46 + 15 = 61 (111101) +46 + 16 = 62 (111110) +46 + 17 = 63 (111111) +46 + 18 = 0 (000000) +46 + 19 = 1 (000001) +46 + 20 = 2 (000010) +46 + 21 = 3 (000011) +46 + 22 = 4 (000100) +46 + 23 = 5 (000101) +46 + 24 = 6 (000110) +46 + 25 = 7 (000111) +46 + 26 = 8 (001000) +46 + 27 = 9 (001001) +46 + 28 = 10 (001010) +46 + 29 = 11 (001011) +46 + 30 = 12 (001100) +46 + 31 = 13 (001101) +46 + 32 = 14 (001110) +46 + 33 = 15 (001111) +46 + 34 = 16 (010000) +46 + 35 = 17 (010001) +46 + 36 = 18 (010010) +46 + 37 = 19 (010011) +46 + 38 = 20 (010100) +46 + 39 = 21 (010101) +46 + 40 = 22 (010110) +46 + 41 = 23 (010111) +46 + 42 = 24 (011000) +46 + 43 = 25 (011001) +46 + 44 = 26 (011010) +46 + 45 = 27 (011011) +46 + 46 = 28 (011100) +46 + 47 = 29 (011101) +46 + 48 = 30 (011110) +46 + 49 = 31 (011111) +46 + 50 = 32 (100000) +46 + 51 = 33 (100001) +46 + 52 = 34 (100010) +46 + 53 = 35 (100011) +46 + 54 = 36 (100100) +46 + 55 = 37 (100101) +46 + 56 = 38 (100110) +46 + 57 = 39 (100111) +46 + 58 = 40 (101000) +46 + 59 = 41 (101001) +46 + 60 = 42 (101010) +46 + 61 = 43 (101011) +46 + 62 = 44 (101100) +46 + 63 = 45 (101101) +47 + 0 = 47 (101111) +47 + 1 = 48 (110000) +47 + 2 = 49 (110001) +47 + 3 = 50 (110010) +47 + 4 = 51 (110011) +47 + 5 = 52 (110100) +47 + 6 = 53 (110101) +47 + 7 = 54 (110110) +47 + 8 = 55 (110111) +47 + 9 = 56 (111000) +47 + 10 = 57 (111001) +47 + 11 = 58 (111010) +47 + 12 = 59 (111011) +47 + 13 = 60 (111100) +47 + 14 = 61 (111101) +47 + 15 = 62 (111110) +47 + 16 = 63 (111111) +47 + 17 = 0 (000000) +47 + 18 = 1 (000001) +47 + 19 = 2 (000010) +47 + 20 = 3 (000011) +47 + 21 = 4 (000100) +47 + 22 = 5 (000101) +47 + 23 = 6 (000110) +47 + 24 = 7 (000111) +47 + 25 = 8 (001000) +47 + 26 = 9 (001001) +47 + 27 = 10 (001010) +47 + 28 = 11 (001011) +47 + 29 = 12 (001100) +47 + 30 = 13 (001101) +47 + 31 = 14 (001110) +47 + 32 = 15 (001111) +47 + 33 = 16 (010000) +47 + 34 = 17 (010001) +47 + 35 = 18 (010010) +47 + 36 = 19 (010011) +47 + 37 = 20 (010100) +47 + 38 = 21 (010101) +47 + 39 = 22 (010110) +47 + 40 = 23 (010111) +47 + 41 = 24 (011000) +47 + 42 = 25 (011001) +47 + 43 = 26 (011010) +47 + 44 = 27 (011011) +47 + 45 = 28 (011100) +47 + 46 = 29 (011101) +47 + 47 = 30 (011110) +47 + 48 = 31 (011111) +47 + 49 = 32 (100000) +47 + 50 = 33 (100001) +47 + 51 = 34 (100010) +47 + 52 = 35 (100011) +47 + 53 = 36 (100100) +47 + 54 = 37 (100101) +47 + 55 = 38 (100110) +47 + 56 = 39 (100111) +47 + 57 = 40 (101000) +47 + 58 = 41 (101001) +47 + 59 = 42 (101010) +47 + 60 = 43 (101011) +47 + 61 = 44 (101100) +47 + 62 = 45 (101101) +47 + 63 = 46 (101110) +48 + 0 = 48 (110000) +48 + 1 = 49 (110001) +48 + 2 = 50 (110010) +48 + 3 = 51 (110011) +48 + 4 = 52 (110100) +48 + 5 = 53 (110101) +48 + 6 = 54 (110110) +48 + 7 = 55 (110111) +48 + 8 = 56 (111000) +48 + 9 = 57 (111001) +48 + 10 = 58 (111010) +48 + 11 = 59 (111011) +48 + 12 = 60 (111100) +48 + 13 = 61 (111101) +48 + 14 = 62 (111110) +48 + 15 = 63 (111111) +48 + 16 = 0 (000000) +48 + 17 = 1 (000001) +48 + 18 = 2 (000010) +48 + 19 = 3 (000011) +48 + 20 = 4 (000100) +48 + 21 = 5 (000101) +48 + 22 = 6 (000110) +48 + 23 = 7 (000111) +48 + 24 = 8 (001000) +48 + 25 = 9 (001001) +48 + 26 = 10 (001010) +48 + 27 = 11 (001011) +48 + 28 = 12 (001100) +48 + 29 = 13 (001101) +48 + 30 = 14 (001110) +48 + 31 = 15 (001111) +48 + 32 = 16 (010000) +48 + 33 = 17 (010001) +48 + 34 = 18 (010010) +48 + 35 = 19 (010011) +48 + 36 = 20 (010100) +48 + 37 = 21 (010101) +48 + 38 = 22 (010110) +48 + 39 = 23 (010111) +48 + 40 = 24 (011000) +48 + 41 = 25 (011001) +48 + 42 = 26 (011010) +48 + 43 = 27 (011011) +48 + 44 = 28 (011100) +48 + 45 = 29 (011101) +48 + 46 = 30 (011110) +48 + 47 = 31 (011111) +48 + 48 = 32 (100000) +48 + 49 = 33 (100001) +48 + 50 = 34 (100010) +48 + 51 = 35 (100011) +48 + 52 = 36 (100100) +48 + 53 = 37 (100101) +48 + 54 = 38 (100110) +48 + 55 = 39 (100111) +48 + 56 = 40 (101000) +48 + 57 = 41 (101001) +48 + 58 = 42 (101010) +48 + 59 = 43 (101011) +48 + 60 = 44 (101100) +48 + 61 = 45 (101101) +48 + 62 = 46 (101110) +48 + 63 = 47 (101111) +49 + 0 = 49 (110001) +49 + 1 = 50 (110010) +49 + 2 = 51 (110011) +49 + 3 = 52 (110100) +49 + 4 = 53 (110101) +49 + 5 = 54 (110110) +49 + 6 = 55 (110111) +49 + 7 = 56 (111000) +49 + 8 = 57 (111001) +49 + 9 = 58 (111010) +49 + 10 = 59 (111011) +49 + 11 = 60 (111100) +49 + 12 = 61 (111101) +49 + 13 = 62 (111110) +49 + 14 = 63 (111111) +49 + 15 = 0 (000000) +49 + 16 = 1 (000001) +49 + 17 = 2 (000010) +49 + 18 = 3 (000011) +49 + 19 = 4 (000100) +49 + 20 = 5 (000101) +49 + 21 = 6 (000110) +49 + 22 = 7 (000111) +49 + 23 = 8 (001000) +49 + 24 = 9 (001001) +49 + 25 = 10 (001010) +49 + 26 = 11 (001011) +49 + 27 = 12 (001100) +49 + 28 = 13 (001101) +49 + 29 = 14 (001110) +49 + 30 = 15 (001111) +49 + 31 = 16 (010000) +49 + 32 = 17 (010001) +49 + 33 = 18 (010010) +49 + 34 = 19 (010011) +49 + 35 = 20 (010100) +49 + 36 = 21 (010101) +49 + 37 = 22 (010110) +49 + 38 = 23 (010111) +49 + 39 = 24 (011000) +49 + 40 = 25 (011001) +49 + 41 = 26 (011010) +49 + 42 = 27 (011011) +49 + 43 = 28 (011100) +49 + 44 = 29 (011101) +49 + 45 = 30 (011110) +49 + 46 = 31 (011111) +49 + 47 = 32 (100000) +49 + 48 = 33 (100001) +49 + 49 = 34 (100010) +49 + 50 = 35 (100011) +49 + 51 = 36 (100100) +49 + 52 = 37 (100101) +49 + 53 = 38 (100110) +49 + 54 = 39 (100111) +49 + 55 = 40 (101000) +49 + 56 = 41 (101001) +49 + 57 = 42 (101010) +49 + 58 = 43 (101011) +49 + 59 = 44 (101100) +49 + 60 = 45 (101101) +49 + 61 = 46 (101110) +49 + 62 = 47 (101111) +49 + 63 = 48 (110000) +50 + 0 = 50 (110010) +50 + 1 = 51 (110011) +50 + 2 = 52 (110100) +50 + 3 = 53 (110101) +50 + 4 = 54 (110110) +50 + 5 = 55 (110111) +50 + 6 = 56 (111000) +50 + 7 = 57 (111001) +50 + 8 = 58 (111010) +50 + 9 = 59 (111011) +50 + 10 = 60 (111100) +50 + 11 = 61 (111101) +50 + 12 = 62 (111110) +50 + 13 = 63 (111111) +50 + 14 = 0 (000000) +50 + 15 = 1 (000001) +50 + 16 = 2 (000010) +50 + 17 = 3 (000011) +50 + 18 = 4 (000100) +50 + 19 = 5 (000101) +50 + 20 = 6 (000110) +50 + 21 = 7 (000111) +50 + 22 = 8 (001000) +50 + 23 = 9 (001001) +50 + 24 = 10 (001010) +50 + 25 = 11 (001011) +50 + 26 = 12 (001100) +50 + 27 = 13 (001101) +50 + 28 = 14 (001110) +50 + 29 = 15 (001111) +50 + 30 = 16 (010000) +50 + 31 = 17 (010001) +50 + 32 = 18 (010010) +50 + 33 = 19 (010011) +50 + 34 = 20 (010100) +50 + 35 = 21 (010101) +50 + 36 = 22 (010110) +50 + 37 = 23 (010111) +50 + 38 = 24 (011000) +50 + 39 = 25 (011001) +50 + 40 = 26 (011010) +50 + 41 = 27 (011011) +50 + 42 = 28 (011100) +50 + 43 = 29 (011101) +50 + 44 = 30 (011110) +50 + 45 = 31 (011111) +50 + 46 = 32 (100000) +50 + 47 = 33 (100001) +50 + 48 = 34 (100010) +50 + 49 = 35 (100011) +50 + 50 = 36 (100100) +50 + 51 = 37 (100101) +50 + 52 = 38 (100110) +50 + 53 = 39 (100111) +50 + 54 = 40 (101000) +50 + 55 = 41 (101001) +50 + 56 = 42 (101010) +50 + 57 = 43 (101011) +50 + 58 = 44 (101100) +50 + 59 = 45 (101101) +50 + 60 = 46 (101110) +50 + 61 = 47 (101111) +50 + 62 = 48 (110000) +50 + 63 = 49 (110001) +51 + 0 = 51 (110011) +51 + 1 = 52 (110100) +51 + 2 = 53 (110101) +51 + 3 = 54 (110110) +51 + 4 = 55 (110111) +51 + 5 = 56 (111000) +51 + 6 = 57 (111001) +51 + 7 = 58 (111010) +51 + 8 = 59 (111011) +51 + 9 = 60 (111100) +51 + 10 = 61 (111101) +51 + 11 = 62 (111110) +51 + 12 = 63 (111111) +51 + 13 = 0 (000000) +51 + 14 = 1 (000001) +51 + 15 = 2 (000010) +51 + 16 = 3 (000011) +51 + 17 = 4 (000100) +51 + 18 = 5 (000101) +51 + 19 = 6 (000110) +51 + 20 = 7 (000111) +51 + 21 = 8 (001000) +51 + 22 = 9 (001001) +51 + 23 = 10 (001010) +51 + 24 = 11 (001011) +51 + 25 = 12 (001100) +51 + 26 = 13 (001101) +51 + 27 = 14 (001110) +51 + 28 = 15 (001111) +51 + 29 = 16 (010000) +51 + 30 = 17 (010001) +51 + 31 = 18 (010010) +51 + 32 = 19 (010011) +51 + 33 = 20 (010100) +51 + 34 = 21 (010101) +51 + 35 = 22 (010110) +51 + 36 = 23 (010111) +51 + 37 = 24 (011000) +51 + 38 = 25 (011001) +51 + 39 = 26 (011010) +51 + 40 = 27 (011011) +51 + 41 = 28 (011100) +51 + 42 = 29 (011101) +51 + 43 = 30 (011110) +51 + 44 = 31 (011111) +51 + 45 = 32 (100000) +51 + 46 = 33 (100001) +51 + 47 = 34 (100010) +51 + 48 = 35 (100011) +51 + 49 = 36 (100100) +51 + 50 = 37 (100101) +51 + 51 = 38 (100110) +51 + 52 = 39 (100111) +51 + 53 = 40 (101000) +51 + 54 = 41 (101001) +51 + 55 = 42 (101010) +51 + 56 = 43 (101011) +51 + 57 = 44 (101100) +51 + 58 = 45 (101101) +51 + 59 = 46 (101110) +51 + 60 = 47 (101111) +51 + 61 = 48 (110000) +51 + 62 = 49 (110001) +51 + 63 = 50 (110010) +52 + 0 = 52 (110100) +52 + 1 = 53 (110101) +52 + 2 = 54 (110110) +52 + 3 = 55 (110111) +52 + 4 = 56 (111000) +52 + 5 = 57 (111001) +52 + 6 = 58 (111010) +52 + 7 = 59 (111011) +52 + 8 = 60 (111100) +52 + 9 = 61 (111101) +52 + 10 = 62 (111110) +52 + 11 = 63 (111111) +52 + 12 = 0 (000000) +52 + 13 = 1 (000001) +52 + 14 = 2 (000010) +52 + 15 = 3 (000011) +52 + 16 = 4 (000100) +52 + 17 = 5 (000101) +52 + 18 = 6 (000110) +52 + 19 = 7 (000111) +52 + 20 = 8 (001000) +52 + 21 = 9 (001001) +52 + 22 = 10 (001010) +52 + 23 = 11 (001011) +52 + 24 = 12 (001100) +52 + 25 = 13 (001101) +52 + 26 = 14 (001110) +52 + 27 = 15 (001111) +52 + 28 = 16 (010000) +52 + 29 = 17 (010001) +52 + 30 = 18 (010010) +52 + 31 = 19 (010011) +52 + 32 = 20 (010100) +52 + 33 = 21 (010101) +52 + 34 = 22 (010110) +52 + 35 = 23 (010111) +52 + 36 = 24 (011000) +52 + 37 = 25 (011001) +52 + 38 = 26 (011010) +52 + 39 = 27 (011011) +52 + 40 = 28 (011100) +52 + 41 = 29 (011101) +52 + 42 = 30 (011110) +52 + 43 = 31 (011111) +52 + 44 = 32 (100000) +52 + 45 = 33 (100001) +52 + 46 = 34 (100010) +52 + 47 = 35 (100011) +52 + 48 = 36 (100100) +52 + 49 = 37 (100101) +52 + 50 = 38 (100110) +52 + 51 = 39 (100111) +52 + 52 = 40 (101000) +52 + 53 = 41 (101001) +52 + 54 = 42 (101010) +52 + 55 = 43 (101011) +52 + 56 = 44 (101100) +52 + 57 = 45 (101101) +52 + 58 = 46 (101110) +52 + 59 = 47 (101111) +52 + 60 = 48 (110000) +52 + 61 = 49 (110001) +52 + 62 = 50 (110010) +52 + 63 = 51 (110011) +53 + 0 = 53 (110101) +53 + 1 = 54 (110110) +53 + 2 = 55 (110111) +53 + 3 = 56 (111000) +53 + 4 = 57 (111001) +53 + 5 = 58 (111010) +53 + 6 = 59 (111011) +53 + 7 = 60 (111100) +53 + 8 = 61 (111101) +53 + 9 = 62 (111110) +53 + 10 = 63 (111111) +53 + 11 = 0 (000000) +53 + 12 = 1 (000001) +53 + 13 = 2 (000010) +53 + 14 = 3 (000011) +53 + 15 = 4 (000100) +53 + 16 = 5 (000101) +53 + 17 = 6 (000110) +53 + 18 = 7 (000111) +53 + 19 = 8 (001000) +53 + 20 = 9 (001001) +53 + 21 = 10 (001010) +53 + 22 = 11 (001011) +53 + 23 = 12 (001100) +53 + 24 = 13 (001101) +53 + 25 = 14 (001110) +53 + 26 = 15 (001111) +53 + 27 = 16 (010000) +53 + 28 = 17 (010001) +53 + 29 = 18 (010010) +53 + 30 = 19 (010011) +53 + 31 = 20 (010100) +53 + 32 = 21 (010101) +53 + 33 = 22 (010110) +53 + 34 = 23 (010111) +53 + 35 = 24 (011000) +53 + 36 = 25 (011001) +53 + 37 = 26 (011010) +53 + 38 = 27 (011011) +53 + 39 = 28 (011100) +53 + 40 = 29 (011101) +53 + 41 = 30 (011110) +53 + 42 = 31 (011111) +53 + 43 = 32 (100000) +53 + 44 = 33 (100001) +53 + 45 = 34 (100010) +53 + 46 = 35 (100011) +53 + 47 = 36 (100100) +53 + 48 = 37 (100101) +53 + 49 = 38 (100110) +53 + 50 = 39 (100111) +53 + 51 = 40 (101000) +53 + 52 = 41 (101001) +53 + 53 = 42 (101010) +53 + 54 = 43 (101011) +53 + 55 = 44 (101100) +53 + 56 = 45 (101101) +53 + 57 = 46 (101110) +53 + 58 = 47 (101111) +53 + 59 = 48 (110000) +53 + 60 = 49 (110001) +53 + 61 = 50 (110010) +53 + 62 = 51 (110011) +53 + 63 = 52 (110100) +54 + 0 = 54 (110110) +54 + 1 = 55 (110111) +54 + 2 = 56 (111000) +54 + 3 = 57 (111001) +54 + 4 = 58 (111010) +54 + 5 = 59 (111011) +54 + 6 = 60 (111100) +54 + 7 = 61 (111101) +54 + 8 = 62 (111110) +54 + 9 = 63 (111111) +54 + 10 = 0 (000000) +54 + 11 = 1 (000001) +54 + 12 = 2 (000010) +54 + 13 = 3 (000011) +54 + 14 = 4 (000100) +54 + 15 = 5 (000101) +54 + 16 = 6 (000110) +54 + 17 = 7 (000111) +54 + 18 = 8 (001000) +54 + 19 = 9 (001001) +54 + 20 = 10 (001010) +54 + 21 = 11 (001011) +54 + 22 = 12 (001100) +54 + 23 = 13 (001101) +54 + 24 = 14 (001110) +54 + 25 = 15 (001111) +54 + 26 = 16 (010000) +54 + 27 = 17 (010001) +54 + 28 = 18 (010010) +54 + 29 = 19 (010011) +54 + 30 = 20 (010100) +54 + 31 = 21 (010101) +54 + 32 = 22 (010110) +54 + 33 = 23 (010111) +54 + 34 = 24 (011000) +54 + 35 = 25 (011001) +54 + 36 = 26 (011010) +54 + 37 = 27 (011011) +54 + 38 = 28 (011100) +54 + 39 = 29 (011101) +54 + 40 = 30 (011110) +54 + 41 = 31 (011111) +54 + 42 = 32 (100000) +54 + 43 = 33 (100001) +54 + 44 = 34 (100010) +54 + 45 = 35 (100011) +54 + 46 = 36 (100100) +54 + 47 = 37 (100101) +54 + 48 = 38 (100110) +54 + 49 = 39 (100111) +54 + 50 = 40 (101000) +54 + 51 = 41 (101001) +54 + 52 = 42 (101010) +54 + 53 = 43 (101011) +54 + 54 = 44 (101100) +54 + 55 = 45 (101101) +54 + 56 = 46 (101110) +54 + 57 = 47 (101111) +54 + 58 = 48 (110000) +54 + 59 = 49 (110001) +54 + 60 = 50 (110010) +54 + 61 = 51 (110011) +54 + 62 = 52 (110100) +54 + 63 = 53 (110101) +55 + 0 = 55 (110111) +55 + 1 = 56 (111000) +55 + 2 = 57 (111001) +55 + 3 = 58 (111010) +55 + 4 = 59 (111011) +55 + 5 = 60 (111100) +55 + 6 = 61 (111101) +55 + 7 = 62 (111110) +55 + 8 = 63 (111111) +55 + 9 = 0 (000000) +55 + 10 = 1 (000001) +55 + 11 = 2 (000010) +55 + 12 = 3 (000011) +55 + 13 = 4 (000100) +55 + 14 = 5 (000101) +55 + 15 = 6 (000110) +55 + 16 = 7 (000111) +55 + 17 = 8 (001000) +55 + 18 = 9 (001001) +55 + 19 = 10 (001010) +55 + 20 = 11 (001011) +55 + 21 = 12 (001100) +55 + 22 = 13 (001101) +55 + 23 = 14 (001110) +55 + 24 = 15 (001111) +55 + 25 = 16 (010000) +55 + 26 = 17 (010001) +55 + 27 = 18 (010010) +55 + 28 = 19 (010011) +55 + 29 = 20 (010100) +55 + 30 = 21 (010101) +55 + 31 = 22 (010110) +55 + 32 = 23 (010111) +55 + 33 = 24 (011000) +55 + 34 = 25 (011001) +55 + 35 = 26 (011010) +55 + 36 = 27 (011011) +55 + 37 = 28 (011100) +55 + 38 = 29 (011101) +55 + 39 = 30 (011110) +55 + 40 = 31 (011111) +55 + 41 = 32 (100000) +55 + 42 = 33 (100001) +55 + 43 = 34 (100010) +55 + 44 = 35 (100011) +55 + 45 = 36 (100100) +55 + 46 = 37 (100101) +55 + 47 = 38 (100110) +55 + 48 = 39 (100111) +55 + 49 = 40 (101000) +55 + 50 = 41 (101001) +55 + 51 = 42 (101010) +55 + 52 = 43 (101011) +55 + 53 = 44 (101100) +55 + 54 = 45 (101101) +55 + 55 = 46 (101110) +55 + 56 = 47 (101111) +55 + 57 = 48 (110000) +55 + 58 = 49 (110001) +55 + 59 = 50 (110010) +55 + 60 = 51 (110011) +55 + 61 = 52 (110100) +55 + 62 = 53 (110101) +55 + 63 = 54 (110110) +56 + 0 = 56 (111000) +56 + 1 = 57 (111001) +56 + 2 = 58 (111010) +56 + 3 = 59 (111011) +56 + 4 = 60 (111100) +56 + 5 = 61 (111101) +56 + 6 = 62 (111110) +56 + 7 = 63 (111111) +56 + 8 = 0 (000000) +56 + 9 = 1 (000001) +56 + 10 = 2 (000010) +56 + 11 = 3 (000011) +56 + 12 = 4 (000100) +56 + 13 = 5 (000101) +56 + 14 = 6 (000110) +56 + 15 = 7 (000111) +56 + 16 = 8 (001000) +56 + 17 = 9 (001001) +56 + 18 = 10 (001010) +56 + 19 = 11 (001011) +56 + 20 = 12 (001100) +56 + 21 = 13 (001101) +56 + 22 = 14 (001110) +56 + 23 = 15 (001111) +56 + 24 = 16 (010000) +56 + 25 = 17 (010001) +56 + 26 = 18 (010010) +56 + 27 = 19 (010011) +56 + 28 = 20 (010100) +56 + 29 = 21 (010101) +56 + 30 = 22 (010110) +56 + 31 = 23 (010111) +56 + 32 = 24 (011000) +56 + 33 = 25 (011001) +56 + 34 = 26 (011010) +56 + 35 = 27 (011011) +56 + 36 = 28 (011100) +56 + 37 = 29 (011101) +56 + 38 = 30 (011110) +56 + 39 = 31 (011111) +56 + 40 = 32 (100000) +56 + 41 = 33 (100001) +56 + 42 = 34 (100010) +56 + 43 = 35 (100011) +56 + 44 = 36 (100100) +56 + 45 = 37 (100101) +56 + 46 = 38 (100110) +56 + 47 = 39 (100111) +56 + 48 = 40 (101000) +56 + 49 = 41 (101001) +56 + 50 = 42 (101010) +56 + 51 = 43 (101011) +56 + 52 = 44 (101100) +56 + 53 = 45 (101101) +56 + 54 = 46 (101110) +56 + 55 = 47 (101111) +56 + 56 = 48 (110000) +56 + 57 = 49 (110001) +56 + 58 = 50 (110010) +56 + 59 = 51 (110011) +56 + 60 = 52 (110100) +56 + 61 = 53 (110101) +56 + 62 = 54 (110110) +56 + 63 = 55 (110111) +57 + 0 = 57 (111001) +57 + 1 = 58 (111010) +57 + 2 = 59 (111011) +57 + 3 = 60 (111100) +57 + 4 = 61 (111101) +57 + 5 = 62 (111110) +57 + 6 = 63 (111111) +57 + 7 = 0 (000000) +57 + 8 = 1 (000001) +57 + 9 = 2 (000010) +57 + 10 = 3 (000011) +57 + 11 = 4 (000100) +57 + 12 = 5 (000101) +57 + 13 = 6 (000110) +57 + 14 = 7 (000111) +57 + 15 = 8 (001000) +57 + 16 = 9 (001001) +57 + 17 = 10 (001010) +57 + 18 = 11 (001011) +57 + 19 = 12 (001100) +57 + 20 = 13 (001101) +57 + 21 = 14 (001110) +57 + 22 = 15 (001111) +57 + 23 = 16 (010000) +57 + 24 = 17 (010001) +57 + 25 = 18 (010010) +57 + 26 = 19 (010011) +57 + 27 = 20 (010100) +57 + 28 = 21 (010101) +57 + 29 = 22 (010110) +57 + 30 = 23 (010111) +57 + 31 = 24 (011000) +57 + 32 = 25 (011001) +57 + 33 = 26 (011010) +57 + 34 = 27 (011011) +57 + 35 = 28 (011100) +57 + 36 = 29 (011101) +57 + 37 = 30 (011110) +57 + 38 = 31 (011111) +57 + 39 = 32 (100000) +57 + 40 = 33 (100001) +57 + 41 = 34 (100010) +57 + 42 = 35 (100011) +57 + 43 = 36 (100100) +57 + 44 = 37 (100101) +57 + 45 = 38 (100110) +57 + 46 = 39 (100111) +57 + 47 = 40 (101000) +57 + 48 = 41 (101001) +57 + 49 = 42 (101010) +57 + 50 = 43 (101011) +57 + 51 = 44 (101100) +57 + 52 = 45 (101101) +57 + 53 = 46 (101110) +57 + 54 = 47 (101111) +57 + 55 = 48 (110000) +57 + 56 = 49 (110001) +57 + 57 = 50 (110010) +57 + 58 = 51 (110011) +57 + 59 = 52 (110100) +57 + 60 = 53 (110101) +57 + 61 = 54 (110110) +57 + 62 = 55 (110111) +57 + 63 = 56 (111000) +58 + 0 = 58 (111010) +58 + 1 = 59 (111011) +58 + 2 = 60 (111100) +58 + 3 = 61 (111101) +58 + 4 = 62 (111110) +58 + 5 = 63 (111111) +58 + 6 = 0 (000000) +58 + 7 = 1 (000001) +58 + 8 = 2 (000010) +58 + 9 = 3 (000011) +58 + 10 = 4 (000100) +58 + 11 = 5 (000101) +58 + 12 = 6 (000110) +58 + 13 = 7 (000111) +58 + 14 = 8 (001000) +58 + 15 = 9 (001001) +58 + 16 = 10 (001010) +58 + 17 = 11 (001011) +58 + 18 = 12 (001100) +58 + 19 = 13 (001101) +58 + 20 = 14 (001110) +58 + 21 = 15 (001111) +58 + 22 = 16 (010000) +58 + 23 = 17 (010001) +58 + 24 = 18 (010010) +58 + 25 = 19 (010011) +58 + 26 = 20 (010100) +58 + 27 = 21 (010101) +58 + 28 = 22 (010110) +58 + 29 = 23 (010111) +58 + 30 = 24 (011000) +58 + 31 = 25 (011001) +58 + 32 = 26 (011010) +58 + 33 = 27 (011011) +58 + 34 = 28 (011100) +58 + 35 = 29 (011101) +58 + 36 = 30 (011110) +58 + 37 = 31 (011111) +58 + 38 = 32 (100000) +58 + 39 = 33 (100001) +58 + 40 = 34 (100010) +58 + 41 = 35 (100011) +58 + 42 = 36 (100100) +58 + 43 = 37 (100101) +58 + 44 = 38 (100110) +58 + 45 = 39 (100111) +58 + 46 = 40 (101000) +58 + 47 = 41 (101001) +58 + 48 = 42 (101010) +58 + 49 = 43 (101011) +58 + 50 = 44 (101100) +58 + 51 = 45 (101101) +58 + 52 = 46 (101110) +58 + 53 = 47 (101111) +58 + 54 = 48 (110000) +58 + 55 = 49 (110001) +58 + 56 = 50 (110010) +58 + 57 = 51 (110011) +58 + 58 = 52 (110100) +58 + 59 = 53 (110101) +58 + 60 = 54 (110110) +58 + 61 = 55 (110111) +58 + 62 = 56 (111000) +58 + 63 = 57 (111001) +59 + 0 = 59 (111011) +59 + 1 = 60 (111100) +59 + 2 = 61 (111101) +59 + 3 = 62 (111110) +59 + 4 = 63 (111111) +59 + 5 = 0 (000000) +59 + 6 = 1 (000001) +59 + 7 = 2 (000010) +59 + 8 = 3 (000011) +59 + 9 = 4 (000100) +59 + 10 = 5 (000101) +59 + 11 = 6 (000110) +59 + 12 = 7 (000111) +59 + 13 = 8 (001000) +59 + 14 = 9 (001001) +59 + 15 = 10 (001010) +59 + 16 = 11 (001011) +59 + 17 = 12 (001100) +59 + 18 = 13 (001101) +59 + 19 = 14 (001110) +59 + 20 = 15 (001111) +59 + 21 = 16 (010000) +59 + 22 = 17 (010001) +59 + 23 = 18 (010010) +59 + 24 = 19 (010011) +59 + 25 = 20 (010100) +59 + 26 = 21 (010101) +59 + 27 = 22 (010110) +59 + 28 = 23 (010111) +59 + 29 = 24 (011000) +59 + 30 = 25 (011001) +59 + 31 = 26 (011010) +59 + 32 = 27 (011011) +59 + 33 = 28 (011100) +59 + 34 = 29 (011101) +59 + 35 = 30 (011110) +59 + 36 = 31 (011111) +59 + 37 = 32 (100000) +59 + 38 = 33 (100001) +59 + 39 = 34 (100010) +59 + 40 = 35 (100011) +59 + 41 = 36 (100100) +59 + 42 = 37 (100101) +59 + 43 = 38 (100110) +59 + 44 = 39 (100111) +59 + 45 = 40 (101000) +59 + 46 = 41 (101001) +59 + 47 = 42 (101010) +59 + 48 = 43 (101011) +59 + 49 = 44 (101100) +59 + 50 = 45 (101101) +59 + 51 = 46 (101110) +59 + 52 = 47 (101111) +59 + 53 = 48 (110000) +59 + 54 = 49 (110001) +59 + 55 = 50 (110010) +59 + 56 = 51 (110011) +59 + 57 = 52 (110100) +59 + 58 = 53 (110101) +59 + 59 = 54 (110110) +59 + 60 = 55 (110111) +59 + 61 = 56 (111000) +59 + 62 = 57 (111001) +59 + 63 = 58 (111010) +60 + 0 = 60 (111100) +60 + 1 = 61 (111101) +60 + 2 = 62 (111110) +60 + 3 = 63 (111111) +60 + 4 = 0 (000000) +60 + 5 = 1 (000001) +60 + 6 = 2 (000010) +60 + 7 = 3 (000011) +60 + 8 = 4 (000100) +60 + 9 = 5 (000101) +60 + 10 = 6 (000110) +60 + 11 = 7 (000111) +60 + 12 = 8 (001000) +60 + 13 = 9 (001001) +60 + 14 = 10 (001010) +60 + 15 = 11 (001011) +60 + 16 = 12 (001100) +60 + 17 = 13 (001101) +60 + 18 = 14 (001110) +60 + 19 = 15 (001111) +60 + 20 = 16 (010000) +60 + 21 = 17 (010001) +60 + 22 = 18 (010010) +60 + 23 = 19 (010011) +60 + 24 = 20 (010100) +60 + 25 = 21 (010101) +60 + 26 = 22 (010110) +60 + 27 = 23 (010111) +60 + 28 = 24 (011000) +60 + 29 = 25 (011001) +60 + 30 = 26 (011010) +60 + 31 = 27 (011011) +60 + 32 = 28 (011100) +60 + 33 = 29 (011101) +60 + 34 = 30 (011110) +60 + 35 = 31 (011111) +60 + 36 = 32 (100000) +60 + 37 = 33 (100001) +60 + 38 = 34 (100010) +60 + 39 = 35 (100011) +60 + 40 = 36 (100100) +60 + 41 = 37 (100101) +60 + 42 = 38 (100110) +60 + 43 = 39 (100111) +60 + 44 = 40 (101000) +60 + 45 = 41 (101001) +60 + 46 = 42 (101010) +60 + 47 = 43 (101011) +60 + 48 = 44 (101100) +60 + 49 = 45 (101101) +60 + 50 = 46 (101110) +60 + 51 = 47 (101111) +60 + 52 = 48 (110000) +60 + 53 = 49 (110001) +60 + 54 = 50 (110010) +60 + 55 = 51 (110011) +60 + 56 = 52 (110100) +60 + 57 = 53 (110101) +60 + 58 = 54 (110110) +60 + 59 = 55 (110111) +60 + 60 = 56 (111000) +60 + 61 = 57 (111001) +60 + 62 = 58 (111010) +60 + 63 = 59 (111011) +61 + 0 = 61 (111101) +61 + 1 = 62 (111110) +61 + 2 = 63 (111111) +61 + 3 = 0 (000000) +61 + 4 = 1 (000001) +61 + 5 = 2 (000010) +61 + 6 = 3 (000011) +61 + 7 = 4 (000100) +61 + 8 = 5 (000101) +61 + 9 = 6 (000110) +61 + 10 = 7 (000111) +61 + 11 = 8 (001000) +61 + 12 = 9 (001001) +61 + 13 = 10 (001010) +61 + 14 = 11 (001011) +61 + 15 = 12 (001100) +61 + 16 = 13 (001101) +61 + 17 = 14 (001110) +61 + 18 = 15 (001111) +61 + 19 = 16 (010000) +61 + 20 = 17 (010001) +61 + 21 = 18 (010010) +61 + 22 = 19 (010011) +61 + 23 = 20 (010100) +61 + 24 = 21 (010101) +61 + 25 = 22 (010110) +61 + 26 = 23 (010111) +61 + 27 = 24 (011000) +61 + 28 = 25 (011001) +61 + 29 = 26 (011010) +61 + 30 = 27 (011011) +61 + 31 = 28 (011100) +61 + 32 = 29 (011101) +61 + 33 = 30 (011110) +61 + 34 = 31 (011111) +61 + 35 = 32 (100000) +61 + 36 = 33 (100001) +61 + 37 = 34 (100010) +61 + 38 = 35 (100011) +61 + 39 = 36 (100100) +61 + 40 = 37 (100101) +61 + 41 = 38 (100110) +61 + 42 = 39 (100111) +61 + 43 = 40 (101000) +61 + 44 = 41 (101001) +61 + 45 = 42 (101010) +61 + 46 = 43 (101011) +61 + 47 = 44 (101100) +61 + 48 = 45 (101101) +61 + 49 = 46 (101110) +61 + 50 = 47 (101111) +61 + 51 = 48 (110000) +61 + 52 = 49 (110001) +61 + 53 = 50 (110010) +61 + 54 = 51 (110011) +61 + 55 = 52 (110100) +61 + 56 = 53 (110101) +61 + 57 = 54 (110110) +61 + 58 = 55 (110111) +61 + 59 = 56 (111000) +61 + 60 = 57 (111001) +61 + 61 = 58 (111010) +61 + 62 = 59 (111011) +61 + 63 = 60 (111100) +62 + 0 = 62 (111110) +62 + 1 = 63 (111111) +62 + 2 = 0 (000000) +62 + 3 = 1 (000001) +62 + 4 = 2 (000010) +62 + 5 = 3 (000011) +62 + 6 = 4 (000100) +62 + 7 = 5 (000101) +62 + 8 = 6 (000110) +62 + 9 = 7 (000111) +62 + 10 = 8 (001000) +62 + 11 = 9 (001001) +62 + 12 = 10 (001010) +62 + 13 = 11 (001011) +62 + 14 = 12 (001100) +62 + 15 = 13 (001101) +62 + 16 = 14 (001110) +62 + 17 = 15 (001111) +62 + 18 = 16 (010000) +62 + 19 = 17 (010001) +62 + 20 = 18 (010010) +62 + 21 = 19 (010011) +62 + 22 = 20 (010100) +62 + 23 = 21 (010101) +62 + 24 = 22 (010110) +62 + 25 = 23 (010111) +62 + 26 = 24 (011000) +62 + 27 = 25 (011001) +62 + 28 = 26 (011010) +62 + 29 = 27 (011011) +62 + 30 = 28 (011100) +62 + 31 = 29 (011101) +62 + 32 = 30 (011110) +62 + 33 = 31 (011111) +62 + 34 = 32 (100000) +62 + 35 = 33 (100001) +62 + 36 = 34 (100010) +62 + 37 = 35 (100011) +62 + 38 = 36 (100100) +62 + 39 = 37 (100101) +62 + 40 = 38 (100110) +62 + 41 = 39 (100111) +62 + 42 = 40 (101000) +62 + 43 = 41 (101001) +62 + 44 = 42 (101010) +62 + 45 = 43 (101011) +62 + 46 = 44 (101100) +62 + 47 = 45 (101101) +62 + 48 = 46 (101110) +62 + 49 = 47 (101111) +62 + 50 = 48 (110000) +62 + 51 = 49 (110001) +62 + 52 = 50 (110010) +62 + 53 = 51 (110011) +62 + 54 = 52 (110100) +62 + 55 = 53 (110101) +62 + 56 = 54 (110110) +62 + 57 = 55 (110111) +62 + 58 = 56 (111000) +62 + 59 = 57 (111001) +62 + 60 = 58 (111010) +62 + 61 = 59 (111011) +62 + 62 = 60 (111100) +62 + 63 = 61 (111101) +63 + 0 = 63 (111111) +63 + 1 = 0 (000000) +63 + 2 = 1 (000001) +63 + 3 = 2 (000010) +63 + 4 = 3 (000011) +63 + 5 = 4 (000100) +63 + 6 = 5 (000101) +63 + 7 = 6 (000110) +63 + 8 = 7 (000111) +63 + 9 = 8 (001000) +63 + 10 = 9 (001001) +63 + 11 = 10 (001010) +63 + 12 = 11 (001011) +63 + 13 = 12 (001100) +63 + 14 = 13 (001101) +63 + 15 = 14 (001110) +63 + 16 = 15 (001111) +63 + 17 = 16 (010000) +63 + 18 = 17 (010001) +63 + 19 = 18 (010010) +63 + 20 = 19 (010011) +63 + 21 = 20 (010100) +63 + 22 = 21 (010101) +63 + 23 = 22 (010110) +63 + 24 = 23 (010111) +63 + 25 = 24 (011000) +63 + 26 = 25 (011001) +63 + 27 = 26 (011010) +63 + 28 = 27 (011011) +63 + 29 = 28 (011100) +63 + 30 = 29 (011101) +63 + 31 = 30 (011110) +63 + 32 = 31 (011111) +63 + 33 = 32 (100000) +63 + 34 = 33 (100001) +63 + 35 = 34 (100010) +63 + 36 = 35 (100011) +63 + 37 = 36 (100100) +63 + 38 = 37 (100101) +63 + 39 = 38 (100110) +63 + 40 = 39 (100111) +63 + 41 = 40 (101000) +63 + 42 = 41 (101001) +63 + 43 = 42 (101010) +63 + 44 = 43 (101011) +63 + 45 = 44 (101100) +63 + 46 = 45 (101101) +63 + 47 = 46 (101110) +63 + 48 = 47 (101111) +63 + 49 = 48 (110000) +63 + 50 = 49 (110001) +63 + 51 = 50 (110010) +63 + 52 = 51 (110011) +63 + 53 = 52 (110100) +63 + 54 = 53 (110101) +63 + 55 = 54 (110110) +63 + 56 = 55 (110111) +63 + 57 = 56 (111000) +63 + 58 = 57 (111001) +63 + 59 = 58 (111010) +63 + 60 = 59 (111011) +63 + 61 = 60 (111100) +63 + 62 = 61 (111101) +63 + 63 = 62 (111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/lost_carry.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/lost_carry.f new file mode 100644 index 000000000..e5ebe3a3b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/lost_carry.f @@ -0,0 +1,3 @@ +lost_carry/datawidth.cpp +lost_carry/stimgen.cpp +lost_carry/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/main.cpp new file mode 100644 index 000000000..fdf70dabe --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 6-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 6; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector in1 ("in1"); + signal_bool_vector in2 ("in2"); + signal_bool_vector result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/stimgen.h new file mode 100644 index 000000000..0a0e9900d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/lost_carry/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& result; + // Outputs + signal_bool_vector& in1; + signal_bool_vector& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& RESULT, + signal_bool_vector& IN1, + signal_bool_vector& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/common.h new file mode 100644 index 000000000..55e8fa28e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/common.h @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; +typedef sc_bv<7> bool_vector7; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; +typedef sc_signal signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/datawidth.cpp new file mode 100644 index 000000000..3934b22b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector4 tmp_a; + bool_vector6 tmp_b; + bool_vector7 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_uint() + tmp_b.to_uint(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/datawidth.h new file mode 100644 index 000000000..618250503 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector7& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector7& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/golden/promote.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/golden/promote.log new file mode 100644 index 000000000..7cecb43ba --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/golden/promote.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/main.cpp new file mode 100644 index 000000000..788364aa5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 7-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 7; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/promote.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/promote.f new file mode 100644 index 000000000..4f270dbe0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/promote.f @@ -0,0 +1,3 @@ +promote/datawidth.cpp +promote/stimgen.cpp +promote/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/stimgen.h new file mode 100644 index 000000000..723f5103f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector7& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector7& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/common.h new file mode 100644 index 000000000..f5bf2658c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/common.h @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; +typedef sc_bv<9> bool_vector9; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; +typedef sc_signal signal_bool_vector9; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/datawidth.cpp new file mode 100644 index 000000000..9edf35e89 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector4 tmp_a; + bool_vector6 tmp_b; + bool_vector9 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_uint() + tmp_b.to_uint(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/datawidth.h new file mode 100644 index 000000000..284757aeb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector9& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector9& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/golden/promote_extension.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/golden/promote_extension.log new file mode 100644 index 000000000..8228a1697 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/golden/promote_extension.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/main.cpp new file mode 100644 index 000000000..dda8095a1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 9-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 9; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector9 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/promote_extension.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/promote_extension.f new file mode 100644 index 000000000..3c46f3738 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/promote_extension.f @@ -0,0 +1,3 @@ +promote_extension/datawidth.cpp +promote_extension/stimgen.cpp +promote_extension/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/stimgen.h new file mode 100644 index 000000000..1c35e4175 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_extension/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector9& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector9& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/common.h new file mode 100644 index 000000000..d7f26e029 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/datawidth.cpp new file mode 100644 index 000000000..ff8845731 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector4 tmp_a; + bool_vector6 tmp_b; + bool_vector6 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_uint() + tmp_b.to_uint(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/datawidth.h new file mode 100644 index 000000000..6adbfd87b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector6& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector6& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/golden/promote_lost_carry.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/golden/promote_lost_carry.log new file mode 100644 index 000000000..eb9189493 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/golden/promote_lost_carry.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/main.cpp new file mode 100644 index 000000000..5990e96a7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 6-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 6; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector6 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/promote_lost_carry.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/promote_lost_carry.f new file mode 100644 index 000000000..052991cee --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/promote_lost_carry.f @@ -0,0 +1,3 @@ +promote_lost_carry/datawidth.cpp +promote_lost_carry/stimgen.cpp +promote_lost_carry/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/stimgen.h new file mode 100644 index 000000000..e2675e0b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/common.h new file mode 100644 index 000000000..d7f26e029 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/datawidth.cpp new file mode 100644 index 000000000..929fd042a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector6 tmp_a; + bool_vector6 tmp_b; + bool_vector4 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_uint() + tmp_b.to_uint(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/datawidth.h new file mode 100644 index 000000000..12f04c9be --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector4& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector4& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/golden/promote_truncation.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/golden/promote_truncation.log new file mode 100644 index 000000000..5088bd680 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/golden/promote_truncation.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000) +0 + 1 = 1 (0001) +0 + 2 = 2 (0010) +0 + 3 = 3 (0011) +0 + 4 = 4 (0100) +0 + 5 = 5 (0101) +0 + 6 = 6 (0110) +0 + 7 = 7 (0111) +0 + 8 = 8 (1000) +0 + 9 = 9 (1001) +0 + 10 = 10 (1010) +0 + 11 = 11 (1011) +0 + 12 = 12 (1100) +0 + 13 = 13 (1101) +0 + 14 = 14 (1110) +0 + 15 = 15 (1111) +0 + 16 = 0 (0000) +0 + 17 = 1 (0001) +0 + 18 = 2 (0010) +0 + 19 = 3 (0011) +0 + 20 = 4 (0100) +0 + 21 = 5 (0101) +0 + 22 = 6 (0110) +0 + 23 = 7 (0111) +0 + 24 = 8 (1000) +0 + 25 = 9 (1001) +0 + 26 = 10 (1010) +0 + 27 = 11 (1011) +0 + 28 = 12 (1100) +0 + 29 = 13 (1101) +0 + 30 = 14 (1110) +0 + 31 = 15 (1111) +0 + 32 = 0 (0000) +0 + 33 = 1 (0001) +0 + 34 = 2 (0010) +0 + 35 = 3 (0011) +0 + 36 = 4 (0100) +0 + 37 = 5 (0101) +0 + 38 = 6 (0110) +0 + 39 = 7 (0111) +0 + 40 = 8 (1000) +0 + 41 = 9 (1001) +0 + 42 = 10 (1010) +0 + 43 = 11 (1011) +0 + 44 = 12 (1100) +0 + 45 = 13 (1101) +0 + 46 = 14 (1110) +0 + 47 = 15 (1111) +0 + 48 = 0 (0000) +0 + 49 = 1 (0001) +0 + 50 = 2 (0010) +0 + 51 = 3 (0011) +0 + 52 = 4 (0100) +0 + 53 = 5 (0101) +0 + 54 = 6 (0110) +0 + 55 = 7 (0111) +0 + 56 = 8 (1000) +0 + 57 = 9 (1001) +0 + 58 = 10 (1010) +0 + 59 = 11 (1011) +0 + 60 = 12 (1100) +0 + 61 = 13 (1101) +0 + 62 = 14 (1110) +0 + 63 = 15 (1111) +1 + 0 = 1 (0001) +1 + 1 = 2 (0010) +1 + 2 = 3 (0011) +1 + 3 = 4 (0100) +1 + 4 = 5 (0101) +1 + 5 = 6 (0110) +1 + 6 = 7 (0111) +1 + 7 = 8 (1000) +1 + 8 = 9 (1001) +1 + 9 = 10 (1010) +1 + 10 = 11 (1011) +1 + 11 = 12 (1100) +1 + 12 = 13 (1101) +1 + 13 = 14 (1110) +1 + 14 = 15 (1111) +1 + 15 = 0 (0000) +1 + 16 = 1 (0001) +1 + 17 = 2 (0010) +1 + 18 = 3 (0011) +1 + 19 = 4 (0100) +1 + 20 = 5 (0101) +1 + 21 = 6 (0110) +1 + 22 = 7 (0111) +1 + 23 = 8 (1000) +1 + 24 = 9 (1001) +1 + 25 = 10 (1010) +1 + 26 = 11 (1011) +1 + 27 = 12 (1100) +1 + 28 = 13 (1101) +1 + 29 = 14 (1110) +1 + 30 = 15 (1111) +1 + 31 = 0 (0000) +1 + 32 = 1 (0001) +1 + 33 = 2 (0010) +1 + 34 = 3 (0011) +1 + 35 = 4 (0100) +1 + 36 = 5 (0101) +1 + 37 = 6 (0110) +1 + 38 = 7 (0111) +1 + 39 = 8 (1000) +1 + 40 = 9 (1001) +1 + 41 = 10 (1010) +1 + 42 = 11 (1011) +1 + 43 = 12 (1100) +1 + 44 = 13 (1101) +1 + 45 = 14 (1110) +1 + 46 = 15 (1111) +1 + 47 = 0 (0000) +1 + 48 = 1 (0001) +1 + 49 = 2 (0010) +1 + 50 = 3 (0011) +1 + 51 = 4 (0100) +1 + 52 = 5 (0101) +1 + 53 = 6 (0110) +1 + 54 = 7 (0111) +1 + 55 = 8 (1000) +1 + 56 = 9 (1001) +1 + 57 = 10 (1010) +1 + 58 = 11 (1011) +1 + 59 = 12 (1100) +1 + 60 = 13 (1101) +1 + 61 = 14 (1110) +1 + 62 = 15 (1111) +1 + 63 = 0 (0000) +2 + 0 = 2 (0010) +2 + 1 = 3 (0011) +2 + 2 = 4 (0100) +2 + 3 = 5 (0101) +2 + 4 = 6 (0110) +2 + 5 = 7 (0111) +2 + 6 = 8 (1000) +2 + 7 = 9 (1001) +2 + 8 = 10 (1010) +2 + 9 = 11 (1011) +2 + 10 = 12 (1100) +2 + 11 = 13 (1101) +2 + 12 = 14 (1110) +2 + 13 = 15 (1111) +2 + 14 = 0 (0000) +2 + 15 = 1 (0001) +2 + 16 = 2 (0010) +2 + 17 = 3 (0011) +2 + 18 = 4 (0100) +2 + 19 = 5 (0101) +2 + 20 = 6 (0110) +2 + 21 = 7 (0111) +2 + 22 = 8 (1000) +2 + 23 = 9 (1001) +2 + 24 = 10 (1010) +2 + 25 = 11 (1011) +2 + 26 = 12 (1100) +2 + 27 = 13 (1101) +2 + 28 = 14 (1110) +2 + 29 = 15 (1111) +2 + 30 = 0 (0000) +2 + 31 = 1 (0001) +2 + 32 = 2 (0010) +2 + 33 = 3 (0011) +2 + 34 = 4 (0100) +2 + 35 = 5 (0101) +2 + 36 = 6 (0110) +2 + 37 = 7 (0111) +2 + 38 = 8 (1000) +2 + 39 = 9 (1001) +2 + 40 = 10 (1010) +2 + 41 = 11 (1011) +2 + 42 = 12 (1100) +2 + 43 = 13 (1101) +2 + 44 = 14 (1110) +2 + 45 = 15 (1111) +2 + 46 = 0 (0000) +2 + 47 = 1 (0001) +2 + 48 = 2 (0010) +2 + 49 = 3 (0011) +2 + 50 = 4 (0100) +2 + 51 = 5 (0101) +2 + 52 = 6 (0110) +2 + 53 = 7 (0111) +2 + 54 = 8 (1000) +2 + 55 = 9 (1001) +2 + 56 = 10 (1010) +2 + 57 = 11 (1011) +2 + 58 = 12 (1100) +2 + 59 = 13 (1101) +2 + 60 = 14 (1110) +2 + 61 = 15 (1111) +2 + 62 = 0 (0000) +2 + 63 = 1 (0001) +3 + 0 = 3 (0011) +3 + 1 = 4 (0100) +3 + 2 = 5 (0101) +3 + 3 = 6 (0110) +3 + 4 = 7 (0111) +3 + 5 = 8 (1000) +3 + 6 = 9 (1001) +3 + 7 = 10 (1010) +3 + 8 = 11 (1011) +3 + 9 = 12 (1100) +3 + 10 = 13 (1101) +3 + 11 = 14 (1110) +3 + 12 = 15 (1111) +3 + 13 = 0 (0000) +3 + 14 = 1 (0001) +3 + 15 = 2 (0010) +3 + 16 = 3 (0011) +3 + 17 = 4 (0100) +3 + 18 = 5 (0101) +3 + 19 = 6 (0110) +3 + 20 = 7 (0111) +3 + 21 = 8 (1000) +3 + 22 = 9 (1001) +3 + 23 = 10 (1010) +3 + 24 = 11 (1011) +3 + 25 = 12 (1100) +3 + 26 = 13 (1101) +3 + 27 = 14 (1110) +3 + 28 = 15 (1111) +3 + 29 = 0 (0000) +3 + 30 = 1 (0001) +3 + 31 = 2 (0010) +3 + 32 = 3 (0011) +3 + 33 = 4 (0100) +3 + 34 = 5 (0101) +3 + 35 = 6 (0110) +3 + 36 = 7 (0111) +3 + 37 = 8 (1000) +3 + 38 = 9 (1001) +3 + 39 = 10 (1010) +3 + 40 = 11 (1011) +3 + 41 = 12 (1100) +3 + 42 = 13 (1101) +3 + 43 = 14 (1110) +3 + 44 = 15 (1111) +3 + 45 = 0 (0000) +3 + 46 = 1 (0001) +3 + 47 = 2 (0010) +3 + 48 = 3 (0011) +3 + 49 = 4 (0100) +3 + 50 = 5 (0101) +3 + 51 = 6 (0110) +3 + 52 = 7 (0111) +3 + 53 = 8 (1000) +3 + 54 = 9 (1001) +3 + 55 = 10 (1010) +3 + 56 = 11 (1011) +3 + 57 = 12 (1100) +3 + 58 = 13 (1101) +3 + 59 = 14 (1110) +3 + 60 = 15 (1111) +3 + 61 = 0 (0000) +3 + 62 = 1 (0001) +3 + 63 = 2 (0010) +4 + 0 = 4 (0100) +4 + 1 = 5 (0101) +4 + 2 = 6 (0110) +4 + 3 = 7 (0111) +4 + 4 = 8 (1000) +4 + 5 = 9 (1001) +4 + 6 = 10 (1010) +4 + 7 = 11 (1011) +4 + 8 = 12 (1100) +4 + 9 = 13 (1101) +4 + 10 = 14 (1110) +4 + 11 = 15 (1111) +4 + 12 = 0 (0000) +4 + 13 = 1 (0001) +4 + 14 = 2 (0010) +4 + 15 = 3 (0011) +4 + 16 = 4 (0100) +4 + 17 = 5 (0101) +4 + 18 = 6 (0110) +4 + 19 = 7 (0111) +4 + 20 = 8 (1000) +4 + 21 = 9 (1001) +4 + 22 = 10 (1010) +4 + 23 = 11 (1011) +4 + 24 = 12 (1100) +4 + 25 = 13 (1101) +4 + 26 = 14 (1110) +4 + 27 = 15 (1111) +4 + 28 = 0 (0000) +4 + 29 = 1 (0001) +4 + 30 = 2 (0010) +4 + 31 = 3 (0011) +4 + 32 = 4 (0100) +4 + 33 = 5 (0101) +4 + 34 = 6 (0110) +4 + 35 = 7 (0111) +4 + 36 = 8 (1000) +4 + 37 = 9 (1001) +4 + 38 = 10 (1010) +4 + 39 = 11 (1011) +4 + 40 = 12 (1100) +4 + 41 = 13 (1101) +4 + 42 = 14 (1110) +4 + 43 = 15 (1111) +4 + 44 = 0 (0000) +4 + 45 = 1 (0001) +4 + 46 = 2 (0010) +4 + 47 = 3 (0011) +4 + 48 = 4 (0100) +4 + 49 = 5 (0101) +4 + 50 = 6 (0110) +4 + 51 = 7 (0111) +4 + 52 = 8 (1000) +4 + 53 = 9 (1001) +4 + 54 = 10 (1010) +4 + 55 = 11 (1011) +4 + 56 = 12 (1100) +4 + 57 = 13 (1101) +4 + 58 = 14 (1110) +4 + 59 = 15 (1111) +4 + 60 = 0 (0000) +4 + 61 = 1 (0001) +4 + 62 = 2 (0010) +4 + 63 = 3 (0011) +5 + 0 = 5 (0101) +5 + 1 = 6 (0110) +5 + 2 = 7 (0111) +5 + 3 = 8 (1000) +5 + 4 = 9 (1001) +5 + 5 = 10 (1010) +5 + 6 = 11 (1011) +5 + 7 = 12 (1100) +5 + 8 = 13 (1101) +5 + 9 = 14 (1110) +5 + 10 = 15 (1111) +5 + 11 = 0 (0000) +5 + 12 = 1 (0001) +5 + 13 = 2 (0010) +5 + 14 = 3 (0011) +5 + 15 = 4 (0100) +5 + 16 = 5 (0101) +5 + 17 = 6 (0110) +5 + 18 = 7 (0111) +5 + 19 = 8 (1000) +5 + 20 = 9 (1001) +5 + 21 = 10 (1010) +5 + 22 = 11 (1011) +5 + 23 = 12 (1100) +5 + 24 = 13 (1101) +5 + 25 = 14 (1110) +5 + 26 = 15 (1111) +5 + 27 = 0 (0000) +5 + 28 = 1 (0001) +5 + 29 = 2 (0010) +5 + 30 = 3 (0011) +5 + 31 = 4 (0100) +5 + 32 = 5 (0101) +5 + 33 = 6 (0110) +5 + 34 = 7 (0111) +5 + 35 = 8 (1000) +5 + 36 = 9 (1001) +5 + 37 = 10 (1010) +5 + 38 = 11 (1011) +5 + 39 = 12 (1100) +5 + 40 = 13 (1101) +5 + 41 = 14 (1110) +5 + 42 = 15 (1111) +5 + 43 = 0 (0000) +5 + 44 = 1 (0001) +5 + 45 = 2 (0010) +5 + 46 = 3 (0011) +5 + 47 = 4 (0100) +5 + 48 = 5 (0101) +5 + 49 = 6 (0110) +5 + 50 = 7 (0111) +5 + 51 = 8 (1000) +5 + 52 = 9 (1001) +5 + 53 = 10 (1010) +5 + 54 = 11 (1011) +5 + 55 = 12 (1100) +5 + 56 = 13 (1101) +5 + 57 = 14 (1110) +5 + 58 = 15 (1111) +5 + 59 = 0 (0000) +5 + 60 = 1 (0001) +5 + 61 = 2 (0010) +5 + 62 = 3 (0011) +5 + 63 = 4 (0100) +6 + 0 = 6 (0110) +6 + 1 = 7 (0111) +6 + 2 = 8 (1000) +6 + 3 = 9 (1001) +6 + 4 = 10 (1010) +6 + 5 = 11 (1011) +6 + 6 = 12 (1100) +6 + 7 = 13 (1101) +6 + 8 = 14 (1110) +6 + 9 = 15 (1111) +6 + 10 = 0 (0000) +6 + 11 = 1 (0001) +6 + 12 = 2 (0010) +6 + 13 = 3 (0011) +6 + 14 = 4 (0100) +6 + 15 = 5 (0101) +6 + 16 = 6 (0110) +6 + 17 = 7 (0111) +6 + 18 = 8 (1000) +6 + 19 = 9 (1001) +6 + 20 = 10 (1010) +6 + 21 = 11 (1011) +6 + 22 = 12 (1100) +6 + 23 = 13 (1101) +6 + 24 = 14 (1110) +6 + 25 = 15 (1111) +6 + 26 = 0 (0000) +6 + 27 = 1 (0001) +6 + 28 = 2 (0010) +6 + 29 = 3 (0011) +6 + 30 = 4 (0100) +6 + 31 = 5 (0101) +6 + 32 = 6 (0110) +6 + 33 = 7 (0111) +6 + 34 = 8 (1000) +6 + 35 = 9 (1001) +6 + 36 = 10 (1010) +6 + 37 = 11 (1011) +6 + 38 = 12 (1100) +6 + 39 = 13 (1101) +6 + 40 = 14 (1110) +6 + 41 = 15 (1111) +6 + 42 = 0 (0000) +6 + 43 = 1 (0001) +6 + 44 = 2 (0010) +6 + 45 = 3 (0011) +6 + 46 = 4 (0100) +6 + 47 = 5 (0101) +6 + 48 = 6 (0110) +6 + 49 = 7 (0111) +6 + 50 = 8 (1000) +6 + 51 = 9 (1001) +6 + 52 = 10 (1010) +6 + 53 = 11 (1011) +6 + 54 = 12 (1100) +6 + 55 = 13 (1101) +6 + 56 = 14 (1110) +6 + 57 = 15 (1111) +6 + 58 = 0 (0000) +6 + 59 = 1 (0001) +6 + 60 = 2 (0010) +6 + 61 = 3 (0011) +6 + 62 = 4 (0100) +6 + 63 = 5 (0101) +7 + 0 = 7 (0111) +7 + 1 = 8 (1000) +7 + 2 = 9 (1001) +7 + 3 = 10 (1010) +7 + 4 = 11 (1011) +7 + 5 = 12 (1100) +7 + 6 = 13 (1101) +7 + 7 = 14 (1110) +7 + 8 = 15 (1111) +7 + 9 = 0 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(1010) +5 + 22 = 11 (1011) +5 + 23 = 12 (1100) +5 + 24 = 13 (1101) +5 + 25 = 14 (1110) +5 + 26 = 15 (1111) +5 + 27 = 0 (0000) +5 + 28 = 1 (0001) +5 + 29 = 2 (0010) +5 + 30 = 3 (0011) +5 + 31 = 4 (0100) +5 + 32 = 5 (0101) +5 + 33 = 6 (0110) +5 + 34 = 7 (0111) +5 + 35 = 8 (1000) +5 + 36 = 9 (1001) +5 + 37 = 10 (1010) +5 + 38 = 11 (1011) +5 + 39 = 12 (1100) +5 + 40 = 13 (1101) +5 + 41 = 14 (1110) +5 + 42 = 15 (1111) +5 + 43 = 0 (0000) +5 + 44 = 1 (0001) +5 + 45 = 2 (0010) +5 + 46 = 3 (0011) +5 + 47 = 4 (0100) +5 + 48 = 5 (0101) +5 + 49 = 6 (0110) +5 + 50 = 7 (0111) +5 + 51 = 8 (1000) +5 + 52 = 9 (1001) +5 + 53 = 10 (1010) +5 + 54 = 11 (1011) +5 + 55 = 12 (1100) +5 + 56 = 13 (1101) +5 + 57 = 14 (1110) +5 + 58 = 15 (1111) +5 + 59 = 0 (0000) +5 + 60 = 1 (0001) +5 + 61 = 2 (0010) +5 + 62 = 3 (0011) +5 + 63 = 4 (0100) +6 + 0 = 6 (0110) +6 + 1 = 7 (0111) +6 + 2 = 8 (1000) +6 + 3 = 9 (1001) +6 + 4 = 10 (1010) +6 + 5 = 11 (1011) +6 + 6 = 12 (1100) +6 + 7 = 13 (1101) +6 + 8 = 14 (1110) +6 + 9 = 15 (1111) +6 + 10 = 0 (0000) +6 + 11 = 1 (0001) +6 + 12 = 2 (0010) +6 + 13 = 3 (0011) +6 + 14 = 4 (0100) +6 + 15 = 5 (0101) +6 + 16 = 6 (0110) +6 + 17 = 7 (0111) +6 + 18 = 8 (1000) +6 + 19 = 9 (1001) +6 + 20 = 10 (1010) +6 + 21 = 11 (1011) +6 + 22 = 12 (1100) +6 + 23 = 13 (1101) +6 + 24 = 14 (1110) +6 + 25 = 15 (1111) +6 + 26 = 0 (0000) +6 + 27 = 1 (0001) +6 + 28 = 2 (0010) +6 + 29 = 3 (0011) +6 + 30 = 4 (0100) +6 + 31 = 5 (0101) +6 + 32 = 6 (0110) +6 + 33 = 7 (0111) +6 + 34 = 8 (1000) +6 + 35 = 9 (1001) +6 + 36 = 10 (1010) +6 + 37 = 11 (1011) +6 + 38 = 12 (1100) +6 + 39 = 13 (1101) +6 + 40 = 14 (1110) +6 + 41 = 15 (1111) +6 + 42 = 0 (0000) +6 + 43 = 1 (0001) +6 + 44 = 2 (0010) +6 + 45 = 3 (0011) +6 + 46 = 4 (0100) +6 + 47 = 5 (0101) +6 + 48 = 6 (0110) +6 + 49 = 7 (0111) +6 + 50 = 8 (1000) +6 + 51 = 9 (1001) +6 + 52 = 10 (1010) +6 + 53 = 11 (1011) +6 + 54 = 12 (1100) +6 + 55 = 13 (1101) +6 + 56 = 14 (1110) +6 + 57 = 15 (1111) +6 + 58 = 0 (0000) +6 + 59 = 1 (0001) +6 + 60 = 2 (0010) +6 + 61 = 3 (0011) +6 + 62 = 4 (0100) +6 + 63 = 5 (0101) +7 + 0 = 7 (0111) +7 + 1 = 8 (1000) +7 + 2 = 9 (1001) +7 + 3 = 10 (1010) +7 + 4 = 11 (1011) +7 + 5 = 12 (1100) +7 + 6 = 13 (1101) +7 + 7 = 14 (1110) +7 + 8 = 15 (1111) +7 + 9 = 0 (0000) +7 + 10 = 1 (0001) +7 + 11 = 2 (0010) +7 + 12 = 3 (0011) +7 + 13 = 4 (0100) +7 + 14 = 5 (0101) +7 + 15 = 6 (0110) +7 + 16 = 7 (0111) +7 + 17 = 8 (1000) +7 + 18 = 9 (1001) +7 + 19 = 10 (1010) +7 + 20 = 11 (1011) +7 + 21 = 12 (1100) +7 + 22 = 13 (1101) +7 + 23 = 14 (1110) +7 + 24 = 15 (1111) +7 + 25 = 0 (0000) +7 + 26 = 1 (0001) +7 + 27 = 2 (0010) +7 + 28 = 3 (0011) +7 + 29 = 4 (0100) +7 + 30 = 5 (0101) +7 + 31 = 6 (0110) +7 + 32 = 7 (0111) +7 + 33 = 8 (1000) +7 + 34 = 9 (1001) +7 + 35 = 10 (1010) +7 + 36 = 11 (1011) +7 + 37 = 12 (1100) +7 + 38 = 13 (1101) +7 + 39 = 14 (1110) +7 + 40 = 15 (1111) +7 + 41 = 0 (0000) +7 + 42 = 1 (0001) +7 + 43 = 2 (0010) +7 + 44 = 3 (0011) +7 + 45 = 4 (0100) +7 + 46 = 5 (0101) +7 + 47 = 6 (0110) +7 + 48 = 7 (0111) +7 + 49 = 8 (1000) +7 + 50 = 9 (1001) +7 + 51 = 10 (1010) +7 + 52 = 11 (1011) +7 + 53 = 12 (1100) +7 + 54 = 13 (1101) +7 + 55 = 14 (1110) +7 + 56 = 15 (1111) +7 + 57 = 0 (0000) +7 + 58 = 1 (0001) +7 + 59 = 2 (0010) +7 + 60 = 3 (0011) +7 + 61 = 4 (0100) +7 + 62 = 5 (0101) +7 + 63 = 6 (0110) +8 + 0 = 8 (1000) +8 + 1 = 9 (1001) +8 + 2 = 10 (1010) +8 + 3 = 11 (1011) +8 + 4 = 12 (1100) +8 + 5 = 13 (1101) +8 + 6 = 14 (1110) +8 + 7 = 15 (1111) +8 + 8 = 0 (0000) +8 + 9 = 1 (0001) +8 + 10 = 2 (0010) +8 + 11 = 3 (0011) +8 + 12 = 4 (0100) +8 + 13 = 5 (0101) +8 + 14 = 6 (0110) +8 + 15 = 7 (0111) +8 + 16 = 8 (1000) +8 + 17 = 9 (1001) +8 + 18 = 10 (1010) +8 + 19 = 11 (1011) +8 + 20 = 12 (1100) +8 + 21 = 13 (1101) +8 + 22 = 14 (1110) +8 + 23 = 15 (1111) +8 + 24 = 0 (0000) +8 + 25 = 1 (0001) +8 + 26 = 2 (0010) +8 + 27 = 3 (0011) +8 + 28 = 4 (0100) +8 + 29 = 5 (0101) +8 + 30 = 6 (0110) +8 + 31 = 7 (0111) +8 + 32 = 8 (1000) +8 + 33 = 9 (1001) +8 + 34 = 10 (1010) +8 + 35 = 11 (1011) +8 + 36 = 12 (1100) +8 + 37 = 13 (1101) +8 + 38 = 14 (1110) +8 + 39 = 15 (1111) +8 + 40 = 0 (0000) +8 + 41 = 1 (0001) +8 + 42 = 2 (0010) +8 + 43 = 3 (0011) +8 + 44 = 4 (0100) +8 + 45 = 5 (0101) +8 + 46 = 6 (0110) +8 + 47 = 7 (0111) +8 + 48 = 8 (1000) +8 + 49 = 9 (1001) +8 + 50 = 10 (1010) +8 + 51 = 11 (1011) +8 + 52 = 12 (1100) +8 + 53 = 13 (1101) +8 + 54 = 14 (1110) +8 + 55 = 15 (1111) +8 + 56 = 0 (0000) +8 + 57 = 1 (0001) +8 + 58 = 2 (0010) +8 + 59 = 3 (0011) +8 + 60 = 4 (0100) +8 + 61 = 5 (0101) +8 + 62 = 6 (0110) +8 + 63 = 7 (0111) +9 + 0 = 9 (1001) +9 + 1 = 10 (1010) +9 + 2 = 11 (1011) +9 + 3 = 12 (1100) +9 + 4 = 13 (1101) +9 + 5 = 14 (1110) +9 + 6 = 15 (1111) +9 + 7 = 0 (0000) +9 + 8 = 1 (0001) +9 + 9 = 2 (0010) +9 + 10 = 3 (0011) +9 + 11 = 4 (0100) +9 + 12 = 5 (0101) +9 + 13 = 6 (0110) +9 + 14 = 7 (0111) +9 + 15 = 8 (1000) +9 + 16 = 9 (1001) +9 + 17 = 10 (1010) +9 + 18 = 11 (1011) +9 + 19 = 12 (1100) +9 + 20 = 13 (1101) +9 + 21 = 14 (1110) +9 + 22 = 15 (1111) +9 + 23 = 0 (0000) +9 + 24 = 1 (0001) +9 + 25 = 2 (0010) +9 + 26 = 3 (0011) +9 + 27 = 4 (0100) +9 + 28 = 5 (0101) +9 + 29 = 6 (0110) +9 + 30 = 7 (0111) +9 + 31 = 8 (1000) +9 + 32 = 9 (1001) +9 + 33 = 10 (1010) +9 + 34 = 11 (1011) +9 + 35 = 12 (1100) +9 + 36 = 13 (1101) +9 + 37 = 14 (1110) +9 + 38 = 15 (1111) +9 + 39 = 0 (0000) +9 + 40 = 1 (0001) +9 + 41 = 2 (0010) +9 + 42 = 3 (0011) +9 + 43 = 4 (0100) +9 + 44 = 5 (0101) +9 + 45 = 6 (0110) +9 + 46 = 7 (0111) +9 + 47 = 8 (1000) +9 + 48 = 9 (1001) +9 + 49 = 10 (1010) +9 + 50 = 11 (1011) +9 + 51 = 12 (1100) +9 + 52 = 13 (1101) +9 + 53 = 14 (1110) +9 + 54 = 15 (1111) +9 + 55 = 0 (0000) +9 + 56 = 1 (0001) +9 + 57 = 2 (0010) +9 + 58 = 3 (0011) +9 + 59 = 4 (0100) +9 + 60 = 5 (0101) +9 + 61 = 6 (0110) +9 + 62 = 7 (0111) +9 + 63 = 8 (1000) +10 + 0 = 10 (1010) +10 + 1 = 11 (1011) +10 + 2 = 12 (1100) +10 + 3 = 13 (1101) +10 + 4 = 14 (1110) +10 + 5 = 15 (1111) +10 + 6 = 0 (0000) +10 + 7 = 1 (0001) +10 + 8 = 2 (0010) +10 + 9 = 3 (0011) +10 + 10 = 4 (0100) +10 + 11 = 5 (0101) +10 + 12 = 6 (0110) +10 + 13 = 7 (0111) +10 + 14 = 8 (1000) +10 + 15 = 9 (1001) +10 + 16 = 10 (1010) +10 + 17 = 11 (1011) +10 + 18 = 12 (1100) +10 + 19 = 13 (1101) +10 + 20 = 14 (1110) +10 + 21 = 15 (1111) +10 + 22 = 0 (0000) +10 + 23 = 1 (0001) +10 + 24 = 2 (0010) +10 + 25 = 3 (0011) +10 + 26 = 4 (0100) +10 + 27 = 5 (0101) +10 + 28 = 6 (0110) +10 + 29 = 7 (0111) +10 + 30 = 8 (1000) +10 + 31 = 9 (1001) +10 + 32 = 10 (1010) +10 + 33 = 11 (1011) +10 + 34 = 12 (1100) +10 + 35 = 13 (1101) +10 + 36 = 14 (1110) +10 + 37 = 15 (1111) +10 + 38 = 0 (0000) +10 + 39 = 1 (0001) +10 + 40 = 2 (0010) +10 + 41 = 3 (0011) +10 + 42 = 4 (0100) +10 + 43 = 5 (0101) +10 + 44 = 6 (0110) +10 + 45 = 7 (0111) +10 + 46 = 8 (1000) +10 + 47 = 9 (1001) +10 + 48 = 10 (1010) +10 + 49 = 11 (1011) +10 + 50 = 12 (1100) +10 + 51 = 13 (1101) +10 + 52 = 14 (1110) +10 + 53 = 15 (1111) +10 + 54 = 0 (0000) +10 + 55 = 1 (0001) +10 + 56 = 2 (0010) +10 + 57 = 3 (0011) +10 + 58 = 4 (0100) +10 + 59 = 5 (0101) +10 + 60 = 6 (0110) +10 + 61 = 7 (0111) +10 + 62 = 8 (1000) +10 + 63 = 9 (1001) +11 + 0 = 11 (1011) +11 + 1 = 12 (1100) +11 + 2 = 13 (1101) +11 + 3 = 14 (1110) +11 + 4 = 15 (1111) +11 + 5 = 0 (0000) +11 + 6 = 1 (0001) +11 + 7 = 2 (0010) +11 + 8 = 3 (0011) +11 + 9 = 4 (0100) +11 + 10 = 5 (0101) +11 + 11 = 6 (0110) +11 + 12 = 7 (0111) +11 + 13 = 8 (1000) +11 + 14 = 9 (1001) +11 + 15 = 10 (1010) +11 + 16 = 11 (1011) +11 + 17 = 12 (1100) +11 + 18 = 13 (1101) +11 + 19 = 14 (1110) +11 + 20 = 15 (1111) +11 + 21 = 0 (0000) +11 + 22 = 1 (0001) +11 + 23 = 2 (0010) +11 + 24 = 3 (0011) +11 + 25 = 4 (0100) +11 + 26 = 5 (0101) +11 + 27 = 6 (0110) +11 + 28 = 7 (0111) +11 + 29 = 8 (1000) +11 + 30 = 9 (1001) +11 + 31 = 10 (1010) +11 + 32 = 11 (1011) +11 + 33 = 12 (1100) +11 + 34 = 13 (1101) +11 + 35 = 14 (1110) +11 + 36 = 15 (1111) +11 + 37 = 0 (0000) +11 + 38 = 1 (0001) +11 + 39 = 2 (0010) +11 + 40 = 3 (0011) +11 + 41 = 4 (0100) +11 + 42 = 5 (0101) +11 + 43 = 6 (0110) +11 + 44 = 7 (0111) +11 + 45 = 8 (1000) +11 + 46 = 9 (1001) +11 + 47 = 10 (1010) +11 + 48 = 11 (1011) +11 + 49 = 12 (1100) +11 + 50 = 13 (1101) +11 + 51 = 14 (1110) +11 + 52 = 15 (1111) +11 + 53 = 0 (0000) +11 + 54 = 1 (0001) +11 + 55 = 2 (0010) +11 + 56 = 3 (0011) +11 + 57 = 4 (0100) +11 + 58 = 5 (0101) +11 + 59 = 6 (0110) +11 + 60 = 7 (0111) +11 + 61 = 8 (1000) +11 + 62 = 9 (1001) +11 + 63 = 10 (1010) +12 + 0 = 12 (1100) +12 + 1 = 13 (1101) +12 + 2 = 14 (1110) +12 + 3 = 15 (1111) +12 + 4 = 0 (0000) +12 + 5 = 1 (0001) +12 + 6 = 2 (0010) +12 + 7 = 3 (0011) +12 + 8 = 4 (0100) +12 + 9 = 5 (0101) +12 + 10 = 6 (0110) +12 + 11 = 7 (0111) +12 + 12 = 8 (1000) +12 + 13 = 9 (1001) +12 + 14 = 10 (1010) +12 + 15 = 11 (1011) +12 + 16 = 12 (1100) +12 + 17 = 13 (1101) +12 + 18 = 14 (1110) +12 + 19 = 15 (1111) +12 + 20 = 0 (0000) +12 + 21 = 1 (0001) +12 + 22 = 2 (0010) +12 + 23 = 3 (0011) +12 + 24 = 4 (0100) +12 + 25 = 5 (0101) +12 + 26 = 6 (0110) +12 + 27 = 7 (0111) +12 + 28 = 8 (1000) +12 + 29 = 9 (1001) +12 + 30 = 10 (1010) +12 + 31 = 11 (1011) +12 + 32 = 12 (1100) +12 + 33 = 13 (1101) +12 + 34 = 14 (1110) +12 + 35 = 15 (1111) +12 + 36 = 0 (0000) +12 + 37 = 1 (0001) +12 + 38 = 2 (0010) +12 + 39 = 3 (0011) +12 + 40 = 4 (0100) +12 + 41 = 5 (0101) +12 + 42 = 6 (0110) +12 + 43 = 7 (0111) +12 + 44 = 8 (1000) +12 + 45 = 9 (1001) +12 + 46 = 10 (1010) +12 + 47 = 11 (1011) +12 + 48 = 12 (1100) +12 + 49 = 13 (1101) +12 + 50 = 14 (1110) +12 + 51 = 15 (1111) +12 + 52 = 0 (0000) +12 + 53 = 1 (0001) +12 + 54 = 2 (0010) +12 + 55 = 3 (0011) +12 + 56 = 4 (0100) +12 + 57 = 5 (0101) +12 + 58 = 6 (0110) +12 + 59 = 7 (0111) +12 + 60 = 8 (1000) +12 + 61 = 9 (1001) +12 + 62 = 10 (1010) +12 + 63 = 11 (1011) +13 + 0 = 13 (1101) +13 + 1 = 14 (1110) +13 + 2 = 15 (1111) +13 + 3 = 0 (0000) +13 + 4 = 1 (0001) +13 + 5 = 2 (0010) +13 + 6 = 3 (0011) +13 + 7 = 4 (0100) +13 + 8 = 5 (0101) +13 + 9 = 6 (0110) +13 + 10 = 7 (0111) +13 + 11 = 8 (1000) +13 + 12 = 9 (1001) +13 + 13 = 10 (1010) +13 + 14 = 11 (1011) +13 + 15 = 12 (1100) +13 + 16 = 13 (1101) +13 + 17 = 14 (1110) +13 + 18 = 15 (1111) +13 + 19 = 0 (0000) +13 + 20 = 1 (0001) +13 + 21 = 2 (0010) +13 + 22 = 3 (0011) +13 + 23 = 4 (0100) +13 + 24 = 5 (0101) +13 + 25 = 6 (0110) +13 + 26 = 7 (0111) +13 + 27 = 8 (1000) +13 + 28 = 9 (1001) +13 + 29 = 10 (1010) +13 + 30 = 11 (1011) +13 + 31 = 12 (1100) +13 + 32 = 13 (1101) +13 + 33 = 14 (1110) +13 + 34 = 15 (1111) +13 + 35 = 0 (0000) +13 + 36 = 1 (0001) +13 + 37 = 2 (0010) +13 + 38 = 3 (0011) +13 + 39 = 4 (0100) +13 + 40 = 5 (0101) +13 + 41 = 6 (0110) +13 + 42 = 7 (0111) +13 + 43 = 8 (1000) +13 + 44 = 9 (1001) +13 + 45 = 10 (1010) +13 + 46 = 11 (1011) +13 + 47 = 12 (1100) +13 + 48 = 13 (1101) +13 + 49 = 14 (1110) +13 + 50 = 15 (1111) +13 + 51 = 0 (0000) +13 + 52 = 1 (0001) +13 + 53 = 2 (0010) +13 + 54 = 3 (0011) +13 + 55 = 4 (0100) +13 + 56 = 5 (0101) +13 + 57 = 6 (0110) +13 + 58 = 7 (0111) +13 + 59 = 8 (1000) +13 + 60 = 9 (1001) +13 + 61 = 10 (1010) +13 + 62 = 11 (1011) +13 + 63 = 12 (1100) +14 + 0 = 14 (1110) +14 + 1 = 15 (1111) +14 + 2 = 0 (0000) +14 + 3 = 1 (0001) +14 + 4 = 2 (0010) +14 + 5 = 3 (0011) +14 + 6 = 4 (0100) +14 + 7 = 5 (0101) +14 + 8 = 6 (0110) +14 + 9 = 7 (0111) +14 + 10 = 8 (1000) +14 + 11 = 9 (1001) +14 + 12 = 10 (1010) +14 + 13 = 11 (1011) +14 + 14 = 12 (1100) +14 + 15 = 13 (1101) +14 + 16 = 14 (1110) +14 + 17 = 15 (1111) +14 + 18 = 0 (0000) +14 + 19 = 1 (0001) +14 + 20 = 2 (0010) +14 + 21 = 3 (0011) +14 + 22 = 4 (0100) +14 + 23 = 5 (0101) +14 + 24 = 6 (0110) +14 + 25 = 7 (0111) +14 + 26 = 8 (1000) +14 + 27 = 9 (1001) +14 + 28 = 10 (1010) +14 + 29 = 11 (1011) +14 + 30 = 12 (1100) +14 + 31 = 13 (1101) +14 + 32 = 14 (1110) +14 + 33 = 15 (1111) +14 + 34 = 0 (0000) +14 + 35 = 1 (0001) +14 + 36 = 2 (0010) +14 + 37 = 3 (0011) +14 + 38 = 4 (0100) +14 + 39 = 5 (0101) +14 + 40 = 6 (0110) +14 + 41 = 7 (0111) +14 + 42 = 8 (1000) +14 + 43 = 9 (1001) +14 + 44 = 10 (1010) +14 + 45 = 11 (1011) +14 + 46 = 12 (1100) +14 + 47 = 13 (1101) +14 + 48 = 14 (1110) +14 + 49 = 15 (1111) +14 + 50 = 0 (0000) +14 + 51 = 1 (0001) +14 + 52 = 2 (0010) +14 + 53 = 3 (0011) +14 + 54 = 4 (0100) +14 + 55 = 5 (0101) +14 + 56 = 6 (0110) +14 + 57 = 7 (0111) +14 + 58 = 8 (1000) +14 + 59 = 9 (1001) +14 + 60 = 10 (1010) +14 + 61 = 11 (1011) +14 + 62 = 12 (1100) +14 + 63 = 13 (1101) +15 + 0 = 15 (1111) +15 + 1 = 0 (0000) +15 + 2 = 1 (0001) +15 + 3 = 2 (0010) +15 + 4 = 3 (0011) +15 + 5 = 4 (0100) +15 + 6 = 5 (0101) +15 + 7 = 6 (0110) +15 + 8 = 7 (0111) +15 + 9 = 8 (1000) +15 + 10 = 9 (1001) +15 + 11 = 10 (1010) +15 + 12 = 11 (1011) +15 + 13 = 12 (1100) +15 + 14 = 13 (1101) +15 + 15 = 14 (1110) +15 + 16 = 15 (1111) +15 + 17 = 0 (0000) +15 + 18 = 1 (0001) +15 + 19 = 2 (0010) +15 + 20 = 3 (0011) +15 + 21 = 4 (0100) +15 + 22 = 5 (0101) +15 + 23 = 6 (0110) +15 + 24 = 7 (0111) +15 + 25 = 8 (1000) +15 + 26 = 9 (1001) +15 + 27 = 10 (1010) +15 + 28 = 11 (1011) +15 + 29 = 12 (1100) +15 + 30 = 13 (1101) +15 + 31 = 14 (1110) +15 + 32 = 15 (1111) +15 + 33 = 0 (0000) +15 + 34 = 1 (0001) +15 + 35 = 2 (0010) +15 + 36 = 3 (0011) +15 + 37 = 4 (0100) +15 + 38 = 5 (0101) +15 + 39 = 6 (0110) +15 + 40 = 7 (0111) +15 + 41 = 8 (1000) +15 + 42 = 9 (1001) +15 + 43 = 10 (1010) +15 + 44 = 11 (1011) +15 + 45 = 12 (1100) +15 + 46 = 13 (1101) +15 + 47 = 14 (1110) +15 + 48 = 15 (1111) +15 + 49 = 0 (0000) +15 + 50 = 1 (0001) +15 + 51 = 2 (0010) +15 + 52 = 3 (0011) +15 + 53 = 4 (0100) +15 + 54 = 5 (0101) +15 + 55 = 6 (0110) +15 + 56 = 7 (0111) +15 + 57 = 8 (1000) +15 + 58 = 9 (1001) +15 + 59 = 10 (1010) +15 + 60 = 11 (1011) +15 + 61 = 12 (1100) +15 + 62 = 13 (1101) +15 + 63 = 14 (1110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/main.cpp new file mode 100644 index 000000000..657543508 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 4-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 4; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector4 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/promote_truncation.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/promote_truncation.f new file mode 100644 index 000000000..90b689aca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/promote_truncation.f @@ -0,0 +1,3 @@ +promote_truncation/datawidth.cpp +promote_truncation/stimgen.cpp +promote_truncation/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/stimgen.h new file mode 100644 index 000000000..959122edf --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/common.h new file mode 100644 index 000000000..d7f26e029 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<4> bool_vector4; +typedef sc_bv<6> bool_vector6; + +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/datawidth.cpp new file mode 100644 index 000000000..929fd042a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector6 tmp_a; + bool_vector6 tmp_b; + bool_vector4 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a.to_uint() + tmp_b.to_uint(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/datawidth.h new file mode 100644 index 000000000..98681b45a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector4& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector4& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/golden/truncation.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/golden/truncation.log new file mode 100644 index 000000000..5a235015a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/golden/truncation.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000) +0 + 1 = 1 (0001) +0 + 2 = 2 (0010) +0 + 3 = 3 (0011) +0 + 4 = 4 (0100) +0 + 5 = 5 (0101) +0 + 6 = 6 (0110) +0 + 7 = 7 (0111) +0 + 8 = 8 (1000) +0 + 9 = 9 (1001) +0 + 10 = 10 (1010) +0 + 11 = 11 (1011) +0 + 12 = 12 (1100) +0 + 13 = 13 (1101) +0 + 14 = 14 (1110) +0 + 15 = 15 (1111) +0 + 16 = 0 (0000) +0 + 17 = 1 (0001) +0 + 18 = 2 (0010) +0 + 19 = 3 (0011) +0 + 20 = 4 (0100) +0 + 21 = 5 (0101) +0 + 22 = 6 (0110) +0 + 23 = 7 (0111) +0 + 24 = 8 (1000) +0 + 25 = 9 (1001) +0 + 26 = 10 (1010) +0 + 27 = 11 (1011) +0 + 28 = 12 (1100) +0 + 29 = 13 (1101) +0 + 30 = 14 (1110) +0 + 31 = 15 (1111) +0 + 32 = 0 (0000) +0 + 33 = 1 (0001) +0 + 34 = 2 (0010) +0 + 35 = 3 (0011) +0 + 36 = 4 (0100) +0 + 37 = 5 (0101) +0 + 38 = 6 (0110) +0 + 39 = 7 (0111) +0 + 40 = 8 (1000) +0 + 41 = 9 (1001) +0 + 42 = 10 (1010) +0 + 43 = 11 (1011) +0 + 44 = 12 (1100) +0 + 45 = 13 (1101) +0 + 46 = 14 (1110) +0 + 47 = 15 (1111) +0 + 48 = 0 (0000) +0 + 49 = 1 (0001) +0 + 50 = 2 (0010) +0 + 51 = 3 (0011) +0 + 52 = 4 (0100) +0 + 53 = 5 (0101) +0 + 54 = 6 (0110) +0 + 55 = 7 (0111) +0 + 56 = 8 (1000) +0 + 57 = 9 (1001) +0 + 58 = 10 (1010) +0 + 59 = 11 (1011) +0 + 60 = 12 (1100) +0 + 61 = 13 (1101) +0 + 62 = 14 (1110) +0 + 63 = 15 (1111) +1 + 0 = 1 (0001) +1 + 1 = 2 (0010) +1 + 2 = 3 (0011) +1 + 3 = 4 (0100) +1 + 4 = 5 (0101) +1 + 5 = 6 (0110) +1 + 6 = 7 (0111) +1 + 7 = 8 (1000) +1 + 8 = 9 (1001) +1 + 9 = 10 (1010) +1 + 10 = 11 (1011) +1 + 11 = 12 (1100) +1 + 12 = 13 (1101) +1 + 13 = 14 (1110) +1 + 14 = 15 (1111) +1 + 15 = 0 (0000) +1 + 16 = 1 (0001) +1 + 17 = 2 (0010) +1 + 18 = 3 (0011) +1 + 19 = 4 (0100) +1 + 20 = 5 (0101) +1 + 21 = 6 (0110) +1 + 22 = 7 (0111) +1 + 23 = 8 (1000) +1 + 24 = 9 (1001) +1 + 25 = 10 (1010) +1 + 26 = 11 (1011) +1 + 27 = 12 (1100) +1 + 28 = 13 (1101) +1 + 29 = 14 (1110) +1 + 30 = 15 (1111) +1 + 31 = 0 (0000) +1 + 32 = 1 (0001) +1 + 33 = 2 (0010) +1 + 34 = 3 (0011) +1 + 35 = 4 (0100) +1 + 36 = 5 (0101) +1 + 37 = 6 (0110) +1 + 38 = 7 (0111) +1 + 39 = 8 (1000) +1 + 40 = 9 (1001) +1 + 41 = 10 (1010) +1 + 42 = 11 (1011) +1 + 43 = 12 (1100) +1 + 44 = 13 (1101) +1 + 45 = 14 (1110) +1 + 46 = 15 (1111) +1 + 47 = 0 (0000) +1 + 48 = 1 (0001) +1 + 49 = 2 (0010) +1 + 50 = 3 (0011) +1 + 51 = 4 (0100) +1 + 52 = 5 (0101) +1 + 53 = 6 (0110) +1 + 54 = 7 (0111) +1 + 55 = 8 (1000) +1 + 56 = 9 (1001) +1 + 57 = 10 (1010) +1 + 58 = 11 (1011) +1 + 59 = 12 (1100) +1 + 60 = 13 (1101) +1 + 61 = 14 (1110) +1 + 62 = 15 (1111) +1 + 63 = 0 (0000) +2 + 0 = 2 (0010) +2 + 1 = 3 (0011) +2 + 2 = 4 (0100) +2 + 3 = 5 (0101) +2 + 4 = 6 (0110) +2 + 5 = 7 (0111) +2 + 6 = 8 (1000) +2 + 7 = 9 (1001) +2 + 8 = 10 (1010) +2 + 9 = 11 (1011) +2 + 10 = 12 (1100) +2 + 11 = 13 (1101) +2 + 12 = 14 (1110) +2 + 13 = 15 (1111) +2 + 14 = 0 (0000) +2 + 15 = 1 (0001) +2 + 16 = 2 (0010) +2 + 17 = 3 (0011) +2 + 18 = 4 (0100) +2 + 19 = 5 (0101) +2 + 20 = 6 (0110) +2 + 21 = 7 (0111) +2 + 22 = 8 (1000) +2 + 23 = 9 (1001) +2 + 24 = 10 (1010) +2 + 25 = 11 (1011) +2 + 26 = 12 (1100) +2 + 27 = 13 (1101) +2 + 28 = 14 (1110) +2 + 29 = 15 (1111) +2 + 30 = 0 (0000) +2 + 31 = 1 (0001) +2 + 32 = 2 (0010) +2 + 33 = 3 (0011) +2 + 34 = 4 (0100) +2 + 35 = 5 (0101) +2 + 36 = 6 (0110) +2 + 37 = 7 (0111) +2 + 38 = 8 (1000) +2 + 39 = 9 (1001) +2 + 40 = 10 (1010) +2 + 41 = 11 (1011) +2 + 42 = 12 (1100) +2 + 43 = 13 (1101) +2 + 44 = 14 (1110) +2 + 45 = 15 (1111) +2 + 46 = 0 (0000) +2 + 47 = 1 (0001) +2 + 48 = 2 (0010) +2 + 49 = 3 (0011) +2 + 50 = 4 (0100) +2 + 51 = 5 (0101) +2 + 52 = 6 (0110) +2 + 53 = 7 (0111) +2 + 54 = 8 (1000) +2 + 55 = 9 (1001) +2 + 56 = 10 (1010) +2 + 57 = 11 (1011) +2 + 58 = 12 (1100) +2 + 59 = 13 (1101) +2 + 60 = 14 (1110) +2 + 61 = 15 (1111) +2 + 62 = 0 (0000) +2 + 63 = 1 (0001) +3 + 0 = 3 (0011) +3 + 1 = 4 (0100) +3 + 2 = 5 (0101) +3 + 3 = 6 (0110) +3 + 4 = 7 (0111) +3 + 5 = 8 (1000) +3 + 6 = 9 (1001) +3 + 7 = 10 (1010) +3 + 8 = 11 (1011) +3 + 9 = 12 (1100) +3 + 10 = 13 (1101) +3 + 11 = 14 (1110) +3 + 12 = 15 (1111) +3 + 13 = 0 (0000) +3 + 14 = 1 (0001) +3 + 15 = 2 (0010) +3 + 16 = 3 (0011) +3 + 17 = 4 (0100) +3 + 18 = 5 (0101) +3 + 19 = 6 (0110) +3 + 20 = 7 (0111) +3 + 21 = 8 (1000) +3 + 22 = 9 (1001) +3 + 23 = 10 (1010) +3 + 24 = 11 (1011) +3 + 25 = 12 (1100) +3 + 26 = 13 (1101) +3 + 27 = 14 (1110) +3 + 28 = 15 (1111) +3 + 29 = 0 (0000) +3 + 30 = 1 (0001) +3 + 31 = 2 (0010) +3 + 32 = 3 (0011) +3 + 33 = 4 (0100) +3 + 34 = 5 (0101) +3 + 35 = 6 (0110) +3 + 36 = 7 (0111) +3 + 37 = 8 (1000) +3 + 38 = 9 (1001) +3 + 39 = 10 (1010) +3 + 40 = 11 (1011) +3 + 41 = 12 (1100) +3 + 42 = 13 (1101) +3 + 43 = 14 (1110) +3 + 44 = 15 (1111) +3 + 45 = 0 (0000) +3 + 46 = 1 (0001) +3 + 47 = 2 (0010) +3 + 48 = 3 (0011) +3 + 49 = 4 (0100) +3 + 50 = 5 (0101) +3 + 51 = 6 (0110) +3 + 52 = 7 (0111) +3 + 53 = 8 (1000) +3 + 54 = 9 (1001) +3 + 55 = 10 (1010) +3 + 56 = 11 (1011) +3 + 57 = 12 (1100) +3 + 58 = 13 (1101) +3 + 59 = 14 (1110) +3 + 60 = 15 (1111) +3 + 61 = 0 (0000) +3 + 62 = 1 (0001) +3 + 63 = 2 (0010) +4 + 0 = 4 (0100) +4 + 1 = 5 (0101) +4 + 2 = 6 (0110) +4 + 3 = 7 (0111) +4 + 4 = 8 (1000) +4 + 5 = 9 (1001) +4 + 6 = 10 (1010) +4 + 7 = 11 (1011) +4 + 8 = 12 (1100) +4 + 9 = 13 (1101) +4 + 10 = 14 (1110) +4 + 11 = 15 (1111) +4 + 12 = 0 (0000) +4 + 13 = 1 (0001) +4 + 14 = 2 (0010) +4 + 15 = 3 (0011) +4 + 16 = 4 (0100) +4 + 17 = 5 (0101) +4 + 18 = 6 (0110) +4 + 19 = 7 (0111) +4 + 20 = 8 (1000) +4 + 21 = 9 (1001) +4 + 22 = 10 (1010) +4 + 23 = 11 (1011) +4 + 24 = 12 (1100) +4 + 25 = 13 (1101) +4 + 26 = 14 (1110) +4 + 27 = 15 (1111) +4 + 28 = 0 (0000) +4 + 29 = 1 (0001) +4 + 30 = 2 (0010) +4 + 31 = 3 (0011) +4 + 32 = 4 (0100) +4 + 33 = 5 (0101) +4 + 34 = 6 (0110) +4 + 35 = 7 (0111) +4 + 36 = 8 (1000) +4 + 37 = 9 (1001) +4 + 38 = 10 (1010) +4 + 39 = 11 (1011) +4 + 40 = 12 (1100) +4 + 41 = 13 (1101) +4 + 42 = 14 (1110) +4 + 43 = 15 (1111) +4 + 44 = 0 (0000) +4 + 45 = 1 (0001) +4 + 46 = 2 (0010) +4 + 47 = 3 (0011) +4 + 48 = 4 (0100) +4 + 49 = 5 (0101) +4 + 50 = 6 (0110) +4 + 51 = 7 (0111) +4 + 52 = 8 (1000) +4 + 53 = 9 (1001) +4 + 54 = 10 (1010) +4 + 55 = 11 (1011) +4 + 56 = 12 (1100) +4 + 57 = 13 (1101) +4 + 58 = 14 (1110) +4 + 59 = 15 (1111) +4 + 60 = 0 (0000) +4 + 61 = 1 (0001) +4 + 62 = 2 (0010) +4 + 63 = 3 (0011) +5 + 0 = 5 (0101) +5 + 1 = 6 (0110) +5 + 2 = 7 (0111) +5 + 3 = 8 (1000) +5 + 4 = 9 (1001) +5 + 5 = 10 (1010) +5 + 6 = 11 (1011) +5 + 7 = 12 (1100) +5 + 8 = 13 (1101) +5 + 9 = 14 (1110) +5 + 10 = 15 (1111) +5 + 11 = 0 (0000) +5 + 12 = 1 (0001) +5 + 13 = 2 (0010) +5 + 14 = 3 (0011) +5 + 15 = 4 (0100) +5 + 16 = 5 (0101) +5 + 17 = 6 (0110) +5 + 18 = 7 (0111) +5 + 19 = 8 (1000) +5 + 20 = 9 (1001) +5 + 21 = 10 (1010) +5 + 22 = 11 (1011) +5 + 23 = 12 (1100) +5 + 24 = 13 (1101) +5 + 25 = 14 (1110) +5 + 26 = 15 (1111) +5 + 27 = 0 (0000) +5 + 28 = 1 (0001) +5 + 29 = 2 (0010) +5 + 30 = 3 (0011) +5 + 31 = 4 (0100) +5 + 32 = 5 (0101) +5 + 33 = 6 (0110) +5 + 34 = 7 (0111) +5 + 35 = 8 (1000) +5 + 36 = 9 (1001) +5 + 37 = 10 (1010) +5 + 38 = 11 (1011) +5 + 39 = 12 (1100) +5 + 40 = 13 (1101) +5 + 41 = 14 (1110) +5 + 42 = 15 (1111) +5 + 43 = 0 (0000) +5 + 44 = 1 (0001) +5 + 45 = 2 (0010) +5 + 46 = 3 (0011) +5 + 47 = 4 (0100) +5 + 48 = 5 (0101) +5 + 49 = 6 (0110) +5 + 50 = 7 (0111) +5 + 51 = 8 (1000) +5 + 52 = 9 (1001) +5 + 53 = 10 (1010) +5 + 54 = 11 (1011) +5 + 55 = 12 (1100) +5 + 56 = 13 (1101) +5 + 57 = 14 (1110) +5 + 58 = 15 (1111) +5 + 59 = 0 (0000) +5 + 60 = 1 (0001) +5 + 61 = 2 (0010) +5 + 62 = 3 (0011) +5 + 63 = 4 (0100) +6 + 0 = 6 (0110) +6 + 1 = 7 (0111) +6 + 2 = 8 (1000) +6 + 3 = 9 (1001) +6 + 4 = 10 (1010) +6 + 5 = 11 (1011) +6 + 6 = 12 (1100) +6 + 7 = 13 (1101) +6 + 8 = 14 (1110) +6 + 9 = 15 (1111) +6 + 10 = 0 (0000) +6 + 11 = 1 (0001) +6 + 12 = 2 (0010) +6 + 13 = 3 (0011) +6 + 14 = 4 (0100) +6 + 15 = 5 (0101) +6 + 16 = 6 (0110) +6 + 17 = 7 (0111) +6 + 18 = 8 (1000) +6 + 19 = 9 (1001) +6 + 20 = 10 (1010) +6 + 21 = 11 (1011) +6 + 22 = 12 (1100) +6 + 23 = 13 (1101) +6 + 24 = 14 (1110) +6 + 25 = 15 (1111) +6 + 26 = 0 (0000) +6 + 27 = 1 (0001) +6 + 28 = 2 (0010) +6 + 29 = 3 (0011) +6 + 30 = 4 (0100) +6 + 31 = 5 (0101) +6 + 32 = 6 (0110) +6 + 33 = 7 (0111) +6 + 34 = 8 (1000) +6 + 35 = 9 (1001) +6 + 36 = 10 (1010) +6 + 37 = 11 (1011) +6 + 38 = 12 (1100) +6 + 39 = 13 (1101) +6 + 40 = 14 (1110) +6 + 41 = 15 (1111) +6 + 42 = 0 (0000) +6 + 43 = 1 (0001) +6 + 44 = 2 (0010) +6 + 45 = 3 (0011) +6 + 46 = 4 (0100) +6 + 47 = 5 (0101) +6 + 48 = 6 (0110) +6 + 49 = 7 (0111) +6 + 50 = 8 (1000) +6 + 51 = 9 (1001) +6 + 52 = 10 (1010) +6 + 53 = 11 (1011) +6 + 54 = 12 (1100) +6 + 55 = 13 (1101) +6 + 56 = 14 (1110) +6 + 57 = 15 (1111) +6 + 58 = 0 (0000) +6 + 59 = 1 (0001) +6 + 60 = 2 (0010) +6 + 61 = 3 (0011) +6 + 62 = 4 (0100) +6 + 63 = 5 (0101) +7 + 0 = 7 (0111) +7 + 1 = 8 (1000) +7 + 2 = 9 (1001) +7 + 3 = 10 (1010) +7 + 4 = 11 (1011) +7 + 5 = 12 (1100) +7 + 6 = 13 (1101) +7 + 7 = 14 (1110) +7 + 8 = 15 (1111) +7 + 9 = 0 (0000) +7 + 10 = 1 (0001) +7 + 11 = 2 (0010) +7 + 12 = 3 (0011) +7 + 13 = 4 (0100) +7 + 14 = 5 (0101) +7 + 15 = 6 (0110) +7 + 16 = 7 (0111) +7 + 17 = 8 (1000) +7 + 18 = 9 (1001) +7 + 19 = 10 (1010) +7 + 20 = 11 (1011) +7 + 21 = 12 (1100) +7 + 22 = 13 (1101) +7 + 23 = 14 (1110) +7 + 24 = 15 (1111) +7 + 25 = 0 (0000) +7 + 26 = 1 (0001) +7 + 27 = 2 (0010) +7 + 28 = 3 (0011) +7 + 29 = 4 (0100) +7 + 30 = 5 (0101) +7 + 31 = 6 (0110) +7 + 32 = 7 (0111) +7 + 33 = 8 (1000) +7 + 34 = 9 (1001) +7 + 35 = 10 (1010) +7 + 36 = 11 (1011) +7 + 37 = 12 (1100) +7 + 38 = 13 (1101) +7 + 39 = 14 (1110) +7 + 40 = 15 (1111) +7 + 41 = 0 (0000) +7 + 42 = 1 (0001) +7 + 43 = 2 (0010) +7 + 44 = 3 (0011) +7 + 45 = 4 (0100) +7 + 46 = 5 (0101) +7 + 47 = 6 (0110) +7 + 48 = 7 (0111) +7 + 49 = 8 (1000) +7 + 50 = 9 (1001) +7 + 51 = 10 (1010) +7 + 52 = 11 (1011) +7 + 53 = 12 (1100) +7 + 54 = 13 (1101) +7 + 55 = 14 (1110) +7 + 56 = 15 (1111) +7 + 57 = 0 (0000) +7 + 58 = 1 (0001) +7 + 59 = 2 (0010) +7 + 60 = 3 (0011) +7 + 61 = 4 (0100) +7 + 62 = 5 (0101) +7 + 63 = 6 (0110) +8 + 0 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(1101) +52 + 58 = 14 (1110) +52 + 59 = 15 (1111) +52 + 60 = 0 (0000) +52 + 61 = 1 (0001) +52 + 62 = 2 (0010) +52 + 63 = 3 (0011) +53 + 0 = 5 (0101) +53 + 1 = 6 (0110) +53 + 2 = 7 (0111) +53 + 3 = 8 (1000) +53 + 4 = 9 (1001) +53 + 5 = 10 (1010) +53 + 6 = 11 (1011) +53 + 7 = 12 (1100) +53 + 8 = 13 (1101) +53 + 9 = 14 (1110) +53 + 10 = 15 (1111) +53 + 11 = 0 (0000) +53 + 12 = 1 (0001) +53 + 13 = 2 (0010) +53 + 14 = 3 (0011) +53 + 15 = 4 (0100) +53 + 16 = 5 (0101) +53 + 17 = 6 (0110) +53 + 18 = 7 (0111) +53 + 19 = 8 (1000) +53 + 20 = 9 (1001) +53 + 21 = 10 (1010) +53 + 22 = 11 (1011) +53 + 23 = 12 (1100) +53 + 24 = 13 (1101) +53 + 25 = 14 (1110) +53 + 26 = 15 (1111) +53 + 27 = 0 (0000) +53 + 28 = 1 (0001) +53 + 29 = 2 (0010) +53 + 30 = 3 (0011) +53 + 31 = 4 (0100) +53 + 32 = 5 (0101) +53 + 33 = 6 (0110) +53 + 34 = 7 (0111) +53 + 35 = 8 (1000) +53 + 36 = 9 (1001) +53 + 37 = 10 (1010) +53 + 38 = 11 (1011) +53 + 39 = 12 (1100) +53 + 40 = 13 (1101) +53 + 41 = 14 (1110) +53 + 42 = 15 (1111) +53 + 43 = 0 (0000) +53 + 44 = 1 (0001) +53 + 45 = 2 (0010) +53 + 46 = 3 (0011) +53 + 47 = 4 (0100) +53 + 48 = 5 (0101) +53 + 49 = 6 (0110) +53 + 50 = 7 (0111) +53 + 51 = 8 (1000) +53 + 52 = 9 (1001) +53 + 53 = 10 (1010) +53 + 54 = 11 (1011) +53 + 55 = 12 (1100) +53 + 56 = 13 (1101) +53 + 57 = 14 (1110) +53 + 58 = 15 (1111) +53 + 59 = 0 (0000) +53 + 60 = 1 (0001) +53 + 61 = 2 (0010) +53 + 62 = 3 (0011) +53 + 63 = 4 (0100) +54 + 0 = 6 (0110) +54 + 1 = 7 (0111) +54 + 2 = 8 (1000) +54 + 3 = 9 (1001) +54 + 4 = 10 (1010) +54 + 5 = 11 (1011) +54 + 6 = 12 (1100) +54 + 7 = 13 (1101) +54 + 8 = 14 (1110) +54 + 9 = 15 (1111) +54 + 10 = 0 (0000) +54 + 11 = 1 (0001) +54 + 12 = 2 (0010) +54 + 13 = 3 (0011) +54 + 14 = 4 (0100) +54 + 15 = 5 (0101) +54 + 16 = 6 (0110) +54 + 17 = 7 (0111) +54 + 18 = 8 (1000) +54 + 19 = 9 (1001) +54 + 20 = 10 (1010) +54 + 21 = 11 (1011) +54 + 22 = 12 (1100) +54 + 23 = 13 (1101) +54 + 24 = 14 (1110) +54 + 25 = 15 (1111) +54 + 26 = 0 (0000) +54 + 27 = 1 (0001) +54 + 28 = 2 (0010) +54 + 29 = 3 (0011) +54 + 30 = 4 (0100) +54 + 31 = 5 (0101) +54 + 32 = 6 (0110) +54 + 33 = 7 (0111) +54 + 34 = 8 (1000) +54 + 35 = 9 (1001) +54 + 36 = 10 (1010) +54 + 37 = 11 (1011) +54 + 38 = 12 (1100) +54 + 39 = 13 (1101) +54 + 40 = 14 (1110) +54 + 41 = 15 (1111) +54 + 42 = 0 (0000) +54 + 43 = 1 (0001) +54 + 44 = 2 (0010) +54 + 45 = 3 (0011) +54 + 46 = 4 (0100) +54 + 47 = 5 (0101) +54 + 48 = 6 (0110) +54 + 49 = 7 (0111) +54 + 50 = 8 (1000) +54 + 51 = 9 (1001) +54 + 52 = 10 (1010) +54 + 53 = 11 (1011) +54 + 54 = 12 (1100) +54 + 55 = 13 (1101) +54 + 56 = 14 (1110) +54 + 57 = 15 (1111) +54 + 58 = 0 (0000) +54 + 59 = 1 (0001) +54 + 60 = 2 (0010) +54 + 61 = 3 (0011) +54 + 62 = 4 (0100) +54 + 63 = 5 (0101) +55 + 0 = 7 (0111) +55 + 1 = 8 (1000) +55 + 2 = 9 (1001) +55 + 3 = 10 (1010) +55 + 4 = 11 (1011) +55 + 5 = 12 (1100) +55 + 6 = 13 (1101) +55 + 7 = 14 (1110) +55 + 8 = 15 (1111) +55 + 9 = 0 (0000) +55 + 10 = 1 (0001) +55 + 11 = 2 (0010) +55 + 12 = 3 (0011) +55 + 13 = 4 (0100) +55 + 14 = 5 (0101) +55 + 15 = 6 (0110) +55 + 16 = 7 (0111) +55 + 17 = 8 (1000) +55 + 18 = 9 (1001) +55 + 19 = 10 (1010) +55 + 20 = 11 (1011) +55 + 21 = 12 (1100) +55 + 22 = 13 (1101) +55 + 23 = 14 (1110) +55 + 24 = 15 (1111) +55 + 25 = 0 (0000) +55 + 26 = 1 (0001) +55 + 27 = 2 (0010) +55 + 28 = 3 (0011) +55 + 29 = 4 (0100) +55 + 30 = 5 (0101) +55 + 31 = 6 (0110) +55 + 32 = 7 (0111) +55 + 33 = 8 (1000) +55 + 34 = 9 (1001) +55 + 35 = 10 (1010) +55 + 36 = 11 (1011) +55 + 37 = 12 (1100) +55 + 38 = 13 (1101) +55 + 39 = 14 (1110) +55 + 40 = 15 (1111) +55 + 41 = 0 (0000) +55 + 42 = 1 (0001) +55 + 43 = 2 (0010) +55 + 44 = 3 (0011) +55 + 45 = 4 (0100) +55 + 46 = 5 (0101) +55 + 47 = 6 (0110) +55 + 48 = 7 (0111) +55 + 49 = 8 (1000) +55 + 50 = 9 (1001) +55 + 51 = 10 (1010) +55 + 52 = 11 (1011) +55 + 53 = 12 (1100) +55 + 54 = 13 (1101) +55 + 55 = 14 (1110) +55 + 56 = 15 (1111) +55 + 57 = 0 (0000) +55 + 58 = 1 (0001) +55 + 59 = 2 (0010) +55 + 60 = 3 (0011) +55 + 61 = 4 (0100) +55 + 62 = 5 (0101) +55 + 63 = 6 (0110) +56 + 0 = 8 (1000) +56 + 1 = 9 (1001) +56 + 2 = 10 (1010) +56 + 3 = 11 (1011) +56 + 4 = 12 (1100) +56 + 5 = 13 (1101) +56 + 6 = 14 (1110) +56 + 7 = 15 (1111) +56 + 8 = 0 (0000) +56 + 9 = 1 (0001) +56 + 10 = 2 (0010) +56 + 11 = 3 (0011) +56 + 12 = 4 (0100) +56 + 13 = 5 (0101) +56 + 14 = 6 (0110) +56 + 15 = 7 (0111) +56 + 16 = 8 (1000) +56 + 17 = 9 (1001) +56 + 18 = 10 (1010) +56 + 19 = 11 (1011) +56 + 20 = 12 (1100) +56 + 21 = 13 (1101) +56 + 22 = 14 (1110) +56 + 23 = 15 (1111) +56 + 24 = 0 (0000) +56 + 25 = 1 (0001) +56 + 26 = 2 (0010) +56 + 27 = 3 (0011) +56 + 28 = 4 (0100) +56 + 29 = 5 (0101) +56 + 30 = 6 (0110) +56 + 31 = 7 (0111) +56 + 32 = 8 (1000) +56 + 33 = 9 (1001) +56 + 34 = 10 (1010) +56 + 35 = 11 (1011) +56 + 36 = 12 (1100) +56 + 37 = 13 (1101) +56 + 38 = 14 (1110) +56 + 39 = 15 (1111) +56 + 40 = 0 (0000) +56 + 41 = 1 (0001) +56 + 42 = 2 (0010) +56 + 43 = 3 (0011) +56 + 44 = 4 (0100) +56 + 45 = 5 (0101) +56 + 46 = 6 (0110) +56 + 47 = 7 (0111) +56 + 48 = 8 (1000) +56 + 49 = 9 (1001) +56 + 50 = 10 (1010) +56 + 51 = 11 (1011) +56 + 52 = 12 (1100) +56 + 53 = 13 (1101) +56 + 54 = 14 (1110) +56 + 55 = 15 (1111) +56 + 56 = 0 (0000) +56 + 57 = 1 (0001) +56 + 58 = 2 (0010) +56 + 59 = 3 (0011) +56 + 60 = 4 (0100) +56 + 61 = 5 (0101) +56 + 62 = 6 (0110) +56 + 63 = 7 (0111) +57 + 0 = 9 (1001) +57 + 1 = 10 (1010) +57 + 2 = 11 (1011) +57 + 3 = 12 (1100) +57 + 4 = 13 (1101) +57 + 5 = 14 (1110) +57 + 6 = 15 (1111) +57 + 7 = 0 (0000) +57 + 8 = 1 (0001) +57 + 9 = 2 (0010) +57 + 10 = 3 (0011) +57 + 11 = 4 (0100) +57 + 12 = 5 (0101) +57 + 13 = 6 (0110) +57 + 14 = 7 (0111) +57 + 15 = 8 (1000) +57 + 16 = 9 (1001) +57 + 17 = 10 (1010) +57 + 18 = 11 (1011) +57 + 19 = 12 (1100) +57 + 20 = 13 (1101) +57 + 21 = 14 (1110) +57 + 22 = 15 (1111) +57 + 23 = 0 (0000) +57 + 24 = 1 (0001) +57 + 25 = 2 (0010) +57 + 26 = 3 (0011) +57 + 27 = 4 (0100) +57 + 28 = 5 (0101) +57 + 29 = 6 (0110) +57 + 30 = 7 (0111) +57 + 31 = 8 (1000) +57 + 32 = 9 (1001) +57 + 33 = 10 (1010) +57 + 34 = 11 (1011) +57 + 35 = 12 (1100) +57 + 36 = 13 (1101) +57 + 37 = 14 (1110) +57 + 38 = 15 (1111) +57 + 39 = 0 (0000) +57 + 40 = 1 (0001) +57 + 41 = 2 (0010) +57 + 42 = 3 (0011) +57 + 43 = 4 (0100) +57 + 44 = 5 (0101) +57 + 45 = 6 (0110) +57 + 46 = 7 (0111) +57 + 47 = 8 (1000) +57 + 48 = 9 (1001) +57 + 49 = 10 (1010) +57 + 50 = 11 (1011) +57 + 51 = 12 (1100) +57 + 52 = 13 (1101) +57 + 53 = 14 (1110) +57 + 54 = 15 (1111) +57 + 55 = 0 (0000) +57 + 56 = 1 (0001) +57 + 57 = 2 (0010) +57 + 58 = 3 (0011) +57 + 59 = 4 (0100) +57 + 60 = 5 (0101) +57 + 61 = 6 (0110) +57 + 62 = 7 (0111) +57 + 63 = 8 (1000) +58 + 0 = 10 (1010) +58 + 1 = 11 (1011) +58 + 2 = 12 (1100) +58 + 3 = 13 (1101) +58 + 4 = 14 (1110) +58 + 5 = 15 (1111) +58 + 6 = 0 (0000) +58 + 7 = 1 (0001) +58 + 8 = 2 (0010) +58 + 9 = 3 (0011) +58 + 10 = 4 (0100) +58 + 11 = 5 (0101) +58 + 12 = 6 (0110) +58 + 13 = 7 (0111) +58 + 14 = 8 (1000) +58 + 15 = 9 (1001) +58 + 16 = 10 (1010) +58 + 17 = 11 (1011) +58 + 18 = 12 (1100) +58 + 19 = 13 (1101) +58 + 20 = 14 (1110) +58 + 21 = 15 (1111) +58 + 22 = 0 (0000) +58 + 23 = 1 (0001) +58 + 24 = 2 (0010) +58 + 25 = 3 (0011) +58 + 26 = 4 (0100) +58 + 27 = 5 (0101) +58 + 28 = 6 (0110) +58 + 29 = 7 (0111) +58 + 30 = 8 (1000) +58 + 31 = 9 (1001) +58 + 32 = 10 (1010) +58 + 33 = 11 (1011) +58 + 34 = 12 (1100) +58 + 35 = 13 (1101) +58 + 36 = 14 (1110) +58 + 37 = 15 (1111) +58 + 38 = 0 (0000) +58 + 39 = 1 (0001) +58 + 40 = 2 (0010) +58 + 41 = 3 (0011) +58 + 42 = 4 (0100) +58 + 43 = 5 (0101) +58 + 44 = 6 (0110) +58 + 45 = 7 (0111) +58 + 46 = 8 (1000) +58 + 47 = 9 (1001) +58 + 48 = 10 (1010) +58 + 49 = 11 (1011) +58 + 50 = 12 (1100) +58 + 51 = 13 (1101) +58 + 52 = 14 (1110) +58 + 53 = 15 (1111) +58 + 54 = 0 (0000) +58 + 55 = 1 (0001) +58 + 56 = 2 (0010) +58 + 57 = 3 (0011) +58 + 58 = 4 (0100) +58 + 59 = 5 (0101) +58 + 60 = 6 (0110) +58 + 61 = 7 (0111) +58 + 62 = 8 (1000) +58 + 63 = 9 (1001) +59 + 0 = 11 (1011) +59 + 1 = 12 (1100) +59 + 2 = 13 (1101) +59 + 3 = 14 (1110) +59 + 4 = 15 (1111) +59 + 5 = 0 (0000) +59 + 6 = 1 (0001) +59 + 7 = 2 (0010) +59 + 8 = 3 (0011) +59 + 9 = 4 (0100) +59 + 10 = 5 (0101) +59 + 11 = 6 (0110) +59 + 12 = 7 (0111) +59 + 13 = 8 (1000) +59 + 14 = 9 (1001) +59 + 15 = 10 (1010) +59 + 16 = 11 (1011) +59 + 17 = 12 (1100) +59 + 18 = 13 (1101) +59 + 19 = 14 (1110) +59 + 20 = 15 (1111) +59 + 21 = 0 (0000) +59 + 22 = 1 (0001) +59 + 23 = 2 (0010) +59 + 24 = 3 (0011) +59 + 25 = 4 (0100) +59 + 26 = 5 (0101) +59 + 27 = 6 (0110) +59 + 28 = 7 (0111) +59 + 29 = 8 (1000) +59 + 30 = 9 (1001) +59 + 31 = 10 (1010) +59 + 32 = 11 (1011) +59 + 33 = 12 (1100) +59 + 34 = 13 (1101) +59 + 35 = 14 (1110) +59 + 36 = 15 (1111) +59 + 37 = 0 (0000) +59 + 38 = 1 (0001) +59 + 39 = 2 (0010) +59 + 40 = 3 (0011) +59 + 41 = 4 (0100) +59 + 42 = 5 (0101) +59 + 43 = 6 (0110) +59 + 44 = 7 (0111) +59 + 45 = 8 (1000) +59 + 46 = 9 (1001) +59 + 47 = 10 (1010) +59 + 48 = 11 (1011) +59 + 49 = 12 (1100) +59 + 50 = 13 (1101) +59 + 51 = 14 (1110) +59 + 52 = 15 (1111) +59 + 53 = 0 (0000) +59 + 54 = 1 (0001) +59 + 55 = 2 (0010) +59 + 56 = 3 (0011) +59 + 57 = 4 (0100) +59 + 58 = 5 (0101) +59 + 59 = 6 (0110) +59 + 60 = 7 (0111) +59 + 61 = 8 (1000) +59 + 62 = 9 (1001) +59 + 63 = 10 (1010) +60 + 0 = 12 (1100) +60 + 1 = 13 (1101) +60 + 2 = 14 (1110) +60 + 3 = 15 (1111) +60 + 4 = 0 (0000) +60 + 5 = 1 (0001) +60 + 6 = 2 (0010) +60 + 7 = 3 (0011) +60 + 8 = 4 (0100) +60 + 9 = 5 (0101) +60 + 10 = 6 (0110) +60 + 11 = 7 (0111) +60 + 12 = 8 (1000) +60 + 13 = 9 (1001) +60 + 14 = 10 (1010) +60 + 15 = 11 (1011) +60 + 16 = 12 (1100) +60 + 17 = 13 (1101) +60 + 18 = 14 (1110) +60 + 19 = 15 (1111) +60 + 20 = 0 (0000) +60 + 21 = 1 (0001) +60 + 22 = 2 (0010) +60 + 23 = 3 (0011) +60 + 24 = 4 (0100) +60 + 25 = 5 (0101) +60 + 26 = 6 (0110) +60 + 27 = 7 (0111) +60 + 28 = 8 (1000) +60 + 29 = 9 (1001) +60 + 30 = 10 (1010) +60 + 31 = 11 (1011) +60 + 32 = 12 (1100) +60 + 33 = 13 (1101) +60 + 34 = 14 (1110) +60 + 35 = 15 (1111) +60 + 36 = 0 (0000) +60 + 37 = 1 (0001) +60 + 38 = 2 (0010) +60 + 39 = 3 (0011) +60 + 40 = 4 (0100) +60 + 41 = 5 (0101) +60 + 42 = 6 (0110) +60 + 43 = 7 (0111) +60 + 44 = 8 (1000) +60 + 45 = 9 (1001) +60 + 46 = 10 (1010) +60 + 47 = 11 (1011) +60 + 48 = 12 (1100) +60 + 49 = 13 (1101) +60 + 50 = 14 (1110) +60 + 51 = 15 (1111) +60 + 52 = 0 (0000) +60 + 53 = 1 (0001) +60 + 54 = 2 (0010) +60 + 55 = 3 (0011) +60 + 56 = 4 (0100) +60 + 57 = 5 (0101) +60 + 58 = 6 (0110) +60 + 59 = 7 (0111) +60 + 60 = 8 (1000) +60 + 61 = 9 (1001) +60 + 62 = 10 (1010) +60 + 63 = 11 (1011) +61 + 0 = 13 (1101) +61 + 1 = 14 (1110) +61 + 2 = 15 (1111) +61 + 3 = 0 (0000) +61 + 4 = 1 (0001) +61 + 5 = 2 (0010) +61 + 6 = 3 (0011) +61 + 7 = 4 (0100) +61 + 8 = 5 (0101) +61 + 9 = 6 (0110) +61 + 10 = 7 (0111) +61 + 11 = 8 (1000) +61 + 12 = 9 (1001) +61 + 13 = 10 (1010) +61 + 14 = 11 (1011) +61 + 15 = 12 (1100) +61 + 16 = 13 (1101) +61 + 17 = 14 (1110) +61 + 18 = 15 (1111) +61 + 19 = 0 (0000) +61 + 20 = 1 (0001) +61 + 21 = 2 (0010) +61 + 22 = 3 (0011) +61 + 23 = 4 (0100) +61 + 24 = 5 (0101) +61 + 25 = 6 (0110) +61 + 26 = 7 (0111) +61 + 27 = 8 (1000) +61 + 28 = 9 (1001) +61 + 29 = 10 (1010) +61 + 30 = 11 (1011) +61 + 31 = 12 (1100) +61 + 32 = 13 (1101) +61 + 33 = 14 (1110) +61 + 34 = 15 (1111) +61 + 35 = 0 (0000) +61 + 36 = 1 (0001) +61 + 37 = 2 (0010) +61 + 38 = 3 (0011) +61 + 39 = 4 (0100) +61 + 40 = 5 (0101) +61 + 41 = 6 (0110) +61 + 42 = 7 (0111) +61 + 43 = 8 (1000) +61 + 44 = 9 (1001) +61 + 45 = 10 (1010) +61 + 46 = 11 (1011) +61 + 47 = 12 (1100) +61 + 48 = 13 (1101) +61 + 49 = 14 (1110) +61 + 50 = 15 (1111) +61 + 51 = 0 (0000) +61 + 52 = 1 (0001) +61 + 53 = 2 (0010) +61 + 54 = 3 (0011) +61 + 55 = 4 (0100) +61 + 56 = 5 (0101) +61 + 57 = 6 (0110) +61 + 58 = 7 (0111) +61 + 59 = 8 (1000) +61 + 60 = 9 (1001) +61 + 61 = 10 (1010) +61 + 62 = 11 (1011) +61 + 63 = 12 (1100) +62 + 0 = 14 (1110) +62 + 1 = 15 (1111) +62 + 2 = 0 (0000) +62 + 3 = 1 (0001) +62 + 4 = 2 (0010) +62 + 5 = 3 (0011) +62 + 6 = 4 (0100) +62 + 7 = 5 (0101) +62 + 8 = 6 (0110) +62 + 9 = 7 (0111) +62 + 10 = 8 (1000) +62 + 11 = 9 (1001) +62 + 12 = 10 (1010) +62 + 13 = 11 (1011) +62 + 14 = 12 (1100) +62 + 15 = 13 (1101) +62 + 16 = 14 (1110) +62 + 17 = 15 (1111) +62 + 18 = 0 (0000) +62 + 19 = 1 (0001) +62 + 20 = 2 (0010) +62 + 21 = 3 (0011) +62 + 22 = 4 (0100) +62 + 23 = 5 (0101) +62 + 24 = 6 (0110) +62 + 25 = 7 (0111) +62 + 26 = 8 (1000) +62 + 27 = 9 (1001) +62 + 28 = 10 (1010) +62 + 29 = 11 (1011) +62 + 30 = 12 (1100) +62 + 31 = 13 (1101) +62 + 32 = 14 (1110) +62 + 33 = 15 (1111) +62 + 34 = 0 (0000) +62 + 35 = 1 (0001) +62 + 36 = 2 (0010) +62 + 37 = 3 (0011) +62 + 38 = 4 (0100) +62 + 39 = 5 (0101) +62 + 40 = 6 (0110) +62 + 41 = 7 (0111) +62 + 42 = 8 (1000) +62 + 43 = 9 (1001) +62 + 44 = 10 (1010) +62 + 45 = 11 (1011) +62 + 46 = 12 (1100) +62 + 47 = 13 (1101) +62 + 48 = 14 (1110) +62 + 49 = 15 (1111) +62 + 50 = 0 (0000) +62 + 51 = 1 (0001) +62 + 52 = 2 (0010) +62 + 53 = 3 (0011) +62 + 54 = 4 (0100) +62 + 55 = 5 (0101) +62 + 56 = 6 (0110) +62 + 57 = 7 (0111) +62 + 58 = 8 (1000) +62 + 59 = 9 (1001) +62 + 60 = 10 (1010) +62 + 61 = 11 (1011) +62 + 62 = 12 (1100) +62 + 63 = 13 (1101) +63 + 0 = 15 (1111) +63 + 1 = 0 (0000) +63 + 2 = 1 (0001) +63 + 3 = 2 (0010) +63 + 4 = 3 (0011) +63 + 5 = 4 (0100) +63 + 6 = 5 (0101) +63 + 7 = 6 (0110) +63 + 8 = 7 (0111) +63 + 9 = 8 (1000) +63 + 10 = 9 (1001) +63 + 11 = 10 (1010) +63 + 12 = 11 (1011) +63 + 13 = 12 (1100) +63 + 14 = 13 (1101) +63 + 15 = 14 (1110) +63 + 16 = 15 (1111) +63 + 17 = 0 (0000) +63 + 18 = 1 (0001) +63 + 19 = 2 (0010) +63 + 20 = 3 (0011) +63 + 21 = 4 (0100) +63 + 22 = 5 (0101) +63 + 23 = 6 (0110) +63 + 24 = 7 (0111) +63 + 25 = 8 (1000) +63 + 26 = 9 (1001) +63 + 27 = 10 (1010) +63 + 28 = 11 (1011) +63 + 29 = 12 (1100) +63 + 30 = 13 (1101) +63 + 31 = 14 (1110) +63 + 32 = 15 (1111) +63 + 33 = 0 (0000) +63 + 34 = 1 (0001) +63 + 35 = 2 (0010) +63 + 36 = 3 (0011) +63 + 37 = 4 (0100) +63 + 38 = 5 (0101) +63 + 39 = 6 (0110) +63 + 40 = 7 (0111) +63 + 41 = 8 (1000) +63 + 42 = 9 (1001) +63 + 43 = 10 (1010) +63 + 44 = 11 (1011) +63 + 45 = 12 (1100) +63 + 46 = 13 (1101) +63 + 47 = 14 (1110) +63 + 48 = 15 (1111) +63 + 49 = 0 (0000) +63 + 50 = 1 (0001) +63 + 51 = 2 (0010) +63 + 52 = 3 (0011) +63 + 53 = 4 (0100) +63 + 54 = 5 (0101) +63 + 55 = 6 (0110) +63 + 56 = 7 (0111) +63 + 57 = 8 (1000) +63 + 58 = 9 (1001) +63 + 59 = 10 (1010) +63 + 60 = 11 (1011) +63 + 61 = 12 (1100) +63 + 62 = 13 (1101) +63 + 63 = 14 (1110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/main.cpp new file mode 100644 index 000000000..be64495c4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 4-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 4; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector4 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/stimgen.h new file mode 100644 index 000000000..5a95ce7a8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/truncation.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/truncation.f new file mode 100644 index 000000000..d35040a90 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/truncation.f @@ -0,0 +1,3 @@ +truncation/datawidth.cpp +truncation/stimgen.cpp +truncation/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/README b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/README new file mode 100644 index 000000000..6d77c7cbb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/README @@ -0,0 +1,9 @@ +bits_to_bits 7-bit = 6-bit + 6-bit +lost_carry 6-bit = 6-bit + 6-bit +extension 9-bit = 6-bit + 6-bit +truncation 4-bit = 6-bit + 6-bit + +promote 7-bit = 4-bit + 6-bit +promote_lost_carry 6-bit = 4-bit + 6-bit +promote_extension 9-bit = 4-bit + 6-bit +promote_truncation 4-bit = 4-bit + 6-bit diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/bits_to_bits.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/bits_to_bits.f new file mode 100644 index 000000000..9fcbb2977 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/bits_to_bits.f @@ -0,0 +1,3 @@ +bits_to_bits/datawidth.cpp +bits_to_bits/stimgen.cpp +bits_to_bits/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/common.h new file mode 100644 index 000000000..d0b50248c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector6; +typedef sc_signal > signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/datawidth.cpp new file mode 100644 index 000000000..25913d4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_signed tmp_a (in1_width); + sc_signed tmp_b (in2_width); + sc_signed tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/datawidth.h new file mode 100644 index 000000000..df7ca5b2e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector7& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector7& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/golden/bits_to_bits.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/golden/bits_to_bits.log new file mode 100644 index 000000000..4bf4390b9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/golden/bits_to_bits.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + -32 = -32 (1100000) +0 + -31 = -31 (1100001) +0 + -30 = -30 (1100010) +0 + -29 = -29 (1100011) +0 + -28 = -28 (1100100) +0 + -27 = -27 (1100101) +0 + -26 = -26 (1100110) +0 + -25 = -25 (1100111) +0 + -24 = -24 (1101000) +0 + -23 = -23 (1101001) +0 + -22 = -22 (1101010) +0 + -21 = -21 (1101011) +0 + -20 = -20 (1101100) +0 + -19 = -19 (1101101) +0 + -18 = -18 (1101110) +0 + -17 = -17 (1101111) +0 + -16 = -16 (1110000) +0 + -15 = -15 (1110001) +0 + -14 = -14 (1110010) +0 + -13 = -13 (1110011) +0 + -12 = -12 (1110100) +0 + -11 = -11 (1110101) +0 + -10 = -10 (1110110) +0 + -9 = -9 (1110111) +0 + -8 = -8 (1111000) +0 + -7 = -7 (1111001) +0 + -6 = -6 (1111010) +0 + -5 = -5 (1111011) +0 + -4 = -4 (1111100) +0 + -3 = -3 (1111101) +0 + -2 = -2 (1111110) +0 + -1 = -1 (1111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + -32 = -31 (1100001) +1 + -31 = -30 (1100010) +1 + -30 = -29 (1100011) +1 + -29 = -28 (1100100) +1 + -28 = -27 (1100101) +1 + -27 = -26 (1100110) +1 + -26 = -25 (1100111) +1 + -25 = -24 (1101000) +1 + -24 = -23 (1101001) +1 + -23 = -22 (1101010) +1 + -22 = -21 (1101011) +1 + -21 = -20 (1101100) +1 + -20 = -19 (1101101) +1 + -19 = -18 (1101110) +1 + -18 = -17 (1101111) +1 + -17 = -16 (1110000) +1 + -16 = -15 (1110001) +1 + -15 = -14 (1110010) +1 + -14 = -13 (1110011) +1 + -13 = -12 (1110100) +1 + -12 = -11 (1110101) +1 + -11 = -10 (1110110) +1 + -10 = -9 (1110111) +1 + -9 = -8 (1111000) +1 + -8 = -7 (1111001) +1 + -7 = -6 (1111010) +1 + -6 = -5 (1111011) +1 + -5 = -4 (1111100) +1 + -4 = -3 (1111101) +1 + -3 = -2 (1111110) +1 + -2 = -1 (1111111) +1 + -1 = 0 (0000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + -32 = -30 (1100010) +2 + -31 = -29 (1100011) +2 + -30 = -28 (1100100) +2 + -29 = -27 (1100101) +2 + -28 = -26 (1100110) +2 + -27 = -25 (1100111) +2 + -26 = -24 (1101000) +2 + -25 = -23 (1101001) +2 + -24 = -22 (1101010) +2 + -23 = -21 (1101011) +2 + -22 = -20 (1101100) +2 + -21 = -19 (1101101) +2 + -20 = -18 (1101110) +2 + -19 = -17 (1101111) +2 + -18 = -16 (1110000) +2 + -17 = -15 (1110001) +2 + -16 = -14 (1110010) +2 + -15 = -13 (1110011) +2 + -14 = -12 (1110100) +2 + -13 = -11 (1110101) +2 + -12 = -10 (1110110) +2 + -11 = -9 (1110111) +2 + -10 = -8 (1111000) +2 + -9 = -7 (1111001) +2 + -8 = -6 (1111010) +2 + -7 = -5 (1111011) +2 + -6 = -4 (1111100) +2 + -5 = -3 (1111101) +2 + -4 = -2 (1111110) +2 + -3 = -1 (1111111) +2 + -2 = 0 (0000000) +2 + -1 = 1 (0000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + -32 = -29 (1100011) +3 + -31 = -28 (1100100) +3 + -30 = -27 (1100101) +3 + -29 = -26 (1100110) +3 + -28 = -25 (1100111) +3 + -27 = -24 (1101000) +3 + -26 = -23 (1101001) +3 + -25 = -22 (1101010) +3 + -24 = -21 (1101011) +3 + -23 = -20 (1101100) +3 + -22 = -19 (1101101) +3 + -21 = -18 (1101110) +3 + -20 = -17 (1101111) +3 + -19 = -16 (1110000) +3 + -18 = -15 (1110001) +3 + -17 = -14 (1110010) +3 + -16 = -13 (1110011) +3 + -15 = -12 (1110100) +3 + -14 = -11 (1110101) +3 + -13 = -10 (1110110) +3 + -12 = -9 (1110111) +3 + -11 = -8 (1111000) +3 + -10 = -7 (1111001) +3 + -9 = -6 (1111010) +3 + -8 = -5 (1111011) +3 + -7 = -4 (1111100) +3 + -6 = -3 (1111101) +3 + -5 = -2 (1111110) +3 + -4 = -1 (1111111) +3 + -3 = 0 (0000000) +3 + -2 = 1 (0000001) +3 + -1 = 2 (0000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + -32 = -28 (1100100) +4 + -31 = -27 (1100101) +4 + -30 = -26 (1100110) +4 + -29 = -25 (1100111) +4 + -28 = -24 (1101000) +4 + -27 = -23 (1101001) +4 + -26 = -22 (1101010) +4 + -25 = -21 (1101011) +4 + -24 = -20 (1101100) +4 + -23 = -19 (1101101) +4 + -22 = -18 (1101110) +4 + -21 = -17 (1101111) +4 + -20 = -16 (1110000) +4 + -19 = -15 (1110001) +4 + -18 = -14 (1110010) +4 + -17 = -13 (1110011) +4 + -16 = -12 (1110100) +4 + -15 = -11 (1110101) +4 + -14 = -10 (1110110) +4 + -13 = -9 (1110111) +4 + -12 = -8 (1111000) +4 + -11 = -7 (1111001) +4 + -10 = -6 (1111010) +4 + -9 = -5 (1111011) +4 + -8 = -4 (1111100) +4 + -7 = -3 (1111101) +4 + -6 = -2 (1111110) +4 + -5 = -1 (1111111) +4 + -4 = 0 (0000000) +4 + -3 = 1 (0000001) +4 + -2 = 2 (0000010) +4 + -1 = 3 (0000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + -32 = -27 (1100101) +5 + -31 = -26 (1100110) +5 + -30 = -25 (1100111) +5 + -29 = -24 (1101000) +5 + -28 = -23 (1101001) +5 + -27 = -22 (1101010) +5 + -26 = -21 (1101011) +5 + -25 = -20 (1101100) +5 + -24 = -19 (1101101) +5 + -23 = -18 (1101110) +5 + -22 = -17 (1101111) +5 + -21 = -16 (1110000) +5 + -20 = -15 (1110001) +5 + -19 = -14 (1110010) +5 + -18 = -13 (1110011) +5 + -17 = -12 (1110100) +5 + -16 = -11 (1110101) +5 + -15 = -10 (1110110) +5 + -14 = -9 (1110111) +5 + -13 = -8 (1111000) +5 + -12 = -7 (1111001) +5 + -11 = -6 (1111010) +5 + -10 = -5 (1111011) +5 + -9 = -4 (1111100) +5 + -8 = -3 (1111101) +5 + -7 = -2 (1111110) +5 + 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(0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + -32 = -19 (1101101) +13 + -31 = -18 (1101110) +13 + -30 = -17 (1101111) +13 + -29 = -16 (1110000) +13 + -28 = -15 (1110001) +13 + -27 = -14 (1110010) +13 + -26 = -13 (1110011) +13 + -25 = -12 (1110100) +13 + -24 = -11 (1110101) +13 + -23 = -10 (1110110) +13 + -22 = -9 (1110111) +13 + -21 = -8 (1111000) +13 + -20 = -7 (1111001) +13 + -19 = -6 (1111010) +13 + -18 = -5 (1111011) +13 + -17 = -4 (1111100) +13 + -16 = -3 (1111101) +13 + -15 = -2 (1111110) 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28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + -32 = -18 (1101110) +14 + -31 = -17 (1101111) +14 + -30 = -16 (1110000) +14 + -29 = -15 (1110001) +14 + -28 = -14 (1110010) +14 + -27 = -13 (1110011) +14 + -26 = -12 (1110100) +14 + -25 = -11 (1110101) +14 + -24 = -10 (1110110) +14 + -23 = -9 (1110111) +14 + -22 = -8 (1111000) +14 + -21 = -7 (1111001) +14 + -20 = -6 (1111010) +14 + -19 = -5 (1111011) +14 + -18 = -4 (1111100) +14 + -17 = -3 (1111101) +14 + -16 = -2 (1111110) +14 + -15 = -1 (1111111) +14 + -14 = 0 (0000000) +14 + -13 = 1 (0000001) +14 + -12 = 2 (0000010) +14 + -11 = 3 (0000011) +14 + -10 = 4 (0000100) +14 + -9 = 5 (0000101) +14 + -8 = 6 (0000110) +14 + -7 = 7 (0000111) +14 + -6 = 8 (0001000) +14 + -5 = 9 (0001001) +14 + -4 = 10 (0001010) +14 + -3 = 11 (0001011) +14 + -2 = 12 (0001100) +14 + -1 = 13 (0001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + -32 = -17 (1101111) +15 + -31 = -16 (1110000) +15 + -30 = -15 (1110001) +15 + -29 = -14 (1110010) +15 + -28 = -13 (1110011) +15 + -27 = -12 (1110100) +15 + -26 = -11 (1110101) +15 + -25 = -10 (1110110) +15 + -24 = -9 (1110111) +15 + -23 = -8 (1111000) +15 + -22 = -7 (1111001) +15 + -21 = -6 (1111010) +15 + -20 = -5 (1111011) +15 + -19 = -4 (1111100) +15 + -18 = -3 (1111101) +15 + -17 = -2 (1111110) +15 + -16 = -1 (1111111) +15 + -15 = 0 (0000000) +15 + -14 = 1 (0000001) +15 + -13 = 2 (0000010) +15 + -12 = 3 (0000011) +15 + -11 = 4 (0000100) +15 + -10 = 5 (0000101) +15 + -9 = 6 (0000110) +15 + -8 = 7 (0000111) +15 + -7 = 8 (0001000) +15 + -6 = 9 (0001001) +15 + -5 = 10 (0001010) +15 + -4 = 11 (0001011) +15 + -3 = 12 (0001100) +15 + -2 = 13 (0001101) +15 + -1 = 14 (0001110) +16 + 0 = 16 (0010000) +16 + 1 = 17 (0010001) +16 + 2 = 18 (0010010) +16 + 3 = 19 (0010011) +16 + 4 = 20 (0010100) +16 + 5 = 21 (0010101) +16 + 6 = 22 (0010110) +16 + 7 = 23 (0010111) +16 + 8 = 24 (0011000) +16 + 9 = 25 (0011001) +16 + 10 = 26 (0011010) +16 + 11 = 27 (0011011) +16 + 12 = 28 (0011100) +16 + 13 = 29 (0011101) +16 + 14 = 30 (0011110) +16 + 15 = 31 (0011111) +16 + 16 = 32 (0100000) +16 + 17 = 33 (0100001) +16 + 18 = 34 (0100010) +16 + 19 = 35 (0100011) +16 + 20 = 36 (0100100) +16 + 21 = 37 (0100101) +16 + 22 = 38 (0100110) +16 + 23 = 39 (0100111) +16 + 24 = 40 (0101000) +16 + 25 = 41 (0101001) +16 + 26 = 42 (0101010) +16 + 27 = 43 (0101011) +16 + 28 = 44 (0101100) +16 + 29 = 45 (0101101) +16 + 30 = 46 (0101110) +16 + 31 = 47 (0101111) +16 + -32 = -16 (1110000) +16 + -31 = -15 (1110001) +16 + -30 = -14 (1110010) +16 + -29 = -13 (1110011) +16 + -28 = -12 (1110100) +16 + -27 = -11 (1110101) +16 + -26 = -10 (1110110) +16 + -25 = -9 (1110111) +16 + -24 = -8 (1111000) +16 + -23 = -7 (1111001) +16 + -22 = -6 (1111010) +16 + -21 = -5 (1111011) +16 + -20 = -4 (1111100) +16 + -19 = -3 (1111101) +16 + -18 = -2 (1111110) +16 + -17 = -1 (1111111) +16 + -16 = 0 (0000000) +16 + -15 = 1 (0000001) +16 + -14 = 2 (0000010) +16 + -13 = 3 (0000011) +16 + -12 = 4 (0000100) +16 + -11 = 5 (0000101) +16 + -10 = 6 (0000110) +16 + -9 = 7 (0000111) +16 + -8 = 8 (0001000) +16 + -7 = 9 (0001001) +16 + -6 = 10 (0001010) +16 + -5 = 11 (0001011) +16 + -4 = 12 (0001100) +16 + -3 = 13 (0001101) +16 + -2 = 14 (0001110) +16 + -1 = 15 (0001111) +17 + 0 = 17 (0010001) +17 + 1 = 18 (0010010) +17 + 2 = 19 (0010011) +17 + 3 = 20 (0010100) +17 + 4 = 21 (0010101) +17 + 5 = 22 (0010110) +17 + 6 = 23 (0010111) +17 + 7 = 24 (0011000) +17 + 8 = 25 (0011001) +17 + 9 = 26 (0011010) +17 + 10 = 27 (0011011) +17 + 11 = 28 (0011100) +17 + 12 = 29 (0011101) +17 + 13 = 30 (0011110) +17 + 14 = 31 (0011111) +17 + 15 = 32 (0100000) +17 + 16 = 33 (0100001) +17 + 17 = 34 (0100010) +17 + 18 = 35 (0100011) +17 + 19 = 36 (0100100) +17 + 20 = 37 (0100101) +17 + 21 = 38 (0100110) +17 + 22 = 39 (0100111) +17 + 23 = 40 (0101000) +17 + 24 = 41 (0101001) +17 + 25 = 42 (0101010) +17 + 26 = 43 (0101011) +17 + 27 = 44 (0101100) +17 + 28 = 45 (0101101) +17 + 29 = 46 (0101110) +17 + 30 = 47 (0101111) +17 + 31 = 48 (0110000) +17 + -32 = -15 (1110001) +17 + -31 = -14 (1110010) +17 + -30 = -13 (1110011) +17 + -29 = -12 (1110100) +17 + -28 = -11 (1110101) +17 + -27 = -10 (1110110) +17 + -26 = -9 (1110111) +17 + -25 = -8 (1111000) +17 + -24 = -7 (1111001) +17 + -23 = -6 (1111010) +17 + -22 = -5 (1111011) +17 + -21 = -4 (1111100) +17 + -20 = -3 (1111101) +17 + -19 = -2 (1111110) +17 + -18 = -1 (1111111) +17 + -17 = 0 (0000000) +17 + -16 = 1 (0000001) +17 + -15 = 2 (0000010) +17 + -14 = 3 (0000011) +17 + -13 = 4 (0000100) +17 + -12 = 5 (0000101) +17 + -11 = 6 (0000110) +17 + -10 = 7 (0000111) +17 + -9 = 8 (0001000) +17 + -8 = 9 (0001001) +17 + -7 = 10 (0001010) +17 + -6 = 11 (0001011) +17 + -5 = 12 (0001100) +17 + -4 = 13 (0001101) +17 + -3 = 14 (0001110) +17 + -2 = 15 (0001111) +17 + -1 = 16 (0010000) +18 + 0 = 18 (0010010) +18 + 1 = 19 (0010011) +18 + 2 = 20 (0010100) +18 + 3 = 21 (0010101) +18 + 4 = 22 (0010110) +18 + 5 = 23 (0010111) +18 + 6 = 24 (0011000) +18 + 7 = 25 (0011001) +18 + 8 = 26 (0011010) +18 + 9 = 27 (0011011) +18 + 10 = 28 (0011100) +18 + 11 = 29 (0011101) +18 + 12 = 30 (0011110) +18 + 13 = 31 (0011111) +18 + 14 = 32 (0100000) +18 + 15 = 33 (0100001) +18 + 16 = 34 (0100010) +18 + 17 = 35 (0100011) +18 + 18 = 36 (0100100) +18 + 19 = 37 (0100101) +18 + 20 = 38 (0100110) +18 + 21 = 39 (0100111) +18 + 22 = 40 (0101000) +18 + 23 = 41 (0101001) +18 + 24 = 42 (0101010) +18 + 25 = 43 (0101011) +18 + 26 = 44 (0101100) +18 + 27 = 45 (0101101) +18 + 28 = 46 (0101110) +18 + 29 = 47 (0101111) +18 + 30 = 48 (0110000) +18 + 31 = 49 (0110001) +18 + -32 = -14 (1110010) +18 + -31 = -13 (1110011) +18 + -30 = -12 (1110100) +18 + -29 = -11 (1110101) +18 + -28 = -10 (1110110) +18 + -27 = -9 (1110111) +18 + -26 = -8 (1111000) +18 + -25 = -7 (1111001) +18 + -24 = -6 (1111010) +18 + -23 = -5 (1111011) +18 + -22 = -4 (1111100) +18 + -21 = -3 (1111101) +18 + -20 = -2 (1111110) +18 + -19 = -1 (1111111) +18 + -18 = 0 (0000000) +18 + -17 = 1 (0000001) +18 + -16 = 2 (0000010) +18 + -15 = 3 (0000011) +18 + -14 = 4 (0000100) +18 + -13 = 5 (0000101) +18 + -12 = 6 (0000110) +18 + -11 = 7 (0000111) +18 + -10 = 8 (0001000) +18 + -9 = 9 (0001001) +18 + -8 = 10 (0001010) +18 + -7 = 11 (0001011) +18 + -6 = 12 (0001100) +18 + -5 = 13 (0001101) +18 + -4 = 14 (0001110) +18 + -3 = 15 (0001111) +18 + -2 = 16 (0010000) +18 + -1 = 17 (0010001) +19 + 0 = 19 (0010011) +19 + 1 = 20 (0010100) +19 + 2 = 21 (0010101) +19 + 3 = 22 (0010110) +19 + 4 = 23 (0010111) +19 + 5 = 24 (0011000) +19 + 6 = 25 (0011001) +19 + 7 = 26 (0011010) +19 + 8 = 27 (0011011) +19 + 9 = 28 (0011100) +19 + 10 = 29 (0011101) +19 + 11 = 30 (0011110) +19 + 12 = 31 (0011111) +19 + 13 = 32 (0100000) +19 + 14 = 33 (0100001) +19 + 15 = 34 (0100010) +19 + 16 = 35 (0100011) +19 + 17 = 36 (0100100) +19 + 18 = 37 (0100101) +19 + 19 = 38 (0100110) +19 + 20 = 39 (0100111) +19 + 21 = 40 (0101000) +19 + 22 = 41 (0101001) +19 + 23 = 42 (0101010) +19 + 24 = 43 (0101011) +19 + 25 = 44 (0101100) +19 + 26 = 45 (0101101) +19 + 27 = 46 (0101110) +19 + 28 = 47 (0101111) +19 + 29 = 48 (0110000) +19 + 30 = 49 (0110001) +19 + 31 = 50 (0110010) +19 + -32 = -13 (1110011) +19 + -31 = -12 (1110100) +19 + -30 = -11 (1110101) +19 + -29 = -10 (1110110) +19 + -28 = -9 (1110111) +19 + -27 = -8 (1111000) +19 + -26 = -7 (1111001) +19 + -25 = -6 (1111010) +19 + -24 = -5 (1111011) +19 + -23 = -4 (1111100) +19 + -22 = -3 (1111101) +19 + -21 = -2 (1111110) +19 + -20 = -1 (1111111) +19 + -19 = 0 (0000000) +19 + -18 = 1 (0000001) +19 + -17 = 2 (0000010) +19 + -16 = 3 (0000011) +19 + -15 = 4 (0000100) +19 + -14 = 5 (0000101) +19 + -13 = 6 (0000110) +19 + -12 = 7 (0000111) +19 + -11 = 8 (0001000) +19 + -10 = 9 (0001001) +19 + -9 = 10 (0001010) +19 + -8 = 11 (0001011) +19 + -7 = 12 (0001100) +19 + -6 = 13 (0001101) +19 + -5 = 14 (0001110) +19 + -4 = 15 (0001111) +19 + -3 = 16 (0010000) +19 + -2 = 17 (0010001) +19 + -1 = 18 (0010010) +20 + 0 = 20 (0010100) +20 + 1 = 21 (0010101) +20 + 2 = 22 (0010110) +20 + 3 = 23 (0010111) +20 + 4 = 24 (0011000) +20 + 5 = 25 (0011001) +20 + 6 = 26 (0011010) +20 + 7 = 27 (0011011) +20 + 8 = 28 (0011100) +20 + 9 = 29 (0011101) +20 + 10 = 30 (0011110) +20 + 11 = 31 (0011111) +20 + 12 = 32 (0100000) +20 + 13 = 33 (0100001) +20 + 14 = 34 (0100010) +20 + 15 = 35 (0100011) +20 + 16 = 36 (0100100) +20 + 17 = 37 (0100101) +20 + 18 = 38 (0100110) +20 + 19 = 39 (0100111) +20 + 20 = 40 (0101000) +20 + 21 = 41 (0101001) +20 + 22 = 42 (0101010) +20 + 23 = 43 (0101011) +20 + 24 = 44 (0101100) +20 + 25 = 45 (0101101) +20 + 26 = 46 (0101110) +20 + 27 = 47 (0101111) +20 + 28 = 48 (0110000) +20 + 29 = 49 (0110001) +20 + 30 = 50 (0110010) +20 + 31 = 51 (0110011) +20 + -32 = -12 (1110100) +20 + -31 = -11 (1110101) +20 + -30 = -10 (1110110) +20 + -29 = -9 (1110111) +20 + -28 = -8 (1111000) +20 + -27 = -7 (1111001) +20 + -26 = -6 (1111010) +20 + -25 = -5 (1111011) +20 + -24 = -4 (1111100) +20 + -23 = -3 (1111101) +20 + -22 = -2 (1111110) +20 + -21 = -1 (1111111) +20 + -20 = 0 (0000000) +20 + -19 = 1 (0000001) +20 + -18 = 2 (0000010) +20 + -17 = 3 (0000011) +20 + -16 = 4 (0000100) +20 + -15 = 5 (0000101) +20 + -14 = 6 (0000110) +20 + -13 = 7 (0000111) +20 + -12 = 8 (0001000) +20 + -11 = 9 (0001001) +20 + -10 = 10 (0001010) +20 + -9 = 11 (0001011) +20 + -8 = 12 (0001100) +20 + -7 = 13 (0001101) +20 + -6 = 14 (0001110) +20 + -5 = 15 (0001111) +20 + -4 = 16 (0010000) +20 + -3 = 17 (0010001) +20 + -2 = 18 (0010010) +20 + -1 = 19 (0010011) +21 + 0 = 21 (0010101) +21 + 1 = 22 (0010110) +21 + 2 = 23 (0010111) +21 + 3 = 24 (0011000) +21 + 4 = 25 (0011001) +21 + 5 = 26 (0011010) +21 + 6 = 27 (0011011) +21 + 7 = 28 (0011100) +21 + 8 = 29 (0011101) +21 + 9 = 30 (0011110) +21 + 10 = 31 (0011111) +21 + 11 = 32 (0100000) +21 + 12 = 33 (0100001) +21 + 13 = 34 (0100010) +21 + 14 = 35 (0100011) +21 + 15 = 36 (0100100) +21 + 16 = 37 (0100101) +21 + 17 = 38 (0100110) +21 + 18 = 39 (0100111) +21 + 19 = 40 (0101000) +21 + 20 = 41 (0101001) +21 + 21 = 42 (0101010) +21 + 22 = 43 (0101011) +21 + 23 = 44 (0101100) +21 + 24 = 45 (0101101) +21 + 25 = 46 (0101110) +21 + 26 = 47 (0101111) +21 + 27 = 48 (0110000) +21 + 28 = 49 (0110001) +21 + 29 = 50 (0110010) +21 + 30 = 51 (0110011) +21 + 31 = 52 (0110100) +21 + -32 = -11 (1110101) +21 + -31 = -10 (1110110) +21 + -30 = -9 (1110111) +21 + -29 = -8 (1111000) +21 + -28 = -7 (1111001) +21 + -27 = -6 (1111010) +21 + -26 = -5 (1111011) +21 + -25 = -4 (1111100) +21 + -24 = -3 (1111101) +21 + -23 = -2 (1111110) +21 + -22 = -1 (1111111) +21 + -21 = 0 (0000000) +21 + -20 = 1 (0000001) +21 + -19 = 2 (0000010) +21 + -18 = 3 (0000011) +21 + -17 = 4 (0000100) +21 + -16 = 5 (0000101) +21 + -15 = 6 (0000110) +21 + -14 = 7 (0000111) +21 + -13 = 8 (0001000) +21 + -12 = 9 (0001001) +21 + -11 = 10 (0001010) +21 + -10 = 11 (0001011) +21 + -9 = 12 (0001100) +21 + -8 = 13 (0001101) +21 + -7 = 14 (0001110) +21 + -6 = 15 (0001111) +21 + -5 = 16 (0010000) +21 + -4 = 17 (0010001) +21 + -3 = 18 (0010010) +21 + -2 = 19 (0010011) +21 + -1 = 20 (0010100) +22 + 0 = 22 (0010110) +22 + 1 = 23 (0010111) +22 + 2 = 24 (0011000) +22 + 3 = 25 (0011001) +22 + 4 = 26 (0011010) +22 + 5 = 27 (0011011) +22 + 6 = 28 (0011100) +22 + 7 = 29 (0011101) +22 + 8 = 30 (0011110) +22 + 9 = 31 (0011111) +22 + 10 = 32 (0100000) +22 + 11 = 33 (0100001) +22 + 12 = 34 (0100010) +22 + 13 = 35 (0100011) +22 + 14 = 36 (0100100) +22 + 15 = 37 (0100101) +22 + 16 = 38 (0100110) +22 + 17 = 39 (0100111) +22 + 18 = 40 (0101000) +22 + 19 = 41 (0101001) +22 + 20 = 42 (0101010) +22 + 21 = 43 (0101011) +22 + 22 = 44 (0101100) +22 + 23 = 45 (0101101) +22 + 24 = 46 (0101110) +22 + 25 = 47 (0101111) +22 + 26 = 48 (0110000) +22 + 27 = 49 (0110001) +22 + 28 = 50 (0110010) +22 + 29 = 51 (0110011) +22 + 30 = 52 (0110100) +22 + 31 = 53 (0110101) +22 + -32 = -10 (1110110) +22 + -31 = -9 (1110111) +22 + -30 = -8 (1111000) +22 + -29 = -7 (1111001) +22 + -28 = -6 (1111010) +22 + -27 = -5 (1111011) +22 + -26 = -4 (1111100) +22 + -25 = -3 (1111101) +22 + -24 = -2 (1111110) +22 + -23 = -1 (1111111) +22 + -22 = 0 (0000000) +22 + -21 = 1 (0000001) +22 + -20 = 2 (0000010) +22 + -19 = 3 (0000011) +22 + -18 = 4 (0000100) +22 + -17 = 5 (0000101) +22 + -16 = 6 (0000110) +22 + -15 = 7 (0000111) +22 + -14 = 8 (0001000) +22 + -13 = 9 (0001001) +22 + -12 = 10 (0001010) +22 + -11 = 11 (0001011) +22 + -10 = 12 (0001100) +22 + -9 = 13 (0001101) +22 + -8 = 14 (0001110) +22 + -7 = 15 (0001111) +22 + -6 = 16 (0010000) +22 + -5 = 17 (0010001) +22 + -4 = 18 (0010010) +22 + -3 = 19 (0010011) +22 + -2 = 20 (0010100) +22 + -1 = 21 (0010101) +23 + 0 = 23 (0010111) +23 + 1 = 24 (0011000) +23 + 2 = 25 (0011001) +23 + 3 = 26 (0011010) +23 + 4 = 27 (0011011) +23 + 5 = 28 (0011100) +23 + 6 = 29 (0011101) +23 + 7 = 30 (0011110) +23 + 8 = 31 (0011111) +23 + 9 = 32 (0100000) +23 + 10 = 33 (0100001) +23 + 11 = 34 (0100010) +23 + 12 = 35 (0100011) +23 + 13 = 36 (0100100) +23 + 14 = 37 (0100101) +23 + 15 = 38 (0100110) +23 + 16 = 39 (0100111) +23 + 17 = 40 (0101000) +23 + 18 = 41 (0101001) +23 + 19 = 42 (0101010) +23 + 20 = 43 (0101011) +23 + 21 = 44 (0101100) +23 + 22 = 45 (0101101) +23 + 23 = 46 (0101110) +23 + 24 = 47 (0101111) +23 + 25 = 48 (0110000) +23 + 26 = 49 (0110001) +23 + 27 = 50 (0110010) +23 + 28 = 51 (0110011) +23 + 29 = 52 (0110100) +23 + 30 = 53 (0110101) +23 + 31 = 54 (0110110) +23 + -32 = -9 (1110111) +23 + -31 = -8 (1111000) +23 + -30 = -7 (1111001) +23 + -29 = -6 (1111010) +23 + -28 = -5 (1111011) +23 + -27 = -4 (1111100) +23 + -26 = -3 (1111101) +23 + -25 = -2 (1111110) +23 + -24 = -1 (1111111) +23 + -23 = 0 (0000000) +23 + -22 = 1 (0000001) +23 + -21 = 2 (0000010) +23 + -20 = 3 (0000011) +23 + -19 = 4 (0000100) +23 + -18 = 5 (0000101) +23 + -17 = 6 (0000110) +23 + -16 = 7 (0000111) +23 + -15 = 8 (0001000) +23 + -14 = 9 (0001001) +23 + -13 = 10 (0001010) +23 + -12 = 11 (0001011) +23 + -11 = 12 (0001100) +23 + -10 = 13 (0001101) +23 + -9 = 14 (0001110) +23 + -8 = 15 (0001111) +23 + -7 = 16 (0010000) +23 + -6 = 17 (0010001) +23 + -5 = 18 (0010010) +23 + -4 = 19 (0010011) +23 + -3 = 20 (0010100) +23 + -2 = 21 (0010101) +23 + -1 = 22 (0010110) +24 + 0 = 24 (0011000) +24 + 1 = 25 (0011001) +24 + 2 = 26 (0011010) +24 + 3 = 27 (0011011) +24 + 4 = 28 (0011100) +24 + 5 = 29 (0011101) +24 + 6 = 30 (0011110) +24 + 7 = 31 (0011111) +24 + 8 = 32 (0100000) +24 + 9 = 33 (0100001) +24 + 10 = 34 (0100010) +24 + 11 = 35 (0100011) +24 + 12 = 36 (0100100) +24 + 13 = 37 (0100101) +24 + 14 = 38 (0100110) +24 + 15 = 39 (0100111) +24 + 16 = 40 (0101000) +24 + 17 = 41 (0101001) +24 + 18 = 42 (0101010) +24 + 19 = 43 (0101011) +24 + 20 = 44 (0101100) +24 + 21 = 45 (0101101) +24 + 22 = 46 (0101110) +24 + 23 = 47 (0101111) +24 + 24 = 48 (0110000) +24 + 25 = 49 (0110001) +24 + 26 = 50 (0110010) +24 + 27 = 51 (0110011) +24 + 28 = 52 (0110100) +24 + 29 = 53 (0110101) +24 + 30 = 54 (0110110) +24 + 31 = 55 (0110111) +24 + -32 = -8 (1111000) +24 + -31 = -7 (1111001) +24 + -30 = -6 (1111010) +24 + -29 = -5 (1111011) +24 + -28 = -4 (1111100) +24 + -27 = -3 (1111101) +24 + -26 = -2 (1111110) +24 + -25 = -1 (1111111) +24 + -24 = 0 (0000000) +24 + -23 = 1 (0000001) +24 + -22 = 2 (0000010) +24 + -21 = 3 (0000011) +24 + -20 = 4 (0000100) +24 + -19 = 5 (0000101) +24 + -18 = 6 (0000110) +24 + -17 = 7 (0000111) +24 + -16 = 8 (0001000) +24 + -15 = 9 (0001001) +24 + -14 = 10 (0001010) +24 + -13 = 11 (0001011) +24 + -12 = 12 (0001100) +24 + -11 = 13 (0001101) +24 + -10 = 14 (0001110) +24 + -9 = 15 (0001111) +24 + -8 = 16 (0010000) +24 + -7 = 17 (0010001) +24 + -6 = 18 (0010010) +24 + -5 = 19 (0010011) +24 + -4 = 20 (0010100) +24 + -3 = 21 (0010101) +24 + -2 = 22 (0010110) +24 + -1 = 23 (0010111) +25 + 0 = 25 (0011001) +25 + 1 = 26 (0011010) +25 + 2 = 27 (0011011) +25 + 3 = 28 (0011100) +25 + 4 = 29 (0011101) +25 + 5 = 30 (0011110) +25 + 6 = 31 (0011111) +25 + 7 = 32 (0100000) +25 + 8 = 33 (0100001) +25 + 9 = 34 (0100010) +25 + 10 = 35 (0100011) +25 + 11 = 36 (0100100) +25 + 12 = 37 (0100101) +25 + 13 = 38 (0100110) +25 + 14 = 39 (0100111) +25 + 15 = 40 (0101000) +25 + 16 = 41 (0101001) +25 + 17 = 42 (0101010) +25 + 18 = 43 (0101011) +25 + 19 = 44 (0101100) +25 + 20 = 45 (0101101) +25 + 21 = 46 (0101110) +25 + 22 = 47 (0101111) +25 + 23 = 48 (0110000) +25 + 24 = 49 (0110001) +25 + 25 = 50 (0110010) +25 + 26 = 51 (0110011) +25 + 27 = 52 (0110100) +25 + 28 = 53 (0110101) +25 + 29 = 54 (0110110) +25 + 30 = 55 (0110111) +25 + 31 = 56 (0111000) +25 + -32 = -7 (1111001) +25 + -31 = -6 (1111010) +25 + -30 = -5 (1111011) +25 + -29 = -4 (1111100) +25 + -28 = -3 (1111101) +25 + -27 = -2 (1111110) +25 + -26 = -1 (1111111) +25 + -25 = 0 (0000000) +25 + -24 = 1 (0000001) +25 + -23 = 2 (0000010) +25 + -22 = 3 (0000011) +25 + -21 = 4 (0000100) +25 + -20 = 5 (0000101) +25 + -19 = 6 (0000110) +25 + -18 = 7 (0000111) +25 + -17 = 8 (0001000) +25 + -16 = 9 (0001001) +25 + -15 = 10 (0001010) +25 + -14 = 11 (0001011) +25 + -13 = 12 (0001100) +25 + -12 = 13 (0001101) +25 + -11 = 14 (0001110) +25 + -10 = 15 (0001111) +25 + -9 = 16 (0010000) +25 + -8 = 17 (0010001) +25 + -7 = 18 (0010010) +25 + -6 = 19 (0010011) +25 + -5 = 20 (0010100) +25 + -4 = 21 (0010101) +25 + -3 = 22 (0010110) +25 + -2 = 23 (0010111) +25 + -1 = 24 (0011000) +26 + 0 = 26 (0011010) +26 + 1 = 27 (0011011) +26 + 2 = 28 (0011100) +26 + 3 = 29 (0011101) +26 + 4 = 30 (0011110) +26 + 5 = 31 (0011111) +26 + 6 = 32 (0100000) +26 + 7 = 33 (0100001) +26 + 8 = 34 (0100010) +26 + 9 = 35 (0100011) +26 + 10 = 36 (0100100) +26 + 11 = 37 (0100101) +26 + 12 = 38 (0100110) +26 + 13 = 39 (0100111) +26 + 14 = 40 (0101000) +26 + 15 = 41 (0101001) +26 + 16 = 42 (0101010) +26 + 17 = 43 (0101011) +26 + 18 = 44 (0101100) +26 + 19 = 45 (0101101) +26 + 20 = 46 (0101110) +26 + 21 = 47 (0101111) +26 + 22 = 48 (0110000) +26 + 23 = 49 (0110001) +26 + 24 = 50 (0110010) +26 + 25 = 51 (0110011) +26 + 26 = 52 (0110100) +26 + 27 = 53 (0110101) +26 + 28 = 54 (0110110) +26 + 29 = 55 (0110111) +26 + 30 = 56 (0111000) +26 + 31 = 57 (0111001) +26 + -32 = -6 (1111010) +26 + -31 = -5 (1111011) +26 + -30 = -4 (1111100) +26 + -29 = -3 (1111101) +26 + -28 = -2 (1111110) +26 + -27 = -1 (1111111) +26 + -26 = 0 (0000000) +26 + -25 = 1 (0000001) +26 + -24 = 2 (0000010) +26 + -23 = 3 (0000011) +26 + -22 = 4 (0000100) +26 + -21 = 5 (0000101) +26 + -20 = 6 (0000110) +26 + -19 = 7 (0000111) +26 + -18 = 8 (0001000) +26 + -17 = 9 (0001001) +26 + -16 = 10 (0001010) +26 + -15 = 11 (0001011) +26 + -14 = 12 (0001100) +26 + -13 = 13 (0001101) +26 + -12 = 14 (0001110) +26 + -11 = 15 (0001111) +26 + -10 = 16 (0010000) +26 + -9 = 17 (0010001) +26 + -8 = 18 (0010010) +26 + -7 = 19 (0010011) +26 + -6 = 20 (0010100) +26 + -5 = 21 (0010101) +26 + -4 = 22 (0010110) +26 + -3 = 23 (0010111) +26 + -2 = 24 (0011000) +26 + -1 = 25 (0011001) +27 + 0 = 27 (0011011) +27 + 1 = 28 (0011100) +27 + 2 = 29 (0011101) +27 + 3 = 30 (0011110) +27 + 4 = 31 (0011111) +27 + 5 = 32 (0100000) +27 + 6 = 33 (0100001) +27 + 7 = 34 (0100010) +27 + 8 = 35 (0100011) +27 + 9 = 36 (0100100) +27 + 10 = 37 (0100101) +27 + 11 = 38 (0100110) +27 + 12 = 39 (0100111) +27 + 13 = 40 (0101000) +27 + 14 = 41 (0101001) +27 + 15 = 42 (0101010) +27 + 16 = 43 (0101011) +27 + 17 = 44 (0101100) +27 + 18 = 45 (0101101) +27 + 19 = 46 (0101110) +27 + 20 = 47 (0101111) +27 + 21 = 48 (0110000) +27 + 22 = 49 (0110001) +27 + 23 = 50 (0110010) +27 + 24 = 51 (0110011) +27 + 25 = 52 (0110100) +27 + 26 = 53 (0110101) +27 + 27 = 54 (0110110) +27 + 28 = 55 (0110111) +27 + 29 = 56 (0111000) +27 + 30 = 57 (0111001) +27 + 31 = 58 (0111010) +27 + -32 = -5 (1111011) +27 + -31 = -4 (1111100) +27 + -30 = -3 (1111101) +27 + -29 = -2 (1111110) +27 + -28 = -1 (1111111) +27 + -27 = 0 (0000000) +27 + -26 = 1 (0000001) +27 + -25 = 2 (0000010) +27 + -24 = 3 (0000011) +27 + -23 = 4 (0000100) +27 + -22 = 5 (0000101) +27 + -21 = 6 (0000110) +27 + -20 = 7 (0000111) +27 + -19 = 8 (0001000) +27 + -18 = 9 (0001001) +27 + -17 = 10 (0001010) +27 + -16 = 11 (0001011) +27 + -15 = 12 (0001100) +27 + -14 = 13 (0001101) +27 + -13 = 14 (0001110) +27 + -12 = 15 (0001111) +27 + -11 = 16 (0010000) +27 + -10 = 17 (0010001) +27 + -9 = 18 (0010010) +27 + -8 = 19 (0010011) +27 + -7 = 20 (0010100) +27 + -6 = 21 (0010101) +27 + -5 = 22 (0010110) +27 + -4 = 23 (0010111) +27 + -3 = 24 (0011000) +27 + -2 = 25 (0011001) +27 + -1 = 26 (0011010) +28 + 0 = 28 (0011100) +28 + 1 = 29 (0011101) +28 + 2 = 30 (0011110) +28 + 3 = 31 (0011111) +28 + 4 = 32 (0100000) +28 + 5 = 33 (0100001) +28 + 6 = 34 (0100010) +28 + 7 = 35 (0100011) +28 + 8 = 36 (0100100) +28 + 9 = 37 (0100101) +28 + 10 = 38 (0100110) +28 + 11 = 39 (0100111) +28 + 12 = 40 (0101000) +28 + 13 = 41 (0101001) +28 + 14 = 42 (0101010) +28 + 15 = 43 (0101011) +28 + 16 = 44 (0101100) +28 + 17 = 45 (0101101) +28 + 18 = 46 (0101110) +28 + 19 = 47 (0101111) +28 + 20 = 48 (0110000) +28 + 21 = 49 (0110001) +28 + 22 = 50 (0110010) +28 + 23 = 51 (0110011) +28 + 24 = 52 (0110100) +28 + 25 = 53 (0110101) +28 + 26 = 54 (0110110) +28 + 27 = 55 (0110111) +28 + 28 = 56 (0111000) +28 + 29 = 57 (0111001) +28 + 30 = 58 (0111010) +28 + 31 = 59 (0111011) +28 + -32 = -4 (1111100) +28 + -31 = -3 (1111101) +28 + -30 = -2 (1111110) +28 + -29 = -1 (1111111) +28 + -28 = 0 (0000000) +28 + -27 = 1 (0000001) +28 + -26 = 2 (0000010) +28 + -25 = 3 (0000011) +28 + -24 = 4 (0000100) +28 + -23 = 5 (0000101) +28 + -22 = 6 (0000110) +28 + -21 = 7 (0000111) +28 + -20 = 8 (0001000) +28 + -19 = 9 (0001001) +28 + -18 = 10 (0001010) +28 + -17 = 11 (0001011) +28 + -16 = 12 (0001100) +28 + -15 = 13 (0001101) +28 + -14 = 14 (0001110) +28 + -13 = 15 (0001111) +28 + -12 = 16 (0010000) +28 + -11 = 17 (0010001) +28 + -10 = 18 (0010010) +28 + -9 = 19 (0010011) +28 + -8 = 20 (0010100) +28 + -7 = 21 (0010101) +28 + -6 = 22 (0010110) +28 + -5 = 23 (0010111) +28 + -4 = 24 (0011000) +28 + -3 = 25 (0011001) +28 + -2 = 26 (0011010) +28 + -1 = 27 (0011011) +29 + 0 = 29 (0011101) +29 + 1 = 30 (0011110) +29 + 2 = 31 (0011111) +29 + 3 = 32 (0100000) +29 + 4 = 33 (0100001) +29 + 5 = 34 (0100010) +29 + 6 = 35 (0100011) +29 + 7 = 36 (0100100) +29 + 8 = 37 (0100101) +29 + 9 = 38 (0100110) +29 + 10 = 39 (0100111) +29 + 11 = 40 (0101000) +29 + 12 = 41 (0101001) +29 + 13 = 42 (0101010) +29 + 14 = 43 (0101011) +29 + 15 = 44 (0101100) +29 + 16 = 45 (0101101) +29 + 17 = 46 (0101110) +29 + 18 = 47 (0101111) +29 + 19 = 48 (0110000) +29 + 20 = 49 (0110001) +29 + 21 = 50 (0110010) +29 + 22 = 51 (0110011) +29 + 23 = 52 (0110100) +29 + 24 = 53 (0110101) +29 + 25 = 54 (0110110) +29 + 26 = 55 (0110111) +29 + 27 = 56 (0111000) +29 + 28 = 57 (0111001) +29 + 29 = 58 (0111010) +29 + 30 = 59 (0111011) +29 + 31 = 60 (0111100) +29 + -32 = -3 (1111101) +29 + -31 = -2 (1111110) +29 + -30 = -1 (1111111) +29 + -29 = 0 (0000000) +29 + -28 = 1 (0000001) +29 + -27 = 2 (0000010) +29 + -26 = 3 (0000011) +29 + -25 = 4 (0000100) +29 + -24 = 5 (0000101) +29 + -23 = 6 (0000110) +29 + -22 = 7 (0000111) +29 + -21 = 8 (0001000) +29 + -20 = 9 (0001001) +29 + -19 = 10 (0001010) +29 + -18 = 11 (0001011) +29 + -17 = 12 (0001100) +29 + -16 = 13 (0001101) +29 + -15 = 14 (0001110) +29 + -14 = 15 (0001111) +29 + -13 = 16 (0010000) +29 + -12 = 17 (0010001) +29 + -11 = 18 (0010010) +29 + -10 = 19 (0010011) +29 + -9 = 20 (0010100) +29 + -8 = 21 (0010101) +29 + -7 = 22 (0010110) +29 + -6 = 23 (0010111) +29 + -5 = 24 (0011000) +29 + -4 = 25 (0011001) +29 + -3 = 26 (0011010) +29 + -2 = 27 (0011011) +29 + -1 = 28 (0011100) +30 + 0 = 30 (0011110) +30 + 1 = 31 (0011111) +30 + 2 = 32 (0100000) +30 + 3 = 33 (0100001) +30 + 4 = 34 (0100010) +30 + 5 = 35 (0100011) +30 + 6 = 36 (0100100) +30 + 7 = 37 (0100101) +30 + 8 = 38 (0100110) +30 + 9 = 39 (0100111) +30 + 10 = 40 (0101000) +30 + 11 = 41 (0101001) +30 + 12 = 42 (0101010) +30 + 13 = 43 (0101011) +30 + 14 = 44 (0101100) +30 + 15 = 45 (0101101) +30 + 16 = 46 (0101110) +30 + 17 = 47 (0101111) +30 + 18 = 48 (0110000) +30 + 19 = 49 (0110001) +30 + 20 = 50 (0110010) +30 + 21 = 51 (0110011) +30 + 22 = 52 (0110100) +30 + 23 = 53 (0110101) +30 + 24 = 54 (0110110) +30 + 25 = 55 (0110111) +30 + 26 = 56 (0111000) +30 + 27 = 57 (0111001) +30 + 28 = 58 (0111010) +30 + 29 = 59 (0111011) +30 + 30 = 60 (0111100) +30 + 31 = 61 (0111101) +30 + -32 = -2 (1111110) +30 + -31 = -1 (1111111) +30 + -30 = 0 (0000000) +30 + -29 = 1 (0000001) +30 + -28 = 2 (0000010) +30 + -27 = 3 (0000011) +30 + -26 = 4 (0000100) +30 + -25 = 5 (0000101) +30 + -24 = 6 (0000110) +30 + -23 = 7 (0000111) +30 + -22 = 8 (0001000) +30 + -21 = 9 (0001001) +30 + -20 = 10 (0001010) +30 + -19 = 11 (0001011) +30 + -18 = 12 (0001100) +30 + -17 = 13 (0001101) +30 + -16 = 14 (0001110) +30 + -15 = 15 (0001111) +30 + -14 = 16 (0010000) +30 + -13 = 17 (0010001) +30 + -12 = 18 (0010010) +30 + -11 = 19 (0010011) +30 + -10 = 20 (0010100) +30 + -9 = 21 (0010101) +30 + -8 = 22 (0010110) +30 + -7 = 23 (0010111) +30 + -6 = 24 (0011000) +30 + -5 = 25 (0011001) +30 + -4 = 26 (0011010) +30 + -3 = 27 (0011011) +30 + -2 = 28 (0011100) +30 + -1 = 29 (0011101) +31 + 0 = 31 (0011111) +31 + 1 = 32 (0100000) +31 + 2 = 33 (0100001) +31 + 3 = 34 (0100010) +31 + 4 = 35 (0100011) +31 + 5 = 36 (0100100) +31 + 6 = 37 (0100101) +31 + 7 = 38 (0100110) +31 + 8 = 39 (0100111) +31 + 9 = 40 (0101000) +31 + 10 = 41 (0101001) +31 + 11 = 42 (0101010) +31 + 12 = 43 (0101011) +31 + 13 = 44 (0101100) +31 + 14 = 45 (0101101) +31 + 15 = 46 (0101110) +31 + 16 = 47 (0101111) +31 + 17 = 48 (0110000) +31 + 18 = 49 (0110001) +31 + 19 = 50 (0110010) +31 + 20 = 51 (0110011) +31 + 21 = 52 (0110100) +31 + 22 = 53 (0110101) +31 + 23 = 54 (0110110) +31 + 24 = 55 (0110111) +31 + 25 = 56 (0111000) +31 + 26 = 57 (0111001) +31 + 27 = 58 (0111010) +31 + 28 = 59 (0111011) +31 + 29 = 60 (0111100) +31 + 30 = 61 (0111101) +31 + 31 = 62 (0111110) +31 + -32 = -1 (1111111) +31 + -31 = 0 (0000000) +31 + -30 = 1 (0000001) +31 + -29 = 2 (0000010) +31 + -28 = 3 (0000011) +31 + -27 = 4 (0000100) +31 + -26 = 5 (0000101) +31 + -25 = 6 (0000110) +31 + -24 = 7 (0000111) +31 + -23 = 8 (0001000) +31 + -22 = 9 (0001001) +31 + -21 = 10 (0001010) +31 + -20 = 11 (0001011) +31 + -19 = 12 (0001100) +31 + -18 = 13 (0001101) +31 + -17 = 14 (0001110) +31 + -16 = 15 (0001111) +31 + -15 = 16 (0010000) +31 + -14 = 17 (0010001) +31 + -13 = 18 (0010010) +31 + -12 = 19 (0010011) +31 + -11 = 20 (0010100) +31 + -10 = 21 (0010101) +31 + -9 = 22 (0010110) +31 + -8 = 23 (0010111) +31 + -7 = 24 (0011000) +31 + -6 = 25 (0011001) +31 + -5 = 26 (0011010) +31 + -4 = 27 (0011011) +31 + -3 = 28 (0011100) +31 + -2 = 29 (0011101) +31 + -1 = 30 (0011110) +-32 + 0 = -32 (1100000) +-32 + 1 = -31 (1100001) +-32 + 2 = -30 (1100010) +-32 + 3 = -29 (1100011) +-32 + 4 = -28 (1100100) +-32 + 5 = -27 (1100101) +-32 + 6 = -26 (1100110) +-32 + 7 = -25 (1100111) +-32 + 8 = -24 (1101000) +-32 + 9 = -23 (1101001) +-32 + 10 = -22 (1101010) +-32 + 11 = -21 (1101011) +-32 + 12 = -20 (1101100) +-32 + 13 = -19 (1101101) +-32 + 14 = -18 (1101110) +-32 + 15 = -17 (1101111) +-32 + 16 = -16 (1110000) +-32 + 17 = -15 (1110001) +-32 + 18 = -14 (1110010) +-32 + 19 = -13 (1110011) +-32 + 20 = -12 (1110100) +-32 + 21 = -11 (1110101) +-32 + 22 = -10 (1110110) +-32 + 23 = -9 (1110111) +-32 + 24 = -8 (1111000) +-32 + 25 = -7 (1111001) +-32 + 26 = -6 (1111010) +-32 + 27 = -5 (1111011) +-32 + 28 = -4 (1111100) +-32 + 29 = -3 (1111101) +-32 + 30 = -2 (1111110) +-32 + 31 = -1 (1111111) +-32 + -32 = -64 (1000000) +-32 + -31 = -63 (1000001) +-32 + -30 = -62 (1000010) +-32 + -29 = -61 (1000011) +-32 + -28 = -60 (1000100) +-32 + -27 = -59 (1000101) +-32 + -26 = -58 (1000110) +-32 + -25 = -57 (1000111) +-32 + -24 = -56 (1001000) +-32 + -23 = -55 (1001001) +-32 + -22 = -54 (1001010) +-32 + -21 = -53 (1001011) +-32 + -20 = -52 (1001100) +-32 + -19 = -51 (1001101) +-32 + -18 = -50 (1001110) +-32 + -17 = -49 (1001111) +-32 + -16 = -48 (1010000) +-32 + -15 = -47 (1010001) +-32 + -14 = -46 (1010010) +-32 + -13 = -45 (1010011) +-32 + -12 = -44 (1010100) +-32 + -11 = -43 (1010101) +-32 + -10 = -42 (1010110) +-32 + -9 = -41 (1010111) +-32 + -8 = -40 (1011000) +-32 + -7 = -39 (1011001) +-32 + -6 = -38 (1011010) +-32 + -5 = -37 (1011011) +-32 + -4 = -36 (1011100) +-32 + -3 = -35 (1011101) +-32 + -2 = -34 (1011110) +-32 + -1 = -33 (1011111) +-31 + 0 = -31 (1100001) +-31 + 1 = -30 (1100010) +-31 + 2 = -29 (1100011) +-31 + 3 = -28 (1100100) +-31 + 4 = -27 (1100101) +-31 + 5 = -26 (1100110) +-31 + 6 = -25 (1100111) +-31 + 7 = -24 (1101000) +-31 + 8 = -23 (1101001) +-31 + 9 = -22 (1101010) +-31 + 10 = -21 (1101011) +-31 + 11 = -20 (1101100) +-31 + 12 = -19 (1101101) +-31 + 13 = -18 (1101110) +-31 + 14 = -17 (1101111) +-31 + 15 = -16 (1110000) +-31 + 16 = -15 (1110001) +-31 + 17 = -14 (1110010) +-31 + 18 = -13 (1110011) +-31 + 19 = -12 (1110100) +-31 + 20 = -11 (1110101) +-31 + 21 = -10 (1110110) +-31 + 22 = -9 (1110111) +-31 + 23 = -8 (1111000) +-31 + 24 = -7 (1111001) +-31 + 25 = -6 (1111010) +-31 + 26 = -5 (1111011) +-31 + 27 = -4 (1111100) +-31 + 28 = -3 (1111101) +-31 + 29 = -2 (1111110) +-31 + 30 = -1 (1111111) +-31 + 31 = 0 (0000000) +-31 + -32 = -63 (1000001) +-31 + -31 = -62 (1000010) +-31 + -30 = -61 (1000011) +-31 + -29 = -60 (1000100) +-31 + -28 = -59 (1000101) +-31 + -27 = -58 (1000110) +-31 + -26 = -57 (1000111) +-31 + -25 = -56 (1001000) +-31 + -24 = -55 (1001001) +-31 + -23 = -54 (1001010) +-31 + -22 = -53 (1001011) +-31 + -21 = -52 (1001100) +-31 + -20 = -51 (1001101) +-31 + -19 = -50 (1001110) +-31 + -18 = -49 (1001111) +-31 + -17 = -48 (1010000) +-31 + -16 = -47 (1010001) +-31 + -15 = -46 (1010010) +-31 + -14 = -45 (1010011) +-31 + -13 = -44 (1010100) +-31 + -12 = -43 (1010101) +-31 + -11 = -42 (1010110) +-31 + -10 = -41 (1010111) +-31 + -9 = -40 (1011000) +-31 + -8 = -39 (1011001) +-31 + -7 = -38 (1011010) +-31 + -6 = -37 (1011011) +-31 + -5 = -36 (1011100) +-31 + -4 = -35 (1011101) +-31 + -3 = -34 (1011110) +-31 + -2 = -33 (1011111) +-31 + -1 = -32 (1100000) +-30 + 0 = -30 (1100010) +-30 + 1 = -29 (1100011) +-30 + 2 = -28 (1100100) +-30 + 3 = -27 (1100101) +-30 + 4 = -26 (1100110) +-30 + 5 = -25 (1100111) +-30 + 6 = -24 (1101000) +-30 + 7 = -23 (1101001) +-30 + 8 = -22 (1101010) +-30 + 9 = -21 (1101011) +-30 + 10 = -20 (1101100) +-30 + 11 = -19 (1101101) +-30 + 12 = -18 (1101110) +-30 + 13 = -17 (1101111) +-30 + 14 = -16 (1110000) +-30 + 15 = -15 (1110001) +-30 + 16 = -14 (1110010) +-30 + 17 = -13 (1110011) +-30 + 18 = -12 (1110100) +-30 + 19 = -11 (1110101) +-30 + 20 = -10 (1110110) +-30 + 21 = -9 (1110111) +-30 + 22 = -8 (1111000) +-30 + 23 = -7 (1111001) +-30 + 24 = -6 (1111010) +-30 + 25 = -5 (1111011) +-30 + 26 = -4 (1111100) +-30 + 27 = -3 (1111101) +-30 + 28 = -2 (1111110) +-30 + 29 = -1 (1111111) +-30 + 30 = 0 (0000000) +-30 + 31 = 1 (0000001) +-30 + -32 = -62 (1000010) +-30 + -31 = -61 (1000011) +-30 + -30 = -60 (1000100) +-30 + -29 = -59 (1000101) +-30 + -28 = -58 (1000110) +-30 + -27 = -57 (1000111) +-30 + -26 = -56 (1001000) +-30 + -25 = -55 (1001001) +-30 + -24 = -54 (1001010) +-30 + -23 = -53 (1001011) +-30 + -22 = -52 (1001100) +-30 + -21 = -51 (1001101) +-30 + -20 = -50 (1001110) +-30 + -19 = -49 (1001111) +-30 + -18 = -48 (1010000) +-30 + -17 = -47 (1010001) +-30 + -16 = -46 (1010010) +-30 + -15 = -45 (1010011) +-30 + -14 = -44 (1010100) +-30 + -13 = -43 (1010101) +-30 + -12 = -42 (1010110) +-30 + -11 = -41 (1010111) +-30 + -10 = -40 (1011000) +-30 + -9 = -39 (1011001) +-30 + -8 = -38 (1011010) +-30 + -7 = -37 (1011011) +-30 + -6 = -36 (1011100) +-30 + -5 = -35 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(1111110) +-24 + 23 = -1 (1111111) +-24 + 24 = 0 (0000000) +-24 + 25 = 1 (0000001) +-24 + 26 = 2 (0000010) +-24 + 27 = 3 (0000011) +-24 + 28 = 4 (0000100) +-24 + 29 = 5 (0000101) +-24 + 30 = 6 (0000110) +-24 + 31 = 7 (0000111) +-24 + -32 = -56 (1001000) +-24 + -31 = -55 (1001001) +-24 + -30 = -54 (1001010) +-24 + -29 = -53 (1001011) +-24 + -28 = -52 (1001100) +-24 + -27 = -51 (1001101) +-24 + -26 = -50 (1001110) +-24 + -25 = -49 (1001111) +-24 + -24 = -48 (1010000) +-24 + -23 = -47 (1010001) +-24 + -22 = -46 (1010010) +-24 + -21 = -45 (1010011) +-24 + -20 = -44 (1010100) +-24 + -19 = -43 (1010101) +-24 + -18 = -42 (1010110) +-24 + -17 = -41 (1010111) +-24 + -16 = -40 (1011000) +-24 + -15 = -39 (1011001) +-24 + -14 = -38 (1011010) +-24 + -13 = -37 (1011011) +-24 + -12 = -36 (1011100) +-24 + -11 = -35 (1011101) +-24 + -10 = -34 (1011110) +-24 + -9 = -33 (1011111) +-24 + -8 = -32 (1100000) +-24 + -7 = -31 (1100001) +-24 + -6 = -30 (1100010) +-24 + -5 = -29 (1100011) +-24 + -4 = -28 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3 (0000011) +-21 + 25 = 4 (0000100) +-21 + 26 = 5 (0000101) +-21 + 27 = 6 (0000110) +-21 + 28 = 7 (0000111) +-21 + 29 = 8 (0001000) +-21 + 30 = 9 (0001001) +-21 + 31 = 10 (0001010) +-21 + -32 = -53 (1001011) +-21 + -31 = -52 (1001100) +-21 + -30 = -51 (1001101) +-21 + -29 = -50 (1001110) +-21 + -28 = -49 (1001111) +-21 + -27 = -48 (1010000) +-21 + -26 = -47 (1010001) +-21 + -25 = -46 (1010010) +-21 + -24 = -45 (1010011) +-21 + -23 = -44 (1010100) +-21 + -22 = -43 (1010101) +-21 + -21 = -42 (1010110) +-21 + -20 = -41 (1010111) +-21 + -19 = -40 (1011000) +-21 + -18 = -39 (1011001) +-21 + -17 = -38 (1011010) +-21 + -16 = -37 (1011011) +-21 + -15 = -36 (1011100) +-21 + -14 = -35 (1011101) +-21 + -13 = -34 (1011110) +-21 + -12 = -33 (1011111) +-21 + -11 = -32 (1100000) +-21 + -10 = -31 (1100001) +-21 + -9 = -30 (1100010) +-21 + -8 = -29 (1100011) +-21 + -7 = -28 (1100100) +-21 + -6 = -27 (1100101) +-21 + -5 = -26 (1100110) +-21 + -4 = -25 (1100111) +-21 + -3 = -24 (1101000) +-21 + -2 = -23 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27 = 9 (0001001) +-18 + 28 = 10 (0001010) +-18 + 29 = 11 (0001011) +-18 + 30 = 12 (0001100) +-18 + 31 = 13 (0001101) +-18 + -32 = -50 (1001110) +-18 + -31 = -49 (1001111) +-18 + -30 = -48 (1010000) +-18 + -29 = -47 (1010001) +-18 + -28 = -46 (1010010) +-18 + -27 = -45 (1010011) +-18 + -26 = -44 (1010100) +-18 + -25 = -43 (1010101) +-18 + -24 = -42 (1010110) +-18 + -23 = -41 (1010111) +-18 + -22 = -40 (1011000) +-18 + -21 = -39 (1011001) +-18 + -20 = -38 (1011010) +-18 + -19 = -37 (1011011) +-18 + -18 = -36 (1011100) +-18 + -17 = -35 (1011101) +-18 + -16 = -34 (1011110) +-18 + -15 = -33 (1011111) +-18 + -14 = -32 (1100000) +-18 + -13 = -31 (1100001) +-18 + -12 = -30 (1100010) +-18 + -11 = -29 (1100011) +-18 + -10 = -28 (1100100) +-18 + -9 = -27 (1100101) +-18 + -8 = -26 (1100110) +-18 + -7 = -25 (1100111) +-18 + -6 = -24 (1101000) +-18 + -5 = -23 (1101001) +-18 + -4 = -22 (1101010) +-18 + -3 = -21 (1101011) +-18 + -2 = -20 (1101100) +-18 + -1 = -19 (1101101) +-17 + 0 = -17 (1101111) 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15 = -1 (1111111) +-16 + 16 = 0 (0000000) +-16 + 17 = 1 (0000001) +-16 + 18 = 2 (0000010) +-16 + 19 = 3 (0000011) +-16 + 20 = 4 (0000100) +-16 + 21 = 5 (0000101) +-16 + 22 = 6 (0000110) +-16 + 23 = 7 (0000111) +-16 + 24 = 8 (0001000) +-16 + 25 = 9 (0001001) +-16 + 26 = 10 (0001010) +-16 + 27 = 11 (0001011) +-16 + 28 = 12 (0001100) +-16 + 29 = 13 (0001101) +-16 + 30 = 14 (0001110) +-16 + 31 = 15 (0001111) +-16 + -32 = -48 (1010000) +-16 + -31 = -47 (1010001) +-16 + -30 = -46 (1010010) +-16 + -29 = -45 (1010011) +-16 + -28 = -44 (1010100) +-16 + -27 = -43 (1010101) +-16 + -26 = -42 (1010110) +-16 + -25 = -41 (1010111) +-16 + -24 = -40 (1011000) +-16 + -23 = -39 (1011001) +-16 + -22 = -38 (1011010) +-16 + -21 = -37 (1011011) +-16 + -20 = -36 (1011100) +-16 + -19 = -35 (1011101) +-16 + -18 = -34 (1011110) +-16 + -17 = -33 (1011111) +-16 + -16 = -32 (1100000) +-16 + -15 = -31 (1100001) +-16 + -14 = -30 (1100010) +-16 + -13 = -29 (1100011) +-16 + -12 = -28 (1100100) +-16 + -11 = -27 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(0001110) +-15 + 30 = 15 (0001111) +-15 + 31 = 16 (0010000) +-15 + -32 = -47 (1010001) +-15 + -31 = -46 (1010010) +-15 + -30 = -45 (1010011) +-15 + -29 = -44 (1010100) +-15 + -28 = -43 (1010101) +-15 + -27 = -42 (1010110) +-15 + -26 = -41 (1010111) +-15 + -25 = -40 (1011000) +-15 + -24 = -39 (1011001) +-15 + -23 = -38 (1011010) +-15 + -22 = -37 (1011011) +-15 + -21 = -36 (1011100) +-15 + -20 = -35 (1011101) +-15 + -19 = -34 (1011110) +-15 + -18 = -33 (1011111) +-15 + -17 = -32 (1100000) +-15 + -16 = -31 (1100001) +-15 + -15 = -30 (1100010) +-15 + -14 = -29 (1100011) +-15 + -13 = -28 (1100100) +-15 + -12 = -27 (1100101) +-15 + -11 = -26 (1100110) +-15 + -10 = -25 (1100111) +-15 + -9 = -24 (1101000) +-15 + -8 = -23 (1101001) +-15 + -7 = -22 (1101010) +-15 + -6 = -21 (1101011) +-15 + -5 = -20 (1101100) +-15 + -4 = -19 (1101101) +-15 + -3 = -18 (1101110) +-15 + -2 = -17 (1101111) +-15 + -1 = -16 (1110000) +-14 + 0 = -14 (1110010) +-14 + 1 = -13 (1110011) +-14 + 2 = -12 (1110100) +-14 + 3 = -11 (1110101) +-14 + 4 = -10 (1110110) +-14 + 5 = -9 (1110111) +-14 + 6 = -8 (1111000) +-14 + 7 = -7 (1111001) +-14 + 8 = -6 (1111010) +-14 + 9 = -5 (1111011) +-14 + 10 = -4 (1111100) +-14 + 11 = -3 (1111101) +-14 + 12 = -2 (1111110) +-14 + 13 = -1 (1111111) +-14 + 14 = 0 (0000000) +-14 + 15 = 1 (0000001) +-14 + 16 = 2 (0000010) +-14 + 17 = 3 (0000011) +-14 + 18 = 4 (0000100) +-14 + 19 = 5 (0000101) +-14 + 20 = 6 (0000110) +-14 + 21 = 7 (0000111) +-14 + 22 = 8 (0001000) +-14 + 23 = 9 (0001001) +-14 + 24 = 10 (0001010) +-14 + 25 = 11 (0001011) +-14 + 26 = 12 (0001100) +-14 + 27 = 13 (0001101) +-14 + 28 = 14 (0001110) +-14 + 29 = 15 (0001111) +-14 + 30 = 16 (0010000) +-14 + 31 = 17 (0010001) +-14 + -32 = -46 (1010010) +-14 + -31 = -45 (1010011) +-14 + -30 = -44 (1010100) +-14 + -29 = -43 (1010101) +-14 + -28 = -42 (1010110) +-14 + -27 = -41 (1010111) +-14 + -26 = -40 (1011000) +-14 + -25 = -39 (1011001) +-14 + -24 = -38 (1011010) +-14 + -23 = -37 (1011011) +-14 + -22 = -36 (1011100) +-14 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18 = 5 (0000101) +-13 + 19 = 6 (0000110) +-13 + 20 = 7 (0000111) +-13 + 21 = 8 (0001000) +-13 + 22 = 9 (0001001) +-13 + 23 = 10 (0001010) +-13 + 24 = 11 (0001011) +-13 + 25 = 12 (0001100) +-13 + 26 = 13 (0001101) +-13 + 27 = 14 (0001110) +-13 + 28 = 15 (0001111) +-13 + 29 = 16 (0010000) +-13 + 30 = 17 (0010001) +-13 + 31 = 18 (0010010) +-13 + -32 = -45 (1010011) +-13 + -31 = -44 (1010100) +-13 + -30 = -43 (1010101) +-13 + -29 = -42 (1010110) +-13 + -28 = -41 (1010111) +-13 + -27 = -40 (1011000) +-13 + -26 = -39 (1011001) +-13 + -25 = -38 (1011010) +-13 + -24 = -37 (1011011) +-13 + -23 = -36 (1011100) +-13 + -22 = -35 (1011101) +-13 + -21 = -34 (1011110) +-13 + -20 = -33 (1011111) +-13 + -19 = -32 (1100000) +-13 + -18 = -31 (1100001) +-13 + -17 = -30 (1100010) +-13 + -16 = -29 (1100011) +-13 + -15 = -28 (1100100) +-13 + -14 = -27 (1100101) +-13 + -13 = -26 (1100110) +-13 + -12 = -25 (1100111) +-13 + -11 = -24 (1101000) +-13 + -10 = -23 (1101001) +-13 + -9 = -22 (1101010) +-13 + -8 = -21 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(1111011) +-11 + 7 = -4 (1111100) +-11 + 8 = -3 (1111101) +-11 + 9 = -2 (1111110) +-11 + 10 = -1 (1111111) +-11 + 11 = 0 (0000000) +-11 + 12 = 1 (0000001) +-11 + 13 = 2 (0000010) +-11 + 14 = 3 (0000011) +-11 + 15 = 4 (0000100) +-11 + 16 = 5 (0000101) +-11 + 17 = 6 (0000110) +-11 + 18 = 7 (0000111) +-11 + 19 = 8 (0001000) +-11 + 20 = 9 (0001001) +-11 + 21 = 10 (0001010) +-11 + 22 = 11 (0001011) +-11 + 23 = 12 (0001100) +-11 + 24 = 13 (0001101) +-11 + 25 = 14 (0001110) +-11 + 26 = 15 (0001111) +-11 + 27 = 16 (0010000) +-11 + 28 = 17 (0010001) +-11 + 29 = 18 (0010010) +-11 + 30 = 19 (0010011) +-11 + 31 = 20 (0010100) +-11 + -32 = -43 (1010101) +-11 + -31 = -42 (1010110) +-11 + -30 = -41 (1010111) +-11 + -29 = -40 (1011000) +-11 + -28 = -39 (1011001) +-11 + -27 = -38 (1011010) +-11 + -26 = -37 (1011011) +-11 + -25 = -36 (1011100) +-11 + -24 = -35 (1011101) +-11 + -23 = -34 (1011110) +-11 + -22 = -33 (1011111) +-11 + -21 = -32 (1100000) +-11 + -20 = -31 (1100001) +-11 + -19 = -30 (1100010) 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(0001011) +-10 + 22 = 12 (0001100) +-10 + 23 = 13 (0001101) +-10 + 24 = 14 (0001110) +-10 + 25 = 15 (0001111) +-10 + 26 = 16 (0010000) +-10 + 27 = 17 (0010001) +-10 + 28 = 18 (0010010) +-10 + 29 = 19 (0010011) +-10 + 30 = 20 (0010100) +-10 + 31 = 21 (0010101) +-10 + -32 = -42 (1010110) +-10 + -31 = -41 (1010111) +-10 + -30 = -40 (1011000) +-10 + -29 = -39 (1011001) +-10 + -28 = -38 (1011010) +-10 + -27 = -37 (1011011) +-10 + -26 = -36 (1011100) +-10 + -25 = -35 (1011101) +-10 + -24 = -34 (1011110) +-10 + -23 = -33 (1011111) +-10 + -22 = -32 (1100000) +-10 + -21 = -31 (1100001) +-10 + -20 = -30 (1100010) +-10 + -19 = -29 (1100011) +-10 + -18 = -28 (1100100) +-10 + -17 = -27 (1100101) +-10 + -16 = -26 (1100110) +-10 + -15 = -25 (1100111) +-10 + -14 = -24 (1101000) +-10 + -13 = -23 (1101001) +-10 + -12 = -22 (1101010) +-10 + -11 = -21 (1101011) +-10 + -10 = -20 (1101100) +-10 + -9 = -19 (1101101) +-10 + -8 = -18 (1101110) +-10 + -7 = -17 (1101111) +-10 + -6 = -16 (1110000) +-10 + -5 = -15 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(0000101) +-8 + 14 = 6 (0000110) +-8 + 15 = 7 (0000111) +-8 + 16 = 8 (0001000) +-8 + 17 = 9 (0001001) +-8 + 18 = 10 (0001010) +-8 + 19 = 11 (0001011) +-8 + 20 = 12 (0001100) +-8 + 21 = 13 (0001101) +-8 + 22 = 14 (0001110) +-8 + 23 = 15 (0001111) +-8 + 24 = 16 (0010000) +-8 + 25 = 17 (0010001) +-8 + 26 = 18 (0010010) +-8 + 27 = 19 (0010011) +-8 + 28 = 20 (0010100) +-8 + 29 = 21 (0010101) +-8 + 30 = 22 (0010110) +-8 + 31 = 23 (0010111) +-8 + -32 = -40 (1011000) +-8 + -31 = -39 (1011001) +-8 + -30 = -38 (1011010) +-8 + -29 = -37 (1011011) +-8 + -28 = -36 (1011100) +-8 + -27 = -35 (1011101) +-8 + -26 = -34 (1011110) +-8 + -25 = -33 (1011111) +-8 + -24 = -32 (1100000) +-8 + -23 = -31 (1100001) +-8 + -22 = -30 (1100010) +-8 + -21 = -29 (1100011) +-8 + -20 = -28 (1100100) +-8 + -19 = -27 (1100101) +-8 + -18 = -26 (1100110) +-8 + -17 = -25 (1100111) +-8 + -16 = -24 (1101000) +-8 + -15 = -23 (1101001) +-8 + -14 = -22 (1101010) +-8 + -13 = -21 (1101011) +-8 + -12 = -20 (1101100) +-8 + -11 = -19 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(0011000) +-7 + -32 = -39 (1011001) +-7 + -31 = -38 (1011010) +-7 + -30 = -37 (1011011) +-7 + -29 = -36 (1011100) +-7 + -28 = -35 (1011101) +-7 + -27 = -34 (1011110) +-7 + -26 = -33 (1011111) +-7 + -25 = -32 (1100000) +-7 + -24 = -31 (1100001) +-7 + -23 = -30 (1100010) +-7 + -22 = -29 (1100011) +-7 + -21 = -28 (1100100) +-7 + -20 = -27 (1100101) +-7 + -19 = -26 (1100110) +-7 + -18 = -25 (1100111) +-7 + -17 = -24 (1101000) +-7 + -16 = -23 (1101001) +-7 + -15 = -22 (1101010) +-7 + -14 = -21 (1101011) +-7 + -13 = -20 (1101100) +-7 + -12 = -19 (1101101) +-7 + -11 = -18 (1101110) +-7 + -10 = -17 (1101111) +-7 + -9 = -16 (1110000) +-7 + -8 = -15 (1110001) +-7 + -7 = -14 (1110010) +-7 + -6 = -13 (1110011) +-7 + -5 = -12 (1110100) +-7 + -4 = -11 (1110101) +-7 + -3 = -10 (1110110) +-7 + -2 = -9 (1110111) +-7 + -1 = -8 (1111000) +-6 + 0 = -6 (1111010) +-6 + 1 = -5 (1111011) +-6 + 2 = -4 (1111100) +-6 + 3 = -3 (1111101) +-6 + 4 = -2 (1111110) +-6 + 5 = -1 (1111111) +-6 + 6 = 0 (0000000) +-6 + 7 = 1 (0000001) +-6 + 8 = 2 (0000010) +-6 + 9 = 3 (0000011) +-6 + 10 = 4 (0000100) +-6 + 11 = 5 (0000101) +-6 + 12 = 6 (0000110) +-6 + 13 = 7 (0000111) +-6 + 14 = 8 (0001000) +-6 + 15 = 9 (0001001) +-6 + 16 = 10 (0001010) +-6 + 17 = 11 (0001011) +-6 + 18 = 12 (0001100) +-6 + 19 = 13 (0001101) +-6 + 20 = 14 (0001110) +-6 + 21 = 15 (0001111) +-6 + 22 = 16 (0010000) +-6 + 23 = 17 (0010001) +-6 + 24 = 18 (0010010) +-6 + 25 = 19 (0010011) +-6 + 26 = 20 (0010100) +-6 + 27 = 21 (0010101) +-6 + 28 = 22 (0010110) +-6 + 29 = 23 (0010111) +-6 + 30 = 24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + -16 = -22 (1101010) +-6 + -15 = -21 (1101011) +-6 + -14 = -20 (1101100) +-6 + -13 = -19 (1101101) +-6 + -12 = -18 (1101110) +-6 + -11 = -17 (1101111) +-6 + -10 = -16 (1110000) +-6 + -9 = -15 (1110001) +-6 + -8 = -14 (1110010) +-6 + -7 = -13 (1110011) +-6 + -6 = -12 (1110100) +-6 + -5 = -11 (1110101) +-6 + -4 = -10 (1110110) +-6 + -3 = -9 (1110111) +-6 + -2 = -8 (1111000) +-6 + -1 = -7 (1111001) +-5 + 0 = -5 (1111011) +-5 + 1 = -4 (1111100) +-5 + 2 = -3 (1111101) +-5 + 3 = -2 (1111110) +-5 + 4 = -1 (1111111) +-5 + 5 = 0 (0000000) +-5 + 6 = 1 (0000001) +-5 + 7 = 2 (0000010) +-5 + 8 = 3 (0000011) +-5 + 9 = 4 (0000100) +-5 + 10 = 5 (0000101) +-5 + 11 = 6 (0000110) +-5 + 12 = 7 (0000111) +-5 + 13 = 8 (0001000) +-5 + 14 = 9 (0001001) +-5 + 15 = 10 (0001010) +-5 + 16 = 11 (0001011) +-5 + 17 = 12 (0001100) +-5 + 18 = 13 (0001101) +-5 + 19 = 14 (0001110) +-5 + 20 = 15 (0001111) +-5 + 21 = 16 (0010000) +-5 + 22 = 17 (0010001) +-5 + 23 = 18 (0010010) +-5 + 24 = 19 (0010011) +-5 + 25 = 20 (0010100) +-5 + 26 = 21 (0010101) +-5 + 27 = 22 (0010110) +-5 + 28 = 23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 + 1 = -3 (1111101) +-4 + 2 = -2 (1111110) +-4 + 3 = -1 (1111111) +-4 + 4 = 0 (0000000) +-4 + 5 = 1 (0000001) +-4 + 6 = 2 (0000010) +-4 + 7 = 3 (0000011) +-4 + 8 = 4 (0000100) +-4 + 9 = 5 (0000101) +-4 + 10 = 6 (0000110) +-4 + 11 = 7 (0000111) +-4 + 12 = 8 (0001000) +-4 + 13 = 9 (0001001) +-4 + 14 = 10 (0001010) +-4 + 15 = 11 (0001011) +-4 + 16 = 12 (0001100) +-4 + 17 = 13 (0001101) +-4 + 18 = 14 (0001110) +-4 + 19 = 15 (0001111) +-4 + 20 = 16 (0010000) +-4 + 21 = 17 (0010001) +-4 + 22 = 18 (0010010) +-4 + 23 = 19 (0010011) +-4 + 24 = 20 (0010100) +-4 + 25 = 21 (0010101) +-4 + 26 = 22 (0010110) +-4 + 27 = 23 (0010111) +-4 + 28 = 24 (0011000) +-4 + 29 = 25 (0011001) +-4 + 30 = 26 (0011010) +-4 + 31 = 27 (0011011) +-4 + -32 = -36 (1011100) +-4 + -31 = -35 (1011101) +-4 + -30 = -34 (1011110) +-4 + -29 = -33 (1011111) +-4 + -28 = -32 (1100000) +-4 + -27 = -31 (1100001) +-4 + -26 = -30 (1100010) +-4 + -25 = -29 (1100011) +-4 + -24 = -28 (1100100) +-4 + -23 = -27 (1100101) +-4 + -22 = -26 (1100110) +-4 + -21 = -25 (1100111) +-4 + -20 = -24 (1101000) +-4 + -19 = -23 (1101001) +-4 + -18 = -22 (1101010) +-4 + -17 = -21 (1101011) +-4 + -16 = -20 (1101100) +-4 + -15 = -19 (1101101) +-4 + -14 = -18 (1101110) +-4 + -13 = -17 (1101111) +-4 + -12 = -16 (1110000) +-4 + -11 = -15 (1110001) +-4 + -10 = -14 (1110010) +-4 + -9 = -13 (1110011) +-4 + -8 = -12 (1110100) +-4 + -7 = -11 (1110101) +-4 + -6 = -10 (1110110) +-4 + -5 = -9 (1110111) +-4 + -4 = -8 (1111000) +-4 + -3 = -7 (1111001) +-4 + -2 = -6 (1111010) +-4 + -1 = -5 (1111011) +-3 + 0 = -3 (1111101) +-3 + 1 = -2 (1111110) +-3 + 2 = -1 (1111111) +-3 + 3 = 0 (0000000) +-3 + 4 = 1 (0000001) +-3 + 5 = 2 (0000010) +-3 + 6 = 3 (0000011) +-3 + 7 = 4 (0000100) +-3 + 8 = 5 (0000101) +-3 + 9 = 6 (0000110) +-3 + 10 = 7 (0000111) +-3 + 11 = 8 (0001000) +-3 + 12 = 9 (0001001) +-3 + 13 = 10 (0001010) +-3 + 14 = 11 (0001011) +-3 + 15 = 12 (0001100) +-3 + 16 = 13 (0001101) +-3 + 17 = 14 (0001110) +-3 + 18 = 15 (0001111) +-3 + 19 = 16 (0010000) +-3 + 20 = 17 (0010001) +-3 + 21 = 18 (0010010) +-3 + 22 = 19 (0010011) +-3 + 23 = 20 (0010100) +-3 + 24 = 21 (0010101) +-3 + 25 = 22 (0010110) +-3 + 26 = 23 (0010111) +-3 + 27 = 24 (0011000) +-3 + 28 = 25 (0011001) +-3 + 29 = 26 (0011010) +-3 + 30 = 27 (0011011) +-3 + 31 = 28 (0011100) +-3 + -32 = -35 (1011101) +-3 + -31 = -34 (1011110) +-3 + -30 = -33 (1011111) +-3 + -29 = -32 (1100000) +-3 + -28 = -31 (1100001) +-3 + -27 = -30 (1100010) +-3 + -26 = -29 (1100011) +-3 + -25 = -28 (1100100) +-3 + -24 = -27 (1100101) +-3 + -23 = -26 (1100110) +-3 + -22 = -25 (1100111) +-3 + -21 = -24 (1101000) +-3 + -20 = -23 (1101001) +-3 + -19 = -22 (1101010) +-3 + -18 = -21 (1101011) +-3 + -17 = -20 (1101100) +-3 + -16 = -19 (1101101) +-3 + -15 = -18 (1101110) +-3 + -14 = -17 (1101111) +-3 + -13 = -16 (1110000) +-3 + -12 = -15 (1110001) +-3 + -11 = -14 (1110010) +-3 + -10 = -13 (1110011) +-3 + -9 = -12 (1110100) +-3 + -8 = -11 (1110101) +-3 + -7 = -10 (1110110) +-3 + -6 = -9 (1110111) +-3 + -5 = -8 (1111000) +-3 + -4 = -7 (1111001) +-3 + -3 = -6 (1111010) +-3 + -2 = -5 (1111011) +-3 + -1 = -4 (1111100) +-2 + 0 = -2 (1111110) +-2 + 1 = -1 (1111111) +-2 + 2 = 0 (0000000) +-2 + 3 = 1 (0000001) +-2 + 4 = 2 (0000010) +-2 + 5 = 3 (0000011) +-2 + 6 = 4 (0000100) +-2 + 7 = 5 (0000101) +-2 + 8 = 6 (0000110) +-2 + 9 = 7 (0000111) +-2 + 10 = 8 (0001000) +-2 + 11 = 9 (0001001) +-2 + 12 = 10 (0001010) +-2 + 13 = 11 (0001011) +-2 + 14 = 12 (0001100) +-2 + 15 = 13 (0001101) +-2 + 16 = 14 (0001110) +-2 + 17 = 15 (0001111) +-2 + 18 = 16 (0010000) +-2 + 19 = 17 (0010001) +-2 + 20 = 18 (0010010) +-2 + 21 = 19 (0010011) +-2 + 22 = 20 (0010100) +-2 + 23 = 21 (0010101) +-2 + 24 = 22 (0010110) +-2 + 25 = 23 (0010111) +-2 + 26 = 24 (0011000) +-2 + 27 = 25 (0011001) +-2 + 28 = 26 (0011010) +-2 + 29 = 27 (0011011) +-2 + 30 = 28 (0011100) +-2 + 31 = 29 (0011101) +-2 + -32 = -34 (1011110) +-2 + -31 = -33 (1011111) +-2 + -30 = -32 (1100000) +-2 + -29 = -31 (1100001) +-2 + -28 = -30 (1100010) +-2 + -27 = -29 (1100011) +-2 + -26 = -28 (1100100) +-2 + -25 = -27 (1100101) +-2 + -24 = -26 (1100110) +-2 + -23 = -25 (1100111) +-2 + -22 = -24 (1101000) +-2 + -21 = -23 (1101001) +-2 + -20 = -22 (1101010) +-2 + -19 = -21 (1101011) +-2 + -18 = -20 (1101100) +-2 + -17 = -19 (1101101) +-2 + -16 = -18 (1101110) +-2 + -15 = -17 (1101111) +-2 + -14 = -16 (1110000) +-2 + -13 = -15 (1110001) +-2 + -12 = -14 (1110010) +-2 + -11 = -13 (1110011) +-2 + -10 = -12 (1110100) +-2 + -9 = -11 (1110101) +-2 + -8 = -10 (1110110) +-2 + -7 = -9 (1110111) +-2 + -6 = -8 (1111000) +-2 + -5 = -7 (1111001) +-2 + -4 = -6 (1111010) +-2 + -3 = -5 (1111011) +-2 + -2 = -4 (1111100) +-2 + -1 = -3 (1111101) +-1 + 0 = -1 (1111111) +-1 + 1 = 0 (0000000) +-1 + 2 = 1 (0000001) +-1 + 3 = 2 (0000010) +-1 + 4 = 3 (0000011) +-1 + 5 = 4 (0000100) +-1 + 6 = 5 (0000101) +-1 + 7 = 6 (0000110) +-1 + 8 = 7 (0000111) +-1 + 9 = 8 (0001000) +-1 + 10 = 9 (0001001) +-1 + 11 = 10 (0001010) +-1 + 12 = 11 (0001011) +-1 + 13 = 12 (0001100) +-1 + 14 = 13 (0001101) +-1 + 15 = 14 (0001110) +-1 + 16 = 15 (0001111) +-1 + 17 = 16 (0010000) +-1 + 18 = 17 (0010001) +-1 + 19 = 18 (0010010) +-1 + 20 = 19 (0010011) +-1 + 21 = 20 (0010100) +-1 + 22 = 21 (0010101) +-1 + 23 = 22 (0010110) +-1 + 24 = 23 (0010111) +-1 + 25 = 24 (0011000) +-1 + 26 = 25 (0011001) +-1 + 27 = 26 (0011010) +-1 + 28 = 27 (0011011) +-1 + 29 = 28 (0011100) +-1 + 30 = 29 (0011101) +-1 + 31 = 30 (0011110) +-1 + -32 = -33 (1011111) +-1 + -31 = -32 (1100000) +-1 + -30 = -31 (1100001) +-1 + -29 = -30 (1100010) +-1 + -28 = -29 (1100011) +-1 + -27 = -28 (1100100) +-1 + -26 = -27 (1100101) +-1 + -25 = -26 (1100110) +-1 + -24 = -25 (1100111) +-1 + -23 = -24 (1101000) +-1 + -22 = -23 (1101001) +-1 + -21 = -22 (1101010) +-1 + -20 = -21 (1101011) +-1 + -19 = -20 (1101100) +-1 + -18 = -19 (1101101) +-1 + -17 = -18 (1101110) +-1 + -16 = -17 (1101111) +-1 + -15 = -16 (1110000) +-1 + -14 = -15 (1110001) +-1 + -13 = -14 (1110010) +-1 + -12 = -13 (1110011) +-1 + -11 = -12 (1110100) +-1 + -10 = -11 (1110101) +-1 + -9 = -10 (1110110) +-1 + -8 = -9 (1110111) +-1 + -7 = -8 (1111000) +-1 + -6 = -7 (1111001) +-1 + -5 = -6 (1111010) +-1 + -4 = -5 (1111011) +-1 + -3 = -4 (1111100) +-1 + -2 = -3 (1111101) +-1 + -1 = -2 (1111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/main.cpp new file mode 100644 index 000000000..24eb43ae7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 7-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 7; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/stimgen.h new file mode 100644 index 000000000..feeda4215 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/bits_to_bits/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector7& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector7& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/common.h new file mode 100644 index 000000000..4ffc0e670 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector6; +typedef sc_signal > signal_bool_vector9; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/datawidth.cpp new file mode 100644 index 000000000..25913d4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_signed tmp_a (in1_width); + sc_signed tmp_b (in2_width); + sc_signed tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/datawidth.h new file mode 100644 index 000000000..911b72c4f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector9& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector9& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/extension.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/extension.f new file mode 100644 index 000000000..673123bd2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/extension.f @@ -0,0 +1,3 @@ +extension/datawidth.cpp +extension/stimgen.cpp +extension/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/golden/extension.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/golden/extension.log new file mode 100644 index 000000000..e7488d162 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/golden/extension.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + -32 = -24 (111101000) +8 + -31 = -23 (111101001) +8 + -30 = -22 (111101010) +8 + -29 = -21 (111101011) +8 + -28 = -20 (111101100) +8 + -27 = -19 (111101101) +8 + -26 = -18 (111101110) +8 + -25 = -17 (111101111) +8 + -24 = -16 (111110000) +8 + -23 = -15 (111110001) +8 + -22 = -14 (111110010) +8 + -21 = -13 (111110011) +8 + -20 = -12 (111110100) +8 + -19 = -11 (111110101) +8 + -18 = -10 (111110110) +8 + -17 = -9 (111110111) +8 + -16 = -8 (111111000) +8 + -15 = -7 (111111001) +8 + -14 = -6 (111111010) +8 + -13 = -5 (111111011) +8 + -12 = -4 (111111100) +8 + -11 = -3 (111111101) +8 + -10 = -2 (111111110) +8 + -9 = -1 (111111111) +8 + -8 = 0 (000000000) +8 + -7 = 1 (000000001) +8 + -6 = 2 (000000010) +8 + -5 = 3 (000000011) +8 + -4 = 4 (000000100) +8 + -3 = 5 (000000101) +8 + -2 = 6 (000000110) +8 + -1 = 7 (000000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + -32 = -23 (111101001) +9 + -31 = -22 (111101010) +9 + -30 = -21 (111101011) +9 + -29 = -20 (111101100) +9 + -28 = -19 (111101101) +9 + -27 = -18 (111101110) +9 + -26 = -17 (111101111) +9 + -25 = -16 (111110000) +9 + -24 = -15 (111110001) +9 + -23 = -14 (111110010) +9 + -22 = -13 (111110011) +9 + -21 = -12 (111110100) +9 + -20 = -11 (111110101) +9 + -19 = -10 (111110110) +9 + -18 = -9 (111110111) +9 + -17 = -8 (111111000) +9 + -16 = -7 (111111001) +9 + -15 = -6 (111111010) +9 + -14 = -5 (111111011) +9 + -13 = -4 (111111100) +9 + -12 = -3 (111111101) +9 + -11 = -2 (111111110) +9 + -10 = -1 (111111111) +9 + -9 = 0 (000000000) +9 + -8 = 1 (000000001) +9 + -7 = 2 (000000010) +9 + -6 = 3 (000000011) +9 + -5 = 4 (000000100) +9 + -4 = 5 (000000101) +9 + -3 = 6 (000000110) +9 + -2 = 7 (000000111) +9 + -1 = 8 (000001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + -32 = -22 (111101010) +10 + -31 = -21 (111101011) +10 + -30 = -20 (111101100) +10 + -29 = -19 (111101101) +10 + -28 = -18 (111101110) +10 + -27 = -17 (111101111) +10 + -26 = -16 (111110000) +10 + -25 = -15 (111110001) +10 + -24 = -14 (111110010) +10 + -23 = -13 (111110011) +10 + -22 = -12 (111110100) +10 + -21 = -11 (111110101) +10 + -20 = -10 (111110110) +10 + -19 = -9 (111110111) +10 + -18 = -8 (111111000) +10 + -17 = -7 (111111001) +10 + -16 = -6 (111111010) +10 + -15 = -5 (111111011) +10 + -14 = -4 (111111100) +10 + -13 = -3 (111111101) +10 + -12 = -2 (111111110) +10 + -11 = -1 (111111111) +10 + -10 = 0 (000000000) +10 + -9 = 1 (000000001) +10 + -8 = 2 (000000010) +10 + -7 = 3 (000000011) +10 + -6 = 4 (000000100) +10 + -5 = 5 (000000101) +10 + -4 = 6 (000000110) +10 + -3 = 7 (000000111) +10 + -2 = 8 (000001000) +10 + -1 = 9 (000001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + -32 = -21 (111101011) +11 + -31 = -20 (111101100) +11 + -30 = -19 (111101101) +11 + -29 = -18 (111101110) +11 + -28 = -17 (111101111) +11 + -27 = -16 (111110000) +11 + -26 = -15 (111110001) +11 + -25 = -14 (111110010) +11 + -24 = -13 (111110011) +11 + -23 = -12 (111110100) +11 + -22 = -11 (111110101) +11 + -21 = -10 (111110110) +11 + -20 = -9 (111110111) +11 + -19 = -8 (111111000) +11 + -18 = -7 (111111001) +11 + -17 = -6 (111111010) +11 + -16 = -5 (111111011) +11 + -15 = -4 (111111100) +11 + -14 = -3 (111111101) +11 + -13 = -2 (111111110) +11 + -12 = -1 (111111111) +11 + -11 = 0 (000000000) +11 + -10 = 1 (000000001) +11 + -9 = 2 (000000010) +11 + -8 = 3 (000000011) +11 + -7 = 4 (000000100) +11 + -6 = 5 (000000101) +11 + -5 = 6 (000000110) +11 + -4 = 7 (000000111) +11 + -3 = 8 (000001000) +11 + -2 = 9 (000001001) +11 + -1 = 10 (000001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + -32 = -20 (111101100) +12 + -31 = -19 (111101101) +12 + -30 = -18 (111101110) +12 + -29 = -17 (111101111) +12 + -28 = -16 (111110000) +12 + -27 = -15 (111110001) +12 + -26 = -14 (111110010) +12 + -25 = -13 (111110011) +12 + -24 = -12 (111110100) +12 + -23 = -11 (111110101) +12 + -22 = -10 (111110110) +12 + -21 = -9 (111110111) +12 + -20 = -8 (111111000) +12 + -19 = -7 (111111001) +12 + -18 = -6 (111111010) +12 + -17 = -5 (111111011) +12 + -16 = -4 (111111100) +12 + -15 = -3 (111111101) +12 + -14 = -2 (111111110) +12 + -13 = -1 (111111111) +12 + -12 = 0 (000000000) +12 + -11 = 1 (000000001) +12 + -10 = 2 (000000010) +12 + -9 = 3 (000000011) +12 + -8 = 4 (000000100) +12 + -7 = 5 (000000101) +12 + -6 = 6 (000000110) +12 + -5 = 7 (000000111) +12 + -4 = 8 (000001000) +12 + -3 = 9 (000001001) +12 + -2 = 10 (000001010) +12 + -1 = 11 (000001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + -32 = -19 (111101101) +13 + -31 = -18 (111101110) +13 + -30 = -17 (111101111) +13 + -29 = -16 (111110000) +13 + -28 = -15 (111110001) +13 + -27 = -14 (111110010) +13 + -26 = -13 (111110011) +13 + -25 = -12 (111110100) +13 + -24 = -11 (111110101) +13 + -23 = -10 (111110110) +13 + -22 = -9 (111110111) +13 + -21 = -8 (111111000) +13 + -20 = -7 (111111001) +13 + -19 = -6 (111111010) +13 + -18 = -5 (111111011) +13 + -17 = -4 (111111100) +13 + -16 = -3 (111111101) +13 + -15 = -2 (111111110) +13 + -14 = -1 (111111111) +13 + -13 = 0 (000000000) +13 + -12 = 1 (000000001) +13 + -11 = 2 (000000010) +13 + -10 = 3 (000000011) +13 + -9 = 4 (000000100) +13 + -8 = 5 (000000101) +13 + -7 = 6 (000000110) +13 + -6 = 7 (000000111) +13 + -5 = 8 (000001000) +13 + -4 = 9 (000001001) +13 + -3 = 10 (000001010) +13 + -2 = 11 (000001011) +13 + -1 = 12 (000001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + -32 = -18 (111101110) +14 + -31 = -17 (111101111) +14 + -30 = -16 (111110000) +14 + -29 = -15 (111110001) +14 + -28 = -14 (111110010) +14 + -27 = -13 (111110011) +14 + -26 = -12 (111110100) +14 + -25 = -11 (111110101) +14 + -24 = -10 (111110110) +14 + -23 = -9 (111110111) +14 + -22 = -8 (111111000) +14 + -21 = -7 (111111001) +14 + -20 = -6 (111111010) +14 + -19 = -5 (111111011) +14 + -18 = -4 (111111100) +14 + -17 = -3 (111111101) +14 + -16 = -2 (111111110) +14 + -15 = -1 (111111111) +14 + -14 = 0 (000000000) +14 + -13 = 1 (000000001) +14 + -12 = 2 (000000010) +14 + -11 = 3 (000000011) +14 + -10 = 4 (000000100) +14 + -9 = 5 (000000101) +14 + -8 = 6 (000000110) +14 + -7 = 7 (000000111) +14 + -6 = 8 (000001000) +14 + -5 = 9 (000001001) +14 + -4 = 10 (000001010) +14 + -3 = 11 (000001011) +14 + -2 = 12 (000001100) +14 + -1 = 13 (000001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + -32 = -17 (111101111) +15 + -31 = -16 (111110000) +15 + -30 = -15 (111110001) +15 + -29 = -14 (111110010) +15 + -28 = -13 (111110011) +15 + -27 = -12 (111110100) +15 + -26 = -11 (111110101) +15 + -25 = -10 (111110110) +15 + -24 = -9 (111110111) +15 + -23 = -8 (111111000) +15 + -22 = -7 (111111001) +15 + -21 = -6 (111111010) +15 + -20 = -5 (111111011) +15 + -19 = -4 (111111100) +15 + -18 = -3 (111111101) +15 + -17 = -2 (111111110) +15 + -16 = -1 (111111111) +15 + -15 = 0 (000000000) +15 + -14 = 1 (000000001) +15 + -13 = 2 (000000010) +15 + -12 = 3 (000000011) +15 + -11 = 4 (000000100) +15 + -10 = 5 (000000101) +15 + -9 = 6 (000000110) +15 + -8 = 7 (000000111) +15 + -7 = 8 (000001000) +15 + -6 = 9 (000001001) +15 + -5 = 10 (000001010) +15 + -4 = 11 (000001011) +15 + -3 = 12 (000001100) +15 + -2 = 13 (000001101) +15 + -1 = 14 (000001110) +16 + 0 = 16 (000010000) +16 + 1 = 17 (000010001) +16 + 2 = 18 (000010010) +16 + 3 = 19 (000010011) +16 + 4 = 20 (000010100) +16 + 5 = 21 (000010101) +16 + 6 = 22 (000010110) +16 + 7 = 23 (000010111) +16 + 8 = 24 (000011000) +16 + 9 = 25 (000011001) +16 + 10 = 26 (000011010) +16 + 11 = 27 (000011011) +16 + 12 = 28 (000011100) +16 + 13 = 29 (000011101) +16 + 14 = 30 (000011110) +16 + 15 = 31 (000011111) +16 + 16 = 32 (000100000) +16 + 17 = 33 (000100001) +16 + 18 = 34 (000100010) +16 + 19 = 35 (000100011) +16 + 20 = 36 (000100100) +16 + 21 = 37 (000100101) +16 + 22 = 38 (000100110) +16 + 23 = 39 (000100111) +16 + 24 = 40 (000101000) +16 + 25 = 41 (000101001) +16 + 26 = 42 (000101010) +16 + 27 = 43 (000101011) +16 + 28 = 44 (000101100) +16 + 29 = 45 (000101101) +16 + 30 = 46 (000101110) +16 + 31 = 47 (000101111) +16 + -32 = -16 (111110000) +16 + -31 = -15 (111110001) +16 + -30 = -14 (111110010) +16 + -29 = -13 (111110011) +16 + -28 = -12 (111110100) +16 + -27 = -11 (111110101) +16 + -26 = -10 (111110110) +16 + -25 = -9 (111110111) +16 + -24 = -8 (111111000) +16 + -23 = -7 (111111001) +16 + -22 = -6 (111111010) +16 + -21 = -5 (111111011) +16 + -20 = -4 (111111100) +16 + -19 = -3 (111111101) +16 + -18 = -2 (111111110) +16 + -17 = -1 (111111111) +16 + -16 = 0 (000000000) +16 + -15 = 1 (000000001) +16 + -14 = 2 (000000010) +16 + -13 = 3 (000000011) +16 + -12 = 4 (000000100) +16 + -11 = 5 (000000101) +16 + -10 = 6 (000000110) +16 + -9 = 7 (000000111) +16 + -8 = 8 (000001000) +16 + -7 = 9 (000001001) +16 + -6 = 10 (000001010) +16 + -5 = 11 (000001011) +16 + -4 = 12 (000001100) +16 + -3 = 13 (000001101) +16 + -2 = 14 (000001110) +16 + -1 = 15 (000001111) +17 + 0 = 17 (000010001) +17 + 1 = 18 (000010010) +17 + 2 = 19 (000010011) +17 + 3 = 20 (000010100) +17 + 4 = 21 (000010101) +17 + 5 = 22 (000010110) +17 + 6 = 23 (000010111) +17 + 7 = 24 (000011000) +17 + 8 = 25 (000011001) +17 + 9 = 26 (000011010) +17 + 10 = 27 (000011011) +17 + 11 = 28 (000011100) +17 + 12 = 29 (000011101) +17 + 13 = 30 (000011110) +17 + 14 = 31 (000011111) +17 + 15 = 32 (000100000) +17 + 16 = 33 (000100001) +17 + 17 = 34 (000100010) +17 + 18 = 35 (000100011) +17 + 19 = 36 (000100100) +17 + 20 = 37 (000100101) +17 + 21 = 38 (000100110) +17 + 22 = 39 (000100111) +17 + 23 = 40 (000101000) +17 + 24 = 41 (000101001) +17 + 25 = 42 (000101010) +17 + 26 = 43 (000101011) +17 + 27 = 44 (000101100) +17 + 28 = 45 (000101101) +17 + 29 = 46 (000101110) +17 + 30 = 47 (000101111) +17 + 31 = 48 (000110000) +17 + -32 = -15 (111110001) +17 + -31 = -14 (111110010) +17 + -30 = -13 (111110011) +17 + -29 = -12 (111110100) +17 + -28 = -11 (111110101) +17 + -27 = -10 (111110110) +17 + -26 = -9 (111110111) +17 + -25 = -8 (111111000) +17 + -24 = -7 (111111001) +17 + -23 = -6 (111111010) +17 + -22 = -5 (111111011) +17 + -21 = -4 (111111100) +17 + -20 = -3 (111111101) +17 + -19 = -2 (111111110) +17 + -18 = -1 (111111111) +17 + -17 = 0 (000000000) +17 + -16 = 1 (000000001) +17 + -15 = 2 (000000010) +17 + -14 = 3 (000000011) +17 + -13 = 4 (000000100) +17 + -12 = 5 (000000101) +17 + -11 = 6 (000000110) +17 + -10 = 7 (000000111) +17 + -9 = 8 (000001000) +17 + -8 = 9 (000001001) +17 + -7 = 10 (000001010) +17 + -6 = 11 (000001011) +17 + -5 = 12 (000001100) +17 + -4 = 13 (000001101) +17 + -3 = 14 (000001110) +17 + -2 = 15 (000001111) +17 + -1 = 16 (000010000) +18 + 0 = 18 (000010010) +18 + 1 = 19 (000010011) +18 + 2 = 20 (000010100) +18 + 3 = 21 (000010101) +18 + 4 = 22 (000010110) +18 + 5 = 23 (000010111) +18 + 6 = 24 (000011000) +18 + 7 = 25 (000011001) +18 + 8 = 26 (000011010) +18 + 9 = 27 (000011011) +18 + 10 = 28 (000011100) +18 + 11 = 29 (000011101) +18 + 12 = 30 (000011110) +18 + 13 = 31 (000011111) +18 + 14 = 32 (000100000) +18 + 15 = 33 (000100001) +18 + 16 = 34 (000100010) +18 + 17 = 35 (000100011) +18 + 18 = 36 (000100100) +18 + 19 = 37 (000100101) +18 + 20 = 38 (000100110) +18 + 21 = 39 (000100111) +18 + 22 = 40 (000101000) +18 + 23 = 41 (000101001) +18 + 24 = 42 (000101010) +18 + 25 = 43 (000101011) +18 + 26 = 44 (000101100) +18 + 27 = 45 (000101101) +18 + 28 = 46 (000101110) +18 + 29 = 47 (000101111) +18 + 30 = 48 (000110000) +18 + 31 = 49 (000110001) +18 + -32 = -14 (111110010) +18 + -31 = -13 (111110011) +18 + -30 = -12 (111110100) +18 + -29 = -11 (111110101) +18 + -28 = -10 (111110110) +18 + -27 = -9 (111110111) +18 + -26 = -8 (111111000) +18 + -25 = -7 (111111001) +18 + -24 = -6 (111111010) +18 + -23 = -5 (111111011) +18 + -22 = -4 (111111100) +18 + -21 = -3 (111111101) +18 + -20 = -2 (111111110) +18 + -19 = -1 (111111111) +18 + -18 = 0 (000000000) +18 + -17 = 1 (000000001) +18 + -16 = 2 (000000010) +18 + -15 = 3 (000000011) +18 + -14 = 4 (000000100) +18 + -13 = 5 (000000101) +18 + -12 = 6 (000000110) +18 + -11 = 7 (000000111) +18 + -10 = 8 (000001000) +18 + -9 = 9 (000001001) +18 + -8 = 10 (000001010) +18 + -7 = 11 (000001011) +18 + -6 = 12 (000001100) +18 + -5 = 13 (000001101) +18 + -4 = 14 (000001110) +18 + -3 = 15 (000001111) +18 + -2 = 16 (000010000) +18 + -1 = 17 (000010001) +19 + 0 = 19 (000010011) +19 + 1 = 20 (000010100) +19 + 2 = 21 (000010101) +19 + 3 = 22 (000010110) +19 + 4 = 23 (000010111) +19 + 5 = 24 (000011000) +19 + 6 = 25 (000011001) +19 + 7 = 26 (000011010) +19 + 8 = 27 (000011011) +19 + 9 = 28 (000011100) +19 + 10 = 29 (000011101) +19 + 11 = 30 (000011110) +19 + 12 = 31 (000011111) +19 + 13 = 32 (000100000) +19 + 14 = 33 (000100001) +19 + 15 = 34 (000100010) +19 + 16 = 35 (000100011) +19 + 17 = 36 (000100100) +19 + 18 = 37 (000100101) +19 + 19 = 38 (000100110) +19 + 20 = 39 (000100111) +19 + 21 = 40 (000101000) +19 + 22 = 41 (000101001) +19 + 23 = 42 (000101010) +19 + 24 = 43 (000101011) +19 + 25 = 44 (000101100) +19 + 26 = 45 (000101101) +19 + 27 = 46 (000101110) +19 + 28 = 47 (000101111) +19 + 29 = 48 (000110000) +19 + 30 = 49 (000110001) +19 + 31 = 50 (000110010) +19 + -32 = -13 (111110011) +19 + -31 = -12 (111110100) +19 + -30 = -11 (111110101) +19 + -29 = -10 (111110110) +19 + -28 = -9 (111110111) +19 + -27 = -8 (111111000) +19 + -26 = -7 (111111001) +19 + -25 = -6 (111111010) +19 + -24 = -5 (111111011) +19 + -23 = -4 (111111100) +19 + -22 = -3 (111111101) +19 + -21 = -2 (111111110) +19 + -20 = -1 (111111111) +19 + -19 = 0 (000000000) +19 + -18 = 1 (000000001) +19 + -17 = 2 (000000010) +19 + -16 = 3 (000000011) +19 + -15 = 4 (000000100) +19 + -14 = 5 (000000101) +19 + -13 = 6 (000000110) +19 + -12 = 7 (000000111) +19 + -11 = 8 (000001000) +19 + -10 = 9 (000001001) +19 + -9 = 10 (000001010) +19 + -8 = 11 (000001011) +19 + -7 = 12 (000001100) +19 + -6 = 13 (000001101) +19 + -5 = 14 (000001110) +19 + -4 = 15 (000001111) +19 + -3 = 16 (000010000) +19 + -2 = 17 (000010001) +19 + -1 = 18 (000010010) +20 + 0 = 20 (000010100) +20 + 1 = 21 (000010101) +20 + 2 = 22 (000010110) +20 + 3 = 23 (000010111) +20 + 4 = 24 (000011000) +20 + 5 = 25 (000011001) +20 + 6 = 26 (000011010) +20 + 7 = 27 (000011011) +20 + 8 = 28 (000011100) +20 + 9 = 29 (000011101) +20 + 10 = 30 (000011110) +20 + 11 = 31 (000011111) +20 + 12 = 32 (000100000) +20 + 13 = 33 (000100001) +20 + 14 = 34 (000100010) +20 + 15 = 35 (000100011) +20 + 16 = 36 (000100100) +20 + 17 = 37 (000100101) +20 + 18 = 38 (000100110) +20 + 19 = 39 (000100111) +20 + 20 = 40 (000101000) +20 + 21 = 41 (000101001) +20 + 22 = 42 (000101010) +20 + 23 = 43 (000101011) +20 + 24 = 44 (000101100) +20 + 25 = 45 (000101101) +20 + 26 = 46 (000101110) +20 + 27 = 47 (000101111) +20 + 28 = 48 (000110000) +20 + 29 = 49 (000110001) +20 + 30 = 50 (000110010) +20 + 31 = 51 (000110011) +20 + -32 = -12 (111110100) +20 + -31 = -11 (111110101) +20 + -30 = -10 (111110110) +20 + -29 = -9 (111110111) +20 + -28 = -8 (111111000) +20 + -27 = -7 (111111001) +20 + -26 = -6 (111111010) +20 + -25 = -5 (111111011) +20 + -24 = -4 (111111100) +20 + -23 = -3 (111111101) +20 + -22 = -2 (111111110) +20 + -21 = -1 (111111111) +20 + -20 = 0 (000000000) +20 + -19 = 1 (000000001) +20 + -18 = 2 (000000010) +20 + -17 = 3 (000000011) +20 + -16 = 4 (000000100) +20 + -15 = 5 (000000101) +20 + -14 = 6 (000000110) +20 + -13 = 7 (000000111) +20 + -12 = 8 (000001000) +20 + -11 = 9 (000001001) +20 + -10 = 10 (000001010) +20 + -9 = 11 (000001011) +20 + -8 = 12 (000001100) +20 + -7 = 13 (000001101) +20 + -6 = 14 (000001110) +20 + -5 = 15 (000001111) +20 + -4 = 16 (000010000) +20 + -3 = 17 (000010001) +20 + -2 = 18 (000010010) +20 + -1 = 19 (000010011) +21 + 0 = 21 (000010101) +21 + 1 = 22 (000010110) +21 + 2 = 23 (000010111) +21 + 3 = 24 (000011000) +21 + 4 = 25 (000011001) +21 + 5 = 26 (000011010) +21 + 6 = 27 (000011011) +21 + 7 = 28 (000011100) +21 + 8 = 29 (000011101) +21 + 9 = 30 (000011110) +21 + 10 = 31 (000011111) +21 + 11 = 32 (000100000) +21 + 12 = 33 (000100001) +21 + 13 = 34 (000100010) +21 + 14 = 35 (000100011) +21 + 15 = 36 (000100100) +21 + 16 = 37 (000100101) +21 + 17 = 38 (000100110) +21 + 18 = 39 (000100111) +21 + 19 = 40 (000101000) +21 + 20 = 41 (000101001) +21 + 21 = 42 (000101010) +21 + 22 = 43 (000101011) +21 + 23 = 44 (000101100) +21 + 24 = 45 (000101101) +21 + 25 = 46 (000101110) +21 + 26 = 47 (000101111) +21 + 27 = 48 (000110000) +21 + 28 = 49 (000110001) +21 + 29 = 50 (000110010) +21 + 30 = 51 (000110011) +21 + 31 = 52 (000110100) +21 + -32 = -11 (111110101) +21 + -31 = -10 (111110110) +21 + -30 = -9 (111110111) +21 + -29 = -8 (111111000) +21 + -28 = -7 (111111001) +21 + -27 = -6 (111111010) +21 + -26 = -5 (111111011) +21 + -25 = -4 (111111100) +21 + -24 = -3 (111111101) +21 + -23 = -2 (111111110) +21 + -22 = -1 (111111111) +21 + -21 = 0 (000000000) +21 + -20 = 1 (000000001) +21 + -19 = 2 (000000010) +21 + -18 = 3 (000000011) +21 + -17 = 4 (000000100) +21 + -16 = 5 (000000101) +21 + -15 = 6 (000000110) +21 + -14 = 7 (000000111) +21 + -13 = 8 (000001000) +21 + -12 = 9 (000001001) +21 + -11 = 10 (000001010) +21 + -10 = 11 (000001011) +21 + -9 = 12 (000001100) +21 + -8 = 13 (000001101) +21 + -7 = 14 (000001110) +21 + -6 = 15 (000001111) +21 + -5 = 16 (000010000) +21 + -4 = 17 (000010001) +21 + -3 = 18 (000010010) +21 + -2 = 19 (000010011) +21 + -1 = 20 (000010100) +22 + 0 = 22 (000010110) +22 + 1 = 23 (000010111) +22 + 2 = 24 (000011000) +22 + 3 = 25 (000011001) +22 + 4 = 26 (000011010) +22 + 5 = 27 (000011011) +22 + 6 = 28 (000011100) +22 + 7 = 29 (000011101) +22 + 8 = 30 (000011110) +22 + 9 = 31 (000011111) +22 + 10 = 32 (000100000) +22 + 11 = 33 (000100001) +22 + 12 = 34 (000100010) +22 + 13 = 35 (000100011) +22 + 14 = 36 (000100100) +22 + 15 = 37 (000100101) +22 + 16 = 38 (000100110) +22 + 17 = 39 (000100111) +22 + 18 = 40 (000101000) +22 + 19 = 41 (000101001) +22 + 20 = 42 (000101010) +22 + 21 = 43 (000101011) +22 + 22 = 44 (000101100) +22 + 23 = 45 (000101101) +22 + 24 = 46 (000101110) +22 + 25 = 47 (000101111) +22 + 26 = 48 (000110000) +22 + 27 = 49 (000110001) +22 + 28 = 50 (000110010) +22 + 29 = 51 (000110011) +22 + 30 = 52 (000110100) +22 + 31 = 53 (000110101) +22 + -32 = -10 (111110110) +22 + -31 = -9 (111110111) +22 + -30 = -8 (111111000) +22 + -29 = -7 (111111001) +22 + -28 = -6 (111111010) +22 + -27 = -5 (111111011) +22 + -26 = -4 (111111100) +22 + -25 = -3 (111111101) +22 + -24 = -2 (111111110) +22 + -23 = -1 (111111111) +22 + -22 = 0 (000000000) +22 + -21 = 1 (000000001) +22 + -20 = 2 (000000010) +22 + -19 = 3 (000000011) +22 + -18 = 4 (000000100) +22 + -17 = 5 (000000101) +22 + -16 = 6 (000000110) +22 + -15 = 7 (000000111) +22 + -14 = 8 (000001000) +22 + -13 = 9 (000001001) +22 + -12 = 10 (000001010) +22 + -11 = 11 (000001011) +22 + -10 = 12 (000001100) +22 + -9 = 13 (000001101) +22 + -8 = 14 (000001110) +22 + -7 = 15 (000001111) +22 + -6 = 16 (000010000) +22 + -5 = 17 (000010001) +22 + -4 = 18 (000010010) +22 + -3 = 19 (000010011) +22 + -2 = 20 (000010100) +22 + -1 = 21 (000010101) +23 + 0 = 23 (000010111) +23 + 1 = 24 (000011000) +23 + 2 = 25 (000011001) +23 + 3 = 26 (000011010) +23 + 4 = 27 (000011011) +23 + 5 = 28 (000011100) +23 + 6 = 29 (000011101) +23 + 7 = 30 (000011110) +23 + 8 = 31 (000011111) +23 + 9 = 32 (000100000) +23 + 10 = 33 (000100001) +23 + 11 = 34 (000100010) +23 + 12 = 35 (000100011) +23 + 13 = 36 (000100100) +23 + 14 = 37 (000100101) +23 + 15 = 38 (000100110) +23 + 16 = 39 (000100111) +23 + 17 = 40 (000101000) +23 + 18 = 41 (000101001) +23 + 19 = 42 (000101010) +23 + 20 = 43 (000101011) +23 + 21 = 44 (000101100) +23 + 22 = 45 (000101101) +23 + 23 = 46 (000101110) +23 + 24 = 47 (000101111) +23 + 25 = 48 (000110000) +23 + 26 = 49 (000110001) +23 + 27 = 50 (000110010) +23 + 28 = 51 (000110011) +23 + 29 = 52 (000110100) +23 + 30 = 53 (000110101) +23 + 31 = 54 (000110110) +23 + -32 = -9 (111110111) +23 + -31 = -8 (111111000) +23 + -30 = -7 (111111001) +23 + -29 = -6 (111111010) +23 + -28 = -5 (111111011) +23 + -27 = -4 (111111100) +23 + -26 = -3 (111111101) +23 + -25 = -2 (111111110) +23 + -24 = -1 (111111111) +23 + -23 = 0 (000000000) +23 + -22 = 1 (000000001) +23 + -21 = 2 (000000010) +23 + -20 = 3 (000000011) +23 + -19 = 4 (000000100) +23 + -18 = 5 (000000101) +23 + -17 = 6 (000000110) +23 + -16 = 7 (000000111) +23 + -15 = 8 (000001000) +23 + -14 = 9 (000001001) +23 + -13 = 10 (000001010) +23 + -12 = 11 (000001011) +23 + -11 = 12 (000001100) +23 + -10 = 13 (000001101) +23 + -9 = 14 (000001110) +23 + -8 = 15 (000001111) +23 + -7 = 16 (000010000) +23 + -6 = 17 (000010001) +23 + -5 = 18 (000010010) +23 + -4 = 19 (000010011) +23 + -3 = 20 (000010100) +23 + -2 = 21 (000010101) +23 + -1 = 22 (000010110) +24 + 0 = 24 (000011000) +24 + 1 = 25 (000011001) +24 + 2 = 26 (000011010) +24 + 3 = 27 (000011011) +24 + 4 = 28 (000011100) +24 + 5 = 29 (000011101) +24 + 6 = 30 (000011110) +24 + 7 = 31 (000011111) +24 + 8 = 32 (000100000) +24 + 9 = 33 (000100001) +24 + 10 = 34 (000100010) +24 + 11 = 35 (000100011) +24 + 12 = 36 (000100100) +24 + 13 = 37 (000100101) +24 + 14 = 38 (000100110) +24 + 15 = 39 (000100111) +24 + 16 = 40 (000101000) +24 + 17 = 41 (000101001) +24 + 18 = 42 (000101010) +24 + 19 = 43 (000101011) +24 + 20 = 44 (000101100) +24 + 21 = 45 (000101101) +24 + 22 = 46 (000101110) +24 + 23 = 47 (000101111) +24 + 24 = 48 (000110000) +24 + 25 = 49 (000110001) +24 + 26 = 50 (000110010) +24 + 27 = 51 (000110011) +24 + 28 = 52 (000110100) +24 + 29 = 53 (000110101) +24 + 30 = 54 (000110110) +24 + 31 = 55 (000110111) +24 + -32 = -8 (111111000) +24 + -31 = -7 (111111001) +24 + -30 = -6 (111111010) +24 + -29 = -5 (111111011) +24 + -28 = -4 (111111100) +24 + -27 = -3 (111111101) +24 + -26 = -2 (111111110) +24 + -25 = -1 (111111111) +24 + -24 = 0 (000000000) +24 + -23 = 1 (000000001) +24 + -22 = 2 (000000010) +24 + -21 = 3 (000000011) +24 + -20 = 4 (000000100) +24 + -19 = 5 (000000101) +24 + -18 = 6 (000000110) +24 + -17 = 7 (000000111) +24 + -16 = 8 (000001000) +24 + -15 = 9 (000001001) +24 + -14 = 10 (000001010) +24 + -13 = 11 (000001011) +24 + -12 = 12 (000001100) +24 + -11 = 13 (000001101) +24 + -10 = 14 (000001110) +24 + -9 = 15 (000001111) +24 + -8 = 16 (000010000) +24 + -7 = 17 (000010001) +24 + -6 = 18 (000010010) +24 + -5 = 19 (000010011) +24 + -4 = 20 (000010100) +24 + -3 = 21 (000010101) +24 + -2 = 22 (000010110) +24 + -1 = 23 (000010111) +25 + 0 = 25 (000011001) +25 + 1 = 26 (000011010) +25 + 2 = 27 (000011011) +25 + 3 = 28 (000011100) +25 + 4 = 29 (000011101) +25 + 5 = 30 (000011110) +25 + 6 = 31 (000011111) +25 + 7 = 32 (000100000) +25 + 8 = 33 (000100001) +25 + 9 = 34 (000100010) +25 + 10 = 35 (000100011) +25 + 11 = 36 (000100100) +25 + 12 = 37 (000100101) +25 + 13 = 38 (000100110) +25 + 14 = 39 (000100111) +25 + 15 = 40 (000101000) +25 + 16 = 41 (000101001) +25 + 17 = 42 (000101010) +25 + 18 = 43 (000101011) +25 + 19 = 44 (000101100) +25 + 20 = 45 (000101101) +25 + 21 = 46 (000101110) +25 + 22 = 47 (000101111) +25 + 23 = 48 (000110000) +25 + 24 = 49 (000110001) +25 + 25 = 50 (000110010) +25 + 26 = 51 (000110011) +25 + 27 = 52 (000110100) +25 + 28 = 53 (000110101) +25 + 29 = 54 (000110110) +25 + 30 = 55 (000110111) +25 + 31 = 56 (000111000) +25 + -32 = -7 (111111001) +25 + -31 = -6 (111111010) +25 + -30 = -5 (111111011) +25 + -29 = -4 (111111100) +25 + -28 = -3 (111111101) +25 + -27 = -2 (111111110) +25 + -26 = -1 (111111111) +25 + -25 = 0 (000000000) +25 + -24 = 1 (000000001) +25 + -23 = 2 (000000010) +25 + -22 = 3 (000000011) +25 + -21 = 4 (000000100) +25 + -20 = 5 (000000101) +25 + -19 = 6 (000000110) +25 + -18 = 7 (000000111) +25 + -17 = 8 (000001000) +25 + -16 = 9 (000001001) +25 + -15 = 10 (000001010) +25 + -14 = 11 (000001011) +25 + -13 = 12 (000001100) +25 + -12 = 13 (000001101) +25 + -11 = 14 (000001110) +25 + -10 = 15 (000001111) +25 + -9 = 16 (000010000) +25 + -8 = 17 (000010001) +25 + -7 = 18 (000010010) +25 + -6 = 19 (000010011) +25 + -5 = 20 (000010100) +25 + -4 = 21 (000010101) +25 + -3 = 22 (000010110) +25 + -2 = 23 (000010111) +25 + -1 = 24 (000011000) +26 + 0 = 26 (000011010) +26 + 1 = 27 (000011011) +26 + 2 = 28 (000011100) +26 + 3 = 29 (000011101) +26 + 4 = 30 (000011110) +26 + 5 = 31 (000011111) +26 + 6 = 32 (000100000) +26 + 7 = 33 (000100001) +26 + 8 = 34 (000100010) +26 + 9 = 35 (000100011) +26 + 10 = 36 (000100100) +26 + 11 = 37 (000100101) +26 + 12 = 38 (000100110) +26 + 13 = 39 (000100111) +26 + 14 = 40 (000101000) +26 + 15 = 41 (000101001) +26 + 16 = 42 (000101010) +26 + 17 = 43 (000101011) +26 + 18 = 44 (000101100) +26 + 19 = 45 (000101101) +26 + 20 = 46 (000101110) +26 + 21 = 47 (000101111) +26 + 22 = 48 (000110000) +26 + 23 = 49 (000110001) +26 + 24 = 50 (000110010) +26 + 25 = 51 (000110011) +26 + 26 = 52 (000110100) +26 + 27 = 53 (000110101) +26 + 28 = 54 (000110110) +26 + 29 = 55 (000110111) +26 + 30 = 56 (000111000) +26 + 31 = 57 (000111001) +26 + -32 = -6 (111111010) +26 + -31 = -5 (111111011) +26 + -30 = -4 (111111100) +26 + -29 = -3 (111111101) +26 + -28 = -2 (111111110) +26 + -27 = -1 (111111111) +26 + -26 = 0 (000000000) +26 + -25 = 1 (000000001) +26 + -24 = 2 (000000010) +26 + -23 = 3 (000000011) +26 + -22 = 4 (000000100) +26 + -21 = 5 (000000101) +26 + -20 = 6 (000000110) +26 + -19 = 7 (000000111) +26 + -18 = 8 (000001000) +26 + -17 = 9 (000001001) +26 + -16 = 10 (000001010) +26 + -15 = 11 (000001011) +26 + -14 = 12 (000001100) +26 + -13 = 13 (000001101) +26 + -12 = 14 (000001110) +26 + -11 = 15 (000001111) +26 + -10 = 16 (000010000) +26 + -9 = 17 (000010001) +26 + -8 = 18 (000010010) +26 + -7 = 19 (000010011) +26 + -6 = 20 (000010100) +26 + -5 = 21 (000010101) +26 + -4 = 22 (000010110) +26 + -3 = 23 (000010111) +26 + -2 = 24 (000011000) +26 + -1 = 25 (000011001) +27 + 0 = 27 (000011011) +27 + 1 = 28 (000011100) +27 + 2 = 29 (000011101) +27 + 3 = 30 (000011110) +27 + 4 = 31 (000011111) +27 + 5 = 32 (000100000) +27 + 6 = 33 (000100001) +27 + 7 = 34 (000100010) +27 + 8 = 35 (000100011) +27 + 9 = 36 (000100100) +27 + 10 = 37 (000100101) +27 + 11 = 38 (000100110) +27 + 12 = 39 (000100111) +27 + 13 = 40 (000101000) +27 + 14 = 41 (000101001) +27 + 15 = 42 (000101010) +27 + 16 = 43 (000101011) +27 + 17 = 44 (000101100) +27 + 18 = 45 (000101101) +27 + 19 = 46 (000101110) +27 + 20 = 47 (000101111) +27 + 21 = 48 (000110000) +27 + 22 = 49 (000110001) +27 + 23 = 50 (000110010) +27 + 24 = 51 (000110011) +27 + 25 = 52 (000110100) +27 + 26 = 53 (000110101) +27 + 27 = 54 (000110110) +27 + 28 = 55 (000110111) +27 + 29 = 56 (000111000) +27 + 30 = 57 (000111001) +27 + 31 = 58 (000111010) +27 + -32 = -5 (111111011) +27 + -31 = -4 (111111100) +27 + -30 = -3 (111111101) +27 + -29 = -2 (111111110) +27 + -28 = -1 (111111111) +27 + -27 = 0 (000000000) +27 + -26 = 1 (000000001) +27 + -25 = 2 (000000010) +27 + -24 = 3 (000000011) +27 + -23 = 4 (000000100) +27 + -22 = 5 (000000101) +27 + -21 = 6 (000000110) +27 + -20 = 7 (000000111) +27 + -19 = 8 (000001000) +27 + -18 = 9 (000001001) +27 + -17 = 10 (000001010) +27 + -16 = 11 (000001011) +27 + -15 = 12 (000001100) +27 + -14 = 13 (000001101) +27 + -13 = 14 (000001110) +27 + -12 = 15 (000001111) +27 + -11 = 16 (000010000) +27 + -10 = 17 (000010001) +27 + -9 = 18 (000010010) +27 + -8 = 19 (000010011) +27 + -7 = 20 (000010100) +27 + -6 = 21 (000010101) +27 + -5 = 22 (000010110) +27 + -4 = 23 (000010111) +27 + -3 = 24 (000011000) +27 + -2 = 25 (000011001) +27 + -1 = 26 (000011010) +28 + 0 = 28 (000011100) +28 + 1 = 29 (000011101) +28 + 2 = 30 (000011110) +28 + 3 = 31 (000011111) +28 + 4 = 32 (000100000) +28 + 5 = 33 (000100001) +28 + 6 = 34 (000100010) +28 + 7 = 35 (000100011) +28 + 8 = 36 (000100100) +28 + 9 = 37 (000100101) +28 + 10 = 38 (000100110) +28 + 11 = 39 (000100111) +28 + 12 = 40 (000101000) +28 + 13 = 41 (000101001) +28 + 14 = 42 (000101010) +28 + 15 = 43 (000101011) +28 + 16 = 44 (000101100) +28 + 17 = 45 (000101101) +28 + 18 = 46 (000101110) +28 + 19 = 47 (000101111) +28 + 20 = 48 (000110000) +28 + 21 = 49 (000110001) +28 + 22 = 50 (000110010) +28 + 23 = 51 (000110011) +28 + 24 = 52 (000110100) +28 + 25 = 53 (000110101) +28 + 26 = 54 (000110110) +28 + 27 = 55 (000110111) +28 + 28 = 56 (000111000) +28 + 29 = 57 (000111001) +28 + 30 = 58 (000111010) +28 + 31 = 59 (000111011) +28 + -32 = -4 (111111100) +28 + -31 = -3 (111111101) +28 + -30 = -2 (111111110) +28 + -29 = -1 (111111111) +28 + -28 = 0 (000000000) +28 + -27 = 1 (000000001) +28 + -26 = 2 (000000010) +28 + -25 = 3 (000000011) +28 + -24 = 4 (000000100) +28 + -23 = 5 (000000101) +28 + -22 = 6 (000000110) +28 + -21 = 7 (000000111) +28 + -20 = 8 (000001000) +28 + -19 = 9 (000001001) +28 + -18 = 10 (000001010) +28 + -17 = 11 (000001011) +28 + -16 = 12 (000001100) +28 + -15 = 13 (000001101) +28 + -14 = 14 (000001110) +28 + -13 = 15 (000001111) +28 + -12 = 16 (000010000) +28 + -11 = 17 (000010001) +28 + -10 = 18 (000010010) +28 + -9 = 19 (000010011) +28 + -8 = 20 (000010100) +28 + -7 = 21 (000010101) +28 + -6 = 22 (000010110) +28 + -5 = 23 (000010111) +28 + -4 = 24 (000011000) +28 + -3 = 25 (000011001) +28 + -2 = 26 (000011010) +28 + -1 = 27 (000011011) +29 + 0 = 29 (000011101) +29 + 1 = 30 (000011110) +29 + 2 = 31 (000011111) +29 + 3 = 32 (000100000) +29 + 4 = 33 (000100001) +29 + 5 = 34 (000100010) +29 + 6 = 35 (000100011) +29 + 7 = 36 (000100100) +29 + 8 = 37 (000100101) +29 + 9 = 38 (000100110) +29 + 10 = 39 (000100111) +29 + 11 = 40 (000101000) +29 + 12 = 41 (000101001) +29 + 13 = 42 (000101010) +29 + 14 = 43 (000101011) +29 + 15 = 44 (000101100) +29 + 16 = 45 (000101101) +29 + 17 = 46 (000101110) +29 + 18 = 47 (000101111) +29 + 19 = 48 (000110000) +29 + 20 = 49 (000110001) +29 + 21 = 50 (000110010) +29 + 22 = 51 (000110011) +29 + 23 = 52 (000110100) +29 + 24 = 53 (000110101) +29 + 25 = 54 (000110110) +29 + 26 = 55 (000110111) +29 + 27 = 56 (000111000) +29 + 28 = 57 (000111001) +29 + 29 = 58 (000111010) +29 + 30 = 59 (000111011) +29 + 31 = 60 (000111100) +29 + -32 = -3 (111111101) +29 + -31 = -2 (111111110) +29 + -30 = -1 (111111111) +29 + -29 = 0 (000000000) +29 + -28 = 1 (000000001) +29 + -27 = 2 (000000010) +29 + -26 = 3 (000000011) +29 + -25 = 4 (000000100) +29 + -24 = 5 (000000101) +29 + -23 = 6 (000000110) +29 + -22 = 7 (000000111) +29 + -21 = 8 (000001000) +29 + -20 = 9 (000001001) +29 + -19 = 10 (000001010) +29 + -18 = 11 (000001011) +29 + -17 = 12 (000001100) +29 + -16 = 13 (000001101) +29 + -15 = 14 (000001110) +29 + -14 = 15 (000001111) +29 + -13 = 16 (000010000) +29 + -12 = 17 (000010001) +29 + -11 = 18 (000010010) +29 + -10 = 19 (000010011) +29 + -9 = 20 (000010100) +29 + -8 = 21 (000010101) +29 + -7 = 22 (000010110) +29 + -6 = 23 (000010111) +29 + -5 = 24 (000011000) +29 + -4 = 25 (000011001) +29 + -3 = 26 (000011010) +29 + -2 = 27 (000011011) +29 + -1 = 28 (000011100) +30 + 0 = 30 (000011110) +30 + 1 = 31 (000011111) +30 + 2 = 32 (000100000) +30 + 3 = 33 (000100001) +30 + 4 = 34 (000100010) +30 + 5 = 35 (000100011) +30 + 6 = 36 (000100100) +30 + 7 = 37 (000100101) +30 + 8 = 38 (000100110) +30 + 9 = 39 (000100111) +30 + 10 = 40 (000101000) +30 + 11 = 41 (000101001) +30 + 12 = 42 (000101010) +30 + 13 = 43 (000101011) +30 + 14 = 44 (000101100) +30 + 15 = 45 (000101101) +30 + 16 = 46 (000101110) +30 + 17 = 47 (000101111) +30 + 18 = 48 (000110000) +30 + 19 = 49 (000110001) +30 + 20 = 50 (000110010) +30 + 21 = 51 (000110011) +30 + 22 = 52 (000110100) +30 + 23 = 53 (000110101) +30 + 24 = 54 (000110110) +30 + 25 = 55 (000110111) +30 + 26 = 56 (000111000) +30 + 27 = 57 (000111001) +30 + 28 = 58 (000111010) +30 + 29 = 59 (000111011) +30 + 30 = 60 (000111100) +30 + 31 = 61 (000111101) +30 + -32 = -2 (111111110) +30 + -31 = -1 (111111111) +30 + -30 = 0 (000000000) +30 + -29 = 1 (000000001) +30 + -28 = 2 (000000010) +30 + -27 = 3 (000000011) +30 + -26 = 4 (000000100) +30 + -25 = 5 (000000101) +30 + -24 = 6 (000000110) +30 + -23 = 7 (000000111) +30 + -22 = 8 (000001000) +30 + -21 = 9 (000001001) +30 + -20 = 10 (000001010) +30 + -19 = 11 (000001011) +30 + -18 = 12 (000001100) +30 + -17 = 13 (000001101) +30 + -16 = 14 (000001110) +30 + -15 = 15 (000001111) +30 + -14 = 16 (000010000) +30 + -13 = 17 (000010001) +30 + -12 = 18 (000010010) +30 + -11 = 19 (000010011) +30 + -10 = 20 (000010100) +30 + -9 = 21 (000010101) +30 + -8 = 22 (000010110) +30 + -7 = 23 (000010111) +30 + -6 = 24 (000011000) +30 + -5 = 25 (000011001) +30 + -4 = 26 (000011010) +30 + -3 = 27 (000011011) +30 + -2 = 28 (000011100) +30 + -1 = 29 (000011101) +31 + 0 = 31 (000011111) +31 + 1 = 32 (000100000) +31 + 2 = 33 (000100001) +31 + 3 = 34 (000100010) +31 + 4 = 35 (000100011) +31 + 5 = 36 (000100100) +31 + 6 = 37 (000100101) +31 + 7 = 38 (000100110) +31 + 8 = 39 (000100111) +31 + 9 = 40 (000101000) +31 + 10 = 41 (000101001) +31 + 11 = 42 (000101010) +31 + 12 = 43 (000101011) +31 + 13 = 44 (000101100) +31 + 14 = 45 (000101101) +31 + 15 = 46 (000101110) +31 + 16 = 47 (000101111) +31 + 17 = 48 (000110000) +31 + 18 = 49 (000110001) +31 + 19 = 50 (000110010) +31 + 20 = 51 (000110011) +31 + 21 = 52 (000110100) +31 + 22 = 53 (000110101) +31 + 23 = 54 (000110110) +31 + 24 = 55 (000110111) +31 + 25 = 56 (000111000) +31 + 26 = 57 (000111001) +31 + 27 = 58 (000111010) +31 + 28 = 59 (000111011) +31 + 29 = 60 (000111100) +31 + 30 = 61 (000111101) +31 + 31 = 62 (000111110) +31 + -32 = -1 (111111111) +31 + -31 = 0 (000000000) +31 + -30 = 1 (000000001) +31 + -29 = 2 (000000010) +31 + -28 = 3 (000000011) +31 + -27 = 4 (000000100) +31 + -26 = 5 (000000101) +31 + -25 = 6 (000000110) +31 + -24 = 7 (000000111) +31 + -23 = 8 (000001000) +31 + -22 = 9 (000001001) +31 + -21 = 10 (000001010) +31 + -20 = 11 (000001011) +31 + -19 = 12 (000001100) +31 + -18 = 13 (000001101) +31 + -17 = 14 (000001110) +31 + -16 = 15 (000001111) +31 + -15 = 16 (000010000) +31 + -14 = 17 (000010001) +31 + -13 = 18 (000010010) +31 + -12 = 19 (000010011) +31 + -11 = 20 (000010100) +31 + -10 = 21 (000010101) +31 + -9 = 22 (000010110) +31 + -8 = 23 (000010111) +31 + -7 = 24 (000011000) +31 + -6 = 25 (000011001) +31 + -5 = 26 (000011010) +31 + -4 = 27 (000011011) +31 + -3 = 28 (000011100) +31 + -2 = 29 (000011101) +31 + -1 = 30 (000011110) +-32 + 0 = -32 (111100000) +-32 + 1 = -31 (111100001) +-32 + 2 = -30 (111100010) +-32 + 3 = -29 (111100011) +-32 + 4 = -28 (111100100) +-32 + 5 = -27 (111100101) +-32 + 6 = -26 (111100110) +-32 + 7 = -25 (111100111) +-32 + 8 = -24 (111101000) +-32 + 9 = -23 (111101001) +-32 + 10 = -22 (111101010) +-32 + 11 = -21 (111101011) +-32 + 12 = -20 (111101100) +-32 + 13 = -19 (111101101) +-32 + 14 = -18 (111101110) +-32 + 15 = -17 (111101111) +-32 + 16 = -16 (111110000) +-32 + 17 = -15 (111110001) +-32 + 18 = -14 (111110010) +-32 + 19 = -13 (111110011) +-32 + 20 = -12 (111110100) +-32 + 21 = -11 (111110101) +-32 + 22 = -10 (111110110) +-32 + 23 = -9 (111110111) +-32 + 24 = -8 (111111000) +-32 + 25 = -7 (111111001) +-32 + 26 = -6 (111111010) +-32 + 27 = -5 (111111011) +-32 + 28 = -4 (111111100) +-32 + 29 = -3 (111111101) +-32 + 30 = -2 (111111110) +-32 + 31 = -1 (111111111) +-32 + -32 = -64 (111000000) +-32 + -31 = -63 (111000001) +-32 + -30 = -62 (111000010) +-32 + -29 = -61 (111000011) +-32 + -28 = -60 (111000100) +-32 + -27 = -59 (111000101) +-32 + -26 = -58 (111000110) +-32 + -25 = -57 (111000111) +-32 + -24 = -56 (111001000) +-32 + -23 = -55 (111001001) +-32 + -22 = -54 (111001010) +-32 + -21 = -53 (111001011) +-32 + -20 = -52 (111001100) +-32 + -19 = -51 (111001101) +-32 + -18 = -50 (111001110) +-32 + -17 = -49 (111001111) +-32 + -16 = -48 (111010000) +-32 + -15 = -47 (111010001) +-32 + -14 = -46 (111010010) +-32 + -13 = -45 (111010011) +-32 + -12 = -44 (111010100) +-32 + -11 = -43 (111010101) +-32 + -10 = -42 (111010110) +-32 + -9 = -41 (111010111) +-32 + -8 = -40 (111011000) +-32 + -7 = -39 (111011001) +-32 + -6 = -38 (111011010) +-32 + -5 = -37 (111011011) +-32 + -4 = -36 (111011100) +-32 + -3 = -35 (111011101) +-32 + -2 = -34 (111011110) +-32 + -1 = -33 (111011111) +-31 + 0 = -31 (111100001) +-31 + 1 = -30 (111100010) +-31 + 2 = -29 (111100011) +-31 + 3 = -28 (111100100) +-31 + 4 = -27 (111100101) +-31 + 5 = -26 (111100110) +-31 + 6 = -25 (111100111) +-31 + 7 = -24 (111101000) +-31 + 8 = -23 (111101001) +-31 + 9 = -22 (111101010) +-31 + 10 = -21 (111101011) +-31 + 11 = -20 (111101100) +-31 + 12 = -19 (111101101) +-31 + 13 = -18 (111101110) +-31 + 14 = -17 (111101111) +-31 + 15 = -16 (111110000) +-31 + 16 = -15 (111110001) +-31 + 17 = -14 (111110010) +-31 + 18 = -13 (111110011) +-31 + 19 = -12 (111110100) +-31 + 20 = -11 (111110101) +-31 + 21 = -10 (111110110) +-31 + 22 = -9 (111110111) +-31 + 23 = -8 (111111000) +-31 + 24 = -7 (111111001) +-31 + 25 = -6 (111111010) +-31 + 26 = -5 (111111011) +-31 + 27 = -4 (111111100) +-31 + 28 = -3 (111111101) +-31 + 29 = -2 (111111110) +-31 + 30 = -1 (111111111) +-31 + 31 = 0 (000000000) +-31 + -32 = -63 (111000001) +-31 + -31 = -62 (111000010) +-31 + -30 = -61 (111000011) +-31 + -29 = -60 (111000100) +-31 + -28 = -59 (111000101) +-31 + -27 = -58 (111000110) +-31 + -26 = -57 (111000111) +-31 + -25 = -56 (111001000) +-31 + -24 = -55 (111001001) +-31 + -23 = -54 (111001010) +-31 + -22 = -53 (111001011) +-31 + -21 = -52 (111001100) +-31 + -20 = -51 (111001101) +-31 + -19 = -50 (111001110) +-31 + -18 = -49 (111001111) +-31 + -17 = -48 (111010000) +-31 + -16 = -47 (111010001) +-31 + -15 = -46 (111010010) +-31 + -14 = -45 (111010011) +-31 + -13 = -44 (111010100) +-31 + -12 = -43 (111010101) +-31 + -11 = -42 (111010110) +-31 + -10 = -41 (111010111) +-31 + -9 = -40 (111011000) +-31 + -8 = -39 (111011001) +-31 + -7 = -38 (111011010) +-31 + -6 = -37 (111011011) +-31 + -5 = -36 (111011100) +-31 + -4 = -35 (111011101) +-31 + -3 = -34 (111011110) +-31 + -2 = -33 (111011111) +-31 + -1 = -32 (111100000) +-30 + 0 = -30 (111100010) +-30 + 1 = -29 (111100011) +-30 + 2 = -28 (111100100) +-30 + 3 = -27 (111100101) +-30 + 4 = -26 (111100110) +-30 + 5 = -25 (111100111) +-30 + 6 = -24 (111101000) +-30 + 7 = -23 (111101001) +-30 + 8 = -22 (111101010) +-30 + 9 = -21 (111101011) +-30 + 10 = -20 (111101100) +-30 + 11 = -19 (111101101) +-30 + 12 = -18 (111101110) +-30 + 13 = -17 (111101111) +-30 + 14 = -16 (111110000) +-30 + 15 = -15 (111110001) +-30 + 16 = -14 (111110010) +-30 + 17 = -13 (111110011) +-30 + 18 = -12 (111110100) +-30 + 19 = -11 (111110101) +-30 + 20 = -10 (111110110) +-30 + 21 = -9 (111110111) +-30 + 22 = -8 (111111000) +-30 + 23 = -7 (111111001) +-30 + 24 = -6 (111111010) +-30 + 25 = -5 (111111011) +-30 + 26 = -4 (111111100) +-30 + 27 = -3 (111111101) +-30 + 28 = -2 (111111110) +-30 + 29 = -1 (111111111) +-30 + 30 = 0 (000000000) +-30 + 31 = 1 (000000001) +-30 + -32 = -62 (111000010) +-30 + -31 = -61 (111000011) +-30 + -30 = -60 (111000100) +-30 + -29 = -59 (111000101) +-30 + -28 = -58 (111000110) +-30 + -27 = -57 (111000111) +-30 + -26 = -56 (111001000) +-30 + -25 = -55 (111001001) +-30 + -24 = -54 (111001010) +-30 + -23 = -53 (111001011) +-30 + -22 = -52 (111001100) +-30 + -21 = -51 (111001101) +-30 + -20 = -50 (111001110) +-30 + -19 = -49 (111001111) +-30 + -18 = -48 (111010000) +-30 + -17 = -47 (111010001) +-30 + -16 = -46 (111010010) +-30 + -15 = -45 (111010011) +-30 + -14 = -44 (111010100) +-30 + -13 = -43 (111010101) +-30 + -12 = -42 (111010110) +-30 + -11 = -41 (111010111) +-30 + -10 = -40 (111011000) +-30 + -9 = -39 (111011001) +-30 + -8 = -38 (111011010) +-30 + -7 = -37 (111011011) +-30 + -6 = -36 (111011100) +-30 + -5 = -35 (111011101) +-30 + -4 = -34 (111011110) +-30 + -3 = -33 (111011111) +-30 + -2 = -32 (111100000) +-30 + -1 = -31 (111100001) +-29 + 0 = -29 (111100011) +-29 + 1 = -28 (111100100) +-29 + 2 = -27 (111100101) +-29 + 3 = -26 (111100110) +-29 + 4 = -25 (111100111) +-29 + 5 = -24 (111101000) +-29 + 6 = -23 (111101001) +-29 + 7 = -22 (111101010) +-29 + 8 = -21 (111101011) +-29 + 9 = -20 (111101100) +-29 + 10 = -19 (111101101) +-29 + 11 = -18 (111101110) +-29 + 12 = -17 (111101111) +-29 + 13 = -16 (111110000) +-29 + 14 = -15 (111110001) +-29 + 15 = -14 (111110010) +-29 + 16 = -13 (111110011) +-29 + 17 = -12 (111110100) +-29 + 18 = -11 (111110101) +-29 + 19 = -10 (111110110) +-29 + 20 = -9 (111110111) +-29 + 21 = -8 (111111000) +-29 + 22 = -7 (111111001) +-29 + 23 = -6 (111111010) +-29 + 24 = -5 (111111011) +-29 + 25 = -4 (111111100) +-29 + 26 = -3 (111111101) +-29 + 27 = -2 (111111110) +-29 + 28 = -1 (111111111) +-29 + 29 = 0 (000000000) +-29 + 30 = 1 (000000001) +-29 + 31 = 2 (000000010) +-29 + -32 = -61 (111000011) +-29 + -31 = -60 (111000100) +-29 + -30 = -59 (111000101) +-29 + -29 = -58 (111000110) +-29 + -28 = -57 (111000111) +-29 + -27 = -56 (111001000) +-29 + -26 = -55 (111001001) +-29 + -25 = -54 (111001010) +-29 + -24 = -53 (111001011) +-29 + -23 = -52 (111001100) +-29 + -22 = -51 (111001101) +-29 + -21 = -50 (111001110) +-29 + -20 = -49 (111001111) +-29 + -19 = -48 (111010000) +-29 + -18 = -47 (111010001) +-29 + -17 = -46 (111010010) +-29 + -16 = -45 (111010011) +-29 + -15 = -44 (111010100) +-29 + -14 = -43 (111010101) +-29 + -13 = -42 (111010110) +-29 + -12 = -41 (111010111) +-29 + -11 = -40 (111011000) +-29 + -10 = -39 (111011001) +-29 + -9 = -38 (111011010) +-29 + -8 = -37 (111011011) +-29 + -7 = -36 (111011100) +-29 + -6 = -35 (111011101) +-29 + -5 = -34 (111011110) +-29 + -4 = -33 (111011111) +-29 + -3 = -32 (111100000) +-29 + -2 = -31 (111100001) +-29 + -1 = -30 (111100010) +-28 + 0 = -28 (111100100) +-28 + 1 = -27 (111100101) +-28 + 2 = -26 (111100110) +-28 + 3 = -25 (111100111) +-28 + 4 = -24 (111101000) +-28 + 5 = -23 (111101001) +-28 + 6 = -22 (111101010) +-28 + 7 = -21 (111101011) +-28 + 8 = -20 (111101100) +-28 + 9 = -19 (111101101) +-28 + 10 = -18 (111101110) +-28 + 11 = -17 (111101111) +-28 + 12 = -16 (111110000) +-28 + 13 = -15 (111110001) +-28 + 14 = -14 (111110010) +-28 + 15 = -13 (111110011) +-28 + 16 = -12 (111110100) +-28 + 17 = -11 (111110101) +-28 + 18 = -10 (111110110) +-28 + 19 = -9 (111110111) +-28 + 20 = -8 (111111000) +-28 + 21 = -7 (111111001) +-28 + 22 = -6 (111111010) +-28 + 23 = -5 (111111011) +-28 + 24 = -4 (111111100) +-28 + 25 = -3 (111111101) +-28 + 26 = -2 (111111110) +-28 + 27 = -1 (111111111) +-28 + 28 = 0 (000000000) +-28 + 29 = 1 (000000001) +-28 + 30 = 2 (000000010) +-28 + 31 = 3 (000000011) +-28 + -32 = -60 (111000100) +-28 + -31 = -59 (111000101) +-28 + -30 = -58 (111000110) +-28 + -29 = -57 (111000111) +-28 + -28 = -56 (111001000) +-28 + -27 = -55 (111001001) +-28 + -26 = -54 (111001010) +-28 + -25 = -53 (111001011) +-28 + -24 = -52 (111001100) +-28 + -23 = -51 (111001101) +-28 + -22 = -50 (111001110) +-28 + -21 = -49 (111001111) +-28 + -20 = -48 (111010000) +-28 + -19 = -47 (111010001) +-28 + -18 = -46 (111010010) +-28 + -17 = -45 (111010011) +-28 + -16 = -44 (111010100) +-28 + -15 = -43 (111010101) +-28 + -14 = -42 (111010110) +-28 + -13 = -41 (111010111) +-28 + -12 = -40 (111011000) +-28 + -11 = -39 (111011001) +-28 + -10 = -38 (111011010) +-28 + -9 = -37 (111011011) +-28 + -8 = -36 (111011100) +-28 + -7 = -35 (111011101) +-28 + -6 = -34 (111011110) +-28 + -5 = -33 (111011111) +-28 + -4 = -32 (111100000) +-28 + -3 = -31 (111100001) +-28 + -2 = -30 (111100010) +-28 + -1 = -29 (111100011) +-27 + 0 = -27 (111100101) +-27 + 1 = -26 (111100110) +-27 + 2 = -25 (111100111) +-27 + 3 = -24 (111101000) +-27 + 4 = -23 (111101001) +-27 + 5 = -22 (111101010) +-27 + 6 = -21 (111101011) +-27 + 7 = -20 (111101100) +-27 + 8 = -19 (111101101) +-27 + 9 = -18 (111101110) +-27 + 10 = -17 (111101111) +-27 + 11 = -16 (111110000) +-27 + 12 = -15 (111110001) +-27 + 13 = -14 (111110010) +-27 + 14 = -13 (111110011) +-27 + 15 = -12 (111110100) +-27 + 16 = -11 (111110101) +-27 + 17 = -10 (111110110) +-27 + 18 = -9 (111110111) +-27 + 19 = -8 (111111000) +-27 + 20 = -7 (111111001) +-27 + 21 = -6 (111111010) +-27 + 22 = -5 (111111011) +-27 + 23 = -4 (111111100) +-27 + 24 = -3 (111111101) +-27 + 25 = -2 (111111110) +-27 + 26 = -1 (111111111) +-27 + 27 = 0 (000000000) +-27 + 28 = 1 (000000001) +-27 + 29 = 2 (000000010) +-27 + 30 = 3 (000000011) +-27 + 31 = 4 (000000100) +-27 + -32 = -59 (111000101) +-27 + -31 = -58 (111000110) +-27 + -30 = -57 (111000111) +-27 + -29 = -56 (111001000) +-27 + -28 = -55 (111001001) +-27 + -27 = -54 (111001010) +-27 + -26 = -53 (111001011) +-27 + -25 = -52 (111001100) +-27 + -24 = -51 (111001101) +-27 + -23 = -50 (111001110) +-27 + -22 = -49 (111001111) +-27 + -21 = -48 (111010000) +-27 + -20 = -47 (111010001) +-27 + -19 = -46 (111010010) +-27 + -18 = -45 (111010011) +-27 + -17 = -44 (111010100) +-27 + -16 = -43 (111010101) +-27 + -15 = -42 (111010110) +-27 + -14 = -41 (111010111) +-27 + -13 = -40 (111011000) +-27 + -12 = -39 (111011001) +-27 + -11 = -38 (111011010) +-27 + -10 = -37 (111011011) +-27 + -9 = -36 (111011100) +-27 + -8 = -35 (111011101) +-27 + -7 = -34 (111011110) +-27 + -6 = -33 (111011111) +-27 + -5 = -32 (111100000) +-27 + -4 = -31 (111100001) +-27 + -3 = -30 (111100010) +-27 + -2 = -29 (111100011) +-27 + -1 = -28 (111100100) +-26 + 0 = -26 (111100110) +-26 + 1 = -25 (111100111) +-26 + 2 = -24 (111101000) +-26 + 3 = -23 (111101001) +-26 + 4 = -22 (111101010) +-26 + 5 = -21 (111101011) +-26 + 6 = -20 (111101100) +-26 + 7 = -19 (111101101) +-26 + 8 = -18 (111101110) +-26 + 9 = -17 (111101111) +-26 + 10 = -16 (111110000) +-26 + 11 = -15 (111110001) +-26 + 12 = -14 (111110010) +-26 + 13 = -13 (111110011) +-26 + 14 = -12 (111110100) +-26 + 15 = -11 (111110101) +-26 + 16 = -10 (111110110) +-26 + 17 = -9 (111110111) +-26 + 18 = -8 (111111000) +-26 + 19 = -7 (111111001) +-26 + 20 = -6 (111111010) +-26 + 21 = -5 (111111011) +-26 + 22 = -4 (111111100) +-26 + 23 = -3 (111111101) +-26 + 24 = -2 (111111110) +-26 + 25 = -1 (111111111) +-26 + 26 = 0 (000000000) +-26 + 27 = 1 (000000001) +-26 + 28 = 2 (000000010) +-26 + 29 = 3 (000000011) +-26 + 30 = 4 (000000100) +-26 + 31 = 5 (000000101) +-26 + -32 = -58 (111000110) +-26 + -31 = -57 (111000111) +-26 + -30 = -56 (111001000) +-26 + -29 = -55 (111001001) +-26 + -28 = -54 (111001010) +-26 + -27 = -53 (111001011) +-26 + -26 = -52 (111001100) +-26 + -25 = -51 (111001101) +-26 + -24 = -50 (111001110) +-26 + -23 = -49 (111001111) +-26 + -22 = -48 (111010000) +-26 + -21 = -47 (111010001) +-26 + -20 = -46 (111010010) +-26 + -19 = -45 (111010011) +-26 + -18 = -44 (111010100) +-26 + -17 = -43 (111010101) +-26 + -16 = -42 (111010110) +-26 + -15 = -41 (111010111) +-26 + -14 = -40 (111011000) +-26 + -13 = -39 (111011001) +-26 + -12 = -38 (111011010) +-26 + -11 = -37 (111011011) +-26 + -10 = -36 (111011100) +-26 + -9 = -35 (111011101) +-26 + -8 = -34 (111011110) +-26 + -7 = -33 (111011111) +-26 + -6 = -32 (111100000) +-26 + -5 = -31 (111100001) +-26 + -4 = -30 (111100010) +-26 + -3 = -29 (111100011) +-26 + -2 = -28 (111100100) +-26 + -1 = -27 (111100101) +-25 + 0 = -25 (111100111) +-25 + 1 = -24 (111101000) +-25 + 2 = -23 (111101001) +-25 + 3 = -22 (111101010) +-25 + 4 = -21 (111101011) +-25 + 5 = -20 (111101100) +-25 + 6 = -19 (111101101) +-25 + 7 = -18 (111101110) +-25 + 8 = -17 (111101111) +-25 + 9 = -16 (111110000) +-25 + 10 = -15 (111110001) +-25 + 11 = -14 (111110010) +-25 + 12 = -13 (111110011) +-25 + 13 = -12 (111110100) +-25 + 14 = -11 (111110101) +-25 + 15 = -10 (111110110) +-25 + 16 = -9 (111110111) +-25 + 17 = -8 (111111000) +-25 + 18 = -7 (111111001) +-25 + 19 = -6 (111111010) +-25 + 20 = -5 (111111011) +-25 + 21 = -4 (111111100) +-25 + 22 = -3 (111111101) +-25 + 23 = -2 (111111110) +-25 + 24 = -1 (111111111) +-25 + 25 = 0 (000000000) +-25 + 26 = 1 (000000001) +-25 + 27 = 2 (000000010) +-25 + 28 = 3 (000000011) +-25 + 29 = 4 (000000100) +-25 + 30 = 5 (000000101) +-25 + 31 = 6 (000000110) +-25 + -32 = -57 (111000111) +-25 + -31 = -56 (111001000) +-25 + -30 = -55 (111001001) +-25 + -29 = -54 (111001010) +-25 + -28 = -53 (111001011) +-25 + -27 = -52 (111001100) +-25 + -26 = -51 (111001101) +-25 + -25 = -50 (111001110) +-25 + -24 = -49 (111001111) +-25 + -23 = -48 (111010000) +-25 + -22 = -47 (111010001) +-25 + -21 = -46 (111010010) +-25 + -20 = -45 (111010011) +-25 + -19 = -44 (111010100) +-25 + -18 = -43 (111010101) +-25 + -17 = -42 (111010110) +-25 + -16 = -41 (111010111) +-25 + -15 = -40 (111011000) +-25 + -14 = -39 (111011001) +-25 + -13 = -38 (111011010) +-25 + -12 = -37 (111011011) +-25 + -11 = -36 (111011100) +-25 + -10 = -35 (111011101) +-25 + -9 = -34 (111011110) +-25 + -8 = -33 (111011111) +-25 + -7 = -32 (111100000) +-25 + -6 = -31 (111100001) +-25 + -5 = -30 (111100010) +-25 + -4 = -29 (111100011) +-25 + -3 = -28 (111100100) +-25 + -2 = -27 (111100101) +-25 + -1 = -26 (111100110) +-24 + 0 = -24 (111101000) +-24 + 1 = -23 (111101001) +-24 + 2 = -22 (111101010) +-24 + 3 = -21 (111101011) +-24 + 4 = -20 (111101100) +-24 + 5 = -19 (111101101) +-24 + 6 = -18 (111101110) +-24 + 7 = -17 (111101111) +-24 + 8 = -16 (111110000) +-24 + 9 = -15 (111110001) +-24 + 10 = -14 (111110010) +-24 + 11 = -13 (111110011) +-24 + 12 = -12 (111110100) +-24 + 13 = -11 (111110101) +-24 + 14 = -10 (111110110) +-24 + 15 = -9 (111110111) +-24 + 16 = -8 (111111000) +-24 + 17 = -7 (111111001) +-24 + 18 = -6 (111111010) +-24 + 19 = -5 (111111011) +-24 + 20 = -4 (111111100) +-24 + 21 = -3 (111111101) +-24 + 22 = -2 (111111110) +-24 + 23 = -1 (111111111) +-24 + 24 = 0 (000000000) +-24 + 25 = 1 (000000001) +-24 + 26 = 2 (000000010) +-24 + 27 = 3 (000000011) +-24 + 28 = 4 (000000100) +-24 + 29 = 5 (000000101) +-24 + 30 = 6 (000000110) +-24 + 31 = 7 (000000111) +-24 + -32 = -56 (111001000) +-24 + -31 = -55 (111001001) +-24 + -30 = -54 (111001010) +-24 + -29 = -53 (111001011) +-24 + -28 = -52 (111001100) +-24 + -27 = -51 (111001101) +-24 + -26 = -50 (111001110) +-24 + -25 = -49 (111001111) +-24 + -24 = -48 (111010000) +-24 + -23 = -47 (111010001) +-24 + -22 = -46 (111010010) +-24 + -21 = -45 (111010011) +-24 + -20 = -44 (111010100) +-24 + -19 = -43 (111010101) +-24 + -18 = -42 (111010110) +-24 + -17 = -41 (111010111) +-24 + -16 = -40 (111011000) +-24 + -15 = -39 (111011001) +-24 + -14 = -38 (111011010) +-24 + -13 = -37 (111011011) +-24 + -12 = -36 (111011100) +-24 + -11 = -35 (111011101) +-24 + -10 = -34 (111011110) +-24 + -9 = -33 (111011111) +-24 + -8 = -32 (111100000) +-24 + -7 = -31 (111100001) +-24 + -6 = -30 (111100010) +-24 + -5 = -29 (111100011) +-24 + -4 = -28 (111100100) +-24 + -3 = -27 (111100101) +-24 + -2 = -26 (111100110) +-24 + -1 = -25 (111100111) +-23 + 0 = -23 (111101001) +-23 + 1 = -22 (111101010) +-23 + 2 = -21 (111101011) +-23 + 3 = -20 (111101100) +-23 + 4 = -19 (111101101) +-23 + 5 = -18 (111101110) +-23 + 6 = -17 (111101111) +-23 + 7 = -16 (111110000) +-23 + 8 = -15 (111110001) +-23 + 9 = -14 (111110010) +-23 + 10 = -13 (111110011) +-23 + 11 = -12 (111110100) +-23 + 12 = -11 (111110101) +-23 + 13 = -10 (111110110) +-23 + 14 = -9 (111110111) +-23 + 15 = -8 (111111000) +-23 + 16 = -7 (111111001) +-23 + 17 = -6 (111111010) +-23 + 18 = -5 (111111011) +-23 + 19 = -4 (111111100) +-23 + 20 = -3 (111111101) +-23 + 21 = -2 (111111110) +-23 + 22 = -1 (111111111) +-23 + 23 = 0 (000000000) +-23 + 24 = 1 (000000001) +-23 + 25 = 2 (000000010) +-23 + 26 = 3 (000000011) +-23 + 27 = 4 (000000100) +-23 + 28 = 5 (000000101) +-23 + 29 = 6 (000000110) +-23 + 30 = 7 (000000111) +-23 + 31 = 8 (000001000) +-23 + -32 = -55 (111001001) +-23 + -31 = -54 (111001010) +-23 + -30 = -53 (111001011) +-23 + -29 = -52 (111001100) +-23 + -28 = -51 (111001101) +-23 + -27 = -50 (111001110) +-23 + -26 = -49 (111001111) +-23 + -25 = -48 (111010000) +-23 + -24 = -47 (111010001) +-23 + -23 = -46 (111010010) +-23 + -22 = -45 (111010011) +-23 + -21 = -44 (111010100) +-23 + -20 = -43 (111010101) +-23 + -19 = -42 (111010110) +-23 + -18 = -41 (111010111) +-23 + -17 = -40 (111011000) +-23 + -16 = -39 (111011001) +-23 + -15 = -38 (111011010) +-23 + -14 = -37 (111011011) +-23 + -13 = -36 (111011100) +-23 + -12 = -35 (111011101) +-23 + -11 = -34 (111011110) +-23 + -10 = -33 (111011111) +-23 + -9 = -32 (111100000) +-23 + -8 = -31 (111100001) +-23 + -7 = -30 (111100010) +-23 + -6 = -29 (111100011) +-23 + -5 = -28 (111100100) +-23 + -4 = -27 (111100101) +-23 + -3 = -26 (111100110) +-23 + -2 = -25 (111100111) +-23 + -1 = -24 (111101000) +-22 + 0 = -22 (111101010) +-22 + 1 = -21 (111101011) +-22 + 2 = -20 (111101100) +-22 + 3 = -19 (111101101) +-22 + 4 = -18 (111101110) +-22 + 5 = -17 (111101111) +-22 + 6 = -16 (111110000) +-22 + 7 = -15 (111110001) +-22 + 8 = -14 (111110010) +-22 + 9 = -13 (111110011) +-22 + 10 = -12 (111110100) +-22 + 11 = -11 (111110101) +-22 + 12 = -10 (111110110) +-22 + 13 = -9 (111110111) +-22 + 14 = -8 (111111000) +-22 + 15 = -7 (111111001) +-22 + 16 = -6 (111111010) +-22 + 17 = -5 (111111011) +-22 + 18 = -4 (111111100) +-22 + 19 = -3 (111111101) +-22 + 20 = -2 (111111110) +-22 + 21 = -1 (111111111) +-22 + 22 = 0 (000000000) +-22 + 23 = 1 (000000001) +-22 + 24 = 2 (000000010) +-22 + 25 = 3 (000000011) +-22 + 26 = 4 (000000100) +-22 + 27 = 5 (000000101) +-22 + 28 = 6 (000000110) +-22 + 29 = 7 (000000111) +-22 + 30 = 8 (000001000) +-22 + 31 = 9 (000001001) +-22 + -32 = -54 (111001010) +-22 + -31 = -53 (111001011) +-22 + -30 = -52 (111001100) +-22 + -29 = -51 (111001101) +-22 + -28 = -50 (111001110) +-22 + -27 = -49 (111001111) +-22 + -26 = -48 (111010000) +-22 + -25 = -47 (111010001) +-22 + -24 = -46 (111010010) +-22 + -23 = -45 (111010011) +-22 + -22 = -44 (111010100) +-22 + -21 = -43 (111010101) +-22 + -20 = -42 (111010110) +-22 + -19 = -41 (111010111) +-22 + -18 = -40 (111011000) +-22 + -17 = -39 (111011001) +-22 + -16 = -38 (111011010) +-22 + -15 = -37 (111011011) +-22 + -14 = -36 (111011100) +-22 + -13 = -35 (111011101) +-22 + -12 = -34 (111011110) +-22 + -11 = -33 (111011111) +-22 + -10 = -32 (111100000) +-22 + -9 = -31 (111100001) +-22 + -8 = -30 (111100010) +-22 + -7 = -29 (111100011) +-22 + -6 = -28 (111100100) +-22 + -5 = -27 (111100101) +-22 + -4 = -26 (111100110) +-22 + -3 = -25 (111100111) +-22 + -2 = -24 (111101000) +-22 + -1 = -23 (111101001) +-21 + 0 = -21 (111101011) +-21 + 1 = -20 (111101100) +-21 + 2 = -19 (111101101) +-21 + 3 = -18 (111101110) +-21 + 4 = -17 (111101111) +-21 + 5 = -16 (111110000) +-21 + 6 = -15 (111110001) +-21 + 7 = -14 (111110010) +-21 + 8 = -13 (111110011) +-21 + 9 = -12 (111110100) +-21 + 10 = -11 (111110101) +-21 + 11 = -10 (111110110) +-21 + 12 = -9 (111110111) +-21 + 13 = -8 (111111000) +-21 + 14 = -7 (111111001) +-21 + 15 = -6 (111111010) +-21 + 16 = -5 (111111011) +-21 + 17 = -4 (111111100) +-21 + 18 = -3 (111111101) +-21 + 19 = -2 (111111110) +-21 + 20 = -1 (111111111) +-21 + 21 = 0 (000000000) +-21 + 22 = 1 (000000001) +-21 + 23 = 2 (000000010) +-21 + 24 = 3 (000000011) +-21 + 25 = 4 (000000100) +-21 + 26 = 5 (000000101) +-21 + 27 = 6 (000000110) +-21 + 28 = 7 (000000111) +-21 + 29 = 8 (000001000) +-21 + 30 = 9 (000001001) +-21 + 31 = 10 (000001010) +-21 + -32 = -53 (111001011) +-21 + -31 = -52 (111001100) +-21 + -30 = -51 (111001101) +-21 + -29 = -50 (111001110) +-21 + -28 = -49 (111001111) +-21 + -27 = -48 (111010000) +-21 + -26 = -47 (111010001) +-21 + -25 = -46 (111010010) +-21 + -24 = -45 (111010011) +-21 + -23 = -44 (111010100) +-21 + -22 = -43 (111010101) +-21 + -21 = -42 (111010110) +-21 + -20 = -41 (111010111) +-21 + -19 = -40 (111011000) +-21 + -18 = -39 (111011001) +-21 + -17 = -38 (111011010) +-21 + -16 = -37 (111011011) +-21 + -15 = -36 (111011100) +-21 + -14 = -35 (111011101) +-21 + -13 = -34 (111011110) +-21 + -12 = -33 (111011111) +-21 + -11 = -32 (111100000) +-21 + -10 = -31 (111100001) +-21 + -9 = -30 (111100010) +-21 + -8 = -29 (111100011) +-21 + -7 = -28 (111100100) +-21 + -6 = -27 (111100101) +-21 + -5 = -26 (111100110) +-21 + -4 = -25 (111100111) +-21 + -3 = -24 (111101000) +-21 + -2 = -23 (111101001) +-21 + -1 = -22 (111101010) +-20 + 0 = -20 (111101100) +-20 + 1 = -19 (111101101) +-20 + 2 = -18 (111101110) +-20 + 3 = -17 (111101111) +-20 + 4 = -16 (111110000) +-20 + 5 = -15 (111110001) +-20 + 6 = -14 (111110010) +-20 + 7 = -13 (111110011) +-20 + 8 = -12 (111110100) +-20 + 9 = -11 (111110101) +-20 + 10 = -10 (111110110) +-20 + 11 = -9 (111110111) +-20 + 12 = -8 (111111000) +-20 + 13 = -7 (111111001) +-20 + 14 = -6 (111111010) +-20 + 15 = -5 (111111011) +-20 + 16 = -4 (111111100) +-20 + 17 = -3 (111111101) +-20 + 18 = -2 (111111110) +-20 + 19 = -1 (111111111) +-20 + 20 = 0 (000000000) +-20 + 21 = 1 (000000001) +-20 + 22 = 2 (000000010) +-20 + 23 = 3 (000000011) +-20 + 24 = 4 (000000100) +-20 + 25 = 5 (000000101) +-20 + 26 = 6 (000000110) +-20 + 27 = 7 (000000111) +-20 + 28 = 8 (000001000) +-20 + 29 = 9 (000001001) +-20 + 30 = 10 (000001010) +-20 + 31 = 11 (000001011) +-20 + -32 = -52 (111001100) +-20 + -31 = -51 (111001101) +-20 + -30 = -50 (111001110) +-20 + -29 = -49 (111001111) +-20 + -28 = -48 (111010000) +-20 + -27 = -47 (111010001) +-20 + -26 = -46 (111010010) +-20 + -25 = -45 (111010011) +-20 + -24 = -44 (111010100) +-20 + -23 = -43 (111010101) +-20 + -22 = -42 (111010110) +-20 + -21 = -41 (111010111) +-20 + -20 = -40 (111011000) +-20 + -19 = -39 (111011001) +-20 + -18 = -38 (111011010) +-20 + -17 = -37 (111011011) +-20 + -16 = -36 (111011100) +-20 + -15 = -35 (111011101) +-20 + -14 = -34 (111011110) +-20 + -13 = -33 (111011111) +-20 + -12 = -32 (111100000) +-20 + -11 = -31 (111100001) +-20 + -10 = -30 (111100010) +-20 + -9 = -29 (111100011) +-20 + -8 = -28 (111100100) +-20 + -7 = -27 (111100101) +-20 + -6 = -26 (111100110) +-20 + -5 = -25 (111100111) +-20 + -4 = -24 (111101000) +-20 + -3 = -23 (111101001) +-20 + -2 = -22 (111101010) +-20 + -1 = -21 (111101011) +-19 + 0 = -19 (111101101) +-19 + 1 = -18 (111101110) +-19 + 2 = -17 (111101111) +-19 + 3 = -16 (111110000) +-19 + 4 = -15 (111110001) +-19 + 5 = -14 (111110010) +-19 + 6 = -13 (111110011) +-19 + 7 = -12 (111110100) +-19 + 8 = -11 (111110101) +-19 + 9 = -10 (111110110) +-19 + 10 = -9 (111110111) +-19 + 11 = -8 (111111000) +-19 + 12 = -7 (111111001) +-19 + 13 = -6 (111111010) +-19 + 14 = -5 (111111011) +-19 + 15 = -4 (111111100) +-19 + 16 = -3 (111111101) +-19 + 17 = -2 (111111110) +-19 + 18 = -1 (111111111) +-19 + 19 = 0 (000000000) +-19 + 20 = 1 (000000001) +-19 + 21 = 2 (000000010) +-19 + 22 = 3 (000000011) +-19 + 23 = 4 (000000100) +-19 + 24 = 5 (000000101) +-19 + 25 = 6 (000000110) +-19 + 26 = 7 (000000111) +-19 + 27 = 8 (000001000) +-19 + 28 = 9 (000001001) +-19 + 29 = 10 (000001010) +-19 + 30 = 11 (000001011) +-19 + 31 = 12 (000001100) +-19 + -32 = -51 (111001101) +-19 + -31 = -50 (111001110) +-19 + -30 = -49 (111001111) +-19 + -29 = -48 (111010000) +-19 + -28 = -47 (111010001) +-19 + -27 = -46 (111010010) +-19 + -26 = -45 (111010011) +-19 + -25 = -44 (111010100) +-19 + -24 = -43 (111010101) +-19 + -23 = -42 (111010110) +-19 + -22 = -41 (111010111) +-19 + -21 = -40 (111011000) +-19 + -20 = -39 (111011001) +-19 + -19 = -38 (111011010) +-19 + -18 = -37 (111011011) +-19 + -17 = -36 (111011100) +-19 + -16 = -35 (111011101) +-19 + -15 = -34 (111011110) +-19 + -14 = -33 (111011111) +-19 + -13 = -32 (111100000) +-19 + -12 = -31 (111100001) +-19 + -11 = -30 (111100010) +-19 + -10 = -29 (111100011) +-19 + -9 = -28 (111100100) +-19 + -8 = -27 (111100101) +-19 + -7 = -26 (111100110) +-19 + -6 = -25 (111100111) +-19 + -5 = -24 (111101000) +-19 + -4 = -23 (111101001) +-19 + -3 = -22 (111101010) +-19 + -2 = -21 (111101011) +-19 + -1 = -20 (111101100) +-18 + 0 = -18 (111101110) +-18 + 1 = -17 (111101111) +-18 + 2 = -16 (111110000) +-18 + 3 = -15 (111110001) +-18 + 4 = -14 (111110010) +-18 + 5 = -13 (111110011) +-18 + 6 = -12 (111110100) +-18 + 7 = -11 (111110101) +-18 + 8 = -10 (111110110) +-18 + 9 = -9 (111110111) +-18 + 10 = -8 (111111000) +-18 + 11 = -7 (111111001) +-18 + 12 = -6 (111111010) +-18 + 13 = -5 (111111011) +-18 + 14 = -4 (111111100) +-18 + 15 = -3 (111111101) +-18 + 16 = -2 (111111110) +-18 + 17 = -1 (111111111) +-18 + 18 = 0 (000000000) +-18 + 19 = 1 (000000001) +-18 + 20 = 2 (000000010) +-18 + 21 = 3 (000000011) +-18 + 22 = 4 (000000100) +-18 + 23 = 5 (000000101) +-18 + 24 = 6 (000000110) +-18 + 25 = 7 (000000111) +-18 + 26 = 8 (000001000) +-18 + 27 = 9 (000001001) +-18 + 28 = 10 (000001010) +-18 + 29 = 11 (000001011) +-18 + 30 = 12 (000001100) +-18 + 31 = 13 (000001101) +-18 + -32 = -50 (111001110) +-18 + -31 = -49 (111001111) +-18 + -30 = -48 (111010000) +-18 + -29 = -47 (111010001) +-18 + -28 = -46 (111010010) +-18 + -27 = -45 (111010011) +-18 + -26 = -44 (111010100) +-18 + -25 = -43 (111010101) +-18 + -24 = -42 (111010110) +-18 + -23 = -41 (111010111) +-18 + -22 = -40 (111011000) +-18 + -21 = -39 (111011001) +-18 + -20 = -38 (111011010) +-18 + -19 = -37 (111011011) +-18 + -18 = -36 (111011100) +-18 + -17 = -35 (111011101) +-18 + -16 = -34 (111011110) +-18 + -15 = -33 (111011111) +-18 + -14 = -32 (111100000) +-18 + -13 = -31 (111100001) +-18 + -12 = -30 (111100010) +-18 + -11 = -29 (111100011) +-18 + -10 = -28 (111100100) +-18 + -9 = -27 (111100101) +-18 + -8 = -26 (111100110) +-18 + -7 = -25 (111100111) +-18 + -6 = -24 (111101000) +-18 + -5 = -23 (111101001) +-18 + -4 = -22 (111101010) +-18 + -3 = -21 (111101011) +-18 + -2 = -20 (111101100) +-18 + -1 = -19 (111101101) +-17 + 0 = -17 (111101111) +-17 + 1 = -16 (111110000) +-17 + 2 = -15 (111110001) +-17 + 3 = -14 (111110010) +-17 + 4 = -13 (111110011) +-17 + 5 = -12 (111110100) +-17 + 6 = -11 (111110101) +-17 + 7 = -10 (111110110) +-17 + 8 = -9 (111110111) +-17 + 9 = -8 (111111000) +-17 + 10 = -7 (111111001) +-17 + 11 = -6 (111111010) +-17 + 12 = -5 (111111011) +-17 + 13 = -4 (111111100) +-17 + 14 = -3 (111111101) +-17 + 15 = -2 (111111110) +-17 + 16 = -1 (111111111) +-17 + 17 = 0 (000000000) +-17 + 18 = 1 (000000001) +-17 + 19 = 2 (000000010) +-17 + 20 = 3 (000000011) +-17 + 21 = 4 (000000100) +-17 + 22 = 5 (000000101) +-17 + 23 = 6 (000000110) +-17 + 24 = 7 (000000111) +-17 + 25 = 8 (000001000) +-17 + 26 = 9 (000001001) +-17 + 27 = 10 (000001010) +-17 + 28 = 11 (000001011) +-17 + 29 = 12 (000001100) +-17 + 30 = 13 (000001101) +-17 + 31 = 14 (000001110) +-17 + -32 = -49 (111001111) +-17 + -31 = -48 (111010000) +-17 + -30 = -47 (111010001) +-17 + -29 = -46 (111010010) +-17 + -28 = -45 (111010011) +-17 + -27 = -44 (111010100) +-17 + -26 = -43 (111010101) +-17 + -25 = -42 (111010110) +-17 + -24 = -41 (111010111) +-17 + -23 = -40 (111011000) +-17 + -22 = -39 (111011001) +-17 + -21 = -38 (111011010) +-17 + -20 = -37 (111011011) +-17 + -19 = -36 (111011100) +-17 + -18 = -35 (111011101) +-17 + -17 = -34 (111011110) +-17 + -16 = -33 (111011111) +-17 + -15 = -32 (111100000) +-17 + -14 = -31 (111100001) +-17 + -13 = -30 (111100010) +-17 + -12 = -29 (111100011) +-17 + -11 = -28 (111100100) +-17 + -10 = -27 (111100101) +-17 + -9 = -26 (111100110) +-17 + -8 = -25 (111100111) +-17 + -7 = -24 (111101000) +-17 + -6 = -23 (111101001) +-17 + -5 = -22 (111101010) +-17 + -4 = -21 (111101011) +-17 + -3 = -20 (111101100) +-17 + -2 = -19 (111101101) +-17 + -1 = -18 (111101110) +-16 + 0 = -16 (111110000) +-16 + 1 = -15 (111110001) +-16 + 2 = -14 (111110010) +-16 + 3 = -13 (111110011) +-16 + 4 = -12 (111110100) +-16 + 5 = -11 (111110101) +-16 + 6 = -10 (111110110) +-16 + 7 = -9 (111110111) +-16 + 8 = -8 (111111000) +-16 + 9 = -7 (111111001) +-16 + 10 = -6 (111111010) +-16 + 11 = -5 (111111011) +-16 + 12 = -4 (111111100) +-16 + 13 = -3 (111111101) +-16 + 14 = -2 (111111110) +-16 + 15 = -1 (111111111) +-16 + 16 = 0 (000000000) +-16 + 17 = 1 (000000001) +-16 + 18 = 2 (000000010) +-16 + 19 = 3 (000000011) +-16 + 20 = 4 (000000100) +-16 + 21 = 5 (000000101) +-16 + 22 = 6 (000000110) +-16 + 23 = 7 (000000111) +-16 + 24 = 8 (000001000) +-16 + 25 = 9 (000001001) +-16 + 26 = 10 (000001010) +-16 + 27 = 11 (000001011) +-16 + 28 = 12 (000001100) +-16 + 29 = 13 (000001101) +-16 + 30 = 14 (000001110) +-16 + 31 = 15 (000001111) +-16 + -32 = -48 (111010000) +-16 + -31 = -47 (111010001) +-16 + -30 = -46 (111010010) +-16 + -29 = -45 (111010011) +-16 + -28 = -44 (111010100) +-16 + -27 = -43 (111010101) +-16 + -26 = -42 (111010110) +-16 + -25 = -41 (111010111) +-16 + -24 = -40 (111011000) +-16 + -23 = -39 (111011001) +-16 + -22 = -38 (111011010) +-16 + -21 = -37 (111011011) +-16 + -20 = -36 (111011100) +-16 + -19 = -35 (111011101) +-16 + -18 = -34 (111011110) +-16 + -17 = -33 (111011111) +-16 + -16 = -32 (111100000) +-16 + -15 = -31 (111100001) +-16 + -14 = -30 (111100010) +-16 + -13 = -29 (111100011) +-16 + -12 = -28 (111100100) +-16 + -11 = -27 (111100101) +-16 + -10 = -26 (111100110) +-16 + -9 = -25 (111100111) +-16 + -8 = -24 (111101000) +-16 + -7 = -23 (111101001) +-16 + -6 = -22 (111101010) +-16 + -5 = -21 (111101011) +-16 + -4 = -20 (111101100) +-16 + -3 = -19 (111101101) +-16 + -2 = -18 (111101110) +-16 + -1 = -17 (111101111) +-15 + 0 = -15 (111110001) +-15 + 1 = -14 (111110010) +-15 + 2 = -13 (111110011) +-15 + 3 = -12 (111110100) +-15 + 4 = -11 (111110101) +-15 + 5 = -10 (111110110) +-15 + 6 = -9 (111110111) +-15 + 7 = -8 (111111000) +-15 + 8 = -7 (111111001) +-15 + 9 = -6 (111111010) +-15 + 10 = -5 (111111011) +-15 + 11 = -4 (111111100) +-15 + 12 = -3 (111111101) +-15 + 13 = -2 (111111110) +-15 + 14 = -1 (111111111) +-15 + 15 = 0 (000000000) +-15 + 16 = 1 (000000001) +-15 + 17 = 2 (000000010) +-15 + 18 = 3 (000000011) +-15 + 19 = 4 (000000100) +-15 + 20 = 5 (000000101) +-15 + 21 = 6 (000000110) +-15 + 22 = 7 (000000111) +-15 + 23 = 8 (000001000) +-15 + 24 = 9 (000001001) +-15 + 25 = 10 (000001010) +-15 + 26 = 11 (000001011) +-15 + 27 = 12 (000001100) +-15 + 28 = 13 (000001101) +-15 + 29 = 14 (000001110) +-15 + 30 = 15 (000001111) +-15 + 31 = 16 (000010000) +-15 + -32 = -47 (111010001) +-15 + -31 = -46 (111010010) +-15 + -30 = -45 (111010011) +-15 + -29 = -44 (111010100) +-15 + -28 = -43 (111010101) +-15 + -27 = -42 (111010110) +-15 + -26 = -41 (111010111) +-15 + -25 = -40 (111011000) +-15 + -24 = -39 (111011001) +-15 + -23 = -38 (111011010) +-15 + -22 = -37 (111011011) +-15 + -21 = -36 (111011100) +-15 + -20 = -35 (111011101) +-15 + -19 = -34 (111011110) +-15 + -18 = -33 (111011111) +-15 + -17 = -32 (111100000) +-15 + -16 = -31 (111100001) +-15 + -15 = -30 (111100010) +-15 + -14 = -29 (111100011) +-15 + -13 = -28 (111100100) +-15 + -12 = -27 (111100101) +-15 + -11 = -26 (111100110) +-15 + -10 = -25 (111100111) +-15 + -9 = -24 (111101000) +-15 + -8 = -23 (111101001) +-15 + -7 = -22 (111101010) +-15 + -6 = -21 (111101011) +-15 + -5 = -20 (111101100) +-15 + -4 = -19 (111101101) +-15 + -3 = -18 (111101110) +-15 + -2 = -17 (111101111) +-15 + -1 = -16 (111110000) +-14 + 0 = -14 (111110010) +-14 + 1 = -13 (111110011) +-14 + 2 = -12 (111110100) +-14 + 3 = -11 (111110101) +-14 + 4 = -10 (111110110) +-14 + 5 = -9 (111110111) +-14 + 6 = -8 (111111000) +-14 + 7 = -7 (111111001) +-14 + 8 = -6 (111111010) +-14 + 9 = -5 (111111011) +-14 + 10 = -4 (111111100) +-14 + 11 = -3 (111111101) +-14 + 12 = -2 (111111110) +-14 + 13 = -1 (111111111) +-14 + 14 = 0 (000000000) +-14 + 15 = 1 (000000001) +-14 + 16 = 2 (000000010) +-14 + 17 = 3 (000000011) +-14 + 18 = 4 (000000100) +-14 + 19 = 5 (000000101) +-14 + 20 = 6 (000000110) +-14 + 21 = 7 (000000111) +-14 + 22 = 8 (000001000) +-14 + 23 = 9 (000001001) +-14 + 24 = 10 (000001010) +-14 + 25 = 11 (000001011) +-14 + 26 = 12 (000001100) +-14 + 27 = 13 (000001101) +-14 + 28 = 14 (000001110) +-14 + 29 = 15 (000001111) +-14 + 30 = 16 (000010000) +-14 + 31 = 17 (000010001) +-14 + -32 = -46 (111010010) +-14 + -31 = -45 (111010011) +-14 + -30 = -44 (111010100) +-14 + -29 = -43 (111010101) +-14 + -28 = -42 (111010110) +-14 + -27 = -41 (111010111) +-14 + -26 = -40 (111011000) +-14 + -25 = -39 (111011001) +-14 + -24 = -38 (111011010) +-14 + -23 = -37 (111011011) +-14 + -22 = -36 (111011100) +-14 + -21 = -35 (111011101) +-14 + -20 = -34 (111011110) +-14 + -19 = -33 (111011111) +-14 + -18 = -32 (111100000) +-14 + -17 = -31 (111100001) +-14 + -16 = -30 (111100010) +-14 + -15 = -29 (111100011) +-14 + -14 = -28 (111100100) +-14 + -13 = -27 (111100101) +-14 + -12 = -26 (111100110) +-14 + -11 = -25 (111100111) +-14 + -10 = -24 (111101000) +-14 + -9 = -23 (111101001) +-14 + -8 = -22 (111101010) +-14 + -7 = -21 (111101011) +-14 + -6 = -20 (111101100) +-14 + -5 = -19 (111101101) +-14 + -4 = -18 (111101110) +-14 + -3 = -17 (111101111) +-14 + -2 = -16 (111110000) +-14 + -1 = -15 (111110001) +-13 + 0 = -13 (111110011) +-13 + 1 = -12 (111110100) +-13 + 2 = -11 (111110101) +-13 + 3 = -10 (111110110) +-13 + 4 = -9 (111110111) +-13 + 5 = -8 (111111000) +-13 + 6 = -7 (111111001) +-13 + 7 = -6 (111111010) +-13 + 8 = -5 (111111011) +-13 + 9 = -4 (111111100) +-13 + 10 = -3 (111111101) +-13 + 11 = -2 (111111110) +-13 + 12 = -1 (111111111) +-13 + 13 = 0 (000000000) +-13 + 14 = 1 (000000001) +-13 + 15 = 2 (000000010) +-13 + 16 = 3 (000000011) +-13 + 17 = 4 (000000100) +-13 + 18 = 5 (000000101) +-13 + 19 = 6 (000000110) +-13 + 20 = 7 (000000111) +-13 + 21 = 8 (000001000) +-13 + 22 = 9 (000001001) +-13 + 23 = 10 (000001010) +-13 + 24 = 11 (000001011) +-13 + 25 = 12 (000001100) +-13 + 26 = 13 (000001101) +-13 + 27 = 14 (000001110) +-13 + 28 = 15 (000001111) +-13 + 29 = 16 (000010000) +-13 + 30 = 17 (000010001) +-13 + 31 = 18 (000010010) +-13 + -32 = -45 (111010011) +-13 + -31 = -44 (111010100) +-13 + -30 = -43 (111010101) +-13 + -29 = -42 (111010110) +-13 + -28 = -41 (111010111) +-13 + -27 = -40 (111011000) +-13 + -26 = -39 (111011001) +-13 + -25 = -38 (111011010) +-13 + -24 = -37 (111011011) +-13 + -23 = -36 (111011100) +-13 + -22 = -35 (111011101) +-13 + -21 = -34 (111011110) +-13 + -20 = -33 (111011111) +-13 + -19 = -32 (111100000) +-13 + -18 = -31 (111100001) +-13 + -17 = -30 (111100010) +-13 + -16 = -29 (111100011) +-13 + -15 = -28 (111100100) +-13 + -14 = -27 (111100101) +-13 + -13 = -26 (111100110) +-13 + -12 = -25 (111100111) +-13 + -11 = -24 (111101000) +-13 + -10 = -23 (111101001) +-13 + -9 = -22 (111101010) +-13 + -8 = -21 (111101011) +-13 + -7 = -20 (111101100) +-13 + -6 = -19 (111101101) +-13 + -5 = -18 (111101110) +-13 + -4 = -17 (111101111) +-13 + -3 = -16 (111110000) +-13 + -2 = -15 (111110001) +-13 + -1 = -14 (111110010) +-12 + 0 = -12 (111110100) +-12 + 1 = -11 (111110101) +-12 + 2 = -10 (111110110) +-12 + 3 = -9 (111110111) +-12 + 4 = -8 (111111000) +-12 + 5 = -7 (111111001) +-12 + 6 = -6 (111111010) +-12 + 7 = -5 (111111011) +-12 + 8 = -4 (111111100) +-12 + 9 = -3 (111111101) +-12 + 10 = -2 (111111110) +-12 + 11 = -1 (111111111) +-12 + 12 = 0 (000000000) +-12 + 13 = 1 (000000001) +-12 + 14 = 2 (000000010) +-12 + 15 = 3 (000000011) +-12 + 16 = 4 (000000100) +-12 + 17 = 5 (000000101) +-12 + 18 = 6 (000000110) +-12 + 19 = 7 (000000111) +-12 + 20 = 8 (000001000) +-12 + 21 = 9 (000001001) +-12 + 22 = 10 (000001010) +-12 + 23 = 11 (000001011) +-12 + 24 = 12 (000001100) +-12 + 25 = 13 (000001101) +-12 + 26 = 14 (000001110) +-12 + 27 = 15 (000001111) +-12 + 28 = 16 (000010000) +-12 + 29 = 17 (000010001) +-12 + 30 = 18 (000010010) +-12 + 31 = 19 (000010011) +-12 + -32 = -44 (111010100) +-12 + -31 = -43 (111010101) +-12 + -30 = -42 (111010110) +-12 + -29 = -41 (111010111) +-12 + -28 = -40 (111011000) +-12 + -27 = -39 (111011001) +-12 + -26 = -38 (111011010) +-12 + -25 = -37 (111011011) +-12 + -24 = -36 (111011100) +-12 + -23 = -35 (111011101) +-12 + -22 = -34 (111011110) +-12 + -21 = -33 (111011111) +-12 + -20 = -32 (111100000) +-12 + -19 = -31 (111100001) +-12 + -18 = -30 (111100010) +-12 + -17 = -29 (111100011) +-12 + -16 = -28 (111100100) +-12 + -15 = -27 (111100101) +-12 + -14 = -26 (111100110) +-12 + -13 = -25 (111100111) +-12 + -12 = -24 (111101000) +-12 + -11 = -23 (111101001) +-12 + -10 = -22 (111101010) +-12 + -9 = -21 (111101011) +-12 + -8 = -20 (111101100) +-12 + -7 = -19 (111101101) +-12 + -6 = -18 (111101110) +-12 + -5 = -17 (111101111) +-12 + -4 = -16 (111110000) +-12 + -3 = -15 (111110001) +-12 + -2 = -14 (111110010) +-12 + -1 = -13 (111110011) +-11 + 0 = -11 (111110101) +-11 + 1 = -10 (111110110) +-11 + 2 = -9 (111110111) +-11 + 3 = -8 (111111000) +-11 + 4 = -7 (111111001) +-11 + 5 = -6 (111111010) +-11 + 6 = -5 (111111011) +-11 + 7 = -4 (111111100) +-11 + 8 = -3 (111111101) +-11 + 9 = -2 (111111110) +-11 + 10 = -1 (111111111) +-11 + 11 = 0 (000000000) +-11 + 12 = 1 (000000001) +-11 + 13 = 2 (000000010) +-11 + 14 = 3 (000000011) +-11 + 15 = 4 (000000100) +-11 + 16 = 5 (000000101) +-11 + 17 = 6 (000000110) +-11 + 18 = 7 (000000111) +-11 + 19 = 8 (000001000) +-11 + 20 = 9 (000001001) +-11 + 21 = 10 (000001010) +-11 + 22 = 11 (000001011) +-11 + 23 = 12 (000001100) +-11 + 24 = 13 (000001101) +-11 + 25 = 14 (000001110) +-11 + 26 = 15 (000001111) +-11 + 27 = 16 (000010000) +-11 + 28 = 17 (000010001) +-11 + 29 = 18 (000010010) +-11 + 30 = 19 (000010011) +-11 + 31 = 20 (000010100) +-11 + -32 = -43 (111010101) +-11 + -31 = -42 (111010110) +-11 + -30 = -41 (111010111) +-11 + -29 = -40 (111011000) +-11 + -28 = -39 (111011001) +-11 + -27 = -38 (111011010) +-11 + -26 = -37 (111011011) +-11 + -25 = -36 (111011100) +-11 + -24 = -35 (111011101) +-11 + -23 = -34 (111011110) +-11 + -22 = -33 (111011111) +-11 + -21 = -32 (111100000) +-11 + -20 = -31 (111100001) +-11 + -19 = -30 (111100010) +-11 + -18 = -29 (111100011) +-11 + -17 = -28 (111100100) +-11 + -16 = -27 (111100101) +-11 + -15 = -26 (111100110) +-11 + -14 = -25 (111100111) +-11 + -13 = -24 (111101000) +-11 + -12 = -23 (111101001) +-11 + -11 = -22 (111101010) +-11 + -10 = -21 (111101011) +-11 + -9 = -20 (111101100) +-11 + -8 = -19 (111101101) +-11 + -7 = -18 (111101110) +-11 + -6 = -17 (111101111) +-11 + -5 = -16 (111110000) +-11 + -4 = -15 (111110001) +-11 + -3 = -14 (111110010) +-11 + -2 = -13 (111110011) +-11 + -1 = -12 (111110100) +-10 + 0 = -10 (111110110) +-10 + 1 = -9 (111110111) +-10 + 2 = -8 (111111000) +-10 + 3 = -7 (111111001) +-10 + 4 = -6 (111111010) +-10 + 5 = -5 (111111011) +-10 + 6 = -4 (111111100) +-10 + 7 = -3 (111111101) +-10 + 8 = -2 (111111110) +-10 + 9 = -1 (111111111) +-10 + 10 = 0 (000000000) +-10 + 11 = 1 (000000001) +-10 + 12 = 2 (000000010) +-10 + 13 = 3 (000000011) +-10 + 14 = 4 (000000100) +-10 + 15 = 5 (000000101) +-10 + 16 = 6 (000000110) +-10 + 17 = 7 (000000111) +-10 + 18 = 8 (000001000) +-10 + 19 = 9 (000001001) +-10 + 20 = 10 (000001010) +-10 + 21 = 11 (000001011) +-10 + 22 = 12 (000001100) +-10 + 23 = 13 (000001101) +-10 + 24 = 14 (000001110) +-10 + 25 = 15 (000001111) +-10 + 26 = 16 (000010000) +-10 + 27 = 17 (000010001) +-10 + 28 = 18 (000010010) +-10 + 29 = 19 (000010011) +-10 + 30 = 20 (000010100) +-10 + 31 = 21 (000010101) +-10 + -32 = -42 (111010110) +-10 + -31 = -41 (111010111) +-10 + -30 = -40 (111011000) +-10 + -29 = -39 (111011001) +-10 + -28 = -38 (111011010) +-10 + -27 = -37 (111011011) +-10 + -26 = -36 (111011100) +-10 + -25 = -35 (111011101) +-10 + -24 = -34 (111011110) +-10 + -23 = -33 (111011111) +-10 + -22 = -32 (111100000) +-10 + -21 = -31 (111100001) +-10 + -20 = -30 (111100010) +-10 + -19 = -29 (111100011) +-10 + -18 = -28 (111100100) +-10 + -17 = -27 (111100101) +-10 + -16 = -26 (111100110) +-10 + -15 = -25 (111100111) +-10 + -14 = -24 (111101000) +-10 + -13 = -23 (111101001) +-10 + -12 = -22 (111101010) +-10 + -11 = -21 (111101011) +-10 + -10 = -20 (111101100) +-10 + -9 = -19 (111101101) +-10 + -8 = -18 (111101110) +-10 + -7 = -17 (111101111) +-10 + -6 = -16 (111110000) +-10 + -5 = -15 (111110001) +-10 + -4 = -14 (111110010) +-10 + -3 = -13 (111110011) +-10 + -2 = -12 (111110100) +-10 + -1 = -11 (111110101) +-9 + 0 = -9 (111110111) +-9 + 1 = -8 (111111000) +-9 + 2 = -7 (111111001) +-9 + 3 = -6 (111111010) +-9 + 4 = -5 (111111011) +-9 + 5 = -4 (111111100) +-9 + 6 = -3 (111111101) +-9 + 7 = -2 (111111110) +-9 + 8 = -1 (111111111) +-9 + 9 = 0 (000000000) +-9 + 10 = 1 (000000001) +-9 + 11 = 2 (000000010) +-9 + 12 = 3 (000000011) +-9 + 13 = 4 (000000100) +-9 + 14 = 5 (000000101) +-9 + 15 = 6 (000000110) +-9 + 16 = 7 (000000111) +-9 + 17 = 8 (000001000) +-9 + 18 = 9 (000001001) +-9 + 19 = 10 (000001010) +-9 + 20 = 11 (000001011) +-9 + 21 = 12 (000001100) +-9 + 22 = 13 (000001101) +-9 + 23 = 14 (000001110) +-9 + 24 = 15 (000001111) +-9 + 25 = 16 (000010000) +-9 + 26 = 17 (000010001) +-9 + 27 = 18 (000010010) +-9 + 28 = 19 (000010011) +-9 + 29 = 20 (000010100) +-9 + 30 = 21 (000010101) +-9 + 31 = 22 (000010110) +-9 + -32 = -41 (111010111) +-9 + -31 = -40 (111011000) +-9 + -30 = -39 (111011001) +-9 + -29 = -38 (111011010) +-9 + -28 = -37 (111011011) +-9 + -27 = -36 (111011100) +-9 + -26 = -35 (111011101) +-9 + -25 = -34 (111011110) +-9 + -24 = -33 (111011111) +-9 + -23 = -32 (111100000) +-9 + -22 = -31 (111100001) +-9 + -21 = -30 (111100010) +-9 + -20 = -29 (111100011) +-9 + -19 = -28 (111100100) +-9 + -18 = -27 (111100101) +-9 + -17 = -26 (111100110) +-9 + -16 = -25 (111100111) +-9 + -15 = -24 (111101000) +-9 + -14 = -23 (111101001) +-9 + -13 = -22 (111101010) +-9 + -12 = -21 (111101011) +-9 + -11 = -20 (111101100) +-9 + -10 = -19 (111101101) +-9 + -9 = -18 (111101110) +-9 + -8 = -17 (111101111) +-9 + -7 = -16 (111110000) +-9 + -6 = -15 (111110001) +-9 + -5 = -14 (111110010) +-9 + -4 = -13 (111110011) +-9 + -3 = -12 (111110100) +-9 + -2 = -11 (111110101) +-9 + -1 = -10 (111110110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/main.cpp new file mode 100644 index 000000000..5c1049d14 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 9-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 9; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector9 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/stimgen.h new file mode 100644 index 000000000..3988984dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/extension/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector9& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector9& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/common.h new file mode 100644 index 000000000..64a0e627c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/datawidth.cpp new file mode 100644 index 000000000..25913d4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_signed tmp_a (in1_width); + sc_signed tmp_b (in2_width); + sc_signed tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/datawidth.h new file mode 100644 index 000000000..a8aaf9061 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& in1; + const signal_bool_vector& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& IN1, + const signal_bool_vector& IN2, + const sc_signal& READY, + signal_bool_vector& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/golden/lost_carry.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/golden/lost_carry.log new file mode 100644 index 000000000..f36976512 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/golden/lost_carry.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + -32 = -32 (100000) +0 + -31 = -31 (100001) +0 + -30 = -30 (100010) +0 + -29 = -29 (100011) +0 + -28 = -28 (100100) +0 + -27 = -27 (100101) +0 + -26 = -26 (100110) +0 + -25 = -25 (100111) +0 + -24 = -24 (101000) +0 + -23 = -23 (101001) +0 + -22 = -22 (101010) +0 + -21 = -21 (101011) +0 + -20 = -20 (101100) +0 + -19 = -19 (101101) +0 + -18 = -18 (101110) +0 + -17 = -17 (101111) +0 + -16 = -16 (110000) +0 + -15 = -15 (110001) +0 + -14 = -14 (110010) +0 + -13 = -13 (110011) +0 + -12 = -12 (110100) +0 + -11 = -11 (110101) +0 + -10 = -10 (110110) +0 + -9 = -9 (110111) +0 + -8 = -8 (111000) +0 + -7 = -7 (111001) +0 + -6 = -6 (111010) +0 + -5 = -5 (111011) +0 + -4 = -4 (111100) +0 + -3 = -3 (111101) +0 + -2 = -2 (111110) +0 + -1 = -1 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = -32 (100000) +1 + -32 = -31 (100001) +1 + -31 = -30 (100010) +1 + -30 = -29 (100011) +1 + -29 = -28 (100100) +1 + -28 = -27 (100101) +1 + -27 = -26 (100110) +1 + -26 = -25 (100111) +1 + -25 = -24 (101000) +1 + -24 = -23 (101001) +1 + -23 = -22 (101010) +1 + -22 = -21 (101011) +1 + -21 = -20 (101100) +1 + -20 = -19 (101101) +1 + -19 = -18 (101110) +1 + -18 = -17 (101111) +1 + -17 = -16 (110000) +1 + -16 = -15 (110001) +1 + -15 = -14 (110010) +1 + -14 = -13 (110011) +1 + -13 = -12 (110100) +1 + -12 = -11 (110101) +1 + -11 = -10 (110110) +1 + -10 = -9 (110111) +1 + -9 = -8 (111000) +1 + -8 = -7 (111001) +1 + -7 = -6 (111010) +1 + -6 = -5 (111011) +1 + -5 = -4 (111100) +1 + -4 = -3 (111101) +1 + -3 = -2 (111110) +1 + -2 = -1 (111111) +1 + -1 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = -32 (100000) +2 + 31 = -31 (100001) +2 + -32 = -30 (100010) +2 + -31 = -29 (100011) +2 + -30 = -28 (100100) +2 + -29 = -27 (100101) +2 + -28 = -26 (100110) +2 + -27 = -25 (100111) +2 + -26 = -24 (101000) +2 + -25 = -23 (101001) +2 + -24 = -22 (101010) +2 + -23 = -21 (101011) +2 + -22 = -20 (101100) +2 + -21 = -19 (101101) +2 + -20 = -18 (101110) +2 + -19 = -17 (101111) +2 + -18 = -16 (110000) +2 + -17 = -15 (110001) +2 + -16 = -14 (110010) +2 + -15 = -13 (110011) +2 + -14 = -12 (110100) +2 + -13 = -11 (110101) +2 + -12 = -10 (110110) +2 + -11 = -9 (110111) +2 + -10 = -8 (111000) +2 + -9 = -7 (111001) +2 + -8 = -6 (111010) +2 + -7 = -5 (111011) +2 + -6 = -4 (111100) +2 + -5 = -3 (111101) +2 + -4 = -2 (111110) +2 + -3 = -1 (111111) +2 + -2 = 0 (000000) +2 + -1 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 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(001010) +31 + -20 = 11 (001011) +31 + -19 = 12 (001100) +31 + -18 = 13 (001101) +31 + -17 = 14 (001110) +31 + -16 = 15 (001111) +31 + -15 = 16 (010000) +31 + -14 = 17 (010001) +31 + -13 = 18 (010010) +31 + -12 = 19 (010011) +31 + -11 = 20 (010100) +31 + -10 = 21 (010101) +31 + -9 = 22 (010110) +31 + -8 = 23 (010111) +31 + -7 = 24 (011000) +31 + -6 = 25 (011001) +31 + -5 = 26 (011010) +31 + -4 = 27 (011011) +31 + -3 = 28 (011100) +31 + -2 = 29 (011101) +31 + -1 = 30 (011110) +-32 + 0 = -32 (100000) +-32 + 1 = -31 (100001) +-32 + 2 = -30 (100010) +-32 + 3 = -29 (100011) +-32 + 4 = -28 (100100) +-32 + 5 = -27 (100101) +-32 + 6 = -26 (100110) +-32 + 7 = -25 (100111) +-32 + 8 = -24 (101000) +-32 + 9 = -23 (101001) +-32 + 10 = -22 (101010) +-32 + 11 = -21 (101011) +-32 + 12 = -20 (101100) +-32 + 13 = -19 (101101) +-32 + 14 = -18 (101110) +-32 + 15 = -17 (101111) +-32 + 16 = -16 (110000) +-32 + 17 = -15 (110001) +-32 + 18 = -14 (110010) +-32 + 19 = -13 (110011) +-32 + 20 = -12 (110100) +-32 + 21 = -11 (110101) +-32 + 22 = -10 (110110) +-32 + 23 = -9 (110111) +-32 + 24 = -8 (111000) +-32 + 25 = -7 (111001) +-32 + 26 = -6 (111010) +-32 + 27 = -5 (111011) +-32 + 28 = -4 (111100) +-32 + 29 = -3 (111101) +-32 + 30 = -2 (111110) +-32 + 31 = -1 (111111) +-32 + -32 = 0 (000000) +-32 + -31 = 1 (000001) +-32 + -30 = 2 (000010) +-32 + -29 = 3 (000011) +-32 + -28 = 4 (000100) +-32 + -27 = 5 (000101) +-32 + -26 = 6 (000110) +-32 + -25 = 7 (000111) +-32 + -24 = 8 (001000) +-32 + -23 = 9 (001001) +-32 + -22 = 10 (001010) +-32 + -21 = 11 (001011) +-32 + -20 = 12 (001100) +-32 + -19 = 13 (001101) +-32 + -18 = 14 (001110) +-32 + -17 = 15 (001111) +-32 + -16 = 16 (010000) +-32 + -15 = 17 (010001) +-32 + -14 = 18 (010010) +-32 + -13 = 19 (010011) +-32 + -12 = 20 (010100) +-32 + -11 = 21 (010101) +-32 + -10 = 22 (010110) +-32 + -9 = 23 (010111) +-32 + -8 = 24 (011000) +-32 + -7 = 25 (011001) +-32 + -6 = 26 (011010) +-32 + -5 = 27 (011011) +-32 + -4 = 28 (011100) +-32 + -3 = 29 (011101) +-32 + -2 = 30 (011110) +-32 + -1 = 31 (011111) +-31 + 0 = -31 (100001) +-31 + 1 = -30 (100010) +-31 + 2 = -29 (100011) +-31 + 3 = -28 (100100) +-31 + 4 = -27 (100101) +-31 + 5 = -26 (100110) +-31 + 6 = -25 (100111) +-31 + 7 = -24 (101000) +-31 + 8 = -23 (101001) +-31 + 9 = -22 (101010) +-31 + 10 = -21 (101011) +-31 + 11 = -20 (101100) +-31 + 12 = -19 (101101) +-31 + 13 = -18 (101110) +-31 + 14 = -17 (101111) +-31 + 15 = -16 (110000) +-31 + 16 = -15 (110001) +-31 + 17 = -14 (110010) +-31 + 18 = -13 (110011) +-31 + 19 = -12 (110100) +-31 + 20 = -11 (110101) +-31 + 21 = -10 (110110) +-31 + 22 = -9 (110111) +-31 + 23 = -8 (111000) +-31 + 24 = -7 (111001) +-31 + 25 = -6 (111010) +-31 + 26 = -5 (111011) +-31 + 27 = -4 (111100) +-31 + 28 = -3 (111101) +-31 + 29 = -2 (111110) +-31 + 30 = -1 (111111) +-31 + 31 = 0 (000000) +-31 + -32 = 1 (000001) +-31 + -31 = 2 (000010) +-31 + -30 = 3 (000011) +-31 + -29 = 4 (000100) +-31 + -28 = 5 (000101) +-31 + -27 = 6 (000110) +-31 + -26 = 7 (000111) +-31 + -25 = 8 (001000) +-31 + -24 = 9 (001001) +-31 + -23 = 10 (001010) +-31 + -22 = 11 (001011) +-31 + -21 = 12 (001100) +-31 + -20 = 13 (001101) +-31 + -19 = 14 (001110) +-31 + -18 = 15 (001111) +-31 + -17 = 16 (010000) +-31 + -16 = 17 (010001) +-31 + -15 = 18 (010010) +-31 + -14 = 19 (010011) +-31 + -13 = 20 (010100) +-31 + -12 = 21 (010101) +-31 + -11 = 22 (010110) +-31 + -10 = 23 (010111) +-31 + -9 = 24 (011000) +-31 + -8 = 25 (011001) +-31 + -7 = 26 (011010) +-31 + -6 = 27 (011011) +-31 + -5 = 28 (011100) +-31 + -4 = 29 (011101) +-31 + -3 = 30 (011110) +-31 + -2 = 31 (011111) +-31 + -1 = -32 (100000) +-30 + 0 = -30 (100010) +-30 + 1 = -29 (100011) +-30 + 2 = -28 (100100) +-30 + 3 = -27 (100101) +-30 + 4 = -26 (100110) +-30 + 5 = -25 (100111) +-30 + 6 = -24 (101000) +-30 + 7 = -23 (101001) +-30 + 8 = -22 (101010) +-30 + 9 = -21 (101011) +-30 + 10 = -20 (101100) +-30 + 11 = -19 (101101) +-30 + 12 = -18 (101110) +-30 + 13 = -17 (101111) +-30 + 14 = -16 (110000) +-30 + 15 = -15 (110001) +-30 + 16 = -14 (110010) +-30 + 17 = -13 (110011) +-30 + 18 = -12 (110100) +-30 + 19 = -11 (110101) +-30 + 20 = -10 (110110) +-30 + 21 = -9 (110111) +-30 + 22 = -8 (111000) +-30 + 23 = -7 (111001) +-30 + 24 = -6 (111010) +-30 + 25 = -5 (111011) +-30 + 26 = -4 (111100) +-30 + 27 = -3 (111101) +-30 + 28 = -2 (111110) +-30 + 29 = -1 (111111) +-30 + 30 = 0 (000000) +-30 + 31 = 1 (000001) +-30 + -32 = 2 (000010) +-30 + -31 = 3 (000011) +-30 + -30 = 4 (000100) +-30 + -29 = 5 (000101) +-30 + -28 = 6 (000110) +-30 + -27 = 7 (000111) +-30 + -26 = 8 (001000) +-30 + -25 = 9 (001001) +-30 + -24 = 10 (001010) +-30 + -23 = 11 (001011) +-30 + -22 = 12 (001100) +-30 + -21 = 13 (001101) +-30 + -20 = 14 (001110) +-30 + -19 = 15 (001111) +-30 + -18 = 16 (010000) +-30 + -17 = 17 (010001) +-30 + -16 = 18 (010010) +-30 + -15 = 19 (010011) +-30 + -14 = 20 (010100) +-30 + -13 = 21 (010101) +-30 + -12 = 22 (010110) +-30 + -11 = 23 (010111) +-30 + -10 = 24 (011000) +-30 + -9 = 25 (011001) +-30 + -8 = 26 (011010) +-30 + -7 = 27 (011011) +-30 + -6 = 28 (011100) +-30 + -5 = 29 (011101) +-30 + -4 = 30 (011110) +-30 + -3 = 31 (011111) +-30 + -2 = -32 (100000) +-30 + -1 = -31 (100001) +-29 + 0 = -29 (100011) +-29 + 1 = -28 (100100) +-29 + 2 = -27 (100101) +-29 + 3 = -26 (100110) +-29 + 4 = -25 (100111) +-29 + 5 = -24 (101000) +-29 + 6 = -23 (101001) +-29 + 7 = -22 (101010) +-29 + 8 = -21 (101011) +-29 + 9 = -20 (101100) +-29 + 10 = -19 (101101) +-29 + 11 = -18 (101110) +-29 + 12 = -17 (101111) +-29 + 13 = -16 (110000) +-29 + 14 = -15 (110001) +-29 + 15 = -14 (110010) +-29 + 16 = -13 (110011) +-29 + 17 = -12 (110100) +-29 + 18 = -11 (110101) +-29 + 19 = -10 (110110) +-29 + 20 = -9 (110111) +-29 + 21 = -8 (111000) +-29 + 22 = -7 (111001) +-29 + 23 = -6 (111010) +-29 + 24 = -5 (111011) +-29 + 25 = -4 (111100) +-29 + 26 = -3 (111101) +-29 + 27 = -2 (111110) +-29 + 28 = -1 (111111) +-29 + 29 = 0 (000000) +-29 + 30 = 1 (000001) +-29 + 31 = 2 (000010) +-29 + -32 = 3 (000011) +-29 + -31 = 4 (000100) +-29 + -30 = 5 (000101) +-29 + -29 = 6 (000110) +-29 + -28 = 7 (000111) +-29 + -27 = 8 (001000) +-29 + -26 = 9 (001001) +-29 + -25 = 10 (001010) +-29 + -24 = 11 (001011) +-29 + -23 = 12 (001100) +-29 + -22 = 13 (001101) +-29 + -21 = 14 (001110) +-29 + -20 = 15 (001111) +-29 + -19 = 16 (010000) +-29 + -18 = 17 (010001) +-29 + -17 = 18 (010010) +-29 + -16 = 19 (010011) +-29 + -15 = 20 (010100) +-29 + -14 = 21 (010101) +-29 + -13 = 22 (010110) +-29 + -12 = 23 (010111) +-29 + -11 = 24 (011000) +-29 + -10 = 25 (011001) +-29 + -9 = 26 (011010) +-29 + -8 = 27 (011011) +-29 + -7 = 28 (011100) +-29 + -6 = 29 (011101) +-29 + -5 = 30 (011110) +-29 + -4 = 31 (011111) +-29 + -3 = -32 (100000) +-29 + -2 = -31 (100001) +-29 + -1 = -30 (100010) +-28 + 0 = -28 (100100) +-28 + 1 = -27 (100101) +-28 + 2 = -26 (100110) +-28 + 3 = -25 (100111) +-28 + 4 = -24 (101000) +-28 + 5 = -23 (101001) +-28 + 6 = -22 (101010) +-28 + 7 = -21 (101011) +-28 + 8 = -20 (101100) +-28 + 9 = -19 (101101) +-28 + 10 = -18 (101110) +-28 + 11 = -17 (101111) +-28 + 12 = -16 (110000) +-28 + 13 = -15 (110001) +-28 + 14 = -14 (110010) +-28 + 15 = -13 (110011) +-28 + 16 = -12 (110100) +-28 + 17 = -11 (110101) +-28 + 18 = -10 (110110) +-28 + 19 = -9 (110111) +-28 + 20 = -8 (111000) +-28 + 21 = -7 (111001) +-28 + 22 = -6 (111010) +-28 + 23 = -5 (111011) +-28 + 24 = -4 (111100) +-28 + 25 = -3 (111101) +-28 + 26 = -2 (111110) +-28 + 27 = -1 (111111) +-28 + 28 = 0 (000000) +-28 + 29 = 1 (000001) +-28 + 30 = 2 (000010) +-28 + 31 = 3 (000011) +-28 + -32 = 4 (000100) +-28 + -31 = 5 (000101) +-28 + -30 = 6 (000110) +-28 + -29 = 7 (000111) +-28 + -28 = 8 (001000) +-28 + -27 = 9 (001001) +-28 + -26 = 10 (001010) +-28 + -25 = 11 (001011) +-28 + -24 = 12 (001100) +-28 + -23 = 13 (001101) +-28 + -22 = 14 (001110) +-28 + -21 = 15 (001111) +-28 + -20 = 16 (010000) +-28 + -19 = 17 (010001) +-28 + -18 = 18 (010010) +-28 + -17 = 19 (010011) +-28 + -16 = 20 (010100) +-28 + -15 = 21 (010101) +-28 + -14 = 22 (010110) +-28 + -13 = 23 (010111) +-28 + -12 = 24 (011000) +-28 + -11 = 25 (011001) +-28 + -10 = 26 (011010) +-28 + -9 = 27 (011011) +-28 + -8 = 28 (011100) +-28 + -7 = 29 (011101) +-28 + -6 = 30 (011110) +-28 + -5 = 31 (011111) +-28 + -4 = -32 (100000) +-28 + -3 = -31 (100001) +-28 + -2 = -30 (100010) +-28 + -1 = -29 (100011) +-27 + 0 = -27 (100101) +-27 + 1 = -26 (100110) +-27 + 2 = -25 (100111) +-27 + 3 = -24 (101000) +-27 + 4 = -23 (101001) +-27 + 5 = -22 (101010) +-27 + 6 = -21 (101011) +-27 + 7 = -20 (101100) +-27 + 8 = -19 (101101) +-27 + 9 = -18 (101110) +-27 + 10 = -17 (101111) +-27 + 11 = -16 (110000) +-27 + 12 = -15 (110001) +-27 + 13 = -14 (110010) +-27 + 14 = -13 (110011) +-27 + 15 = -12 (110100) +-27 + 16 = -11 (110101) +-27 + 17 = -10 (110110) +-27 + 18 = -9 (110111) +-27 + 19 = -8 (111000) +-27 + 20 = -7 (111001) +-27 + 21 = -6 (111010) +-27 + 22 = -5 (111011) +-27 + 23 = -4 (111100) +-27 + 24 = -3 (111101) +-27 + 25 = -2 (111110) +-27 + 26 = -1 (111111) +-27 + 27 = 0 (000000) +-27 + 28 = 1 (000001) +-27 + 29 = 2 (000010) +-27 + 30 = 3 (000011) +-27 + 31 = 4 (000100) +-27 + -32 = 5 (000101) +-27 + -31 = 6 (000110) +-27 + -30 = 7 (000111) +-27 + -29 = 8 (001000) +-27 + -28 = 9 (001001) +-27 + -27 = 10 (001010) +-27 + -26 = 11 (001011) +-27 + -25 = 12 (001100) +-27 + -24 = 13 (001101) +-27 + -23 = 14 (001110) +-27 + -22 = 15 (001111) +-27 + -21 = 16 (010000) +-27 + -20 = 17 (010001) +-27 + -19 = 18 (010010) +-27 + -18 = 19 (010011) +-27 + -17 = 20 (010100) +-27 + -16 = 21 (010101) +-27 + -15 = 22 (010110) +-27 + -14 = 23 (010111) +-27 + -13 = 24 (011000) +-27 + -12 = 25 (011001) +-27 + -11 = 26 (011010) +-27 + -10 = 27 (011011) +-27 + -9 = 28 (011100) +-27 + -8 = 29 (011101) +-27 + -7 = 30 (011110) +-27 + -6 = 31 (011111) +-27 + -5 = -32 (100000) +-27 + -4 = -31 (100001) +-27 + -3 = -30 (100010) +-27 + -2 = -29 (100011) +-27 + -1 = -28 (100100) +-26 + 0 = -26 (100110) +-26 + 1 = -25 (100111) +-26 + 2 = -24 (101000) +-26 + 3 = -23 (101001) +-26 + 4 = -22 (101010) +-26 + 5 = -21 (101011) +-26 + 6 = -20 (101100) +-26 + 7 = -19 (101101) +-26 + 8 = -18 (101110) +-26 + 9 = -17 (101111) +-26 + 10 = -16 (110000) +-26 + 11 = -15 (110001) +-26 + 12 = -14 (110010) +-26 + 13 = -13 (110011) +-26 + 14 = -12 (110100) +-26 + 15 = -11 (110101) +-26 + 16 = -10 (110110) +-26 + 17 = -9 (110111) +-26 + 18 = -8 (111000) +-26 + 19 = -7 (111001) +-26 + 20 = -6 (111010) +-26 + 21 = -5 (111011) +-26 + 22 = -4 (111100) +-26 + 23 = -3 (111101) +-26 + 24 = -2 (111110) +-26 + 25 = -1 (111111) +-26 + 26 = 0 (000000) +-26 + 27 = 1 (000001) +-26 + 28 = 2 (000010) +-26 + 29 = 3 (000011) +-26 + 30 = 4 (000100) +-26 + 31 = 5 (000101) +-26 + -32 = 6 (000110) +-26 + -31 = 7 (000111) +-26 + -30 = 8 (001000) +-26 + -29 = 9 (001001) +-26 + -28 = 10 (001010) +-26 + -27 = 11 (001011) +-26 + -26 = 12 (001100) +-26 + -25 = 13 (001101) +-26 + -24 = 14 (001110) +-26 + -23 = 15 (001111) +-26 + -22 = 16 (010000) +-26 + -21 = 17 (010001) +-26 + -20 = 18 (010010) +-26 + -19 = 19 (010011) +-26 + -18 = 20 (010100) +-26 + -17 = 21 (010101) +-26 + -16 = 22 (010110) +-26 + -15 = 23 (010111) +-26 + -14 = 24 (011000) +-26 + -13 = 25 (011001) +-26 + -12 = 26 (011010) +-26 + -11 = 27 (011011) +-26 + -10 = 28 (011100) +-26 + -9 = 29 (011101) +-26 + -8 = 30 (011110) +-26 + -7 = 31 (011111) +-26 + -6 = -32 (100000) +-26 + -5 = -31 (100001) +-26 + -4 = -30 (100010) +-26 + -3 = -29 (100011) +-26 + -2 = -28 (100100) +-26 + -1 = -27 (100101) +-25 + 0 = -25 (100111) +-25 + 1 = -24 (101000) +-25 + 2 = -23 (101001) +-25 + 3 = -22 (101010) +-25 + 4 = -21 (101011) +-25 + 5 = -20 (101100) +-25 + 6 = -19 (101101) +-25 + 7 = -18 (101110) +-25 + 8 = -17 (101111) +-25 + 9 = -16 (110000) +-25 + 10 = -15 (110001) +-25 + 11 = -14 (110010) +-25 + 12 = -13 (110011) +-25 + 13 = -12 (110100) +-25 + 14 = -11 (110101) +-25 + 15 = -10 (110110) +-25 + 16 = -9 (110111) +-25 + 17 = -8 (111000) +-25 + 18 = -7 (111001) +-25 + 19 = -6 (111010) +-25 + 20 = -5 (111011) +-25 + 21 = -4 (111100) +-25 + 22 = -3 (111101) +-25 + 23 = -2 (111110) +-25 + 24 = -1 (111111) +-25 + 25 = 0 (000000) +-25 + 26 = 1 (000001) +-25 + 27 = 2 (000010) +-25 + 28 = 3 (000011) +-25 + 29 = 4 (000100) +-25 + 30 = 5 (000101) +-25 + 31 = 6 (000110) +-25 + -32 = 7 (000111) +-25 + -31 = 8 (001000) +-25 + -30 = 9 (001001) +-25 + -29 = 10 (001010) +-25 + -28 = 11 (001011) +-25 + -27 = 12 (001100) +-25 + -26 = 13 (001101) +-25 + -25 = 14 (001110) +-25 + -24 = 15 (001111) +-25 + -23 = 16 (010000) +-25 + -22 = 17 (010001) +-25 + -21 = 18 (010010) +-25 + -20 = 19 (010011) +-25 + -19 = 20 (010100) +-25 + -18 = 21 (010101) +-25 + -17 = 22 (010110) +-25 + -16 = 23 (010111) +-25 + -15 = 24 (011000) +-25 + -14 = 25 (011001) +-25 + -13 = 26 (011010) +-25 + -12 = 27 (011011) +-25 + -11 = 28 (011100) +-25 + -10 = 29 (011101) +-25 + -9 = 30 (011110) +-25 + -8 = 31 (011111) +-25 + -7 = -32 (100000) +-25 + -6 = -31 (100001) +-25 + -5 = -30 (100010) +-25 + -4 = -29 (100011) +-25 + -3 = -28 (100100) +-25 + -2 = -27 (100101) +-25 + -1 = -26 (100110) +-24 + 0 = -24 (101000) +-24 + 1 = -23 (101001) +-24 + 2 = -22 (101010) +-24 + 3 = -21 (101011) +-24 + 4 = -20 (101100) +-24 + 5 = -19 (101101) +-24 + 6 = -18 (101110) +-24 + 7 = -17 (101111) +-24 + 8 = -16 (110000) +-24 + 9 = -15 (110001) +-24 + 10 = -14 (110010) +-24 + 11 = -13 (110011) +-24 + 12 = -12 (110100) +-24 + 13 = -11 (110101) +-24 + 14 = -10 (110110) +-24 + 15 = -9 (110111) +-24 + 16 = -8 (111000) +-24 + 17 = -7 (111001) +-24 + 18 = -6 (111010) +-24 + 19 = -5 (111011) +-24 + 20 = -4 (111100) +-24 + 21 = -3 (111101) +-24 + 22 = -2 (111110) +-24 + 23 = -1 (111111) +-24 + 24 = 0 (000000) +-24 + 25 = 1 (000001) +-24 + 26 = 2 (000010) +-24 + 27 = 3 (000011) +-24 + 28 = 4 (000100) +-24 + 29 = 5 (000101) +-24 + 30 = 6 (000110) +-24 + 31 = 7 (000111) +-24 + -32 = 8 (001000) +-24 + -31 = 9 (001001) +-24 + -30 = 10 (001010) +-24 + -29 = 11 (001011) +-24 + -28 = 12 (001100) +-24 + -27 = 13 (001101) +-24 + -26 = 14 (001110) +-24 + -25 = 15 (001111) +-24 + -24 = 16 (010000) +-24 + -23 = 17 (010001) +-24 + -22 = 18 (010010) +-24 + -21 = 19 (010011) +-24 + -20 = 20 (010100) +-24 + -19 = 21 (010101) +-24 + -18 = 22 (010110) +-24 + -17 = 23 (010111) +-24 + -16 = 24 (011000) +-24 + -15 = 25 (011001) +-24 + -14 = 26 (011010) +-24 + -13 = 27 (011011) +-24 + -12 = 28 (011100) +-24 + -11 = 29 (011101) +-24 + -10 = 30 (011110) +-24 + -9 = 31 (011111) +-24 + -8 = -32 (100000) +-24 + -7 = -31 (100001) +-24 + -6 = -30 (100010) +-24 + -5 = -29 (100011) +-24 + -4 = -28 (100100) +-24 + -3 = -27 (100101) +-24 + -2 = -26 (100110) +-24 + -1 = -25 (100111) +-23 + 0 = -23 (101001) +-23 + 1 = -22 (101010) +-23 + 2 = -21 (101011) +-23 + 3 = -20 (101100) +-23 + 4 = -19 (101101) +-23 + 5 = -18 (101110) +-23 + 6 = -17 (101111) +-23 + 7 = -16 (110000) +-23 + 8 = -15 (110001) +-23 + 9 = -14 (110010) +-23 + 10 = -13 (110011) +-23 + 11 = -12 (110100) +-23 + 12 = -11 (110101) +-23 + 13 = -10 (110110) +-23 + 14 = -9 (110111) +-23 + 15 = -8 (111000) +-23 + 16 = -7 (111001) +-23 + 17 = -6 (111010) +-23 + 18 = -5 (111011) +-23 + 19 = -4 (111100) +-23 + 20 = -3 (111101) +-23 + 21 = -2 (111110) +-23 + 22 = -1 (111111) +-23 + 23 = 0 (000000) +-23 + 24 = 1 (000001) +-23 + 25 = 2 (000010) +-23 + 26 = 3 (000011) +-23 + 27 = 4 (000100) +-23 + 28 = 5 (000101) +-23 + 29 = 6 (000110) +-23 + 30 = 7 (000111) +-23 + 31 = 8 (001000) +-23 + -32 = 9 (001001) +-23 + -31 = 10 (001010) +-23 + -30 = 11 (001011) +-23 + -29 = 12 (001100) +-23 + -28 = 13 (001101) +-23 + -27 = 14 (001110) +-23 + -26 = 15 (001111) +-23 + -25 = 16 (010000) +-23 + -24 = 17 (010001) +-23 + -23 = 18 (010010) +-23 + -22 = 19 (010011) +-23 + -21 = 20 (010100) +-23 + -20 = 21 (010101) +-23 + -19 = 22 (010110) +-23 + -18 = 23 (010111) +-23 + -17 = 24 (011000) +-23 + -16 = 25 (011001) +-23 + -15 = 26 (011010) +-23 + -14 = 27 (011011) +-23 + -13 = 28 (011100) +-23 + -12 = 29 (011101) +-23 + -11 = 30 (011110) +-23 + -10 = 31 (011111) +-23 + -9 = -32 (100000) +-23 + -8 = -31 (100001) +-23 + -7 = -30 (100010) +-23 + -6 = -29 (100011) +-23 + -5 = -28 (100100) +-23 + -4 = -27 (100101) +-23 + -3 = -26 (100110) +-23 + -2 = -25 (100111) +-23 + -1 = -24 (101000) +-22 + 0 = -22 (101010) +-22 + 1 = -21 (101011) +-22 + 2 = -20 (101100) +-22 + 3 = -19 (101101) +-22 + 4 = -18 (101110) +-22 + 5 = -17 (101111) +-22 + 6 = -16 (110000) +-22 + 7 = -15 (110001) +-22 + 8 = -14 (110010) +-22 + 9 = -13 (110011) +-22 + 10 = -12 (110100) +-22 + 11 = -11 (110101) +-22 + 12 = -10 (110110) +-22 + 13 = -9 (110111) +-22 + 14 = -8 (111000) +-22 + 15 = -7 (111001) +-22 + 16 = -6 (111010) +-22 + 17 = -5 (111011) +-22 + 18 = -4 (111100) +-22 + 19 = -3 (111101) +-22 + 20 = -2 (111110) +-22 + 21 = -1 (111111) +-22 + 22 = 0 (000000) +-22 + 23 = 1 (000001) +-22 + 24 = 2 (000010) +-22 + 25 = 3 (000011) +-22 + 26 = 4 (000100) +-22 + 27 = 5 (000101) +-22 + 28 = 6 (000110) +-22 + 29 = 7 (000111) +-22 + 30 = 8 (001000) +-22 + 31 = 9 (001001) +-22 + -32 = 10 (001010) +-22 + -31 = 11 (001011) +-22 + -30 = 12 (001100) +-22 + -29 = 13 (001101) +-22 + -28 = 14 (001110) +-22 + -27 = 15 (001111) +-22 + -26 = 16 (010000) +-22 + -25 = 17 (010001) +-22 + -24 = 18 (010010) +-22 + -23 = 19 (010011) +-22 + -22 = 20 (010100) +-22 + -21 = 21 (010101) +-22 + -20 = 22 (010110) +-22 + -19 = 23 (010111) +-22 + -18 = 24 (011000) +-22 + -17 = 25 (011001) +-22 + -16 = 26 (011010) +-22 + -15 = 27 (011011) +-22 + -14 = 28 (011100) +-22 + -13 = 29 (011101) +-22 + -12 = 30 (011110) +-22 + -11 = 31 (011111) +-22 + -10 = -32 (100000) +-22 + -9 = -31 (100001) +-22 + -8 = -30 (100010) +-22 + -7 = -29 (100011) +-22 + -6 = -28 (100100) +-22 + -5 = -27 (100101) +-22 + -4 = -26 (100110) +-22 + -3 = -25 (100111) +-22 + -2 = -24 (101000) +-22 + -1 = -23 (101001) +-21 + 0 = -21 (101011) +-21 + 1 = -20 (101100) +-21 + 2 = -19 (101101) +-21 + 3 = -18 (101110) +-21 + 4 = -17 (101111) +-21 + 5 = -16 (110000) +-21 + 6 = -15 (110001) +-21 + 7 = -14 (110010) +-21 + 8 = -13 (110011) +-21 + 9 = -12 (110100) +-21 + 10 = -11 (110101) +-21 + 11 = -10 (110110) +-21 + 12 = -9 (110111) +-21 + 13 = -8 (111000) +-21 + 14 = -7 (111001) +-21 + 15 = -6 (111010) +-21 + 16 = -5 (111011) +-21 + 17 = -4 (111100) +-21 + 18 = -3 (111101) +-21 + 19 = -2 (111110) +-21 + 20 = -1 (111111) +-21 + 21 = 0 (000000) +-21 + 22 = 1 (000001) +-21 + 23 = 2 (000010) +-21 + 24 = 3 (000011) +-21 + 25 = 4 (000100) +-21 + 26 = 5 (000101) +-21 + 27 = 6 (000110) +-21 + 28 = 7 (000111) +-21 + 29 = 8 (001000) +-21 + 30 = 9 (001001) +-21 + 31 = 10 (001010) +-21 + -32 = 11 (001011) +-21 + -31 = 12 (001100) +-21 + -30 = 13 (001101) +-21 + -29 = 14 (001110) +-21 + -28 = 15 (001111) +-21 + -27 = 16 (010000) +-21 + -26 = 17 (010001) +-21 + -25 = 18 (010010) +-21 + -24 = 19 (010011) +-21 + -23 = 20 (010100) +-21 + -22 = 21 (010101) +-21 + -21 = 22 (010110) +-21 + -20 = 23 (010111) +-21 + -19 = 24 (011000) +-21 + -18 = 25 (011001) +-21 + -17 = 26 (011010) +-21 + -16 = 27 (011011) +-21 + -15 = 28 (011100) +-21 + -14 = 29 (011101) +-21 + -13 = 30 (011110) +-21 + -12 = 31 (011111) +-21 + -11 = -32 (100000) +-21 + -10 = -31 (100001) +-21 + -9 = -30 (100010) +-21 + -8 = -29 (100011) +-21 + -7 = -28 (100100) +-21 + -6 = -27 (100101) +-21 + -5 = -26 (100110) +-21 + -4 = -25 (100111) +-21 + -3 = -24 (101000) +-21 + -2 = -23 (101001) +-21 + -1 = -22 (101010) +-20 + 0 = -20 (101100) +-20 + 1 = -19 (101101) +-20 + 2 = -18 (101110) +-20 + 3 = -17 (101111) +-20 + 4 = -16 (110000) +-20 + 5 = -15 (110001) +-20 + 6 = -14 (110010) +-20 + 7 = -13 (110011) +-20 + 8 = -12 (110100) +-20 + 9 = -11 (110101) +-20 + 10 = -10 (110110) +-20 + 11 = -9 (110111) +-20 + 12 = -8 (111000) +-20 + 13 = -7 (111001) +-20 + 14 = -6 (111010) +-20 + 15 = -5 (111011) +-20 + 16 = -4 (111100) +-20 + 17 = -3 (111101) +-20 + 18 = -2 (111110) +-20 + 19 = -1 (111111) +-20 + 20 = 0 (000000) +-20 + 21 = 1 (000001) +-20 + 22 = 2 (000010) +-20 + 23 = 3 (000011) +-20 + 24 = 4 (000100) +-20 + 25 = 5 (000101) +-20 + 26 = 6 (000110) +-20 + 27 = 7 (000111) +-20 + 28 = 8 (001000) +-20 + 29 = 9 (001001) +-20 + 30 = 10 (001010) +-20 + 31 = 11 (001011) +-20 + -32 = 12 (001100) +-20 + -31 = 13 (001101) +-20 + -30 = 14 (001110) +-20 + -29 = 15 (001111) +-20 + -28 = 16 (010000) +-20 + -27 = 17 (010001) +-20 + -26 = 18 (010010) +-20 + -25 = 19 (010011) +-20 + -24 = 20 (010100) +-20 + -23 = 21 (010101) +-20 + -22 = 22 (010110) +-20 + -21 = 23 (010111) +-20 + -20 = 24 (011000) +-20 + -19 = 25 (011001) +-20 + -18 = 26 (011010) +-20 + -17 = 27 (011011) +-20 + -16 = 28 (011100) +-20 + -15 = 29 (011101) +-20 + -14 = 30 (011110) +-20 + -13 = 31 (011111) +-20 + -12 = -32 (100000) +-20 + -11 = -31 (100001) +-20 + -10 = -30 (100010) +-20 + -9 = -29 (100011) +-20 + -8 = -28 (100100) +-20 + -7 = -27 (100101) +-20 + -6 = -26 (100110) +-20 + -5 = -25 (100111) +-20 + -4 = -24 (101000) +-20 + -3 = -23 (101001) +-20 + -2 = -22 (101010) +-20 + -1 = -21 (101011) +-19 + 0 = -19 (101101) +-19 + 1 = -18 (101110) +-19 + 2 = -17 (101111) +-19 + 3 = -16 (110000) +-19 + 4 = -15 (110001) +-19 + 5 = -14 (110010) +-19 + 6 = -13 (110011) +-19 + 7 = -12 (110100) +-19 + 8 = -11 (110101) +-19 + 9 = -10 (110110) +-19 + 10 = -9 (110111) +-19 + 11 = -8 (111000) +-19 + 12 = -7 (111001) +-19 + 13 = -6 (111010) +-19 + 14 = -5 (111011) +-19 + 15 = -4 (111100) +-19 + 16 = -3 (111101) +-19 + 17 = -2 (111110) +-19 + 18 = -1 (111111) +-19 + 19 = 0 (000000) +-19 + 20 = 1 (000001) +-19 + 21 = 2 (000010) +-19 + 22 = 3 (000011) +-19 + 23 = 4 (000100) +-19 + 24 = 5 (000101) +-19 + 25 = 6 (000110) +-19 + 26 = 7 (000111) +-19 + 27 = 8 (001000) +-19 + 28 = 9 (001001) +-19 + 29 = 10 (001010) +-19 + 30 = 11 (001011) +-19 + 31 = 12 (001100) +-19 + -32 = 13 (001101) +-19 + -31 = 14 (001110) +-19 + -30 = 15 (001111) +-19 + -29 = 16 (010000) +-19 + -28 = 17 (010001) +-19 + -27 = 18 (010010) +-19 + -26 = 19 (010011) +-19 + -25 = 20 (010100) +-19 + -24 = 21 (010101) +-19 + -23 = 22 (010110) +-19 + -22 = 23 (010111) +-19 + -21 = 24 (011000) +-19 + -20 = 25 (011001) +-19 + -19 = 26 (011010) +-19 + -18 = 27 (011011) +-19 + -17 = 28 (011100) +-19 + -16 = 29 (011101) +-19 + -15 = 30 (011110) +-19 + -14 = 31 (011111) +-19 + -13 = -32 (100000) +-19 + -12 = -31 (100001) +-19 + -11 = -30 (100010) +-19 + -10 = -29 (100011) +-19 + -9 = -28 (100100) +-19 + -8 = -27 (100101) +-19 + -7 = -26 (100110) +-19 + -6 = -25 (100111) +-19 + -5 = -24 (101000) +-19 + -4 = -23 (101001) +-19 + -3 = -22 (101010) +-19 + -2 = -21 (101011) +-19 + -1 = -20 (101100) +-18 + 0 = -18 (101110) +-18 + 1 = -17 (101111) +-18 + 2 = -16 (110000) +-18 + 3 = -15 (110001) +-18 + 4 = -14 (110010) +-18 + 5 = -13 (110011) +-18 + 6 = -12 (110100) +-18 + 7 = -11 (110101) +-18 + 8 = -10 (110110) +-18 + 9 = -9 (110111) +-18 + 10 = -8 (111000) +-18 + 11 = -7 (111001) +-18 + 12 = -6 (111010) +-18 + 13 = -5 (111011) +-18 + 14 = -4 (111100) +-18 + 15 = -3 (111101) +-18 + 16 = -2 (111110) +-18 + 17 = -1 (111111) +-18 + 18 = 0 (000000) +-18 + 19 = 1 (000001) +-18 + 20 = 2 (000010) +-18 + 21 = 3 (000011) +-18 + 22 = 4 (000100) +-18 + 23 = 5 (000101) +-18 + 24 = 6 (000110) +-18 + 25 = 7 (000111) +-18 + 26 = 8 (001000) +-18 + 27 = 9 (001001) +-18 + 28 = 10 (001010) +-18 + 29 = 11 (001011) +-18 + 30 = 12 (001100) +-18 + 31 = 13 (001101) +-18 + -32 = 14 (001110) +-18 + -31 = 15 (001111) +-18 + -30 = 16 (010000) +-18 + -29 = 17 (010001) +-18 + -28 = 18 (010010) +-18 + -27 = 19 (010011) +-18 + -26 = 20 (010100) +-18 + -25 = 21 (010101) +-18 + -24 = 22 (010110) +-18 + -23 = 23 (010111) +-18 + -22 = 24 (011000) +-18 + -21 = 25 (011001) +-18 + -20 = 26 (011010) +-18 + -19 = 27 (011011) +-18 + -18 = 28 (011100) +-18 + -17 = 29 (011101) +-18 + -16 = 30 (011110) +-18 + -15 = 31 (011111) +-18 + -14 = -32 (100000) +-18 + -13 = -31 (100001) +-18 + -12 = -30 (100010) +-18 + -11 = -29 (100011) +-18 + -10 = -28 (100100) +-18 + -9 = -27 (100101) +-18 + -8 = -26 (100110) +-18 + -7 = -25 (100111) +-18 + -6 = -24 (101000) +-18 + -5 = -23 (101001) +-18 + -4 = -22 (101010) +-18 + -3 = -21 (101011) +-18 + -2 = -20 (101100) +-18 + -1 = -19 (101101) +-17 + 0 = -17 (101111) +-17 + 1 = -16 (110000) +-17 + 2 = -15 (110001) +-17 + 3 = -14 (110010) +-17 + 4 = -13 (110011) +-17 + 5 = -12 (110100) +-17 + 6 = -11 (110101) +-17 + 7 = -10 (110110) +-17 + 8 = -9 (110111) +-17 + 9 = -8 (111000) +-17 + 10 = -7 (111001) +-17 + 11 = -6 (111010) +-17 + 12 = -5 (111011) +-17 + 13 = -4 (111100) +-17 + 14 = -3 (111101) +-17 + 15 = -2 (111110) +-17 + 16 = -1 (111111) +-17 + 17 = 0 (000000) +-17 + 18 = 1 (000001) +-17 + 19 = 2 (000010) +-17 + 20 = 3 (000011) +-17 + 21 = 4 (000100) +-17 + 22 = 5 (000101) +-17 + 23 = 6 (000110) +-17 + 24 = 7 (000111) +-17 + 25 = 8 (001000) +-17 + 26 = 9 (001001) +-17 + 27 = 10 (001010) +-17 + 28 = 11 (001011) +-17 + 29 = 12 (001100) +-17 + 30 = 13 (001101) +-17 + 31 = 14 (001110) +-17 + -32 = 15 (001111) +-17 + -31 = 16 (010000) +-17 + -30 = 17 (010001) +-17 + -29 = 18 (010010) +-17 + -28 = 19 (010011) +-17 + -27 = 20 (010100) +-17 + -26 = 21 (010101) +-17 + -25 = 22 (010110) +-17 + -24 = 23 (010111) +-17 + -23 = 24 (011000) +-17 + -22 = 25 (011001) +-17 + -21 = 26 (011010) +-17 + -20 = 27 (011011) +-17 + -19 = 28 (011100) +-17 + -18 = 29 (011101) +-17 + -17 = 30 (011110) +-17 + -16 = 31 (011111) +-17 + -15 = -32 (100000) +-17 + -14 = -31 (100001) +-17 + -13 = -30 (100010) +-17 + -12 = -29 (100011) +-17 + -11 = -28 (100100) +-17 + -10 = -27 (100101) +-17 + -9 = -26 (100110) +-17 + -8 = -25 (100111) +-17 + -7 = -24 (101000) +-17 + -6 = -23 (101001) +-17 + -5 = -22 (101010) +-17 + -4 = -21 (101011) +-17 + -3 = -20 (101100) +-17 + -2 = -19 (101101) +-17 + -1 = -18 (101110) +-16 + 0 = -16 (110000) +-16 + 1 = -15 (110001) +-16 + 2 = -14 (110010) +-16 + 3 = -13 (110011) +-16 + 4 = -12 (110100) +-16 + 5 = -11 (110101) +-16 + 6 = -10 (110110) +-16 + 7 = -9 (110111) +-16 + 8 = -8 (111000) +-16 + 9 = -7 (111001) +-16 + 10 = -6 (111010) +-16 + 11 = -5 (111011) +-16 + 12 = -4 (111100) +-16 + 13 = -3 (111101) +-16 + 14 = -2 (111110) +-16 + 15 = -1 (111111) +-16 + 16 = 0 (000000) +-16 + 17 = 1 (000001) +-16 + 18 = 2 (000010) +-16 + 19 = 3 (000011) +-16 + 20 = 4 (000100) +-16 + 21 = 5 (000101) +-16 + 22 = 6 (000110) +-16 + 23 = 7 (000111) +-16 + 24 = 8 (001000) +-16 + 25 = 9 (001001) +-16 + 26 = 10 (001010) +-16 + 27 = 11 (001011) +-16 + 28 = 12 (001100) +-16 + 29 = 13 (001101) +-16 + 30 = 14 (001110) +-16 + 31 = 15 (001111) +-16 + -32 = 16 (010000) +-16 + -31 = 17 (010001) +-16 + -30 = 18 (010010) +-16 + -29 = 19 (010011) +-16 + -28 = 20 (010100) +-16 + -27 = 21 (010101) +-16 + -26 = 22 (010110) +-16 + -25 = 23 (010111) +-16 + -24 = 24 (011000) +-16 + -23 = 25 (011001) +-16 + -22 = 26 (011010) +-16 + -21 = 27 (011011) +-16 + -20 = 28 (011100) +-16 + -19 = 29 (011101) +-16 + -18 = 30 (011110) +-16 + -17 = 31 (011111) +-16 + -16 = -32 (100000) +-16 + -15 = -31 (100001) +-16 + -14 = -30 (100010) +-16 + -13 = -29 (100011) +-16 + -12 = -28 (100100) +-16 + -11 = -27 (100101) +-16 + -10 = -26 (100110) +-16 + -9 = -25 (100111) +-16 + -8 = -24 (101000) +-16 + -7 = -23 (101001) +-16 + -6 = -22 (101010) +-16 + -5 = -21 (101011) +-16 + -4 = -20 (101100) +-16 + -3 = -19 (101101) +-16 + -2 = -18 (101110) +-16 + -1 = -17 (101111) +-15 + 0 = -15 (110001) +-15 + 1 = -14 (110010) +-15 + 2 = -13 (110011) +-15 + 3 = -12 (110100) +-15 + 4 = -11 (110101) +-15 + 5 = -10 (110110) +-15 + 6 = -9 (110111) +-15 + 7 = -8 (111000) +-15 + 8 = -7 (111001) +-15 + 9 = -6 (111010) +-15 + 10 = -5 (111011) +-15 + 11 = -4 (111100) +-15 + 12 = -3 (111101) +-15 + 13 = -2 (111110) +-15 + 14 = -1 (111111) +-15 + 15 = 0 (000000) +-15 + 16 = 1 (000001) +-15 + 17 = 2 (000010) +-15 + 18 = 3 (000011) +-15 + 19 = 4 (000100) +-15 + 20 = 5 (000101) +-15 + 21 = 6 (000110) +-15 + 22 = 7 (000111) +-15 + 23 = 8 (001000) +-15 + 24 = 9 (001001) +-15 + 25 = 10 (001010) +-15 + 26 = 11 (001011) +-15 + 27 = 12 (001100) +-15 + 28 = 13 (001101) +-15 + 29 = 14 (001110) +-15 + 30 = 15 (001111) +-15 + 31 = 16 (010000) +-15 + -32 = 17 (010001) +-15 + -31 = 18 (010010) +-15 + -30 = 19 (010011) +-15 + -29 = 20 (010100) +-15 + -28 = 21 (010101) +-15 + -27 = 22 (010110) +-15 + -26 = 23 (010111) +-15 + -25 = 24 (011000) +-15 + -24 = 25 (011001) +-15 + -23 = 26 (011010) +-15 + -22 = 27 (011011) +-15 + -21 = 28 (011100) +-15 + -20 = 29 (011101) +-15 + -19 = 30 (011110) +-15 + -18 = 31 (011111) +-15 + -17 = -32 (100000) +-15 + -16 = -31 (100001) +-15 + -15 = -30 (100010) +-15 + -14 = -29 (100011) +-15 + -13 = -28 (100100) +-15 + -12 = -27 (100101) +-15 + -11 = -26 (100110) +-15 + -10 = -25 (100111) +-15 + -9 = -24 (101000) +-15 + -8 = -23 (101001) +-15 + -7 = -22 (101010) +-15 + -6 = -21 (101011) +-15 + -5 = -20 (101100) +-15 + -4 = -19 (101101) +-15 + -3 = -18 (101110) +-15 + -2 = -17 (101111) +-15 + -1 = -16 (110000) +-14 + 0 = -14 (110010) +-14 + 1 = -13 (110011) +-14 + 2 = -12 (110100) +-14 + 3 = -11 (110101) +-14 + 4 = -10 (110110) +-14 + 5 = -9 (110111) +-14 + 6 = -8 (111000) +-14 + 7 = -7 (111001) +-14 + 8 = -6 (111010) +-14 + 9 = -5 (111011) +-14 + 10 = -4 (111100) +-14 + 11 = -3 (111101) +-14 + 12 = -2 (111110) +-14 + 13 = -1 (111111) +-14 + 14 = 0 (000000) +-14 + 15 = 1 (000001) +-14 + 16 = 2 (000010) +-14 + 17 = 3 (000011) +-14 + 18 = 4 (000100) +-14 + 19 = 5 (000101) +-14 + 20 = 6 (000110) +-14 + 21 = 7 (000111) +-14 + 22 = 8 (001000) +-14 + 23 = 9 (001001) +-14 + 24 = 10 (001010) +-14 + 25 = 11 (001011) +-14 + 26 = 12 (001100) +-14 + 27 = 13 (001101) +-14 + 28 = 14 (001110) +-14 + 29 = 15 (001111) +-14 + 30 = 16 (010000) +-14 + 31 = 17 (010001) +-14 + -32 = 18 (010010) +-14 + -31 = 19 (010011) +-14 + -30 = 20 (010100) +-14 + -29 = 21 (010101) +-14 + -28 = 22 (010110) +-14 + -27 = 23 (010111) +-14 + -26 = 24 (011000) +-14 + -25 = 25 (011001) +-14 + -24 = 26 (011010) +-14 + -23 = 27 (011011) +-14 + -22 = 28 (011100) +-14 + -21 = 29 (011101) +-14 + -20 = 30 (011110) +-14 + -19 = 31 (011111) +-14 + -18 = -32 (100000) +-14 + -17 = -31 (100001) +-14 + -16 = -30 (100010) +-14 + -15 = -29 (100011) +-14 + -14 = -28 (100100) +-14 + -13 = -27 (100101) +-14 + -12 = -26 (100110) +-14 + -11 = -25 (100111) +-14 + -10 = -24 (101000) +-14 + -9 = -23 (101001) +-14 + -8 = -22 (101010) +-14 + -7 = -21 (101011) +-14 + -6 = -20 (101100) +-14 + -5 = -19 (101101) +-14 + -4 = -18 (101110) +-14 + -3 = -17 (101111) +-14 + -2 = -16 (110000) +-14 + -1 = -15 (110001) +-13 + 0 = -13 (110011) +-13 + 1 = -12 (110100) +-13 + 2 = -11 (110101) +-13 + 3 = -10 (110110) +-13 + 4 = -9 (110111) +-13 + 5 = -8 (111000) +-13 + 6 = -7 (111001) +-13 + 7 = -6 (111010) +-13 + 8 = -5 (111011) +-13 + 9 = -4 (111100) +-13 + 10 = -3 (111101) +-13 + 11 = -2 (111110) +-13 + 12 = -1 (111111) +-13 + 13 = 0 (000000) +-13 + 14 = 1 (000001) +-13 + 15 = 2 (000010) +-13 + 16 = 3 (000011) +-13 + 17 = 4 (000100) +-13 + 18 = 5 (000101) +-13 + 19 = 6 (000110) +-13 + 20 = 7 (000111) +-13 + 21 = 8 (001000) +-13 + 22 = 9 (001001) +-13 + 23 = 10 (001010) +-13 + 24 = 11 (001011) +-13 + 25 = 12 (001100) +-13 + 26 = 13 (001101) +-13 + 27 = 14 (001110) +-13 + 28 = 15 (001111) +-13 + 29 = 16 (010000) +-13 + 30 = 17 (010001) +-13 + 31 = 18 (010010) +-13 + -32 = 19 (010011) +-13 + -31 = 20 (010100) +-13 + -30 = 21 (010101) +-13 + -29 = 22 (010110) +-13 + -28 = 23 (010111) +-13 + -27 = 24 (011000) +-13 + -26 = 25 (011001) +-13 + -25 = 26 (011010) +-13 + -24 = 27 (011011) +-13 + -23 = 28 (011100) +-13 + -22 = 29 (011101) +-13 + -21 = 30 (011110) +-13 + -20 = 31 (011111) +-13 + -19 = -32 (100000) +-13 + -18 = -31 (100001) +-13 + -17 = -30 (100010) +-13 + -16 = -29 (100011) +-13 + -15 = -28 (100100) +-13 + -14 = -27 (100101) +-13 + -13 = -26 (100110) +-13 + -12 = -25 (100111) +-13 + -11 = -24 (101000) +-13 + -10 = -23 (101001) +-13 + -9 = -22 (101010) +-13 + -8 = -21 (101011) +-13 + -7 = -20 (101100) +-13 + -6 = -19 (101101) +-13 + -5 = -18 (101110) +-13 + -4 = -17 (101111) +-13 + -3 = -16 (110000) +-13 + -2 = -15 (110001) +-13 + -1 = -14 (110010) +-12 + 0 = -12 (110100) +-12 + 1 = -11 (110101) +-12 + 2 = -10 (110110) +-12 + 3 = -9 (110111) +-12 + 4 = -8 (111000) +-12 + 5 = -7 (111001) +-12 + 6 = -6 (111010) +-12 + 7 = -5 (111011) +-12 + 8 = -4 (111100) +-12 + 9 = -3 (111101) +-12 + 10 = -2 (111110) +-12 + 11 = -1 (111111) +-12 + 12 = 0 (000000) +-12 + 13 = 1 (000001) +-12 + 14 = 2 (000010) +-12 + 15 = 3 (000011) +-12 + 16 = 4 (000100) +-12 + 17 = 5 (000101) +-12 + 18 = 6 (000110) +-12 + 19 = 7 (000111) +-12 + 20 = 8 (001000) +-12 + 21 = 9 (001001) +-12 + 22 = 10 (001010) +-12 + 23 = 11 (001011) +-12 + 24 = 12 (001100) +-12 + 25 = 13 (001101) +-12 + 26 = 14 (001110) +-12 + 27 = 15 (001111) +-12 + 28 = 16 (010000) +-12 + 29 = 17 (010001) +-12 + 30 = 18 (010010) +-12 + 31 = 19 (010011) +-12 + -32 = 20 (010100) +-12 + -31 = 21 (010101) +-12 + -30 = 22 (010110) +-12 + -29 = 23 (010111) +-12 + -28 = 24 (011000) +-12 + -27 = 25 (011001) +-12 + -26 = 26 (011010) +-12 + -25 = 27 (011011) +-12 + -24 = 28 (011100) +-12 + -23 = 29 (011101) +-12 + -22 = 30 (011110) +-12 + -21 = 31 (011111) +-12 + -20 = -32 (100000) +-12 + -19 = -31 (100001) +-12 + -18 = -30 (100010) +-12 + -17 = -29 (100011) +-12 + -16 = -28 (100100) +-12 + -15 = -27 (100101) +-12 + -14 = -26 (100110) +-12 + -13 = -25 (100111) +-12 + -12 = -24 (101000) +-12 + -11 = -23 (101001) +-12 + -10 = -22 (101010) +-12 + -9 = -21 (101011) +-12 + -8 = -20 (101100) +-12 + -7 = -19 (101101) +-12 + -6 = -18 (101110) +-12 + -5 = -17 (101111) +-12 + -4 = -16 (110000) +-12 + -3 = -15 (110001) +-12 + -2 = -14 (110010) +-12 + -1 = -13 (110011) +-11 + 0 = -11 (110101) +-11 + 1 = -10 (110110) +-11 + 2 = -9 (110111) +-11 + 3 = -8 (111000) +-11 + 4 = -7 (111001) +-11 + 5 = -6 (111010) +-11 + 6 = -5 (111011) +-11 + 7 = -4 (111100) +-11 + 8 = -3 (111101) +-11 + 9 = -2 (111110) +-11 + 10 = -1 (111111) +-11 + 11 = 0 (000000) +-11 + 12 = 1 (000001) +-11 + 13 = 2 (000010) +-11 + 14 = 3 (000011) +-11 + 15 = 4 (000100) +-11 + 16 = 5 (000101) +-11 + 17 = 6 (000110) +-11 + 18 = 7 (000111) +-11 + 19 = 8 (001000) +-11 + 20 = 9 (001001) +-11 + 21 = 10 (001010) +-11 + 22 = 11 (001011) +-11 + 23 = 12 (001100) +-11 + 24 = 13 (001101) +-11 + 25 = 14 (001110) +-11 + 26 = 15 (001111) +-11 + 27 = 16 (010000) +-11 + 28 = 17 (010001) +-11 + 29 = 18 (010010) +-11 + 30 = 19 (010011) +-11 + 31 = 20 (010100) +-11 + -32 = 21 (010101) +-11 + -31 = 22 (010110) +-11 + -30 = 23 (010111) +-11 + -29 = 24 (011000) +-11 + -28 = 25 (011001) +-11 + -27 = 26 (011010) +-11 + -26 = 27 (011011) +-11 + -25 = 28 (011100) +-11 + -24 = 29 (011101) +-11 + -23 = 30 (011110) +-11 + -22 = 31 (011111) +-11 + -21 = -32 (100000) +-11 + -20 = -31 (100001) +-11 + -19 = -30 (100010) +-11 + -18 = -29 (100011) +-11 + -17 = -28 (100100) +-11 + -16 = -27 (100101) +-11 + -15 = -26 (100110) +-11 + -14 = -25 (100111) +-11 + -13 = -24 (101000) +-11 + -12 = -23 (101001) +-11 + -11 = -22 (101010) +-11 + -10 = -21 (101011) +-11 + -9 = -20 (101100) +-11 + -8 = -19 (101101) +-11 + -7 = -18 (101110) +-11 + -6 = -17 (101111) +-11 + -5 = -16 (110000) +-11 + -4 = -15 (110001) +-11 + -3 = -14 (110010) +-11 + -2 = -13 (110011) +-11 + -1 = -12 (110100) +-10 + 0 = -10 (110110) +-10 + 1 = -9 (110111) +-10 + 2 = -8 (111000) +-10 + 3 = -7 (111001) +-10 + 4 = -6 (111010) +-10 + 5 = -5 (111011) +-10 + 6 = -4 (111100) +-10 + 7 = -3 (111101) +-10 + 8 = -2 (111110) +-10 + 9 = -1 (111111) +-10 + 10 = 0 (000000) +-10 + 11 = 1 (000001) +-10 + 12 = 2 (000010) +-10 + 13 = 3 (000011) +-10 + 14 = 4 (000100) +-10 + 15 = 5 (000101) +-10 + 16 = 6 (000110) +-10 + 17 = 7 (000111) +-10 + 18 = 8 (001000) +-10 + 19 = 9 (001001) +-10 + 20 = 10 (001010) +-10 + 21 = 11 (001011) +-10 + 22 = 12 (001100) +-10 + 23 = 13 (001101) +-10 + 24 = 14 (001110) +-10 + 25 = 15 (001111) +-10 + 26 = 16 (010000) +-10 + 27 = 17 (010001) +-10 + 28 = 18 (010010) +-10 + 29 = 19 (010011) +-10 + 30 = 20 (010100) +-10 + 31 = 21 (010101) +-10 + -32 = 22 (010110) +-10 + -31 = 23 (010111) +-10 + -30 = 24 (011000) +-10 + -29 = 25 (011001) +-10 + -28 = 26 (011010) +-10 + -27 = 27 (011011) +-10 + -26 = 28 (011100) +-10 + -25 = 29 (011101) +-10 + -24 = 30 (011110) +-10 + -23 = 31 (011111) +-10 + -22 = -32 (100000) +-10 + -21 = -31 (100001) +-10 + -20 = -30 (100010) +-10 + -19 = -29 (100011) +-10 + -18 = -28 (100100) +-10 + -17 = -27 (100101) +-10 + -16 = -26 (100110) +-10 + -15 = -25 (100111) +-10 + -14 = -24 (101000) +-10 + -13 = -23 (101001) +-10 + -12 = -22 (101010) +-10 + -11 = -21 (101011) +-10 + -10 = -20 (101100) +-10 + -9 = -19 (101101) +-10 + -8 = -18 (101110) +-10 + -7 = -17 (101111) +-10 + -6 = -16 (110000) +-10 + -5 = -15 (110001) +-10 + -4 = -14 (110010) +-10 + -3 = -13 (110011) +-10 + -2 = -12 (110100) +-10 + -1 = -11 (110101) +-9 + 0 = -9 (110111) +-9 + 1 = -8 (111000) +-9 + 2 = -7 (111001) +-9 + 3 = -6 (111010) +-9 + 4 = -5 (111011) +-9 + 5 = -4 (111100) +-9 + 6 = -3 (111101) +-9 + 7 = -2 (111110) +-9 + 8 = -1 (111111) +-9 + 9 = 0 (000000) +-9 + 10 = 1 (000001) +-9 + 11 = 2 (000010) +-9 + 12 = 3 (000011) +-9 + 13 = 4 (000100) +-9 + 14 = 5 (000101) +-9 + 15 = 6 (000110) +-9 + 16 = 7 (000111) +-9 + 17 = 8 (001000) +-9 + 18 = 9 (001001) +-9 + 19 = 10 (001010) +-9 + 20 = 11 (001011) +-9 + 21 = 12 (001100) +-9 + 22 = 13 (001101) +-9 + 23 = 14 (001110) +-9 + 24 = 15 (001111) +-9 + 25 = 16 (010000) +-9 + 26 = 17 (010001) +-9 + 27 = 18 (010010) +-9 + 28 = 19 (010011) +-9 + 29 = 20 (010100) +-9 + 30 = 21 (010101) +-9 + 31 = 22 (010110) +-9 + -32 = 23 (010111) +-9 + -31 = 24 (011000) +-9 + -30 = 25 (011001) +-9 + -29 = 26 (011010) +-9 + -28 = 27 (011011) +-9 + -27 = 28 (011100) +-9 + -26 = 29 (011101) +-9 + -25 = 30 (011110) +-9 + -24 = 31 (011111) +-9 + -23 = -32 (100000) +-9 + -22 = -31 (100001) +-9 + -21 = -30 (100010) +-9 + -20 = -29 (100011) +-9 + -19 = -28 (100100) +-9 + -18 = -27 (100101) +-9 + -17 = -26 (100110) +-9 + -16 = -25 (100111) +-9 + -15 = -24 (101000) +-9 + -14 = -23 (101001) +-9 + -13 = -22 (101010) +-9 + -12 = -21 (101011) +-9 + -11 = -20 (101100) +-9 + -10 = -19 (101101) +-9 + -9 = -18 (101110) +-9 + -8 = -17 (101111) +-9 + -7 = -16 (110000) +-9 + -6 = -15 (110001) +-9 + -5 = -14 (110010) +-9 + -4 = -13 (110011) +-9 + -3 = -12 (110100) +-9 + -2 = -11 (110101) +-9 + -1 = -10 (110110) +-8 + 0 = -8 (111000) +-8 + 1 = -7 (111001) +-8 + 2 = -6 (111010) +-8 + 3 = -5 (111011) +-8 + 4 = -4 (111100) +-8 + 5 = -3 (111101) +-8 + 6 = -2 (111110) +-8 + 7 = -1 (111111) +-8 + 8 = 0 (000000) +-8 + 9 = 1 (000001) +-8 + 10 = 2 (000010) +-8 + 11 = 3 (000011) +-8 + 12 = 4 (000100) +-8 + 13 = 5 (000101) +-8 + 14 = 6 (000110) +-8 + 15 = 7 (000111) +-8 + 16 = 8 (001000) +-8 + 17 = 9 (001001) +-8 + 18 = 10 (001010) +-8 + 19 = 11 (001011) +-8 + 20 = 12 (001100) +-8 + 21 = 13 (001101) +-8 + 22 = 14 (001110) +-8 + 23 = 15 (001111) +-8 + 24 = 16 (010000) +-8 + 25 = 17 (010001) +-8 + 26 = 18 (010010) +-8 + 27 = 19 (010011) +-8 + 28 = 20 (010100) +-8 + 29 = 21 (010101) +-8 + 30 = 22 (010110) +-8 + 31 = 23 (010111) +-8 + -32 = 24 (011000) +-8 + -31 = 25 (011001) +-8 + -30 = 26 (011010) +-8 + -29 = 27 (011011) +-8 + -28 = 28 (011100) +-8 + -27 = 29 (011101) +-8 + -26 = 30 (011110) +-8 + -25 = 31 (011111) +-8 + -24 = -32 (100000) +-8 + -23 = -31 (100001) +-8 + -22 = -30 (100010) +-8 + -21 = -29 (100011) +-8 + -20 = -28 (100100) +-8 + -19 = -27 (100101) +-8 + -18 = -26 (100110) +-8 + -17 = -25 (100111) +-8 + -16 = -24 (101000) +-8 + -15 = -23 (101001) +-8 + -14 = -22 (101010) +-8 + -13 = -21 (101011) +-8 + -12 = -20 (101100) +-8 + -11 = -19 (101101) +-8 + -10 = -18 (101110) +-8 + -9 = -17 (101111) +-8 + -8 = -16 (110000) +-8 + -7 = -15 (110001) +-8 + -6 = -14 (110010) +-8 + -5 = -13 (110011) +-8 + -4 = -12 (110100) +-8 + -3 = -11 (110101) +-8 + -2 = -10 (110110) +-8 + -1 = -9 (110111) +-7 + 0 = -7 (111001) +-7 + 1 = -6 (111010) +-7 + 2 = -5 (111011) +-7 + 3 = -4 (111100) +-7 + 4 = -3 (111101) +-7 + 5 = -2 (111110) +-7 + 6 = -1 (111111) +-7 + 7 = 0 (000000) +-7 + 8 = 1 (000001) +-7 + 9 = 2 (000010) +-7 + 10 = 3 (000011) +-7 + 11 = 4 (000100) +-7 + 12 = 5 (000101) +-7 + 13 = 6 (000110) +-7 + 14 = 7 (000111) +-7 + 15 = 8 (001000) +-7 + 16 = 9 (001001) +-7 + 17 = 10 (001010) +-7 + 18 = 11 (001011) +-7 + 19 = 12 (001100) +-7 + 20 = 13 (001101) +-7 + 21 = 14 (001110) +-7 + 22 = 15 (001111) +-7 + 23 = 16 (010000) +-7 + 24 = 17 (010001) +-7 + 25 = 18 (010010) +-7 + 26 = 19 (010011) +-7 + 27 = 20 (010100) +-7 + 28 = 21 (010101) +-7 + 29 = 22 (010110) +-7 + 30 = 23 (010111) +-7 + 31 = 24 (011000) +-7 + -32 = 25 (011001) +-7 + -31 = 26 (011010) +-7 + -30 = 27 (011011) +-7 + -29 = 28 (011100) +-7 + -28 = 29 (011101) +-7 + -27 = 30 (011110) +-7 + -26 = 31 (011111) +-7 + -25 = -32 (100000) +-7 + -24 = -31 (100001) +-7 + -23 = -30 (100010) +-7 + -22 = -29 (100011) +-7 + -21 = -28 (100100) +-7 + -20 = -27 (100101) +-7 + -19 = -26 (100110) +-7 + -18 = -25 (100111) +-7 + -17 = -24 (101000) +-7 + -16 = -23 (101001) +-7 + -15 = -22 (101010) +-7 + -14 = -21 (101011) +-7 + -13 = -20 (101100) +-7 + -12 = -19 (101101) +-7 + -11 = -18 (101110) +-7 + -10 = -17 (101111) +-7 + -9 = -16 (110000) +-7 + -8 = -15 (110001) +-7 + -7 = -14 (110010) +-7 + -6 = -13 (110011) +-7 + -5 = -12 (110100) +-7 + -4 = -11 (110101) +-7 + -3 = -10 (110110) +-7 + -2 = -9 (110111) +-7 + -1 = -8 (111000) +-6 + 0 = -6 (111010) +-6 + 1 = -5 (111011) +-6 + 2 = -4 (111100) +-6 + 3 = -3 (111101) +-6 + 4 = -2 (111110) +-6 + 5 = -1 (111111) +-6 + 6 = 0 (000000) +-6 + 7 = 1 (000001) +-6 + 8 = 2 (000010) +-6 + 9 = 3 (000011) +-6 + 10 = 4 (000100) +-6 + 11 = 5 (000101) +-6 + 12 = 6 (000110) +-6 + 13 = 7 (000111) +-6 + 14 = 8 (001000) +-6 + 15 = 9 (001001) +-6 + 16 = 10 (001010) +-6 + 17 = 11 (001011) +-6 + 18 = 12 (001100) +-6 + 19 = 13 (001101) +-6 + 20 = 14 (001110) +-6 + 21 = 15 (001111) +-6 + 22 = 16 (010000) +-6 + 23 = 17 (010001) +-6 + 24 = 18 (010010) +-6 + 25 = 19 (010011) +-6 + 26 = 20 (010100) +-6 + 27 = 21 (010101) +-6 + 28 = 22 (010110) +-6 + 29 = 23 (010111) +-6 + 30 = 24 (011000) +-6 + 31 = 25 (011001) +-6 + -32 = 26 (011010) +-6 + -31 = 27 (011011) +-6 + -30 = 28 (011100) +-6 + -29 = 29 (011101) +-6 + -28 = 30 (011110) +-6 + -27 = 31 (011111) +-6 + -26 = -32 (100000) +-6 + -25 = -31 (100001) +-6 + -24 = -30 (100010) +-6 + -23 = -29 (100011) +-6 + -22 = -28 (100100) +-6 + -21 = -27 (100101) +-6 + -20 = -26 (100110) +-6 + -19 = -25 (100111) +-6 + -18 = -24 (101000) +-6 + -17 = -23 (101001) +-6 + -16 = -22 (101010) +-6 + -15 = -21 (101011) +-6 + -14 = -20 (101100) +-6 + -13 = -19 (101101) +-6 + -12 = -18 (101110) +-6 + -11 = -17 (101111) +-6 + -10 = -16 (110000) +-6 + -9 = -15 (110001) +-6 + -8 = -14 (110010) +-6 + -7 = -13 (110011) +-6 + -6 = -12 (110100) +-6 + -5 = -11 (110101) +-6 + -4 = -10 (110110) +-6 + -3 = -9 (110111) +-6 + -2 = -8 (111000) +-6 + -1 = -7 (111001) +-5 + 0 = -5 (111011) +-5 + 1 = -4 (111100) +-5 + 2 = -3 (111101) +-5 + 3 = -2 (111110) +-5 + 4 = -1 (111111) +-5 + 5 = 0 (000000) +-5 + 6 = 1 (000001) +-5 + 7 = 2 (000010) +-5 + 8 = 3 (000011) +-5 + 9 = 4 (000100) +-5 + 10 = 5 (000101) +-5 + 11 = 6 (000110) +-5 + 12 = 7 (000111) +-5 + 13 = 8 (001000) +-5 + 14 = 9 (001001) +-5 + 15 = 10 (001010) +-5 + 16 = 11 (001011) +-5 + 17 = 12 (001100) +-5 + 18 = 13 (001101) +-5 + 19 = 14 (001110) +-5 + 20 = 15 (001111) +-5 + 21 = 16 (010000) +-5 + 22 = 17 (010001) +-5 + 23 = 18 (010010) +-5 + 24 = 19 (010011) +-5 + 25 = 20 (010100) +-5 + 26 = 21 (010101) +-5 + 27 = 22 (010110) +-5 + 28 = 23 (010111) +-5 + 29 = 24 (011000) +-5 + 30 = 25 (011001) +-5 + 31 = 26 (011010) +-5 + -32 = 27 (011011) +-5 + -31 = 28 (011100) +-5 + -30 = 29 (011101) +-5 + -29 = 30 (011110) +-5 + -28 = 31 (011111) +-5 + -27 = -32 (100000) +-5 + -26 = -31 (100001) +-5 + -25 = -30 (100010) +-5 + -24 = -29 (100011) +-5 + -23 = -28 (100100) +-5 + -22 = -27 (100101) +-5 + -21 = -26 (100110) +-5 + -20 = -25 (100111) +-5 + -19 = -24 (101000) +-5 + -18 = -23 (101001) +-5 + -17 = -22 (101010) +-5 + -16 = -21 (101011) +-5 + -15 = -20 (101100) +-5 + -14 = -19 (101101) +-5 + -13 = -18 (101110) +-5 + -12 = -17 (101111) +-5 + -11 = -16 (110000) +-5 + -10 = -15 (110001) +-5 + -9 = -14 (110010) +-5 + -8 = -13 (110011) +-5 + -7 = -12 (110100) +-5 + -6 = -11 (110101) +-5 + -5 = -10 (110110) +-5 + -4 = -9 (110111) +-5 + -3 = -8 (111000) +-5 + -2 = -7 (111001) +-5 + -1 = -6 (111010) +-4 + 0 = -4 (111100) +-4 + 1 = -3 (111101) +-4 + 2 = -2 (111110) +-4 + 3 = -1 (111111) +-4 + 4 = 0 (000000) +-4 + 5 = 1 (000001) +-4 + 6 = 2 (000010) +-4 + 7 = 3 (000011) +-4 + 8 = 4 (000100) +-4 + 9 = 5 (000101) +-4 + 10 = 6 (000110) +-4 + 11 = 7 (000111) +-4 + 12 = 8 (001000) +-4 + 13 = 9 (001001) +-4 + 14 = 10 (001010) +-4 + 15 = 11 (001011) +-4 + 16 = 12 (001100) +-4 + 17 = 13 (001101) +-4 + 18 = 14 (001110) +-4 + 19 = 15 (001111) +-4 + 20 = 16 (010000) +-4 + 21 = 17 (010001) +-4 + 22 = 18 (010010) +-4 + 23 = 19 (010011) +-4 + 24 = 20 (010100) +-4 + 25 = 21 (010101) +-4 + 26 = 22 (010110) +-4 + 27 = 23 (010111) +-4 + 28 = 24 (011000) +-4 + 29 = 25 (011001) +-4 + 30 = 26 (011010) +-4 + 31 = 27 (011011) +-4 + -32 = 28 (011100) +-4 + -31 = 29 (011101) +-4 + -30 = 30 (011110) +-4 + -29 = 31 (011111) +-4 + -28 = -32 (100000) +-4 + -27 = -31 (100001) +-4 + -26 = -30 (100010) +-4 + -25 = -29 (100011) +-4 + -24 = -28 (100100) +-4 + -23 = -27 (100101) +-4 + -22 = -26 (100110) +-4 + -21 = -25 (100111) +-4 + -20 = -24 (101000) +-4 + -19 = -23 (101001) +-4 + -18 = -22 (101010) +-4 + -17 = -21 (101011) +-4 + -16 = -20 (101100) +-4 + -15 = -19 (101101) +-4 + -14 = -18 (101110) +-4 + -13 = -17 (101111) +-4 + -12 = -16 (110000) +-4 + -11 = -15 (110001) +-4 + -10 = -14 (110010) +-4 + -9 = -13 (110011) +-4 + -8 = -12 (110100) +-4 + -7 = -11 (110101) +-4 + -6 = -10 (110110) +-4 + -5 = -9 (110111) +-4 + -4 = -8 (111000) +-4 + -3 = -7 (111001) +-4 + -2 = -6 (111010) +-4 + -1 = -5 (111011) +-3 + 0 = -3 (111101) +-3 + 1 = -2 (111110) +-3 + 2 = -1 (111111) +-3 + 3 = 0 (000000) +-3 + 4 = 1 (000001) +-3 + 5 = 2 (000010) +-3 + 6 = 3 (000011) +-3 + 7 = 4 (000100) +-3 + 8 = 5 (000101) +-3 + 9 = 6 (000110) +-3 + 10 = 7 (000111) +-3 + 11 = 8 (001000) +-3 + 12 = 9 (001001) +-3 + 13 = 10 (001010) +-3 + 14 = 11 (001011) +-3 + 15 = 12 (001100) +-3 + 16 = 13 (001101) +-3 + 17 = 14 (001110) +-3 + 18 = 15 (001111) +-3 + 19 = 16 (010000) +-3 + 20 = 17 (010001) +-3 + 21 = 18 (010010) +-3 + 22 = 19 (010011) +-3 + 23 = 20 (010100) +-3 + 24 = 21 (010101) +-3 + 25 = 22 (010110) +-3 + 26 = 23 (010111) +-3 + 27 = 24 (011000) +-3 + 28 = 25 (011001) +-3 + 29 = 26 (011010) +-3 + 30 = 27 (011011) +-3 + 31 = 28 (011100) +-3 + -32 = 29 (011101) +-3 + -31 = 30 (011110) +-3 + -30 = 31 (011111) +-3 + -29 = -32 (100000) +-3 + -28 = -31 (100001) +-3 + -27 = -30 (100010) +-3 + -26 = -29 (100011) +-3 + -25 = -28 (100100) +-3 + -24 = -27 (100101) +-3 + -23 = -26 (100110) +-3 + -22 = -25 (100111) +-3 + -21 = -24 (101000) +-3 + -20 = -23 (101001) +-3 + -19 = -22 (101010) +-3 + -18 = -21 (101011) +-3 + -17 = -20 (101100) +-3 + -16 = -19 (101101) +-3 + -15 = -18 (101110) +-3 + -14 = -17 (101111) +-3 + -13 = -16 (110000) +-3 + -12 = -15 (110001) +-3 + -11 = -14 (110010) +-3 + -10 = -13 (110011) +-3 + -9 = -12 (110100) +-3 + -8 = -11 (110101) +-3 + -7 = -10 (110110) +-3 + -6 = -9 (110111) +-3 + -5 = -8 (111000) +-3 + -4 = -7 (111001) +-3 + -3 = -6 (111010) +-3 + -2 = -5 (111011) +-3 + -1 = -4 (111100) +-2 + 0 = -2 (111110) +-2 + 1 = -1 (111111) +-2 + 2 = 0 (000000) +-2 + 3 = 1 (000001) +-2 + 4 = 2 (000010) +-2 + 5 = 3 (000011) +-2 + 6 = 4 (000100) +-2 + 7 = 5 (000101) +-2 + 8 = 6 (000110) +-2 + 9 = 7 (000111) +-2 + 10 = 8 (001000) +-2 + 11 = 9 (001001) +-2 + 12 = 10 (001010) +-2 + 13 = 11 (001011) +-2 + 14 = 12 (001100) +-2 + 15 = 13 (001101) +-2 + 16 = 14 (001110) +-2 + 17 = 15 (001111) +-2 + 18 = 16 (010000) +-2 + 19 = 17 (010001) +-2 + 20 = 18 (010010) +-2 + 21 = 19 (010011) +-2 + 22 = 20 (010100) +-2 + 23 = 21 (010101) +-2 + 24 = 22 (010110) +-2 + 25 = 23 (010111) +-2 + 26 = 24 (011000) +-2 + 27 = 25 (011001) +-2 + 28 = 26 (011010) +-2 + 29 = 27 (011011) +-2 + 30 = 28 (011100) +-2 + 31 = 29 (011101) +-2 + -32 = 30 (011110) +-2 + -31 = 31 (011111) +-2 + -30 = -32 (100000) +-2 + -29 = -31 (100001) +-2 + -28 = -30 (100010) +-2 + -27 = -29 (100011) +-2 + -26 = -28 (100100) +-2 + -25 = -27 (100101) +-2 + -24 = -26 (100110) +-2 + -23 = -25 (100111) +-2 + -22 = -24 (101000) +-2 + -21 = -23 (101001) +-2 + -20 = -22 (101010) +-2 + -19 = -21 (101011) +-2 + -18 = -20 (101100) +-2 + -17 = -19 (101101) +-2 + -16 = -18 (101110) +-2 + -15 = -17 (101111) +-2 + -14 = -16 (110000) +-2 + -13 = -15 (110001) +-2 + -12 = -14 (110010) +-2 + -11 = -13 (110011) +-2 + -10 = -12 (110100) +-2 + -9 = -11 (110101) +-2 + -8 = -10 (110110) +-2 + -7 = -9 (110111) +-2 + -6 = -8 (111000) +-2 + -5 = -7 (111001) +-2 + -4 = -6 (111010) +-2 + -3 = -5 (111011) +-2 + -2 = -4 (111100) +-2 + -1 = -3 (111101) +-1 + 0 = -1 (111111) +-1 + 1 = 0 (000000) +-1 + 2 = 1 (000001) +-1 + 3 = 2 (000010) +-1 + 4 = 3 (000011) +-1 + 5 = 4 (000100) +-1 + 6 = 5 (000101) +-1 + 7 = 6 (000110) +-1 + 8 = 7 (000111) +-1 + 9 = 8 (001000) +-1 + 10 = 9 (001001) +-1 + 11 = 10 (001010) +-1 + 12 = 11 (001011) +-1 + 13 = 12 (001100) +-1 + 14 = 13 (001101) +-1 + 15 = 14 (001110) +-1 + 16 = 15 (001111) +-1 + 17 = 16 (010000) +-1 + 18 = 17 (010001) +-1 + 19 = 18 (010010) +-1 + 20 = 19 (010011) +-1 + 21 = 20 (010100) +-1 + 22 = 21 (010101) +-1 + 23 = 22 (010110) +-1 + 24 = 23 (010111) +-1 + 25 = 24 (011000) +-1 + 26 = 25 (011001) +-1 + 27 = 26 (011010) +-1 + 28 = 27 (011011) +-1 + 29 = 28 (011100) +-1 + 30 = 29 (011101) +-1 + 31 = 30 (011110) +-1 + -32 = 31 (011111) +-1 + -31 = -32 (100000) +-1 + -30 = -31 (100001) +-1 + -29 = -30 (100010) +-1 + -28 = -29 (100011) +-1 + -27 = -28 (100100) +-1 + -26 = -27 (100101) +-1 + -25 = -26 (100110) +-1 + -24 = -25 (100111) +-1 + -23 = -24 (101000) +-1 + -22 = -23 (101001) +-1 + -21 = -22 (101010) +-1 + -20 = -21 (101011) +-1 + -19 = -20 (101100) +-1 + -18 = -19 (101101) +-1 + -17 = -18 (101110) +-1 + -16 = -17 (101111) +-1 + -15 = -16 (110000) +-1 + -14 = -15 (110001) +-1 + -13 = -14 (110010) +-1 + -12 = -13 (110011) +-1 + -11 = -12 (110100) +-1 + -10 = -11 (110101) +-1 + -9 = -10 (110110) +-1 + -8 = -9 (110111) +-1 + -7 = -8 (111000) +-1 + -6 = -7 (111001) +-1 + -5 = -6 (111010) +-1 + -4 = -5 (111011) +-1 + -3 = -4 (111100) +-1 + -2 = -3 (111101) +-1 + -1 = -2 (111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/lost_carry.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/lost_carry.f new file mode 100644 index 000000000..e5ebe3a3b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/lost_carry.f @@ -0,0 +1,3 @@ +lost_carry/datawidth.cpp +lost_carry/stimgen.cpp +lost_carry/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/main.cpp new file mode 100644 index 000000000..3191d0641 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 6-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 6; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector in1 ("in1"); + signal_bool_vector in2 ("in2"); + signal_bool_vector result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/stimgen.h new file mode 100644 index 000000000..0a0e9900d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/lost_carry/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& result; + // Outputs + signal_bool_vector& in1; + signal_bool_vector& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& RESULT, + signal_bool_vector& IN1, + signal_bool_vector& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/common.h new file mode 100644 index 000000000..0eb606b60 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; +typedef sc_signal > signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/datawidth.cpp new file mode 100644 index 000000000..25913d4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_signed tmp_a (in1_width); + sc_signed tmp_b (in2_width); + sc_signed tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/datawidth.h new file mode 100644 index 000000000..618250503 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector7& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector7& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/golden/promote.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/golden/promote.log new file mode 100644 index 000000000..293408127 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/golden/promote.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + -32 = -32 (1100000) +0 + -31 = -31 (1100001) +0 + -30 = -30 (1100010) +0 + -29 = -29 (1100011) +0 + -28 = -28 (1100100) +0 + -27 = -27 (1100101) +0 + -26 = -26 (1100110) +0 + -25 = -25 (1100111) +0 + -24 = -24 (1101000) +0 + -23 = -23 (1101001) +0 + -22 = -22 (1101010) +0 + -21 = -21 (1101011) +0 + -20 = -20 (1101100) +0 + -19 = -19 (1101101) +0 + -18 = -18 (1101110) +0 + -17 = -17 (1101111) +0 + -16 = -16 (1110000) +0 + -15 = -15 (1110001) +0 + -14 = -14 (1110010) +0 + -13 = -13 (1110011) +0 + -12 = -12 (1110100) +0 + -11 = -11 (1110101) +0 + -10 = -10 (1110110) +0 + -9 = -9 (1110111) +0 + -8 = -8 (1111000) +0 + -7 = -7 (1111001) +0 + -6 = -6 (1111010) +0 + -5 = -5 (1111011) +0 + -4 = -4 (1111100) +0 + -3 = -3 (1111101) +0 + -2 = -2 (1111110) +0 + -1 = -1 (1111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + -32 = -31 (1100001) +1 + -31 = -30 (1100010) +1 + -30 = -29 (1100011) +1 + -29 = -28 (1100100) +1 + -28 = -27 (1100101) +1 + -27 = -26 (1100110) +1 + -26 = -25 (1100111) +1 + -25 = -24 (1101000) +1 + -24 = -23 (1101001) +1 + -23 = -22 (1101010) +1 + -22 = -21 (1101011) +1 + -21 = -20 (1101100) +1 + -20 = -19 (1101101) +1 + -19 = -18 (1101110) +1 + -18 = -17 (1101111) +1 + -17 = -16 (1110000) +1 + -16 = -15 (1110001) +1 + -15 = -14 (1110010) +1 + -14 = -13 (1110011) +1 + -13 = -12 (1110100) +1 + -12 = -11 (1110101) +1 + -11 = -10 (1110110) +1 + -10 = -9 (1110111) +1 + -9 = -8 (1111000) +1 + -8 = -7 (1111001) +1 + -7 = -6 (1111010) +1 + -6 = -5 (1111011) +1 + -5 = -4 (1111100) +1 + -4 = -3 (1111101) +1 + -3 = -2 (1111110) +1 + -2 = -1 (1111111) +1 + -1 = 0 (0000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + -32 = -30 (1100010) +2 + -31 = -29 (1100011) +2 + -30 = -28 (1100100) +2 + -29 = -27 (1100101) +2 + -28 = -26 (1100110) +2 + -27 = -25 (1100111) +2 + -26 = -24 (1101000) +2 + -25 = -23 (1101001) +2 + -24 = -22 (1101010) +2 + -23 = -21 (1101011) +2 + -22 = -20 (1101100) +2 + -21 = -19 (1101101) +2 + -20 = -18 (1101110) +2 + -19 = -17 (1101111) +2 + -18 = -16 (1110000) +2 + -17 = -15 (1110001) +2 + -16 = -14 (1110010) +2 + -15 = -13 (1110011) +2 + -14 = -12 (1110100) +2 + -13 = -11 (1110101) +2 + -12 = -10 (1110110) +2 + -11 = -9 (1110111) +2 + -10 = -8 (1111000) +2 + -9 = -7 (1111001) +2 + -8 = -6 (1111010) +2 + -7 = -5 (1111011) +2 + -6 = -4 (1111100) +2 + -5 = -3 (1111101) +2 + -4 = -2 (1111110) +2 + -3 = -1 (1111111) +2 + -2 = 0 (0000000) +2 + -1 = 1 (0000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + -32 = -29 (1100011) +3 + -31 = -28 (1100100) +3 + -30 = -27 (1100101) +3 + -29 = -26 (1100110) +3 + -28 = -25 (1100111) +3 + -27 = -24 (1101000) +3 + -26 = -23 (1101001) +3 + -25 = -22 (1101010) +3 + -24 = -21 (1101011) +3 + -23 = -20 (1101100) +3 + -22 = -19 (1101101) +3 + -21 = -18 (1101110) +3 + -20 = -17 (1101111) +3 + -19 = -16 (1110000) +3 + -18 = -15 (1110001) +3 + -17 = -14 (1110010) +3 + -16 = -13 (1110011) +3 + -15 = -12 (1110100) +3 + -14 = -11 (1110101) +3 + -13 = -10 (1110110) +3 + -12 = -9 (1110111) +3 + -11 = -8 (1111000) +3 + -10 = -7 (1111001) +3 + -9 = -6 (1111010) +3 + -8 = -5 (1111011) +3 + -7 = -4 (1111100) +3 + -6 = -3 (1111101) +3 + -5 = -2 (1111110) +3 + -4 = -1 (1111111) +3 + -3 = 0 (0000000) +3 + -2 = 1 (0000001) +3 + -1 = 2 (0000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + -32 = -28 (1100100) +4 + -31 = -27 (1100101) +4 + -30 = -26 (1100110) +4 + -29 = -25 (1100111) +4 + -28 = -24 (1101000) +4 + -27 = -23 (1101001) +4 + -26 = -22 (1101010) +4 + -25 = -21 (1101011) +4 + -24 = -20 (1101100) +4 + -23 = -19 (1101101) +4 + -22 = -18 (1101110) +4 + -21 = -17 (1101111) +4 + -20 = -16 (1110000) +4 + -19 = -15 (1110001) +4 + -18 = -14 (1110010) +4 + -17 = -13 (1110011) +4 + -16 = -12 (1110100) +4 + -15 = -11 (1110101) +4 + -14 = -10 (1110110) +4 + -13 = -9 (1110111) +4 + -12 = -8 (1111000) +4 + -11 = -7 (1111001) +4 + -10 = -6 (1111010) +4 + -9 = -5 (1111011) +4 + -8 = -4 (1111100) +4 + -7 = -3 (1111101) +4 + -6 = -2 (1111110) +4 + -5 = -1 (1111111) +4 + -4 = 0 (0000000) +4 + -3 = 1 (0000001) +4 + -2 = 2 (0000010) +4 + -1 = 3 (0000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + -32 = -27 (1100101) +5 + -31 = -26 (1100110) +5 + -30 = -25 (1100111) +5 + -29 = -24 (1101000) +5 + -28 = -23 (1101001) +5 + -27 = -22 (1101010) +5 + -26 = -21 (1101011) +5 + -25 = -20 (1101100) +5 + -24 = -19 (1101101) +5 + -23 = -18 (1101110) +5 + -22 = -17 (1101111) +5 + -21 = -16 (1110000) +5 + -20 = -15 (1110001) +5 + -19 = -14 (1110010) +5 + -18 = -13 (1110011) +5 + -17 = -12 (1110100) +5 + -16 = -11 (1110101) +5 + -15 = -10 (1110110) +5 + -14 = -9 (1110111) +5 + -13 = -8 (1111000) +5 + -12 = -7 (1111001) +5 + -11 = -6 (1111010) +5 + -10 = -5 (1111011) +5 + -9 = -4 (1111100) +5 + -8 = -3 (1111101) +5 + -7 = -2 (1111110) +5 + -6 = -1 (1111111) +5 + -5 = 0 (0000000) +5 + -4 = 1 (0000001) +5 + -3 = 2 (0000010) +5 + -2 = 3 (0000011) +5 + -1 = 4 (0000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + -32 = -26 (1100110) +6 + -31 = -25 (1100111) +6 + -30 = -24 (1101000) +6 + -29 = -23 (1101001) +6 + -28 = -22 (1101010) +6 + -27 = -21 (1101011) +6 + -26 = -20 (1101100) +6 + -25 = -19 (1101101) +6 + -24 = -18 (1101110) +6 + -23 = -17 (1101111) +6 + -22 = -16 (1110000) +6 + -21 = -15 (1110001) +6 + -20 = -14 (1110010) +6 + -19 = -13 (1110011) +6 + -18 = -12 (1110100) +6 + -17 = -11 (1110101) +6 + -16 = -10 (1110110) +6 + -15 = -9 (1110111) +6 + -14 = -8 (1111000) +6 + -13 = -7 (1111001) +6 + -12 = -6 (1111010) +6 + -11 = -5 (1111011) +6 + -10 = -4 (1111100) +6 + -9 = -3 (1111101) +6 + -8 = -2 (1111110) +6 + -7 = -1 (1111111) +6 + -6 = 0 (0000000) +6 + -5 = 1 (0000001) +6 + -4 = 2 (0000010) +6 + -3 = 3 (0000011) +6 + -2 = 4 (0000100) +6 + -1 = 5 (0000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + -32 = -25 (1100111) +7 + -31 = -24 (1101000) +7 + -30 = -23 (1101001) +7 + -29 = -22 (1101010) +7 + -28 = -21 (1101011) +7 + -27 = -20 (1101100) +7 + -26 = -19 (1101101) +7 + -25 = -18 (1101110) +7 + -24 = -17 (1101111) +7 + -23 = -16 (1110000) +7 + -22 = -15 (1110001) +7 + -21 = -14 (1110010) +7 + -20 = -13 (1110011) +7 + -19 = -12 (1110100) +7 + -18 = -11 (1110101) +7 + -17 = -10 (1110110) +7 + -16 = -9 (1110111) +7 + -15 = -8 (1111000) +7 + -14 = -7 (1111001) +7 + -13 = -6 (1111010) +7 + -12 = -5 (1111011) +7 + -11 = -4 (1111100) +7 + -10 = -3 (1111101) +7 + -9 = -2 (1111110) +7 + -8 = -1 (1111111) +7 + -7 = 0 (0000000) +7 + -6 = 1 (0000001) +7 + -5 = 2 (0000010) +7 + -4 = 3 (0000011) +7 + -3 = 4 (0000100) +7 + -2 = 5 (0000101) +7 + -1 = 6 (0000110) +-8 + 0 = -8 (1111000) +-8 + 1 = -7 (1111001) +-8 + 2 = -6 (1111010) +-8 + 3 = -5 (1111011) +-8 + 4 = -4 (1111100) +-8 + 5 = -3 (1111101) +-8 + 6 = -2 (1111110) +-8 + 7 = -1 (1111111) +-8 + 8 = 0 (0000000) +-8 + 9 = 1 (0000001) +-8 + 10 = 2 (0000010) +-8 + 11 = 3 (0000011) +-8 + 12 = 4 (0000100) +-8 + 13 = 5 (0000101) +-8 + 14 = 6 (0000110) +-8 + 15 = 7 (0000111) +-8 + 16 = 8 (0001000) +-8 + 17 = 9 (0001001) +-8 + 18 = 10 (0001010) +-8 + 19 = 11 (0001011) +-8 + 20 = 12 (0001100) +-8 + 21 = 13 (0001101) +-8 + 22 = 14 (0001110) +-8 + 23 = 15 (0001111) +-8 + 24 = 16 (0010000) +-8 + 25 = 17 (0010001) +-8 + 26 = 18 (0010010) +-8 + 27 = 19 (0010011) +-8 + 28 = 20 (0010100) +-8 + 29 = 21 (0010101) +-8 + 30 = 22 (0010110) +-8 + 31 = 23 (0010111) +-8 + -32 = -40 (1011000) +-8 + -31 = -39 (1011001) +-8 + -30 = -38 (1011010) +-8 + -29 = -37 (1011011) +-8 + -28 = -36 (1011100) +-8 + -27 = -35 (1011101) +-8 + -26 = -34 (1011110) +-8 + -25 = -33 (1011111) +-8 + -24 = -32 (1100000) +-8 + -23 = -31 (1100001) +-8 + -22 = -30 (1100010) +-8 + -21 = -29 (1100011) +-8 + -20 = -28 (1100100) +-8 + -19 = -27 (1100101) +-8 + -18 = -26 (1100110) +-8 + -17 = -25 (1100111) +-8 + -16 = -24 (1101000) +-8 + -15 = -23 (1101001) +-8 + -14 = -22 (1101010) +-8 + -13 = -21 (1101011) +-8 + -12 = -20 (1101100) +-8 + -11 = -19 (1101101) +-8 + -10 = -18 (1101110) +-8 + -9 = -17 (1101111) +-8 + -8 = -16 (1110000) +-8 + -7 = -15 (1110001) +-8 + -6 = -14 (1110010) +-8 + -5 = -13 (1110011) +-8 + -4 = -12 (1110100) +-8 + -3 = -11 (1110101) +-8 + -2 = -10 (1110110) +-8 + -1 = -9 (1110111) +-7 + 0 = -7 (1111001) +-7 + 1 = -6 (1111010) +-7 + 2 = -5 (1111011) +-7 + 3 = -4 (1111100) +-7 + 4 = -3 (1111101) +-7 + 5 = -2 (1111110) +-7 + 6 = -1 (1111111) +-7 + 7 = 0 (0000000) +-7 + 8 = 1 (0000001) +-7 + 9 = 2 (0000010) +-7 + 10 = 3 (0000011) +-7 + 11 = 4 (0000100) +-7 + 12 = 5 (0000101) +-7 + 13 = 6 (0000110) +-7 + 14 = 7 (0000111) +-7 + 15 = 8 (0001000) +-7 + 16 = 9 (0001001) +-7 + 17 = 10 (0001010) +-7 + 18 = 11 (0001011) +-7 + 19 = 12 (0001100) +-7 + 20 = 13 (0001101) +-7 + 21 = 14 (0001110) +-7 + 22 = 15 (0001111) +-7 + 23 = 16 (0010000) +-7 + 24 = 17 (0010001) +-7 + 25 = 18 (0010010) +-7 + 26 = 19 (0010011) +-7 + 27 = 20 (0010100) +-7 + 28 = 21 (0010101) +-7 + 29 = 22 (0010110) +-7 + 30 = 23 (0010111) +-7 + 31 = 24 (0011000) +-7 + -32 = -39 (1011001) +-7 + -31 = -38 (1011010) +-7 + -30 = -37 (1011011) +-7 + -29 = -36 (1011100) +-7 + -28 = -35 (1011101) +-7 + -27 = -34 (1011110) +-7 + -26 = -33 (1011111) +-7 + -25 = -32 (1100000) +-7 + -24 = -31 (1100001) +-7 + -23 = -30 (1100010) +-7 + -22 = -29 (1100011) +-7 + -21 = -28 (1100100) +-7 + -20 = -27 (1100101) +-7 + -19 = -26 (1100110) +-7 + -18 = -25 (1100111) +-7 + -17 = -24 (1101000) +-7 + -16 = -23 (1101001) +-7 + -15 = -22 (1101010) +-7 + -14 = -21 (1101011) +-7 + -13 = -20 (1101100) +-7 + -12 = -19 (1101101) +-7 + -11 = -18 (1101110) +-7 + -10 = -17 (1101111) +-7 + -9 = -16 (1110000) +-7 + -8 = -15 (1110001) +-7 + -7 = -14 (1110010) +-7 + -6 = -13 (1110011) +-7 + -5 = -12 (1110100) +-7 + -4 = -11 (1110101) +-7 + -3 = -10 (1110110) +-7 + -2 = -9 (1110111) +-7 + -1 = -8 (1111000) +-6 + 0 = -6 (1111010) +-6 + 1 = -5 (1111011) +-6 + 2 = -4 (1111100) +-6 + 3 = -3 (1111101) +-6 + 4 = -2 (1111110) +-6 + 5 = -1 (1111111) +-6 + 6 = 0 (0000000) +-6 + 7 = 1 (0000001) +-6 + 8 = 2 (0000010) +-6 + 9 = 3 (0000011) +-6 + 10 = 4 (0000100) +-6 + 11 = 5 (0000101) +-6 + 12 = 6 (0000110) +-6 + 13 = 7 (0000111) +-6 + 14 = 8 (0001000) +-6 + 15 = 9 (0001001) +-6 + 16 = 10 (0001010) +-6 + 17 = 11 (0001011) +-6 + 18 = 12 (0001100) +-6 + 19 = 13 (0001101) +-6 + 20 = 14 (0001110) +-6 + 21 = 15 (0001111) +-6 + 22 = 16 (0010000) +-6 + 23 = 17 (0010001) +-6 + 24 = 18 (0010010) +-6 + 25 = 19 (0010011) +-6 + 26 = 20 (0010100) +-6 + 27 = 21 (0010101) +-6 + 28 = 22 (0010110) +-6 + 29 = 23 (0010111) +-6 + 30 = 24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + -16 = -22 (1101010) +-6 + -15 = -21 (1101011) +-6 + -14 = -20 (1101100) +-6 + -13 = -19 (1101101) +-6 + -12 = -18 (1101110) +-6 + -11 = -17 (1101111) +-6 + -10 = -16 (1110000) +-6 + -9 = -15 (1110001) +-6 + -8 = -14 (1110010) +-6 + -7 = -13 (1110011) +-6 + -6 = -12 (1110100) +-6 + -5 = -11 (1110101) +-6 + -4 = -10 (1110110) +-6 + -3 = -9 (1110111) +-6 + -2 = -8 (1111000) +-6 + -1 = -7 (1111001) +-5 + 0 = -5 (1111011) +-5 + 1 = -4 (1111100) +-5 + 2 = -3 (1111101) +-5 + 3 = -2 (1111110) +-5 + 4 = -1 (1111111) +-5 + 5 = 0 (0000000) +-5 + 6 = 1 (0000001) +-5 + 7 = 2 (0000010) +-5 + 8 = 3 (0000011) +-5 + 9 = 4 (0000100) +-5 + 10 = 5 (0000101) +-5 + 11 = 6 (0000110) +-5 + 12 = 7 (0000111) +-5 + 13 = 8 (0001000) +-5 + 14 = 9 (0001001) +-5 + 15 = 10 (0001010) +-5 + 16 = 11 (0001011) +-5 + 17 = 12 (0001100) +-5 + 18 = 13 (0001101) +-5 + 19 = 14 (0001110) +-5 + 20 = 15 (0001111) +-5 + 21 = 16 (0010000) +-5 + 22 = 17 (0010001) +-5 + 23 = 18 (0010010) +-5 + 24 = 19 (0010011) +-5 + 25 = 20 (0010100) +-5 + 26 = 21 (0010101) +-5 + 27 = 22 (0010110) +-5 + 28 = 23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 + 1 = -3 (1111101) +-4 + 2 = -2 (1111110) +-4 + 3 = -1 (1111111) +-4 + 4 = 0 (0000000) +-4 + 5 = 1 (0000001) +-4 + 6 = 2 (0000010) +-4 + 7 = 3 (0000011) +-4 + 8 = 4 (0000100) +-4 + 9 = 5 (0000101) +-4 + 10 = 6 (0000110) +-4 + 11 = 7 (0000111) +-4 + 12 = 8 (0001000) +-4 + 13 = 9 (0001001) +-4 + 14 = 10 (0001010) +-4 + 15 = 11 (0001011) +-4 + 16 = 12 (0001100) +-4 + 17 = 13 (0001101) +-4 + 18 = 14 (0001110) +-4 + 19 = 15 (0001111) +-4 + 20 = 16 (0010000) +-4 + 21 = 17 (0010001) +-4 + 22 = 18 (0010010) +-4 + 23 = 19 (0010011) +-4 + 24 = 20 (0010100) +-4 + 25 = 21 (0010101) +-4 + 26 = 22 (0010110) +-4 + 27 = 23 (0010111) +-4 + 28 = 24 (0011000) +-4 + 29 = 25 (0011001) +-4 + 30 = 26 (0011010) +-4 + 31 = 27 (0011011) +-4 + -32 = -36 (1011100) +-4 + -31 = -35 (1011101) +-4 + -30 = -34 (1011110) +-4 + -29 = -33 (1011111) +-4 + -28 = -32 (1100000) +-4 + -27 = -31 (1100001) +-4 + -26 = -30 (1100010) +-4 + -25 = -29 (1100011) +-4 + -24 = -28 (1100100) +-4 + -23 = -27 (1100101) +-4 + -22 = -26 (1100110) +-4 + -21 = -25 (1100111) +-4 + -20 = -24 (1101000) +-4 + -19 = -23 (1101001) +-4 + -18 = -22 (1101010) +-4 + -17 = -21 (1101011) +-4 + -16 = -20 (1101100) +-4 + -15 = -19 (1101101) +-4 + -14 = -18 (1101110) +-4 + -13 = -17 (1101111) +-4 + -12 = -16 (1110000) +-4 + -11 = -15 (1110001) +-4 + -10 = -14 (1110010) +-4 + -9 = -13 (1110011) +-4 + -8 = -12 (1110100) +-4 + -7 = -11 (1110101) +-4 + -6 = -10 (1110110) +-4 + -5 = -9 (1110111) +-4 + -4 = -8 (1111000) +-4 + -3 = -7 (1111001) +-4 + -2 = -6 (1111010) +-4 + -1 = -5 (1111011) +-3 + 0 = -3 (1111101) +-3 + 1 = -2 (1111110) +-3 + 2 = -1 (1111111) +-3 + 3 = 0 (0000000) +-3 + 4 = 1 (0000001) +-3 + 5 = 2 (0000010) +-3 + 6 = 3 (0000011) +-3 + 7 = 4 (0000100) +-3 + 8 = 5 (0000101) +-3 + 9 = 6 (0000110) +-3 + 10 = 7 (0000111) +-3 + 11 = 8 (0001000) +-3 + 12 = 9 (0001001) +-3 + 13 = 10 (0001010) +-3 + 14 = 11 (0001011) +-3 + 15 = 12 (0001100) +-3 + 16 = 13 (0001101) +-3 + 17 = 14 (0001110) +-3 + 18 = 15 (0001111) +-3 + 19 = 16 (0010000) +-3 + 20 = 17 (0010001) +-3 + 21 = 18 (0010010) +-3 + 22 = 19 (0010011) +-3 + 23 = 20 (0010100) +-3 + 24 = 21 (0010101) +-3 + 25 = 22 (0010110) +-3 + 26 = 23 (0010111) +-3 + 27 = 24 (0011000) +-3 + 28 = 25 (0011001) +-3 + 29 = 26 (0011010) +-3 + 30 = 27 (0011011) +-3 + 31 = 28 (0011100) +-3 + -32 = -35 (1011101) +-3 + -31 = -34 (1011110) +-3 + -30 = -33 (1011111) +-3 + -29 = -32 (1100000) +-3 + -28 = -31 (1100001) +-3 + -27 = -30 (1100010) +-3 + -26 = -29 (1100011) +-3 + -25 = -28 (1100100) +-3 + -24 = -27 (1100101) +-3 + -23 = -26 (1100110) +-3 + -22 = -25 (1100111) +-3 + -21 = -24 (1101000) +-3 + -20 = -23 (1101001) +-3 + -19 = -22 (1101010) +-3 + -18 = -21 (1101011) +-3 + -17 = -20 (1101100) +-3 + -16 = -19 (1101101) +-3 + -15 = -18 (1101110) +-3 + -14 = -17 (1101111) +-3 + -13 = -16 (1110000) +-3 + -12 = -15 (1110001) +-3 + -11 = -14 (1110010) +-3 + -10 = -13 (1110011) +-3 + -9 = -12 (1110100) +-3 + -8 = -11 (1110101) +-3 + -7 = -10 (1110110) +-3 + -6 = -9 (1110111) +-3 + -5 = -8 (1111000) +-3 + -4 = -7 (1111001) +-3 + -3 = -6 (1111010) +-3 + -2 = -5 (1111011) +-3 + -1 = -4 (1111100) +-2 + 0 = -2 (1111110) +-2 + 1 = -1 (1111111) +-2 + 2 = 0 (0000000) +-2 + 3 = 1 (0000001) +-2 + 4 = 2 (0000010) +-2 + 5 = 3 (0000011) +-2 + 6 = 4 (0000100) +-2 + 7 = 5 (0000101) +-2 + 8 = 6 (0000110) +-2 + 9 = 7 (0000111) +-2 + 10 = 8 (0001000) +-2 + 11 = 9 (0001001) +-2 + 12 = 10 (0001010) +-2 + 13 = 11 (0001011) +-2 + 14 = 12 (0001100) +-2 + 15 = 13 (0001101) +-2 + 16 = 14 (0001110) +-2 + 17 = 15 (0001111) +-2 + 18 = 16 (0010000) +-2 + 19 = 17 (0010001) +-2 + 20 = 18 (0010010) +-2 + 21 = 19 (0010011) +-2 + 22 = 20 (0010100) +-2 + 23 = 21 (0010101) +-2 + 24 = 22 (0010110) +-2 + 25 = 23 (0010111) +-2 + 26 = 24 (0011000) +-2 + 27 = 25 (0011001) +-2 + 28 = 26 (0011010) +-2 + 29 = 27 (0011011) +-2 + 30 = 28 (0011100) +-2 + 31 = 29 (0011101) +-2 + -32 = -34 (1011110) +-2 + -31 = -33 (1011111) +-2 + -30 = -32 (1100000) +-2 + -29 = -31 (1100001) +-2 + -28 = -30 (1100010) +-2 + -27 = -29 (1100011) +-2 + -26 = -28 (1100100) +-2 + -25 = -27 (1100101) +-2 + -24 = -26 (1100110) +-2 + -23 = -25 (1100111) +-2 + -22 = -24 (1101000) +-2 + -21 = -23 (1101001) +-2 + -20 = -22 (1101010) +-2 + -19 = -21 (1101011) +-2 + -18 = -20 (1101100) +-2 + -17 = -19 (1101101) +-2 + -16 = -18 (1101110) +-2 + -15 = -17 (1101111) +-2 + -14 = -16 (1110000) +-2 + -13 = -15 (1110001) +-2 + -12 = -14 (1110010) +-2 + -11 = -13 (1110011) +-2 + -10 = -12 (1110100) +-2 + -9 = -11 (1110101) +-2 + -8 = -10 (1110110) +-2 + -7 = -9 (1110111) +-2 + -6 = -8 (1111000) +-2 + -5 = -7 (1111001) +-2 + -4 = -6 (1111010) +-2 + -3 = -5 (1111011) +-2 + -2 = -4 (1111100) +-2 + -1 = -3 (1111101) +-1 + 0 = -1 (1111111) +-1 + 1 = 0 (0000000) +-1 + 2 = 1 (0000001) +-1 + 3 = 2 (0000010) +-1 + 4 = 3 (0000011) +-1 + 5 = 4 (0000100) +-1 + 6 = 5 (0000101) +-1 + 7 = 6 (0000110) +-1 + 8 = 7 (0000111) +-1 + 9 = 8 (0001000) +-1 + 10 = 9 (0001001) +-1 + 11 = 10 (0001010) +-1 + 12 = 11 (0001011) +-1 + 13 = 12 (0001100) +-1 + 14 = 13 (0001101) +-1 + 15 = 14 (0001110) +-1 + 16 = 15 (0001111) +-1 + 17 = 16 (0010000) +-1 + 18 = 17 (0010001) +-1 + 19 = 18 (0010010) +-1 + 20 = 19 (0010011) +-1 + 21 = 20 (0010100) +-1 + 22 = 21 (0010101) +-1 + 23 = 22 (0010110) +-1 + 24 = 23 (0010111) +-1 + 25 = 24 (0011000) +-1 + 26 = 25 (0011001) +-1 + 27 = 26 (0011010) +-1 + 28 = 27 (0011011) +-1 + 29 = 28 (0011100) +-1 + 30 = 29 (0011101) +-1 + 31 = 30 (0011110) +-1 + -32 = -33 (1011111) +-1 + -31 = -32 (1100000) +-1 + -30 = -31 (1100001) +-1 + -29 = -30 (1100010) +-1 + -28 = -29 (1100011) +-1 + -27 = -28 (1100100) +-1 + -26 = -27 (1100101) +-1 + -25 = -26 (1100110) +-1 + -24 = -25 (1100111) +-1 + -23 = -24 (1101000) +-1 + -22 = -23 (1101001) +-1 + -21 = -22 (1101010) +-1 + -20 = -21 (1101011) +-1 + -19 = -20 (1101100) +-1 + -18 = -19 (1101101) +-1 + -17 = -18 (1101110) +-1 + -16 = -17 (1101111) +-1 + -15 = -16 (1110000) +-1 + -14 = -15 (1110001) +-1 + -13 = -14 (1110010) +-1 + -12 = -13 (1110011) +-1 + -11 = -12 (1110100) +-1 + -10 = -11 (1110101) +-1 + -9 = -10 (1110110) +-1 + -8 = -9 (1110111) +-1 + -7 = -8 (1111000) +-1 + -6 = -7 (1111001) +-1 + -5 = -6 (1111010) +-1 + -4 = -5 (1111011) +-1 + -3 = -4 (1111100) +-1 + -2 = -3 (1111101) +-1 + -1 = -2 (1111110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + -32 = -32 (1100000) +0 + -31 = -31 (1100001) +0 + -30 = -30 (1100010) +0 + -29 = -29 (1100011) +0 + -28 = -28 (1100100) +0 + -27 = -27 (1100101) +0 + -26 = -26 (1100110) +0 + -25 = -25 (1100111) +0 + -24 = -24 (1101000) +0 + -23 = -23 (1101001) +0 + -22 = -22 (1101010) +0 + -21 = -21 (1101011) +0 + -20 = -20 (1101100) +0 + -19 = -19 (1101101) +0 + -18 = -18 (1101110) +0 + -17 = -17 (1101111) +0 + -16 = -16 (1110000) +0 + -15 = -15 (1110001) +0 + -14 = -14 (1110010) +0 + -13 = -13 (1110011) +0 + -12 = -12 (1110100) +0 + -11 = -11 (1110101) +0 + -10 = -10 (1110110) +0 + -9 = -9 (1110111) +0 + -8 = -8 (1111000) +0 + -7 = -7 (1111001) +0 + -6 = -6 (1111010) +0 + -5 = -5 (1111011) +0 + -4 = -4 (1111100) +0 + -3 = -3 (1111101) +0 + -2 = -2 (1111110) +0 + -1 = -1 (1111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + -32 = -31 (1100001) +1 + -31 = -30 (1100010) +1 + -30 = -29 (1100011) +1 + -29 = -28 (1100100) +1 + -28 = -27 (1100101) +1 + -27 = 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16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + -32 = -30 (1100010) +2 + -31 = -29 (1100011) +2 + -30 = -28 (1100100) +2 + -29 = -27 (1100101) +2 + -28 = -26 (1100110) +2 + -27 = -25 (1100111) +2 + -26 = -24 (1101000) +2 + -25 = -23 (1101001) +2 + -24 = -22 (1101010) +2 + -23 = -21 (1101011) +2 + -22 = -20 (1101100) +2 + -21 = -19 (1101101) +2 + -20 = -18 (1101110) +2 + -19 = -17 (1101111) +2 + -18 = -16 (1110000) +2 + -17 = -15 (1110001) +2 + -16 = -14 (1110010) +2 + -15 = -13 (1110011) +2 + -14 = -12 (1110100) +2 + -13 = -11 (1110101) +2 + -12 = -10 (1110110) +2 + -11 = -9 (1110111) +2 + -10 = -8 (1111000) +2 + -9 = -7 (1111001) +2 + -8 = -6 (1111010) +2 + -7 = -5 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(0000100) +-6 + 11 = 5 (0000101) +-6 + 12 = 6 (0000110) +-6 + 13 = 7 (0000111) +-6 + 14 = 8 (0001000) +-6 + 15 = 9 (0001001) +-6 + 16 = 10 (0001010) +-6 + 17 = 11 (0001011) +-6 + 18 = 12 (0001100) +-6 + 19 = 13 (0001101) +-6 + 20 = 14 (0001110) +-6 + 21 = 15 (0001111) +-6 + 22 = 16 (0010000) +-6 + 23 = 17 (0010001) +-6 + 24 = 18 (0010010) +-6 + 25 = 19 (0010011) +-6 + 26 = 20 (0010100) +-6 + 27 = 21 (0010101) +-6 + 28 = 22 (0010110) +-6 + 29 = 23 (0010111) +-6 + 30 = 24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + -16 = -22 (1101010) +-6 + -15 = -21 (1101011) +-6 + -14 = -20 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23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 + 1 = -3 (1111101) +-4 + 2 = -2 (1111110) +-4 + 3 = -1 (1111111) +-4 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(0010011) +-3 + 23 = 20 (0010100) +-3 + 24 = 21 (0010101) +-3 + 25 = 22 (0010110) +-3 + 26 = 23 (0010111) +-3 + 27 = 24 (0011000) +-3 + 28 = 25 (0011001) +-3 + 29 = 26 (0011010) +-3 + 30 = 27 (0011011) +-3 + 31 = 28 (0011100) +-3 + -32 = -35 (1011101) +-3 + -31 = -34 (1011110) +-3 + -30 = -33 (1011111) +-3 + -29 = -32 (1100000) +-3 + -28 = -31 (1100001) +-3 + -27 = -30 (1100010) +-3 + -26 = -29 (1100011) +-3 + -25 = -28 (1100100) +-3 + -24 = -27 (1100101) +-3 + -23 = -26 (1100110) +-3 + -22 = -25 (1100111) +-3 + -21 = -24 (1101000) +-3 + -20 = -23 (1101001) +-3 + -19 = -22 (1101010) +-3 + -18 = -21 (1101011) +-3 + -17 = -20 (1101100) +-3 + -16 = -19 (1101101) +-3 + -15 = -18 (1101110) +-3 + -14 = -17 (1101111) +-3 + -13 = -16 (1110000) +-3 + -12 = -15 (1110001) +-3 + -11 = -14 (1110010) +-3 + -10 = -13 (1110011) +-3 + -9 = -12 (1110100) +-3 + -8 = -11 (1110101) +-3 + -7 = -10 (1110110) +-3 + -6 = -9 (1110111) +-3 + -5 = -8 (1111000) +-3 + -4 = -7 (1111001) +-3 + -3 = -6 (1111010) +-3 + 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+ 17 = 16 (0010000) +-1 + 18 = 17 (0010001) +-1 + 19 = 18 (0010010) +-1 + 20 = 19 (0010011) +-1 + 21 = 20 (0010100) +-1 + 22 = 21 (0010101) +-1 + 23 = 22 (0010110) +-1 + 24 = 23 (0010111) +-1 + 25 = 24 (0011000) +-1 + 26 = 25 (0011001) +-1 + 27 = 26 (0011010) +-1 + 28 = 27 (0011011) +-1 + 29 = 28 (0011100) +-1 + 30 = 29 (0011101) +-1 + 31 = 30 (0011110) +-1 + -32 = -33 (1011111) +-1 + -31 = -32 (1100000) +-1 + -30 = -31 (1100001) +-1 + -29 = -30 (1100010) +-1 + -28 = -29 (1100011) +-1 + -27 = -28 (1100100) +-1 + -26 = -27 (1100101) +-1 + -25 = -26 (1100110) +-1 + -24 = -25 (1100111) +-1 + -23 = -24 (1101000) +-1 + -22 = -23 (1101001) +-1 + -21 = -22 (1101010) +-1 + -20 = -21 (1101011) +-1 + -19 = -20 (1101100) +-1 + -18 = -19 (1101101) +-1 + -17 = -18 (1101110) +-1 + -16 = -17 (1101111) +-1 + -15 = -16 (1110000) +-1 + -14 = -15 (1110001) +-1 + -13 = -14 (1110010) +-1 + -12 = -13 (1110011) +-1 + -11 = -12 (1110100) +-1 + -10 = -11 (1110101) +-1 + -9 = -10 (1110110) +-1 + -8 = -9 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(0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + -32 = -31 (1100001) +1 + -31 = -30 (1100010) +1 + -30 = -29 (1100011) +1 + -29 = -28 (1100100) +1 + -28 = -27 (1100101) +1 + -27 = -26 (1100110) +1 + -26 = -25 (1100111) +1 + -25 = -24 (1101000) +1 + -24 = -23 (1101001) +1 + -23 = -22 (1101010) +1 + -22 = -21 (1101011) +1 + -21 = -20 (1101100) +1 + -20 = -19 (1101101) +1 + -19 = -18 (1101110) +1 + -18 = -17 (1101111) +1 + -17 = -16 (1110000) +1 + -16 = -15 (1110001) +1 + -15 = -14 (1110010) +1 + -14 = -13 (1110011) +1 + -13 = -12 (1110100) +1 + -12 = -11 (1110101) +1 + -11 = -10 (1110110) +1 + -10 = -9 (1110111) +1 + -9 = -8 (1111000) +1 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(0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + -32 = -29 (1100011) +3 + -31 = -28 (1100100) +3 + -30 = -27 (1100101) +3 + -29 = -26 (1100110) +3 + -28 = -25 (1100111) +3 + -27 = -24 (1101000) +3 + -26 = -23 (1101001) +3 + -25 = -22 (1101010) +3 + -24 = -21 (1101011) +3 + -23 = -20 (1101100) +3 + -22 = -19 (1101101) +3 + -21 = -18 (1101110) +3 + -20 = -17 (1101111) +3 + -19 = -16 (1110000) +3 + -18 = -15 (1110001) +3 + -17 = -14 (1110010) +3 + -16 = -13 (1110011) +3 + -15 = -12 (1110100) +3 + -14 = -11 (1110101) +3 + -13 = -10 (1110110) +3 + -12 = -9 (1110111) +3 + -11 = -8 (1111000) +3 + -10 = -7 (1111001) +3 + -9 = -6 (1111010) +3 + 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22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + -32 = -25 (1100111) +7 + -31 = -24 (1101000) +7 + -30 = -23 (1101001) +7 + -29 = -22 (1101010) +7 + -28 = -21 (1101011) +7 + -27 = -20 (1101100) +7 + -26 = -19 (1101101) +7 + -25 = -18 (1101110) +7 + -24 = -17 (1101111) +7 + -23 = -16 (1110000) +7 + -22 = -15 (1110001) +7 + -21 = -14 (1110010) +7 + -20 = -13 (1110011) +7 + -19 = -12 (1110100) +7 + -18 = -11 (1110101) +7 + -17 = -10 (1110110) +7 + -16 = -9 (1110111) +7 + -15 = -8 (1111000) +7 + -14 = -7 (1111001) +7 + -13 = -6 (1111010) +7 + -12 = -5 (1111011) +7 + -11 = -4 (1111100) +7 + -10 = -3 (1111101) +7 + -9 = -2 (1111110) +7 + -8 = -1 (1111111) +7 + -7 = 0 (0000000) +7 + -6 = 1 (0000001) +7 + -5 = 2 (0000010) +7 + -4 = 3 (0000011) +7 + -3 = 4 (0000100) +7 + -2 = 5 (0000101) +7 + -1 = 6 (0000110) +-8 + 0 = -8 (1111000) +-8 + 1 = -7 (1111001) +-8 + 2 = -6 (1111010) +-8 + 3 = -5 (1111011) +-8 + 4 = -4 (1111100) +-8 + 5 = -3 (1111101) +-8 + 6 = -2 (1111110) +-8 + 7 = -1 (1111111) +-8 + 8 = 0 (0000000) +-8 + 9 = 1 (0000001) +-8 + 10 = 2 (0000010) +-8 + 11 = 3 (0000011) +-8 + 12 = 4 (0000100) +-8 + 13 = 5 (0000101) +-8 + 14 = 6 (0000110) +-8 + 15 = 7 (0000111) +-8 + 16 = 8 (0001000) +-8 + 17 = 9 (0001001) +-8 + 18 = 10 (0001010) +-8 + 19 = 11 (0001011) +-8 + 20 = 12 (0001100) +-8 + 21 = 13 (0001101) +-8 + 22 = 14 (0001110) +-8 + 23 = 15 (0001111) +-8 + 24 = 16 (0010000) +-8 + 25 = 17 (0010001) +-8 + 26 = 18 (0010010) +-8 + 27 = 19 (0010011) +-8 + 28 = 20 (0010100) +-8 + 29 = 21 (0010101) +-8 + 30 = 22 (0010110) +-8 + 31 = 23 (0010111) +-8 + -32 = -40 (1011000) +-8 + -31 = -39 (1011001) +-8 + -30 = -38 (1011010) +-8 + -29 = -37 (1011011) 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= 5 (0000101) +-7 + 13 = 6 (0000110) +-7 + 14 = 7 (0000111) +-7 + 15 = 8 (0001000) +-7 + 16 = 9 (0001001) +-7 + 17 = 10 (0001010) +-7 + 18 = 11 (0001011) +-7 + 19 = 12 (0001100) +-7 + 20 = 13 (0001101) +-7 + 21 = 14 (0001110) +-7 + 22 = 15 (0001111) +-7 + 23 = 16 (0010000) +-7 + 24 = 17 (0010001) +-7 + 25 = 18 (0010010) +-7 + 26 = 19 (0010011) +-7 + 27 = 20 (0010100) +-7 + 28 = 21 (0010101) +-7 + 29 = 22 (0010110) +-7 + 30 = 23 (0010111) +-7 + 31 = 24 (0011000) +-7 + -32 = -39 (1011001) +-7 + -31 = -38 (1011010) +-7 + -30 = -37 (1011011) +-7 + -29 = -36 (1011100) +-7 + -28 = -35 (1011101) +-7 + -27 = -34 (1011110) +-7 + -26 = -33 (1011111) +-7 + -25 = -32 (1100000) +-7 + -24 = -31 (1100001) +-7 + -23 = -30 (1100010) +-7 + -22 = -29 (1100011) +-7 + -21 = -28 (1100100) +-7 + -20 = -27 (1100101) +-7 + -19 = -26 (1100110) +-7 + -18 = -25 (1100111) +-7 + -17 = -24 (1101000) +-7 + -16 = -23 (1101001) +-7 + -15 = -22 (1101010) +-7 + -14 = -21 (1101011) +-7 + -13 = -20 (1101100) +-7 + -12 = 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24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + -16 = -22 (1101010) +-6 + -15 = -21 (1101011) +-6 + -14 = -20 (1101100) +-6 + -13 = -19 (1101101) +-6 + -12 = -18 (1101110) +-6 + -11 = -17 (1101111) +-6 + -10 = -16 (1110000) +-6 + -9 = -15 (1110001) +-6 + -8 = -14 (1110010) +-6 + -7 = -13 (1110011) +-6 + -6 = -12 (1110100) +-6 + -5 = -11 (1110101) +-6 + -4 = -10 (1110110) +-6 + -3 = -9 (1110111) +-6 + -2 = -8 (1111000) +-6 + -1 = -7 (1111001) +-5 + 0 = -5 (1111011) +-5 + 1 = -4 (1111100) +-5 + 2 = -3 (1111101) +-5 + 3 = -2 (1111110) +-5 + 4 = -1 (1111111) +-5 + 5 = 0 (0000000) +-5 + 6 = 1 (0000001) +-5 + 7 = 2 (0000010) +-5 + 8 = 3 (0000011) +-5 + 9 = 4 (0000100) +-5 + 10 = 5 (0000101) +-5 + 11 = 6 (0000110) +-5 + 12 = 7 (0000111) +-5 + 13 = 8 (0001000) +-5 + 14 = 9 (0001001) +-5 + 15 = 10 (0001010) +-5 + 16 = 11 (0001011) +-5 + 17 = 12 (0001100) +-5 + 18 = 13 (0001101) +-5 + 19 = 14 (0001110) +-5 + 20 = 15 (0001111) +-5 + 21 = 16 (0010000) +-5 + 22 = 17 (0010001) +-5 + 23 = 18 (0010010) +-5 + 24 = 19 (0010011) +-5 + 25 = 20 (0010100) +-5 + 26 = 21 (0010101) +-5 + 27 = 22 (0010110) +-5 + 28 = 23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 + 1 = -3 (1111101) +-4 + 2 = -2 (1111110) +-4 + 3 = -1 (1111111) +-4 + 4 = 0 (0000000) +-4 + 5 = 1 (0000001) +-4 + 6 = 2 (0000010) +-4 + 7 = 3 (0000011) +-4 + 8 = 4 (0000100) +-4 + 9 = 5 (0000101) +-4 + 10 = 6 (0000110) +-4 + 11 = 7 (0000111) +-4 + 12 = 8 (0001000) +-4 + 13 = 9 (0001001) +-4 + 14 = 10 (0001010) +-4 + 15 = 11 (0001011) +-4 + 16 = 12 (0001100) +-4 + 17 = 13 (0001101) +-4 + 18 = 14 (0001110) +-4 + 19 = 15 (0001111) +-4 + 20 = 16 (0010000) +-4 + 21 = 17 (0010001) +-4 + 22 = 18 (0010010) +-4 + 23 = 19 (0010011) +-4 + 24 = 20 (0010100) +-4 + 25 = 21 (0010101) +-4 + 26 = 22 (0010110) +-4 + 27 = 23 (0010111) +-4 + 28 = 24 (0011000) +-4 + 29 = 25 (0011001) +-4 + 30 = 26 (0011010) +-4 + 31 = 27 (0011011) +-4 + -32 = -36 (1011100) +-4 + -31 = -35 (1011101) +-4 + -30 = -34 (1011110) +-4 + -29 = -33 (1011111) +-4 + -28 = -32 (1100000) +-4 + -27 = -31 (1100001) +-4 + -26 = -30 (1100010) +-4 + -25 = -29 (1100011) +-4 + -24 = -28 (1100100) +-4 + -23 = -27 (1100101) +-4 + -22 = -26 (1100110) +-4 + -21 = -25 (1100111) +-4 + -20 = -24 (1101000) +-4 + -19 = -23 (1101001) +-4 + -18 = -22 (1101010) +-4 + -17 = -21 (1101011) +-4 + -16 = -20 (1101100) +-4 + -15 = -19 (1101101) +-4 + -14 = -18 (1101110) +-4 + -13 = -17 (1101111) +-4 + -12 = -16 (1110000) +-4 + -11 = -15 (1110001) +-4 + -10 = -14 (1110010) +-4 + -9 = -13 (1110011) +-4 + -8 = -12 (1110100) +-4 + -7 = -11 (1110101) +-4 + -6 = -10 (1110110) +-4 + -5 = -9 (1110111) +-4 + -4 = -8 (1111000) +-4 + -3 = -7 (1111001) +-4 + -2 = -6 (1111010) +-4 + -1 = -5 (1111011) +-3 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(0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + -32 = -28 (1100100) +4 + -31 = -27 (1100101) +4 + -30 = -26 (1100110) +4 + -29 = -25 (1100111) +4 + -28 = -24 (1101000) +4 + -27 = -23 (1101001) +4 + -26 = -22 (1101010) +4 + -25 = -21 (1101011) +4 + -24 = -20 (1101100) +4 + -23 = -19 (1101101) +4 + -22 = -18 (1101110) +4 + -21 = -17 (1101111) +4 + -20 = -16 (1110000) +4 + -19 = -15 (1110001) +4 + -18 = -14 (1110010) +4 + -17 = -13 (1110011) +4 + -16 = -12 (1110100) +4 + -15 = -11 (1110101) +4 + -14 = -10 (1110110) +4 + -13 = -9 (1110111) +4 + -12 = -8 (1111000) +4 + -11 = -7 (1111001) +4 + -10 = -6 (1111010) +4 + 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+6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + -32 = -26 (1100110) +6 + -31 = -25 (1100111) +6 + -30 = -24 (1101000) +6 + -29 = -23 (1101001) +6 + -28 = -22 (1101010) +6 + -27 = -21 (1101011) +6 + -26 = -20 (1101100) +6 + -25 = -19 (1101101) +6 + -24 = -18 (1101110) +6 + -23 = -17 (1101111) +6 + -22 = -16 (1110000) +6 + -21 = -15 (1110001) +6 + -20 = -14 (1110010) +6 + -19 = -13 (1110011) +6 + -18 = -12 (1110100) +6 + -17 = -11 (1110101) +6 + -16 = -10 (1110110) +6 + -15 = -9 (1110111) +6 + -14 = -8 (1111000) +6 + -13 = -7 (1111001) +6 + -12 = -6 (1111010) +6 + -11 = -5 (1111011) +6 + -10 = -4 (1111100) +6 + -9 = -3 (1111101) +6 + -8 = -2 (1111110) +6 + -7 = -1 (1111111) +6 + -6 = 0 (0000000) +6 + -5 = 1 (0000001) +6 + -4 = 2 (0000010) +6 + -3 = 3 (0000011) +6 + -2 = 4 (0000100) +6 + -1 = 5 (0000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + -32 = -25 (1100111) +7 + -31 = -24 (1101000) +7 + -30 = -23 (1101001) +7 + -29 = -22 (1101010) +7 + -28 = -21 (1101011) +7 + -27 = -20 (1101100) +7 + -26 = -19 (1101101) +7 + -25 = -18 (1101110) +7 + -24 = -17 (1101111) +7 + -23 = -16 (1110000) +7 + -22 = -15 (1110001) +7 + -21 = -14 (1110010) +7 + -20 = -13 (1110011) +7 + -19 = -12 (1110100) +7 + -18 = -11 (1110101) +7 + -17 = -10 (1110110) +7 + -16 = -9 (1110111) +7 + -15 = -8 (1111000) +7 + -14 = -7 (1111001) +7 + -13 = -6 (1111010) +7 + -12 = -5 (1111011) +7 + -11 = -4 (1111100) +7 + -10 = -3 (1111101) +7 + -9 = -2 (1111110) +7 + -8 = -1 (1111111) +7 + -7 = 0 (0000000) +7 + -6 = 1 (0000001) +7 + -5 = 2 (0000010) +7 + -4 = 3 (0000011) +7 + -3 = 4 (0000100) +7 + -2 = 5 (0000101) +7 + -1 = 6 (0000110) +-8 + 0 = -8 (1111000) +-8 + 1 = -7 (1111001) +-8 + 2 = -6 (1111010) +-8 + 3 = -5 (1111011) +-8 + 4 = -4 (1111100) +-8 + 5 = -3 (1111101) +-8 + 6 = -2 (1111110) +-8 + 7 = -1 (1111111) +-8 + 8 = 0 (0000000) +-8 + 9 = 1 (0000001) +-8 + 10 = 2 (0000010) +-8 + 11 = 3 (0000011) +-8 + 12 = 4 (0000100) +-8 + 13 = 5 (0000101) +-8 + 14 = 6 (0000110) +-8 + 15 = 7 (0000111) +-8 + 16 = 8 (0001000) +-8 + 17 = 9 (0001001) +-8 + 18 = 10 (0001010) +-8 + 19 = 11 (0001011) +-8 + 20 = 12 (0001100) +-8 + 21 = 13 (0001101) +-8 + 22 = 14 (0001110) +-8 + 23 = 15 (0001111) +-8 + 24 = 16 (0010000) +-8 + 25 = 17 (0010001) +-8 + 26 = 18 (0010010) +-8 + 27 = 19 (0010011) +-8 + 28 = 20 (0010100) +-8 + 29 = 21 (0010101) +-8 + 30 = 22 (0010110) +-8 + 31 = 23 (0010111) +-8 + -32 = -40 (1011000) +-8 + -31 = -39 (1011001) +-8 + -30 = -38 (1011010) +-8 + -29 = -37 (1011011) +-8 + -28 = -36 (1011100) +-8 + -27 = -35 (1011101) +-8 + -26 = -34 (1011110) +-8 + -25 = -33 (1011111) +-8 + -24 = -32 (1100000) +-8 + -23 = -31 (1100001) +-8 + -22 = -30 (1100010) +-8 + -21 = -29 (1100011) +-8 + -20 = -28 (1100100) +-8 + -19 = -27 (1100101) +-8 + -18 = -26 (1100110) +-8 + -17 = -25 (1100111) +-8 + -16 = -24 (1101000) +-8 + -15 = -23 (1101001) +-8 + -14 = -22 (1101010) +-8 + -13 = -21 (1101011) +-8 + -12 = -20 (1101100) +-8 + -11 = -19 (1101101) +-8 + -10 = -18 (1101110) +-8 + -9 = -17 (1101111) +-8 + -8 = -16 (1110000) +-8 + -7 = -15 (1110001) +-8 + -6 = -14 (1110010) +-8 + -5 = -13 (1110011) +-8 + -4 = -12 (1110100) +-8 + -3 = -11 (1110101) +-8 + -2 = -10 (1110110) +-8 + -1 = -9 (1110111) +-7 + 0 = -7 (1111001) +-7 + 1 = -6 (1111010) +-7 + 2 = -5 (1111011) +-7 + 3 = -4 (1111100) +-7 + 4 = -3 (1111101) +-7 + 5 = -2 (1111110) +-7 + 6 = -1 (1111111) +-7 + 7 = 0 (0000000) +-7 + 8 = 1 (0000001) +-7 + 9 = 2 (0000010) +-7 + 10 = 3 (0000011) +-7 + 11 = 4 (0000100) +-7 + 12 = 5 (0000101) +-7 + 13 = 6 (0000110) +-7 + 14 = 7 (0000111) +-7 + 15 = 8 (0001000) +-7 + 16 = 9 (0001001) +-7 + 17 = 10 (0001010) +-7 + 18 = 11 (0001011) +-7 + 19 = 12 (0001100) +-7 + 20 = 13 (0001101) +-7 + 21 = 14 (0001110) +-7 + 22 = 15 (0001111) +-7 + 23 = 16 (0010000) +-7 + 24 = 17 (0010001) +-7 + 25 = 18 (0010010) +-7 + 26 = 19 (0010011) +-7 + 27 = 20 (0010100) +-7 + 28 = 21 (0010101) +-7 + 29 = 22 (0010110) +-7 + 30 = 23 (0010111) +-7 + 31 = 24 (0011000) +-7 + -32 = -39 (1011001) +-7 + -31 = -38 (1011010) +-7 + -30 = -37 (1011011) +-7 + -29 = -36 (1011100) +-7 + -28 = -35 (1011101) +-7 + -27 = -34 (1011110) +-7 + -26 = -33 (1011111) +-7 + -25 = -32 (1100000) +-7 + -24 = -31 (1100001) +-7 + -23 = -30 (1100010) +-7 + -22 = -29 (1100011) +-7 + -21 = -28 (1100100) +-7 + -20 = -27 (1100101) +-7 + -19 = -26 (1100110) +-7 + -18 = -25 (1100111) +-7 + -17 = -24 (1101000) +-7 + -16 = -23 (1101001) +-7 + -15 = -22 (1101010) +-7 + -14 = -21 (1101011) +-7 + -13 = -20 (1101100) +-7 + -12 = -19 (1101101) +-7 + -11 = -18 (1101110) +-7 + -10 = -17 (1101111) +-7 + -9 = -16 (1110000) +-7 + -8 = -15 (1110001) +-7 + -7 = -14 (1110010) +-7 + -6 = -13 (1110011) +-7 + -5 = -12 (1110100) +-7 + -4 = -11 (1110101) +-7 + -3 = -10 (1110110) +-7 + -2 = -9 (1110111) +-7 + -1 = -8 (1111000) +-6 + 0 = -6 (1111010) +-6 + 1 = -5 (1111011) +-6 + 2 = -4 (1111100) +-6 + 3 = -3 (1111101) +-6 + 4 = -2 (1111110) +-6 + 5 = -1 (1111111) +-6 + 6 = 0 (0000000) +-6 + 7 = 1 (0000001) +-6 + 8 = 2 (0000010) +-6 + 9 = 3 (0000011) +-6 + 10 = 4 (0000100) +-6 + 11 = 5 (0000101) +-6 + 12 = 6 (0000110) +-6 + 13 = 7 (0000111) +-6 + 14 = 8 (0001000) +-6 + 15 = 9 (0001001) +-6 + 16 = 10 (0001010) +-6 + 17 = 11 (0001011) +-6 + 18 = 12 (0001100) +-6 + 19 = 13 (0001101) +-6 + 20 = 14 (0001110) +-6 + 21 = 15 (0001111) +-6 + 22 = 16 (0010000) +-6 + 23 = 17 (0010001) +-6 + 24 = 18 (0010010) +-6 + 25 = 19 (0010011) +-6 + 26 = 20 (0010100) +-6 + 27 = 21 (0010101) +-6 + 28 = 22 (0010110) +-6 + 29 = 23 (0010111) +-6 + 30 = 24 (0011000) +-6 + 31 = 25 (0011001) +-6 + -32 = -38 (1011010) +-6 + -31 = -37 (1011011) +-6 + -30 = -36 (1011100) +-6 + -29 = -35 (1011101) +-6 + -28 = -34 (1011110) +-6 + -27 = -33 (1011111) +-6 + -26 = -32 (1100000) +-6 + -25 = -31 (1100001) +-6 + -24 = -30 (1100010) +-6 + -23 = -29 (1100011) +-6 + -22 = -28 (1100100) +-6 + -21 = -27 (1100101) +-6 + -20 = -26 (1100110) +-6 + -19 = -25 (1100111) +-6 + -18 = -24 (1101000) +-6 + -17 = -23 (1101001) +-6 + -16 = -22 (1101010) +-6 + -15 = -21 (1101011) +-6 + -14 = -20 (1101100) +-6 + -13 = -19 (1101101) +-6 + -12 = -18 (1101110) +-6 + -11 = -17 (1101111) +-6 + -10 = -16 (1110000) +-6 + -9 = -15 (1110001) +-6 + -8 = -14 (1110010) +-6 + -7 = -13 (1110011) +-6 + -6 = -12 (1110100) +-6 + -5 = -11 (1110101) +-6 + -4 = -10 (1110110) +-6 + -3 = -9 (1110111) +-6 + -2 = -8 (1111000) +-6 + -1 = -7 (1111001) +-5 + 0 = -5 (1111011) +-5 + 1 = -4 (1111100) +-5 + 2 = -3 (1111101) +-5 + 3 = -2 (1111110) +-5 + 4 = -1 (1111111) +-5 + 5 = 0 (0000000) +-5 + 6 = 1 (0000001) +-5 + 7 = 2 (0000010) +-5 + 8 = 3 (0000011) +-5 + 9 = 4 (0000100) +-5 + 10 = 5 (0000101) +-5 + 11 = 6 (0000110) +-5 + 12 = 7 (0000111) +-5 + 13 = 8 (0001000) +-5 + 14 = 9 (0001001) +-5 + 15 = 10 (0001010) +-5 + 16 = 11 (0001011) +-5 + 17 = 12 (0001100) +-5 + 18 = 13 (0001101) +-5 + 19 = 14 (0001110) +-5 + 20 = 15 (0001111) +-5 + 21 = 16 (0010000) +-5 + 22 = 17 (0010001) +-5 + 23 = 18 (0010010) +-5 + 24 = 19 (0010011) +-5 + 25 = 20 (0010100) +-5 + 26 = 21 (0010101) +-5 + 27 = 22 (0010110) +-5 + 28 = 23 (0010111) +-5 + 29 = 24 (0011000) +-5 + 30 = 25 (0011001) +-5 + 31 = 26 (0011010) +-5 + -32 = -37 (1011011) +-5 + -31 = -36 (1011100) +-5 + -30 = -35 (1011101) +-5 + -29 = -34 (1011110) +-5 + -28 = -33 (1011111) +-5 + -27 = -32 (1100000) +-5 + -26 = -31 (1100001) +-5 + -25 = -30 (1100010) +-5 + -24 = -29 (1100011) +-5 + -23 = -28 (1100100) +-5 + -22 = -27 (1100101) +-5 + -21 = -26 (1100110) +-5 + -20 = -25 (1100111) +-5 + -19 = -24 (1101000) +-5 + -18 = -23 (1101001) +-5 + -17 = -22 (1101010) +-5 + -16 = -21 (1101011) +-5 + -15 = -20 (1101100) +-5 + -14 = -19 (1101101) +-5 + -13 = -18 (1101110) +-5 + -12 = -17 (1101111) +-5 + -11 = -16 (1110000) +-5 + -10 = -15 (1110001) +-5 + -9 = -14 (1110010) +-5 + -8 = -13 (1110011) +-5 + -7 = -12 (1110100) +-5 + -6 = -11 (1110101) +-5 + -5 = -10 (1110110) +-5 + -4 = -9 (1110111) +-5 + -3 = -8 (1111000) +-5 + -2 = -7 (1111001) +-5 + -1 = -6 (1111010) +-4 + 0 = -4 (1111100) +-4 + 1 = -3 (1111101) +-4 + 2 = -2 (1111110) +-4 + 3 = -1 (1111111) +-4 + 4 = 0 (0000000) +-4 + 5 = 1 (0000001) +-4 + 6 = 2 (0000010) +-4 + 7 = 3 (0000011) +-4 + 8 = 4 (0000100) +-4 + 9 = 5 (0000101) +-4 + 10 = 6 (0000110) +-4 + 11 = 7 (0000111) +-4 + 12 = 8 (0001000) +-4 + 13 = 9 (0001001) +-4 + 14 = 10 (0001010) +-4 + 15 = 11 (0001011) +-4 + 16 = 12 (0001100) +-4 + 17 = 13 (0001101) +-4 + 18 = 14 (0001110) +-4 + 19 = 15 (0001111) +-4 + 20 = 16 (0010000) +-4 + 21 = 17 (0010001) +-4 + 22 = 18 (0010010) +-4 + 23 = 19 (0010011) +-4 + 24 = 20 (0010100) +-4 + 25 = 21 (0010101) +-4 + 26 = 22 (0010110) +-4 + 27 = 23 (0010111) +-4 + 28 = 24 (0011000) +-4 + 29 = 25 (0011001) +-4 + 30 = 26 (0011010) +-4 + 31 = 27 (0011011) +-4 + -32 = -36 (1011100) +-4 + -31 = -35 (1011101) +-4 + -30 = -34 (1011110) +-4 + -29 = -33 (1011111) +-4 + -28 = -32 (1100000) +-4 + -27 = -31 (1100001) +-4 + -26 = -30 (1100010) +-4 + -25 = -29 (1100011) +-4 + -24 = -28 (1100100) +-4 + -23 = -27 (1100101) +-4 + -22 = -26 (1100110) +-4 + -21 = -25 (1100111) +-4 + -20 = -24 (1101000) +-4 + -19 = -23 (1101001) +-4 + -18 = -22 (1101010) +-4 + -17 = -21 (1101011) +-4 + -16 = -20 (1101100) +-4 + -15 = -19 (1101101) +-4 + -14 = -18 (1101110) +-4 + -13 = -17 (1101111) +-4 + -12 = -16 (1110000) +-4 + -11 = -15 (1110001) +-4 + -10 = -14 (1110010) +-4 + -9 = -13 (1110011) +-4 + -8 = -12 (1110100) +-4 + -7 = -11 (1110101) +-4 + -6 = -10 (1110110) +-4 + -5 = -9 (1110111) +-4 + -4 = -8 (1111000) +-4 + -3 = -7 (1111001) +-4 + -2 = -6 (1111010) +-4 + -1 = -5 (1111011) +-3 + 0 = -3 (1111101) +-3 + 1 = -2 (1111110) +-3 + 2 = -1 (1111111) +-3 + 3 = 0 (0000000) +-3 + 4 = 1 (0000001) +-3 + 5 = 2 (0000010) +-3 + 6 = 3 (0000011) +-3 + 7 = 4 (0000100) +-3 + 8 = 5 (0000101) +-3 + 9 = 6 (0000110) +-3 + 10 = 7 (0000111) +-3 + 11 = 8 (0001000) +-3 + 12 = 9 (0001001) +-3 + 13 = 10 (0001010) +-3 + 14 = 11 (0001011) +-3 + 15 = 12 (0001100) +-3 + 16 = 13 (0001101) +-3 + 17 = 14 (0001110) +-3 + 18 = 15 (0001111) +-3 + 19 = 16 (0010000) +-3 + 20 = 17 (0010001) +-3 + 21 = 18 (0010010) +-3 + 22 = 19 (0010011) +-3 + 23 = 20 (0010100) +-3 + 24 = 21 (0010101) +-3 + 25 = 22 (0010110) +-3 + 26 = 23 (0010111) +-3 + 27 = 24 (0011000) +-3 + 28 = 25 (0011001) +-3 + 29 = 26 (0011010) +-3 + 30 = 27 (0011011) +-3 + 31 = 28 (0011100) +-3 + -32 = -35 (1011101) +-3 + -31 = -34 (1011110) +-3 + -30 = -33 (1011111) +-3 + -29 = -32 (1100000) +-3 + -28 = -31 (1100001) +-3 + -27 = -30 (1100010) +-3 + -26 = -29 (1100011) +-3 + -25 = -28 (1100100) +-3 + -24 = -27 (1100101) +-3 + -23 = -26 (1100110) +-3 + -22 = -25 (1100111) +-3 + -21 = -24 (1101000) +-3 + -20 = -23 (1101001) +-3 + -19 = -22 (1101010) +-3 + -18 = -21 (1101011) +-3 + -17 = -20 (1101100) +-3 + -16 = -19 (1101101) +-3 + -15 = -18 (1101110) +-3 + -14 = -17 (1101111) +-3 + -13 = -16 (1110000) +-3 + -12 = -15 (1110001) +-3 + -11 = -14 (1110010) +-3 + -10 = -13 (1110011) +-3 + -9 = -12 (1110100) +-3 + -8 = -11 (1110101) +-3 + -7 = -10 (1110110) +-3 + -6 = -9 (1110111) +-3 + -5 = -8 (1111000) +-3 + -4 = -7 (1111001) +-3 + -3 = -6 (1111010) +-3 + -2 = -5 (1111011) +-3 + -1 = -4 (1111100) +-2 + 0 = -2 (1111110) +-2 + 1 = -1 (1111111) +-2 + 2 = 0 (0000000) +-2 + 3 = 1 (0000001) +-2 + 4 = 2 (0000010) +-2 + 5 = 3 (0000011) +-2 + 6 = 4 (0000100) +-2 + 7 = 5 (0000101) +-2 + 8 = 6 (0000110) +-2 + 9 = 7 (0000111) +-2 + 10 = 8 (0001000) +-2 + 11 = 9 (0001001) +-2 + 12 = 10 (0001010) +-2 + 13 = 11 (0001011) +-2 + 14 = 12 (0001100) +-2 + 15 = 13 (0001101) +-2 + 16 = 14 (0001110) +-2 + 17 = 15 (0001111) +-2 + 18 = 16 (0010000) +-2 + 19 = 17 (0010001) +-2 + 20 = 18 (0010010) +-2 + 21 = 19 (0010011) +-2 + 22 = 20 (0010100) +-2 + 23 = 21 (0010101) +-2 + 24 = 22 (0010110) +-2 + 25 = 23 (0010111) +-2 + 26 = 24 (0011000) +-2 + 27 = 25 (0011001) +-2 + 28 = 26 (0011010) +-2 + 29 = 27 (0011011) +-2 + 30 = 28 (0011100) +-2 + 31 = 29 (0011101) +-2 + -32 = -34 (1011110) +-2 + -31 = -33 (1011111) +-2 + -30 = -32 (1100000) +-2 + -29 = -31 (1100001) +-2 + -28 = -30 (1100010) +-2 + -27 = -29 (1100011) +-2 + -26 = -28 (1100100) +-2 + -25 = -27 (1100101) +-2 + -24 = -26 (1100110) +-2 + -23 = -25 (1100111) +-2 + -22 = -24 (1101000) +-2 + -21 = -23 (1101001) +-2 + -20 = -22 (1101010) +-2 + -19 = -21 (1101011) +-2 + -18 = -20 (1101100) +-2 + -17 = -19 (1101101) +-2 + -16 = -18 (1101110) +-2 + -15 = -17 (1101111) +-2 + -14 = -16 (1110000) +-2 + -13 = -15 (1110001) +-2 + -12 = -14 (1110010) +-2 + -11 = -13 (1110011) +-2 + -10 = -12 (1110100) +-2 + -9 = -11 (1110101) +-2 + -8 = -10 (1110110) +-2 + -7 = -9 (1110111) +-2 + -6 = -8 (1111000) +-2 + -5 = -7 (1111001) +-2 + -4 = -6 (1111010) +-2 + -3 = -5 (1111011) +-2 + -2 = -4 (1111100) +-2 + -1 = -3 (1111101) +-1 + 0 = -1 (1111111) +-1 + 1 = 0 (0000000) +-1 + 2 = 1 (0000001) +-1 + 3 = 2 (0000010) +-1 + 4 = 3 (0000011) +-1 + 5 = 4 (0000100) +-1 + 6 = 5 (0000101) +-1 + 7 = 6 (0000110) +-1 + 8 = 7 (0000111) +-1 + 9 = 8 (0001000) +-1 + 10 = 9 (0001001) +-1 + 11 = 10 (0001010) +-1 + 12 = 11 (0001011) +-1 + 13 = 12 (0001100) +-1 + 14 = 13 (0001101) +-1 + 15 = 14 (0001110) +-1 + 16 = 15 (0001111) +-1 + 17 = 16 (0010000) +-1 + 18 = 17 (0010001) +-1 + 19 = 18 (0010010) +-1 + 20 = 19 (0010011) +-1 + 21 = 20 (0010100) +-1 + 22 = 21 (0010101) +-1 + 23 = 22 (0010110) +-1 + 24 = 23 (0010111) +-1 + 25 = 24 (0011000) +-1 + 26 = 25 (0011001) +-1 + 27 = 26 (0011010) +-1 + 28 = 27 (0011011) +-1 + 29 = 28 (0011100) +-1 + 30 = 29 (0011101) +-1 + 31 = 30 (0011110) +-1 + -32 = -33 (1011111) +-1 + -31 = -32 (1100000) +-1 + -30 = -31 (1100001) +-1 + -29 = -30 (1100010) +-1 + -28 = -29 (1100011) +-1 + -27 = -28 (1100100) +-1 + -26 = -27 (1100101) +-1 + -25 = -26 (1100110) +-1 + -24 = -25 (1100111) +-1 + -23 = -24 (1101000) +-1 + -22 = -23 (1101001) +-1 + -21 = -22 (1101010) +-1 + -20 = -21 (1101011) +-1 + -19 = -20 (1101100) +-1 + -18 = -19 (1101101) +-1 + -17 = -18 (1101110) +-1 + -16 = -17 (1101111) +-1 + -15 = -16 (1110000) +-1 + -14 = -15 (1110001) +-1 + -13 = -14 (1110010) +-1 + -12 = -13 (1110011) +-1 + -11 = -12 (1110100) +-1 + -10 = -11 (1110101) +-1 + -9 = -10 (1110110) +-1 + -8 = -9 (1110111) +-1 + -7 = -8 (1111000) +-1 + -6 = -7 (1111001) +-1 + -5 = -6 (1111010) +-1 + -4 = -5 (1111011) +-1 + -3 = -4 (1111100) +-1 + -2 = -3 (1111101) +-1 + -1 = -2 (1111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/main.cpp new file mode 100644 index 000000000..788364aa5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 7-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 7; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/promote.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/promote.f new file mode 100644 index 000000000..4f270dbe0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/promote.f @@ -0,0 +1,3 @@ +promote/datawidth.cpp +promote/stimgen.cpp +promote/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/stimgen.h new file mode 100644 index 000000000..723f5103f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector7& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector7& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/common.h new file mode 100644 index 000000000..8f3bbf59c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; +typedef sc_signal > signal_bool_vector9; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/datawidth.cpp new file mode 100644 index 000000000..25913d4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_signed tmp_a (in1_width); + sc_signed tmp_b (in2_width); + sc_signed tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/datawidth.h new file mode 100644 index 000000000..284757aeb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector9& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector9& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/golden/promote_extension.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/golden/promote_extension.log new file mode 100644 index 000000000..3290f802a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/golden/promote_extension.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + -32 = -32 (111100000) +0 + -31 = -31 (111100001) +0 + -30 = -30 (111100010) +0 + -29 = -29 (111100011) +0 + -28 = -28 (111100100) +0 + -27 = -27 (111100101) +0 + -26 = -26 (111100110) +0 + -25 = -25 (111100111) +0 + -24 = -24 (111101000) +0 + -23 = -23 (111101001) +0 + -22 = -22 (111101010) +0 + -21 = -21 (111101011) +0 + -20 = -20 (111101100) +0 + -19 = -19 (111101101) +0 + -18 = -18 (111101110) +0 + -17 = -17 (111101111) +0 + -16 = -16 (111110000) +0 + -15 = -15 (111110001) +0 + -14 = -14 (111110010) +0 + -13 = -13 (111110011) +0 + -12 = -12 (111110100) +0 + -11 = -11 (111110101) +0 + -10 = -10 (111110110) +0 + -9 = -9 (111110111) +0 + -8 = -8 (111111000) +0 + -7 = -7 (111111001) +0 + -6 = -6 (111111010) +0 + -5 = -5 (111111011) +0 + -4 = -4 (111111100) +0 + -3 = -3 (111111101) +0 + -2 = -2 (111111110) +0 + -1 = -1 (111111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + -32 = -31 (111100001) +1 + -31 = -30 (111100010) +1 + -30 = -29 (111100011) +1 + -29 = -28 (111100100) +1 + -28 = -27 (111100101) +1 + -27 = -26 (111100110) +1 + -26 = -25 (111100111) +1 + -25 = -24 (111101000) +1 + -24 = -23 (111101001) +1 + -23 = -22 (111101010) +1 + -22 = -21 (111101011) +1 + -21 = -20 (111101100) +1 + -20 = -19 (111101101) +1 + -19 = -18 (111101110) +1 + -18 = -17 (111101111) +1 + -17 = -16 (111110000) +1 + -16 = -15 (111110001) +1 + -15 = -14 (111110010) +1 + -14 = -13 (111110011) +1 + -13 = -12 (111110100) +1 + -12 = -11 (111110101) +1 + -11 = -10 (111110110) +1 + -10 = -9 (111110111) +1 + -9 = -8 (111111000) +1 + -8 = -7 (111111001) +1 + -7 = -6 (111111010) +1 + -6 = -5 (111111011) +1 + -5 = -4 (111111100) +1 + -4 = -3 (111111101) +1 + -3 = -2 (111111110) +1 + -2 = -1 (111111111) +1 + -1 = 0 (000000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + -32 = -30 (111100010) +2 + -31 = -29 (111100011) +2 + -30 = -28 (111100100) +2 + -29 = -27 (111100101) +2 + -28 = -26 (111100110) +2 + -27 = -25 (111100111) +2 + -26 = -24 (111101000) +2 + -25 = -23 (111101001) +2 + -24 = -22 (111101010) +2 + -23 = -21 (111101011) +2 + -22 = -20 (111101100) +2 + -21 = -19 (111101101) +2 + -20 = -18 (111101110) +2 + -19 = -17 (111101111) +2 + -18 = -16 (111110000) +2 + -17 = -15 (111110001) +2 + -16 = -14 (111110010) +2 + -15 = -13 (111110011) +2 + -14 = -12 (111110100) +2 + -13 = -11 (111110101) +2 + -12 = -10 (111110110) +2 + -11 = -9 (111110111) +2 + -10 = -8 (111111000) +2 + -9 = -7 (111111001) +2 + -8 = -6 (111111010) +2 + -7 = -5 (111111011) +2 + -6 = -4 (111111100) +2 + -5 = -3 (111111101) +2 + -4 = -2 (111111110) +2 + -3 = -1 (111111111) +2 + -2 = 0 (000000000) +2 + -1 = 1 (000000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + -32 = -29 (111100011) +3 + -31 = -28 (111100100) +3 + -30 = -27 (111100101) +3 + -29 = -26 (111100110) +3 + -28 = -25 (111100111) +3 + -27 = -24 (111101000) +3 + -26 = -23 (111101001) +3 + -25 = -22 (111101010) +3 + -24 = -21 (111101011) +3 + -23 = -20 (111101100) +3 + -22 = -19 (111101101) +3 + -21 = -18 (111101110) +3 + -20 = -17 (111101111) +3 + -19 = -16 (111110000) +3 + -18 = -15 (111110001) +3 + -17 = -14 (111110010) +3 + -16 = -13 (111110011) +3 + -15 = -12 (111110100) +3 + -14 = -11 (111110101) +3 + -13 = -10 (111110110) +3 + -12 = -9 (111110111) +3 + -11 = -8 (111111000) +3 + -10 = -7 (111111001) +3 + -9 = -6 (111111010) +3 + -8 = -5 (111111011) +3 + -7 = -4 (111111100) +3 + -6 = -3 (111111101) +3 + -5 = -2 (111111110) +3 + -4 = -1 (111111111) +3 + -3 = 0 (000000000) +3 + -2 = 1 (000000001) +3 + -1 = 2 (000000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + -32 = -28 (111100100) +4 + -31 = -27 (111100101) +4 + -30 = -26 (111100110) +4 + -29 = -25 (111100111) +4 + -28 = -24 (111101000) +4 + -27 = -23 (111101001) +4 + -26 = -22 (111101010) +4 + -25 = -21 (111101011) +4 + -24 = -20 (111101100) +4 + -23 = -19 (111101101) +4 + -22 = -18 (111101110) +4 + -21 = -17 (111101111) +4 + -20 = -16 (111110000) +4 + -19 = -15 (111110001) +4 + -18 = -14 (111110010) +4 + -17 = -13 (111110011) +4 + -16 = -12 (111110100) +4 + -15 = -11 (111110101) +4 + -14 = -10 (111110110) +4 + -13 = -9 (111110111) +4 + -12 = -8 (111111000) +4 + -11 = -7 (111111001) +4 + -10 = -6 (111111010) +4 + -9 = -5 (111111011) +4 + -8 = -4 (111111100) +4 + -7 = -3 (111111101) +4 + -6 = -2 (111111110) +4 + -5 = -1 (111111111) +4 + -4 = 0 (000000000) +4 + -3 = 1 (000000001) +4 + -2 = 2 (000000010) +4 + -1 = 3 (000000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + -32 = -27 (111100101) +5 + -31 = -26 (111100110) +5 + -30 = -25 (111100111) +5 + -29 = -24 (111101000) +5 + -28 = -23 (111101001) +5 + -27 = -22 (111101010) +5 + -26 = -21 (111101011) +5 + -25 = -20 (111101100) +5 + -24 = -19 (111101101) +5 + -23 = -18 (111101110) +5 + -22 = -17 (111101111) +5 + -21 = -16 (111110000) +5 + -20 = -15 (111110001) +5 + -19 = -14 (111110010) +5 + -18 = -13 (111110011) +5 + -17 = -12 (111110100) +5 + -16 = -11 (111110101) +5 + -15 = -10 (111110110) +5 + -14 = -9 (111110111) +5 + -13 = -8 (111111000) +5 + -12 = -7 (111111001) +5 + -11 = -6 (111111010) +5 + -10 = -5 (111111011) +5 + -9 = -4 (111111100) +5 + -8 = -3 (111111101) +5 + -7 = -2 (111111110) +5 + -6 = -1 (111111111) +5 + -5 = 0 (000000000) +5 + -4 = 1 (000000001) +5 + -3 = 2 (000000010) +5 + -2 = 3 (000000011) +5 + -1 = 4 (000000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + -32 = -26 (111100110) +6 + -31 = -25 (111100111) +6 + -30 = -24 (111101000) +6 + -29 = -23 (111101001) +6 + -28 = -22 (111101010) +6 + -27 = -21 (111101011) +6 + -26 = -20 (111101100) +6 + -25 = -19 (111101101) +6 + -24 = -18 (111101110) +6 + -23 = -17 (111101111) +6 + -22 = -16 (111110000) +6 + -21 = -15 (111110001) +6 + -20 = -14 (111110010) +6 + -19 = -13 (111110011) +6 + -18 = -12 (111110100) +6 + -17 = -11 (111110101) +6 + -16 = -10 (111110110) +6 + -15 = -9 (111110111) +6 + -14 = -8 (111111000) +6 + -13 = -7 (111111001) +6 + -12 = -6 (111111010) +6 + -11 = -5 (111111011) +6 + -10 = -4 (111111100) +6 + -9 = -3 (111111101) +6 + -8 = -2 (111111110) +6 + -7 = -1 (111111111) +6 + -6 = 0 (000000000) +6 + -5 = 1 (000000001) +6 + -4 = 2 (000000010) +6 + -3 = 3 (000000011) +6 + -2 = 4 (000000100) +6 + -1 = 5 (000000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + -32 = -25 (111100111) +7 + -31 = -24 (111101000) +7 + -30 = -23 (111101001) +7 + -29 = -22 (111101010) +7 + -28 = -21 (111101011) +7 + -27 = -20 (111101100) +7 + -26 = -19 (111101101) +7 + -25 = -18 (111101110) +7 + -24 = -17 (111101111) +7 + -23 = -16 (111110000) +7 + -22 = -15 (111110001) +7 + -21 = -14 (111110010) +7 + -20 = -13 (111110011) +7 + -19 = -12 (111110100) +7 + -18 = -11 (111110101) +7 + -17 = -10 (111110110) +7 + -16 = -9 (111110111) +7 + -15 = -8 (111111000) +7 + -14 = -7 (111111001) +7 + -13 = -6 (111111010) +7 + -12 = -5 (111111011) +7 + -11 = -4 (111111100) +7 + -10 = -3 (111111101) +7 + -9 = -2 (111111110) +7 + -8 = -1 (111111111) +7 + -7 = 0 (000000000) +7 + -6 = 1 (000000001) +7 + -5 = 2 (000000010) +7 + -4 = 3 (000000011) +7 + -3 = 4 (000000100) +7 + -2 = 5 (000000101) +7 + -1 = 6 (000000110) +-8 + 0 = -8 (111111000) +-8 + 1 = -7 (111111001) +-8 + 2 = -6 (111111010) +-8 + 3 = -5 (111111011) +-8 + 4 = -4 (111111100) +-8 + 5 = -3 (111111101) +-8 + 6 = -2 (111111110) +-8 + 7 = -1 (111111111) +-8 + 8 = 0 (000000000) +-8 + 9 = 1 (000000001) +-8 + 10 = 2 (000000010) +-8 + 11 = 3 (000000011) +-8 + 12 = 4 (000000100) +-8 + 13 = 5 (000000101) +-8 + 14 = 6 (000000110) +-8 + 15 = 7 (000000111) +-8 + 16 = 8 (000001000) +-8 + 17 = 9 (000001001) +-8 + 18 = 10 (000001010) +-8 + 19 = 11 (000001011) +-8 + 20 = 12 (000001100) +-8 + 21 = 13 (000001101) +-8 + 22 = 14 (000001110) +-8 + 23 = 15 (000001111) +-8 + 24 = 16 (000010000) +-8 + 25 = 17 (000010001) +-8 + 26 = 18 (000010010) +-8 + 27 = 19 (000010011) +-8 + 28 = 20 (000010100) +-8 + 29 = 21 (000010101) +-8 + 30 = 22 (000010110) +-8 + 31 = 23 (000010111) +-8 + -32 = -40 (111011000) +-8 + -31 = -39 (111011001) +-8 + -30 = -38 (111011010) +-8 + -29 = -37 (111011011) +-8 + -28 = -36 (111011100) +-8 + -27 = -35 (111011101) +-8 + -26 = -34 (111011110) +-8 + -25 = -33 (111011111) +-8 + -24 = -32 (111100000) +-8 + -23 = -31 (111100001) +-8 + -22 = -30 (111100010) +-8 + -21 = -29 (111100011) +-8 + -20 = -28 (111100100) +-8 + -19 = -27 (111100101) +-8 + -18 = -26 (111100110) +-8 + -17 = -25 (111100111) +-8 + -16 = -24 (111101000) +-8 + -15 = -23 (111101001) +-8 + -14 = -22 (111101010) +-8 + -13 = -21 (111101011) +-8 + -12 = -20 (111101100) +-8 + -11 = -19 (111101101) +-8 + -10 = -18 (111101110) +-8 + -9 = -17 (111101111) +-8 + -8 = -16 (111110000) +-8 + -7 = -15 (111110001) +-8 + -6 = -14 (111110010) +-8 + -5 = -13 (111110011) +-8 + -4 = -12 (111110100) +-8 + -3 = -11 (111110101) +-8 + -2 = -10 (111110110) +-8 + -1 = -9 (111110111) +-7 + 0 = -7 (111111001) +-7 + 1 = -6 (111111010) +-7 + 2 = -5 (111111011) +-7 + 3 = -4 (111111100) +-7 + 4 = -3 (111111101) +-7 + 5 = -2 (111111110) +-7 + 6 = -1 (111111111) +-7 + 7 = 0 (000000000) +-7 + 8 = 1 (000000001) +-7 + 9 = 2 (000000010) +-7 + 10 = 3 (000000011) +-7 + 11 = 4 (000000100) +-7 + 12 = 5 (000000101) +-7 + 13 = 6 (000000110) +-7 + 14 = 7 (000000111) +-7 + 15 = 8 (000001000) +-7 + 16 = 9 (000001001) +-7 + 17 = 10 (000001010) +-7 + 18 = 11 (000001011) +-7 + 19 = 12 (000001100) +-7 + 20 = 13 (000001101) +-7 + 21 = 14 (000001110) +-7 + 22 = 15 (000001111) +-7 + 23 = 16 (000010000) +-7 + 24 = 17 (000010001) +-7 + 25 = 18 (000010010) +-7 + 26 = 19 (000010011) +-7 + 27 = 20 (000010100) +-7 + 28 = 21 (000010101) +-7 + 29 = 22 (000010110) +-7 + 30 = 23 (000010111) +-7 + 31 = 24 (000011000) +-7 + -32 = -39 (111011001) +-7 + -31 = -38 (111011010) +-7 + -30 = -37 (111011011) +-7 + -29 = -36 (111011100) +-7 + -28 = -35 (111011101) +-7 + -27 = -34 (111011110) +-7 + -26 = -33 (111011111) +-7 + -25 = -32 (111100000) +-7 + -24 = -31 (111100001) +-7 + -23 = -30 (111100010) +-7 + -22 = -29 (111100011) +-7 + -21 = -28 (111100100) +-7 + -20 = -27 (111100101) +-7 + -19 = -26 (111100110) +-7 + -18 = -25 (111100111) +-7 + -17 = -24 (111101000) +-7 + -16 = -23 (111101001) +-7 + -15 = -22 (111101010) +-7 + -14 = -21 (111101011) +-7 + -13 = -20 (111101100) +-7 + -12 = -19 (111101101) +-7 + -11 = -18 (111101110) +-7 + -10 = -17 (111101111) +-7 + -9 = -16 (111110000) +-7 + -8 = -15 (111110001) +-7 + -7 = -14 (111110010) +-7 + -6 = -13 (111110011) +-7 + -5 = -12 (111110100) +-7 + -4 = -11 (111110101) +-7 + -3 = -10 (111110110) +-7 + -2 = -9 (111110111) +-7 + -1 = -8 (111111000) +-6 + 0 = -6 (111111010) +-6 + 1 = -5 (111111011) +-6 + 2 = -4 (111111100) +-6 + 3 = -3 (111111101) +-6 + 4 = -2 (111111110) +-6 + 5 = -1 (111111111) +-6 + 6 = 0 (000000000) +-6 + 7 = 1 (000000001) +-6 + 8 = 2 (000000010) +-6 + 9 = 3 (000000011) +-6 + 10 = 4 (000000100) +-6 + 11 = 5 (000000101) +-6 + 12 = 6 (000000110) +-6 + 13 = 7 (000000111) +-6 + 14 = 8 (000001000) +-6 + 15 = 9 (000001001) +-6 + 16 = 10 (000001010) +-6 + 17 = 11 (000001011) +-6 + 18 = 12 (000001100) +-6 + 19 = 13 (000001101) +-6 + 20 = 14 (000001110) +-6 + 21 = 15 (000001111) +-6 + 22 = 16 (000010000) +-6 + 23 = 17 (000010001) +-6 + 24 = 18 (000010010) +-6 + 25 = 19 (000010011) +-6 + 26 = 20 (000010100) +-6 + 27 = 21 (000010101) +-6 + 28 = 22 (000010110) +-6 + 29 = 23 (000010111) +-6 + 30 = 24 (000011000) +-6 + 31 = 25 (000011001) +-6 + -32 = -38 (111011010) +-6 + -31 = -37 (111011011) +-6 + -30 = -36 (111011100) +-6 + -29 = -35 (111011101) +-6 + -28 = -34 (111011110) +-6 + -27 = -33 (111011111) +-6 + -26 = -32 (111100000) +-6 + -25 = -31 (111100001) +-6 + -24 = -30 (111100010) +-6 + -23 = -29 (111100011) +-6 + -22 = -28 (111100100) +-6 + -21 = -27 (111100101) +-6 + -20 = -26 (111100110) +-6 + -19 = -25 (111100111) +-6 + -18 = -24 (111101000) +-6 + -17 = -23 (111101001) +-6 + -16 = -22 (111101010) +-6 + -15 = -21 (111101011) +-6 + -14 = -20 (111101100) +-6 + -13 = -19 (111101101) +-6 + -12 = -18 (111101110) +-6 + -11 = -17 (111101111) +-6 + -10 = -16 (111110000) +-6 + -9 = -15 (111110001) +-6 + -8 = -14 (111110010) +-6 + -7 = -13 (111110011) +-6 + -6 = -12 (111110100) +-6 + -5 = -11 (111110101) +-6 + -4 = -10 (111110110) +-6 + -3 = -9 (111110111) +-6 + -2 = -8 (111111000) +-6 + -1 = -7 (111111001) +-5 + 0 = -5 (111111011) +-5 + 1 = -4 (111111100) +-5 + 2 = -3 (111111101) +-5 + 3 = -2 (111111110) +-5 + 4 = -1 (111111111) +-5 + 5 = 0 (000000000) +-5 + 6 = 1 (000000001) +-5 + 7 = 2 (000000010) +-5 + 8 = 3 (000000011) +-5 + 9 = 4 (000000100) +-5 + 10 = 5 (000000101) +-5 + 11 = 6 (000000110) +-5 + 12 = 7 (000000111) +-5 + 13 = 8 (000001000) +-5 + 14 = 9 (000001001) +-5 + 15 = 10 (000001010) +-5 + 16 = 11 (000001011) +-5 + 17 = 12 (000001100) +-5 + 18 = 13 (000001101) +-5 + 19 = 14 (000001110) +-5 + 20 = 15 (000001111) +-5 + 21 = 16 (000010000) +-5 + 22 = 17 (000010001) +-5 + 23 = 18 (000010010) +-5 + 24 = 19 (000010011) +-5 + 25 = 20 (000010100) +-5 + 26 = 21 (000010101) +-5 + 27 = 22 (000010110) +-5 + 28 = 23 (000010111) +-5 + 29 = 24 (000011000) +-5 + 30 = 25 (000011001) +-5 + 31 = 26 (000011010) +-5 + -32 = -37 (111011011) +-5 + -31 = -36 (111011100) +-5 + -30 = -35 (111011101) +-5 + -29 = -34 (111011110) +-5 + -28 = -33 (111011111) +-5 + -27 = -32 (111100000) +-5 + -26 = -31 (111100001) +-5 + -25 = -30 (111100010) +-5 + -24 = -29 (111100011) +-5 + -23 = -28 (111100100) +-5 + -22 = -27 (111100101) +-5 + -21 = -26 (111100110) +-5 + -20 = -25 (111100111) +-5 + -19 = -24 (111101000) +-5 + -18 = -23 (111101001) +-5 + -17 = -22 (111101010) +-5 + -16 = -21 (111101011) +-5 + -15 = -20 (111101100) +-5 + -14 = -19 (111101101) +-5 + -13 = -18 (111101110) +-5 + -12 = -17 (111101111) +-5 + -11 = -16 (111110000) +-5 + -10 = -15 (111110001) +-5 + -9 = -14 (111110010) +-5 + -8 = -13 (111110011) +-5 + -7 = -12 (111110100) +-5 + -6 = -11 (111110101) +-5 + -5 = -10 (111110110) +-5 + -4 = -9 (111110111) +-5 + -3 = -8 (111111000) +-5 + -2 = -7 (111111001) +-5 + -1 = -6 (111111010) +-4 + 0 = -4 (111111100) +-4 + 1 = -3 (111111101) +-4 + 2 = -2 (111111110) +-4 + 3 = -1 (111111111) +-4 + 4 = 0 (000000000) +-4 + 5 = 1 (000000001) +-4 + 6 = 2 (000000010) +-4 + 7 = 3 (000000011) +-4 + 8 = 4 (000000100) +-4 + 9 = 5 (000000101) +-4 + 10 = 6 (000000110) +-4 + 11 = 7 (000000111) +-4 + 12 = 8 (000001000) +-4 + 13 = 9 (000001001) +-4 + 14 = 10 (000001010) +-4 + 15 = 11 (000001011) +-4 + 16 = 12 (000001100) +-4 + 17 = 13 (000001101) +-4 + 18 = 14 (000001110) +-4 + 19 = 15 (000001111) +-4 + 20 = 16 (000010000) +-4 + 21 = 17 (000010001) +-4 + 22 = 18 (000010010) +-4 + 23 = 19 (000010011) +-4 + 24 = 20 (000010100) +-4 + 25 = 21 (000010101) +-4 + 26 = 22 (000010110) +-4 + 27 = 23 (000010111) +-4 + 28 = 24 (000011000) +-4 + 29 = 25 (000011001) +-4 + 30 = 26 (000011010) +-4 + 31 = 27 (000011011) +-4 + -32 = -36 (111011100) +-4 + -31 = -35 (111011101) +-4 + -30 = -34 (111011110) +-4 + -29 = -33 (111011111) +-4 + -28 = -32 (111100000) +-4 + -27 = -31 (111100001) +-4 + -26 = -30 (111100010) +-4 + -25 = -29 (111100011) +-4 + -24 = -28 (111100100) +-4 + -23 = -27 (111100101) +-4 + -22 = -26 (111100110) +-4 + -21 = -25 (111100111) +-4 + -20 = -24 (111101000) +-4 + -19 = -23 (111101001) +-4 + -18 = -22 (111101010) +-4 + -17 = -21 (111101011) +-4 + -16 = -20 (111101100) +-4 + -15 = -19 (111101101) +-4 + -14 = -18 (111101110) +-4 + -13 = -17 (111101111) +-4 + -12 = -16 (111110000) +-4 + -11 = -15 (111110001) +-4 + -10 = -14 (111110010) +-4 + -9 = -13 (111110011) +-4 + -8 = -12 (111110100) +-4 + -7 = -11 (111110101) +-4 + -6 = -10 (111110110) +-4 + -5 = -9 (111110111) +-4 + -4 = -8 (111111000) +-4 + -3 = -7 (111111001) +-4 + -2 = -6 (111111010) +-4 + -1 = -5 (111111011) +-3 + 0 = -3 (111111101) +-3 + 1 = -2 (111111110) +-3 + 2 = -1 (111111111) +-3 + 3 = 0 (000000000) +-3 + 4 = 1 (000000001) +-3 + 5 = 2 (000000010) +-3 + 6 = 3 (000000011) +-3 + 7 = 4 (000000100) +-3 + 8 = 5 (000000101) +-3 + 9 = 6 (000000110) +-3 + 10 = 7 (000000111) +-3 + 11 = 8 (000001000) +-3 + 12 = 9 (000001001) +-3 + 13 = 10 (000001010) +-3 + 14 = 11 (000001011) +-3 + 15 = 12 (000001100) +-3 + 16 = 13 (000001101) +-3 + 17 = 14 (000001110) +-3 + 18 = 15 (000001111) +-3 + 19 = 16 (000010000) +-3 + 20 = 17 (000010001) +-3 + 21 = 18 (000010010) +-3 + 22 = 19 (000010011) +-3 + 23 = 20 (000010100) +-3 + 24 = 21 (000010101) +-3 + 25 = 22 (000010110) +-3 + 26 = 23 (000010111) +-3 + 27 = 24 (000011000) +-3 + 28 = 25 (000011001) +-3 + 29 = 26 (000011010) +-3 + 30 = 27 (000011011) +-3 + 31 = 28 (000011100) +-3 + -32 = -35 (111011101) +-3 + -31 = -34 (111011110) +-3 + -30 = -33 (111011111) +-3 + -29 = -32 (111100000) +-3 + -28 = -31 (111100001) +-3 + -27 = -30 (111100010) +-3 + -26 = -29 (111100011) +-3 + -25 = -28 (111100100) +-3 + -24 = -27 (111100101) +-3 + -23 = -26 (111100110) +-3 + -22 = -25 (111100111) +-3 + -21 = -24 (111101000) +-3 + -20 = -23 (111101001) +-3 + -19 = -22 (111101010) +-3 + -18 = -21 (111101011) +-3 + -17 = -20 (111101100) +-3 + -16 = -19 (111101101) +-3 + -15 = -18 (111101110) +-3 + -14 = -17 (111101111) +-3 + -13 = -16 (111110000) +-3 + -12 = -15 (111110001) +-3 + -11 = -14 (111110010) +-3 + -10 = -13 (111110011) +-3 + -9 = -12 (111110100) +-3 + -8 = -11 (111110101) +-3 + -7 = -10 (111110110) +-3 + -6 = -9 (111110111) +-3 + -5 = -8 (111111000) +-3 + -4 = -7 (111111001) +-3 + -3 = -6 (111111010) +-3 + -2 = -5 (111111011) +-3 + -1 = -4 (111111100) +-2 + 0 = -2 (111111110) +-2 + 1 = -1 (111111111) +-2 + 2 = 0 (000000000) +-2 + 3 = 1 (000000001) +-2 + 4 = 2 (000000010) +-2 + 5 = 3 (000000011) +-2 + 6 = 4 (000000100) +-2 + 7 = 5 (000000101) +-2 + 8 = 6 (000000110) +-2 + 9 = 7 (000000111) +-2 + 10 = 8 (000001000) +-2 + 11 = 9 (000001001) +-2 + 12 = 10 (000001010) +-2 + 13 = 11 (000001011) +-2 + 14 = 12 (000001100) +-2 + 15 = 13 (000001101) +-2 + 16 = 14 (000001110) +-2 + 17 = 15 (000001111) +-2 + 18 = 16 (000010000) +-2 + 19 = 17 (000010001) +-2 + 20 = 18 (000010010) +-2 + 21 = 19 (000010011) +-2 + 22 = 20 (000010100) +-2 + 23 = 21 (000010101) +-2 + 24 = 22 (000010110) +-2 + 25 = 23 (000010111) +-2 + 26 = 24 (000011000) +-2 + 27 = 25 (000011001) +-2 + 28 = 26 (000011010) +-2 + 29 = 27 (000011011) +-2 + 30 = 28 (000011100) +-2 + 31 = 29 (000011101) +-2 + -32 = -34 (111011110) +-2 + -31 = -33 (111011111) +-2 + -30 = -32 (111100000) +-2 + -29 = -31 (111100001) +-2 + -28 = -30 (111100010) +-2 + -27 = -29 (111100011) +-2 + -26 = -28 (111100100) +-2 + -25 = -27 (111100101) +-2 + -24 = -26 (111100110) +-2 + -23 = -25 (111100111) +-2 + -22 = -24 (111101000) +-2 + -21 = -23 (111101001) +-2 + -20 = -22 (111101010) +-2 + -19 = -21 (111101011) +-2 + -18 = -20 (111101100) +-2 + -17 = -19 (111101101) +-2 + -16 = -18 (111101110) +-2 + -15 = -17 (111101111) +-2 + -14 = -16 (111110000) +-2 + -13 = -15 (111110001) +-2 + -12 = -14 (111110010) +-2 + -11 = -13 (111110011) +-2 + -10 = -12 (111110100) +-2 + -9 = -11 (111110101) +-2 + -8 = -10 (111110110) +-2 + -7 = -9 (111110111) +-2 + -6 = -8 (111111000) +-2 + -5 = -7 (111111001) +-2 + -4 = -6 (111111010) +-2 + -3 = -5 (111111011) +-2 + -2 = -4 (111111100) +-2 + -1 = -3 (111111101) +-1 + 0 = -1 (111111111) +-1 + 1 = 0 (000000000) +-1 + 2 = 1 (000000001) +-1 + 3 = 2 (000000010) +-1 + 4 = 3 (000000011) +-1 + 5 = 4 (000000100) +-1 + 6 = 5 (000000101) +-1 + 7 = 6 (000000110) +-1 + 8 = 7 (000000111) +-1 + 9 = 8 (000001000) +-1 + 10 = 9 (000001001) +-1 + 11 = 10 (000001010) +-1 + 12 = 11 (000001011) +-1 + 13 = 12 (000001100) +-1 + 14 = 13 (000001101) +-1 + 15 = 14 (000001110) +-1 + 16 = 15 (000001111) +-1 + 17 = 16 (000010000) +-1 + 18 = 17 (000010001) +-1 + 19 = 18 (000010010) +-1 + 20 = 19 (000010011) +-1 + 21 = 20 (000010100) +-1 + 22 = 21 (000010101) +-1 + 23 = 22 (000010110) +-1 + 24 = 23 (000010111) +-1 + 25 = 24 (000011000) +-1 + 26 = 25 (000011001) +-1 + 27 = 26 (000011010) +-1 + 28 = 27 (000011011) +-1 + 29 = 28 (000011100) +-1 + 30 = 29 (000011101) +-1 + 31 = 30 (000011110) +-1 + -32 = -33 (111011111) +-1 + -31 = -32 (111100000) +-1 + -30 = -31 (111100001) +-1 + -29 = -30 (111100010) +-1 + -28 = -29 (111100011) +-1 + -27 = -28 (111100100) +-1 + -26 = -27 (111100101) +-1 + -25 = -26 (111100110) +-1 + -24 = -25 (111100111) +-1 + -23 = -24 (111101000) +-1 + -22 = -23 (111101001) +-1 + -21 = -22 (111101010) +-1 + -20 = -21 (111101011) +-1 + -19 = -20 (111101100) +-1 + -18 = -19 (111101101) +-1 + -17 = -18 (111101110) +-1 + -16 = -17 (111101111) +-1 + -15 = -16 (111110000) +-1 + -14 = -15 (111110001) +-1 + -13 = -14 (111110010) +-1 + -12 = -13 (111110011) +-1 + -11 = -12 (111110100) +-1 + -10 = -11 (111110101) +-1 + -9 = -10 (111110110) +-1 + -8 = -9 (111110111) +-1 + -7 = -8 (111111000) +-1 + -6 = -7 (111111001) +-1 + -5 = -6 (111111010) +-1 + -4 = -5 (111111011) +-1 + -3 = -4 (111111100) +-1 + -2 = -3 (111111101) +-1 + -1 = -2 (111111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/main.cpp new file mode 100644 index 000000000..dda8095a1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 9-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 9; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector9 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/promote_extension.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/promote_extension.f new file mode 100644 index 000000000..3c46f3738 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/promote_extension.f @@ -0,0 +1,3 @@ +promote_extension/datawidth.cpp +promote_extension/stimgen.cpp +promote_extension/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/stimgen.h new file mode 100644 index 000000000..1c35e4175 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_extension/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector9& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector9& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/common.h new file mode 100644 index 000000000..2e2569230 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/datawidth.cpp new file mode 100644 index 000000000..25913d4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_signed tmp_a (in1_width); + sc_signed tmp_b (in2_width); + sc_signed tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/datawidth.h new file mode 100644 index 000000000..6adbfd87b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector6& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector6& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/golden/promote_lost_carry.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/golden/promote_lost_carry.log new file mode 100644 index 000000000..833493d33 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/golden/promote_lost_carry.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + -32 = -32 (100000) +0 + -31 = -31 (100001) +0 + -30 = -30 (100010) +0 + -29 = -29 (100011) +0 + -28 = -28 (100100) +0 + -27 = -27 (100101) +0 + -26 = -26 (100110) +0 + -25 = -25 (100111) +0 + -24 = -24 (101000) +0 + -23 = -23 (101001) +0 + -22 = -22 (101010) +0 + -21 = -21 (101011) +0 + -20 = -20 (101100) +0 + -19 = -19 (101101) +0 + -18 = -18 (101110) +0 + -17 = -17 (101111) +0 + -16 = -16 (110000) +0 + -15 = -15 (110001) +0 + -14 = -14 (110010) +0 + -13 = -13 (110011) +0 + -12 = -12 (110100) +0 + -11 = -11 (110101) +0 + -10 = -10 (110110) +0 + -9 = -9 (110111) +0 + -8 = -8 (111000) +0 + -7 = -7 (111001) +0 + -6 = -6 (111010) +0 + -5 = -5 (111011) +0 + -4 = -4 (111100) +0 + -3 = -3 (111101) +0 + -2 = -2 (111110) +0 + -1 = -1 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = -32 (100000) +1 + -32 = -31 (100001) +1 + -31 = -30 (100010) +1 + -30 = -29 (100011) +1 + -29 = -28 (100100) +1 + -28 = -27 (100101) +1 + -27 = -26 (100110) +1 + -26 = -25 (100111) +1 + -25 = -24 (101000) +1 + -24 = -23 (101001) +1 + -23 = -22 (101010) +1 + -22 = -21 (101011) +1 + -21 = -20 (101100) +1 + -20 = -19 (101101) +1 + -19 = -18 (101110) +1 + -18 = -17 (101111) +1 + -17 = -16 (110000) +1 + -16 = -15 (110001) +1 + -15 = -14 (110010) +1 + -14 = -13 (110011) +1 + -13 = -12 (110100) +1 + -12 = -11 (110101) +1 + -11 = -10 (110110) +1 + -10 = -9 (110111) +1 + -9 = -8 (111000) +1 + -8 = -7 (111001) +1 + -7 = -6 (111010) +1 + -6 = -5 (111011) +1 + -5 = -4 (111100) +1 + -4 = -3 (111101) +1 + -3 = -2 (111110) +1 + -2 = -1 (111111) +1 + -1 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = -32 (100000) +2 + 31 = -31 (100001) +2 + -32 = -30 (100010) +2 + -31 = -29 (100011) +2 + -30 = -28 (100100) +2 + -29 = -27 (100101) +2 + -28 = -26 (100110) +2 + -27 = -25 (100111) +2 + -26 = -24 (101000) +2 + -25 = -23 (101001) +2 + -24 = -22 (101010) +2 + -23 = -21 (101011) +2 + -22 = -20 (101100) +2 + -21 = -19 (101101) +2 + -20 = -18 (101110) +2 + -19 = -17 (101111) +2 + -18 = -16 (110000) +2 + -17 = -15 (110001) +2 + -16 = -14 (110010) +2 + -15 = -13 (110011) +2 + -14 = -12 (110100) +2 + -13 = -11 (110101) +2 + -12 = -10 (110110) +2 + -11 = -9 (110111) +2 + -10 = -8 (111000) +2 + -9 = -7 (111001) +2 + -8 = -6 (111010) +2 + -7 = -5 (111011) +2 + -6 = -4 (111100) +2 + -5 = -3 (111101) +2 + -4 = -2 (111110) +2 + -3 = -1 (111111) +2 + -2 = 0 (000000) +2 + -1 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = -32 (100000) +3 + 30 = -31 (100001) +3 + 31 = -30 (100010) +3 + -32 = -29 (100011) +3 + -31 = -28 (100100) +3 + -30 = -27 (100101) +3 + -29 = -26 (100110) +3 + -28 = -25 (100111) +3 + -27 = -24 (101000) +3 + -26 = -23 (101001) +3 + -25 = -22 (101010) +3 + -24 = -21 (101011) +3 + -23 = -20 (101100) +3 + -22 = -19 (101101) +3 + -21 = -18 (101110) +3 + -20 = -17 (101111) +3 + -19 = -16 (110000) +3 + -18 = -15 (110001) +3 + -17 = -14 (110010) +3 + -16 = -13 (110011) +3 + -15 = -12 (110100) +3 + -14 = -11 (110101) +3 + -13 = -10 (110110) +3 + -12 = -9 (110111) +3 + -11 = -8 (111000) +3 + -10 = -7 (111001) +3 + -9 = -6 (111010) +3 + -8 = -5 (111011) +3 + -7 = -4 (111100) +3 + -6 = -3 (111101) +3 + -5 = -2 (111110) +3 + -4 = -1 (111111) +3 + -3 = 0 (000000) +3 + -2 = 1 (000001) +3 + -1 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = -32 (100000) +4 + 29 = -31 (100001) +4 + 30 = -30 (100010) +4 + 31 = -29 (100011) +4 + -32 = -28 (100100) +4 + -31 = -27 (100101) +4 + -30 = -26 (100110) +4 + -29 = -25 (100111) +4 + -28 = -24 (101000) +4 + -27 = -23 (101001) +4 + -26 = -22 (101010) +4 + -25 = -21 (101011) +4 + -24 = -20 (101100) +4 + -23 = -19 (101101) +4 + -22 = -18 (101110) +4 + -21 = -17 (101111) +4 + -20 = -16 (110000) +4 + -19 = -15 (110001) +4 + -18 = -14 (110010) +4 + -17 = -13 (110011) +4 + -16 = -12 (110100) +4 + -15 = -11 (110101) +4 + -14 = -10 (110110) +4 + -13 = -9 (110111) +4 + -12 = -8 (111000) +4 + -11 = -7 (111001) +4 + -10 = -6 (111010) +4 + -9 = -5 (111011) +4 + -8 = -4 (111100) +4 + -7 = -3 (111101) +4 + -6 = -2 (111110) +4 + -5 = -1 (111111) +4 + -4 = 0 (000000) +4 + -3 = 1 (000001) +4 + -2 = 2 (000010) +4 + -1 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = -32 (100000) +5 + 28 = -31 (100001) +5 + 29 = -30 (100010) +5 + 30 = -29 (100011) +5 + 31 = -28 (100100) +5 + -32 = -27 (100101) +5 + -31 = -26 (100110) +5 + -30 = -25 (100111) +5 + -29 = -24 (101000) +5 + -28 = -23 (101001) +5 + -27 = -22 (101010) +5 + -26 = -21 (101011) +5 + -25 = -20 (101100) +5 + -24 = -19 (101101) +5 + -23 = -18 (101110) +5 + -22 = -17 (101111) +5 + -21 = -16 (110000) +5 + -20 = -15 (110001) +5 + -19 = -14 (110010) +5 + -18 = -13 (110011) +5 + -17 = -12 (110100) +5 + -16 = -11 (110101) +5 + -15 = -10 (110110) +5 + -14 = -9 (110111) +5 + -13 = -8 (111000) +5 + -12 = -7 (111001) +5 + -11 = -6 (111010) +5 + -10 = -5 (111011) +5 + -9 = -4 (111100) +5 + -8 = -3 (111101) +5 + -7 = -2 (111110) +5 + -6 = -1 (111111) +5 + -5 = 0 (000000) +5 + -4 = 1 (000001) +5 + -3 = 2 (000010) +5 + -2 = 3 (000011) +5 + -1 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = -32 (100000) +6 + 27 = -31 (100001) +6 + 28 = -30 (100010) +6 + 29 = -29 (100011) +6 + 30 = -28 (100100) +6 + 31 = -27 (100101) +6 + -32 = -26 (100110) +6 + -31 = -25 (100111) +6 + -30 = -24 (101000) +6 + -29 = -23 (101001) +6 + -28 = -22 (101010) +6 + -27 = -21 (101011) +6 + -26 = -20 (101100) +6 + -25 = -19 (101101) +6 + -24 = -18 (101110) +6 + -23 = -17 (101111) +6 + -22 = -16 (110000) +6 + -21 = -15 (110001) +6 + -20 = -14 (110010) +6 + -19 = -13 (110011) +6 + -18 = -12 (110100) +6 + -17 = -11 (110101) +6 + -16 = -10 (110110) +6 + -15 = -9 (110111) +6 + -14 = -8 (111000) +6 + -13 = -7 (111001) +6 + -12 = -6 (111010) +6 + -11 = -5 (111011) +6 + -10 = -4 (111100) +6 + -9 = -3 (111101) +6 + -8 = -2 (111110) +6 + -7 = -1 (111111) +6 + -6 = 0 (000000) +6 + -5 = 1 (000001) +6 + -4 = 2 (000010) +6 + -3 = 3 (000011) +6 + -2 = 4 (000100) +6 + -1 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = -32 (100000) +7 + 26 = -31 (100001) +7 + 27 = -30 (100010) +7 + 28 = -29 (100011) +7 + 29 = -28 (100100) +7 + 30 = -27 (100101) +7 + 31 = -26 (100110) +7 + -32 = -25 (100111) +7 + -31 = -24 (101000) +7 + -30 = -23 (101001) +7 + -29 = -22 (101010) +7 + -28 = -21 (101011) +7 + -27 = -20 (101100) +7 + -26 = -19 (101101) +7 + -25 = -18 (101110) +7 + -24 = -17 (101111) +7 + -23 = -16 (110000) +7 + -22 = -15 (110001) +7 + -21 = -14 (110010) +7 + -20 = -13 (110011) +7 + -19 = -12 (110100) +7 + -18 = -11 (110101) +7 + -17 = -10 (110110) +7 + -16 = -9 (110111) +7 + -15 = -8 (111000) +7 + -14 = -7 (111001) +7 + -13 = -6 (111010) +7 + -12 = -5 (111011) +7 + -11 = -4 (111100) +7 + -10 = -3 (111101) +7 + -9 = -2 (111110) +7 + -8 = -1 (111111) +7 + -7 = 0 (000000) +7 + -6 = 1 (000001) +7 + -5 = 2 (000010) +7 + -4 = 3 (000011) +7 + -3 = 4 (000100) +7 + -2 = 5 (000101) +7 + -1 = 6 (000110) +-8 + 0 = -8 (111000) +-8 + 1 = -7 (111001) +-8 + 2 = -6 (111010) +-8 + 3 = -5 (111011) +-8 + 4 = -4 (111100) +-8 + 5 = -3 (111101) +-8 + 6 = -2 (111110) +-8 + 7 = -1 (111111) +-8 + 8 = 0 (000000) +-8 + 9 = 1 (000001) +-8 + 10 = 2 (000010) +-8 + 11 = 3 (000011) +-8 + 12 = 4 (000100) +-8 + 13 = 5 (000101) +-8 + 14 = 6 (000110) +-8 + 15 = 7 (000111) +-8 + 16 = 8 (001000) +-8 + 17 = 9 (001001) +-8 + 18 = 10 (001010) +-8 + 19 = 11 (001011) +-8 + 20 = 12 (001100) +-8 + 21 = 13 (001101) +-8 + 22 = 14 (001110) +-8 + 23 = 15 (001111) +-8 + 24 = 16 (010000) +-8 + 25 = 17 (010001) +-8 + 26 = 18 (010010) +-8 + 27 = 19 (010011) +-8 + 28 = 20 (010100) +-8 + 29 = 21 (010101) +-8 + 30 = 22 (010110) +-8 + 31 = 23 (010111) +-8 + -32 = 24 (011000) +-8 + -31 = 25 (011001) +-8 + -30 = 26 (011010) +-8 + -29 = 27 (011011) +-8 + -28 = 28 (011100) +-8 + -27 = 29 (011101) +-8 + -26 = 30 (011110) +-8 + -25 = 31 (011111) +-8 + -24 = -32 (100000) +-8 + -23 = -31 (100001) +-8 + -22 = -30 (100010) +-8 + -21 = -29 (100011) +-8 + -20 = -28 (100100) +-8 + -19 = -27 (100101) +-8 + -18 = -26 (100110) +-8 + -17 = -25 (100111) +-8 + -16 = -24 (101000) +-8 + -15 = -23 (101001) +-8 + -14 = -22 (101010) +-8 + -13 = -21 (101011) +-8 + -12 = -20 (101100) +-8 + -11 = -19 (101101) +-8 + -10 = -18 (101110) +-8 + -9 = -17 (101111) +-8 + -8 = -16 (110000) +-8 + -7 = -15 (110001) +-8 + -6 = -14 (110010) +-8 + -5 = -13 (110011) +-8 + -4 = -12 (110100) +-8 + -3 = -11 (110101) +-8 + -2 = -10 (110110) +-8 + -1 = -9 (110111) +-7 + 0 = -7 (111001) +-7 + 1 = -6 (111010) +-7 + 2 = -5 (111011) +-7 + 3 = -4 (111100) +-7 + 4 = -3 (111101) +-7 + 5 = -2 (111110) +-7 + 6 = -1 (111111) +-7 + 7 = 0 (000000) +-7 + 8 = 1 (000001) +-7 + 9 = 2 (000010) +-7 + 10 = 3 (000011) +-7 + 11 = 4 (000100) +-7 + 12 = 5 (000101) +-7 + 13 = 6 (000110) +-7 + 14 = 7 (000111) +-7 + 15 = 8 (001000) +-7 + 16 = 9 (001001) +-7 + 17 = 10 (001010) +-7 + 18 = 11 (001011) +-7 + 19 = 12 (001100) +-7 + 20 = 13 (001101) +-7 + 21 = 14 (001110) +-7 + 22 = 15 (001111) +-7 + 23 = 16 (010000) +-7 + 24 = 17 (010001) +-7 + 25 = 18 (010010) +-7 + 26 = 19 (010011) +-7 + 27 = 20 (010100) +-7 + 28 = 21 (010101) +-7 + 29 = 22 (010110) +-7 + 30 = 23 (010111) +-7 + 31 = 24 (011000) +-7 + -32 = 25 (011001) +-7 + -31 = 26 (011010) +-7 + -30 = 27 (011011) +-7 + -29 = 28 (011100) +-7 + -28 = 29 (011101) +-7 + -27 = 30 (011110) +-7 + -26 = 31 (011111) +-7 + -25 = -32 (100000) +-7 + -24 = -31 (100001) +-7 + -23 = -30 (100010) +-7 + -22 = -29 (100011) +-7 + -21 = -28 (100100) +-7 + -20 = -27 (100101) +-7 + -19 = -26 (100110) +-7 + -18 = -25 (100111) +-7 + -17 = -24 (101000) +-7 + -16 = -23 (101001) +-7 + -15 = -22 (101010) +-7 + -14 = -21 (101011) +-7 + -13 = -20 (101100) +-7 + -12 = -19 (101101) +-7 + -11 = -18 (101110) +-7 + -10 = -17 (101111) +-7 + -9 = -16 (110000) +-7 + -8 = -15 (110001) +-7 + -7 = -14 (110010) +-7 + -6 = -13 (110011) +-7 + -5 = -12 (110100) +-7 + -4 = -11 (110101) +-7 + -3 = -10 (110110) +-7 + -2 = -9 (110111) +-7 + -1 = -8 (111000) +-6 + 0 = -6 (111010) +-6 + 1 = -5 (111011) +-6 + 2 = -4 (111100) +-6 + 3 = -3 (111101) +-6 + 4 = -2 (111110) +-6 + 5 = -1 (111111) +-6 + 6 = 0 (000000) +-6 + 7 = 1 (000001) +-6 + 8 = 2 (000010) +-6 + 9 = 3 (000011) +-6 + 10 = 4 (000100) +-6 + 11 = 5 (000101) +-6 + 12 = 6 (000110) +-6 + 13 = 7 (000111) +-6 + 14 = 8 (001000) +-6 + 15 = 9 (001001) +-6 + 16 = 10 (001010) +-6 + 17 = 11 (001011) +-6 + 18 = 12 (001100) +-6 + 19 = 13 (001101) +-6 + 20 = 14 (001110) +-6 + 21 = 15 (001111) +-6 + 22 = 16 (010000) +-6 + 23 = 17 (010001) +-6 + 24 = 18 (010010) +-6 + 25 = 19 (010011) +-6 + 26 = 20 (010100) +-6 + 27 = 21 (010101) +-6 + 28 = 22 (010110) +-6 + 29 = 23 (010111) +-6 + 30 = 24 (011000) +-6 + 31 = 25 (011001) +-6 + -32 = 26 (011010) +-6 + -31 = 27 (011011) +-6 + -30 = 28 (011100) +-6 + -29 = 29 (011101) +-6 + -28 = 30 (011110) +-6 + -27 = 31 (011111) +-6 + -26 = -32 (100000) +-6 + -25 = -31 (100001) +-6 + -24 = -30 (100010) +-6 + -23 = -29 (100011) +-6 + -22 = -28 (100100) +-6 + -21 = -27 (100101) +-6 + -20 = -26 (100110) +-6 + -19 = -25 (100111) +-6 + -18 = -24 (101000) +-6 + -17 = -23 (101001) +-6 + -16 = -22 (101010) +-6 + -15 = -21 (101011) +-6 + -14 = -20 (101100) +-6 + -13 = -19 (101101) +-6 + -12 = -18 (101110) +-6 + -11 = -17 (101111) +-6 + -10 = -16 (110000) +-6 + -9 = -15 (110001) +-6 + -8 = -14 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15 = 13 (001101) +-2 + 16 = 14 (001110) +-2 + 17 = 15 (001111) +-2 + 18 = 16 (010000) +-2 + 19 = 17 (010001) +-2 + 20 = 18 (010010) +-2 + 21 = 19 (010011) +-2 + 22 = 20 (010100) +-2 + 23 = 21 (010101) +-2 + 24 = 22 (010110) +-2 + 25 = 23 (010111) +-2 + 26 = 24 (011000) +-2 + 27 = 25 (011001) +-2 + 28 = 26 (011010) +-2 + 29 = 27 (011011) +-2 + 30 = 28 (011100) +-2 + 31 = 29 (011101) +-2 + -32 = 30 (011110) +-2 + -31 = 31 (011111) +-2 + -30 = -32 (100000) +-2 + -29 = -31 (100001) +-2 + -28 = -30 (100010) +-2 + -27 = -29 (100011) +-2 + -26 = -28 (100100) +-2 + -25 = -27 (100101) +-2 + -24 = -26 (100110) +-2 + -23 = -25 (100111) +-2 + -22 = -24 (101000) +-2 + -21 = -23 (101001) +-2 + -20 = -22 (101010) +-2 + -19 = -21 (101011) +-2 + -18 = -20 (101100) +-2 + -17 = -19 (101101) +-2 + -16 = -18 (101110) +-2 + -15 = -17 (101111) +-2 + -14 = -16 (110000) +-2 + -13 = -15 (110001) +-2 + -12 = -14 (110010) +-2 + -11 = -13 (110011) +-2 + -10 = -12 (110100) +-2 + -9 = -11 (110101) +-2 + -8 = -10 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+0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + -32 = -32 (100000) +0 + -31 = -31 (100001) +0 + -30 = -30 (100010) +0 + -29 = -29 (100011) +0 + -28 = -28 (100100) +0 + -27 = -27 (100101) +0 + -26 = -26 (100110) +0 + -25 = -25 (100111) +0 + -24 = -24 (101000) +0 + -23 = -23 (101001) +0 + -22 = -22 (101010) +0 + -21 = -21 (101011) +0 + -20 = -20 (101100) +0 + -19 = -19 (101101) +0 + -18 = -18 (101110) +0 + -17 = -17 (101111) +0 + -16 = -16 (110000) +0 + -15 = -15 (110001) +0 + -14 = -14 (110010) +0 + -13 = -13 (110011) +0 + -12 = -12 (110100) +0 + -11 = -11 (110101) +0 + -10 = -10 (110110) +0 + -9 = -9 (110111) +0 + -8 = -8 (111000) +0 + -7 = -7 (111001) +0 + -6 = -6 (111010) +0 + -5 = -5 (111011) +0 + -4 = -4 (111100) +0 + -3 = -3 (111101) +0 + -2 = -2 (111110) +0 + -1 = -1 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = -32 (100000) +1 + -32 = -31 (100001) +1 + -31 = -30 (100010) +1 + -30 = -29 (100011) +1 + -29 = -28 (100100) +1 + -28 = -27 (100101) +1 + -27 = -26 (100110) +1 + -26 = -25 (100111) +1 + -25 = -24 (101000) +1 + -24 = -23 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(000001) +7 + -5 = 2 (000010) +7 + -4 = 3 (000011) +7 + -3 = 4 (000100) +7 + -2 = 5 (000101) +7 + -1 = 6 (000110) +-8 + 0 = -8 (111000) +-8 + 1 = -7 (111001) +-8 + 2 = -6 (111010) +-8 + 3 = -5 (111011) +-8 + 4 = -4 (111100) +-8 + 5 = -3 (111101) +-8 + 6 = -2 (111110) +-8 + 7 = -1 (111111) +-8 + 8 = 0 (000000) +-8 + 9 = 1 (000001) +-8 + 10 = 2 (000010) +-8 + 11 = 3 (000011) +-8 + 12 = 4 (000100) +-8 + 13 = 5 (000101) +-8 + 14 = 6 (000110) +-8 + 15 = 7 (000111) +-8 + 16 = 8 (001000) +-8 + 17 = 9 (001001) +-8 + 18 = 10 (001010) +-8 + 19 = 11 (001011) +-8 + 20 = 12 (001100) +-8 + 21 = 13 (001101) +-8 + 22 = 14 (001110) +-8 + 23 = 15 (001111) +-8 + 24 = 16 (010000) +-8 + 25 = 17 (010001) +-8 + 26 = 18 (010010) +-8 + 27 = 19 (010011) +-8 + 28 = 20 (010100) +-8 + 29 = 21 (010101) +-8 + 30 = 22 (010110) +-8 + 31 = 23 (010111) +-8 + -32 = 24 (011000) +-8 + -31 = 25 (011001) +-8 + -30 = 26 (011010) +-8 + -29 = 27 (011011) +-8 + -28 = 28 (011100) +-8 + -27 = 29 (011101) +-8 + -26 = 30 (011110) +-8 + -25 = 31 (011111) +-8 + -24 = -32 (100000) +-8 + -23 = -31 (100001) +-8 + -22 = -30 (100010) +-8 + -21 = -29 (100011) +-8 + -20 = -28 (100100) +-8 + -19 = -27 (100101) +-8 + -18 = -26 (100110) +-8 + -17 = -25 (100111) +-8 + -16 = -24 (101000) +-8 + -15 = -23 (101001) +-8 + -14 = -22 (101010) +-8 + -13 = -21 (101011) +-8 + -12 = -20 (101100) +-8 + -11 = -19 (101101) +-8 + -10 = -18 (101110) +-8 + -9 = -17 (101111) +-8 + -8 = -16 (110000) +-8 + -7 = -15 (110001) +-8 + -6 = -14 (110010) +-8 + -5 = -13 (110011) +-8 + -4 = -12 (110100) +-8 + -3 = -11 (110101) +-8 + -2 = -10 (110110) +-8 + -1 = -9 (110111) +-7 + 0 = -7 (111001) +-7 + 1 = -6 (111010) +-7 + 2 = -5 (111011) +-7 + 3 = -4 (111100) +-7 + 4 = -3 (111101) +-7 + 5 = -2 (111110) +-7 + 6 = -1 (111111) +-7 + 7 = 0 (000000) +-7 + 8 = 1 (000001) +-7 + 9 = 2 (000010) +-7 + 10 = 3 (000011) +-7 + 11 = 4 (000100) +-7 + 12 = 5 (000101) +-7 + 13 = 6 (000110) +-7 + 14 = 7 (000111) +-7 + 15 = 8 (001000) +-7 + 16 = 9 (001001) +-7 + 17 = 10 (001010) +-7 + 18 = 11 (001011) +-7 + 19 = 12 (001100) +-7 + 20 = 13 (001101) +-7 + 21 = 14 (001110) +-7 + 22 = 15 (001111) +-7 + 23 = 16 (010000) +-7 + 24 = 17 (010001) +-7 + 25 = 18 (010010) +-7 + 26 = 19 (010011) +-7 + 27 = 20 (010100) +-7 + 28 = 21 (010101) +-7 + 29 = 22 (010110) +-7 + 30 = 23 (010111) +-7 + 31 = 24 (011000) +-7 + -32 = 25 (011001) +-7 + -31 = 26 (011010) +-7 + -30 = 27 (011011) +-7 + -29 = 28 (011100) +-7 + -28 = 29 (011101) +-7 + -27 = 30 (011110) +-7 + -26 = 31 (011111) +-7 + -25 = -32 (100000) +-7 + -24 = -31 (100001) +-7 + -23 = -30 (100010) +-7 + -22 = -29 (100011) +-7 + -21 = -28 (100100) +-7 + -20 = -27 (100101) +-7 + -19 = -26 (100110) +-7 + -18 = -25 (100111) +-7 + -17 = -24 (101000) +-7 + -16 = -23 (101001) +-7 + -15 = -22 (101010) +-7 + -14 = -21 (101011) +-7 + -13 = -20 (101100) +-7 + -12 = -19 (101101) +-7 + -11 = -18 (101110) +-7 + -10 = -17 (101111) +-7 + -9 = -16 (110000) +-7 + -8 = -15 (110001) +-7 + -7 = -14 (110010) +-7 + -6 = -13 (110011) +-7 + -5 = -12 (110100) +-7 + -4 = -11 (110101) +-7 + -3 = -10 (110110) +-7 + -2 = -9 (110111) +-7 + -1 = -8 (111000) +-6 + 0 = -6 (111010) +-6 + 1 = -5 (111011) +-6 + 2 = -4 (111100) +-6 + 3 = -3 (111101) +-6 + 4 = -2 (111110) +-6 + 5 = -1 (111111) +-6 + 6 = 0 (000000) +-6 + 7 = 1 (000001) +-6 + 8 = 2 (000010) +-6 + 9 = 3 (000011) +-6 + 10 = 4 (000100) +-6 + 11 = 5 (000101) +-6 + 12 = 6 (000110) +-6 + 13 = 7 (000111) +-6 + 14 = 8 (001000) +-6 + 15 = 9 (001001) +-6 + 16 = 10 (001010) +-6 + 17 = 11 (001011) +-6 + 18 = 12 (001100) +-6 + 19 = 13 (001101) +-6 + 20 = 14 (001110) +-6 + 21 = 15 (001111) +-6 + 22 = 16 (010000) +-6 + 23 = 17 (010001) +-6 + 24 = 18 (010010) +-6 + 25 = 19 (010011) +-6 + 26 = 20 (010100) +-6 + 27 = 21 (010101) +-6 + 28 = 22 (010110) +-6 + 29 = 23 (010111) +-6 + 30 = 24 (011000) +-6 + 31 = 25 (011001) +-6 + -32 = 26 (011010) +-6 + -31 = 27 (011011) +-6 + -30 = 28 (011100) +-6 + -29 = 29 (011101) +-6 + -28 = 30 (011110) +-6 + -27 = 31 (011111) +-6 + -26 = -32 (100000) +-6 + -25 = -31 (100001) +-6 + -24 = -30 (100010) +-6 + -23 = -29 (100011) +-6 + -22 = -28 (100100) +-6 + -21 = -27 (100101) +-6 + -20 = -26 (100110) +-6 + -19 = -25 (100111) +-6 + -18 = -24 (101000) +-6 + -17 = -23 (101001) +-6 + -16 = -22 (101010) +-6 + -15 = -21 (101011) +-6 + -14 = -20 (101100) +-6 + -13 = -19 (101101) +-6 + -12 = -18 (101110) +-6 + -11 = -17 (101111) +-6 + -10 = -16 (110000) +-6 + -9 = -15 (110001) +-6 + -8 = -14 (110010) +-6 + -7 = -13 (110011) +-6 + -6 = -12 (110100) +-6 + -5 = -11 (110101) +-6 + -4 = -10 (110110) +-6 + -3 = -9 (110111) +-6 + -2 = -8 (111000) +-6 + -1 = -7 (111001) +-5 + 0 = -5 (111011) +-5 + 1 = -4 (111100) +-5 + 2 = -3 (111101) +-5 + 3 = -2 (111110) +-5 + 4 = -1 (111111) +-5 + 5 = 0 (000000) +-5 + 6 = 1 (000001) +-5 + 7 = 2 (000010) +-5 + 8 = 3 (000011) +-5 + 9 = 4 (000100) +-5 + 10 = 5 (000101) +-5 + 11 = 6 (000110) +-5 + 12 = 7 (000111) +-5 + 13 = 8 (001000) +-5 + 14 = 9 (001001) +-5 + 15 = 10 (001010) +-5 + 16 = 11 (001011) +-5 + 17 = 12 (001100) +-5 + 18 = 13 (001101) +-5 + 19 = 14 (001110) +-5 + 20 = 15 (001111) +-5 + 21 = 16 (010000) +-5 + 22 = 17 (010001) +-5 + 23 = 18 (010010) +-5 + 24 = 19 (010011) +-5 + 25 = 20 (010100) +-5 + 26 = 21 (010101) +-5 + 27 = 22 (010110) +-5 + 28 = 23 (010111) +-5 + 29 = 24 (011000) +-5 + 30 = 25 (011001) +-5 + 31 = 26 (011010) +-5 + -32 = 27 (011011) +-5 + -31 = 28 (011100) +-5 + -30 = 29 (011101) +-5 + -29 = 30 (011110) +-5 + -28 = 31 (011111) +-5 + -27 = -32 (100000) +-5 + -26 = -31 (100001) +-5 + -25 = -30 (100010) +-5 + -24 = -29 (100011) +-5 + -23 = -28 (100100) +-5 + -22 = -27 (100101) +-5 + -21 = -26 (100110) +-5 + -20 = -25 (100111) +-5 + -19 = -24 (101000) +-5 + -18 = -23 (101001) +-5 + -17 = -22 (101010) +-5 + -16 = -21 (101011) +-5 + -15 = -20 (101100) +-5 + -14 = -19 (101101) +-5 + -13 = -18 (101110) +-5 + -12 = -17 (101111) +-5 + -11 = -16 (110000) +-5 + -10 = -15 (110001) +-5 + -9 = -14 (110010) +-5 + -8 = -13 (110011) +-5 + -7 = -12 (110100) +-5 + -6 = -11 (110101) +-5 + -5 = -10 (110110) +-5 + -4 = -9 (110111) +-5 + -3 = -8 (111000) +-5 + -2 = -7 (111001) +-5 + -1 = -6 (111010) +-4 + 0 = -4 (111100) +-4 + 1 = -3 (111101) +-4 + 2 = -2 (111110) +-4 + 3 = -1 (111111) +-4 + 4 = 0 (000000) +-4 + 5 = 1 (000001) +-4 + 6 = 2 (000010) +-4 + 7 = 3 (000011) +-4 + 8 = 4 (000100) +-4 + 9 = 5 (000101) +-4 + 10 = 6 (000110) +-4 + 11 = 7 (000111) +-4 + 12 = 8 (001000) +-4 + 13 = 9 (001001) +-4 + 14 = 10 (001010) +-4 + 15 = 11 (001011) +-4 + 16 = 12 (001100) +-4 + 17 = 13 (001101) +-4 + 18 = 14 (001110) +-4 + 19 = 15 (001111) +-4 + 20 = 16 (010000) +-4 + 21 = 17 (010001) +-4 + 22 = 18 (010010) +-4 + 23 = 19 (010011) +-4 + 24 = 20 (010100) +-4 + 25 = 21 (010101) +-4 + 26 = 22 (010110) +-4 + 27 = 23 (010111) +-4 + 28 = 24 (011000) +-4 + 29 = 25 (011001) +-4 + 30 = 26 (011010) +-4 + 31 = 27 (011011) +-4 + -32 = 28 (011100) +-4 + -31 = 29 (011101) +-4 + -30 = 30 (011110) +-4 + -29 = 31 (011111) +-4 + -28 = -32 (100000) +-4 + -27 = -31 (100001) +-4 + -26 = -30 (100010) +-4 + -25 = -29 (100011) +-4 + -24 = -28 (100100) +-4 + -23 = -27 (100101) +-4 + -22 = -26 (100110) +-4 + -21 = -25 (100111) +-4 + -20 = -24 (101000) +-4 + -19 = -23 (101001) +-4 + -18 = -22 (101010) +-4 + -17 = -21 (101011) +-4 + -16 = -20 (101100) +-4 + -15 = -19 (101101) +-4 + -14 = -18 (101110) +-4 + -13 = -17 (101111) +-4 + -12 = -16 (110000) +-4 + -11 = -15 (110001) +-4 + -10 = -14 (110010) +-4 + -9 = -13 (110011) +-4 + -8 = -12 (110100) +-4 + -7 = -11 (110101) +-4 + -6 = -10 (110110) +-4 + -5 = -9 (110111) +-4 + -4 = -8 (111000) +-4 + -3 = -7 (111001) +-4 + -2 = -6 (111010) +-4 + -1 = -5 (111011) +-3 + 0 = -3 (111101) +-3 + 1 = -2 (111110) +-3 + 2 = -1 (111111) +-3 + 3 = 0 (000000) +-3 + 4 = 1 (000001) +-3 + 5 = 2 (000010) +-3 + 6 = 3 (000011) +-3 + 7 = 4 (000100) +-3 + 8 = 5 (000101) +-3 + 9 = 6 (000110) +-3 + 10 = 7 (000111) +-3 + 11 = 8 (001000) +-3 + 12 = 9 (001001) +-3 + 13 = 10 (001010) +-3 + 14 = 11 (001011) +-3 + 15 = 12 (001100) +-3 + 16 = 13 (001101) +-3 + 17 = 14 (001110) +-3 + 18 = 15 (001111) +-3 + 19 = 16 (010000) +-3 + 20 = 17 (010001) +-3 + 21 = 18 (010010) +-3 + 22 = 19 (010011) +-3 + 23 = 20 (010100) +-3 + 24 = 21 (010101) +-3 + 25 = 22 (010110) +-3 + 26 = 23 (010111) +-3 + 27 = 24 (011000) +-3 + 28 = 25 (011001) +-3 + 29 = 26 (011010) +-3 + 30 = 27 (011011) +-3 + 31 = 28 (011100) +-3 + -32 = 29 (011101) +-3 + -31 = 30 (011110) +-3 + -30 = 31 (011111) +-3 + -29 = -32 (100000) +-3 + -28 = -31 (100001) +-3 + -27 = -30 (100010) +-3 + -26 = -29 (100011) +-3 + -25 = -28 (100100) +-3 + -24 = -27 (100101) +-3 + -23 = -26 (100110) +-3 + -22 = -25 (100111) +-3 + -21 = -24 (101000) +-3 + -20 = -23 (101001) +-3 + -19 = -22 (101010) +-3 + -18 = -21 (101011) +-3 + -17 = -20 (101100) +-3 + -16 = -19 (101101) +-3 + -15 = -18 (101110) +-3 + -14 = -17 (101111) +-3 + -13 = -16 (110000) +-3 + -12 = -15 (110001) +-3 + -11 = -14 (110010) +-3 + -10 = -13 (110011) +-3 + -9 = -12 (110100) +-3 + -8 = -11 (110101) +-3 + -7 = -10 (110110) +-3 + -6 = -9 (110111) +-3 + -5 = -8 (111000) +-3 + -4 = -7 (111001) +-3 + -3 = -6 (111010) +-3 + -2 = -5 (111011) +-3 + -1 = -4 (111100) +-2 + 0 = -2 (111110) +-2 + 1 = -1 (111111) +-2 + 2 = 0 (000000) +-2 + 3 = 1 (000001) +-2 + 4 = 2 (000010) +-2 + 5 = 3 (000011) +-2 + 6 = 4 (000100) +-2 + 7 = 5 (000101) +-2 + 8 = 6 (000110) +-2 + 9 = 7 (000111) +-2 + 10 = 8 (001000) +-2 + 11 = 9 (001001) +-2 + 12 = 10 (001010) +-2 + 13 = 11 (001011) +-2 + 14 = 12 (001100) +-2 + 15 = 13 (001101) +-2 + 16 = 14 (001110) +-2 + 17 = 15 (001111) +-2 + 18 = 16 (010000) +-2 + 19 = 17 (010001) +-2 + 20 = 18 (010010) +-2 + 21 = 19 (010011) +-2 + 22 = 20 (010100) +-2 + 23 = 21 (010101) +-2 + 24 = 22 (010110) +-2 + 25 = 23 (010111) +-2 + 26 = 24 (011000) +-2 + 27 = 25 (011001) +-2 + 28 = 26 (011010) +-2 + 29 = 27 (011011) +-2 + 30 = 28 (011100) +-2 + 31 = 29 (011101) +-2 + -32 = 30 (011110) +-2 + -31 = 31 (011111) +-2 + -30 = -32 (100000) +-2 + -29 = -31 (100001) +-2 + -28 = -30 (100010) +-2 + -27 = -29 (100011) +-2 + -26 = -28 (100100) +-2 + -25 = -27 (100101) +-2 + -24 = -26 (100110) +-2 + -23 = -25 (100111) +-2 + -22 = -24 (101000) +-2 + -21 = -23 (101001) +-2 + -20 = -22 (101010) +-2 + -19 = -21 (101011) +-2 + -18 = -20 (101100) +-2 + -17 = -19 (101101) +-2 + -16 = -18 (101110) +-2 + -15 = -17 (101111) +-2 + -14 = -16 (110000) +-2 + -13 = -15 (110001) +-2 + -12 = -14 (110010) +-2 + -11 = -13 (110011) +-2 + -10 = -12 (110100) +-2 + -9 = -11 (110101) +-2 + -8 = -10 (110110) +-2 + -7 = -9 (110111) +-2 + -6 = -8 (111000) +-2 + -5 = -7 (111001) +-2 + -4 = -6 (111010) +-2 + -3 = -5 (111011) +-2 + -2 = -4 (111100) +-2 + -1 = -3 (111101) +-1 + 0 = -1 (111111) +-1 + 1 = 0 (000000) +-1 + 2 = 1 (000001) +-1 + 3 = 2 (000010) +-1 + 4 = 3 (000011) +-1 + 5 = 4 (000100) +-1 + 6 = 5 (000101) +-1 + 7 = 6 (000110) +-1 + 8 = 7 (000111) +-1 + 9 = 8 (001000) +-1 + 10 = 9 (001001) +-1 + 11 = 10 (001010) +-1 + 12 = 11 (001011) +-1 + 13 = 12 (001100) +-1 + 14 = 13 (001101) +-1 + 15 = 14 (001110) +-1 + 16 = 15 (001111) +-1 + 17 = 16 (010000) +-1 + 18 = 17 (010001) +-1 + 19 = 18 (010010) +-1 + 20 = 19 (010011) +-1 + 21 = 20 (010100) +-1 + 22 = 21 (010101) +-1 + 23 = 22 (010110) +-1 + 24 = 23 (010111) +-1 + 25 = 24 (011000) +-1 + 26 = 25 (011001) +-1 + 27 = 26 (011010) +-1 + 28 = 27 (011011) +-1 + 29 = 28 (011100) +-1 + 30 = 29 (011101) +-1 + 31 = 30 (011110) +-1 + -32 = 31 (011111) +-1 + -31 = -32 (100000) +-1 + -30 = -31 (100001) +-1 + -29 = -30 (100010) +-1 + -28 = -29 (100011) +-1 + -27 = -28 (100100) +-1 + -26 = -27 (100101) +-1 + -25 = -26 (100110) +-1 + -24 = -25 (100111) +-1 + -23 = -24 (101000) +-1 + -22 = -23 (101001) +-1 + -21 = -22 (101010) +-1 + -20 = -21 (101011) +-1 + -19 = -20 (101100) +-1 + -18 = -19 (101101) +-1 + -17 = -18 (101110) +-1 + -16 = -17 (101111) +-1 + -15 = -16 (110000) +-1 + -14 = -15 (110001) +-1 + -13 = -14 (110010) +-1 + -12 = -13 (110011) +-1 + -11 = -12 (110100) +-1 + -10 = -11 (110101) +-1 + -9 = -10 (110110) +-1 + -8 = -9 (110111) +-1 + -7 = -8 (111000) +-1 + -6 = -7 (111001) +-1 + -5 = -6 (111010) +-1 + -4 = -5 (111011) +-1 + -3 = -4 (111100) +-1 + -2 = -3 (111101) +-1 + -1 = -2 (111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/main.cpp new file mode 100644 index 000000000..5990e96a7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 6-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 6; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector6 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/promote_lost_carry.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/promote_lost_carry.f new file mode 100644 index 000000000..052991cee --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/promote_lost_carry.f @@ -0,0 +1,3 @@ +promote_lost_carry/datawidth.cpp +promote_lost_carry/stimgen.cpp +promote_lost_carry/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/stimgen.h new file mode 100644 index 000000000..e2675e0b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_lost_carry/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/common.h new file mode 100644 index 000000000..2e2569230 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/datawidth.cpp new file mode 100644 index 000000000..25913d4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_signed tmp_a (in1_width); + sc_signed tmp_b (in2_width); + sc_signed tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/datawidth.h new file mode 100644 index 000000000..12f04c9be --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector4& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector4& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/golden/promote_truncation.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/golden/promote_truncation.log new file mode 100644 index 000000000..081cff3dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/golden/promote_truncation.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000) +0 + 1 = 1 (0001) +0 + 2 = 2 (0010) +0 + 3 = 3 (0011) +0 + 4 = 4 (0100) +0 + 5 = 5 (0101) +0 + 6 = 6 (0110) +0 + 7 = 7 (0111) +0 + 8 = -8 (1000) +0 + 9 = -7 (1001) +0 + 10 = -6 (1010) +0 + 11 = -5 (1011) +0 + 12 = -4 (1100) +0 + 13 = -3 (1101) +0 + 14 = -2 (1110) +0 + 15 = -1 (1111) +0 + 16 = 0 (0000) +0 + 17 = 1 (0001) +0 + 18 = 2 (0010) +0 + 19 = 3 (0011) +0 + 20 = 4 (0100) +0 + 21 = 5 (0101) +0 + 22 = 6 (0110) +0 + 23 = 7 (0111) +0 + 24 = -8 (1000) +0 + 25 = -7 (1001) +0 + 26 = -6 (1010) +0 + 27 = -5 (1011) +0 + 28 = -4 (1100) +0 + 29 = -3 (1101) +0 + 30 = -2 (1110) +0 + 31 = -1 (1111) +0 + -32 = 0 (0000) +0 + -31 = 1 (0001) +0 + -30 = 2 (0010) +0 + -29 = 3 (0011) +0 + -28 = 4 (0100) +0 + -27 = 5 (0101) +0 + -26 = 6 (0110) +0 + -25 = 7 (0111) +0 + -24 = -8 (1000) +0 + -23 = -7 (1001) +0 + -22 = -6 (1010) +0 + -21 = -5 (1011) +0 + -20 = -4 (1100) +0 + -19 = -3 (1101) +0 + -18 = -2 (1110) +0 + -17 = -1 (1111) +0 + -16 = 0 (0000) +0 + -15 = 1 (0001) +0 + -14 = 2 (0010) +0 + -13 = 3 (0011) +0 + -12 = 4 (0100) +0 + -11 = 5 (0101) +0 + -10 = 6 (0110) +0 + -9 = 7 (0111) +0 + -8 = -8 (1000) +0 + -7 = -7 (1001) +0 + -6 = -6 (1010) +0 + -5 = -5 (1011) +0 + -4 = -4 (1100) +0 + -3 = -3 (1101) +0 + -2 = -2 (1110) +0 + -1 = -1 (1111) +1 + 0 = 1 (0001) +1 + 1 = 2 (0010) +1 + 2 = 3 (0011) +1 + 3 = 4 (0100) +1 + 4 = 5 (0101) +1 + 5 = 6 (0110) +1 + 6 = 7 (0111) +1 + 7 = -8 (1000) +1 + 8 = -7 (1001) +1 + 9 = -6 (1010) +1 + 10 = -5 (1011) +1 + 11 = -4 (1100) +1 + 12 = -3 (1101) +1 + 13 = -2 (1110) +1 + 14 = -1 (1111) +1 + 15 = 0 (0000) +1 + 16 = 1 (0001) +1 + 17 = 2 (0010) +1 + 18 = 3 (0011) +1 + 19 = 4 (0100) +1 + 20 = 5 (0101) +1 + 21 = 6 (0110) +1 + 22 = 7 (0111) +1 + 23 = -8 (1000) +1 + 24 = -7 (1001) +1 + 25 = -6 (1010) +1 + 26 = -5 (1011) +1 + 27 = -4 (1100) +1 + 28 = -3 (1101) +1 + 29 = -2 (1110) +1 + 30 = -1 (1111) +1 + 31 = 0 (0000) +1 + -32 = 1 (0001) +1 + -31 = 2 (0010) +1 + -30 = 3 (0011) +1 + -29 = 4 (0100) +1 + -28 = 5 (0101) +1 + -27 = 6 (0110) +1 + -26 = 7 (0111) +1 + -25 = -8 (1000) +1 + -24 = -7 (1001) +1 + -23 = -6 (1010) +1 + -22 = -5 (1011) +1 + -21 = -4 (1100) +1 + -20 = -3 (1101) +1 + -19 = -2 (1110) +1 + -18 = -1 (1111) +1 + -17 = 0 (0000) +1 + -16 = 1 (0001) +1 + -15 = 2 (0010) +1 + -14 = 3 (0011) +1 + -13 = 4 (0100) +1 + -12 = 5 (0101) +1 + -11 = 6 (0110) +1 + -10 = 7 (0111) +1 + -9 = -8 (1000) +1 + -8 = -7 (1001) +1 + -7 = -6 (1010) +1 + -6 = -5 (1011) +1 + -5 = -4 (1100) +1 + -4 = -3 (1101) +1 + -3 = -2 (1110) +1 + -2 = -1 (1111) +1 + -1 = 0 (0000) +2 + 0 = 2 (0010) +2 + 1 = 3 (0011) +2 + 2 = 4 (0100) +2 + 3 = 5 (0101) +2 + 4 = 6 (0110) +2 + 5 = 7 (0111) +2 + 6 = -8 (1000) +2 + 7 = -7 (1001) +2 + 8 = -6 (1010) +2 + 9 = -5 (1011) +2 + 10 = -4 (1100) +2 + 11 = -3 (1101) +2 + 12 = -2 (1110) +2 + 13 = -1 (1111) +2 + 14 = 0 (0000) +2 + 15 = 1 (0001) +2 + 16 = 2 (0010) +2 + 17 = 3 (0011) +2 + 18 = 4 (0100) +2 + 19 = 5 (0101) +2 + 20 = 6 (0110) +2 + 21 = 7 (0111) +2 + 22 = -8 (1000) +2 + 23 = -7 (1001) +2 + 24 = -6 (1010) +2 + 25 = -5 (1011) +2 + 26 = -4 (1100) +2 + 27 = -3 (1101) +2 + 28 = -2 (1110) +2 + 29 = -1 (1111) +2 + 30 = 0 (0000) +2 + 31 = 1 (0001) +2 + -32 = 2 (0010) +2 + -31 = 3 (0011) +2 + -30 = 4 (0100) +2 + -29 = 5 (0101) +2 + -28 = 6 (0110) +2 + -27 = 7 (0111) +2 + -26 = -8 (1000) +2 + -25 = -7 (1001) +2 + -24 = -6 (1010) +2 + -23 = -5 (1011) +2 + -22 = -4 (1100) +2 + -21 = -3 (1101) +2 + -20 = -2 (1110) +2 + -19 = -1 (1111) +2 + -18 = 0 (0000) +2 + -17 = 1 (0001) +2 + -16 = 2 (0010) +2 + -15 = 3 (0011) +2 + -14 = 4 (0100) +2 + -13 = 5 (0101) +2 + -12 = 6 (0110) +2 + -11 = 7 (0111) +2 + -10 = -8 (1000) +2 + -9 = -7 (1001) +2 + -8 = -6 (1010) +2 + -7 = -5 (1011) +2 + -6 = -4 (1100) +2 + -5 = -3 (1101) +2 + -4 = -2 (1110) +2 + -3 = -1 (1111) +2 + -2 = 0 (0000) +2 + -1 = 1 (0001) +3 + 0 = 3 (0011) +3 + 1 = 4 (0100) +3 + 2 = 5 (0101) +3 + 3 = 6 (0110) +3 + 4 = 7 (0111) +3 + 5 = -8 (1000) +3 + 6 = -7 (1001) +3 + 7 = -6 (1010) +3 + 8 = -5 (1011) +3 + 9 = -4 (1100) +3 + 10 = -3 (1101) +3 + 11 = -2 (1110) +3 + 12 = -1 (1111) +3 + 13 = 0 (0000) +3 + 14 = 1 (0001) +3 + 15 = 2 (0010) +3 + 16 = 3 (0011) +3 + 17 = 4 (0100) +3 + 18 = 5 (0101) +3 + 19 = 6 (0110) +3 + 20 = 7 (0111) +3 + 21 = -8 (1000) +3 + 22 = -7 (1001) +3 + 23 = -6 (1010) +3 + 24 = -5 (1011) +3 + 25 = -4 (1100) +3 + 26 = -3 (1101) +3 + 27 = -2 (1110) +3 + 28 = -1 (1111) +3 + 29 = 0 (0000) +3 + 30 = 1 (0001) +3 + 31 = 2 (0010) +3 + -32 = 3 (0011) +3 + -31 = 4 (0100) +3 + -30 = 5 (0101) +3 + -29 = 6 (0110) +3 + -28 = 7 (0111) +3 + -27 = -8 (1000) +3 + -26 = -7 (1001) +3 + -25 = -6 (1010) +3 + -24 = -5 (1011) +3 + -23 = -4 (1100) +3 + -22 = -3 (1101) +3 + -21 = -2 (1110) +3 + -20 = -1 (1111) +3 + -19 = 0 (0000) +3 + -18 = 1 (0001) +3 + -17 = 2 (0010) +3 + -16 = 3 (0011) +3 + -15 = 4 (0100) +3 + -14 = 5 (0101) +3 + -13 = 6 (0110) +3 + -12 = 7 (0111) +3 + -11 = -8 (1000) +3 + -10 = -7 (1001) +3 + -9 = -6 (1010) +3 + -8 = -5 (1011) +3 + -7 = -4 (1100) +3 + -6 = -3 (1101) +3 + -5 = -2 (1110) +3 + -4 = -1 (1111) +3 + -3 = 0 (0000) +3 + -2 = 1 (0001) +3 + -1 = 2 (0010) +4 + 0 = 4 (0100) +4 + 1 = 5 (0101) +4 + 2 = 6 (0110) +4 + 3 = 7 (0111) +4 + 4 = -8 (1000) +4 + 5 = -7 (1001) +4 + 6 = -6 (1010) +4 + 7 = -5 (1011) +4 + 8 = -4 (1100) +4 + 9 = -3 (1101) +4 + 10 = -2 (1110) +4 + 11 = -1 (1111) +4 + 12 = 0 (0000) +4 + 13 = 1 (0001) +4 + 14 = 2 (0010) +4 + 15 = 3 (0011) +4 + 16 = 4 (0100) +4 + 17 = 5 (0101) +4 + 18 = 6 (0110) +4 + 19 = 7 (0111) +4 + 20 = -8 (1000) +4 + 21 = -7 (1001) +4 + 22 = -6 (1010) +4 + 23 = -5 (1011) +4 + 24 = -4 (1100) +4 + 25 = -3 (1101) +4 + 26 = -2 (1110) +4 + 27 = -1 (1111) +4 + 28 = 0 (0000) +4 + 29 = 1 (0001) +4 + 30 = 2 (0010) +4 + 31 = 3 (0011) +4 + -32 = 4 (0100) +4 + -31 = 5 (0101) +4 + -30 = 6 (0110) +4 + -29 = 7 (0111) +4 + -28 = -8 (1000) +4 + -27 = -7 (1001) +4 + -26 = -6 (1010) +4 + -25 = -5 (1011) +4 + -24 = -4 (1100) +4 + -23 = -3 (1101) +4 + -22 = -2 (1110) +4 + -21 = -1 (1111) +4 + -20 = 0 (0000) +4 + -19 = 1 (0001) +4 + -18 = 2 (0010) +4 + -17 = 3 (0011) +4 + -16 = 4 (0100) +4 + -15 = 5 (0101) +4 + -14 = 6 (0110) +4 + -13 = 7 (0111) +4 + -12 = -8 (1000) +4 + -11 = -7 (1001) +4 + -10 = -6 (1010) +4 + -9 = -5 (1011) +4 + -8 = -4 (1100) +4 + -7 = -3 (1101) +4 + -6 = -2 (1110) +4 + -5 = -1 (1111) +4 + -4 = 0 (0000) +4 + -3 = 1 (0001) +4 + -2 = 2 (0010) +4 + -1 = 3 (0011) +5 + 0 = 5 (0101) +5 + 1 = 6 (0110) +5 + 2 = 7 (0111) +5 + 3 = -8 (1000) +5 + 4 = -7 (1001) +5 + 5 = -6 (1010) +5 + 6 = -5 (1011) +5 + 7 = -4 (1100) +5 + 8 = -3 (1101) +5 + 9 = -2 (1110) +5 + 10 = -1 (1111) +5 + 11 = 0 (0000) +5 + 12 = 1 (0001) +5 + 13 = 2 (0010) +5 + 14 = 3 (0011) +5 + 15 = 4 (0100) +5 + 16 = 5 (0101) +5 + 17 = 6 (0110) +5 + 18 = 7 (0111) +5 + 19 = -8 (1000) +5 + 20 = -7 (1001) +5 + 21 = -6 (1010) +5 + 22 = -5 (1011) +5 + 23 = -4 (1100) +5 + 24 = -3 (1101) +5 + 25 = -2 (1110) +5 + 26 = -1 (1111) +5 + 27 = 0 (0000) +5 + 28 = 1 (0001) +5 + 29 = 2 (0010) +5 + 30 = 3 (0011) +5 + 31 = 4 (0100) +5 + -32 = 5 (0101) +5 + -31 = 6 (0110) +5 + -30 = 7 (0111) +5 + -29 = -8 (1000) +5 + -28 = -7 (1001) +5 + -27 = -6 (1010) +5 + -26 = -5 (1011) +5 + -25 = -4 (1100) +5 + -24 = -3 (1101) +5 + -23 = -2 (1110) +5 + -22 = -1 (1111) +5 + -21 = 0 (0000) +5 + -20 = 1 (0001) +5 + -19 = 2 (0010) +5 + -18 = 3 (0011) +5 + -17 = 4 (0100) +5 + -16 = 5 (0101) +5 + -15 = 6 (0110) +5 + -14 = 7 (0111) +5 + -13 = -8 (1000) +5 + -12 = -7 (1001) +5 + -11 = -6 (1010) +5 + -10 = -5 (1011) +5 + -9 = -4 (1100) +5 + -8 = -3 (1101) +5 + -7 = -2 (1110) +5 + -6 = -1 (1111) +5 + -5 = 0 (0000) +5 + -4 = 1 (0001) +5 + -3 = 2 (0010) +5 + -2 = 3 (0011) +5 + -1 = 4 (0100) +6 + 0 = 6 (0110) +6 + 1 = 7 (0111) +6 + 2 = -8 (1000) +6 + 3 = -7 (1001) +6 + 4 = -6 (1010) +6 + 5 = -5 (1011) +6 + 6 = -4 (1100) +6 + 7 = -3 (1101) +6 + 8 = -2 (1110) +6 + 9 = -1 (1111) +6 + 10 = 0 (0000) +6 + 11 = 1 (0001) +6 + 12 = 2 (0010) +6 + 13 = 3 (0011) +6 + 14 = 4 (0100) +6 + 15 = 5 (0101) +6 + 16 = 6 (0110) +6 + 17 = 7 (0111) +6 + 18 = -8 (1000) +6 + 19 = -7 (1001) +6 + 20 = -6 (1010) +6 + 21 = -5 (1011) +6 + 22 = -4 (1100) +6 + 23 = -3 (1101) +6 + 24 = -2 (1110) +6 + 25 = -1 (1111) +6 + 26 = 0 (0000) +6 + 27 = 1 (0001) +6 + 28 = 2 (0010) +6 + 29 = 3 (0011) +6 + 30 = 4 (0100) +6 + 31 = 5 (0101) +6 + -32 = 6 (0110) +6 + -31 = 7 (0111) +6 + -30 = -8 (1000) +6 + -29 = -7 (1001) +6 + -28 = -6 (1010) +6 + -27 = -5 (1011) +6 + -26 = -4 (1100) +6 + -25 = -3 (1101) +6 + -24 = -2 (1110) +6 + -23 = -1 (1111) +6 + -22 = 0 (0000) +6 + -21 = 1 (0001) +6 + -20 = 2 (0010) +6 + -19 = 3 (0011) +6 + -18 = 4 (0100) +6 + -17 = 5 (0101) +6 + -16 = 6 (0110) +6 + -15 = 7 (0111) +6 + -14 = -8 (1000) +6 + -13 = -7 (1001) +6 + -12 = -6 (1010) +6 + -11 = -5 (1011) +6 + -10 = -4 (1100) +6 + -9 = -3 (1101) +6 + -8 = -2 (1110) +6 + -7 = -1 (1111) +6 + -6 = 0 (0000) +6 + -5 = 1 (0001) +6 + -4 = 2 (0010) +6 + -3 = 3 (0011) +6 + -2 = 4 (0100) +6 + -1 = 5 (0101) +7 + 0 = 7 (0111) +7 + 1 = -8 (1000) +7 + 2 = -7 (1001) +7 + 3 = -6 (1010) +7 + 4 = -5 (1011) +7 + 5 = -4 (1100) +7 + 6 = -3 (1101) +7 + 7 = -2 (1110) +7 + 8 = -1 (1111) +7 + 9 = 0 (0000) +7 + 10 = 1 (0001) +7 + 11 = 2 (0010) +7 + 12 = 3 (0011) +7 + 13 = 4 (0100) +7 + 14 = 5 (0101) +7 + 15 = 6 (0110) +7 + 16 = 7 (0111) +7 + 17 = -8 (1000) +7 + 18 = -7 (1001) +7 + 19 = -6 (1010) +7 + 20 = -5 (1011) +7 + 21 = -4 (1100) +7 + 22 = -3 (1101) +7 + 23 = -2 (1110) +7 + 24 = -1 (1111) +7 + 25 = 0 (0000) +7 + 26 = 1 (0001) +7 + 27 = 2 (0010) +7 + 28 = 3 (0011) +7 + 29 = 4 (0100) +7 + 30 = 5 (0101) +7 + 31 = 6 (0110) +7 + -32 = 7 (0111) +7 + -31 = -8 (1000) +7 + -30 = -7 (1001) +7 + -29 = -6 (1010) +7 + -28 = -5 (1011) +7 + -27 = -4 (1100) +7 + -26 = -3 (1101) +7 + -25 = -2 (1110) +7 + -24 = -1 (1111) +7 + -23 = 0 (0000) +7 + -22 = 1 (0001) +7 + -21 = 2 (0010) +7 + -20 = 3 (0011) +7 + -19 = 4 (0100) +7 + -18 = 5 (0101) +7 + -17 = 6 (0110) +7 + -16 = 7 (0111) +7 + -15 = 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+-8 + 31 = 7 (0111) +-8 + -32 = -8 (1000) +-8 + -31 = -7 (1001) +-8 + -30 = -6 (1010) +-8 + -29 = -5 (1011) +-8 + -28 = -4 (1100) +-8 + -27 = -3 (1101) +-8 + -26 = -2 (1110) +-8 + -25 = -1 (1111) +-8 + -24 = 0 (0000) +-8 + -23 = 1 (0001) +-8 + -22 = 2 (0010) +-8 + -21 = 3 (0011) +-8 + -20 = 4 (0100) +-8 + -19 = 5 (0101) +-8 + -18 = 6 (0110) +-8 + -17 = 7 (0111) +-8 + -16 = -8 (1000) +-8 + -15 = -7 (1001) +-8 + -14 = -6 (1010) +-8 + -13 = -5 (1011) +-8 + -12 = -4 (1100) +-8 + -11 = -3 (1101) +-8 + -10 = -2 (1110) +-8 + -9 = -1 (1111) +-8 + -8 = 0 (0000) +-8 + -7 = 1 (0001) +-8 + -6 = 2 (0010) +-8 + -5 = 3 (0011) +-8 + -4 = 4 (0100) +-8 + -3 = 5 (0101) +-8 + -2 = 6 (0110) +-8 + -1 = 7 (0111) +-7 + 0 = -7 (1001) +-7 + 1 = -6 (1010) +-7 + 2 = -5 (1011) +-7 + 3 = -4 (1100) +-7 + 4 = -3 (1101) +-7 + 5 = -2 (1110) +-7 + 6 = -1 (1111) +-7 + 7 = 0 (0000) +-7 + 8 = 1 (0001) +-7 + 9 = 2 (0010) +-7 + 10 = 3 (0011) +-7 + 11 = 4 (0100) +-7 + 12 = 5 (0101) +-7 + 13 = 6 (0110) +-7 + 14 = 7 (0111) +-7 + 15 = -8 (1000) +-7 + 16 = -7 (1001) +-7 + 17 = -6 (1010) +-7 + 18 = -5 (1011) +-7 + 19 = -4 (1100) +-7 + 20 = -3 (1101) +-7 + 21 = -2 (1110) +-7 + 22 = -1 (1111) +-7 + 23 = 0 (0000) +-7 + 24 = 1 (0001) +-7 + 25 = 2 (0010) +-7 + 26 = 3 (0011) +-7 + 27 = 4 (0100) +-7 + 28 = 5 (0101) +-7 + 29 = 6 (0110) +-7 + 30 = 7 (0111) +-7 + 31 = -8 (1000) +-7 + -32 = -7 (1001) +-7 + -31 = -6 (1010) +-7 + -30 = -5 (1011) +-7 + -29 = -4 (1100) +-7 + -28 = -3 (1101) +-7 + -27 = -2 (1110) +-7 + -26 = -1 (1111) +-7 + -25 = 0 (0000) +-7 + -24 = 1 (0001) +-7 + -23 = 2 (0010) +-7 + -22 = 3 (0011) +-7 + -21 = 4 (0100) +-7 + -20 = 5 (0101) +-7 + -19 = 6 (0110) +-7 + -18 = 7 (0111) +-7 + -17 = -8 (1000) +-7 + -16 = -7 (1001) +-7 + -15 = -6 (1010) +-7 + -14 = -5 (1011) +-7 + -13 = -4 (1100) +-7 + -12 = -3 (1101) +-7 + -11 = -2 (1110) +-7 + -10 = -1 (1111) +-7 + -9 = 0 (0000) +-7 + -8 = 1 (0001) +-7 + -7 = 2 (0010) +-7 + -6 = 3 (0011) +-7 + -5 = 4 (0100) +-7 + -4 = 5 (0101) +-7 + -3 = 6 (0110) +-7 + -2 = 7 (0111) +-7 + -1 = -8 (1000) +-6 + 0 = -6 (1010) +-6 + 1 = -5 (1011) +-6 + 2 = -4 (1100) +-6 + 3 = -3 (1101) +-6 + 4 = -2 (1110) +-6 + 5 = -1 (1111) +-6 + 6 = 0 (0000) +-6 + 7 = 1 (0001) +-6 + 8 = 2 (0010) +-6 + 9 = 3 (0011) +-6 + 10 = 4 (0100) +-6 + 11 = 5 (0101) +-6 + 12 = 6 (0110) +-6 + 13 = 7 (0111) +-6 + 14 = -8 (1000) +-6 + 15 = -7 (1001) +-6 + 16 = -6 (1010) +-6 + 17 = -5 (1011) +-6 + 18 = -4 (1100) +-6 + 19 = -3 (1101) +-6 + 20 = -2 (1110) +-6 + 21 = -1 (1111) +-6 + 22 = 0 (0000) +-6 + 23 = 1 (0001) +-6 + 24 = 2 (0010) +-6 + 25 = 3 (0011) +-6 + 26 = 4 (0100) +-6 + 27 = 5 (0101) +-6 + 28 = 6 (0110) +-6 + 29 = 7 (0111) +-6 + 30 = -8 (1000) +-6 + 31 = -7 (1001) +-6 + -32 = -6 (1010) +-6 + -31 = -5 (1011) +-6 + -30 = -4 (1100) +-6 + -29 = -3 (1101) +-6 + -28 = -2 (1110) +-6 + -27 = -1 (1111) +-6 + -26 = 0 (0000) +-6 + -25 = 1 (0001) +-6 + -24 = 2 (0010) +-6 + -23 = 3 (0011) +-6 + -22 = 4 (0100) +-6 + -21 = 5 (0101) +-6 + -20 = 6 (0110) +-6 + -19 = 7 (0111) +-6 + -18 = -8 (1000) +-6 + -17 = -7 (1001) +-6 + -16 = -6 (1010) +-6 + -15 = -5 (1011) +-6 + -14 = -4 (1100) +-6 + -13 = -3 (1101) +-6 + -12 = -2 (1110) +-6 + -11 = -1 (1111) +-6 + -10 = 0 (0000) +-6 + -9 = 1 (0001) +-6 + -8 = 2 (0010) +-6 + -7 = 3 (0011) +-6 + -6 = 4 (0100) +-6 + -5 = 5 (0101) +-6 + -4 = 6 (0110) +-6 + -3 = 7 (0111) +-6 + -2 = -8 (1000) +-6 + -1 = -7 (1001) +-5 + 0 = -5 (1011) +-5 + 1 = -4 (1100) +-5 + 2 = -3 (1101) +-5 + 3 = -2 (1110) +-5 + 4 = -1 (1111) +-5 + 5 = 0 (0000) +-5 + 6 = 1 (0001) +-5 + 7 = 2 (0010) +-5 + 8 = 3 (0011) +-5 + 9 = 4 (0100) +-5 + 10 = 5 (0101) +-5 + 11 = 6 (0110) +-5 + 12 = 7 (0111) +-5 + 13 = -8 (1000) +-5 + 14 = -7 (1001) +-5 + 15 = -6 (1010) +-5 + 16 = -5 (1011) +-5 + 17 = -4 (1100) +-5 + 18 = -3 (1101) +-5 + 19 = -2 (1110) +-5 + 20 = -1 (1111) +-5 + 21 = 0 (0000) +-5 + 22 = 1 (0001) +-5 + 23 = 2 (0010) +-5 + 24 = 3 (0011) +-5 + 25 = 4 (0100) +-5 + 26 = 5 (0101) +-5 + 27 = 6 (0110) +-5 + 28 = 7 (0111) +-5 + 29 = -8 (1000) +-5 + 30 = -7 (1001) +-5 + 31 = -6 (1010) +-5 + -32 = -5 (1011) +-5 + -31 = -4 (1100) +-5 + -30 = -3 (1101) +-5 + -29 = -2 (1110) +-5 + -28 = -1 (1111) +-5 + -27 = 0 (0000) +-5 + -26 = 1 (0001) +-5 + -25 = 2 (0010) +-5 + -24 = 3 (0011) +-5 + -23 = 4 (0100) +-5 + -22 = 5 (0101) +-5 + -21 = 6 (0110) +-5 + -20 = 7 (0111) +-5 + -19 = -8 (1000) +-5 + -18 = -7 (1001) +-5 + -17 = -6 (1010) +-5 + -16 = -5 (1011) +-5 + -15 = -4 (1100) +-5 + -14 = -3 (1101) +-5 + -13 = -2 (1110) +-5 + -12 = -1 (1111) +-5 + -11 = 0 (0000) +-5 + -10 = 1 (0001) +-5 + -9 = 2 (0010) +-5 + -8 = 3 (0011) +-5 + -7 = 4 (0100) +-5 + -6 = 5 (0101) +-5 + -5 = 6 (0110) +-5 + -4 = 7 (0111) +-5 + -3 = -8 (1000) +-5 + -2 = -7 (1001) +-5 + -1 = -6 (1010) +-4 + 0 = -4 (1100) +-4 + 1 = -3 (1101) +-4 + 2 = -2 (1110) +-4 + 3 = -1 (1111) +-4 + 4 = 0 (0000) +-4 + 5 = 1 (0001) +-4 + 6 = 2 (0010) +-4 + 7 = 3 (0011) +-4 + 8 = 4 (0100) +-4 + 9 = 5 (0101) +-4 + 10 = 6 (0110) +-4 + 11 = 7 (0111) +-4 + 12 = -8 (1000) +-4 + 13 = -7 (1001) +-4 + 14 = -6 (1010) +-4 + 15 = -5 (1011) +-4 + 16 = -4 (1100) +-4 + 17 = -3 (1101) +-4 + 18 = -2 (1110) +-4 + 19 = -1 (1111) +-4 + 20 = 0 (0000) +-4 + 21 = 1 (0001) +-4 + 22 = 2 (0010) +-4 + 23 = 3 (0011) +-4 + 24 = 4 (0100) +-4 + 25 = 5 (0101) +-4 + 26 = 6 (0110) +-4 + 27 = 7 (0111) +-4 + 28 = -8 (1000) +-4 + 29 = -7 (1001) +-4 + 30 = -6 (1010) +-4 + 31 = -5 (1011) +-4 + -32 = -4 (1100) +-4 + -31 = -3 (1101) +-4 + -30 = -2 (1110) +-4 + -29 = -1 (1111) +-4 + -28 = 0 (0000) +-4 + -27 = 1 (0001) +-4 + -26 = 2 (0010) +-4 + -25 = 3 (0011) +-4 + -24 = 4 (0100) +-4 + -23 = 5 (0101) +-4 + -22 = 6 (0110) +-4 + -21 = 7 (0111) +-4 + -20 = -8 (1000) +-4 + -19 = -7 (1001) +-4 + -18 = -6 (1010) +-4 + -17 = -5 (1011) +-4 + -16 = -4 (1100) +-4 + -15 = -3 (1101) +-4 + -14 = -2 (1110) +-4 + -13 = -1 (1111) +-4 + -12 = 0 (0000) +-4 + -11 = 1 (0001) +-4 + -10 = 2 (0010) +-4 + -9 = 3 (0011) +-4 + -8 = 4 (0100) +-4 + -7 = 5 (0101) +-4 + -6 = 6 (0110) +-4 + -5 = 7 (0111) +-4 + -4 = -8 (1000) +-4 + -3 = -7 (1001) +-4 + -2 = -6 (1010) +-4 + -1 = -5 (1011) +-3 + 0 = -3 (1101) +-3 + 1 = -2 (1110) +-3 + 2 = -1 (1111) +-3 + 3 = 0 (0000) +-3 + 4 = 1 (0001) +-3 + 5 = 2 (0010) +-3 + 6 = 3 (0011) +-3 + 7 = 4 (0100) +-3 + 8 = 5 (0101) +-3 + 9 = 6 (0110) +-3 + 10 = 7 (0111) +-3 + 11 = -8 (1000) +-3 + 12 = -7 (1001) +-3 + 13 = -6 (1010) +-3 + 14 = -5 (1011) +-3 + 15 = -4 (1100) +-3 + 16 = -3 (1101) +-3 + 17 = -2 (1110) +-3 + 18 = -1 (1111) +-3 + 19 = 0 (0000) +-3 + 20 = 1 (0001) +-3 + 21 = 2 (0010) +-3 + 22 = 3 (0011) +-3 + 23 = 4 (0100) +-3 + 24 = 5 (0101) +-3 + 25 = 6 (0110) +-3 + 26 = 7 (0111) +-3 + 27 = -8 (1000) +-3 + 28 = -7 (1001) +-3 + 29 = -6 (1010) +-3 + 30 = -5 (1011) +-3 + 31 = -4 (1100) +-3 + -32 = -3 (1101) +-3 + -31 = -2 (1110) +-3 + -30 = -1 (1111) +-3 + -29 = 0 (0000) +-3 + -28 = 1 (0001) +-3 + -27 = 2 (0010) +-3 + -26 = 3 (0011) +-3 + -25 = 4 (0100) +-3 + -24 = 5 (0101) +-3 + -23 = 6 (0110) +-3 + -22 = 7 (0111) +-3 + -21 = -8 (1000) +-3 + -20 = -7 (1001) +-3 + -19 = -6 (1010) +-3 + -18 = -5 (1011) +-3 + -17 = -4 (1100) +-3 + -16 = -3 (1101) +-3 + -15 = -2 (1110) +-3 + -14 = -1 (1111) +-3 + -13 = 0 (0000) +-3 + -12 = 1 (0001) +-3 + -11 = 2 (0010) +-3 + -10 = 3 (0011) +-3 + -9 = 4 (0100) +-3 + -8 = 5 (0101) +-3 + -7 = 6 (0110) +-3 + -6 = 7 (0111) +-3 + -5 = -8 (1000) +-3 + -4 = -7 (1001) +-3 + -3 = -6 (1010) +-3 + -2 = -5 (1011) +-3 + -1 = -4 (1100) +-2 + 0 = -2 (1110) +-2 + 1 = -1 (1111) +-2 + 2 = 0 (0000) +-2 + 3 = 1 (0001) +-2 + 4 = 2 (0010) +-2 + 5 = 3 (0011) +-2 + 6 = 4 (0100) +-2 + 7 = 5 (0101) +-2 + 8 = 6 (0110) +-2 + 9 = 7 (0111) +-2 + 10 = -8 (1000) +-2 + 11 = -7 (1001) +-2 + 12 = -6 (1010) +-2 + 13 = -5 (1011) +-2 + 14 = -4 (1100) +-2 + 15 = -3 (1101) +-2 + 16 = -2 (1110) +-2 + 17 = -1 (1111) +-2 + 18 = 0 (0000) +-2 + 19 = 1 (0001) +-2 + 20 = 2 (0010) +-2 + 21 = 3 (0011) +-2 + 22 = 4 (0100) +-2 + 23 = 5 (0101) +-2 + 24 = 6 (0110) +-2 + 25 = 7 (0111) +-2 + 26 = -8 (1000) +-2 + 27 = -7 (1001) +-2 + 28 = -6 (1010) +-2 + 29 = -5 (1011) +-2 + 30 = -4 (1100) +-2 + 31 = -3 (1101) +-2 + -32 = -2 (1110) +-2 + -31 = -1 (1111) +-2 + -30 = 0 (0000) +-2 + -29 = 1 (0001) +-2 + -28 = 2 (0010) +-2 + -27 = 3 (0011) +-2 + -26 = 4 (0100) +-2 + -25 = 5 (0101) +-2 + -24 = 6 (0110) +-2 + -23 = 7 (0111) +-2 + -22 = -8 (1000) +-2 + -21 = -7 (1001) +-2 + -20 = -6 (1010) +-2 + -19 = -5 (1011) +-2 + -18 = -4 (1100) +-2 + -17 = -3 (1101) +-2 + -16 = -2 (1110) +-2 + -15 = -1 (1111) +-2 + -14 = 0 (0000) +-2 + -13 = 1 (0001) +-2 + -12 = 2 (0010) +-2 + -11 = 3 (0011) +-2 + -10 = 4 (0100) +-2 + -9 = 5 (0101) +-2 + -8 = 6 (0110) +-2 + -7 = 7 (0111) +-2 + -6 = -8 (1000) +-2 + -5 = -7 (1001) +-2 + -4 = -6 (1010) +-2 + -3 = -5 (1011) +-2 + -2 = -4 (1100) +-2 + -1 = -3 (1101) +-1 + 0 = -1 (1111) +-1 + 1 = 0 (0000) +-1 + 2 = 1 (0001) +-1 + 3 = 2 (0010) +-1 + 4 = 3 (0011) +-1 + 5 = 4 (0100) +-1 + 6 = 5 (0101) +-1 + 7 = 6 (0110) +-1 + 8 = 7 (0111) +-1 + 9 = -8 (1000) +-1 + 10 = -7 (1001) +-1 + 11 = -6 (1010) +-1 + 12 = -5 (1011) +-1 + 13 = -4 (1100) +-1 + 14 = -3 (1101) +-1 + 15 = -2 (1110) +-1 + 16 = -1 (1111) +-1 + 17 = 0 (0000) +-1 + 18 = 1 (0001) +-1 + 19 = 2 (0010) +-1 + 20 = 3 (0011) +-1 + 21 = 4 (0100) +-1 + 22 = 5 (0101) +-1 + 23 = 6 (0110) +-1 + 24 = 7 (0111) +-1 + 25 = -8 (1000) +-1 + 26 = -7 (1001) +-1 + 27 = -6 (1010) +-1 + 28 = -5 (1011) +-1 + 29 = -4 (1100) +-1 + 30 = -3 (1101) +-1 + 31 = -2 (1110) +-1 + -32 = -1 (1111) +-1 + -31 = 0 (0000) +-1 + -30 = 1 (0001) +-1 + -29 = 2 (0010) +-1 + -28 = 3 (0011) +-1 + -27 = 4 (0100) +-1 + -26 = 5 (0101) +-1 + -25 = 6 (0110) +-1 + -24 = 7 (0111) +-1 + -23 = -8 (1000) +-1 + -22 = -7 (1001) +-1 + -21 = -6 (1010) +-1 + -20 = -5 (1011) +-1 + -19 = -4 (1100) +-1 + -18 = -3 (1101) +-1 + -17 = -2 (1110) +-1 + -16 = -1 (1111) +-1 + -15 = 0 (0000) +-1 + -14 = 1 (0001) +-1 + -13 = 2 (0010) +-1 + -12 = 3 (0011) +-1 + -11 = 4 (0100) +-1 + -10 = 5 (0101) +-1 + -9 = 6 (0110) +-1 + -8 = 7 (0111) +-1 + -7 = -8 (1000) +-1 + -6 = -7 (1001) +-1 + -5 = -6 (1010) +-1 + -4 = -5 (1011) +-1 + -3 = -4 (1100) +-1 + -2 = -3 (1101) +-1 + -1 = -2 (1110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/main.cpp new file mode 100644 index 000000000..2aefb1d1d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 4-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 4; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector4 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/promote_truncation.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/promote_truncation.f new file mode 100644 index 000000000..90b689aca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/promote_truncation.f @@ -0,0 +1,3 @@ +promote_truncation/datawidth.cpp +promote_truncation/stimgen.cpp +promote_truncation/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/stimgen.h new file mode 100644 index 000000000..959122edf --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/promote_truncation/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/common.h new file mode 100644 index 000000000..2e2569230 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/datawidth.cpp new file mode 100644 index 000000000..f5df52dd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_unsigned tmp_a (in1_width); + sc_unsigned tmp_b (in2_width); + sc_unsigned tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/datawidth.h new file mode 100644 index 000000000..98681b45a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector4& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector4& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/golden/truncation.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/golden/truncation.log new file mode 100644 index 000000000..0787b97b7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/golden/truncation.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000) +0 + 1 = 1 (0001) +0 + 2 = 2 (0010) +0 + 3 = 3 (0011) +0 + 4 = 4 (0100) +0 + 5 = 5 (0101) +0 + 6 = 6 (0110) +0 + 7 = 7 (0111) +0 + 8 = -8 (1000) +0 + 9 = -7 (1001) +0 + 10 = -6 (1010) +0 + 11 = -5 (1011) +0 + 12 = -4 (1100) +0 + 13 = -3 (1101) +0 + 14 = -2 (1110) +0 + 15 = -1 (1111) +0 + 16 = 0 (0000) +0 + 17 = 1 (0001) +0 + 18 = 2 (0010) +0 + 19 = 3 (0011) +0 + 20 = 4 (0100) +0 + 21 = 5 (0101) +0 + 22 = 6 (0110) +0 + 23 = 7 (0111) +0 + 24 = -8 (1000) +0 + 25 = -7 (1001) +0 + 26 = -6 (1010) +0 + 27 = -5 (1011) +0 + 28 = -4 (1100) +0 + 29 = -3 (1101) +0 + 30 = -2 (1110) +0 + 31 = -1 (1111) +0 + -32 = 0 (0000) +0 + -31 = 1 (0001) +0 + -30 = 2 (0010) +0 + -29 = 3 (0011) +0 + -28 = 4 (0100) +0 + -27 = 5 (0101) +0 + -26 = 6 (0110) +0 + -25 = 7 (0111) +0 + -24 = -8 (1000) +0 + -23 = -7 (1001) +0 + -22 = -6 (1010) +0 + -21 = -5 (1011) +0 + -20 = -4 (1100) +0 + -19 = -3 (1101) +0 + -18 = -2 (1110) +0 + -17 = -1 (1111) +0 + -16 = 0 (0000) +0 + -15 = 1 (0001) +0 + -14 = 2 (0010) +0 + -13 = 3 (0011) +0 + -12 = 4 (0100) +0 + -11 = 5 (0101) +0 + -10 = 6 (0110) +0 + -9 = 7 (0111) +0 + -8 = -8 (1000) +0 + -7 = -7 (1001) +0 + -6 = -6 (1010) +0 + -5 = -5 (1011) +0 + -4 = -4 (1100) +0 + -3 = -3 (1101) +0 + -2 = -2 (1110) +0 + -1 = -1 (1111) +1 + 0 = 1 (0001) +1 + 1 = 2 (0010) +1 + 2 = 3 (0011) +1 + 3 = 4 (0100) +1 + 4 = 5 (0101) +1 + 5 = 6 (0110) +1 + 6 = 7 (0111) +1 + 7 = -8 (1000) +1 + 8 = -7 (1001) +1 + 9 = -6 (1010) +1 + 10 = -5 (1011) +1 + 11 = -4 (1100) +1 + 12 = -3 (1101) +1 + 13 = -2 (1110) +1 + 14 = -1 (1111) +1 + 15 = 0 (0000) +1 + 16 = 1 (0001) +1 + 17 = 2 (0010) +1 + 18 = 3 (0011) +1 + 19 = 4 (0100) +1 + 20 = 5 (0101) +1 + 21 = 6 (0110) +1 + 22 = 7 (0111) +1 + 23 = -8 (1000) +1 + 24 = -7 (1001) +1 + 25 = -6 (1010) +1 + 26 = -5 (1011) +1 + 27 = -4 (1100) +1 + 28 = -3 (1101) +1 + 29 = -2 (1110) +1 + 30 = -1 (1111) +1 + 31 = 0 (0000) +1 + -32 = 1 (0001) +1 + -31 = 2 (0010) +1 + -30 = 3 (0011) +1 + -29 = 4 (0100) +1 + -28 = 5 (0101) +1 + -27 = 6 (0110) +1 + -26 = 7 (0111) +1 + -25 = -8 (1000) +1 + -24 = -7 (1001) +1 + -23 = -6 (1010) +1 + -22 = -5 (1011) +1 + -21 = -4 (1100) +1 + -20 = -3 (1101) +1 + -19 = -2 (1110) +1 + -18 = -1 (1111) +1 + -17 = 0 (0000) +1 + -16 = 1 (0001) +1 + -15 = 2 (0010) +1 + -14 = 3 (0011) +1 + -13 = 4 (0100) +1 + -12 = 5 (0101) +1 + -11 = 6 (0110) +1 + -10 = 7 (0111) +1 + -9 = -8 (1000) +1 + -8 = -7 (1001) +1 + -7 = -6 (1010) +1 + -6 = -5 (1011) +1 + -5 = -4 (1100) +1 + -4 = -3 (1101) +1 + -3 = -2 (1110) +1 + -2 = -1 (1111) +1 + -1 = 0 (0000) +2 + 0 = 2 (0010) +2 + 1 = 3 (0011) +2 + 2 = 4 (0100) +2 + 3 = 5 (0101) +2 + 4 = 6 (0110) +2 + 5 = 7 (0111) +2 + 6 = -8 (1000) +2 + 7 = -7 (1001) +2 + 8 = -6 (1010) +2 + 9 = -5 (1011) +2 + 10 = -4 (1100) +2 + 11 = -3 (1101) +2 + 12 = -2 (1110) +2 + 13 = -1 (1111) +2 + 14 = 0 (0000) +2 + 15 = 1 (0001) +2 + 16 = 2 (0010) +2 + 17 = 3 (0011) +2 + 18 = 4 (0100) +2 + 19 = 5 (0101) +2 + 20 = 6 (0110) +2 + 21 = 7 (0111) +2 + 22 = -8 (1000) +2 + 23 = -7 (1001) +2 + 24 = -6 (1010) +2 + 25 = -5 (1011) +2 + 26 = -4 (1100) +2 + 27 = -3 (1101) +2 + 28 = -2 (1110) +2 + 29 = -1 (1111) +2 + 30 = 0 (0000) +2 + 31 = 1 (0001) +2 + -32 = 2 (0010) +2 + -31 = 3 (0011) +2 + -30 = 4 (0100) +2 + -29 = 5 (0101) +2 + -28 = 6 (0110) +2 + -27 = 7 (0111) +2 + -26 = -8 (1000) +2 + -25 = -7 (1001) +2 + -24 = -6 (1010) +2 + -23 = -5 (1011) +2 + -22 = -4 (1100) +2 + -21 = -3 (1101) +2 + -20 = -2 (1110) +2 + -19 = -1 (1111) +2 + -18 = 0 (0000) +2 + -17 = 1 (0001) +2 + -16 = 2 (0010) +2 + -15 = 3 (0011) +2 + -14 = 4 (0100) +2 + -13 = 5 (0101) +2 + -12 = 6 (0110) +2 + -11 = 7 (0111) +2 + -10 = -8 (1000) +2 + -9 = -7 (1001) +2 + -8 = -6 (1010) +2 + -7 = -5 (1011) +2 + -6 = -4 (1100) +2 + -5 = -3 (1101) +2 + -4 = -2 (1110) +2 + -3 = -1 (1111) +2 + -2 = 0 (0000) +2 + -1 = 1 (0001) +3 + 0 = 3 (0011) +3 + 1 = 4 (0100) +3 + 2 = 5 (0101) +3 + 3 = 6 (0110) +3 + 4 = 7 (0111) +3 + 5 = -8 (1000) +3 + 6 = -7 (1001) +3 + 7 = -6 (1010) +3 + 8 = -5 (1011) +3 + 9 = -4 (1100) +3 + 10 = -3 (1101) +3 + 11 = -2 (1110) +3 + 12 = -1 (1111) +3 + 13 = 0 (0000) +3 + 14 = 1 (0001) +3 + 15 = 2 (0010) +3 + 16 = 3 (0011) +3 + 17 = 4 (0100) +3 + 18 = 5 (0101) +3 + 19 = 6 (0110) +3 + 20 = 7 (0111) +3 + 21 = -8 (1000) +3 + 22 = -7 (1001) +3 + 23 = -6 (1010) +3 + 24 = -5 (1011) +3 + 25 = -4 (1100) +3 + 26 = -3 (1101) +3 + 27 = -2 (1110) +3 + 28 = -1 (1111) +3 + 29 = 0 (0000) +3 + 30 = 1 (0001) +3 + 31 = 2 (0010) +3 + -32 = 3 (0011) +3 + -31 = 4 (0100) +3 + -30 = 5 (0101) +3 + -29 = 6 (0110) +3 + -28 = 7 (0111) +3 + -27 = -8 (1000) +3 + -26 = -7 (1001) +3 + -25 = -6 (1010) +3 + -24 = -5 (1011) +3 + -23 = -4 (1100) +3 + -22 = -3 (1101) +3 + -21 = -2 (1110) +3 + -20 = -1 (1111) +3 + -19 = 0 (0000) +3 + -18 = 1 (0001) +3 + -17 = 2 (0010) +3 + -16 = 3 (0011) +3 + -15 = 4 (0100) +3 + -14 = 5 (0101) +3 + -13 = 6 (0110) +3 + -12 = 7 (0111) +3 + -11 = -8 (1000) +3 + -10 = -7 (1001) +3 + -9 = -6 (1010) +3 + -8 = -5 (1011) +3 + -7 = -4 (1100) +3 + -6 = -3 (1101) +3 + -5 = -2 (1110) +3 + -4 = -1 (1111) +3 + -3 = 0 (0000) +3 + -2 = 1 (0001) +3 + -1 = 2 (0010) +4 + 0 = 4 (0100) +4 + 1 = 5 (0101) +4 + 2 = 6 (0110) +4 + 3 = 7 (0111) +4 + 4 = -8 (1000) +4 + 5 = -7 (1001) +4 + 6 = -6 (1010) +4 + 7 = -5 (1011) +4 + 8 = -4 (1100) +4 + 9 = -3 (1101) +4 + 10 = -2 (1110) +4 + 11 = -1 (1111) +4 + 12 = 0 (0000) +4 + 13 = 1 (0001) +4 + 14 = 2 (0010) +4 + 15 = 3 (0011) +4 + 16 = 4 (0100) +4 + 17 = 5 (0101) +4 + 18 = 6 (0110) +4 + 19 = 7 (0111) +4 + 20 = -8 (1000) +4 + 21 = -7 (1001) +4 + 22 = -6 (1010) +4 + 23 = -5 (1011) +4 + 24 = -4 (1100) +4 + 25 = -3 (1101) +4 + 26 = -2 (1110) +4 + 27 = -1 (1111) +4 + 28 = 0 (0000) +4 + 29 = 1 (0001) +4 + 30 = 2 (0010) +4 + 31 = 3 (0011) +4 + -32 = 4 (0100) +4 + -31 = 5 (0101) +4 + -30 = 6 (0110) +4 + -29 = 7 (0111) +4 + -28 = -8 (1000) +4 + -27 = -7 (1001) +4 + -26 = -6 (1010) +4 + -25 = -5 (1011) +4 + -24 = -4 (1100) +4 + -23 = -3 (1101) +4 + -22 = -2 (1110) +4 + -21 = -1 (1111) +4 + -20 = 0 (0000) +4 + -19 = 1 (0001) +4 + -18 = 2 (0010) +4 + -17 = 3 (0011) +4 + -16 = 4 (0100) +4 + -15 = 5 (0101) +4 + -14 = 6 (0110) +4 + -13 = 7 (0111) +4 + -12 = -8 (1000) +4 + -11 = -7 (1001) +4 + -10 = -6 (1010) +4 + -9 = -5 (1011) +4 + -8 = -4 (1100) +4 + -7 = -3 (1101) +4 + -6 = -2 (1110) +4 + -5 = -1 (1111) +4 + -4 = 0 (0000) +4 + -3 = 1 (0001) +4 + -2 = 2 (0010) +4 + -1 = 3 (0011) +5 + 0 = 5 (0101) +5 + 1 = 6 (0110) +5 + 2 = 7 (0111) +5 + 3 = -8 (1000) +5 + 4 = -7 (1001) +5 + 5 = -6 (1010) +5 + 6 = -5 (1011) +5 + 7 = -4 (1100) +5 + 8 = -3 (1101) +5 + 9 = -2 (1110) +5 + 10 = -1 (1111) +5 + 11 = 0 (0000) +5 + 12 = 1 (0001) +5 + 13 = 2 (0010) +5 + 14 = 3 (0011) +5 + 15 = 4 (0100) +5 + 16 = 5 (0101) +5 + 17 = 6 (0110) +5 + 18 = 7 (0111) +5 + 19 = -8 (1000) +5 + 20 = -7 (1001) +5 + 21 = -6 (1010) +5 + 22 = -5 (1011) +5 + 23 = -4 (1100) +5 + 24 = -3 (1101) +5 + 25 = -2 (1110) +5 + 26 = -1 (1111) +5 + 27 = 0 (0000) +5 + 28 = 1 (0001) +5 + 29 = 2 (0010) +5 + 30 = 3 (0011) +5 + 31 = 4 (0100) +5 + -32 = 5 (0101) +5 + -31 = 6 (0110) +5 + -30 = 7 (0111) +5 + -29 = -8 (1000) +5 + -28 = -7 (1001) +5 + -27 = -6 (1010) +5 + -26 = -5 (1011) +5 + -25 = -4 (1100) +5 + -24 = -3 (1101) +5 + -23 = -2 (1110) +5 + -22 = -1 (1111) +5 + -21 = 0 (0000) +5 + -20 = 1 (0001) +5 + -19 = 2 (0010) +5 + -18 = 3 (0011) +5 + -17 = 4 (0100) +5 + -16 = 5 (0101) +5 + -15 = 6 (0110) +5 + -14 = 7 (0111) +5 + -13 = -8 (1000) +5 + -12 = -7 (1001) +5 + -11 = -6 (1010) +5 + -10 = -5 (1011) +5 + -9 = -4 (1100) +5 + -8 = -3 (1101) +5 + -7 = -2 (1110) +5 + -6 = -1 (1111) +5 + -5 = 0 (0000) +5 + -4 = 1 (0001) +5 + -3 = 2 (0010) +5 + -2 = 3 (0011) +5 + -1 = 4 (0100) +6 + 0 = 6 (0110) +6 + 1 = 7 (0111) +6 + 2 = -8 (1000) +6 + 3 = -7 (1001) +6 + 4 = -6 (1010) +6 + 5 = -5 (1011) +6 + 6 = -4 (1100) +6 + 7 = -3 (1101) +6 + 8 = -2 (1110) +6 + 9 = -1 (1111) +6 + 10 = 0 (0000) +6 + 11 = 1 (0001) +6 + 12 = 2 (0010) +6 + 13 = 3 (0011) +6 + 14 = 4 (0100) +6 + 15 = 5 (0101) +6 + 16 = 6 (0110) +6 + 17 = 7 (0111) +6 + 18 = -8 (1000) +6 + 19 = -7 (1001) +6 + 20 = -6 (1010) +6 + 21 = -5 (1011) +6 + 22 = -4 (1100) +6 + 23 = -3 (1101) +6 + 24 = -2 (1110) +6 + 25 = -1 (1111) +6 + 26 = 0 (0000) +6 + 27 = 1 (0001) +6 + 28 = 2 (0010) +6 + 29 = 3 (0011) +6 + 30 = 4 (0100) +6 + 31 = 5 (0101) +6 + -32 = 6 (0110) +6 + -31 = 7 (0111) +6 + -30 = -8 (1000) +6 + -29 = -7 (1001) +6 + -28 = -6 (1010) +6 + -27 = -5 (1011) +6 + -26 = -4 (1100) +6 + -25 = -3 (1101) +6 + -24 = -2 (1110) +6 + -23 = -1 (1111) +6 + -22 = 0 (0000) +6 + -21 = 1 (0001) +6 + -20 = 2 (0010) +6 + -19 = 3 (0011) +6 + -18 = 4 (0100) +6 + -17 = 5 (0101) +6 + -16 = 6 (0110) +6 + -15 = 7 (0111) +6 + -14 = -8 (1000) +6 + -13 = -7 (1001) +6 + -12 = -6 (1010) +6 + -11 = -5 (1011) +6 + -10 = -4 (1100) +6 + -9 = -3 (1101) +6 + -8 = -2 (1110) +6 + -7 = -1 (1111) +6 + -6 = 0 (0000) +6 + -5 = 1 (0001) +6 + -4 = 2 (0010) +6 + -3 = 3 (0011) +6 + -2 = 4 (0100) +6 + -1 = 5 (0101) +7 + 0 = 7 (0111) +7 + 1 = -8 (1000) +7 + 2 = -7 (1001) +7 + 3 = -6 (1010) +7 + 4 = -5 (1011) +7 + 5 = -4 (1100) +7 + 6 = -3 (1101) +7 + 7 = -2 (1110) +7 + 8 = -1 (1111) +7 + 9 = 0 (0000) +7 + 10 = 1 (0001) +7 + 11 = 2 (0010) +7 + 12 = 3 (0011) +7 + 13 = 4 (0100) +7 + 14 = 5 (0101) +7 + 15 = 6 (0110) +7 + 16 = 7 (0111) +7 + 17 = -8 (1000) +7 + 18 = -7 (1001) +7 + 19 = -6 (1010) +7 + 20 = -5 (1011) +7 + 21 = -4 (1100) +7 + 22 = -3 (1101) +7 + 23 = -2 (1110) +7 + 24 = -1 (1111) +7 + 25 = 0 (0000) +7 + 26 = 1 (0001) +7 + 27 = 2 (0010) +7 + 28 = 3 (0011) +7 + 29 = 4 (0100) +7 + 30 = 5 (0101) +7 + 31 = 6 (0110) +7 + -32 = 7 (0111) +7 + -31 = -8 (1000) +7 + -30 = -7 (1001) +7 + -29 = -6 (1010) +7 + -28 = -5 (1011) +7 + -27 = -4 (1100) +7 + -26 = -3 (1101) +7 + -25 = -2 (1110) +7 + -24 = -1 (1111) +7 + -23 = 0 (0000) +7 + -22 = 1 (0001) +7 + -21 = 2 (0010) +7 + -20 = 3 (0011) +7 + -19 = 4 (0100) +7 + -18 = 5 (0101) +7 + -17 = 6 (0110) +7 + -16 = 7 (0111) +7 + -15 = -8 (1000) +7 + -14 = -7 (1001) +7 + -13 = -6 (1010) +7 + -12 = -5 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(1111) +-7 + 23 = 0 (0000) +-7 + 24 = 1 (0001) +-7 + 25 = 2 (0010) +-7 + 26 = 3 (0011) +-7 + 27 = 4 (0100) +-7 + 28 = 5 (0101) +-7 + 29 = 6 (0110) +-7 + 30 = 7 (0111) +-7 + 31 = -8 (1000) +-7 + -32 = -7 (1001) +-7 + -31 = -6 (1010) +-7 + -30 = -5 (1011) +-7 + -29 = -4 (1100) +-7 + -28 = -3 (1101) +-7 + -27 = -2 (1110) +-7 + -26 = -1 (1111) +-7 + -25 = 0 (0000) +-7 + -24 = 1 (0001) +-7 + -23 = 2 (0010) +-7 + -22 = 3 (0011) +-7 + -21 = 4 (0100) +-7 + -20 = 5 (0101) +-7 + -19 = 6 (0110) +-7 + -18 = 7 (0111) +-7 + -17 = -8 (1000) +-7 + -16 = -7 (1001) +-7 + -15 = -6 (1010) +-7 + -14 = -5 (1011) +-7 + -13 = -4 (1100) +-7 + -12 = -3 (1101) +-7 + -11 = -2 (1110) +-7 + -10 = -1 (1111) +-7 + -9 = 0 (0000) +-7 + -8 = 1 (0001) +-7 + -7 = 2 (0010) +-7 + -6 = 3 (0011) +-7 + -5 = 4 (0100) +-7 + -4 = 5 (0101) +-7 + -3 = 6 (0110) +-7 + -2 = 7 (0111) +-7 + -1 = -8 (1000) +-6 + 0 = -6 (1010) +-6 + 1 = -5 (1011) +-6 + 2 = -4 (1100) +-6 + 3 = -3 (1101) +-6 + 4 = -2 (1110) +-6 + 5 = -1 (1111) +-6 + 6 = 0 (0000) +-6 + 7 = 1 (0001) +-6 + 8 = 2 (0010) +-6 + 9 = 3 (0011) +-6 + 10 = 4 (0100) +-6 + 11 = 5 (0101) +-6 + 12 = 6 (0110) +-6 + 13 = 7 (0111) +-6 + 14 = -8 (1000) +-6 + 15 = -7 (1001) +-6 + 16 = -6 (1010) +-6 + 17 = -5 (1011) +-6 + 18 = -4 (1100) +-6 + 19 = -3 (1101) +-6 + 20 = -2 (1110) +-6 + 21 = -1 (1111) +-6 + 22 = 0 (0000) +-6 + 23 = 1 (0001) +-6 + 24 = 2 (0010) +-6 + 25 = 3 (0011) +-6 + 26 = 4 (0100) +-6 + 27 = 5 (0101) +-6 + 28 = 6 (0110) +-6 + 29 = 7 (0111) +-6 + 30 = -8 (1000) +-6 + 31 = -7 (1001) +-6 + -32 = -6 (1010) +-6 + -31 = -5 (1011) +-6 + -30 = -4 (1100) +-6 + -29 = -3 (1101) +-6 + -28 = -2 (1110) +-6 + -27 = -1 (1111) +-6 + -26 = 0 (0000) +-6 + -25 = 1 (0001) +-6 + -24 = 2 (0010) +-6 + -23 = 3 (0011) +-6 + -22 = 4 (0100) +-6 + -21 = 5 (0101) +-6 + -20 = 6 (0110) +-6 + -19 = 7 (0111) +-6 + -18 = -8 (1000) +-6 + -17 = -7 (1001) +-6 + -16 = -6 (1010) +-6 + -15 = -5 (1011) +-6 + -14 = -4 (1100) +-6 + -13 = -3 (1101) +-6 + -12 = -2 (1110) +-6 + -11 = -1 (1111) +-6 + -10 = 0 (0000) +-6 + -9 = 1 (0001) +-6 + -8 = 2 (0010) +-6 + -7 = 3 (0011) +-6 + -6 = 4 (0100) +-6 + -5 = 5 (0101) +-6 + -4 = 6 (0110) +-6 + -3 = 7 (0111) +-6 + -2 = -8 (1000) +-6 + -1 = -7 (1001) +-5 + 0 = -5 (1011) +-5 + 1 = -4 (1100) +-5 + 2 = -3 (1101) +-5 + 3 = -2 (1110) +-5 + 4 = -1 (1111) +-5 + 5 = 0 (0000) +-5 + 6 = 1 (0001) +-5 + 7 = 2 (0010) +-5 + 8 = 3 (0011) +-5 + 9 = 4 (0100) +-5 + 10 = 5 (0101) +-5 + 11 = 6 (0110) +-5 + 12 = 7 (0111) +-5 + 13 = -8 (1000) +-5 + 14 = -7 (1001) +-5 + 15 = -6 (1010) +-5 + 16 = -5 (1011) +-5 + 17 = -4 (1100) +-5 + 18 = -3 (1101) +-5 + 19 = -2 (1110) +-5 + 20 = -1 (1111) +-5 + 21 = 0 (0000) +-5 + 22 = 1 (0001) +-5 + 23 = 2 (0010) +-5 + 24 = 3 (0011) +-5 + 25 = 4 (0100) +-5 + 26 = 5 (0101) +-5 + 27 = 6 (0110) +-5 + 28 = 7 (0111) +-5 + 29 = -8 (1000) +-5 + 30 = -7 (1001) +-5 + 31 = -6 (1010) +-5 + -32 = -5 (1011) +-5 + -31 = -4 (1100) +-5 + -30 = -3 (1101) +-5 + -29 = -2 (1110) +-5 + -28 = -1 (1111) +-5 + -27 = 0 (0000) +-5 + -26 = 1 (0001) +-5 + -25 = 2 (0010) +-5 + -24 = 3 (0011) +-5 + -23 = 4 (0100) +-5 + -22 = 5 (0101) +-5 + -21 = 6 (0110) +-5 + -20 = 7 (0111) +-5 + -19 = -8 (1000) +-5 + -18 = -7 (1001) +-5 + -17 = -6 (1010) +-5 + -16 = -5 (1011) +-5 + -15 = -4 (1100) +-5 + -14 = -3 (1101) +-5 + -13 = -2 (1110) +-5 + -12 = -1 (1111) +-5 + -11 = 0 (0000) +-5 + -10 = 1 (0001) +-5 + -9 = 2 (0010) +-5 + -8 = 3 (0011) +-5 + -7 = 4 (0100) +-5 + -6 = 5 (0101) +-5 + -5 = 6 (0110) +-5 + -4 = 7 (0111) +-5 + -3 = -8 (1000) +-5 + -2 = -7 (1001) +-5 + -1 = -6 (1010) +-4 + 0 = -4 (1100) +-4 + 1 = -3 (1101) +-4 + 2 = -2 (1110) +-4 + 3 = -1 (1111) +-4 + 4 = 0 (0000) +-4 + 5 = 1 (0001) +-4 + 6 = 2 (0010) +-4 + 7 = 3 (0011) +-4 + 8 = 4 (0100) +-4 + 9 = 5 (0101) +-4 + 10 = 6 (0110) +-4 + 11 = 7 (0111) +-4 + 12 = -8 (1000) +-4 + 13 = -7 (1001) +-4 + 14 = -6 (1010) +-4 + 15 = -5 (1011) +-4 + 16 = -4 (1100) +-4 + 17 = -3 (1101) +-4 + 18 = -2 (1110) +-4 + 19 = -1 (1111) +-4 + 20 = 0 (0000) +-4 + 21 = 1 (0001) +-4 + 22 = 2 (0010) +-4 + 23 = 3 (0011) +-4 + 24 = 4 (0100) +-4 + 25 = 5 (0101) +-4 + 26 = 6 (0110) +-4 + 27 = 7 (0111) +-4 + 28 = -8 (1000) +-4 + 29 = -7 (1001) +-4 + 30 = -6 (1010) +-4 + 31 = -5 (1011) +-4 + -32 = -4 (1100) +-4 + -31 = -3 (1101) +-4 + -30 = -2 (1110) +-4 + -29 = -1 (1111) +-4 + -28 = 0 (0000) +-4 + -27 = 1 (0001) +-4 + -26 = 2 (0010) +-4 + -25 = 3 (0011) +-4 + -24 = 4 (0100) +-4 + -23 = 5 (0101) +-4 + -22 = 6 (0110) +-4 + -21 = 7 (0111) +-4 + -20 = -8 (1000) +-4 + -19 = -7 (1001) +-4 + -18 = -6 (1010) +-4 + -17 = -5 (1011) +-4 + -16 = -4 (1100) +-4 + -15 = -3 (1101) +-4 + -14 = -2 (1110) +-4 + -13 = -1 (1111) +-4 + -12 = 0 (0000) +-4 + -11 = 1 (0001) +-4 + -10 = 2 (0010) +-4 + -9 = 3 (0011) +-4 + -8 = 4 (0100) +-4 + -7 = 5 (0101) +-4 + -6 = 6 (0110) +-4 + -5 = 7 (0111) +-4 + -4 = -8 (1000) +-4 + -3 = -7 (1001) +-4 + -2 = -6 (1010) +-4 + -1 = -5 (1011) +-3 + 0 = -3 (1101) +-3 + 1 = -2 (1110) +-3 + 2 = -1 (1111) +-3 + 3 = 0 (0000) +-3 + 4 = 1 (0001) +-3 + 5 = 2 (0010) +-3 + 6 = 3 (0011) +-3 + 7 = 4 (0100) +-3 + 8 = 5 (0101) +-3 + 9 = 6 (0110) +-3 + 10 = 7 (0111) +-3 + 11 = -8 (1000) +-3 + 12 = -7 (1001) +-3 + 13 = -6 (1010) +-3 + 14 = -5 (1011) +-3 + 15 = -4 (1100) +-3 + 16 = -3 (1101) +-3 + 17 = -2 (1110) +-3 + 18 = -1 (1111) +-3 + 19 = 0 (0000) +-3 + 20 = 1 (0001) +-3 + 21 = 2 (0010) +-3 + 22 = 3 (0011) +-3 + 23 = 4 (0100) +-3 + 24 = 5 (0101) +-3 + 25 = 6 (0110) +-3 + 26 = 7 (0111) +-3 + 27 = -8 (1000) +-3 + 28 = -7 (1001) +-3 + 29 = -6 (1010) +-3 + 30 = -5 (1011) +-3 + 31 = -4 (1100) +-3 + -32 = -3 (1101) +-3 + -31 = -2 (1110) +-3 + -30 = -1 (1111) +-3 + -29 = 0 (0000) +-3 + -28 = 1 (0001) +-3 + -27 = 2 (0010) +-3 + -26 = 3 (0011) +-3 + -25 = 4 (0100) +-3 + -24 = 5 (0101) +-3 + -23 = 6 (0110) +-3 + -22 = 7 (0111) +-3 + -21 = -8 (1000) +-3 + -20 = -7 (1001) +-3 + -19 = -6 (1010) +-3 + -18 = -5 (1011) +-3 + -17 = -4 (1100) +-3 + -16 = -3 (1101) +-3 + -15 = -2 (1110) +-3 + -14 = -1 (1111) +-3 + -13 = 0 (0000) +-3 + -12 = 1 (0001) +-3 + -11 = 2 (0010) +-3 + -10 = 3 (0011) +-3 + -9 = 4 (0100) +-3 + -8 = 5 (0101) +-3 + -7 = 6 (0110) +-3 + -6 = 7 (0111) +-3 + -5 = -8 (1000) +-3 + -4 = -7 (1001) +-3 + -3 = -6 (1010) +-3 + -2 = -5 (1011) +-3 + -1 = -4 (1100) +-2 + 0 = -2 (1110) +-2 + 1 = -1 (1111) +-2 + 2 = 0 (0000) +-2 + 3 = 1 (0001) +-2 + 4 = 2 (0010) +-2 + 5 = 3 (0011) +-2 + 6 = 4 (0100) +-2 + 7 = 5 (0101) +-2 + 8 = 6 (0110) +-2 + 9 = 7 (0111) +-2 + 10 = -8 (1000) +-2 + 11 = -7 (1001) +-2 + 12 = -6 (1010) +-2 + 13 = -5 (1011) +-2 + 14 = -4 (1100) +-2 + 15 = -3 (1101) +-2 + 16 = -2 (1110) +-2 + 17 = -1 (1111) +-2 + 18 = 0 (0000) +-2 + 19 = 1 (0001) +-2 + 20 = 2 (0010) +-2 + 21 = 3 (0011) +-2 + 22 = 4 (0100) +-2 + 23 = 5 (0101) +-2 + 24 = 6 (0110) +-2 + 25 = 7 (0111) +-2 + 26 = -8 (1000) +-2 + 27 = -7 (1001) +-2 + 28 = -6 (1010) +-2 + 29 = -5 (1011) +-2 + 30 = -4 (1100) +-2 + 31 = -3 (1101) +-2 + -32 = -2 (1110) +-2 + -31 = -1 (1111) +-2 + -30 = 0 (0000) +-2 + -29 = 1 (0001) +-2 + -28 = 2 (0010) +-2 + -27 = 3 (0011) +-2 + -26 = 4 (0100) +-2 + -25 = 5 (0101) +-2 + -24 = 6 (0110) +-2 + -23 = 7 (0111) +-2 + -22 = -8 (1000) +-2 + -21 = -7 (1001) +-2 + -20 = -6 (1010) +-2 + -19 = -5 (1011) +-2 + -18 = -4 (1100) +-2 + -17 = -3 (1101) +-2 + -16 = -2 (1110) +-2 + -15 = -1 (1111) +-2 + -14 = 0 (0000) +-2 + -13 = 1 (0001) +-2 + -12 = 2 (0010) +-2 + -11 = 3 (0011) +-2 + -10 = 4 (0100) +-2 + -9 = 5 (0101) +-2 + -8 = 6 (0110) +-2 + -7 = 7 (0111) +-2 + -6 = -8 (1000) +-2 + -5 = -7 (1001) +-2 + -4 = -6 (1010) +-2 + -3 = -5 (1011) +-2 + -2 = -4 (1100) +-2 + -1 = -3 (1101) +-1 + 0 = -1 (1111) +-1 + 1 = 0 (0000) +-1 + 2 = 1 (0001) +-1 + 3 = 2 (0010) +-1 + 4 = 3 (0011) +-1 + 5 = 4 (0100) +-1 + 6 = 5 (0101) +-1 + 7 = 6 (0110) +-1 + 8 = 7 (0111) +-1 + 9 = -8 (1000) +-1 + 10 = -7 (1001) +-1 + 11 = -6 (1010) +-1 + 12 = -5 (1011) +-1 + 13 = -4 (1100) +-1 + 14 = -3 (1101) +-1 + 15 = -2 (1110) +-1 + 16 = -1 (1111) +-1 + 17 = 0 (0000) +-1 + 18 = 1 (0001) +-1 + 19 = 2 (0010) +-1 + 20 = 3 (0011) +-1 + 21 = 4 (0100) +-1 + 22 = 5 (0101) +-1 + 23 = 6 (0110) +-1 + 24 = 7 (0111) +-1 + 25 = -8 (1000) +-1 + 26 = -7 (1001) +-1 + 27 = -6 (1010) +-1 + 28 = -5 (1011) +-1 + 29 = -4 (1100) +-1 + 30 = -3 (1101) +-1 + 31 = -2 (1110) +-1 + -32 = -1 (1111) +-1 + -31 = 0 (0000) +-1 + -30 = 1 (0001) +-1 + -29 = 2 (0010) +-1 + -28 = 3 (0011) +-1 + -27 = 4 (0100) +-1 + -26 = 5 (0101) +-1 + -25 = 6 (0110) +-1 + -24 = 7 (0111) +-1 + -23 = -8 (1000) +-1 + -22 = -7 (1001) +-1 + -21 = -6 (1010) +-1 + -20 = -5 (1011) +-1 + -19 = -4 (1100) +-1 + -18 = -3 (1101) +-1 + -17 = -2 (1110) +-1 + -16 = -1 (1111) +-1 + -15 = 0 (0000) +-1 + -14 = 1 (0001) +-1 + -13 = 2 (0010) +-1 + -12 = 3 (0011) +-1 + -11 = 4 (0100) +-1 + -10 = 5 (0101) +-1 + -9 = 6 (0110) +-1 + -8 = 7 (0111) +-1 + -7 = -8 (1000) +-1 + -6 = -7 (1001) +-1 + -5 = -6 (1010) +-1 + -4 = -5 (1011) +-1 + -3 = -4 (1100) +-1 + -2 = -3 (1101) +-1 + -1 = -2 (1110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/main.cpp new file mode 100644 index 000000000..a7b21a2e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 4-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 4; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector4 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/stimgen.cpp new file mode 100644 index 000000000..9a98bd4a9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_int() << " + " << in2.read().to_int() + << " = " << result.read().to_int() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/stimgen.h new file mode 100644 index 000000000..5a95ce7a8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/truncation.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/truncation.f new file mode 100644 index 000000000..d35040a90 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_signed/truncation/truncation.f @@ -0,0 +1,3 @@ +truncation/datawidth.cpp +truncation/stimgen.cpp +truncation/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/README b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/README new file mode 100644 index 000000000..6d77c7cbb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/README @@ -0,0 +1,9 @@ +bits_to_bits 7-bit = 6-bit + 6-bit +lost_carry 6-bit = 6-bit + 6-bit +extension 9-bit = 6-bit + 6-bit +truncation 4-bit = 6-bit + 6-bit + +promote 7-bit = 4-bit + 6-bit +promote_lost_carry 6-bit = 4-bit + 6-bit +promote_extension 9-bit = 4-bit + 6-bit +promote_truncation 4-bit = 4-bit + 6-bit diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/bits_to_bits.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/bits_to_bits.f new file mode 100644 index 000000000..9fcbb2977 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/bits_to_bits.f @@ -0,0 +1,3 @@ +bits_to_bits/datawidth.cpp +bits_to_bits/stimgen.cpp +bits_to_bits/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/common.h new file mode 100644 index 000000000..d0b50248c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector6; +typedef sc_signal > signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/datawidth.cpp new file mode 100644 index 000000000..f5df52dd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_unsigned tmp_a (in1_width); + sc_unsigned tmp_b (in2_width); + sc_unsigned tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/datawidth.h new file mode 100644 index 000000000..df7ca5b2e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector7& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector7& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/golden/bits_to_bits.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/golden/bits_to_bits.log new file mode 100644 index 000000000..c41483f55 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/golden/bits_to_bits.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) +16 + 0 = 16 (0010000) +16 + 1 = 17 (0010001) +16 + 2 = 18 (0010010) +16 + 3 = 19 (0010011) +16 + 4 = 20 (0010100) +16 + 5 = 21 (0010101) +16 + 6 = 22 (0010110) +16 + 7 = 23 (0010111) +16 + 8 = 24 (0011000) +16 + 9 = 25 (0011001) +16 + 10 = 26 (0011010) +16 + 11 = 27 (0011011) +16 + 12 = 28 (0011100) +16 + 13 = 29 (0011101) +16 + 14 = 30 (0011110) +16 + 15 = 31 (0011111) +16 + 16 = 32 (0100000) +16 + 17 = 33 (0100001) +16 + 18 = 34 (0100010) +16 + 19 = 35 (0100011) +16 + 20 = 36 (0100100) +16 + 21 = 37 (0100101) +16 + 22 = 38 (0100110) +16 + 23 = 39 (0100111) +16 + 24 = 40 (0101000) +16 + 25 = 41 (0101001) +16 + 26 = 42 (0101010) +16 + 27 = 43 (0101011) +16 + 28 = 44 (0101100) +16 + 29 = 45 (0101101) +16 + 30 = 46 (0101110) +16 + 31 = 47 (0101111) +16 + 32 = 48 (0110000) +16 + 33 = 49 (0110001) +16 + 34 = 50 (0110010) +16 + 35 = 51 (0110011) +16 + 36 = 52 (0110100) +16 + 37 = 53 (0110101) +16 + 38 = 54 (0110110) +16 + 39 = 55 (0110111) +16 + 40 = 56 (0111000) +16 + 41 = 57 (0111001) +16 + 42 = 58 (0111010) +16 + 43 = 59 (0111011) +16 + 44 = 60 (0111100) +16 + 45 = 61 (0111101) +16 + 46 = 62 (0111110) +16 + 47 = 63 (0111111) +16 + 48 = 64 (1000000) +16 + 49 = 65 (1000001) +16 + 50 = 66 (1000010) +16 + 51 = 67 (1000011) +16 + 52 = 68 (1000100) +16 + 53 = 69 (1000101) +16 + 54 = 70 (1000110) +16 + 55 = 71 (1000111) +16 + 56 = 72 (1001000) +16 + 57 = 73 (1001001) +16 + 58 = 74 (1001010) +16 + 59 = 75 (1001011) +16 + 60 = 76 (1001100) +16 + 61 = 77 (1001101) +16 + 62 = 78 (1001110) +16 + 63 = 79 (1001111) +17 + 0 = 17 (0010001) +17 + 1 = 18 (0010010) +17 + 2 = 19 (0010011) +17 + 3 = 20 (0010100) +17 + 4 = 21 (0010101) +17 + 5 = 22 (0010110) +17 + 6 = 23 (0010111) +17 + 7 = 24 (0011000) +17 + 8 = 25 (0011001) +17 + 9 = 26 (0011010) +17 + 10 = 27 (0011011) +17 + 11 = 28 (0011100) +17 + 12 = 29 (0011101) +17 + 13 = 30 (0011110) +17 + 14 = 31 (0011111) +17 + 15 = 32 (0100000) +17 + 16 = 33 (0100001) +17 + 17 = 34 (0100010) +17 + 18 = 35 (0100011) +17 + 19 = 36 (0100100) +17 + 20 = 37 (0100101) +17 + 21 = 38 (0100110) +17 + 22 = 39 (0100111) +17 + 23 = 40 (0101000) +17 + 24 = 41 (0101001) +17 + 25 = 42 (0101010) +17 + 26 = 43 (0101011) +17 + 27 = 44 (0101100) +17 + 28 = 45 (0101101) +17 + 29 = 46 (0101110) +17 + 30 = 47 (0101111) +17 + 31 = 48 (0110000) +17 + 32 = 49 (0110001) +17 + 33 = 50 (0110010) +17 + 34 = 51 (0110011) +17 + 35 = 52 (0110100) +17 + 36 = 53 (0110101) +17 + 37 = 54 (0110110) +17 + 38 = 55 (0110111) +17 + 39 = 56 (0111000) +17 + 40 = 57 (0111001) +17 + 41 = 58 (0111010) +17 + 42 = 59 (0111011) +17 + 43 = 60 (0111100) +17 + 44 = 61 (0111101) +17 + 45 = 62 (0111110) +17 + 46 = 63 (0111111) +17 + 47 = 64 (1000000) +17 + 48 = 65 (1000001) +17 + 49 = 66 (1000010) +17 + 50 = 67 (1000011) +17 + 51 = 68 (1000100) +17 + 52 = 69 (1000101) +17 + 53 = 70 (1000110) +17 + 54 = 71 (1000111) +17 + 55 = 72 (1001000) +17 + 56 = 73 (1001001) +17 + 57 = 74 (1001010) +17 + 58 = 75 (1001011) +17 + 59 = 76 (1001100) +17 + 60 = 77 (1001101) +17 + 61 = 78 (1001110) +17 + 62 = 79 (1001111) +17 + 63 = 80 (1010000) +18 + 0 = 18 (0010010) +18 + 1 = 19 (0010011) +18 + 2 = 20 (0010100) +18 + 3 = 21 (0010101) +18 + 4 = 22 (0010110) +18 + 5 = 23 (0010111) +18 + 6 = 24 (0011000) +18 + 7 = 25 (0011001) +18 + 8 = 26 (0011010) +18 + 9 = 27 (0011011) +18 + 10 = 28 (0011100) +18 + 11 = 29 (0011101) +18 + 12 = 30 (0011110) +18 + 13 = 31 (0011111) +18 + 14 = 32 (0100000) +18 + 15 = 33 (0100001) +18 + 16 = 34 (0100010) +18 + 17 = 35 (0100011) +18 + 18 = 36 (0100100) +18 + 19 = 37 (0100101) +18 + 20 = 38 (0100110) +18 + 21 = 39 (0100111) +18 + 22 = 40 (0101000) +18 + 23 = 41 (0101001) +18 + 24 = 42 (0101010) +18 + 25 = 43 (0101011) +18 + 26 = 44 (0101100) +18 + 27 = 45 (0101101) +18 + 28 = 46 (0101110) +18 + 29 = 47 (0101111) +18 + 30 = 48 (0110000) +18 + 31 = 49 (0110001) +18 + 32 = 50 (0110010) +18 + 33 = 51 (0110011) +18 + 34 = 52 (0110100) +18 + 35 = 53 (0110101) +18 + 36 = 54 (0110110) +18 + 37 = 55 (0110111) +18 + 38 = 56 (0111000) +18 + 39 = 57 (0111001) +18 + 40 = 58 (0111010) +18 + 41 = 59 (0111011) +18 + 42 = 60 (0111100) +18 + 43 = 61 (0111101) +18 + 44 = 62 (0111110) +18 + 45 = 63 (0111111) +18 + 46 = 64 (1000000) +18 + 47 = 65 (1000001) +18 + 48 = 66 (1000010) +18 + 49 = 67 (1000011) +18 + 50 = 68 (1000100) +18 + 51 = 69 (1000101) +18 + 52 = 70 (1000110) +18 + 53 = 71 (1000111) +18 + 54 = 72 (1001000) +18 + 55 = 73 (1001001) +18 + 56 = 74 (1001010) +18 + 57 = 75 (1001011) +18 + 58 = 76 (1001100) +18 + 59 = 77 (1001101) +18 + 60 = 78 (1001110) +18 + 61 = 79 (1001111) +18 + 62 = 80 (1010000) +18 + 63 = 81 (1010001) +19 + 0 = 19 (0010011) +19 + 1 = 20 (0010100) +19 + 2 = 21 (0010101) +19 + 3 = 22 (0010110) +19 + 4 = 23 (0010111) +19 + 5 = 24 (0011000) +19 + 6 = 25 (0011001) +19 + 7 = 26 (0011010) +19 + 8 = 27 (0011011) +19 + 9 = 28 (0011100) +19 + 10 = 29 (0011101) +19 + 11 = 30 (0011110) +19 + 12 = 31 (0011111) +19 + 13 = 32 (0100000) +19 + 14 = 33 (0100001) +19 + 15 = 34 (0100010) +19 + 16 = 35 (0100011) +19 + 17 = 36 (0100100) +19 + 18 = 37 (0100101) +19 + 19 = 38 (0100110) +19 + 20 = 39 (0100111) +19 + 21 = 40 (0101000) +19 + 22 = 41 (0101001) +19 + 23 = 42 (0101010) +19 + 24 = 43 (0101011) +19 + 25 = 44 (0101100) +19 + 26 = 45 (0101101) +19 + 27 = 46 (0101110) +19 + 28 = 47 (0101111) +19 + 29 = 48 (0110000) +19 + 30 = 49 (0110001) +19 + 31 = 50 (0110010) +19 + 32 = 51 (0110011) +19 + 33 = 52 (0110100) +19 + 34 = 53 (0110101) +19 + 35 = 54 (0110110) +19 + 36 = 55 (0110111) +19 + 37 = 56 (0111000) +19 + 38 = 57 (0111001) +19 + 39 = 58 (0111010) +19 + 40 = 59 (0111011) +19 + 41 = 60 (0111100) +19 + 42 = 61 (0111101) +19 + 43 = 62 (0111110) +19 + 44 = 63 (0111111) +19 + 45 = 64 (1000000) +19 + 46 = 65 (1000001) +19 + 47 = 66 (1000010) +19 + 48 = 67 (1000011) +19 + 49 = 68 (1000100) +19 + 50 = 69 (1000101) +19 + 51 = 70 (1000110) +19 + 52 = 71 (1000111) +19 + 53 = 72 (1001000) +19 + 54 = 73 (1001001) +19 + 55 = 74 (1001010) +19 + 56 = 75 (1001011) +19 + 57 = 76 (1001100) +19 + 58 = 77 (1001101) +19 + 59 = 78 (1001110) +19 + 60 = 79 (1001111) +19 + 61 = 80 (1010000) +19 + 62 = 81 (1010001) +19 + 63 = 82 (1010010) +20 + 0 = 20 (0010100) +20 + 1 = 21 (0010101) +20 + 2 = 22 (0010110) +20 + 3 = 23 (0010111) +20 + 4 = 24 (0011000) +20 + 5 = 25 (0011001) +20 + 6 = 26 (0011010) +20 + 7 = 27 (0011011) +20 + 8 = 28 (0011100) +20 + 9 = 29 (0011101) +20 + 10 = 30 (0011110) +20 + 11 = 31 (0011111) +20 + 12 = 32 (0100000) +20 + 13 = 33 (0100001) +20 + 14 = 34 (0100010) +20 + 15 = 35 (0100011) +20 + 16 = 36 (0100100) +20 + 17 = 37 (0100101) +20 + 18 = 38 (0100110) +20 + 19 = 39 (0100111) +20 + 20 = 40 (0101000) +20 + 21 = 41 (0101001) +20 + 22 = 42 (0101010) +20 + 23 = 43 (0101011) +20 + 24 = 44 (0101100) +20 + 25 = 45 (0101101) +20 + 26 = 46 (0101110) +20 + 27 = 47 (0101111) +20 + 28 = 48 (0110000) +20 + 29 = 49 (0110001) +20 + 30 = 50 (0110010) +20 + 31 = 51 (0110011) +20 + 32 = 52 (0110100) +20 + 33 = 53 (0110101) +20 + 34 = 54 (0110110) +20 + 35 = 55 (0110111) +20 + 36 = 56 (0111000) +20 + 37 = 57 (0111001) +20 + 38 = 58 (0111010) +20 + 39 = 59 (0111011) +20 + 40 = 60 (0111100) +20 + 41 = 61 (0111101) +20 + 42 = 62 (0111110) +20 + 43 = 63 (0111111) +20 + 44 = 64 (1000000) +20 + 45 = 65 (1000001) +20 + 46 = 66 (1000010) +20 + 47 = 67 (1000011) +20 + 48 = 68 (1000100) +20 + 49 = 69 (1000101) +20 + 50 = 70 (1000110) +20 + 51 = 71 (1000111) +20 + 52 = 72 (1001000) +20 + 53 = 73 (1001001) +20 + 54 = 74 (1001010) +20 + 55 = 75 (1001011) +20 + 56 = 76 (1001100) +20 + 57 = 77 (1001101) +20 + 58 = 78 (1001110) +20 + 59 = 79 (1001111) +20 + 60 = 80 (1010000) +20 + 61 = 81 (1010001) +20 + 62 = 82 (1010010) +20 + 63 = 83 (1010011) +21 + 0 = 21 (0010101) +21 + 1 = 22 (0010110) +21 + 2 = 23 (0010111) +21 + 3 = 24 (0011000) +21 + 4 = 25 (0011001) +21 + 5 = 26 (0011010) +21 + 6 = 27 (0011011) +21 + 7 = 28 (0011100) +21 + 8 = 29 (0011101) +21 + 9 = 30 (0011110) +21 + 10 = 31 (0011111) +21 + 11 = 32 (0100000) +21 + 12 = 33 (0100001) +21 + 13 = 34 (0100010) +21 + 14 = 35 (0100011) +21 + 15 = 36 (0100100) +21 + 16 = 37 (0100101) +21 + 17 = 38 (0100110) +21 + 18 = 39 (0100111) +21 + 19 = 40 (0101000) +21 + 20 = 41 (0101001) +21 + 21 = 42 (0101010) +21 + 22 = 43 (0101011) +21 + 23 = 44 (0101100) +21 + 24 = 45 (0101101) +21 + 25 = 46 (0101110) +21 + 26 = 47 (0101111) +21 + 27 = 48 (0110000) +21 + 28 = 49 (0110001) +21 + 29 = 50 (0110010) +21 + 30 = 51 (0110011) +21 + 31 = 52 (0110100) +21 + 32 = 53 (0110101) +21 + 33 = 54 (0110110) +21 + 34 = 55 (0110111) +21 + 35 = 56 (0111000) +21 + 36 = 57 (0111001) +21 + 37 = 58 (0111010) +21 + 38 = 59 (0111011) +21 + 39 = 60 (0111100) +21 + 40 = 61 (0111101) +21 + 41 = 62 (0111110) +21 + 42 = 63 (0111111) +21 + 43 = 64 (1000000) +21 + 44 = 65 (1000001) +21 + 45 = 66 (1000010) +21 + 46 = 67 (1000011) +21 + 47 = 68 (1000100) +21 + 48 = 69 (1000101) +21 + 49 = 70 (1000110) +21 + 50 = 71 (1000111) +21 + 51 = 72 (1001000) +21 + 52 = 73 (1001001) +21 + 53 = 74 (1001010) +21 + 54 = 75 (1001011) +21 + 55 = 76 (1001100) +21 + 56 = 77 (1001101) +21 + 57 = 78 (1001110) +21 + 58 = 79 (1001111) +21 + 59 = 80 (1010000) +21 + 60 = 81 (1010001) +21 + 61 = 82 (1010010) +21 + 62 = 83 (1010011) +21 + 63 = 84 (1010100) +22 + 0 = 22 (0010110) +22 + 1 = 23 (0010111) +22 + 2 = 24 (0011000) +22 + 3 = 25 (0011001) +22 + 4 = 26 (0011010) +22 + 5 = 27 (0011011) +22 + 6 = 28 (0011100) +22 + 7 = 29 (0011101) +22 + 8 = 30 (0011110) +22 + 9 = 31 (0011111) +22 + 10 = 32 (0100000) +22 + 11 = 33 (0100001) +22 + 12 = 34 (0100010) +22 + 13 = 35 (0100011) +22 + 14 = 36 (0100100) +22 + 15 = 37 (0100101) +22 + 16 = 38 (0100110) +22 + 17 = 39 (0100111) +22 + 18 = 40 (0101000) +22 + 19 = 41 (0101001) +22 + 20 = 42 (0101010) +22 + 21 = 43 (0101011) +22 + 22 = 44 (0101100) +22 + 23 = 45 (0101101) +22 + 24 = 46 (0101110) +22 + 25 = 47 (0101111) +22 + 26 = 48 (0110000) +22 + 27 = 49 (0110001) +22 + 28 = 50 (0110010) +22 + 29 = 51 (0110011) +22 + 30 = 52 (0110100) +22 + 31 = 53 (0110101) +22 + 32 = 54 (0110110) +22 + 33 = 55 (0110111) +22 + 34 = 56 (0111000) +22 + 35 = 57 (0111001) +22 + 36 = 58 (0111010) +22 + 37 = 59 (0111011) +22 + 38 = 60 (0111100) +22 + 39 = 61 (0111101) +22 + 40 = 62 (0111110) +22 + 41 = 63 (0111111) +22 + 42 = 64 (1000000) +22 + 43 = 65 (1000001) +22 + 44 = 66 (1000010) +22 + 45 = 67 (1000011) +22 + 46 = 68 (1000100) +22 + 47 = 69 (1000101) +22 + 48 = 70 (1000110) +22 + 49 = 71 (1000111) +22 + 50 = 72 (1001000) +22 + 51 = 73 (1001001) +22 + 52 = 74 (1001010) +22 + 53 = 75 (1001011) +22 + 54 = 76 (1001100) +22 + 55 = 77 (1001101) +22 + 56 = 78 (1001110) +22 + 57 = 79 (1001111) +22 + 58 = 80 (1010000) +22 + 59 = 81 (1010001) +22 + 60 = 82 (1010010) +22 + 61 = 83 (1010011) +22 + 62 = 84 (1010100) +22 + 63 = 85 (1010101) +23 + 0 = 23 (0010111) +23 + 1 = 24 (0011000) +23 + 2 = 25 (0011001) +23 + 3 = 26 (0011010) +23 + 4 = 27 (0011011) +23 + 5 = 28 (0011100) +23 + 6 = 29 (0011101) +23 + 7 = 30 (0011110) +23 + 8 = 31 (0011111) +23 + 9 = 32 (0100000) +23 + 10 = 33 (0100001) +23 + 11 = 34 (0100010) +23 + 12 = 35 (0100011) +23 + 13 = 36 (0100100) +23 + 14 = 37 (0100101) +23 + 15 = 38 (0100110) +23 + 16 = 39 (0100111) +23 + 17 = 40 (0101000) +23 + 18 = 41 (0101001) +23 + 19 = 42 (0101010) +23 + 20 = 43 (0101011) +23 + 21 = 44 (0101100) +23 + 22 = 45 (0101101) +23 + 23 = 46 (0101110) +23 + 24 = 47 (0101111) +23 + 25 = 48 (0110000) +23 + 26 = 49 (0110001) +23 + 27 = 50 (0110010) +23 + 28 = 51 (0110011) +23 + 29 = 52 (0110100) +23 + 30 = 53 (0110101) +23 + 31 = 54 (0110110) +23 + 32 = 55 (0110111) +23 + 33 = 56 (0111000) +23 + 34 = 57 (0111001) +23 + 35 = 58 (0111010) +23 + 36 = 59 (0111011) +23 + 37 = 60 (0111100) +23 + 38 = 61 (0111101) +23 + 39 = 62 (0111110) +23 + 40 = 63 (0111111) +23 + 41 = 64 (1000000) +23 + 42 = 65 (1000001) +23 + 43 = 66 (1000010) +23 + 44 = 67 (1000011) +23 + 45 = 68 (1000100) +23 + 46 = 69 (1000101) +23 + 47 = 70 (1000110) +23 + 48 = 71 (1000111) +23 + 49 = 72 (1001000) +23 + 50 = 73 (1001001) +23 + 51 = 74 (1001010) +23 + 52 = 75 (1001011) +23 + 53 = 76 (1001100) +23 + 54 = 77 (1001101) +23 + 55 = 78 (1001110) +23 + 56 = 79 (1001111) +23 + 57 = 80 (1010000) +23 + 58 = 81 (1010001) +23 + 59 = 82 (1010010) +23 + 60 = 83 (1010011) +23 + 61 = 84 (1010100) +23 + 62 = 85 (1010101) +23 + 63 = 86 (1010110) +24 + 0 = 24 (0011000) +24 + 1 = 25 (0011001) +24 + 2 = 26 (0011010) +24 + 3 = 27 (0011011) +24 + 4 = 28 (0011100) +24 + 5 = 29 (0011101) +24 + 6 = 30 (0011110) +24 + 7 = 31 (0011111) +24 + 8 = 32 (0100000) +24 + 9 = 33 (0100001) +24 + 10 = 34 (0100010) +24 + 11 = 35 (0100011) +24 + 12 = 36 (0100100) +24 + 13 = 37 (0100101) +24 + 14 = 38 (0100110) +24 + 15 = 39 (0100111) +24 + 16 = 40 (0101000) +24 + 17 = 41 (0101001) +24 + 18 = 42 (0101010) +24 + 19 = 43 (0101011) +24 + 20 = 44 (0101100) +24 + 21 = 45 (0101101) +24 + 22 = 46 (0101110) +24 + 23 = 47 (0101111) +24 + 24 = 48 (0110000) +24 + 25 = 49 (0110001) +24 + 26 = 50 (0110010) +24 + 27 = 51 (0110011) +24 + 28 = 52 (0110100) +24 + 29 = 53 (0110101) +24 + 30 = 54 (0110110) +24 + 31 = 55 (0110111) +24 + 32 = 56 (0111000) +24 + 33 = 57 (0111001) +24 + 34 = 58 (0111010) +24 + 35 = 59 (0111011) +24 + 36 = 60 (0111100) +24 + 37 = 61 (0111101) +24 + 38 = 62 (0111110) +24 + 39 = 63 (0111111) +24 + 40 = 64 (1000000) +24 + 41 = 65 (1000001) +24 + 42 = 66 (1000010) +24 + 43 = 67 (1000011) +24 + 44 = 68 (1000100) +24 + 45 = 69 (1000101) +24 + 46 = 70 (1000110) +24 + 47 = 71 (1000111) +24 + 48 = 72 (1001000) +24 + 49 = 73 (1001001) +24 + 50 = 74 (1001010) +24 + 51 = 75 (1001011) +24 + 52 = 76 (1001100) +24 + 53 = 77 (1001101) +24 + 54 = 78 (1001110) +24 + 55 = 79 (1001111) +24 + 56 = 80 (1010000) +24 + 57 = 81 (1010001) +24 + 58 = 82 (1010010) +24 + 59 = 83 (1010011) +24 + 60 = 84 (1010100) +24 + 61 = 85 (1010101) +24 + 62 = 86 (1010110) +24 + 63 = 87 (1010111) +25 + 0 = 25 (0011001) +25 + 1 = 26 (0011010) +25 + 2 = 27 (0011011) +25 + 3 = 28 (0011100) +25 + 4 = 29 (0011101) +25 + 5 = 30 (0011110) +25 + 6 = 31 (0011111) +25 + 7 = 32 (0100000) +25 + 8 = 33 (0100001) +25 + 9 = 34 (0100010) +25 + 10 = 35 (0100011) +25 + 11 = 36 (0100100) +25 + 12 = 37 (0100101) +25 + 13 = 38 (0100110) +25 + 14 = 39 (0100111) +25 + 15 = 40 (0101000) +25 + 16 = 41 (0101001) +25 + 17 = 42 (0101010) +25 + 18 = 43 (0101011) +25 + 19 = 44 (0101100) +25 + 20 = 45 (0101101) +25 + 21 = 46 (0101110) +25 + 22 = 47 (0101111) +25 + 23 = 48 (0110000) +25 + 24 = 49 (0110001) +25 + 25 = 50 (0110010) +25 + 26 = 51 (0110011) +25 + 27 = 52 (0110100) +25 + 28 = 53 (0110101) +25 + 29 = 54 (0110110) +25 + 30 = 55 (0110111) +25 + 31 = 56 (0111000) +25 + 32 = 57 (0111001) +25 + 33 = 58 (0111010) +25 + 34 = 59 (0111011) +25 + 35 = 60 (0111100) +25 + 36 = 61 (0111101) +25 + 37 = 62 (0111110) +25 + 38 = 63 (0111111) +25 + 39 = 64 (1000000) +25 + 40 = 65 (1000001) +25 + 41 = 66 (1000010) +25 + 42 = 67 (1000011) +25 + 43 = 68 (1000100) +25 + 44 = 69 (1000101) +25 + 45 = 70 (1000110) +25 + 46 = 71 (1000111) +25 + 47 = 72 (1001000) +25 + 48 = 73 (1001001) +25 + 49 = 74 (1001010) +25 + 50 = 75 (1001011) +25 + 51 = 76 (1001100) +25 + 52 = 77 (1001101) +25 + 53 = 78 (1001110) +25 + 54 = 79 (1001111) +25 + 55 = 80 (1010000) +25 + 56 = 81 (1010001) +25 + 57 = 82 (1010010) +25 + 58 = 83 (1010011) +25 + 59 = 84 (1010100) +25 + 60 = 85 (1010101) +25 + 61 = 86 (1010110) +25 + 62 = 87 (1010111) +25 + 63 = 88 (1011000) +26 + 0 = 26 (0011010) +26 + 1 = 27 (0011011) +26 + 2 = 28 (0011100) +26 + 3 = 29 (0011101) +26 + 4 = 30 (0011110) +26 + 5 = 31 (0011111) +26 + 6 = 32 (0100000) +26 + 7 = 33 (0100001) +26 + 8 = 34 (0100010) +26 + 9 = 35 (0100011) +26 + 10 = 36 (0100100) +26 + 11 = 37 (0100101) +26 + 12 = 38 (0100110) +26 + 13 = 39 (0100111) +26 + 14 = 40 (0101000) +26 + 15 = 41 (0101001) +26 + 16 = 42 (0101010) +26 + 17 = 43 (0101011) +26 + 18 = 44 (0101100) +26 + 19 = 45 (0101101) +26 + 20 = 46 (0101110) +26 + 21 = 47 (0101111) +26 + 22 = 48 (0110000) +26 + 23 = 49 (0110001) +26 + 24 = 50 (0110010) +26 + 25 = 51 (0110011) +26 + 26 = 52 (0110100) +26 + 27 = 53 (0110101) +26 + 28 = 54 (0110110) +26 + 29 = 55 (0110111) +26 + 30 = 56 (0111000) +26 + 31 = 57 (0111001) +26 + 32 = 58 (0111010) +26 + 33 = 59 (0111011) +26 + 34 = 60 (0111100) +26 + 35 = 61 (0111101) +26 + 36 = 62 (0111110) +26 + 37 = 63 (0111111) +26 + 38 = 64 (1000000) +26 + 39 = 65 (1000001) +26 + 40 = 66 (1000010) +26 + 41 = 67 (1000011) +26 + 42 = 68 (1000100) +26 + 43 = 69 (1000101) +26 + 44 = 70 (1000110) +26 + 45 = 71 (1000111) +26 + 46 = 72 (1001000) +26 + 47 = 73 (1001001) +26 + 48 = 74 (1001010) +26 + 49 = 75 (1001011) +26 + 50 = 76 (1001100) +26 + 51 = 77 (1001101) +26 + 52 = 78 (1001110) +26 + 53 = 79 (1001111) +26 + 54 = 80 (1010000) +26 + 55 = 81 (1010001) +26 + 56 = 82 (1010010) +26 + 57 = 83 (1010011) +26 + 58 = 84 (1010100) +26 + 59 = 85 (1010101) +26 + 60 = 86 (1010110) +26 + 61 = 87 (1010111) +26 + 62 = 88 (1011000) +26 + 63 = 89 (1011001) +27 + 0 = 27 (0011011) +27 + 1 = 28 (0011100) +27 + 2 = 29 (0011101) +27 + 3 = 30 (0011110) +27 + 4 = 31 (0011111) +27 + 5 = 32 (0100000) +27 + 6 = 33 (0100001) +27 + 7 = 34 (0100010) +27 + 8 = 35 (0100011) +27 + 9 = 36 (0100100) +27 + 10 = 37 (0100101) +27 + 11 = 38 (0100110) +27 + 12 = 39 (0100111) +27 + 13 = 40 (0101000) +27 + 14 = 41 (0101001) +27 + 15 = 42 (0101010) +27 + 16 = 43 (0101011) +27 + 17 = 44 (0101100) +27 + 18 = 45 (0101101) +27 + 19 = 46 (0101110) +27 + 20 = 47 (0101111) +27 + 21 = 48 (0110000) +27 + 22 = 49 (0110001) +27 + 23 = 50 (0110010) +27 + 24 = 51 (0110011) +27 + 25 = 52 (0110100) +27 + 26 = 53 (0110101) +27 + 27 = 54 (0110110) +27 + 28 = 55 (0110111) +27 + 29 = 56 (0111000) +27 + 30 = 57 (0111001) +27 + 31 = 58 (0111010) +27 + 32 = 59 (0111011) +27 + 33 = 60 (0111100) +27 + 34 = 61 (0111101) +27 + 35 = 62 (0111110) +27 + 36 = 63 (0111111) +27 + 37 = 64 (1000000) +27 + 38 = 65 (1000001) +27 + 39 = 66 (1000010) +27 + 40 = 67 (1000011) +27 + 41 = 68 (1000100) +27 + 42 = 69 (1000101) +27 + 43 = 70 (1000110) +27 + 44 = 71 (1000111) +27 + 45 = 72 (1001000) +27 + 46 = 73 (1001001) +27 + 47 = 74 (1001010) +27 + 48 = 75 (1001011) +27 + 49 = 76 (1001100) +27 + 50 = 77 (1001101) +27 + 51 = 78 (1001110) +27 + 52 = 79 (1001111) +27 + 53 = 80 (1010000) +27 + 54 = 81 (1010001) +27 + 55 = 82 (1010010) +27 + 56 = 83 (1010011) +27 + 57 = 84 (1010100) +27 + 58 = 85 (1010101) +27 + 59 = 86 (1010110) +27 + 60 = 87 (1010111) +27 + 61 = 88 (1011000) +27 + 62 = 89 (1011001) +27 + 63 = 90 (1011010) +28 + 0 = 28 (0011100) +28 + 1 = 29 (0011101) +28 + 2 = 30 (0011110) +28 + 3 = 31 (0011111) +28 + 4 = 32 (0100000) +28 + 5 = 33 (0100001) +28 + 6 = 34 (0100010) +28 + 7 = 35 (0100011) +28 + 8 = 36 (0100100) +28 + 9 = 37 (0100101) +28 + 10 = 38 (0100110) +28 + 11 = 39 (0100111) +28 + 12 = 40 (0101000) +28 + 13 = 41 (0101001) +28 + 14 = 42 (0101010) +28 + 15 = 43 (0101011) +28 + 16 = 44 (0101100) +28 + 17 = 45 (0101101) +28 + 18 = 46 (0101110) +28 + 19 = 47 (0101111) +28 + 20 = 48 (0110000) +28 + 21 = 49 (0110001) +28 + 22 = 50 (0110010) +28 + 23 = 51 (0110011) +28 + 24 = 52 (0110100) +28 + 25 = 53 (0110101) +28 + 26 = 54 (0110110) +28 + 27 = 55 (0110111) +28 + 28 = 56 (0111000) +28 + 29 = 57 (0111001) +28 + 30 = 58 (0111010) +28 + 31 = 59 (0111011) +28 + 32 = 60 (0111100) +28 + 33 = 61 (0111101) +28 + 34 = 62 (0111110) +28 + 35 = 63 (0111111) +28 + 36 = 64 (1000000) +28 + 37 = 65 (1000001) +28 + 38 = 66 (1000010) +28 + 39 = 67 (1000011) +28 + 40 = 68 (1000100) +28 + 41 = 69 (1000101) +28 + 42 = 70 (1000110) +28 + 43 = 71 (1000111) +28 + 44 = 72 (1001000) +28 + 45 = 73 (1001001) +28 + 46 = 74 (1001010) +28 + 47 = 75 (1001011) +28 + 48 = 76 (1001100) +28 + 49 = 77 (1001101) +28 + 50 = 78 (1001110) +28 + 51 = 79 (1001111) +28 + 52 = 80 (1010000) +28 + 53 = 81 (1010001) +28 + 54 = 82 (1010010) +28 + 55 = 83 (1010011) +28 + 56 = 84 (1010100) +28 + 57 = 85 (1010101) +28 + 58 = 86 (1010110) +28 + 59 = 87 (1010111) +28 + 60 = 88 (1011000) +28 + 61 = 89 (1011001) +28 + 62 = 90 (1011010) +28 + 63 = 91 (1011011) +29 + 0 = 29 (0011101) +29 + 1 = 30 (0011110) +29 + 2 = 31 (0011111) +29 + 3 = 32 (0100000) +29 + 4 = 33 (0100001) +29 + 5 = 34 (0100010) +29 + 6 = 35 (0100011) +29 + 7 = 36 (0100100) +29 + 8 = 37 (0100101) +29 + 9 = 38 (0100110) +29 + 10 = 39 (0100111) +29 + 11 = 40 (0101000) +29 + 12 = 41 (0101001) +29 + 13 = 42 (0101010) +29 + 14 = 43 (0101011) +29 + 15 = 44 (0101100) +29 + 16 = 45 (0101101) +29 + 17 = 46 (0101110) +29 + 18 = 47 (0101111) +29 + 19 = 48 (0110000) +29 + 20 = 49 (0110001) +29 + 21 = 50 (0110010) +29 + 22 = 51 (0110011) +29 + 23 = 52 (0110100) +29 + 24 = 53 (0110101) +29 + 25 = 54 (0110110) +29 + 26 = 55 (0110111) +29 + 27 = 56 (0111000) +29 + 28 = 57 (0111001) +29 + 29 = 58 (0111010) +29 + 30 = 59 (0111011) +29 + 31 = 60 (0111100) +29 + 32 = 61 (0111101) +29 + 33 = 62 (0111110) +29 + 34 = 63 (0111111) +29 + 35 = 64 (1000000) +29 + 36 = 65 (1000001) +29 + 37 = 66 (1000010) +29 + 38 = 67 (1000011) +29 + 39 = 68 (1000100) +29 + 40 = 69 (1000101) +29 + 41 = 70 (1000110) +29 + 42 = 71 (1000111) +29 + 43 = 72 (1001000) +29 + 44 = 73 (1001001) +29 + 45 = 74 (1001010) +29 + 46 = 75 (1001011) +29 + 47 = 76 (1001100) +29 + 48 = 77 (1001101) +29 + 49 = 78 (1001110) +29 + 50 = 79 (1001111) +29 + 51 = 80 (1010000) +29 + 52 = 81 (1010001) +29 + 53 = 82 (1010010) +29 + 54 = 83 (1010011) +29 + 55 = 84 (1010100) +29 + 56 = 85 (1010101) +29 + 57 = 86 (1010110) +29 + 58 = 87 (1010111) +29 + 59 = 88 (1011000) +29 + 60 = 89 (1011001) +29 + 61 = 90 (1011010) +29 + 62 = 91 (1011011) +29 + 63 = 92 (1011100) +30 + 0 = 30 (0011110) +30 + 1 = 31 (0011111) +30 + 2 = 32 (0100000) +30 + 3 = 33 (0100001) +30 + 4 = 34 (0100010) +30 + 5 = 35 (0100011) +30 + 6 = 36 (0100100) +30 + 7 = 37 (0100101) +30 + 8 = 38 (0100110) +30 + 9 = 39 (0100111) +30 + 10 = 40 (0101000) +30 + 11 = 41 (0101001) +30 + 12 = 42 (0101010) +30 + 13 = 43 (0101011) +30 + 14 = 44 (0101100) +30 + 15 = 45 (0101101) +30 + 16 = 46 (0101110) +30 + 17 = 47 (0101111) +30 + 18 = 48 (0110000) +30 + 19 = 49 (0110001) +30 + 20 = 50 (0110010) +30 + 21 = 51 (0110011) +30 + 22 = 52 (0110100) +30 + 23 = 53 (0110101) +30 + 24 = 54 (0110110) +30 + 25 = 55 (0110111) +30 + 26 = 56 (0111000) +30 + 27 = 57 (0111001) +30 + 28 = 58 (0111010) +30 + 29 = 59 (0111011) +30 + 30 = 60 (0111100) +30 + 31 = 61 (0111101) +30 + 32 = 62 (0111110) +30 + 33 = 63 (0111111) +30 + 34 = 64 (1000000) +30 + 35 = 65 (1000001) +30 + 36 = 66 (1000010) +30 + 37 = 67 (1000011) +30 + 38 = 68 (1000100) +30 + 39 = 69 (1000101) +30 + 40 = 70 (1000110) +30 + 41 = 71 (1000111) +30 + 42 = 72 (1001000) +30 + 43 = 73 (1001001) +30 + 44 = 74 (1001010) +30 + 45 = 75 (1001011) +30 + 46 = 76 (1001100) +30 + 47 = 77 (1001101) +30 + 48 = 78 (1001110) +30 + 49 = 79 (1001111) +30 + 50 = 80 (1010000) +30 + 51 = 81 (1010001) +30 + 52 = 82 (1010010) +30 + 53 = 83 (1010011) +30 + 54 = 84 (1010100) +30 + 55 = 85 (1010101) +30 + 56 = 86 (1010110) +30 + 57 = 87 (1010111) +30 + 58 = 88 (1011000) +30 + 59 = 89 (1011001) +30 + 60 = 90 (1011010) +30 + 61 = 91 (1011011) +30 + 62 = 92 (1011100) +30 + 63 = 93 (1011101) +31 + 0 = 31 (0011111) +31 + 1 = 32 (0100000) +31 + 2 = 33 (0100001) +31 + 3 = 34 (0100010) +31 + 4 = 35 (0100011) +31 + 5 = 36 (0100100) +31 + 6 = 37 (0100101) +31 + 7 = 38 (0100110) +31 + 8 = 39 (0100111) +31 + 9 = 40 (0101000) +31 + 10 = 41 (0101001) +31 + 11 = 42 (0101010) +31 + 12 = 43 (0101011) +31 + 13 = 44 (0101100) +31 + 14 = 45 (0101101) +31 + 15 = 46 (0101110) +31 + 16 = 47 (0101111) +31 + 17 = 48 (0110000) +31 + 18 = 49 (0110001) +31 + 19 = 50 (0110010) +31 + 20 = 51 (0110011) +31 + 21 = 52 (0110100) +31 + 22 = 53 (0110101) +31 + 23 = 54 (0110110) +31 + 24 = 55 (0110111) +31 + 25 = 56 (0111000) +31 + 26 = 57 (0111001) +31 + 27 = 58 (0111010) +31 + 28 = 59 (0111011) +31 + 29 = 60 (0111100) +31 + 30 = 61 (0111101) +31 + 31 = 62 (0111110) +31 + 32 = 63 (0111111) +31 + 33 = 64 (1000000) +31 + 34 = 65 (1000001) +31 + 35 = 66 (1000010) +31 + 36 = 67 (1000011) +31 + 37 = 68 (1000100) +31 + 38 = 69 (1000101) +31 + 39 = 70 (1000110) +31 + 40 = 71 (1000111) +31 + 41 = 72 (1001000) +31 + 42 = 73 (1001001) +31 + 43 = 74 (1001010) +31 + 44 = 75 (1001011) +31 + 45 = 76 (1001100) +31 + 46 = 77 (1001101) +31 + 47 = 78 (1001110) +31 + 48 = 79 (1001111) +31 + 49 = 80 (1010000) +31 + 50 = 81 (1010001) +31 + 51 = 82 (1010010) +31 + 52 = 83 (1010011) +31 + 53 = 84 (1010100) +31 + 54 = 85 (1010101) +31 + 55 = 86 (1010110) +31 + 56 = 87 (1010111) +31 + 57 = 88 (1011000) +31 + 58 = 89 (1011001) +31 + 59 = 90 (1011010) +31 + 60 = 91 (1011011) +31 + 61 = 92 (1011100) +31 + 62 = 93 (1011101) +31 + 63 = 94 (1011110) +32 + 0 = 32 (0100000) +32 + 1 = 33 (0100001) +32 + 2 = 34 (0100010) +32 + 3 = 35 (0100011) +32 + 4 = 36 (0100100) +32 + 5 = 37 (0100101) +32 + 6 = 38 (0100110) +32 + 7 = 39 (0100111) +32 + 8 = 40 (0101000) +32 + 9 = 41 (0101001) +32 + 10 = 42 (0101010) +32 + 11 = 43 (0101011) +32 + 12 = 44 (0101100) +32 + 13 = 45 (0101101) +32 + 14 = 46 (0101110) +32 + 15 = 47 (0101111) +32 + 16 = 48 (0110000) +32 + 17 = 49 (0110001) +32 + 18 = 50 (0110010) +32 + 19 = 51 (0110011) +32 + 20 = 52 (0110100) +32 + 21 = 53 (0110101) +32 + 22 = 54 (0110110) +32 + 23 = 55 (0110111) +32 + 24 = 56 (0111000) +32 + 25 = 57 (0111001) +32 + 26 = 58 (0111010) +32 + 27 = 59 (0111011) +32 + 28 = 60 (0111100) +32 + 29 = 61 (0111101) +32 + 30 = 62 (0111110) +32 + 31 = 63 (0111111) +32 + 32 = 64 (1000000) +32 + 33 = 65 (1000001) +32 + 34 = 66 (1000010) +32 + 35 = 67 (1000011) +32 + 36 = 68 (1000100) +32 + 37 = 69 (1000101) +32 + 38 = 70 (1000110) +32 + 39 = 71 (1000111) +32 + 40 = 72 (1001000) +32 + 41 = 73 (1001001) +32 + 42 = 74 (1001010) +32 + 43 = 75 (1001011) +32 + 44 = 76 (1001100) +32 + 45 = 77 (1001101) +32 + 46 = 78 (1001110) +32 + 47 = 79 (1001111) +32 + 48 = 80 (1010000) +32 + 49 = 81 (1010001) +32 + 50 = 82 (1010010) +32 + 51 = 83 (1010011) +32 + 52 = 84 (1010100) +32 + 53 = 85 (1010101) +32 + 54 = 86 (1010110) +32 + 55 = 87 (1010111) +32 + 56 = 88 (1011000) +32 + 57 = 89 (1011001) +32 + 58 = 90 (1011010) +32 + 59 = 91 (1011011) +32 + 60 = 92 (1011100) +32 + 61 = 93 (1011101) +32 + 62 = 94 (1011110) +32 + 63 = 95 (1011111) +33 + 0 = 33 (0100001) +33 + 1 = 34 (0100010) +33 + 2 = 35 (0100011) +33 + 3 = 36 (0100100) +33 + 4 = 37 (0100101) +33 + 5 = 38 (0100110) +33 + 6 = 39 (0100111) +33 + 7 = 40 (0101000) +33 + 8 = 41 (0101001) +33 + 9 = 42 (0101010) +33 + 10 = 43 (0101011) +33 + 11 = 44 (0101100) +33 + 12 = 45 (0101101) +33 + 13 = 46 (0101110) +33 + 14 = 47 (0101111) +33 + 15 = 48 (0110000) +33 + 16 = 49 (0110001) +33 + 17 = 50 (0110010) +33 + 18 = 51 (0110011) +33 + 19 = 52 (0110100) +33 + 20 = 53 (0110101) +33 + 21 = 54 (0110110) +33 + 22 = 55 (0110111) +33 + 23 = 56 (0111000) +33 + 24 = 57 (0111001) +33 + 25 = 58 (0111010) +33 + 26 = 59 (0111011) +33 + 27 = 60 (0111100) +33 + 28 = 61 (0111101) +33 + 29 = 62 (0111110) +33 + 30 = 63 (0111111) +33 + 31 = 64 (1000000) +33 + 32 = 65 (1000001) +33 + 33 = 66 (1000010) +33 + 34 = 67 (1000011) +33 + 35 = 68 (1000100) +33 + 36 = 69 (1000101) +33 + 37 = 70 (1000110) +33 + 38 = 71 (1000111) +33 + 39 = 72 (1001000) +33 + 40 = 73 (1001001) +33 + 41 = 74 (1001010) +33 + 42 = 75 (1001011) +33 + 43 = 76 (1001100) +33 + 44 = 77 (1001101) +33 + 45 = 78 (1001110) +33 + 46 = 79 (1001111) +33 + 47 = 80 (1010000) +33 + 48 = 81 (1010001) +33 + 49 = 82 (1010010) +33 + 50 = 83 (1010011) +33 + 51 = 84 (1010100) +33 + 52 = 85 (1010101) +33 + 53 = 86 (1010110) +33 + 54 = 87 (1010111) +33 + 55 = 88 (1011000) +33 + 56 = 89 (1011001) +33 + 57 = 90 (1011010) +33 + 58 = 91 (1011011) +33 + 59 = 92 (1011100) +33 + 60 = 93 (1011101) +33 + 61 = 94 (1011110) +33 + 62 = 95 (1011111) +33 + 63 = 96 (1100000) +34 + 0 = 34 (0100010) +34 + 1 = 35 (0100011) +34 + 2 = 36 (0100100) +34 + 3 = 37 (0100101) +34 + 4 = 38 (0100110) +34 + 5 = 39 (0100111) +34 + 6 = 40 (0101000) +34 + 7 = 41 (0101001) +34 + 8 = 42 (0101010) +34 + 9 = 43 (0101011) +34 + 10 = 44 (0101100) +34 + 11 = 45 (0101101) +34 + 12 = 46 (0101110) +34 + 13 = 47 (0101111) +34 + 14 = 48 (0110000) +34 + 15 = 49 (0110001) +34 + 16 = 50 (0110010) +34 + 17 = 51 (0110011) +34 + 18 = 52 (0110100) +34 + 19 = 53 (0110101) +34 + 20 = 54 (0110110) +34 + 21 = 55 (0110111) +34 + 22 = 56 (0111000) +34 + 23 = 57 (0111001) +34 + 24 = 58 (0111010) +34 + 25 = 59 (0111011) +34 + 26 = 60 (0111100) +34 + 27 = 61 (0111101) +34 + 28 = 62 (0111110) +34 + 29 = 63 (0111111) +34 + 30 = 64 (1000000) +34 + 31 = 65 (1000001) +34 + 32 = 66 (1000010) +34 + 33 = 67 (1000011) +34 + 34 = 68 (1000100) +34 + 35 = 69 (1000101) +34 + 36 = 70 (1000110) +34 + 37 = 71 (1000111) +34 + 38 = 72 (1001000) +34 + 39 = 73 (1001001) +34 + 40 = 74 (1001010) +34 + 41 = 75 (1001011) +34 + 42 = 76 (1001100) +34 + 43 = 77 (1001101) +34 + 44 = 78 (1001110) +34 + 45 = 79 (1001111) +34 + 46 = 80 (1010000) +34 + 47 = 81 (1010001) +34 + 48 = 82 (1010010) +34 + 49 = 83 (1010011) +34 + 50 = 84 (1010100) +34 + 51 = 85 (1010101) +34 + 52 = 86 (1010110) +34 + 53 = 87 (1010111) +34 + 54 = 88 (1011000) +34 + 55 = 89 (1011001) +34 + 56 = 90 (1011010) +34 + 57 = 91 (1011011) +34 + 58 = 92 (1011100) +34 + 59 = 93 (1011101) +34 + 60 = 94 (1011110) +34 + 61 = 95 (1011111) +34 + 62 = 96 (1100000) +34 + 63 = 97 (1100001) +35 + 0 = 35 (0100011) +35 + 1 = 36 (0100100) +35 + 2 = 37 (0100101) +35 + 3 = 38 (0100110) +35 + 4 = 39 (0100111) +35 + 5 = 40 (0101000) +35 + 6 = 41 (0101001) +35 + 7 = 42 (0101010) +35 + 8 = 43 (0101011) +35 + 9 = 44 (0101100) +35 + 10 = 45 (0101101) +35 + 11 = 46 (0101110) +35 + 12 = 47 (0101111) +35 + 13 = 48 (0110000) +35 + 14 = 49 (0110001) +35 + 15 = 50 (0110010) +35 + 16 = 51 (0110011) +35 + 17 = 52 (0110100) +35 + 18 = 53 (0110101) +35 + 19 = 54 (0110110) +35 + 20 = 55 (0110111) +35 + 21 = 56 (0111000) +35 + 22 = 57 (0111001) +35 + 23 = 58 (0111010) +35 + 24 = 59 (0111011) +35 + 25 = 60 (0111100) +35 + 26 = 61 (0111101) +35 + 27 = 62 (0111110) +35 + 28 = 63 (0111111) +35 + 29 = 64 (1000000) +35 + 30 = 65 (1000001) +35 + 31 = 66 (1000010) +35 + 32 = 67 (1000011) +35 + 33 = 68 (1000100) +35 + 34 = 69 (1000101) +35 + 35 = 70 (1000110) +35 + 36 = 71 (1000111) +35 + 37 = 72 (1001000) +35 + 38 = 73 (1001001) +35 + 39 = 74 (1001010) +35 + 40 = 75 (1001011) +35 + 41 = 76 (1001100) +35 + 42 = 77 (1001101) +35 + 43 = 78 (1001110) +35 + 44 = 79 (1001111) +35 + 45 = 80 (1010000) +35 + 46 = 81 (1010001) +35 + 47 = 82 (1010010) +35 + 48 = 83 (1010011) +35 + 49 = 84 (1010100) +35 + 50 = 85 (1010101) +35 + 51 = 86 (1010110) +35 + 52 = 87 (1010111) +35 + 53 = 88 (1011000) +35 + 54 = 89 (1011001) +35 + 55 = 90 (1011010) +35 + 56 = 91 (1011011) +35 + 57 = 92 (1011100) +35 + 58 = 93 (1011101) +35 + 59 = 94 (1011110) +35 + 60 = 95 (1011111) +35 + 61 = 96 (1100000) +35 + 62 = 97 (1100001) +35 + 63 = 98 (1100010) +36 + 0 = 36 (0100100) +36 + 1 = 37 (0100101) +36 + 2 = 38 (0100110) +36 + 3 = 39 (0100111) +36 + 4 = 40 (0101000) +36 + 5 = 41 (0101001) +36 + 6 = 42 (0101010) +36 + 7 = 43 (0101011) +36 + 8 = 44 (0101100) +36 + 9 = 45 (0101101) +36 + 10 = 46 (0101110) +36 + 11 = 47 (0101111) +36 + 12 = 48 (0110000) +36 + 13 = 49 (0110001) +36 + 14 = 50 (0110010) +36 + 15 = 51 (0110011) +36 + 16 = 52 (0110100) +36 + 17 = 53 (0110101) +36 + 18 = 54 (0110110) +36 + 19 = 55 (0110111) +36 + 20 = 56 (0111000) +36 + 21 = 57 (0111001) +36 + 22 = 58 (0111010) +36 + 23 = 59 (0111011) +36 + 24 = 60 (0111100) +36 + 25 = 61 (0111101) +36 + 26 = 62 (0111110) +36 + 27 = 63 (0111111) +36 + 28 = 64 (1000000) +36 + 29 = 65 (1000001) +36 + 30 = 66 (1000010) +36 + 31 = 67 (1000011) +36 + 32 = 68 (1000100) +36 + 33 = 69 (1000101) +36 + 34 = 70 (1000110) +36 + 35 = 71 (1000111) +36 + 36 = 72 (1001000) +36 + 37 = 73 (1001001) +36 + 38 = 74 (1001010) +36 + 39 = 75 (1001011) +36 + 40 = 76 (1001100) +36 + 41 = 77 (1001101) +36 + 42 = 78 (1001110) +36 + 43 = 79 (1001111) +36 + 44 = 80 (1010000) +36 + 45 = 81 (1010001) +36 + 46 = 82 (1010010) +36 + 47 = 83 (1010011) +36 + 48 = 84 (1010100) +36 + 49 = 85 (1010101) +36 + 50 = 86 (1010110) +36 + 51 = 87 (1010111) +36 + 52 = 88 (1011000) +36 + 53 = 89 (1011001) +36 + 54 = 90 (1011010) +36 + 55 = 91 (1011011) +36 + 56 = 92 (1011100) +36 + 57 = 93 (1011101) +36 + 58 = 94 (1011110) +36 + 59 = 95 (1011111) +36 + 60 = 96 (1100000) +36 + 61 = 97 (1100001) +36 + 62 = 98 (1100010) +36 + 63 = 99 (1100011) +37 + 0 = 37 (0100101) +37 + 1 = 38 (0100110) +37 + 2 = 39 (0100111) +37 + 3 = 40 (0101000) +37 + 4 = 41 (0101001) +37 + 5 = 42 (0101010) +37 + 6 = 43 (0101011) +37 + 7 = 44 (0101100) +37 + 8 = 45 (0101101) +37 + 9 = 46 (0101110) +37 + 10 = 47 (0101111) +37 + 11 = 48 (0110000) +37 + 12 = 49 (0110001) +37 + 13 = 50 (0110010) +37 + 14 = 51 (0110011) +37 + 15 = 52 (0110100) +37 + 16 = 53 (0110101) +37 + 17 = 54 (0110110) +37 + 18 = 55 (0110111) +37 + 19 = 56 (0111000) +37 + 20 = 57 (0111001) +37 + 21 = 58 (0111010) +37 + 22 = 59 (0111011) +37 + 23 = 60 (0111100) +37 + 24 = 61 (0111101) +37 + 25 = 62 (0111110) +37 + 26 = 63 (0111111) +37 + 27 = 64 (1000000) +37 + 28 = 65 (1000001) +37 + 29 = 66 (1000010) +37 + 30 = 67 (1000011) +37 + 31 = 68 (1000100) +37 + 32 = 69 (1000101) +37 + 33 = 70 (1000110) +37 + 34 = 71 (1000111) +37 + 35 = 72 (1001000) +37 + 36 = 73 (1001001) +37 + 37 = 74 (1001010) +37 + 38 = 75 (1001011) +37 + 39 = 76 (1001100) +37 + 40 = 77 (1001101) +37 + 41 = 78 (1001110) +37 + 42 = 79 (1001111) +37 + 43 = 80 (1010000) +37 + 44 = 81 (1010001) +37 + 45 = 82 (1010010) +37 + 46 = 83 (1010011) +37 + 47 = 84 (1010100) +37 + 48 = 85 (1010101) +37 + 49 = 86 (1010110) +37 + 50 = 87 (1010111) +37 + 51 = 88 (1011000) +37 + 52 = 89 (1011001) +37 + 53 = 90 (1011010) +37 + 54 = 91 (1011011) +37 + 55 = 92 (1011100) +37 + 56 = 93 (1011101) +37 + 57 = 94 (1011110) +37 + 58 = 95 (1011111) +37 + 59 = 96 (1100000) +37 + 60 = 97 (1100001) +37 + 61 = 98 (1100010) +37 + 62 = 99 (1100011) +37 + 63 = 100 (1100100) +38 + 0 = 38 (0100110) +38 + 1 = 39 (0100111) +38 + 2 = 40 (0101000) +38 + 3 = 41 (0101001) +38 + 4 = 42 (0101010) +38 + 5 = 43 (0101011) +38 + 6 = 44 (0101100) +38 + 7 = 45 (0101101) +38 + 8 = 46 (0101110) +38 + 9 = 47 (0101111) +38 + 10 = 48 (0110000) +38 + 11 = 49 (0110001) +38 + 12 = 50 (0110010) +38 + 13 = 51 (0110011) +38 + 14 = 52 (0110100) +38 + 15 = 53 (0110101) +38 + 16 = 54 (0110110) +38 + 17 = 55 (0110111) +38 + 18 = 56 (0111000) +38 + 19 = 57 (0111001) +38 + 20 = 58 (0111010) +38 + 21 = 59 (0111011) +38 + 22 = 60 (0111100) +38 + 23 = 61 (0111101) +38 + 24 = 62 (0111110) +38 + 25 = 63 (0111111) +38 + 26 = 64 (1000000) +38 + 27 = 65 (1000001) +38 + 28 = 66 (1000010) +38 + 29 = 67 (1000011) +38 + 30 = 68 (1000100) +38 + 31 = 69 (1000101) +38 + 32 = 70 (1000110) +38 + 33 = 71 (1000111) +38 + 34 = 72 (1001000) +38 + 35 = 73 (1001001) +38 + 36 = 74 (1001010) +38 + 37 = 75 (1001011) +38 + 38 = 76 (1001100) +38 + 39 = 77 (1001101) +38 + 40 = 78 (1001110) +38 + 41 = 79 (1001111) +38 + 42 = 80 (1010000) +38 + 43 = 81 (1010001) +38 + 44 = 82 (1010010) +38 + 45 = 83 (1010011) +38 + 46 = 84 (1010100) +38 + 47 = 85 (1010101) +38 + 48 = 86 (1010110) +38 + 49 = 87 (1010111) +38 + 50 = 88 (1011000) +38 + 51 = 89 (1011001) +38 + 52 = 90 (1011010) +38 + 53 = 91 (1011011) +38 + 54 = 92 (1011100) +38 + 55 = 93 (1011101) +38 + 56 = 94 (1011110) +38 + 57 = 95 (1011111) +38 + 58 = 96 (1100000) +38 + 59 = 97 (1100001) +38 + 60 = 98 (1100010) +38 + 61 = 99 (1100011) +38 + 62 = 100 (1100100) +38 + 63 = 101 (1100101) +39 + 0 = 39 (0100111) +39 + 1 = 40 (0101000) +39 + 2 = 41 (0101001) +39 + 3 = 42 (0101010) +39 + 4 = 43 (0101011) +39 + 5 = 44 (0101100) +39 + 6 = 45 (0101101) +39 + 7 = 46 (0101110) +39 + 8 = 47 (0101111) +39 + 9 = 48 (0110000) +39 + 10 = 49 (0110001) +39 + 11 = 50 (0110010) +39 + 12 = 51 (0110011) +39 + 13 = 52 (0110100) +39 + 14 = 53 (0110101) +39 + 15 = 54 (0110110) +39 + 16 = 55 (0110111) +39 + 17 = 56 (0111000) +39 + 18 = 57 (0111001) +39 + 19 = 58 (0111010) +39 + 20 = 59 (0111011) +39 + 21 = 60 (0111100) +39 + 22 = 61 (0111101) +39 + 23 = 62 (0111110) +39 + 24 = 63 (0111111) +39 + 25 = 64 (1000000) +39 + 26 = 65 (1000001) +39 + 27 = 66 (1000010) +39 + 28 = 67 (1000011) +39 + 29 = 68 (1000100) +39 + 30 = 69 (1000101) +39 + 31 = 70 (1000110) +39 + 32 = 71 (1000111) +39 + 33 = 72 (1001000) +39 + 34 = 73 (1001001) +39 + 35 = 74 (1001010) +39 + 36 = 75 (1001011) +39 + 37 = 76 (1001100) +39 + 38 = 77 (1001101) +39 + 39 = 78 (1001110) +39 + 40 = 79 (1001111) +39 + 41 = 80 (1010000) +39 + 42 = 81 (1010001) +39 + 43 = 82 (1010010) +39 + 44 = 83 (1010011) +39 + 45 = 84 (1010100) +39 + 46 = 85 (1010101) +39 + 47 = 86 (1010110) +39 + 48 = 87 (1010111) +39 + 49 = 88 (1011000) +39 + 50 = 89 (1011001) +39 + 51 = 90 (1011010) +39 + 52 = 91 (1011011) +39 + 53 = 92 (1011100) +39 + 54 = 93 (1011101) +39 + 55 = 94 (1011110) +39 + 56 = 95 (1011111) +39 + 57 = 96 (1100000) +39 + 58 = 97 (1100001) +39 + 59 = 98 (1100010) +39 + 60 = 99 (1100011) +39 + 61 = 100 (1100100) +39 + 62 = 101 (1100101) +39 + 63 = 102 (1100110) +40 + 0 = 40 (0101000) +40 + 1 = 41 (0101001) +40 + 2 = 42 (0101010) +40 + 3 = 43 (0101011) +40 + 4 = 44 (0101100) +40 + 5 = 45 (0101101) +40 + 6 = 46 (0101110) +40 + 7 = 47 (0101111) +40 + 8 = 48 (0110000) +40 + 9 = 49 (0110001) +40 + 10 = 50 (0110010) +40 + 11 = 51 (0110011) +40 + 12 = 52 (0110100) +40 + 13 = 53 (0110101) +40 + 14 = 54 (0110110) +40 + 15 = 55 (0110111) +40 + 16 = 56 (0111000) +40 + 17 = 57 (0111001) +40 + 18 = 58 (0111010) +40 + 19 = 59 (0111011) +40 + 20 = 60 (0111100) +40 + 21 = 61 (0111101) +40 + 22 = 62 (0111110) +40 + 23 = 63 (0111111) +40 + 24 = 64 (1000000) +40 + 25 = 65 (1000001) +40 + 26 = 66 (1000010) +40 + 27 = 67 (1000011) +40 + 28 = 68 (1000100) +40 + 29 = 69 (1000101) +40 + 30 = 70 (1000110) +40 + 31 = 71 (1000111) +40 + 32 = 72 (1001000) +40 + 33 = 73 (1001001) +40 + 34 = 74 (1001010) +40 + 35 = 75 (1001011) +40 + 36 = 76 (1001100) +40 + 37 = 77 (1001101) +40 + 38 = 78 (1001110) +40 + 39 = 79 (1001111) +40 + 40 = 80 (1010000) +40 + 41 = 81 (1010001) +40 + 42 = 82 (1010010) +40 + 43 = 83 (1010011) +40 + 44 = 84 (1010100) +40 + 45 = 85 (1010101) +40 + 46 = 86 (1010110) +40 + 47 = 87 (1010111) +40 + 48 = 88 (1011000) +40 + 49 = 89 (1011001) +40 + 50 = 90 (1011010) +40 + 51 = 91 (1011011) +40 + 52 = 92 (1011100) +40 + 53 = 93 (1011101) +40 + 54 = 94 (1011110) +40 + 55 = 95 (1011111) +40 + 56 = 96 (1100000) +40 + 57 = 97 (1100001) +40 + 58 = 98 (1100010) +40 + 59 = 99 (1100011) +40 + 60 = 100 (1100100) +40 + 61 = 101 (1100101) +40 + 62 = 102 (1100110) +40 + 63 = 103 (1100111) +41 + 0 = 41 (0101001) +41 + 1 = 42 (0101010) +41 + 2 = 43 (0101011) +41 + 3 = 44 (0101100) +41 + 4 = 45 (0101101) +41 + 5 = 46 (0101110) +41 + 6 = 47 (0101111) +41 + 7 = 48 (0110000) +41 + 8 = 49 (0110001) +41 + 9 = 50 (0110010) +41 + 10 = 51 (0110011) +41 + 11 = 52 (0110100) +41 + 12 = 53 (0110101) +41 + 13 = 54 (0110110) +41 + 14 = 55 (0110111) +41 + 15 = 56 (0111000) +41 + 16 = 57 (0111001) +41 + 17 = 58 (0111010) +41 + 18 = 59 (0111011) +41 + 19 = 60 (0111100) +41 + 20 = 61 (0111101) +41 + 21 = 62 (0111110) +41 + 22 = 63 (0111111) +41 + 23 = 64 (1000000) +41 + 24 = 65 (1000001) +41 + 25 = 66 (1000010) +41 + 26 = 67 (1000011) +41 + 27 = 68 (1000100) +41 + 28 = 69 (1000101) +41 + 29 = 70 (1000110) +41 + 30 = 71 (1000111) +41 + 31 = 72 (1001000) +41 + 32 = 73 (1001001) +41 + 33 = 74 (1001010) +41 + 34 = 75 (1001011) +41 + 35 = 76 (1001100) +41 + 36 = 77 (1001101) +41 + 37 = 78 (1001110) +41 + 38 = 79 (1001111) +41 + 39 = 80 (1010000) +41 + 40 = 81 (1010001) +41 + 41 = 82 (1010010) +41 + 42 = 83 (1010011) +41 + 43 = 84 (1010100) +41 + 44 = 85 (1010101) +41 + 45 = 86 (1010110) +41 + 46 = 87 (1010111) +41 + 47 = 88 (1011000) +41 + 48 = 89 (1011001) +41 + 49 = 90 (1011010) +41 + 50 = 91 (1011011) +41 + 51 = 92 (1011100) +41 + 52 = 93 (1011101) +41 + 53 = 94 (1011110) +41 + 54 = 95 (1011111) +41 + 55 = 96 (1100000) +41 + 56 = 97 (1100001) +41 + 57 = 98 (1100010) +41 + 58 = 99 (1100011) +41 + 59 = 100 (1100100) +41 + 60 = 101 (1100101) +41 + 61 = 102 (1100110) +41 + 62 = 103 (1100111) +41 + 63 = 104 (1101000) +42 + 0 = 42 (0101010) +42 + 1 = 43 (0101011) +42 + 2 = 44 (0101100) +42 + 3 = 45 (0101101) +42 + 4 = 46 (0101110) +42 + 5 = 47 (0101111) +42 + 6 = 48 (0110000) +42 + 7 = 49 (0110001) +42 + 8 = 50 (0110010) +42 + 9 = 51 (0110011) +42 + 10 = 52 (0110100) +42 + 11 = 53 (0110101) +42 + 12 = 54 (0110110) +42 + 13 = 55 (0110111) +42 + 14 = 56 (0111000) +42 + 15 = 57 (0111001) +42 + 16 = 58 (0111010) +42 + 17 = 59 (0111011) +42 + 18 = 60 (0111100) +42 + 19 = 61 (0111101) +42 + 20 = 62 (0111110) +42 + 21 = 63 (0111111) +42 + 22 = 64 (1000000) +42 + 23 = 65 (1000001) +42 + 24 = 66 (1000010) +42 + 25 = 67 (1000011) +42 + 26 = 68 (1000100) +42 + 27 = 69 (1000101) +42 + 28 = 70 (1000110) +42 + 29 = 71 (1000111) +42 + 30 = 72 (1001000) +42 + 31 = 73 (1001001) +42 + 32 = 74 (1001010) +42 + 33 = 75 (1001011) +42 + 34 = 76 (1001100) +42 + 35 = 77 (1001101) +42 + 36 = 78 (1001110) +42 + 37 = 79 (1001111) +42 + 38 = 80 (1010000) +42 + 39 = 81 (1010001) +42 + 40 = 82 (1010010) +42 + 41 = 83 (1010011) +42 + 42 = 84 (1010100) +42 + 43 = 85 (1010101) +42 + 44 = 86 (1010110) +42 + 45 = 87 (1010111) +42 + 46 = 88 (1011000) +42 + 47 = 89 (1011001) +42 + 48 = 90 (1011010) +42 + 49 = 91 (1011011) +42 + 50 = 92 (1011100) +42 + 51 = 93 (1011101) +42 + 52 = 94 (1011110) +42 + 53 = 95 (1011111) +42 + 54 = 96 (1100000) +42 + 55 = 97 (1100001) +42 + 56 = 98 (1100010) +42 + 57 = 99 (1100011) +42 + 58 = 100 (1100100) +42 + 59 = 101 (1100101) +42 + 60 = 102 (1100110) +42 + 61 = 103 (1100111) +42 + 62 = 104 (1101000) +42 + 63 = 105 (1101001) +43 + 0 = 43 (0101011) +43 + 1 = 44 (0101100) +43 + 2 = 45 (0101101) +43 + 3 = 46 (0101110) +43 + 4 = 47 (0101111) +43 + 5 = 48 (0110000) +43 + 6 = 49 (0110001) +43 + 7 = 50 (0110010) +43 + 8 = 51 (0110011) +43 + 9 = 52 (0110100) +43 + 10 = 53 (0110101) +43 + 11 = 54 (0110110) +43 + 12 = 55 (0110111) +43 + 13 = 56 (0111000) +43 + 14 = 57 (0111001) +43 + 15 = 58 (0111010) +43 + 16 = 59 (0111011) +43 + 17 = 60 (0111100) +43 + 18 = 61 (0111101) +43 + 19 = 62 (0111110) +43 + 20 = 63 (0111111) +43 + 21 = 64 (1000000) +43 + 22 = 65 (1000001) +43 + 23 = 66 (1000010) +43 + 24 = 67 (1000011) +43 + 25 = 68 (1000100) +43 + 26 = 69 (1000101) +43 + 27 = 70 (1000110) +43 + 28 = 71 (1000111) +43 + 29 = 72 (1001000) +43 + 30 = 73 (1001001) +43 + 31 = 74 (1001010) +43 + 32 = 75 (1001011) +43 + 33 = 76 (1001100) +43 + 34 = 77 (1001101) +43 + 35 = 78 (1001110) +43 + 36 = 79 (1001111) +43 + 37 = 80 (1010000) +43 + 38 = 81 (1010001) +43 + 39 = 82 (1010010) +43 + 40 = 83 (1010011) +43 + 41 = 84 (1010100) +43 + 42 = 85 (1010101) +43 + 43 = 86 (1010110) +43 + 44 = 87 (1010111) +43 + 45 = 88 (1011000) +43 + 46 = 89 (1011001) +43 + 47 = 90 (1011010) +43 + 48 = 91 (1011011) +43 + 49 = 92 (1011100) +43 + 50 = 93 (1011101) +43 + 51 = 94 (1011110) +43 + 52 = 95 (1011111) +43 + 53 = 96 (1100000) +43 + 54 = 97 (1100001) +43 + 55 = 98 (1100010) +43 + 56 = 99 (1100011) +43 + 57 = 100 (1100100) +43 + 58 = 101 (1100101) +43 + 59 = 102 (1100110) +43 + 60 = 103 (1100111) +43 + 61 = 104 (1101000) +43 + 62 = 105 (1101001) +43 + 63 = 106 (1101010) +44 + 0 = 44 (0101100) +44 + 1 = 45 (0101101) +44 + 2 = 46 (0101110) +44 + 3 = 47 (0101111) +44 + 4 = 48 (0110000) +44 + 5 = 49 (0110001) +44 + 6 = 50 (0110010) +44 + 7 = 51 (0110011) +44 + 8 = 52 (0110100) +44 + 9 = 53 (0110101) +44 + 10 = 54 (0110110) +44 + 11 = 55 (0110111) +44 + 12 = 56 (0111000) +44 + 13 = 57 (0111001) +44 + 14 = 58 (0111010) +44 + 15 = 59 (0111011) +44 + 16 = 60 (0111100) +44 + 17 = 61 (0111101) +44 + 18 = 62 (0111110) +44 + 19 = 63 (0111111) +44 + 20 = 64 (1000000) +44 + 21 = 65 (1000001) +44 + 22 = 66 (1000010) +44 + 23 = 67 (1000011) +44 + 24 = 68 (1000100) +44 + 25 = 69 (1000101) +44 + 26 = 70 (1000110) +44 + 27 = 71 (1000111) +44 + 28 = 72 (1001000) +44 + 29 = 73 (1001001) +44 + 30 = 74 (1001010) +44 + 31 = 75 (1001011) +44 + 32 = 76 (1001100) +44 + 33 = 77 (1001101) +44 + 34 = 78 (1001110) +44 + 35 = 79 (1001111) +44 + 36 = 80 (1010000) +44 + 37 = 81 (1010001) +44 + 38 = 82 (1010010) +44 + 39 = 83 (1010011) +44 + 40 = 84 (1010100) +44 + 41 = 85 (1010101) +44 + 42 = 86 (1010110) +44 + 43 = 87 (1010111) +44 + 44 = 88 (1011000) +44 + 45 = 89 (1011001) +44 + 46 = 90 (1011010) +44 + 47 = 91 (1011011) +44 + 48 = 92 (1011100) +44 + 49 = 93 (1011101) +44 + 50 = 94 (1011110) +44 + 51 = 95 (1011111) +44 + 52 = 96 (1100000) +44 + 53 = 97 (1100001) +44 + 54 = 98 (1100010) +44 + 55 = 99 (1100011) +44 + 56 = 100 (1100100) +44 + 57 = 101 (1100101) +44 + 58 = 102 (1100110) +44 + 59 = 103 (1100111) +44 + 60 = 104 (1101000) +44 + 61 = 105 (1101001) +44 + 62 = 106 (1101010) +44 + 63 = 107 (1101011) +45 + 0 = 45 (0101101) +45 + 1 = 46 (0101110) +45 + 2 = 47 (0101111) +45 + 3 = 48 (0110000) +45 + 4 = 49 (0110001) +45 + 5 = 50 (0110010) +45 + 6 = 51 (0110011) +45 + 7 = 52 (0110100) +45 + 8 = 53 (0110101) +45 + 9 = 54 (0110110) +45 + 10 = 55 (0110111) +45 + 11 = 56 (0111000) +45 + 12 = 57 (0111001) +45 + 13 = 58 (0111010) +45 + 14 = 59 (0111011) +45 + 15 = 60 (0111100) +45 + 16 = 61 (0111101) +45 + 17 = 62 (0111110) +45 + 18 = 63 (0111111) +45 + 19 = 64 (1000000) +45 + 20 = 65 (1000001) +45 + 21 = 66 (1000010) +45 + 22 = 67 (1000011) +45 + 23 = 68 (1000100) +45 + 24 = 69 (1000101) +45 + 25 = 70 (1000110) +45 + 26 = 71 (1000111) +45 + 27 = 72 (1001000) +45 + 28 = 73 (1001001) +45 + 29 = 74 (1001010) +45 + 30 = 75 (1001011) +45 + 31 = 76 (1001100) +45 + 32 = 77 (1001101) +45 + 33 = 78 (1001110) +45 + 34 = 79 (1001111) +45 + 35 = 80 (1010000) +45 + 36 = 81 (1010001) +45 + 37 = 82 (1010010) +45 + 38 = 83 (1010011) +45 + 39 = 84 (1010100) +45 + 40 = 85 (1010101) +45 + 41 = 86 (1010110) +45 + 42 = 87 (1010111) +45 + 43 = 88 (1011000) +45 + 44 = 89 (1011001) +45 + 45 = 90 (1011010) +45 + 46 = 91 (1011011) +45 + 47 = 92 (1011100) +45 + 48 = 93 (1011101) +45 + 49 = 94 (1011110) +45 + 50 = 95 (1011111) +45 + 51 = 96 (1100000) +45 + 52 = 97 (1100001) +45 + 53 = 98 (1100010) +45 + 54 = 99 (1100011) +45 + 55 = 100 (1100100) +45 + 56 = 101 (1100101) +45 + 57 = 102 (1100110) +45 + 58 = 103 (1100111) +45 + 59 = 104 (1101000) +45 + 60 = 105 (1101001) +45 + 61 = 106 (1101010) +45 + 62 = 107 (1101011) +45 + 63 = 108 (1101100) +46 + 0 = 46 (0101110) +46 + 1 = 47 (0101111) +46 + 2 = 48 (0110000) +46 + 3 = 49 (0110001) +46 + 4 = 50 (0110010) +46 + 5 = 51 (0110011) +46 + 6 = 52 (0110100) +46 + 7 = 53 (0110101) +46 + 8 = 54 (0110110) +46 + 9 = 55 (0110111) +46 + 10 = 56 (0111000) +46 + 11 = 57 (0111001) +46 + 12 = 58 (0111010) +46 + 13 = 59 (0111011) +46 + 14 = 60 (0111100) +46 + 15 = 61 (0111101) +46 + 16 = 62 (0111110) +46 + 17 = 63 (0111111) +46 + 18 = 64 (1000000) +46 + 19 = 65 (1000001) +46 + 20 = 66 (1000010) +46 + 21 = 67 (1000011) +46 + 22 = 68 (1000100) +46 + 23 = 69 (1000101) +46 + 24 = 70 (1000110) +46 + 25 = 71 (1000111) +46 + 26 = 72 (1001000) +46 + 27 = 73 (1001001) +46 + 28 = 74 (1001010) +46 + 29 = 75 (1001011) +46 + 30 = 76 (1001100) +46 + 31 = 77 (1001101) +46 + 32 = 78 (1001110) +46 + 33 = 79 (1001111) +46 + 34 = 80 (1010000) +46 + 35 = 81 (1010001) +46 + 36 = 82 (1010010) +46 + 37 = 83 (1010011) +46 + 38 = 84 (1010100) +46 + 39 = 85 (1010101) +46 + 40 = 86 (1010110) +46 + 41 = 87 (1010111) +46 + 42 = 88 (1011000) +46 + 43 = 89 (1011001) +46 + 44 = 90 (1011010) +46 + 45 = 91 (1011011) +46 + 46 = 92 (1011100) +46 + 47 = 93 (1011101) +46 + 48 = 94 (1011110) +46 + 49 = 95 (1011111) +46 + 50 = 96 (1100000) +46 + 51 = 97 (1100001) +46 + 52 = 98 (1100010) +46 + 53 = 99 (1100011) +46 + 54 = 100 (1100100) +46 + 55 = 101 (1100101) +46 + 56 = 102 (1100110) +46 + 57 = 103 (1100111) +46 + 58 = 104 (1101000) +46 + 59 = 105 (1101001) +46 + 60 = 106 (1101010) +46 + 61 = 107 (1101011) +46 + 62 = 108 (1101100) +46 + 63 = 109 (1101101) +47 + 0 = 47 (0101111) +47 + 1 = 48 (0110000) +47 + 2 = 49 (0110001) +47 + 3 = 50 (0110010) +47 + 4 = 51 (0110011) +47 + 5 = 52 (0110100) +47 + 6 = 53 (0110101) +47 + 7 = 54 (0110110) +47 + 8 = 55 (0110111) +47 + 9 = 56 (0111000) +47 + 10 = 57 (0111001) +47 + 11 = 58 (0111010) +47 + 12 = 59 (0111011) +47 + 13 = 60 (0111100) +47 + 14 = 61 (0111101) +47 + 15 = 62 (0111110) +47 + 16 = 63 (0111111) +47 + 17 = 64 (1000000) +47 + 18 = 65 (1000001) +47 + 19 = 66 (1000010) +47 + 20 = 67 (1000011) +47 + 21 = 68 (1000100) +47 + 22 = 69 (1000101) +47 + 23 = 70 (1000110) +47 + 24 = 71 (1000111) +47 + 25 = 72 (1001000) +47 + 26 = 73 (1001001) +47 + 27 = 74 (1001010) +47 + 28 = 75 (1001011) +47 + 29 = 76 (1001100) +47 + 30 = 77 (1001101) +47 + 31 = 78 (1001110) +47 + 32 = 79 (1001111) +47 + 33 = 80 (1010000) +47 + 34 = 81 (1010001) +47 + 35 = 82 (1010010) +47 + 36 = 83 (1010011) +47 + 37 = 84 (1010100) +47 + 38 = 85 (1010101) +47 + 39 = 86 (1010110) +47 + 40 = 87 (1010111) +47 + 41 = 88 (1011000) +47 + 42 = 89 (1011001) +47 + 43 = 90 (1011010) +47 + 44 = 91 (1011011) +47 + 45 = 92 (1011100) +47 + 46 = 93 (1011101) +47 + 47 = 94 (1011110) +47 + 48 = 95 (1011111) +47 + 49 = 96 (1100000) +47 + 50 = 97 (1100001) +47 + 51 = 98 (1100010) +47 + 52 = 99 (1100011) +47 + 53 = 100 (1100100) +47 + 54 = 101 (1100101) +47 + 55 = 102 (1100110) +47 + 56 = 103 (1100111) +47 + 57 = 104 (1101000) +47 + 58 = 105 (1101001) +47 + 59 = 106 (1101010) +47 + 60 = 107 (1101011) +47 + 61 = 108 (1101100) +47 + 62 = 109 (1101101) +47 + 63 = 110 (1101110) +48 + 0 = 48 (0110000) +48 + 1 = 49 (0110001) +48 + 2 = 50 (0110010) +48 + 3 = 51 (0110011) +48 + 4 = 52 (0110100) +48 + 5 = 53 (0110101) +48 + 6 = 54 (0110110) +48 + 7 = 55 (0110111) +48 + 8 = 56 (0111000) +48 + 9 = 57 (0111001) +48 + 10 = 58 (0111010) +48 + 11 = 59 (0111011) +48 + 12 = 60 (0111100) +48 + 13 = 61 (0111101) +48 + 14 = 62 (0111110) +48 + 15 = 63 (0111111) +48 + 16 = 64 (1000000) +48 + 17 = 65 (1000001) +48 + 18 = 66 (1000010) +48 + 19 = 67 (1000011) +48 + 20 = 68 (1000100) +48 + 21 = 69 (1000101) +48 + 22 = 70 (1000110) +48 + 23 = 71 (1000111) +48 + 24 = 72 (1001000) +48 + 25 = 73 (1001001) +48 + 26 = 74 (1001010) +48 + 27 = 75 (1001011) +48 + 28 = 76 (1001100) +48 + 29 = 77 (1001101) +48 + 30 = 78 (1001110) +48 + 31 = 79 (1001111) +48 + 32 = 80 (1010000) +48 + 33 = 81 (1010001) +48 + 34 = 82 (1010010) +48 + 35 = 83 (1010011) +48 + 36 = 84 (1010100) +48 + 37 = 85 (1010101) +48 + 38 = 86 (1010110) +48 + 39 = 87 (1010111) +48 + 40 = 88 (1011000) +48 + 41 = 89 (1011001) +48 + 42 = 90 (1011010) +48 + 43 = 91 (1011011) +48 + 44 = 92 (1011100) +48 + 45 = 93 (1011101) +48 + 46 = 94 (1011110) +48 + 47 = 95 (1011111) +48 + 48 = 96 (1100000) +48 + 49 = 97 (1100001) +48 + 50 = 98 (1100010) +48 + 51 = 99 (1100011) +48 + 52 = 100 (1100100) +48 + 53 = 101 (1100101) +48 + 54 = 102 (1100110) +48 + 55 = 103 (1100111) +48 + 56 = 104 (1101000) +48 + 57 = 105 (1101001) +48 + 58 = 106 (1101010) +48 + 59 = 107 (1101011) +48 + 60 = 108 (1101100) +48 + 61 = 109 (1101101) +48 + 62 = 110 (1101110) +48 + 63 = 111 (1101111) +49 + 0 = 49 (0110001) +49 + 1 = 50 (0110010) +49 + 2 = 51 (0110011) +49 + 3 = 52 (0110100) +49 + 4 = 53 (0110101) +49 + 5 = 54 (0110110) +49 + 6 = 55 (0110111) +49 + 7 = 56 (0111000) +49 + 8 = 57 (0111001) +49 + 9 = 58 (0111010) +49 + 10 = 59 (0111011) +49 + 11 = 60 (0111100) +49 + 12 = 61 (0111101) +49 + 13 = 62 (0111110) +49 + 14 = 63 (0111111) +49 + 15 = 64 (1000000) +49 + 16 = 65 (1000001) +49 + 17 = 66 (1000010) +49 + 18 = 67 (1000011) +49 + 19 = 68 (1000100) +49 + 20 = 69 (1000101) +49 + 21 = 70 (1000110) +49 + 22 = 71 (1000111) +49 + 23 = 72 (1001000) +49 + 24 = 73 (1001001) +49 + 25 = 74 (1001010) +49 + 26 = 75 (1001011) +49 + 27 = 76 (1001100) +49 + 28 = 77 (1001101) +49 + 29 = 78 (1001110) +49 + 30 = 79 (1001111) +49 + 31 = 80 (1010000) +49 + 32 = 81 (1010001) +49 + 33 = 82 (1010010) +49 + 34 = 83 (1010011) +49 + 35 = 84 (1010100) +49 + 36 = 85 (1010101) +49 + 37 = 86 (1010110) +49 + 38 = 87 (1010111) +49 + 39 = 88 (1011000) +49 + 40 = 89 (1011001) +49 + 41 = 90 (1011010) +49 + 42 = 91 (1011011) +49 + 43 = 92 (1011100) +49 + 44 = 93 (1011101) +49 + 45 = 94 (1011110) +49 + 46 = 95 (1011111) +49 + 47 = 96 (1100000) +49 + 48 = 97 (1100001) +49 + 49 = 98 (1100010) +49 + 50 = 99 (1100011) +49 + 51 = 100 (1100100) +49 + 52 = 101 (1100101) +49 + 53 = 102 (1100110) +49 + 54 = 103 (1100111) +49 + 55 = 104 (1101000) +49 + 56 = 105 (1101001) +49 + 57 = 106 (1101010) +49 + 58 = 107 (1101011) +49 + 59 = 108 (1101100) +49 + 60 = 109 (1101101) +49 + 61 = 110 (1101110) +49 + 62 = 111 (1101111) +49 + 63 = 112 (1110000) +50 + 0 = 50 (0110010) +50 + 1 = 51 (0110011) +50 + 2 = 52 (0110100) +50 + 3 = 53 (0110101) +50 + 4 = 54 (0110110) +50 + 5 = 55 (0110111) +50 + 6 = 56 (0111000) +50 + 7 = 57 (0111001) +50 + 8 = 58 (0111010) +50 + 9 = 59 (0111011) +50 + 10 = 60 (0111100) +50 + 11 = 61 (0111101) +50 + 12 = 62 (0111110) +50 + 13 = 63 (0111111) +50 + 14 = 64 (1000000) +50 + 15 = 65 (1000001) +50 + 16 = 66 (1000010) +50 + 17 = 67 (1000011) +50 + 18 = 68 (1000100) +50 + 19 = 69 (1000101) +50 + 20 = 70 (1000110) +50 + 21 = 71 (1000111) +50 + 22 = 72 (1001000) +50 + 23 = 73 (1001001) +50 + 24 = 74 (1001010) +50 + 25 = 75 (1001011) +50 + 26 = 76 (1001100) +50 + 27 = 77 (1001101) +50 + 28 = 78 (1001110) +50 + 29 = 79 (1001111) +50 + 30 = 80 (1010000) +50 + 31 = 81 (1010001) +50 + 32 = 82 (1010010) +50 + 33 = 83 (1010011) +50 + 34 = 84 (1010100) +50 + 35 = 85 (1010101) +50 + 36 = 86 (1010110) +50 + 37 = 87 (1010111) +50 + 38 = 88 (1011000) +50 + 39 = 89 (1011001) +50 + 40 = 90 (1011010) +50 + 41 = 91 (1011011) +50 + 42 = 92 (1011100) +50 + 43 = 93 (1011101) +50 + 44 = 94 (1011110) +50 + 45 = 95 (1011111) +50 + 46 = 96 (1100000) +50 + 47 = 97 (1100001) +50 + 48 = 98 (1100010) +50 + 49 = 99 (1100011) +50 + 50 = 100 (1100100) +50 + 51 = 101 (1100101) +50 + 52 = 102 (1100110) +50 + 53 = 103 (1100111) +50 + 54 = 104 (1101000) +50 + 55 = 105 (1101001) +50 + 56 = 106 (1101010) +50 + 57 = 107 (1101011) +50 + 58 = 108 (1101100) +50 + 59 = 109 (1101101) +50 + 60 = 110 (1101110) +50 + 61 = 111 (1101111) +50 + 62 = 112 (1110000) +50 + 63 = 113 (1110001) +51 + 0 = 51 (0110011) +51 + 1 = 52 (0110100) +51 + 2 = 53 (0110101) +51 + 3 = 54 (0110110) +51 + 4 = 55 (0110111) +51 + 5 = 56 (0111000) +51 + 6 = 57 (0111001) +51 + 7 = 58 (0111010) +51 + 8 = 59 (0111011) +51 + 9 = 60 (0111100) +51 + 10 = 61 (0111101) +51 + 11 = 62 (0111110) +51 + 12 = 63 (0111111) +51 + 13 = 64 (1000000) +51 + 14 = 65 (1000001) +51 + 15 = 66 (1000010) +51 + 16 = 67 (1000011) +51 + 17 = 68 (1000100) +51 + 18 = 69 (1000101) +51 + 19 = 70 (1000110) +51 + 20 = 71 (1000111) +51 + 21 = 72 (1001000) +51 + 22 = 73 (1001001) +51 + 23 = 74 (1001010) +51 + 24 = 75 (1001011) +51 + 25 = 76 (1001100) +51 + 26 = 77 (1001101) +51 + 27 = 78 (1001110) +51 + 28 = 79 (1001111) +51 + 29 = 80 (1010000) +51 + 30 = 81 (1010001) +51 + 31 = 82 (1010010) +51 + 32 = 83 (1010011) +51 + 33 = 84 (1010100) +51 + 34 = 85 (1010101) +51 + 35 = 86 (1010110) +51 + 36 = 87 (1010111) +51 + 37 = 88 (1011000) +51 + 38 = 89 (1011001) +51 + 39 = 90 (1011010) +51 + 40 = 91 (1011011) +51 + 41 = 92 (1011100) +51 + 42 = 93 (1011101) +51 + 43 = 94 (1011110) +51 + 44 = 95 (1011111) +51 + 45 = 96 (1100000) +51 + 46 = 97 (1100001) +51 + 47 = 98 (1100010) +51 + 48 = 99 (1100011) +51 + 49 = 100 (1100100) +51 + 50 = 101 (1100101) +51 + 51 = 102 (1100110) +51 + 52 = 103 (1100111) +51 + 53 = 104 (1101000) +51 + 54 = 105 (1101001) +51 + 55 = 106 (1101010) +51 + 56 = 107 (1101011) +51 + 57 = 108 (1101100) +51 + 58 = 109 (1101101) +51 + 59 = 110 (1101110) +51 + 60 = 111 (1101111) +51 + 61 = 112 (1110000) +51 + 62 = 113 (1110001) +51 + 63 = 114 (1110010) +52 + 0 = 52 (0110100) +52 + 1 = 53 (0110101) +52 + 2 = 54 (0110110) +52 + 3 = 55 (0110111) +52 + 4 = 56 (0111000) +52 + 5 = 57 (0111001) +52 + 6 = 58 (0111010) +52 + 7 = 59 (0111011) +52 + 8 = 60 (0111100) +52 + 9 = 61 (0111101) +52 + 10 = 62 (0111110) +52 + 11 = 63 (0111111) +52 + 12 = 64 (1000000) +52 + 13 = 65 (1000001) +52 + 14 = 66 (1000010) +52 + 15 = 67 (1000011) +52 + 16 = 68 (1000100) +52 + 17 = 69 (1000101) +52 + 18 = 70 (1000110) +52 + 19 = 71 (1000111) +52 + 20 = 72 (1001000) +52 + 21 = 73 (1001001) +52 + 22 = 74 (1001010) +52 + 23 = 75 (1001011) +52 + 24 = 76 (1001100) +52 + 25 = 77 (1001101) +52 + 26 = 78 (1001110) +52 + 27 = 79 (1001111) +52 + 28 = 80 (1010000) +52 + 29 = 81 (1010001) +52 + 30 = 82 (1010010) +52 + 31 = 83 (1010011) +52 + 32 = 84 (1010100) +52 + 33 = 85 (1010101) +52 + 34 = 86 (1010110) +52 + 35 = 87 (1010111) +52 + 36 = 88 (1011000) +52 + 37 = 89 (1011001) +52 + 38 = 90 (1011010) +52 + 39 = 91 (1011011) +52 + 40 = 92 (1011100) +52 + 41 = 93 (1011101) +52 + 42 = 94 (1011110) +52 + 43 = 95 (1011111) +52 + 44 = 96 (1100000) +52 + 45 = 97 (1100001) +52 + 46 = 98 (1100010) +52 + 47 = 99 (1100011) +52 + 48 = 100 (1100100) +52 + 49 = 101 (1100101) +52 + 50 = 102 (1100110) +52 + 51 = 103 (1100111) +52 + 52 = 104 (1101000) +52 + 53 = 105 (1101001) +52 + 54 = 106 (1101010) +52 + 55 = 107 (1101011) +52 + 56 = 108 (1101100) +52 + 57 = 109 (1101101) +52 + 58 = 110 (1101110) +52 + 59 = 111 (1101111) +52 + 60 = 112 (1110000) +52 + 61 = 113 (1110001) +52 + 62 = 114 (1110010) +52 + 63 = 115 (1110011) +53 + 0 = 53 (0110101) +53 + 1 = 54 (0110110) +53 + 2 = 55 (0110111) +53 + 3 = 56 (0111000) +53 + 4 = 57 (0111001) +53 + 5 = 58 (0111010) +53 + 6 = 59 (0111011) +53 + 7 = 60 (0111100) +53 + 8 = 61 (0111101) +53 + 9 = 62 (0111110) +53 + 10 = 63 (0111111) +53 + 11 = 64 (1000000) +53 + 12 = 65 (1000001) +53 + 13 = 66 (1000010) +53 + 14 = 67 (1000011) +53 + 15 = 68 (1000100) +53 + 16 = 69 (1000101) +53 + 17 = 70 (1000110) +53 + 18 = 71 (1000111) +53 + 19 = 72 (1001000) +53 + 20 = 73 (1001001) +53 + 21 = 74 (1001010) +53 + 22 = 75 (1001011) +53 + 23 = 76 (1001100) +53 + 24 = 77 (1001101) +53 + 25 = 78 (1001110) +53 + 26 = 79 (1001111) +53 + 27 = 80 (1010000) +53 + 28 = 81 (1010001) +53 + 29 = 82 (1010010) +53 + 30 = 83 (1010011) +53 + 31 = 84 (1010100) +53 + 32 = 85 (1010101) +53 + 33 = 86 (1010110) +53 + 34 = 87 (1010111) +53 + 35 = 88 (1011000) +53 + 36 = 89 (1011001) +53 + 37 = 90 (1011010) +53 + 38 = 91 (1011011) +53 + 39 = 92 (1011100) +53 + 40 = 93 (1011101) +53 + 41 = 94 (1011110) +53 + 42 = 95 (1011111) +53 + 43 = 96 (1100000) +53 + 44 = 97 (1100001) +53 + 45 = 98 (1100010) +53 + 46 = 99 (1100011) +53 + 47 = 100 (1100100) +53 + 48 = 101 (1100101) +53 + 49 = 102 (1100110) +53 + 50 = 103 (1100111) +53 + 51 = 104 (1101000) +53 + 52 = 105 (1101001) +53 + 53 = 106 (1101010) +53 + 54 = 107 (1101011) +53 + 55 = 108 (1101100) +53 + 56 = 109 (1101101) +53 + 57 = 110 (1101110) +53 + 58 = 111 (1101111) +53 + 59 = 112 (1110000) +53 + 60 = 113 (1110001) +53 + 61 = 114 (1110010) +53 + 62 = 115 (1110011) +53 + 63 = 116 (1110100) +54 + 0 = 54 (0110110) +54 + 1 = 55 (0110111) +54 + 2 = 56 (0111000) +54 + 3 = 57 (0111001) +54 + 4 = 58 (0111010) +54 + 5 = 59 (0111011) +54 + 6 = 60 (0111100) +54 + 7 = 61 (0111101) +54 + 8 = 62 (0111110) +54 + 9 = 63 (0111111) +54 + 10 = 64 (1000000) +54 + 11 = 65 (1000001) +54 + 12 = 66 (1000010) +54 + 13 = 67 (1000011) +54 + 14 = 68 (1000100) +54 + 15 = 69 (1000101) +54 + 16 = 70 (1000110) +54 + 17 = 71 (1000111) +54 + 18 = 72 (1001000) +54 + 19 = 73 (1001001) +54 + 20 = 74 (1001010) +54 + 21 = 75 (1001011) +54 + 22 = 76 (1001100) +54 + 23 = 77 (1001101) +54 + 24 = 78 (1001110) +54 + 25 = 79 (1001111) +54 + 26 = 80 (1010000) +54 + 27 = 81 (1010001) +54 + 28 = 82 (1010010) +54 + 29 = 83 (1010011) +54 + 30 = 84 (1010100) +54 + 31 = 85 (1010101) +54 + 32 = 86 (1010110) +54 + 33 = 87 (1010111) +54 + 34 = 88 (1011000) +54 + 35 = 89 (1011001) +54 + 36 = 90 (1011010) +54 + 37 = 91 (1011011) +54 + 38 = 92 (1011100) +54 + 39 = 93 (1011101) +54 + 40 = 94 (1011110) +54 + 41 = 95 (1011111) +54 + 42 = 96 (1100000) +54 + 43 = 97 (1100001) +54 + 44 = 98 (1100010) +54 + 45 = 99 (1100011) +54 + 46 = 100 (1100100) +54 + 47 = 101 (1100101) +54 + 48 = 102 (1100110) +54 + 49 = 103 (1100111) +54 + 50 = 104 (1101000) +54 + 51 = 105 (1101001) +54 + 52 = 106 (1101010) +54 + 53 = 107 (1101011) +54 + 54 = 108 (1101100) +54 + 55 = 109 (1101101) +54 + 56 = 110 (1101110) +54 + 57 = 111 (1101111) +54 + 58 = 112 (1110000) +54 + 59 = 113 (1110001) +54 + 60 = 114 (1110010) +54 + 61 = 115 (1110011) +54 + 62 = 116 (1110100) +54 + 63 = 117 (1110101) +55 + 0 = 55 (0110111) +55 + 1 = 56 (0111000) +55 + 2 = 57 (0111001) +55 + 3 = 58 (0111010) +55 + 4 = 59 (0111011) +55 + 5 = 60 (0111100) +55 + 6 = 61 (0111101) +55 + 7 = 62 (0111110) +55 + 8 = 63 (0111111) +55 + 9 = 64 (1000000) +55 + 10 = 65 (1000001) +55 + 11 = 66 (1000010) +55 + 12 = 67 (1000011) +55 + 13 = 68 (1000100) +55 + 14 = 69 (1000101) +55 + 15 = 70 (1000110) +55 + 16 = 71 (1000111) +55 + 17 = 72 (1001000) +55 + 18 = 73 (1001001) +55 + 19 = 74 (1001010) +55 + 20 = 75 (1001011) +55 + 21 = 76 (1001100) +55 + 22 = 77 (1001101) +55 + 23 = 78 (1001110) +55 + 24 = 79 (1001111) +55 + 25 = 80 (1010000) +55 + 26 = 81 (1010001) +55 + 27 = 82 (1010010) +55 + 28 = 83 (1010011) +55 + 29 = 84 (1010100) +55 + 30 = 85 (1010101) +55 + 31 = 86 (1010110) +55 + 32 = 87 (1010111) +55 + 33 = 88 (1011000) +55 + 34 = 89 (1011001) +55 + 35 = 90 (1011010) +55 + 36 = 91 (1011011) +55 + 37 = 92 (1011100) +55 + 38 = 93 (1011101) +55 + 39 = 94 (1011110) +55 + 40 = 95 (1011111) +55 + 41 = 96 (1100000) +55 + 42 = 97 (1100001) +55 + 43 = 98 (1100010) +55 + 44 = 99 (1100011) +55 + 45 = 100 (1100100) +55 + 46 = 101 (1100101) +55 + 47 = 102 (1100110) +55 + 48 = 103 (1100111) +55 + 49 = 104 (1101000) +55 + 50 = 105 (1101001) +55 + 51 = 106 (1101010) +55 + 52 = 107 (1101011) +55 + 53 = 108 (1101100) +55 + 54 = 109 (1101101) +55 + 55 = 110 (1101110) +55 + 56 = 111 (1101111) +55 + 57 = 112 (1110000) +55 + 58 = 113 (1110001) +55 + 59 = 114 (1110010) +55 + 60 = 115 (1110011) +55 + 61 = 116 (1110100) +55 + 62 = 117 (1110101) +55 + 63 = 118 (1110110) +56 + 0 = 56 (0111000) +56 + 1 = 57 (0111001) +56 + 2 = 58 (0111010) +56 + 3 = 59 (0111011) +56 + 4 = 60 (0111100) +56 + 5 = 61 (0111101) +56 + 6 = 62 (0111110) +56 + 7 = 63 (0111111) +56 + 8 = 64 (1000000) +56 + 9 = 65 (1000001) +56 + 10 = 66 (1000010) +56 + 11 = 67 (1000011) +56 + 12 = 68 (1000100) +56 + 13 = 69 (1000101) +56 + 14 = 70 (1000110) +56 + 15 = 71 (1000111) +56 + 16 = 72 (1001000) +56 + 17 = 73 (1001001) +56 + 18 = 74 (1001010) +56 + 19 = 75 (1001011) +56 + 20 = 76 (1001100) +56 + 21 = 77 (1001101) +56 + 22 = 78 (1001110) +56 + 23 = 79 (1001111) +56 + 24 = 80 (1010000) +56 + 25 = 81 (1010001) +56 + 26 = 82 (1010010) +56 + 27 = 83 (1010011) +56 + 28 = 84 (1010100) +56 + 29 = 85 (1010101) +56 + 30 = 86 (1010110) +56 + 31 = 87 (1010111) +56 + 32 = 88 (1011000) +56 + 33 = 89 (1011001) +56 + 34 = 90 (1011010) +56 + 35 = 91 (1011011) +56 + 36 = 92 (1011100) +56 + 37 = 93 (1011101) +56 + 38 = 94 (1011110) +56 + 39 = 95 (1011111) +56 + 40 = 96 (1100000) +56 + 41 = 97 (1100001) +56 + 42 = 98 (1100010) +56 + 43 = 99 (1100011) +56 + 44 = 100 (1100100) +56 + 45 = 101 (1100101) +56 + 46 = 102 (1100110) +56 + 47 = 103 (1100111) +56 + 48 = 104 (1101000) +56 + 49 = 105 (1101001) +56 + 50 = 106 (1101010) +56 + 51 = 107 (1101011) +56 + 52 = 108 (1101100) +56 + 53 = 109 (1101101) +56 + 54 = 110 (1101110) +56 + 55 = 111 (1101111) +56 + 56 = 112 (1110000) +56 + 57 = 113 (1110001) +56 + 58 = 114 (1110010) +56 + 59 = 115 (1110011) +56 + 60 = 116 (1110100) +56 + 61 = 117 (1110101) +56 + 62 = 118 (1110110) +56 + 63 = 119 (1110111) +57 + 0 = 57 (0111001) +57 + 1 = 58 (0111010) +57 + 2 = 59 (0111011) +57 + 3 = 60 (0111100) +57 + 4 = 61 (0111101) +57 + 5 = 62 (0111110) +57 + 6 = 63 (0111111) +57 + 7 = 64 (1000000) +57 + 8 = 65 (1000001) +57 + 9 = 66 (1000010) +57 + 10 = 67 (1000011) +57 + 11 = 68 (1000100) +57 + 12 = 69 (1000101) +57 + 13 = 70 (1000110) +57 + 14 = 71 (1000111) +57 + 15 = 72 (1001000) +57 + 16 = 73 (1001001) +57 + 17 = 74 (1001010) +57 + 18 = 75 (1001011) +57 + 19 = 76 (1001100) +57 + 20 = 77 (1001101) +57 + 21 = 78 (1001110) +57 + 22 = 79 (1001111) +57 + 23 = 80 (1010000) +57 + 24 = 81 (1010001) +57 + 25 = 82 (1010010) +57 + 26 = 83 (1010011) +57 + 27 = 84 (1010100) +57 + 28 = 85 (1010101) +57 + 29 = 86 (1010110) +57 + 30 = 87 (1010111) +57 + 31 = 88 (1011000) +57 + 32 = 89 (1011001) +57 + 33 = 90 (1011010) +57 + 34 = 91 (1011011) +57 + 35 = 92 (1011100) +57 + 36 = 93 (1011101) +57 + 37 = 94 (1011110) +57 + 38 = 95 (1011111) +57 + 39 = 96 (1100000) +57 + 40 = 97 (1100001) +57 + 41 = 98 (1100010) +57 + 42 = 99 (1100011) +57 + 43 = 100 (1100100) +57 + 44 = 101 (1100101) +57 + 45 = 102 (1100110) +57 + 46 = 103 (1100111) +57 + 47 = 104 (1101000) +57 + 48 = 105 (1101001) +57 + 49 = 106 (1101010) +57 + 50 = 107 (1101011) +57 + 51 = 108 (1101100) +57 + 52 = 109 (1101101) +57 + 53 = 110 (1101110) +57 + 54 = 111 (1101111) +57 + 55 = 112 (1110000) +57 + 56 = 113 (1110001) +57 + 57 = 114 (1110010) +57 + 58 = 115 (1110011) +57 + 59 = 116 (1110100) +57 + 60 = 117 (1110101) +57 + 61 = 118 (1110110) +57 + 62 = 119 (1110111) +57 + 63 = 120 (1111000) +58 + 0 = 58 (0111010) +58 + 1 = 59 (0111011) +58 + 2 = 60 (0111100) +58 + 3 = 61 (0111101) +58 + 4 = 62 (0111110) +58 + 5 = 63 (0111111) +58 + 6 = 64 (1000000) +58 + 7 = 65 (1000001) +58 + 8 = 66 (1000010) +58 + 9 = 67 (1000011) +58 + 10 = 68 (1000100) +58 + 11 = 69 (1000101) +58 + 12 = 70 (1000110) +58 + 13 = 71 (1000111) +58 + 14 = 72 (1001000) +58 + 15 = 73 (1001001) +58 + 16 = 74 (1001010) +58 + 17 = 75 (1001011) +58 + 18 = 76 (1001100) +58 + 19 = 77 (1001101) +58 + 20 = 78 (1001110) +58 + 21 = 79 (1001111) +58 + 22 = 80 (1010000) +58 + 23 = 81 (1010001) +58 + 24 = 82 (1010010) +58 + 25 = 83 (1010011) +58 + 26 = 84 (1010100) +58 + 27 = 85 (1010101) +58 + 28 = 86 (1010110) +58 + 29 = 87 (1010111) +58 + 30 = 88 (1011000) +58 + 31 = 89 (1011001) +58 + 32 = 90 (1011010) +58 + 33 = 91 (1011011) +58 + 34 = 92 (1011100) +58 + 35 = 93 (1011101) +58 + 36 = 94 (1011110) +58 + 37 = 95 (1011111) +58 + 38 = 96 (1100000) +58 + 39 = 97 (1100001) +58 + 40 = 98 (1100010) +58 + 41 = 99 (1100011) +58 + 42 = 100 (1100100) +58 + 43 = 101 (1100101) +58 + 44 = 102 (1100110) +58 + 45 = 103 (1100111) +58 + 46 = 104 (1101000) +58 + 47 = 105 (1101001) +58 + 48 = 106 (1101010) +58 + 49 = 107 (1101011) +58 + 50 = 108 (1101100) +58 + 51 = 109 (1101101) +58 + 52 = 110 (1101110) +58 + 53 = 111 (1101111) +58 + 54 = 112 (1110000) +58 + 55 = 113 (1110001) +58 + 56 = 114 (1110010) +58 + 57 = 115 (1110011) +58 + 58 = 116 (1110100) +58 + 59 = 117 (1110101) +58 + 60 = 118 (1110110) +58 + 61 = 119 (1110111) +58 + 62 = 120 (1111000) +58 + 63 = 121 (1111001) +59 + 0 = 59 (0111011) +59 + 1 = 60 (0111100) +59 + 2 = 61 (0111101) +59 + 3 = 62 (0111110) +59 + 4 = 63 (0111111) +59 + 5 = 64 (1000000) +59 + 6 = 65 (1000001) +59 + 7 = 66 (1000010) +59 + 8 = 67 (1000011) +59 + 9 = 68 (1000100) +59 + 10 = 69 (1000101) +59 + 11 = 70 (1000110) +59 + 12 = 71 (1000111) +59 + 13 = 72 (1001000) +59 + 14 = 73 (1001001) +59 + 15 = 74 (1001010) +59 + 16 = 75 (1001011) +59 + 17 = 76 (1001100) +59 + 18 = 77 (1001101) +59 + 19 = 78 (1001110) +59 + 20 = 79 (1001111) +59 + 21 = 80 (1010000) +59 + 22 = 81 (1010001) +59 + 23 = 82 (1010010) +59 + 24 = 83 (1010011) +59 + 25 = 84 (1010100) +59 + 26 = 85 (1010101) +59 + 27 = 86 (1010110) +59 + 28 = 87 (1010111) +59 + 29 = 88 (1011000) +59 + 30 = 89 (1011001) +59 + 31 = 90 (1011010) +59 + 32 = 91 (1011011) +59 + 33 = 92 (1011100) +59 + 34 = 93 (1011101) +59 + 35 = 94 (1011110) +59 + 36 = 95 (1011111) +59 + 37 = 96 (1100000) +59 + 38 = 97 (1100001) +59 + 39 = 98 (1100010) +59 + 40 = 99 (1100011) +59 + 41 = 100 (1100100) +59 + 42 = 101 (1100101) +59 + 43 = 102 (1100110) +59 + 44 = 103 (1100111) +59 + 45 = 104 (1101000) +59 + 46 = 105 (1101001) +59 + 47 = 106 (1101010) +59 + 48 = 107 (1101011) +59 + 49 = 108 (1101100) +59 + 50 = 109 (1101101) +59 + 51 = 110 (1101110) +59 + 52 = 111 (1101111) +59 + 53 = 112 (1110000) +59 + 54 = 113 (1110001) +59 + 55 = 114 (1110010) +59 + 56 = 115 (1110011) +59 + 57 = 116 (1110100) +59 + 58 = 117 (1110101) +59 + 59 = 118 (1110110) +59 + 60 = 119 (1110111) +59 + 61 = 120 (1111000) +59 + 62 = 121 (1111001) +59 + 63 = 122 (1111010) +60 + 0 = 60 (0111100) +60 + 1 = 61 (0111101) +60 + 2 = 62 (0111110) +60 + 3 = 63 (0111111) +60 + 4 = 64 (1000000) +60 + 5 = 65 (1000001) +60 + 6 = 66 (1000010) +60 + 7 = 67 (1000011) +60 + 8 = 68 (1000100) +60 + 9 = 69 (1000101) +60 + 10 = 70 (1000110) +60 + 11 = 71 (1000111) +60 + 12 = 72 (1001000) +60 + 13 = 73 (1001001) +60 + 14 = 74 (1001010) +60 + 15 = 75 (1001011) +60 + 16 = 76 (1001100) +60 + 17 = 77 (1001101) +60 + 18 = 78 (1001110) +60 + 19 = 79 (1001111) +60 + 20 = 80 (1010000) +60 + 21 = 81 (1010001) +60 + 22 = 82 (1010010) +60 + 23 = 83 (1010011) +60 + 24 = 84 (1010100) +60 + 25 = 85 (1010101) +60 + 26 = 86 (1010110) +60 + 27 = 87 (1010111) +60 + 28 = 88 (1011000) +60 + 29 = 89 (1011001) +60 + 30 = 90 (1011010) +60 + 31 = 91 (1011011) +60 + 32 = 92 (1011100) +60 + 33 = 93 (1011101) +60 + 34 = 94 (1011110) +60 + 35 = 95 (1011111) +60 + 36 = 96 (1100000) +60 + 37 = 97 (1100001) +60 + 38 = 98 (1100010) +60 + 39 = 99 (1100011) +60 + 40 = 100 (1100100) +60 + 41 = 101 (1100101) +60 + 42 = 102 (1100110) +60 + 43 = 103 (1100111) +60 + 44 = 104 (1101000) +60 + 45 = 105 (1101001) +60 + 46 = 106 (1101010) +60 + 47 = 107 (1101011) +60 + 48 = 108 (1101100) +60 + 49 = 109 (1101101) +60 + 50 = 110 (1101110) +60 + 51 = 111 (1101111) +60 + 52 = 112 (1110000) +60 + 53 = 113 (1110001) +60 + 54 = 114 (1110010) +60 + 55 = 115 (1110011) +60 + 56 = 116 (1110100) +60 + 57 = 117 (1110101) +60 + 58 = 118 (1110110) +60 + 59 = 119 (1110111) +60 + 60 = 120 (1111000) +60 + 61 = 121 (1111001) +60 + 62 = 122 (1111010) +60 + 63 = 123 (1111011) +61 + 0 = 61 (0111101) +61 + 1 = 62 (0111110) +61 + 2 = 63 (0111111) +61 + 3 = 64 (1000000) +61 + 4 = 65 (1000001) +61 + 5 = 66 (1000010) +61 + 6 = 67 (1000011) +61 + 7 = 68 (1000100) +61 + 8 = 69 (1000101) +61 + 9 = 70 (1000110) +61 + 10 = 71 (1000111) +61 + 11 = 72 (1001000) +61 + 12 = 73 (1001001) +61 + 13 = 74 (1001010) +61 + 14 = 75 (1001011) +61 + 15 = 76 (1001100) +61 + 16 = 77 (1001101) +61 + 17 = 78 (1001110) +61 + 18 = 79 (1001111) +61 + 19 = 80 (1010000) +61 + 20 = 81 (1010001) +61 + 21 = 82 (1010010) +61 + 22 = 83 (1010011) +61 + 23 = 84 (1010100) +61 + 24 = 85 (1010101) +61 + 25 = 86 (1010110) +61 + 26 = 87 (1010111) +61 + 27 = 88 (1011000) +61 + 28 = 89 (1011001) +61 + 29 = 90 (1011010) +61 + 30 = 91 (1011011) +61 + 31 = 92 (1011100) +61 + 32 = 93 (1011101) +61 + 33 = 94 (1011110) +61 + 34 = 95 (1011111) +61 + 35 = 96 (1100000) +61 + 36 = 97 (1100001) +61 + 37 = 98 (1100010) +61 + 38 = 99 (1100011) +61 + 39 = 100 (1100100) +61 + 40 = 101 (1100101) +61 + 41 = 102 (1100110) +61 + 42 = 103 (1100111) +61 + 43 = 104 (1101000) +61 + 44 = 105 (1101001) +61 + 45 = 106 (1101010) +61 + 46 = 107 (1101011) +61 + 47 = 108 (1101100) +61 + 48 = 109 (1101101) +61 + 49 = 110 (1101110) +61 + 50 = 111 (1101111) +61 + 51 = 112 (1110000) +61 + 52 = 113 (1110001) +61 + 53 = 114 (1110010) +61 + 54 = 115 (1110011) +61 + 55 = 116 (1110100) +61 + 56 = 117 (1110101) +61 + 57 = 118 (1110110) +61 + 58 = 119 (1110111) +61 + 59 = 120 (1111000) +61 + 60 = 121 (1111001) +61 + 61 = 122 (1111010) +61 + 62 = 123 (1111011) +61 + 63 = 124 (1111100) +62 + 0 = 62 (0111110) +62 + 1 = 63 (0111111) +62 + 2 = 64 (1000000) +62 + 3 = 65 (1000001) +62 + 4 = 66 (1000010) +62 + 5 = 67 (1000011) +62 + 6 = 68 (1000100) +62 + 7 = 69 (1000101) +62 + 8 = 70 (1000110) +62 + 9 = 71 (1000111) +62 + 10 = 72 (1001000) +62 + 11 = 73 (1001001) +62 + 12 = 74 (1001010) +62 + 13 = 75 (1001011) +62 + 14 = 76 (1001100) +62 + 15 = 77 (1001101) +62 + 16 = 78 (1001110) +62 + 17 = 79 (1001111) +62 + 18 = 80 (1010000) +62 + 19 = 81 (1010001) +62 + 20 = 82 (1010010) +62 + 21 = 83 (1010011) +62 + 22 = 84 (1010100) +62 + 23 = 85 (1010101) +62 + 24 = 86 (1010110) +62 + 25 = 87 (1010111) +62 + 26 = 88 (1011000) +62 + 27 = 89 (1011001) +62 + 28 = 90 (1011010) +62 + 29 = 91 (1011011) +62 + 30 = 92 (1011100) +62 + 31 = 93 (1011101) +62 + 32 = 94 (1011110) +62 + 33 = 95 (1011111) +62 + 34 = 96 (1100000) +62 + 35 = 97 (1100001) +62 + 36 = 98 (1100010) +62 + 37 = 99 (1100011) +62 + 38 = 100 (1100100) +62 + 39 = 101 (1100101) +62 + 40 = 102 (1100110) +62 + 41 = 103 (1100111) +62 + 42 = 104 (1101000) +62 + 43 = 105 (1101001) +62 + 44 = 106 (1101010) +62 + 45 = 107 (1101011) +62 + 46 = 108 (1101100) +62 + 47 = 109 (1101101) +62 + 48 = 110 (1101110) +62 + 49 = 111 (1101111) +62 + 50 = 112 (1110000) +62 + 51 = 113 (1110001) +62 + 52 = 114 (1110010) +62 + 53 = 115 (1110011) +62 + 54 = 116 (1110100) +62 + 55 = 117 (1110101) +62 + 56 = 118 (1110110) +62 + 57 = 119 (1110111) +62 + 58 = 120 (1111000) +62 + 59 = 121 (1111001) +62 + 60 = 122 (1111010) +62 + 61 = 123 (1111011) +62 + 62 = 124 (1111100) +62 + 63 = 125 (1111101) +63 + 0 = 63 (0111111) +63 + 1 = 64 (1000000) +63 + 2 = 65 (1000001) +63 + 3 = 66 (1000010) +63 + 4 = 67 (1000011) +63 + 5 = 68 (1000100) +63 + 6 = 69 (1000101) +63 + 7 = 70 (1000110) +63 + 8 = 71 (1000111) +63 + 9 = 72 (1001000) +63 + 10 = 73 (1001001) +63 + 11 = 74 (1001010) +63 + 12 = 75 (1001011) +63 + 13 = 76 (1001100) +63 + 14 = 77 (1001101) +63 + 15 = 78 (1001110) +63 + 16 = 79 (1001111) +63 + 17 = 80 (1010000) +63 + 18 = 81 (1010001) +63 + 19 = 82 (1010010) +63 + 20 = 83 (1010011) +63 + 21 = 84 (1010100) +63 + 22 = 85 (1010101) +63 + 23 = 86 (1010110) +63 + 24 = 87 (1010111) +63 + 25 = 88 (1011000) +63 + 26 = 89 (1011001) +63 + 27 = 90 (1011010) +63 + 28 = 91 (1011011) +63 + 29 = 92 (1011100) +63 + 30 = 93 (1011101) +63 + 31 = 94 (1011110) +63 + 32 = 95 (1011111) +63 + 33 = 96 (1100000) +63 + 34 = 97 (1100001) +63 + 35 = 98 (1100010) +63 + 36 = 99 (1100011) +63 + 37 = 100 (1100100) +63 + 38 = 101 (1100101) +63 + 39 = 102 (1100110) +63 + 40 = 103 (1100111) +63 + 41 = 104 (1101000) +63 + 42 = 105 (1101001) +63 + 43 = 106 (1101010) +63 + 44 = 107 (1101011) +63 + 45 = 108 (1101100) +63 + 46 = 109 (1101101) +63 + 47 = 110 (1101110) +63 + 48 = 111 (1101111) +63 + 49 = 112 (1110000) +63 + 50 = 113 (1110001) +63 + 51 = 114 (1110010) +63 + 52 = 115 (1110011) +63 + 53 = 116 (1110100) +63 + 54 = 117 (1110101) +63 + 55 = 118 (1110110) +63 + 56 = 119 (1110111) +63 + 57 = 120 (1111000) +63 + 58 = 121 (1111001) +63 + 59 = 122 (1111010) +63 + 60 = 123 (1111011) +63 + 61 = 124 (1111100) +63 + 62 = 125 (1111101) +63 + 63 = 126 (1111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/main.cpp new file mode 100644 index 000000000..e5fcda219 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 7-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 7; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/stimgen.h new file mode 100644 index 000000000..feeda4215 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/bits_to_bits/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector7& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector7& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/common.h new file mode 100644 index 000000000..4ffc0e670 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector6; +typedef sc_signal > signal_bool_vector9; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/datawidth.cpp new file mode 100644 index 000000000..f5df52dd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_unsigned tmp_a (in1_width); + sc_unsigned tmp_b (in2_width); + sc_unsigned tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/datawidth.h new file mode 100644 index 000000000..911b72c4f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector9& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector9& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/extension.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/extension.f new file mode 100644 index 000000000..673123bd2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/extension.f @@ -0,0 +1,3 @@ +extension/datawidth.cpp +extension/stimgen.cpp +extension/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/golden/extension.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/golden/extension.log new file mode 100644 index 000000000..529ae2755 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/golden/extension.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) +16 + 0 = 16 (000010000) +16 + 1 = 17 (000010001) +16 + 2 = 18 (000010010) +16 + 3 = 19 (000010011) +16 + 4 = 20 (000010100) +16 + 5 = 21 (000010101) +16 + 6 = 22 (000010110) +16 + 7 = 23 (000010111) +16 + 8 = 24 (000011000) +16 + 9 = 25 (000011001) +16 + 10 = 26 (000011010) +16 + 11 = 27 (000011011) +16 + 12 = 28 (000011100) +16 + 13 = 29 (000011101) +16 + 14 = 30 (000011110) +16 + 15 = 31 (000011111) +16 + 16 = 32 (000100000) +16 + 17 = 33 (000100001) +16 + 18 = 34 (000100010) +16 + 19 = 35 (000100011) +16 + 20 = 36 (000100100) +16 + 21 = 37 (000100101) +16 + 22 = 38 (000100110) +16 + 23 = 39 (000100111) +16 + 24 = 40 (000101000) +16 + 25 = 41 (000101001) +16 + 26 = 42 (000101010) +16 + 27 = 43 (000101011) +16 + 28 = 44 (000101100) +16 + 29 = 45 (000101101) +16 + 30 = 46 (000101110) +16 + 31 = 47 (000101111) +16 + 32 = 48 (000110000) +16 + 33 = 49 (000110001) +16 + 34 = 50 (000110010) +16 + 35 = 51 (000110011) +16 + 36 = 52 (000110100) +16 + 37 = 53 (000110101) +16 + 38 = 54 (000110110) +16 + 39 = 55 (000110111) +16 + 40 = 56 (000111000) +16 + 41 = 57 (000111001) +16 + 42 = 58 (000111010) +16 + 43 = 59 (000111011) +16 + 44 = 60 (000111100) +16 + 45 = 61 (000111101) +16 + 46 = 62 (000111110) +16 + 47 = 63 (000111111) +16 + 48 = 64 (001000000) +16 + 49 = 65 (001000001) +16 + 50 = 66 (001000010) +16 + 51 = 67 (001000011) +16 + 52 = 68 (001000100) +16 + 53 = 69 (001000101) +16 + 54 = 70 (001000110) +16 + 55 = 71 (001000111) +16 + 56 = 72 (001001000) +16 + 57 = 73 (001001001) +16 + 58 = 74 (001001010) +16 + 59 = 75 (001001011) +16 + 60 = 76 (001001100) +16 + 61 = 77 (001001101) +16 + 62 = 78 (001001110) +16 + 63 = 79 (001001111) +17 + 0 = 17 (000010001) +17 + 1 = 18 (000010010) +17 + 2 = 19 (000010011) +17 + 3 = 20 (000010100) +17 + 4 = 21 (000010101) +17 + 5 = 22 (000010110) +17 + 6 = 23 (000010111) +17 + 7 = 24 (000011000) +17 + 8 = 25 (000011001) +17 + 9 = 26 (000011010) +17 + 10 = 27 (000011011) +17 + 11 = 28 (000011100) +17 + 12 = 29 (000011101) +17 + 13 = 30 (000011110) +17 + 14 = 31 (000011111) +17 + 15 = 32 (000100000) +17 + 16 = 33 (000100001) +17 + 17 = 34 (000100010) +17 + 18 = 35 (000100011) +17 + 19 = 36 (000100100) +17 + 20 = 37 (000100101) +17 + 21 = 38 (000100110) +17 + 22 = 39 (000100111) +17 + 23 = 40 (000101000) +17 + 24 = 41 (000101001) +17 + 25 = 42 (000101010) +17 + 26 = 43 (000101011) +17 + 27 = 44 (000101100) +17 + 28 = 45 (000101101) +17 + 29 = 46 (000101110) +17 + 30 = 47 (000101111) +17 + 31 = 48 (000110000) +17 + 32 = 49 (000110001) +17 + 33 = 50 (000110010) +17 + 34 = 51 (000110011) +17 + 35 = 52 (000110100) +17 + 36 = 53 (000110101) +17 + 37 = 54 (000110110) +17 + 38 = 55 (000110111) +17 + 39 = 56 (000111000) +17 + 40 = 57 (000111001) +17 + 41 = 58 (000111010) +17 + 42 = 59 (000111011) +17 + 43 = 60 (000111100) +17 + 44 = 61 (000111101) +17 + 45 = 62 (000111110) +17 + 46 = 63 (000111111) +17 + 47 = 64 (001000000) +17 + 48 = 65 (001000001) +17 + 49 = 66 (001000010) +17 + 50 = 67 (001000011) +17 + 51 = 68 (001000100) +17 + 52 = 69 (001000101) +17 + 53 = 70 (001000110) +17 + 54 = 71 (001000111) +17 + 55 = 72 (001001000) +17 + 56 = 73 (001001001) +17 + 57 = 74 (001001010) +17 + 58 = 75 (001001011) +17 + 59 = 76 (001001100) +17 + 60 = 77 (001001101) +17 + 61 = 78 (001001110) +17 + 62 = 79 (001001111) +17 + 63 = 80 (001010000) +18 + 0 = 18 (000010010) +18 + 1 = 19 (000010011) +18 + 2 = 20 (000010100) +18 + 3 = 21 (000010101) +18 + 4 = 22 (000010110) +18 + 5 = 23 (000010111) +18 + 6 = 24 (000011000) +18 + 7 = 25 (000011001) +18 + 8 = 26 (000011010) +18 + 9 = 27 (000011011) +18 + 10 = 28 (000011100) +18 + 11 = 29 (000011101) +18 + 12 = 30 (000011110) +18 + 13 = 31 (000011111) +18 + 14 = 32 (000100000) +18 + 15 = 33 (000100001) +18 + 16 = 34 (000100010) +18 + 17 = 35 (000100011) +18 + 18 = 36 (000100100) +18 + 19 = 37 (000100101) +18 + 20 = 38 (000100110) +18 + 21 = 39 (000100111) +18 + 22 = 40 (000101000) +18 + 23 = 41 (000101001) +18 + 24 = 42 (000101010) +18 + 25 = 43 (000101011) +18 + 26 = 44 (000101100) +18 + 27 = 45 (000101101) +18 + 28 = 46 (000101110) +18 + 29 = 47 (000101111) +18 + 30 = 48 (000110000) +18 + 31 = 49 (000110001) +18 + 32 = 50 (000110010) +18 + 33 = 51 (000110011) +18 + 34 = 52 (000110100) +18 + 35 = 53 (000110101) +18 + 36 = 54 (000110110) +18 + 37 = 55 (000110111) +18 + 38 = 56 (000111000) +18 + 39 = 57 (000111001) +18 + 40 = 58 (000111010) +18 + 41 = 59 (000111011) +18 + 42 = 60 (000111100) +18 + 43 = 61 (000111101) +18 + 44 = 62 (000111110) +18 + 45 = 63 (000111111) +18 + 46 = 64 (001000000) +18 + 47 = 65 (001000001) +18 + 48 = 66 (001000010) +18 + 49 = 67 (001000011) +18 + 50 = 68 (001000100) +18 + 51 = 69 (001000101) +18 + 52 = 70 (001000110) +18 + 53 = 71 (001000111) +18 + 54 = 72 (001001000) +18 + 55 = 73 (001001001) +18 + 56 = 74 (001001010) +18 + 57 = 75 (001001011) +18 + 58 = 76 (001001100) +18 + 59 = 77 (001001101) +18 + 60 = 78 (001001110) +18 + 61 = 79 (001001111) +18 + 62 = 80 (001010000) +18 + 63 = 81 (001010001) +19 + 0 = 19 (000010011) +19 + 1 = 20 (000010100) +19 + 2 = 21 (000010101) +19 + 3 = 22 (000010110) +19 + 4 = 23 (000010111) +19 + 5 = 24 (000011000) +19 + 6 = 25 (000011001) +19 + 7 = 26 (000011010) +19 + 8 = 27 (000011011) +19 + 9 = 28 (000011100) +19 + 10 = 29 (000011101) +19 + 11 = 30 (000011110) +19 + 12 = 31 (000011111) +19 + 13 = 32 (000100000) +19 + 14 = 33 (000100001) +19 + 15 = 34 (000100010) +19 + 16 = 35 (000100011) +19 + 17 = 36 (000100100) +19 + 18 = 37 (000100101) +19 + 19 = 38 (000100110) +19 + 20 = 39 (000100111) +19 + 21 = 40 (000101000) +19 + 22 = 41 (000101001) +19 + 23 = 42 (000101010) +19 + 24 = 43 (000101011) +19 + 25 = 44 (000101100) +19 + 26 = 45 (000101101) +19 + 27 = 46 (000101110) +19 + 28 = 47 (000101111) +19 + 29 = 48 (000110000) +19 + 30 = 49 (000110001) +19 + 31 = 50 (000110010) +19 + 32 = 51 (000110011) +19 + 33 = 52 (000110100) +19 + 34 = 53 (000110101) +19 + 35 = 54 (000110110) +19 + 36 = 55 (000110111) +19 + 37 = 56 (000111000) +19 + 38 = 57 (000111001) +19 + 39 = 58 (000111010) +19 + 40 = 59 (000111011) +19 + 41 = 60 (000111100) +19 + 42 = 61 (000111101) +19 + 43 = 62 (000111110) +19 + 44 = 63 (000111111) +19 + 45 = 64 (001000000) +19 + 46 = 65 (001000001) +19 + 47 = 66 (001000010) +19 + 48 = 67 (001000011) +19 + 49 = 68 (001000100) +19 + 50 = 69 (001000101) +19 + 51 = 70 (001000110) +19 + 52 = 71 (001000111) +19 + 53 = 72 (001001000) +19 + 54 = 73 (001001001) +19 + 55 = 74 (001001010) +19 + 56 = 75 (001001011) +19 + 57 = 76 (001001100) +19 + 58 = 77 (001001101) +19 + 59 = 78 (001001110) +19 + 60 = 79 (001001111) +19 + 61 = 80 (001010000) +19 + 62 = 81 (001010001) +19 + 63 = 82 (001010010) +20 + 0 = 20 (000010100) +20 + 1 = 21 (000010101) +20 + 2 = 22 (000010110) +20 + 3 = 23 (000010111) +20 + 4 = 24 (000011000) +20 + 5 = 25 (000011001) +20 + 6 = 26 (000011010) +20 + 7 = 27 (000011011) +20 + 8 = 28 (000011100) +20 + 9 = 29 (000011101) +20 + 10 = 30 (000011110) +20 + 11 = 31 (000011111) +20 + 12 = 32 (000100000) +20 + 13 = 33 (000100001) +20 + 14 = 34 (000100010) +20 + 15 = 35 (000100011) +20 + 16 = 36 (000100100) +20 + 17 = 37 (000100101) +20 + 18 = 38 (000100110) +20 + 19 = 39 (000100111) +20 + 20 = 40 (000101000) +20 + 21 = 41 (000101001) +20 + 22 = 42 (000101010) +20 + 23 = 43 (000101011) +20 + 24 = 44 (000101100) +20 + 25 = 45 (000101101) +20 + 26 = 46 (000101110) +20 + 27 = 47 (000101111) +20 + 28 = 48 (000110000) +20 + 29 = 49 (000110001) +20 + 30 = 50 (000110010) +20 + 31 = 51 (000110011) +20 + 32 = 52 (000110100) +20 + 33 = 53 (000110101) +20 + 34 = 54 (000110110) +20 + 35 = 55 (000110111) +20 + 36 = 56 (000111000) +20 + 37 = 57 (000111001) +20 + 38 = 58 (000111010) +20 + 39 = 59 (000111011) +20 + 40 = 60 (000111100) +20 + 41 = 61 (000111101) +20 + 42 = 62 (000111110) +20 + 43 = 63 (000111111) +20 + 44 = 64 (001000000) +20 + 45 = 65 (001000001) +20 + 46 = 66 (001000010) +20 + 47 = 67 (001000011) +20 + 48 = 68 (001000100) +20 + 49 = 69 (001000101) +20 + 50 = 70 (001000110) +20 + 51 = 71 (001000111) +20 + 52 = 72 (001001000) +20 + 53 = 73 (001001001) +20 + 54 = 74 (001001010) +20 + 55 = 75 (001001011) +20 + 56 = 76 (001001100) +20 + 57 = 77 (001001101) +20 + 58 = 78 (001001110) +20 + 59 = 79 (001001111) +20 + 60 = 80 (001010000) +20 + 61 = 81 (001010001) +20 + 62 = 82 (001010010) +20 + 63 = 83 (001010011) +21 + 0 = 21 (000010101) +21 + 1 = 22 (000010110) +21 + 2 = 23 (000010111) +21 + 3 = 24 (000011000) +21 + 4 = 25 (000011001) +21 + 5 = 26 (000011010) +21 + 6 = 27 (000011011) +21 + 7 = 28 (000011100) +21 + 8 = 29 (000011101) +21 + 9 = 30 (000011110) +21 + 10 = 31 (000011111) +21 + 11 = 32 (000100000) +21 + 12 = 33 (000100001) +21 + 13 = 34 (000100010) +21 + 14 = 35 (000100011) +21 + 15 = 36 (000100100) +21 + 16 = 37 (000100101) +21 + 17 = 38 (000100110) +21 + 18 = 39 (000100111) +21 + 19 = 40 (000101000) +21 + 20 = 41 (000101001) +21 + 21 = 42 (000101010) +21 + 22 = 43 (000101011) +21 + 23 = 44 (000101100) +21 + 24 = 45 (000101101) +21 + 25 = 46 (000101110) +21 + 26 = 47 (000101111) +21 + 27 = 48 (000110000) +21 + 28 = 49 (000110001) +21 + 29 = 50 (000110010) +21 + 30 = 51 (000110011) +21 + 31 = 52 (000110100) +21 + 32 = 53 (000110101) +21 + 33 = 54 (000110110) +21 + 34 = 55 (000110111) +21 + 35 = 56 (000111000) +21 + 36 = 57 (000111001) +21 + 37 = 58 (000111010) +21 + 38 = 59 (000111011) +21 + 39 = 60 (000111100) +21 + 40 = 61 (000111101) +21 + 41 = 62 (000111110) +21 + 42 = 63 (000111111) +21 + 43 = 64 (001000000) +21 + 44 = 65 (001000001) +21 + 45 = 66 (001000010) +21 + 46 = 67 (001000011) +21 + 47 = 68 (001000100) +21 + 48 = 69 (001000101) +21 + 49 = 70 (001000110) +21 + 50 = 71 (001000111) +21 + 51 = 72 (001001000) +21 + 52 = 73 (001001001) +21 + 53 = 74 (001001010) +21 + 54 = 75 (001001011) +21 + 55 = 76 (001001100) +21 + 56 = 77 (001001101) +21 + 57 = 78 (001001110) +21 + 58 = 79 (001001111) +21 + 59 = 80 (001010000) +21 + 60 = 81 (001010001) +21 + 61 = 82 (001010010) +21 + 62 = 83 (001010011) +21 + 63 = 84 (001010100) +22 + 0 = 22 (000010110) +22 + 1 = 23 (000010111) +22 + 2 = 24 (000011000) +22 + 3 = 25 (000011001) +22 + 4 = 26 (000011010) +22 + 5 = 27 (000011011) +22 + 6 = 28 (000011100) +22 + 7 = 29 (000011101) +22 + 8 = 30 (000011110) +22 + 9 = 31 (000011111) +22 + 10 = 32 (000100000) +22 + 11 = 33 (000100001) +22 + 12 = 34 (000100010) +22 + 13 = 35 (000100011) +22 + 14 = 36 (000100100) +22 + 15 = 37 (000100101) +22 + 16 = 38 (000100110) +22 + 17 = 39 (000100111) +22 + 18 = 40 (000101000) +22 + 19 = 41 (000101001) +22 + 20 = 42 (000101010) +22 + 21 = 43 (000101011) +22 + 22 = 44 (000101100) +22 + 23 = 45 (000101101) +22 + 24 = 46 (000101110) +22 + 25 = 47 (000101111) +22 + 26 = 48 (000110000) +22 + 27 = 49 (000110001) +22 + 28 = 50 (000110010) +22 + 29 = 51 (000110011) +22 + 30 = 52 (000110100) +22 + 31 = 53 (000110101) +22 + 32 = 54 (000110110) +22 + 33 = 55 (000110111) +22 + 34 = 56 (000111000) +22 + 35 = 57 (000111001) +22 + 36 = 58 (000111010) +22 + 37 = 59 (000111011) +22 + 38 = 60 (000111100) +22 + 39 = 61 (000111101) +22 + 40 = 62 (000111110) +22 + 41 = 63 (000111111) +22 + 42 = 64 (001000000) +22 + 43 = 65 (001000001) +22 + 44 = 66 (001000010) +22 + 45 = 67 (001000011) +22 + 46 = 68 (001000100) +22 + 47 = 69 (001000101) +22 + 48 = 70 (001000110) +22 + 49 = 71 (001000111) +22 + 50 = 72 (001001000) +22 + 51 = 73 (001001001) +22 + 52 = 74 (001001010) +22 + 53 = 75 (001001011) +22 + 54 = 76 (001001100) +22 + 55 = 77 (001001101) +22 + 56 = 78 (001001110) +22 + 57 = 79 (001001111) +22 + 58 = 80 (001010000) +22 + 59 = 81 (001010001) +22 + 60 = 82 (001010010) +22 + 61 = 83 (001010011) +22 + 62 = 84 (001010100) +22 + 63 = 85 (001010101) +23 + 0 = 23 (000010111) +23 + 1 = 24 (000011000) +23 + 2 = 25 (000011001) +23 + 3 = 26 (000011010) +23 + 4 = 27 (000011011) +23 + 5 = 28 (000011100) +23 + 6 = 29 (000011101) +23 + 7 = 30 (000011110) +23 + 8 = 31 (000011111) +23 + 9 = 32 (000100000) +23 + 10 = 33 (000100001) +23 + 11 = 34 (000100010) +23 + 12 = 35 (000100011) +23 + 13 = 36 (000100100) +23 + 14 = 37 (000100101) +23 + 15 = 38 (000100110) +23 + 16 = 39 (000100111) +23 + 17 = 40 (000101000) +23 + 18 = 41 (000101001) +23 + 19 = 42 (000101010) +23 + 20 = 43 (000101011) +23 + 21 = 44 (000101100) +23 + 22 = 45 (000101101) +23 + 23 = 46 (000101110) +23 + 24 = 47 (000101111) +23 + 25 = 48 (000110000) +23 + 26 = 49 (000110001) +23 + 27 = 50 (000110010) +23 + 28 = 51 (000110011) +23 + 29 = 52 (000110100) +23 + 30 = 53 (000110101) +23 + 31 = 54 (000110110) +23 + 32 = 55 (000110111) +23 + 33 = 56 (000111000) +23 + 34 = 57 (000111001) +23 + 35 = 58 (000111010) +23 + 36 = 59 (000111011) +23 + 37 = 60 (000111100) +23 + 38 = 61 (000111101) +23 + 39 = 62 (000111110) +23 + 40 = 63 (000111111) +23 + 41 = 64 (001000000) +23 + 42 = 65 (001000001) +23 + 43 = 66 (001000010) +23 + 44 = 67 (001000011) +23 + 45 = 68 (001000100) +23 + 46 = 69 (001000101) +23 + 47 = 70 (001000110) +23 + 48 = 71 (001000111) +23 + 49 = 72 (001001000) +23 + 50 = 73 (001001001) +23 + 51 = 74 (001001010) +23 + 52 = 75 (001001011) +23 + 53 = 76 (001001100) +23 + 54 = 77 (001001101) +23 + 55 = 78 (001001110) +23 + 56 = 79 (001001111) +23 + 57 = 80 (001010000) +23 + 58 = 81 (001010001) +23 + 59 = 82 (001010010) +23 + 60 = 83 (001010011) +23 + 61 = 84 (001010100) +23 + 62 = 85 (001010101) +23 + 63 = 86 (001010110) +24 + 0 = 24 (000011000) +24 + 1 = 25 (000011001) +24 + 2 = 26 (000011010) +24 + 3 = 27 (000011011) +24 + 4 = 28 (000011100) +24 + 5 = 29 (000011101) +24 + 6 = 30 (000011110) +24 + 7 = 31 (000011111) +24 + 8 = 32 (000100000) +24 + 9 = 33 (000100001) +24 + 10 = 34 (000100010) +24 + 11 = 35 (000100011) +24 + 12 = 36 (000100100) +24 + 13 = 37 (000100101) +24 + 14 = 38 (000100110) +24 + 15 = 39 (000100111) +24 + 16 = 40 (000101000) +24 + 17 = 41 (000101001) +24 + 18 = 42 (000101010) +24 + 19 = 43 (000101011) +24 + 20 = 44 (000101100) +24 + 21 = 45 (000101101) +24 + 22 = 46 (000101110) +24 + 23 = 47 (000101111) +24 + 24 = 48 (000110000) +24 + 25 = 49 (000110001) +24 + 26 = 50 (000110010) +24 + 27 = 51 (000110011) +24 + 28 = 52 (000110100) +24 + 29 = 53 (000110101) +24 + 30 = 54 (000110110) +24 + 31 = 55 (000110111) +24 + 32 = 56 (000111000) +24 + 33 = 57 (000111001) +24 + 34 = 58 (000111010) +24 + 35 = 59 (000111011) +24 + 36 = 60 (000111100) +24 + 37 = 61 (000111101) +24 + 38 = 62 (000111110) +24 + 39 = 63 (000111111) +24 + 40 = 64 (001000000) +24 + 41 = 65 (001000001) +24 + 42 = 66 (001000010) +24 + 43 = 67 (001000011) +24 + 44 = 68 (001000100) +24 + 45 = 69 (001000101) +24 + 46 = 70 (001000110) +24 + 47 = 71 (001000111) +24 + 48 = 72 (001001000) +24 + 49 = 73 (001001001) +24 + 50 = 74 (001001010) +24 + 51 = 75 (001001011) +24 + 52 = 76 (001001100) +24 + 53 = 77 (001001101) +24 + 54 = 78 (001001110) +24 + 55 = 79 (001001111) +24 + 56 = 80 (001010000) +24 + 57 = 81 (001010001) +24 + 58 = 82 (001010010) +24 + 59 = 83 (001010011) +24 + 60 = 84 (001010100) +24 + 61 = 85 (001010101) +24 + 62 = 86 (001010110) +24 + 63 = 87 (001010111) +25 + 0 = 25 (000011001) +25 + 1 = 26 (000011010) +25 + 2 = 27 (000011011) +25 + 3 = 28 (000011100) +25 + 4 = 29 (000011101) +25 + 5 = 30 (000011110) +25 + 6 = 31 (000011111) +25 + 7 = 32 (000100000) +25 + 8 = 33 (000100001) +25 + 9 = 34 (000100010) +25 + 10 = 35 (000100011) +25 + 11 = 36 (000100100) +25 + 12 = 37 (000100101) +25 + 13 = 38 (000100110) +25 + 14 = 39 (000100111) +25 + 15 = 40 (000101000) +25 + 16 = 41 (000101001) +25 + 17 = 42 (000101010) +25 + 18 = 43 (000101011) +25 + 19 = 44 (000101100) +25 + 20 = 45 (000101101) +25 + 21 = 46 (000101110) +25 + 22 = 47 (000101111) +25 + 23 = 48 (000110000) +25 + 24 = 49 (000110001) +25 + 25 = 50 (000110010) +25 + 26 = 51 (000110011) +25 + 27 = 52 (000110100) +25 + 28 = 53 (000110101) +25 + 29 = 54 (000110110) +25 + 30 = 55 (000110111) +25 + 31 = 56 (000111000) +25 + 32 = 57 (000111001) +25 + 33 = 58 (000111010) +25 + 34 = 59 (000111011) +25 + 35 = 60 (000111100) +25 + 36 = 61 (000111101) +25 + 37 = 62 (000111110) +25 + 38 = 63 (000111111) +25 + 39 = 64 (001000000) +25 + 40 = 65 (001000001) +25 + 41 = 66 (001000010) +25 + 42 = 67 (001000011) +25 + 43 = 68 (001000100) +25 + 44 = 69 (001000101) +25 + 45 = 70 (001000110) +25 + 46 = 71 (001000111) +25 + 47 = 72 (001001000) +25 + 48 = 73 (001001001) +25 + 49 = 74 (001001010) +25 + 50 = 75 (001001011) +25 + 51 = 76 (001001100) +25 + 52 = 77 (001001101) +25 + 53 = 78 (001001110) +25 + 54 = 79 (001001111) +25 + 55 = 80 (001010000) +25 + 56 = 81 (001010001) +25 + 57 = 82 (001010010) +25 + 58 = 83 (001010011) +25 + 59 = 84 (001010100) +25 + 60 = 85 (001010101) +25 + 61 = 86 (001010110) +25 + 62 = 87 (001010111) +25 + 63 = 88 (001011000) +26 + 0 = 26 (000011010) +26 + 1 = 27 (000011011) +26 + 2 = 28 (000011100) +26 + 3 = 29 (000011101) +26 + 4 = 30 (000011110) +26 + 5 = 31 (000011111) +26 + 6 = 32 (000100000) +26 + 7 = 33 (000100001) +26 + 8 = 34 (000100010) +26 + 9 = 35 (000100011) +26 + 10 = 36 (000100100) +26 + 11 = 37 (000100101) +26 + 12 = 38 (000100110) +26 + 13 = 39 (000100111) +26 + 14 = 40 (000101000) +26 + 15 = 41 (000101001) +26 + 16 = 42 (000101010) +26 + 17 = 43 (000101011) +26 + 18 = 44 (000101100) +26 + 19 = 45 (000101101) +26 + 20 = 46 (000101110) +26 + 21 = 47 (000101111) +26 + 22 = 48 (000110000) +26 + 23 = 49 (000110001) +26 + 24 = 50 (000110010) +26 + 25 = 51 (000110011) +26 + 26 = 52 (000110100) +26 + 27 = 53 (000110101) +26 + 28 = 54 (000110110) +26 + 29 = 55 (000110111) +26 + 30 = 56 (000111000) +26 + 31 = 57 (000111001) +26 + 32 = 58 (000111010) +26 + 33 = 59 (000111011) +26 + 34 = 60 (000111100) +26 + 35 = 61 (000111101) +26 + 36 = 62 (000111110) +26 + 37 = 63 (000111111) +26 + 38 = 64 (001000000) +26 + 39 = 65 (001000001) +26 + 40 = 66 (001000010) +26 + 41 = 67 (001000011) +26 + 42 = 68 (001000100) +26 + 43 = 69 (001000101) +26 + 44 = 70 (001000110) +26 + 45 = 71 (001000111) +26 + 46 = 72 (001001000) +26 + 47 = 73 (001001001) +26 + 48 = 74 (001001010) +26 + 49 = 75 (001001011) +26 + 50 = 76 (001001100) +26 + 51 = 77 (001001101) +26 + 52 = 78 (001001110) +26 + 53 = 79 (001001111) +26 + 54 = 80 (001010000) +26 + 55 = 81 (001010001) +26 + 56 = 82 (001010010) +26 + 57 = 83 (001010011) +26 + 58 = 84 (001010100) +26 + 59 = 85 (001010101) +26 + 60 = 86 (001010110) +26 + 61 = 87 (001010111) +26 + 62 = 88 (001011000) +26 + 63 = 89 (001011001) +27 + 0 = 27 (000011011) +27 + 1 = 28 (000011100) +27 + 2 = 29 (000011101) +27 + 3 = 30 (000011110) +27 + 4 = 31 (000011111) +27 + 5 = 32 (000100000) +27 + 6 = 33 (000100001) +27 + 7 = 34 (000100010) +27 + 8 = 35 (000100011) +27 + 9 = 36 (000100100) +27 + 10 = 37 (000100101) +27 + 11 = 38 (000100110) +27 + 12 = 39 (000100111) +27 + 13 = 40 (000101000) +27 + 14 = 41 (000101001) +27 + 15 = 42 (000101010) +27 + 16 = 43 (000101011) +27 + 17 = 44 (000101100) +27 + 18 = 45 (000101101) +27 + 19 = 46 (000101110) +27 + 20 = 47 (000101111) +27 + 21 = 48 (000110000) +27 + 22 = 49 (000110001) +27 + 23 = 50 (000110010) +27 + 24 = 51 (000110011) +27 + 25 = 52 (000110100) +27 + 26 = 53 (000110101) +27 + 27 = 54 (000110110) +27 + 28 = 55 (000110111) +27 + 29 = 56 (000111000) +27 + 30 = 57 (000111001) +27 + 31 = 58 (000111010) +27 + 32 = 59 (000111011) +27 + 33 = 60 (000111100) +27 + 34 = 61 (000111101) +27 + 35 = 62 (000111110) +27 + 36 = 63 (000111111) +27 + 37 = 64 (001000000) +27 + 38 = 65 (001000001) +27 + 39 = 66 (001000010) +27 + 40 = 67 (001000011) +27 + 41 = 68 (001000100) +27 + 42 = 69 (001000101) +27 + 43 = 70 (001000110) +27 + 44 = 71 (001000111) +27 + 45 = 72 (001001000) +27 + 46 = 73 (001001001) +27 + 47 = 74 (001001010) +27 + 48 = 75 (001001011) +27 + 49 = 76 (001001100) +27 + 50 = 77 (001001101) +27 + 51 = 78 (001001110) +27 + 52 = 79 (001001111) +27 + 53 = 80 (001010000) +27 + 54 = 81 (001010001) +27 + 55 = 82 (001010010) +27 + 56 = 83 (001010011) +27 + 57 = 84 (001010100) +27 + 58 = 85 (001010101) +27 + 59 = 86 (001010110) +27 + 60 = 87 (001010111) +27 + 61 = 88 (001011000) +27 + 62 = 89 (001011001) +27 + 63 = 90 (001011010) +28 + 0 = 28 (000011100) +28 + 1 = 29 (000011101) +28 + 2 = 30 (000011110) +28 + 3 = 31 (000011111) +28 + 4 = 32 (000100000) +28 + 5 = 33 (000100001) +28 + 6 = 34 (000100010) +28 + 7 = 35 (000100011) +28 + 8 = 36 (000100100) +28 + 9 = 37 (000100101) +28 + 10 = 38 (000100110) +28 + 11 = 39 (000100111) +28 + 12 = 40 (000101000) +28 + 13 = 41 (000101001) +28 + 14 = 42 (000101010) +28 + 15 = 43 (000101011) +28 + 16 = 44 (000101100) +28 + 17 = 45 (000101101) +28 + 18 = 46 (000101110) +28 + 19 = 47 (000101111) +28 + 20 = 48 (000110000) +28 + 21 = 49 (000110001) +28 + 22 = 50 (000110010) +28 + 23 = 51 (000110011) +28 + 24 = 52 (000110100) +28 + 25 = 53 (000110101) +28 + 26 = 54 (000110110) +28 + 27 = 55 (000110111) +28 + 28 = 56 (000111000) +28 + 29 = 57 (000111001) +28 + 30 = 58 (000111010) +28 + 31 = 59 (000111011) +28 + 32 = 60 (000111100) +28 + 33 = 61 (000111101) +28 + 34 = 62 (000111110) +28 + 35 = 63 (000111111) +28 + 36 = 64 (001000000) +28 + 37 = 65 (001000001) +28 + 38 = 66 (001000010) +28 + 39 = 67 (001000011) +28 + 40 = 68 (001000100) +28 + 41 = 69 (001000101) +28 + 42 = 70 (001000110) +28 + 43 = 71 (001000111) +28 + 44 = 72 (001001000) +28 + 45 = 73 (001001001) +28 + 46 = 74 (001001010) +28 + 47 = 75 (001001011) +28 + 48 = 76 (001001100) +28 + 49 = 77 (001001101) +28 + 50 = 78 (001001110) +28 + 51 = 79 (001001111) +28 + 52 = 80 (001010000) +28 + 53 = 81 (001010001) +28 + 54 = 82 (001010010) +28 + 55 = 83 (001010011) +28 + 56 = 84 (001010100) +28 + 57 = 85 (001010101) +28 + 58 = 86 (001010110) +28 + 59 = 87 (001010111) +28 + 60 = 88 (001011000) +28 + 61 = 89 (001011001) +28 + 62 = 90 (001011010) +28 + 63 = 91 (001011011) +29 + 0 = 29 (000011101) +29 + 1 = 30 (000011110) +29 + 2 = 31 (000011111) +29 + 3 = 32 (000100000) +29 + 4 = 33 (000100001) +29 + 5 = 34 (000100010) +29 + 6 = 35 (000100011) +29 + 7 = 36 (000100100) +29 + 8 = 37 (000100101) +29 + 9 = 38 (000100110) +29 + 10 = 39 (000100111) +29 + 11 = 40 (000101000) +29 + 12 = 41 (000101001) +29 + 13 = 42 (000101010) +29 + 14 = 43 (000101011) +29 + 15 = 44 (000101100) +29 + 16 = 45 (000101101) +29 + 17 = 46 (000101110) +29 + 18 = 47 (000101111) +29 + 19 = 48 (000110000) +29 + 20 = 49 (000110001) +29 + 21 = 50 (000110010) +29 + 22 = 51 (000110011) +29 + 23 = 52 (000110100) +29 + 24 = 53 (000110101) +29 + 25 = 54 (000110110) +29 + 26 = 55 (000110111) +29 + 27 = 56 (000111000) +29 + 28 = 57 (000111001) +29 + 29 = 58 (000111010) +29 + 30 = 59 (000111011) +29 + 31 = 60 (000111100) +29 + 32 = 61 (000111101) +29 + 33 = 62 (000111110) +29 + 34 = 63 (000111111) +29 + 35 = 64 (001000000) +29 + 36 = 65 (001000001) +29 + 37 = 66 (001000010) +29 + 38 = 67 (001000011) +29 + 39 = 68 (001000100) +29 + 40 = 69 (001000101) +29 + 41 = 70 (001000110) +29 + 42 = 71 (001000111) +29 + 43 = 72 (001001000) +29 + 44 = 73 (001001001) +29 + 45 = 74 (001001010) +29 + 46 = 75 (001001011) +29 + 47 = 76 (001001100) +29 + 48 = 77 (001001101) +29 + 49 = 78 (001001110) +29 + 50 = 79 (001001111) +29 + 51 = 80 (001010000) +29 + 52 = 81 (001010001) +29 + 53 = 82 (001010010) +29 + 54 = 83 (001010011) +29 + 55 = 84 (001010100) +29 + 56 = 85 (001010101) +29 + 57 = 86 (001010110) +29 + 58 = 87 (001010111) +29 + 59 = 88 (001011000) +29 + 60 = 89 (001011001) +29 + 61 = 90 (001011010) +29 + 62 = 91 (001011011) +29 + 63 = 92 (001011100) +30 + 0 = 30 (000011110) +30 + 1 = 31 (000011111) +30 + 2 = 32 (000100000) +30 + 3 = 33 (000100001) +30 + 4 = 34 (000100010) +30 + 5 = 35 (000100011) +30 + 6 = 36 (000100100) +30 + 7 = 37 (000100101) +30 + 8 = 38 (000100110) +30 + 9 = 39 (000100111) +30 + 10 = 40 (000101000) +30 + 11 = 41 (000101001) +30 + 12 = 42 (000101010) +30 + 13 = 43 (000101011) +30 + 14 = 44 (000101100) +30 + 15 = 45 (000101101) +30 + 16 = 46 (000101110) +30 + 17 = 47 (000101111) +30 + 18 = 48 (000110000) +30 + 19 = 49 (000110001) +30 + 20 = 50 (000110010) +30 + 21 = 51 (000110011) +30 + 22 = 52 (000110100) +30 + 23 = 53 (000110101) +30 + 24 = 54 (000110110) +30 + 25 = 55 (000110111) +30 + 26 = 56 (000111000) +30 + 27 = 57 (000111001) +30 + 28 = 58 (000111010) +30 + 29 = 59 (000111011) +30 + 30 = 60 (000111100) +30 + 31 = 61 (000111101) +30 + 32 = 62 (000111110) +30 + 33 = 63 (000111111) +30 + 34 = 64 (001000000) +30 + 35 = 65 (001000001) +30 + 36 = 66 (001000010) +30 + 37 = 67 (001000011) +30 + 38 = 68 (001000100) +30 + 39 = 69 (001000101) +30 + 40 = 70 (001000110) +30 + 41 = 71 (001000111) +30 + 42 = 72 (001001000) +30 + 43 = 73 (001001001) +30 + 44 = 74 (001001010) +30 + 45 = 75 (001001011) +30 + 46 = 76 (001001100) +30 + 47 = 77 (001001101) +30 + 48 = 78 (001001110) +30 + 49 = 79 (001001111) +30 + 50 = 80 (001010000) +30 + 51 = 81 (001010001) +30 + 52 = 82 (001010010) +30 + 53 = 83 (001010011) +30 + 54 = 84 (001010100) +30 + 55 = 85 (001010101) +30 + 56 = 86 (001010110) +30 + 57 = 87 (001010111) +30 + 58 = 88 (001011000) +30 + 59 = 89 (001011001) +30 + 60 = 90 (001011010) +30 + 61 = 91 (001011011) +30 + 62 = 92 (001011100) +30 + 63 = 93 (001011101) +31 + 0 = 31 (000011111) +31 + 1 = 32 (000100000) +31 + 2 = 33 (000100001) +31 + 3 = 34 (000100010) +31 + 4 = 35 (000100011) +31 + 5 = 36 (000100100) +31 + 6 = 37 (000100101) +31 + 7 = 38 (000100110) +31 + 8 = 39 (000100111) +31 + 9 = 40 (000101000) +31 + 10 = 41 (000101001) +31 + 11 = 42 (000101010) +31 + 12 = 43 (000101011) +31 + 13 = 44 (000101100) +31 + 14 = 45 (000101101) +31 + 15 = 46 (000101110) +31 + 16 = 47 (000101111) +31 + 17 = 48 (000110000) +31 + 18 = 49 (000110001) +31 + 19 = 50 (000110010) +31 + 20 = 51 (000110011) +31 + 21 = 52 (000110100) +31 + 22 = 53 (000110101) +31 + 23 = 54 (000110110) +31 + 24 = 55 (000110111) +31 + 25 = 56 (000111000) +31 + 26 = 57 (000111001) +31 + 27 = 58 (000111010) +31 + 28 = 59 (000111011) +31 + 29 = 60 (000111100) +31 + 30 = 61 (000111101) +31 + 31 = 62 (000111110) +31 + 32 = 63 (000111111) +31 + 33 = 64 (001000000) +31 + 34 = 65 (001000001) +31 + 35 = 66 (001000010) +31 + 36 = 67 (001000011) +31 + 37 = 68 (001000100) +31 + 38 = 69 (001000101) +31 + 39 = 70 (001000110) +31 + 40 = 71 (001000111) +31 + 41 = 72 (001001000) +31 + 42 = 73 (001001001) +31 + 43 = 74 (001001010) +31 + 44 = 75 (001001011) +31 + 45 = 76 (001001100) +31 + 46 = 77 (001001101) +31 + 47 = 78 (001001110) +31 + 48 = 79 (001001111) +31 + 49 = 80 (001010000) +31 + 50 = 81 (001010001) +31 + 51 = 82 (001010010) +31 + 52 = 83 (001010011) +31 + 53 = 84 (001010100) +31 + 54 = 85 (001010101) +31 + 55 = 86 (001010110) +31 + 56 = 87 (001010111) +31 + 57 = 88 (001011000) +31 + 58 = 89 (001011001) +31 + 59 = 90 (001011010) +31 + 60 = 91 (001011011) +31 + 61 = 92 (001011100) +31 + 62 = 93 (001011101) +31 + 63 = 94 (001011110) +32 + 0 = 32 (000100000) +32 + 1 = 33 (000100001) +32 + 2 = 34 (000100010) +32 + 3 = 35 (000100011) +32 + 4 = 36 (000100100) +32 + 5 = 37 (000100101) +32 + 6 = 38 (000100110) +32 + 7 = 39 (000100111) +32 + 8 = 40 (000101000) +32 + 9 = 41 (000101001) +32 + 10 = 42 (000101010) +32 + 11 = 43 (000101011) +32 + 12 = 44 (000101100) +32 + 13 = 45 (000101101) +32 + 14 = 46 (000101110) +32 + 15 = 47 (000101111) +32 + 16 = 48 (000110000) +32 + 17 = 49 (000110001) +32 + 18 = 50 (000110010) +32 + 19 = 51 (000110011) +32 + 20 = 52 (000110100) +32 + 21 = 53 (000110101) +32 + 22 = 54 (000110110) +32 + 23 = 55 (000110111) +32 + 24 = 56 (000111000) +32 + 25 = 57 (000111001) +32 + 26 = 58 (000111010) +32 + 27 = 59 (000111011) +32 + 28 = 60 (000111100) +32 + 29 = 61 (000111101) +32 + 30 = 62 (000111110) +32 + 31 = 63 (000111111) +32 + 32 = 64 (001000000) +32 + 33 = 65 (001000001) +32 + 34 = 66 (001000010) +32 + 35 = 67 (001000011) +32 + 36 = 68 (001000100) +32 + 37 = 69 (001000101) +32 + 38 = 70 (001000110) +32 + 39 = 71 (001000111) +32 + 40 = 72 (001001000) +32 + 41 = 73 (001001001) +32 + 42 = 74 (001001010) +32 + 43 = 75 (001001011) +32 + 44 = 76 (001001100) +32 + 45 = 77 (001001101) +32 + 46 = 78 (001001110) +32 + 47 = 79 (001001111) +32 + 48 = 80 (001010000) +32 + 49 = 81 (001010001) +32 + 50 = 82 (001010010) +32 + 51 = 83 (001010011) +32 + 52 = 84 (001010100) +32 + 53 = 85 (001010101) +32 + 54 = 86 (001010110) +32 + 55 = 87 (001010111) +32 + 56 = 88 (001011000) +32 + 57 = 89 (001011001) +32 + 58 = 90 (001011010) +32 + 59 = 91 (001011011) +32 + 60 = 92 (001011100) +32 + 61 = 93 (001011101) +32 + 62 = 94 (001011110) +32 + 63 = 95 (001011111) +33 + 0 = 33 (000100001) +33 + 1 = 34 (000100010) +33 + 2 = 35 (000100011) +33 + 3 = 36 (000100100) +33 + 4 = 37 (000100101) +33 + 5 = 38 (000100110) +33 + 6 = 39 (000100111) +33 + 7 = 40 (000101000) +33 + 8 = 41 (000101001) +33 + 9 = 42 (000101010) +33 + 10 = 43 (000101011) +33 + 11 = 44 (000101100) +33 + 12 = 45 (000101101) +33 + 13 = 46 (000101110) +33 + 14 = 47 (000101111) +33 + 15 = 48 (000110000) +33 + 16 = 49 (000110001) +33 + 17 = 50 (000110010) +33 + 18 = 51 (000110011) +33 + 19 = 52 (000110100) +33 + 20 = 53 (000110101) +33 + 21 = 54 (000110110) +33 + 22 = 55 (000110111) +33 + 23 = 56 (000111000) +33 + 24 = 57 (000111001) +33 + 25 = 58 (000111010) +33 + 26 = 59 (000111011) +33 + 27 = 60 (000111100) +33 + 28 = 61 (000111101) +33 + 29 = 62 (000111110) +33 + 30 = 63 (000111111) +33 + 31 = 64 (001000000) +33 + 32 = 65 (001000001) +33 + 33 = 66 (001000010) +33 + 34 = 67 (001000011) +33 + 35 = 68 (001000100) +33 + 36 = 69 (001000101) +33 + 37 = 70 (001000110) +33 + 38 = 71 (001000111) +33 + 39 = 72 (001001000) +33 + 40 = 73 (001001001) +33 + 41 = 74 (001001010) +33 + 42 = 75 (001001011) +33 + 43 = 76 (001001100) +33 + 44 = 77 (001001101) +33 + 45 = 78 (001001110) +33 + 46 = 79 (001001111) +33 + 47 = 80 (001010000) +33 + 48 = 81 (001010001) +33 + 49 = 82 (001010010) +33 + 50 = 83 (001010011) +33 + 51 = 84 (001010100) +33 + 52 = 85 (001010101) +33 + 53 = 86 (001010110) +33 + 54 = 87 (001010111) +33 + 55 = 88 (001011000) +33 + 56 = 89 (001011001) +33 + 57 = 90 (001011010) +33 + 58 = 91 (001011011) +33 + 59 = 92 (001011100) +33 + 60 = 93 (001011101) +33 + 61 = 94 (001011110) +33 + 62 = 95 (001011111) +33 + 63 = 96 (001100000) +34 + 0 = 34 (000100010) +34 + 1 = 35 (000100011) +34 + 2 = 36 (000100100) +34 + 3 = 37 (000100101) +34 + 4 = 38 (000100110) +34 + 5 = 39 (000100111) +34 + 6 = 40 (000101000) +34 + 7 = 41 (000101001) +34 + 8 = 42 (000101010) +34 + 9 = 43 (000101011) +34 + 10 = 44 (000101100) +34 + 11 = 45 (000101101) +34 + 12 = 46 (000101110) +34 + 13 = 47 (000101111) +34 + 14 = 48 (000110000) +34 + 15 = 49 (000110001) +34 + 16 = 50 (000110010) +34 + 17 = 51 (000110011) +34 + 18 = 52 (000110100) +34 + 19 = 53 (000110101) +34 + 20 = 54 (000110110) +34 + 21 = 55 (000110111) +34 + 22 = 56 (000111000) +34 + 23 = 57 (000111001) +34 + 24 = 58 (000111010) +34 + 25 = 59 (000111011) +34 + 26 = 60 (000111100) +34 + 27 = 61 (000111101) +34 + 28 = 62 (000111110) +34 + 29 = 63 (000111111) +34 + 30 = 64 (001000000) +34 + 31 = 65 (001000001) +34 + 32 = 66 (001000010) +34 + 33 = 67 (001000011) +34 + 34 = 68 (001000100) +34 + 35 = 69 (001000101) +34 + 36 = 70 (001000110) +34 + 37 = 71 (001000111) +34 + 38 = 72 (001001000) +34 + 39 = 73 (001001001) +34 + 40 = 74 (001001010) +34 + 41 = 75 (001001011) +34 + 42 = 76 (001001100) +34 + 43 = 77 (001001101) +34 + 44 = 78 (001001110) +34 + 45 = 79 (001001111) +34 + 46 = 80 (001010000) +34 + 47 = 81 (001010001) +34 + 48 = 82 (001010010) +34 + 49 = 83 (001010011) +34 + 50 = 84 (001010100) +34 + 51 = 85 (001010101) +34 + 52 = 86 (001010110) +34 + 53 = 87 (001010111) +34 + 54 = 88 (001011000) +34 + 55 = 89 (001011001) +34 + 56 = 90 (001011010) +34 + 57 = 91 (001011011) +34 + 58 = 92 (001011100) +34 + 59 = 93 (001011101) +34 + 60 = 94 (001011110) +34 + 61 = 95 (001011111) +34 + 62 = 96 (001100000) +34 + 63 = 97 (001100001) +35 + 0 = 35 (000100011) +35 + 1 = 36 (000100100) +35 + 2 = 37 (000100101) +35 + 3 = 38 (000100110) +35 + 4 = 39 (000100111) +35 + 5 = 40 (000101000) +35 + 6 = 41 (000101001) +35 + 7 = 42 (000101010) +35 + 8 = 43 (000101011) +35 + 9 = 44 (000101100) +35 + 10 = 45 (000101101) +35 + 11 = 46 (000101110) +35 + 12 = 47 (000101111) +35 + 13 = 48 (000110000) +35 + 14 = 49 (000110001) +35 + 15 = 50 (000110010) +35 + 16 = 51 (000110011) +35 + 17 = 52 (000110100) +35 + 18 = 53 (000110101) +35 + 19 = 54 (000110110) +35 + 20 = 55 (000110111) +35 + 21 = 56 (000111000) +35 + 22 = 57 (000111001) +35 + 23 = 58 (000111010) +35 + 24 = 59 (000111011) +35 + 25 = 60 (000111100) +35 + 26 = 61 (000111101) +35 + 27 = 62 (000111110) +35 + 28 = 63 (000111111) +35 + 29 = 64 (001000000) +35 + 30 = 65 (001000001) +35 + 31 = 66 (001000010) +35 + 32 = 67 (001000011) +35 + 33 = 68 (001000100) +35 + 34 = 69 (001000101) +35 + 35 = 70 (001000110) +35 + 36 = 71 (001000111) +35 + 37 = 72 (001001000) +35 + 38 = 73 (001001001) +35 + 39 = 74 (001001010) +35 + 40 = 75 (001001011) +35 + 41 = 76 (001001100) +35 + 42 = 77 (001001101) +35 + 43 = 78 (001001110) +35 + 44 = 79 (001001111) +35 + 45 = 80 (001010000) +35 + 46 = 81 (001010001) +35 + 47 = 82 (001010010) +35 + 48 = 83 (001010011) +35 + 49 = 84 (001010100) +35 + 50 = 85 (001010101) +35 + 51 = 86 (001010110) +35 + 52 = 87 (001010111) +35 + 53 = 88 (001011000) +35 + 54 = 89 (001011001) +35 + 55 = 90 (001011010) +35 + 56 = 91 (001011011) +35 + 57 = 92 (001011100) +35 + 58 = 93 (001011101) +35 + 59 = 94 (001011110) +35 + 60 = 95 (001011111) +35 + 61 = 96 (001100000) +35 + 62 = 97 (001100001) +35 + 63 = 98 (001100010) +36 + 0 = 36 (000100100) +36 + 1 = 37 (000100101) +36 + 2 = 38 (000100110) +36 + 3 = 39 (000100111) +36 + 4 = 40 (000101000) +36 + 5 = 41 (000101001) +36 + 6 = 42 (000101010) +36 + 7 = 43 (000101011) +36 + 8 = 44 (000101100) +36 + 9 = 45 (000101101) +36 + 10 = 46 (000101110) +36 + 11 = 47 (000101111) +36 + 12 = 48 (000110000) +36 + 13 = 49 (000110001) +36 + 14 = 50 (000110010) +36 + 15 = 51 (000110011) +36 + 16 = 52 (000110100) +36 + 17 = 53 (000110101) +36 + 18 = 54 (000110110) +36 + 19 = 55 (000110111) +36 + 20 = 56 (000111000) +36 + 21 = 57 (000111001) +36 + 22 = 58 (000111010) +36 + 23 = 59 (000111011) +36 + 24 = 60 (000111100) +36 + 25 = 61 (000111101) +36 + 26 = 62 (000111110) +36 + 27 = 63 (000111111) +36 + 28 = 64 (001000000) +36 + 29 = 65 (001000001) +36 + 30 = 66 (001000010) +36 + 31 = 67 (001000011) +36 + 32 = 68 (001000100) +36 + 33 = 69 (001000101) +36 + 34 = 70 (001000110) +36 + 35 = 71 (001000111) +36 + 36 = 72 (001001000) +36 + 37 = 73 (001001001) +36 + 38 = 74 (001001010) +36 + 39 = 75 (001001011) +36 + 40 = 76 (001001100) +36 + 41 = 77 (001001101) +36 + 42 = 78 (001001110) +36 + 43 = 79 (001001111) +36 + 44 = 80 (001010000) +36 + 45 = 81 (001010001) +36 + 46 = 82 (001010010) +36 + 47 = 83 (001010011) +36 + 48 = 84 (001010100) +36 + 49 = 85 (001010101) +36 + 50 = 86 (001010110) +36 + 51 = 87 (001010111) +36 + 52 = 88 (001011000) +36 + 53 = 89 (001011001) +36 + 54 = 90 (001011010) +36 + 55 = 91 (001011011) +36 + 56 = 92 (001011100) +36 + 57 = 93 (001011101) +36 + 58 = 94 (001011110) +36 + 59 = 95 (001011111) +36 + 60 = 96 (001100000) +36 + 61 = 97 (001100001) +36 + 62 = 98 (001100010) +36 + 63 = 99 (001100011) +37 + 0 = 37 (000100101) +37 + 1 = 38 (000100110) +37 + 2 = 39 (000100111) +37 + 3 = 40 (000101000) +37 + 4 = 41 (000101001) +37 + 5 = 42 (000101010) +37 + 6 = 43 (000101011) +37 + 7 = 44 (000101100) +37 + 8 = 45 (000101101) +37 + 9 = 46 (000101110) +37 + 10 = 47 (000101111) +37 + 11 = 48 (000110000) +37 + 12 = 49 (000110001) +37 + 13 = 50 (000110010) +37 + 14 = 51 (000110011) +37 + 15 = 52 (000110100) +37 + 16 = 53 (000110101) +37 + 17 = 54 (000110110) +37 + 18 = 55 (000110111) +37 + 19 = 56 (000111000) +37 + 20 = 57 (000111001) +37 + 21 = 58 (000111010) +37 + 22 = 59 (000111011) +37 + 23 = 60 (000111100) +37 + 24 = 61 (000111101) +37 + 25 = 62 (000111110) +37 + 26 = 63 (000111111) +37 + 27 = 64 (001000000) +37 + 28 = 65 (001000001) +37 + 29 = 66 (001000010) +37 + 30 = 67 (001000011) +37 + 31 = 68 (001000100) +37 + 32 = 69 (001000101) +37 + 33 = 70 (001000110) +37 + 34 = 71 (001000111) +37 + 35 = 72 (001001000) +37 + 36 = 73 (001001001) +37 + 37 = 74 (001001010) +37 + 38 = 75 (001001011) +37 + 39 = 76 (001001100) +37 + 40 = 77 (001001101) +37 + 41 = 78 (001001110) +37 + 42 = 79 (001001111) +37 + 43 = 80 (001010000) +37 + 44 = 81 (001010001) +37 + 45 = 82 (001010010) +37 + 46 = 83 (001010011) +37 + 47 = 84 (001010100) +37 + 48 = 85 (001010101) +37 + 49 = 86 (001010110) +37 + 50 = 87 (001010111) +37 + 51 = 88 (001011000) +37 + 52 = 89 (001011001) +37 + 53 = 90 (001011010) +37 + 54 = 91 (001011011) +37 + 55 = 92 (001011100) +37 + 56 = 93 (001011101) +37 + 57 = 94 (001011110) +37 + 58 = 95 (001011111) +37 + 59 = 96 (001100000) +37 + 60 = 97 (001100001) +37 + 61 = 98 (001100010) +37 + 62 = 99 (001100011) +37 + 63 = 100 (001100100) +38 + 0 = 38 (000100110) +38 + 1 = 39 (000100111) +38 + 2 = 40 (000101000) +38 + 3 = 41 (000101001) +38 + 4 = 42 (000101010) +38 + 5 = 43 (000101011) +38 + 6 = 44 (000101100) +38 + 7 = 45 (000101101) +38 + 8 = 46 (000101110) +38 + 9 = 47 (000101111) +38 + 10 = 48 (000110000) +38 + 11 = 49 (000110001) +38 + 12 = 50 (000110010) +38 + 13 = 51 (000110011) +38 + 14 = 52 (000110100) +38 + 15 = 53 (000110101) +38 + 16 = 54 (000110110) +38 + 17 = 55 (000110111) +38 + 18 = 56 (000111000) +38 + 19 = 57 (000111001) +38 + 20 = 58 (000111010) +38 + 21 = 59 (000111011) +38 + 22 = 60 (000111100) +38 + 23 = 61 (000111101) +38 + 24 = 62 (000111110) +38 + 25 = 63 (000111111) +38 + 26 = 64 (001000000) +38 + 27 = 65 (001000001) +38 + 28 = 66 (001000010) +38 + 29 = 67 (001000011) +38 + 30 = 68 (001000100) +38 + 31 = 69 (001000101) +38 + 32 = 70 (001000110) +38 + 33 = 71 (001000111) +38 + 34 = 72 (001001000) +38 + 35 = 73 (001001001) +38 + 36 = 74 (001001010) +38 + 37 = 75 (001001011) +38 + 38 = 76 (001001100) +38 + 39 = 77 (001001101) +38 + 40 = 78 (001001110) +38 + 41 = 79 (001001111) +38 + 42 = 80 (001010000) +38 + 43 = 81 (001010001) +38 + 44 = 82 (001010010) +38 + 45 = 83 (001010011) +38 + 46 = 84 (001010100) +38 + 47 = 85 (001010101) +38 + 48 = 86 (001010110) +38 + 49 = 87 (001010111) +38 + 50 = 88 (001011000) +38 + 51 = 89 (001011001) +38 + 52 = 90 (001011010) +38 + 53 = 91 (001011011) +38 + 54 = 92 (001011100) +38 + 55 = 93 (001011101) +38 + 56 = 94 (001011110) +38 + 57 = 95 (001011111) +38 + 58 = 96 (001100000) +38 + 59 = 97 (001100001) +38 + 60 = 98 (001100010) +38 + 61 = 99 (001100011) +38 + 62 = 100 (001100100) +38 + 63 = 101 (001100101) +39 + 0 = 39 (000100111) +39 + 1 = 40 (000101000) +39 + 2 = 41 (000101001) +39 + 3 = 42 (000101010) +39 + 4 = 43 (000101011) +39 + 5 = 44 (000101100) +39 + 6 = 45 (000101101) +39 + 7 = 46 (000101110) +39 + 8 = 47 (000101111) +39 + 9 = 48 (000110000) +39 + 10 = 49 (000110001) +39 + 11 = 50 (000110010) +39 + 12 = 51 (000110011) +39 + 13 = 52 (000110100) +39 + 14 = 53 (000110101) +39 + 15 = 54 (000110110) +39 + 16 = 55 (000110111) +39 + 17 = 56 (000111000) +39 + 18 = 57 (000111001) +39 + 19 = 58 (000111010) +39 + 20 = 59 (000111011) +39 + 21 = 60 (000111100) +39 + 22 = 61 (000111101) +39 + 23 = 62 (000111110) +39 + 24 = 63 (000111111) +39 + 25 = 64 (001000000) +39 + 26 = 65 (001000001) +39 + 27 = 66 (001000010) +39 + 28 = 67 (001000011) +39 + 29 = 68 (001000100) +39 + 30 = 69 (001000101) +39 + 31 = 70 (001000110) +39 + 32 = 71 (001000111) +39 + 33 = 72 (001001000) +39 + 34 = 73 (001001001) +39 + 35 = 74 (001001010) +39 + 36 = 75 (001001011) +39 + 37 = 76 (001001100) +39 + 38 = 77 (001001101) +39 + 39 = 78 (001001110) +39 + 40 = 79 (001001111) +39 + 41 = 80 (001010000) +39 + 42 = 81 (001010001) +39 + 43 = 82 (001010010) +39 + 44 = 83 (001010011) +39 + 45 = 84 (001010100) +39 + 46 = 85 (001010101) +39 + 47 = 86 (001010110) +39 + 48 = 87 (001010111) +39 + 49 = 88 (001011000) +39 + 50 = 89 (001011001) +39 + 51 = 90 (001011010) +39 + 52 = 91 (001011011) +39 + 53 = 92 (001011100) +39 + 54 = 93 (001011101) +39 + 55 = 94 (001011110) +39 + 56 = 95 (001011111) +39 + 57 = 96 (001100000) +39 + 58 = 97 (001100001) +39 + 59 = 98 (001100010) +39 + 60 = 99 (001100011) +39 + 61 = 100 (001100100) +39 + 62 = 101 (001100101) +39 + 63 = 102 (001100110) +40 + 0 = 40 (000101000) +40 + 1 = 41 (000101001) +40 + 2 = 42 (000101010) +40 + 3 = 43 (000101011) +40 + 4 = 44 (000101100) +40 + 5 = 45 (000101101) +40 + 6 = 46 (000101110) +40 + 7 = 47 (000101111) +40 + 8 = 48 (000110000) +40 + 9 = 49 (000110001) +40 + 10 = 50 (000110010) +40 + 11 = 51 (000110011) +40 + 12 = 52 (000110100) +40 + 13 = 53 (000110101) +40 + 14 = 54 (000110110) +40 + 15 = 55 (000110111) +40 + 16 = 56 (000111000) +40 + 17 = 57 (000111001) +40 + 18 = 58 (000111010) +40 + 19 = 59 (000111011) +40 + 20 = 60 (000111100) +40 + 21 = 61 (000111101) +40 + 22 = 62 (000111110) +40 + 23 = 63 (000111111) +40 + 24 = 64 (001000000) +40 + 25 = 65 (001000001) +40 + 26 = 66 (001000010) +40 + 27 = 67 (001000011) +40 + 28 = 68 (001000100) +40 + 29 = 69 (001000101) +40 + 30 = 70 (001000110) +40 + 31 = 71 (001000111) +40 + 32 = 72 (001001000) +40 + 33 = 73 (001001001) +40 + 34 = 74 (001001010) +40 + 35 = 75 (001001011) +40 + 36 = 76 (001001100) +40 + 37 = 77 (001001101) +40 + 38 = 78 (001001110) +40 + 39 = 79 (001001111) +40 + 40 = 80 (001010000) +40 + 41 = 81 (001010001) +40 + 42 = 82 (001010010) +40 + 43 = 83 (001010011) +40 + 44 = 84 (001010100) +40 + 45 = 85 (001010101) +40 + 46 = 86 (001010110) +40 + 47 = 87 (001010111) +40 + 48 = 88 (001011000) +40 + 49 = 89 (001011001) +40 + 50 = 90 (001011010) +40 + 51 = 91 (001011011) +40 + 52 = 92 (001011100) +40 + 53 = 93 (001011101) +40 + 54 = 94 (001011110) +40 + 55 = 95 (001011111) +40 + 56 = 96 (001100000) +40 + 57 = 97 (001100001) +40 + 58 = 98 (001100010) +40 + 59 = 99 (001100011) +40 + 60 = 100 (001100100) +40 + 61 = 101 (001100101) +40 + 62 = 102 (001100110) +40 + 63 = 103 (001100111) +41 + 0 = 41 (000101001) +41 + 1 = 42 (000101010) +41 + 2 = 43 (000101011) +41 + 3 = 44 (000101100) +41 + 4 = 45 (000101101) +41 + 5 = 46 (000101110) +41 + 6 = 47 (000101111) +41 + 7 = 48 (000110000) +41 + 8 = 49 (000110001) +41 + 9 = 50 (000110010) +41 + 10 = 51 (000110011) +41 + 11 = 52 (000110100) +41 + 12 = 53 (000110101) +41 + 13 = 54 (000110110) +41 + 14 = 55 (000110111) +41 + 15 = 56 (000111000) +41 + 16 = 57 (000111001) +41 + 17 = 58 (000111010) +41 + 18 = 59 (000111011) +41 + 19 = 60 (000111100) +41 + 20 = 61 (000111101) +41 + 21 = 62 (000111110) +41 + 22 = 63 (000111111) +41 + 23 = 64 (001000000) +41 + 24 = 65 (001000001) +41 + 25 = 66 (001000010) +41 + 26 = 67 (001000011) +41 + 27 = 68 (001000100) +41 + 28 = 69 (001000101) +41 + 29 = 70 (001000110) +41 + 30 = 71 (001000111) +41 + 31 = 72 (001001000) +41 + 32 = 73 (001001001) +41 + 33 = 74 (001001010) +41 + 34 = 75 (001001011) +41 + 35 = 76 (001001100) +41 + 36 = 77 (001001101) +41 + 37 = 78 (001001110) +41 + 38 = 79 (001001111) +41 + 39 = 80 (001010000) +41 + 40 = 81 (001010001) +41 + 41 = 82 (001010010) +41 + 42 = 83 (001010011) +41 + 43 = 84 (001010100) +41 + 44 = 85 (001010101) +41 + 45 = 86 (001010110) +41 + 46 = 87 (001010111) +41 + 47 = 88 (001011000) +41 + 48 = 89 (001011001) +41 + 49 = 90 (001011010) +41 + 50 = 91 (001011011) +41 + 51 = 92 (001011100) +41 + 52 = 93 (001011101) +41 + 53 = 94 (001011110) +41 + 54 = 95 (001011111) +41 + 55 = 96 (001100000) +41 + 56 = 97 (001100001) +41 + 57 = 98 (001100010) +41 + 58 = 99 (001100011) +41 + 59 = 100 (001100100) +41 + 60 = 101 (001100101) +41 + 61 = 102 (001100110) +41 + 62 = 103 (001100111) +41 + 63 = 104 (001101000) +42 + 0 = 42 (000101010) +42 + 1 = 43 (000101011) +42 + 2 = 44 (000101100) +42 + 3 = 45 (000101101) +42 + 4 = 46 (000101110) +42 + 5 = 47 (000101111) +42 + 6 = 48 (000110000) +42 + 7 = 49 (000110001) +42 + 8 = 50 (000110010) +42 + 9 = 51 (000110011) +42 + 10 = 52 (000110100) +42 + 11 = 53 (000110101) +42 + 12 = 54 (000110110) +42 + 13 = 55 (000110111) +42 + 14 = 56 (000111000) +42 + 15 = 57 (000111001) +42 + 16 = 58 (000111010) +42 + 17 = 59 (000111011) +42 + 18 = 60 (000111100) +42 + 19 = 61 (000111101) +42 + 20 = 62 (000111110) +42 + 21 = 63 (000111111) +42 + 22 = 64 (001000000) +42 + 23 = 65 (001000001) +42 + 24 = 66 (001000010) +42 + 25 = 67 (001000011) +42 + 26 = 68 (001000100) +42 + 27 = 69 (001000101) +42 + 28 = 70 (001000110) +42 + 29 = 71 (001000111) +42 + 30 = 72 (001001000) +42 + 31 = 73 (001001001) +42 + 32 = 74 (001001010) +42 + 33 = 75 (001001011) +42 + 34 = 76 (001001100) +42 + 35 = 77 (001001101) +42 + 36 = 78 (001001110) +42 + 37 = 79 (001001111) +42 + 38 = 80 (001010000) +42 + 39 = 81 (001010001) +42 + 40 = 82 (001010010) +42 + 41 = 83 (001010011) +42 + 42 = 84 (001010100) +42 + 43 = 85 (001010101) +42 + 44 = 86 (001010110) +42 + 45 = 87 (001010111) +42 + 46 = 88 (001011000) +42 + 47 = 89 (001011001) +42 + 48 = 90 (001011010) +42 + 49 = 91 (001011011) +42 + 50 = 92 (001011100) +42 + 51 = 93 (001011101) +42 + 52 = 94 (001011110) +42 + 53 = 95 (001011111) +42 + 54 = 96 (001100000) +42 + 55 = 97 (001100001) +42 + 56 = 98 (001100010) +42 + 57 = 99 (001100011) +42 + 58 = 100 (001100100) +42 + 59 = 101 (001100101) +42 + 60 = 102 (001100110) +42 + 61 = 103 (001100111) +42 + 62 = 104 (001101000) +42 + 63 = 105 (001101001) +43 + 0 = 43 (000101011) +43 + 1 = 44 (000101100) +43 + 2 = 45 (000101101) +43 + 3 = 46 (000101110) +43 + 4 = 47 (000101111) +43 + 5 = 48 (000110000) +43 + 6 = 49 (000110001) +43 + 7 = 50 (000110010) +43 + 8 = 51 (000110011) +43 + 9 = 52 (000110100) +43 + 10 = 53 (000110101) +43 + 11 = 54 (000110110) +43 + 12 = 55 (000110111) +43 + 13 = 56 (000111000) +43 + 14 = 57 (000111001) +43 + 15 = 58 (000111010) +43 + 16 = 59 (000111011) +43 + 17 = 60 (000111100) +43 + 18 = 61 (000111101) +43 + 19 = 62 (000111110) +43 + 20 = 63 (000111111) +43 + 21 = 64 (001000000) +43 + 22 = 65 (001000001) +43 + 23 = 66 (001000010) +43 + 24 = 67 (001000011) +43 + 25 = 68 (001000100) +43 + 26 = 69 (001000101) +43 + 27 = 70 (001000110) +43 + 28 = 71 (001000111) +43 + 29 = 72 (001001000) +43 + 30 = 73 (001001001) +43 + 31 = 74 (001001010) +43 + 32 = 75 (001001011) +43 + 33 = 76 (001001100) +43 + 34 = 77 (001001101) +43 + 35 = 78 (001001110) +43 + 36 = 79 (001001111) +43 + 37 = 80 (001010000) +43 + 38 = 81 (001010001) +43 + 39 = 82 (001010010) +43 + 40 = 83 (001010011) +43 + 41 = 84 (001010100) +43 + 42 = 85 (001010101) +43 + 43 = 86 (001010110) +43 + 44 = 87 (001010111) +43 + 45 = 88 (001011000) +43 + 46 = 89 (001011001) +43 + 47 = 90 (001011010) +43 + 48 = 91 (001011011) +43 + 49 = 92 (001011100) +43 + 50 = 93 (001011101) +43 + 51 = 94 (001011110) +43 + 52 = 95 (001011111) +43 + 53 = 96 (001100000) +43 + 54 = 97 (001100001) +43 + 55 = 98 (001100010) +43 + 56 = 99 (001100011) +43 + 57 = 100 (001100100) +43 + 58 = 101 (001100101) +43 + 59 = 102 (001100110) +43 + 60 = 103 (001100111) +43 + 61 = 104 (001101000) +43 + 62 = 105 (001101001) +43 + 63 = 106 (001101010) +44 + 0 = 44 (000101100) +44 + 1 = 45 (000101101) +44 + 2 = 46 (000101110) +44 + 3 = 47 (000101111) +44 + 4 = 48 (000110000) +44 + 5 = 49 (000110001) +44 + 6 = 50 (000110010) +44 + 7 = 51 (000110011) +44 + 8 = 52 (000110100) +44 + 9 = 53 (000110101) +44 + 10 = 54 (000110110) +44 + 11 = 55 (000110111) +44 + 12 = 56 (000111000) +44 + 13 = 57 (000111001) +44 + 14 = 58 (000111010) +44 + 15 = 59 (000111011) +44 + 16 = 60 (000111100) +44 + 17 = 61 (000111101) +44 + 18 = 62 (000111110) +44 + 19 = 63 (000111111) +44 + 20 = 64 (001000000) +44 + 21 = 65 (001000001) +44 + 22 = 66 (001000010) +44 + 23 = 67 (001000011) +44 + 24 = 68 (001000100) +44 + 25 = 69 (001000101) +44 + 26 = 70 (001000110) +44 + 27 = 71 (001000111) +44 + 28 = 72 (001001000) +44 + 29 = 73 (001001001) +44 + 30 = 74 (001001010) +44 + 31 = 75 (001001011) +44 + 32 = 76 (001001100) +44 + 33 = 77 (001001101) +44 + 34 = 78 (001001110) +44 + 35 = 79 (001001111) +44 + 36 = 80 (001010000) +44 + 37 = 81 (001010001) +44 + 38 = 82 (001010010) +44 + 39 = 83 (001010011) +44 + 40 = 84 (001010100) +44 + 41 = 85 (001010101) +44 + 42 = 86 (001010110) +44 + 43 = 87 (001010111) +44 + 44 = 88 (001011000) +44 + 45 = 89 (001011001) +44 + 46 = 90 (001011010) +44 + 47 = 91 (001011011) +44 + 48 = 92 (001011100) +44 + 49 = 93 (001011101) +44 + 50 = 94 (001011110) +44 + 51 = 95 (001011111) +44 + 52 = 96 (001100000) +44 + 53 = 97 (001100001) +44 + 54 = 98 (001100010) +44 + 55 = 99 (001100011) +44 + 56 = 100 (001100100) +44 + 57 = 101 (001100101) +44 + 58 = 102 (001100110) +44 + 59 = 103 (001100111) +44 + 60 = 104 (001101000) +44 + 61 = 105 (001101001) +44 + 62 = 106 (001101010) +44 + 63 = 107 (001101011) +45 + 0 = 45 (000101101) +45 + 1 = 46 (000101110) +45 + 2 = 47 (000101111) +45 + 3 = 48 (000110000) +45 + 4 = 49 (000110001) +45 + 5 = 50 (000110010) +45 + 6 = 51 (000110011) +45 + 7 = 52 (000110100) +45 + 8 = 53 (000110101) +45 + 9 = 54 (000110110) +45 + 10 = 55 (000110111) +45 + 11 = 56 (000111000) +45 + 12 = 57 (000111001) +45 + 13 = 58 (000111010) +45 + 14 = 59 (000111011) +45 + 15 = 60 (000111100) +45 + 16 = 61 (000111101) +45 + 17 = 62 (000111110) +45 + 18 = 63 (000111111) +45 + 19 = 64 (001000000) +45 + 20 = 65 (001000001) +45 + 21 = 66 (001000010) +45 + 22 = 67 (001000011) +45 + 23 = 68 (001000100) +45 + 24 = 69 (001000101) +45 + 25 = 70 (001000110) +45 + 26 = 71 (001000111) +45 + 27 = 72 (001001000) +45 + 28 = 73 (001001001) +45 + 29 = 74 (001001010) +45 + 30 = 75 (001001011) +45 + 31 = 76 (001001100) +45 + 32 = 77 (001001101) +45 + 33 = 78 (001001110) +45 + 34 = 79 (001001111) +45 + 35 = 80 (001010000) +45 + 36 = 81 (001010001) +45 + 37 = 82 (001010010) +45 + 38 = 83 (001010011) +45 + 39 = 84 (001010100) +45 + 40 = 85 (001010101) +45 + 41 = 86 (001010110) +45 + 42 = 87 (001010111) +45 + 43 = 88 (001011000) +45 + 44 = 89 (001011001) +45 + 45 = 90 (001011010) +45 + 46 = 91 (001011011) +45 + 47 = 92 (001011100) +45 + 48 = 93 (001011101) +45 + 49 = 94 (001011110) +45 + 50 = 95 (001011111) +45 + 51 = 96 (001100000) +45 + 52 = 97 (001100001) +45 + 53 = 98 (001100010) +45 + 54 = 99 (001100011) +45 + 55 = 100 (001100100) +45 + 56 = 101 (001100101) +45 + 57 = 102 (001100110) +45 + 58 = 103 (001100111) +45 + 59 = 104 (001101000) +45 + 60 = 105 (001101001) +45 + 61 = 106 (001101010) +45 + 62 = 107 (001101011) +45 + 63 = 108 (001101100) +46 + 0 = 46 (000101110) +46 + 1 = 47 (000101111) +46 + 2 = 48 (000110000) +46 + 3 = 49 (000110001) +46 + 4 = 50 (000110010) +46 + 5 = 51 (000110011) +46 + 6 = 52 (000110100) +46 + 7 = 53 (000110101) +46 + 8 = 54 (000110110) +46 + 9 = 55 (000110111) +46 + 10 = 56 (000111000) +46 + 11 = 57 (000111001) +46 + 12 = 58 (000111010) +46 + 13 = 59 (000111011) +46 + 14 = 60 (000111100) +46 + 15 = 61 (000111101) +46 + 16 = 62 (000111110) +46 + 17 = 63 (000111111) +46 + 18 = 64 (001000000) +46 + 19 = 65 (001000001) +46 + 20 = 66 (001000010) +46 + 21 = 67 (001000011) +46 + 22 = 68 (001000100) +46 + 23 = 69 (001000101) +46 + 24 = 70 (001000110) +46 + 25 = 71 (001000111) +46 + 26 = 72 (001001000) +46 + 27 = 73 (001001001) +46 + 28 = 74 (001001010) +46 + 29 = 75 (001001011) +46 + 30 = 76 (001001100) +46 + 31 = 77 (001001101) +46 + 32 = 78 (001001110) +46 + 33 = 79 (001001111) +46 + 34 = 80 (001010000) +46 + 35 = 81 (001010001) +46 + 36 = 82 (001010010) +46 + 37 = 83 (001010011) +46 + 38 = 84 (001010100) +46 + 39 = 85 (001010101) +46 + 40 = 86 (001010110) +46 + 41 = 87 (001010111) +46 + 42 = 88 (001011000) +46 + 43 = 89 (001011001) +46 + 44 = 90 (001011010) +46 + 45 = 91 (001011011) +46 + 46 = 92 (001011100) +46 + 47 = 93 (001011101) +46 + 48 = 94 (001011110) +46 + 49 = 95 (001011111) +46 + 50 = 96 (001100000) +46 + 51 = 97 (001100001) +46 + 52 = 98 (001100010) +46 + 53 = 99 (001100011) +46 + 54 = 100 (001100100) +46 + 55 = 101 (001100101) +46 + 56 = 102 (001100110) +46 + 57 = 103 (001100111) +46 + 58 = 104 (001101000) +46 + 59 = 105 (001101001) +46 + 60 = 106 (001101010) +46 + 61 = 107 (001101011) +46 + 62 = 108 (001101100) +46 + 63 = 109 (001101101) +47 + 0 = 47 (000101111) +47 + 1 = 48 (000110000) +47 + 2 = 49 (000110001) +47 + 3 = 50 (000110010) +47 + 4 = 51 (000110011) +47 + 5 = 52 (000110100) +47 + 6 = 53 (000110101) +47 + 7 = 54 (000110110) +47 + 8 = 55 (000110111) +47 + 9 = 56 (000111000) +47 + 10 = 57 (000111001) +47 + 11 = 58 (000111010) +47 + 12 = 59 (000111011) +47 + 13 = 60 (000111100) +47 + 14 = 61 (000111101) +47 + 15 = 62 (000111110) +47 + 16 = 63 (000111111) +47 + 17 = 64 (001000000) +47 + 18 = 65 (001000001) +47 + 19 = 66 (001000010) +47 + 20 = 67 (001000011) +47 + 21 = 68 (001000100) +47 + 22 = 69 (001000101) +47 + 23 = 70 (001000110) +47 + 24 = 71 (001000111) +47 + 25 = 72 (001001000) +47 + 26 = 73 (001001001) +47 + 27 = 74 (001001010) +47 + 28 = 75 (001001011) +47 + 29 = 76 (001001100) +47 + 30 = 77 (001001101) +47 + 31 = 78 (001001110) +47 + 32 = 79 (001001111) +47 + 33 = 80 (001010000) +47 + 34 = 81 (001010001) +47 + 35 = 82 (001010010) +47 + 36 = 83 (001010011) +47 + 37 = 84 (001010100) +47 + 38 = 85 (001010101) +47 + 39 = 86 (001010110) +47 + 40 = 87 (001010111) +47 + 41 = 88 (001011000) +47 + 42 = 89 (001011001) +47 + 43 = 90 (001011010) +47 + 44 = 91 (001011011) +47 + 45 = 92 (001011100) +47 + 46 = 93 (001011101) +47 + 47 = 94 (001011110) +47 + 48 = 95 (001011111) +47 + 49 = 96 (001100000) +47 + 50 = 97 (001100001) +47 + 51 = 98 (001100010) +47 + 52 = 99 (001100011) +47 + 53 = 100 (001100100) +47 + 54 = 101 (001100101) +47 + 55 = 102 (001100110) +47 + 56 = 103 (001100111) +47 + 57 = 104 (001101000) +47 + 58 = 105 (001101001) +47 + 59 = 106 (001101010) +47 + 60 = 107 (001101011) +47 + 61 = 108 (001101100) +47 + 62 = 109 (001101101) +47 + 63 = 110 (001101110) +48 + 0 = 48 (000110000) +48 + 1 = 49 (000110001) +48 + 2 = 50 (000110010) +48 + 3 = 51 (000110011) +48 + 4 = 52 (000110100) +48 + 5 = 53 (000110101) +48 + 6 = 54 (000110110) +48 + 7 = 55 (000110111) +48 + 8 = 56 (000111000) +48 + 9 = 57 (000111001) +48 + 10 = 58 (000111010) +48 + 11 = 59 (000111011) +48 + 12 = 60 (000111100) +48 + 13 = 61 (000111101) +48 + 14 = 62 (000111110) +48 + 15 = 63 (000111111) +48 + 16 = 64 (001000000) +48 + 17 = 65 (001000001) +48 + 18 = 66 (001000010) +48 + 19 = 67 (001000011) +48 + 20 = 68 (001000100) +48 + 21 = 69 (001000101) +48 + 22 = 70 (001000110) +48 + 23 = 71 (001000111) +48 + 24 = 72 (001001000) +48 + 25 = 73 (001001001) +48 + 26 = 74 (001001010) +48 + 27 = 75 (001001011) +48 + 28 = 76 (001001100) +48 + 29 = 77 (001001101) +48 + 30 = 78 (001001110) +48 + 31 = 79 (001001111) +48 + 32 = 80 (001010000) +48 + 33 = 81 (001010001) +48 + 34 = 82 (001010010) +48 + 35 = 83 (001010011) +48 + 36 = 84 (001010100) +48 + 37 = 85 (001010101) +48 + 38 = 86 (001010110) +48 + 39 = 87 (001010111) +48 + 40 = 88 (001011000) +48 + 41 = 89 (001011001) +48 + 42 = 90 (001011010) +48 + 43 = 91 (001011011) +48 + 44 = 92 (001011100) +48 + 45 = 93 (001011101) +48 + 46 = 94 (001011110) +48 + 47 = 95 (001011111) +48 + 48 = 96 (001100000) +48 + 49 = 97 (001100001) +48 + 50 = 98 (001100010) +48 + 51 = 99 (001100011) +48 + 52 = 100 (001100100) +48 + 53 = 101 (001100101) +48 + 54 = 102 (001100110) +48 + 55 = 103 (001100111) +48 + 56 = 104 (001101000) +48 + 57 = 105 (001101001) +48 + 58 = 106 (001101010) +48 + 59 = 107 (001101011) +48 + 60 = 108 (001101100) +48 + 61 = 109 (001101101) +48 + 62 = 110 (001101110) +48 + 63 = 111 (001101111) +49 + 0 = 49 (000110001) +49 + 1 = 50 (000110010) +49 + 2 = 51 (000110011) +49 + 3 = 52 (000110100) +49 + 4 = 53 (000110101) +49 + 5 = 54 (000110110) +49 + 6 = 55 (000110111) +49 + 7 = 56 (000111000) +49 + 8 = 57 (000111001) +49 + 9 = 58 (000111010) +49 + 10 = 59 (000111011) +49 + 11 = 60 (000111100) +49 + 12 = 61 (000111101) +49 + 13 = 62 (000111110) +49 + 14 = 63 (000111111) +49 + 15 = 64 (001000000) +49 + 16 = 65 (001000001) +49 + 17 = 66 (001000010) +49 + 18 = 67 (001000011) +49 + 19 = 68 (001000100) +49 + 20 = 69 (001000101) +49 + 21 = 70 (001000110) +49 + 22 = 71 (001000111) +49 + 23 = 72 (001001000) +49 + 24 = 73 (001001001) +49 + 25 = 74 (001001010) +49 + 26 = 75 (001001011) +49 + 27 = 76 (001001100) +49 + 28 = 77 (001001101) +49 + 29 = 78 (001001110) +49 + 30 = 79 (001001111) +49 + 31 = 80 (001010000) +49 + 32 = 81 (001010001) +49 + 33 = 82 (001010010) +49 + 34 = 83 (001010011) +49 + 35 = 84 (001010100) +49 + 36 = 85 (001010101) +49 + 37 = 86 (001010110) +49 + 38 = 87 (001010111) +49 + 39 = 88 (001011000) +49 + 40 = 89 (001011001) +49 + 41 = 90 (001011010) +49 + 42 = 91 (001011011) +49 + 43 = 92 (001011100) +49 + 44 = 93 (001011101) +49 + 45 = 94 (001011110) +49 + 46 = 95 (001011111) +49 + 47 = 96 (001100000) +49 + 48 = 97 (001100001) +49 + 49 = 98 (001100010) +49 + 50 = 99 (001100011) +49 + 51 = 100 (001100100) +49 + 52 = 101 (001100101) +49 + 53 = 102 (001100110) +49 + 54 = 103 (001100111) +49 + 55 = 104 (001101000) +49 + 56 = 105 (001101001) +49 + 57 = 106 (001101010) +49 + 58 = 107 (001101011) +49 + 59 = 108 (001101100) +49 + 60 = 109 (001101101) +49 + 61 = 110 (001101110) +49 + 62 = 111 (001101111) +49 + 63 = 112 (001110000) +50 + 0 = 50 (000110010) +50 + 1 = 51 (000110011) +50 + 2 = 52 (000110100) +50 + 3 = 53 (000110101) +50 + 4 = 54 (000110110) +50 + 5 = 55 (000110111) +50 + 6 = 56 (000111000) +50 + 7 = 57 (000111001) +50 + 8 = 58 (000111010) +50 + 9 = 59 (000111011) +50 + 10 = 60 (000111100) +50 + 11 = 61 (000111101) +50 + 12 = 62 (000111110) +50 + 13 = 63 (000111111) +50 + 14 = 64 (001000000) +50 + 15 = 65 (001000001) +50 + 16 = 66 (001000010) +50 + 17 = 67 (001000011) +50 + 18 = 68 (001000100) +50 + 19 = 69 (001000101) +50 + 20 = 70 (001000110) +50 + 21 = 71 (001000111) +50 + 22 = 72 (001001000) +50 + 23 = 73 (001001001) +50 + 24 = 74 (001001010) +50 + 25 = 75 (001001011) +50 + 26 = 76 (001001100) +50 + 27 = 77 (001001101) +50 + 28 = 78 (001001110) +50 + 29 = 79 (001001111) +50 + 30 = 80 (001010000) +50 + 31 = 81 (001010001) +50 + 32 = 82 (001010010) +50 + 33 = 83 (001010011) +50 + 34 = 84 (001010100) +50 + 35 = 85 (001010101) +50 + 36 = 86 (001010110) +50 + 37 = 87 (001010111) +50 + 38 = 88 (001011000) +50 + 39 = 89 (001011001) +50 + 40 = 90 (001011010) +50 + 41 = 91 (001011011) +50 + 42 = 92 (001011100) +50 + 43 = 93 (001011101) +50 + 44 = 94 (001011110) +50 + 45 = 95 (001011111) +50 + 46 = 96 (001100000) +50 + 47 = 97 (001100001) +50 + 48 = 98 (001100010) +50 + 49 = 99 (001100011) +50 + 50 = 100 (001100100) +50 + 51 = 101 (001100101) +50 + 52 = 102 (001100110) +50 + 53 = 103 (001100111) +50 + 54 = 104 (001101000) +50 + 55 = 105 (001101001) +50 + 56 = 106 (001101010) +50 + 57 = 107 (001101011) +50 + 58 = 108 (001101100) +50 + 59 = 109 (001101101) +50 + 60 = 110 (001101110) +50 + 61 = 111 (001101111) +50 + 62 = 112 (001110000) +50 + 63 = 113 (001110001) +51 + 0 = 51 (000110011) +51 + 1 = 52 (000110100) +51 + 2 = 53 (000110101) +51 + 3 = 54 (000110110) +51 + 4 = 55 (000110111) +51 + 5 = 56 (000111000) +51 + 6 = 57 (000111001) +51 + 7 = 58 (000111010) +51 + 8 = 59 (000111011) +51 + 9 = 60 (000111100) +51 + 10 = 61 (000111101) +51 + 11 = 62 (000111110) +51 + 12 = 63 (000111111) +51 + 13 = 64 (001000000) +51 + 14 = 65 (001000001) +51 + 15 = 66 (001000010) +51 + 16 = 67 (001000011) +51 + 17 = 68 (001000100) +51 + 18 = 69 (001000101) +51 + 19 = 70 (001000110) +51 + 20 = 71 (001000111) +51 + 21 = 72 (001001000) +51 + 22 = 73 (001001001) +51 + 23 = 74 (001001010) +51 + 24 = 75 (001001011) +51 + 25 = 76 (001001100) +51 + 26 = 77 (001001101) +51 + 27 = 78 (001001110) +51 + 28 = 79 (001001111) +51 + 29 = 80 (001010000) +51 + 30 = 81 (001010001) +51 + 31 = 82 (001010010) +51 + 32 = 83 (001010011) +51 + 33 = 84 (001010100) +51 + 34 = 85 (001010101) +51 + 35 = 86 (001010110) +51 + 36 = 87 (001010111) +51 + 37 = 88 (001011000) +51 + 38 = 89 (001011001) +51 + 39 = 90 (001011010) +51 + 40 = 91 (001011011) +51 + 41 = 92 (001011100) +51 + 42 = 93 (001011101) +51 + 43 = 94 (001011110) +51 + 44 = 95 (001011111) +51 + 45 = 96 (001100000) +51 + 46 = 97 (001100001) +51 + 47 = 98 (001100010) +51 + 48 = 99 (001100011) +51 + 49 = 100 (001100100) +51 + 50 = 101 (001100101) +51 + 51 = 102 (001100110) +51 + 52 = 103 (001100111) +51 + 53 = 104 (001101000) +51 + 54 = 105 (001101001) +51 + 55 = 106 (001101010) +51 + 56 = 107 (001101011) +51 + 57 = 108 (001101100) +51 + 58 = 109 (001101101) +51 + 59 = 110 (001101110) +51 + 60 = 111 (001101111) +51 + 61 = 112 (001110000) +51 + 62 = 113 (001110001) +51 + 63 = 114 (001110010) +52 + 0 = 52 (000110100) +52 + 1 = 53 (000110101) +52 + 2 = 54 (000110110) +52 + 3 = 55 (000110111) +52 + 4 = 56 (000111000) +52 + 5 = 57 (000111001) +52 + 6 = 58 (000111010) +52 + 7 = 59 (000111011) +52 + 8 = 60 (000111100) +52 + 9 = 61 (000111101) +52 + 10 = 62 (000111110) +52 + 11 = 63 (000111111) +52 + 12 = 64 (001000000) +52 + 13 = 65 (001000001) +52 + 14 = 66 (001000010) +52 + 15 = 67 (001000011) +52 + 16 = 68 (001000100) +52 + 17 = 69 (001000101) +52 + 18 = 70 (001000110) +52 + 19 = 71 (001000111) +52 + 20 = 72 (001001000) +52 + 21 = 73 (001001001) +52 + 22 = 74 (001001010) +52 + 23 = 75 (001001011) +52 + 24 = 76 (001001100) +52 + 25 = 77 (001001101) +52 + 26 = 78 (001001110) +52 + 27 = 79 (001001111) +52 + 28 = 80 (001010000) +52 + 29 = 81 (001010001) +52 + 30 = 82 (001010010) +52 + 31 = 83 (001010011) +52 + 32 = 84 (001010100) +52 + 33 = 85 (001010101) +52 + 34 = 86 (001010110) +52 + 35 = 87 (001010111) +52 + 36 = 88 (001011000) +52 + 37 = 89 (001011001) +52 + 38 = 90 (001011010) +52 + 39 = 91 (001011011) +52 + 40 = 92 (001011100) +52 + 41 = 93 (001011101) +52 + 42 = 94 (001011110) +52 + 43 = 95 (001011111) +52 + 44 = 96 (001100000) +52 + 45 = 97 (001100001) +52 + 46 = 98 (001100010) +52 + 47 = 99 (001100011) +52 + 48 = 100 (001100100) +52 + 49 = 101 (001100101) +52 + 50 = 102 (001100110) +52 + 51 = 103 (001100111) +52 + 52 = 104 (001101000) +52 + 53 = 105 (001101001) +52 + 54 = 106 (001101010) +52 + 55 = 107 (001101011) +52 + 56 = 108 (001101100) +52 + 57 = 109 (001101101) +52 + 58 = 110 (001101110) +52 + 59 = 111 (001101111) +52 + 60 = 112 (001110000) +52 + 61 = 113 (001110001) +52 + 62 = 114 (001110010) +52 + 63 = 115 (001110011) +53 + 0 = 53 (000110101) +53 + 1 = 54 (000110110) +53 + 2 = 55 (000110111) +53 + 3 = 56 (000111000) +53 + 4 = 57 (000111001) +53 + 5 = 58 (000111010) +53 + 6 = 59 (000111011) +53 + 7 = 60 (000111100) +53 + 8 = 61 (000111101) +53 + 9 = 62 (000111110) +53 + 10 = 63 (000111111) +53 + 11 = 64 (001000000) +53 + 12 = 65 (001000001) +53 + 13 = 66 (001000010) +53 + 14 = 67 (001000011) +53 + 15 = 68 (001000100) +53 + 16 = 69 (001000101) +53 + 17 = 70 (001000110) +53 + 18 = 71 (001000111) +53 + 19 = 72 (001001000) +53 + 20 = 73 (001001001) +53 + 21 = 74 (001001010) +53 + 22 = 75 (001001011) +53 + 23 = 76 (001001100) +53 + 24 = 77 (001001101) +53 + 25 = 78 (001001110) +53 + 26 = 79 (001001111) +53 + 27 = 80 (001010000) +53 + 28 = 81 (001010001) +53 + 29 = 82 (001010010) +53 + 30 = 83 (001010011) +53 + 31 = 84 (001010100) +53 + 32 = 85 (001010101) +53 + 33 = 86 (001010110) +53 + 34 = 87 (001010111) +53 + 35 = 88 (001011000) +53 + 36 = 89 (001011001) +53 + 37 = 90 (001011010) +53 + 38 = 91 (001011011) +53 + 39 = 92 (001011100) +53 + 40 = 93 (001011101) +53 + 41 = 94 (001011110) +53 + 42 = 95 (001011111) +53 + 43 = 96 (001100000) +53 + 44 = 97 (001100001) +53 + 45 = 98 (001100010) +53 + 46 = 99 (001100011) +53 + 47 = 100 (001100100) +53 + 48 = 101 (001100101) +53 + 49 = 102 (001100110) +53 + 50 = 103 (001100111) +53 + 51 = 104 (001101000) +53 + 52 = 105 (001101001) +53 + 53 = 106 (001101010) +53 + 54 = 107 (001101011) +53 + 55 = 108 (001101100) +53 + 56 = 109 (001101101) +53 + 57 = 110 (001101110) +53 + 58 = 111 (001101111) +53 + 59 = 112 (001110000) +53 + 60 = 113 (001110001) +53 + 61 = 114 (001110010) +53 + 62 = 115 (001110011) +53 + 63 = 116 (001110100) +54 + 0 = 54 (000110110) +54 + 1 = 55 (000110111) +54 + 2 = 56 (000111000) +54 + 3 = 57 (000111001) +54 + 4 = 58 (000111010) +54 + 5 = 59 (000111011) +54 + 6 = 60 (000111100) +54 + 7 = 61 (000111101) +54 + 8 = 62 (000111110) +54 + 9 = 63 (000111111) +54 + 10 = 64 (001000000) +54 + 11 = 65 (001000001) +54 + 12 = 66 (001000010) +54 + 13 = 67 (001000011) +54 + 14 = 68 (001000100) +54 + 15 = 69 (001000101) +54 + 16 = 70 (001000110) +54 + 17 = 71 (001000111) +54 + 18 = 72 (001001000) +54 + 19 = 73 (001001001) +54 + 20 = 74 (001001010) +54 + 21 = 75 (001001011) +54 + 22 = 76 (001001100) +54 + 23 = 77 (001001101) +54 + 24 = 78 (001001110) +54 + 25 = 79 (001001111) +54 + 26 = 80 (001010000) +54 + 27 = 81 (001010001) +54 + 28 = 82 (001010010) +54 + 29 = 83 (001010011) +54 + 30 = 84 (001010100) +54 + 31 = 85 (001010101) +54 + 32 = 86 (001010110) +54 + 33 = 87 (001010111) +54 + 34 = 88 (001011000) +54 + 35 = 89 (001011001) +54 + 36 = 90 (001011010) +54 + 37 = 91 (001011011) +54 + 38 = 92 (001011100) +54 + 39 = 93 (001011101) +54 + 40 = 94 (001011110) +54 + 41 = 95 (001011111) +54 + 42 = 96 (001100000) +54 + 43 = 97 (001100001) +54 + 44 = 98 (001100010) +54 + 45 = 99 (001100011) +54 + 46 = 100 (001100100) +54 + 47 = 101 (001100101) +54 + 48 = 102 (001100110) +54 + 49 = 103 (001100111) +54 + 50 = 104 (001101000) +54 + 51 = 105 (001101001) +54 + 52 = 106 (001101010) +54 + 53 = 107 (001101011) +54 + 54 = 108 (001101100) +54 + 55 = 109 (001101101) +54 + 56 = 110 (001101110) +54 + 57 = 111 (001101111) +54 + 58 = 112 (001110000) +54 + 59 = 113 (001110001) +54 + 60 = 114 (001110010) +54 + 61 = 115 (001110011) +54 + 62 = 116 (001110100) +54 + 63 = 117 (001110101) +55 + 0 = 55 (000110111) +55 + 1 = 56 (000111000) +55 + 2 = 57 (000111001) +55 + 3 = 58 (000111010) +55 + 4 = 59 (000111011) +55 + 5 = 60 (000111100) +55 + 6 = 61 (000111101) +55 + 7 = 62 (000111110) +55 + 8 = 63 (000111111) +55 + 9 = 64 (001000000) +55 + 10 = 65 (001000001) +55 + 11 = 66 (001000010) +55 + 12 = 67 (001000011) +55 + 13 = 68 (001000100) +55 + 14 = 69 (001000101) +55 + 15 = 70 (001000110) +55 + 16 = 71 (001000111) +55 + 17 = 72 (001001000) +55 + 18 = 73 (001001001) +55 + 19 = 74 (001001010) +55 + 20 = 75 (001001011) +55 + 21 = 76 (001001100) +55 + 22 = 77 (001001101) +55 + 23 = 78 (001001110) +55 + 24 = 79 (001001111) +55 + 25 = 80 (001010000) +55 + 26 = 81 (001010001) +55 + 27 = 82 (001010010) +55 + 28 = 83 (001010011) +55 + 29 = 84 (001010100) +55 + 30 = 85 (001010101) +55 + 31 = 86 (001010110) +55 + 32 = 87 (001010111) +55 + 33 = 88 (001011000) +55 + 34 = 89 (001011001) +55 + 35 = 90 (001011010) +55 + 36 = 91 (001011011) +55 + 37 = 92 (001011100) +55 + 38 = 93 (001011101) +55 + 39 = 94 (001011110) +55 + 40 = 95 (001011111) +55 + 41 = 96 (001100000) +55 + 42 = 97 (001100001) +55 + 43 = 98 (001100010) +55 + 44 = 99 (001100011) +55 + 45 = 100 (001100100) +55 + 46 = 101 (001100101) +55 + 47 = 102 (001100110) +55 + 48 = 103 (001100111) +55 + 49 = 104 (001101000) +55 + 50 = 105 (001101001) +55 + 51 = 106 (001101010) +55 + 52 = 107 (001101011) +55 + 53 = 108 (001101100) +55 + 54 = 109 (001101101) +55 + 55 = 110 (001101110) +55 + 56 = 111 (001101111) +55 + 57 = 112 (001110000) +55 + 58 = 113 (001110001) +55 + 59 = 114 (001110010) +55 + 60 = 115 (001110011) +55 + 61 = 116 (001110100) +55 + 62 = 117 (001110101) +55 + 63 = 118 (001110110) +56 + 0 = 56 (000111000) +56 + 1 = 57 (000111001) +56 + 2 = 58 (000111010) +56 + 3 = 59 (000111011) +56 + 4 = 60 (000111100) +56 + 5 = 61 (000111101) +56 + 6 = 62 (000111110) +56 + 7 = 63 (000111111) +56 + 8 = 64 (001000000) +56 + 9 = 65 (001000001) +56 + 10 = 66 (001000010) +56 + 11 = 67 (001000011) +56 + 12 = 68 (001000100) +56 + 13 = 69 (001000101) +56 + 14 = 70 (001000110) +56 + 15 = 71 (001000111) +56 + 16 = 72 (001001000) +56 + 17 = 73 (001001001) +56 + 18 = 74 (001001010) +56 + 19 = 75 (001001011) +56 + 20 = 76 (001001100) +56 + 21 = 77 (001001101) +56 + 22 = 78 (001001110) +56 + 23 = 79 (001001111) +56 + 24 = 80 (001010000) +56 + 25 = 81 (001010001) +56 + 26 = 82 (001010010) +56 + 27 = 83 (001010011) +56 + 28 = 84 (001010100) +56 + 29 = 85 (001010101) +56 + 30 = 86 (001010110) +56 + 31 = 87 (001010111) +56 + 32 = 88 (001011000) +56 + 33 = 89 (001011001) +56 + 34 = 90 (001011010) +56 + 35 = 91 (001011011) +56 + 36 = 92 (001011100) +56 + 37 = 93 (001011101) +56 + 38 = 94 (001011110) +56 + 39 = 95 (001011111) +56 + 40 = 96 (001100000) +56 + 41 = 97 (001100001) +56 + 42 = 98 (001100010) +56 + 43 = 99 (001100011) +56 + 44 = 100 (001100100) +56 + 45 = 101 (001100101) +56 + 46 = 102 (001100110) +56 + 47 = 103 (001100111) +56 + 48 = 104 (001101000) +56 + 49 = 105 (001101001) +56 + 50 = 106 (001101010) +56 + 51 = 107 (001101011) +56 + 52 = 108 (001101100) +56 + 53 = 109 (001101101) +56 + 54 = 110 (001101110) +56 + 55 = 111 (001101111) +56 + 56 = 112 (001110000) +56 + 57 = 113 (001110001) +56 + 58 = 114 (001110010) +56 + 59 = 115 (001110011) +56 + 60 = 116 (001110100) +56 + 61 = 117 (001110101) +56 + 62 = 118 (001110110) +56 + 63 = 119 (001110111) +57 + 0 = 57 (000111001) +57 + 1 = 58 (000111010) +57 + 2 = 59 (000111011) +57 + 3 = 60 (000111100) +57 + 4 = 61 (000111101) +57 + 5 = 62 (000111110) +57 + 6 = 63 (000111111) +57 + 7 = 64 (001000000) +57 + 8 = 65 (001000001) +57 + 9 = 66 (001000010) +57 + 10 = 67 (001000011) +57 + 11 = 68 (001000100) +57 + 12 = 69 (001000101) +57 + 13 = 70 (001000110) +57 + 14 = 71 (001000111) +57 + 15 = 72 (001001000) +57 + 16 = 73 (001001001) +57 + 17 = 74 (001001010) +57 + 18 = 75 (001001011) +57 + 19 = 76 (001001100) +57 + 20 = 77 (001001101) +57 + 21 = 78 (001001110) +57 + 22 = 79 (001001111) +57 + 23 = 80 (001010000) +57 + 24 = 81 (001010001) +57 + 25 = 82 (001010010) +57 + 26 = 83 (001010011) +57 + 27 = 84 (001010100) +57 + 28 = 85 (001010101) +57 + 29 = 86 (001010110) +57 + 30 = 87 (001010111) +57 + 31 = 88 (001011000) +57 + 32 = 89 (001011001) +57 + 33 = 90 (001011010) +57 + 34 = 91 (001011011) +57 + 35 = 92 (001011100) +57 + 36 = 93 (001011101) +57 + 37 = 94 (001011110) +57 + 38 = 95 (001011111) +57 + 39 = 96 (001100000) +57 + 40 = 97 (001100001) +57 + 41 = 98 (001100010) +57 + 42 = 99 (001100011) +57 + 43 = 100 (001100100) +57 + 44 = 101 (001100101) +57 + 45 = 102 (001100110) +57 + 46 = 103 (001100111) +57 + 47 = 104 (001101000) +57 + 48 = 105 (001101001) +57 + 49 = 106 (001101010) +57 + 50 = 107 (001101011) +57 + 51 = 108 (001101100) +57 + 52 = 109 (001101101) +57 + 53 = 110 (001101110) +57 + 54 = 111 (001101111) +57 + 55 = 112 (001110000) +57 + 56 = 113 (001110001) +57 + 57 = 114 (001110010) +57 + 58 = 115 (001110011) +57 + 59 = 116 (001110100) +57 + 60 = 117 (001110101) +57 + 61 = 118 (001110110) +57 + 62 = 119 (001110111) +57 + 63 = 120 (001111000) +58 + 0 = 58 (000111010) +58 + 1 = 59 (000111011) +58 + 2 = 60 (000111100) +58 + 3 = 61 (000111101) +58 + 4 = 62 (000111110) +58 + 5 = 63 (000111111) +58 + 6 = 64 (001000000) +58 + 7 = 65 (001000001) +58 + 8 = 66 (001000010) +58 + 9 = 67 (001000011) +58 + 10 = 68 (001000100) +58 + 11 = 69 (001000101) +58 + 12 = 70 (001000110) +58 + 13 = 71 (001000111) +58 + 14 = 72 (001001000) +58 + 15 = 73 (001001001) +58 + 16 = 74 (001001010) +58 + 17 = 75 (001001011) +58 + 18 = 76 (001001100) +58 + 19 = 77 (001001101) +58 + 20 = 78 (001001110) +58 + 21 = 79 (001001111) +58 + 22 = 80 (001010000) +58 + 23 = 81 (001010001) +58 + 24 = 82 (001010010) +58 + 25 = 83 (001010011) +58 + 26 = 84 (001010100) +58 + 27 = 85 (001010101) +58 + 28 = 86 (001010110) +58 + 29 = 87 (001010111) +58 + 30 = 88 (001011000) +58 + 31 = 89 (001011001) +58 + 32 = 90 (001011010) +58 + 33 = 91 (001011011) +58 + 34 = 92 (001011100) +58 + 35 = 93 (001011101) +58 + 36 = 94 (001011110) +58 + 37 = 95 (001011111) +58 + 38 = 96 (001100000) +58 + 39 = 97 (001100001) +58 + 40 = 98 (001100010) +58 + 41 = 99 (001100011) +58 + 42 = 100 (001100100) +58 + 43 = 101 (001100101) +58 + 44 = 102 (001100110) +58 + 45 = 103 (001100111) +58 + 46 = 104 (001101000) +58 + 47 = 105 (001101001) +58 + 48 = 106 (001101010) +58 + 49 = 107 (001101011) +58 + 50 = 108 (001101100) +58 + 51 = 109 (001101101) +58 + 52 = 110 (001101110) +58 + 53 = 111 (001101111) +58 + 54 = 112 (001110000) +58 + 55 = 113 (001110001) +58 + 56 = 114 (001110010) +58 + 57 = 115 (001110011) +58 + 58 = 116 (001110100) +58 + 59 = 117 (001110101) +58 + 60 = 118 (001110110) +58 + 61 = 119 (001110111) +58 + 62 = 120 (001111000) +58 + 63 = 121 (001111001) +59 + 0 = 59 (000111011) +59 + 1 = 60 (000111100) +59 + 2 = 61 (000111101) +59 + 3 = 62 (000111110) +59 + 4 = 63 (000111111) +59 + 5 = 64 (001000000) +59 + 6 = 65 (001000001) +59 + 7 = 66 (001000010) +59 + 8 = 67 (001000011) +59 + 9 = 68 (001000100) +59 + 10 = 69 (001000101) +59 + 11 = 70 (001000110) +59 + 12 = 71 (001000111) +59 + 13 = 72 (001001000) +59 + 14 = 73 (001001001) +59 + 15 = 74 (001001010) +59 + 16 = 75 (001001011) +59 + 17 = 76 (001001100) +59 + 18 = 77 (001001101) +59 + 19 = 78 (001001110) +59 + 20 = 79 (001001111) +59 + 21 = 80 (001010000) +59 + 22 = 81 (001010001) +59 + 23 = 82 (001010010) +59 + 24 = 83 (001010011) +59 + 25 = 84 (001010100) +59 + 26 = 85 (001010101) +59 + 27 = 86 (001010110) +59 + 28 = 87 (001010111) +59 + 29 = 88 (001011000) +59 + 30 = 89 (001011001) +59 + 31 = 90 (001011010) +59 + 32 = 91 (001011011) +59 + 33 = 92 (001011100) +59 + 34 = 93 (001011101) +59 + 35 = 94 (001011110) +59 + 36 = 95 (001011111) +59 + 37 = 96 (001100000) +59 + 38 = 97 (001100001) +59 + 39 = 98 (001100010) +59 + 40 = 99 (001100011) +59 + 41 = 100 (001100100) +59 + 42 = 101 (001100101) +59 + 43 = 102 (001100110) +59 + 44 = 103 (001100111) +59 + 45 = 104 (001101000) +59 + 46 = 105 (001101001) +59 + 47 = 106 (001101010) +59 + 48 = 107 (001101011) +59 + 49 = 108 (001101100) +59 + 50 = 109 (001101101) +59 + 51 = 110 (001101110) +59 + 52 = 111 (001101111) +59 + 53 = 112 (001110000) +59 + 54 = 113 (001110001) +59 + 55 = 114 (001110010) +59 + 56 = 115 (001110011) +59 + 57 = 116 (001110100) +59 + 58 = 117 (001110101) +59 + 59 = 118 (001110110) +59 + 60 = 119 (001110111) +59 + 61 = 120 (001111000) +59 + 62 = 121 (001111001) +59 + 63 = 122 (001111010) +60 + 0 = 60 (000111100) +60 + 1 = 61 (000111101) +60 + 2 = 62 (000111110) +60 + 3 = 63 (000111111) +60 + 4 = 64 (001000000) +60 + 5 = 65 (001000001) +60 + 6 = 66 (001000010) +60 + 7 = 67 (001000011) +60 + 8 = 68 (001000100) +60 + 9 = 69 (001000101) +60 + 10 = 70 (001000110) +60 + 11 = 71 (001000111) +60 + 12 = 72 (001001000) +60 + 13 = 73 (001001001) +60 + 14 = 74 (001001010) +60 + 15 = 75 (001001011) +60 + 16 = 76 (001001100) +60 + 17 = 77 (001001101) +60 + 18 = 78 (001001110) +60 + 19 = 79 (001001111) +60 + 20 = 80 (001010000) +60 + 21 = 81 (001010001) +60 + 22 = 82 (001010010) +60 + 23 = 83 (001010011) +60 + 24 = 84 (001010100) +60 + 25 = 85 (001010101) +60 + 26 = 86 (001010110) +60 + 27 = 87 (001010111) +60 + 28 = 88 (001011000) +60 + 29 = 89 (001011001) +60 + 30 = 90 (001011010) +60 + 31 = 91 (001011011) +60 + 32 = 92 (001011100) +60 + 33 = 93 (001011101) +60 + 34 = 94 (001011110) +60 + 35 = 95 (001011111) +60 + 36 = 96 (001100000) +60 + 37 = 97 (001100001) +60 + 38 = 98 (001100010) +60 + 39 = 99 (001100011) +60 + 40 = 100 (001100100) +60 + 41 = 101 (001100101) +60 + 42 = 102 (001100110) +60 + 43 = 103 (001100111) +60 + 44 = 104 (001101000) +60 + 45 = 105 (001101001) +60 + 46 = 106 (001101010) +60 + 47 = 107 (001101011) +60 + 48 = 108 (001101100) +60 + 49 = 109 (001101101) +60 + 50 = 110 (001101110) +60 + 51 = 111 (001101111) +60 + 52 = 112 (001110000) +60 + 53 = 113 (001110001) +60 + 54 = 114 (001110010) +60 + 55 = 115 (001110011) +60 + 56 = 116 (001110100) +60 + 57 = 117 (001110101) +60 + 58 = 118 (001110110) +60 + 59 = 119 (001110111) +60 + 60 = 120 (001111000) +60 + 61 = 121 (001111001) +60 + 62 = 122 (001111010) +60 + 63 = 123 (001111011) +61 + 0 = 61 (000111101) +61 + 1 = 62 (000111110) +61 + 2 = 63 (000111111) +61 + 3 = 64 (001000000) +61 + 4 = 65 (001000001) +61 + 5 = 66 (001000010) +61 + 6 = 67 (001000011) +61 + 7 = 68 (001000100) +61 + 8 = 69 (001000101) +61 + 9 = 70 (001000110) +61 + 10 = 71 (001000111) +61 + 11 = 72 (001001000) +61 + 12 = 73 (001001001) +61 + 13 = 74 (001001010) +61 + 14 = 75 (001001011) +61 + 15 = 76 (001001100) +61 + 16 = 77 (001001101) +61 + 17 = 78 (001001110) +61 + 18 = 79 (001001111) +61 + 19 = 80 (001010000) +61 + 20 = 81 (001010001) +61 + 21 = 82 (001010010) +61 + 22 = 83 (001010011) +61 + 23 = 84 (001010100) +61 + 24 = 85 (001010101) +61 + 25 = 86 (001010110) +61 + 26 = 87 (001010111) +61 + 27 = 88 (001011000) +61 + 28 = 89 (001011001) +61 + 29 = 90 (001011010) +61 + 30 = 91 (001011011) +61 + 31 = 92 (001011100) +61 + 32 = 93 (001011101) +61 + 33 = 94 (001011110) +61 + 34 = 95 (001011111) +61 + 35 = 96 (001100000) +61 + 36 = 97 (001100001) +61 + 37 = 98 (001100010) +61 + 38 = 99 (001100011) +61 + 39 = 100 (001100100) +61 + 40 = 101 (001100101) +61 + 41 = 102 (001100110) +61 + 42 = 103 (001100111) +61 + 43 = 104 (001101000) +61 + 44 = 105 (001101001) +61 + 45 = 106 (001101010) +61 + 46 = 107 (001101011) +61 + 47 = 108 (001101100) +61 + 48 = 109 (001101101) +61 + 49 = 110 (001101110) +61 + 50 = 111 (001101111) +61 + 51 = 112 (001110000) +61 + 52 = 113 (001110001) +61 + 53 = 114 (001110010) +61 + 54 = 115 (001110011) +61 + 55 = 116 (001110100) +61 + 56 = 117 (001110101) +61 + 57 = 118 (001110110) +61 + 58 = 119 (001110111) +61 + 59 = 120 (001111000) +61 + 60 = 121 (001111001) +61 + 61 = 122 (001111010) +61 + 62 = 123 (001111011) +61 + 63 = 124 (001111100) +62 + 0 = 62 (000111110) +62 + 1 = 63 (000111111) +62 + 2 = 64 (001000000) +62 + 3 = 65 (001000001) +62 + 4 = 66 (001000010) +62 + 5 = 67 (001000011) +62 + 6 = 68 (001000100) +62 + 7 = 69 (001000101) +62 + 8 = 70 (001000110) +62 + 9 = 71 (001000111) +62 + 10 = 72 (001001000) +62 + 11 = 73 (001001001) +62 + 12 = 74 (001001010) +62 + 13 = 75 (001001011) +62 + 14 = 76 (001001100) +62 + 15 = 77 (001001101) +62 + 16 = 78 (001001110) +62 + 17 = 79 (001001111) +62 + 18 = 80 (001010000) +62 + 19 = 81 (001010001) +62 + 20 = 82 (001010010) +62 + 21 = 83 (001010011) +62 + 22 = 84 (001010100) +62 + 23 = 85 (001010101) +62 + 24 = 86 (001010110) +62 + 25 = 87 (001010111) +62 + 26 = 88 (001011000) +62 + 27 = 89 (001011001) +62 + 28 = 90 (001011010) +62 + 29 = 91 (001011011) +62 + 30 = 92 (001011100) +62 + 31 = 93 (001011101) +62 + 32 = 94 (001011110) +62 + 33 = 95 (001011111) +62 + 34 = 96 (001100000) +62 + 35 = 97 (001100001) +62 + 36 = 98 (001100010) +62 + 37 = 99 (001100011) +62 + 38 = 100 (001100100) +62 + 39 = 101 (001100101) +62 + 40 = 102 (001100110) +62 + 41 = 103 (001100111) +62 + 42 = 104 (001101000) +62 + 43 = 105 (001101001) +62 + 44 = 106 (001101010) +62 + 45 = 107 (001101011) +62 + 46 = 108 (001101100) +62 + 47 = 109 (001101101) +62 + 48 = 110 (001101110) +62 + 49 = 111 (001101111) +62 + 50 = 112 (001110000) +62 + 51 = 113 (001110001) +62 + 52 = 114 (001110010) +62 + 53 = 115 (001110011) +62 + 54 = 116 (001110100) +62 + 55 = 117 (001110101) +62 + 56 = 118 (001110110) +62 + 57 = 119 (001110111) +62 + 58 = 120 (001111000) +62 + 59 = 121 (001111001) +62 + 60 = 122 (001111010) +62 + 61 = 123 (001111011) +62 + 62 = 124 (001111100) +62 + 63 = 125 (001111101) +63 + 0 = 63 (000111111) +63 + 1 = 64 (001000000) +63 + 2 = 65 (001000001) +63 + 3 = 66 (001000010) +63 + 4 = 67 (001000011) +63 + 5 = 68 (001000100) +63 + 6 = 69 (001000101) +63 + 7 = 70 (001000110) +63 + 8 = 71 (001000111) +63 + 9 = 72 (001001000) +63 + 10 = 73 (001001001) +63 + 11 = 74 (001001010) +63 + 12 = 75 (001001011) +63 + 13 = 76 (001001100) +63 + 14 = 77 (001001101) +63 + 15 = 78 (001001110) +63 + 16 = 79 (001001111) +63 + 17 = 80 (001010000) +63 + 18 = 81 (001010001) +63 + 19 = 82 (001010010) +63 + 20 = 83 (001010011) +63 + 21 = 84 (001010100) +63 + 22 = 85 (001010101) +63 + 23 = 86 (001010110) +63 + 24 = 87 (001010111) +63 + 25 = 88 (001011000) +63 + 26 = 89 (001011001) +63 + 27 = 90 (001011010) +63 + 28 = 91 (001011011) +63 + 29 = 92 (001011100) +63 + 30 = 93 (001011101) +63 + 31 = 94 (001011110) +63 + 32 = 95 (001011111) +63 + 33 = 96 (001100000) +63 + 34 = 97 (001100001) +63 + 35 = 98 (001100010) +63 + 36 = 99 (001100011) +63 + 37 = 100 (001100100) +63 + 38 = 101 (001100101) +63 + 39 = 102 (001100110) +63 + 40 = 103 (001100111) +63 + 41 = 104 (001101000) +63 + 42 = 105 (001101001) +63 + 43 = 106 (001101010) +63 + 44 = 107 (001101011) +63 + 45 = 108 (001101100) +63 + 46 = 109 (001101101) +63 + 47 = 110 (001101110) +63 + 48 = 111 (001101111) +63 + 49 = 112 (001110000) +63 + 50 = 113 (001110001) +63 + 51 = 114 (001110010) +63 + 52 = 115 (001110011) +63 + 53 = 116 (001110100) +63 + 54 = 117 (001110101) +63 + 55 = 118 (001110110) +63 + 56 = 119 (001110111) +63 + 57 = 120 (001111000) +63 + 58 = 121 (001111001) +63 + 59 = 122 (001111010) +63 + 60 = 123 (001111011) +63 + 61 = 124 (001111100) +63 + 62 = 125 (001111101) +63 + 63 = 126 (001111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/main.cpp new file mode 100644 index 000000000..a11cb268c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 9-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 9; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector9 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/stimgen.h new file mode 100644 index 000000000..3988984dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/extension/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector9& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector9& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/common.h new file mode 100644 index 000000000..64a0e627c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/datawidth.cpp new file mode 100644 index 000000000..f5df52dd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_unsigned tmp_a (in1_width); + sc_unsigned tmp_b (in2_width); + sc_unsigned tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/datawidth.h new file mode 100644 index 000000000..a8aaf9061 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& in1; + const signal_bool_vector& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& IN1, + const signal_bool_vector& IN2, + const sc_signal& READY, + signal_bool_vector& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/golden/lost_carry.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/golden/lost_carry.log new file mode 100644 index 000000000..32a6933bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/golden/lost_carry.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) +16 + 0 = 16 (010000) +16 + 1 = 17 (010001) +16 + 2 = 18 (010010) +16 + 3 = 19 (010011) +16 + 4 = 20 (010100) +16 + 5 = 21 (010101) +16 + 6 = 22 (010110) +16 + 7 = 23 (010111) +16 + 8 = 24 (011000) +16 + 9 = 25 (011001) +16 + 10 = 26 (011010) +16 + 11 = 27 (011011) +16 + 12 = 28 (011100) +16 + 13 = 29 (011101) +16 + 14 = 30 (011110) +16 + 15 = 31 (011111) +16 + 16 = 32 (100000) +16 + 17 = 33 (100001) +16 + 18 = 34 (100010) +16 + 19 = 35 (100011) +16 + 20 = 36 (100100) +16 + 21 = 37 (100101) +16 + 22 = 38 (100110) +16 + 23 = 39 (100111) +16 + 24 = 40 (101000) +16 + 25 = 41 (101001) +16 + 26 = 42 (101010) +16 + 27 = 43 (101011) +16 + 28 = 44 (101100) +16 + 29 = 45 (101101) +16 + 30 = 46 (101110) +16 + 31 = 47 (101111) +16 + 32 = 48 (110000) +16 + 33 = 49 (110001) +16 + 34 = 50 (110010) +16 + 35 = 51 (110011) +16 + 36 = 52 (110100) +16 + 37 = 53 (110101) +16 + 38 = 54 (110110) +16 + 39 = 55 (110111) +16 + 40 = 56 (111000) +16 + 41 = 57 (111001) +16 + 42 = 58 (111010) +16 + 43 = 59 (111011) +16 + 44 = 60 (111100) +16 + 45 = 61 (111101) +16 + 46 = 62 (111110) +16 + 47 = 63 (111111) +16 + 48 = 0 (000000) +16 + 49 = 1 (000001) +16 + 50 = 2 (000010) +16 + 51 = 3 (000011) +16 + 52 = 4 (000100) +16 + 53 = 5 (000101) +16 + 54 = 6 (000110) +16 + 55 = 7 (000111) +16 + 56 = 8 (001000) +16 + 57 = 9 (001001) +16 + 58 = 10 (001010) +16 + 59 = 11 (001011) +16 + 60 = 12 (001100) +16 + 61 = 13 (001101) +16 + 62 = 14 (001110) +16 + 63 = 15 (001111) +17 + 0 = 17 (010001) +17 + 1 = 18 (010010) +17 + 2 = 19 (010011) +17 + 3 = 20 (010100) +17 + 4 = 21 (010101) +17 + 5 = 22 (010110) +17 + 6 = 23 (010111) +17 + 7 = 24 (011000) +17 + 8 = 25 (011001) +17 + 9 = 26 (011010) +17 + 10 = 27 (011011) +17 + 11 = 28 (011100) +17 + 12 = 29 (011101) +17 + 13 = 30 (011110) +17 + 14 = 31 (011111) +17 + 15 = 32 (100000) +17 + 16 = 33 (100001) +17 + 17 = 34 (100010) +17 + 18 = 35 (100011) +17 + 19 = 36 (100100) +17 + 20 = 37 (100101) +17 + 21 = 38 (100110) +17 + 22 = 39 (100111) +17 + 23 = 40 (101000) +17 + 24 = 41 (101001) +17 + 25 = 42 (101010) +17 + 26 = 43 (101011) +17 + 27 = 44 (101100) +17 + 28 = 45 (101101) +17 + 29 = 46 (101110) +17 + 30 = 47 (101111) +17 + 31 = 48 (110000) +17 + 32 = 49 (110001) +17 + 33 = 50 (110010) +17 + 34 = 51 (110011) +17 + 35 = 52 (110100) +17 + 36 = 53 (110101) +17 + 37 = 54 (110110) +17 + 38 = 55 (110111) +17 + 39 = 56 (111000) +17 + 40 = 57 (111001) +17 + 41 = 58 (111010) +17 + 42 = 59 (111011) +17 + 43 = 60 (111100) +17 + 44 = 61 (111101) +17 + 45 = 62 (111110) +17 + 46 = 63 (111111) +17 + 47 = 0 (000000) +17 + 48 = 1 (000001) +17 + 49 = 2 (000010) +17 + 50 = 3 (000011) +17 + 51 = 4 (000100) +17 + 52 = 5 (000101) +17 + 53 = 6 (000110) +17 + 54 = 7 (000111) +17 + 55 = 8 (001000) +17 + 56 = 9 (001001) +17 + 57 = 10 (001010) +17 + 58 = 11 (001011) +17 + 59 = 12 (001100) +17 + 60 = 13 (001101) +17 + 61 = 14 (001110) +17 + 62 = 15 (001111) +17 + 63 = 16 (010000) +18 + 0 = 18 (010010) +18 + 1 = 19 (010011) +18 + 2 = 20 (010100) +18 + 3 = 21 (010101) +18 + 4 = 22 (010110) +18 + 5 = 23 (010111) +18 + 6 = 24 (011000) +18 + 7 = 25 (011001) +18 + 8 = 26 (011010) +18 + 9 = 27 (011011) +18 + 10 = 28 (011100) +18 + 11 = 29 (011101) +18 + 12 = 30 (011110) +18 + 13 = 31 (011111) +18 + 14 = 32 (100000) +18 + 15 = 33 (100001) +18 + 16 = 34 (100010) +18 + 17 = 35 (100011) +18 + 18 = 36 (100100) +18 + 19 = 37 (100101) +18 + 20 = 38 (100110) +18 + 21 = 39 (100111) +18 + 22 = 40 (101000) +18 + 23 = 41 (101001) +18 + 24 = 42 (101010) +18 + 25 = 43 (101011) +18 + 26 = 44 (101100) +18 + 27 = 45 (101101) +18 + 28 = 46 (101110) +18 + 29 = 47 (101111) +18 + 30 = 48 (110000) +18 + 31 = 49 (110001) +18 + 32 = 50 (110010) +18 + 33 = 51 (110011) +18 + 34 = 52 (110100) +18 + 35 = 53 (110101) +18 + 36 = 54 (110110) +18 + 37 = 55 (110111) +18 + 38 = 56 (111000) +18 + 39 = 57 (111001) +18 + 40 = 58 (111010) +18 + 41 = 59 (111011) +18 + 42 = 60 (111100) +18 + 43 = 61 (111101) +18 + 44 = 62 (111110) +18 + 45 = 63 (111111) +18 + 46 = 0 (000000) +18 + 47 = 1 (000001) +18 + 48 = 2 (000010) +18 + 49 = 3 (000011) +18 + 50 = 4 (000100) +18 + 51 = 5 (000101) +18 + 52 = 6 (000110) +18 + 53 = 7 (000111) +18 + 54 = 8 (001000) +18 + 55 = 9 (001001) +18 + 56 = 10 (001010) +18 + 57 = 11 (001011) +18 + 58 = 12 (001100) +18 + 59 = 13 (001101) +18 + 60 = 14 (001110) +18 + 61 = 15 (001111) +18 + 62 = 16 (010000) +18 + 63 = 17 (010001) +19 + 0 = 19 (010011) +19 + 1 = 20 (010100) +19 + 2 = 21 (010101) +19 + 3 = 22 (010110) +19 + 4 = 23 (010111) +19 + 5 = 24 (011000) +19 + 6 = 25 (011001) +19 + 7 = 26 (011010) +19 + 8 = 27 (011011) +19 + 9 = 28 (011100) +19 + 10 = 29 (011101) +19 + 11 = 30 (011110) +19 + 12 = 31 (011111) +19 + 13 = 32 (100000) +19 + 14 = 33 (100001) +19 + 15 = 34 (100010) +19 + 16 = 35 (100011) +19 + 17 = 36 (100100) +19 + 18 = 37 (100101) +19 + 19 = 38 (100110) +19 + 20 = 39 (100111) +19 + 21 = 40 (101000) +19 + 22 = 41 (101001) +19 + 23 = 42 (101010) +19 + 24 = 43 (101011) +19 + 25 = 44 (101100) +19 + 26 = 45 (101101) +19 + 27 = 46 (101110) +19 + 28 = 47 (101111) +19 + 29 = 48 (110000) +19 + 30 = 49 (110001) +19 + 31 = 50 (110010) +19 + 32 = 51 (110011) +19 + 33 = 52 (110100) +19 + 34 = 53 (110101) +19 + 35 = 54 (110110) +19 + 36 = 55 (110111) +19 + 37 = 56 (111000) +19 + 38 = 57 (111001) +19 + 39 = 58 (111010) +19 + 40 = 59 (111011) +19 + 41 = 60 (111100) +19 + 42 = 61 (111101) +19 + 43 = 62 (111110) +19 + 44 = 63 (111111) +19 + 45 = 0 (000000) +19 + 46 = 1 (000001) +19 + 47 = 2 (000010) +19 + 48 = 3 (000011) +19 + 49 = 4 (000100) +19 + 50 = 5 (000101) +19 + 51 = 6 (000110) +19 + 52 = 7 (000111) +19 + 53 = 8 (001000) +19 + 54 = 9 (001001) +19 + 55 = 10 (001010) +19 + 56 = 11 (001011) +19 + 57 = 12 (001100) +19 + 58 = 13 (001101) +19 + 59 = 14 (001110) +19 + 60 = 15 (001111) +19 + 61 = 16 (010000) +19 + 62 = 17 (010001) +19 + 63 = 18 (010010) +20 + 0 = 20 (010100) +20 + 1 = 21 (010101) +20 + 2 = 22 (010110) +20 + 3 = 23 (010111) +20 + 4 = 24 (011000) +20 + 5 = 25 (011001) +20 + 6 = 26 (011010) +20 + 7 = 27 (011011) +20 + 8 = 28 (011100) +20 + 9 = 29 (011101) +20 + 10 = 30 (011110) +20 + 11 = 31 (011111) +20 + 12 = 32 (100000) +20 + 13 = 33 (100001) +20 + 14 = 34 (100010) +20 + 15 = 35 (100011) +20 + 16 = 36 (100100) +20 + 17 = 37 (100101) +20 + 18 = 38 (100110) +20 + 19 = 39 (100111) +20 + 20 = 40 (101000) +20 + 21 = 41 (101001) +20 + 22 = 42 (101010) +20 + 23 = 43 (101011) +20 + 24 = 44 (101100) +20 + 25 = 45 (101101) +20 + 26 = 46 (101110) +20 + 27 = 47 (101111) +20 + 28 = 48 (110000) +20 + 29 = 49 (110001) +20 + 30 = 50 (110010) +20 + 31 = 51 (110011) +20 + 32 = 52 (110100) +20 + 33 = 53 (110101) +20 + 34 = 54 (110110) +20 + 35 = 55 (110111) +20 + 36 = 56 (111000) +20 + 37 = 57 (111001) +20 + 38 = 58 (111010) +20 + 39 = 59 (111011) +20 + 40 = 60 (111100) +20 + 41 = 61 (111101) +20 + 42 = 62 (111110) +20 + 43 = 63 (111111) +20 + 44 = 0 (000000) +20 + 45 = 1 (000001) +20 + 46 = 2 (000010) +20 + 47 = 3 (000011) +20 + 48 = 4 (000100) +20 + 49 = 5 (000101) +20 + 50 = 6 (000110) +20 + 51 = 7 (000111) +20 + 52 = 8 (001000) +20 + 53 = 9 (001001) +20 + 54 = 10 (001010) +20 + 55 = 11 (001011) +20 + 56 = 12 (001100) +20 + 57 = 13 (001101) +20 + 58 = 14 (001110) +20 + 59 = 15 (001111) +20 + 60 = 16 (010000) +20 + 61 = 17 (010001) +20 + 62 = 18 (010010) +20 + 63 = 19 (010011) +21 + 0 = 21 (010101) +21 + 1 = 22 (010110) +21 + 2 = 23 (010111) +21 + 3 = 24 (011000) +21 + 4 = 25 (011001) +21 + 5 = 26 (011010) +21 + 6 = 27 (011011) +21 + 7 = 28 (011100) +21 + 8 = 29 (011101) +21 + 9 = 30 (011110) +21 + 10 = 31 (011111) +21 + 11 = 32 (100000) +21 + 12 = 33 (100001) +21 + 13 = 34 (100010) +21 + 14 = 35 (100011) +21 + 15 = 36 (100100) +21 + 16 = 37 (100101) +21 + 17 = 38 (100110) +21 + 18 = 39 (100111) +21 + 19 = 40 (101000) +21 + 20 = 41 (101001) +21 + 21 = 42 (101010) +21 + 22 = 43 (101011) +21 + 23 = 44 (101100) +21 + 24 = 45 (101101) +21 + 25 = 46 (101110) +21 + 26 = 47 (101111) +21 + 27 = 48 (110000) +21 + 28 = 49 (110001) +21 + 29 = 50 (110010) +21 + 30 = 51 (110011) +21 + 31 = 52 (110100) +21 + 32 = 53 (110101) +21 + 33 = 54 (110110) +21 + 34 = 55 (110111) +21 + 35 = 56 (111000) +21 + 36 = 57 (111001) +21 + 37 = 58 (111010) +21 + 38 = 59 (111011) +21 + 39 = 60 (111100) +21 + 40 = 61 (111101) +21 + 41 = 62 (111110) +21 + 42 = 63 (111111) +21 + 43 = 0 (000000) +21 + 44 = 1 (000001) +21 + 45 = 2 (000010) +21 + 46 = 3 (000011) +21 + 47 = 4 (000100) +21 + 48 = 5 (000101) +21 + 49 = 6 (000110) +21 + 50 = 7 (000111) +21 + 51 = 8 (001000) +21 + 52 = 9 (001001) +21 + 53 = 10 (001010) +21 + 54 = 11 (001011) +21 + 55 = 12 (001100) +21 + 56 = 13 (001101) +21 + 57 = 14 (001110) +21 + 58 = 15 (001111) +21 + 59 = 16 (010000) +21 + 60 = 17 (010001) +21 + 61 = 18 (010010) +21 + 62 = 19 (010011) +21 + 63 = 20 (010100) +22 + 0 = 22 (010110) +22 + 1 = 23 (010111) +22 + 2 = 24 (011000) +22 + 3 = 25 (011001) +22 + 4 = 26 (011010) +22 + 5 = 27 (011011) +22 + 6 = 28 (011100) +22 + 7 = 29 (011101) +22 + 8 = 30 (011110) +22 + 9 = 31 (011111) +22 + 10 = 32 (100000) +22 + 11 = 33 (100001) +22 + 12 = 34 (100010) +22 + 13 = 35 (100011) +22 + 14 = 36 (100100) +22 + 15 = 37 (100101) +22 + 16 = 38 (100110) +22 + 17 = 39 (100111) +22 + 18 = 40 (101000) +22 + 19 = 41 (101001) +22 + 20 = 42 (101010) +22 + 21 = 43 (101011) +22 + 22 = 44 (101100) +22 + 23 = 45 (101101) +22 + 24 = 46 (101110) +22 + 25 = 47 (101111) +22 + 26 = 48 (110000) +22 + 27 = 49 (110001) +22 + 28 = 50 (110010) +22 + 29 = 51 (110011) +22 + 30 = 52 (110100) +22 + 31 = 53 (110101) +22 + 32 = 54 (110110) +22 + 33 = 55 (110111) +22 + 34 = 56 (111000) +22 + 35 = 57 (111001) +22 + 36 = 58 (111010) +22 + 37 = 59 (111011) +22 + 38 = 60 (111100) +22 + 39 = 61 (111101) +22 + 40 = 62 (111110) +22 + 41 = 63 (111111) +22 + 42 = 0 (000000) +22 + 43 = 1 (000001) +22 + 44 = 2 (000010) +22 + 45 = 3 (000011) +22 + 46 = 4 (000100) +22 + 47 = 5 (000101) +22 + 48 = 6 (000110) +22 + 49 = 7 (000111) +22 + 50 = 8 (001000) +22 + 51 = 9 (001001) +22 + 52 = 10 (001010) +22 + 53 = 11 (001011) +22 + 54 = 12 (001100) +22 + 55 = 13 (001101) +22 + 56 = 14 (001110) +22 + 57 = 15 (001111) +22 + 58 = 16 (010000) +22 + 59 = 17 (010001) +22 + 60 = 18 (010010) +22 + 61 = 19 (010011) +22 + 62 = 20 (010100) +22 + 63 = 21 (010101) +23 + 0 = 23 (010111) +23 + 1 = 24 (011000) +23 + 2 = 25 (011001) +23 + 3 = 26 (011010) +23 + 4 = 27 (011011) +23 + 5 = 28 (011100) +23 + 6 = 29 (011101) +23 + 7 = 30 (011110) +23 + 8 = 31 (011111) +23 + 9 = 32 (100000) +23 + 10 = 33 (100001) +23 + 11 = 34 (100010) +23 + 12 = 35 (100011) +23 + 13 = 36 (100100) +23 + 14 = 37 (100101) +23 + 15 = 38 (100110) +23 + 16 = 39 (100111) +23 + 17 = 40 (101000) +23 + 18 = 41 (101001) +23 + 19 = 42 (101010) +23 + 20 = 43 (101011) +23 + 21 = 44 (101100) +23 + 22 = 45 (101101) +23 + 23 = 46 (101110) +23 + 24 = 47 (101111) +23 + 25 = 48 (110000) +23 + 26 = 49 (110001) +23 + 27 = 50 (110010) +23 + 28 = 51 (110011) +23 + 29 = 52 (110100) +23 + 30 = 53 (110101) +23 + 31 = 54 (110110) +23 + 32 = 55 (110111) +23 + 33 = 56 (111000) +23 + 34 = 57 (111001) +23 + 35 = 58 (111010) +23 + 36 = 59 (111011) +23 + 37 = 60 (111100) +23 + 38 = 61 (111101) +23 + 39 = 62 (111110) +23 + 40 = 63 (111111) +23 + 41 = 0 (000000) +23 + 42 = 1 (000001) +23 + 43 = 2 (000010) +23 + 44 = 3 (000011) +23 + 45 = 4 (000100) +23 + 46 = 5 (000101) +23 + 47 = 6 (000110) +23 + 48 = 7 (000111) +23 + 49 = 8 (001000) +23 + 50 = 9 (001001) +23 + 51 = 10 (001010) +23 + 52 = 11 (001011) +23 + 53 = 12 (001100) +23 + 54 = 13 (001101) +23 + 55 = 14 (001110) +23 + 56 = 15 (001111) +23 + 57 = 16 (010000) +23 + 58 = 17 (010001) +23 + 59 = 18 (010010) +23 + 60 = 19 (010011) +23 + 61 = 20 (010100) +23 + 62 = 21 (010101) +23 + 63 = 22 (010110) +24 + 0 = 24 (011000) +24 + 1 = 25 (011001) +24 + 2 = 26 (011010) +24 + 3 = 27 (011011) +24 + 4 = 28 (011100) +24 + 5 = 29 (011101) +24 + 6 = 30 (011110) +24 + 7 = 31 (011111) +24 + 8 = 32 (100000) +24 + 9 = 33 (100001) +24 + 10 = 34 (100010) +24 + 11 = 35 (100011) +24 + 12 = 36 (100100) +24 + 13 = 37 (100101) +24 + 14 = 38 (100110) +24 + 15 = 39 (100111) +24 + 16 = 40 (101000) +24 + 17 = 41 (101001) +24 + 18 = 42 (101010) +24 + 19 = 43 (101011) +24 + 20 = 44 (101100) +24 + 21 = 45 (101101) +24 + 22 = 46 (101110) +24 + 23 = 47 (101111) +24 + 24 = 48 (110000) +24 + 25 = 49 (110001) +24 + 26 = 50 (110010) +24 + 27 = 51 (110011) +24 + 28 = 52 (110100) +24 + 29 = 53 (110101) +24 + 30 = 54 (110110) +24 + 31 = 55 (110111) +24 + 32 = 56 (111000) +24 + 33 = 57 (111001) +24 + 34 = 58 (111010) +24 + 35 = 59 (111011) +24 + 36 = 60 (111100) +24 + 37 = 61 (111101) +24 + 38 = 62 (111110) +24 + 39 = 63 (111111) +24 + 40 = 0 (000000) +24 + 41 = 1 (000001) +24 + 42 = 2 (000010) +24 + 43 = 3 (000011) +24 + 44 = 4 (000100) +24 + 45 = 5 (000101) +24 + 46 = 6 (000110) +24 + 47 = 7 (000111) +24 + 48 = 8 (001000) +24 + 49 = 9 (001001) +24 + 50 = 10 (001010) +24 + 51 = 11 (001011) +24 + 52 = 12 (001100) +24 + 53 = 13 (001101) +24 + 54 = 14 (001110) +24 + 55 = 15 (001111) +24 + 56 = 16 (010000) +24 + 57 = 17 (010001) +24 + 58 = 18 (010010) +24 + 59 = 19 (010011) +24 + 60 = 20 (010100) +24 + 61 = 21 (010101) +24 + 62 = 22 (010110) +24 + 63 = 23 (010111) +25 + 0 = 25 (011001) +25 + 1 = 26 (011010) +25 + 2 = 27 (011011) +25 + 3 = 28 (011100) +25 + 4 = 29 (011101) +25 + 5 = 30 (011110) +25 + 6 = 31 (011111) +25 + 7 = 32 (100000) +25 + 8 = 33 (100001) +25 + 9 = 34 (100010) +25 + 10 = 35 (100011) +25 + 11 = 36 (100100) +25 + 12 = 37 (100101) +25 + 13 = 38 (100110) +25 + 14 = 39 (100111) +25 + 15 = 40 (101000) +25 + 16 = 41 (101001) +25 + 17 = 42 (101010) +25 + 18 = 43 (101011) +25 + 19 = 44 (101100) +25 + 20 = 45 (101101) +25 + 21 = 46 (101110) +25 + 22 = 47 (101111) +25 + 23 = 48 (110000) +25 + 24 = 49 (110001) +25 + 25 = 50 (110010) +25 + 26 = 51 (110011) +25 + 27 = 52 (110100) +25 + 28 = 53 (110101) +25 + 29 = 54 (110110) +25 + 30 = 55 (110111) +25 + 31 = 56 (111000) +25 + 32 = 57 (111001) +25 + 33 = 58 (111010) +25 + 34 = 59 (111011) +25 + 35 = 60 (111100) +25 + 36 = 61 (111101) +25 + 37 = 62 (111110) +25 + 38 = 63 (111111) +25 + 39 = 0 (000000) +25 + 40 = 1 (000001) +25 + 41 = 2 (000010) +25 + 42 = 3 (000011) +25 + 43 = 4 (000100) +25 + 44 = 5 (000101) +25 + 45 = 6 (000110) +25 + 46 = 7 (000111) +25 + 47 = 8 (001000) +25 + 48 = 9 (001001) +25 + 49 = 10 (001010) +25 + 50 = 11 (001011) +25 + 51 = 12 (001100) +25 + 52 = 13 (001101) +25 + 53 = 14 (001110) +25 + 54 = 15 (001111) +25 + 55 = 16 (010000) +25 + 56 = 17 (010001) +25 + 57 = 18 (010010) +25 + 58 = 19 (010011) +25 + 59 = 20 (010100) +25 + 60 = 21 (010101) +25 + 61 = 22 (010110) +25 + 62 = 23 (010111) +25 + 63 = 24 (011000) +26 + 0 = 26 (011010) +26 + 1 = 27 (011011) +26 + 2 = 28 (011100) +26 + 3 = 29 (011101) +26 + 4 = 30 (011110) +26 + 5 = 31 (011111) +26 + 6 = 32 (100000) +26 + 7 = 33 (100001) +26 + 8 = 34 (100010) +26 + 9 = 35 (100011) +26 + 10 = 36 (100100) +26 + 11 = 37 (100101) +26 + 12 = 38 (100110) +26 + 13 = 39 (100111) +26 + 14 = 40 (101000) +26 + 15 = 41 (101001) +26 + 16 = 42 (101010) +26 + 17 = 43 (101011) +26 + 18 = 44 (101100) +26 + 19 = 45 (101101) +26 + 20 = 46 (101110) +26 + 21 = 47 (101111) +26 + 22 = 48 (110000) +26 + 23 = 49 (110001) +26 + 24 = 50 (110010) +26 + 25 = 51 (110011) +26 + 26 = 52 (110100) +26 + 27 = 53 (110101) +26 + 28 = 54 (110110) +26 + 29 = 55 (110111) +26 + 30 = 56 (111000) +26 + 31 = 57 (111001) +26 + 32 = 58 (111010) +26 + 33 = 59 (111011) +26 + 34 = 60 (111100) +26 + 35 = 61 (111101) +26 + 36 = 62 (111110) +26 + 37 = 63 (111111) +26 + 38 = 0 (000000) +26 + 39 = 1 (000001) +26 + 40 = 2 (000010) +26 + 41 = 3 (000011) +26 + 42 = 4 (000100) +26 + 43 = 5 (000101) +26 + 44 = 6 (000110) +26 + 45 = 7 (000111) +26 + 46 = 8 (001000) +26 + 47 = 9 (001001) +26 + 48 = 10 (001010) +26 + 49 = 11 (001011) +26 + 50 = 12 (001100) +26 + 51 = 13 (001101) +26 + 52 = 14 (001110) +26 + 53 = 15 (001111) +26 + 54 = 16 (010000) +26 + 55 = 17 (010001) +26 + 56 = 18 (010010) +26 + 57 = 19 (010011) +26 + 58 = 20 (010100) +26 + 59 = 21 (010101) +26 + 60 = 22 (010110) +26 + 61 = 23 (010111) +26 + 62 = 24 (011000) +26 + 63 = 25 (011001) +27 + 0 = 27 (011011) +27 + 1 = 28 (011100) +27 + 2 = 29 (011101) +27 + 3 = 30 (011110) +27 + 4 = 31 (011111) +27 + 5 = 32 (100000) +27 + 6 = 33 (100001) +27 + 7 = 34 (100010) +27 + 8 = 35 (100011) +27 + 9 = 36 (100100) +27 + 10 = 37 (100101) +27 + 11 = 38 (100110) +27 + 12 = 39 (100111) +27 + 13 = 40 (101000) +27 + 14 = 41 (101001) +27 + 15 = 42 (101010) +27 + 16 = 43 (101011) +27 + 17 = 44 (101100) +27 + 18 = 45 (101101) +27 + 19 = 46 (101110) +27 + 20 = 47 (101111) +27 + 21 = 48 (110000) +27 + 22 = 49 (110001) +27 + 23 = 50 (110010) +27 + 24 = 51 (110011) +27 + 25 = 52 (110100) +27 + 26 = 53 (110101) +27 + 27 = 54 (110110) +27 + 28 = 55 (110111) +27 + 29 = 56 (111000) +27 + 30 = 57 (111001) +27 + 31 = 58 (111010) +27 + 32 = 59 (111011) +27 + 33 = 60 (111100) +27 + 34 = 61 (111101) +27 + 35 = 62 (111110) +27 + 36 = 63 (111111) +27 + 37 = 0 (000000) +27 + 38 = 1 (000001) +27 + 39 = 2 (000010) +27 + 40 = 3 (000011) +27 + 41 = 4 (000100) +27 + 42 = 5 (000101) +27 + 43 = 6 (000110) +27 + 44 = 7 (000111) +27 + 45 = 8 (001000) +27 + 46 = 9 (001001) +27 + 47 = 10 (001010) +27 + 48 = 11 (001011) +27 + 49 = 12 (001100) +27 + 50 = 13 (001101) +27 + 51 = 14 (001110) +27 + 52 = 15 (001111) +27 + 53 = 16 (010000) +27 + 54 = 17 (010001) +27 + 55 = 18 (010010) +27 + 56 = 19 (010011) +27 + 57 = 20 (010100) +27 + 58 = 21 (010101) +27 + 59 = 22 (010110) +27 + 60 = 23 (010111) +27 + 61 = 24 (011000) +27 + 62 = 25 (011001) +27 + 63 = 26 (011010) +28 + 0 = 28 (011100) +28 + 1 = 29 (011101) +28 + 2 = 30 (011110) +28 + 3 = 31 (011111) +28 + 4 = 32 (100000) +28 + 5 = 33 (100001) +28 + 6 = 34 (100010) +28 + 7 = 35 (100011) +28 + 8 = 36 (100100) +28 + 9 = 37 (100101) +28 + 10 = 38 (100110) +28 + 11 = 39 (100111) +28 + 12 = 40 (101000) +28 + 13 = 41 (101001) +28 + 14 = 42 (101010) +28 + 15 = 43 (101011) +28 + 16 = 44 (101100) +28 + 17 = 45 (101101) +28 + 18 = 46 (101110) +28 + 19 = 47 (101111) +28 + 20 = 48 (110000) +28 + 21 = 49 (110001) +28 + 22 = 50 (110010) +28 + 23 = 51 (110011) +28 + 24 = 52 (110100) +28 + 25 = 53 (110101) +28 + 26 = 54 (110110) +28 + 27 = 55 (110111) +28 + 28 = 56 (111000) +28 + 29 = 57 (111001) +28 + 30 = 58 (111010) +28 + 31 = 59 (111011) +28 + 32 = 60 (111100) +28 + 33 = 61 (111101) +28 + 34 = 62 (111110) +28 + 35 = 63 (111111) +28 + 36 = 0 (000000) +28 + 37 = 1 (000001) +28 + 38 = 2 (000010) +28 + 39 = 3 (000011) +28 + 40 = 4 (000100) +28 + 41 = 5 (000101) +28 + 42 = 6 (000110) +28 + 43 = 7 (000111) +28 + 44 = 8 (001000) +28 + 45 = 9 (001001) +28 + 46 = 10 (001010) +28 + 47 = 11 (001011) +28 + 48 = 12 (001100) +28 + 49 = 13 (001101) +28 + 50 = 14 (001110) +28 + 51 = 15 (001111) +28 + 52 = 16 (010000) +28 + 53 = 17 (010001) +28 + 54 = 18 (010010) +28 + 55 = 19 (010011) +28 + 56 = 20 (010100) +28 + 57 = 21 (010101) +28 + 58 = 22 (010110) +28 + 59 = 23 (010111) +28 + 60 = 24 (011000) +28 + 61 = 25 (011001) +28 + 62 = 26 (011010) +28 + 63 = 27 (011011) +29 + 0 = 29 (011101) +29 + 1 = 30 (011110) +29 + 2 = 31 (011111) +29 + 3 = 32 (100000) +29 + 4 = 33 (100001) +29 + 5 = 34 (100010) +29 + 6 = 35 (100011) +29 + 7 = 36 (100100) +29 + 8 = 37 (100101) +29 + 9 = 38 (100110) +29 + 10 = 39 (100111) +29 + 11 = 40 (101000) +29 + 12 = 41 (101001) +29 + 13 = 42 (101010) +29 + 14 = 43 (101011) +29 + 15 = 44 (101100) +29 + 16 = 45 (101101) +29 + 17 = 46 (101110) +29 + 18 = 47 (101111) +29 + 19 = 48 (110000) +29 + 20 = 49 (110001) +29 + 21 = 50 (110010) +29 + 22 = 51 (110011) +29 + 23 = 52 (110100) +29 + 24 = 53 (110101) +29 + 25 = 54 (110110) +29 + 26 = 55 (110111) +29 + 27 = 56 (111000) +29 + 28 = 57 (111001) +29 + 29 = 58 (111010) +29 + 30 = 59 (111011) +29 + 31 = 60 (111100) +29 + 32 = 61 (111101) +29 + 33 = 62 (111110) +29 + 34 = 63 (111111) +29 + 35 = 0 (000000) +29 + 36 = 1 (000001) +29 + 37 = 2 (000010) +29 + 38 = 3 (000011) +29 + 39 = 4 (000100) +29 + 40 = 5 (000101) +29 + 41 = 6 (000110) +29 + 42 = 7 (000111) +29 + 43 = 8 (001000) +29 + 44 = 9 (001001) +29 + 45 = 10 (001010) +29 + 46 = 11 (001011) +29 + 47 = 12 (001100) +29 + 48 = 13 (001101) +29 + 49 = 14 (001110) +29 + 50 = 15 (001111) +29 + 51 = 16 (010000) +29 + 52 = 17 (010001) +29 + 53 = 18 (010010) +29 + 54 = 19 (010011) +29 + 55 = 20 (010100) +29 + 56 = 21 (010101) +29 + 57 = 22 (010110) +29 + 58 = 23 (010111) +29 + 59 = 24 (011000) +29 + 60 = 25 (011001) +29 + 61 = 26 (011010) +29 + 62 = 27 (011011) +29 + 63 = 28 (011100) +30 + 0 = 30 (011110) +30 + 1 = 31 (011111) +30 + 2 = 32 (100000) +30 + 3 = 33 (100001) +30 + 4 = 34 (100010) +30 + 5 = 35 (100011) +30 + 6 = 36 (100100) +30 + 7 = 37 (100101) +30 + 8 = 38 (100110) +30 + 9 = 39 (100111) +30 + 10 = 40 (101000) +30 + 11 = 41 (101001) +30 + 12 = 42 (101010) +30 + 13 = 43 (101011) +30 + 14 = 44 (101100) +30 + 15 = 45 (101101) +30 + 16 = 46 (101110) +30 + 17 = 47 (101111) +30 + 18 = 48 (110000) +30 + 19 = 49 (110001) +30 + 20 = 50 (110010) +30 + 21 = 51 (110011) +30 + 22 = 52 (110100) +30 + 23 = 53 (110101) +30 + 24 = 54 (110110) +30 + 25 = 55 (110111) +30 + 26 = 56 (111000) +30 + 27 = 57 (111001) +30 + 28 = 58 (111010) +30 + 29 = 59 (111011) +30 + 30 = 60 (111100) +30 + 31 = 61 (111101) +30 + 32 = 62 (111110) +30 + 33 = 63 (111111) +30 + 34 = 0 (000000) +30 + 35 = 1 (000001) +30 + 36 = 2 (000010) +30 + 37 = 3 (000011) +30 + 38 = 4 (000100) +30 + 39 = 5 (000101) +30 + 40 = 6 (000110) +30 + 41 = 7 (000111) +30 + 42 = 8 (001000) +30 + 43 = 9 (001001) +30 + 44 = 10 (001010) +30 + 45 = 11 (001011) +30 + 46 = 12 (001100) +30 + 47 = 13 (001101) +30 + 48 = 14 (001110) +30 + 49 = 15 (001111) +30 + 50 = 16 (010000) +30 + 51 = 17 (010001) +30 + 52 = 18 (010010) +30 + 53 = 19 (010011) +30 + 54 = 20 (010100) +30 + 55 = 21 (010101) +30 + 56 = 22 (010110) +30 + 57 = 23 (010111) +30 + 58 = 24 (011000) +30 + 59 = 25 (011001) +30 + 60 = 26 (011010) +30 + 61 = 27 (011011) +30 + 62 = 28 (011100) +30 + 63 = 29 (011101) +31 + 0 = 31 (011111) +31 + 1 = 32 (100000) +31 + 2 = 33 (100001) +31 + 3 = 34 (100010) +31 + 4 = 35 (100011) +31 + 5 = 36 (100100) +31 + 6 = 37 (100101) +31 + 7 = 38 (100110) +31 + 8 = 39 (100111) +31 + 9 = 40 (101000) +31 + 10 = 41 (101001) +31 + 11 = 42 (101010) +31 + 12 = 43 (101011) +31 + 13 = 44 (101100) +31 + 14 = 45 (101101) +31 + 15 = 46 (101110) +31 + 16 = 47 (101111) +31 + 17 = 48 (110000) +31 + 18 = 49 (110001) +31 + 19 = 50 (110010) +31 + 20 = 51 (110011) +31 + 21 = 52 (110100) +31 + 22 = 53 (110101) +31 + 23 = 54 (110110) +31 + 24 = 55 (110111) +31 + 25 = 56 (111000) +31 + 26 = 57 (111001) +31 + 27 = 58 (111010) +31 + 28 = 59 (111011) +31 + 29 = 60 (111100) +31 + 30 = 61 (111101) +31 + 31 = 62 (111110) +31 + 32 = 63 (111111) +31 + 33 = 0 (000000) +31 + 34 = 1 (000001) +31 + 35 = 2 (000010) +31 + 36 = 3 (000011) +31 + 37 = 4 (000100) +31 + 38 = 5 (000101) +31 + 39 = 6 (000110) +31 + 40 = 7 (000111) +31 + 41 = 8 (001000) +31 + 42 = 9 (001001) +31 + 43 = 10 (001010) +31 + 44 = 11 (001011) +31 + 45 = 12 (001100) +31 + 46 = 13 (001101) +31 + 47 = 14 (001110) +31 + 48 = 15 (001111) +31 + 49 = 16 (010000) +31 + 50 = 17 (010001) +31 + 51 = 18 (010010) +31 + 52 = 19 (010011) +31 + 53 = 20 (010100) +31 + 54 = 21 (010101) +31 + 55 = 22 (010110) +31 + 56 = 23 (010111) +31 + 57 = 24 (011000) +31 + 58 = 25 (011001) +31 + 59 = 26 (011010) +31 + 60 = 27 (011011) +31 + 61 = 28 (011100) +31 + 62 = 29 (011101) +31 + 63 = 30 (011110) +32 + 0 = 32 (100000) +32 + 1 = 33 (100001) +32 + 2 = 34 (100010) +32 + 3 = 35 (100011) +32 + 4 = 36 (100100) +32 + 5 = 37 (100101) +32 + 6 = 38 (100110) +32 + 7 = 39 (100111) +32 + 8 = 40 (101000) +32 + 9 = 41 (101001) +32 + 10 = 42 (101010) +32 + 11 = 43 (101011) +32 + 12 = 44 (101100) +32 + 13 = 45 (101101) +32 + 14 = 46 (101110) +32 + 15 = 47 (101111) +32 + 16 = 48 (110000) +32 + 17 = 49 (110001) +32 + 18 = 50 (110010) +32 + 19 = 51 (110011) +32 + 20 = 52 (110100) +32 + 21 = 53 (110101) +32 + 22 = 54 (110110) +32 + 23 = 55 (110111) +32 + 24 = 56 (111000) +32 + 25 = 57 (111001) +32 + 26 = 58 (111010) +32 + 27 = 59 (111011) +32 + 28 = 60 (111100) +32 + 29 = 61 (111101) +32 + 30 = 62 (111110) +32 + 31 = 63 (111111) +32 + 32 = 0 (000000) +32 + 33 = 1 (000001) +32 + 34 = 2 (000010) +32 + 35 = 3 (000011) +32 + 36 = 4 (000100) +32 + 37 = 5 (000101) +32 + 38 = 6 (000110) +32 + 39 = 7 (000111) +32 + 40 = 8 (001000) +32 + 41 = 9 (001001) +32 + 42 = 10 (001010) +32 + 43 = 11 (001011) +32 + 44 = 12 (001100) +32 + 45 = 13 (001101) +32 + 46 = 14 (001110) +32 + 47 = 15 (001111) +32 + 48 = 16 (010000) +32 + 49 = 17 (010001) +32 + 50 = 18 (010010) +32 + 51 = 19 (010011) +32 + 52 = 20 (010100) +32 + 53 = 21 (010101) +32 + 54 = 22 (010110) +32 + 55 = 23 (010111) +32 + 56 = 24 (011000) +32 + 57 = 25 (011001) +32 + 58 = 26 (011010) +32 + 59 = 27 (011011) +32 + 60 = 28 (011100) +32 + 61 = 29 (011101) +32 + 62 = 30 (011110) +32 + 63 = 31 (011111) +33 + 0 = 33 (100001) +33 + 1 = 34 (100010) +33 + 2 = 35 (100011) +33 + 3 = 36 (100100) +33 + 4 = 37 (100101) +33 + 5 = 38 (100110) +33 + 6 = 39 (100111) +33 + 7 = 40 (101000) +33 + 8 = 41 (101001) +33 + 9 = 42 (101010) +33 + 10 = 43 (101011) +33 + 11 = 44 (101100) +33 + 12 = 45 (101101) +33 + 13 = 46 (101110) +33 + 14 = 47 (101111) +33 + 15 = 48 (110000) +33 + 16 = 49 (110001) +33 + 17 = 50 (110010) +33 + 18 = 51 (110011) +33 + 19 = 52 (110100) +33 + 20 = 53 (110101) +33 + 21 = 54 (110110) +33 + 22 = 55 (110111) +33 + 23 = 56 (111000) +33 + 24 = 57 (111001) +33 + 25 = 58 (111010) +33 + 26 = 59 (111011) +33 + 27 = 60 (111100) +33 + 28 = 61 (111101) +33 + 29 = 62 (111110) +33 + 30 = 63 (111111) +33 + 31 = 0 (000000) +33 + 32 = 1 (000001) +33 + 33 = 2 (000010) +33 + 34 = 3 (000011) +33 + 35 = 4 (000100) +33 + 36 = 5 (000101) +33 + 37 = 6 (000110) +33 + 38 = 7 (000111) +33 + 39 = 8 (001000) +33 + 40 = 9 (001001) +33 + 41 = 10 (001010) +33 + 42 = 11 (001011) +33 + 43 = 12 (001100) +33 + 44 = 13 (001101) +33 + 45 = 14 (001110) +33 + 46 = 15 (001111) +33 + 47 = 16 (010000) +33 + 48 = 17 (010001) +33 + 49 = 18 (010010) +33 + 50 = 19 (010011) +33 + 51 = 20 (010100) +33 + 52 = 21 (010101) +33 + 53 = 22 (010110) +33 + 54 = 23 (010111) +33 + 55 = 24 (011000) +33 + 56 = 25 (011001) +33 + 57 = 26 (011010) +33 + 58 = 27 (011011) +33 + 59 = 28 (011100) +33 + 60 = 29 (011101) +33 + 61 = 30 (011110) +33 + 62 = 31 (011111) +33 + 63 = 32 (100000) +34 + 0 = 34 (100010) +34 + 1 = 35 (100011) +34 + 2 = 36 (100100) +34 + 3 = 37 (100101) +34 + 4 = 38 (100110) +34 + 5 = 39 (100111) +34 + 6 = 40 (101000) +34 + 7 = 41 (101001) +34 + 8 = 42 (101010) +34 + 9 = 43 (101011) +34 + 10 = 44 (101100) +34 + 11 = 45 (101101) +34 + 12 = 46 (101110) +34 + 13 = 47 (101111) +34 + 14 = 48 (110000) +34 + 15 = 49 (110001) +34 + 16 = 50 (110010) +34 + 17 = 51 (110011) +34 + 18 = 52 (110100) +34 + 19 = 53 (110101) +34 + 20 = 54 (110110) +34 + 21 = 55 (110111) +34 + 22 = 56 (111000) +34 + 23 = 57 (111001) +34 + 24 = 58 (111010) +34 + 25 = 59 (111011) +34 + 26 = 60 (111100) +34 + 27 = 61 (111101) +34 + 28 = 62 (111110) +34 + 29 = 63 (111111) +34 + 30 = 0 (000000) +34 + 31 = 1 (000001) +34 + 32 = 2 (000010) +34 + 33 = 3 (000011) +34 + 34 = 4 (000100) +34 + 35 = 5 (000101) +34 + 36 = 6 (000110) +34 + 37 = 7 (000111) +34 + 38 = 8 (001000) +34 + 39 = 9 (001001) +34 + 40 = 10 (001010) +34 + 41 = 11 (001011) +34 + 42 = 12 (001100) +34 + 43 = 13 (001101) +34 + 44 = 14 (001110) +34 + 45 = 15 (001111) +34 + 46 = 16 (010000) +34 + 47 = 17 (010001) +34 + 48 = 18 (010010) +34 + 49 = 19 (010011) +34 + 50 = 20 (010100) +34 + 51 = 21 (010101) +34 + 52 = 22 (010110) +34 + 53 = 23 (010111) +34 + 54 = 24 (011000) +34 + 55 = 25 (011001) +34 + 56 = 26 (011010) +34 + 57 = 27 (011011) +34 + 58 = 28 (011100) +34 + 59 = 29 (011101) +34 + 60 = 30 (011110) +34 + 61 = 31 (011111) +34 + 62 = 32 (100000) +34 + 63 = 33 (100001) +35 + 0 = 35 (100011) +35 + 1 = 36 (100100) +35 + 2 = 37 (100101) +35 + 3 = 38 (100110) +35 + 4 = 39 (100111) +35 + 5 = 40 (101000) +35 + 6 = 41 (101001) +35 + 7 = 42 (101010) +35 + 8 = 43 (101011) +35 + 9 = 44 (101100) +35 + 10 = 45 (101101) +35 + 11 = 46 (101110) +35 + 12 = 47 (101111) +35 + 13 = 48 (110000) +35 + 14 = 49 (110001) +35 + 15 = 50 (110010) +35 + 16 = 51 (110011) +35 + 17 = 52 (110100) +35 + 18 = 53 (110101) +35 + 19 = 54 (110110) +35 + 20 = 55 (110111) +35 + 21 = 56 (111000) +35 + 22 = 57 (111001) +35 + 23 = 58 (111010) +35 + 24 = 59 (111011) +35 + 25 = 60 (111100) +35 + 26 = 61 (111101) +35 + 27 = 62 (111110) +35 + 28 = 63 (111111) +35 + 29 = 0 (000000) +35 + 30 = 1 (000001) +35 + 31 = 2 (000010) +35 + 32 = 3 (000011) +35 + 33 = 4 (000100) +35 + 34 = 5 (000101) +35 + 35 = 6 (000110) +35 + 36 = 7 (000111) +35 + 37 = 8 (001000) +35 + 38 = 9 (001001) +35 + 39 = 10 (001010) +35 + 40 = 11 (001011) +35 + 41 = 12 (001100) +35 + 42 = 13 (001101) +35 + 43 = 14 (001110) +35 + 44 = 15 (001111) +35 + 45 = 16 (010000) +35 + 46 = 17 (010001) +35 + 47 = 18 (010010) +35 + 48 = 19 (010011) +35 + 49 = 20 (010100) +35 + 50 = 21 (010101) +35 + 51 = 22 (010110) +35 + 52 = 23 (010111) +35 + 53 = 24 (011000) +35 + 54 = 25 (011001) +35 + 55 = 26 (011010) +35 + 56 = 27 (011011) +35 + 57 = 28 (011100) +35 + 58 = 29 (011101) +35 + 59 = 30 (011110) +35 + 60 = 31 (011111) +35 + 61 = 32 (100000) +35 + 62 = 33 (100001) +35 + 63 = 34 (100010) +36 + 0 = 36 (100100) +36 + 1 = 37 (100101) +36 + 2 = 38 (100110) +36 + 3 = 39 (100111) +36 + 4 = 40 (101000) +36 + 5 = 41 (101001) +36 + 6 = 42 (101010) +36 + 7 = 43 (101011) +36 + 8 = 44 (101100) +36 + 9 = 45 (101101) +36 + 10 = 46 (101110) +36 + 11 = 47 (101111) +36 + 12 = 48 (110000) +36 + 13 = 49 (110001) +36 + 14 = 50 (110010) +36 + 15 = 51 (110011) +36 + 16 = 52 (110100) +36 + 17 = 53 (110101) +36 + 18 = 54 (110110) +36 + 19 = 55 (110111) +36 + 20 = 56 (111000) +36 + 21 = 57 (111001) +36 + 22 = 58 (111010) +36 + 23 = 59 (111011) +36 + 24 = 60 (111100) +36 + 25 = 61 (111101) +36 + 26 = 62 (111110) +36 + 27 = 63 (111111) +36 + 28 = 0 (000000) +36 + 29 = 1 (000001) +36 + 30 = 2 (000010) +36 + 31 = 3 (000011) +36 + 32 = 4 (000100) +36 + 33 = 5 (000101) +36 + 34 = 6 (000110) +36 + 35 = 7 (000111) +36 + 36 = 8 (001000) +36 + 37 = 9 (001001) +36 + 38 = 10 (001010) +36 + 39 = 11 (001011) +36 + 40 = 12 (001100) +36 + 41 = 13 (001101) +36 + 42 = 14 (001110) +36 + 43 = 15 (001111) +36 + 44 = 16 (010000) +36 + 45 = 17 (010001) +36 + 46 = 18 (010010) +36 + 47 = 19 (010011) +36 + 48 = 20 (010100) +36 + 49 = 21 (010101) +36 + 50 = 22 (010110) +36 + 51 = 23 (010111) +36 + 52 = 24 (011000) +36 + 53 = 25 (011001) +36 + 54 = 26 (011010) +36 + 55 = 27 (011011) +36 + 56 = 28 (011100) +36 + 57 = 29 (011101) +36 + 58 = 30 (011110) +36 + 59 = 31 (011111) +36 + 60 = 32 (100000) +36 + 61 = 33 (100001) +36 + 62 = 34 (100010) +36 + 63 = 35 (100011) +37 + 0 = 37 (100101) +37 + 1 = 38 (100110) +37 + 2 = 39 (100111) +37 + 3 = 40 (101000) +37 + 4 = 41 (101001) +37 + 5 = 42 (101010) +37 + 6 = 43 (101011) +37 + 7 = 44 (101100) +37 + 8 = 45 (101101) +37 + 9 = 46 (101110) +37 + 10 = 47 (101111) +37 + 11 = 48 (110000) +37 + 12 = 49 (110001) +37 + 13 = 50 (110010) +37 + 14 = 51 (110011) +37 + 15 = 52 (110100) +37 + 16 = 53 (110101) +37 + 17 = 54 (110110) +37 + 18 = 55 (110111) +37 + 19 = 56 (111000) +37 + 20 = 57 (111001) +37 + 21 = 58 (111010) +37 + 22 = 59 (111011) +37 + 23 = 60 (111100) +37 + 24 = 61 (111101) +37 + 25 = 62 (111110) +37 + 26 = 63 (111111) +37 + 27 = 0 (000000) +37 + 28 = 1 (000001) +37 + 29 = 2 (000010) +37 + 30 = 3 (000011) +37 + 31 = 4 (000100) +37 + 32 = 5 (000101) +37 + 33 = 6 (000110) +37 + 34 = 7 (000111) +37 + 35 = 8 (001000) +37 + 36 = 9 (001001) +37 + 37 = 10 (001010) +37 + 38 = 11 (001011) +37 + 39 = 12 (001100) +37 + 40 = 13 (001101) +37 + 41 = 14 (001110) +37 + 42 = 15 (001111) +37 + 43 = 16 (010000) +37 + 44 = 17 (010001) +37 + 45 = 18 (010010) +37 + 46 = 19 (010011) +37 + 47 = 20 (010100) +37 + 48 = 21 (010101) +37 + 49 = 22 (010110) +37 + 50 = 23 (010111) +37 + 51 = 24 (011000) +37 + 52 = 25 (011001) +37 + 53 = 26 (011010) +37 + 54 = 27 (011011) +37 + 55 = 28 (011100) +37 + 56 = 29 (011101) +37 + 57 = 30 (011110) +37 + 58 = 31 (011111) +37 + 59 = 32 (100000) +37 + 60 = 33 (100001) +37 + 61 = 34 (100010) +37 + 62 = 35 (100011) +37 + 63 = 36 (100100) +38 + 0 = 38 (100110) +38 + 1 = 39 (100111) +38 + 2 = 40 (101000) +38 + 3 = 41 (101001) +38 + 4 = 42 (101010) +38 + 5 = 43 (101011) +38 + 6 = 44 (101100) +38 + 7 = 45 (101101) +38 + 8 = 46 (101110) +38 + 9 = 47 (101111) +38 + 10 = 48 (110000) +38 + 11 = 49 (110001) +38 + 12 = 50 (110010) +38 + 13 = 51 (110011) +38 + 14 = 52 (110100) +38 + 15 = 53 (110101) +38 + 16 = 54 (110110) +38 + 17 = 55 (110111) +38 + 18 = 56 (111000) +38 + 19 = 57 (111001) +38 + 20 = 58 (111010) +38 + 21 = 59 (111011) +38 + 22 = 60 (111100) +38 + 23 = 61 (111101) +38 + 24 = 62 (111110) +38 + 25 = 63 (111111) +38 + 26 = 0 (000000) +38 + 27 = 1 (000001) +38 + 28 = 2 (000010) +38 + 29 = 3 (000011) +38 + 30 = 4 (000100) +38 + 31 = 5 (000101) +38 + 32 = 6 (000110) +38 + 33 = 7 (000111) +38 + 34 = 8 (001000) +38 + 35 = 9 (001001) +38 + 36 = 10 (001010) +38 + 37 = 11 (001011) +38 + 38 = 12 (001100) +38 + 39 = 13 (001101) +38 + 40 = 14 (001110) +38 + 41 = 15 (001111) +38 + 42 = 16 (010000) +38 + 43 = 17 (010001) +38 + 44 = 18 (010010) +38 + 45 = 19 (010011) +38 + 46 = 20 (010100) +38 + 47 = 21 (010101) +38 + 48 = 22 (010110) +38 + 49 = 23 (010111) +38 + 50 = 24 (011000) +38 + 51 = 25 (011001) +38 + 52 = 26 (011010) +38 + 53 = 27 (011011) +38 + 54 = 28 (011100) +38 + 55 = 29 (011101) +38 + 56 = 30 (011110) +38 + 57 = 31 (011111) +38 + 58 = 32 (100000) +38 + 59 = 33 (100001) +38 + 60 = 34 (100010) +38 + 61 = 35 (100011) +38 + 62 = 36 (100100) +38 + 63 = 37 (100101) +39 + 0 = 39 (100111) +39 + 1 = 40 (101000) +39 + 2 = 41 (101001) +39 + 3 = 42 (101010) +39 + 4 = 43 (101011) +39 + 5 = 44 (101100) +39 + 6 = 45 (101101) +39 + 7 = 46 (101110) +39 + 8 = 47 (101111) +39 + 9 = 48 (110000) +39 + 10 = 49 (110001) +39 + 11 = 50 (110010) +39 + 12 = 51 (110011) +39 + 13 = 52 (110100) +39 + 14 = 53 (110101) +39 + 15 = 54 (110110) +39 + 16 = 55 (110111) +39 + 17 = 56 (111000) +39 + 18 = 57 (111001) +39 + 19 = 58 (111010) +39 + 20 = 59 (111011) +39 + 21 = 60 (111100) +39 + 22 = 61 (111101) +39 + 23 = 62 (111110) +39 + 24 = 63 (111111) +39 + 25 = 0 (000000) +39 + 26 = 1 (000001) +39 + 27 = 2 (000010) +39 + 28 = 3 (000011) +39 + 29 = 4 (000100) +39 + 30 = 5 (000101) +39 + 31 = 6 (000110) +39 + 32 = 7 (000111) +39 + 33 = 8 (001000) +39 + 34 = 9 (001001) +39 + 35 = 10 (001010) +39 + 36 = 11 (001011) +39 + 37 = 12 (001100) +39 + 38 = 13 (001101) +39 + 39 = 14 (001110) +39 + 40 = 15 (001111) +39 + 41 = 16 (010000) +39 + 42 = 17 (010001) +39 + 43 = 18 (010010) +39 + 44 = 19 (010011) +39 + 45 = 20 (010100) +39 + 46 = 21 (010101) +39 + 47 = 22 (010110) +39 + 48 = 23 (010111) +39 + 49 = 24 (011000) +39 + 50 = 25 (011001) +39 + 51 = 26 (011010) +39 + 52 = 27 (011011) +39 + 53 = 28 (011100) +39 + 54 = 29 (011101) +39 + 55 = 30 (011110) +39 + 56 = 31 (011111) +39 + 57 = 32 (100000) +39 + 58 = 33 (100001) +39 + 59 = 34 (100010) +39 + 60 = 35 (100011) +39 + 61 = 36 (100100) +39 + 62 = 37 (100101) +39 + 63 = 38 (100110) +40 + 0 = 40 (101000) +40 + 1 = 41 (101001) +40 + 2 = 42 (101010) +40 + 3 = 43 (101011) +40 + 4 = 44 (101100) +40 + 5 = 45 (101101) +40 + 6 = 46 (101110) +40 + 7 = 47 (101111) +40 + 8 = 48 (110000) +40 + 9 = 49 (110001) +40 + 10 = 50 (110010) +40 + 11 = 51 (110011) +40 + 12 = 52 (110100) +40 + 13 = 53 (110101) +40 + 14 = 54 (110110) +40 + 15 = 55 (110111) +40 + 16 = 56 (111000) +40 + 17 = 57 (111001) +40 + 18 = 58 (111010) +40 + 19 = 59 (111011) +40 + 20 = 60 (111100) +40 + 21 = 61 (111101) +40 + 22 = 62 (111110) +40 + 23 = 63 (111111) +40 + 24 = 0 (000000) +40 + 25 = 1 (000001) +40 + 26 = 2 (000010) +40 + 27 = 3 (000011) +40 + 28 = 4 (000100) +40 + 29 = 5 (000101) +40 + 30 = 6 (000110) +40 + 31 = 7 (000111) +40 + 32 = 8 (001000) +40 + 33 = 9 (001001) +40 + 34 = 10 (001010) +40 + 35 = 11 (001011) +40 + 36 = 12 (001100) +40 + 37 = 13 (001101) +40 + 38 = 14 (001110) +40 + 39 = 15 (001111) +40 + 40 = 16 (010000) +40 + 41 = 17 (010001) +40 + 42 = 18 (010010) +40 + 43 = 19 (010011) +40 + 44 = 20 (010100) +40 + 45 = 21 (010101) +40 + 46 = 22 (010110) +40 + 47 = 23 (010111) +40 + 48 = 24 (011000) +40 + 49 = 25 (011001) +40 + 50 = 26 (011010) +40 + 51 = 27 (011011) +40 + 52 = 28 (011100) +40 + 53 = 29 (011101) +40 + 54 = 30 (011110) +40 + 55 = 31 (011111) +40 + 56 = 32 (100000) +40 + 57 = 33 (100001) +40 + 58 = 34 (100010) +40 + 59 = 35 (100011) +40 + 60 = 36 (100100) +40 + 61 = 37 (100101) +40 + 62 = 38 (100110) +40 + 63 = 39 (100111) +41 + 0 = 41 (101001) +41 + 1 = 42 (101010) +41 + 2 = 43 (101011) +41 + 3 = 44 (101100) +41 + 4 = 45 (101101) +41 + 5 = 46 (101110) +41 + 6 = 47 (101111) +41 + 7 = 48 (110000) +41 + 8 = 49 (110001) +41 + 9 = 50 (110010) +41 + 10 = 51 (110011) +41 + 11 = 52 (110100) +41 + 12 = 53 (110101) +41 + 13 = 54 (110110) +41 + 14 = 55 (110111) +41 + 15 = 56 (111000) +41 + 16 = 57 (111001) +41 + 17 = 58 (111010) +41 + 18 = 59 (111011) +41 + 19 = 60 (111100) +41 + 20 = 61 (111101) +41 + 21 = 62 (111110) +41 + 22 = 63 (111111) +41 + 23 = 0 (000000) +41 + 24 = 1 (000001) +41 + 25 = 2 (000010) +41 + 26 = 3 (000011) +41 + 27 = 4 (000100) +41 + 28 = 5 (000101) +41 + 29 = 6 (000110) +41 + 30 = 7 (000111) +41 + 31 = 8 (001000) +41 + 32 = 9 (001001) +41 + 33 = 10 (001010) +41 + 34 = 11 (001011) +41 + 35 = 12 (001100) +41 + 36 = 13 (001101) +41 + 37 = 14 (001110) +41 + 38 = 15 (001111) +41 + 39 = 16 (010000) +41 + 40 = 17 (010001) +41 + 41 = 18 (010010) +41 + 42 = 19 (010011) +41 + 43 = 20 (010100) +41 + 44 = 21 (010101) +41 + 45 = 22 (010110) +41 + 46 = 23 (010111) +41 + 47 = 24 (011000) +41 + 48 = 25 (011001) +41 + 49 = 26 (011010) +41 + 50 = 27 (011011) +41 + 51 = 28 (011100) +41 + 52 = 29 (011101) +41 + 53 = 30 (011110) +41 + 54 = 31 (011111) +41 + 55 = 32 (100000) +41 + 56 = 33 (100001) +41 + 57 = 34 (100010) +41 + 58 = 35 (100011) +41 + 59 = 36 (100100) +41 + 60 = 37 (100101) +41 + 61 = 38 (100110) +41 + 62 = 39 (100111) +41 + 63 = 40 (101000) +42 + 0 = 42 (101010) +42 + 1 = 43 (101011) +42 + 2 = 44 (101100) +42 + 3 = 45 (101101) +42 + 4 = 46 (101110) +42 + 5 = 47 (101111) +42 + 6 = 48 (110000) +42 + 7 = 49 (110001) +42 + 8 = 50 (110010) +42 + 9 = 51 (110011) +42 + 10 = 52 (110100) +42 + 11 = 53 (110101) +42 + 12 = 54 (110110) +42 + 13 = 55 (110111) +42 + 14 = 56 (111000) +42 + 15 = 57 (111001) +42 + 16 = 58 (111010) +42 + 17 = 59 (111011) +42 + 18 = 60 (111100) +42 + 19 = 61 (111101) +42 + 20 = 62 (111110) +42 + 21 = 63 (111111) +42 + 22 = 0 (000000) +42 + 23 = 1 (000001) +42 + 24 = 2 (000010) +42 + 25 = 3 (000011) +42 + 26 = 4 (000100) +42 + 27 = 5 (000101) +42 + 28 = 6 (000110) +42 + 29 = 7 (000111) +42 + 30 = 8 (001000) +42 + 31 = 9 (001001) +42 + 32 = 10 (001010) +42 + 33 = 11 (001011) +42 + 34 = 12 (001100) +42 + 35 = 13 (001101) +42 + 36 = 14 (001110) +42 + 37 = 15 (001111) +42 + 38 = 16 (010000) +42 + 39 = 17 (010001) +42 + 40 = 18 (010010) +42 + 41 = 19 (010011) +42 + 42 = 20 (010100) +42 + 43 = 21 (010101) +42 + 44 = 22 (010110) +42 + 45 = 23 (010111) +42 + 46 = 24 (011000) +42 + 47 = 25 (011001) +42 + 48 = 26 (011010) +42 + 49 = 27 (011011) +42 + 50 = 28 (011100) +42 + 51 = 29 (011101) +42 + 52 = 30 (011110) +42 + 53 = 31 (011111) +42 + 54 = 32 (100000) +42 + 55 = 33 (100001) +42 + 56 = 34 (100010) +42 + 57 = 35 (100011) +42 + 58 = 36 (100100) +42 + 59 = 37 (100101) +42 + 60 = 38 (100110) +42 + 61 = 39 (100111) +42 + 62 = 40 (101000) +42 + 63 = 41 (101001) +43 + 0 = 43 (101011) +43 + 1 = 44 (101100) +43 + 2 = 45 (101101) +43 + 3 = 46 (101110) +43 + 4 = 47 (101111) +43 + 5 = 48 (110000) +43 + 6 = 49 (110001) +43 + 7 = 50 (110010) +43 + 8 = 51 (110011) +43 + 9 = 52 (110100) +43 + 10 = 53 (110101) +43 + 11 = 54 (110110) +43 + 12 = 55 (110111) +43 + 13 = 56 (111000) +43 + 14 = 57 (111001) +43 + 15 = 58 (111010) +43 + 16 = 59 (111011) +43 + 17 = 60 (111100) +43 + 18 = 61 (111101) +43 + 19 = 62 (111110) +43 + 20 = 63 (111111) +43 + 21 = 0 (000000) +43 + 22 = 1 (000001) +43 + 23 = 2 (000010) +43 + 24 = 3 (000011) +43 + 25 = 4 (000100) +43 + 26 = 5 (000101) +43 + 27 = 6 (000110) +43 + 28 = 7 (000111) +43 + 29 = 8 (001000) +43 + 30 = 9 (001001) +43 + 31 = 10 (001010) +43 + 32 = 11 (001011) +43 + 33 = 12 (001100) +43 + 34 = 13 (001101) +43 + 35 = 14 (001110) +43 + 36 = 15 (001111) +43 + 37 = 16 (010000) +43 + 38 = 17 (010001) +43 + 39 = 18 (010010) +43 + 40 = 19 (010011) +43 + 41 = 20 (010100) +43 + 42 = 21 (010101) +43 + 43 = 22 (010110) +43 + 44 = 23 (010111) +43 + 45 = 24 (011000) +43 + 46 = 25 (011001) +43 + 47 = 26 (011010) +43 + 48 = 27 (011011) +43 + 49 = 28 (011100) +43 + 50 = 29 (011101) +43 + 51 = 30 (011110) +43 + 52 = 31 (011111) +43 + 53 = 32 (100000) +43 + 54 = 33 (100001) +43 + 55 = 34 (100010) +43 + 56 = 35 (100011) +43 + 57 = 36 (100100) +43 + 58 = 37 (100101) +43 + 59 = 38 (100110) +43 + 60 = 39 (100111) +43 + 61 = 40 (101000) +43 + 62 = 41 (101001) +43 + 63 = 42 (101010) +44 + 0 = 44 (101100) +44 + 1 = 45 (101101) +44 + 2 = 46 (101110) +44 + 3 = 47 (101111) +44 + 4 = 48 (110000) +44 + 5 = 49 (110001) +44 + 6 = 50 (110010) +44 + 7 = 51 (110011) +44 + 8 = 52 (110100) +44 + 9 = 53 (110101) +44 + 10 = 54 (110110) +44 + 11 = 55 (110111) +44 + 12 = 56 (111000) +44 + 13 = 57 (111001) +44 + 14 = 58 (111010) +44 + 15 = 59 (111011) +44 + 16 = 60 (111100) +44 + 17 = 61 (111101) +44 + 18 = 62 (111110) +44 + 19 = 63 (111111) +44 + 20 = 0 (000000) +44 + 21 = 1 (000001) +44 + 22 = 2 (000010) +44 + 23 = 3 (000011) +44 + 24 = 4 (000100) +44 + 25 = 5 (000101) +44 + 26 = 6 (000110) +44 + 27 = 7 (000111) +44 + 28 = 8 (001000) +44 + 29 = 9 (001001) +44 + 30 = 10 (001010) +44 + 31 = 11 (001011) +44 + 32 = 12 (001100) +44 + 33 = 13 (001101) +44 + 34 = 14 (001110) +44 + 35 = 15 (001111) +44 + 36 = 16 (010000) +44 + 37 = 17 (010001) +44 + 38 = 18 (010010) +44 + 39 = 19 (010011) +44 + 40 = 20 (010100) +44 + 41 = 21 (010101) +44 + 42 = 22 (010110) +44 + 43 = 23 (010111) +44 + 44 = 24 (011000) +44 + 45 = 25 (011001) +44 + 46 = 26 (011010) +44 + 47 = 27 (011011) +44 + 48 = 28 (011100) +44 + 49 = 29 (011101) +44 + 50 = 30 (011110) +44 + 51 = 31 (011111) +44 + 52 = 32 (100000) +44 + 53 = 33 (100001) +44 + 54 = 34 (100010) +44 + 55 = 35 (100011) +44 + 56 = 36 (100100) +44 + 57 = 37 (100101) +44 + 58 = 38 (100110) +44 + 59 = 39 (100111) +44 + 60 = 40 (101000) +44 + 61 = 41 (101001) +44 + 62 = 42 (101010) +44 + 63 = 43 (101011) +45 + 0 = 45 (101101) +45 + 1 = 46 (101110) +45 + 2 = 47 (101111) +45 + 3 = 48 (110000) +45 + 4 = 49 (110001) +45 + 5 = 50 (110010) +45 + 6 = 51 (110011) +45 + 7 = 52 (110100) +45 + 8 = 53 (110101) +45 + 9 = 54 (110110) +45 + 10 = 55 (110111) +45 + 11 = 56 (111000) +45 + 12 = 57 (111001) +45 + 13 = 58 (111010) +45 + 14 = 59 (111011) +45 + 15 = 60 (111100) +45 + 16 = 61 (111101) +45 + 17 = 62 (111110) +45 + 18 = 63 (111111) +45 + 19 = 0 (000000) +45 + 20 = 1 (000001) +45 + 21 = 2 (000010) +45 + 22 = 3 (000011) +45 + 23 = 4 (000100) +45 + 24 = 5 (000101) +45 + 25 = 6 (000110) +45 + 26 = 7 (000111) +45 + 27 = 8 (001000) +45 + 28 = 9 (001001) +45 + 29 = 10 (001010) +45 + 30 = 11 (001011) +45 + 31 = 12 (001100) +45 + 32 = 13 (001101) +45 + 33 = 14 (001110) +45 + 34 = 15 (001111) +45 + 35 = 16 (010000) +45 + 36 = 17 (010001) +45 + 37 = 18 (010010) +45 + 38 = 19 (010011) +45 + 39 = 20 (010100) +45 + 40 = 21 (010101) +45 + 41 = 22 (010110) +45 + 42 = 23 (010111) +45 + 43 = 24 (011000) +45 + 44 = 25 (011001) +45 + 45 = 26 (011010) +45 + 46 = 27 (011011) +45 + 47 = 28 (011100) +45 + 48 = 29 (011101) +45 + 49 = 30 (011110) +45 + 50 = 31 (011111) +45 + 51 = 32 (100000) +45 + 52 = 33 (100001) +45 + 53 = 34 (100010) +45 + 54 = 35 (100011) +45 + 55 = 36 (100100) +45 + 56 = 37 (100101) +45 + 57 = 38 (100110) +45 + 58 = 39 (100111) +45 + 59 = 40 (101000) +45 + 60 = 41 (101001) +45 + 61 = 42 (101010) +45 + 62 = 43 (101011) +45 + 63 = 44 (101100) +46 + 0 = 46 (101110) +46 + 1 = 47 (101111) +46 + 2 = 48 (110000) +46 + 3 = 49 (110001) +46 + 4 = 50 (110010) +46 + 5 = 51 (110011) +46 + 6 = 52 (110100) +46 + 7 = 53 (110101) +46 + 8 = 54 (110110) +46 + 9 = 55 (110111) +46 + 10 = 56 (111000) +46 + 11 = 57 (111001) +46 + 12 = 58 (111010) +46 + 13 = 59 (111011) +46 + 14 = 60 (111100) +46 + 15 = 61 (111101) +46 + 16 = 62 (111110) +46 + 17 = 63 (111111) +46 + 18 = 0 (000000) +46 + 19 = 1 (000001) +46 + 20 = 2 (000010) +46 + 21 = 3 (000011) +46 + 22 = 4 (000100) +46 + 23 = 5 (000101) +46 + 24 = 6 (000110) +46 + 25 = 7 (000111) +46 + 26 = 8 (001000) +46 + 27 = 9 (001001) +46 + 28 = 10 (001010) +46 + 29 = 11 (001011) +46 + 30 = 12 (001100) +46 + 31 = 13 (001101) +46 + 32 = 14 (001110) +46 + 33 = 15 (001111) +46 + 34 = 16 (010000) +46 + 35 = 17 (010001) +46 + 36 = 18 (010010) +46 + 37 = 19 (010011) +46 + 38 = 20 (010100) +46 + 39 = 21 (010101) +46 + 40 = 22 (010110) +46 + 41 = 23 (010111) +46 + 42 = 24 (011000) +46 + 43 = 25 (011001) +46 + 44 = 26 (011010) +46 + 45 = 27 (011011) +46 + 46 = 28 (011100) +46 + 47 = 29 (011101) +46 + 48 = 30 (011110) +46 + 49 = 31 (011111) +46 + 50 = 32 (100000) +46 + 51 = 33 (100001) +46 + 52 = 34 (100010) +46 + 53 = 35 (100011) +46 + 54 = 36 (100100) +46 + 55 = 37 (100101) +46 + 56 = 38 (100110) +46 + 57 = 39 (100111) +46 + 58 = 40 (101000) +46 + 59 = 41 (101001) +46 + 60 = 42 (101010) +46 + 61 = 43 (101011) +46 + 62 = 44 (101100) +46 + 63 = 45 (101101) +47 + 0 = 47 (101111) +47 + 1 = 48 (110000) +47 + 2 = 49 (110001) +47 + 3 = 50 (110010) +47 + 4 = 51 (110011) +47 + 5 = 52 (110100) +47 + 6 = 53 (110101) +47 + 7 = 54 (110110) +47 + 8 = 55 (110111) +47 + 9 = 56 (111000) +47 + 10 = 57 (111001) +47 + 11 = 58 (111010) +47 + 12 = 59 (111011) +47 + 13 = 60 (111100) +47 + 14 = 61 (111101) +47 + 15 = 62 (111110) +47 + 16 = 63 (111111) +47 + 17 = 0 (000000) +47 + 18 = 1 (000001) +47 + 19 = 2 (000010) +47 + 20 = 3 (000011) +47 + 21 = 4 (000100) +47 + 22 = 5 (000101) +47 + 23 = 6 (000110) +47 + 24 = 7 (000111) +47 + 25 = 8 (001000) +47 + 26 = 9 (001001) +47 + 27 = 10 (001010) +47 + 28 = 11 (001011) +47 + 29 = 12 (001100) +47 + 30 = 13 (001101) +47 + 31 = 14 (001110) +47 + 32 = 15 (001111) +47 + 33 = 16 (010000) +47 + 34 = 17 (010001) +47 + 35 = 18 (010010) +47 + 36 = 19 (010011) +47 + 37 = 20 (010100) +47 + 38 = 21 (010101) +47 + 39 = 22 (010110) +47 + 40 = 23 (010111) +47 + 41 = 24 (011000) +47 + 42 = 25 (011001) +47 + 43 = 26 (011010) +47 + 44 = 27 (011011) +47 + 45 = 28 (011100) +47 + 46 = 29 (011101) +47 + 47 = 30 (011110) +47 + 48 = 31 (011111) +47 + 49 = 32 (100000) +47 + 50 = 33 (100001) +47 + 51 = 34 (100010) +47 + 52 = 35 (100011) +47 + 53 = 36 (100100) +47 + 54 = 37 (100101) +47 + 55 = 38 (100110) +47 + 56 = 39 (100111) +47 + 57 = 40 (101000) +47 + 58 = 41 (101001) +47 + 59 = 42 (101010) +47 + 60 = 43 (101011) +47 + 61 = 44 (101100) +47 + 62 = 45 (101101) +47 + 63 = 46 (101110) +48 + 0 = 48 (110000) +48 + 1 = 49 (110001) +48 + 2 = 50 (110010) +48 + 3 = 51 (110011) +48 + 4 = 52 (110100) +48 + 5 = 53 (110101) +48 + 6 = 54 (110110) +48 + 7 = 55 (110111) +48 + 8 = 56 (111000) +48 + 9 = 57 (111001) +48 + 10 = 58 (111010) +48 + 11 = 59 (111011) +48 + 12 = 60 (111100) +48 + 13 = 61 (111101) +48 + 14 = 62 (111110) +48 + 15 = 63 (111111) +48 + 16 = 0 (000000) +48 + 17 = 1 (000001) +48 + 18 = 2 (000010) +48 + 19 = 3 (000011) +48 + 20 = 4 (000100) +48 + 21 = 5 (000101) +48 + 22 = 6 (000110) +48 + 23 = 7 (000111) +48 + 24 = 8 (001000) +48 + 25 = 9 (001001) +48 + 26 = 10 (001010) +48 + 27 = 11 (001011) +48 + 28 = 12 (001100) +48 + 29 = 13 (001101) +48 + 30 = 14 (001110) +48 + 31 = 15 (001111) +48 + 32 = 16 (010000) +48 + 33 = 17 (010001) +48 + 34 = 18 (010010) +48 + 35 = 19 (010011) +48 + 36 = 20 (010100) +48 + 37 = 21 (010101) +48 + 38 = 22 (010110) +48 + 39 = 23 (010111) +48 + 40 = 24 (011000) +48 + 41 = 25 (011001) +48 + 42 = 26 (011010) +48 + 43 = 27 (011011) +48 + 44 = 28 (011100) +48 + 45 = 29 (011101) +48 + 46 = 30 (011110) +48 + 47 = 31 (011111) +48 + 48 = 32 (100000) +48 + 49 = 33 (100001) +48 + 50 = 34 (100010) +48 + 51 = 35 (100011) +48 + 52 = 36 (100100) +48 + 53 = 37 (100101) +48 + 54 = 38 (100110) +48 + 55 = 39 (100111) +48 + 56 = 40 (101000) +48 + 57 = 41 (101001) +48 + 58 = 42 (101010) +48 + 59 = 43 (101011) +48 + 60 = 44 (101100) +48 + 61 = 45 (101101) +48 + 62 = 46 (101110) +48 + 63 = 47 (101111) +49 + 0 = 49 (110001) +49 + 1 = 50 (110010) +49 + 2 = 51 (110011) +49 + 3 = 52 (110100) +49 + 4 = 53 (110101) +49 + 5 = 54 (110110) +49 + 6 = 55 (110111) +49 + 7 = 56 (111000) +49 + 8 = 57 (111001) +49 + 9 = 58 (111010) +49 + 10 = 59 (111011) +49 + 11 = 60 (111100) +49 + 12 = 61 (111101) +49 + 13 = 62 (111110) +49 + 14 = 63 (111111) +49 + 15 = 0 (000000) +49 + 16 = 1 (000001) +49 + 17 = 2 (000010) +49 + 18 = 3 (000011) +49 + 19 = 4 (000100) +49 + 20 = 5 (000101) +49 + 21 = 6 (000110) +49 + 22 = 7 (000111) +49 + 23 = 8 (001000) +49 + 24 = 9 (001001) +49 + 25 = 10 (001010) +49 + 26 = 11 (001011) +49 + 27 = 12 (001100) +49 + 28 = 13 (001101) +49 + 29 = 14 (001110) +49 + 30 = 15 (001111) +49 + 31 = 16 (010000) +49 + 32 = 17 (010001) +49 + 33 = 18 (010010) +49 + 34 = 19 (010011) +49 + 35 = 20 (010100) +49 + 36 = 21 (010101) +49 + 37 = 22 (010110) +49 + 38 = 23 (010111) +49 + 39 = 24 (011000) +49 + 40 = 25 (011001) +49 + 41 = 26 (011010) +49 + 42 = 27 (011011) +49 + 43 = 28 (011100) +49 + 44 = 29 (011101) +49 + 45 = 30 (011110) +49 + 46 = 31 (011111) +49 + 47 = 32 (100000) +49 + 48 = 33 (100001) +49 + 49 = 34 (100010) +49 + 50 = 35 (100011) +49 + 51 = 36 (100100) +49 + 52 = 37 (100101) +49 + 53 = 38 (100110) +49 + 54 = 39 (100111) +49 + 55 = 40 (101000) +49 + 56 = 41 (101001) +49 + 57 = 42 (101010) +49 + 58 = 43 (101011) +49 + 59 = 44 (101100) +49 + 60 = 45 (101101) +49 + 61 = 46 (101110) +49 + 62 = 47 (101111) +49 + 63 = 48 (110000) +50 + 0 = 50 (110010) +50 + 1 = 51 (110011) +50 + 2 = 52 (110100) +50 + 3 = 53 (110101) +50 + 4 = 54 (110110) +50 + 5 = 55 (110111) +50 + 6 = 56 (111000) +50 + 7 = 57 (111001) +50 + 8 = 58 (111010) +50 + 9 = 59 (111011) +50 + 10 = 60 (111100) +50 + 11 = 61 (111101) +50 + 12 = 62 (111110) +50 + 13 = 63 (111111) +50 + 14 = 0 (000000) +50 + 15 = 1 (000001) +50 + 16 = 2 (000010) +50 + 17 = 3 (000011) +50 + 18 = 4 (000100) +50 + 19 = 5 (000101) +50 + 20 = 6 (000110) +50 + 21 = 7 (000111) +50 + 22 = 8 (001000) +50 + 23 = 9 (001001) +50 + 24 = 10 (001010) +50 + 25 = 11 (001011) +50 + 26 = 12 (001100) +50 + 27 = 13 (001101) +50 + 28 = 14 (001110) +50 + 29 = 15 (001111) +50 + 30 = 16 (010000) +50 + 31 = 17 (010001) +50 + 32 = 18 (010010) +50 + 33 = 19 (010011) +50 + 34 = 20 (010100) +50 + 35 = 21 (010101) +50 + 36 = 22 (010110) +50 + 37 = 23 (010111) +50 + 38 = 24 (011000) +50 + 39 = 25 (011001) +50 + 40 = 26 (011010) +50 + 41 = 27 (011011) +50 + 42 = 28 (011100) +50 + 43 = 29 (011101) +50 + 44 = 30 (011110) +50 + 45 = 31 (011111) +50 + 46 = 32 (100000) +50 + 47 = 33 (100001) +50 + 48 = 34 (100010) +50 + 49 = 35 (100011) +50 + 50 = 36 (100100) +50 + 51 = 37 (100101) +50 + 52 = 38 (100110) +50 + 53 = 39 (100111) +50 + 54 = 40 (101000) +50 + 55 = 41 (101001) +50 + 56 = 42 (101010) +50 + 57 = 43 (101011) +50 + 58 = 44 (101100) +50 + 59 = 45 (101101) +50 + 60 = 46 (101110) +50 + 61 = 47 (101111) +50 + 62 = 48 (110000) +50 + 63 = 49 (110001) +51 + 0 = 51 (110011) +51 + 1 = 52 (110100) +51 + 2 = 53 (110101) +51 + 3 = 54 (110110) +51 + 4 = 55 (110111) +51 + 5 = 56 (111000) +51 + 6 = 57 (111001) +51 + 7 = 58 (111010) +51 + 8 = 59 (111011) +51 + 9 = 60 (111100) +51 + 10 = 61 (111101) +51 + 11 = 62 (111110) +51 + 12 = 63 (111111) +51 + 13 = 0 (000000) +51 + 14 = 1 (000001) +51 + 15 = 2 (000010) +51 + 16 = 3 (000011) +51 + 17 = 4 (000100) +51 + 18 = 5 (000101) +51 + 19 = 6 (000110) +51 + 20 = 7 (000111) +51 + 21 = 8 (001000) +51 + 22 = 9 (001001) +51 + 23 = 10 (001010) +51 + 24 = 11 (001011) +51 + 25 = 12 (001100) +51 + 26 = 13 (001101) +51 + 27 = 14 (001110) +51 + 28 = 15 (001111) +51 + 29 = 16 (010000) +51 + 30 = 17 (010001) +51 + 31 = 18 (010010) +51 + 32 = 19 (010011) +51 + 33 = 20 (010100) +51 + 34 = 21 (010101) +51 + 35 = 22 (010110) +51 + 36 = 23 (010111) +51 + 37 = 24 (011000) +51 + 38 = 25 (011001) +51 + 39 = 26 (011010) +51 + 40 = 27 (011011) +51 + 41 = 28 (011100) +51 + 42 = 29 (011101) +51 + 43 = 30 (011110) +51 + 44 = 31 (011111) +51 + 45 = 32 (100000) +51 + 46 = 33 (100001) +51 + 47 = 34 (100010) +51 + 48 = 35 (100011) +51 + 49 = 36 (100100) +51 + 50 = 37 (100101) +51 + 51 = 38 (100110) +51 + 52 = 39 (100111) +51 + 53 = 40 (101000) +51 + 54 = 41 (101001) +51 + 55 = 42 (101010) +51 + 56 = 43 (101011) +51 + 57 = 44 (101100) +51 + 58 = 45 (101101) +51 + 59 = 46 (101110) +51 + 60 = 47 (101111) +51 + 61 = 48 (110000) +51 + 62 = 49 (110001) +51 + 63 = 50 (110010) +52 + 0 = 52 (110100) +52 + 1 = 53 (110101) +52 + 2 = 54 (110110) +52 + 3 = 55 (110111) +52 + 4 = 56 (111000) +52 + 5 = 57 (111001) +52 + 6 = 58 (111010) +52 + 7 = 59 (111011) +52 + 8 = 60 (111100) +52 + 9 = 61 (111101) +52 + 10 = 62 (111110) +52 + 11 = 63 (111111) +52 + 12 = 0 (000000) +52 + 13 = 1 (000001) +52 + 14 = 2 (000010) +52 + 15 = 3 (000011) +52 + 16 = 4 (000100) +52 + 17 = 5 (000101) +52 + 18 = 6 (000110) +52 + 19 = 7 (000111) +52 + 20 = 8 (001000) +52 + 21 = 9 (001001) +52 + 22 = 10 (001010) +52 + 23 = 11 (001011) +52 + 24 = 12 (001100) +52 + 25 = 13 (001101) +52 + 26 = 14 (001110) +52 + 27 = 15 (001111) +52 + 28 = 16 (010000) +52 + 29 = 17 (010001) +52 + 30 = 18 (010010) +52 + 31 = 19 (010011) +52 + 32 = 20 (010100) +52 + 33 = 21 (010101) +52 + 34 = 22 (010110) +52 + 35 = 23 (010111) +52 + 36 = 24 (011000) +52 + 37 = 25 (011001) +52 + 38 = 26 (011010) +52 + 39 = 27 (011011) +52 + 40 = 28 (011100) +52 + 41 = 29 (011101) +52 + 42 = 30 (011110) +52 + 43 = 31 (011111) +52 + 44 = 32 (100000) +52 + 45 = 33 (100001) +52 + 46 = 34 (100010) +52 + 47 = 35 (100011) +52 + 48 = 36 (100100) +52 + 49 = 37 (100101) +52 + 50 = 38 (100110) +52 + 51 = 39 (100111) +52 + 52 = 40 (101000) +52 + 53 = 41 (101001) +52 + 54 = 42 (101010) +52 + 55 = 43 (101011) +52 + 56 = 44 (101100) +52 + 57 = 45 (101101) +52 + 58 = 46 (101110) +52 + 59 = 47 (101111) +52 + 60 = 48 (110000) +52 + 61 = 49 (110001) +52 + 62 = 50 (110010) +52 + 63 = 51 (110011) +53 + 0 = 53 (110101) +53 + 1 = 54 (110110) +53 + 2 = 55 (110111) +53 + 3 = 56 (111000) +53 + 4 = 57 (111001) +53 + 5 = 58 (111010) +53 + 6 = 59 (111011) +53 + 7 = 60 (111100) +53 + 8 = 61 (111101) +53 + 9 = 62 (111110) +53 + 10 = 63 (111111) +53 + 11 = 0 (000000) +53 + 12 = 1 (000001) +53 + 13 = 2 (000010) +53 + 14 = 3 (000011) +53 + 15 = 4 (000100) +53 + 16 = 5 (000101) +53 + 17 = 6 (000110) +53 + 18 = 7 (000111) +53 + 19 = 8 (001000) +53 + 20 = 9 (001001) +53 + 21 = 10 (001010) +53 + 22 = 11 (001011) +53 + 23 = 12 (001100) +53 + 24 = 13 (001101) +53 + 25 = 14 (001110) +53 + 26 = 15 (001111) +53 + 27 = 16 (010000) +53 + 28 = 17 (010001) +53 + 29 = 18 (010010) +53 + 30 = 19 (010011) +53 + 31 = 20 (010100) +53 + 32 = 21 (010101) +53 + 33 = 22 (010110) +53 + 34 = 23 (010111) +53 + 35 = 24 (011000) +53 + 36 = 25 (011001) +53 + 37 = 26 (011010) +53 + 38 = 27 (011011) +53 + 39 = 28 (011100) +53 + 40 = 29 (011101) +53 + 41 = 30 (011110) +53 + 42 = 31 (011111) +53 + 43 = 32 (100000) +53 + 44 = 33 (100001) +53 + 45 = 34 (100010) +53 + 46 = 35 (100011) +53 + 47 = 36 (100100) +53 + 48 = 37 (100101) +53 + 49 = 38 (100110) +53 + 50 = 39 (100111) +53 + 51 = 40 (101000) +53 + 52 = 41 (101001) +53 + 53 = 42 (101010) +53 + 54 = 43 (101011) +53 + 55 = 44 (101100) +53 + 56 = 45 (101101) +53 + 57 = 46 (101110) +53 + 58 = 47 (101111) +53 + 59 = 48 (110000) +53 + 60 = 49 (110001) +53 + 61 = 50 (110010) +53 + 62 = 51 (110011) +53 + 63 = 52 (110100) +54 + 0 = 54 (110110) +54 + 1 = 55 (110111) +54 + 2 = 56 (111000) +54 + 3 = 57 (111001) +54 + 4 = 58 (111010) +54 + 5 = 59 (111011) +54 + 6 = 60 (111100) +54 + 7 = 61 (111101) +54 + 8 = 62 (111110) +54 + 9 = 63 (111111) +54 + 10 = 0 (000000) +54 + 11 = 1 (000001) +54 + 12 = 2 (000010) +54 + 13 = 3 (000011) +54 + 14 = 4 (000100) +54 + 15 = 5 (000101) +54 + 16 = 6 (000110) +54 + 17 = 7 (000111) +54 + 18 = 8 (001000) +54 + 19 = 9 (001001) +54 + 20 = 10 (001010) +54 + 21 = 11 (001011) +54 + 22 = 12 (001100) +54 + 23 = 13 (001101) +54 + 24 = 14 (001110) +54 + 25 = 15 (001111) +54 + 26 = 16 (010000) +54 + 27 = 17 (010001) +54 + 28 = 18 (010010) +54 + 29 = 19 (010011) +54 + 30 = 20 (010100) +54 + 31 = 21 (010101) +54 + 32 = 22 (010110) +54 + 33 = 23 (010111) +54 + 34 = 24 (011000) +54 + 35 = 25 (011001) +54 + 36 = 26 (011010) +54 + 37 = 27 (011011) +54 + 38 = 28 (011100) +54 + 39 = 29 (011101) +54 + 40 = 30 (011110) +54 + 41 = 31 (011111) +54 + 42 = 32 (100000) +54 + 43 = 33 (100001) +54 + 44 = 34 (100010) +54 + 45 = 35 (100011) +54 + 46 = 36 (100100) +54 + 47 = 37 (100101) +54 + 48 = 38 (100110) +54 + 49 = 39 (100111) +54 + 50 = 40 (101000) +54 + 51 = 41 (101001) +54 + 52 = 42 (101010) +54 + 53 = 43 (101011) +54 + 54 = 44 (101100) +54 + 55 = 45 (101101) +54 + 56 = 46 (101110) +54 + 57 = 47 (101111) +54 + 58 = 48 (110000) +54 + 59 = 49 (110001) +54 + 60 = 50 (110010) +54 + 61 = 51 (110011) +54 + 62 = 52 (110100) +54 + 63 = 53 (110101) +55 + 0 = 55 (110111) +55 + 1 = 56 (111000) +55 + 2 = 57 (111001) +55 + 3 = 58 (111010) +55 + 4 = 59 (111011) +55 + 5 = 60 (111100) +55 + 6 = 61 (111101) +55 + 7 = 62 (111110) +55 + 8 = 63 (111111) +55 + 9 = 0 (000000) +55 + 10 = 1 (000001) +55 + 11 = 2 (000010) +55 + 12 = 3 (000011) +55 + 13 = 4 (000100) +55 + 14 = 5 (000101) +55 + 15 = 6 (000110) +55 + 16 = 7 (000111) +55 + 17 = 8 (001000) +55 + 18 = 9 (001001) +55 + 19 = 10 (001010) +55 + 20 = 11 (001011) +55 + 21 = 12 (001100) +55 + 22 = 13 (001101) +55 + 23 = 14 (001110) +55 + 24 = 15 (001111) +55 + 25 = 16 (010000) +55 + 26 = 17 (010001) +55 + 27 = 18 (010010) +55 + 28 = 19 (010011) +55 + 29 = 20 (010100) +55 + 30 = 21 (010101) +55 + 31 = 22 (010110) +55 + 32 = 23 (010111) +55 + 33 = 24 (011000) +55 + 34 = 25 (011001) +55 + 35 = 26 (011010) +55 + 36 = 27 (011011) +55 + 37 = 28 (011100) +55 + 38 = 29 (011101) +55 + 39 = 30 (011110) +55 + 40 = 31 (011111) +55 + 41 = 32 (100000) +55 + 42 = 33 (100001) +55 + 43 = 34 (100010) +55 + 44 = 35 (100011) +55 + 45 = 36 (100100) +55 + 46 = 37 (100101) +55 + 47 = 38 (100110) +55 + 48 = 39 (100111) +55 + 49 = 40 (101000) +55 + 50 = 41 (101001) +55 + 51 = 42 (101010) +55 + 52 = 43 (101011) +55 + 53 = 44 (101100) +55 + 54 = 45 (101101) +55 + 55 = 46 (101110) +55 + 56 = 47 (101111) +55 + 57 = 48 (110000) +55 + 58 = 49 (110001) +55 + 59 = 50 (110010) +55 + 60 = 51 (110011) +55 + 61 = 52 (110100) +55 + 62 = 53 (110101) +55 + 63 = 54 (110110) +56 + 0 = 56 (111000) +56 + 1 = 57 (111001) +56 + 2 = 58 (111010) +56 + 3 = 59 (111011) +56 + 4 = 60 (111100) +56 + 5 = 61 (111101) +56 + 6 = 62 (111110) +56 + 7 = 63 (111111) +56 + 8 = 0 (000000) +56 + 9 = 1 (000001) +56 + 10 = 2 (000010) +56 + 11 = 3 (000011) +56 + 12 = 4 (000100) +56 + 13 = 5 (000101) +56 + 14 = 6 (000110) +56 + 15 = 7 (000111) +56 + 16 = 8 (001000) +56 + 17 = 9 (001001) +56 + 18 = 10 (001010) +56 + 19 = 11 (001011) +56 + 20 = 12 (001100) +56 + 21 = 13 (001101) +56 + 22 = 14 (001110) +56 + 23 = 15 (001111) +56 + 24 = 16 (010000) +56 + 25 = 17 (010001) +56 + 26 = 18 (010010) +56 + 27 = 19 (010011) +56 + 28 = 20 (010100) +56 + 29 = 21 (010101) +56 + 30 = 22 (010110) +56 + 31 = 23 (010111) +56 + 32 = 24 (011000) +56 + 33 = 25 (011001) +56 + 34 = 26 (011010) +56 + 35 = 27 (011011) +56 + 36 = 28 (011100) +56 + 37 = 29 (011101) +56 + 38 = 30 (011110) +56 + 39 = 31 (011111) +56 + 40 = 32 (100000) +56 + 41 = 33 (100001) +56 + 42 = 34 (100010) +56 + 43 = 35 (100011) +56 + 44 = 36 (100100) +56 + 45 = 37 (100101) +56 + 46 = 38 (100110) +56 + 47 = 39 (100111) +56 + 48 = 40 (101000) +56 + 49 = 41 (101001) +56 + 50 = 42 (101010) +56 + 51 = 43 (101011) +56 + 52 = 44 (101100) +56 + 53 = 45 (101101) +56 + 54 = 46 (101110) +56 + 55 = 47 (101111) +56 + 56 = 48 (110000) +56 + 57 = 49 (110001) +56 + 58 = 50 (110010) +56 + 59 = 51 (110011) +56 + 60 = 52 (110100) +56 + 61 = 53 (110101) +56 + 62 = 54 (110110) +56 + 63 = 55 (110111) +57 + 0 = 57 (111001) +57 + 1 = 58 (111010) +57 + 2 = 59 (111011) +57 + 3 = 60 (111100) +57 + 4 = 61 (111101) +57 + 5 = 62 (111110) +57 + 6 = 63 (111111) +57 + 7 = 0 (000000) +57 + 8 = 1 (000001) +57 + 9 = 2 (000010) +57 + 10 = 3 (000011) +57 + 11 = 4 (000100) +57 + 12 = 5 (000101) +57 + 13 = 6 (000110) +57 + 14 = 7 (000111) +57 + 15 = 8 (001000) +57 + 16 = 9 (001001) +57 + 17 = 10 (001010) +57 + 18 = 11 (001011) +57 + 19 = 12 (001100) +57 + 20 = 13 (001101) +57 + 21 = 14 (001110) +57 + 22 = 15 (001111) +57 + 23 = 16 (010000) +57 + 24 = 17 (010001) +57 + 25 = 18 (010010) +57 + 26 = 19 (010011) +57 + 27 = 20 (010100) +57 + 28 = 21 (010101) +57 + 29 = 22 (010110) +57 + 30 = 23 (010111) +57 + 31 = 24 (011000) +57 + 32 = 25 (011001) +57 + 33 = 26 (011010) +57 + 34 = 27 (011011) +57 + 35 = 28 (011100) +57 + 36 = 29 (011101) +57 + 37 = 30 (011110) +57 + 38 = 31 (011111) +57 + 39 = 32 (100000) +57 + 40 = 33 (100001) +57 + 41 = 34 (100010) +57 + 42 = 35 (100011) +57 + 43 = 36 (100100) +57 + 44 = 37 (100101) +57 + 45 = 38 (100110) +57 + 46 = 39 (100111) +57 + 47 = 40 (101000) +57 + 48 = 41 (101001) +57 + 49 = 42 (101010) +57 + 50 = 43 (101011) +57 + 51 = 44 (101100) +57 + 52 = 45 (101101) +57 + 53 = 46 (101110) +57 + 54 = 47 (101111) +57 + 55 = 48 (110000) +57 + 56 = 49 (110001) +57 + 57 = 50 (110010) +57 + 58 = 51 (110011) +57 + 59 = 52 (110100) +57 + 60 = 53 (110101) +57 + 61 = 54 (110110) +57 + 62 = 55 (110111) +57 + 63 = 56 (111000) +58 + 0 = 58 (111010) +58 + 1 = 59 (111011) +58 + 2 = 60 (111100) +58 + 3 = 61 (111101) +58 + 4 = 62 (111110) +58 + 5 = 63 (111111) +58 + 6 = 0 (000000) +58 + 7 = 1 (000001) +58 + 8 = 2 (000010) +58 + 9 = 3 (000011) +58 + 10 = 4 (000100) +58 + 11 = 5 (000101) +58 + 12 = 6 (000110) +58 + 13 = 7 (000111) +58 + 14 = 8 (001000) +58 + 15 = 9 (001001) +58 + 16 = 10 (001010) +58 + 17 = 11 (001011) +58 + 18 = 12 (001100) +58 + 19 = 13 (001101) +58 + 20 = 14 (001110) +58 + 21 = 15 (001111) +58 + 22 = 16 (010000) +58 + 23 = 17 (010001) +58 + 24 = 18 (010010) +58 + 25 = 19 (010011) +58 + 26 = 20 (010100) +58 + 27 = 21 (010101) +58 + 28 = 22 (010110) +58 + 29 = 23 (010111) +58 + 30 = 24 (011000) +58 + 31 = 25 (011001) +58 + 32 = 26 (011010) +58 + 33 = 27 (011011) +58 + 34 = 28 (011100) +58 + 35 = 29 (011101) +58 + 36 = 30 (011110) +58 + 37 = 31 (011111) +58 + 38 = 32 (100000) +58 + 39 = 33 (100001) +58 + 40 = 34 (100010) +58 + 41 = 35 (100011) +58 + 42 = 36 (100100) +58 + 43 = 37 (100101) +58 + 44 = 38 (100110) +58 + 45 = 39 (100111) +58 + 46 = 40 (101000) +58 + 47 = 41 (101001) +58 + 48 = 42 (101010) +58 + 49 = 43 (101011) +58 + 50 = 44 (101100) +58 + 51 = 45 (101101) +58 + 52 = 46 (101110) +58 + 53 = 47 (101111) +58 + 54 = 48 (110000) +58 + 55 = 49 (110001) +58 + 56 = 50 (110010) +58 + 57 = 51 (110011) +58 + 58 = 52 (110100) +58 + 59 = 53 (110101) +58 + 60 = 54 (110110) +58 + 61 = 55 (110111) +58 + 62 = 56 (111000) +58 + 63 = 57 (111001) +59 + 0 = 59 (111011) +59 + 1 = 60 (111100) +59 + 2 = 61 (111101) +59 + 3 = 62 (111110) +59 + 4 = 63 (111111) +59 + 5 = 0 (000000) +59 + 6 = 1 (000001) +59 + 7 = 2 (000010) +59 + 8 = 3 (000011) +59 + 9 = 4 (000100) +59 + 10 = 5 (000101) +59 + 11 = 6 (000110) +59 + 12 = 7 (000111) +59 + 13 = 8 (001000) +59 + 14 = 9 (001001) +59 + 15 = 10 (001010) +59 + 16 = 11 (001011) +59 + 17 = 12 (001100) +59 + 18 = 13 (001101) +59 + 19 = 14 (001110) +59 + 20 = 15 (001111) +59 + 21 = 16 (010000) +59 + 22 = 17 (010001) +59 + 23 = 18 (010010) +59 + 24 = 19 (010011) +59 + 25 = 20 (010100) +59 + 26 = 21 (010101) +59 + 27 = 22 (010110) +59 + 28 = 23 (010111) +59 + 29 = 24 (011000) +59 + 30 = 25 (011001) +59 + 31 = 26 (011010) +59 + 32 = 27 (011011) +59 + 33 = 28 (011100) +59 + 34 = 29 (011101) +59 + 35 = 30 (011110) +59 + 36 = 31 (011111) +59 + 37 = 32 (100000) +59 + 38 = 33 (100001) +59 + 39 = 34 (100010) +59 + 40 = 35 (100011) +59 + 41 = 36 (100100) +59 + 42 = 37 (100101) +59 + 43 = 38 (100110) +59 + 44 = 39 (100111) +59 + 45 = 40 (101000) +59 + 46 = 41 (101001) +59 + 47 = 42 (101010) +59 + 48 = 43 (101011) +59 + 49 = 44 (101100) +59 + 50 = 45 (101101) +59 + 51 = 46 (101110) +59 + 52 = 47 (101111) +59 + 53 = 48 (110000) +59 + 54 = 49 (110001) +59 + 55 = 50 (110010) +59 + 56 = 51 (110011) +59 + 57 = 52 (110100) +59 + 58 = 53 (110101) +59 + 59 = 54 (110110) +59 + 60 = 55 (110111) +59 + 61 = 56 (111000) +59 + 62 = 57 (111001) +59 + 63 = 58 (111010) +60 + 0 = 60 (111100) +60 + 1 = 61 (111101) +60 + 2 = 62 (111110) +60 + 3 = 63 (111111) +60 + 4 = 0 (000000) +60 + 5 = 1 (000001) +60 + 6 = 2 (000010) +60 + 7 = 3 (000011) +60 + 8 = 4 (000100) +60 + 9 = 5 (000101) +60 + 10 = 6 (000110) +60 + 11 = 7 (000111) +60 + 12 = 8 (001000) +60 + 13 = 9 (001001) +60 + 14 = 10 (001010) +60 + 15 = 11 (001011) +60 + 16 = 12 (001100) +60 + 17 = 13 (001101) +60 + 18 = 14 (001110) +60 + 19 = 15 (001111) +60 + 20 = 16 (010000) +60 + 21 = 17 (010001) +60 + 22 = 18 (010010) +60 + 23 = 19 (010011) +60 + 24 = 20 (010100) +60 + 25 = 21 (010101) +60 + 26 = 22 (010110) +60 + 27 = 23 (010111) +60 + 28 = 24 (011000) +60 + 29 = 25 (011001) +60 + 30 = 26 (011010) +60 + 31 = 27 (011011) +60 + 32 = 28 (011100) +60 + 33 = 29 (011101) +60 + 34 = 30 (011110) +60 + 35 = 31 (011111) +60 + 36 = 32 (100000) +60 + 37 = 33 (100001) +60 + 38 = 34 (100010) +60 + 39 = 35 (100011) +60 + 40 = 36 (100100) +60 + 41 = 37 (100101) +60 + 42 = 38 (100110) +60 + 43 = 39 (100111) +60 + 44 = 40 (101000) +60 + 45 = 41 (101001) +60 + 46 = 42 (101010) +60 + 47 = 43 (101011) +60 + 48 = 44 (101100) +60 + 49 = 45 (101101) +60 + 50 = 46 (101110) +60 + 51 = 47 (101111) +60 + 52 = 48 (110000) +60 + 53 = 49 (110001) +60 + 54 = 50 (110010) +60 + 55 = 51 (110011) +60 + 56 = 52 (110100) +60 + 57 = 53 (110101) +60 + 58 = 54 (110110) +60 + 59 = 55 (110111) +60 + 60 = 56 (111000) +60 + 61 = 57 (111001) +60 + 62 = 58 (111010) +60 + 63 = 59 (111011) +61 + 0 = 61 (111101) +61 + 1 = 62 (111110) +61 + 2 = 63 (111111) +61 + 3 = 0 (000000) +61 + 4 = 1 (000001) +61 + 5 = 2 (000010) +61 + 6 = 3 (000011) +61 + 7 = 4 (000100) +61 + 8 = 5 (000101) +61 + 9 = 6 (000110) +61 + 10 = 7 (000111) +61 + 11 = 8 (001000) +61 + 12 = 9 (001001) +61 + 13 = 10 (001010) +61 + 14 = 11 (001011) +61 + 15 = 12 (001100) +61 + 16 = 13 (001101) +61 + 17 = 14 (001110) +61 + 18 = 15 (001111) +61 + 19 = 16 (010000) +61 + 20 = 17 (010001) +61 + 21 = 18 (010010) +61 + 22 = 19 (010011) +61 + 23 = 20 (010100) +61 + 24 = 21 (010101) +61 + 25 = 22 (010110) +61 + 26 = 23 (010111) +61 + 27 = 24 (011000) +61 + 28 = 25 (011001) +61 + 29 = 26 (011010) +61 + 30 = 27 (011011) +61 + 31 = 28 (011100) +61 + 32 = 29 (011101) +61 + 33 = 30 (011110) +61 + 34 = 31 (011111) +61 + 35 = 32 (100000) +61 + 36 = 33 (100001) +61 + 37 = 34 (100010) +61 + 38 = 35 (100011) +61 + 39 = 36 (100100) +61 + 40 = 37 (100101) +61 + 41 = 38 (100110) +61 + 42 = 39 (100111) +61 + 43 = 40 (101000) +61 + 44 = 41 (101001) +61 + 45 = 42 (101010) +61 + 46 = 43 (101011) +61 + 47 = 44 (101100) +61 + 48 = 45 (101101) +61 + 49 = 46 (101110) +61 + 50 = 47 (101111) +61 + 51 = 48 (110000) +61 + 52 = 49 (110001) +61 + 53 = 50 (110010) +61 + 54 = 51 (110011) +61 + 55 = 52 (110100) +61 + 56 = 53 (110101) +61 + 57 = 54 (110110) +61 + 58 = 55 (110111) +61 + 59 = 56 (111000) +61 + 60 = 57 (111001) +61 + 61 = 58 (111010) +61 + 62 = 59 (111011) +61 + 63 = 60 (111100) +62 + 0 = 62 (111110) +62 + 1 = 63 (111111) +62 + 2 = 0 (000000) +62 + 3 = 1 (000001) +62 + 4 = 2 (000010) +62 + 5 = 3 (000011) +62 + 6 = 4 (000100) +62 + 7 = 5 (000101) +62 + 8 = 6 (000110) +62 + 9 = 7 (000111) +62 + 10 = 8 (001000) +62 + 11 = 9 (001001) +62 + 12 = 10 (001010) +62 + 13 = 11 (001011) +62 + 14 = 12 (001100) +62 + 15 = 13 (001101) +62 + 16 = 14 (001110) +62 + 17 = 15 (001111) +62 + 18 = 16 (010000) +62 + 19 = 17 (010001) +62 + 20 = 18 (010010) +62 + 21 = 19 (010011) +62 + 22 = 20 (010100) +62 + 23 = 21 (010101) +62 + 24 = 22 (010110) +62 + 25 = 23 (010111) +62 + 26 = 24 (011000) +62 + 27 = 25 (011001) +62 + 28 = 26 (011010) +62 + 29 = 27 (011011) +62 + 30 = 28 (011100) +62 + 31 = 29 (011101) +62 + 32 = 30 (011110) +62 + 33 = 31 (011111) +62 + 34 = 32 (100000) +62 + 35 = 33 (100001) +62 + 36 = 34 (100010) +62 + 37 = 35 (100011) +62 + 38 = 36 (100100) +62 + 39 = 37 (100101) +62 + 40 = 38 (100110) +62 + 41 = 39 (100111) +62 + 42 = 40 (101000) +62 + 43 = 41 (101001) +62 + 44 = 42 (101010) +62 + 45 = 43 (101011) +62 + 46 = 44 (101100) +62 + 47 = 45 (101101) +62 + 48 = 46 (101110) +62 + 49 = 47 (101111) +62 + 50 = 48 (110000) +62 + 51 = 49 (110001) +62 + 52 = 50 (110010) +62 + 53 = 51 (110011) +62 + 54 = 52 (110100) +62 + 55 = 53 (110101) +62 + 56 = 54 (110110) +62 + 57 = 55 (110111) +62 + 58 = 56 (111000) +62 + 59 = 57 (111001) +62 + 60 = 58 (111010) +62 + 61 = 59 (111011) +62 + 62 = 60 (111100) +62 + 63 = 61 (111101) +63 + 0 = 63 (111111) +63 + 1 = 0 (000000) +63 + 2 = 1 (000001) +63 + 3 = 2 (000010) +63 + 4 = 3 (000011) +63 + 5 = 4 (000100) +63 + 6 = 5 (000101) +63 + 7 = 6 (000110) +63 + 8 = 7 (000111) +63 + 9 = 8 (001000) +63 + 10 = 9 (001001) +63 + 11 = 10 (001010) +63 + 12 = 11 (001011) +63 + 13 = 12 (001100) +63 + 14 = 13 (001101) +63 + 15 = 14 (001110) +63 + 16 = 15 (001111) +63 + 17 = 16 (010000) +63 + 18 = 17 (010001) +63 + 19 = 18 (010010) +63 + 20 = 19 (010011) +63 + 21 = 20 (010100) +63 + 22 = 21 (010101) +63 + 23 = 22 (010110) +63 + 24 = 23 (010111) +63 + 25 = 24 (011000) +63 + 26 = 25 (011001) +63 + 27 = 26 (011010) +63 + 28 = 27 (011011) +63 + 29 = 28 (011100) +63 + 30 = 29 (011101) +63 + 31 = 30 (011110) +63 + 32 = 31 (011111) +63 + 33 = 32 (100000) +63 + 34 = 33 (100001) +63 + 35 = 34 (100010) +63 + 36 = 35 (100011) +63 + 37 = 36 (100100) +63 + 38 = 37 (100101) +63 + 39 = 38 (100110) +63 + 40 = 39 (100111) +63 + 41 = 40 (101000) +63 + 42 = 41 (101001) +63 + 43 = 42 (101010) +63 + 44 = 43 (101011) +63 + 45 = 44 (101100) +63 + 46 = 45 (101101) +63 + 47 = 46 (101110) +63 + 48 = 47 (101111) +63 + 49 = 48 (110000) +63 + 50 = 49 (110001) +63 + 51 = 50 (110010) +63 + 52 = 51 (110011) +63 + 53 = 52 (110100) +63 + 54 = 53 (110101) +63 + 55 = 54 (110110) +63 + 56 = 55 (110111) +63 + 57 = 56 (111000) +63 + 58 = 57 (111001) +63 + 59 = 58 (111010) +63 + 60 = 59 (111011) +63 + 61 = 60 (111100) +63 + 62 = 61 (111101) +63 + 63 = 62 (111110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/lost_carry.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/lost_carry.f new file mode 100644 index 000000000..e5ebe3a3b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/lost_carry.f @@ -0,0 +1,3 @@ +lost_carry/datawidth.cpp +lost_carry/stimgen.cpp +lost_carry/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/main.cpp new file mode 100644 index 000000000..3191d0641 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 6-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 6; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector in1 ("in1"); + signal_bool_vector in2 ("in2"); + signal_bool_vector result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/stimgen.h new file mode 100644 index 000000000..0a0e9900d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/lost_carry/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& result; + // Outputs + signal_bool_vector& in1; + signal_bool_vector& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& RESULT, + signal_bool_vector& IN1, + signal_bool_vector& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/common.h new file mode 100644 index 000000000..0eb606b60 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; +typedef sc_signal > signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/datawidth.cpp new file mode 100644 index 000000000..f5df52dd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_unsigned tmp_a (in1_width); + sc_unsigned tmp_b (in2_width); + sc_unsigned tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/datawidth.h new file mode 100644 index 000000000..618250503 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector7& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector7& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/golden/promote.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/golden/promote.log new file mode 100644 index 000000000..7cecb43ba --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/golden/promote.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) +0 + 0 = 0 (0000000) +0 + 1 = 1 (0000001) +0 + 2 = 2 (0000010) +0 + 3 = 3 (0000011) +0 + 4 = 4 (0000100) +0 + 5 = 5 (0000101) +0 + 6 = 6 (0000110) +0 + 7 = 7 (0000111) +0 + 8 = 8 (0001000) +0 + 9 = 9 (0001001) +0 + 10 = 10 (0001010) +0 + 11 = 11 (0001011) +0 + 12 = 12 (0001100) +0 + 13 = 13 (0001101) +0 + 14 = 14 (0001110) +0 + 15 = 15 (0001111) +0 + 16 = 16 (0010000) +0 + 17 = 17 (0010001) +0 + 18 = 18 (0010010) +0 + 19 = 19 (0010011) +0 + 20 = 20 (0010100) +0 + 21 = 21 (0010101) +0 + 22 = 22 (0010110) +0 + 23 = 23 (0010111) +0 + 24 = 24 (0011000) +0 + 25 = 25 (0011001) +0 + 26 = 26 (0011010) +0 + 27 = 27 (0011011) +0 + 28 = 28 (0011100) +0 + 29 = 29 (0011101) +0 + 30 = 30 (0011110) +0 + 31 = 31 (0011111) +0 + 32 = 32 (0100000) +0 + 33 = 33 (0100001) +0 + 34 = 34 (0100010) +0 + 35 = 35 (0100011) +0 + 36 = 36 (0100100) +0 + 37 = 37 (0100101) +0 + 38 = 38 (0100110) +0 + 39 = 39 (0100111) +0 + 40 = 40 (0101000) +0 + 41 = 41 (0101001) +0 + 42 = 42 (0101010) +0 + 43 = 43 (0101011) +0 + 44 = 44 (0101100) +0 + 45 = 45 (0101101) +0 + 46 = 46 (0101110) +0 + 47 = 47 (0101111) +0 + 48 = 48 (0110000) +0 + 49 = 49 (0110001) +0 + 50 = 50 (0110010) +0 + 51 = 51 (0110011) +0 + 52 = 52 (0110100) +0 + 53 = 53 (0110101) +0 + 54 = 54 (0110110) +0 + 55 = 55 (0110111) +0 + 56 = 56 (0111000) +0 + 57 = 57 (0111001) +0 + 58 = 58 (0111010) +0 + 59 = 59 (0111011) +0 + 60 = 60 (0111100) +0 + 61 = 61 (0111101) +0 + 62 = 62 (0111110) +0 + 63 = 63 (0111111) +1 + 0 = 1 (0000001) +1 + 1 = 2 (0000010) +1 + 2 = 3 (0000011) +1 + 3 = 4 (0000100) +1 + 4 = 5 (0000101) +1 + 5 = 6 (0000110) +1 + 6 = 7 (0000111) +1 + 7 = 8 (0001000) +1 + 8 = 9 (0001001) +1 + 9 = 10 (0001010) +1 + 10 = 11 (0001011) +1 + 11 = 12 (0001100) +1 + 12 = 13 (0001101) +1 + 13 = 14 (0001110) +1 + 14 = 15 (0001111) +1 + 15 = 16 (0010000) +1 + 16 = 17 (0010001) +1 + 17 = 18 (0010010) +1 + 18 = 19 (0010011) +1 + 19 = 20 (0010100) +1 + 20 = 21 (0010101) +1 + 21 = 22 (0010110) +1 + 22 = 23 (0010111) +1 + 23 = 24 (0011000) +1 + 24 = 25 (0011001) +1 + 25 = 26 (0011010) +1 + 26 = 27 (0011011) +1 + 27 = 28 (0011100) +1 + 28 = 29 (0011101) +1 + 29 = 30 (0011110) +1 + 30 = 31 (0011111) +1 + 31 = 32 (0100000) +1 + 32 = 33 (0100001) +1 + 33 = 34 (0100010) +1 + 34 = 35 (0100011) +1 + 35 = 36 (0100100) +1 + 36 = 37 (0100101) +1 + 37 = 38 (0100110) +1 + 38 = 39 (0100111) +1 + 39 = 40 (0101000) +1 + 40 = 41 (0101001) +1 + 41 = 42 (0101010) +1 + 42 = 43 (0101011) +1 + 43 = 44 (0101100) +1 + 44 = 45 (0101101) +1 + 45 = 46 (0101110) +1 + 46 = 47 (0101111) +1 + 47 = 48 (0110000) +1 + 48 = 49 (0110001) +1 + 49 = 50 (0110010) +1 + 50 = 51 (0110011) +1 + 51 = 52 (0110100) +1 + 52 = 53 (0110101) +1 + 53 = 54 (0110110) +1 + 54 = 55 (0110111) +1 + 55 = 56 (0111000) +1 + 56 = 57 (0111001) +1 + 57 = 58 (0111010) +1 + 58 = 59 (0111011) +1 + 59 = 60 (0111100) +1 + 60 = 61 (0111101) +1 + 61 = 62 (0111110) +1 + 62 = 63 (0111111) +1 + 63 = 64 (1000000) +2 + 0 = 2 (0000010) +2 + 1 = 3 (0000011) +2 + 2 = 4 (0000100) +2 + 3 = 5 (0000101) +2 + 4 = 6 (0000110) +2 + 5 = 7 (0000111) +2 + 6 = 8 (0001000) +2 + 7 = 9 (0001001) +2 + 8 = 10 (0001010) +2 + 9 = 11 (0001011) +2 + 10 = 12 (0001100) +2 + 11 = 13 (0001101) +2 + 12 = 14 (0001110) +2 + 13 = 15 (0001111) +2 + 14 = 16 (0010000) +2 + 15 = 17 (0010001) +2 + 16 = 18 (0010010) +2 + 17 = 19 (0010011) +2 + 18 = 20 (0010100) +2 + 19 = 21 (0010101) +2 + 20 = 22 (0010110) +2 + 21 = 23 (0010111) +2 + 22 = 24 (0011000) +2 + 23 = 25 (0011001) +2 + 24 = 26 (0011010) +2 + 25 = 27 (0011011) +2 + 26 = 28 (0011100) +2 + 27 = 29 (0011101) +2 + 28 = 30 (0011110) +2 + 29 = 31 (0011111) +2 + 30 = 32 (0100000) +2 + 31 = 33 (0100001) +2 + 32 = 34 (0100010) +2 + 33 = 35 (0100011) +2 + 34 = 36 (0100100) +2 + 35 = 37 (0100101) +2 + 36 = 38 (0100110) +2 + 37 = 39 (0100111) +2 + 38 = 40 (0101000) +2 + 39 = 41 (0101001) +2 + 40 = 42 (0101010) +2 + 41 = 43 (0101011) +2 + 42 = 44 (0101100) +2 + 43 = 45 (0101101) +2 + 44 = 46 (0101110) +2 + 45 = 47 (0101111) +2 + 46 = 48 (0110000) +2 + 47 = 49 (0110001) +2 + 48 = 50 (0110010) +2 + 49 = 51 (0110011) +2 + 50 = 52 (0110100) +2 + 51 = 53 (0110101) +2 + 52 = 54 (0110110) +2 + 53 = 55 (0110111) +2 + 54 = 56 (0111000) +2 + 55 = 57 (0111001) +2 + 56 = 58 (0111010) +2 + 57 = 59 (0111011) +2 + 58 = 60 (0111100) +2 + 59 = 61 (0111101) +2 + 60 = 62 (0111110) +2 + 61 = 63 (0111111) +2 + 62 = 64 (1000000) +2 + 63 = 65 (1000001) +3 + 0 = 3 (0000011) +3 + 1 = 4 (0000100) +3 + 2 = 5 (0000101) +3 + 3 = 6 (0000110) +3 + 4 = 7 (0000111) +3 + 5 = 8 (0001000) +3 + 6 = 9 (0001001) +3 + 7 = 10 (0001010) +3 + 8 = 11 (0001011) +3 + 9 = 12 (0001100) +3 + 10 = 13 (0001101) +3 + 11 = 14 (0001110) +3 + 12 = 15 (0001111) +3 + 13 = 16 (0010000) +3 + 14 = 17 (0010001) +3 + 15 = 18 (0010010) +3 + 16 = 19 (0010011) +3 + 17 = 20 (0010100) +3 + 18 = 21 (0010101) +3 + 19 = 22 (0010110) +3 + 20 = 23 (0010111) +3 + 21 = 24 (0011000) +3 + 22 = 25 (0011001) +3 + 23 = 26 (0011010) +3 + 24 = 27 (0011011) +3 + 25 = 28 (0011100) +3 + 26 = 29 (0011101) +3 + 27 = 30 (0011110) +3 + 28 = 31 (0011111) +3 + 29 = 32 (0100000) +3 + 30 = 33 (0100001) +3 + 31 = 34 (0100010) +3 + 32 = 35 (0100011) +3 + 33 = 36 (0100100) +3 + 34 = 37 (0100101) +3 + 35 = 38 (0100110) +3 + 36 = 39 (0100111) +3 + 37 = 40 (0101000) +3 + 38 = 41 (0101001) +3 + 39 = 42 (0101010) +3 + 40 = 43 (0101011) +3 + 41 = 44 (0101100) +3 + 42 = 45 (0101101) +3 + 43 = 46 (0101110) +3 + 44 = 47 (0101111) +3 + 45 = 48 (0110000) +3 + 46 = 49 (0110001) +3 + 47 = 50 (0110010) +3 + 48 = 51 (0110011) +3 + 49 = 52 (0110100) +3 + 50 = 53 (0110101) +3 + 51 = 54 (0110110) +3 + 52 = 55 (0110111) +3 + 53 = 56 (0111000) +3 + 54 = 57 (0111001) +3 + 55 = 58 (0111010) +3 + 56 = 59 (0111011) +3 + 57 = 60 (0111100) +3 + 58 = 61 (0111101) +3 + 59 = 62 (0111110) +3 + 60 = 63 (0111111) +3 + 61 = 64 (1000000) +3 + 62 = 65 (1000001) +3 + 63 = 66 (1000010) +4 + 0 = 4 (0000100) +4 + 1 = 5 (0000101) +4 + 2 = 6 (0000110) +4 + 3 = 7 (0000111) +4 + 4 = 8 (0001000) +4 + 5 = 9 (0001001) +4 + 6 = 10 (0001010) +4 + 7 = 11 (0001011) +4 + 8 = 12 (0001100) +4 + 9 = 13 (0001101) +4 + 10 = 14 (0001110) +4 + 11 = 15 (0001111) +4 + 12 = 16 (0010000) +4 + 13 = 17 (0010001) +4 + 14 = 18 (0010010) +4 + 15 = 19 (0010011) +4 + 16 = 20 (0010100) +4 + 17 = 21 (0010101) +4 + 18 = 22 (0010110) +4 + 19 = 23 (0010111) +4 + 20 = 24 (0011000) +4 + 21 = 25 (0011001) +4 + 22 = 26 (0011010) +4 + 23 = 27 (0011011) +4 + 24 = 28 (0011100) +4 + 25 = 29 (0011101) +4 + 26 = 30 (0011110) +4 + 27 = 31 (0011111) +4 + 28 = 32 (0100000) +4 + 29 = 33 (0100001) +4 + 30 = 34 (0100010) +4 + 31 = 35 (0100011) +4 + 32 = 36 (0100100) +4 + 33 = 37 (0100101) +4 + 34 = 38 (0100110) +4 + 35 = 39 (0100111) +4 + 36 = 40 (0101000) +4 + 37 = 41 (0101001) +4 + 38 = 42 (0101010) +4 + 39 = 43 (0101011) +4 + 40 = 44 (0101100) +4 + 41 = 45 (0101101) +4 + 42 = 46 (0101110) +4 + 43 = 47 (0101111) +4 + 44 = 48 (0110000) +4 + 45 = 49 (0110001) +4 + 46 = 50 (0110010) +4 + 47 = 51 (0110011) +4 + 48 = 52 (0110100) +4 + 49 = 53 (0110101) +4 + 50 = 54 (0110110) +4 + 51 = 55 (0110111) +4 + 52 = 56 (0111000) +4 + 53 = 57 (0111001) +4 + 54 = 58 (0111010) +4 + 55 = 59 (0111011) +4 + 56 = 60 (0111100) +4 + 57 = 61 (0111101) +4 + 58 = 62 (0111110) +4 + 59 = 63 (0111111) +4 + 60 = 64 (1000000) +4 + 61 = 65 (1000001) +4 + 62 = 66 (1000010) +4 + 63 = 67 (1000011) +5 + 0 = 5 (0000101) +5 + 1 = 6 (0000110) +5 + 2 = 7 (0000111) +5 + 3 = 8 (0001000) +5 + 4 = 9 (0001001) +5 + 5 = 10 (0001010) +5 + 6 = 11 (0001011) +5 + 7 = 12 (0001100) +5 + 8 = 13 (0001101) +5 + 9 = 14 (0001110) +5 + 10 = 15 (0001111) +5 + 11 = 16 (0010000) +5 + 12 = 17 (0010001) +5 + 13 = 18 (0010010) +5 + 14 = 19 (0010011) +5 + 15 = 20 (0010100) +5 + 16 = 21 (0010101) +5 + 17 = 22 (0010110) +5 + 18 = 23 (0010111) +5 + 19 = 24 (0011000) +5 + 20 = 25 (0011001) +5 + 21 = 26 (0011010) +5 + 22 = 27 (0011011) +5 + 23 = 28 (0011100) +5 + 24 = 29 (0011101) +5 + 25 = 30 (0011110) +5 + 26 = 31 (0011111) +5 + 27 = 32 (0100000) +5 + 28 = 33 (0100001) +5 + 29 = 34 (0100010) +5 + 30 = 35 (0100011) +5 + 31 = 36 (0100100) +5 + 32 = 37 (0100101) +5 + 33 = 38 (0100110) +5 + 34 = 39 (0100111) +5 + 35 = 40 (0101000) +5 + 36 = 41 (0101001) +5 + 37 = 42 (0101010) +5 + 38 = 43 (0101011) +5 + 39 = 44 (0101100) +5 + 40 = 45 (0101101) +5 + 41 = 46 (0101110) +5 + 42 = 47 (0101111) +5 + 43 = 48 (0110000) +5 + 44 = 49 (0110001) +5 + 45 = 50 (0110010) +5 + 46 = 51 (0110011) +5 + 47 = 52 (0110100) +5 + 48 = 53 (0110101) +5 + 49 = 54 (0110110) +5 + 50 = 55 (0110111) +5 + 51 = 56 (0111000) +5 + 52 = 57 (0111001) +5 + 53 = 58 (0111010) +5 + 54 = 59 (0111011) +5 + 55 = 60 (0111100) +5 + 56 = 61 (0111101) +5 + 57 = 62 (0111110) +5 + 58 = 63 (0111111) +5 + 59 = 64 (1000000) +5 + 60 = 65 (1000001) +5 + 61 = 66 (1000010) +5 + 62 = 67 (1000011) +5 + 63 = 68 (1000100) +6 + 0 = 6 (0000110) +6 + 1 = 7 (0000111) +6 + 2 = 8 (0001000) +6 + 3 = 9 (0001001) +6 + 4 = 10 (0001010) +6 + 5 = 11 (0001011) +6 + 6 = 12 (0001100) +6 + 7 = 13 (0001101) +6 + 8 = 14 (0001110) +6 + 9 = 15 (0001111) +6 + 10 = 16 (0010000) +6 + 11 = 17 (0010001) +6 + 12 = 18 (0010010) +6 + 13 = 19 (0010011) +6 + 14 = 20 (0010100) +6 + 15 = 21 (0010101) +6 + 16 = 22 (0010110) +6 + 17 = 23 (0010111) +6 + 18 = 24 (0011000) +6 + 19 = 25 (0011001) +6 + 20 = 26 (0011010) +6 + 21 = 27 (0011011) +6 + 22 = 28 (0011100) +6 + 23 = 29 (0011101) +6 + 24 = 30 (0011110) +6 + 25 = 31 (0011111) +6 + 26 = 32 (0100000) +6 + 27 = 33 (0100001) +6 + 28 = 34 (0100010) +6 + 29 = 35 (0100011) +6 + 30 = 36 (0100100) +6 + 31 = 37 (0100101) +6 + 32 = 38 (0100110) +6 + 33 = 39 (0100111) +6 + 34 = 40 (0101000) +6 + 35 = 41 (0101001) +6 + 36 = 42 (0101010) +6 + 37 = 43 (0101011) +6 + 38 = 44 (0101100) +6 + 39 = 45 (0101101) +6 + 40 = 46 (0101110) +6 + 41 = 47 (0101111) +6 + 42 = 48 (0110000) +6 + 43 = 49 (0110001) +6 + 44 = 50 (0110010) +6 + 45 = 51 (0110011) +6 + 46 = 52 (0110100) +6 + 47 = 53 (0110101) +6 + 48 = 54 (0110110) +6 + 49 = 55 (0110111) +6 + 50 = 56 (0111000) +6 + 51 = 57 (0111001) +6 + 52 = 58 (0111010) +6 + 53 = 59 (0111011) +6 + 54 = 60 (0111100) +6 + 55 = 61 (0111101) +6 + 56 = 62 (0111110) +6 + 57 = 63 (0111111) +6 + 58 = 64 (1000000) +6 + 59 = 65 (1000001) +6 + 60 = 66 (1000010) +6 + 61 = 67 (1000011) +6 + 62 = 68 (1000100) +6 + 63 = 69 (1000101) +7 + 0 = 7 (0000111) +7 + 1 = 8 (0001000) +7 + 2 = 9 (0001001) +7 + 3 = 10 (0001010) +7 + 4 = 11 (0001011) +7 + 5 = 12 (0001100) +7 + 6 = 13 (0001101) +7 + 7 = 14 (0001110) +7 + 8 = 15 (0001111) +7 + 9 = 16 (0010000) +7 + 10 = 17 (0010001) +7 + 11 = 18 (0010010) +7 + 12 = 19 (0010011) +7 + 13 = 20 (0010100) +7 + 14 = 21 (0010101) +7 + 15 = 22 (0010110) +7 + 16 = 23 (0010111) +7 + 17 = 24 (0011000) +7 + 18 = 25 (0011001) +7 + 19 = 26 (0011010) +7 + 20 = 27 (0011011) +7 + 21 = 28 (0011100) +7 + 22 = 29 (0011101) +7 + 23 = 30 (0011110) +7 + 24 = 31 (0011111) +7 + 25 = 32 (0100000) +7 + 26 = 33 (0100001) +7 + 27 = 34 (0100010) +7 + 28 = 35 (0100011) +7 + 29 = 36 (0100100) +7 + 30 = 37 (0100101) +7 + 31 = 38 (0100110) +7 + 32 = 39 (0100111) +7 + 33 = 40 (0101000) +7 + 34 = 41 (0101001) +7 + 35 = 42 (0101010) +7 + 36 = 43 (0101011) +7 + 37 = 44 (0101100) +7 + 38 = 45 (0101101) +7 + 39 = 46 (0101110) +7 + 40 = 47 (0101111) +7 + 41 = 48 (0110000) +7 + 42 = 49 (0110001) +7 + 43 = 50 (0110010) +7 + 44 = 51 (0110011) +7 + 45 = 52 (0110100) +7 + 46 = 53 (0110101) +7 + 47 = 54 (0110110) +7 + 48 = 55 (0110111) +7 + 49 = 56 (0111000) +7 + 50 = 57 (0111001) +7 + 51 = 58 (0111010) +7 + 52 = 59 (0111011) +7 + 53 = 60 (0111100) +7 + 54 = 61 (0111101) +7 + 55 = 62 (0111110) +7 + 56 = 63 (0111111) +7 + 57 = 64 (1000000) +7 + 58 = 65 (1000001) +7 + 59 = 66 (1000010) +7 + 60 = 67 (1000011) +7 + 61 = 68 (1000100) +7 + 62 = 69 (1000101) +7 + 63 = 70 (1000110) +8 + 0 = 8 (0001000) +8 + 1 = 9 (0001001) +8 + 2 = 10 (0001010) +8 + 3 = 11 (0001011) +8 + 4 = 12 (0001100) +8 + 5 = 13 (0001101) +8 + 6 = 14 (0001110) +8 + 7 = 15 (0001111) +8 + 8 = 16 (0010000) +8 + 9 = 17 (0010001) +8 + 10 = 18 (0010010) +8 + 11 = 19 (0010011) +8 + 12 = 20 (0010100) +8 + 13 = 21 (0010101) +8 + 14 = 22 (0010110) +8 + 15 = 23 (0010111) +8 + 16 = 24 (0011000) +8 + 17 = 25 (0011001) +8 + 18 = 26 (0011010) +8 + 19 = 27 (0011011) +8 + 20 = 28 (0011100) +8 + 21 = 29 (0011101) +8 + 22 = 30 (0011110) +8 + 23 = 31 (0011111) +8 + 24 = 32 (0100000) +8 + 25 = 33 (0100001) +8 + 26 = 34 (0100010) +8 + 27 = 35 (0100011) +8 + 28 = 36 (0100100) +8 + 29 = 37 (0100101) +8 + 30 = 38 (0100110) +8 + 31 = 39 (0100111) +8 + 32 = 40 (0101000) +8 + 33 = 41 (0101001) +8 + 34 = 42 (0101010) +8 + 35 = 43 (0101011) +8 + 36 = 44 (0101100) +8 + 37 = 45 (0101101) +8 + 38 = 46 (0101110) +8 + 39 = 47 (0101111) +8 + 40 = 48 (0110000) +8 + 41 = 49 (0110001) +8 + 42 = 50 (0110010) +8 + 43 = 51 (0110011) +8 + 44 = 52 (0110100) +8 + 45 = 53 (0110101) +8 + 46 = 54 (0110110) +8 + 47 = 55 (0110111) +8 + 48 = 56 (0111000) +8 + 49 = 57 (0111001) +8 + 50 = 58 (0111010) +8 + 51 = 59 (0111011) +8 + 52 = 60 (0111100) +8 + 53 = 61 (0111101) +8 + 54 = 62 (0111110) +8 + 55 = 63 (0111111) +8 + 56 = 64 (1000000) +8 + 57 = 65 (1000001) +8 + 58 = 66 (1000010) +8 + 59 = 67 (1000011) +8 + 60 = 68 (1000100) +8 + 61 = 69 (1000101) +8 + 62 = 70 (1000110) +8 + 63 = 71 (1000111) +9 + 0 = 9 (0001001) +9 + 1 = 10 (0001010) +9 + 2 = 11 (0001011) +9 + 3 = 12 (0001100) +9 + 4 = 13 (0001101) +9 + 5 = 14 (0001110) +9 + 6 = 15 (0001111) +9 + 7 = 16 (0010000) +9 + 8 = 17 (0010001) +9 + 9 = 18 (0010010) +9 + 10 = 19 (0010011) +9 + 11 = 20 (0010100) +9 + 12 = 21 (0010101) +9 + 13 = 22 (0010110) +9 + 14 = 23 (0010111) +9 + 15 = 24 (0011000) +9 + 16 = 25 (0011001) +9 + 17 = 26 (0011010) +9 + 18 = 27 (0011011) +9 + 19 = 28 (0011100) +9 + 20 = 29 (0011101) +9 + 21 = 30 (0011110) +9 + 22 = 31 (0011111) +9 + 23 = 32 (0100000) +9 + 24 = 33 (0100001) +9 + 25 = 34 (0100010) +9 + 26 = 35 (0100011) +9 + 27 = 36 (0100100) +9 + 28 = 37 (0100101) +9 + 29 = 38 (0100110) +9 + 30 = 39 (0100111) +9 + 31 = 40 (0101000) +9 + 32 = 41 (0101001) +9 + 33 = 42 (0101010) +9 + 34 = 43 (0101011) +9 + 35 = 44 (0101100) +9 + 36 = 45 (0101101) +9 + 37 = 46 (0101110) +9 + 38 = 47 (0101111) +9 + 39 = 48 (0110000) +9 + 40 = 49 (0110001) +9 + 41 = 50 (0110010) +9 + 42 = 51 (0110011) +9 + 43 = 52 (0110100) +9 + 44 = 53 (0110101) +9 + 45 = 54 (0110110) +9 + 46 = 55 (0110111) +9 + 47 = 56 (0111000) +9 + 48 = 57 (0111001) +9 + 49 = 58 (0111010) +9 + 50 = 59 (0111011) +9 + 51 = 60 (0111100) +9 + 52 = 61 (0111101) +9 + 53 = 62 (0111110) +9 + 54 = 63 (0111111) +9 + 55 = 64 (1000000) +9 + 56 = 65 (1000001) +9 + 57 = 66 (1000010) +9 + 58 = 67 (1000011) +9 + 59 = 68 (1000100) +9 + 60 = 69 (1000101) +9 + 61 = 70 (1000110) +9 + 62 = 71 (1000111) +9 + 63 = 72 (1001000) +10 + 0 = 10 (0001010) +10 + 1 = 11 (0001011) +10 + 2 = 12 (0001100) +10 + 3 = 13 (0001101) +10 + 4 = 14 (0001110) +10 + 5 = 15 (0001111) +10 + 6 = 16 (0010000) +10 + 7 = 17 (0010001) +10 + 8 = 18 (0010010) +10 + 9 = 19 (0010011) +10 + 10 = 20 (0010100) +10 + 11 = 21 (0010101) +10 + 12 = 22 (0010110) +10 + 13 = 23 (0010111) +10 + 14 = 24 (0011000) +10 + 15 = 25 (0011001) +10 + 16 = 26 (0011010) +10 + 17 = 27 (0011011) +10 + 18 = 28 (0011100) +10 + 19 = 29 (0011101) +10 + 20 = 30 (0011110) +10 + 21 = 31 (0011111) +10 + 22 = 32 (0100000) +10 + 23 = 33 (0100001) +10 + 24 = 34 (0100010) +10 + 25 = 35 (0100011) +10 + 26 = 36 (0100100) +10 + 27 = 37 (0100101) +10 + 28 = 38 (0100110) +10 + 29 = 39 (0100111) +10 + 30 = 40 (0101000) +10 + 31 = 41 (0101001) +10 + 32 = 42 (0101010) +10 + 33 = 43 (0101011) +10 + 34 = 44 (0101100) +10 + 35 = 45 (0101101) +10 + 36 = 46 (0101110) +10 + 37 = 47 (0101111) +10 + 38 = 48 (0110000) +10 + 39 = 49 (0110001) +10 + 40 = 50 (0110010) +10 + 41 = 51 (0110011) +10 + 42 = 52 (0110100) +10 + 43 = 53 (0110101) +10 + 44 = 54 (0110110) +10 + 45 = 55 (0110111) +10 + 46 = 56 (0111000) +10 + 47 = 57 (0111001) +10 + 48 = 58 (0111010) +10 + 49 = 59 (0111011) +10 + 50 = 60 (0111100) +10 + 51 = 61 (0111101) +10 + 52 = 62 (0111110) +10 + 53 = 63 (0111111) +10 + 54 = 64 (1000000) +10 + 55 = 65 (1000001) +10 + 56 = 66 (1000010) +10 + 57 = 67 (1000011) +10 + 58 = 68 (1000100) +10 + 59 = 69 (1000101) +10 + 60 = 70 (1000110) +10 + 61 = 71 (1000111) +10 + 62 = 72 (1001000) +10 + 63 = 73 (1001001) +11 + 0 = 11 (0001011) +11 + 1 = 12 (0001100) +11 + 2 = 13 (0001101) +11 + 3 = 14 (0001110) +11 + 4 = 15 (0001111) +11 + 5 = 16 (0010000) +11 + 6 = 17 (0010001) +11 + 7 = 18 (0010010) +11 + 8 = 19 (0010011) +11 + 9 = 20 (0010100) +11 + 10 = 21 (0010101) +11 + 11 = 22 (0010110) +11 + 12 = 23 (0010111) +11 + 13 = 24 (0011000) +11 + 14 = 25 (0011001) +11 + 15 = 26 (0011010) +11 + 16 = 27 (0011011) +11 + 17 = 28 (0011100) +11 + 18 = 29 (0011101) +11 + 19 = 30 (0011110) +11 + 20 = 31 (0011111) +11 + 21 = 32 (0100000) +11 + 22 = 33 (0100001) +11 + 23 = 34 (0100010) +11 + 24 = 35 (0100011) +11 + 25 = 36 (0100100) +11 + 26 = 37 (0100101) +11 + 27 = 38 (0100110) +11 + 28 = 39 (0100111) +11 + 29 = 40 (0101000) +11 + 30 = 41 (0101001) +11 + 31 = 42 (0101010) +11 + 32 = 43 (0101011) +11 + 33 = 44 (0101100) +11 + 34 = 45 (0101101) +11 + 35 = 46 (0101110) +11 + 36 = 47 (0101111) +11 + 37 = 48 (0110000) +11 + 38 = 49 (0110001) +11 + 39 = 50 (0110010) +11 + 40 = 51 (0110011) +11 + 41 = 52 (0110100) +11 + 42 = 53 (0110101) +11 + 43 = 54 (0110110) +11 + 44 = 55 (0110111) +11 + 45 = 56 (0111000) +11 + 46 = 57 (0111001) +11 + 47 = 58 (0111010) +11 + 48 = 59 (0111011) +11 + 49 = 60 (0111100) +11 + 50 = 61 (0111101) +11 + 51 = 62 (0111110) +11 + 52 = 63 (0111111) +11 + 53 = 64 (1000000) +11 + 54 = 65 (1000001) +11 + 55 = 66 (1000010) +11 + 56 = 67 (1000011) +11 + 57 = 68 (1000100) +11 + 58 = 69 (1000101) +11 + 59 = 70 (1000110) +11 + 60 = 71 (1000111) +11 + 61 = 72 (1001000) +11 + 62 = 73 (1001001) +11 + 63 = 74 (1001010) +12 + 0 = 12 (0001100) +12 + 1 = 13 (0001101) +12 + 2 = 14 (0001110) +12 + 3 = 15 (0001111) +12 + 4 = 16 (0010000) +12 + 5 = 17 (0010001) +12 + 6 = 18 (0010010) +12 + 7 = 19 (0010011) +12 + 8 = 20 (0010100) +12 + 9 = 21 (0010101) +12 + 10 = 22 (0010110) +12 + 11 = 23 (0010111) +12 + 12 = 24 (0011000) +12 + 13 = 25 (0011001) +12 + 14 = 26 (0011010) +12 + 15 = 27 (0011011) +12 + 16 = 28 (0011100) +12 + 17 = 29 (0011101) +12 + 18 = 30 (0011110) +12 + 19 = 31 (0011111) +12 + 20 = 32 (0100000) +12 + 21 = 33 (0100001) +12 + 22 = 34 (0100010) +12 + 23 = 35 (0100011) +12 + 24 = 36 (0100100) +12 + 25 = 37 (0100101) +12 + 26 = 38 (0100110) +12 + 27 = 39 (0100111) +12 + 28 = 40 (0101000) +12 + 29 = 41 (0101001) +12 + 30 = 42 (0101010) +12 + 31 = 43 (0101011) +12 + 32 = 44 (0101100) +12 + 33 = 45 (0101101) +12 + 34 = 46 (0101110) +12 + 35 = 47 (0101111) +12 + 36 = 48 (0110000) +12 + 37 = 49 (0110001) +12 + 38 = 50 (0110010) +12 + 39 = 51 (0110011) +12 + 40 = 52 (0110100) +12 + 41 = 53 (0110101) +12 + 42 = 54 (0110110) +12 + 43 = 55 (0110111) +12 + 44 = 56 (0111000) +12 + 45 = 57 (0111001) +12 + 46 = 58 (0111010) +12 + 47 = 59 (0111011) +12 + 48 = 60 (0111100) +12 + 49 = 61 (0111101) +12 + 50 = 62 (0111110) +12 + 51 = 63 (0111111) +12 + 52 = 64 (1000000) +12 + 53 = 65 (1000001) +12 + 54 = 66 (1000010) +12 + 55 = 67 (1000011) +12 + 56 = 68 (1000100) +12 + 57 = 69 (1000101) +12 + 58 = 70 (1000110) +12 + 59 = 71 (1000111) +12 + 60 = 72 (1001000) +12 + 61 = 73 (1001001) +12 + 62 = 74 (1001010) +12 + 63 = 75 (1001011) +13 + 0 = 13 (0001101) +13 + 1 = 14 (0001110) +13 + 2 = 15 (0001111) +13 + 3 = 16 (0010000) +13 + 4 = 17 (0010001) +13 + 5 = 18 (0010010) +13 + 6 = 19 (0010011) +13 + 7 = 20 (0010100) +13 + 8 = 21 (0010101) +13 + 9 = 22 (0010110) +13 + 10 = 23 (0010111) +13 + 11 = 24 (0011000) +13 + 12 = 25 (0011001) +13 + 13 = 26 (0011010) +13 + 14 = 27 (0011011) +13 + 15 = 28 (0011100) +13 + 16 = 29 (0011101) +13 + 17 = 30 (0011110) +13 + 18 = 31 (0011111) +13 + 19 = 32 (0100000) +13 + 20 = 33 (0100001) +13 + 21 = 34 (0100010) +13 + 22 = 35 (0100011) +13 + 23 = 36 (0100100) +13 + 24 = 37 (0100101) +13 + 25 = 38 (0100110) +13 + 26 = 39 (0100111) +13 + 27 = 40 (0101000) +13 + 28 = 41 (0101001) +13 + 29 = 42 (0101010) +13 + 30 = 43 (0101011) +13 + 31 = 44 (0101100) +13 + 32 = 45 (0101101) +13 + 33 = 46 (0101110) +13 + 34 = 47 (0101111) +13 + 35 = 48 (0110000) +13 + 36 = 49 (0110001) +13 + 37 = 50 (0110010) +13 + 38 = 51 (0110011) +13 + 39 = 52 (0110100) +13 + 40 = 53 (0110101) +13 + 41 = 54 (0110110) +13 + 42 = 55 (0110111) +13 + 43 = 56 (0111000) +13 + 44 = 57 (0111001) +13 + 45 = 58 (0111010) +13 + 46 = 59 (0111011) +13 + 47 = 60 (0111100) +13 + 48 = 61 (0111101) +13 + 49 = 62 (0111110) +13 + 50 = 63 (0111111) +13 + 51 = 64 (1000000) +13 + 52 = 65 (1000001) +13 + 53 = 66 (1000010) +13 + 54 = 67 (1000011) +13 + 55 = 68 (1000100) +13 + 56 = 69 (1000101) +13 + 57 = 70 (1000110) +13 + 58 = 71 (1000111) +13 + 59 = 72 (1001000) +13 + 60 = 73 (1001001) +13 + 61 = 74 (1001010) +13 + 62 = 75 (1001011) +13 + 63 = 76 (1001100) +14 + 0 = 14 (0001110) +14 + 1 = 15 (0001111) +14 + 2 = 16 (0010000) +14 + 3 = 17 (0010001) +14 + 4 = 18 (0010010) +14 + 5 = 19 (0010011) +14 + 6 = 20 (0010100) +14 + 7 = 21 (0010101) +14 + 8 = 22 (0010110) +14 + 9 = 23 (0010111) +14 + 10 = 24 (0011000) +14 + 11 = 25 (0011001) +14 + 12 = 26 (0011010) +14 + 13 = 27 (0011011) +14 + 14 = 28 (0011100) +14 + 15 = 29 (0011101) +14 + 16 = 30 (0011110) +14 + 17 = 31 (0011111) +14 + 18 = 32 (0100000) +14 + 19 = 33 (0100001) +14 + 20 = 34 (0100010) +14 + 21 = 35 (0100011) +14 + 22 = 36 (0100100) +14 + 23 = 37 (0100101) +14 + 24 = 38 (0100110) +14 + 25 = 39 (0100111) +14 + 26 = 40 (0101000) +14 + 27 = 41 (0101001) +14 + 28 = 42 (0101010) +14 + 29 = 43 (0101011) +14 + 30 = 44 (0101100) +14 + 31 = 45 (0101101) +14 + 32 = 46 (0101110) +14 + 33 = 47 (0101111) +14 + 34 = 48 (0110000) +14 + 35 = 49 (0110001) +14 + 36 = 50 (0110010) +14 + 37 = 51 (0110011) +14 + 38 = 52 (0110100) +14 + 39 = 53 (0110101) +14 + 40 = 54 (0110110) +14 + 41 = 55 (0110111) +14 + 42 = 56 (0111000) +14 + 43 = 57 (0111001) +14 + 44 = 58 (0111010) +14 + 45 = 59 (0111011) +14 + 46 = 60 (0111100) +14 + 47 = 61 (0111101) +14 + 48 = 62 (0111110) +14 + 49 = 63 (0111111) +14 + 50 = 64 (1000000) +14 + 51 = 65 (1000001) +14 + 52 = 66 (1000010) +14 + 53 = 67 (1000011) +14 + 54 = 68 (1000100) +14 + 55 = 69 (1000101) +14 + 56 = 70 (1000110) +14 + 57 = 71 (1000111) +14 + 58 = 72 (1001000) +14 + 59 = 73 (1001001) +14 + 60 = 74 (1001010) +14 + 61 = 75 (1001011) +14 + 62 = 76 (1001100) +14 + 63 = 77 (1001101) +15 + 0 = 15 (0001111) +15 + 1 = 16 (0010000) +15 + 2 = 17 (0010001) +15 + 3 = 18 (0010010) +15 + 4 = 19 (0010011) +15 + 5 = 20 (0010100) +15 + 6 = 21 (0010101) +15 + 7 = 22 (0010110) +15 + 8 = 23 (0010111) +15 + 9 = 24 (0011000) +15 + 10 = 25 (0011001) +15 + 11 = 26 (0011010) +15 + 12 = 27 (0011011) +15 + 13 = 28 (0011100) +15 + 14 = 29 (0011101) +15 + 15 = 30 (0011110) +15 + 16 = 31 (0011111) +15 + 17 = 32 (0100000) +15 + 18 = 33 (0100001) +15 + 19 = 34 (0100010) +15 + 20 = 35 (0100011) +15 + 21 = 36 (0100100) +15 + 22 = 37 (0100101) +15 + 23 = 38 (0100110) +15 + 24 = 39 (0100111) +15 + 25 = 40 (0101000) +15 + 26 = 41 (0101001) +15 + 27 = 42 (0101010) +15 + 28 = 43 (0101011) +15 + 29 = 44 (0101100) +15 + 30 = 45 (0101101) +15 + 31 = 46 (0101110) +15 + 32 = 47 (0101111) +15 + 33 = 48 (0110000) +15 + 34 = 49 (0110001) +15 + 35 = 50 (0110010) +15 + 36 = 51 (0110011) +15 + 37 = 52 (0110100) +15 + 38 = 53 (0110101) +15 + 39 = 54 (0110110) +15 + 40 = 55 (0110111) +15 + 41 = 56 (0111000) +15 + 42 = 57 (0111001) +15 + 43 = 58 (0111010) +15 + 44 = 59 (0111011) +15 + 45 = 60 (0111100) +15 + 46 = 61 (0111101) +15 + 47 = 62 (0111110) +15 + 48 = 63 (0111111) +15 + 49 = 64 (1000000) +15 + 50 = 65 (1000001) +15 + 51 = 66 (1000010) +15 + 52 = 67 (1000011) +15 + 53 = 68 (1000100) +15 + 54 = 69 (1000101) +15 + 55 = 70 (1000110) +15 + 56 = 71 (1000111) +15 + 57 = 72 (1001000) +15 + 58 = 73 (1001001) +15 + 59 = 74 (1001010) +15 + 60 = 75 (1001011) +15 + 61 = 76 (1001100) +15 + 62 = 77 (1001101) +15 + 63 = 78 (1001110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/main.cpp new file mode 100644 index 000000000..4d28d0a65 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 7-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 7; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/promote.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/promote.f new file mode 100644 index 000000000..4f270dbe0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/promote.f @@ -0,0 +1,3 @@ +promote/datawidth.cpp +promote/stimgen.cpp +promote/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/stimgen.h new file mode 100644 index 000000000..723f5103f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector7& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector7& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/common.h new file mode 100644 index 000000000..8f3bbf59c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; +typedef sc_signal > signal_bool_vector9; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/datawidth.cpp new file mode 100644 index 000000000..f5df52dd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_unsigned tmp_a (in1_width); + sc_unsigned tmp_b (in2_width); + sc_unsigned tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/datawidth.h new file mode 100644 index 000000000..284757aeb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector9& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector9& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/golden/promote_extension.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/golden/promote_extension.log new file mode 100644 index 000000000..8228a1697 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/golden/promote_extension.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) +0 + 0 = 0 (000000000) +0 + 1 = 1 (000000001) +0 + 2 = 2 (000000010) +0 + 3 = 3 (000000011) +0 + 4 = 4 (000000100) +0 + 5 = 5 (000000101) +0 + 6 = 6 (000000110) +0 + 7 = 7 (000000111) +0 + 8 = 8 (000001000) +0 + 9 = 9 (000001001) +0 + 10 = 10 (000001010) +0 + 11 = 11 (000001011) +0 + 12 = 12 (000001100) +0 + 13 = 13 (000001101) +0 + 14 = 14 (000001110) +0 + 15 = 15 (000001111) +0 + 16 = 16 (000010000) +0 + 17 = 17 (000010001) +0 + 18 = 18 (000010010) +0 + 19 = 19 (000010011) +0 + 20 = 20 (000010100) +0 + 21 = 21 (000010101) +0 + 22 = 22 (000010110) +0 + 23 = 23 (000010111) +0 + 24 = 24 (000011000) +0 + 25 = 25 (000011001) +0 + 26 = 26 (000011010) +0 + 27 = 27 (000011011) +0 + 28 = 28 (000011100) +0 + 29 = 29 (000011101) +0 + 30 = 30 (000011110) +0 + 31 = 31 (000011111) +0 + 32 = 32 (000100000) +0 + 33 = 33 (000100001) +0 + 34 = 34 (000100010) +0 + 35 = 35 (000100011) +0 + 36 = 36 (000100100) +0 + 37 = 37 (000100101) +0 + 38 = 38 (000100110) +0 + 39 = 39 (000100111) +0 + 40 = 40 (000101000) +0 + 41 = 41 (000101001) +0 + 42 = 42 (000101010) +0 + 43 = 43 (000101011) +0 + 44 = 44 (000101100) +0 + 45 = 45 (000101101) +0 + 46 = 46 (000101110) +0 + 47 = 47 (000101111) +0 + 48 = 48 (000110000) +0 + 49 = 49 (000110001) +0 + 50 = 50 (000110010) +0 + 51 = 51 (000110011) +0 + 52 = 52 (000110100) +0 + 53 = 53 (000110101) +0 + 54 = 54 (000110110) +0 + 55 = 55 (000110111) +0 + 56 = 56 (000111000) +0 + 57 = 57 (000111001) +0 + 58 = 58 (000111010) +0 + 59 = 59 (000111011) +0 + 60 = 60 (000111100) +0 + 61 = 61 (000111101) +0 + 62 = 62 (000111110) +0 + 63 = 63 (000111111) +1 + 0 = 1 (000000001) +1 + 1 = 2 (000000010) +1 + 2 = 3 (000000011) +1 + 3 = 4 (000000100) +1 + 4 = 5 (000000101) +1 + 5 = 6 (000000110) +1 + 6 = 7 (000000111) +1 + 7 = 8 (000001000) +1 + 8 = 9 (000001001) +1 + 9 = 10 (000001010) +1 + 10 = 11 (000001011) +1 + 11 = 12 (000001100) +1 + 12 = 13 (000001101) +1 + 13 = 14 (000001110) +1 + 14 = 15 (000001111) +1 + 15 = 16 (000010000) +1 + 16 = 17 (000010001) +1 + 17 = 18 (000010010) +1 + 18 = 19 (000010011) +1 + 19 = 20 (000010100) +1 + 20 = 21 (000010101) +1 + 21 = 22 (000010110) +1 + 22 = 23 (000010111) +1 + 23 = 24 (000011000) +1 + 24 = 25 (000011001) +1 + 25 = 26 (000011010) +1 + 26 = 27 (000011011) +1 + 27 = 28 (000011100) +1 + 28 = 29 (000011101) +1 + 29 = 30 (000011110) +1 + 30 = 31 (000011111) +1 + 31 = 32 (000100000) +1 + 32 = 33 (000100001) +1 + 33 = 34 (000100010) +1 + 34 = 35 (000100011) +1 + 35 = 36 (000100100) +1 + 36 = 37 (000100101) +1 + 37 = 38 (000100110) +1 + 38 = 39 (000100111) +1 + 39 = 40 (000101000) +1 + 40 = 41 (000101001) +1 + 41 = 42 (000101010) +1 + 42 = 43 (000101011) +1 + 43 = 44 (000101100) +1 + 44 = 45 (000101101) +1 + 45 = 46 (000101110) +1 + 46 = 47 (000101111) +1 + 47 = 48 (000110000) +1 + 48 = 49 (000110001) +1 + 49 = 50 (000110010) +1 + 50 = 51 (000110011) +1 + 51 = 52 (000110100) +1 + 52 = 53 (000110101) +1 + 53 = 54 (000110110) +1 + 54 = 55 (000110111) +1 + 55 = 56 (000111000) +1 + 56 = 57 (000111001) +1 + 57 = 58 (000111010) +1 + 58 = 59 (000111011) +1 + 59 = 60 (000111100) +1 + 60 = 61 (000111101) +1 + 61 = 62 (000111110) +1 + 62 = 63 (000111111) +1 + 63 = 64 (001000000) +2 + 0 = 2 (000000010) +2 + 1 = 3 (000000011) +2 + 2 = 4 (000000100) +2 + 3 = 5 (000000101) +2 + 4 = 6 (000000110) +2 + 5 = 7 (000000111) +2 + 6 = 8 (000001000) +2 + 7 = 9 (000001001) +2 + 8 = 10 (000001010) +2 + 9 = 11 (000001011) +2 + 10 = 12 (000001100) +2 + 11 = 13 (000001101) +2 + 12 = 14 (000001110) +2 + 13 = 15 (000001111) +2 + 14 = 16 (000010000) +2 + 15 = 17 (000010001) +2 + 16 = 18 (000010010) +2 + 17 = 19 (000010011) +2 + 18 = 20 (000010100) +2 + 19 = 21 (000010101) +2 + 20 = 22 (000010110) +2 + 21 = 23 (000010111) +2 + 22 = 24 (000011000) +2 + 23 = 25 (000011001) +2 + 24 = 26 (000011010) +2 + 25 = 27 (000011011) +2 + 26 = 28 (000011100) +2 + 27 = 29 (000011101) +2 + 28 = 30 (000011110) +2 + 29 = 31 (000011111) +2 + 30 = 32 (000100000) +2 + 31 = 33 (000100001) +2 + 32 = 34 (000100010) +2 + 33 = 35 (000100011) +2 + 34 = 36 (000100100) +2 + 35 = 37 (000100101) +2 + 36 = 38 (000100110) +2 + 37 = 39 (000100111) +2 + 38 = 40 (000101000) +2 + 39 = 41 (000101001) +2 + 40 = 42 (000101010) +2 + 41 = 43 (000101011) +2 + 42 = 44 (000101100) +2 + 43 = 45 (000101101) +2 + 44 = 46 (000101110) +2 + 45 = 47 (000101111) +2 + 46 = 48 (000110000) +2 + 47 = 49 (000110001) +2 + 48 = 50 (000110010) +2 + 49 = 51 (000110011) +2 + 50 = 52 (000110100) +2 + 51 = 53 (000110101) +2 + 52 = 54 (000110110) +2 + 53 = 55 (000110111) +2 + 54 = 56 (000111000) +2 + 55 = 57 (000111001) +2 + 56 = 58 (000111010) +2 + 57 = 59 (000111011) +2 + 58 = 60 (000111100) +2 + 59 = 61 (000111101) +2 + 60 = 62 (000111110) +2 + 61 = 63 (000111111) +2 + 62 = 64 (001000000) +2 + 63 = 65 (001000001) +3 + 0 = 3 (000000011) +3 + 1 = 4 (000000100) +3 + 2 = 5 (000000101) +3 + 3 = 6 (000000110) +3 + 4 = 7 (000000111) +3 + 5 = 8 (000001000) +3 + 6 = 9 (000001001) +3 + 7 = 10 (000001010) +3 + 8 = 11 (000001011) +3 + 9 = 12 (000001100) +3 + 10 = 13 (000001101) +3 + 11 = 14 (000001110) +3 + 12 = 15 (000001111) +3 + 13 = 16 (000010000) +3 + 14 = 17 (000010001) +3 + 15 = 18 (000010010) +3 + 16 = 19 (000010011) +3 + 17 = 20 (000010100) +3 + 18 = 21 (000010101) +3 + 19 = 22 (000010110) +3 + 20 = 23 (000010111) +3 + 21 = 24 (000011000) +3 + 22 = 25 (000011001) +3 + 23 = 26 (000011010) +3 + 24 = 27 (000011011) +3 + 25 = 28 (000011100) +3 + 26 = 29 (000011101) +3 + 27 = 30 (000011110) +3 + 28 = 31 (000011111) +3 + 29 = 32 (000100000) +3 + 30 = 33 (000100001) +3 + 31 = 34 (000100010) +3 + 32 = 35 (000100011) +3 + 33 = 36 (000100100) +3 + 34 = 37 (000100101) +3 + 35 = 38 (000100110) +3 + 36 = 39 (000100111) +3 + 37 = 40 (000101000) +3 + 38 = 41 (000101001) +3 + 39 = 42 (000101010) +3 + 40 = 43 (000101011) +3 + 41 = 44 (000101100) +3 + 42 = 45 (000101101) +3 + 43 = 46 (000101110) +3 + 44 = 47 (000101111) +3 + 45 = 48 (000110000) +3 + 46 = 49 (000110001) +3 + 47 = 50 (000110010) +3 + 48 = 51 (000110011) +3 + 49 = 52 (000110100) +3 + 50 = 53 (000110101) +3 + 51 = 54 (000110110) +3 + 52 = 55 (000110111) +3 + 53 = 56 (000111000) +3 + 54 = 57 (000111001) +3 + 55 = 58 (000111010) +3 + 56 = 59 (000111011) +3 + 57 = 60 (000111100) +3 + 58 = 61 (000111101) +3 + 59 = 62 (000111110) +3 + 60 = 63 (000111111) +3 + 61 = 64 (001000000) +3 + 62 = 65 (001000001) +3 + 63 = 66 (001000010) +4 + 0 = 4 (000000100) +4 + 1 = 5 (000000101) +4 + 2 = 6 (000000110) +4 + 3 = 7 (000000111) +4 + 4 = 8 (000001000) +4 + 5 = 9 (000001001) +4 + 6 = 10 (000001010) +4 + 7 = 11 (000001011) +4 + 8 = 12 (000001100) +4 + 9 = 13 (000001101) +4 + 10 = 14 (000001110) +4 + 11 = 15 (000001111) +4 + 12 = 16 (000010000) +4 + 13 = 17 (000010001) +4 + 14 = 18 (000010010) +4 + 15 = 19 (000010011) +4 + 16 = 20 (000010100) +4 + 17 = 21 (000010101) +4 + 18 = 22 (000010110) +4 + 19 = 23 (000010111) +4 + 20 = 24 (000011000) +4 + 21 = 25 (000011001) +4 + 22 = 26 (000011010) +4 + 23 = 27 (000011011) +4 + 24 = 28 (000011100) +4 + 25 = 29 (000011101) +4 + 26 = 30 (000011110) +4 + 27 = 31 (000011111) +4 + 28 = 32 (000100000) +4 + 29 = 33 (000100001) +4 + 30 = 34 (000100010) +4 + 31 = 35 (000100011) +4 + 32 = 36 (000100100) +4 + 33 = 37 (000100101) +4 + 34 = 38 (000100110) +4 + 35 = 39 (000100111) +4 + 36 = 40 (000101000) +4 + 37 = 41 (000101001) +4 + 38 = 42 (000101010) +4 + 39 = 43 (000101011) +4 + 40 = 44 (000101100) +4 + 41 = 45 (000101101) +4 + 42 = 46 (000101110) +4 + 43 = 47 (000101111) +4 + 44 = 48 (000110000) +4 + 45 = 49 (000110001) +4 + 46 = 50 (000110010) +4 + 47 = 51 (000110011) +4 + 48 = 52 (000110100) +4 + 49 = 53 (000110101) +4 + 50 = 54 (000110110) +4 + 51 = 55 (000110111) +4 + 52 = 56 (000111000) +4 + 53 = 57 (000111001) +4 + 54 = 58 (000111010) +4 + 55 = 59 (000111011) +4 + 56 = 60 (000111100) +4 + 57 = 61 (000111101) +4 + 58 = 62 (000111110) +4 + 59 = 63 (000111111) +4 + 60 = 64 (001000000) +4 + 61 = 65 (001000001) +4 + 62 = 66 (001000010) +4 + 63 = 67 (001000011) +5 + 0 = 5 (000000101) +5 + 1 = 6 (000000110) +5 + 2 = 7 (000000111) +5 + 3 = 8 (000001000) +5 + 4 = 9 (000001001) +5 + 5 = 10 (000001010) +5 + 6 = 11 (000001011) +5 + 7 = 12 (000001100) +5 + 8 = 13 (000001101) +5 + 9 = 14 (000001110) +5 + 10 = 15 (000001111) +5 + 11 = 16 (000010000) +5 + 12 = 17 (000010001) +5 + 13 = 18 (000010010) +5 + 14 = 19 (000010011) +5 + 15 = 20 (000010100) +5 + 16 = 21 (000010101) +5 + 17 = 22 (000010110) +5 + 18 = 23 (000010111) +5 + 19 = 24 (000011000) +5 + 20 = 25 (000011001) +5 + 21 = 26 (000011010) +5 + 22 = 27 (000011011) +5 + 23 = 28 (000011100) +5 + 24 = 29 (000011101) +5 + 25 = 30 (000011110) +5 + 26 = 31 (000011111) +5 + 27 = 32 (000100000) +5 + 28 = 33 (000100001) +5 + 29 = 34 (000100010) +5 + 30 = 35 (000100011) +5 + 31 = 36 (000100100) +5 + 32 = 37 (000100101) +5 + 33 = 38 (000100110) +5 + 34 = 39 (000100111) +5 + 35 = 40 (000101000) +5 + 36 = 41 (000101001) +5 + 37 = 42 (000101010) +5 + 38 = 43 (000101011) +5 + 39 = 44 (000101100) +5 + 40 = 45 (000101101) +5 + 41 = 46 (000101110) +5 + 42 = 47 (000101111) +5 + 43 = 48 (000110000) +5 + 44 = 49 (000110001) +5 + 45 = 50 (000110010) +5 + 46 = 51 (000110011) +5 + 47 = 52 (000110100) +5 + 48 = 53 (000110101) +5 + 49 = 54 (000110110) +5 + 50 = 55 (000110111) +5 + 51 = 56 (000111000) +5 + 52 = 57 (000111001) +5 + 53 = 58 (000111010) +5 + 54 = 59 (000111011) +5 + 55 = 60 (000111100) +5 + 56 = 61 (000111101) +5 + 57 = 62 (000111110) +5 + 58 = 63 (000111111) +5 + 59 = 64 (001000000) +5 + 60 = 65 (001000001) +5 + 61 = 66 (001000010) +5 + 62 = 67 (001000011) +5 + 63 = 68 (001000100) +6 + 0 = 6 (000000110) +6 + 1 = 7 (000000111) +6 + 2 = 8 (000001000) +6 + 3 = 9 (000001001) +6 + 4 = 10 (000001010) +6 + 5 = 11 (000001011) +6 + 6 = 12 (000001100) +6 + 7 = 13 (000001101) +6 + 8 = 14 (000001110) +6 + 9 = 15 (000001111) +6 + 10 = 16 (000010000) +6 + 11 = 17 (000010001) +6 + 12 = 18 (000010010) +6 + 13 = 19 (000010011) +6 + 14 = 20 (000010100) +6 + 15 = 21 (000010101) +6 + 16 = 22 (000010110) +6 + 17 = 23 (000010111) +6 + 18 = 24 (000011000) +6 + 19 = 25 (000011001) +6 + 20 = 26 (000011010) +6 + 21 = 27 (000011011) +6 + 22 = 28 (000011100) +6 + 23 = 29 (000011101) +6 + 24 = 30 (000011110) +6 + 25 = 31 (000011111) +6 + 26 = 32 (000100000) +6 + 27 = 33 (000100001) +6 + 28 = 34 (000100010) +6 + 29 = 35 (000100011) +6 + 30 = 36 (000100100) +6 + 31 = 37 (000100101) +6 + 32 = 38 (000100110) +6 + 33 = 39 (000100111) +6 + 34 = 40 (000101000) +6 + 35 = 41 (000101001) +6 + 36 = 42 (000101010) +6 + 37 = 43 (000101011) +6 + 38 = 44 (000101100) +6 + 39 = 45 (000101101) +6 + 40 = 46 (000101110) +6 + 41 = 47 (000101111) +6 + 42 = 48 (000110000) +6 + 43 = 49 (000110001) +6 + 44 = 50 (000110010) +6 + 45 = 51 (000110011) +6 + 46 = 52 (000110100) +6 + 47 = 53 (000110101) +6 + 48 = 54 (000110110) +6 + 49 = 55 (000110111) +6 + 50 = 56 (000111000) +6 + 51 = 57 (000111001) +6 + 52 = 58 (000111010) +6 + 53 = 59 (000111011) +6 + 54 = 60 (000111100) +6 + 55 = 61 (000111101) +6 + 56 = 62 (000111110) +6 + 57 = 63 (000111111) +6 + 58 = 64 (001000000) +6 + 59 = 65 (001000001) +6 + 60 = 66 (001000010) +6 + 61 = 67 (001000011) +6 + 62 = 68 (001000100) +6 + 63 = 69 (001000101) +7 + 0 = 7 (000000111) +7 + 1 = 8 (000001000) +7 + 2 = 9 (000001001) +7 + 3 = 10 (000001010) +7 + 4 = 11 (000001011) +7 + 5 = 12 (000001100) +7 + 6 = 13 (000001101) +7 + 7 = 14 (000001110) +7 + 8 = 15 (000001111) +7 + 9 = 16 (000010000) +7 + 10 = 17 (000010001) +7 + 11 = 18 (000010010) +7 + 12 = 19 (000010011) +7 + 13 = 20 (000010100) +7 + 14 = 21 (000010101) +7 + 15 = 22 (000010110) +7 + 16 = 23 (000010111) +7 + 17 = 24 (000011000) +7 + 18 = 25 (000011001) +7 + 19 = 26 (000011010) +7 + 20 = 27 (000011011) +7 + 21 = 28 (000011100) +7 + 22 = 29 (000011101) +7 + 23 = 30 (000011110) +7 + 24 = 31 (000011111) +7 + 25 = 32 (000100000) +7 + 26 = 33 (000100001) +7 + 27 = 34 (000100010) +7 + 28 = 35 (000100011) +7 + 29 = 36 (000100100) +7 + 30 = 37 (000100101) +7 + 31 = 38 (000100110) +7 + 32 = 39 (000100111) +7 + 33 = 40 (000101000) +7 + 34 = 41 (000101001) +7 + 35 = 42 (000101010) +7 + 36 = 43 (000101011) +7 + 37 = 44 (000101100) +7 + 38 = 45 (000101101) +7 + 39 = 46 (000101110) +7 + 40 = 47 (000101111) +7 + 41 = 48 (000110000) +7 + 42 = 49 (000110001) +7 + 43 = 50 (000110010) +7 + 44 = 51 (000110011) +7 + 45 = 52 (000110100) +7 + 46 = 53 (000110101) +7 + 47 = 54 (000110110) +7 + 48 = 55 (000110111) +7 + 49 = 56 (000111000) +7 + 50 = 57 (000111001) +7 + 51 = 58 (000111010) +7 + 52 = 59 (000111011) +7 + 53 = 60 (000111100) +7 + 54 = 61 (000111101) +7 + 55 = 62 (000111110) +7 + 56 = 63 (000111111) +7 + 57 = 64 (001000000) +7 + 58 = 65 (001000001) +7 + 59 = 66 (001000010) +7 + 60 = 67 (001000011) +7 + 61 = 68 (001000100) +7 + 62 = 69 (001000101) +7 + 63 = 70 (001000110) +8 + 0 = 8 (000001000) +8 + 1 = 9 (000001001) +8 + 2 = 10 (000001010) +8 + 3 = 11 (000001011) +8 + 4 = 12 (000001100) +8 + 5 = 13 (000001101) +8 + 6 = 14 (000001110) +8 + 7 = 15 (000001111) +8 + 8 = 16 (000010000) +8 + 9 = 17 (000010001) +8 + 10 = 18 (000010010) +8 + 11 = 19 (000010011) +8 + 12 = 20 (000010100) +8 + 13 = 21 (000010101) +8 + 14 = 22 (000010110) +8 + 15 = 23 (000010111) +8 + 16 = 24 (000011000) +8 + 17 = 25 (000011001) +8 + 18 = 26 (000011010) +8 + 19 = 27 (000011011) +8 + 20 = 28 (000011100) +8 + 21 = 29 (000011101) +8 + 22 = 30 (000011110) +8 + 23 = 31 (000011111) +8 + 24 = 32 (000100000) +8 + 25 = 33 (000100001) +8 + 26 = 34 (000100010) +8 + 27 = 35 (000100011) +8 + 28 = 36 (000100100) +8 + 29 = 37 (000100101) +8 + 30 = 38 (000100110) +8 + 31 = 39 (000100111) +8 + 32 = 40 (000101000) +8 + 33 = 41 (000101001) +8 + 34 = 42 (000101010) +8 + 35 = 43 (000101011) +8 + 36 = 44 (000101100) +8 + 37 = 45 (000101101) +8 + 38 = 46 (000101110) +8 + 39 = 47 (000101111) +8 + 40 = 48 (000110000) +8 + 41 = 49 (000110001) +8 + 42 = 50 (000110010) +8 + 43 = 51 (000110011) +8 + 44 = 52 (000110100) +8 + 45 = 53 (000110101) +8 + 46 = 54 (000110110) +8 + 47 = 55 (000110111) +8 + 48 = 56 (000111000) +8 + 49 = 57 (000111001) +8 + 50 = 58 (000111010) +8 + 51 = 59 (000111011) +8 + 52 = 60 (000111100) +8 + 53 = 61 (000111101) +8 + 54 = 62 (000111110) +8 + 55 = 63 (000111111) +8 + 56 = 64 (001000000) +8 + 57 = 65 (001000001) +8 + 58 = 66 (001000010) +8 + 59 = 67 (001000011) +8 + 60 = 68 (001000100) +8 + 61 = 69 (001000101) +8 + 62 = 70 (001000110) +8 + 63 = 71 (001000111) +9 + 0 = 9 (000001001) +9 + 1 = 10 (000001010) +9 + 2 = 11 (000001011) +9 + 3 = 12 (000001100) +9 + 4 = 13 (000001101) +9 + 5 = 14 (000001110) +9 + 6 = 15 (000001111) +9 + 7 = 16 (000010000) +9 + 8 = 17 (000010001) +9 + 9 = 18 (000010010) +9 + 10 = 19 (000010011) +9 + 11 = 20 (000010100) +9 + 12 = 21 (000010101) +9 + 13 = 22 (000010110) +9 + 14 = 23 (000010111) +9 + 15 = 24 (000011000) +9 + 16 = 25 (000011001) +9 + 17 = 26 (000011010) +9 + 18 = 27 (000011011) +9 + 19 = 28 (000011100) +9 + 20 = 29 (000011101) +9 + 21 = 30 (000011110) +9 + 22 = 31 (000011111) +9 + 23 = 32 (000100000) +9 + 24 = 33 (000100001) +9 + 25 = 34 (000100010) +9 + 26 = 35 (000100011) +9 + 27 = 36 (000100100) +9 + 28 = 37 (000100101) +9 + 29 = 38 (000100110) +9 + 30 = 39 (000100111) +9 + 31 = 40 (000101000) +9 + 32 = 41 (000101001) +9 + 33 = 42 (000101010) +9 + 34 = 43 (000101011) +9 + 35 = 44 (000101100) +9 + 36 = 45 (000101101) +9 + 37 = 46 (000101110) +9 + 38 = 47 (000101111) +9 + 39 = 48 (000110000) +9 + 40 = 49 (000110001) +9 + 41 = 50 (000110010) +9 + 42 = 51 (000110011) +9 + 43 = 52 (000110100) +9 + 44 = 53 (000110101) +9 + 45 = 54 (000110110) +9 + 46 = 55 (000110111) +9 + 47 = 56 (000111000) +9 + 48 = 57 (000111001) +9 + 49 = 58 (000111010) +9 + 50 = 59 (000111011) +9 + 51 = 60 (000111100) +9 + 52 = 61 (000111101) +9 + 53 = 62 (000111110) +9 + 54 = 63 (000111111) +9 + 55 = 64 (001000000) +9 + 56 = 65 (001000001) +9 + 57 = 66 (001000010) +9 + 58 = 67 (001000011) +9 + 59 = 68 (001000100) +9 + 60 = 69 (001000101) +9 + 61 = 70 (001000110) +9 + 62 = 71 (001000111) +9 + 63 = 72 (001001000) +10 + 0 = 10 (000001010) +10 + 1 = 11 (000001011) +10 + 2 = 12 (000001100) +10 + 3 = 13 (000001101) +10 + 4 = 14 (000001110) +10 + 5 = 15 (000001111) +10 + 6 = 16 (000010000) +10 + 7 = 17 (000010001) +10 + 8 = 18 (000010010) +10 + 9 = 19 (000010011) +10 + 10 = 20 (000010100) +10 + 11 = 21 (000010101) +10 + 12 = 22 (000010110) +10 + 13 = 23 (000010111) +10 + 14 = 24 (000011000) +10 + 15 = 25 (000011001) +10 + 16 = 26 (000011010) +10 + 17 = 27 (000011011) +10 + 18 = 28 (000011100) +10 + 19 = 29 (000011101) +10 + 20 = 30 (000011110) +10 + 21 = 31 (000011111) +10 + 22 = 32 (000100000) +10 + 23 = 33 (000100001) +10 + 24 = 34 (000100010) +10 + 25 = 35 (000100011) +10 + 26 = 36 (000100100) +10 + 27 = 37 (000100101) +10 + 28 = 38 (000100110) +10 + 29 = 39 (000100111) +10 + 30 = 40 (000101000) +10 + 31 = 41 (000101001) +10 + 32 = 42 (000101010) +10 + 33 = 43 (000101011) +10 + 34 = 44 (000101100) +10 + 35 = 45 (000101101) +10 + 36 = 46 (000101110) +10 + 37 = 47 (000101111) +10 + 38 = 48 (000110000) +10 + 39 = 49 (000110001) +10 + 40 = 50 (000110010) +10 + 41 = 51 (000110011) +10 + 42 = 52 (000110100) +10 + 43 = 53 (000110101) +10 + 44 = 54 (000110110) +10 + 45 = 55 (000110111) +10 + 46 = 56 (000111000) +10 + 47 = 57 (000111001) +10 + 48 = 58 (000111010) +10 + 49 = 59 (000111011) +10 + 50 = 60 (000111100) +10 + 51 = 61 (000111101) +10 + 52 = 62 (000111110) +10 + 53 = 63 (000111111) +10 + 54 = 64 (001000000) +10 + 55 = 65 (001000001) +10 + 56 = 66 (001000010) +10 + 57 = 67 (001000011) +10 + 58 = 68 (001000100) +10 + 59 = 69 (001000101) +10 + 60 = 70 (001000110) +10 + 61 = 71 (001000111) +10 + 62 = 72 (001001000) +10 + 63 = 73 (001001001) +11 + 0 = 11 (000001011) +11 + 1 = 12 (000001100) +11 + 2 = 13 (000001101) +11 + 3 = 14 (000001110) +11 + 4 = 15 (000001111) +11 + 5 = 16 (000010000) +11 + 6 = 17 (000010001) +11 + 7 = 18 (000010010) +11 + 8 = 19 (000010011) +11 + 9 = 20 (000010100) +11 + 10 = 21 (000010101) +11 + 11 = 22 (000010110) +11 + 12 = 23 (000010111) +11 + 13 = 24 (000011000) +11 + 14 = 25 (000011001) +11 + 15 = 26 (000011010) +11 + 16 = 27 (000011011) +11 + 17 = 28 (000011100) +11 + 18 = 29 (000011101) +11 + 19 = 30 (000011110) +11 + 20 = 31 (000011111) +11 + 21 = 32 (000100000) +11 + 22 = 33 (000100001) +11 + 23 = 34 (000100010) +11 + 24 = 35 (000100011) +11 + 25 = 36 (000100100) +11 + 26 = 37 (000100101) +11 + 27 = 38 (000100110) +11 + 28 = 39 (000100111) +11 + 29 = 40 (000101000) +11 + 30 = 41 (000101001) +11 + 31 = 42 (000101010) +11 + 32 = 43 (000101011) +11 + 33 = 44 (000101100) +11 + 34 = 45 (000101101) +11 + 35 = 46 (000101110) +11 + 36 = 47 (000101111) +11 + 37 = 48 (000110000) +11 + 38 = 49 (000110001) +11 + 39 = 50 (000110010) +11 + 40 = 51 (000110011) +11 + 41 = 52 (000110100) +11 + 42 = 53 (000110101) +11 + 43 = 54 (000110110) +11 + 44 = 55 (000110111) +11 + 45 = 56 (000111000) +11 + 46 = 57 (000111001) +11 + 47 = 58 (000111010) +11 + 48 = 59 (000111011) +11 + 49 = 60 (000111100) +11 + 50 = 61 (000111101) +11 + 51 = 62 (000111110) +11 + 52 = 63 (000111111) +11 + 53 = 64 (001000000) +11 + 54 = 65 (001000001) +11 + 55 = 66 (001000010) +11 + 56 = 67 (001000011) +11 + 57 = 68 (001000100) +11 + 58 = 69 (001000101) +11 + 59 = 70 (001000110) +11 + 60 = 71 (001000111) +11 + 61 = 72 (001001000) +11 + 62 = 73 (001001001) +11 + 63 = 74 (001001010) +12 + 0 = 12 (000001100) +12 + 1 = 13 (000001101) +12 + 2 = 14 (000001110) +12 + 3 = 15 (000001111) +12 + 4 = 16 (000010000) +12 + 5 = 17 (000010001) +12 + 6 = 18 (000010010) +12 + 7 = 19 (000010011) +12 + 8 = 20 (000010100) +12 + 9 = 21 (000010101) +12 + 10 = 22 (000010110) +12 + 11 = 23 (000010111) +12 + 12 = 24 (000011000) +12 + 13 = 25 (000011001) +12 + 14 = 26 (000011010) +12 + 15 = 27 (000011011) +12 + 16 = 28 (000011100) +12 + 17 = 29 (000011101) +12 + 18 = 30 (000011110) +12 + 19 = 31 (000011111) +12 + 20 = 32 (000100000) +12 + 21 = 33 (000100001) +12 + 22 = 34 (000100010) +12 + 23 = 35 (000100011) +12 + 24 = 36 (000100100) +12 + 25 = 37 (000100101) +12 + 26 = 38 (000100110) +12 + 27 = 39 (000100111) +12 + 28 = 40 (000101000) +12 + 29 = 41 (000101001) +12 + 30 = 42 (000101010) +12 + 31 = 43 (000101011) +12 + 32 = 44 (000101100) +12 + 33 = 45 (000101101) +12 + 34 = 46 (000101110) +12 + 35 = 47 (000101111) +12 + 36 = 48 (000110000) +12 + 37 = 49 (000110001) +12 + 38 = 50 (000110010) +12 + 39 = 51 (000110011) +12 + 40 = 52 (000110100) +12 + 41 = 53 (000110101) +12 + 42 = 54 (000110110) +12 + 43 = 55 (000110111) +12 + 44 = 56 (000111000) +12 + 45 = 57 (000111001) +12 + 46 = 58 (000111010) +12 + 47 = 59 (000111011) +12 + 48 = 60 (000111100) +12 + 49 = 61 (000111101) +12 + 50 = 62 (000111110) +12 + 51 = 63 (000111111) +12 + 52 = 64 (001000000) +12 + 53 = 65 (001000001) +12 + 54 = 66 (001000010) +12 + 55 = 67 (001000011) +12 + 56 = 68 (001000100) +12 + 57 = 69 (001000101) +12 + 58 = 70 (001000110) +12 + 59 = 71 (001000111) +12 + 60 = 72 (001001000) +12 + 61 = 73 (001001001) +12 + 62 = 74 (001001010) +12 + 63 = 75 (001001011) +13 + 0 = 13 (000001101) +13 + 1 = 14 (000001110) +13 + 2 = 15 (000001111) +13 + 3 = 16 (000010000) +13 + 4 = 17 (000010001) +13 + 5 = 18 (000010010) +13 + 6 = 19 (000010011) +13 + 7 = 20 (000010100) +13 + 8 = 21 (000010101) +13 + 9 = 22 (000010110) +13 + 10 = 23 (000010111) +13 + 11 = 24 (000011000) +13 + 12 = 25 (000011001) +13 + 13 = 26 (000011010) +13 + 14 = 27 (000011011) +13 + 15 = 28 (000011100) +13 + 16 = 29 (000011101) +13 + 17 = 30 (000011110) +13 + 18 = 31 (000011111) +13 + 19 = 32 (000100000) +13 + 20 = 33 (000100001) +13 + 21 = 34 (000100010) +13 + 22 = 35 (000100011) +13 + 23 = 36 (000100100) +13 + 24 = 37 (000100101) +13 + 25 = 38 (000100110) +13 + 26 = 39 (000100111) +13 + 27 = 40 (000101000) +13 + 28 = 41 (000101001) +13 + 29 = 42 (000101010) +13 + 30 = 43 (000101011) +13 + 31 = 44 (000101100) +13 + 32 = 45 (000101101) +13 + 33 = 46 (000101110) +13 + 34 = 47 (000101111) +13 + 35 = 48 (000110000) +13 + 36 = 49 (000110001) +13 + 37 = 50 (000110010) +13 + 38 = 51 (000110011) +13 + 39 = 52 (000110100) +13 + 40 = 53 (000110101) +13 + 41 = 54 (000110110) +13 + 42 = 55 (000110111) +13 + 43 = 56 (000111000) +13 + 44 = 57 (000111001) +13 + 45 = 58 (000111010) +13 + 46 = 59 (000111011) +13 + 47 = 60 (000111100) +13 + 48 = 61 (000111101) +13 + 49 = 62 (000111110) +13 + 50 = 63 (000111111) +13 + 51 = 64 (001000000) +13 + 52 = 65 (001000001) +13 + 53 = 66 (001000010) +13 + 54 = 67 (001000011) +13 + 55 = 68 (001000100) +13 + 56 = 69 (001000101) +13 + 57 = 70 (001000110) +13 + 58 = 71 (001000111) +13 + 59 = 72 (001001000) +13 + 60 = 73 (001001001) +13 + 61 = 74 (001001010) +13 + 62 = 75 (001001011) +13 + 63 = 76 (001001100) +14 + 0 = 14 (000001110) +14 + 1 = 15 (000001111) +14 + 2 = 16 (000010000) +14 + 3 = 17 (000010001) +14 + 4 = 18 (000010010) +14 + 5 = 19 (000010011) +14 + 6 = 20 (000010100) +14 + 7 = 21 (000010101) +14 + 8 = 22 (000010110) +14 + 9 = 23 (000010111) +14 + 10 = 24 (000011000) +14 + 11 = 25 (000011001) +14 + 12 = 26 (000011010) +14 + 13 = 27 (000011011) +14 + 14 = 28 (000011100) +14 + 15 = 29 (000011101) +14 + 16 = 30 (000011110) +14 + 17 = 31 (000011111) +14 + 18 = 32 (000100000) +14 + 19 = 33 (000100001) +14 + 20 = 34 (000100010) +14 + 21 = 35 (000100011) +14 + 22 = 36 (000100100) +14 + 23 = 37 (000100101) +14 + 24 = 38 (000100110) +14 + 25 = 39 (000100111) +14 + 26 = 40 (000101000) +14 + 27 = 41 (000101001) +14 + 28 = 42 (000101010) +14 + 29 = 43 (000101011) +14 + 30 = 44 (000101100) +14 + 31 = 45 (000101101) +14 + 32 = 46 (000101110) +14 + 33 = 47 (000101111) +14 + 34 = 48 (000110000) +14 + 35 = 49 (000110001) +14 + 36 = 50 (000110010) +14 + 37 = 51 (000110011) +14 + 38 = 52 (000110100) +14 + 39 = 53 (000110101) +14 + 40 = 54 (000110110) +14 + 41 = 55 (000110111) +14 + 42 = 56 (000111000) +14 + 43 = 57 (000111001) +14 + 44 = 58 (000111010) +14 + 45 = 59 (000111011) +14 + 46 = 60 (000111100) +14 + 47 = 61 (000111101) +14 + 48 = 62 (000111110) +14 + 49 = 63 (000111111) +14 + 50 = 64 (001000000) +14 + 51 = 65 (001000001) +14 + 52 = 66 (001000010) +14 + 53 = 67 (001000011) +14 + 54 = 68 (001000100) +14 + 55 = 69 (001000101) +14 + 56 = 70 (001000110) +14 + 57 = 71 (001000111) +14 + 58 = 72 (001001000) +14 + 59 = 73 (001001001) +14 + 60 = 74 (001001010) +14 + 61 = 75 (001001011) +14 + 62 = 76 (001001100) +14 + 63 = 77 (001001101) +15 + 0 = 15 (000001111) +15 + 1 = 16 (000010000) +15 + 2 = 17 (000010001) +15 + 3 = 18 (000010010) +15 + 4 = 19 (000010011) +15 + 5 = 20 (000010100) +15 + 6 = 21 (000010101) +15 + 7 = 22 (000010110) +15 + 8 = 23 (000010111) +15 + 9 = 24 (000011000) +15 + 10 = 25 (000011001) +15 + 11 = 26 (000011010) +15 + 12 = 27 (000011011) +15 + 13 = 28 (000011100) +15 + 14 = 29 (000011101) +15 + 15 = 30 (000011110) +15 + 16 = 31 (000011111) +15 + 17 = 32 (000100000) +15 + 18 = 33 (000100001) +15 + 19 = 34 (000100010) +15 + 20 = 35 (000100011) +15 + 21 = 36 (000100100) +15 + 22 = 37 (000100101) +15 + 23 = 38 (000100110) +15 + 24 = 39 (000100111) +15 + 25 = 40 (000101000) +15 + 26 = 41 (000101001) +15 + 27 = 42 (000101010) +15 + 28 = 43 (000101011) +15 + 29 = 44 (000101100) +15 + 30 = 45 (000101101) +15 + 31 = 46 (000101110) +15 + 32 = 47 (000101111) +15 + 33 = 48 (000110000) +15 + 34 = 49 (000110001) +15 + 35 = 50 (000110010) +15 + 36 = 51 (000110011) +15 + 37 = 52 (000110100) +15 + 38 = 53 (000110101) +15 + 39 = 54 (000110110) +15 + 40 = 55 (000110111) +15 + 41 = 56 (000111000) +15 + 42 = 57 (000111001) +15 + 43 = 58 (000111010) +15 + 44 = 59 (000111011) +15 + 45 = 60 (000111100) +15 + 46 = 61 (000111101) +15 + 47 = 62 (000111110) +15 + 48 = 63 (000111111) +15 + 49 = 64 (001000000) +15 + 50 = 65 (001000001) +15 + 51 = 66 (001000010) +15 + 52 = 67 (001000011) +15 + 53 = 68 (001000100) +15 + 54 = 69 (001000101) +15 + 55 = 70 (001000110) +15 + 56 = 71 (001000111) +15 + 57 = 72 (001001000) +15 + 58 = 73 (001001001) +15 + 59 = 74 (001001010) +15 + 60 = 75 (001001011) +15 + 61 = 76 (001001100) +15 + 62 = 77 (001001101) +15 + 63 = 78 (001001110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/main.cpp new file mode 100644 index 000000000..c9f564ac6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 9-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 9; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector9 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/promote_extension.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/promote_extension.f new file mode 100644 index 000000000..3c46f3738 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/promote_extension.f @@ -0,0 +1,3 @@ +promote_extension/datawidth.cpp +promote_extension/stimgen.cpp +promote_extension/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/stimgen.h new file mode 100644 index 000000000..1c35e4175 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_extension/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector9& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector9& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/common.h new file mode 100644 index 000000000..2e2569230 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/datawidth.cpp new file mode 100644 index 000000000..f5df52dd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_unsigned tmp_a (in1_width); + sc_unsigned tmp_b (in2_width); + sc_unsigned tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/datawidth.h new file mode 100644 index 000000000..6adbfd87b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector6& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector6& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/golden/promote_lost_carry.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/golden/promote_lost_carry.log new file mode 100644 index 000000000..eb9189493 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/golden/promote_lost_carry.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) +0 + 0 = 0 (000000) +0 + 1 = 1 (000001) +0 + 2 = 2 (000010) +0 + 3 = 3 (000011) +0 + 4 = 4 (000100) +0 + 5 = 5 (000101) +0 + 6 = 6 (000110) +0 + 7 = 7 (000111) +0 + 8 = 8 (001000) +0 + 9 = 9 (001001) +0 + 10 = 10 (001010) +0 + 11 = 11 (001011) +0 + 12 = 12 (001100) +0 + 13 = 13 (001101) +0 + 14 = 14 (001110) +0 + 15 = 15 (001111) +0 + 16 = 16 (010000) +0 + 17 = 17 (010001) +0 + 18 = 18 (010010) +0 + 19 = 19 (010011) +0 + 20 = 20 (010100) +0 + 21 = 21 (010101) +0 + 22 = 22 (010110) +0 + 23 = 23 (010111) +0 + 24 = 24 (011000) +0 + 25 = 25 (011001) +0 + 26 = 26 (011010) +0 + 27 = 27 (011011) +0 + 28 = 28 (011100) +0 + 29 = 29 (011101) +0 + 30 = 30 (011110) +0 + 31 = 31 (011111) +0 + 32 = 32 (100000) +0 + 33 = 33 (100001) +0 + 34 = 34 (100010) +0 + 35 = 35 (100011) +0 + 36 = 36 (100100) +0 + 37 = 37 (100101) +0 + 38 = 38 (100110) +0 + 39 = 39 (100111) +0 + 40 = 40 (101000) +0 + 41 = 41 (101001) +0 + 42 = 42 (101010) +0 + 43 = 43 (101011) +0 + 44 = 44 (101100) +0 + 45 = 45 (101101) +0 + 46 = 46 (101110) +0 + 47 = 47 (101111) +0 + 48 = 48 (110000) +0 + 49 = 49 (110001) +0 + 50 = 50 (110010) +0 + 51 = 51 (110011) +0 + 52 = 52 (110100) +0 + 53 = 53 (110101) +0 + 54 = 54 (110110) +0 + 55 = 55 (110111) +0 + 56 = 56 (111000) +0 + 57 = 57 (111001) +0 + 58 = 58 (111010) +0 + 59 = 59 (111011) +0 + 60 = 60 (111100) +0 + 61 = 61 (111101) +0 + 62 = 62 (111110) +0 + 63 = 63 (111111) +1 + 0 = 1 (000001) +1 + 1 = 2 (000010) +1 + 2 = 3 (000011) +1 + 3 = 4 (000100) +1 + 4 = 5 (000101) +1 + 5 = 6 (000110) +1 + 6 = 7 (000111) +1 + 7 = 8 (001000) +1 + 8 = 9 (001001) +1 + 9 = 10 (001010) +1 + 10 = 11 (001011) +1 + 11 = 12 (001100) +1 + 12 = 13 (001101) +1 + 13 = 14 (001110) +1 + 14 = 15 (001111) +1 + 15 = 16 (010000) +1 + 16 = 17 (010001) +1 + 17 = 18 (010010) +1 + 18 = 19 (010011) +1 + 19 = 20 (010100) +1 + 20 = 21 (010101) +1 + 21 = 22 (010110) +1 + 22 = 23 (010111) +1 + 23 = 24 (011000) +1 + 24 = 25 (011001) +1 + 25 = 26 (011010) +1 + 26 = 27 (011011) +1 + 27 = 28 (011100) +1 + 28 = 29 (011101) +1 + 29 = 30 (011110) +1 + 30 = 31 (011111) +1 + 31 = 32 (100000) +1 + 32 = 33 (100001) +1 + 33 = 34 (100010) +1 + 34 = 35 (100011) +1 + 35 = 36 (100100) +1 + 36 = 37 (100101) +1 + 37 = 38 (100110) +1 + 38 = 39 (100111) +1 + 39 = 40 (101000) +1 + 40 = 41 (101001) +1 + 41 = 42 (101010) +1 + 42 = 43 (101011) +1 + 43 = 44 (101100) +1 + 44 = 45 (101101) +1 + 45 = 46 (101110) +1 + 46 = 47 (101111) +1 + 47 = 48 (110000) +1 + 48 = 49 (110001) +1 + 49 = 50 (110010) +1 + 50 = 51 (110011) +1 + 51 = 52 (110100) +1 + 52 = 53 (110101) +1 + 53 = 54 (110110) +1 + 54 = 55 (110111) +1 + 55 = 56 (111000) +1 + 56 = 57 (111001) +1 + 57 = 58 (111010) +1 + 58 = 59 (111011) +1 + 59 = 60 (111100) +1 + 60 = 61 (111101) +1 + 61 = 62 (111110) +1 + 62 = 63 (111111) +1 + 63 = 0 (000000) +2 + 0 = 2 (000010) +2 + 1 = 3 (000011) +2 + 2 = 4 (000100) +2 + 3 = 5 (000101) +2 + 4 = 6 (000110) +2 + 5 = 7 (000111) +2 + 6 = 8 (001000) +2 + 7 = 9 (001001) +2 + 8 = 10 (001010) +2 + 9 = 11 (001011) +2 + 10 = 12 (001100) +2 + 11 = 13 (001101) +2 + 12 = 14 (001110) +2 + 13 = 15 (001111) +2 + 14 = 16 (010000) +2 + 15 = 17 (010001) +2 + 16 = 18 (010010) +2 + 17 = 19 (010011) +2 + 18 = 20 (010100) +2 + 19 = 21 (010101) +2 + 20 = 22 (010110) +2 + 21 = 23 (010111) +2 + 22 = 24 (011000) +2 + 23 = 25 (011001) +2 + 24 = 26 (011010) +2 + 25 = 27 (011011) +2 + 26 = 28 (011100) +2 + 27 = 29 (011101) +2 + 28 = 30 (011110) +2 + 29 = 31 (011111) +2 + 30 = 32 (100000) +2 + 31 = 33 (100001) +2 + 32 = 34 (100010) +2 + 33 = 35 (100011) +2 + 34 = 36 (100100) +2 + 35 = 37 (100101) +2 + 36 = 38 (100110) +2 + 37 = 39 (100111) +2 + 38 = 40 (101000) +2 + 39 = 41 (101001) +2 + 40 = 42 (101010) +2 + 41 = 43 (101011) +2 + 42 = 44 (101100) +2 + 43 = 45 (101101) +2 + 44 = 46 (101110) +2 + 45 = 47 (101111) +2 + 46 = 48 (110000) +2 + 47 = 49 (110001) +2 + 48 = 50 (110010) +2 + 49 = 51 (110011) +2 + 50 = 52 (110100) +2 + 51 = 53 (110101) +2 + 52 = 54 (110110) +2 + 53 = 55 (110111) +2 + 54 = 56 (111000) +2 + 55 = 57 (111001) +2 + 56 = 58 (111010) +2 + 57 = 59 (111011) +2 + 58 = 60 (111100) +2 + 59 = 61 (111101) +2 + 60 = 62 (111110) +2 + 61 = 63 (111111) +2 + 62 = 0 (000000) +2 + 63 = 1 (000001) +3 + 0 = 3 (000011) +3 + 1 = 4 (000100) +3 + 2 = 5 (000101) +3 + 3 = 6 (000110) +3 + 4 = 7 (000111) +3 + 5 = 8 (001000) +3 + 6 = 9 (001001) +3 + 7 = 10 (001010) +3 + 8 = 11 (001011) +3 + 9 = 12 (001100) +3 + 10 = 13 (001101) +3 + 11 = 14 (001110) +3 + 12 = 15 (001111) +3 + 13 = 16 (010000) +3 + 14 = 17 (010001) +3 + 15 = 18 (010010) +3 + 16 = 19 (010011) +3 + 17 = 20 (010100) +3 + 18 = 21 (010101) +3 + 19 = 22 (010110) +3 + 20 = 23 (010111) +3 + 21 = 24 (011000) +3 + 22 = 25 (011001) +3 + 23 = 26 (011010) +3 + 24 = 27 (011011) +3 + 25 = 28 (011100) +3 + 26 = 29 (011101) +3 + 27 = 30 (011110) +3 + 28 = 31 (011111) +3 + 29 = 32 (100000) +3 + 30 = 33 (100001) +3 + 31 = 34 (100010) +3 + 32 = 35 (100011) +3 + 33 = 36 (100100) +3 + 34 = 37 (100101) +3 + 35 = 38 (100110) +3 + 36 = 39 (100111) +3 + 37 = 40 (101000) +3 + 38 = 41 (101001) +3 + 39 = 42 (101010) +3 + 40 = 43 (101011) +3 + 41 = 44 (101100) +3 + 42 = 45 (101101) +3 + 43 = 46 (101110) +3 + 44 = 47 (101111) +3 + 45 = 48 (110000) +3 + 46 = 49 (110001) +3 + 47 = 50 (110010) +3 + 48 = 51 (110011) +3 + 49 = 52 (110100) +3 + 50 = 53 (110101) +3 + 51 = 54 (110110) +3 + 52 = 55 (110111) +3 + 53 = 56 (111000) +3 + 54 = 57 (111001) +3 + 55 = 58 (111010) +3 + 56 = 59 (111011) +3 + 57 = 60 (111100) +3 + 58 = 61 (111101) +3 + 59 = 62 (111110) +3 + 60 = 63 (111111) +3 + 61 = 0 (000000) +3 + 62 = 1 (000001) +3 + 63 = 2 (000010) +4 + 0 = 4 (000100) +4 + 1 = 5 (000101) +4 + 2 = 6 (000110) +4 + 3 = 7 (000111) +4 + 4 = 8 (001000) +4 + 5 = 9 (001001) +4 + 6 = 10 (001010) +4 + 7 = 11 (001011) +4 + 8 = 12 (001100) +4 + 9 = 13 (001101) +4 + 10 = 14 (001110) +4 + 11 = 15 (001111) +4 + 12 = 16 (010000) +4 + 13 = 17 (010001) +4 + 14 = 18 (010010) +4 + 15 = 19 (010011) +4 + 16 = 20 (010100) +4 + 17 = 21 (010101) +4 + 18 = 22 (010110) +4 + 19 = 23 (010111) +4 + 20 = 24 (011000) +4 + 21 = 25 (011001) +4 + 22 = 26 (011010) +4 + 23 = 27 (011011) +4 + 24 = 28 (011100) +4 + 25 = 29 (011101) +4 + 26 = 30 (011110) +4 + 27 = 31 (011111) +4 + 28 = 32 (100000) +4 + 29 = 33 (100001) +4 + 30 = 34 (100010) +4 + 31 = 35 (100011) +4 + 32 = 36 (100100) +4 + 33 = 37 (100101) +4 + 34 = 38 (100110) +4 + 35 = 39 (100111) +4 + 36 = 40 (101000) +4 + 37 = 41 (101001) +4 + 38 = 42 (101010) +4 + 39 = 43 (101011) +4 + 40 = 44 (101100) +4 + 41 = 45 (101101) +4 + 42 = 46 (101110) +4 + 43 = 47 (101111) +4 + 44 = 48 (110000) +4 + 45 = 49 (110001) +4 + 46 = 50 (110010) +4 + 47 = 51 (110011) +4 + 48 = 52 (110100) +4 + 49 = 53 (110101) +4 + 50 = 54 (110110) +4 + 51 = 55 (110111) +4 + 52 = 56 (111000) +4 + 53 = 57 (111001) +4 + 54 = 58 (111010) +4 + 55 = 59 (111011) +4 + 56 = 60 (111100) +4 + 57 = 61 (111101) +4 + 58 = 62 (111110) +4 + 59 = 63 (111111) +4 + 60 = 0 (000000) +4 + 61 = 1 (000001) +4 + 62 = 2 (000010) +4 + 63 = 3 (000011) +5 + 0 = 5 (000101) +5 + 1 = 6 (000110) +5 + 2 = 7 (000111) +5 + 3 = 8 (001000) +5 + 4 = 9 (001001) +5 + 5 = 10 (001010) +5 + 6 = 11 (001011) +5 + 7 = 12 (001100) +5 + 8 = 13 (001101) +5 + 9 = 14 (001110) +5 + 10 = 15 (001111) +5 + 11 = 16 (010000) +5 + 12 = 17 (010001) +5 + 13 = 18 (010010) +5 + 14 = 19 (010011) +5 + 15 = 20 (010100) +5 + 16 = 21 (010101) +5 + 17 = 22 (010110) +5 + 18 = 23 (010111) +5 + 19 = 24 (011000) +5 + 20 = 25 (011001) +5 + 21 = 26 (011010) +5 + 22 = 27 (011011) +5 + 23 = 28 (011100) +5 + 24 = 29 (011101) +5 + 25 = 30 (011110) +5 + 26 = 31 (011111) +5 + 27 = 32 (100000) +5 + 28 = 33 (100001) +5 + 29 = 34 (100010) +5 + 30 = 35 (100011) +5 + 31 = 36 (100100) +5 + 32 = 37 (100101) +5 + 33 = 38 (100110) +5 + 34 = 39 (100111) +5 + 35 = 40 (101000) +5 + 36 = 41 (101001) +5 + 37 = 42 (101010) +5 + 38 = 43 (101011) +5 + 39 = 44 (101100) +5 + 40 = 45 (101101) +5 + 41 = 46 (101110) +5 + 42 = 47 (101111) +5 + 43 = 48 (110000) +5 + 44 = 49 (110001) +5 + 45 = 50 (110010) +5 + 46 = 51 (110011) +5 + 47 = 52 (110100) +5 + 48 = 53 (110101) +5 + 49 = 54 (110110) +5 + 50 = 55 (110111) +5 + 51 = 56 (111000) +5 + 52 = 57 (111001) +5 + 53 = 58 (111010) +5 + 54 = 59 (111011) +5 + 55 = 60 (111100) +5 + 56 = 61 (111101) +5 + 57 = 62 (111110) +5 + 58 = 63 (111111) +5 + 59 = 0 (000000) +5 + 60 = 1 (000001) +5 + 61 = 2 (000010) +5 + 62 = 3 (000011) +5 + 63 = 4 (000100) +6 + 0 = 6 (000110) +6 + 1 = 7 (000111) +6 + 2 = 8 (001000) +6 + 3 = 9 (001001) +6 + 4 = 10 (001010) +6 + 5 = 11 (001011) +6 + 6 = 12 (001100) +6 + 7 = 13 (001101) +6 + 8 = 14 (001110) +6 + 9 = 15 (001111) +6 + 10 = 16 (010000) +6 + 11 = 17 (010001) +6 + 12 = 18 (010010) +6 + 13 = 19 (010011) +6 + 14 = 20 (010100) +6 + 15 = 21 (010101) +6 + 16 = 22 (010110) +6 + 17 = 23 (010111) +6 + 18 = 24 (011000) +6 + 19 = 25 (011001) +6 + 20 = 26 (011010) +6 + 21 = 27 (011011) +6 + 22 = 28 (011100) +6 + 23 = 29 (011101) +6 + 24 = 30 (011110) +6 + 25 = 31 (011111) +6 + 26 = 32 (100000) +6 + 27 = 33 (100001) +6 + 28 = 34 (100010) +6 + 29 = 35 (100011) +6 + 30 = 36 (100100) +6 + 31 = 37 (100101) +6 + 32 = 38 (100110) +6 + 33 = 39 (100111) +6 + 34 = 40 (101000) +6 + 35 = 41 (101001) +6 + 36 = 42 (101010) +6 + 37 = 43 (101011) +6 + 38 = 44 (101100) +6 + 39 = 45 (101101) +6 + 40 = 46 (101110) +6 + 41 = 47 (101111) +6 + 42 = 48 (110000) +6 + 43 = 49 (110001) +6 + 44 = 50 (110010) +6 + 45 = 51 (110011) +6 + 46 = 52 (110100) +6 + 47 = 53 (110101) +6 + 48 = 54 (110110) +6 + 49 = 55 (110111) +6 + 50 = 56 (111000) +6 + 51 = 57 (111001) +6 + 52 = 58 (111010) +6 + 53 = 59 (111011) +6 + 54 = 60 (111100) +6 + 55 = 61 (111101) +6 + 56 = 62 (111110) +6 + 57 = 63 (111111) +6 + 58 = 0 (000000) +6 + 59 = 1 (000001) +6 + 60 = 2 (000010) +6 + 61 = 3 (000011) +6 + 62 = 4 (000100) +6 + 63 = 5 (000101) +7 + 0 = 7 (000111) +7 + 1 = 8 (001000) +7 + 2 = 9 (001001) +7 + 3 = 10 (001010) +7 + 4 = 11 (001011) +7 + 5 = 12 (001100) +7 + 6 = 13 (001101) +7 + 7 = 14 (001110) +7 + 8 = 15 (001111) +7 + 9 = 16 (010000) +7 + 10 = 17 (010001) +7 + 11 = 18 (010010) +7 + 12 = 19 (010011) +7 + 13 = 20 (010100) +7 + 14 = 21 (010101) +7 + 15 = 22 (010110) +7 + 16 = 23 (010111) +7 + 17 = 24 (011000) +7 + 18 = 25 (011001) +7 + 19 = 26 (011010) +7 + 20 = 27 (011011) +7 + 21 = 28 (011100) +7 + 22 = 29 (011101) +7 + 23 = 30 (011110) +7 + 24 = 31 (011111) +7 + 25 = 32 (100000) +7 + 26 = 33 (100001) +7 + 27 = 34 (100010) +7 + 28 = 35 (100011) +7 + 29 = 36 (100100) +7 + 30 = 37 (100101) +7 + 31 = 38 (100110) +7 + 32 = 39 (100111) +7 + 33 = 40 (101000) +7 + 34 = 41 (101001) +7 + 35 = 42 (101010) +7 + 36 = 43 (101011) +7 + 37 = 44 (101100) +7 + 38 = 45 (101101) +7 + 39 = 46 (101110) +7 + 40 = 47 (101111) +7 + 41 = 48 (110000) +7 + 42 = 49 (110001) +7 + 43 = 50 (110010) +7 + 44 = 51 (110011) +7 + 45 = 52 (110100) +7 + 46 = 53 (110101) +7 + 47 = 54 (110110) +7 + 48 = 55 (110111) +7 + 49 = 56 (111000) +7 + 50 = 57 (111001) +7 + 51 = 58 (111010) +7 + 52 = 59 (111011) +7 + 53 = 60 (111100) +7 + 54 = 61 (111101) +7 + 55 = 62 (111110) +7 + 56 = 63 (111111) +7 + 57 = 0 (000000) +7 + 58 = 1 (000001) +7 + 59 = 2 (000010) +7 + 60 = 3 (000011) +7 + 61 = 4 (000100) +7 + 62 = 5 (000101) +7 + 63 = 6 (000110) +8 + 0 = 8 (001000) +8 + 1 = 9 (001001) +8 + 2 = 10 (001010) +8 + 3 = 11 (001011) +8 + 4 = 12 (001100) +8 + 5 = 13 (001101) +8 + 6 = 14 (001110) +8 + 7 = 15 (001111) +8 + 8 = 16 (010000) +8 + 9 = 17 (010001) +8 + 10 = 18 (010010) +8 + 11 = 19 (010011) +8 + 12 = 20 (010100) +8 + 13 = 21 (010101) +8 + 14 = 22 (010110) +8 + 15 = 23 (010111) +8 + 16 = 24 (011000) +8 + 17 = 25 (011001) +8 + 18 = 26 (011010) +8 + 19 = 27 (011011) +8 + 20 = 28 (011100) +8 + 21 = 29 (011101) +8 + 22 = 30 (011110) +8 + 23 = 31 (011111) +8 + 24 = 32 (100000) +8 + 25 = 33 (100001) +8 + 26 = 34 (100010) +8 + 27 = 35 (100011) +8 + 28 = 36 (100100) +8 + 29 = 37 (100101) +8 + 30 = 38 (100110) +8 + 31 = 39 (100111) +8 + 32 = 40 (101000) +8 + 33 = 41 (101001) +8 + 34 = 42 (101010) +8 + 35 = 43 (101011) +8 + 36 = 44 (101100) +8 + 37 = 45 (101101) +8 + 38 = 46 (101110) +8 + 39 = 47 (101111) +8 + 40 = 48 (110000) +8 + 41 = 49 (110001) +8 + 42 = 50 (110010) +8 + 43 = 51 (110011) +8 + 44 = 52 (110100) +8 + 45 = 53 (110101) +8 + 46 = 54 (110110) +8 + 47 = 55 (110111) +8 + 48 = 56 (111000) +8 + 49 = 57 (111001) +8 + 50 = 58 (111010) +8 + 51 = 59 (111011) +8 + 52 = 60 (111100) +8 + 53 = 61 (111101) +8 + 54 = 62 (111110) +8 + 55 = 63 (111111) +8 + 56 = 0 (000000) +8 + 57 = 1 (000001) +8 + 58 = 2 (000010) +8 + 59 = 3 (000011) +8 + 60 = 4 (000100) +8 + 61 = 5 (000101) +8 + 62 = 6 (000110) +8 + 63 = 7 (000111) +9 + 0 = 9 (001001) +9 + 1 = 10 (001010) +9 + 2 = 11 (001011) +9 + 3 = 12 (001100) +9 + 4 = 13 (001101) +9 + 5 = 14 (001110) +9 + 6 = 15 (001111) +9 + 7 = 16 (010000) +9 + 8 = 17 (010001) +9 + 9 = 18 (010010) +9 + 10 = 19 (010011) +9 + 11 = 20 (010100) +9 + 12 = 21 (010101) +9 + 13 = 22 (010110) +9 + 14 = 23 (010111) +9 + 15 = 24 (011000) +9 + 16 = 25 (011001) +9 + 17 = 26 (011010) +9 + 18 = 27 (011011) +9 + 19 = 28 (011100) +9 + 20 = 29 (011101) +9 + 21 = 30 (011110) +9 + 22 = 31 (011111) +9 + 23 = 32 (100000) +9 + 24 = 33 (100001) +9 + 25 = 34 (100010) +9 + 26 = 35 (100011) +9 + 27 = 36 (100100) +9 + 28 = 37 (100101) +9 + 29 = 38 (100110) +9 + 30 = 39 (100111) +9 + 31 = 40 (101000) +9 + 32 = 41 (101001) +9 + 33 = 42 (101010) +9 + 34 = 43 (101011) +9 + 35 = 44 (101100) +9 + 36 = 45 (101101) +9 + 37 = 46 (101110) +9 + 38 = 47 (101111) +9 + 39 = 48 (110000) +9 + 40 = 49 (110001) +9 + 41 = 50 (110010) +9 + 42 = 51 (110011) +9 + 43 = 52 (110100) +9 + 44 = 53 (110101) +9 + 45 = 54 (110110) +9 + 46 = 55 (110111) +9 + 47 = 56 (111000) +9 + 48 = 57 (111001) +9 + 49 = 58 (111010) +9 + 50 = 59 (111011) +9 + 51 = 60 (111100) +9 + 52 = 61 (111101) +9 + 53 = 62 (111110) +9 + 54 = 63 (111111) +9 + 55 = 0 (000000) +9 + 56 = 1 (000001) +9 + 57 = 2 (000010) +9 + 58 = 3 (000011) +9 + 59 = 4 (000100) +9 + 60 = 5 (000101) +9 + 61 = 6 (000110) +9 + 62 = 7 (000111) +9 + 63 = 8 (001000) +10 + 0 = 10 (001010) +10 + 1 = 11 (001011) +10 + 2 = 12 (001100) +10 + 3 = 13 (001101) +10 + 4 = 14 (001110) +10 + 5 = 15 (001111) +10 + 6 = 16 (010000) +10 + 7 = 17 (010001) +10 + 8 = 18 (010010) +10 + 9 = 19 (010011) +10 + 10 = 20 (010100) +10 + 11 = 21 (010101) +10 + 12 = 22 (010110) +10 + 13 = 23 (010111) +10 + 14 = 24 (011000) +10 + 15 = 25 (011001) +10 + 16 = 26 (011010) +10 + 17 = 27 (011011) +10 + 18 = 28 (011100) +10 + 19 = 29 (011101) +10 + 20 = 30 (011110) +10 + 21 = 31 (011111) +10 + 22 = 32 (100000) +10 + 23 = 33 (100001) +10 + 24 = 34 (100010) +10 + 25 = 35 (100011) +10 + 26 = 36 (100100) +10 + 27 = 37 (100101) +10 + 28 = 38 (100110) +10 + 29 = 39 (100111) +10 + 30 = 40 (101000) +10 + 31 = 41 (101001) +10 + 32 = 42 (101010) +10 + 33 = 43 (101011) +10 + 34 = 44 (101100) +10 + 35 = 45 (101101) +10 + 36 = 46 (101110) +10 + 37 = 47 (101111) +10 + 38 = 48 (110000) +10 + 39 = 49 (110001) +10 + 40 = 50 (110010) +10 + 41 = 51 (110011) +10 + 42 = 52 (110100) +10 + 43 = 53 (110101) +10 + 44 = 54 (110110) +10 + 45 = 55 (110111) +10 + 46 = 56 (111000) +10 + 47 = 57 (111001) +10 + 48 = 58 (111010) +10 + 49 = 59 (111011) +10 + 50 = 60 (111100) +10 + 51 = 61 (111101) +10 + 52 = 62 (111110) +10 + 53 = 63 (111111) +10 + 54 = 0 (000000) +10 + 55 = 1 (000001) +10 + 56 = 2 (000010) +10 + 57 = 3 (000011) +10 + 58 = 4 (000100) +10 + 59 = 5 (000101) +10 + 60 = 6 (000110) +10 + 61 = 7 (000111) +10 + 62 = 8 (001000) +10 + 63 = 9 (001001) +11 + 0 = 11 (001011) +11 + 1 = 12 (001100) +11 + 2 = 13 (001101) +11 + 3 = 14 (001110) +11 + 4 = 15 (001111) +11 + 5 = 16 (010000) +11 + 6 = 17 (010001) +11 + 7 = 18 (010010) +11 + 8 = 19 (010011) +11 + 9 = 20 (010100) +11 + 10 = 21 (010101) +11 + 11 = 22 (010110) +11 + 12 = 23 (010111) +11 + 13 = 24 (011000) +11 + 14 = 25 (011001) +11 + 15 = 26 (011010) +11 + 16 = 27 (011011) +11 + 17 = 28 (011100) +11 + 18 = 29 (011101) +11 + 19 = 30 (011110) +11 + 20 = 31 (011111) +11 + 21 = 32 (100000) +11 + 22 = 33 (100001) +11 + 23 = 34 (100010) +11 + 24 = 35 (100011) +11 + 25 = 36 (100100) +11 + 26 = 37 (100101) +11 + 27 = 38 (100110) +11 + 28 = 39 (100111) +11 + 29 = 40 (101000) +11 + 30 = 41 (101001) +11 + 31 = 42 (101010) +11 + 32 = 43 (101011) +11 + 33 = 44 (101100) +11 + 34 = 45 (101101) +11 + 35 = 46 (101110) +11 + 36 = 47 (101111) +11 + 37 = 48 (110000) +11 + 38 = 49 (110001) +11 + 39 = 50 (110010) +11 + 40 = 51 (110011) +11 + 41 = 52 (110100) +11 + 42 = 53 (110101) +11 + 43 = 54 (110110) +11 + 44 = 55 (110111) +11 + 45 = 56 (111000) +11 + 46 = 57 (111001) +11 + 47 = 58 (111010) +11 + 48 = 59 (111011) +11 + 49 = 60 (111100) +11 + 50 = 61 (111101) +11 + 51 = 62 (111110) +11 + 52 = 63 (111111) +11 + 53 = 0 (000000) +11 + 54 = 1 (000001) +11 + 55 = 2 (000010) +11 + 56 = 3 (000011) +11 + 57 = 4 (000100) +11 + 58 = 5 (000101) +11 + 59 = 6 (000110) +11 + 60 = 7 (000111) +11 + 61 = 8 (001000) +11 + 62 = 9 (001001) +11 + 63 = 10 (001010) +12 + 0 = 12 (001100) +12 + 1 = 13 (001101) +12 + 2 = 14 (001110) +12 + 3 = 15 (001111) +12 + 4 = 16 (010000) +12 + 5 = 17 (010001) +12 + 6 = 18 (010010) +12 + 7 = 19 (010011) +12 + 8 = 20 (010100) +12 + 9 = 21 (010101) +12 + 10 = 22 (010110) +12 + 11 = 23 (010111) +12 + 12 = 24 (011000) +12 + 13 = 25 (011001) +12 + 14 = 26 (011010) +12 + 15 = 27 (011011) +12 + 16 = 28 (011100) +12 + 17 = 29 (011101) +12 + 18 = 30 (011110) +12 + 19 = 31 (011111) +12 + 20 = 32 (100000) +12 + 21 = 33 (100001) +12 + 22 = 34 (100010) +12 + 23 = 35 (100011) +12 + 24 = 36 (100100) +12 + 25 = 37 (100101) +12 + 26 = 38 (100110) +12 + 27 = 39 (100111) +12 + 28 = 40 (101000) +12 + 29 = 41 (101001) +12 + 30 = 42 (101010) +12 + 31 = 43 (101011) +12 + 32 = 44 (101100) +12 + 33 = 45 (101101) +12 + 34 = 46 (101110) +12 + 35 = 47 (101111) +12 + 36 = 48 (110000) +12 + 37 = 49 (110001) +12 + 38 = 50 (110010) +12 + 39 = 51 (110011) +12 + 40 = 52 (110100) +12 + 41 = 53 (110101) +12 + 42 = 54 (110110) +12 + 43 = 55 (110111) +12 + 44 = 56 (111000) +12 + 45 = 57 (111001) +12 + 46 = 58 (111010) +12 + 47 = 59 (111011) +12 + 48 = 60 (111100) +12 + 49 = 61 (111101) +12 + 50 = 62 (111110) +12 + 51 = 63 (111111) +12 + 52 = 0 (000000) +12 + 53 = 1 (000001) +12 + 54 = 2 (000010) +12 + 55 = 3 (000011) +12 + 56 = 4 (000100) +12 + 57 = 5 (000101) +12 + 58 = 6 (000110) +12 + 59 = 7 (000111) +12 + 60 = 8 (001000) +12 + 61 = 9 (001001) +12 + 62 = 10 (001010) +12 + 63 = 11 (001011) +13 + 0 = 13 (001101) +13 + 1 = 14 (001110) +13 + 2 = 15 (001111) +13 + 3 = 16 (010000) +13 + 4 = 17 (010001) +13 + 5 = 18 (010010) +13 + 6 = 19 (010011) +13 + 7 = 20 (010100) +13 + 8 = 21 (010101) +13 + 9 = 22 (010110) +13 + 10 = 23 (010111) +13 + 11 = 24 (011000) +13 + 12 = 25 (011001) +13 + 13 = 26 (011010) +13 + 14 = 27 (011011) +13 + 15 = 28 (011100) +13 + 16 = 29 (011101) +13 + 17 = 30 (011110) +13 + 18 = 31 (011111) +13 + 19 = 32 (100000) +13 + 20 = 33 (100001) +13 + 21 = 34 (100010) +13 + 22 = 35 (100011) +13 + 23 = 36 (100100) +13 + 24 = 37 (100101) +13 + 25 = 38 (100110) +13 + 26 = 39 (100111) +13 + 27 = 40 (101000) +13 + 28 = 41 (101001) +13 + 29 = 42 (101010) +13 + 30 = 43 (101011) +13 + 31 = 44 (101100) +13 + 32 = 45 (101101) +13 + 33 = 46 (101110) +13 + 34 = 47 (101111) +13 + 35 = 48 (110000) +13 + 36 = 49 (110001) +13 + 37 = 50 (110010) +13 + 38 = 51 (110011) +13 + 39 = 52 (110100) +13 + 40 = 53 (110101) +13 + 41 = 54 (110110) +13 + 42 = 55 (110111) +13 + 43 = 56 (111000) +13 + 44 = 57 (111001) +13 + 45 = 58 (111010) +13 + 46 = 59 (111011) +13 + 47 = 60 (111100) +13 + 48 = 61 (111101) +13 + 49 = 62 (111110) +13 + 50 = 63 (111111) +13 + 51 = 0 (000000) +13 + 52 = 1 (000001) +13 + 53 = 2 (000010) +13 + 54 = 3 (000011) +13 + 55 = 4 (000100) +13 + 56 = 5 (000101) +13 + 57 = 6 (000110) +13 + 58 = 7 (000111) +13 + 59 = 8 (001000) +13 + 60 = 9 (001001) +13 + 61 = 10 (001010) +13 + 62 = 11 (001011) +13 + 63 = 12 (001100) +14 + 0 = 14 (001110) +14 + 1 = 15 (001111) +14 + 2 = 16 (010000) +14 + 3 = 17 (010001) +14 + 4 = 18 (010010) +14 + 5 = 19 (010011) +14 + 6 = 20 (010100) +14 + 7 = 21 (010101) +14 + 8 = 22 (010110) +14 + 9 = 23 (010111) +14 + 10 = 24 (011000) +14 + 11 = 25 (011001) +14 + 12 = 26 (011010) +14 + 13 = 27 (011011) +14 + 14 = 28 (011100) +14 + 15 = 29 (011101) +14 + 16 = 30 (011110) +14 + 17 = 31 (011111) +14 + 18 = 32 (100000) +14 + 19 = 33 (100001) +14 + 20 = 34 (100010) +14 + 21 = 35 (100011) +14 + 22 = 36 (100100) +14 + 23 = 37 (100101) +14 + 24 = 38 (100110) +14 + 25 = 39 (100111) +14 + 26 = 40 (101000) +14 + 27 = 41 (101001) +14 + 28 = 42 (101010) +14 + 29 = 43 (101011) +14 + 30 = 44 (101100) +14 + 31 = 45 (101101) +14 + 32 = 46 (101110) +14 + 33 = 47 (101111) +14 + 34 = 48 (110000) +14 + 35 = 49 (110001) +14 + 36 = 50 (110010) +14 + 37 = 51 (110011) +14 + 38 = 52 (110100) +14 + 39 = 53 (110101) +14 + 40 = 54 (110110) +14 + 41 = 55 (110111) +14 + 42 = 56 (111000) +14 + 43 = 57 (111001) +14 + 44 = 58 (111010) +14 + 45 = 59 (111011) +14 + 46 = 60 (111100) +14 + 47 = 61 (111101) +14 + 48 = 62 (111110) +14 + 49 = 63 (111111) +14 + 50 = 0 (000000) +14 + 51 = 1 (000001) +14 + 52 = 2 (000010) +14 + 53 = 3 (000011) +14 + 54 = 4 (000100) +14 + 55 = 5 (000101) +14 + 56 = 6 (000110) +14 + 57 = 7 (000111) +14 + 58 = 8 (001000) +14 + 59 = 9 (001001) +14 + 60 = 10 (001010) +14 + 61 = 11 (001011) +14 + 62 = 12 (001100) +14 + 63 = 13 (001101) +15 + 0 = 15 (001111) +15 + 1 = 16 (010000) +15 + 2 = 17 (010001) +15 + 3 = 18 (010010) +15 + 4 = 19 (010011) +15 + 5 = 20 (010100) +15 + 6 = 21 (010101) +15 + 7 = 22 (010110) +15 + 8 = 23 (010111) +15 + 9 = 24 (011000) +15 + 10 = 25 (011001) +15 + 11 = 26 (011010) +15 + 12 = 27 (011011) +15 + 13 = 28 (011100) +15 + 14 = 29 (011101) +15 + 15 = 30 (011110) +15 + 16 = 31 (011111) +15 + 17 = 32 (100000) +15 + 18 = 33 (100001) +15 + 19 = 34 (100010) +15 + 20 = 35 (100011) +15 + 21 = 36 (100100) +15 + 22 = 37 (100101) +15 + 23 = 38 (100110) +15 + 24 = 39 (100111) +15 + 25 = 40 (101000) +15 + 26 = 41 (101001) +15 + 27 = 42 (101010) +15 + 28 = 43 (101011) +15 + 29 = 44 (101100) +15 + 30 = 45 (101101) +15 + 31 = 46 (101110) +15 + 32 = 47 (101111) +15 + 33 = 48 (110000) +15 + 34 = 49 (110001) +15 + 35 = 50 (110010) +15 + 36 = 51 (110011) +15 + 37 = 52 (110100) +15 + 38 = 53 (110101) +15 + 39 = 54 (110110) +15 + 40 = 55 (110111) +15 + 41 = 56 (111000) +15 + 42 = 57 (111001) +15 + 43 = 58 (111010) +15 + 44 = 59 (111011) +15 + 45 = 60 (111100) +15 + 46 = 61 (111101) +15 + 47 = 62 (111110) +15 + 48 = 63 (111111) +15 + 49 = 0 (000000) +15 + 50 = 1 (000001) +15 + 51 = 2 (000010) +15 + 52 = 3 (000011) +15 + 53 = 4 (000100) +15 + 54 = 5 (000101) +15 + 55 = 6 (000110) +15 + 56 = 7 (000111) +15 + 57 = 8 (001000) +15 + 58 = 9 (001001) +15 + 59 = 10 (001010) +15 + 60 = 11 (001011) +15 + 61 = 12 (001100) +15 + 62 = 13 (001101) +15 + 63 = 14 (001110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/main.cpp new file mode 100644 index 000000000..3f06a6d6c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 6-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 6; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector6 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/promote_lost_carry.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/promote_lost_carry.f new file mode 100644 index 000000000..052991cee --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/promote_lost_carry.f @@ -0,0 +1,3 @@ +promote_lost_carry/datawidth.cpp +promote_lost_carry/stimgen.cpp +promote_lost_carry/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/stimgen.h new file mode 100644 index 000000000..e2675e0b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_lost_carry/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/common.h new file mode 100644 index 000000000..2e2569230 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/datawidth.cpp new file mode 100644 index 000000000..f5df52dd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_unsigned tmp_a (in1_width); + sc_unsigned tmp_b (in2_width); + sc_unsigned tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/datawidth.h new file mode 100644 index 000000000..12f04c9be --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector4& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector4& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/golden/promote_truncation.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/golden/promote_truncation.log new file mode 100644 index 000000000..5088bd680 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/golden/promote_truncation.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000) +0 + 1 = 1 (0001) +0 + 2 = 2 (0010) +0 + 3 = 3 (0011) +0 + 4 = 4 (0100) +0 + 5 = 5 (0101) +0 + 6 = 6 (0110) +0 + 7 = 7 (0111) +0 + 8 = 8 (1000) +0 + 9 = 9 (1001) +0 + 10 = 10 (1010) +0 + 11 = 11 (1011) +0 + 12 = 12 (1100) +0 + 13 = 13 (1101) +0 + 14 = 14 (1110) +0 + 15 = 15 (1111) +0 + 16 = 0 (0000) +0 + 17 = 1 (0001) +0 + 18 = 2 (0010) +0 + 19 = 3 (0011) +0 + 20 = 4 (0100) +0 + 21 = 5 (0101) +0 + 22 = 6 (0110) +0 + 23 = 7 (0111) +0 + 24 = 8 (1000) +0 + 25 = 9 (1001) +0 + 26 = 10 (1010) +0 + 27 = 11 (1011) +0 + 28 = 12 (1100) +0 + 29 = 13 (1101) +0 + 30 = 14 (1110) +0 + 31 = 15 (1111) +0 + 32 = 0 (0000) +0 + 33 = 1 (0001) +0 + 34 = 2 (0010) +0 + 35 = 3 (0011) +0 + 36 = 4 (0100) +0 + 37 = 5 (0101) +0 + 38 = 6 (0110) +0 + 39 = 7 (0111) +0 + 40 = 8 (1000) +0 + 41 = 9 (1001) +0 + 42 = 10 (1010) +0 + 43 = 11 (1011) +0 + 44 = 12 (1100) +0 + 45 = 13 (1101) +0 + 46 = 14 (1110) +0 + 47 = 15 (1111) +0 + 48 = 0 (0000) +0 + 49 = 1 (0001) +0 + 50 = 2 (0010) +0 + 51 = 3 (0011) +0 + 52 = 4 (0100) +0 + 53 = 5 (0101) +0 + 54 = 6 (0110) +0 + 55 = 7 (0111) +0 + 56 = 8 (1000) +0 + 57 = 9 (1001) +0 + 58 = 10 (1010) +0 + 59 = 11 (1011) +0 + 60 = 12 (1100) +0 + 61 = 13 (1101) +0 + 62 = 14 (1110) +0 + 63 = 15 (1111) +1 + 0 = 1 (0001) +1 + 1 = 2 (0010) +1 + 2 = 3 (0011) +1 + 3 = 4 (0100) +1 + 4 = 5 (0101) +1 + 5 = 6 (0110) +1 + 6 = 7 (0111) +1 + 7 = 8 (1000) +1 + 8 = 9 (1001) +1 + 9 = 10 (1010) +1 + 10 = 11 (1011) +1 + 11 = 12 (1100) +1 + 12 = 13 (1101) +1 + 13 = 14 (1110) +1 + 14 = 15 (1111) +1 + 15 = 0 (0000) +1 + 16 = 1 (0001) +1 + 17 = 2 (0010) +1 + 18 = 3 (0011) +1 + 19 = 4 (0100) +1 + 20 = 5 (0101) +1 + 21 = 6 (0110) +1 + 22 = 7 (0111) +1 + 23 = 8 (1000) +1 + 24 = 9 (1001) +1 + 25 = 10 (1010) +1 + 26 = 11 (1011) +1 + 27 = 12 (1100) +1 + 28 = 13 (1101) +1 + 29 = 14 (1110) +1 + 30 = 15 (1111) +1 + 31 = 0 (0000) +1 + 32 = 1 (0001) +1 + 33 = 2 (0010) +1 + 34 = 3 (0011) +1 + 35 = 4 (0100) +1 + 36 = 5 (0101) +1 + 37 = 6 (0110) +1 + 38 = 7 (0111) +1 + 39 = 8 (1000) +1 + 40 = 9 (1001) +1 + 41 = 10 (1010) +1 + 42 = 11 (1011) +1 + 43 = 12 (1100) +1 + 44 = 13 (1101) +1 + 45 = 14 (1110) +1 + 46 = 15 (1111) +1 + 47 = 0 (0000) +1 + 48 = 1 (0001) +1 + 49 = 2 (0010) +1 + 50 = 3 (0011) +1 + 51 = 4 (0100) +1 + 52 = 5 (0101) +1 + 53 = 6 (0110) +1 + 54 = 7 (0111) +1 + 55 = 8 (1000) +1 + 56 = 9 (1001) +1 + 57 = 10 (1010) +1 + 58 = 11 (1011) +1 + 59 = 12 (1100) +1 + 60 = 13 (1101) +1 + 61 = 14 (1110) +1 + 62 = 15 (1111) +1 + 63 = 0 (0000) +2 + 0 = 2 (0010) +2 + 1 = 3 (0011) +2 + 2 = 4 (0100) +2 + 3 = 5 (0101) +2 + 4 = 6 (0110) +2 + 5 = 7 (0111) +2 + 6 = 8 (1000) +2 + 7 = 9 (1001) +2 + 8 = 10 (1010) +2 + 9 = 11 (1011) +2 + 10 = 12 (1100) +2 + 11 = 13 (1101) +2 + 12 = 14 (1110) +2 + 13 = 15 (1111) +2 + 14 = 0 (0000) +2 + 15 = 1 (0001) +2 + 16 = 2 (0010) +2 + 17 = 3 (0011) +2 + 18 = 4 (0100) +2 + 19 = 5 (0101) +2 + 20 = 6 (0110) +2 + 21 = 7 (0111) +2 + 22 = 8 (1000) +2 + 23 = 9 (1001) +2 + 24 = 10 (1010) +2 + 25 = 11 (1011) +2 + 26 = 12 (1100) +2 + 27 = 13 (1101) +2 + 28 = 14 (1110) +2 + 29 = 15 (1111) +2 + 30 = 0 (0000) +2 + 31 = 1 (0001) +2 + 32 = 2 (0010) +2 + 33 = 3 (0011) +2 + 34 = 4 (0100) +2 + 35 = 5 (0101) +2 + 36 = 6 (0110) +2 + 37 = 7 (0111) +2 + 38 = 8 (1000) +2 + 39 = 9 (1001) +2 + 40 = 10 (1010) +2 + 41 = 11 (1011) +2 + 42 = 12 (1100) +2 + 43 = 13 (1101) +2 + 44 = 14 (1110) +2 + 45 = 15 (1111) +2 + 46 = 0 (0000) +2 + 47 = 1 (0001) +2 + 48 = 2 (0010) +2 + 49 = 3 (0011) +2 + 50 = 4 (0100) +2 + 51 = 5 (0101) +2 + 52 = 6 (0110) +2 + 53 = 7 (0111) +2 + 54 = 8 (1000) +2 + 55 = 9 (1001) +2 + 56 = 10 (1010) +2 + 57 = 11 (1011) +2 + 58 = 12 (1100) +2 + 59 = 13 (1101) +2 + 60 = 14 (1110) +2 + 61 = 15 (1111) +2 + 62 = 0 (0000) +2 + 63 = 1 (0001) +3 + 0 = 3 (0011) +3 + 1 = 4 (0100) +3 + 2 = 5 (0101) +3 + 3 = 6 (0110) +3 + 4 = 7 (0111) +3 + 5 = 8 (1000) +3 + 6 = 9 (1001) +3 + 7 = 10 (1010) +3 + 8 = 11 (1011) +3 + 9 = 12 (1100) +3 + 10 = 13 (1101) +3 + 11 = 14 (1110) +3 + 12 = 15 (1111) +3 + 13 = 0 (0000) +3 + 14 = 1 (0001) +3 + 15 = 2 (0010) +3 + 16 = 3 (0011) +3 + 17 = 4 (0100) +3 + 18 = 5 (0101) +3 + 19 = 6 (0110) +3 + 20 = 7 (0111) +3 + 21 = 8 (1000) +3 + 22 = 9 (1001) +3 + 23 = 10 (1010) +3 + 24 = 11 (1011) +3 + 25 = 12 (1100) +3 + 26 = 13 (1101) +3 + 27 = 14 (1110) +3 + 28 = 15 (1111) +3 + 29 = 0 (0000) +3 + 30 = 1 (0001) +3 + 31 = 2 (0010) +3 + 32 = 3 (0011) +3 + 33 = 4 (0100) +3 + 34 = 5 (0101) +3 + 35 = 6 (0110) +3 + 36 = 7 (0111) +3 + 37 = 8 (1000) +3 + 38 = 9 (1001) +3 + 39 = 10 (1010) +3 + 40 = 11 (1011) +3 + 41 = 12 (1100) +3 + 42 = 13 (1101) +3 + 43 = 14 (1110) +3 + 44 = 15 (1111) +3 + 45 = 0 (0000) +3 + 46 = 1 (0001) +3 + 47 = 2 (0010) +3 + 48 = 3 (0011) +3 + 49 = 4 (0100) +3 + 50 = 5 (0101) +3 + 51 = 6 (0110) +3 + 52 = 7 (0111) +3 + 53 = 8 (1000) +3 + 54 = 9 (1001) +3 + 55 = 10 (1010) +3 + 56 = 11 (1011) +3 + 57 = 12 (1100) +3 + 58 = 13 (1101) +3 + 59 = 14 (1110) +3 + 60 = 15 (1111) +3 + 61 = 0 (0000) +3 + 62 = 1 (0001) +3 + 63 = 2 (0010) +4 + 0 = 4 (0100) +4 + 1 = 5 (0101) +4 + 2 = 6 (0110) +4 + 3 = 7 (0111) +4 + 4 = 8 (1000) +4 + 5 = 9 (1001) +4 + 6 = 10 (1010) +4 + 7 = 11 (1011) +4 + 8 = 12 (1100) +4 + 9 = 13 (1101) +4 + 10 = 14 (1110) +4 + 11 = 15 (1111) +4 + 12 = 0 (0000) +4 + 13 = 1 (0001) +4 + 14 = 2 (0010) +4 + 15 = 3 (0011) +4 + 16 = 4 (0100) +4 + 17 = 5 (0101) +4 + 18 = 6 (0110) +4 + 19 = 7 (0111) +4 + 20 = 8 (1000) +4 + 21 = 9 (1001) +4 + 22 = 10 (1010) +4 + 23 = 11 (1011) +4 + 24 = 12 (1100) +4 + 25 = 13 (1101) +4 + 26 = 14 (1110) +4 + 27 = 15 (1111) +4 + 28 = 0 (0000) +4 + 29 = 1 (0001) +4 + 30 = 2 (0010) +4 + 31 = 3 (0011) +4 + 32 = 4 (0100) +4 + 33 = 5 (0101) +4 + 34 = 6 (0110) +4 + 35 = 7 (0111) +4 + 36 = 8 (1000) +4 + 37 = 9 (1001) +4 + 38 = 10 (1010) +4 + 39 = 11 (1011) +4 + 40 = 12 (1100) +4 + 41 = 13 (1101) +4 + 42 = 14 (1110) +4 + 43 = 15 (1111) +4 + 44 = 0 (0000) +4 + 45 = 1 (0001) +4 + 46 = 2 (0010) +4 + 47 = 3 (0011) +4 + 48 = 4 (0100) +4 + 49 = 5 (0101) +4 + 50 = 6 (0110) +4 + 51 = 7 (0111) +4 + 52 = 8 (1000) +4 + 53 = 9 (1001) +4 + 54 = 10 (1010) +4 + 55 = 11 (1011) +4 + 56 = 12 (1100) +4 + 57 = 13 (1101) +4 + 58 = 14 (1110) +4 + 59 = 15 (1111) +4 + 60 = 0 (0000) +4 + 61 = 1 (0001) +4 + 62 = 2 (0010) +4 + 63 = 3 (0011) +5 + 0 = 5 (0101) +5 + 1 = 6 (0110) +5 + 2 = 7 (0111) +5 + 3 = 8 (1000) +5 + 4 = 9 (1001) +5 + 5 = 10 (1010) +5 + 6 = 11 (1011) +5 + 7 = 12 (1100) +5 + 8 = 13 (1101) +5 + 9 = 14 (1110) +5 + 10 = 15 (1111) +5 + 11 = 0 (0000) +5 + 12 = 1 (0001) +5 + 13 = 2 (0010) +5 + 14 = 3 (0011) +5 + 15 = 4 (0100) +5 + 16 = 5 (0101) +5 + 17 = 6 (0110) +5 + 18 = 7 (0111) +5 + 19 = 8 (1000) +5 + 20 = 9 (1001) +5 + 21 = 10 (1010) +5 + 22 = 11 (1011) +5 + 23 = 12 (1100) +5 + 24 = 13 (1101) +5 + 25 = 14 (1110) +5 + 26 = 15 (1111) +5 + 27 = 0 (0000) +5 + 28 = 1 (0001) +5 + 29 = 2 (0010) +5 + 30 = 3 (0011) +5 + 31 = 4 (0100) +5 + 32 = 5 (0101) +5 + 33 = 6 (0110) +5 + 34 = 7 (0111) +5 + 35 = 8 (1000) +5 + 36 = 9 (1001) +5 + 37 = 10 (1010) +5 + 38 = 11 (1011) +5 + 39 = 12 (1100) +5 + 40 = 13 (1101) +5 + 41 = 14 (1110) +5 + 42 = 15 (1111) +5 + 43 = 0 (0000) +5 + 44 = 1 (0001) +5 + 45 = 2 (0010) +5 + 46 = 3 (0011) +5 + 47 = 4 (0100) +5 + 48 = 5 (0101) +5 + 49 = 6 (0110) +5 + 50 = 7 (0111) +5 + 51 = 8 (1000) +5 + 52 = 9 (1001) +5 + 53 = 10 (1010) +5 + 54 = 11 (1011) +5 + 55 = 12 (1100) +5 + 56 = 13 (1101) +5 + 57 = 14 (1110) +5 + 58 = 15 (1111) +5 + 59 = 0 (0000) +5 + 60 = 1 (0001) +5 + 61 = 2 (0010) +5 + 62 = 3 (0011) +5 + 63 = 4 (0100) +6 + 0 = 6 (0110) +6 + 1 = 7 (0111) +6 + 2 = 8 (1000) +6 + 3 = 9 (1001) +6 + 4 = 10 (1010) +6 + 5 = 11 (1011) +6 + 6 = 12 (1100) +6 + 7 = 13 (1101) +6 + 8 = 14 (1110) +6 + 9 = 15 (1111) +6 + 10 = 0 (0000) +6 + 11 = 1 (0001) +6 + 12 = 2 (0010) +6 + 13 = 3 (0011) +6 + 14 = 4 (0100) +6 + 15 = 5 (0101) +6 + 16 = 6 (0110) +6 + 17 = 7 (0111) +6 + 18 = 8 (1000) +6 + 19 = 9 (1001) +6 + 20 = 10 (1010) +6 + 21 = 11 (1011) +6 + 22 = 12 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6 (0110) +4 + 35 = 7 (0111) +4 + 36 = 8 (1000) +4 + 37 = 9 (1001) +4 + 38 = 10 (1010) +4 + 39 = 11 (1011) +4 + 40 = 12 (1100) +4 + 41 = 13 (1101) +4 + 42 = 14 (1110) +4 + 43 = 15 (1111) +4 + 44 = 0 (0000) +4 + 45 = 1 (0001) +4 + 46 = 2 (0010) +4 + 47 = 3 (0011) +4 + 48 = 4 (0100) +4 + 49 = 5 (0101) +4 + 50 = 6 (0110) +4 + 51 = 7 (0111) +4 + 52 = 8 (1000) +4 + 53 = 9 (1001) +4 + 54 = 10 (1010) +4 + 55 = 11 (1011) +4 + 56 = 12 (1100) +4 + 57 = 13 (1101) +4 + 58 = 14 (1110) +4 + 59 = 15 (1111) +4 + 60 = 0 (0000) +4 + 61 = 1 (0001) +4 + 62 = 2 (0010) +4 + 63 = 3 (0011) +5 + 0 = 5 (0101) +5 + 1 = 6 (0110) +5 + 2 = 7 (0111) +5 + 3 = 8 (1000) +5 + 4 = 9 (1001) +5 + 5 = 10 (1010) +5 + 6 = 11 (1011) +5 + 7 = 12 (1100) +5 + 8 = 13 (1101) +5 + 9 = 14 (1110) +5 + 10 = 15 (1111) +5 + 11 = 0 (0000) +5 + 12 = 1 (0001) +5 + 13 = 2 (0010) +5 + 14 = 3 (0011) +5 + 15 = 4 (0100) +5 + 16 = 5 (0101) +5 + 17 = 6 (0110) +5 + 18 = 7 (0111) +5 + 19 = 8 (1000) +5 + 20 = 9 (1001) +5 + 21 = 10 (1010) +5 + 22 = 11 (1011) +5 + 23 = 12 (1100) +5 + 24 = 13 (1101) +5 + 25 = 14 (1110) +5 + 26 = 15 (1111) +5 + 27 = 0 (0000) +5 + 28 = 1 (0001) +5 + 29 = 2 (0010) +5 + 30 = 3 (0011) +5 + 31 = 4 (0100) +5 + 32 = 5 (0101) +5 + 33 = 6 (0110) +5 + 34 = 7 (0111) +5 + 35 = 8 (1000) +5 + 36 = 9 (1001) +5 + 37 = 10 (1010) +5 + 38 = 11 (1011) +5 + 39 = 12 (1100) +5 + 40 = 13 (1101) +5 + 41 = 14 (1110) +5 + 42 = 15 (1111) +5 + 43 = 0 (0000) +5 + 44 = 1 (0001) +5 + 45 = 2 (0010) +5 + 46 = 3 (0011) +5 + 47 = 4 (0100) +5 + 48 = 5 (0101) +5 + 49 = 6 (0110) +5 + 50 = 7 (0111) +5 + 51 = 8 (1000) +5 + 52 = 9 (1001) +5 + 53 = 10 (1010) +5 + 54 = 11 (1011) +5 + 55 = 12 (1100) +5 + 56 = 13 (1101) +5 + 57 = 14 (1110) +5 + 58 = 15 (1111) +5 + 59 = 0 (0000) +5 + 60 = 1 (0001) +5 + 61 = 2 (0010) +5 + 62 = 3 (0011) +5 + 63 = 4 (0100) +6 + 0 = 6 (0110) +6 + 1 = 7 (0111) +6 + 2 = 8 (1000) +6 + 3 = 9 (1001) +6 + 4 = 10 (1010) +6 + 5 = 11 (1011) +6 + 6 = 12 (1100) +6 + 7 = 13 (1101) +6 + 8 = 14 (1110) +6 + 9 = 15 (1111) +6 + 10 = 0 (0000) +6 + 11 = 1 (0001) +6 + 12 = 2 (0010) +6 + 13 = 3 (0011) +6 + 14 = 4 (0100) +6 + 15 = 5 (0101) +6 + 16 = 6 (0110) +6 + 17 = 7 (0111) +6 + 18 = 8 (1000) +6 + 19 = 9 (1001) +6 + 20 = 10 (1010) +6 + 21 = 11 (1011) +6 + 22 = 12 (1100) +6 + 23 = 13 (1101) +6 + 24 = 14 (1110) +6 + 25 = 15 (1111) +6 + 26 = 0 (0000) +6 + 27 = 1 (0001) +6 + 28 = 2 (0010) +6 + 29 = 3 (0011) +6 + 30 = 4 (0100) +6 + 31 = 5 (0101) +6 + 32 = 6 (0110) +6 + 33 = 7 (0111) +6 + 34 = 8 (1000) +6 + 35 = 9 (1001) +6 + 36 = 10 (1010) +6 + 37 = 11 (1011) +6 + 38 = 12 (1100) +6 + 39 = 13 (1101) +6 + 40 = 14 (1110) +6 + 41 = 15 (1111) +6 + 42 = 0 (0000) +6 + 43 = 1 (0001) +6 + 44 = 2 (0010) +6 + 45 = 3 (0011) +6 + 46 = 4 (0100) +6 + 47 = 5 (0101) +6 + 48 = 6 (0110) +6 + 49 = 7 (0111) +6 + 50 = 8 (1000) +6 + 51 = 9 (1001) +6 + 52 = 10 (1010) +6 + 53 = 11 (1011) +6 + 54 = 12 (1100) +6 + 55 = 13 (1101) +6 + 56 = 14 (1110) +6 + 57 = 15 (1111) +6 + 58 = 0 (0000) +6 + 59 = 1 (0001) +6 + 60 = 2 (0010) +6 + 61 = 3 (0011) +6 + 62 = 4 (0100) +6 + 63 = 5 (0101) +7 + 0 = 7 (0111) +7 + 1 = 8 (1000) +7 + 2 = 9 (1001) +7 + 3 = 10 (1010) +7 + 4 = 11 (1011) +7 + 5 = 12 (1100) +7 + 6 = 13 (1101) +7 + 7 = 14 (1110) +7 + 8 = 15 (1111) +7 + 9 = 0 (0000) +7 + 10 = 1 (0001) +7 + 11 = 2 (0010) +7 + 12 = 3 (0011) +7 + 13 = 4 (0100) +7 + 14 = 5 (0101) +7 + 15 = 6 (0110) +7 + 16 = 7 (0111) +7 + 17 = 8 (1000) +7 + 18 = 9 (1001) +7 + 19 = 10 (1010) +7 + 20 = 11 (1011) +7 + 21 = 12 (1100) +7 + 22 = 13 (1101) +7 + 23 = 14 (1110) +7 + 24 = 15 (1111) +7 + 25 = 0 (0000) +7 + 26 = 1 (0001) +7 + 27 = 2 (0010) +7 + 28 = 3 (0011) +7 + 29 = 4 (0100) +7 + 30 = 5 (0101) +7 + 31 = 6 (0110) +7 + 32 = 7 (0111) +7 + 33 = 8 (1000) +7 + 34 = 9 (1001) +7 + 35 = 10 (1010) +7 + 36 = 11 (1011) +7 + 37 = 12 (1100) +7 + 38 = 13 (1101) +7 + 39 = 14 (1110) +7 + 40 = 15 (1111) +7 + 41 = 0 (0000) +7 + 42 = 1 (0001) +7 + 43 = 2 (0010) +7 + 44 = 3 (0011) +7 + 45 = 4 (0100) +7 + 46 = 5 (0101) +7 + 47 = 6 (0110) +7 + 48 = 7 (0111) +7 + 49 = 8 (1000) +7 + 50 = 9 (1001) +7 + 51 = 10 (1010) +7 + 52 = 11 (1011) +7 + 53 = 12 (1100) +7 + 54 = 13 (1101) +7 + 55 = 14 (1110) +7 + 56 = 15 (1111) +7 + 57 = 0 (0000) +7 + 58 = 1 (0001) +7 + 59 = 2 (0010) +7 + 60 = 3 (0011) +7 + 61 = 4 (0100) +7 + 62 = 5 (0101) +7 + 63 = 6 (0110) +8 + 0 = 8 (1000) +8 + 1 = 9 (1001) +8 + 2 = 10 (1010) +8 + 3 = 11 (1011) +8 + 4 = 12 (1100) +8 + 5 = 13 (1101) +8 + 6 = 14 (1110) +8 + 7 = 15 (1111) +8 + 8 = 0 (0000) +8 + 9 = 1 (0001) +8 + 10 = 2 (0010) +8 + 11 = 3 (0011) +8 + 12 = 4 (0100) +8 + 13 = 5 (0101) +8 + 14 = 6 (0110) +8 + 15 = 7 (0111) +8 + 16 = 8 (1000) +8 + 17 = 9 (1001) +8 + 18 = 10 (1010) +8 + 19 = 11 (1011) +8 + 20 = 12 (1100) +8 + 21 = 13 (1101) +8 + 22 = 14 (1110) +8 + 23 = 15 (1111) +8 + 24 = 0 (0000) +8 + 25 = 1 (0001) +8 + 26 = 2 (0010) +8 + 27 = 3 (0011) +8 + 28 = 4 (0100) +8 + 29 = 5 (0101) +8 + 30 = 6 (0110) +8 + 31 = 7 (0111) +8 + 32 = 8 (1000) +8 + 33 = 9 (1001) +8 + 34 = 10 (1010) +8 + 35 = 11 (1011) +8 + 36 = 12 (1100) +8 + 37 = 13 (1101) +8 + 38 = 14 (1110) +8 + 39 = 15 (1111) +8 + 40 = 0 (0000) +8 + 41 = 1 (0001) +8 + 42 = 2 (0010) +8 + 43 = 3 (0011) +8 + 44 = 4 (0100) +8 + 45 = 5 (0101) +8 + 46 = 6 (0110) +8 + 47 = 7 (0111) +8 + 48 = 8 (1000) +8 + 49 = 9 (1001) +8 + 50 = 10 (1010) +8 + 51 = 11 (1011) +8 + 52 = 12 (1100) +8 + 53 = 13 (1101) +8 + 54 = 14 (1110) +8 + 55 = 15 (1111) +8 + 56 = 0 (0000) +8 + 57 = 1 (0001) +8 + 58 = 2 (0010) +8 + 59 = 3 (0011) +8 + 60 = 4 (0100) +8 + 61 = 5 (0101) +8 + 62 = 6 (0110) +8 + 63 = 7 (0111) +9 + 0 = 9 (1001) +9 + 1 = 10 (1010) +9 + 2 = 11 (1011) +9 + 3 = 12 (1100) +9 + 4 = 13 (1101) +9 + 5 = 14 (1110) +9 + 6 = 15 (1111) +9 + 7 = 0 (0000) +9 + 8 = 1 (0001) +9 + 9 = 2 (0010) +9 + 10 = 3 (0011) +9 + 11 = 4 (0100) +9 + 12 = 5 (0101) +9 + 13 = 6 (0110) +9 + 14 = 7 (0111) +9 + 15 = 8 (1000) +9 + 16 = 9 (1001) +9 + 17 = 10 (1010) +9 + 18 = 11 (1011) +9 + 19 = 12 (1100) +9 + 20 = 13 (1101) +9 + 21 = 14 (1110) +9 + 22 = 15 (1111) +9 + 23 = 0 (0000) +9 + 24 = 1 (0001) +9 + 25 = 2 (0010) +9 + 26 = 3 (0011) +9 + 27 = 4 (0100) +9 + 28 = 5 (0101) +9 + 29 = 6 (0110) +9 + 30 = 7 (0111) +9 + 31 = 8 (1000) +9 + 32 = 9 (1001) +9 + 33 = 10 (1010) +9 + 34 = 11 (1011) +9 + 35 = 12 (1100) +9 + 36 = 13 (1101) +9 + 37 = 14 (1110) +9 + 38 = 15 (1111) +9 + 39 = 0 (0000) +9 + 40 = 1 (0001) +9 + 41 = 2 (0010) +9 + 42 = 3 (0011) +9 + 43 = 4 (0100) +9 + 44 = 5 (0101) +9 + 45 = 6 (0110) +9 + 46 = 7 (0111) +9 + 47 = 8 (1000) +9 + 48 = 9 (1001) +9 + 49 = 10 (1010) +9 + 50 = 11 (1011) +9 + 51 = 12 (1100) +9 + 52 = 13 (1101) +9 + 53 = 14 (1110) +9 + 54 = 15 (1111) +9 + 55 = 0 (0000) +9 + 56 = 1 (0001) +9 + 57 = 2 (0010) +9 + 58 = 3 (0011) +9 + 59 = 4 (0100) +9 + 60 = 5 (0101) +9 + 61 = 6 (0110) +9 + 62 = 7 (0111) +9 + 63 = 8 (1000) +10 + 0 = 10 (1010) +10 + 1 = 11 (1011) +10 + 2 = 12 (1100) +10 + 3 = 13 (1101) +10 + 4 = 14 (1110) +10 + 5 = 15 (1111) +10 + 6 = 0 (0000) +10 + 7 = 1 (0001) +10 + 8 = 2 (0010) +10 + 9 = 3 (0011) +10 + 10 = 4 (0100) +10 + 11 = 5 (0101) +10 + 12 = 6 (0110) +10 + 13 = 7 (0111) +10 + 14 = 8 (1000) +10 + 15 = 9 (1001) +10 + 16 = 10 (1010) +10 + 17 = 11 (1011) +10 + 18 = 12 (1100) +10 + 19 = 13 (1101) +10 + 20 = 14 (1110) +10 + 21 = 15 (1111) +10 + 22 = 0 (0000) +10 + 23 = 1 (0001) +10 + 24 = 2 (0010) +10 + 25 = 3 (0011) +10 + 26 = 4 (0100) +10 + 27 = 5 (0101) +10 + 28 = 6 (0110) +10 + 29 = 7 (0111) +10 + 30 = 8 (1000) +10 + 31 = 9 (1001) +10 + 32 = 10 (1010) +10 + 33 = 11 (1011) +10 + 34 = 12 (1100) +10 + 35 = 13 (1101) +10 + 36 = 14 (1110) +10 + 37 = 15 (1111) +10 + 38 = 0 (0000) +10 + 39 = 1 (0001) +10 + 40 = 2 (0010) +10 + 41 = 3 (0011) +10 + 42 = 4 (0100) +10 + 43 = 5 (0101) +10 + 44 = 6 (0110) +10 + 45 = 7 (0111) +10 + 46 = 8 (1000) +10 + 47 = 9 (1001) +10 + 48 = 10 (1010) +10 + 49 = 11 (1011) +10 + 50 = 12 (1100) +10 + 51 = 13 (1101) +10 + 52 = 14 (1110) +10 + 53 = 15 (1111) +10 + 54 = 0 (0000) +10 + 55 = 1 (0001) +10 + 56 = 2 (0010) +10 + 57 = 3 (0011) +10 + 58 = 4 (0100) +10 + 59 = 5 (0101) +10 + 60 = 6 (0110) +10 + 61 = 7 (0111) +10 + 62 = 8 (1000) +10 + 63 = 9 (1001) +11 + 0 = 11 (1011) +11 + 1 = 12 (1100) +11 + 2 = 13 (1101) +11 + 3 = 14 (1110) +11 + 4 = 15 (1111) +11 + 5 = 0 (0000) +11 + 6 = 1 (0001) +11 + 7 = 2 (0010) +11 + 8 = 3 (0011) +11 + 9 = 4 (0100) +11 + 10 = 5 (0101) +11 + 11 = 6 (0110) +11 + 12 = 7 (0111) +11 + 13 = 8 (1000) +11 + 14 = 9 (1001) +11 + 15 = 10 (1010) +11 + 16 = 11 (1011) +11 + 17 = 12 (1100) +11 + 18 = 13 (1101) +11 + 19 = 14 (1110) +11 + 20 = 15 (1111) +11 + 21 = 0 (0000) +11 + 22 = 1 (0001) +11 + 23 = 2 (0010) +11 + 24 = 3 (0011) +11 + 25 = 4 (0100) +11 + 26 = 5 (0101) +11 + 27 = 6 (0110) +11 + 28 = 7 (0111) +11 + 29 = 8 (1000) +11 + 30 = 9 (1001) +11 + 31 = 10 (1010) +11 + 32 = 11 (1011) +11 + 33 = 12 (1100) +11 + 34 = 13 (1101) +11 + 35 = 14 (1110) +11 + 36 = 15 (1111) +11 + 37 = 0 (0000) +11 + 38 = 1 (0001) +11 + 39 = 2 (0010) +11 + 40 = 3 (0011) +11 + 41 = 4 (0100) +11 + 42 = 5 (0101) +11 + 43 = 6 (0110) +11 + 44 = 7 (0111) +11 + 45 = 8 (1000) +11 + 46 = 9 (1001) +11 + 47 = 10 (1010) +11 + 48 = 11 (1011) +11 + 49 = 12 (1100) +11 + 50 = 13 (1101) +11 + 51 = 14 (1110) +11 + 52 = 15 (1111) +11 + 53 = 0 (0000) +11 + 54 = 1 (0001) +11 + 55 = 2 (0010) +11 + 56 = 3 (0011) +11 + 57 = 4 (0100) +11 + 58 = 5 (0101) +11 + 59 = 6 (0110) +11 + 60 = 7 (0111) +11 + 61 = 8 (1000) +11 + 62 = 9 (1001) +11 + 63 = 10 (1010) +12 + 0 = 12 (1100) +12 + 1 = 13 (1101) +12 + 2 = 14 (1110) +12 + 3 = 15 (1111) +12 + 4 = 0 (0000) +12 + 5 = 1 (0001) +12 + 6 = 2 (0010) +12 + 7 = 3 (0011) +12 + 8 = 4 (0100) +12 + 9 = 5 (0101) +12 + 10 = 6 (0110) +12 + 11 = 7 (0111) +12 + 12 = 8 (1000) +12 + 13 = 9 (1001) +12 + 14 = 10 (1010) +12 + 15 = 11 (1011) +12 + 16 = 12 (1100) +12 + 17 = 13 (1101) +12 + 18 = 14 (1110) +12 + 19 = 15 (1111) +12 + 20 = 0 (0000) +12 + 21 = 1 (0001) +12 + 22 = 2 (0010) +12 + 23 = 3 (0011) +12 + 24 = 4 (0100) +12 + 25 = 5 (0101) +12 + 26 = 6 (0110) +12 + 27 = 7 (0111) +12 + 28 = 8 (1000) +12 + 29 = 9 (1001) +12 + 30 = 10 (1010) +12 + 31 = 11 (1011) +12 + 32 = 12 (1100) +12 + 33 = 13 (1101) +12 + 34 = 14 (1110) +12 + 35 = 15 (1111) +12 + 36 = 0 (0000) +12 + 37 = 1 (0001) +12 + 38 = 2 (0010) +12 + 39 = 3 (0011) +12 + 40 = 4 (0100) +12 + 41 = 5 (0101) +12 + 42 = 6 (0110) +12 + 43 = 7 (0111) +12 + 44 = 8 (1000) +12 + 45 = 9 (1001) +12 + 46 = 10 (1010) +12 + 47 = 11 (1011) +12 + 48 = 12 (1100) +12 + 49 = 13 (1101) +12 + 50 = 14 (1110) +12 + 51 = 15 (1111) +12 + 52 = 0 (0000) +12 + 53 = 1 (0001) +12 + 54 = 2 (0010) +12 + 55 = 3 (0011) +12 + 56 = 4 (0100) +12 + 57 = 5 (0101) +12 + 58 = 6 (0110) +12 + 59 = 7 (0111) +12 + 60 = 8 (1000) +12 + 61 = 9 (1001) +12 + 62 = 10 (1010) +12 + 63 = 11 (1011) +13 + 0 = 13 (1101) +13 + 1 = 14 (1110) +13 + 2 = 15 (1111) +13 + 3 = 0 (0000) +13 + 4 = 1 (0001) +13 + 5 = 2 (0010) +13 + 6 = 3 (0011) +13 + 7 = 4 (0100) +13 + 8 = 5 (0101) +13 + 9 = 6 (0110) +13 + 10 = 7 (0111) +13 + 11 = 8 (1000) +13 + 12 = 9 (1001) +13 + 13 = 10 (1010) +13 + 14 = 11 (1011) +13 + 15 = 12 (1100) +13 + 16 = 13 (1101) +13 + 17 = 14 (1110) +13 + 18 = 15 (1111) +13 + 19 = 0 (0000) +13 + 20 = 1 (0001) +13 + 21 = 2 (0010) +13 + 22 = 3 (0011) +13 + 23 = 4 (0100) +13 + 24 = 5 (0101) +13 + 25 = 6 (0110) +13 + 26 = 7 (0111) +13 + 27 = 8 (1000) +13 + 28 = 9 (1001) +13 + 29 = 10 (1010) +13 + 30 = 11 (1011) +13 + 31 = 12 (1100) +13 + 32 = 13 (1101) +13 + 33 = 14 (1110) +13 + 34 = 15 (1111) +13 + 35 = 0 (0000) +13 + 36 = 1 (0001) +13 + 37 = 2 (0010) +13 + 38 = 3 (0011) +13 + 39 = 4 (0100) +13 + 40 = 5 (0101) +13 + 41 = 6 (0110) +13 + 42 = 7 (0111) +13 + 43 = 8 (1000) +13 + 44 = 9 (1001) +13 + 45 = 10 (1010) +13 + 46 = 11 (1011) +13 + 47 = 12 (1100) +13 + 48 = 13 (1101) +13 + 49 = 14 (1110) +13 + 50 = 15 (1111) +13 + 51 = 0 (0000) +13 + 52 = 1 (0001) +13 + 53 = 2 (0010) +13 + 54 = 3 (0011) +13 + 55 = 4 (0100) +13 + 56 = 5 (0101) +13 + 57 = 6 (0110) +13 + 58 = 7 (0111) +13 + 59 = 8 (1000) +13 + 60 = 9 (1001) +13 + 61 = 10 (1010) +13 + 62 = 11 (1011) +13 + 63 = 12 (1100) +14 + 0 = 14 (1110) +14 + 1 = 15 (1111) +14 + 2 = 0 (0000) +14 + 3 = 1 (0001) +14 + 4 = 2 (0010) +14 + 5 = 3 (0011) +14 + 6 = 4 (0100) +14 + 7 = 5 (0101) +14 + 8 = 6 (0110) +14 + 9 = 7 (0111) +14 + 10 = 8 (1000) +14 + 11 = 9 (1001) +14 + 12 = 10 (1010) +14 + 13 = 11 (1011) +14 + 14 = 12 (1100) +14 + 15 = 13 (1101) +14 + 16 = 14 (1110) +14 + 17 = 15 (1111) +14 + 18 = 0 (0000) +14 + 19 = 1 (0001) +14 + 20 = 2 (0010) +14 + 21 = 3 (0011) +14 + 22 = 4 (0100) +14 + 23 = 5 (0101) +14 + 24 = 6 (0110) +14 + 25 = 7 (0111) +14 + 26 = 8 (1000) +14 + 27 = 9 (1001) +14 + 28 = 10 (1010) +14 + 29 = 11 (1011) +14 + 30 = 12 (1100) +14 + 31 = 13 (1101) +14 + 32 = 14 (1110) +14 + 33 = 15 (1111) +14 + 34 = 0 (0000) +14 + 35 = 1 (0001) +14 + 36 = 2 (0010) +14 + 37 = 3 (0011) +14 + 38 = 4 (0100) +14 + 39 = 5 (0101) +14 + 40 = 6 (0110) +14 + 41 = 7 (0111) +14 + 42 = 8 (1000) +14 + 43 = 9 (1001) +14 + 44 = 10 (1010) +14 + 45 = 11 (1011) +14 + 46 = 12 (1100) +14 + 47 = 13 (1101) +14 + 48 = 14 (1110) +14 + 49 = 15 (1111) +14 + 50 = 0 (0000) +14 + 51 = 1 (0001) +14 + 52 = 2 (0010) +14 + 53 = 3 (0011) +14 + 54 = 4 (0100) +14 + 55 = 5 (0101) +14 + 56 = 6 (0110) +14 + 57 = 7 (0111) +14 + 58 = 8 (1000) +14 + 59 = 9 (1001) +14 + 60 = 10 (1010) +14 + 61 = 11 (1011) +14 + 62 = 12 (1100) +14 + 63 = 13 (1101) +15 + 0 = 15 (1111) +15 + 1 = 0 (0000) +15 + 2 = 1 (0001) +15 + 3 = 2 (0010) +15 + 4 = 3 (0011) +15 + 5 = 4 (0100) +15 + 6 = 5 (0101) +15 + 7 = 6 (0110) +15 + 8 = 7 (0111) +15 + 9 = 8 (1000) +15 + 10 = 9 (1001) +15 + 11 = 10 (1010) +15 + 12 = 11 (1011) +15 + 13 = 12 (1100) +15 + 14 = 13 (1101) +15 + 15 = 14 (1110) +15 + 16 = 15 (1111) +15 + 17 = 0 (0000) +15 + 18 = 1 (0001) +15 + 19 = 2 (0010) +15 + 20 = 3 (0011) +15 + 21 = 4 (0100) +15 + 22 = 5 (0101) +15 + 23 = 6 (0110) +15 + 24 = 7 (0111) +15 + 25 = 8 (1000) +15 + 26 = 9 (1001) +15 + 27 = 10 (1010) +15 + 28 = 11 (1011) +15 + 29 = 12 (1100) +15 + 30 = 13 (1101) +15 + 31 = 14 (1110) +15 + 32 = 15 (1111) +15 + 33 = 0 (0000) +15 + 34 = 1 (0001) +15 + 35 = 2 (0010) +15 + 36 = 3 (0011) +15 + 37 = 4 (0100) +15 + 38 = 5 (0101) +15 + 39 = 6 (0110) +15 + 40 = 7 (0111) +15 + 41 = 8 (1000) +15 + 42 = 9 (1001) +15 + 43 = 10 (1010) +15 + 44 = 11 (1011) +15 + 45 = 12 (1100) +15 + 46 = 13 (1101) +15 + 47 = 14 (1110) +15 + 48 = 15 (1111) +15 + 49 = 0 (0000) +15 + 50 = 1 (0001) +15 + 51 = 2 (0010) +15 + 52 = 3 (0011) +15 + 53 = 4 (0100) +15 + 54 = 5 (0101) +15 + 55 = 6 (0110) +15 + 56 = 7 (0111) +15 + 57 = 8 (1000) +15 + 58 = 9 (1001) +15 + 59 = 10 (1010) +15 + 60 = 11 (1011) +15 + 61 = 12 (1100) +15 + 62 = 13 (1101) +15 + 63 = 14 (1110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/main.cpp new file mode 100644 index 000000000..657543508 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 4-bit bool = 4-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 4; + int in1_size = 4; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector4 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector4 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/promote_truncation.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/promote_truncation.f new file mode 100644 index 000000000..90b689aca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/promote_truncation.f @@ -0,0 +1,3 @@ +promote_truncation/datawidth.cpp +promote_truncation/stimgen.cpp +promote_truncation/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/stimgen.h new file mode 100644 index 000000000..959122edf --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/promote_truncation/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& result; + // Outputs + signal_bool_vector4& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& RESULT, + signal_bool_vector4& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/common.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/common.h new file mode 100644 index 000000000..2e2569230 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector4; +typedef sc_signal > signal_bool_vector6; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/datawidth.cpp new file mode 100644 index 000000000..f5df52dd6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + sc_unsigned tmp_a (in1_width); + sc_unsigned tmp_b (in2_width); + sc_unsigned tmp_result (result_width); + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/datawidth.h new file mode 100644 index 000000000..98681b45a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/datawidth.h @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector6& in1; + const signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + signal_bool_vector4& result; + // Parameters + const int in1_width; + const int in2_width; + const int result_width; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector6& IN1, + const signal_bool_vector6& IN2, + const sc_signal& READY, + signal_bool_vector4& RESULT, + const int IN1_WIDTH, + const int IN2_WIDTH, + const int RESULT_WIDTH ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT), + in1_width (IN1_WIDTH), + in2_width (IN2_WIDTH), + result_width (RESULT_WIDTH) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/golden/truncation.log b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/golden/truncation.log new file mode 100644 index 000000000..5a235015a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/golden/truncation.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 (0000) +0 + 1 = 1 (0001) +0 + 2 = 2 (0010) +0 + 3 = 3 (0011) +0 + 4 = 4 (0100) +0 + 5 = 5 (0101) +0 + 6 = 6 (0110) +0 + 7 = 7 (0111) +0 + 8 = 8 (1000) +0 + 9 = 9 (1001) +0 + 10 = 10 (1010) +0 + 11 = 11 (1011) +0 + 12 = 12 (1100) +0 + 13 = 13 (1101) +0 + 14 = 14 (1110) +0 + 15 = 15 (1111) +0 + 16 = 0 (0000) +0 + 17 = 1 (0001) +0 + 18 = 2 (0010) +0 + 19 = 3 (0011) +0 + 20 = 4 (0100) +0 + 21 = 5 (0101) +0 + 22 = 6 (0110) +0 + 23 = 7 (0111) +0 + 24 = 8 (1000) +0 + 25 = 9 (1001) +0 + 26 = 10 (1010) +0 + 27 = 11 (1011) +0 + 28 = 12 (1100) +0 + 29 = 13 (1101) +0 + 30 = 14 (1110) +0 + 31 = 15 (1111) +0 + 32 = 0 (0000) +0 + 33 = 1 (0001) +0 + 34 = 2 (0010) +0 + 35 = 3 (0011) +0 + 36 = 4 (0100) +0 + 37 = 5 (0101) +0 + 38 = 6 (0110) +0 + 39 = 7 (0111) +0 + 40 = 8 (1000) +0 + 41 = 9 (1001) +0 + 42 = 10 (1010) +0 + 43 = 11 (1011) +0 + 44 = 12 (1100) +0 + 45 = 13 (1101) +0 + 46 = 14 (1110) +0 + 47 = 15 (1111) +0 + 48 = 0 (0000) +0 + 49 = 1 (0001) +0 + 50 = 2 (0010) +0 + 51 = 3 (0011) +0 + 52 = 4 (0100) +0 + 53 = 5 (0101) +0 + 54 = 6 (0110) +0 + 55 = 7 (0111) +0 + 56 = 8 (1000) +0 + 57 = 9 (1001) +0 + 58 = 10 (1010) +0 + 59 = 11 (1011) +0 + 60 = 12 (1100) +0 + 61 = 13 (1101) +0 + 62 = 14 (1110) +0 + 63 = 15 (1111) +1 + 0 = 1 (0001) +1 + 1 = 2 (0010) +1 + 2 = 3 (0011) +1 + 3 = 4 (0100) +1 + 4 = 5 (0101) +1 + 5 = 6 (0110) +1 + 6 = 7 (0111) +1 + 7 = 8 (1000) +1 + 8 = 9 (1001) +1 + 9 = 10 (1010) +1 + 10 = 11 (1011) +1 + 11 = 12 (1100) +1 + 12 = 13 (1101) +1 + 13 = 14 (1110) +1 + 14 = 15 (1111) +1 + 15 = 0 (0000) +1 + 16 = 1 (0001) +1 + 17 = 2 (0010) +1 + 18 = 3 (0011) +1 + 19 = 4 (0100) +1 + 20 = 5 (0101) +1 + 21 = 6 (0110) +1 + 22 = 7 (0111) +1 + 23 = 8 (1000) +1 + 24 = 9 (1001) +1 + 25 = 10 (1010) +1 + 26 = 11 (1011) +1 + 27 = 12 (1100) +1 + 28 = 13 (1101) +1 + 29 = 14 (1110) +1 + 30 = 15 (1111) +1 + 31 = 0 (0000) +1 + 32 = 1 (0001) +1 + 33 = 2 (0010) +1 + 34 = 3 (0011) +1 + 35 = 4 (0100) +1 + 36 = 5 (0101) +1 + 37 = 6 (0110) +1 + 38 = 7 (0111) +1 + 39 = 8 (1000) +1 + 40 = 9 (1001) +1 + 41 = 10 (1010) +1 + 42 = 11 (1011) +1 + 43 = 12 (1100) +1 + 44 = 13 (1101) +1 + 45 = 14 (1110) +1 + 46 = 15 (1111) +1 + 47 = 0 (0000) +1 + 48 = 1 (0001) +1 + 49 = 2 (0010) +1 + 50 = 3 (0011) +1 + 51 = 4 (0100) +1 + 52 = 5 (0101) +1 + 53 = 6 (0110) +1 + 54 = 7 (0111) +1 + 55 = 8 (1000) +1 + 56 = 9 (1001) +1 + 57 = 10 (1010) +1 + 58 = 11 (1011) +1 + 59 = 12 (1100) +1 + 60 = 13 (1101) +1 + 61 = 14 (1110) +1 + 62 = 15 (1111) +1 + 63 = 0 (0000) +2 + 0 = 2 (0010) +2 + 1 = 3 (0011) +2 + 2 = 4 (0100) +2 + 3 = 5 (0101) +2 + 4 = 6 (0110) +2 + 5 = 7 (0111) +2 + 6 = 8 (1000) +2 + 7 = 9 (1001) +2 + 8 = 10 (1010) +2 + 9 = 11 (1011) +2 + 10 = 12 (1100) +2 + 11 = 13 (1101) +2 + 12 = 14 (1110) +2 + 13 = 15 (1111) +2 + 14 = 0 (0000) +2 + 15 = 1 (0001) +2 + 16 = 2 (0010) +2 + 17 = 3 (0011) +2 + 18 = 4 (0100) +2 + 19 = 5 (0101) +2 + 20 = 6 (0110) +2 + 21 = 7 (0111) +2 + 22 = 8 (1000) +2 + 23 = 9 (1001) +2 + 24 = 10 (1010) +2 + 25 = 11 (1011) +2 + 26 = 12 (1100) +2 + 27 = 13 (1101) +2 + 28 = 14 (1110) +2 + 29 = 15 (1111) +2 + 30 = 0 (0000) +2 + 31 = 1 (0001) +2 + 32 = 2 (0010) +2 + 33 = 3 (0011) +2 + 34 = 4 (0100) +2 + 35 = 5 (0101) +2 + 36 = 6 (0110) +2 + 37 = 7 (0111) +2 + 38 = 8 (1000) +2 + 39 = 9 (1001) +2 + 40 = 10 (1010) +2 + 41 = 11 (1011) +2 + 42 = 12 (1100) +2 + 43 = 13 (1101) +2 + 44 = 14 (1110) +2 + 45 = 15 (1111) +2 + 46 = 0 (0000) +2 + 47 = 1 (0001) +2 + 48 = 2 (0010) +2 + 49 = 3 (0011) +2 + 50 = 4 (0100) +2 + 51 = 5 (0101) +2 + 52 = 6 (0110) +2 + 53 = 7 (0111) +2 + 54 = 8 (1000) +2 + 55 = 9 (1001) +2 + 56 = 10 (1010) +2 + 57 = 11 (1011) +2 + 58 = 12 (1100) +2 + 59 = 13 (1101) +2 + 60 = 14 (1110) +2 + 61 = 15 (1111) +2 + 62 = 0 (0000) +2 + 63 = 1 (0001) +3 + 0 = 3 (0011) +3 + 1 = 4 (0100) +3 + 2 = 5 (0101) +3 + 3 = 6 (0110) +3 + 4 = 7 (0111) +3 + 5 = 8 (1000) +3 + 6 = 9 (1001) +3 + 7 = 10 (1010) +3 + 8 = 11 (1011) +3 + 9 = 12 (1100) +3 + 10 = 13 (1101) +3 + 11 = 14 (1110) +3 + 12 = 15 (1111) +3 + 13 = 0 (0000) +3 + 14 = 1 (0001) +3 + 15 = 2 (0010) +3 + 16 = 3 (0011) +3 + 17 = 4 (0100) +3 + 18 = 5 (0101) +3 + 19 = 6 (0110) +3 + 20 = 7 (0111) +3 + 21 = 8 (1000) +3 + 22 = 9 (1001) +3 + 23 = 10 (1010) +3 + 24 = 11 (1011) +3 + 25 = 12 (1100) +3 + 26 = 13 (1101) +3 + 27 = 14 (1110) +3 + 28 = 15 (1111) +3 + 29 = 0 (0000) +3 + 30 = 1 (0001) +3 + 31 = 2 (0010) +3 + 32 = 3 (0011) +3 + 33 = 4 (0100) +3 + 34 = 5 (0101) +3 + 35 = 6 (0110) +3 + 36 = 7 (0111) +3 + 37 = 8 (1000) +3 + 38 = 9 (1001) +3 + 39 = 10 (1010) +3 + 40 = 11 (1011) +3 + 41 = 12 (1100) +3 + 42 = 13 (1101) +3 + 43 = 14 (1110) +3 + 44 = 15 (1111) +3 + 45 = 0 (0000) +3 + 46 = 1 (0001) +3 + 47 = 2 (0010) +3 + 48 = 3 (0011) +3 + 49 = 4 (0100) +3 + 50 = 5 (0101) +3 + 51 = 6 (0110) +3 + 52 = 7 (0111) +3 + 53 = 8 (1000) +3 + 54 = 9 (1001) +3 + 55 = 10 (1010) +3 + 56 = 11 (1011) +3 + 57 = 12 (1100) +3 + 58 = 13 (1101) +3 + 59 = 14 (1110) +3 + 60 = 15 (1111) +3 + 61 = 0 (0000) +3 + 62 = 1 (0001) +3 + 63 = 2 (0010) +4 + 0 = 4 (0100) +4 + 1 = 5 (0101) +4 + 2 = 6 (0110) +4 + 3 = 7 (0111) +4 + 4 = 8 (1000) +4 + 5 = 9 (1001) +4 + 6 = 10 (1010) +4 + 7 = 11 (1011) +4 + 8 = 12 (1100) +4 + 9 = 13 (1101) +4 + 10 = 14 (1110) +4 + 11 = 15 (1111) +4 + 12 = 0 (0000) +4 + 13 = 1 (0001) +4 + 14 = 2 (0010) +4 + 15 = 3 (0011) +4 + 16 = 4 (0100) +4 + 17 = 5 (0101) +4 + 18 = 6 (0110) +4 + 19 = 7 (0111) +4 + 20 = 8 (1000) +4 + 21 = 9 (1001) +4 + 22 = 10 (1010) +4 + 23 = 11 (1011) +4 + 24 = 12 (1100) +4 + 25 = 13 (1101) +4 + 26 = 14 (1110) +4 + 27 = 15 (1111) +4 + 28 = 0 (0000) +4 + 29 = 1 (0001) +4 + 30 = 2 (0010) +4 + 31 = 3 (0011) +4 + 32 = 4 (0100) +4 + 33 = 5 (0101) +4 + 34 = 6 (0110) +4 + 35 = 7 (0111) +4 + 36 = 8 (1000) +4 + 37 = 9 (1001) +4 + 38 = 10 (1010) +4 + 39 = 11 (1011) +4 + 40 = 12 (1100) +4 + 41 = 13 (1101) +4 + 42 = 14 (1110) +4 + 43 = 15 (1111) +4 + 44 = 0 (0000) +4 + 45 = 1 (0001) +4 + 46 = 2 (0010) +4 + 47 = 3 (0011) +4 + 48 = 4 (0100) +4 + 49 = 5 (0101) +4 + 50 = 6 (0110) +4 + 51 = 7 (0111) +4 + 52 = 8 (1000) +4 + 53 = 9 (1001) +4 + 54 = 10 (1010) +4 + 55 = 11 (1011) +4 + 56 = 12 (1100) +4 + 57 = 13 (1101) +4 + 58 = 14 (1110) +4 + 59 = 15 (1111) +4 + 60 = 0 (0000) +4 + 61 = 1 (0001) +4 + 62 = 2 (0010) +4 + 63 = 3 (0011) +5 + 0 = 5 (0101) +5 + 1 = 6 (0110) +5 + 2 = 7 (0111) +5 + 3 = 8 (1000) +5 + 4 = 9 (1001) +5 + 5 = 10 (1010) +5 + 6 = 11 (1011) +5 + 7 = 12 (1100) +5 + 8 = 13 (1101) +5 + 9 = 14 (1110) +5 + 10 = 15 (1111) +5 + 11 = 0 (0000) +5 + 12 = 1 (0001) +5 + 13 = 2 (0010) +5 + 14 = 3 (0011) +5 + 15 = 4 (0100) +5 + 16 = 5 (0101) +5 + 17 = 6 (0110) +5 + 18 = 7 (0111) +5 + 19 = 8 (1000) +5 + 20 = 9 (1001) +5 + 21 = 10 (1010) +5 + 22 = 11 (1011) +5 + 23 = 12 (1100) +5 + 24 = 13 (1101) +5 + 25 = 14 (1110) +5 + 26 = 15 (1111) +5 + 27 = 0 (0000) +5 + 28 = 1 (0001) +5 + 29 = 2 (0010) +5 + 30 = 3 (0011) +5 + 31 = 4 (0100) +5 + 32 = 5 (0101) +5 + 33 = 6 (0110) +5 + 34 = 7 (0111) +5 + 35 = 8 (1000) +5 + 36 = 9 (1001) +5 + 37 = 10 (1010) +5 + 38 = 11 (1011) +5 + 39 = 12 (1100) +5 + 40 = 13 (1101) +5 + 41 = 14 (1110) +5 + 42 = 15 (1111) +5 + 43 = 0 (0000) +5 + 44 = 1 (0001) +5 + 45 = 2 (0010) +5 + 46 = 3 (0011) +5 + 47 = 4 (0100) +5 + 48 = 5 (0101) +5 + 49 = 6 (0110) +5 + 50 = 7 (0111) +5 + 51 = 8 (1000) +5 + 52 = 9 (1001) +5 + 53 = 10 (1010) +5 + 54 = 11 (1011) +5 + 55 = 12 (1100) +5 + 56 = 13 (1101) +5 + 57 = 14 (1110) +5 + 58 = 15 (1111) +5 + 59 = 0 (0000) +5 + 60 = 1 (0001) +5 + 61 = 2 (0010) +5 + 62 = 3 (0011) +5 + 63 = 4 (0100) +6 + 0 = 6 (0110) +6 + 1 = 7 (0111) +6 + 2 = 8 (1000) +6 + 3 = 9 (1001) +6 + 4 = 10 (1010) +6 + 5 = 11 (1011) +6 + 6 = 12 (1100) +6 + 7 = 13 (1101) +6 + 8 = 14 (1110) +6 + 9 = 15 (1111) +6 + 10 = 0 (0000) +6 + 11 = 1 (0001) +6 + 12 = 2 (0010) +6 + 13 = 3 (0011) +6 + 14 = 4 (0100) +6 + 15 = 5 (0101) +6 + 16 = 6 (0110) +6 + 17 = 7 (0111) +6 + 18 = 8 (1000) +6 + 19 = 9 (1001) +6 + 20 = 10 (1010) +6 + 21 = 11 (1011) +6 + 22 = 12 (1100) +6 + 23 = 13 (1101) +6 + 24 = 14 (1110) +6 + 25 = 15 (1111) +6 + 26 = 0 (0000) +6 + 27 = 1 (0001) +6 + 28 = 2 (0010) +6 + 29 = 3 (0011) +6 + 30 = 4 (0100) +6 + 31 = 5 (0101) +6 + 32 = 6 (0110) +6 + 33 = 7 (0111) +6 + 34 = 8 (1000) +6 + 35 = 9 (1001) +6 + 36 = 10 (1010) +6 + 37 = 11 (1011) +6 + 38 = 12 (1100) +6 + 39 = 13 (1101) +6 + 40 = 14 (1110) +6 + 41 = 15 (1111) +6 + 42 = 0 (0000) +6 + 43 = 1 (0001) +6 + 44 = 2 (0010) +6 + 45 = 3 (0011) +6 + 46 = 4 (0100) +6 + 47 = 5 (0101) +6 + 48 = 6 (0110) +6 + 49 = 7 (0111) +6 + 50 = 8 (1000) +6 + 51 = 9 (1001) +6 + 52 = 10 (1010) +6 + 53 = 11 (1011) +6 + 54 = 12 (1100) +6 + 55 = 13 (1101) +6 + 56 = 14 (1110) +6 + 57 = 15 (1111) +6 + 58 = 0 (0000) +6 + 59 = 1 (0001) +6 + 60 = 2 (0010) +6 + 61 = 3 (0011) +6 + 62 = 4 (0100) +6 + 63 = 5 (0101) +7 + 0 = 7 (0111) +7 + 1 = 8 (1000) +7 + 2 = 9 (1001) +7 + 3 = 10 (1010) +7 + 4 = 11 (1011) +7 + 5 = 12 (1100) +7 + 6 = 13 (1101) +7 + 7 = 14 (1110) +7 + 8 = 15 (1111) +7 + 9 = 0 (0000) +7 + 10 = 1 (0001) +7 + 11 = 2 (0010) +7 + 12 = 3 (0011) +7 + 13 = 4 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(1110) +52 + 11 = 15 (1111) +52 + 12 = 0 (0000) +52 + 13 = 1 (0001) +52 + 14 = 2 (0010) +52 + 15 = 3 (0011) +52 + 16 = 4 (0100) +52 + 17 = 5 (0101) +52 + 18 = 6 (0110) +52 + 19 = 7 (0111) +52 + 20 = 8 (1000) +52 + 21 = 9 (1001) +52 + 22 = 10 (1010) +52 + 23 = 11 (1011) +52 + 24 = 12 (1100) +52 + 25 = 13 (1101) +52 + 26 = 14 (1110) +52 + 27 = 15 (1111) +52 + 28 = 0 (0000) +52 + 29 = 1 (0001) +52 + 30 = 2 (0010) +52 + 31 = 3 (0011) +52 + 32 = 4 (0100) +52 + 33 = 5 (0101) +52 + 34 = 6 (0110) +52 + 35 = 7 (0111) +52 + 36 = 8 (1000) +52 + 37 = 9 (1001) +52 + 38 = 10 (1010) +52 + 39 = 11 (1011) +52 + 40 = 12 (1100) +52 + 41 = 13 (1101) +52 + 42 = 14 (1110) +52 + 43 = 15 (1111) +52 + 44 = 0 (0000) +52 + 45 = 1 (0001) +52 + 46 = 2 (0010) +52 + 47 = 3 (0011) +52 + 48 = 4 (0100) +52 + 49 = 5 (0101) +52 + 50 = 6 (0110) +52 + 51 = 7 (0111) +52 + 52 = 8 (1000) +52 + 53 = 9 (1001) +52 + 54 = 10 (1010) +52 + 55 = 11 (1011) +52 + 56 = 12 (1100) +52 + 57 = 13 (1101) +52 + 58 = 14 (1110) +52 + 59 = 15 (1111) +52 + 60 = 0 (0000) +52 + 61 = 1 (0001) +52 + 62 = 2 (0010) +52 + 63 = 3 (0011) +53 + 0 = 5 (0101) +53 + 1 = 6 (0110) +53 + 2 = 7 (0111) +53 + 3 = 8 (1000) +53 + 4 = 9 (1001) +53 + 5 = 10 (1010) +53 + 6 = 11 (1011) +53 + 7 = 12 (1100) +53 + 8 = 13 (1101) +53 + 9 = 14 (1110) +53 + 10 = 15 (1111) +53 + 11 = 0 (0000) +53 + 12 = 1 (0001) +53 + 13 = 2 (0010) +53 + 14 = 3 (0011) +53 + 15 = 4 (0100) +53 + 16 = 5 (0101) +53 + 17 = 6 (0110) +53 + 18 = 7 (0111) +53 + 19 = 8 (1000) +53 + 20 = 9 (1001) +53 + 21 = 10 (1010) +53 + 22 = 11 (1011) +53 + 23 = 12 (1100) +53 + 24 = 13 (1101) +53 + 25 = 14 (1110) +53 + 26 = 15 (1111) +53 + 27 = 0 (0000) +53 + 28 = 1 (0001) +53 + 29 = 2 (0010) +53 + 30 = 3 (0011) +53 + 31 = 4 (0100) +53 + 32 = 5 (0101) +53 + 33 = 6 (0110) +53 + 34 = 7 (0111) +53 + 35 = 8 (1000) +53 + 36 = 9 (1001) +53 + 37 = 10 (1010) +53 + 38 = 11 (1011) +53 + 39 = 12 (1100) +53 + 40 = 13 (1101) +53 + 41 = 14 (1110) +53 + 42 = 15 (1111) +53 + 43 = 0 (0000) +53 + 44 = 1 (0001) +53 + 45 = 2 (0010) +53 + 46 = 3 (0011) +53 + 47 = 4 (0100) +53 + 48 = 5 (0101) +53 + 49 = 6 (0110) +53 + 50 = 7 (0111) +53 + 51 = 8 (1000) +53 + 52 = 9 (1001) +53 + 53 = 10 (1010) +53 + 54 = 11 (1011) +53 + 55 = 12 (1100) +53 + 56 = 13 (1101) +53 + 57 = 14 (1110) +53 + 58 = 15 (1111) +53 + 59 = 0 (0000) +53 + 60 = 1 (0001) +53 + 61 = 2 (0010) +53 + 62 = 3 (0011) +53 + 63 = 4 (0100) +54 + 0 = 6 (0110) +54 + 1 = 7 (0111) +54 + 2 = 8 (1000) +54 + 3 = 9 (1001) +54 + 4 = 10 (1010) +54 + 5 = 11 (1011) +54 + 6 = 12 (1100) +54 + 7 = 13 (1101) +54 + 8 = 14 (1110) +54 + 9 = 15 (1111) +54 + 10 = 0 (0000) +54 + 11 = 1 (0001) +54 + 12 = 2 (0010) +54 + 13 = 3 (0011) +54 + 14 = 4 (0100) +54 + 15 = 5 (0101) +54 + 16 = 6 (0110) +54 + 17 = 7 (0111) +54 + 18 = 8 (1000) +54 + 19 = 9 (1001) +54 + 20 = 10 (1010) +54 + 21 = 11 (1011) +54 + 22 = 12 (1100) +54 + 23 = 13 (1101) +54 + 24 = 14 (1110) +54 + 25 = 15 (1111) +54 + 26 = 0 (0000) +54 + 27 = 1 (0001) +54 + 28 = 2 (0010) +54 + 29 = 3 (0011) +54 + 30 = 4 (0100) +54 + 31 = 5 (0101) +54 + 32 = 6 (0110) +54 + 33 = 7 (0111) +54 + 34 = 8 (1000) +54 + 35 = 9 (1001) +54 + 36 = 10 (1010) +54 + 37 = 11 (1011) +54 + 38 = 12 (1100) +54 + 39 = 13 (1101) +54 + 40 = 14 (1110) +54 + 41 = 15 (1111) +54 + 42 = 0 (0000) +54 + 43 = 1 (0001) +54 + 44 = 2 (0010) +54 + 45 = 3 (0011) +54 + 46 = 4 (0100) +54 + 47 = 5 (0101) +54 + 48 = 6 (0110) +54 + 49 = 7 (0111) +54 + 50 = 8 (1000) +54 + 51 = 9 (1001) +54 + 52 = 10 (1010) +54 + 53 = 11 (1011) +54 + 54 = 12 (1100) +54 + 55 = 13 (1101) +54 + 56 = 14 (1110) +54 + 57 = 15 (1111) +54 + 58 = 0 (0000) +54 + 59 = 1 (0001) +54 + 60 = 2 (0010) +54 + 61 = 3 (0011) +54 + 62 = 4 (0100) +54 + 63 = 5 (0101) +55 + 0 = 7 (0111) +55 + 1 = 8 (1000) +55 + 2 = 9 (1001) +55 + 3 = 10 (1010) +55 + 4 = 11 (1011) +55 + 5 = 12 (1100) +55 + 6 = 13 (1101) +55 + 7 = 14 (1110) +55 + 8 = 15 (1111) +55 + 9 = 0 (0000) +55 + 10 = 1 (0001) +55 + 11 = 2 (0010) +55 + 12 = 3 (0011) +55 + 13 = 4 (0100) +55 + 14 = 5 (0101) +55 + 15 = 6 (0110) +55 + 16 = 7 (0111) +55 + 17 = 8 (1000) +55 + 18 = 9 (1001) +55 + 19 = 10 (1010) +55 + 20 = 11 (1011) +55 + 21 = 12 (1100) +55 + 22 = 13 (1101) +55 + 23 = 14 (1110) +55 + 24 = 15 (1111) +55 + 25 = 0 (0000) +55 + 26 = 1 (0001) +55 + 27 = 2 (0010) +55 + 28 = 3 (0011) +55 + 29 = 4 (0100) +55 + 30 = 5 (0101) +55 + 31 = 6 (0110) +55 + 32 = 7 (0111) +55 + 33 = 8 (1000) +55 + 34 = 9 (1001) +55 + 35 = 10 (1010) +55 + 36 = 11 (1011) +55 + 37 = 12 (1100) +55 + 38 = 13 (1101) +55 + 39 = 14 (1110) +55 + 40 = 15 (1111) +55 + 41 = 0 (0000) +55 + 42 = 1 (0001) +55 + 43 = 2 (0010) +55 + 44 = 3 (0011) +55 + 45 = 4 (0100) +55 + 46 = 5 (0101) +55 + 47 = 6 (0110) +55 + 48 = 7 (0111) +55 + 49 = 8 (1000) +55 + 50 = 9 (1001) +55 + 51 = 10 (1010) +55 + 52 = 11 (1011) +55 + 53 = 12 (1100) +55 + 54 = 13 (1101) +55 + 55 = 14 (1110) +55 + 56 = 15 (1111) +55 + 57 = 0 (0000) +55 + 58 = 1 (0001) +55 + 59 = 2 (0010) +55 + 60 = 3 (0011) +55 + 61 = 4 (0100) +55 + 62 = 5 (0101) +55 + 63 = 6 (0110) +56 + 0 = 8 (1000) +56 + 1 = 9 (1001) +56 + 2 = 10 (1010) +56 + 3 = 11 (1011) +56 + 4 = 12 (1100) +56 + 5 = 13 (1101) +56 + 6 = 14 (1110) +56 + 7 = 15 (1111) +56 + 8 = 0 (0000) +56 + 9 = 1 (0001) +56 + 10 = 2 (0010) +56 + 11 = 3 (0011) +56 + 12 = 4 (0100) +56 + 13 = 5 (0101) +56 + 14 = 6 (0110) +56 + 15 = 7 (0111) +56 + 16 = 8 (1000) +56 + 17 = 9 (1001) +56 + 18 = 10 (1010) +56 + 19 = 11 (1011) +56 + 20 = 12 (1100) +56 + 21 = 13 (1101) +56 + 22 = 14 (1110) +56 + 23 = 15 (1111) +56 + 24 = 0 (0000) +56 + 25 = 1 (0001) +56 + 26 = 2 (0010) +56 + 27 = 3 (0011) +56 + 28 = 4 (0100) +56 + 29 = 5 (0101) +56 + 30 = 6 (0110) +56 + 31 = 7 (0111) +56 + 32 = 8 (1000) +56 + 33 = 9 (1001) +56 + 34 = 10 (1010) +56 + 35 = 11 (1011) +56 + 36 = 12 (1100) +56 + 37 = 13 (1101) +56 + 38 = 14 (1110) +56 + 39 = 15 (1111) +56 + 40 = 0 (0000) +56 + 41 = 1 (0001) +56 + 42 = 2 (0010) +56 + 43 = 3 (0011) +56 + 44 = 4 (0100) +56 + 45 = 5 (0101) +56 + 46 = 6 (0110) +56 + 47 = 7 (0111) +56 + 48 = 8 (1000) +56 + 49 = 9 (1001) +56 + 50 = 10 (1010) +56 + 51 = 11 (1011) +56 + 52 = 12 (1100) +56 + 53 = 13 (1101) +56 + 54 = 14 (1110) +56 + 55 = 15 (1111) +56 + 56 = 0 (0000) +56 + 57 = 1 (0001) +56 + 58 = 2 (0010) +56 + 59 = 3 (0011) +56 + 60 = 4 (0100) +56 + 61 = 5 (0101) +56 + 62 = 6 (0110) +56 + 63 = 7 (0111) +57 + 0 = 9 (1001) +57 + 1 = 10 (1010) +57 + 2 = 11 (1011) +57 + 3 = 12 (1100) +57 + 4 = 13 (1101) +57 + 5 = 14 (1110) +57 + 6 = 15 (1111) +57 + 7 = 0 (0000) +57 + 8 = 1 (0001) +57 + 9 = 2 (0010) +57 + 10 = 3 (0011) +57 + 11 = 4 (0100) +57 + 12 = 5 (0101) +57 + 13 = 6 (0110) +57 + 14 = 7 (0111) +57 + 15 = 8 (1000) +57 + 16 = 9 (1001) +57 + 17 = 10 (1010) +57 + 18 = 11 (1011) +57 + 19 = 12 (1100) +57 + 20 = 13 (1101) +57 + 21 = 14 (1110) +57 + 22 = 15 (1111) +57 + 23 = 0 (0000) +57 + 24 = 1 (0001) +57 + 25 = 2 (0010) +57 + 26 = 3 (0011) +57 + 27 = 4 (0100) +57 + 28 = 5 (0101) +57 + 29 = 6 (0110) +57 + 30 = 7 (0111) +57 + 31 = 8 (1000) +57 + 32 = 9 (1001) +57 + 33 = 10 (1010) +57 + 34 = 11 (1011) +57 + 35 = 12 (1100) +57 + 36 = 13 (1101) +57 + 37 = 14 (1110) +57 + 38 = 15 (1111) +57 + 39 = 0 (0000) +57 + 40 = 1 (0001) +57 + 41 = 2 (0010) +57 + 42 = 3 (0011) +57 + 43 = 4 (0100) +57 + 44 = 5 (0101) +57 + 45 = 6 (0110) +57 + 46 = 7 (0111) +57 + 47 = 8 (1000) +57 + 48 = 9 (1001) +57 + 49 = 10 (1010) +57 + 50 = 11 (1011) +57 + 51 = 12 (1100) +57 + 52 = 13 (1101) +57 + 53 = 14 (1110) +57 + 54 = 15 (1111) +57 + 55 = 0 (0000) +57 + 56 = 1 (0001) +57 + 57 = 2 (0010) +57 + 58 = 3 (0011) +57 + 59 = 4 (0100) +57 + 60 = 5 (0101) +57 + 61 = 6 (0110) +57 + 62 = 7 (0111) +57 + 63 = 8 (1000) +58 + 0 = 10 (1010) +58 + 1 = 11 (1011) +58 + 2 = 12 (1100) +58 + 3 = 13 (1101) +58 + 4 = 14 (1110) +58 + 5 = 15 (1111) +58 + 6 = 0 (0000) +58 + 7 = 1 (0001) +58 + 8 = 2 (0010) +58 + 9 = 3 (0011) +58 + 10 = 4 (0100) +58 + 11 = 5 (0101) +58 + 12 = 6 (0110) +58 + 13 = 7 (0111) +58 + 14 = 8 (1000) +58 + 15 = 9 (1001) +58 + 16 = 10 (1010) +58 + 17 = 11 (1011) +58 + 18 = 12 (1100) +58 + 19 = 13 (1101) +58 + 20 = 14 (1110) +58 + 21 = 15 (1111) +58 + 22 = 0 (0000) +58 + 23 = 1 (0001) +58 + 24 = 2 (0010) +58 + 25 = 3 (0011) +58 + 26 = 4 (0100) +58 + 27 = 5 (0101) +58 + 28 = 6 (0110) +58 + 29 = 7 (0111) +58 + 30 = 8 (1000) +58 + 31 = 9 (1001) +58 + 32 = 10 (1010) +58 + 33 = 11 (1011) +58 + 34 = 12 (1100) +58 + 35 = 13 (1101) +58 + 36 = 14 (1110) +58 + 37 = 15 (1111) +58 + 38 = 0 (0000) +58 + 39 = 1 (0001) +58 + 40 = 2 (0010) +58 + 41 = 3 (0011) +58 + 42 = 4 (0100) +58 + 43 = 5 (0101) +58 + 44 = 6 (0110) +58 + 45 = 7 (0111) +58 + 46 = 8 (1000) +58 + 47 = 9 (1001) +58 + 48 = 10 (1010) +58 + 49 = 11 (1011) +58 + 50 = 12 (1100) +58 + 51 = 13 (1101) +58 + 52 = 14 (1110) +58 + 53 = 15 (1111) +58 + 54 = 0 (0000) +58 + 55 = 1 (0001) +58 + 56 = 2 (0010) +58 + 57 = 3 (0011) +58 + 58 = 4 (0100) +58 + 59 = 5 (0101) +58 + 60 = 6 (0110) +58 + 61 = 7 (0111) +58 + 62 = 8 (1000) +58 + 63 = 9 (1001) +59 + 0 = 11 (1011) +59 + 1 = 12 (1100) +59 + 2 = 13 (1101) +59 + 3 = 14 (1110) +59 + 4 = 15 (1111) +59 + 5 = 0 (0000) +59 + 6 = 1 (0001) +59 + 7 = 2 (0010) +59 + 8 = 3 (0011) +59 + 9 = 4 (0100) +59 + 10 = 5 (0101) +59 + 11 = 6 (0110) +59 + 12 = 7 (0111) +59 + 13 = 8 (1000) +59 + 14 = 9 (1001) +59 + 15 = 10 (1010) +59 + 16 = 11 (1011) +59 + 17 = 12 (1100) +59 + 18 = 13 (1101) +59 + 19 = 14 (1110) +59 + 20 = 15 (1111) +59 + 21 = 0 (0000) +59 + 22 = 1 (0001) +59 + 23 = 2 (0010) +59 + 24 = 3 (0011) +59 + 25 = 4 (0100) +59 + 26 = 5 (0101) +59 + 27 = 6 (0110) +59 + 28 = 7 (0111) +59 + 29 = 8 (1000) +59 + 30 = 9 (1001) +59 + 31 = 10 (1010) +59 + 32 = 11 (1011) +59 + 33 = 12 (1100) +59 + 34 = 13 (1101) +59 + 35 = 14 (1110) +59 + 36 = 15 (1111) +59 + 37 = 0 (0000) +59 + 38 = 1 (0001) +59 + 39 = 2 (0010) +59 + 40 = 3 (0011) +59 + 41 = 4 (0100) +59 + 42 = 5 (0101) +59 + 43 = 6 (0110) +59 + 44 = 7 (0111) +59 + 45 = 8 (1000) +59 + 46 = 9 (1001) +59 + 47 = 10 (1010) +59 + 48 = 11 (1011) +59 + 49 = 12 (1100) +59 + 50 = 13 (1101) +59 + 51 = 14 (1110) +59 + 52 = 15 (1111) +59 + 53 = 0 (0000) +59 + 54 = 1 (0001) +59 + 55 = 2 (0010) +59 + 56 = 3 (0011) +59 + 57 = 4 (0100) +59 + 58 = 5 (0101) +59 + 59 = 6 (0110) +59 + 60 = 7 (0111) +59 + 61 = 8 (1000) +59 + 62 = 9 (1001) +59 + 63 = 10 (1010) +60 + 0 = 12 (1100) +60 + 1 = 13 (1101) +60 + 2 = 14 (1110) +60 + 3 = 15 (1111) +60 + 4 = 0 (0000) +60 + 5 = 1 (0001) +60 + 6 = 2 (0010) +60 + 7 = 3 (0011) +60 + 8 = 4 (0100) +60 + 9 = 5 (0101) +60 + 10 = 6 (0110) +60 + 11 = 7 (0111) +60 + 12 = 8 (1000) +60 + 13 = 9 (1001) +60 + 14 = 10 (1010) +60 + 15 = 11 (1011) +60 + 16 = 12 (1100) +60 + 17 = 13 (1101) +60 + 18 = 14 (1110) +60 + 19 = 15 (1111) +60 + 20 = 0 (0000) +60 + 21 = 1 (0001) +60 + 22 = 2 (0010) +60 + 23 = 3 (0011) +60 + 24 = 4 (0100) +60 + 25 = 5 (0101) +60 + 26 = 6 (0110) +60 + 27 = 7 (0111) +60 + 28 = 8 (1000) +60 + 29 = 9 (1001) +60 + 30 = 10 (1010) +60 + 31 = 11 (1011) +60 + 32 = 12 (1100) +60 + 33 = 13 (1101) +60 + 34 = 14 (1110) +60 + 35 = 15 (1111) +60 + 36 = 0 (0000) +60 + 37 = 1 (0001) +60 + 38 = 2 (0010) +60 + 39 = 3 (0011) +60 + 40 = 4 (0100) +60 + 41 = 5 (0101) +60 + 42 = 6 (0110) +60 + 43 = 7 (0111) +60 + 44 = 8 (1000) +60 + 45 = 9 (1001) +60 + 46 = 10 (1010) +60 + 47 = 11 (1011) +60 + 48 = 12 (1100) +60 + 49 = 13 (1101) +60 + 50 = 14 (1110) +60 + 51 = 15 (1111) +60 + 52 = 0 (0000) +60 + 53 = 1 (0001) +60 + 54 = 2 (0010) +60 + 55 = 3 (0011) +60 + 56 = 4 (0100) +60 + 57 = 5 (0101) +60 + 58 = 6 (0110) +60 + 59 = 7 (0111) +60 + 60 = 8 (1000) +60 + 61 = 9 (1001) +60 + 62 = 10 (1010) +60 + 63 = 11 (1011) +61 + 0 = 13 (1101) +61 + 1 = 14 (1110) +61 + 2 = 15 (1111) +61 + 3 = 0 (0000) +61 + 4 = 1 (0001) +61 + 5 = 2 (0010) +61 + 6 = 3 (0011) +61 + 7 = 4 (0100) +61 + 8 = 5 (0101) +61 + 9 = 6 (0110) +61 + 10 = 7 (0111) +61 + 11 = 8 (1000) +61 + 12 = 9 (1001) +61 + 13 = 10 (1010) +61 + 14 = 11 (1011) +61 + 15 = 12 (1100) +61 + 16 = 13 (1101) +61 + 17 = 14 (1110) +61 + 18 = 15 (1111) +61 + 19 = 0 (0000) +61 + 20 = 1 (0001) +61 + 21 = 2 (0010) +61 + 22 = 3 (0011) +61 + 23 = 4 (0100) +61 + 24 = 5 (0101) +61 + 25 = 6 (0110) +61 + 26 = 7 (0111) +61 + 27 = 8 (1000) +61 + 28 = 9 (1001) +61 + 29 = 10 (1010) +61 + 30 = 11 (1011) +61 + 31 = 12 (1100) +61 + 32 = 13 (1101) +61 + 33 = 14 (1110) +61 + 34 = 15 (1111) +61 + 35 = 0 (0000) +61 + 36 = 1 (0001) +61 + 37 = 2 (0010) +61 + 38 = 3 (0011) +61 + 39 = 4 (0100) +61 + 40 = 5 (0101) +61 + 41 = 6 (0110) +61 + 42 = 7 (0111) +61 + 43 = 8 (1000) +61 + 44 = 9 (1001) +61 + 45 = 10 (1010) +61 + 46 = 11 (1011) +61 + 47 = 12 (1100) +61 + 48 = 13 (1101) +61 + 49 = 14 (1110) +61 + 50 = 15 (1111) +61 + 51 = 0 (0000) +61 + 52 = 1 (0001) +61 + 53 = 2 (0010) +61 + 54 = 3 (0011) +61 + 55 = 4 (0100) +61 + 56 = 5 (0101) +61 + 57 = 6 (0110) +61 + 58 = 7 (0111) +61 + 59 = 8 (1000) +61 + 60 = 9 (1001) +61 + 61 = 10 (1010) +61 + 62 = 11 (1011) +61 + 63 = 12 (1100) +62 + 0 = 14 (1110) +62 + 1 = 15 (1111) +62 + 2 = 0 (0000) +62 + 3 = 1 (0001) +62 + 4 = 2 (0010) +62 + 5 = 3 (0011) +62 + 6 = 4 (0100) +62 + 7 = 5 (0101) +62 + 8 = 6 (0110) +62 + 9 = 7 (0111) +62 + 10 = 8 (1000) +62 + 11 = 9 (1001) +62 + 12 = 10 (1010) +62 + 13 = 11 (1011) +62 + 14 = 12 (1100) +62 + 15 = 13 (1101) +62 + 16 = 14 (1110) +62 + 17 = 15 (1111) +62 + 18 = 0 (0000) +62 + 19 = 1 (0001) +62 + 20 = 2 (0010) +62 + 21 = 3 (0011) +62 + 22 = 4 (0100) +62 + 23 = 5 (0101) +62 + 24 = 6 (0110) +62 + 25 = 7 (0111) +62 + 26 = 8 (1000) +62 + 27 = 9 (1001) +62 + 28 = 10 (1010) +62 + 29 = 11 (1011) +62 + 30 = 12 (1100) +62 + 31 = 13 (1101) +62 + 32 = 14 (1110) +62 + 33 = 15 (1111) +62 + 34 = 0 (0000) +62 + 35 = 1 (0001) +62 + 36 = 2 (0010) +62 + 37 = 3 (0011) +62 + 38 = 4 (0100) +62 + 39 = 5 (0101) +62 + 40 = 6 (0110) +62 + 41 = 7 (0111) +62 + 42 = 8 (1000) +62 + 43 = 9 (1001) +62 + 44 = 10 (1010) +62 + 45 = 11 (1011) +62 + 46 = 12 (1100) +62 + 47 = 13 (1101) +62 + 48 = 14 (1110) +62 + 49 = 15 (1111) +62 + 50 = 0 (0000) +62 + 51 = 1 (0001) +62 + 52 = 2 (0010) +62 + 53 = 3 (0011) +62 + 54 = 4 (0100) +62 + 55 = 5 (0101) +62 + 56 = 6 (0110) +62 + 57 = 7 (0111) +62 + 58 = 8 (1000) +62 + 59 = 9 (1001) +62 + 60 = 10 (1010) +62 + 61 = 11 (1011) +62 + 62 = 12 (1100) +62 + 63 = 13 (1101) +63 + 0 = 15 (1111) +63 + 1 = 0 (0000) +63 + 2 = 1 (0001) +63 + 3 = 2 (0010) +63 + 4 = 3 (0011) +63 + 5 = 4 (0100) +63 + 6 = 5 (0101) +63 + 7 = 6 (0110) +63 + 8 = 7 (0111) +63 + 9 = 8 (1000) +63 + 10 = 9 (1001) +63 + 11 = 10 (1010) +63 + 12 = 11 (1011) +63 + 13 = 12 (1100) +63 + 14 = 13 (1101) +63 + 15 = 14 (1110) +63 + 16 = 15 (1111) +63 + 17 = 0 (0000) +63 + 18 = 1 (0001) +63 + 19 = 2 (0010) +63 + 20 = 3 (0011) +63 + 21 = 4 (0100) +63 + 22 = 5 (0101) +63 + 23 = 6 (0110) +63 + 24 = 7 (0111) +63 + 25 = 8 (1000) +63 + 26 = 9 (1001) +63 + 27 = 10 (1010) +63 + 28 = 11 (1011) +63 + 29 = 12 (1100) +63 + 30 = 13 (1101) +63 + 31 = 14 (1110) +63 + 32 = 15 (1111) +63 + 33 = 0 (0000) +63 + 34 = 1 (0001) +63 + 35 = 2 (0010) +63 + 36 = 3 (0011) +63 + 37 = 4 (0100) +63 + 38 = 5 (0101) +63 + 39 = 6 (0110) +63 + 40 = 7 (0111) +63 + 41 = 8 (1000) +63 + 42 = 9 (1001) +63 + 43 = 10 (1010) +63 + 44 = 11 (1011) +63 + 45 = 12 (1100) +63 + 46 = 13 (1101) +63 + 47 = 14 (1110) +63 + 48 = 15 (1111) +63 + 49 = 0 (0000) +63 + 50 = 1 (0001) +63 + 51 = 2 (0010) +63 + 52 = 3 (0011) +63 + 53 = 4 (0100) +63 + 54 = 5 (0101) +63 + 55 = 6 (0110) +63 + 56 = 7 (0111) +63 + 57 = 8 (1000) +63 + 58 = 9 (1001) +63 + 59 = 10 (1010) +63 + 60 = 11 (1011) +63 + 61 = 12 (1100) +63 + 62 = 13 (1101) +63 + 63 = 14 (1110) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/main.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/main.cpp new file mode 100644 index 000000000..be64495c4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/main.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /****************************************/ + /* Main Filename: main.cc */ + /****************************************/ + /* */ + /* 4-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /****************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + int result_size = 4; + int in1_size = 6; + int in2_size = 6; + +// Signal Instantiation + signal_bool_vector6 in1 ("in1"); + signal_bool_vector6 in2 ("in2"); + signal_bool_vector4 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result, + in1_size, in2_size, result_size); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/stimgen.cpp new file mode 100644 index 000000000..68f982721 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/stimgen.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() + << " (" << result << ")" << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/stimgen.h new file mode 100644 index 000000000..5a95ce7a8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& result; + // Outputs + signal_bool_vector6& in1; + signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& RESULT, + signal_bool_vector6& IN1, + signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/truncation.f b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/truncation.f new file mode 100644 index 000000000..d35040a90 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/datawidth_unsigned/truncation/truncation.f @@ -0,0 +1,3 @@ +truncation/datawidth.cpp +truncation/stimgen.cpp +truncation/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/general/add_promote/add_promote.f b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/add_promote.f new file mode 100644 index 000000000..889c75e0f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/add_promote.f @@ -0,0 +1,3 @@ +add_promote/datawidth.cpp +add_promote/stimgen.cpp +add_promote/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/general/add_promote/common.h b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/common.h new file mode 100644 index 000000000..004591939 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/common.h @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<6> bool_vector6; +typedef sc_bv<7> bool_vector7; +typedef sc_signal sc_signal_bool_vector6; +typedef sc_signal sc_signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/general/add_promote/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/datawidth.cpp new file mode 100644 index 000000000..c2a747ae0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/datawidth.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector6 tmp_a; + bool_vector6 tmp_b; + bool_vector7 tmp_result; + bool_vector6 tmp_add; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_add = tmp_a.to_uint() + tmp_b.to_uint(); + tmp_result = ("0", tmp_add); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/add_promote/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/datawidth.h new file mode 100644 index 000000000..fd6be47a7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/datawidth.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const sc_signal_bool_vector6& in1 ; + const sc_signal_bool_vector6& in2 ; + const sc_signal& ready; + // Outputs + sc_signal_bool_vector7& result; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const sc_signal_bool_vector6& IN1, + const sc_signal_bool_vector6& IN2, + const sc_signal& READY, + sc_signal_bool_vector7& RESULT ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/add_promote/golden/add_promote.log b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/golden/add_promote.log new file mode 100644 index 000000000..f215d98f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/golden/add_promote.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 +0 + 1 = 1 +0 + 2 = 2 +0 + 3 = 3 +0 + 4 = 4 +0 + 5 = 5 +0 + 6 = 6 +0 + 7 = 7 +0 + 8 = 8 +0 + 9 = 9 +0 + 10 = 10 +0 + 11 = 11 +0 + 12 = 12 +0 + 13 = 13 +0 + 14 = 14 +0 + 15 = 15 +0 + 16 = 16 +0 + 17 = 17 +0 + 18 = 18 +0 + 19 = 19 +0 + 20 = 20 +0 + 21 = 21 +0 + 22 = 22 +0 + 23 = 23 +0 + 24 = 24 +0 + 25 = 25 +0 + 26 = 26 +0 + 27 = 27 +0 + 28 = 28 +0 + 29 = 29 +0 + 30 = 30 +0 + 31 = 31 +0 + 32 = 32 +0 + 33 = 33 +0 + 34 = 34 +0 + 35 = 35 +0 + 36 = 36 +0 + 37 = 37 +0 + 38 = 38 +0 + 39 = 39 +0 + 40 = 40 +0 + 41 = 41 +0 + 42 = 42 +0 + 43 = 43 +0 + 44 = 44 +0 + 45 = 45 +0 + 46 = 46 +0 + 47 = 47 +0 + 48 = 48 +0 + 49 = 49 +0 + 50 = 50 +0 + 51 = 51 +0 + 52 = 52 +0 + 53 = 53 +0 + 54 = 54 +0 + 55 = 55 +0 + 56 = 56 +0 + 57 = 57 +0 + 58 = 58 +0 + 59 = 59 +0 + 60 = 60 +0 + 61 = 61 +0 + 62 = 62 +0 + 63 = 63 +1 + 0 = 1 +1 + 1 = 2 +1 + 2 = 3 +1 + 3 = 4 +1 + 4 = 5 +1 + 5 = 6 +1 + 6 = 7 +1 + 7 = 8 +1 + 8 = 9 +1 + 9 = 10 +1 + 10 = 11 +1 + 11 = 12 +1 + 12 = 13 +1 + 13 = 14 +1 + 14 = 15 +1 + 15 = 16 +1 + 16 = 17 +1 + 17 = 18 +1 + 18 = 19 +1 + 19 = 20 +1 + 20 = 21 +1 + 21 = 22 +1 + 22 = 23 +1 + 23 = 24 +1 + 24 = 25 +1 + 25 = 26 +1 + 26 = 27 +1 + 27 = 28 +1 + 28 = 29 +1 + 29 = 30 +1 + 30 = 31 +1 + 31 = 32 +1 + 32 = 33 +1 + 33 = 34 +1 + 34 = 35 +1 + 35 = 36 +1 + 36 = 37 +1 + 37 = 38 +1 + 38 = 39 +1 + 39 = 40 +1 + 40 = 41 +1 + 41 = 42 +1 + 42 = 43 +1 + 43 = 44 +1 + 44 = 45 +1 + 45 = 46 +1 + 46 = 47 +1 + 47 = 48 +1 + 48 = 49 +1 + 49 = 50 +1 + 50 = 51 +1 + 51 = 52 +1 + 52 = 53 +1 + 53 = 54 +1 + 54 = 55 +1 + 55 = 56 +1 + 56 = 57 +1 + 57 = 58 +1 + 58 = 59 +1 + 59 = 60 +1 + 60 = 61 +1 + 61 = 62 +1 + 62 = 63 +1 + 63 = 0 +2 + 0 = 2 +2 + 1 = 3 +2 + 2 = 4 +2 + 3 = 5 +2 + 4 = 6 +2 + 5 = 7 +2 + 6 = 8 +2 + 7 = 9 +2 + 8 = 10 +2 + 9 = 11 +2 + 10 = 12 +2 + 11 = 13 +2 + 12 = 14 +2 + 13 = 15 +2 + 14 = 16 +2 + 15 = 17 +2 + 16 = 18 +2 + 17 = 19 +2 + 18 = 20 +2 + 19 = 21 +2 + 20 = 22 +2 + 21 = 23 +2 + 22 = 24 +2 + 23 = 25 +2 + 24 = 26 +2 + 25 = 27 +2 + 26 = 28 +2 + 27 = 29 +2 + 28 = 30 +2 + 29 = 31 +2 + 30 = 32 +2 + 31 = 33 +2 + 32 = 34 +2 + 33 = 35 +2 + 34 = 36 +2 + 35 = 37 +2 + 36 = 38 +2 + 37 = 39 +2 + 38 = 40 +2 + 39 = 41 +2 + 40 = 42 +2 + 41 = 43 +2 + 42 = 44 +2 + 43 = 45 +2 + 44 = 46 +2 + 45 = 47 +2 + 46 = 48 +2 + 47 = 49 +2 + 48 = 50 +2 + 49 = 51 +2 + 50 = 52 +2 + 51 = 53 +2 + 52 = 54 +2 + 53 = 55 +2 + 54 = 56 +2 + 55 = 57 +2 + 56 = 58 +2 + 57 = 59 +2 + 58 = 60 +2 + 59 = 61 +2 + 60 = 62 +2 + 61 = 63 +2 + 62 = 0 +2 + 63 = 1 +3 + 0 = 3 +3 + 1 = 4 +3 + 2 = 5 +3 + 3 = 6 +3 + 4 = 7 +3 + 5 = 8 +3 + 6 = 9 +3 + 7 = 10 +3 + 8 = 11 +3 + 9 = 12 +3 + 10 = 13 +3 + 11 = 14 +3 + 12 = 15 +3 + 13 = 16 +3 + 14 = 17 +3 + 15 = 18 +3 + 16 = 19 +3 + 17 = 20 +3 + 18 = 21 +3 + 19 = 22 +3 + 20 = 23 +3 + 21 = 24 +3 + 22 = 25 +3 + 23 = 26 +3 + 24 = 27 +3 + 25 = 28 +3 + 26 = 29 +3 + 27 = 30 +3 + 28 = 31 +3 + 29 = 32 +3 + 30 = 33 +3 + 31 = 34 +3 + 32 = 35 +3 + 33 = 36 +3 + 34 = 37 +3 + 35 = 38 +3 + 36 = 39 +3 + 37 = 40 +3 + 38 = 41 +3 + 39 = 42 +3 + 40 = 43 +3 + 41 = 44 +3 + 42 = 45 +3 + 43 = 46 +3 + 44 = 47 +3 + 45 = 48 +3 + 46 = 49 +3 + 47 = 50 +3 + 48 = 51 +3 + 49 = 52 +3 + 50 = 53 +3 + 51 = 54 +3 + 52 = 55 +3 + 53 = 56 +3 + 54 = 57 +3 + 55 = 58 +3 + 56 = 59 +3 + 57 = 60 +3 + 58 = 61 +3 + 59 = 62 +3 + 60 = 63 +3 + 61 = 0 +3 + 62 = 1 +3 + 63 = 2 +4 + 0 = 4 +4 + 1 = 5 +4 + 2 = 6 +4 + 3 = 7 +4 + 4 = 8 +4 + 5 = 9 +4 + 6 = 10 +4 + 7 = 11 +4 + 8 = 12 +4 + 9 = 13 +4 + 10 = 14 +4 + 11 = 15 +4 + 12 = 16 +4 + 13 = 17 +4 + 14 = 18 +4 + 15 = 19 +4 + 16 = 20 +4 + 17 = 21 +4 + 18 = 22 +4 + 19 = 23 +4 + 20 = 24 +4 + 21 = 25 +4 + 22 = 26 +4 + 23 = 27 +4 + 24 = 28 +4 + 25 = 29 +4 + 26 = 30 +4 + 27 = 31 +4 + 28 = 32 +4 + 29 = 33 +4 + 30 = 34 +4 + 31 = 35 +4 + 32 = 36 +4 + 33 = 37 +4 + 34 = 38 +4 + 35 = 39 +4 + 36 = 40 +4 + 37 = 41 +4 + 38 = 42 +4 + 39 = 43 +4 + 40 = 44 +4 + 41 = 45 +4 + 42 = 46 +4 + 43 = 47 +4 + 44 = 48 +4 + 45 = 49 +4 + 46 = 50 +4 + 47 = 51 +4 + 48 = 52 +4 + 49 = 53 +4 + 50 = 54 +4 + 51 = 55 +4 + 52 = 56 +4 + 53 = 57 +4 + 54 = 58 +4 + 55 = 59 +4 + 56 = 60 +4 + 57 = 61 +4 + 58 = 62 +4 + 59 = 63 +4 + 60 = 0 +4 + 61 = 1 +4 + 62 = 2 +4 + 63 = 3 +5 + 0 = 5 +5 + 1 = 6 +5 + 2 = 7 +5 + 3 = 8 +5 + 4 = 9 +5 + 5 = 10 +5 + 6 = 11 +5 + 7 = 12 +5 + 8 = 13 +5 + 9 = 14 +5 + 10 = 15 +5 + 11 = 16 +5 + 12 = 17 +5 + 13 = 18 +5 + 14 = 19 +5 + 15 = 20 +5 + 16 = 21 +5 + 17 = 22 +5 + 18 = 23 +5 + 19 = 24 +5 + 20 = 25 +5 + 21 = 26 +5 + 22 = 27 +5 + 23 = 28 +5 + 24 = 29 +5 + 25 = 30 +5 + 26 = 31 +5 + 27 = 32 +5 + 28 = 33 +5 + 29 = 34 +5 + 30 = 35 +5 + 31 = 36 +5 + 32 = 37 +5 + 33 = 38 +5 + 34 = 39 +5 + 35 = 40 +5 + 36 = 41 +5 + 37 = 42 +5 + 38 = 43 +5 + 39 = 44 +5 + 40 = 45 +5 + 41 = 46 +5 + 42 = 47 +5 + 43 = 48 +5 + 44 = 49 +5 + 45 = 50 +5 + 46 = 51 +5 + 47 = 52 +5 + 48 = 53 +5 + 49 = 54 +5 + 50 = 55 +5 + 51 = 56 +5 + 52 = 57 +5 + 53 = 58 +5 + 54 = 59 +5 + 55 = 60 +5 + 56 = 61 +5 + 57 = 62 +5 + 58 = 63 +5 + 59 = 0 +5 + 60 = 1 +5 + 61 = 2 +5 + 62 = 3 +5 + 63 = 4 +6 + 0 = 6 +6 + 1 = 7 +6 + 2 = 8 +6 + 3 = 9 +6 + 4 = 10 +6 + 5 = 11 +6 + 6 = 12 +6 + 7 = 13 +6 + 8 = 14 +6 + 9 = 15 +6 + 10 = 16 +6 + 11 = 17 +6 + 12 = 18 +6 + 13 = 19 +6 + 14 = 20 +6 + 15 = 21 +6 + 16 = 22 +6 + 17 = 23 +6 + 18 = 24 +6 + 19 = 25 +6 + 20 = 26 +6 + 21 = 27 +6 + 22 = 28 +6 + 23 = 29 +6 + 24 = 30 +6 + 25 = 31 +6 + 26 = 32 +6 + 27 = 33 +6 + 28 = 34 +6 + 29 = 35 +6 + 30 = 36 +6 + 31 = 37 +6 + 32 = 38 +6 + 33 = 39 +6 + 34 = 40 +6 + 35 = 41 +6 + 36 = 42 +6 + 37 = 43 +6 + 38 = 44 +6 + 39 = 45 +6 + 40 = 46 +6 + 41 = 47 +6 + 42 = 48 +6 + 43 = 49 +6 + 44 = 50 +6 + 45 = 51 +6 + 46 = 52 +6 + 47 = 53 +6 + 48 = 54 +6 + 49 = 55 +6 + 50 = 56 +6 + 51 = 57 +6 + 52 = 58 +6 + 53 = 59 +6 + 54 = 60 +6 + 55 = 61 +6 + 56 = 62 +6 + 57 = 63 +6 + 58 = 0 +6 + 59 = 1 +6 + 60 = 2 +6 + 61 = 3 +6 + 62 = 4 +6 + 63 = 5 +7 + 0 = 7 +7 + 1 = 8 +7 + 2 = 9 +7 + 3 = 10 +7 + 4 = 11 +7 + 5 = 12 +7 + 6 = 13 +7 + 7 = 14 +7 + 8 = 15 +7 + 9 = 16 +7 + 10 = 17 +7 + 11 = 18 +7 + 12 = 19 +7 + 13 = 20 +7 + 14 = 21 +7 + 15 = 22 +7 + 16 = 23 +7 + 17 = 24 +7 + 18 = 25 +7 + 19 = 26 +7 + 20 = 27 +7 + 21 = 28 +7 + 22 = 29 +7 + 23 = 30 +7 + 24 = 31 +7 + 25 = 32 +7 + 26 = 33 +7 + 27 = 34 +7 + 28 = 35 +7 + 29 = 36 +7 + 30 = 37 +7 + 31 = 38 +7 + 32 = 39 +7 + 33 = 40 +7 + 34 = 41 +7 + 35 = 42 +7 + 36 = 43 +7 + 37 = 44 +7 + 38 = 45 +7 + 39 = 46 +7 + 40 = 47 +7 + 41 = 48 +7 + 42 = 49 +7 + 43 = 50 +7 + 44 = 51 +7 + 45 = 52 +7 + 46 = 53 +7 + 47 = 54 +7 + 48 = 55 +7 + 49 = 56 +7 + 50 = 57 +7 + 51 = 58 +7 + 52 = 59 +7 + 53 = 60 +7 + 54 = 61 +7 + 55 = 62 +7 + 56 = 63 +7 + 57 = 0 +7 + 58 = 1 +7 + 59 = 2 +7 + 60 = 3 +7 + 61 = 4 +7 + 62 = 5 +7 + 63 = 6 +8 + 0 = 8 +8 + 1 = 9 +8 + 2 = 10 +8 + 3 = 11 +8 + 4 = 12 +8 + 5 = 13 +8 + 6 = 14 +8 + 7 = 15 +8 + 8 = 16 +8 + 9 = 17 +8 + 10 = 18 +8 + 11 = 19 +8 + 12 = 20 +8 + 13 = 21 +8 + 14 = 22 +8 + 15 = 23 +8 + 16 = 24 +8 + 17 = 25 +8 + 18 = 26 +8 + 19 = 27 +8 + 20 = 28 +8 + 21 = 29 +8 + 22 = 30 +8 + 23 = 31 +8 + 24 = 32 +8 + 25 = 33 +8 + 26 = 34 +8 + 27 = 35 +8 + 28 = 36 +8 + 29 = 37 +8 + 30 = 38 +8 + 31 = 39 +8 + 32 = 40 +8 + 33 = 41 +8 + 34 = 42 +8 + 35 = 43 +8 + 36 = 44 +8 + 37 = 45 +8 + 38 = 46 +8 + 39 = 47 +8 + 40 = 48 +8 + 41 = 49 +8 + 42 = 50 +8 + 43 = 51 +8 + 44 = 52 +8 + 45 = 53 +8 + 46 = 54 +8 + 47 = 55 +8 + 48 = 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40 = 39 +63 + 41 = 40 +63 + 42 = 41 +63 + 43 = 42 +63 + 44 = 43 +63 + 45 = 44 +63 + 46 = 45 +63 + 47 = 46 +63 + 48 = 47 +63 + 49 = 48 +63 + 50 = 49 +63 + 51 = 50 +63 + 52 = 51 +63 + 53 = 52 +63 + 54 = 53 +63 + 55 = 54 +63 + 56 = 55 +63 + 57 = 56 +63 + 58 = 57 +63 + 59 = 58 +63 + 60 = 59 +63 + 61 = 60 +63 + 62 = 61 +63 + 63 = 62 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/general/add_promote/main.cpp b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/main.cpp new file mode 100644 index 000000000..8fc9415da --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /******************************************/ + /* Main Filename: main.cc */ + /******************************************/ + /* */ + /* 7-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /* This example adds the two 6-bit */ + /* numbers and then promotes the result */ + /* to 7-bits before assigned to the */ + /* output */ + /* */ + /* This matches C semantics. */ + /* */ + /******************************************/ + + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal_bool_vector6 in1 ("in1"); + sc_signal_bool_vector6 in2 ("in2"); + sc_signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/add_promote/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/stimgen.cpp new file mode 100644 index 000000000..6c8c0a149 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/stimgen.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/add_promote/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/stimgen.h new file mode 100644 index 000000000..d9f04847f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/add_promote/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const sc_signal_bool_vector7& result; + // Outputs + sc_signal_bool_vector6& in1 ; + sc_signal_bool_vector6& in2 ; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const sc_signal_bool_vector7& RESULT, + sc_signal_bool_vector6& IN1, + sc_signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/array_range/array_range.cpp b/src/systemc/tests/systemc/misc/unit/data/general/array_range/array_range.cpp new file mode 100644 index 000000000..b8ea63ebc --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/array_range/array_range.cpp @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + array_range.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: array_range.cc */ + /*******************************************/ + +#include "array_range.h" + +void +array_range::entry() +{ + bool_vector8 a; + bool_vector4 b; + bool_vector4 c; + bool_vector8 d; + bool_vector8 e; + bool_vector8 f; + // bool_vector0 nullbv; // Null vector to make scalar concat work + + wait(); + + a = in1.read(); + + b = a.range(7,4); c = a.range(3,0); // sub vectors + + d = a.range(0,7); // bit reverse + + // e = (nullbv, a[0], a[1], a[2], a[3], a[4], a[5], a[6], a[7]); + e = (a[0], a[1], a[2], a[3], a[4], a[5], a[6], a[7]); + // bit reverse concat + + f = (a.range(3,1), a.range(7,6), a[0], a.range(4,5)); // shuffle + + o1.write(b); + o2.write(c); + o3.write(d); + o4.write(e); + o5.write(f); + + wait(); + +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/array_range/array_range.f b/src/systemc/tests/systemc/misc/unit/data/general/array_range/array_range.f new file mode 100644 index 000000000..4eb297dac --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/array_range/array_range.f @@ -0,0 +1,3 @@ +array_range/array_range.cpp +array_range/stimgen.cpp +array_range/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/general/array_range/array_range.h b/src/systemc/tests/systemc/misc/unit/data/general/array_range/array_range.h new file mode 100644 index 000000000..e4916ca3e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/array_range/array_range.h @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + array_range.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: array_range.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( array_range ) +{ + SC_HAS_PROCESS( array_range ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector8& in1; + // Outputs + signal_bool_vector4& o1; + signal_bool_vector4& o2; + signal_bool_vector8& o3; + signal_bool_vector8& o4; + signal_bool_vector8& o5; + + // Constructor + array_range (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector8& IN1, + signal_bool_vector4& O1, + signal_bool_vector4& O2, + signal_bool_vector8& O3, + signal_bool_vector8& O4, + signal_bool_vector8& O5 ) + + : + in1 (IN1), + o1 (O1), + o2 (O2), + o3 (O3), + o4 (O4), + o5 (O5) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/array_range/common.h b/src/systemc/tests/systemc/misc/unit/data/general/array_range/common.h new file mode 100644 index 000000000..9e4b1fea5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/array_range/common.h @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<0> bool_vector0; +typedef sc_bv<4> bool_vector4; +typedef sc_bv<8> bool_vector8; +typedef sc_signal signal_bool_vector4; +typedef sc_signal signal_bool_vector8; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/general/array_range/golden/array_range.log b/src/systemc/tests/systemc/misc/unit/data/general/array_range/golden/array_range.log new file mode 100644 index 000000000..deac0cd85 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/array_range/golden/array_range.log @@ -0,0 +1,8 @@ +SystemC Simulation +IN1 = 01011001 +O1 = 0101 O2 = 1001 +O3 = 10011010 +O4 = 10011010 +O5 = 10001110 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/general/array_range/main.cpp b/src/systemc/tests/systemc/misc/unit/data/general/array_range/main.cpp new file mode 100644 index 000000000..70be37a8c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/array_range/main.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + +#include "array_range.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + signal_bool_vector8 in1 ("in1"); + signal_bool_vector4 o1 ("o1"); + signal_bool_vector4 o2 ("o2"); + signal_bool_vector8 o3 ("o3"); + signal_bool_vector8 o4 ("o4"); + signal_bool_vector8 o5 ("o5"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + array_range D1 ("D1", clk, in1, o1, o2, o3, o4, o5); + + stimgen T1 ("T1", clk, o1, o2, o3, o4, o5, in1); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/array_range/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/general/array_range/stimgen.cpp new file mode 100644 index 000000000..54c05bc4f --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/array_range/stimgen.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: stimgen.cc */ + /*******************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + bool_vector8 d; + +// in1.write("0101_1001"); + in1.write("01011001"); + wait(2); + + cout << "IN1 = " << in1.read() << endl; + cout << "O1 = " << o1.read() + << " O2 = " << o2.read() << endl; + cout << "O3 = " << o3.read() << endl; + cout << "O4 = " << o4.read() << endl; + cout << "O5 = " << o5.read() << endl; + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/array_range/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/general/array_range/stimgen.h new file mode 100644 index 000000000..17244bc5e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/array_range/stimgen.h @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: stimgen.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector4& o1; + const signal_bool_vector4& o2; + const signal_bool_vector8& o3; + const signal_bool_vector8& o4; + const signal_bool_vector8& o5; + // Outputs + signal_bool_vector8& in1; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector4& O1, + const signal_bool_vector4& O2, + const signal_bool_vector8& O3, + const signal_bool_vector8& O4, + const signal_bool_vector8& O5, + signal_bool_vector8& IN1 ) + + : + o1 (O1), + o2 (O2), + o3 (O3), + o4 (O4), + o5 (O5), + in1 (IN1) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/bool_tilda/bool_tilda.cpp b/src/systemc/tests/systemc/misc/unit/data/general/bool_tilda/bool_tilda.cpp new file mode 100644 index 000000000..8961fb34e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/bool_tilda/bool_tilda.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + bool_tilda.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int ac, char *av[]) +{ + + bool value1 = 1; + bool value0 = 0; + + bool a; + bool b; + bool c; + bool d; + + a = !value1; + b = !value0; + c = ~value1; + d = ~value0; + + cout << "\n a = " << a << " (!1)" + << "\n b = " << b << " (!0)" + << "\n c = " << c << " (~1)" + << "\n d = " << d << " (~0)" + << endl; + sc_start(0, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/bool_tilda/golden/bool_tilda.log b/src/systemc/tests/systemc/misc/unit/data/general/bool_tilda/golden/bool_tilda.log new file mode 100644 index 000000000..e38c9930c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/bool_tilda/golden/bool_tilda.log @@ -0,0 +1,6 @@ +SystemC Simulation + + a = 0 (!1) + b = 1 (!0) + c = 1 (~1) + d = 1 (~0) diff --git a/src/systemc/tests/systemc/misc/unit/data/general/concat_port/common.h b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/common.h new file mode 100644 index 000000000..0f0b2b812 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/common.h @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<8> bool_vector8; +typedef sc_bv<16> bool_vector16; +typedef sc_signal signal_bool_vector8; +typedef sc_signal signal_bool_vector16; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/general/concat_port/concat_port.cpp b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/concat_port.cpp new file mode 100644 index 000000000..b3ac6f5c1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/concat_port.cpp @@ -0,0 +1,85 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + concat_port.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*********************************************/ + /* Implementation Filename: concat_port.cc */ + /*********************************************/ + +#include "concat_port.h" + +void +concat_port::entry() +{ + bool_vector8 tmp_a; + bool_vector8 tmp_b; + + while (true) { + + done.write(0); + do { wait(); } while (ready != 1); + + tmp_a = a.read(); + tmp_b = b.read(); + + switch (mode.read()) { + + case 0: c.write( (tmp_a.range(7,4), tmp_b.range(7,4)) ); + d.write( (tmp_a, tmp_b) ); + break; + + case 1: c.write( (tmp_a.range(0,7)) ); + d.write( (tmp_a.range(0,7), tmp_b.range(0,7)) ); + break; + + case 2: c.write( (tmp_a[0], tmp_b.range(1,4), tmp_a.range(7,5)) ); + d.write( (tmp_a.range(7,4), tmp_b.range(7,4), + tmp_a.range(3,0), tmp_b.range(3,0)) ); + break; + + case 3: c.write( ("1", tmp_b.range(2,0), "0", tmp_a.range(2,0)) ); + d.write( ("11", tmp_a.range(6,0), tmp_b.range(6,0)) ); + break; + + default: cout << "Error: Mode " << mode.read() + << " does not exist!" << endl; + break; + + } + done.write(1); + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/concat_port/concat_port.f b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/concat_port.f new file mode 100644 index 000000000..0b1d172ff --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/concat_port.f @@ -0,0 +1,3 @@ +concat_port/concat_port.cpp +concat_port/stimgen.cpp +concat_port/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/general/concat_port/concat_port.h b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/concat_port.h new file mode 100644 index 000000000..155c4cbed --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/concat_port.h @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + concat_port.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: concat_port.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( concat_port ) +{ + SC_HAS_PROCESS( concat_port ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector8& a; + const signal_bool_vector8& b; + const sc_signal& mode; + const sc_signal& ready; + // Outputs + signal_bool_vector8& c; + signal_bool_vector16& d; + sc_signal& done; + + // Constructor + concat_port (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector8& A, + const signal_bool_vector8& B, + const sc_signal& MODE, + const sc_signal& READY, + signal_bool_vector8& C, + signal_bool_vector16& D, + sc_signal& DONE ) + + : + a (A), + b (B), + mode (MODE), + ready (READY), + c (C), + d (D), + done (DONE) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/concat_port/golden/concat_port.log b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/golden/concat_port.log new file mode 100644 index 000000000..c3569520e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/golden/concat_port.log @@ -0,0 +1,11 @@ +SystemC Simulation +a = 01010101 b = 11110000 mode = 0 + c = 01011111 d = 0101010111110000 +a = 01010101 b = 11110000 mode = 1 + c = 10101010 d = 1010101000001111 +a = 01010101 b = 11110000 mode = 2 + c = 10001010 d = 0101111101010000 +a = 01010101 b = 11110000 mode = 3 + c = 10000101 d = 1110101011110000 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/general/concat_port/main.cpp b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/main.cpp new file mode 100644 index 000000000..13603f8de --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/main.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + +#include "concat_port.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + signal_bool_vector8 a ("a"); + signal_bool_vector8 b ("b"); + signal_bool_vector8 c ("c"); + signal_bool_vector16 d ("d"); + sc_signal mode ("mode"); + sc_signal ready ("ready"); + sc_signal done ("done"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + concat_port D1 ("D1", clk, a, b, mode, ready, c, d, done); + + stimgen T1 ("T1", clk, c, d, done, a, b, mode, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/concat_port/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/stimgen.cpp new file mode 100644 index 000000000..cfd9e7a6c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/stimgen.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: stimgen.cc */ + /*******************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + ready.write(0); + wait(); + + a.write("01010101"); + b.write("11110000"); + ready.write(1); + + for (int i=0; i < 4; i++) { + mode.write(i); + wait(); + cout << "a = " << a << " b = " << b << " mode = " << mode << endl; + do { wait(); } while (done != 1); + cout << "\t c = " << c << " d = " << d << endl; + } + + ready.write(0); + wait(); + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/concat_port/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/stimgen.h new file mode 100644 index 000000000..d0b43049a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/concat_port/stimgen.h @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: stimgen.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector8& c; + const signal_bool_vector16& d; + const sc_signal& done; + // Outputs + signal_bool_vector8& a; + signal_bool_vector8& b; + sc_signal& mode; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector8& C, + const signal_bool_vector16& D, + const sc_signal& DONE, + signal_bool_vector8& A, + signal_bool_vector8& B, + sc_signal& MODE, + sc_signal& READY ) + + : + c (C), + d (D), + done (DONE), + a (A), + b (B), + mode (MODE), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/datawidth.cpp new file mode 100644 index 000000000..efb22e5ef --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + int tmp_a; + int tmp_b; + int tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/datawidth.h new file mode 100644 index 000000000..cb5143447 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/datawidth.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "systemc.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const sc_signal& in1; + const sc_signal& in2; + const sc_signal& ready; + // Outputs + sc_signal& result; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& IN1, + const sc_signal& IN2, + const sc_signal& READY, + sc_signal& RESULT ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/datawidth_int.f b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/datawidth_int.f new file mode 100644 index 000000000..2fdabe5b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/datawidth_int.f @@ -0,0 +1,3 @@ +datawidth_int/datawidth.cpp +datawidth_int/stimgen.cpp +datawidth_int/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/golden/datawidth_int.log b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/golden/datawidth_int.log new file mode 100644 index 000000000..b168b0482 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/golden/datawidth_int.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 +0 + 1 = 1 +0 + 2 = 2 +0 + 3 = 3 +0 + 4 = 4 +0 + 5 = 5 +0 + 6 = 6 +0 + 7 = 7 +0 + 8 = 8 +0 + 9 = 9 +0 + 10 = 10 +0 + 11 = 11 +0 + 12 = 12 +0 + 13 = 13 +0 + 14 = 14 +0 + 15 = 15 +0 + 16 = 16 +0 + 17 = 17 +0 + 18 = 18 +0 + 19 = 19 +0 + 20 = 20 +0 + 21 = 21 +0 + 22 = 22 +0 + 23 = 23 +0 + 24 = 24 +0 + 25 = 25 +0 + 26 = 26 +0 + 27 = 27 +0 + 28 = 28 +0 + 29 = 29 +0 + 30 = 30 +0 + 31 = 31 +0 + 32 = 32 +0 + 33 = 33 +0 + 34 = 34 +0 + 35 = 35 +0 + 36 = 36 +0 + 37 = 37 +0 + 38 = 38 +0 + 39 = 39 +0 + 40 = 40 +0 + 41 = 41 +0 + 42 = 42 +0 + 43 = 43 +0 + 44 = 44 +0 + 45 = 45 +0 + 46 = 46 +0 + 47 = 47 +0 + 48 = 48 +0 + 49 = 49 +0 + 50 = 50 +0 + 51 = 51 +0 + 52 = 52 +0 + 53 = 53 +0 + 54 = 54 +0 + 55 = 55 +0 + 56 = 56 +0 + 57 = 57 +0 + 58 = 58 +0 + 59 = 59 +0 + 60 = 60 +0 + 61 = 61 +0 + 62 = 62 +0 + 63 = 63 +1 + 0 = 1 +1 + 1 = 2 +1 + 2 = 3 +1 + 3 = 4 +1 + 4 = 5 +1 + 5 = 6 +1 + 6 = 7 +1 + 7 = 8 +1 + 8 = 9 +1 + 9 = 10 +1 + 10 = 11 +1 + 11 = 12 +1 + 12 = 13 +1 + 13 = 14 +1 + 14 = 15 +1 + 15 = 16 +1 + 16 = 17 +1 + 17 = 18 +1 + 18 = 19 +1 + 19 = 20 +1 + 20 = 21 +1 + 21 = 22 +1 + 22 = 23 +1 + 23 = 24 +1 + 24 = 25 +1 + 25 = 26 +1 + 26 = 27 +1 + 27 = 28 +1 + 28 = 29 +1 + 29 = 30 +1 + 30 = 31 +1 + 31 = 32 +1 + 32 = 33 +1 + 33 = 34 +1 + 34 = 35 +1 + 35 = 36 +1 + 36 = 37 +1 + 37 = 38 +1 + 38 = 39 +1 + 39 = 40 +1 + 40 = 41 +1 + 41 = 42 +1 + 42 = 43 +1 + 43 = 44 +1 + 44 = 45 +1 + 45 = 46 +1 + 46 = 47 +1 + 47 = 48 +1 + 48 = 49 +1 + 49 = 50 +1 + 50 = 51 +1 + 51 = 52 +1 + 52 = 53 +1 + 53 = 54 +1 + 54 = 55 +1 + 55 = 56 +1 + 56 = 57 +1 + 57 = 58 +1 + 58 = 59 +1 + 59 = 60 +1 + 60 = 61 +1 + 61 = 62 +1 + 62 = 63 +1 + 63 = 64 +2 + 0 = 2 +2 + 1 = 3 +2 + 2 = 4 +2 + 3 = 5 +2 + 4 = 6 +2 + 5 = 7 +2 + 6 = 8 +2 + 7 = 9 +2 + 8 = 10 +2 + 9 = 11 +2 + 10 = 12 +2 + 11 = 13 +2 + 12 = 14 +2 + 13 = 15 +2 + 14 = 16 +2 + 15 = 17 +2 + 16 = 18 +2 + 17 = 19 +2 + 18 = 20 +2 + 19 = 21 +2 + 20 = 22 +2 + 21 = 23 +2 + 22 = 24 +2 + 23 = 25 +2 + 24 = 26 +2 + 25 = 27 +2 + 26 = 28 +2 + 27 = 29 +2 + 28 = 30 +2 + 29 = 31 +2 + 30 = 32 +2 + 31 = 33 +2 + 32 = 34 +2 + 33 = 35 +2 + 34 = 36 +2 + 35 = 37 +2 + 36 = 38 +2 + 37 = 39 +2 + 38 = 40 +2 + 39 = 41 +2 + 40 = 42 +2 + 41 = 43 +2 + 42 = 44 +2 + 43 = 45 +2 + 44 = 46 +2 + 45 = 47 +2 + 46 = 48 +2 + 47 = 49 +2 + 48 = 50 +2 + 49 = 51 +2 + 50 = 52 +2 + 51 = 53 +2 + 52 = 54 +2 + 53 = 55 +2 + 54 = 56 +2 + 55 = 57 +2 + 56 = 58 +2 + 57 = 59 +2 + 58 = 60 +2 + 59 = 61 +2 + 60 = 62 +2 + 61 = 63 +2 + 62 = 64 +2 + 63 = 65 +3 + 0 = 3 +3 + 1 = 4 +3 + 2 = 5 +3 + 3 = 6 +3 + 4 = 7 +3 + 5 = 8 +3 + 6 = 9 +3 + 7 = 10 +3 + 8 = 11 +3 + 9 = 12 +3 + 10 = 13 +3 + 11 = 14 +3 + 12 = 15 +3 + 13 = 16 +3 + 14 = 17 +3 + 15 = 18 +3 + 16 = 19 +3 + 17 = 20 +3 + 18 = 21 +3 + 19 = 22 +3 + 20 = 23 +3 + 21 = 24 +3 + 22 = 25 +3 + 23 = 26 +3 + 24 = 27 +3 + 25 = 28 +3 + 26 = 29 +3 + 27 = 30 +3 + 28 = 31 +3 + 29 = 32 +3 + 30 = 33 +3 + 31 = 34 +3 + 32 = 35 +3 + 33 = 36 +3 + 34 = 37 +3 + 35 = 38 +3 + 36 = 39 +3 + 37 = 40 +3 + 38 = 41 +3 + 39 = 42 +3 + 40 = 43 +3 + 41 = 44 +3 + 42 = 45 +3 + 43 = 46 +3 + 44 = 47 +3 + 45 = 48 +3 + 46 = 49 +3 + 47 = 50 +3 + 48 = 51 +3 + 49 = 52 +3 + 50 = 53 +3 + 51 = 54 +3 + 52 = 55 +3 + 53 = 56 +3 + 54 = 57 +3 + 55 = 58 +3 + 56 = 59 +3 + 57 = 60 +3 + 58 = 61 +3 + 59 = 62 +3 + 60 = 63 +3 + 61 = 64 +3 + 62 = 65 +3 + 63 = 66 +4 + 0 = 4 +4 + 1 = 5 +4 + 2 = 6 +4 + 3 = 7 +4 + 4 = 8 +4 + 5 = 9 +4 + 6 = 10 +4 + 7 = 11 +4 + 8 = 12 +4 + 9 = 13 +4 + 10 = 14 +4 + 11 = 15 +4 + 12 = 16 +4 + 13 = 17 +4 + 14 = 18 +4 + 15 = 19 +4 + 16 = 20 +4 + 17 = 21 +4 + 18 = 22 +4 + 19 = 23 +4 + 20 = 24 +4 + 21 = 25 +4 + 22 = 26 +4 + 23 = 27 +4 + 24 = 28 +4 + 25 = 29 +4 + 26 = 30 +4 + 27 = 31 +4 + 28 = 32 +4 + 29 = 33 +4 + 30 = 34 +4 + 31 = 35 +4 + 32 = 36 +4 + 33 = 37 +4 + 34 = 38 +4 + 35 = 39 +4 + 36 = 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3 = 64 +61 + 4 = 65 +61 + 5 = 66 +61 + 6 = 67 +61 + 7 = 68 +61 + 8 = 69 +61 + 9 = 70 +61 + 10 = 71 +61 + 11 = 72 +61 + 12 = 73 +61 + 13 = 74 +61 + 14 = 75 +61 + 15 = 76 +61 + 16 = 77 +61 + 17 = 78 +61 + 18 = 79 +61 + 19 = 80 +61 + 20 = 81 +61 + 21 = 82 +61 + 22 = 83 +61 + 23 = 84 +61 + 24 = 85 +61 + 25 = 86 +61 + 26 = 87 +61 + 27 = 88 +61 + 28 = 89 +61 + 29 = 90 +61 + 30 = 91 +61 + 31 = 92 +61 + 32 = 93 +61 + 33 = 94 +61 + 34 = 95 +61 + 35 = 96 +61 + 36 = 97 +61 + 37 = 98 +61 + 38 = 99 +61 + 39 = 100 +61 + 40 = 101 +61 + 41 = 102 +61 + 42 = 103 +61 + 43 = 104 +61 + 44 = 105 +61 + 45 = 106 +61 + 46 = 107 +61 + 47 = 108 +61 + 48 = 109 +61 + 49 = 110 +61 + 50 = 111 +61 + 51 = 112 +61 + 52 = 113 +61 + 53 = 114 +61 + 54 = 115 +61 + 55 = 116 +61 + 56 = 117 +61 + 57 = 118 +61 + 58 = 119 +61 + 59 = 120 +61 + 60 = 121 +61 + 61 = 122 +61 + 62 = 123 +61 + 63 = 124 +62 + 0 = 62 +62 + 1 = 63 +62 + 2 = 64 +62 + 3 = 65 +62 + 4 = 66 +62 + 5 = 67 +62 + 6 = 68 +62 + 7 = 69 +62 + 8 = 70 +62 + 9 = 71 +62 + 10 = 72 +62 + 11 = 73 +62 + 12 = 74 +62 + 13 = 75 +62 + 14 = 76 +62 + 15 = 77 +62 + 16 = 78 +62 + 17 = 79 +62 + 18 = 80 +62 + 19 = 81 +62 + 20 = 82 +62 + 21 = 83 +62 + 22 = 84 +62 + 23 = 85 +62 + 24 = 86 +62 + 25 = 87 +62 + 26 = 88 +62 + 27 = 89 +62 + 28 = 90 +62 + 29 = 91 +62 + 30 = 92 +62 + 31 = 93 +62 + 32 = 94 +62 + 33 = 95 +62 + 34 = 96 +62 + 35 = 97 +62 + 36 = 98 +62 + 37 = 99 +62 + 38 = 100 +62 + 39 = 101 +62 + 40 = 102 +62 + 41 = 103 +62 + 42 = 104 +62 + 43 = 105 +62 + 44 = 106 +62 + 45 = 107 +62 + 46 = 108 +62 + 47 = 109 +62 + 48 = 110 +62 + 49 = 111 +62 + 50 = 112 +62 + 51 = 113 +62 + 52 = 114 +62 + 53 = 115 +62 + 54 = 116 +62 + 55 = 117 +62 + 56 = 118 +62 + 57 = 119 +62 + 58 = 120 +62 + 59 = 121 +62 + 60 = 122 +62 + 61 = 123 +62 + 62 = 124 +62 + 63 = 125 +63 + 0 = 63 +63 + 1 = 64 +63 + 2 = 65 +63 + 3 = 66 +63 + 4 = 67 +63 + 5 = 68 +63 + 6 = 69 +63 + 7 = 70 +63 + 8 = 71 +63 + 9 = 72 +63 + 10 = 73 +63 + 11 = 74 +63 + 12 = 75 +63 + 13 = 76 +63 + 14 = 77 +63 + 15 = 78 +63 + 16 = 79 +63 + 17 = 80 +63 + 18 = 81 +63 + 19 = 82 +63 + 20 = 83 +63 + 21 = 84 +63 + 22 = 85 +63 + 23 = 86 +63 + 24 = 87 +63 + 25 = 88 +63 + 26 = 89 +63 + 27 = 90 +63 + 28 = 91 +63 + 29 = 92 +63 + 30 = 93 +63 + 31 = 94 +63 + 32 = 95 +63 + 33 = 96 +63 + 34 = 97 +63 + 35 = 98 +63 + 36 = 99 +63 + 37 = 100 +63 + 38 = 101 +63 + 39 = 102 +63 + 40 = 103 +63 + 41 = 104 +63 + 42 = 105 +63 + 43 = 106 +63 + 44 = 107 +63 + 45 = 108 +63 + 46 = 109 +63 + 47 = 110 +63 + 48 = 111 +63 + 49 = 112 +63 + 50 = 113 +63 + 51 = 114 +63 + 52 = 115 +63 + 53 = 116 +63 + 54 = 117 +63 + 55 = 118 +63 + 56 = 119 +63 + 57 = 120 +63 + 58 = 121 +63 + 59 = 122 +63 + 60 = 123 +63 + 61 = 124 +63 + 62 = 125 +63 + 63 = 126 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/main.cpp b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/main.cpp new file mode 100644 index 000000000..771aebbfa --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/main.cpp @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + /* */ + /* int = int + int */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /***************************************/ + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal in1 ("in1"); + sc_signal in2 ("in2"); + sc_signal result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/stimgen.cpp new file mode 100644 index 000000000..ac55101ee --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/stimgen.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read() << " + " << in2.read() + << " = " << result.read() << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/stimgen.h new file mode 100644 index 000000000..7e889295c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "systemc.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const sc_signal& result; + // Outputs + sc_signal& in1; + sc_signal& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& RESULT, + sc_signal& IN1, + sc_signal& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/common.h b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/common.h new file mode 100644 index 000000000..32dc0a213 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<7> bool_vector; +typedef sc_signal sc_signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/datawidth.cpp new file mode 100644 index 000000000..d0534c61b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/datawidth.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + int tmp_a; + int tmp_b; + bool_vector tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/datawidth.h new file mode 100644 index 000000000..a30a68bd1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/datawidth.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const sc_signal& in1; + const sc_signal& in2; + const sc_signal& ready; + // Outputs + sc_signal_bool_vector& result; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& IN1, + const sc_signal& IN2, + const sc_signal& READY, + sc_signal_bool_vector& RESULT ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/golden/int_to_bits.log b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/golden/int_to_bits.log new file mode 100644 index 000000000..b168b0482 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/golden/int_to_bits.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 +0 + 1 = 1 +0 + 2 = 2 +0 + 3 = 3 +0 + 4 = 4 +0 + 5 = 5 +0 + 6 = 6 +0 + 7 = 7 +0 + 8 = 8 +0 + 9 = 9 +0 + 10 = 10 +0 + 11 = 11 +0 + 12 = 12 +0 + 13 = 13 +0 + 14 = 14 +0 + 15 = 15 +0 + 16 = 16 +0 + 17 = 17 +0 + 18 = 18 +0 + 19 = 19 +0 + 20 = 20 +0 + 21 = 21 +0 + 22 = 22 +0 + 23 = 23 +0 + 24 = 24 +0 + 25 = 25 +0 + 26 = 26 +0 + 27 = 27 +0 + 28 = 28 +0 + 29 = 29 +0 + 30 = 30 +0 + 31 = 31 +0 + 32 = 32 +0 + 33 = 33 +0 + 34 = 34 +0 + 35 = 35 +0 + 36 = 36 +0 + 37 = 37 +0 + 38 = 38 +0 + 39 = 39 +0 + 40 = 40 +0 + 41 = 41 +0 + 42 = 42 +0 + 43 = 43 +0 + 44 = 44 +0 + 45 = 45 +0 + 46 = 46 +0 + 47 = 47 +0 + 48 = 48 +0 + 49 = 49 +0 + 50 = 50 +0 + 51 = 51 +0 + 52 = 52 +0 + 53 = 53 +0 + 54 = 54 +0 + 55 = 55 +0 + 56 = 56 +0 + 57 = 57 +0 + 58 = 58 +0 + 59 = 59 +0 + 60 = 60 +0 + 61 = 61 +0 + 62 = 62 +0 + 63 = 63 +1 + 0 = 1 +1 + 1 = 2 +1 + 2 = 3 +1 + 3 = 4 +1 + 4 = 5 +1 + 5 = 6 +1 + 6 = 7 +1 + 7 = 8 +1 + 8 = 9 +1 + 9 = 10 +1 + 10 = 11 +1 + 11 = 12 +1 + 12 = 13 +1 + 13 = 14 +1 + 14 = 15 +1 + 15 = 16 +1 + 16 = 17 +1 + 17 = 18 +1 + 18 = 19 +1 + 19 = 20 +1 + 20 = 21 +1 + 21 = 22 +1 + 22 = 23 +1 + 23 = 24 +1 + 24 = 25 +1 + 25 = 26 +1 + 26 = 27 +1 + 27 = 28 +1 + 28 = 29 +1 + 29 = 30 +1 + 30 = 31 +1 + 31 = 32 +1 + 32 = 33 +1 + 33 = 34 +1 + 34 = 35 +1 + 35 = 36 +1 + 36 = 37 +1 + 37 = 38 +1 + 38 = 39 +1 + 39 = 40 +1 + 40 = 41 +1 + 41 = 42 +1 + 42 = 43 +1 + 43 = 44 +1 + 44 = 45 +1 + 45 = 46 +1 + 46 = 47 +1 + 47 = 48 +1 + 48 = 49 +1 + 49 = 50 +1 + 50 = 51 +1 + 51 = 52 +1 + 52 = 53 +1 + 53 = 54 +1 + 54 = 55 +1 + 55 = 56 +1 + 56 = 57 +1 + 57 = 58 +1 + 58 = 59 +1 + 59 = 60 +1 + 60 = 61 +1 + 61 = 62 +1 + 62 = 63 +1 + 63 = 64 +2 + 0 = 2 +2 + 1 = 3 +2 + 2 = 4 +2 + 3 = 5 +2 + 4 = 6 +2 + 5 = 7 +2 + 6 = 8 +2 + 7 = 9 +2 + 8 = 10 +2 + 9 = 11 +2 + 10 = 12 +2 + 11 = 13 +2 + 12 = 14 +2 + 13 = 15 +2 + 14 = 16 +2 + 15 = 17 +2 + 16 = 18 +2 + 17 = 19 +2 + 18 = 20 +2 + 19 = 21 +2 + 20 = 22 +2 + 21 = 23 +2 + 22 = 24 +2 + 23 = 25 +2 + 24 = 26 +2 + 25 = 27 +2 + 26 = 28 +2 + 27 = 29 +2 + 28 = 30 +2 + 29 = 31 +2 + 30 = 32 +2 + 31 = 33 +2 + 32 = 34 +2 + 33 = 35 +2 + 34 = 36 +2 + 35 = 37 +2 + 36 = 38 +2 + 37 = 39 +2 + 38 = 40 +2 + 39 = 41 +2 + 40 = 42 +2 + 41 = 43 +2 + 42 = 44 +2 + 43 = 45 +2 + 44 = 46 +2 + 45 = 47 +2 + 46 = 48 +2 + 47 = 49 +2 + 48 = 50 +2 + 49 = 51 +2 + 50 = 52 +2 + 51 = 53 +2 + 52 = 54 +2 + 53 = 55 +2 + 54 = 56 +2 + 55 = 57 +2 + 56 = 58 +2 + 57 = 59 +2 + 58 = 60 +2 + 59 = 61 +2 + 60 = 62 +2 + 61 = 63 +2 + 62 = 64 +2 + 63 = 65 +3 + 0 = 3 +3 + 1 = 4 +3 + 2 = 5 +3 + 3 = 6 +3 + 4 = 7 +3 + 5 = 8 +3 + 6 = 9 +3 + 7 = 10 +3 + 8 = 11 +3 + 9 = 12 +3 + 10 = 13 +3 + 11 = 14 +3 + 12 = 15 +3 + 13 = 16 +3 + 14 = 17 +3 + 15 = 18 +3 + 16 = 19 +3 + 17 = 20 +3 + 18 = 21 +3 + 19 = 22 +3 + 20 = 23 +3 + 21 = 24 +3 + 22 = 25 +3 + 23 = 26 +3 + 24 = 27 +3 + 25 = 28 +3 + 26 = 29 +3 + 27 = 30 +3 + 28 = 31 +3 + 29 = 32 +3 + 30 = 33 +3 + 31 = 34 +3 + 32 = 35 +3 + 33 = 36 +3 + 34 = 37 +3 + 35 = 38 +3 + 36 = 39 +3 + 37 = 40 +3 + 38 = 41 +3 + 39 = 42 +3 + 40 = 43 +3 + 41 = 44 +3 + 42 = 45 +3 + 43 = 46 +3 + 44 = 47 +3 + 45 = 48 +3 + 46 = 49 +3 + 47 = 50 +3 + 48 = 51 +3 + 49 = 52 +3 + 50 = 53 +3 + 51 = 54 +3 + 52 = 55 +3 + 53 = 56 +3 + 54 = 57 +3 + 55 = 58 +3 + 56 = 59 +3 + 57 = 60 +3 + 58 = 61 +3 + 59 = 62 +3 + 60 = 63 +3 + 61 = 64 +3 + 62 = 65 +3 + 63 = 66 +4 + 0 = 4 +4 + 1 = 5 +4 + 2 = 6 +4 + 3 = 7 +4 + 4 = 8 +4 + 5 = 9 +4 + 6 = 10 +4 + 7 = 11 +4 + 8 = 12 +4 + 9 = 13 +4 + 10 = 14 +4 + 11 = 15 +4 + 12 = 16 +4 + 13 = 17 +4 + 14 = 18 +4 + 15 = 19 +4 + 16 = 20 +4 + 17 = 21 +4 + 18 = 22 +4 + 19 = 23 +4 + 20 = 24 +4 + 21 = 25 +4 + 22 = 26 +4 + 23 = 27 +4 + 24 = 28 +4 + 25 = 29 +4 + 26 = 30 +4 + 27 = 31 +4 + 28 = 32 +4 + 29 = 33 +4 + 30 = 34 +4 + 31 = 35 +4 + 32 = 36 +4 + 33 = 37 +4 + 34 = 38 +4 + 35 = 39 +4 + 36 = 40 +4 + 37 = 41 +4 + 38 = 42 +4 + 39 = 43 +4 + 40 = 44 +4 + 41 = 45 +4 + 42 = 46 +4 + 43 = 47 +4 + 44 = 48 +4 + 45 = 49 +4 + 46 = 50 +4 + 47 = 51 +4 + 48 = 52 +4 + 49 = 53 +4 + 50 = 54 +4 + 51 = 55 +4 + 52 = 56 +4 + 53 = 57 +4 + 54 = 58 +4 + 55 = 59 +4 + 56 = 60 +4 + 57 = 61 +4 + 58 = 62 +4 + 59 = 63 +4 + 60 = 64 +4 + 61 = 65 +4 + 62 = 66 +4 + 63 = 67 +5 + 0 = 5 +5 + 1 = 6 +5 + 2 = 7 +5 + 3 = 8 +5 + 4 = 9 +5 + 5 = 10 +5 + 6 = 11 +5 + 7 = 12 +5 + 8 = 13 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89 +60 + 30 = 90 +60 + 31 = 91 +60 + 32 = 92 +60 + 33 = 93 +60 + 34 = 94 +60 + 35 = 95 +60 + 36 = 96 +60 + 37 = 97 +60 + 38 = 98 +60 + 39 = 99 +60 + 40 = 100 +60 + 41 = 101 +60 + 42 = 102 +60 + 43 = 103 +60 + 44 = 104 +60 + 45 = 105 +60 + 46 = 106 +60 + 47 = 107 +60 + 48 = 108 +60 + 49 = 109 +60 + 50 = 110 +60 + 51 = 111 +60 + 52 = 112 +60 + 53 = 113 +60 + 54 = 114 +60 + 55 = 115 +60 + 56 = 116 +60 + 57 = 117 +60 + 58 = 118 +60 + 59 = 119 +60 + 60 = 120 +60 + 61 = 121 +60 + 62 = 122 +60 + 63 = 123 +61 + 0 = 61 +61 + 1 = 62 +61 + 2 = 63 +61 + 3 = 64 +61 + 4 = 65 +61 + 5 = 66 +61 + 6 = 67 +61 + 7 = 68 +61 + 8 = 69 +61 + 9 = 70 +61 + 10 = 71 +61 + 11 = 72 +61 + 12 = 73 +61 + 13 = 74 +61 + 14 = 75 +61 + 15 = 76 +61 + 16 = 77 +61 + 17 = 78 +61 + 18 = 79 +61 + 19 = 80 +61 + 20 = 81 +61 + 21 = 82 +61 + 22 = 83 +61 + 23 = 84 +61 + 24 = 85 +61 + 25 = 86 +61 + 26 = 87 +61 + 27 = 88 +61 + 28 = 89 +61 + 29 = 90 +61 + 30 = 91 +61 + 31 = 92 +61 + 32 = 93 +61 + 33 = 94 +61 + 34 = 95 +61 + 35 = 96 +61 + 36 = 97 +61 + 37 = 98 +61 + 38 = 99 +61 + 39 = 100 +61 + 40 = 101 +61 + 41 = 102 +61 + 42 = 103 +61 + 43 = 104 +61 + 44 = 105 +61 + 45 = 106 +61 + 46 = 107 +61 + 47 = 108 +61 + 48 = 109 +61 + 49 = 110 +61 + 50 = 111 +61 + 51 = 112 +61 + 52 = 113 +61 + 53 = 114 +61 + 54 = 115 +61 + 55 = 116 +61 + 56 = 117 +61 + 57 = 118 +61 + 58 = 119 +61 + 59 = 120 +61 + 60 = 121 +61 + 61 = 122 +61 + 62 = 123 +61 + 63 = 124 +62 + 0 = 62 +62 + 1 = 63 +62 + 2 = 64 +62 + 3 = 65 +62 + 4 = 66 +62 + 5 = 67 +62 + 6 = 68 +62 + 7 = 69 +62 + 8 = 70 +62 + 9 = 71 +62 + 10 = 72 +62 + 11 = 73 +62 + 12 = 74 +62 + 13 = 75 +62 + 14 = 76 +62 + 15 = 77 +62 + 16 = 78 +62 + 17 = 79 +62 + 18 = 80 +62 + 19 = 81 +62 + 20 = 82 +62 + 21 = 83 +62 + 22 = 84 +62 + 23 = 85 +62 + 24 = 86 +62 + 25 = 87 +62 + 26 = 88 +62 + 27 = 89 +62 + 28 = 90 +62 + 29 = 91 +62 + 30 = 92 +62 + 31 = 93 +62 + 32 = 94 +62 + 33 = 95 +62 + 34 = 96 +62 + 35 = 97 +62 + 36 = 98 +62 + 37 = 99 +62 + 38 = 100 +62 + 39 = 101 +62 + 40 = 102 +62 + 41 = 103 +62 + 42 = 104 +62 + 43 = 105 +62 + 44 = 106 +62 + 45 = 107 +62 + 46 = 108 +62 + 47 = 109 +62 + 48 = 110 +62 + 49 = 111 +62 + 50 = 112 +62 + 51 = 113 +62 + 52 = 114 +62 + 53 = 115 +62 + 54 = 116 +62 + 55 = 117 +62 + 56 = 118 +62 + 57 = 119 +62 + 58 = 120 +62 + 59 = 121 +62 + 60 = 122 +62 + 61 = 123 +62 + 62 = 124 +62 + 63 = 125 +63 + 0 = 63 +63 + 1 = 64 +63 + 2 = 65 +63 + 3 = 66 +63 + 4 = 67 +63 + 5 = 68 +63 + 6 = 69 +63 + 7 = 70 +63 + 8 = 71 +63 + 9 = 72 +63 + 10 = 73 +63 + 11 = 74 +63 + 12 = 75 +63 + 13 = 76 +63 + 14 = 77 +63 + 15 = 78 +63 + 16 = 79 +63 + 17 = 80 +63 + 18 = 81 +63 + 19 = 82 +63 + 20 = 83 +63 + 21 = 84 +63 + 22 = 85 +63 + 23 = 86 +63 + 24 = 87 +63 + 25 = 88 +63 + 26 = 89 +63 + 27 = 90 +63 + 28 = 91 +63 + 29 = 92 +63 + 30 = 93 +63 + 31 = 94 +63 + 32 = 95 +63 + 33 = 96 +63 + 34 = 97 +63 + 35 = 98 +63 + 36 = 99 +63 + 37 = 100 +63 + 38 = 101 +63 + 39 = 102 +63 + 40 = 103 +63 + 41 = 104 +63 + 42 = 105 +63 + 43 = 106 +63 + 44 = 107 +63 + 45 = 108 +63 + 46 = 109 +63 + 47 = 110 +63 + 48 = 111 +63 + 49 = 112 +63 + 50 = 113 +63 + 51 = 114 +63 + 52 = 115 +63 + 53 = 116 +63 + 54 = 117 +63 + 55 = 118 +63 + 56 = 119 +63 + 57 = 120 +63 + 58 = 121 +63 + 59 = 122 +63 + 60 = 123 +63 + 61 = 124 +63 + 62 = 125 +63 + 63 = 126 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/int_to_bits.f b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/int_to_bits.f new file mode 100644 index 000000000..6ec30baa4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/int_to_bits.f @@ -0,0 +1,3 @@ +int_to_bits/datawidth.cpp +int_to_bits/stimgen.cpp +int_to_bits/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/main.cpp b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/main.cpp new file mode 100644 index 000000000..c4d9d6a59 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/main.cpp @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + /* */ + /* 7-bit bool = int + int */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /***************************************/ + + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal in1 ("in1"); + sc_signal in2 ("in2"); + sc_signal_bool_vector result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/stimgen.cpp new file mode 100644 index 000000000..44e604d6c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/stimgen.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read() << " + " << in2.read() + << " = " << result.read().to_uint() << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/stimgen.h new file mode 100644 index 000000000..0d2e45deb --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/int_to_bits/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const sc_signal_bool_vector& result; + // Outputs + sc_signal& in1; + sc_signal& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const sc_signal_bool_vector& RESULT, + sc_signal& IN1, + sc_signal& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/promote_add/common.h b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/common.h new file mode 100644 index 000000000..004591939 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/common.h @@ -0,0 +1,48 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<6> bool_vector6; +typedef sc_bv<7> bool_vector7; +typedef sc_signal sc_signal_bool_vector6; +typedef sc_signal sc_signal_bool_vector7; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/data/general/promote_add/datawidth.cpp b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/datawidth.cpp new file mode 100644 index 000000000..dabfea208 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/datawidth.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*******************************************/ + /* Implementation Filename: datawidth.cc */ + /*******************************************/ + +#include "datawidth.h" + +void +datawidth::entry() +{ + bool_vector7 tmp_a; + bool_vector7 tmp_b; + bool_vector7 tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while (ready != 1); + + // COMPUTATION + // tmp_a = ('0', in1.read()); // extend in1 with 0 to make 7-bit + tmp_a = ("0", in1.read()); // extend in1 with 0 to make 7-bit + // tmp_b = ('0', in2.read()); // extend in2 with 0 to make 7-bit + tmp_b = ("0", in2.read()); // extend in2 with 0 to make 7-bit + tmp_result = tmp_a.to_uint() + tmp_b.to_uint(); + + // WRITE OUTPUT + result.write(tmp_result); // result = in1 + in2 + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/promote_add/datawidth.h b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/datawidth.h new file mode 100644 index 000000000..82a1b838d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/datawidth.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + datawidth.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /**************************************/ + /* Interface Filename: datawidth.h */ + /**************************************/ + +#include "common.h" + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + sc_in_clk clk; + + // Inputs + const sc_signal_bool_vector6& in1; + const sc_signal_bool_vector6& in2; + const sc_signal& ready; + // Outputs + sc_signal_bool_vector7& result; + + // Constructor + datawidth (sc_module_name NAME, + sc_clock& TICK, + const sc_signal_bool_vector6& IN1, + const sc_signal_bool_vector6& IN2, + const sc_signal& READY, + sc_signal_bool_vector7& RESULT ) + + : + in1 (IN1), + in2 (IN2), + ready (READY), + result (RESULT) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/promote_add/golden/promote_add.log b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/golden/promote_add.log new file mode 100644 index 000000000..b168b0482 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/golden/promote_add.log @@ -0,0 +1,4099 @@ +SystemC Simulation +0 + 0 = 0 +0 + 1 = 1 +0 + 2 = 2 +0 + 3 = 3 +0 + 4 = 4 +0 + 5 = 5 +0 + 6 = 6 +0 + 7 = 7 +0 + 8 = 8 +0 + 9 = 9 +0 + 10 = 10 +0 + 11 = 11 +0 + 12 = 12 +0 + 13 = 13 +0 + 14 = 14 +0 + 15 = 15 +0 + 16 = 16 +0 + 17 = 17 +0 + 18 = 18 +0 + 19 = 19 +0 + 20 = 20 +0 + 21 = 21 +0 + 22 = 22 +0 + 23 = 23 +0 + 24 = 24 +0 + 25 = 25 +0 + 26 = 26 +0 + 27 = 27 +0 + 28 = 28 +0 + 29 = 29 +0 + 30 = 30 +0 + 31 = 31 +0 + 32 = 32 +0 + 33 = 33 +0 + 34 = 34 +0 + 35 = 35 +0 + 36 = 36 +0 + 37 = 37 +0 + 38 = 38 +0 + 39 = 39 +0 + 40 = 40 +0 + 41 = 41 +0 + 42 = 42 +0 + 43 = 43 +0 + 44 = 44 +0 + 45 = 45 +0 + 46 = 46 +0 + 47 = 47 +0 + 48 = 48 +0 + 49 = 49 +0 + 50 = 50 +0 + 51 = 51 +0 + 52 = 52 +0 + 53 = 53 +0 + 54 = 54 +0 + 55 = 55 +0 + 56 = 56 +0 + 57 = 57 +0 + 58 = 58 +0 + 59 = 59 +0 + 60 = 60 +0 + 61 = 61 +0 + 62 = 62 +0 + 63 = 63 +1 + 0 = 1 +1 + 1 = 2 +1 + 2 = 3 +1 + 3 = 4 +1 + 4 = 5 +1 + 5 = 6 +1 + 6 = 7 +1 + 7 = 8 +1 + 8 = 9 +1 + 9 = 10 +1 + 10 = 11 +1 + 11 = 12 +1 + 12 = 13 +1 + 13 = 14 +1 + 14 = 15 +1 + 15 = 16 +1 + 16 = 17 +1 + 17 = 18 +1 + 18 = 19 +1 + 19 = 20 +1 + 20 = 21 +1 + 21 = 22 +1 + 22 = 23 +1 + 23 = 24 +1 + 24 = 25 +1 + 25 = 26 +1 + 26 = 27 +1 + 27 = 28 +1 + 28 = 29 +1 + 29 = 30 +1 + 30 = 31 +1 + 31 = 32 +1 + 32 = 33 +1 + 33 = 34 +1 + 34 = 35 +1 + 35 = 36 +1 + 36 = 37 +1 + 37 = 38 +1 + 38 = 39 +1 + 39 = 40 +1 + 40 = 41 +1 + 41 = 42 +1 + 42 = 43 +1 + 43 = 44 +1 + 44 = 45 +1 + 45 = 46 +1 + 46 = 47 +1 + 47 = 48 +1 + 48 = 49 +1 + 49 = 50 +1 + 50 = 51 +1 + 51 = 52 +1 + 52 = 53 +1 + 53 = 54 +1 + 54 = 55 +1 + 55 = 56 +1 + 56 = 57 +1 + 57 = 58 +1 + 58 = 59 +1 + 59 = 60 +1 + 60 = 61 +1 + 61 = 62 +1 + 62 = 63 +1 + 63 = 64 +2 + 0 = 2 +2 + 1 = 3 +2 + 2 = 4 +2 + 3 = 5 +2 + 4 = 6 +2 + 5 = 7 +2 + 6 = 8 +2 + 7 = 9 +2 + 8 = 10 +2 + 9 = 11 +2 + 10 = 12 +2 + 11 = 13 +2 + 12 = 14 +2 + 13 = 15 +2 + 14 = 16 +2 + 15 = 17 +2 + 16 = 18 +2 + 17 = 19 +2 + 18 = 20 +2 + 19 = 21 +2 + 20 = 22 +2 + 21 = 23 +2 + 22 = 24 +2 + 23 = 25 +2 + 24 = 26 +2 + 25 = 27 +2 + 26 = 28 +2 + 27 = 29 +2 + 28 = 30 +2 + 29 = 31 +2 + 30 = 32 +2 + 31 = 33 +2 + 32 = 34 +2 + 33 = 35 +2 + 34 = 36 +2 + 35 = 37 +2 + 36 = 38 +2 + 37 = 39 +2 + 38 = 40 +2 + 39 = 41 +2 + 40 = 42 +2 + 41 = 43 +2 + 42 = 44 +2 + 43 = 45 +2 + 44 = 46 +2 + 45 = 47 +2 + 46 = 48 +2 + 47 = 49 +2 + 48 = 50 +2 + 49 = 51 +2 + 50 = 52 +2 + 51 = 53 +2 + 52 = 54 +2 + 53 = 55 +2 + 54 = 56 +2 + 55 = 57 +2 + 56 = 58 +2 + 57 = 59 +2 + 58 = 60 +2 + 59 = 61 +2 + 60 = 62 +2 + 61 = 63 +2 + 62 = 64 +2 + 63 = 65 +3 + 0 = 3 +3 + 1 = 4 +3 + 2 = 5 +3 + 3 = 6 +3 + 4 = 7 +3 + 5 = 8 +3 + 6 = 9 +3 + 7 = 10 +3 + 8 = 11 +3 + 9 = 12 +3 + 10 = 13 +3 + 11 = 14 +3 + 12 = 15 +3 + 13 = 16 +3 + 14 = 17 +3 + 15 = 18 +3 + 16 = 19 +3 + 17 = 20 +3 + 18 = 21 +3 + 19 = 22 +3 + 20 = 23 +3 + 21 = 24 +3 + 22 = 25 +3 + 23 = 26 +3 + 24 = 27 +3 + 25 = 28 +3 + 26 = 29 +3 + 27 = 30 +3 + 28 = 31 +3 + 29 = 32 +3 + 30 = 33 +3 + 31 = 34 +3 + 32 = 35 +3 + 33 = 36 +3 + 34 = 37 +3 + 35 = 38 +3 + 36 = 39 +3 + 37 = 40 +3 + 38 = 41 +3 + 39 = 42 +3 + 40 = 43 +3 + 41 = 44 +3 + 42 = 45 +3 + 43 = 46 +3 + 44 = 47 +3 + 45 = 48 +3 + 46 = 49 +3 + 47 = 50 +3 + 48 = 51 +3 + 49 = 52 +3 + 50 = 53 +3 + 51 = 54 +3 + 52 = 55 +3 + 53 = 56 +3 + 54 = 57 +3 + 55 = 58 +3 + 56 = 59 +3 + 57 = 60 +3 + 58 = 61 +3 + 59 = 62 +3 + 60 = 63 +3 + 61 = 64 +3 + 62 = 65 +3 + 63 = 66 +4 + 0 = 4 +4 + 1 = 5 +4 + 2 = 6 +4 + 3 = 7 +4 + 4 = 8 +4 + 5 = 9 +4 + 6 = 10 +4 + 7 = 11 +4 + 8 = 12 +4 + 9 = 13 +4 + 10 = 14 +4 + 11 = 15 +4 + 12 = 16 +4 + 13 = 17 +4 + 14 = 18 +4 + 15 = 19 +4 + 16 = 20 +4 + 17 = 21 +4 + 18 = 22 +4 + 19 = 23 +4 + 20 = 24 +4 + 21 = 25 +4 + 22 = 26 +4 + 23 = 27 +4 + 24 = 28 +4 + 25 = 29 +4 + 26 = 30 +4 + 27 = 31 +4 + 28 = 32 +4 + 29 = 33 +4 + 30 = 34 +4 + 31 = 35 +4 + 32 = 36 +4 + 33 = 37 +4 + 34 = 38 +4 + 35 = 39 +4 + 36 = 40 +4 + 37 = 41 +4 + 38 = 42 +4 + 39 = 43 +4 + 40 = 44 +4 + 41 = 45 +4 + 42 = 46 +4 + 43 = 47 +4 + 44 = 48 +4 + 45 = 49 +4 + 46 = 50 +4 + 47 = 51 +4 + 48 = 52 +4 + 49 = 53 +4 + 50 = 54 +4 + 51 = 55 +4 + 52 = 56 +4 + 53 = 57 +4 + 54 = 58 +4 + 55 = 59 +4 + 56 = 60 +4 + 57 = 61 +4 + 58 = 62 +4 + 59 = 63 +4 + 60 = 64 +4 + 61 = 65 +4 + 62 = 66 +4 + 63 = 67 +5 + 0 = 5 +5 + 1 = 6 +5 + 2 = 7 +5 + 3 = 8 +5 + 4 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25 = 85 +60 + 26 = 86 +60 + 27 = 87 +60 + 28 = 88 +60 + 29 = 89 +60 + 30 = 90 +60 + 31 = 91 +60 + 32 = 92 +60 + 33 = 93 +60 + 34 = 94 +60 + 35 = 95 +60 + 36 = 96 +60 + 37 = 97 +60 + 38 = 98 +60 + 39 = 99 +60 + 40 = 100 +60 + 41 = 101 +60 + 42 = 102 +60 + 43 = 103 +60 + 44 = 104 +60 + 45 = 105 +60 + 46 = 106 +60 + 47 = 107 +60 + 48 = 108 +60 + 49 = 109 +60 + 50 = 110 +60 + 51 = 111 +60 + 52 = 112 +60 + 53 = 113 +60 + 54 = 114 +60 + 55 = 115 +60 + 56 = 116 +60 + 57 = 117 +60 + 58 = 118 +60 + 59 = 119 +60 + 60 = 120 +60 + 61 = 121 +60 + 62 = 122 +60 + 63 = 123 +61 + 0 = 61 +61 + 1 = 62 +61 + 2 = 63 +61 + 3 = 64 +61 + 4 = 65 +61 + 5 = 66 +61 + 6 = 67 +61 + 7 = 68 +61 + 8 = 69 +61 + 9 = 70 +61 + 10 = 71 +61 + 11 = 72 +61 + 12 = 73 +61 + 13 = 74 +61 + 14 = 75 +61 + 15 = 76 +61 + 16 = 77 +61 + 17 = 78 +61 + 18 = 79 +61 + 19 = 80 +61 + 20 = 81 +61 + 21 = 82 +61 + 22 = 83 +61 + 23 = 84 +61 + 24 = 85 +61 + 25 = 86 +61 + 26 = 87 +61 + 27 = 88 +61 + 28 = 89 +61 + 29 = 90 +61 + 30 = 91 +61 + 31 = 92 +61 + 32 = 93 +61 + 33 = 94 +61 + 34 = 95 +61 + 35 = 96 +61 + 36 = 97 +61 + 37 = 98 +61 + 38 = 99 +61 + 39 = 100 +61 + 40 = 101 +61 + 41 = 102 +61 + 42 = 103 +61 + 43 = 104 +61 + 44 = 105 +61 + 45 = 106 +61 + 46 = 107 +61 + 47 = 108 +61 + 48 = 109 +61 + 49 = 110 +61 + 50 = 111 +61 + 51 = 112 +61 + 52 = 113 +61 + 53 = 114 +61 + 54 = 115 +61 + 55 = 116 +61 + 56 = 117 +61 + 57 = 118 +61 + 58 = 119 +61 + 59 = 120 +61 + 60 = 121 +61 + 61 = 122 +61 + 62 = 123 +61 + 63 = 124 +62 + 0 = 62 +62 + 1 = 63 +62 + 2 = 64 +62 + 3 = 65 +62 + 4 = 66 +62 + 5 = 67 +62 + 6 = 68 +62 + 7 = 69 +62 + 8 = 70 +62 + 9 = 71 +62 + 10 = 72 +62 + 11 = 73 +62 + 12 = 74 +62 + 13 = 75 +62 + 14 = 76 +62 + 15 = 77 +62 + 16 = 78 +62 + 17 = 79 +62 + 18 = 80 +62 + 19 = 81 +62 + 20 = 82 +62 + 21 = 83 +62 + 22 = 84 +62 + 23 = 85 +62 + 24 = 86 +62 + 25 = 87 +62 + 26 = 88 +62 + 27 = 89 +62 + 28 = 90 +62 + 29 = 91 +62 + 30 = 92 +62 + 31 = 93 +62 + 32 = 94 +62 + 33 = 95 +62 + 34 = 96 +62 + 35 = 97 +62 + 36 = 98 +62 + 37 = 99 +62 + 38 = 100 +62 + 39 = 101 +62 + 40 = 102 +62 + 41 = 103 +62 + 42 = 104 +62 + 43 = 105 +62 + 44 = 106 +62 + 45 = 107 +62 + 46 = 108 +62 + 47 = 109 +62 + 48 = 110 +62 + 49 = 111 +62 + 50 = 112 +62 + 51 = 113 +62 + 52 = 114 +62 + 53 = 115 +62 + 54 = 116 +62 + 55 = 117 +62 + 56 = 118 +62 + 57 = 119 +62 + 58 = 120 +62 + 59 = 121 +62 + 60 = 122 +62 + 61 = 123 +62 + 62 = 124 +62 + 63 = 125 +63 + 0 = 63 +63 + 1 = 64 +63 + 2 = 65 +63 + 3 = 66 +63 + 4 = 67 +63 + 5 = 68 +63 + 6 = 69 +63 + 7 = 70 +63 + 8 = 71 +63 + 9 = 72 +63 + 10 = 73 +63 + 11 = 74 +63 + 12 = 75 +63 + 13 = 76 +63 + 14 = 77 +63 + 15 = 78 +63 + 16 = 79 +63 + 17 = 80 +63 + 18 = 81 +63 + 19 = 82 +63 + 20 = 83 +63 + 21 = 84 +63 + 22 = 85 +63 + 23 = 86 +63 + 24 = 87 +63 + 25 = 88 +63 + 26 = 89 +63 + 27 = 90 +63 + 28 = 91 +63 + 29 = 92 +63 + 30 = 93 +63 + 31 = 94 +63 + 32 = 95 +63 + 33 = 96 +63 + 34 = 97 +63 + 35 = 98 +63 + 36 = 99 +63 + 37 = 100 +63 + 38 = 101 +63 + 39 = 102 +63 + 40 = 103 +63 + 41 = 104 +63 + 42 = 105 +63 + 43 = 106 +63 + 44 = 107 +63 + 45 = 108 +63 + 46 = 109 +63 + 47 = 110 +63 + 48 = 111 +63 + 49 = 112 +63 + 50 = 113 +63 + 51 = 114 +63 + 52 = 115 +63 + 53 = 116 +63 + 54 = 117 +63 + 55 = 118 +63 + 56 = 119 +63 + 57 = 120 +63 + 58 = 121 +63 + 59 = 122 +63 + 60 = 123 +63 + 61 = 124 +63 + 62 = 125 +63 + 63 = 126 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/unit/data/general/promote_add/main.cpp b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/main.cpp new file mode 100644 index 000000000..30858393b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/main.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /******************************************/ + /* Main Filename: main.cc */ + /******************************************/ + /* */ + /* 7-bit bool = 6-bit bool + 6-bit bool */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /* This example explicitly promotes all */ + /* variables in the addition to the size */ + /* of the largest variable (7-bits). */ + /* */ + /* This matches Verilog semantics. */ + /* */ + /******************************************/ + + +#include "datawidth.h" +#include "stimgen.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + sc_signal_bool_vector6 in1 ("in1"); + sc_signal_bool_vector6 in2 ("in2"); + sc_signal_bool_vector7 result ("result"); + sc_signal ready ("ready"); + +// Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + datawidth D1 ("D1", clk, in1, in2, ready, result); + + stimgen T1 ("T1", clk, result, in1, in2, ready); + +// Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/promote_add/promote_add.f b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/promote_add.f new file mode 100644 index 000000000..b112684ee --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/promote_add.f @@ -0,0 +1,3 @@ +promote_add/datawidth.cpp +promote_add/stimgen.cpp +promote_add/main.cpp diff --git a/src/systemc/tests/systemc/misc/unit/data/general/promote_add/stimgen.cpp b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/stimgen.cpp new file mode 100644 index 000000000..6c8c0a149 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/stimgen.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: stimgen.cc */ + /*****************************************/ + +#include "stimgen.h" + +void +stimgen::entry() +{ + int i; + int j; + + ready.write(0); + + for (i = 0; i < 64; i++) { // integer in1 (6 bits of data) + for (j = 0; j < 64; j++) { // integer in2 (6 bits of data) + in1.write(i); + in2.write(j); + ready.write(1); + wait(); + + ready.write(0); + wait(); + + cout << in1.read().to_uint() << " + " << in2.read().to_uint() + << " = " << result.read().to_uint() << endl; + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/promote_add/stimgen.h b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/stimgen.h new file mode 100644 index 000000000..438f4df98 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/promote_add/stimgen.h @@ -0,0 +1,77 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /************************************/ + /* Interface Filename: stimgen.h */ + /************************************/ + +#include "common.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // Inputs + const sc_signal_bool_vector7& result; + // Outputs + sc_signal_bool_vector6& in1; + sc_signal_bool_vector6& in2; + sc_signal& ready; + + // Constructor + stimgen (sc_module_name NAME, + sc_clock& TICK, + const sc_signal_bool_vector7& RESULT, + sc_signal_bool_vector6& IN1, + sc_signal_bool_vector6& IN2, + sc_signal& READY ) + + : + result (RESULT), + in1 (IN1), + in2 (IN2), + ready (READY) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/data/general/shift/test1/golden/test1.log b/src/systemc/tests/systemc/misc/unit/data/general/shift/test1/golden/test1.log new file mode 100644 index 000000000..1c1b9a33d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/shift/test1/golden/test1.log @@ -0,0 +1,45 @@ +SystemC Simulation +-34 +width = 7 +value = -34 +bits = 101 1110 +-34 +width = 7 +value = -34 +bits = 101 1110 +-17 +width = 7 +value = -17 +bits = 110 1111 +-9 +width = 7 +value = -9 +bits = 111 0111 +-5 +width = 7 +value = -5 +bits = 111 1011 +-3 +width = 7 +value = -3 +bits = 111 1101 +-17 +width = 7 +value = -17 +bits = 110 1111 +-9 +width = 7 +value = -9 +bits = 111 0111 +-5 +width = 7 +value = -5 +bits = 111 1011 +-3 +width = 7 +value = -3 +bits = 111 1101 +-2 +width = 7 +value = -2 +bits = 111 1110 diff --git a/src/systemc/tests/systemc/misc/unit/data/general/shift/test1/test1.cpp b/src/systemc/tests/systemc/misc/unit/data/general/shift/test1/test1.cpp new file mode 100644 index 000000000..d380f90ff --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/shift/test1/test1.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main(int argc, char* argv[]) +{ + sc_signed x(7); + + x = -34; + cout << x << endl; + x.dump(cout); + for (int i = 0; i < 5; ++i) { + sc_signed y(7); + y = x >> i; + cout << y << endl; + y.dump(cout); + } + for (int i = 0; i < 5; ++i) { + x = x >> 1; + cout << x << endl; + x.dump(cout); + } + sc_start(0, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/std_to_bool/golden/std_to_bool.log b/src/systemc/tests/systemc/misc/unit/data/general/std_to_bool/golden/std_to_bool.log new file mode 100644 index 000000000..1c5efd6e2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/std_to_bool/golden/std_to_bool.log @@ -0,0 +1,5 @@ +SystemC Simulation +100 + +Warning: (W207) sc_bv cannot contain values X and Z +In file: diff --git a/src/systemc/tests/systemc/misc/unit/data/general/std_to_bool/std_to_bool.cpp b/src/systemc/tests/systemc/misc/unit/data/general/std_to_bool/std_to_bool.cpp new file mode 100644 index 000000000..94783c09b --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/std_to_bool/std_to_bool.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + std_to_bool.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for bool_vector type simulation */ + +#include "systemc.h" + +int sc_main(int ac, char *av[]) +{ + sc_bv<3> a; + sc_lv<3> b; + + b[2] = '1'; + b[1] = '0'; + b[0] = '0'; + + a = b; + cout << a << endl; + // the following line causes error + b[1] = 'Z'; + a = b; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/std_ulogic_tilda/golden/std_ulogic_tilda.log b/src/systemc/tests/systemc/misc/unit/data/general/std_ulogic_tilda/golden/std_ulogic_tilda.log new file mode 100644 index 000000000..7108f5cec --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/std_ulogic_tilda/golden/std_ulogic_tilda.log @@ -0,0 +1,7 @@ +SystemC Simulation + + a = 0 (!1) + b = 1 (!0) + c = 0 (~1) + d = 1 (~0) + e = 0 (~1) diff --git a/src/systemc/tests/systemc/misc/unit/data/general/std_ulogic_tilda/std_ulogic_tilda.cpp b/src/systemc/tests/systemc/misc/unit/data/general/std_ulogic_tilda/std_ulogic_tilda.cpp new file mode 100644 index 000000000..de21cb0dd --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/std_ulogic_tilda/std_ulogic_tilda.cpp @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + std_ulogic_tilda.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int ac, char *av[]) +{ + + sc_logic value1 = SC_LOGIC_1;//'1'; + sc_logic value0 = SC_LOGIC_0;//'0'; + + sc_logic a; + sc_logic b; + sc_logic c; + sc_logic d; + sc_logic e; + + a = !value1.to_bool(); + b = !value0.to_bool(); + c = ~value1; + d = ~value0; + e = ~sc_logic('1'); + + cout << "\n a = " << a << " (!1)" + << "\n b = " << b << " (!0)" + << "\n c = " << c << " (~1)" + << "\n d = " << d << " (~0)" + << "\n e = " << e << " (~1)" + << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab1/golden/stab1.log b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab1/golden/stab1.log new file mode 100644 index 000000000..36ff26d57 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab1/golden/stab1.log @@ -0,0 +1,1407 @@ +SystemC Simulation +0011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +0011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +0110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010 +0110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010 +4772331671447451864458176773180 +2089918658842683165477870926064461117931877987786519590800393365932343411570179165664204 +k = 0 +i = 0 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 1 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 2 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 3 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 4 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 5 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 7 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 8 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 10 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 11 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 12 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 13 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 14 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 15 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 16 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 17 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 19 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 20 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 21 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 22 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 23 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 24 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 25 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 26 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 28 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 29 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 30 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 31 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 32 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 33 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 34 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 35 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 36 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 37 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 38 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 39 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 40 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 41 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 42 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 43 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 44 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 45 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 46 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 47 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 48 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 49 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 50 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 51 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 52 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 53 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 54 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 55 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 56 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 57 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 58 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 59 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 60 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 61 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 62 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 63 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 64 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 65 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 67 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 68 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 70 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 71 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 72 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 73 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 74 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 75 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 76 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 77 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 78 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 79 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 80 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 81 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 82 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 83 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 84 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 85 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 86 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 87 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 88 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 89 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 90 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 91 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 92 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 93 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 94 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 95 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 96 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 97 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 98 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 99 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +k = 1 +k = 2 +k = 3 +k = 4 +k = 5 +k = 6 +k = 7 +k = 8 +k = 9 +k = 10 +k = 11 +k = 12 +k = 13 +k = 14 +k = 15 +k = 16 +k = 17 +k = 18 +k = 19 +k = 20 +k = 21 +k = 22 +k = 23 +k = 24 +k = 25 +k = 26 +k = 27 +k = 28 +k = 29 +k = 30 +k = 31 +k = 32 +k = 33 +k = 34 +k = 35 +k = 36 +k = 37 +k = 38 +k = 39 +k = 40 +k = 41 +k = 42 +k = 43 +k = 44 +k = 45 +k = 46 +k = 47 +k = 48 +k = 49 +k = 50 +k = 51 +k = 52 +k = 53 +k = 54 +k = 55 +k = 56 +k = 57 +k = 58 +k = 59 +k = 60 +k = 61 +k = 62 +k = 63 +k = 64 +k = 65 +k = 66 +k = 67 +k = 68 +k = 69 +k = 70 +k = 71 +k = 72 +k = 73 +k = 74 +k = 75 +k = 76 +k = 77 +k = 78 +k = 79 +k = 80 +k = 81 +k = 82 +k = 83 +k = 84 +k = 85 +k = 86 +k = 87 +k = 88 +k = 89 +k = 90 +k = 91 +k = 92 +k = 93 +k = 94 +k = 95 +k = 96 +k = 97 +k = 98 +k = 99 diff --git a/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab1/stab1.cpp b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab1/stab1.cpp new file mode 100644 index 000000000..9894182f7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab1/stab1.cpp @@ -0,0 +1,148 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stab1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int argc, char* argv[] ) +{ + int i; + sc_bv<325> x; + sc_lv<142> y; + + sc_signed z(103); + sc_unsigned w(291); + + for (i = 0; i < 325; ++i) { + x[i] = ((i & 1) ^ ((i >> 1) & 1)); + }; + for (i = 0; i < 325; ++i) { + sc_assert( x[i] == ((i & 1) ^ ((i >> 1) & 1)) ); + }; + for (i = 0; i < 142; ++i) { + y[i] = ((i & 1) ^ ((i >> 2) & 1)); + } + for (i = 0; i < 142; ++i) { + // sc_assert( y[i] == char((i & 1) ^ ((i >> 2) & 1)) ); + sc_assert( y[i] == ((i & 1) ^ ((i >> 2) & 1)) ); + } + for (i = 0; i < 103; ++i) { + z[i] = (((i >> 2) & 1) ^ ((i >> 1) & 1)); + } + for (i = 0; i < 103; ++i) { + sc_assert( (bool) z[i] == (((i >> 2) & 1) ^ ((i >> 1) & 1)) ); + } + for (i = 0; i < 291; ++i) { + w[i] = (((i >> 3) & 1) ^ ((i >> 1) & 1)); + } + for (i = 0; i < 291; ++i) { + sc_assert( (bool) w[i] == (((i >> 3) & 1) ^ ((i >> 1) & 1)) ); + } + + cout << x << endl; + cout << x.to_string() << endl; + cout << y << endl; + cout << y.to_string() << endl; + cout << z << endl; + cout << w << endl; + + for (int k = 0; k < 100; ++k) { + cerr << "k = " << k << endl; + + for (i = 0; i < 100; ++i) { + int j; + + if (k == 0) { + cout << "i = " << i << endl; + cout << x.range(i + 224, i) << endl; + cout << x.range(i + 224, i).to_string() << endl; + cout << y.range(i + 41, i) << endl; + cout << y.range(i + 41, i).to_string() << endl; + cout << sc_signed(z.range(i + 2, i)) << endl; + cout << sc_unsigned(w.range(i + 190, i)) << endl; + cout << x.range(i, i + 224) << endl; + cout << x.range(i, i + 224).to_string() << endl; + cout << y.range(i, i + 41) << endl; + cout << y.range(i, i + 41).to_string() << endl; + cout << sc_signed(z.range(i, i + 2)) << endl; + cout << sc_unsigned(w.range(i, i + 190)) << endl; + } else { + (void) x.range(i + 224, i); + (void) y.range(i + 41, i); + (void) sc_signed(z.range(i + 2, i)); + (void) sc_unsigned(w.range(i + 190, i)); + } + + sc_bv<225> foo; + sc_bv<225> foo1; + foo = x.range(i + 224, i); + foo1 = x.range(i, i + 224); + for (j = 0; j < 225; ++j) { + sc_assert( foo[j] == x[i + j] ); + sc_assert( foo1[224 - j] == x[i + j] ); + } + + sc_lv<42> bar; + sc_lv<42> bar1; + bar = y.range(i + 41, i); + bar1 = y.range(i, i + 41); + for (j = 0; j < 42; ++j) { + sc_assert( bar[j] == y[i + j] ); + sc_assert( bar1[41 - j] == y[i + j] ); + } + + sc_signed baz(3); + sc_signed baz1(3); + baz = z.range(i + 2, i); + baz1 = z.range(i, i + 2); + for (j = 0; j < 3; ++j) { + sc_assert( baz[j] == z[i + j] ); + sc_assert( baz1[2 - j] == z[i + j] ); + } + + sc_unsigned quux(191); + sc_unsigned quux1(191); + quux = w.range(i + 190, i); + quux1 = w.range(i, i + 190); + for (j = 0; j < 191; ++j) { + sc_assert( quux[j] == w[i + j] ); + sc_assert( quux1[190 - j] == w[i + j] ); + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab2/golden/stab2.log b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab2/golden/stab2.log new file mode 100644 index 000000000..c9fa8e878 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab2/golden/stab2.log @@ -0,0 +1,1317 @@ +SystemC Simulation +0011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +0011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +0110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010 +0110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010 +4772331671447451864458176773180 +2089918658842683165477870926064461117931877987786519590800393365932343411570179165664204 +k = 0 +i = 0 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 1 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 2 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 3 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 4 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 5 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 6 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 7 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 8 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 9 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 10 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 11 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 12 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 13 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 14 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 15 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 16 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 17 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 18 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 19 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 20 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 21 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 22 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 23 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 24 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 25 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 26 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 27 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 28 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 29 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 30 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 31 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 32 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 33 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 34 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 35 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 36 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 37 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 38 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 39 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 40 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 41 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 42 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 43 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 44 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 46 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 48 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 49 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 51 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 52 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 54 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 55 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 56 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 57 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 58 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 60 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 61 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 63 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 64 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 65 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 66 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 67 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 68 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 69 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 70 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 71 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 72 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 73 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 74 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 75 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 76 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 77 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 78 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 79 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 80 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 81 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 82 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 83 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +i = 84 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +i = 85 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +i = 86 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +i = 87 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +i = 88 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +i = 89 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +i = 90 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +i = 91 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +i = 92 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +i = 93 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +i = 94 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +i = 95 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +i = 96 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +i = 97 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +i = 98 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +i = 99 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +k = 1 +k = 2 +k = 3 +k = 4 +k = 5 +k = 6 +k = 7 +k = 8 +k = 9 diff --git a/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab2/stab2.cpp b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab2/stab2.cpp new file mode 100644 index 000000000..487410140 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab2/stab2.cpp @@ -0,0 +1,172 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stab2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int argc, char* argv[] ) +{ + int i; + sc_bv<325> x; + sc_lv<142> y; + + sc_signed z(103); + sc_unsigned w(291); + + for (i = 0; i < 325; ++i) { + x[i] = ((i & 1) ^ ((i >> 1) & 1)); + }; + for (i = 0; i < 325; ++i) { + sc_assert( x[i] == ((i & 1) ^ ((i >> 1) & 1)) ); + }; + for (i = 0; i < 142; ++i) { + y[i] = ((i & 1) ^ ((i >> 2) & 1)); + } + for (i = 0; i < 142; ++i) { + // sc_assert( y[i] == char((i & 1) ^ ((i >> 2) & 1)) ); + sc_assert( y[i] == ((i & 1) ^ ((i >> 2) & 1)) ); + } + for (i = 0; i < 103; ++i) { + z[i] = (((i >> 2) & 1) ^ ((i >> 1) & 1)); + } + for (i = 0; i < 103; ++i) { + sc_assert( (bool) z[i] == (((i >> 2) & 1) ^ ((i >> 1) & 1)) ); + } + for (i = 0; i < 291; ++i) { + w[i] = (((i >> 3) & 1) ^ ((i >> 1) & 1)); + } + for (i = 0; i < 291; ++i) { + sc_assert( (bool) w[i] == (((i >> 3) & 1) ^ ((i >> 1) & 1)) ); + } + + cout << x << endl; + cout << x.to_string() << endl; + cout << y << endl; + cout << y.to_string() << endl; + cout << z << endl; + cout << w << endl; + + for (int k = 0; k < 10; ++k) { + cerr << "k = " << k << endl; + + for (i = 0; i < 100; ++i) { + int j; + + if (k == 0) { + cout << "i = " << i << endl; + cout << x.range(i + 224, i) << endl; + cout << x.range(i + 224, i).to_string() << endl; + cout << y.range(i + 41, i) << endl; + cout << y.range(i + 41, i).to_string() << endl; + cout << sc_signed(z.range(i + 2, i)) << endl; + cout << sc_unsigned(w.range(i + 190, i)) << endl; + cout << x.range(i, i + 224) << endl; + cout << x.range(i, i + 224).to_string() << endl; + cout << y.range(i, i + 41) << endl; + cout << y.range(i, i + 41).to_string() << endl; + cout << sc_signed(z.range(i, i + 2)) << endl; + cout << sc_unsigned(w.range(i, i + 190)) << endl; + } else { + (void) x.range(i + 224, i); + (void) y.range(i + 41, i); + (void) sc_signed(z.range(i + 2, i)); + (void) sc_unsigned(w.range(i + 190, i)); + } + + sc_bv<225> foo; + sc_bv<225> foo1; + sc_bv<450> foo2; + foo = x.range(i + 224, i); + foo1 = x.range(i, i + 224); + foo2 = (foo1, foo); + for (j = 0; j < 225; ++j) { + sc_assert( foo[j] == x[i + j] ); + sc_assert( foo1[224 - j] == x[i + j] ); + sc_assert( foo2.range(449,225) == foo1 ); + sc_assert( foo2.range(224,0) == foo ); + } + // (foo, foo1) = (foo1, foo); + (foo, foo1) = foo2; + for (j = 0; j < 225; ++j) { + sc_assert( foo1[j] == x[i + j] ); + sc_assert( foo[224 - j] == x[i + j] ); + sc_assert( foo2.range(449,225) == foo ); + sc_assert( foo2.range(224,0) == foo1 ); + } + + sc_lv<42> bar; + sc_lv<42> bar1; + sc_lv<84> bar2; + bar = y.range(i + 41, i); + bar1 = y.range(i, i + 41); + bar2 = (bar1, bar); + for (j = 0; j < 42; ++j) { + sc_assert( bar[j] == y[i + j] ); + sc_assert( bar1[41 - j] == y[i + j] ); + sc_assert( bar2.range(83,42) == bar1 ); + sc_assert( bar2.range(41,0) == bar ); + } + // (bar, bar1) = (bar1, bar); + (bar, bar1) = bar2; + for (j = 0; j < 42; ++j) { + sc_assert( bar1[j] == y[i + j] ); + sc_assert( bar[41 - j] == y[i + j] ); + sc_assert( bar2.range(83,42) == bar ); + sc_assert( bar2.range(41,0) == bar1 ); + } + + sc_signed baz(3); + sc_signed baz1(3); + baz = z.range(i + 2, i); + baz1 = z.range(i, i + 2); + for (j = 0; j < 3; ++j) { + sc_assert( baz[j] == z[i + j] ); + sc_assert( baz1[2 - j] == z[i + j] ); + } + + sc_unsigned quux(191); + sc_unsigned quux1(191); + quux = w.range(i + 190, i); + quux1 = w.range(i, i + 190); + for (j = 0; j < 191; ++j) { + sc_assert( quux[j] == w[i + j] ); + sc_assert( quux1[190 - j] == w[i + j] ); + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab3/golden/stab3.log b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab3/golden/stab3.log new file mode 100644 index 000000000..663602c05 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab3/golden/stab3.log @@ -0,0 +1,1717 @@ +SystemC Simulation +0011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +0011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +0110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010 +0110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010010110100101101001011010 +4772331671447451864458176773180 +2089918658842683165477870926064461117931877987786519590800393365932343411570179165664204 +k = 0 +i = 0 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +00110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011000111 +11110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +10010110100101101001011010010110100101101000111 +11110010110100101101001011010010110100101101001 +i = 1 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +10011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100111 +11110110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +01001011010010110100101101001011010010110100111 +11110101101001011010010110100101101001011010010 +i = 2 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +11001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100100111 +11110100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +10100101101001011010010110100101101001011000111 +11110011010010110100101101001011010010110100101 +i = 3 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +01100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110000111 +11110001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +11010010110100101101001011010010110100101100111 +11110110100101101001011010010110100101101001011 +i = 4 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 +00110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011000111 +11110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +01101001011010010110100101101001011010010100111 +11110101001011010010110100101101001011010010110 +i = 5 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +2393602996373131186209756278110316376568213360145818608030 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1489895742640418391416276866987033662965928724172397296835 +10011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100111 +11110110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +10110100101101001011010010110100101101001000111 +11110010010110100101101001011010010110100101101 +i = 6 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +11001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100100111 +11110100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +01011010010110100101101001011010010110100100111 +11110100101101001011010010110100101101001011010 +i = 7 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +01100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110000111 +11110001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +00101101001011010010110100101101001011010000111 +11110001011010010110100101101001011010010110100 +i = 8 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +00110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011000111 +11110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +10010110100101101001011010010110100101101000111 +11110010110100101101001011010010110100101101001 +i = 9 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +10011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100111 +11110110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +01001011010010110100101101001011010010110100111 +11110101101001011010010110100101101001011010010 +i = 10 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +11001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100100111 +11110100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +10100101101001011010010110100101101001011000111 +11110011010010110100101101001011010010110100101 +i = 11 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +01100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110000111 +11110001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +11010010110100101101001011010010110100101100111 +11110110100101101001011010010110100101101001011 +i = 12 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +00110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011000111 +11110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +01101001011010010110100101101001011010010100111 +11110101001011010010110100101101001011010010110 +i = 13 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +10011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100111 +11110110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +10110100101101001011010010110100101101001000111 +11110010010110100101101001011010010110100101101 +i = 14 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 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+110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 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+100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 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+011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 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+001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1648655125052921990501617844616799545085248998059619959612 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +744947871320209195708138433493516831482964362086198648417 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+10011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100111 +11110110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +10110100101101001011010010110100101101001000111 +11110010010110100101101001011010010110100101101 +i = 86 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1196801498186565593104878139055158188284106680072909304015 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +2979791485280836782832553733974067325931857448344794593670 +11001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100100111 +11110100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +01011010010110100101101001011010010110100100111 +11110100101101001011010010110100101101001011010 +i = 87 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +598400749093282796552439069527579094142053340036454652007 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2821032102868333183747212756344301443812537174457571930892 +01100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110000111 +11110001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +00101101001011010010110100101101001011010000111 +11110001011010010110100101101001011010010110100 +i = 88 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1868475808393311589235166890565706151096615531134235954227 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +2503513338043325985576530801084769679573896626683126605337 +00110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011000111 +11110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +10010110100101101001011010010110100101101000111 +11110010110100101101001011010010110100101101001 +i = 89 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +2503513338043325985576530801084769679573896626683126605337 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1868475808393311589235166890565706151096615531134235954227 +10011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100111 +11110110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +01001011010010110100101101001011010010110100111 +11110101101001011010010110100101101001011010010 +i = 90 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +2821032102868333183747212756344301443812537174457571930892 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +598400749093282796552439069527579094142053340036454652007 +11001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100100111 +11110100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +10100101101001011010010110100101101001011000111 +11110011010010110100101101001011010010110100101 +i = 91 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +2979791485280836782832553733974067325931857448344794593670 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1196801498186565593104878139055158188284106680072909304015 +01100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110000111 +11110001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +11010010110100101101001011010010110100101100111 +11110110100101101001011010010110100101101001011 +i = 92 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +3 +1489895742640418391416276866987033662965928724172397296835 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-2 +2393602996373131186209756278110316376568213360145818608030 +00110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011000111 +11110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +01101001011010010110100101101001011010010100111 +11110101001011010010110100101101001011010010110 +i = 93 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +1 +744947871320209195708138433493516831482964362086198648417 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-4 +1648655125052921990501617844616799545085248998059619959612 +10011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100111 +11110110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +10110100101101001011010010110100101101001000111 +11110010010110100101101001011010010110100101101 +i = 94 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +0 +1941749369506774788813016572548675019767071042159107952432 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +0 +158759382412503599085340977629765882119320273887222662777 +11001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100100111 +11110100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +01011010010110100101101001011010010110100100111 +11110100101101001011010010110100101101001011010 +i = 95 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +2540150118600057585365455642076254113909124382195562604440 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001011010010110100101101001011010010110100 +001011010010110100101101001011010010110100 +0 +317518764825007198170681955259531764238640547774445325555 +01100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110000111 +11110001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +00101101001011010010110100101101001011010000111 +11110001011010010110100101101001011010010110100 +i = 96 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +100101101001011010010110100101101001011010 +100101101001011010010110100101101001011010 +-4 +1270075059300028792682727821038127056954562191097781302220 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +010110100101101001011010010110100101101001 +010110100101101001011010010110100101101001 +1 +635037529650014396341363910519063528477281095548890651110 +00110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011000111 +11110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +10010110100101101001011010010110100101101000111 +11110010110100101101001011010010110100101101001 +i = 97 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +010010110100101101001011010010110100101101 +010010110100101101001011010010110100101101 +-2 +635037529650014396341363910519063528477281095548890651110 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101101001011010010110100101101001011010010 +101101001011010010110100101101001011010010 +3 +1270075059300028792682727821038127056954562191097781302220 +10011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100111 +11110110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +01001011010010110100101101001011010010110100111 +11110101101001011010010110100101101001011010010 +i = 98 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001 +101001011010010110100101101001011010010110 +101001011010010110100101101001011010010110 +-1 +317518764825007198170681955259531764238640547774445325555 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +011010010110100101101001011010010110100101 +011010010110100101101001011010010110100101 +-1 +2540150118600057585365455642076254113909124382195562604440 +11001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100100111 +11110100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011 +10100101101001011010010110100101101001011000111 +11110011010010110100101101001011010010110100101 +i = 99 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +158759382412503599085340977629765882119320273887222662777 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +110100101101001011010010110100101101001011 +110100101101001011010010110100101101001011 +-1 +1941749369506774788813016572548675019767071042159107952432 +01100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110000111 +11110001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110011001100110 +11010010110100101101001011010010110100101100111 +11110110100101101001011010010110100101101001011 +k = 1 +k = 2 +k = 3 +k = 4 +k = 5 +k = 6 +k = 7 +k = 8 +k = 9 diff --git a/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab3/stab3.cpp b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab3/stab3.cpp new file mode 100644 index 000000000..bc3afd550 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/subvector/stab3/stab3.cpp @@ -0,0 +1,223 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stab3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int +sc_main( int argc, char* argv[] ) +{ + int i; + sc_bv<325> x; + sc_lv<142> y; + + sc_signed z(103); + sc_unsigned w(291); + + for (i = 0; i < 325; ++i) { + x[i] = ((i & 1) ^ ((i >> 1) & 1)); + }; + for (i = 0; i < 325; ++i) { + sc_assert( x[i] == ((i & 1) ^ ((i >> 1) & 1)) ); + }; + for (i = 0; i < 142; ++i) { + y[i] = ((i & 1) ^ ((i >> 2) & 1)); + } + for (i = 0; i < 142; ++i) { + // sc_assert( y[i] == char((i & 1) ^ ((i >> 2) & 1)) ); + sc_assert( y[i] == ((i & 1) ^ ((i >> 2) & 1)) ); + } + for (i = 0; i < 103; ++i) { + z[i] = (((i >> 2) & 1) ^ ((i >> 1) & 1)); + } + for (i = 0; i < 103; ++i) { + sc_assert( (bool) z[i] == (((i >> 2) & 1) ^ ((i >> 1) & 1)) ); + } + for (i = 0; i < 291; ++i) { + w[i] = (((i >> 3) & 1) ^ ((i >> 1) & 1)); + } + for (i = 0; i < 291; ++i) { + sc_assert( (bool) (w[i] == (((i >> 3) & 1) ^ ((i >> 1) & 1))) ); + } + + cout << x << endl; + cout << x.to_string() << endl; + cout << y << endl; + cout << y.to_string() << endl; + cout << z << endl; + cout << w << endl; + + for (int k = 0; k < 10; ++k) { + cerr << "k = " << k << endl; + + for (i = 0; i < 100; ++i) { + int j; + + if (k == 0) { + cout << "i = " << i << endl; + cout << x.range(i + 224, i) << endl; + cout << x.range(i + 224, i).to_string() << endl; + cout << y.range(i + 41, i) << endl; + cout << y.range(i + 41, i).to_string() << endl; + cout << sc_signed(z.range(i + 2, i)) << endl; + cout << sc_unsigned(w.range(i + 190, i)) << endl; + cout << x.range(i, i + 224) << endl; + cout << x.range(i, i + 224).to_string() << endl; + cout << y.range(i, i + 41) << endl; + cout << y.range(i, i + 41).to_string() << endl; + cout << sc_signed(z.range(i, i + 2)) << endl; + cout << sc_unsigned(w.range(i, i + 190)) << endl; + } else { + (void) x.range(i + 224, i); + (void) y.range(i + 41, i); + (void) sc_signed(z.range(i + 2, i)); + (void) sc_unsigned(w.range(i + 190, i)); + } + + sc_bv<225> foo; + sc_bv<225> foo1; + sc_bv<450> foo2; + foo = x.range(i + 224, i); + foo1 = x.range(i, i + 224); + foo2 = (foo1, foo); + for (j = 0; j < 225; ++j) { + sc_assert( foo[j] == x[i + j] ); + sc_assert( foo1[224 - j] == x[i + j] ); + sc_assert( foo2.range(449,225) == foo1 ); + sc_assert( foo2.range(224,0) == foo ); + } + // (foo, foo1) = (foo1, foo); + (foo, foo1) = foo2; + for (j = 0; j < 225; ++j) { + sc_assert( foo1[j] == x[i + j] ); + sc_assert( foo[224 - j] == x[i + j] ); + sc_assert( foo2.range(449,225) == foo ); + sc_assert( foo2.range(224,0) == foo1 ); + } + + sc_bv<230> foo3; + foo3 = (foo1, "01101"); + sc_assert( foo3.range(4,0) == "01101" ); + foo3.range(3,1) = "011"; + sc_assert( foo3.range(4,0) == "00111" ); + for (j = 0; j < 225; ++j) { + sc_assert(foo3[j + 5] == foo1[j]); + } + if (k == 0) { + cout << foo3 << endl; + } + foo3 = ("10100", foo); + sc_assert( foo3.range(229,225) == "10100" ); + foo3.range(228,226) = "111"; + sc_assert( foo3.range(229,225) == "11110" ); + for (j = 0; j < 225; ++j) { + sc_assert(foo3[j] == foo[j]); + } + if (k == 0) { + cout << foo3 << endl; + } + foo3 = ("110", foo3.range(229,5), "01"); + sc_assert( foo3.range(229,227) == "110" ); + sc_assert( foo3.range(1,0) == "01" ); + + sc_lv<42> bar; + sc_lv<42> bar1; + sc_lv<84> bar2; + bar = y.range(i + 41, i); + bar1 = y.range(i, i + 41); + bar2 = (bar1, bar); + for (j = 0; j < 42; ++j) { + sc_assert( bar[j] == y[i + j] ); + sc_assert( bar1[41 - j] == y[i + j] ); + sc_assert( bar2.range(83,42) == bar1 ); + sc_assert( bar2.range(41,0) == bar ); + } + // (bar, bar1) = (bar1, bar); + (bar, bar1) = bar2; + for (j = 0; j < 42; ++j) { + sc_assert( bar1[j] == y[i + j] ); + sc_assert( bar[41 - j] == y[i + j] ); + sc_assert( bar2.range(83,42) == bar ); + sc_assert( bar2.range(41,0) == bar1 ); + } + + sc_bv<47> bar3; + bar3 = (bar1, "01101"); + sc_assert( bar3.range(4,0) == "01101" ); + bar3.range(3,1) = "011"; + sc_assert( bar3.range(4,0) == "00111" ); + for (j = 0; j < 42; ++j) { + sc_assert(bar3[j + 5] == bar1[j]); + } + if (k == 0) { + cout << bar3 << endl; + } + bar3 = ("10100", bar); + sc_assert( bar3.range(46,42) == "10100" ); + bar3.range(45,43) = "111"; + sc_assert( bar3.range(46,42) == "11110" ); + for (j = 0; j < 42; ++j) { + sc_assert(bar3[j] == bar[j]); + } + if (k == 0) { + cout << bar3 << endl; + } + bar3 = ("101", bar3.range(46,5), "10"); + sc_assert( bar3.range(46,44) == "101" ); + sc_assert( bar3.range(1,0) == "10" ); + + + sc_signed baz(3); + sc_signed baz1(3); + baz = z.range(i + 2, i); + baz1 = z.range(i, i + 2); + for (j = 0; j < 3; ++j) { + sc_assert( baz[j] == z[i + j] ); + sc_assert( baz1[2 - j] == z[i + j] ); + } + + sc_unsigned quux(191); + sc_unsigned quux1(191); + quux = w.range(i + 190, i); + quux1 = w.range(i, i + 190); + for (j = 0; j < 191; ++j) { + sc_assert( quux[j] == w[i + j] ); + sc_assert( quux1[190 - j] == w[i + j] ); + } + } + } + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/general/subvector/test1/golden/test1.log b/src/systemc/tests/systemc/misc/unit/data/general/subvector/test1/golden/test1.log new file mode 100644 index 000000000..f13d52825 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/subvector/test1/golden/test1.log @@ -0,0 +1,63 @@ +SystemC Simulation +b1.range(5,2) ... +x[3] = 1 +x[2] = 1 +x[1] = 0 +x[0] = 1 +b2.range(4,1) ... +x[3] = 1 +x[2] = 0 +x[1] = 0 +x[0] = 1 +b3.range(6,3) ... +x[3] = 1 +x[2] = 0 +x[1] = 1 +x[0] = 1 +b1 = 0010110101 +b2 = 10010011 +b3 = 1011011 +u1 = 235 +u2 = 67 +u3 = 44 +s1 = -235 +s2 = -32 +s3 = -1 +b1.range(3,0) = 0101 +b1.range(0,3) = 1010 +b2.range(4,1) = 1001 +b2.range(1,4) = 1001 +b3.range(5,3) = 011 +b3.range(3,5) = 110 +u1.range(3,0) = 11 +u1.range(0,3) = 13 +u2.range(4,1) = 1 +u2.range(1,4) = 8 +u3.range(5,3) = 5 +u3.range(3,5) = 5 +u3.range(6,3) = 5 +u3 = 44 +s1.range(3,0) = 5 +s1.range(0,3) = -6 +s2.range(4,1) = 0 +s2.range(1,4) = 0 +s3.range(5,3) = -1 +s3.range(3,5) = -1 +s3.range(6,3) = -1 +s3 = -1 +u1.range(3,0) = 5 +u1.range(0,3) = 10 +u2.range(4,1) = 9 +u2.range(1,4) = 9 +u3.range(5,3) = 3 +u3.range(3,5) = 6 +u3.range(6,3) = 11 +u3 = 91 +s1.range(3,0) = 5 +s1.range(0,3) = -6 +s2.range(4,1) = -7 +s2.range(1,4) = -7 +s3.range(5,3) = 3 +s3.range(3,5) = -2 +s3.range(6,3) = -5 +s3 = -37 diff --git a/src/systemc/tests/systemc/misc/unit/data/general/subvector/test1/test1.cpp b/src/systemc/tests/systemc/misc/unit/data/general/subvector/test1/test1.cpp new file mode 100644 index 000000000..0b90993ef --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/general/subvector/test1/test1.cpp @@ -0,0 +1,147 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +void +one_to_four( const sc_bv<4>& x ) +{ + cout << "x[3] = " << x[3] << endl; + cout << "x[2] = " << x[2] << endl; + cout << "x[1] = " << x[1] << endl; + cout << "x[0] = " << x[0] << endl; +} + +int +sc_main( int argc, char* argv[] ) +{ + sc_bv<10> b1; + sc_bv<8> b2; + sc_bv<7> b3; + + sc_biguint<10> u1; + sc_biguint<8> u2; + sc_biguint<7> u3; + + sc_bigint<10> s1; + sc_bigint<8> s2; + sc_bigint<7> s3; + + b1 = "0010110101"; + b2 = "10010011"; + b3 = "1011011"; + + cout << "b1.range(5,2) ... " << endl; + one_to_four(b1.range(5,2)); + cout << "b2.range(4,1) ... " << endl; + one_to_four(b2.range(4,1)); + cout << "b3.range(6,3) ... " << endl; + one_to_four(b3.range(6,3)); + + u1 = 235; + u2 = 67; + u3 = 44; + + s1 = -235; + s2 = -32; + s3 = -1; + + cout << "b1 = " << b1 << endl; + cout << "b2 = " << b2 << endl; + cout << "b3 = " << b3 << endl; + + cout << "u1 = " << u1 << endl; + cout << "u2 = " << u2 << endl; + cout << "u3 = " << u3 << endl; + + cout << "s1 = " << s1 << endl; + cout << "s2 = " << s2 << endl; + cout << "s3 = " << s3 << endl; + + cout << "b1.range(3,0) = " << b1.range(3,0) << endl; + cout << "b1.range(0,3) = " << b1.range(0,3) << endl; + cout << "b2.range(4,1) = " << b2.range(4,1) << endl; + cout << "b2.range(1,4) = " << b2.range(1,4) << endl; + cout << "b3.range(5,3) = " << b3.range(5,3) << endl; + cout << "b3.range(3,5) = " << b3.range(3,5) << endl; + + cout << "u1.range(3,0) = " << sc_unsigned(u1.range(3,0)) << endl; + cout << "u1.range(0,3) = " << sc_unsigned(u1.range(0,3)) << endl; + cout << "u2.range(4,1) = " << sc_unsigned(u2.range(4,1)) << endl; + cout << "u2.range(1,4) = " << sc_unsigned(u2.range(1,4)) << endl; + cout << "u3.range(5,3) = " << sc_unsigned(u3.range(5,3)) << endl; + cout << "u3.range(3,5) = " << sc_unsigned(u3.range(3,5)) << endl; + cout << "u3.range(6,3) = " << sc_unsigned(u3.range(6,3)) << endl; + cout << "u3 = " << u3 << endl; + + cout << "s1.range(3,0) = " << sc_signed(s1.range(3,0)) << endl; + cout << "s1.range(0,3) = " << sc_signed(s1.range(0,3)) << endl; + cout << "s2.range(4,1) = " << sc_signed(s2.range(4,1)) << endl; + cout << "s2.range(1,4) = " << sc_signed(s2.range(1,4)) << endl; + cout << "s3.range(5,3) = " << sc_signed(s3.range(5,3)) << endl; + cout << "s3.range(3,5) = " << sc_signed(s3.range(3,5)) << endl; + cout << "s3.range(6,3) = " << sc_signed(s3.range(6,3)) << endl; + cout << "s3 = " << s3 << endl; + + u1 = b1; + u2 = b2; + u3 = b3; + + s1 = b1; + s2 = b2; + s3 = b3; + + cout << "u1.range(3,0) = " << sc_unsigned(u1.range(3,0)) << endl; + cout << "u1.range(0,3) = " << sc_unsigned(u1.range(0,3)) << endl; + cout << "u2.range(4,1) = " << sc_unsigned(u2.range(4,1)) << endl; + cout << "u2.range(1,4) = " << sc_unsigned(u2.range(1,4)) << endl; + cout << "u3.range(5,3) = " << sc_unsigned(u3.range(5,3)) << endl; + cout << "u3.range(3,5) = " << sc_unsigned(u3.range(3,5)) << endl; + cout << "u3.range(6,3) = " << sc_unsigned(u3.range(6,3)) << endl; + cout << "u3 = " << u3 << endl; + + cout << "s1.range(3,0) = " << sc_signed(s1.range(3,0)) << endl; + cout << "s1.range(0,3) = " << sc_signed(s1.range(0,3)) << endl; + cout << "s2.range(4,1) = " << sc_signed(s2.range(4,1)) << endl; + cout << "s2.range(1,4) = " << sc_signed(s2.range(1,4)) << endl; + cout << "s3.range(5,3) = " << sc_signed(s3.range(5,3)) << endl; + cout << "s3.range(3,5) = " << sc_signed(s3.range(3,5)) << endl; + cout << "s3.range(6,3) = " << sc_signed(s3.range(6,3)) << endl; + cout << "s3 = " << s3 << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/c_array_datatype/c_array_datatype.cpp b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/c_array_datatype/c_array_datatype.cpp new file mode 100644 index 000000000..db29e9061 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/c_array_datatype/c_array_datatype.cpp @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + c_array_datatype.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for "C array" data type */ + +#include "systemc.h" + +int sc_main(int ac, char *av[]) +{ + +// 1. DECLARATION SYNTAX + int a[4] = { 0, 23, -534, 23423 }; + long b[4] = { 0, 23, -534, 23423 }; + short c[4] = { 0, 23, -534, 23423 }; + char d[9] = { 'U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-' }; + + unsigned int e[4] = { 0, 23, 534, 23423 }; + unsigned long f[4] = { 0, 23, 534, 23423 }; + unsigned short g[4] = { 0, 23, 534, 23423 }; + unsigned char h[9] = { 'U', 'X', '0', '1', 'Z', 'W', 'L', 'H', '-' }; + + float i[4] = { 0, 4.89, -345.6778, 543222.898394322 }; + double j[4] = { 0, 4.89, -345.6778, 543222.898394322 }; +// type 'long double' is non-portable +// long double k[4] = { 0, 4.89, -345.6778, 543222.898394322 }; + + bool l[4] = { 0, 1, true, false }; + + sc_logic m[9] = { sc_logic('U'), sc_logic('X'), sc_logic('0'), sc_logic('1'), + sc_logic('Z'), sc_logic('W'), sc_logic('L'), sc_logic('H'), sc_logic('-') }; + + +// 2. TYPE CONVERSION + + // No type conversion because assignment of arrays is illegal + +// 3. OPERATORS +// Supported operators: [] + + cout.precision(15); + cout << "\nINT \t\t" + << a[0] << "\t" << a[1] << "\t" << a[2] << "\t" << a[3] + << "\nLONG \t\t" + << b[0] << "\t" << b[1] << "\t" << b[2] << "\t" << b[3] + << "\nSHORT \t\t" + << c[0] << "\t" << c[1] << "\t" << c[2] << "\t" << c[3] + << "\nCHAR \t\t" + << d[0] << "\t" << d[1] << "\t" << d[2] << "\t" + << d[3] << "\t" << d[4] << "\t" << d[5] << "\t" + << d[6] << "\t" << d[7] << "\t" << d[8] + << "\n\nUNSIGNED INT \t" + << e[0] << "\t" << e[1] << "\t" << e[2] << "\t" << e[3] + << "\nUNSIGNED LONG \t" + << f[0] << "\t" << f[1] << "\t" << f[2] << "\t" << f[3] + << "\nUNSIGNED SHORT \t" + << g[0] << "\t" << g[1] << "\t" << g[2] << "\t" << g[3] + << "\nUNSIGNED CHAR \t" + << h[0] << "\t" << h[1] << "\t" << h[2] << "\t" + << h[3] << "\t" << h[4] << "\t" << h[5] << "\t" + << h[6] << "\t" << h[7] << "\t" << h[8] + << "\n\nFLOAT \t\t" + << i[0] << "\t" << i[1] << "\t" << i[2] << "\t" << i[3] + << "\nDOUBLE \t\t" + << j[0] << "\t" << j[1] << "\t" << j[2] << "\t" << j[3] +// type 'long double' is non-portable +// << "\nLONG DOUBLE \t" +// << k[0] << "\t" << k[1] << "\t" << k[2] << "\t" << k[3] + << "\n\nBOOL \t\t" + << l[0] << "\t" << l[1] << "\t" << l[2] << "\t" << l[3] + << "\nSTD_ULOGIC \t" + << m[0] << "\t" << m[1] << "\t" << m[2] << "\t" + << m[3] << "\t" << m[4] << "\t" << m[5] << "\t" + << m[6] << "\t" << m[7] << "\t" << m[8] + << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/c_array_datatype/golden/c_array_datatype.log b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/c_array_datatype/golden/c_array_datatype.log new file mode 100644 index 000000000..3e0671235 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/c_array_datatype/golden/c_array_datatype.log @@ -0,0 +1,17 @@ +SystemC Simulation + +INT 0 23 -534 23423 +LONG 0 23 -534 23423 +SHORT 0 23 -534 23423 +CHAR U X 0 1 Z W L H - + +UNSIGNED INT 0 23 534 23423 +UNSIGNED LONG 0 23 534 23423 +UNSIGNED SHORT 0 23 534 23423 +UNSIGNED CHAR U X 0 1 Z W L H - + +FLOAT 0 4.8899998664856 -345.677795410156 543222.875 +DOUBLE 0 4.89 -345.6778 543222.898394322 + +BOOL 0 1 1 0 +STD_ULOGIC X X 0 1 Z X X X X diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/golden/int_datatype.log b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/golden/int_datatype.log new file mode 100644 index 000000000..dcaba007d --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/golden/int_datatype.log @@ -0,0 +1,46 @@ +SystemC Simulation +int <= int +--------------------- +A = 5 5 +B = -12 -12 + +op1 operator op2 result [All operands are int] +---------------------------------------------------------------- +13 * 3 = 39 +13 / 3 = 4 +13 % 3 = 1 +13 + 3 = 16 +13 - 3 = 10 +!(13) = 0 +13 && 3 = 1 +13 || 3 = 1 +13 < 3 = 0 +13 <= 3 = 0 +13 > 3 = 1 +13 >= 3 = 1 +13 += 3 = 16 +13 -= 3 = 10 +13 *= 3 = 39 +13 /= 3 = 4 +13 %= 3 = 1 +13 <<= 3 = 104 +13 >>= 3 = 1 +13 &= 3 = 1 +13 ^= 3 = 14 +13 |= 3 = 15 + ()++ 3 = 3 + ++() 3 = 4 + ()-- 3 = 3 + --() 3 = 2 +13 > ?: 3 = 1 +13 < ?: 3 = 0 +13 , 3 = 3 +~(13) = 4294967282 +13 << 3 = 104 +13 >> 3 = 1 +13 & 3 = 1 +13 ^ 3 = 14 +13 | 3 = 15 +13 == 3 -> false +13 != 3 -> true +0 = 0 diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/int_datatype.cpp b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/int_datatype.cpp new file mode 100644 index 000000000..c1a8fb6cc --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/int_datatype/int_datatype.cpp @@ -0,0 +1,217 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + int_datatype.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for "int" data type */ + +#include "systemc.h" + +int sc_main(int ac, char *av[]) +{ + +// 1. DECLARATION SYNTAX + int a; + int b; + +// 2. TYPE CONVERSION + + // int <- int + a = 5; + b = -12; + + cout << "int \t<=\t int" + << "\n---------------------" + << "\nA = " << a << "\t\t 5" + << "\nB = " << b << "\t\t -12" + << "\n" << endl; + + // **** ADD MORE TYPE CONVERSIONS ***** + +// 3. OPERATORS +// Supported operators: ! && || ~ & ^ | + - * / % << >> +// &= ^= |= += -= *= /= %= <<= >>= +// = == != < <= > >= << >> +// ()++ ++() ()-- --() ?: , + +#define VAL1 13 +#define VAL2 3 + + unsigned int op1 = VAL1; + unsigned int op2 = VAL2; + unsigned int r1, r2, r3, r4, r5, r6, r7, r8, r9; + unsigned int r10, r11, r12, r13, r14, r15, r16, r17, r18, r19; + unsigned int r20, r21, r22, r23, r24, r25, r26, r27, r28, r29; + unsigned int r30, r31, r32, r33, r34, r35; + + r1 = op1 * op2; // Multiplication + + r2 = op1 / op2; // Division + + r3 = op1 % op2; // Modulus + + r4 = op1 + op2; // Addition + + r5 = op1 - op2; // Subtraction + + r6 = !op1; // Logical NOT + + r7 = op1 && op2; // Logical AND + + r8 = op1 || op2; // Logical OR + + r9 = op1 < op2; // Less than + + r10 = op1 <= op2; // Less than or equal + + r11 = op1 > op2; // Greater than + + r12 = op1 >= op2; // Greater than or equal + + r13 = op1 += op2; // Compound addition + op1 = VAL1; op2 = VAL2; + + r14 = op1 -= op2; // Compound subtraction + op1 = VAL1; op2 = VAL2; + + r15 = op1 *= op2; // Compound multiplication + op1 = VAL1; op2 = VAL2; + + r16 = op1 /= op2; // Compound division + op1 = VAL1; op2 = VAL2; + + r17 = op1 %= op2; // Compound modulus + op1 = VAL1; op2 = VAL2; + + r18 = op1 <<= op2; // Compound shift left + op1 = VAL1; op2 = VAL2; + + r19 = op1 >>= op2; // Compound shift right + op1 = VAL1; op2 = VAL2; + + r20 = op1 &= op2; // Compound bitwise AND + op1 = VAL1; op2 = VAL2; + + r21 = op1 ^= op2; // Compound bitwise XOR + op1 = VAL1; op2 = VAL2; + + r22 = op1 |= op2; // Compound bitwise OR + op1 = VAL1; op2 = VAL2; + + r23 = op2++; // Postfix increment + op1 = VAL1; op2 = VAL2; + + r24 = ++op2; // Prefix increment + op1 = VAL1; op2 = VAL2; + + r25 = op2--; // Postfix decrement + op1 = VAL1; op2 = VAL2; + + r26 = --op2; // Prefix decrement + op1 = VAL1; op2 = VAL2; + + r27 = (op1 > op2) ? true : false; // Arithmetic if + r28 = (op1 < op2) ? true : false; // Arithmetic if + + r29 = op1, r29 = op2; // Comma + + r30 = ~op1; // Bitwise NOT + + r31 = op1 << op2; // Left shift + op1 = VAL1; op2 = VAL2; + + r32 = op1 >> op2; // Right shift + op1 = VAL1; op2 = VAL2; + + r33 = op1 & op2; // Bitwise AND + + r34 = op1 ^ op2; // Bitwise XOR + + r35 = op1 | op2; // Bitwise OR + + cout << "op1 \t operator \t op2 \t result [All operands are int]" + << "\n----------------------------------------------------------------" + << "\n" << op1 << "\t * \t\t " << op2 << "\t = " << r1 + << "\n" << op1 << "\t / \t\t " << op2 << "\t = " << r2 + << "\n" << op1 << "\t % \t\t " << op2 << "\t = " << r3 + << "\n" << op1 << "\t + \t\t " << op2 << "\t = " << r4 + << "\n" << op1 << "\t - \t\t " << op2 << "\t = " << r5 + << "\n!(" << op1 << ") \t\t\t\t = " << r6 + << "\n" << op1 << "\t && \t\t " << op2 << "\t = " << r7 + << "\n" << op1 << "\t || \t\t " << op2 << "\t = " << r8 + << "\n" << op1 << "\t < \t\t " << op2 << "\t = " << r9 + << "\n" << op1 << "\t <= \t\t " << op2 << "\t = " << r10 + << "\n" << op1 << "\t > \t\t " << op2 << "\t = " << r11 + << "\n" << op1 << "\t >= \t\t " << op2 << "\t = " << r12 + << "\n" << op1 << "\t += \t\t " << op2 << "\t = " << r13 + << "\n" << op1 << "\t -= \t\t " << op2 << "\t = " << r14 + << "\n" << op1 << "\t *= \t\t " << op2 << "\t = " << r15 + << "\n" << op1 << "\t /= \t\t " << op2 << "\t = " << r16 + << "\n" << op1 << "\t %= \t\t " << op2 << "\t = " << r17 + << "\n" << op1 << "\t <<=\t\t " << op2 << "\t = " << r18 + << "\n" << op1 << "\t >>=\t\t " << op2 << "\t = " << r19 + << "\n" << op1 << "\t &= \t\t " << op2 << "\t = " << r20 + << "\n" << op1 << "\t ^= \t\t " << op2 << "\t = " << r21 + << "\n" << op1 << "\t |= \t\t " << op2 << "\t = " << r22 + << "\n" << "\t ()++ \t " << op2 << "\t = " << r23 + << "\n" << "\t ++() \t " << op2 << "\t = " << r24 + << "\n" << "\t ()-- \t " << op2 << "\t = " << r25 + << "\n" << "\t --() \t " << op2 << "\t = " << r26 + << "\n" << op1 << "\t > ?: \t " << op2 << "\t = " << r27 + << "\n" << op1 << "\t < ?: \t " << op2 << "\t = " << r28 + << "\n" << op1 << "\t , \t\t " << op2 << "\t = " << r29 + << "\n~(" << op1 << ") \t\t\t\t = " << r30 + << "\n" << op1 << "\t << \t\t " << op2 << "\t = " << r31 + << "\n" << op1 << "\t >> \t\t " << op2 << "\t = " << r32 + << "\n" << op1 << "\t & \t\t " << op2 << "\t = " << r33 + << "\n" << op1 << "\t ^ \t\t " << op2 << "\t = " << r34 + << "\n" << op1 << "\t | \t\t " << op2 << "\t = " << r35 + << endl; + + if (op1 == op2) // Equality + cout << op1 << "\t == \t\t " << op2 << "\t -> true" << endl; + else + cout << op1 << "\t == \t\t " << op2 << "\t -> false" << endl; + + if (op1 != op2) // Inequality + cout << op1 << "\t != \t\t " << op2 << "\t -> true" << endl; + else + cout << op1 << "\t != \t\t " << op2 << "\t -> false" << endl; + + op1 = op2 = 0; // Assignment operator concatenation + cout << op1 << "\t = \t\t " << op2 << endl; + sc_start(0, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/golden/std_ulogic_da b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/golden/std_ulogic_da new file mode 100644 index 000000000..989b39e58 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/golden/std_ulogic_da @@ -0,0 +1,106 @@ +SystemC Simulation + +std_ulogic <= std_ulogic +------------------------------------------- +UNINITIALIZED = X 'U' +UNKNOWN = X 'X' +ZERO = 0 '0' +ONE = 1 '1' +TRISTATE = Z 'Z' +WEAK-UNKNOWN = X 'W' +WEAK-ZERO = X 'L' +WEAK-ONE = X 'H' +DONT-CARE = X '-' +TRUE = 1 true +FALSE = 0 false + +std_ulogic <= literals +------------------------- +A = 1 true +B = 0 false +C = 1 1 +D = 0 0 + +std_ulogic <= bool +--------------------- +TRUE = 1 1 +FALSE = 0 0 +1 = 1 1 +0 = 0 0 + +std_ulogic <= char +--------------------- +SC1 = X 'U' +SC2 = X 'u' +SC3 = X 'X' +SC4 = X 'x' +SC5 = 0 '0' +SC6 = 1 '1' +SC7 = Z 'Z' +SC8 = Z 'z' +SC9 = X 'W' +SC10 = X 'w' +SC11 = X 'L' +SC12 = X 'l' +SC13 = X 'H' +SC14 = X 'h' +SC15 = X '-' +SC16 = X 'D' +SC17 = X 'd' +SC18 = X 'B' +SC19 = X 'F' + +op1 operator op2 result [All operands are std_ulogic] +---------------------------------------------------------------- +1 &= 1 = 1 +1 ^= 1 = 0 +1 |= 1 = 1 +~(1) = 0 +1 & 1 = 1 +1 ^ 1 = 0 +1 | 1 = 1 +1 == 1 -> true +1 != 1 -> false +0 = 0 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/golden/std_ulogic_datatype.log b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/golden/std_ulogic_datatype.log new file mode 100644 index 000000000..989b39e58 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/golden/std_ulogic_datatype.log @@ -0,0 +1,106 @@ +SystemC Simulation + +std_ulogic <= std_ulogic +------------------------------------------- +UNINITIALIZED = X 'U' +UNKNOWN = X 'X' +ZERO = 0 '0' +ONE = 1 '1' +TRISTATE = Z 'Z' +WEAK-UNKNOWN = X 'W' +WEAK-ZERO = X 'L' +WEAK-ONE = X 'H' +DONT-CARE = X '-' +TRUE = 1 true +FALSE = 0 false + +std_ulogic <= literals +------------------------- +A = 1 true +B = 0 false +C = 1 1 +D = 0 0 + +std_ulogic <= bool +--------------------- +TRUE = 1 1 +FALSE = 0 0 +1 = 1 1 +0 = 0 0 + +std_ulogic <= char +--------------------- +SC1 = X 'U' +SC2 = X 'u' +SC3 = X 'X' +SC4 = X 'x' +SC5 = 0 '0' +SC6 = 1 '1' +SC7 = Z 'Z' +SC8 = Z 'z' +SC9 = X 'W' +SC10 = X 'w' +SC11 = X 'L' +SC12 = X 'l' +SC13 = X 'H' +SC14 = X 'h' +SC15 = X '-' +SC16 = X 'D' +SC17 = X 'd' +SC18 = X 'B' +SC19 = X 'F' + +op1 operator op2 result [All operands are std_ulogic] +---------------------------------------------------------------- +1 &= 1 = 1 +1 ^= 1 = 0 +1 |= 1 = 1 +~(1) = 0 +1 & 1 = 1 +1 ^ 1 = 0 +1 | 1 = 1 +1 == 1 -> true +1 != 1 -> false +0 = 0 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/std_ulogic_datatype.cpp b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/std_ulogic_datatype.cpp new file mode 100644 index 000000000..3822e98f8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_datatype/std_ulogic_datatype.cpp @@ -0,0 +1,542 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + std_ulogic_datatype.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for "std_ulogic" data type */ + +#include "systemc.h" + +typedef sc_logic std_ulogic; + +int sc_main(int ac, char *av[]) +{ + +// 1. DECLARATION SYNTAX + std_ulogic s1; + std_ulogic s2, s3, s4, s5, s6, s7, s8, s9, s10, s11; + + +// 2. TYPE CONVERSION + + // std_ulogic <- std_ulogic + s1 = 'U'; + s2 = 'X'; + s3 = '0'; + s4 = '1'; + s5 = 'Z'; + s6 = 'W'; + s7 = 'L'; + s8 = 'H'; + s9 = '-'; + s10 = true; + s11 = false; + + cout << "\nstd_ulogic \t<=\t\t std_ulogic" + << "\n-------------------------------------------" + << "\nUNINITIALIZED \t= " << s1 << "\t\t 'U'" + << "\nUNKNOWN \t= " << s2 << "\t\t 'X'" + << "\nZERO \t\t= " << s3 << "\t\t '0'" + << "\nONE \t\t= " << s4 << "\t\t '1'" + << "\nTRISTATE \t= " << s5 << "\t\t 'Z'" + << "\nWEAK-UNKNOWN \t= " << s6 << "\t\t 'W'" + << "\nWEAK-ZERO \t= " << s7 << "\t\t 'L'" + << "\nWEAK-ONE \t= " << s8 << "\t\t 'H'" + << "\nDONT-CARE \t= " << s9 << "\t\t '-'" + << "\nTRUE \t\t= " << s10 << "\t\t true" + << "\nFALSE \t\t= " << s11 << "\t\t false" + << "\n" << endl; + + // std_ulogic <- literals + std_ulogic a, b, c, d; + + a = true; + b = false; + c = 1; + d = 0; + + cout << "std_ulogic <=\t literals" + << "\n-------------------------" + << "\nA = " << a << "\t\t true" + << "\nB = " << b << "\t\t false" + << "\nC = " << c << "\t\t 1" + << "\nD = " << d << "\t\t 0" + << "\n" << endl; + + // std_ulogic <- bool + std_ulogic su1, su2, su3, su4; + bool b1, b2, b3, b4; + + b1 = true; + b2 = false; + b3 = 1; + b4 = 0; + + su1 = b1; + su2 = b2; + su3 = b3; + su4 = b4; + + cout << "std_ulogic <=\t bool" + << "\n---------------------" + << "\nTRUE \t= " << su1 << "\t " << b1 + << "\nFALSE \t= " << su2 << "\t " << b2 + << "\n1 \t= " << su3 << "\t " << b3 + << "\n0 \t= " << su4 << "\t " << b4 + << "\n" << endl; + + // std_ulogic <- char + std_ulogic sc1, sc2, sc3, sc4, sc5, sc6, sc7, sc8, sc9; + std_ulogic sc10, sc11, sc12, sc13, sc14, sc15, sc16, sc17, sc18, sc19; + char c1, c2, c3, c4, c5, c6, c7, c8, c9; + char c10, c11, c12, c13, c14, c15, c16, c17, c18, c19; + + c1 = 'U'; + c2 = 'u'; + c3 = 'X'; + c4 = 'x'; + c5 = '0'; + c6 = '1'; + c7 = 'Z'; + c8 = 'z'; + c9 = 'W'; + c10 = 'w'; + c11 = 'L'; + c12 = 'l'; + c13 = 'H'; + c14 = 'h'; + c15 = '-'; + c16 = 'D'; + c17 = 'd'; + c18 = 'B'; + c19 = 'F'; + + sc1 = c1; + sc2 = c2; + sc3 = c3; + sc4 = c4; + sc5 = c5; + sc6 = c6; + sc7 = c7; + sc8 = c8; + sc9 = c9; + sc10 = c10; + sc11 = c11; + sc12 = c12; + sc13 = c13; + sc14 = c14; + sc15 = c15; + sc16 = c16; + sc17 = c17; + sc18 = c18; + sc19 = c19; + + cout << "std_ulogic <=\t char" + << "\n---------------------" + << "\nSC1 \t= " << sc1 << "\t '" << c1 << "'" + << "\nSC2 \t= " << sc2 << "\t '" << c2 << "'" + << "\nSC3 \t= " << sc3 << "\t '" << c3 << "'" + << "\nSC4 \t= " << sc4 << "\t '" << c4 << "'" + << "\nSC5 \t= " << sc5 << "\t '" << c5 << "'" + << "\nSC6 \t= " << sc6 << "\t '" << c6 << "'" + << "\nSC7 \t= " << sc7 << "\t '" << c7 << "'" + << "\nSC8 \t= " << sc8 << "\t '" << c8 << "'" + << "\nSC9 \t= " << sc9 << "\t '" << c9 << "'" + << "\nSC10 \t= " << sc10 << "\t '" << c10 << "'" + << "\nSC11 \t= " << sc11 << "\t '" << c11 << "'" + << "\nSC12 \t= " << sc12 << "\t '" << c12 << "'" + << "\nSC13 \t= " << sc13 << "\t '" << c13 << "'" + << "\nSC14 \t= " << sc14 << "\t '" << c14 << "'" + << "\nSC15 \t= " << sc15 << "\t '" << c15 << "'" + << "\nSC16 \t= " << sc16 << "\t '" << c16 << "'" + << "\nSC17 \t= " << sc17 << "\t '" << c17 << "'" + << "\nSC18 \t= " << sc18 << "\t '" << c18 << "'" + << "\nSC19 \t= " << sc19 << "\t '" << c19 << "'" + << "\n" << endl; + + +// 3. OPERATORS +// Supported operators: ~ & ^ | &= ^= |= == != = + +#define VAL1 '1' +#define VAL2 '1' + + std_ulogic op1 = sc_logic(VAL1); + std_ulogic op2 = sc_logic(VAL2); + std_ulogic r1, r2, r3, r4, r5, r6, r7, r8, r9; + std_ulogic r10, r11, r12, r13, r14, r15, r16, r17, r18, r19; + std_ulogic r20, r21, r22, r23, r24, r25, r26, r27, r28, r29; + std_ulogic r30, r31, r32, r33, r34, r35; + +// r1 = op1 * op2; // Multiplication + +// r2 = op1 / op2; // Division + +// r3 = op1 % op2; // Modulus + +// r4 = op1 + op2; // Addition + +// r5 = op1 - op2; // Subtraction + +// r6 = !op1; // Logical NOT + +// r7 = op1 && op2; // Logical AND + +// r8 = op1 || op2; // Logical OR + +// r9 = op1 < op2; // Less than + +// r10 = op1 <= op2; // Less than or equal + +// r11 = op1 > op2; // Greater than + +// r12 = op1 >= op2; // Greater than or equal + +// r13 = op1 += op2; // Compound addition +// op1 = VAL1; op2 = VAL2; + +// r14 = op1 -= op2; // Compound subtraction +// op1 = VAL1; op2 = VAL2; + +// r15 = op1 *= op2; // Compound multiplication +// op1 = VAL1; op2 = VAL2; + +// r16 = op1 /= op2; // Compound division +// op1 = VAL1; op2 = VAL2; + +// r17 = op1 %= op2; // Compound modulus +// op1 = VAL1; op2 = VAL2; + +// r18 = op1 <<= op2; // Compound shift left +// op1 = VAL1; op2 = VAL2; + +// r19 = op1 >>= op2; // Compound shift right +// op1 = VAL1; op2 = VAL2; + + r20 = op1 &= op2; // Compound bitwise AND + op1 = VAL1; op2 = VAL2; + + r21 = op1 ^= op2; // Compound bitwise XOR + op1 = VAL1; op2 = VAL2; + + r22 = op1 |= op2; // Compound bitwise OR + op1 = VAL1; op2 = VAL2; + +// r23 = op2++; // Postfix increment +// op1 = VAL1; op2 = VAL2; + +// r24 = ++op2; // Prefix increment +// op1 = VAL1; op2 = VAL2; + +// r25 = op2--; // Postfix decrement +// op1 = VAL1; op2 = VAL2; + +// r26 = --op2; // Prefix decrement +// op1 = VAL1; op2 = VAL2; + +// r27 = (op1 > op2) ? true : false; // Arithmetic if +// r28 = (op1 < op2) ? true : false; // Arithmetic if + +// r29 = op1, r29 = op2; // Comma + + r30 = ~op1; // Bitwise NOT + +// r31 = op1 << op2; // Left shift +// op1 = VAL1; op2 = VAL2; + +// r32 = op1 >> op2; // Right shift +// op1 = VAL1; op2 = VAL2; + + r33 = op1 & op2; // Bitwise AND + + r34 = op1 ^ op2; // Bitwise XOR + + r35 = op1 | op2; // Bitwise OR + + cout << "op1 \t operator \t op2 \t result [All operands are std_ulogic]" + << "\n----------------------------------------------------------------" +// << "\n" << op1 << "\t * \t\t " << op2 << "\t = " << r1 +// << "\n" << op1 << "\t / \t\t " << op2 << "\t = " << r2 +// << "\n" << op1 << "\t % \t\t " << op2 << "\t = " << r3 +// << "\n" << op1 << "\t + \t\t " << op2 << "\t = " << r4 +// << "\n" << op1 << "\t - \t\t " << op2 << "\t = " << r5 +// << "\n!(" << op1 << ") \t\t\t\t = " << r6 +// << "\n" << op1 << "\t && \t\t " << op2 << "\t = " << r7 +// << "\n" << op1 << "\t || \t\t " << op2 << "\t = " << r8 +// << "\n" << op1 << "\t < \t\t " << op2 << "\t = " << r9 +// << "\n" << op1 << "\t <= \t\t " << op2 << "\t = " << r10 +// << "\n" << op1 << "\t > \t\t " << op2 << "\t = " << r11 +// << "\n" << op1 << "\t >= \t\t " << op2 << "\t = " << r12 +// << "\n" << op1 << "\t += \t\t " << op2 << "\t = " << r13 +// << "\n" << op1 << "\t -= \t\t " << op2 << "\t = " << r14 +// << "\n" << op1 << "\t *= \t\t " << op2 << "\t = " << r15 +// << "\n" << op1 << "\t /= \t\t " << op2 << "\t = " << r16 +// << "\n" << op1 << "\t %= \t\t " << op2 << "\t = " << r17 +// << "\n" << op1 << "\t <<=\t\t " << op2 << "\t = " << r18 +// << "\n" << op1 << "\t >>=\t\t " << op2 << "\t = " << r19 + << "\n" << op1 << "\t &= \t\t " << op2 << "\t = " << r20 + << "\n" << op1 << "\t ^= \t\t " << op2 << "\t = " << r21 + << "\n" << op1 << "\t |= \t\t " << op2 << "\t = " << r22 +// << "\n" << "\t ()++ \t " << op2 << "\t = " << r23 +// << "\n" << "\t ++() \t " << op2 << "\t = " << r24 +// << "\n" << "\t ()-- \t " << op2 << "\t = " << r25 +// << "\n" << "\t --() \t " << op2 << "\t = " << r26 +// << "\n" << op1 << "\t > ?: \t " << op2 << "\t = " << r27 +// << "\n" << op1 << "\t < ?: \t " << op2 << "\t = " << r28 +// << "\n" << op1 << "\t , \t\t " << op2 << "\t = " << r29 + << "\n~(" << op1 << ") \t\t\t\t = " << r30 +// << "\n" << op1 << "\t << \t\t " << op2 << "\t = " << r31 +// << "\n" << op1 << "\t >> \t\t " << op2 << "\t = " << r32 + << "\n" << op1 << "\t & \t\t " << op2 << "\t = " << r33 + << "\n" << op1 << "\t ^ \t\t " << op2 << "\t = " << r34 + << "\n" << op1 << "\t | \t\t " << op2 << "\t = " << r35 + << endl; + + if (op1 == op2) // Equality + cout << op1 << "\t == \t\t " << op2 << "\t -> true" << endl; + else + cout << op1 << "\t == \t\t " << op2 << "\t -> false" << endl; + + if (op1 != op2) // Inequality + cout << op1 << "\t != \t\t " << op2 << "\t -> true" << endl; + else + cout << op1 << "\t != \t\t " << op2 << "\t -> false" << endl; + + op1 = op2 = 0; // Assignment operator concatenation + cout << op1 << "\t = \t\t " << op2 << endl; + +// 4. OPERATOR DEFINITIONS +// & | ^ ~ + std_ulogic v1, v2, v3, v4, v5, v6, v7, v8, v9; + std_ulogic uu, ux, u0, u1, uz, uw, ul, uh, ud; + std_ulogic xu, xx, x0, x1, xz, xw, xl, xh, xd; + std_ulogic _0u, _0x, _00, _01, _0z, _0w, _0l, _0h, _0d; + std_ulogic _1u, _1x, _10, _11, _1z, _1w, _1l, _1h, _1d; + std_ulogic zu, zx, z0, z1, zz, zw, zl, zh, zd; + std_ulogic wu, wx, w0, w1, wz, ww, wl, wh, wd; + std_ulogic lu, lx, l0, l1, lz, lw, ll, lh, ld; + std_ulogic hu, hx, h0, h1, hz, hw, hl, hh, hd; + std_ulogic du, dx, d0, d1, dz, dw, dl, dh, dd; + + v1 = 'U'; + v2 = 'X'; + v3 = '0'; + v4 = '1'; + v5 = 'Z'; + v6 = 'W'; + v7 = 'L'; + v8 = 'H'; + v9 = '-'; + + uu = v1 & v1; ux = v1 & v2; u0 = v1 & v3; + u1 = v1 & v4; uz = v1 & v5; uw = v1 & v6; + ul = v1 & v7; uh = v1 & v8; ud = v1 & v9; + + xu = v2 & v1; xx = v2 & v2; x0 = v2 & v3; + x1 = v2 & v4; xz = v2 & v5; xw = v2 & v6; + xl = v2 & v7; xh = v2 & v8; xd = v2 & v9; + + _0u = v3 & v1; _0x = v3 & v2; _00 = v3 & v3; + _01 = v3 & v4; _0z = v3 & v5; _0w = v3 & v6; + _0l = v3 & v7; _0h = v3 & v8; _0d = v3 & v9; + + _1u = v4 & v1; _1x = v4 & v2; _10 = v4 & v3; + _11 = v4 & v4; _1z = v4 & v5; _1w = v4 & v6; + _1l = v4 & v7; _1h = v4 & v8; _1d = v4 & v9; + + zu = v5 & v1; zx = v5 & v2; z0 = v5 & v3; + z1 = v5 & v4; zz = v5 & v5; zw = v5 & v6; + zl = v5 & v7; zh = v5 & v8; zd = v5 & v9; + + wu = v6 & v1; wx = v6 & v2; w0 = v6 & v3; + w1 = v6 & v4; wz = v6 & v5; ww = v6 & v6; + wl = v6 & v7; wh = v6 & v8; wd = v6 & v9; + + lu = v7 & v1; lx = v7 & v2; l0 = v7 & v3; + l1 = v7 & v4; lz = v7 & v5; lw = v7 & v6; + ll = v7 & v7; lh = v7 & v8; ld = v7 & v9; + + hu = v8 & v1; hx = v8 & v2; h0 = v8 & v3; + h1 = v8 & v4; hz = v8 & v5; hw = v8 & v6; + hl = v8 & v7; hh = v8 & v8; hd = v8 & v9; + + du = v9 & v1; dx = v9 & v2; d0 = v9 & v3; + d1 = v9 & v4; dz = v9 & v5; dw = v9 & v6; + dl = v9 & v7; dh = v9 & v8; dd = v9 & v9; + + cout << "\n+-------------------------+" + << "\n| AND (&) | X | 0 | 1 | Z |" + << "\n+-------------------------+" + << "\n| X | " << xx << " | " << x0 << " | " + << x1 << " | " << xz << " | " + << "\n+-------------------------+" + << "\n| 0 | " << _0x << " | " << _00 << " | " + << _01 << " | " << _0z << " | " + << "\n+-------------------------+" + << "\n| 1 | " << _1x << " | " << _10 << " | " + << _11 << " | " << _1z << " | " + << "\n+-------------------------+" + << "\n| Z | " << zx << " | " << z0 << " | " + << z1 << " | " << zz << " | " + << "\n+-------------------------+" + << endl; + + uu = v1 | v1; ux = v1 | v2; u0 = v1 | v3; + u1 = v1 | v4; uz = v1 | v5; uw = v1 | v6; + ul = v1 | v7; uh = v1 | v8; ud = v1 | v9; + + xu = v2 | v1; xx = v2 | v2; x0 = v2 | v3; + x1 = v2 | v4; xz = v2 | v5; xw = v2 | v6; + xl = v2 | v7; xh = v2 | v8; xd = v2 | v9; + + _0u = v3 | v1; _0x = v3 | v2; _00 = v3 | v3; + _01 = v3 | v4; _0z = v3 | v5; _0w = v3 | v6; + _0l = v3 | v7; _0h = v3 | v8; _0d = v3 | v9; + + _1u = v4 | v1; _1x = v4 | v2; _10 = v4 | v3; + _11 = v4 | v4; _1z = v4 | v5; _1w = v4 | v6; + _1l = v4 | v7; _1h = v4 | v8; _1d = v4 | v9; + + zu = v5 | v1; zx = v5 | v2; z0 = v5 | v3; + z1 = v5 | v4; zz = v5 | v5; zw = v5 | v6; + zl = v5 | v7; zh = v5 | v8; zd = v5 | v9; + + wu = v6 | v1; wx = v6 | v2; w0 = v6 | v3; + w1 = v6 | v4; wz = v6 | v5; ww = v6 | v6; + wl = v6 | v7; wh = v6 | v8; wd = v6 | v9; + + lu = v7 | v1; lx = v7 | v2; l0 = v7 | v3; + l1 = v7 | v4; lz = v7 | v5; lw = v7 | v6; + ll = v7 | v7; lh = v7 | v8; ld = v7 | v9; + + hu = v8 | v1; hx = v8 | v2; h0 = v8 | v3; + h1 = v8 | v4; hz = v8 | v5; hw = v8 | v6; + hl = v8 | v7; hh = v8 | v8; hd = v8 | v9; + + du = v9 | v1; dx = v9 | v2; d0 = v9 | v3; + d1 = v9 | v4; dz = v9 | v5; dw = v9 | v6; + dl = v9 | v7; dh = v9 | v8; dd = v9 | v9; + + cout << "\n+-------------------------+" + << "\n| OR (|) | X | 0 | 1 | Z |" + << "\n+-------------------------+" + << "\n| X | " << xx << " | " << x0 << " | " + << x1 << " | " << xz << " | " + << "\n+-------------------------+" + << "\n| 0 | " << _0x << " | " << _00 << " | " + << _01 << " | " << _0z << " | " + << "\n+-------------------------+" + << "\n| 1 | " << _1x << " | " << _10 << " | " + << _11 << " | " << _1z << " | " + << "\n+-------------------------+" + << "\n| Z | " << zx << " | " << z0 << " | " + << z1 << " | " << zz << " | " + << "\n+-------------------------+" + << endl; + + uu = v1 ^ v1; ux = v1 ^ v2; u0 = v1 ^ v3; + u1 = v1 ^ v4; uz = v1 ^ v5; uw = v1 ^ v6; + ul = v1 ^ v7; uh = v1 ^ v8; ud = v1 ^ v9; + + xu = v2 ^ v1; xx = v2 ^ v2; x0 = v2 ^ v3; + x1 = v2 ^ v4; xz = v2 ^ v5; xw = v2 ^ v6; + xl = v2 ^ v7; xh = v2 ^ v8; xd = v2 ^ v9; + + _0u = v3 ^ v1; _0x = v3 ^ v2; _00 = v3 ^ v3; + _01 = v3 ^ v4; _0z = v3 ^ v5; _0w = v3 ^ v6; + _0l = v3 ^ v7; _0h = v3 ^ v8; _0d = v3 ^ v9; + + _1u = v4 ^ v1; _1x = v4 ^ v2; _10 = v4 ^ v3; + _11 = v4 ^ v4; _1z = v4 ^ v5; _1w = v4 ^ v6; + _1l = v4 ^ v7; _1h = v4 ^ v8; _1d = v4 ^ v9; + + zu = v5 ^ v1; zx = v5 ^ v2; z0 = v5 ^ v3; + z1 = v5 ^ v4; zz = v5 ^ v5; zw = v5 ^ v6; + zl = v5 ^ v7; zh = v5 ^ v8; zd = v5 ^ v9; + + wu = v6 ^ v1; wx = v6 ^ v2; w0 = v6 ^ v3; + w1 = v6 ^ v4; wz = v6 ^ v5; ww = v6 ^ v6; + wl = v6 ^ v7; wh = v6 ^ v8; wd = v6 ^ v9; + + lu = v7 ^ v1; lx = v7 ^ v2; l0 = v7 ^ v3; + l1 = v7 ^ v4; lz = v7 ^ v5; lw = v7 ^ v6; + ll = v7 ^ v7; lh = v7 ^ v8; ld = v7 ^ v9; + + hu = v8 ^ v1; hx = v8 ^ v2; h0 = v8 ^ v3; + h1 = v8 ^ v4; hz = v8 ^ v5; hw = v8 ^ v6; + hl = v8 ^ v7; hh = v8 ^ v8; hd = v8 ^ v9; + + du = v9 ^ v1; dx = v9 ^ v2; d0 = v9 ^ v3; + d1 = v9 ^ v4; dz = v9 ^ v5; dw = v9 ^ v6; + dl = v9 ^ v7; dh = v9 ^ v8; dd = v9 ^ v9; + + cout << "\n+-------------------------+" + << "\n| XOR (^) | X | 0 | 1 | Z |" + << "\n+-------------------------+" + << "\n| X | " << xx << " | " << x0 << " | " + << x1 << " | " << xz << " | " + << "\n+-------------------------+" + << "\n| 0 | " << _0x << " | " << _00 << " | " + << _01 << " | " << _0z << " | " + << "\n+-------------------------+" + << "\n| 1 | " << _1x << " | " << _10 << " | " + << _11 << " | " << _1z << " | " + << "\n+-------------------------+" + << "\n| Z | " << zx << " | " << z0 << " | " + << z1 << " | " << zz << " | " + << "\n+-------------------------+" + << endl; + + std_ulogic nu, nx, n0, n1, nz, nw, nl, nh, nd; + + nu = ~v1; + nx = ~v2; + n0 = ~v3; + n1 = ~v4; + nz = ~v5; + nw = ~v6; + nl = ~v7; + nh = ~v8; + nd = ~v9; + + cout << "\n+-------------------------+" + << "\n| NOT (~) | X | 0 | 1 | Z |" + << "\n+-------------------------+" + << "\n| | " << nx << " | " << n0 << " | " + << n1 << " | " << nz << " | " + << "\n+-------------------------+" + << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ul b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ul new file mode 100644 index 000000000..7947cc42e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ul @@ -0,0 +1,203 @@ +SystemC Simulation + +INTEGER SIZE = 4 bytes +SHORT INTEGER SIZE = 2 bytes +LONG INTEGER SIZE = 4 bytes +UNSIGNED LONG SIZE = 4 bytes +SIGNED LONG SIZE = 4 bytes + +std_ulogic_vector <= C++ string +------------------------------------------- +A = 01XZXXXXX "01XZUWLH-" +B = XX0XX1XXX "ZZ1XX0UU1WWW" +BIG = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" +HUGE = 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111 + +std_ulogic_vector <= std_ulogic_vector +-------------------------------------------------- +C = XX0XX1XXX ZZ1XX0XX1XXX +BIG2 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" + +std_ulogic_vector <= C++ array of bool +-------------------------------------------------- +D = XXXXZX10X -, L, H, W, Z, X, 1, 0, U +E = 10011XXXX X, X, 1, 1, 0, 0, 1, 1, X, X, U, U +BIG3 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111 + 000011110000" + +std_ulogic_vector <= bool_vector +-------------------------------------------- +F = 1010 "1010" + +std_ulogic_vector <= unsigned long +---------------------------------------------- +H = 1001 ...10001001 (137) +I = 00000000000000000000000010001001 ...10001001 (137) +J = 0000000000000000000000000000000010001001 ...10001001 (137) + +std_ulogic_vector <= sc_unsigned +-------------------------------------------- +K = 0011 11 (3) +L = 1101 1101 (13) +M = 1001 10001001 (137) + +std_ulogic_vector <= signed long +-------------------------------------------- +N = 01001 ...010001001 (137) +O = 00000000000000000000000010001001 ...010001001 (137) +P = 0000000000000000000000000000000010001001 ...010001001 (137) +Q = 10111 ...101110111 (-137) +R = 11111111111111111111111101110111 ...101110111 (-137) +S = 1111111111111111111111111111111101110111 ...101110111 (-137) + +std_ulogic_vector <= sc_signed +------------------------------------------ +T = 00011 011 (3) +U = 01101 01101 (13) +V = 01001 010001001 (137) +W = 11101 101 (-3) +X = 10011 10011 (-13) +Y = 10111 101110111 (-137) + +std_ulogic_vector <= to_uint() +----------------------------------------------------------------- +TU1 = 1001 9 +TU2 = 10000000000000000000000000000001 2147483649 +TU3 = 0000000110000000000000000000000000000001 2147483649 +TU4 = 1101 1 (01) +TU4 = 1101 13 (1101) +TU4 = 1101 13 (00001101) + +std_ulogic_vector <= to_int() +----------------------------------------------------------------- +TS1 = 1001 -7 +TS2 = 11111111111111111111101111111001 -1031 +TS3 = 0000000111111111111111111111101111111001 -1031 +TS4 = 11001 1 (001) +TS4 = 11001 -7 (11001) +TS4 = 11001 -7 (111111001) + +std_ulogic_vector <= Typecast sc_unsigned +----------------------------------------------------------------- +TCU1 = 1101 1 (01) +TCU1 = 1101 13 (1101) +TCU1 = 1101 13 (00001101) + +std_ulogic_vector <= Typecast sc_signed +----------------------------------------------------------------- +TCS1 = 11001 1 (001) +TCS1 = 11001 -7 (11001) +TCS1 = 11001 25 (000011001) + +std_ulogic_vector <= to_string() +-------------------------------------------- +TSTR = XXZ01XXXX XXZ01XXXX + +range() tests +----------------------------------------------------------------- +INITIAL 4-BIT 1000 +INITIAL 9-BIT XXZ01XXXX + +LVALUE RISE 1 0 0 0 +LVALUE FALL 0 0 0 1 +LVALUE SUB RISE 0 1 0 0 +LVALUE SUB FALL X X X X 1 0 Z X X +LVALUE BIT 1 1 0 1 + +RVALUE RISE 1 0 0 0 +RVALUE FALL 0 0 0 1 +RVALUE SUB FALL X X X X 1 0 Z X X +RVALUE SUB RISE 1 0 0 0 +RVALUE BIT [] 1 0 1 1 +RVALUE BIT 0 0 1 0 + +op1 operator op2 result [All operands are std_ulogic_vector] +---------------------------------------------------------------- +1010 &= 1000 = 1000 +1010 ^= 1000 = 0010 +1010 |= 1000 = 1010 +~(1010) = 0101 +1010 & 1000 = 1000 +1010 ^ 1000 = 0010 +1010 | 1000 = 1010 + +1010 &= 111011 = 1010 +1010 ^= 111011 = 0001 +1010 |= 111011 = 1011 +1010 & 111011 = 1010 +1010 ^ 111011 = 0001 +1010 | 111011 = 1011 + +1010 and_reduce() = 0 +1010 or_reduce() = 1 +1010 xor_reduce() = 0 + +1010 == 1000 -> false +1010 != 1000 -> true + +1111 = 1111 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log new file mode 100644 index 000000000..7947cc42e --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log @@ -0,0 +1,203 @@ +SystemC Simulation + +INTEGER SIZE = 4 bytes +SHORT INTEGER SIZE = 2 bytes +LONG INTEGER SIZE = 4 bytes +UNSIGNED LONG SIZE = 4 bytes +SIGNED LONG SIZE = 4 bytes + +std_ulogic_vector <= C++ string +------------------------------------------- +A = 01XZXXXXX "01XZUWLH-" +B = XX0XX1XXX "ZZ1XX0UU1WWW" +BIG = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" +HUGE = 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111 + +std_ulogic_vector <= std_ulogic_vector +-------------------------------------------------- +C = XX0XX1XXX ZZ1XX0XX1XXX +BIG2 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" + +std_ulogic_vector <= C++ array of bool +-------------------------------------------------- +D = XXXXZX10X -, L, H, W, Z, X, 1, 0, U +E = 10011XXXX X, X, 1, 1, 0, 0, 1, 1, X, X, U, U +BIG3 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111 + 000011110000" + +std_ulogic_vector <= bool_vector +-------------------------------------------- +F = 1010 "1010" + +std_ulogic_vector <= unsigned long +---------------------------------------------- +H = 1001 ...10001001 (137) +I = 00000000000000000000000010001001 ...10001001 (137) +J = 0000000000000000000000000000000010001001 ...10001001 (137) + +std_ulogic_vector <= sc_unsigned +-------------------------------------------- +K = 0011 11 (3) +L = 1101 1101 (13) +M = 1001 10001001 (137) + +std_ulogic_vector <= signed long +-------------------------------------------- +N = 01001 ...010001001 (137) +O = 00000000000000000000000010001001 ...010001001 (137) +P = 0000000000000000000000000000000010001001 ...010001001 (137) +Q = 10111 ...101110111 (-137) +R = 11111111111111111111111101110111 ...101110111 (-137) +S = 1111111111111111111111111111111101110111 ...101110111 (-137) + +std_ulogic_vector <= sc_signed +------------------------------------------ +T = 00011 011 (3) +U = 01101 01101 (13) +V = 01001 010001001 (137) +W = 11101 101 (-3) +X = 10011 10011 (-13) +Y = 10111 101110111 (-137) + +std_ulogic_vector <= to_uint() +----------------------------------------------------------------- +TU1 = 1001 9 +TU2 = 10000000000000000000000000000001 2147483649 +TU3 = 0000000110000000000000000000000000000001 2147483649 +TU4 = 1101 1 (01) +TU4 = 1101 13 (1101) +TU4 = 1101 13 (00001101) + +std_ulogic_vector <= to_int() +----------------------------------------------------------------- +TS1 = 1001 -7 +TS2 = 11111111111111111111101111111001 -1031 +TS3 = 0000000111111111111111111111101111111001 -1031 +TS4 = 11001 1 (001) +TS4 = 11001 -7 (11001) +TS4 = 11001 -7 (111111001) + +std_ulogic_vector <= Typecast sc_unsigned +----------------------------------------------------------------- +TCU1 = 1101 1 (01) +TCU1 = 1101 13 (1101) +TCU1 = 1101 13 (00001101) + +std_ulogic_vector <= Typecast sc_signed +----------------------------------------------------------------- +TCS1 = 11001 1 (001) +TCS1 = 11001 -7 (11001) +TCS1 = 11001 25 (000011001) + +std_ulogic_vector <= to_string() +-------------------------------------------- +TSTR = XXZ01XXXX XXZ01XXXX + +range() tests +----------------------------------------------------------------- +INITIAL 4-BIT 1000 +INITIAL 9-BIT XXZ01XXXX + +LVALUE RISE 1 0 0 0 +LVALUE FALL 0 0 0 1 +LVALUE SUB RISE 0 1 0 0 +LVALUE SUB FALL X X X X 1 0 Z X X +LVALUE BIT 1 1 0 1 + +RVALUE RISE 1 0 0 0 +RVALUE FALL 0 0 0 1 +RVALUE SUB FALL X X X X 1 0 Z X X +RVALUE SUB RISE 1 0 0 0 +RVALUE BIT [] 1 0 1 1 +RVALUE BIT 0 0 1 0 + +op1 operator op2 result [All operands are std_ulogic_vector] +---------------------------------------------------------------- +1010 &= 1000 = 1000 +1010 ^= 1000 = 0010 +1010 |= 1000 = 1010 +~(1010) = 0101 +1010 & 1000 = 1000 +1010 ^ 1000 = 0010 +1010 | 1000 = 1010 + +1010 &= 111011 = 1010 +1010 ^= 111011 = 0001 +1010 |= 111011 = 1011 +1010 & 111011 = 1010 +1010 ^ 111011 = 0001 +1010 | 111011 = 1011 + +1010 and_reduce() = 0 +1010 or_reduce() = 1 +1010 xor_reduce() = 0 + +1010 == 1000 -> false +1010 != 1000 -> true + +1111 = 1111 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.bsd64 b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.bsd64 new file mode 100644 index 000000000..d168d15ca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.bsd64 @@ -0,0 +1,203 @@ +SystemC Simulation + +INTEGER SIZE = 4 bytes +SHORT INTEGER SIZE = 2 bytes +LONG INTEGER SIZE = 8 bytes +UNSIGNED LONG SIZE = 8 bytes +SIGNED LONG SIZE = 8 bytes + +std_ulogic_vector <= C++ string +------------------------------------------- +A = 01XZXXXXX "01XZUWLH-" +B = XX0XX1XXX "ZZ1XX0UU1WWW" +BIG = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" +HUGE = 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111 + +std_ulogic_vector <= std_ulogic_vector +-------------------------------------------------- +C = XX0XX1XXX ZZ1XX0XX1XXX +BIG2 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" + +std_ulogic_vector <= C++ array of bool +-------------------------------------------------- +D = XXXXZX10X -, L, H, W, Z, X, 1, 0, U +E = 10011XXXX X, X, 1, 1, 0, 0, 1, 1, X, X, U, U +BIG3 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111 + 000011110000" + +std_ulogic_vector <= bool_vector +-------------------------------------------- +F = 1010 "1010" + +std_ulogic_vector <= unsigned long +---------------------------------------------- +H = 1001 ...10001001 (137) +I = 00000000000000000000000010001001 ...10001001 (137) +J = 0000000000000000000000000000000010001001 ...10001001 (137) + +std_ulogic_vector <= sc_unsigned +-------------------------------------------- +K = 0011 11 (3) +L = 1101 1101 (13) +M = 1001 10001001 (137) + +std_ulogic_vector <= signed long +-------------------------------------------- +N = 01001 ...010001001 (137) +O = 00000000000000000000000010001001 ...010001001 (137) +P = 0000000000000000000000000000000010001001 ...010001001 (137) +Q = 10111 ...101110111 (-137) +R = 11111111111111111111111101110111 ...101110111 (-137) +S = 1111111111111111111111111111111101110111 ...101110111 (-137) + +std_ulogic_vector <= sc_signed +------------------------------------------ +T = 00011 011 (3) +U = 01101 01101 (13) +V = 01001 010001001 (137) +W = 11101 101 (-3) +X = 10011 10011 (-13) +Y = 10111 101110111 (-137) + +std_ulogic_vector <= to_uint() +----------------------------------------------------------------- +TU1 = 1001 9 +TU2 = 10000000000000000000000000000001 2147483649 +TU3 = 0000000110000000000000000000000000000001 2147483649 +TU4 = 1101 1 (01) +TU4 = 1101 13 (1101) +TU4 = 1101 13 (00001101) + +std_ulogic_vector <= to_int() +----------------------------------------------------------------- +TS1 = 1001 -7 +TS2 = 11111111111111111111101111111001 -1031 +TS3 = 0000000111111111111111111111101111111001 -1031 +TS4 = 11001 1 (001) +TS4 = 11001 -7 (11001) +TS4 = 11001 -7 (111111001) + +std_ulogic_vector <= Typecast sc_unsigned +----------------------------------------------------------------- +TCU1 = 1101 1 (01) +TCU1 = 1101 13 (1101) +TCU1 = 1101 13 (00001101) + +std_ulogic_vector <= Typecast sc_signed +----------------------------------------------------------------- +TCS1 = 11001 1 (001) +TCS1 = 11001 -7 (11001) +TCS1 = 11001 25 (000011001) + +std_ulogic_vector <= to_string() +-------------------------------------------- +TSTR = XXZ01XXXX XXZ01XXXX + +range() tests +----------------------------------------------------------------- +INITIAL 4-BIT 1000 +INITIAL 9-BIT XXZ01XXXX + +LVALUE RISE 1 0 0 0 +LVALUE FALL 0 0 0 1 +LVALUE SUB RISE 0 1 0 0 +LVALUE SUB FALL X X X X 1 0 Z X X +LVALUE BIT 1 1 0 1 + +RVALUE RISE 1 0 0 0 +RVALUE FALL 0 0 0 1 +RVALUE SUB FALL X X X X 1 0 Z X X +RVALUE SUB RISE 1 0 0 0 +RVALUE BIT [] 1 0 1 1 +RVALUE BIT 0 0 1 0 + +op1 operator op2 result [All operands are std_ulogic_vector] +---------------------------------------------------------------- +1010 &= 1000 = 1000 +1010 ^= 1000 = 0010 +1010 |= 1000 = 1010 +~(1010) = 0101 +1010 & 1000 = 1000 +1010 ^ 1000 = 0010 +1010 | 1000 = 1010 + +1010 &= 111011 = 1010 +1010 ^= 111011 = 0001 +1010 |= 111011 = 1011 +1010 & 111011 = 1010 +1010 ^ 111011 = 0001 +1010 | 111011 = 1011 + +1010 and_reduce() = 0 +1010 or_reduce() = 1 +1010 xor_reduce() = 0 + +1010 == 1000 -> false +1010 != 1000 -> true + +1111 = 1111 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.cygwin64 b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.cygwin64 new file mode 100644 index 000000000..d168d15ca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.cygwin64 @@ -0,0 +1,203 @@ +SystemC Simulation + +INTEGER SIZE = 4 bytes +SHORT INTEGER SIZE = 2 bytes +LONG INTEGER SIZE = 8 bytes +UNSIGNED LONG SIZE = 8 bytes +SIGNED LONG SIZE = 8 bytes + +std_ulogic_vector <= C++ string +------------------------------------------- +A = 01XZXXXXX "01XZUWLH-" +B = XX0XX1XXX "ZZ1XX0UU1WWW" +BIG = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" +HUGE = 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111 + +std_ulogic_vector <= std_ulogic_vector +-------------------------------------------------- +C = XX0XX1XXX ZZ1XX0XX1XXX +BIG2 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" + +std_ulogic_vector <= C++ array of bool +-------------------------------------------------- +D = XXXXZX10X -, L, H, W, Z, X, 1, 0, U +E = 10011XXXX X, X, 1, 1, 0, 0, 1, 1, X, X, U, U +BIG3 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111 + 000011110000" + +std_ulogic_vector <= bool_vector +-------------------------------------------- +F = 1010 "1010" + +std_ulogic_vector <= unsigned long +---------------------------------------------- +H = 1001 ...10001001 (137) +I = 00000000000000000000000010001001 ...10001001 (137) +J = 0000000000000000000000000000000010001001 ...10001001 (137) + +std_ulogic_vector <= sc_unsigned +-------------------------------------------- +K = 0011 11 (3) +L = 1101 1101 (13) +M = 1001 10001001 (137) + +std_ulogic_vector <= signed long +-------------------------------------------- +N = 01001 ...010001001 (137) +O = 00000000000000000000000010001001 ...010001001 (137) +P = 0000000000000000000000000000000010001001 ...010001001 (137) +Q = 10111 ...101110111 (-137) +R = 11111111111111111111111101110111 ...101110111 (-137) +S = 1111111111111111111111111111111101110111 ...101110111 (-137) + +std_ulogic_vector <= sc_signed +------------------------------------------ +T = 00011 011 (3) +U = 01101 01101 (13) +V = 01001 010001001 (137) +W = 11101 101 (-3) +X = 10011 10011 (-13) +Y = 10111 101110111 (-137) + +std_ulogic_vector <= to_uint() +----------------------------------------------------------------- +TU1 = 1001 9 +TU2 = 10000000000000000000000000000001 2147483649 +TU3 = 0000000110000000000000000000000000000001 2147483649 +TU4 = 1101 1 (01) +TU4 = 1101 13 (1101) +TU4 = 1101 13 (00001101) + +std_ulogic_vector <= to_int() +----------------------------------------------------------------- +TS1 = 1001 -7 +TS2 = 11111111111111111111101111111001 -1031 +TS3 = 0000000111111111111111111111101111111001 -1031 +TS4 = 11001 1 (001) +TS4 = 11001 -7 (11001) +TS4 = 11001 -7 (111111001) + +std_ulogic_vector <= Typecast sc_unsigned +----------------------------------------------------------------- +TCU1 = 1101 1 (01) +TCU1 = 1101 13 (1101) +TCU1 = 1101 13 (00001101) + +std_ulogic_vector <= Typecast sc_signed +----------------------------------------------------------------- +TCS1 = 11001 1 (001) +TCS1 = 11001 -7 (11001) +TCS1 = 11001 25 (000011001) + +std_ulogic_vector <= to_string() +-------------------------------------------- +TSTR = XXZ01XXXX XXZ01XXXX + +range() tests +----------------------------------------------------------------- +INITIAL 4-BIT 1000 +INITIAL 9-BIT XXZ01XXXX + +LVALUE RISE 1 0 0 0 +LVALUE FALL 0 0 0 1 +LVALUE SUB RISE 0 1 0 0 +LVALUE SUB FALL X X X X 1 0 Z X X +LVALUE BIT 1 1 0 1 + +RVALUE RISE 1 0 0 0 +RVALUE FALL 0 0 0 1 +RVALUE SUB FALL X X X X 1 0 Z X X +RVALUE SUB RISE 1 0 0 0 +RVALUE BIT [] 1 0 1 1 +RVALUE BIT 0 0 1 0 + +op1 operator op2 result [All operands are std_ulogic_vector] +---------------------------------------------------------------- +1010 &= 1000 = 1000 +1010 ^= 1000 = 0010 +1010 |= 1000 = 1010 +~(1010) = 0101 +1010 & 1000 = 1000 +1010 ^ 1000 = 0010 +1010 | 1000 = 1010 + +1010 &= 111011 = 1010 +1010 ^= 111011 = 0001 +1010 |= 111011 = 1011 +1010 & 111011 = 1010 +1010 ^ 111011 = 0001 +1010 | 111011 = 1011 + +1010 and_reduce() = 0 +1010 or_reduce() = 1 +1010 xor_reduce() = 0 + +1010 == 1000 -> false +1010 != 1000 -> true + +1111 = 1111 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linux64 b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linux64 new file mode 100644 index 000000000..d168d15ca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linux64 @@ -0,0 +1,203 @@ +SystemC Simulation + +INTEGER SIZE = 4 bytes +SHORT INTEGER SIZE = 2 bytes +LONG INTEGER SIZE = 8 bytes +UNSIGNED LONG SIZE = 8 bytes +SIGNED LONG SIZE = 8 bytes + +std_ulogic_vector <= C++ string +------------------------------------------- +A = 01XZXXXXX "01XZUWLH-" +B = XX0XX1XXX "ZZ1XX0UU1WWW" +BIG = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" +HUGE = 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111 + +std_ulogic_vector <= std_ulogic_vector +-------------------------------------------------- +C = XX0XX1XXX ZZ1XX0XX1XXX +BIG2 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" + +std_ulogic_vector <= C++ array of bool +-------------------------------------------------- +D = XXXXZX10X -, L, H, W, Z, X, 1, 0, U +E = 10011XXXX X, X, 1, 1, 0, 0, 1, 1, X, X, U, U +BIG3 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111 + 000011110000" + +std_ulogic_vector <= bool_vector +-------------------------------------------- +F = 1010 "1010" + +std_ulogic_vector <= unsigned long +---------------------------------------------- +H = 1001 ...10001001 (137) +I = 00000000000000000000000010001001 ...10001001 (137) +J = 0000000000000000000000000000000010001001 ...10001001 (137) + +std_ulogic_vector <= sc_unsigned +-------------------------------------------- +K = 0011 11 (3) +L = 1101 1101 (13) +M = 1001 10001001 (137) + +std_ulogic_vector <= signed long +-------------------------------------------- +N = 01001 ...010001001 (137) +O = 00000000000000000000000010001001 ...010001001 (137) +P = 0000000000000000000000000000000010001001 ...010001001 (137) +Q = 10111 ...101110111 (-137) +R = 11111111111111111111111101110111 ...101110111 (-137) +S = 1111111111111111111111111111111101110111 ...101110111 (-137) + +std_ulogic_vector <= sc_signed +------------------------------------------ +T = 00011 011 (3) +U = 01101 01101 (13) +V = 01001 010001001 (137) +W = 11101 101 (-3) +X = 10011 10011 (-13) +Y = 10111 101110111 (-137) + +std_ulogic_vector <= to_uint() +----------------------------------------------------------------- +TU1 = 1001 9 +TU2 = 10000000000000000000000000000001 2147483649 +TU3 = 0000000110000000000000000000000000000001 2147483649 +TU4 = 1101 1 (01) +TU4 = 1101 13 (1101) +TU4 = 1101 13 (00001101) + +std_ulogic_vector <= to_int() +----------------------------------------------------------------- +TS1 = 1001 -7 +TS2 = 11111111111111111111101111111001 -1031 +TS3 = 0000000111111111111111111111101111111001 -1031 +TS4 = 11001 1 (001) +TS4 = 11001 -7 (11001) +TS4 = 11001 -7 (111111001) + +std_ulogic_vector <= Typecast sc_unsigned +----------------------------------------------------------------- +TCU1 = 1101 1 (01) +TCU1 = 1101 13 (1101) +TCU1 = 1101 13 (00001101) + +std_ulogic_vector <= Typecast sc_signed +----------------------------------------------------------------- +TCS1 = 11001 1 (001) +TCS1 = 11001 -7 (11001) +TCS1 = 11001 25 (000011001) + +std_ulogic_vector <= to_string() +-------------------------------------------- +TSTR = XXZ01XXXX XXZ01XXXX + +range() tests +----------------------------------------------------------------- +INITIAL 4-BIT 1000 +INITIAL 9-BIT XXZ01XXXX + +LVALUE RISE 1 0 0 0 +LVALUE FALL 0 0 0 1 +LVALUE SUB RISE 0 1 0 0 +LVALUE SUB FALL X X X X 1 0 Z X X +LVALUE BIT 1 1 0 1 + +RVALUE RISE 1 0 0 0 +RVALUE FALL 0 0 0 1 +RVALUE SUB FALL X X X X 1 0 Z X X +RVALUE SUB RISE 1 0 0 0 +RVALUE BIT [] 1 0 1 1 +RVALUE BIT 0 0 1 0 + +op1 operator op2 result [All operands are std_ulogic_vector] +---------------------------------------------------------------- +1010 &= 1000 = 1000 +1010 ^= 1000 = 0010 +1010 |= 1000 = 1010 +~(1010) = 0101 +1010 & 1000 = 1000 +1010 ^ 1000 = 0010 +1010 | 1000 = 1010 + +1010 &= 111011 = 1010 +1010 ^= 111011 = 0001 +1010 |= 111011 = 1011 +1010 & 111011 = 1010 +1010 ^ 111011 = 0001 +1010 | 111011 = 1011 + +1010 and_reduce() = 0 +1010 or_reduce() = 1 +1010 xor_reduce() = 0 + +1010 == 1000 -> false +1010 != 1000 -> true + +1111 = 1111 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linuxaarch64 b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linuxaarch64 new file mode 100644 index 000000000..d168d15ca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.linuxaarch64 @@ -0,0 +1,203 @@ +SystemC Simulation + +INTEGER SIZE = 4 bytes +SHORT INTEGER SIZE = 2 bytes +LONG INTEGER SIZE = 8 bytes +UNSIGNED LONG SIZE = 8 bytes +SIGNED LONG SIZE = 8 bytes + +std_ulogic_vector <= C++ string +------------------------------------------- +A = 01XZXXXXX "01XZUWLH-" +B = XX0XX1XXX "ZZ1XX0UU1WWW" +BIG = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" +HUGE = 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111 + +std_ulogic_vector <= std_ulogic_vector +-------------------------------------------------- +C = XX0XX1XXX ZZ1XX0XX1XXX +BIG2 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" + +std_ulogic_vector <= C++ array of bool +-------------------------------------------------- +D = XXXXZX10X -, L, H, W, Z, X, 1, 0, U +E = 10011XXXX X, X, 1, 1, 0, 0, 1, 1, X, X, U, U +BIG3 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111 + 000011110000" + +std_ulogic_vector <= bool_vector +-------------------------------------------- +F = 1010 "1010" + +std_ulogic_vector <= unsigned long +---------------------------------------------- +H = 1001 ...10001001 (137) +I = 00000000000000000000000010001001 ...10001001 (137) +J = 0000000000000000000000000000000010001001 ...10001001 (137) + +std_ulogic_vector <= sc_unsigned +-------------------------------------------- +K = 0011 11 (3) +L = 1101 1101 (13) +M = 1001 10001001 (137) + +std_ulogic_vector <= signed long +-------------------------------------------- +N = 01001 ...010001001 (137) +O = 00000000000000000000000010001001 ...010001001 (137) +P = 0000000000000000000000000000000010001001 ...010001001 (137) +Q = 10111 ...101110111 (-137) +R = 11111111111111111111111101110111 ...101110111 (-137) +S = 1111111111111111111111111111111101110111 ...101110111 (-137) + +std_ulogic_vector <= sc_signed +------------------------------------------ +T = 00011 011 (3) +U = 01101 01101 (13) +V = 01001 010001001 (137) +W = 11101 101 (-3) +X = 10011 10011 (-13) +Y = 10111 101110111 (-137) + +std_ulogic_vector <= to_uint() +----------------------------------------------------------------- +TU1 = 1001 9 +TU2 = 10000000000000000000000000000001 2147483649 +TU3 = 0000000110000000000000000000000000000001 2147483649 +TU4 = 1101 1 (01) +TU4 = 1101 13 (1101) +TU4 = 1101 13 (00001101) + +std_ulogic_vector <= to_int() +----------------------------------------------------------------- +TS1 = 1001 -7 +TS2 = 11111111111111111111101111111001 -1031 +TS3 = 0000000111111111111111111111101111111001 -1031 +TS4 = 11001 1 (001) +TS4 = 11001 -7 (11001) +TS4 = 11001 -7 (111111001) + +std_ulogic_vector <= Typecast sc_unsigned +----------------------------------------------------------------- +TCU1 = 1101 1 (01) +TCU1 = 1101 13 (1101) +TCU1 = 1101 13 (00001101) + +std_ulogic_vector <= Typecast sc_signed +----------------------------------------------------------------- +TCS1 = 11001 1 (001) +TCS1 = 11001 -7 (11001) +TCS1 = 11001 25 (000011001) + +std_ulogic_vector <= to_string() +-------------------------------------------- +TSTR = XXZ01XXXX XXZ01XXXX + +range() tests +----------------------------------------------------------------- +INITIAL 4-BIT 1000 +INITIAL 9-BIT XXZ01XXXX + +LVALUE RISE 1 0 0 0 +LVALUE FALL 0 0 0 1 +LVALUE SUB RISE 0 1 0 0 +LVALUE SUB FALL X X X X 1 0 Z X X +LVALUE BIT 1 1 0 1 + +RVALUE RISE 1 0 0 0 +RVALUE FALL 0 0 0 1 +RVALUE SUB FALL X X X X 1 0 Z X X +RVALUE SUB RISE 1 0 0 0 +RVALUE BIT [] 1 0 1 1 +RVALUE BIT 0 0 1 0 + +op1 operator op2 result [All operands are std_ulogic_vector] +---------------------------------------------------------------- +1010 &= 1000 = 1000 +1010 ^= 1000 = 0010 +1010 |= 1000 = 1010 +~(1010) = 0101 +1010 & 1000 = 1000 +1010 ^ 1000 = 0010 +1010 | 1000 = 1010 + +1010 &= 111011 = 1010 +1010 ^= 111011 = 0001 +1010 |= 111011 = 1011 +1010 & 111011 = 1010 +1010 ^ 111011 = 0001 +1010 | 111011 = 1011 + +1010 and_reduce() = 0 +1010 or_reduce() = 1 +1010 xor_reduce() = 0 + +1010 == 1000 -> false +1010 != 1000 -> true + +1111 = 1111 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.macosx64 b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.macosx64 new file mode 100644 index 000000000..d168d15ca --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/golden/std_ulogic_vector_datatype.log.macosx64 @@ -0,0 +1,203 @@ +SystemC Simulation + +INTEGER SIZE = 4 bytes +SHORT INTEGER SIZE = 2 bytes +LONG INTEGER SIZE = 8 bytes +UNSIGNED LONG SIZE = 8 bytes +SIGNED LONG SIZE = 8 bytes + +std_ulogic_vector <= C++ string +------------------------------------------- +A = 01XZXXXXX "01XZUWLH-" +B = XX0XX1XXX "ZZ1XX0UU1WWW" +BIG = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" +HUGE = 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111000011110000111100001111000011110000111100001111000011110000 + 1111 + +std_ulogic_vector <= std_ulogic_vector +-------------------------------------------------- +C = XX0XX1XXX ZZ1XX0XX1XXX +BIG2 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111" + +std_ulogic_vector <= C++ array of bool +-------------------------------------------------- +D = XXXXZX10X -, L, H, W, Z, X, 1, 0, U +E = 10011XXXX X, X, 1, 1, 0, 0, 1, 1, X, X, U, U +BIG3 = 11110000111100001111000011110000111100001111000011110000111100001111 + "11110000111100001111000011110000111100001111000011110000111100001111 + 000011110000" + +std_ulogic_vector <= bool_vector +-------------------------------------------- +F = 1010 "1010" + +std_ulogic_vector <= unsigned long +---------------------------------------------- +H = 1001 ...10001001 (137) +I = 00000000000000000000000010001001 ...10001001 (137) +J = 0000000000000000000000000000000010001001 ...10001001 (137) + +std_ulogic_vector <= sc_unsigned +-------------------------------------------- +K = 0011 11 (3) +L = 1101 1101 (13) +M = 1001 10001001 (137) + +std_ulogic_vector <= signed long +-------------------------------------------- +N = 01001 ...010001001 (137) +O = 00000000000000000000000010001001 ...010001001 (137) +P = 0000000000000000000000000000000010001001 ...010001001 (137) +Q = 10111 ...101110111 (-137) +R = 11111111111111111111111101110111 ...101110111 (-137) +S = 1111111111111111111111111111111101110111 ...101110111 (-137) + +std_ulogic_vector <= sc_signed +------------------------------------------ +T = 00011 011 (3) +U = 01101 01101 (13) +V = 01001 010001001 (137) +W = 11101 101 (-3) +X = 10011 10011 (-13) +Y = 10111 101110111 (-137) + +std_ulogic_vector <= to_uint() +----------------------------------------------------------------- +TU1 = 1001 9 +TU2 = 10000000000000000000000000000001 2147483649 +TU3 = 0000000110000000000000000000000000000001 2147483649 +TU4 = 1101 1 (01) +TU4 = 1101 13 (1101) +TU4 = 1101 13 (00001101) + +std_ulogic_vector <= to_int() +----------------------------------------------------------------- +TS1 = 1001 -7 +TS2 = 11111111111111111111101111111001 -1031 +TS3 = 0000000111111111111111111111101111111001 -1031 +TS4 = 11001 1 (001) +TS4 = 11001 -7 (11001) +TS4 = 11001 -7 (111111001) + +std_ulogic_vector <= Typecast sc_unsigned +----------------------------------------------------------------- +TCU1 = 1101 1 (01) +TCU1 = 1101 13 (1101) +TCU1 = 1101 13 (00001101) + +std_ulogic_vector <= Typecast sc_signed +----------------------------------------------------------------- +TCS1 = 11001 1 (001) +TCS1 = 11001 -7 (11001) +TCS1 = 11001 25 (000011001) + +std_ulogic_vector <= to_string() +-------------------------------------------- +TSTR = XXZ01XXXX XXZ01XXXX + +range() tests +----------------------------------------------------------------- +INITIAL 4-BIT 1000 +INITIAL 9-BIT XXZ01XXXX + +LVALUE RISE 1 0 0 0 +LVALUE FALL 0 0 0 1 +LVALUE SUB RISE 0 1 0 0 +LVALUE SUB FALL X X X X 1 0 Z X X +LVALUE BIT 1 1 0 1 + +RVALUE RISE 1 0 0 0 +RVALUE FALL 0 0 0 1 +RVALUE SUB FALL X X X X 1 0 Z X X +RVALUE SUB RISE 1 0 0 0 +RVALUE BIT [] 1 0 1 1 +RVALUE BIT 0 0 1 0 + +op1 operator op2 result [All operands are std_ulogic_vector] +---------------------------------------------------------------- +1010 &= 1000 = 1000 +1010 ^= 1000 = 0010 +1010 |= 1000 = 1010 +~(1010) = 0101 +1010 & 1000 = 1000 +1010 ^ 1000 = 0010 +1010 | 1000 = 1010 + +1010 &= 111011 = 1010 +1010 ^= 111011 = 0001 +1010 |= 111011 = 1011 +1010 & 111011 = 1010 +1010 ^ 111011 = 0001 +1010 | 111011 = 1011 + +1010 and_reduce() = 0 +1010 or_reduce() = 1 +1010 xor_reduce() = 0 + +1010 == 1000 -> false +1010 != 1000 -> true + +1111 = 1111 + ++-------------------------+ +| AND (&) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | 0 | X | X | ++-------------------------+ +| 0 | 0 | 0 | 0 | 0 | ++-------------------------+ +| 1 | X | 0 | 1 | X | ++-------------------------+ +| Z | X | 0 | X | X | ++-------------------------+ + ++-------------------------+ +| OR (|) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | 1 | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | 1 | 1 | 1 | 1 | ++-------------------------+ +| Z | X | X | 1 | X | ++-------------------------+ + ++-------------------------+ +| XOR (^) | X | 0 | 1 | Z | ++-------------------------+ +| X | X | X | X | X | ++-------------------------+ +| 0 | X | 0 | 1 | X | ++-------------------------+ +| 1 | X | 1 | 0 | X | ++-------------------------+ +| Z | X | X | X | X | ++-------------------------+ + ++-------------------------+ +| NOT (~) | X | 0 | 1 | Z | ++-------------------------+ +| | X | 1 | 0 | X | ++-------------------------+ diff --git a/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/std_ulogic_vector_datatype.cpp b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/std_ulogic_vector_datatype.cpp new file mode 100644 index 000000000..f35433774 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/data/user_guide/ch9/std_ulogic_vector_datatype/std_ulogic_vector_datatype.cpp @@ -0,0 +1,772 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + std_ulogic_vector_datatype.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for "std_ulogic_vector" data type */ + +#include "systemc.h" + +typedef sc_logic std_ulogic; + +#define std_ulogic_vector sc_lv +#define bool_vector sc_bv + +int sc_main(int ac, char *av[]) +{ + +// 0. SIZE OF TYPES + int integer; + short short_integer; + long long_integer; + unsigned long unsigned_long; + signed long signed_long; + + cout << "\nINTEGER SIZE \t\t= " << sizeof integer << " bytes" + << "\nSHORT INTEGER SIZE \t= " << sizeof short_integer << " bytes" + << "\nLONG INTEGER SIZE \t= " << sizeof long_integer << " bytes" + << "\nUNSIGNED LONG SIZE \t= " << sizeof unsigned_long << " bytes" + << "\nSIGNED LONG SIZE \t= " << sizeof signed_long << " bytes" + << "\n" << endl; + +// 1. DECLARATION SYNTAX + std_ulogic_vector<9> a; + std_ulogic_vector<9> b; + std_ulogic_vector<68> big; + std_ulogic_vector<1284> huge_; + +// 2. TYPE CONVERSION + + // std_ulogic_vector <- C++ string + a = "01XZUWLH-"; + b = "ZZ1XX0UU1WWW"; + big = "11110000111100001111000011110000111100001111000011110000111100001111"; + huge_ = "111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111000011110000111100001111"; + + cout << "std_ulogic_vector \t<=\t C++ string" + << "\n-------------------------------------------" + << "\nA = " << a << "\t\t \"01XZUWLH-\" " + << "\nB = " << b << "\t\t \"ZZ1XX0UU1WWW\" " + << "\nBIG = " << big << "\n " + <<"\"11110000111100001111000011110000111100001111000011110000111100001111\"" + << "\nHUGE = " << huge_.range(0,63) << "\n " + << huge_.range(64,127) << "\n " + << huge_.range(128,191) << "\n " + << huge_.range(192,255) << "\n " + << huge_.range(256,319) << "\n " + << huge_.range(320,383) << "\n " + << huge_.range(384,447) << "\n " + << huge_.range(448,511) << "\n " + << huge_.range(512,575) << "\n " + << huge_.range(576,639) << "\n " + << huge_.range(640,703) << "\n " + << huge_.range(704,767) << "\n " + << huge_.range(768,831) << "\n " + << huge_.range(832,895) << "\n " + << huge_.range(896,959) << "\n " + << huge_.range(960,1023) << "\n " + << huge_.range(1024,1087) << "\n " + << huge_.range(1088,1151) << "\n " + << huge_.range(1152,1215) << "\n " + << huge_.range(1216,1279) << "\n " + << huge_.range(1280,1283) + << "\n" << endl; + + // std_ulogic_vector <- std_ulogic_vector + std_ulogic_vector<9> c; + std_ulogic_vector<68> big2; + + c = b; + big2 = big; + + cout << "std_ulogic_vector \t<=\t std_ulogic_vector" + << "\n--------------------------------------------------" + << "\nC = " << c << "\t\t ZZ1XX0XX1XXX" + << "\nBIG2 = " << big2 << "\n " + <<"\"11110000111100001111000011110000111100001111000011110000111100001111\"" + << "\n" << endl; + + // std_ulogic_vector <- C++ array of std_ulogic + std_ulogic_vector<9> d; + std_ulogic_vector<9> e; + std_ulogic_vector<68> big3; + std_ulogic cb1[9] = { sc_logic( 'U' ), sc_logic( 0 ) , sc_logic( 1 ), + sc_logic( 'X' ), sc_logic( 'Z' ), sc_logic( 'W' ), + sc_logic( 'H' ), sc_logic( 'L' ), sc_logic( '-' ) }; + std_ulogic cb2[12] = { sc_logic( 'U' ), sc_logic( 'U' ), sc_logic( 'X' ), + sc_logic( 'X' ), sc_logic( 1 ) , sc_logic( 1 ), + sc_logic( 0 ) , sc_logic( 0 ) , sc_logic( 1 ), + sc_logic( 1 ) , sc_logic( 'X' ), sc_logic( 'X' ) }; + std_ulogic cb3[80] = { sc_logic( 1 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 0 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 0 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 1 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 1 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 0 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 0 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 1 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 1 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 0 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 0 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 1 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 1 ), sc_logic( 1 ), sc_logic( 1 ), + sc_logic( 1 ), sc_logic( 0 ), sc_logic( 0 ), + sc_logic( 0 ), sc_logic( 0 ) }; + + d = cb1; + e = cb2; + big3 = cb3; + + cout << "std_ulogic_vector \t<=\t C++ array of bool" + << "\n--------------------------------------------------" + << "\nD = " << d << "\t\t -, L, H, W, Z, X, 1, 0, U" + << "\nE = " << e << "\t\t X, X, 1, 1, 0, 0, 1, 1, X, X, U, U" + << "\nBIG3 = " << big3 << "\n " + <<"\"11110000111100001111000011110000111100001111000011110000111100001111" + <<"\n 000011110000\"" + << "\n" << endl; + + // std_ulogic_vector <- bool_vector + std_ulogic_vector<4> f; + bool_vector<4> sv1; + + sv1 = "1010"; + + f = sv1; + + cout << "std_ulogic_vector \t<=\t bool_vector" + << "\n--------------------------------------------" + << "\nF = " << f << "\t\t \"1010\" " + << "\n" << endl; + + // std_ulogic_vector <- unsigned long + std_ulogic_vector<4> h; + std_ulogic_vector<32> i; + std_ulogic_vector<40> j; + unsigned long ul1 = 137; // ...10001001 + unsigned long ul2 = 137; // ...10001001 + unsigned long ul3 = 137; // ...10001001 + + h = ul1; + i = ul2; + j = ul3; + + cout << "std_ulogic_vector \t<=\t unsigned long" + << "\n----------------------------------------------" + << "\nH = " << h << "\t\t\t\t\t ...10001001 (137)" + << "\nI = " << i << "\t\t ...10001001 (137)" + << "\nJ = " << j << "\t ...10001001 (137)" + << "\n" << endl; + + // std_ulogic_vector <- sc_unsigned + std_ulogic_vector<4> k; + std_ulogic_vector<4> l; + std_ulogic_vector<4> m; + sc_biguint<2> scu1; + sc_biguint<4> scu2; + sc_biguint<8> scu3; + + scu1 = 3; // .........11 + scu2 = 13; // .......1101 + scu3 = 137; // ...10001001 + + k = scu1; + l = scu2; + m = scu3; + + cout << "std_ulogic_vector \t<=\t sc_unsigned" + << "\n--------------------------------------------" + << "\nK = " << k << "\t\t 11 (3)" + << "\nL = " << l << "\t\t 1101 (13)" + << "\nM = " << m << "\t\t 10001001 (137)" + << "\n" << endl; + + // std_ulogic_vector <- signed long + std_ulogic_vector<5> n; + std_ulogic_vector<32> o; + std_ulogic_vector<40> p; + std_ulogic_vector<5> q; + std_ulogic_vector<32> r; + std_ulogic_vector<40> s; + signed long sl1 = 137; // ...010001001 + signed long sl2 = 137; // ...010001001 + signed long sl3 = 137; // ...010001001 + signed long sl4 = -137; // ...101110111 + signed long sl5 = -137; // ...101110111 + signed long sl6 = -137; // ...101110111 + + n = sl1; + o = sl2; + p = sl3; + q = sl4; + r = sl5; + s = sl6; + + cout << "std_ulogic_vector \t<=\t signed long" + << "\n--------------------------------------------" + << "\nN = " << n << "\t\t\t\t\t ...010001001 (137)" + << "\nO = " << o << "\t\t ...010001001 (137)" + << "\nP = " << p << "\t ...010001001 (137)" + << "\nQ = " << q << "\t\t\t\t\t ...101110111 (-137)" + << "\nR = " << r << "\t\t ...101110111 (-137)" + << "\nS = " << s << "\t ...101110111 (-137)" + << "\n" << endl; + + // std_ulogic_vector <- sc_signed + std_ulogic_vector<5> t; + std_ulogic_vector<5> u; + std_ulogic_vector<5> v; + std_ulogic_vector<5> w; + std_ulogic_vector<5> x; + std_ulogic_vector<5> y; + sc_bigint<3> scs1; + sc_bigint<5> scs2; + sc_bigint<9> scs3; + sc_bigint<3> scs4; + sc_bigint<5> scs5; + sc_bigint<9> scs6; + + scs1 = 3; // ........011 + scs2 = 13; // ......01101 + scs3 = 137; // ..010001001 + scs4 = -3; // ........101 + scs5 = -13; // ......10011 + scs6 = -137; // ..101110111 + + t = scs1; + u = scs2; + v = scs3; + w = scs4; + x = scs5; + y = scs6; + + cout << "std_ulogic_vector \t<=\t sc_signed" + << "\n------------------------------------------" + << "\nT = " << t << "\t\t 011 (3)" + << "\nU = " << u << "\t\t 01101 (13)" + << "\nV = " << v << "\t\t 010001001 (137)" + << "\nW = " << w << "\t\t 101 (-3)" + << "\nX = " << x << "\t\t 10011 (-13)" + << "\nY = " << y << "\t\t 101110111 (-137)" + << "\n" << endl; + + // std_ulogic_vector .to_uint() + std_ulogic_vector<4> tu1; + std_ulogic_vector<32> tu2; + std_ulogic_vector<40> tu3; + std_ulogic_vector<4> tu4; + sc_biguint<2> tu5; + sc_biguint<4> tu6; + sc_biguint<8> tu7; + + tu1 = "1001"; // 9 + tu2 = "10000000000000000000000000000001"; // 2147483649 + tu3 = "0000000110000000000000000000000000000001"; // 6442450945 + tu4 = "1101"; + tu5 = tu4.to_uint(); + tu6 = tu4.to_uint(); + tu7 = tu4.to_uint(); + + cout << "std_ulogic_vector \t\t<=\t\t to_uint()" + << "\n-----------------------------------------------------------------" + << "\nTU1 = \t\t\t\t " << tu1 << "\t " << tu1.to_uint() + << "\nTU2 = " << tu2 << "\t " << tu2.to_uint() + << "\nTU3 = " << tu3 << "\t " << tu3.to_uint() + << "\nTU4 = " << tu4 << " \t\t\t\t\t " << tu5 << "\t (" + << tu5[1] << tu5[0] << ")" + << "\nTU4 = " << tu4 << " \t\t\t\t\t " << tu6 << "\t (" + << tu6[3] << tu6[2] << tu6[1] << tu6[0] << ")" + << "\nTU4 = " << tu4 << " \t\t\t\t\t " << tu7 << "\t(" + << tu7[7] << tu7[6] << tu7[5] << tu7[4] + << tu7[3] << tu7[2] << tu7[1] << tu7[0] << ")" + << "\n" << endl; + + // std_ulogic_vector .to_int() + std_ulogic_vector<4> ts1; + std_ulogic_vector<32> ts2; + std_ulogic_vector<40> ts3; + std_ulogic_vector<5> ts4; + sc_bigint<3> ts5; + sc_bigint<5> ts6; + sc_bigint<9> ts7; + + ts1 = "1001"; // -7 + ts2 = "11111111111111111111101111111001"; // -1031 + ts3 = "0000000111111111111111111111101111111001"; // 8589933561 + ts4 = "11001"; + ts5 = ts4.to_int(); + ts6 = ts4.to_int(); + ts7 = ts4.to_int(); + + cout << "std_ulogic_vector \t\t<=\t\t to_int()" + << "\n-----------------------------------------------------------------" + << "\nTS1 = \t\t\t\t " << ts1 << "\t " << ts1.to_int() + << "\nTS2 = " << ts2 << "\t " << ts2.to_int() + << "\nTS3 = " << ts3 << "\t " << ts3.to_int() + << "\nTS4 = " << ts4 << " \t\t\t\t\t " << ts5 << "\t (" + << ts5[2] << ts5[1] << ts5[0] << ")" + << "\nTS4 = " << ts4 << " \t\t\t\t\t " << ts6 << "\t (" + << ts6[4] << ts6[3] << ts6[2] << ts6[1] << ts6[0] << ")" + << "\nTS4 = " << ts4 << " \t\t\t\t\t " << ts7 << "\t(" + << ts7[8] << ts7[7] << ts7[6] << ts7[5] + << ts7[4] << ts7[3] << ts7[2] << ts7[1] << ts7[0] << ")" + << "\n" << endl; + + // std_ulogic_vector Typecasted to sc_unsigned + std_ulogic_vector<4> tcu1; + sc_biguint<2> tcu2; + sc_biguint<4> tcu3; + sc_biguint<8> tcu4; + + tcu1 = "1101"; + tcu2 = tcu1; + tcu3 = tcu1; + tcu4 = tcu1; + + cout << "std_ulogic_vector \t\t<=\t\t Typecast sc_unsigned" + << "\n-----------------------------------------------------------------" + << "\nTCU1 = " << tcu1 << " \t\t\t\t\t " << tcu2 << "\t (" + << tcu2[1] << tcu2[0] << ")" + << "\nTCU1 = " << tcu1 << " \t\t\t\t\t " << tcu3 << "\t (" + << tcu3[3] << tcu3[2] << tcu3[1] << tcu3[0] << ")" + << "\nTCU1 = " << tcu1 << " \t\t\t\t\t " << tcu4 << "\t(" + << tcu4[7] << tcu4[6] << tcu4[5] << tcu4[4] + << tcu4[3] << tcu4[2] << tcu4[1] << tcu4[0] << ")" + << "\n" << endl; + + // std_ulogic_vector Typecasted to sc_signed + std_ulogic_vector<5> tcs1; + sc_bigint<3> tcs2; + sc_bigint<5> tcs3; + sc_bigint<9> tcs4; + + tcs1 = "11001"; + tcs2 = sc_bigint<3>(tcs1); + tcs3 = sc_bigint<5>(tcs1); + tcs4 = sc_bigint<9>(tcs1); + + cout << "std_ulogic_vector \t\t<=\t\t Typecast sc_signed" + << "\n-----------------------------------------------------------------" + << "\nTCS1 = " << tcs1 << " \t\t\t\t\t " << tcs2 << "\t (" + << tcs2[2] << tcs2[1] << tcs2[0] << ")" + << "\nTCS1 = " << tcs1 << " \t\t\t\t\t " << tcs3 << "\t (" + << tcs3[4] << tcs3[3] << tcs3[2] << tcs3[1] << tcs3[0] << ")" + << "\nTCS1 = " << tcs1 << " \t\t\t\t\t " << tcs4 << "\t(" + << tcs4[8] << tcs4[7] << tcs4[6] << tcs4[5] + << tcs4[4] << tcs4[3] << tcs4[2] << tcs4[1] << tcs4[0] << ")" + << "\n" << endl; + + // std_ulogic_vector .to_string() + std_ulogic_vector<9> tstr; + std::string str; + + tstr = "UXZ01WLH-"; + str = tstr.to_string(); + + cout << "std_ulogic_vector \t<=\t to_string()" + << "\n--------------------------------------------" + << "\nTSTR = " << tstr << " \t\t " << str + << endl; + + +// 3. OPERATORS +// Supported operators: ~ & ^ | &= ^= |= = [] range() +// and_reduce() or_reduce() xor_reduce() + std_ulogic_vector<4> ra; + std_ulogic_vector<4> rb; + std_ulogic_vector<4> rc; + std_ulogic_vector<9> rd; + std_ulogic_vector<4> re; + std_ulogic_vector<4> rf; + std_ulogic_vector<4> rg; + std_ulogic_vector<9> rh; + std_ulogic_vector<4> ri; + std_ulogic_vector<4> rj; + std_ulogic_vector<4> rl; + + std_ulogic_vector<4> rdata4; + std_ulogic_vector<9> rdata9; + + rdata4 = "1000"; + rdata9 = "UXZ01WHL-"; + + ra.range(0,3) = rdata4; + rb.range(3,0) = rdata4; + ( rc.range(1,3), rc.range(0,0) ) = rdata4; + ( rd.range(8,6), rd.range(5,0) ) = rdata9; + re = "1111"; + re.range(2,2) = std_ulogic_vector<1>( rdata4[1] ); + + rf = rdata4.range(0,3); + rg = rdata4.range(3,0); + rh = ( rdata9.range(8,6), rdata9.range(5,0) ); + ri = ( rdata4.range(0,1), rdata4.range(2,3) ); + rj = "1111"; + rj[1] = rdata4.range(2,2)[0]; + rl = ( rdata4.range(1,1), rdata4.range(3,3), + rdata4.range(0,0), rdata4.range(2,2) ); + + cout.precision(15); + cout << "\nrange() tests" + << "\n-----------------------------------------------------------------" + << "\nINITIAL 4-BIT \t" << rdata4 + << "\nINITIAL 9-BIT \t" << rdata9 << "\n" + << "\nLVALUE RISE \t" + << ra[0] << "\t" << ra[1] << "\t" << ra[2] << "\t" << ra[3] + << "\nLVALUE FALL \t" + << rb[0] << "\t" << rb[1] << "\t" << rb[2] << "\t" << rb[3] + << "\nLVALUE SUB RISE " + << rc[0] << "\t" << rc[1] << "\t" << rc[2] << "\t" << rc[3] + << "\nLVALUE SUB FALL " + << rd[0] << "\t" << rd[1] << "\t" << rd[2] << "\t" + << rd[3] << "\t" << rd[4] << "\t" << rd[5] << "\t" + << rd[6] << "\t" << rd[7] << "\t" << rd[8] + << "\nLVALUE BIT \t" + << re[0] << "\t" << re[1] << "\t" << re[2] << "\t" << re[3] + << "\n\nRVALUE RISE \t" + << rf[0] << "\t" << rf[1] << "\t" << rf[2] << "\t" << rf[3] + << "\nRVALUE FALL \t" + << rg[0] << "\t" << rg[1] << "\t" << rg[2] << "\t" << rg[3] + << "\nRVALUE SUB FALL " + << rh[0] << "\t" << rh[1] << "\t" << rh[2] << "\t" + << rh[3] << "\t" << rh[4] << "\t" << rh[5] << "\t" + << rh[6] << "\t" << rh[7] << "\t" << rh[8] + << "\nRVALUE SUB RISE " + << ri[0] << "\t" << ri[1] << "\t" << ri[2] << "\t" << ri[3] + << "\nRVALUE BIT [] \t" + << rj[0] << "\t" << rj[1] << "\t" << rj[2] << "\t" << rj[3] + << "\nRVALUE BIT \t" + << rl[0] << "\t" << rl[1] << "\t" << rl[2] << "\t" << rl[3] + << endl; + +#define VAL1 "1010" +#define VAL2 "1000" +#define VAL3 "111011" + + std_ulogic_vector<4> op1; + op1 = VAL1; + std_ulogic_vector<4> op2; + op2 = VAL2; + std_ulogic_vector<4> r1, r2, r3, r4, r5, r6, r7, r8; + std_ulogic_vector<4> r9, r10, r11, r12, r13, r14; + std_ulogic_vector<4> r15, r16, r17, r18, r19; + std_ulogic_vector<4> r20, r21, r22, r23, r24; + std_ulogic_vector<4> r25, r26, r27, r28, r29; + std_ulogic_vector<4> r30, r31, r32, r33, r34, r35; + std_ulogic_vector<4> r36, r37, r38, r39, r40, r41; + std_ulogic r42, r43, r44; + +// r1 = op1 * op2; // Multiplication + +// r2 = op1 / op2; // Division + +// r3 = op1 % op2; // Modulus + +// r4 = op1 + op2; // Addition + +// r5 = op1 - op2; // Subtraction + +// r6 = !op1; // Logical NOT + +// r7 = op1 && op2; // Logical AND + +// r8 = op1 || op2; // Logical OR + +// r9 = op1 < op2; // Less than + +// r10 = op1 <= op2; // Less than or equal + +// r11 = op1 > op2; // Greater than + +// r12 = op1 >= op2; // Greater than or equal + +// r13 = op1 += op2; // Compound addition +// op1 = VAL1; op2 = VAL2; + +// r14 = op1 -= op2; // Compound subtraction +// op1 = VAL1; op2 = VAL2; + +// r15 = op1 *= op2; // Compound multiplication +// op1 = VAL1; op2 = VAL2; + +// r16 = op1 /= op2; // Compound division +// op1 = VAL1; op2 = VAL2; + +// r17 = op1 %= op2; // Compound modulus +// op1 = VAL1; op2 = VAL2; + +// r18 = op1 <<= op2; // Compound shift left +// op1 = VAL1; op2 = VAL2; + +// r19 = op1 >>= op2; // Compound shift right +// op1 = VAL1; op2 = VAL2; + + r20 = op1 &= op2; // Compound bitwise AND + op1 = VAL1; op2 = VAL2; + r36 = op1 &= VAL3; + op1 = VAL1; + + r21 = op1 ^= op2; // Compound bitwise XOR + op1 = VAL1; op2 = VAL2; + r37 = op1 ^= VAL3; + op1 = VAL1; + + r22 = op1 |= op2; // Compound bitwise OR + op1 = VAL1; op2 = VAL2; + r38 = op1 |= VAL3; + op1 = VAL1; + +// r23 = op2++; // Postfix increment +// op1 = VAL1; op2 = VAL2; + +// r24 = ++op2; // Prefix increment +// op1 = VAL1; op2 = VAL2; + +// r25 = op2--; // Postfix decrement +// op1 = VAL1; op2 = VAL2; + +// r26 = --op2; // Prefix decrement +// op1 = VAL1; op2 = VAL2; + +// r27 = (op1 > op2) ? true : false; // Arithmetic if +// r28 = (op1 < op2) ? true : false; // Arithmetic if + +// r29 = op1, r29 = op2; // Comma + + r30 = ~op1; // Bitwise NOT + +// r31 = op1 << op2; // Left shift +// op1 = VAL1; op2 = VAL2; + +// r32 = op1 >> op2; // Right shift +// op1 = VAL1; op2 = VAL2; + + r33 = op1 & op2; // Bitwise AND + r39 = op1 & VAL3; + + r34 = op1 ^ op2; // Bitwise XOR + r40 = op1 ^ VAL3; + + r35 = op1 | op2; // Bitwise OR + r41 = op1 | VAL3; + + r42 = and_reduce(op1); // AND reduction + + r43 = or_reduce(op1); // OR reduction + + r44 = xor_reduce(op1); // XOR reduction + +cout << "\nop1\t operator\t op2\t result [All operands are std_ulogic_vector]" + << "\n----------------------------------------------------------------" +// << "\n" << op1 << "\t * \t\t " << op2 << "\t = " << r1 +// << "\n" << op1 << "\t / \t\t " << op2 << "\t = " << r2 +// << "\n" << op1 << "\t % \t\t " << op2 << "\t = " << r3 +// << "\n" << op1 << "\t + \t\t " << op2 << "\t = " << r4 +// << "\n" << op1 << "\t - \t\t " << op2 << "\t = " << r5 +// << "\n!(" << op1 << ") \t\t\t\t = " << r6 +// << "\n" << op1 << "\t && \t\t " << op2 << "\t = " << r7 +// << "\n" << op1 << "\t || \t\t " << op2 << "\t = " << r8 +// << "\n" << op1 << "\t < \t\t " << op2 << "\t = " << r9 +// << "\n" << op1 << "\t <= \t\t " << op2 << "\t = " << r10 +// << "\n" << op1 << "\t > \t\t " << op2 << "\t = " << r11 +// << "\n" << op1 << "\t >= \t\t " << op2 << "\t = " << r12 +// << "\n" << op1 << "\t += \t\t " << op2 << "\t = " << r13 +// << "\n" << op1 << "\t -= \t\t " << op2 << "\t = " << r14 +// << "\n" << op1 << "\t *= \t\t " << op2 << "\t = " << r15 +// << "\n" << op1 << "\t /= \t\t " << op2 << "\t = " << r16 +// << "\n" << op1 << "\t %= \t\t " << op2 << "\t = " << r17 +// << "\n" << op1 << "\t <<=\t\t " << op2 << "\t = " << r18 +// << "\n" << op1 << "\t >>=\t\t " << op2 << "\t = " << r19 + << "\n" << op1 << "\t &= \t\t " << op2 << "\t = " << r20 + << "\n" << op1 << "\t ^= \t\t " << op2 << "\t = " << r21 + << "\n" << op1 << "\t |= \t\t " << op2 << "\t = " << r22 +// << "\n" << "\t ()++ \t " << op2 << "\t = " << r23 +// << "\n" << "\t ++() \t " << op2 << "\t = " << r24 +// << "\n" << "\t ()-- \t " << op2 << "\t = " << r25 +// << "\n" << "\t --() \t " << op2 << "\t = " << r26 +// << "\n" << op1 << "\t > ?: \t " << op2 << "\t = " << r27 +// << "\n" << op1 << "\t < ?: \t " << op2 << "\t = " << r28 +// << "\n" << op1 << "\t , \t\t " << op2 << "\t = " << r29 + << "\n~(" << op1 << ") \t\t\t = " << r30 +// << "\n" << op1 << "\t << \t\t " << op2 << "\t = " << r31 +// << "\n" << op1 << "\t >> \t\t " << op2 << "\t = " << r32 + << "\n" << op1 << "\t & \t\t " << op2 << "\t = " << r33 + << "\n" << op1 << "\t ^ \t\t " << op2 << "\t = " << r34 + << "\n" << op1 << "\t | \t\t " << op2 << "\t = " << r35 + << "\n\n" << op1 << "\t &= \t\t " << VAL3 << "\t = " << r36 + << "\n" << op1 << "\t ^= \t\t " << VAL3 << "\t = " << r37 + << "\n" << op1 << "\t |= \t\t " << VAL3 << "\t = " << r38 + << "\n" << op1 << "\t & \t\t " << VAL3 << "\t = " << r39 + << "\n" << op1 << "\t ^ \t\t " << VAL3 << "\t = " << r40 + << "\n" << op1 << "\t | \t\t " << VAL3 << "\t = " << r41 + << "\n\n" << op1 << "\t and_reduce() \t = " << r42 + << "\n" << op1 << "\t or_reduce() \t = " << r43 + << "\n" << op1 << "\t xor_reduce() \t = " << r44 + << endl; + + if (op1 == op2) // Equality + cout << "\n" << op1 << "\t == \t\t " << op2 << "\t -> true" << endl; + else + cout << "\n" << op1 << "\t == \t\t " << op2 << "\t -> false" << endl; + + if (op1 != op2) // Inequality + cout << op1 << "\t != \t\t " << op2 << "\t -> true" << endl; + else + cout << op1 << "\t != \t\t " << op2 << "\t -> false" << endl; + + op1 = op2 = "1111"; // Assignment operator concatenation + cout << "\n" << op1 << "\t = \t\t " << op2 << endl; + + +// 4. OPERATOR DEFINITIONS +// & | ^ ~ + std_ulogic_vector<9> suv; + std_ulogic_vector<9> vu; + std_ulogic_vector<9> vx; + std_ulogic_vector<9> v0; + std_ulogic_vector<9> v1; + std_ulogic_vector<9> vz; + std_ulogic_vector<9> vw; + std_ulogic_vector<9> vl; + std_ulogic_vector<9> vh; + std_ulogic_vector<9> vd; + std_ulogic_vector<9> bang; + + suv = "UX01ZWLH-"; + + vu = "UUUUUUUUU" & suv; + vx = "XXXXXXXXX" & suv; + v0 = "000000000" & suv; + v1 = "111111111" & suv; + vz = "ZZZZZZZZZ" & suv; + vw = "WWWWWWWWW" & suv; + vl = "LLLLLLLLL" & suv; + vh = "HHHHHHHHH" & suv; + vd = "---------" & suv; + + cout << "\n+-------------------------+" + << "\n| AND (&) | X | 0 | 1 | Z |" + << "\n+-------------------------+" + << "\n| X | " << vx[7] << " | " << vx[6] << " | " + << vx[5] << " | " << vx[4] << " | " + << "\n+-------------------------+" + << "\n| 0 | " << v0[7] << " | " << v0[6] << " | " + << v0[5] << " | " << v0[4] << " | " + << "\n+-------------------------+" + << "\n| 1 | " << v1[7] << " | " << v1[6] << " | " + << v1[5] << " | " << v1[4] << " | " + << "\n+-------------------------+" + << "\n| Z | " << vz[7] << " | " << vz[6] << " | " + << vz[5] << " | " << vz[4] << " | " + << "\n+-------------------------+" + << endl; + + vu = "UUUUUUUUU" | suv; + vx = "XXXXXXXXX" | suv; + v0 = "000000000" | suv; + v1 = "111111111" | suv; + vz = "ZZZZZZZZZ" | suv; + vw = "WWWWWWWWW" | suv; + vl = "LLLLLLLLL" | suv; + vh = "HHHHHHHHH" | suv; + vd = "---------" | suv; + + cout << "\n+-------------------------+" + << "\n| OR (|) | X | 0 | 1 | Z |" + << "\n+-------------------------+" + << "\n| X | " << vx[7] << " | " << vx[6] << " | " + << vx[5] << " | " << vx[4] << " | " + << "\n+-------------------------+" + << "\n| 0 | " << v0[7] << " | " << v0[6] << " | " + << v0[5] << " | " << v0[4] << " | " + << "\n+-------------------------+" + << "\n| 1 | " << v1[7] << " | " << v1[6] << " | " + << v1[5] << " | " << v1[4] << " | " + << "\n+-------------------------+" + << "\n| Z | " << vz[7] << " | " << vz[6] << " | " + << vz[5] << " | " << vz[4] << " | " + << "\n+-------------------------+" + << endl; + + vu = "UUUUUUUUU" ^ suv; + vx = "XXXXXXXXX" ^ suv; + v0 = "000000000" ^ suv; + v1 = "111111111" ^ suv; + vz = "ZZZZZZZZZ" ^ suv; + vw = "WWWWWWWWW" ^ suv; + vl = "LLLLLLLLL" ^ suv; + vh = "HHHHHHHHH" ^ suv; + vd = "---------" ^ suv; + + cout << "\n+-------------------------+" + << "\n| XOR (^) | X | 0 | 1 | Z |" + << "\n+-------------------------+" + << "\n| X | " << vx[7] << " | " << vx[6] << " | " + << vx[5] << " | " << vx[4] << " | " + << "\n+-------------------------+" + << "\n| 0 | " << v0[7] << " | " << v0[6] << " | " + << v0[5] << " | " << v0[4] << " | " + << "\n+-------------------------+" + << "\n| 1 | " << v1[7] << " | " << v1[6] << " | " + << v1[5] << " | " << v1[4] << " | " + << "\n+-------------------------+" + << "\n| Z | " << vz[7] << " | " << vz[6] << " | " + << vz[5] << " | " << vz[4] << " | " + << "\n+-------------------------+" + << endl; + + bang = ~suv; + + cout << "\n+-------------------------+" + << "\n| NOT (~) | X | 0 | 1 | Z |" + << "\n+-------------------------+" + << "\n| | " << bang[7] << " | " << bang[6] << " | " + << bang[5] << " | " << bang[4] << " | " + << "\n+-------------------------+" + << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/extern/COMPILE b/src/systemc/tests/systemc/misc/unit/extern/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/unit/extern/extern.cpp b/src/systemc/tests/systemc/misc/unit/extern/extern.cpp new file mode 100644 index 000000000..f73c17366 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/extern/extern.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + extern.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "extern.h" + +struct foo : sc_module { + sc_in_clk clk; + sc_in a; + sc_in b; + sc_out c; + + SC_CTOR(foo) { + SC_CTHREAD(entry, clk.pos()); + } + + void entry(); +}; + +void +foo::entry() +{ + c = f(a.read(), b.read()); + wait(); +} diff --git a/src/systemc/tests/systemc/misc/unit/extern/extern.h b/src/systemc/tests/systemc/misc/unit/extern/extern.h new file mode 100644 index 000000000..dde7601ee --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/extern/extern.h @@ -0,0 +1,38 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + extern.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +extern int f(int a, int b); diff --git a/src/systemc/tests/systemc/misc/unit/extern2/COMPILE b/src/systemc/tests/systemc/misc/unit/extern2/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/unit/extern2/extern.h b/src/systemc/tests/systemc/misc/unit/extern2/extern.h new file mode 100644 index 000000000..d91882905 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/extern2/extern.h @@ -0,0 +1,38 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + extern.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +extern void f(int a, int b, int& c); diff --git a/src/systemc/tests/systemc/misc/unit/extern2/extern2.cpp b/src/systemc/tests/systemc/misc/unit/extern2/extern2.cpp new file mode 100644 index 000000000..fd01e4579 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/extern2/extern2.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + extern2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "extern.h" + +struct foo : sc_module { + sc_in_clk clk; + sc_in a; + sc_in b; + sc_out c; + + SC_CTOR(foo) { + SC_CTHREAD(entry, clk.pos()); + } + + void entry(); +}; + +void +foo::entry() +{ + int d; + f(a.read(), b.read(), d); + c = d; + wait(); +} diff --git a/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/golden/input_char_s b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/golden/input_char_s new file mode 100644 index 000000000..e6a7910b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/golden/input_char_s @@ -0,0 +1,2 @@ +SystemC Simulation +SAMPLE DATA = 12 diff --git a/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/golden/input_char_sc_signed.log b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/golden/input_char_sc_signed.log new file mode 100644 index 000000000..e6a7910b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/golden/input_char_sc_signed.log @@ -0,0 +1,2 @@ +SystemC Simulation +SAMPLE DATA = 12 diff --git a/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/input.decimal b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/input.decimal new file mode 100644 index 000000000..1b4de5b44 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/input.decimal @@ -0,0 +1,2 @@ +0d12 +0d13 diff --git a/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/input_char_sc_signed.cpp b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/input_char_sc_signed.cpp new file mode 100644 index 000000000..dc72d958a --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_char_sc_signed/input_char_sc_signed.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + input_char_sc_signed.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int ac, char *av[]) +{ + ifstream testvectors ("input_char_sc_signed/input.decimal"); + char buffer[8]; + sc_signed sample (8); + + testvectors >> buffer; + sample = buffer; + + cout << "SAMPLE DATA = " << sample << endl; + sc_start(0, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_sc_signed/golden/input_sc_signed.log b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_sc_signed/golden/input_sc_signed.log new file mode 100644 index 000000000..e6a7910b1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_sc_signed/golden/input_sc_signed.log @@ -0,0 +1,2 @@ +SystemC Simulation +SAMPLE DATA = 12 diff --git a/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_sc_signed/input.char b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_sc_signed/input.char new file mode 100644 index 000000000..3b355c8dc --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_sc_signed/input.char @@ -0,0 +1,2 @@ +12 +13 diff --git a/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_sc_signed/input_sc_signed.cpp b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_sc_signed/input_sc_signed.cpp new file mode 100644 index 000000000..7e7367626 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/file_io/input_sc_signed/input_sc_signed.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + input_sc_signed.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int sc_main(int ac, char *av[]) +{ + ifstream testvectors ("input_sc_signed/input.char"); + sc_signed sample (8); + + testvectors >> sample; + + cout << "SAMPLE DATA = " << sample << endl; + sc_start(0, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/common.h b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/common.h new file mode 100644 index 000000000..803cbc085 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<16> bool_vector; +typedef sc_signal signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/display.cpp b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/display.cpp new file mode 100644 index 000000000..767afe922 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/display.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: display.cc */ + /*****************************************/ + +#include "display.h" + +void displayp::entry() +{ + bool_vector tmp; + + cout << sc_time_stamp() << " : STARTING SIM \n" << endl; + + while (true) { + + tmp = prime.read(); + wait(); + + cout << sc_time_stamp() << " : STOPPING SIM - stop button" << endl; + sc_stop(); + + } +} diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/display.h b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/display.h new file mode 100644 index 000000000..a2efa2bd7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/display.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: display.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( displayp ) +{ + SC_HAS_PROCESS( displayp ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& prime; + + // Constructor + displayp (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& PRIME ) + + : + prime (PRIME) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/golden/sim_to_infinity.log b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/golden/sim_to_infinity.log new file mode 100644 index 000000000..a711bd840 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/golden/sim_to_infinity.log @@ -0,0 +1,7 @@ +SystemC Simulation +0 s : STARTING SIM + +6 ns : STOPPING SIM - stop button + +Info: /OSCI/SystemC: Simulation stopped by user. +6 ns : STOPPING SIM - start button diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/main.cpp b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/main.cpp new file mode 100644 index 000000000..1f8b19cdd --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/main.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + +#include "display.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + signal_bool_vector prime ("prime"); + +// Clock Instantiation + sc_clock clk ("CLK", 6, SC_NS, 0.5, 0, SC_NS); // 167 Mhz + +// Process Instantiation + + displayp T2 ("T2", clk, prime); + +// Simulation Run Control + sc_start(); + cout << sc_time_stamp() << " : STOPPING SIM - start button" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/sim_to_infinity.f b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/sim_to_infinity.f new file mode 100644 index 000000000..a85c022c3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_infinity/sim_to_infinity.f @@ -0,0 +1,2 @@ +sim_to_infinity/main.cpp +sim_to_infinity/display.cpp diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/common.h b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/common.h new file mode 100644 index 000000000..803cbc085 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_bv<16> bool_vector; +typedef sc_signal signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/display.cpp b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/display.cpp new file mode 100644 index 000000000..767afe922 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/display.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*****************************************/ + /* Implementation Filename: display.cc */ + /*****************************************/ + +#include "display.h" + +void displayp::entry() +{ + bool_vector tmp; + + cout << sc_time_stamp() << " : STARTING SIM \n" << endl; + + while (true) { + + tmp = prime.read(); + wait(); + + cout << sc_time_stamp() << " : STOPPING SIM - stop button" << endl; + sc_stop(); + + } +} diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/display.h b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/display.h new file mode 100644 index 000000000..a2efa2bd7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/display.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: display.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( displayp ) +{ + SC_HAS_PROCESS( displayp ); + + sc_in_clk clk; + + // Inputs + const signal_bool_vector& prime; + + // Constructor + displayp (sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector& PRIME ) + + : + prime (PRIME) + + { + clk (TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/golden/sim_to_time.log b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/golden/sim_to_time.log new file mode 100644 index 000000000..a711bd840 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/golden/sim_to_time.log @@ -0,0 +1,7 @@ +SystemC Simulation +0 s : STARTING SIM + +6 ns : STOPPING SIM - stop button + +Info: /OSCI/SystemC: Simulation stopped by user. +6 ns : STOPPING SIM - start button diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/main.cpp b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/main.cpp new file mode 100644 index 000000000..c0d3b7bc7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/main.cpp @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + +#include "display.h" + +int sc_main(int ac, char *av[]) +{ + +// Signal Instantiation + signal_bool_vector prime ("prime"); + +// Clock Instantiation + sc_clock clk ("CLK", 6, SC_NS, 0.5, 0, SC_NS); // 167 Mhz + +// Process Instantiation + + displayp T2 ("T2", clk, prime); + +// Simulation Run Control + sc_start( 30, SC_NS, SC_EXIT_ON_STARVATION ); + cout << sc_time_stamp() << " : STOPPING SIM - start button" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/sim_to_time.f b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/sim_to_time.f new file mode 100644 index 000000000..c91f75391 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/methodology/sim_control/sim_to_time/sim_to_time.f @@ -0,0 +1,2 @@ +sim_to_time/main.cpp +sim_to_time/display.cpp diff --git a/src/systemc/tests/systemc/misc/unit/rtlout/test1/COMPILE b/src/systemc/tests/systemc/misc/unit/rtlout/test1/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/unit/rtlout/test1/new_struct.h b/src/systemc/tests/systemc/misc/unit/rtlout/test1/new_struct.h new file mode 100644 index 000000000..270a572fe --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/rtlout/test1/new_struct.h @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + new_struct.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef test_struct +#define test_struct + +struct a_new_struct { + char in_value1; + char in_value2; + sc_logic in_valid; + + inline bool operator == (const a_new_struct & rhs) const + { + return (rhs.in_value1 == in_value1 && rhs.in_value2 == in_value2 + && rhs.in_valid == in_valid); +} +}; + +inline +void +sc_trace( sc_trace_file*, const a_new_struct&, const std::string& ) +{ + // NOT IMPLEMENTED +} + + +struct b_new_struct { + sc_lv<9> out_value1; + int out_value2; + +inline bool operator == (const b_new_struct & rhs) const + { + return (rhs.out_value1 == out_value1 && rhs.out_value2 == out_value2); +} +}; + +inline +void +sc_trace( sc_trace_file*, const b_new_struct&, const std::string& ) +{ + // NOT IMPLEMENTED +} + + +#endif diff --git a/src/systemc/tests/systemc/misc/unit/rtlout/test1/test1.cpp b/src/systemc/tests/systemc/misc/unit/rtlout/test1/test1.cpp new file mode 100644 index 000000000..a0cd31af6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/rtlout/test1/test1.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "types2.h" + +void types2::entry(){ + + int tmp1_uns_lv; + sc_lv<8> tmp2_uns_lv; + sc_uint<8> tmp1_uns; + sc_uint<8> tmp2_uns; + sc_int<9> temp_output1; + sc_int<8> temp_output2; + sc_lv<9> output1; + int output2; + + b_new_struct test; + a_new_struct test1; + // reset_loop + out_valid.write(0); + + wait(); + while (true) { + test1 = port_in.read(); + while(test1.in_valid == (sc_logic)'0') { + wait(); + test1 = port_in.read(); + } + wait(); + + //cout << "Starting execution" << endl; + + //reading the inputs + tmp1_uns_lv = test1.in_value1; + //cout << "read inputs" << endl; + tmp2_uns_lv = test1.in_value2; + //cout << "read inputs" << endl; + tmp1_uns = tmp1_uns_lv; + tmp2_uns = tmp2_uns_lv; + + //execute simple operations + tmp1_uns++; + tmp2_uns--; + tmp1_uns_lv = tmp1_uns; + + + output1 = temp_output1 = tmp1_uns + tmp2_uns; + output2 = temp_output2 = tmp1_uns - tmp2_uns; + + wait(); + + // write outputs + + test.out_value1 = "000000000"; + test.out_value2 = tmp1_uns_lv; + port_out.write(test); + + out_valid.write(1); + wait(); + + out_valid.write(0); + wait(); + test.out_value1 = output1; + test.out_value2 = output2; + + port_out.write(test); + out_valid.write(1); + wait(); + + + out_valid.write(0); + wait(); + +} +} +// EOF + diff --git a/src/systemc/tests/systemc/misc/unit/rtlout/test1/types2.h b/src/systemc/tests/systemc/misc/unit/rtlout/test1/types2.h new file mode 100644 index 000000000..b9d49eb50 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/rtlout/test1/types2.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + types2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "new_struct.h" + +SC_MODULE( types2 ) { + sc_in_clk clk; + sc_in reset; + sc_in port_in; + sc_out port_out; + sc_out out_valid; + + SC_CTOR(types2) + { + SC_CTHREAD (entry, clk.pos()); + reset_signal_is(reset,true); + }; + + void entry (); +}; + diff --git a/src/systemc/tests/systemc/misc/unit/structs/test3/COMPILE b/src/systemc/tests/systemc/misc/unit/structs/test3/COMPILE new file mode 100644 index 000000000..e69de29bb diff --git a/src/systemc/tests/systemc/misc/unit/structs/test3/arr_struct.h b/src/systemc/tests/systemc/misc/unit/structs/test3/arr_struct.h new file mode 100644 index 000000000..a7a2fea55 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/structs/test3/arr_struct.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arr_struct.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +struct arr_struct1 { + char a[4][4]; + + +}; + +inline +bool +operator == ( const arr_struct1&, const arr_struct1& ) +{ + // NOT IMPLEMENTED + return false; +} + +inline +void +sc_trace( sc_trace_file*, const arr_struct1&, const std::string& ) +{ + // NOT IMPLEMENTED +} + + +struct arr_struct2 { + + sc_uint<8> b[4][4]; + + +}; + +inline +bool +operator == ( const arr_struct2&, const arr_struct2& ) +{ + // NOT IMPLEMENTED + return false; +} + +inline +void +sc_trace( sc_trace_file*, const arr_struct2&, const std::string& ) +{ + // NOT IMPLEMENTED +} diff --git a/src/systemc/tests/systemc/misc/unit/structs/test3/arraytypes.h b/src/systemc/tests/systemc/misc/unit/structs/test3/arraytypes.h new file mode 100644 index 000000000..f2e2e8e97 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/structs/test3/arraytypes.h @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + arraytypes.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "arr_struct.h" + +SC_MODULE( arraytypes ) { + sc_in_clk clk; + sc_in reset; + sc_in in_value1; + sc_in > in_valid; + sc_out out_value1; + sc_out out_valid; + + SC_CTOR(arraytypes) + { + SC_CTHREAD (entry, clk.pos()); + reset_signal_is( reset, true ); + }; + + void entry (); + +}; + diff --git a/src/systemc/tests/systemc/misc/unit/structs/test3/display.h b/src/systemc/tests/systemc/misc/unit/structs/test3/display.h new file mode 100644 index 000000000..785004870 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/structs/test3/display.h @@ -0,0 +1,51 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +SC_MODULE ( display ) { + sc_in_clk CLK; + sc_in > in_data1[4]; + sc_in in_data2[4]; + sc_in in_valid; + + SC_CTOR ( display ) + { SC_CTHREAD(entry, CLK.pos()); } + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/unit/structs/test3/stimulus.h b/src/systemc/tests/systemc/misc/unit/structs/test3/stimulus.h new file mode 100644 index 000000000..0a24bee00 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/structs/test3/stimulus.h @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stimulus.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +SC_MODULE ( stimulus ) { + sc_in_clk CLK; + sc_out reset; + sc_out out_stimulus1[4]; + sc_out > out_stimulus2[4]; + sc_out > out_valid; + SC_CTOR ( stimulus) + {SC_CTHREAD(entry, CLK.pos());} + + void entry(); +}; + +// EOF diff --git a/src/systemc/tests/systemc/misc/unit/structs/test3/test3.cpp b/src/systemc/tests/systemc/misc/unit/structs/test3/test3.cpp new file mode 100644 index 000000000..aee5727c4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/structs/test3/test3.cpp @@ -0,0 +1,78 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +#include "arraytypes.h" + +void arraytypes::entry(){ + + char tmp1_uns_lv[4][4]; + arr_struct1 a; + arr_struct2 tmp2_uns_lv; + + // reset_loop + out_valid.write(sc_bit(0)); + + wait(); + while (true) { + while(in_valid.read() == "0") wait(); + wait(); + a = in_value1.read(); + for (int i = 0; i < 4; i++) { + for (int j = 0; j < 4; j++) { + tmp1_uns_lv[i][j] = a.a[i][j]; + } + } + + for (int i = 0; i < 4; i++) + for (int j = 0; j < 4; j++) + tmp2_uns_lv.b[i][j] = tmp1_uns_lv[j][i]; + out_value1.write (tmp2_uns_lv); + + wait(); + + out_valid.write( sc_bit(1)); + wait(); + + + out_valid.write( sc_bit(0)); + wait(); + +} +} +// EOF + diff --git a/src/systemc/tests/systemc/misc/unit/structure/clocks/clocks.cpp b/src/systemc/tests/systemc/misc/unit/structure/clocks/clocks.cpp new file mode 100644 index 000000000..f6fa053df --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/structure/clocks/clocks.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + clocks.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "clocks.h" +#include "tb.h" /** Definition of testbench Structure **/ + +int +sc_main( int, char*[] ) +{ + sc_clock clk( "CLK", 20, SC_NS, 0.5, 0, SC_NS); + sc_clock clk2( "_____________CLK2", 20, SC_NS, 0.2, 5, SC_NS); + + testbench tb1("TB1", clk, clk2); + + sc_start( 80, SC_NS ); // Simulation control + return 0; +} diff --git a/src/systemc/tests/systemc/misc/unit/structure/clocks/clocks.h b/src/systemc/tests/systemc/misc/unit/structure/clocks/clocks.h new file mode 100644 index 000000000..96cb4f666 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/structure/clocks/clocks.h @@ -0,0 +1,195 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + clocks.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +/******************************************************************************/ +/*************************** CLK_POS Function **********************/ +/******************************************************************************/ + +SC_MODULE( CLK_POS ) +{ + SC_HAS_PROCESS( CLK_POS ); + + sc_in_clk clk; + + sc_signal& out_clk_pos; + + CLK_POS ( sc_module_name NAME, + sc_clock& TICK_P, + sc_signal& OUT_CLK_POS ) + + : + out_clk_pos (OUT_CLK_POS) + { + clk (TICK_P); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +void +CLK_POS::entry() +{ + cout << sc_time_stamp() << " : CLK UP\n" << endl; + out_clk_pos.write(1); + wait(); + cout << sc_time_stamp() << " : CLK UP\n" << endl; + out_clk_pos.write(0); + wait(); + cout << sc_time_stamp() << " : CLK UP\n" << endl; + wait(); + cout << sc_time_stamp() << " : CLK UP\n" << endl; +} + +/******************************************************************************/ +/*************************** CLK_NEG Function **********************/ +/******************************************************************************/ + +SC_MODULE( CLK_NEG ) +{ + SC_HAS_PROCESS( CLK_NEG ); + + sc_in_clk clk; + + sc_signal& out_clk_neg; + + CLK_NEG ( sc_module_name NAME, + sc_clock& TICK_N, + sc_signal& OUT_CLK_NEG ) + : + out_clk_neg (OUT_CLK_NEG) + { + clk (TICK_N); + SC_CTHREAD( entry, clk.neg() ); + } + + void entry(); +}; + +void +CLK_NEG::entry() +{ + cout << sc_time_stamp() << " : CLK DN\n" << endl; + out_clk_neg.write(1); + wait(); + cout << sc_time_stamp() << " : CLK DN\n" << endl; + out_clk_neg.write(0); + wait(); + cout << sc_time_stamp() << " : CLK DN\n" << endl; + wait(); + cout << sc_time_stamp() << " : CLK DN\n" << endl; +} + +/******************************************************************************/ +/*************************** CLK2_POS Function **********************/ +/******************************************************************************/ + +SC_MODULE( CLK2_POS ) +{ + SC_HAS_PROCESS( CLK2_POS ); + + sc_in_clk clk; + + sc_signal& out_clk2_pos; + + CLK2_POS ( sc_module_name NAME, + sc_clock& TICK2_P, + sc_signal& OUT_CLK2_POS ) + : + out_clk2_pos (OUT_CLK2_POS) + { + clk (TICK2_P); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +void +CLK2_POS::entry() +{ + cout << sc_time_stamp() << " : _____________CLK2 UP\n" << endl; + out_clk2_pos.write(1); + wait(); + cout << sc_time_stamp() << " : _____________CLK2 UP\n" << endl; + out_clk2_pos.write(0); + wait(); + cout << sc_time_stamp() << " : _____________CLK2 UP\n" << endl; + wait(); + cout << sc_time_stamp() << " : _____________CLK2 UP\n" << endl; +} + +/******************************************************************************/ +/*************************** CLK2_NEG Function **********************/ +/******************************************************************************/ + +SC_MODULE( CLK2_NEG ) +{ + SC_HAS_PROCESS( CLK2_NEG ); + + sc_in_clk clk; + + sc_signal& out_clk2_neg; + + CLK2_NEG ( sc_module_name NAME, + sc_clock& TICK2_N, + sc_signal& OUT_CLK2_NEG ) + : + out_clk2_neg (OUT_CLK2_NEG) + { + clk (TICK2_N); + SC_CTHREAD( entry, clk.neg() ); + } + + void entry(); +}; + +void +CLK2_NEG::entry() +{ + cout << sc_time_stamp() << " : _____________CLK2 DN\n" << endl; + out_clk2_neg.write(1); + wait(); + cout << sc_time_stamp() << " : _____________CLK2 DN\n" << endl; + out_clk2_neg.write(0); + wait(); + cout << sc_time_stamp() << " : _____________CLK2 DN\n" << endl; + wait(); + cout << sc_time_stamp() << " : _____________CLK2 DN\n" << endl; +} diff --git a/src/systemc/tests/systemc/misc/unit/structure/clocks/golden/clocks.log b/src/systemc/tests/systemc/misc/unit/structure/clocks/golden/clocks.log new file mode 100644 index 000000000..4d160c918 --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/structure/clocks/golden/clocks.log @@ -0,0 +1,33 @@ +SystemC Simulation +0 s : CLK UP + +5 ns : _____________CLK2 UP + +9 ns : _____________CLK2 DN + +10 ns : CLK DN + +20 ns : CLK UP + +25 ns : _____________CLK2 UP + +29 ns : _____________CLK2 DN + +30 ns : CLK DN + +40 ns : CLK UP + +45 ns : _____________CLK2 UP + +49 ns : _____________CLK2 DN + +50 ns : CLK DN + +60 ns : CLK UP + +65 ns : _____________CLK2 UP + +69 ns : _____________CLK2 DN + +70 ns : CLK DN + diff --git a/src/systemc/tests/systemc/misc/unit/structure/clocks/tb.h b/src/systemc/tests/systemc/misc/unit/structure/clocks/tb.h new file mode 100644 index 000000000..e10f6c71c --- /dev/null +++ b/src/systemc/tests/systemc/misc/unit/structure/clocks/tb.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/******************************************************************************/ +/*************************** Testbench Function **********************/ +/******************************************************************************/ + +struct testbench : public sc_module +{ + sc_signal out_clk_pos; + sc_signal out_clk_neg; + sc_signal out_clk2_pos; + sc_signal out_clk2_neg; + CLK_POS clkp; + CLK_NEG clkn; + CLK2_POS clkp2; + CLK2_NEG clkn2; + + /*** Constructor ***/ + testbench ( const sc_module_name& NAME, + sc_clock& TICK, + sc_clock& TICK2 ) + : sc_module(), + out_clk_pos ("out_clk_pos"), + out_clk_neg ("out_clk_neg"), + out_clk2_pos ("out_clk2_pos"), + out_clk2_neg ("out_clk2_neg"), + clkp ("CLKP", TICK, out_clk_pos), + clkn ("CLKN", TICK, out_clk_neg), + clkp2 ("CLKP2", TICK2, out_clk2_pos), + clkn2 ("CLKN2", TICK2, out_clk2_neg) + { + end_module(); + } +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/golden/test1.log b/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/golden/test1.log new file mode 100644 index 000000000..0dd89eb5e --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/golden/test1.log @@ -0,0 +1,19 @@ +SystemC Simulation +Value sent = 10 Value read = 129 +Value sent = 129 Value read = 10 +Value sent = 11 Value read = 130 +Value sent = 130 Value read = 11 +Value sent = 12 Value read = 131 +Value sent = 131 Value read = 12 +Value sent = 13 Value read = 132 +Value sent = 132 Value read = 13 +Value sent = 14 Value read = 133 +Value sent = 133 Value read = 14 +Value sent = 15 Value read = 134 +Value sent = 134 Value read = 15 +Value sent = 16 Value read = 135 +Value sent = 135 Value read = 16 +Value sent = 17 Value read = 136 +Value sent = 136 Value read = 17 +Value sent = 18 Value read = 137 +Value sent = 137 Value read = 18 diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/test1.cpp b/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/test1.cpp new file mode 100644 index 000000000..5667d470c --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test1/test1.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( p1 ) +{ + SC_HAS_PROCESS( p1 ); + + sc_fifo& a; + sc_fifo& b; + sc_signal& clock; + + int init; + + p1(sc_module_name name, + sc_fifo& A, + sc_fifo& B, + sc_signal& CLOCK, + int INIT) + : a(A), b(B), clock(CLOCK) + { + init = INIT; + SC_THREAD( entry ); + sensitive << clock; + // sensitive << b; + } + + void entry() { + wait(); + int i = init; + wait(); + while (true) { + a.write(i); + int j = b.read(); + cout << "Value sent = " << i << " Value read = " << j << endl; + wait(); i++; + } + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo a(2), b(2); + sc_signal clock; + + p1 Proc1("Proc1", a, b, clock, 10); + p1 Proc2("Proc2", b, a, clock, 129); + + sc_start(0, SC_NS); + clock = 1; + sc_start(1, SC_NS); + clock = 0; + sc_start(1, SC_NS); + + clock = 1; + sc_start(1, SC_NS); + clock = 0; + sc_start(1, SC_NS); + + clock = 1; + sc_start(1, SC_NS); + clock = 0; + sc_start(1, SC_NS); + + clock = 1; + sc_start(1, SC_NS); + clock = 0; + sc_start(1, SC_NS); + + clock = 1; + sc_start(1, SC_NS); + clock = 0; + sc_start(1, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/golden/test2.log b/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/golden/test2.log new file mode 100644 index 000000000..17f483f04 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/golden/test2.log @@ -0,0 +1,25 @@ +SystemC Simulation +Value sent = 129 Value read = 10 +Value sent = 10 Value read = 129 +Value sent = 130 Value read = 11 +Value sent = 11 Value read = 130 +Value sent = 131 Value read = 12 +Value sent = 12 Value read = 131 +Value sent = 132 Value read = 13 +Value sent = 13 Value read = 132 +Value sent = 133 Value read = 14 +Value sent = 14 Value read = 133 +Value sent = 134 Value read = 15 +Value sent = 15 Value read = 134 +Value sent = 135 Value read = 16 +Value sent = 16 Value read = 135 +Value sent = 136 Value read = 17 +Value sent = 17 Value read = 136 +Value sent = 137 Value read = 18 +Value sent = 18 Value read = 137 +Value sent = 138 Value read = 19 +Value sent = 19 Value read = 138 +Value sent = 139 Value read = 20 +Value sent = 20 Value read = 139 +Value sent = 140 Value read = 21 +Value sent = 21 Value read = 140 diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/test2.cpp b/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/test2.cpp new file mode 100644 index 000000000..ef1b237bc --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/test2.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( p1 ) +{ + SC_HAS_PROCESS( p1 ); + + sc_fifo& a; + sc_fifo& b; + sc_in clk; + + int init; + + p1(sc_module_name name, + sc_fifo& A, + sc_fifo& B, + sc_signal_in_if& CLK, + int INIT) + : a(A), b(B) + { + clk(CLK); + init = INIT; + SC_THREAD( entry ); + sensitive << clk; + // sensitive << b; + } + + void entry() { + wait(); + int i = init; + wait(); + while (true) { + a.write(i); + int j = b.read(); + cout << "Value sent = " << i << " Value read = " << j << endl; + wait(); i++; + } + } +}; + +SC_MODULE( p2 ) +{ + SC_HAS_PROCESS( p2 ); + + sc_in_clk clk; + + sc_fifo& a; + sc_fifo& b; + + int init; + + p2 (sc_module_name name, + sc_clock& CLK, + sc_fifo& A, + sc_fifo& B, + int INIT) + : a(A), b(B) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + init = INIT; + } + + void entry() { + int i = init; + wait(); + while (true) { + a.write(i); + int j = b.read(); + cout << "Value sent = " << i << " Value read = " << j << endl; + wait(); i++; + } + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo a(2), b(2); + sc_clock clock("Clock", 20, SC_NS); + + p1 Proc1("Proc1", a, b, clock, 10); + p2 Proc2("Proc2", clock, b, a, 129); + + // sc_start(500, SC_NS); + sc_start(250, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/golden/test3.log b/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/golden/test3.log new file mode 100644 index 000000000..b42cb2d1a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/golden/test3.log @@ -0,0 +1,25 @@ +SystemC Simulation +Value sent = 129 + Value read = 129 +Value sent = 130 + Value read = 130 +Value sent = 131 + Value read = 131 +Value sent = 132 + Value read = 132 +Value sent = 133 + Value read = 133 +Value sent = 134 + Value read = 134 +Value sent = 135 + Value read = 135 +Value sent = 136 + Value read = 136 +Value sent = 137 + Value read = 137 +Value sent = 138 + Value read = 138 +Value sent = 139 + Value read = 139 +Value sent = 140 + Value read = 140 diff --git a/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/test3.cpp b/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/test3.cpp new file mode 100644 index 000000000..f60a2d9cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/test3.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( p1 ) +{ + SC_HAS_PROCESS( p1 ); + + sc_fifo& b; + + int init; + + p1(sc_module_name name, + sc_fifo& B, + int INIT) + : b(B) + { + init = INIT; + SC_THREAD( entry ); + // sensitive << b; + } + + void entry() { + // wait(); + int i = init; + // wait(); + while (true) { + int j = b.read(); + cout << " Value read = " << j << endl; + // wait(); + } + } +}; + +SC_MODULE( p2 ) +{ + SC_HAS_PROCESS( p2 ); + + sc_in clk; + + sc_fifo& a; + + int init; + + p2 (sc_module_name name, + sc_signal_in_if& CLK, + sc_fifo& A, + int INIT) + : a(A) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + init = INIT; + } + + void entry() { + int i = init; + wait(); + while (true) { + a.write(i); + cout << "Value sent = " << i << endl; + wait(); i++; + } + } +}; + +int sc_main(int ac, char *av[]) +{ + sc_fifo a(2), b(2); + sc_clock clock("Clock", 20, SC_NS); + + p1 Proc1("Proc1", a, 10); + p2 Proc2("Proc2", clock, a, 129); + + // sc_start(500, SC_NS); + sc_start(250, SC_NS); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt10.1/chpt10.1.f b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/chpt10.1.f new file mode 100644 index 000000000..9e0d8be37 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/chpt10.1.f @@ -0,0 +1,3 @@ +chpt10.1/main.cpp +chpt10.1/paramadd.cpp +chpt10.1/stim.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt10.1/common.h b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/common.h new file mode 100644 index 000000000..20e0a6f30 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt10.1/golden/chpt10.1.log b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/golden/chpt10.1.log new file mode 100644 index 000000000..2edaad097 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/golden/chpt10.1.log @@ -0,0 +1,260 @@ +SystemC Simulation +35 ns : RESET off ...by stim +60 ns : 0 + 0 + 1 = 1 => carry = 0 sum = 0001 +100 ns : 1 + 0 + 0 = 1 => carry = 0 sum = 0001 +140 ns : 2 + 0 + 1 = 3 => carry = 0 sum = 0011 +180 ns : 3 + 0 + 0 = 3 => carry = 0 sum = 0011 +220 ns : 4 + 0 + 1 = 5 => carry = 0 sum = 0101 +260 ns : 5 + 0 + 0 = 5 => carry = 0 sum = 0101 +300 ns : 6 + 0 + 1 = 7 => carry = 0 sum = 0111 +340 ns : 7 + 0 + 0 = 7 => carry = 0 sum = 0111 +380 ns : 8 + 0 + 1 = 9 => carry = 0 sum = 1001 +420 ns : 9 + 0 + 0 = 9 => carry = 0 sum = 1001 +460 ns : 10 + 0 + 1 = 11 => carry = 0 sum = 1011 +500 ns : 11 + 0 + 0 = 11 => carry = 0 sum = 1011 +540 ns : 12 + 0 + 1 = 13 => carry = 0 sum = 1101 +580 ns : 13 + 0 + 0 = 13 => carry = 0 sum = 1101 +620 ns : 14 + 0 + 1 = 15 => carry = 0 sum = 1111 +660 ns : 15 + 0 + 0 = 15 => carry = 0 sum = 1111 +700 ns : 0 + 1 + 1 = 2 => carry = 0 sum = 0010 +740 ns : 1 + 1 + 0 = 2 => carry = 0 sum = 0010 +780 ns : 2 + 1 + 1 = 4 => carry = 0 sum = 0100 +820 ns : 3 + 1 + 0 = 4 => carry = 0 sum = 0100 +860 ns : 4 + 1 + 1 = 6 => carry = 0 sum = 0110 +900 ns : 5 + 1 + 0 = 6 => carry = 0 sum = 0110 +940 ns : 6 + 1 + 1 = 8 => carry = 0 sum = 1000 +980 ns : 7 + 1 + 0 = 8 => carry = 0 sum = 1000 +1020 ns : 8 + 1 + 1 = 10 => carry = 0 sum = 1010 +1060 ns : 9 + 1 + 0 = 10 => carry = 0 sum = 1010 +1100 ns : 10 + 1 + 1 = 12 => carry = 0 sum = 1100 +1140 ns : 11 + 1 + 0 = 12 => carry = 0 sum = 1100 +1180 ns : 12 + 1 + 1 = 14 => carry = 0 sum = 1110 +1220 ns : 13 + 1 + 0 = 14 => carry = 0 sum = 1110 +1260 ns : 14 + 1 + 1 = 16 => carry = 1 sum = 0000 +1300 ns : 15 + 1 + 0 = 16 => carry = 1 sum = 0000 +1340 ns : 0 + 2 + 1 = 3 => carry = 0 sum = 0011 +1380 ns : 1 + 2 + 0 = 3 => carry = 0 sum = 0011 +1420 ns : 2 + 2 + 1 = 5 => carry = 0 sum = 0101 +1460 ns : 3 + 2 + 0 = 5 => carry = 0 sum = 0101 +1500 ns : 4 + 2 + 1 = 7 => carry = 0 sum = 0111 +1540 ns : 5 + 2 + 0 = 7 => carry = 0 sum = 0111 +1580 ns : 6 + 2 + 1 = 9 => carry = 0 sum = 1001 +1620 ns : 7 + 2 + 0 = 9 => carry = 0 sum = 1001 +1660 ns : 8 + 2 + 1 = 11 => carry = 0 sum = 1011 +1700 ns : 9 + 2 + 0 = 11 => carry = 0 sum = 1011 +1740 ns : 10 + 2 + 1 = 13 => carry = 0 sum = 1101 +1780 ns : 11 + 2 + 0 = 13 => carry = 0 sum = 1101 +1820 ns : 12 + 2 + 1 = 15 => carry = 0 sum = 1111 +1860 ns : 13 + 2 + 0 = 15 => carry = 0 sum = 1111 +1900 ns : 14 + 2 + 1 = 17 => carry = 1 sum = 0001 +1940 ns : 15 + 2 + 0 = 17 => carry = 1 sum = 0001 +1980 ns : 0 + 3 + 1 = 4 => carry = 0 sum = 0100 +2020 ns : 1 + 3 + 0 = 4 => carry = 0 sum = 0100 +2060 ns : 2 + 3 + 1 = 6 => carry = 0 sum = 0110 +2100 ns : 3 + 3 + 0 = 6 => carry = 0 sum = 0110 +2140 ns : 4 + 3 + 1 = 8 => carry = 0 sum = 1000 +2180 ns : 5 + 3 + 0 = 8 => carry = 0 sum = 1000 +2220 ns : 6 + 3 + 1 = 10 => carry = 0 sum = 1010 +2260 ns : 7 + 3 + 0 = 10 => carry = 0 sum = 1010 +2300 ns : 8 + 3 + 1 = 12 => carry = 0 sum = 1100 +2340 ns : 9 + 3 + 0 = 12 => carry = 0 sum = 1100 +2380 ns : 10 + 3 + 1 = 14 => carry = 0 sum = 1110 +2420 ns : 11 + 3 + 0 = 14 => carry = 0 sum = 1110 +2460 ns : 12 + 3 + 1 = 16 => carry = 1 sum = 0000 +2500 ns : 13 + 3 + 0 = 16 => carry = 1 sum = 0000 +2540 ns : 14 + 3 + 1 = 18 => carry = 1 sum = 0010 +2580 ns : 15 + 3 + 0 = 18 => carry = 1 sum = 0010 +2620 ns : 0 + 4 + 1 = 5 => carry = 0 sum = 0101 +2660 ns : 1 + 4 + 0 = 5 => carry = 0 sum = 0101 +2700 ns : 2 + 4 + 1 = 7 => carry = 0 sum = 0111 +2740 ns : 3 + 4 + 0 = 7 => carry = 0 sum = 0111 +2780 ns : 4 + 4 + 1 = 9 => carry = 0 sum = 1001 +2820 ns : 5 + 4 + 0 = 9 => carry = 0 sum = 1001 +2860 ns : 6 + 4 + 1 = 11 => carry = 0 sum = 1011 +2900 ns : 7 + 4 + 0 = 11 => carry = 0 sum = 1011 +2940 ns : 8 + 4 + 1 = 13 => carry = 0 sum = 1101 +2980 ns : 9 + 4 + 0 = 13 => carry = 0 sum = 1101 +3020 ns : 10 + 4 + 1 = 15 => carry = 0 sum = 1111 +3060 ns : 11 + 4 + 0 = 15 => carry = 0 sum = 1111 +3100 ns : 12 + 4 + 1 = 17 => carry = 1 sum = 0001 +3140 ns : 13 + 4 + 0 = 17 => carry = 1 sum = 0001 +3180 ns : 14 + 4 + 1 = 19 => carry = 1 sum = 0011 +3220 ns : 15 + 4 + 0 = 19 => carry = 1 sum = 0011 +3260 ns : 0 + 5 + 1 = 6 => carry = 0 sum = 0110 +3300 ns : 1 + 5 + 0 = 6 => carry = 0 sum = 0110 +3340 ns : 2 + 5 + 1 = 8 => carry = 0 sum = 1000 +3380 ns : 3 + 5 + 0 = 8 => carry = 0 sum = 1000 +3420 ns : 4 + 5 + 1 = 10 => carry = 0 sum = 1010 +3460 ns : 5 + 5 + 0 = 10 => carry = 0 sum = 1010 +3500 ns : 6 + 5 + 1 = 12 => carry = 0 sum = 1100 +3540 ns : 7 + 5 + 0 = 12 => carry = 0 sum = 1100 +3580 ns : 8 + 5 + 1 = 14 => carry = 0 sum = 1110 +3620 ns : 9 + 5 + 0 = 14 => carry = 0 sum = 1110 +3660 ns : 10 + 5 + 1 = 16 => carry = 1 sum = 0000 +3700 ns : 11 + 5 + 0 = 16 => carry = 1 sum = 0000 +3740 ns : 12 + 5 + 1 = 18 => carry = 1 sum = 0010 +3780 ns : 13 + 5 + 0 = 18 => carry = 1 sum = 0010 +3820 ns : 14 + 5 + 1 = 20 => carry = 1 sum = 0100 +3860 ns : 15 + 5 + 0 = 20 => carry = 1 sum = 0100 +3900 ns : 0 + 6 + 1 = 7 => carry = 0 sum = 0111 +3940 ns : 1 + 6 + 0 = 7 => carry = 0 sum = 0111 +3980 ns : 2 + 6 + 1 = 9 => carry = 0 sum = 1001 +4020 ns : 3 + 6 + 0 = 9 => carry = 0 sum = 1001 +4060 ns : 4 + 6 + 1 = 11 => carry = 0 sum = 1011 +4100 ns : 5 + 6 + 0 = 11 => carry = 0 sum = 1011 +4140 ns : 6 + 6 + 1 = 13 => carry = 0 sum = 1101 +4180 ns : 7 + 6 + 0 = 13 => carry = 0 sum = 1101 +4220 ns : 8 + 6 + 1 = 15 => carry = 0 sum = 1111 +4260 ns : 9 + 6 + 0 = 15 => carry = 0 sum = 1111 +4300 ns : 10 + 6 + 1 = 17 => carry = 1 sum = 0001 +4340 ns : 11 + 6 + 0 = 17 => carry = 1 sum = 0001 +4380 ns : 12 + 6 + 1 = 19 => carry = 1 sum = 0011 +4420 ns : 13 + 6 + 0 = 19 => carry = 1 sum = 0011 +4460 ns : 14 + 6 + 1 = 21 => carry = 1 sum = 0101 +4500 ns : 15 + 6 + 0 = 21 => carry = 1 sum = 0101 +4540 ns : 0 + 7 + 1 = 8 => carry = 0 sum = 1000 +4580 ns : 1 + 7 + 0 = 8 => carry = 0 sum = 1000 +4620 ns : 2 + 7 + 1 = 10 => carry = 0 sum = 1010 +4660 ns : 3 + 7 + 0 = 10 => carry = 0 sum = 1010 +4700 ns : 4 + 7 + 1 = 12 => carry = 0 sum = 1100 +4740 ns : 5 + 7 + 0 = 12 => carry = 0 sum = 1100 +4780 ns : 6 + 7 + 1 = 14 => carry = 0 sum = 1110 +4820 ns : 7 + 7 + 0 = 14 => carry = 0 sum = 1110 +4860 ns : 8 + 7 + 1 = 16 => carry = 1 sum = 0000 +4900 ns : 9 + 7 + 0 = 16 => carry = 1 sum = 0000 +4940 ns : 10 + 7 + 1 = 18 => carry = 1 sum = 0010 +4980 ns : 11 + 7 + 0 = 18 => carry = 1 sum = 0010 +5020 ns : 12 + 7 + 1 = 20 => carry = 1 sum = 0100 +5060 ns : 13 + 7 + 0 = 20 => carry = 1 sum = 0100 +5100 ns : 14 + 7 + 1 = 22 => carry = 1 sum = 0110 +5140 ns : 15 + 7 + 0 = 22 => carry = 1 sum = 0110 +5180 ns : 0 + 8 + 1 = 9 => carry = 0 sum = 1001 +5220 ns : 1 + 8 + 0 = 9 => carry = 0 sum = 1001 +5260 ns : 2 + 8 + 1 = 11 => carry = 0 sum = 1011 +5300 ns : 3 + 8 + 0 = 11 => carry = 0 sum = 1011 +5340 ns : 4 + 8 + 1 = 13 => carry = 0 sum = 1101 +5380 ns : 5 + 8 + 0 = 13 => carry = 0 sum = 1101 +5420 ns : 6 + 8 + 1 = 15 => carry = 0 sum = 1111 +5460 ns : 7 + 8 + 0 = 15 => carry = 0 sum = 1111 +5500 ns : 8 + 8 + 1 = 17 => carry = 1 sum = 0001 +5540 ns : 9 + 8 + 0 = 17 => carry = 1 sum = 0001 +5580 ns : 10 + 8 + 1 = 19 => carry = 1 sum = 0011 +5620 ns : 11 + 8 + 0 = 19 => carry = 1 sum = 0011 +5660 ns : 12 + 8 + 1 = 21 => carry = 1 sum = 0101 +5700 ns : 13 + 8 + 0 = 21 => carry = 1 sum = 0101 +5740 ns : 14 + 8 + 1 = 23 => carry = 1 sum = 0111 +5780 ns : 15 + 8 + 0 = 23 => carry = 1 sum = 0111 +5820 ns : 0 + 9 + 1 = 10 => carry = 0 sum = 1010 +5860 ns : 1 + 9 + 0 = 10 => carry = 0 sum = 1010 +5900 ns : 2 + 9 + 1 = 12 => carry = 0 sum = 1100 +5940 ns : 3 + 9 + 0 = 12 => carry = 0 sum = 1100 +5980 ns : 4 + 9 + 1 = 14 => carry = 0 sum = 1110 +6020 ns : 5 + 9 + 0 = 14 => carry = 0 sum = 1110 +6060 ns : 6 + 9 + 1 = 16 => carry = 1 sum = 0000 +6100 ns : 7 + 9 + 0 = 16 => carry = 1 sum = 0000 +6140 ns : 8 + 9 + 1 = 18 => carry = 1 sum = 0010 +6180 ns : 9 + 9 + 0 = 18 => carry = 1 sum = 0010 +6220 ns : 10 + 9 + 1 = 20 => carry = 1 sum = 0100 +6260 ns : 11 + 9 + 0 = 20 => carry = 1 sum = 0100 +6300 ns : 12 + 9 + 1 = 22 => carry = 1 sum = 0110 +6340 ns : 13 + 9 + 0 = 22 => carry = 1 sum = 0110 +6380 ns : 14 + 9 + 1 = 24 => carry = 1 sum = 1000 +6420 ns : 15 + 9 + 0 = 24 => carry = 1 sum = 1000 +6460 ns : 0 + 10 + 1 = 11 => carry = 0 sum = 1011 +6500 ns : 1 + 10 + 0 = 11 => carry = 0 sum = 1011 +6540 ns : 2 + 10 + 1 = 13 => carry = 0 sum = 1101 +6580 ns : 3 + 10 + 0 = 13 => carry = 0 sum = 1101 +6620 ns : 4 + 10 + 1 = 15 => carry = 0 sum = 1111 +6660 ns : 5 + 10 + 0 = 15 => carry = 0 sum = 1111 +6700 ns : 6 + 10 + 1 = 17 => carry = 1 sum = 0001 +6740 ns : 7 + 10 + 0 = 17 => carry = 1 sum = 0001 +6780 ns : 8 + 10 + 1 = 19 => carry = 1 sum = 0011 +6820 ns : 9 + 10 + 0 = 19 => carry = 1 sum = 0011 +6860 ns : 10 + 10 + 1 = 21 => carry = 1 sum = 0101 +6900 ns : 11 + 10 + 0 = 21 => carry = 1 sum = 0101 +6940 ns : 12 + 10 + 1 = 23 => carry = 1 sum = 0111 +6980 ns : 13 + 10 + 0 = 23 => carry = 1 sum = 0111 +7020 ns : 14 + 10 + 1 = 25 => carry = 1 sum = 1001 +7060 ns : 15 + 10 + 0 = 25 => carry = 1 sum = 1001 +7100 ns : 0 + 11 + 1 = 12 => carry = 0 sum = 1100 +7140 ns : 1 + 11 + 0 = 12 => carry = 0 sum = 1100 +7180 ns : 2 + 11 + 1 = 14 => carry = 0 sum = 1110 +7220 ns : 3 + 11 + 0 = 14 => carry = 0 sum = 1110 +7260 ns : 4 + 11 + 1 = 16 => carry = 1 sum = 0000 +7300 ns : 5 + 11 + 0 = 16 => carry = 1 sum = 0000 +7340 ns : 6 + 11 + 1 = 18 => carry = 1 sum = 0010 +7380 ns : 7 + 11 + 0 = 18 => carry = 1 sum = 0010 +7420 ns : 8 + 11 + 1 = 20 => carry = 1 sum = 0100 +7460 ns : 9 + 11 + 0 = 20 => carry = 1 sum = 0100 +7500 ns : 10 + 11 + 1 = 22 => carry = 1 sum = 0110 +7540 ns : 11 + 11 + 0 = 22 => carry = 1 sum = 0110 +7580 ns : 12 + 11 + 1 = 24 => carry = 1 sum = 1000 +7620 ns : 13 + 11 + 0 = 24 => carry = 1 sum = 1000 +7660 ns : 14 + 11 + 1 = 26 => carry = 1 sum = 1010 +7700 ns : 15 + 11 + 0 = 26 => carry = 1 sum = 1010 +7740 ns : 0 + 12 + 1 = 13 => carry = 0 sum = 1101 +7780 ns : 1 + 12 + 0 = 13 => carry = 0 sum = 1101 +7820 ns : 2 + 12 + 1 = 15 => carry = 0 sum = 1111 +7860 ns : 3 + 12 + 0 = 15 => carry = 0 sum = 1111 +7900 ns : 4 + 12 + 1 = 17 => carry = 1 sum = 0001 +7940 ns : 5 + 12 + 0 = 17 => carry = 1 sum = 0001 +7980 ns : 6 + 12 + 1 = 19 => carry = 1 sum = 0011 +8020 ns : 7 + 12 + 0 = 19 => carry = 1 sum = 0011 +8060 ns : 8 + 12 + 1 = 21 => carry = 1 sum = 0101 +8100 ns : 9 + 12 + 0 = 21 => carry = 1 sum = 0101 +8140 ns : 10 + 12 + 1 = 23 => carry = 1 sum = 0111 +8180 ns : 11 + 12 + 0 = 23 => carry = 1 sum = 0111 +8220 ns : 12 + 12 + 1 = 25 => carry = 1 sum = 1001 +8260 ns : 13 + 12 + 0 = 25 => carry = 1 sum = 1001 +8300 ns : 14 + 12 + 1 = 27 => carry = 1 sum = 1011 +8340 ns : 15 + 12 + 0 = 27 => carry = 1 sum = 1011 +8380 ns : 0 + 13 + 1 = 14 => carry = 0 sum = 1110 +8420 ns : 1 + 13 + 0 = 14 => carry = 0 sum = 1110 +8460 ns : 2 + 13 + 1 = 16 => carry = 1 sum = 0000 +8500 ns : 3 + 13 + 0 = 16 => carry = 1 sum = 0000 +8540 ns : 4 + 13 + 1 = 18 => carry = 1 sum = 0010 +8580 ns : 5 + 13 + 0 = 18 => carry = 1 sum = 0010 +8620 ns : 6 + 13 + 1 = 20 => carry = 1 sum = 0100 +8660 ns : 7 + 13 + 0 = 20 => carry = 1 sum = 0100 +8700 ns : 8 + 13 + 1 = 22 => carry = 1 sum = 0110 +8740 ns : 9 + 13 + 0 = 22 => carry = 1 sum = 0110 +8780 ns : 10 + 13 + 1 = 24 => carry = 1 sum = 1000 +8820 ns : 11 + 13 + 0 = 24 => carry = 1 sum = 1000 +8860 ns : 12 + 13 + 1 = 26 => carry = 1 sum = 1010 +8900 ns : 13 + 13 + 0 = 26 => carry = 1 sum = 1010 +8940 ns : 14 + 13 + 1 = 28 => carry = 1 sum = 1100 +8980 ns : 15 + 13 + 0 = 28 => carry = 1 sum = 1100 +9020 ns : 0 + 14 + 1 = 15 => carry = 0 sum = 1111 +9060 ns : 1 + 14 + 0 = 15 => carry = 0 sum = 1111 +9100 ns : 2 + 14 + 1 = 17 => carry = 1 sum = 0001 +9140 ns : 3 + 14 + 0 = 17 => carry = 1 sum = 0001 +9180 ns : 4 + 14 + 1 = 19 => carry = 1 sum = 0011 +9220 ns : 5 + 14 + 0 = 19 => carry = 1 sum = 0011 +9260 ns : 6 + 14 + 1 = 21 => carry = 1 sum = 0101 +9300 ns : 7 + 14 + 0 = 21 => carry = 1 sum = 0101 +9340 ns : 8 + 14 + 1 = 23 => carry = 1 sum = 0111 +9380 ns : 9 + 14 + 0 = 23 => carry = 1 sum = 0111 +9420 ns : 10 + 14 + 1 = 25 => carry = 1 sum = 1001 +9460 ns : 11 + 14 + 0 = 25 => carry = 1 sum = 1001 +9500 ns : 12 + 14 + 1 = 27 => carry = 1 sum = 1011 +9540 ns : 13 + 14 + 0 = 27 => carry = 1 sum = 1011 +9580 ns : 14 + 14 + 1 = 29 => carry = 1 sum = 1101 +9620 ns : 15 + 14 + 0 = 29 => carry = 1 sum = 1101 +9660 ns : 0 + 15 + 1 = 16 => carry = 1 sum = 0000 +9700 ns : 1 + 15 + 0 = 16 => carry = 1 sum = 0000 +9740 ns : 2 + 15 + 1 = 18 => carry = 1 sum = 0010 +9780 ns : 3 + 15 + 0 = 18 => carry = 1 sum = 0010 +9820 ns : 4 + 15 + 1 = 20 => carry = 1 sum = 0100 +9860 ns : 5 + 15 + 0 = 20 => carry = 1 sum = 0100 +9900 ns : 6 + 15 + 1 = 22 => carry = 1 sum = 0110 +9940 ns : 7 + 15 + 0 = 22 => carry = 1 sum = 0110 +9980 ns : 8 + 15 + 1 = 24 => carry = 1 sum = 1000 +10020 ns : 9 + 15 + 0 = 24 => carry = 1 sum = 1000 +10060 ns : 10 + 15 + 1 = 26 => carry = 1 sum = 1010 +10100 ns : 11 + 15 + 0 = 26 => carry = 1 sum = 1010 +10140 ns : 12 + 15 + 1 = 28 => carry = 1 sum = 1100 +10180 ns : 13 + 15 + 0 = 28 => carry = 1 sum = 1100 +10220 ns : 14 + 15 + 1 = 30 => carry = 1 sum = 1110 +10260 ns : 15 + 15 + 0 = 30 => carry = 1 sum = 1110 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt10.1/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/main.cpp new file mode 100644 index 000000000..58f54baf2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/main.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for parametric adder simulation */ + +#include "paramadd.h" +#include "stim.h" + +int sc_main(int ac, char *av[]) +{ + // Parameter Settings + int width = 4; + + // Signal Instantiation + sc_signal reset; + signal_bool_vector a ("Operand1"); + signal_bool_vector b ("Operand2"); + sc_signal cin; + sc_signal ready; + signal_bool_vector sum ("Sum"); + sc_signal co; + sc_signal done; + + // Clock Instantiation + sc_clock clk ("Clock", 10, SC_NS, 0.5, 0, SC_NS); + + // Process Instantiation + paramadd D1("D1", clk, reset, a, b, cin, ready, sum, + co, done, width); + stim T1("T1", clk, done, reset, a, b, cin, + ready, width); + + // Simulation Run Control + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt10.1/paramadd.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/paramadd.cpp new file mode 100644 index 000000000..7be025c2c --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/paramadd.cpp @@ -0,0 +1,89 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + paramadd.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename paramadd.cc */ +/* This is the implementation file for synchronous process `paramadd' */ + +#include "paramadd.h" + +void paramadd::entry() +{ + sc_biguint<5> sum1; + sc_unsigned a1(data_width); + sc_unsigned b1(data_width); + bool c1; + + // Reset handler + sum.write(0); + co.write(0); + wait(); + + while(true) { // Main Loop + + // HANDSHAKE + done.write(0); + do { wait(); } while (ready != 1); + + // COMPUTATION + a1 = a.read(); + b1 = b.read(); + c1 = cin.read(); + + sum1 = a1 + b1 + c1; + + // sum.write( sum1.range(data_width-1,0) ); + sc_unsigned tmp( data_width ); + tmp = sum1.range( data_width - 1, 0 ); + sum.write( tmp ); + co.write( sum1[data_width] ); + wait( 2 ); + + cout << sc_time_stamp() << "\t : " + << a1 << " + " + << b1 << " + " + << cin << " = " << sum1 + << "\t => carry = " << co + << " sum = " << sum + << endl; + + + // HANDSHAKE + done.write(1); + wait(); + } +} + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt10.1/paramadd.h b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/paramadd.h new file mode 100644 index 000000000..b9c681f1a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/paramadd.h @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + paramadd.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename paramadd.h */ +/* Interface file for synchronous process `paramadd' */ + +#include "common.h" + +SC_MODULE( paramadd ) +{ + SC_HAS_PROCESS( paramadd ); + + sc_in_clk clk; + + // Inputs + const sc_signal& reset; + const signal_bool_vector& a; + const signal_bool_vector& b; + const sc_signal& cin; + const sc_signal& ready; + // Outputs + signal_bool_vector& sum; + sc_signal& co; + sc_signal& done; + // Parameters + const int data_width; + + // Constructor + paramadd(sc_module_name NAME, + sc_clock& TICK, + const sc_signal& RESET, + const signal_bool_vector& A, + const signal_bool_vector& B, + const sc_signal& CIN, + const sc_signal& READY, + signal_bool_vector& SUM, + sc_signal& CO, + sc_signal& DONE, + const int DATA_WIDTH = 8) + : reset(RESET), a(A), + b(B), cin(CIN), ready(READY), + sum(SUM), co(CO), done(DONE), + data_width(DATA_WIDTH) + { + clk(TICK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,false); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt10.1/stim.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/stim.cpp new file mode 100644 index 000000000..a7a285d66 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/stim.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stim.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stim.cc */ +/* This is the interface file for synchronous process `stim' */ + +#include "stim.h" + +void stim::entry() +{ + // Variable definition + sc_unsigned a_tmp(data_width); + sc_unsigned b_tmp(data_width); + bool c_tmp; + int i, j; + + // Reset handler + reset.write(0); + wait(2); + + reset.write(1); + wait(); + cout << sc_time_stamp() << "\t : " + << "RESET off \t...by stim" << endl; + + // Stimulus Generation + c_tmp = 0; + for (i=0; i<16; i++) { + for (j=0; j<16; j++) { + a_tmp = j; + b_tmp = i; + c_tmp = !c_tmp; + + a.write(a_tmp); + b.write(b_tmp); + cin.write(c_tmp); + + ready.write(1); + // wait(); + do { wait(); } while (done != 1); + + ready.write(0); + // do { wait(); } while (done == 1); + wait(); + } + } + + sc_stop(); +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt10.1/stim.h b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/stim.h new file mode 100644 index 000000000..a34ab8578 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt10.1/stim.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stim.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stim.h */ +/* This is the interface file for synchronous process `stim' */ + +#include "common.h" + +SC_MODULE( stim ) +{ + SC_HAS_PROCESS( stim ); + + sc_in_clk clk; + + // Inputs + const sc_signal& done; + // Outputs + sc_signal& reset; + signal_bool_vector& a; + signal_bool_vector& b; + sc_signal& cin; + sc_signal& ready; + // Parameters + const int data_width; + + // Constructor + stim (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& DONE, + sc_signal& RESET, + signal_bool_vector& A, + signal_bool_vector& B, + sc_signal& CIN, + sc_signal& READY, + const int DATA_WIDTH = 8) + : done(DONE), reset(RESET), + a(A),b(B), cin(CIN), + ready(READY), + data_width(DATA_WIDTH) + { + clk(TICK); + SC_CTHREAD( entry, clk.neg() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.1/golden/mean.log b/src/systemc/tests/systemc/misc/user_guide/chpt11.1/golden/mean.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.1/golden/mean.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.1/mean.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt11.1/mean.cpp new file mode 100644 index 000000000..f20862063 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.1/mean.cpp @@ -0,0 +1,90 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.cc */ +/* This is the implementation file for synchronous process `mean' */ + +#include "mean.h" + +void calculate_geometric_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void calculate_harmonic_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void mean::entry() +{ + sc_signed i(24); // Will hold input a + sc_signed j(24); // Will hold input b + sc_signed k(24); // Will hold input c + sc_signed l(24); // Will hold input d + + sc_signed arith(24); // Arithmetic mean + sc_signed geom(24); // Geometric mean + sc_signed harmonic(24); // Harmonic mean + + while (true) { + // read all inputs + i = a.read().to_int(); + j = b.read().to_int(); + k = c.read().to_int(); + l = d.read().to_int(); + + // Calculate arithmetic mean + arith = (i + j + k + l) / 4; + // Calculate geometric mean + calculate_geometric_mean(i, j, k, l, geom); + // Calculate harmonic mean + calculate_harmonic_mean(i, j, k, l, harmonic); + + // write all outputs + am.write(arith); + gm.write(geom); + hm.write(harmonic); + + wait(); + } +} // end of entry function + +// Just to make the compiler shut up + +int sc_main(int ac, char *av[]) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.1/mean.h b/src/systemc/tests/systemc/misc/user_guide/chpt11.1/mean.h new file mode 100644 index 000000000..b1987436b --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.1/mean.h @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.h */ +/* This is the interface file for synchronous process `mean' */ + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector; + +SC_MODULE( mean ) +{ + SC_HAS_PROCESS( mean ); + + sc_in_clk clk; + + const signal_bool_vector& a; //input + const signal_bool_vector& b; //input + const signal_bool_vector& c; //input + const signal_bool_vector& d; //input + signal_bool_vector& am; //output + signal_bool_vector& gm; //output + signal_bool_vector& hm; //output + + //Constructor + mean(sc_module_name NAME, + sc_clock& CLK, + const signal_bool_vector& A, + const signal_bool_vector& B, + const signal_bool_vector& C, + const signal_bool_vector& D, + signal_bool_vector& AM, + signal_bool_vector& GM, + signal_bool_vector& HM) + : a(A), b(B), c(C), d(D), am(AM), gm(GM), hm(HM) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.2/golden/mean.log b/src/systemc/tests/systemc/misc/user_guide/chpt11.2/golden/mean.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.2/golden/mean.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.2/mean.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt11.2/mean.cpp new file mode 100644 index 000000000..5cf35627a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.2/mean.cpp @@ -0,0 +1,96 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.cc */ +/* This is the implementation file for synchronous process `mean' */ + +#include "mean.h" + +void calculate_geometric_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void calculate_harmonic_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void mean::entry() +{ + sc_signed i(24); // Will hold input a + sc_signed j(24); // Will hold input b + sc_signed k(24); // Will hold input c + sc_signed l(24); // Will hold input d + + sc_signed arith(24); // Arithmetic mean + sc_signed geom(24); // Geometric mean + sc_signed harmonic(24); // Harmonic mean + + while (true) { + // read all inputs + i = in.read().to_int(); + wait(); + j = in.read().to_int(); + wait(); + k = in.read().to_int(); + wait(); + l = in.read().to_int(); + + // Calculate arithmetic mean + arith = (i + j + k + l) / 4; + // Calculate geometric mean + calculate_geometric_mean(i, j, k, l, geom); + // Calculate harmonic mean + calculate_harmonic_mean(i, j, k, l, harmonic); + + // write all outputs + out.write(arith); + wait(); + out.write(geom); + wait(); + out.write(harmonic); + wait(); + + wait(); + } +} // end of entry function + +// Just to make the compiler shut up + +int sc_main(int ac, char *av[]) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.2/mean.h b/src/systemc/tests/systemc/misc/user_guide/chpt11.2/mean.h new file mode 100644 index 000000000..54b4e33e6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.2/mean.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.h */ +/* This is the interface file for synchronous process `mean' */ + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector; + +SC_MODULE( mean ) +{ + SC_HAS_PROCESS( mean ); + + sc_in_clk clk; + + const signal_bool_vector& in; //input + signal_bool_vector& out; //output + + //Constructor + mean(sc_module_name NAME, + sc_clock& CLK, + const signal_bool_vector& IN_, + signal_bool_vector& OUT_) + : in(IN_), out(OUT_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.3/golden/mean.log b/src/systemc/tests/systemc/misc/user_guide/chpt11.3/golden/mean.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.3/golden/mean.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.3/mean.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt11.3/mean.cpp new file mode 100644 index 000000000..1449a84ab --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.3/mean.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.cc */ +/* This is the implementation file for synchronous process `mean' */ + +#include "mean.h" + +void calculate_geometric_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void calculate_harmonic_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void mean::entry() +{ + sc_signed i(24); // Will hold input a + sc_signed j(24); // Will hold input b + sc_signed k(24); // Will hold input c + sc_signed l(24); // Will hold input d + + sc_signed arith(24); // Arithmetic mean + sc_signed geom(24); // Geometric mean + sc_signed harmonic(24); // Harmonic mean + + while (true) { + // read all inputs + do { wait(); } while (data_available != true); + i = in.read().to_int(); + wait(); + j = in.read().to_int(); + wait(); + k = in.read().to_int(); + wait(); + l = in.read().to_int(); + + // Calculate arithmetic mean + arith = (i + j + k + l) / 4; + // Calculate geometric mean + calculate_geometric_mean(i, j, k, l, geom); + // Calculate harmonic mean + calculate_harmonic_mean(i, j, k, l, harmonic); + + // write all outputs + data_ready.write(true); + wait(); + out.write(arith); + wait(); + out.write(geom); + wait(); + out.write(harmonic); + wait(); + data_ready.write(false); + } +} // end of entry function + +// Just to make the compiler shut up + +int sc_main(int ac, char *av[]) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.3/mean.h b/src/systemc/tests/systemc/misc/user_guide/chpt11.3/mean.h new file mode 100644 index 000000000..eb0db1a2e --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.3/mean.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.h */ +/* This is the interface file for synchronous process `mean' */ + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector; + +SC_MODULE( mean ) +{ + SC_HAS_PROCESS( mean ); + + sc_in_clk clk; + + const signal_bool_vector& in; //input + signal_bool_vector& out; //output + const sc_signal& data_available; //input + sc_signal& data_ready; //output + + //Constructor + mean(sc_module_name NAME, + sc_clock& CLK, + const signal_bool_vector& IN_, + signal_bool_vector& OUT_, + const sc_signal& DATA_AVAILABLE, + sc_signal& DATA_READY) + : in(IN_), out(OUT_), data_available(DATA_AVAILABLE), data_ready(DATA_READY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.4/golden/mean.log b/src/systemc/tests/systemc/misc/user_guide/chpt11.4/golden/mean.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.4/golden/mean.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.4/mean.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt11.4/mean.cpp new file mode 100644 index 000000000..bc82a7739 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.4/mean.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.cc */ +/* This is the implementation file for synchronous process `mean' */ + +#include "mean.h" + +void calculate_geometric_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void calculate_harmonic_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void mean::entry() +{ + sc_signed i(24); // Will hold input a + sc_signed j(24); // Will hold input b + sc_signed k(24); // Will hold input c + sc_signed l(24); // Will hold input d + + sc_signed arith(24); // Arithmetic mean + sc_signed geom(24); // Geometric mean + sc_signed harmonic(24); // Harmonic mean + + while (true) { + // read all inputs + send_input.write(true); + wait(2); + i = in.read().to_int(); + wait(); + j = in.read().to_int(); + wait(); + k = in.read().to_int(); + wait(); + l = in.read().to_int(); + send_input.write(false); + + // Calculate arithmetic mean + arith = (i + j + k + l) / 4; + // Calculate geometric mean + calculate_geometric_mean(i, j, k, l, geom); + // Calculate harmonic mean + calculate_harmonic_mean(i, j, k, l, harmonic); + + // write all outputs + do { wait(); } while (receiver_ready != true); + wait(); + out.write(arith); + wait(); + out.write(geom); + wait(); + out.write(harmonic); + wait(); + } +} // end of entry function + +// Just to make the compiler shut up + +int sc_main(int ac, char *av[]) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.4/mean.h b/src/systemc/tests/systemc/misc/user_guide/chpt11.4/mean.h new file mode 100644 index 000000000..a0495a3d0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.4/mean.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.h */ +/* This is the interface file for synchronous process `mean' */ + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +SC_MODULE( mean ) +{ + SC_HAS_PROCESS( mean ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in; //input + sc_signal_bool_vector& out; //output + const sc_signal& receiver_ready; //input + sc_signal& send_input; //output + + //Constructor + mean(sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_, + sc_signal_bool_vector& OUT_, + const sc_signal& RECEIVER_READY, + sc_signal& SEND_INPUT) + : in(IN_), out(OUT_), receiver_ready(RECEIVER_READY), send_input(SEND_INPUT) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.5/golden/mean.log b/src/systemc/tests/systemc/misc/user_guide/chpt11.5/golden/mean.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.5/golden/mean.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.5/mean.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt11.5/mean.cpp new file mode 100644 index 000000000..2689c305a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.5/mean.cpp @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.cc */ +/* This is the implementation file for synchronous process `mean' */ + +#include "mean.h" + +void calculate_geometric_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void calculate_harmonic_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void mean::entry() +{ + sc_signed i(24); // Will hold input a + sc_signed j(24); // Will hold input b + sc_signed k(24); // Will hold input c + sc_signed l(24); // Will hold input d + + sc_signed arith(24); // Arithmetic mean + sc_signed geom(24); // Geometric mean + sc_signed harmonic(24); // Harmonic mean + + while (true) { + // read all inputs + do { wait(); } while (input_available != true); + send_data.write(true); + wait(); + i = in.read().to_int(); + wait(); + j = in.read().to_int(); + wait(); + k = in.read().to_int(); + wait(); + l = in.read().to_int(); + send_data.write(false); + + // Calculate arithmetic mean + arith = (i + j + k + l) / 4; + // Calculate geometric mean + calculate_geometric_mean(i, j, k, l, geom); + // Calculate harmonic mean + calculate_harmonic_mean(i, j, k, l, harmonic); + + // write all outputs + output_ready.write(true); + do { wait(); } while (receiver_ready != true); + wait(); + out.write(arith); + wait(); + out.write(geom); + wait(); + out.write(harmonic); + wait(); + output_ready.write(false); + } +} // end of entry function + +// Just to make the compiler shut up + +int sc_main(int ac, char *av[]) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.5/mean.h b/src/systemc/tests/systemc/misc/user_guide/chpt11.5/mean.h new file mode 100644 index 000000000..1495e5285 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.5/mean.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.h */ +/* This is the interface file for synchronous process `mean' */ + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +SC_MODULE( mean ) +{ + SC_HAS_PROCESS( mean ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in; //input + sc_signal_bool_vector& out; //output + const sc_signal& input_available; //input + sc_signal& send_data; //output + sc_signal& output_ready; //output + const sc_signal& receiver_ready; //input + + //Constructor + mean(sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_, + sc_signal_bool_vector& OUT_, + const sc_signal& INPUT_AVAILABLE, + sc_signal& SEND_DATA, + sc_signal& OUTPUT_READY, + const sc_signal& RECEIVER_READY) + : in(IN_), out(OUT_), receiver_ready(RECEIVER_READY), send_data(SEND_DATA), input_available(INPUT_AVAILABLE), output_ready(OUTPUT_READY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.6/golden/mean.log b/src/systemc/tests/systemc/misc/user_guide/chpt11.6/golden/mean.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.6/golden/mean.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.6/mean.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt11.6/mean.cpp new file mode 100644 index 000000000..ffef8d07f --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.6/mean.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.cc */ +/* This is the implementation file for synchronous process `mean' */ + +#include "mean.h" + +void calculate_geometric_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void calculate_harmonic_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void mean::entry() +{ + sc_signed i(24); // Will hold input a + sc_signed j(24); // Will hold input b + sc_signed k(24); // Will hold input c + sc_signed l(24); // Will hold input d + + sc_signed arith(24); // Arithmetic mean + sc_signed geom(24); // Geometric mean + sc_signed harmonic(24); // Harmonic mean + + while (true) { + // read all inputs + send_input.write(true); + do { wait(); } while (data_available != true); + i = in.read().to_int(); + wait(); + j = in.read().to_int(); + wait(); + k = in.read().to_int(); + wait(); + l = in.read().to_int(); + send_input.write(false); + + // Calculate arithmetic mean + arith = (i + j + k + l) / 4; + // Calculate geometric mean + calculate_geometric_mean(i, j, k, l, geom); + // Calculate harmonic mean + calculate_harmonic_mean(i, j, k, l, harmonic); + + // write all outputs + do { wait(); } while (receiver_ready != true); + data_ready.write(true); + wait(); + out.write(arith); + wait(); + out.write(geom); + wait(); + out.write(harmonic); + wait(); + data_ready.write(false); + } +} // end of entry function + +// Just to make the compiler shut up + +int sc_main(int ac, char *av[]) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.6/mean.h b/src/systemc/tests/systemc/misc/user_guide/chpt11.6/mean.h new file mode 100644 index 000000000..4f7fb17a3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.6/mean.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* This is the interface file for synchronous process `mean' */ + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector; + +SC_MODULE( mean ) +{ + SC_HAS_PROCESS( mean ); + + sc_in_clk clk; + + const signal_bool_vector& in; //input + signal_bool_vector& out; //output + const sc_signal& data_available; //input + sc_signal& send_input; //output + sc_signal& data_ready; //output + const sc_signal& receiver_ready; //input + + //Constructor + mean(sc_module_name NAME, + sc_clock& CLK, + const signal_bool_vector& IN_, + signal_bool_vector& OUT_, + const sc_signal& DATA_AVAILABLE, + sc_signal& SEND_INPUT, + sc_signal& DATA_READY, + const sc_signal& RECEIVER_READY) + : in(IN_), out(OUT_), receiver_ready(RECEIVER_READY), send_input(SEND_INPUT), data_available(DATA_AVAILABLE), data_ready(DATA_READY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.7/golden/mean.log b/src/systemc/tests/systemc/misc/user_guide/chpt11.7/golden/mean.log new file mode 100644 index 000000000..6d243dcc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.7/golden/mean.log @@ -0,0 +1 @@ +SystemC Simulation diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.7/mean.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt11.7/mean.cpp new file mode 100644 index 000000000..64b210b10 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.7/mean.cpp @@ -0,0 +1,123 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.cc */ +/* This is the implementation file for synchronous process `mean' */ + +#include "mean.h" + +void calculate_geometric_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void calculate_harmonic_mean(const sc_signed& a, const sc_signed& b, + const sc_signed& c, const sc_signed& d, + sc_signed& mean){} + +void mean::entry() +{ + sc_signed i(24); // Will hold input a + sc_signed j(24); // Will hold input b + sc_signed k(24); // Will hold input c + sc_signed l(24); // Will hold input d + + sc_signed arith(24); // Arithmetic mean + sc_signed geom(24); // Geometric mean + sc_signed harmonic(24); // Harmonic mean + + while (true) { + // read all inputs + do { wait(); } while (input_available != true); + send_data.write(true); + do { wait(); } while (input_available != false); + i = in.read().to_int(); + send_data.write(false); + + do { wait(); } while (input_available != true); + send_data.write(true); + do { wait(); } while (input_available != false); + j = in.read().to_int(); + send_data.write(false); + + do { wait(); } while (input_available != true); + send_data.write(true); + do { wait(); } while (input_available != false); + k = in.read().to_int(); + send_data.write(false); + + do { wait(); } while (input_available != true); + send_data.write(true); + do { wait(); } while (input_available != false); + l = in.read().to_int(); + send_data.write(false); + wait(); + + // Calculate arithmetic mean + arith = (i + j + k + l) / 4; + // Calculate geometric mean + calculate_geometric_mean(i, j, k, l, geom); + // Calculate harmonic mean + calculate_harmonic_mean(i, j, k, l, harmonic); + + // write all outputs + output_ready.write(true); + do { wait(); } while (receiver_ready != true); + output_ready.write(false); + out.write(arith); + do { wait(); } while (receiver_ready != false); + + output_ready.write(true); + do { wait(); } while (receiver_ready != true); + output_ready.write(false); + out.write(geom); + do { wait(); } while (receiver_ready != false); + + + output_ready.write(true); + do { wait(); } while (receiver_ready != true); + output_ready.write(false); + out.write(harmonic); + do { wait(); } while (receiver_ready != false); + } +} // end of entry function + +// Just to make the compiler shut up + +int sc_main(int ac, char *av[]) +{ + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt11.7/mean.h b/src/systemc/tests/systemc/misc/user_guide/chpt11.7/mean.h new file mode 100644 index 000000000..1495e5285 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt11.7/mean.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mean.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename mean.h */ +/* This is the interface file for synchronous process `mean' */ + +#include "systemc.h" + +typedef sc_signal > sc_signal_bool_vector; + +SC_MODULE( mean ) +{ + SC_HAS_PROCESS( mean ); + + sc_in_clk clk; + + const sc_signal_bool_vector& in; //input + sc_signal_bool_vector& out; //output + const sc_signal& input_available; //input + sc_signal& send_data; //output + sc_signal& output_ready; //output + const sc_signal& receiver_ready; //input + + //Constructor + mean(sc_module_name NAME, + sc_clock& CLK, + const sc_signal_bool_vector& IN_, + sc_signal_bool_vector& OUT_, + const sc_signal& INPUT_AVAILABLE, + sc_signal& SEND_DATA, + sc_signal& OUTPUT_READY, + const sc_signal& RECEIVER_READY) + : in(IN_), out(OUT_), receiver_ready(RECEIVER_READY), send_data(SEND_DATA), input_available(INPUT_AVAILABLE), output_ready(OUTPUT_READY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.1/accessor.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/accessor.cpp new file mode 100644 index 000000000..30f2888cf --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/accessor.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + accessor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename accessor.cc */ +/* This is the implementation file for synchronous process 'accessor' */ + +#include "accessor.h" + +void accessor::entry() +{ + int addr; + int datao; + int datai; + + addr = 10; + datao = 0xdeadbeef; + + while (true) { + // Write memory location first + chip_select.write(true); + write_enable.write(true); + address.write(addr); + dataout.write(datao); + cout << "Accessor: Data Written = " << hex << datao << " at address " + << hex << addr << endl; + wait(); // To make all the outputs appear at the interface + + // some process functionality not shown here during which chip + // chip select is deasserted + chip_select.write(false); + dataout.write(0); + wait(); + + // Now read memory location + chip_select.write(true); + write_enable.write(false); + address.write(addr); + wait(); // To make all the outputs appear at the interface + + datai = datain.read().to_int(); + cout << "Accessor: Data Read = " << hex << datai << " from address " + << hex << addr << endl; + chip_select.write(false); + wait(); + + addr++; + datao++; + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.1/accessor.h b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/accessor.h new file mode 100644 index 000000000..d31c64eb6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/accessor.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + accessor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename accessor.h */ +/* This is the interface file for synchronous process 'accessor' */ + +#include "common.h" + +SC_MODULE( accessor ) +{ + SC_HAS_PROCESS( accessor ); + + sc_in_clk clk; + + const signal_bool_vector32& datain; //input + sc_signal& chip_select; //output + sc_signal& write_enable; //output + signal_bool_vector10& address; //output + signal_bool_vector32& dataout; //output + + //Constructor + accessor(sc_module_name NAME, + sc_clock& CLK, + const signal_bool_vector32& DATAIN, + sc_signal& CHIP_SELECT, + sc_signal& WRITE_ENABLE, + signal_bool_vector10& ADDRESS, + signal_bool_vector32& DATAOUT) + : datain(DATAIN), chip_select(CHIP_SELECT), + write_enable(WRITE_ENABLE), address(ADDRESS), dataout(DATAOUT) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.1/chpt12.1.f b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/chpt12.1.f new file mode 100644 index 000000000..f8f6c63a8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/chpt12.1.f @@ -0,0 +1,3 @@ +chpt12.1/accessor.cpp +chpt12.1/main.cpp +chpt12.1/ram.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.1/common.h b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/common.h new file mode 100644 index 000000000..5bdfda659 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector10; +typedef sc_signal > signal_bool_vector32; + +#endif diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.1/golden/chpt12.1.log b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/golden/chpt12.1.log new file mode 100644 index 000000000..e2074c96b --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/golden/chpt12.1.log @@ -0,0 +1,15 @@ +SystemC Simulation +Accessor: Data Written = deadbeef at address a +Accessor: Data Read = deadbeef from address a +Accessor: Data Written = deadbef0 at address b +Accessor: Data Read = deadbef0 from address b +Accessor: Data Written = deadbef1 at address c +Accessor: Data Read = deadbef1 from address c +Accessor: Data Written = deadbef2 at address d +Accessor: Data Read = deadbef2 from address d +Accessor: Data Written = deadbef3 at address e +Accessor: Data Read = deadbef3 from address e +Accessor: Data Written = deadbef4 at address f +Accessor: Data Read = deadbef4 from address f +Accessor: Data Written = deadbef5 at address 10 +Accessor: Data Read = deadbef5 from address 10 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.1/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/main.cpp new file mode 100644 index 000000000..bc889e7af --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/main.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for memory simulation */ + +#include "accessor.h" +#include "ram.h" + +int global_mem[4000]; + +int sc_main(int ac, char *av[]) +{ + sc_signal cs("CS"); + sc_signal we("WE"); + signal_bool_vector10 addr("Address"); + signal_bool_vector32 data1("Data1"); + signal_bool_vector32 data2("Data2"); + + sc_clock clk("Clock", 20, SC_NS, 0.5, 0.0, SC_NS); + + accessor A("Accessor", clk, data1, cs, we, addr, data2); + ram R("Ram", data2, cs, we, addr, data1); + + sc_start(560, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.1/ram.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/ram.cpp new file mode 100644 index 000000000..2296a9770 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/ram.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + ram.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename ram.cc */ +/* This is the implementation file for asynchronous process `ram' */ + +#include "ram.h" + +extern int global_mem[]; + +void ram::entry() +{ + int address; + + if (cs.read() == true) { // Block selected + address = addr.read().to_int(); + if (we.read() == true) { // Write operation + global_mem[address] = datain.read().to_int(); + } + else { // Read operation + dataout.write(global_mem[address]); + } + } + // else block not selected +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.1/ram.h b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/ram.h new file mode 100644 index 000000000..cbbcd56f5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.1/ram.h @@ -0,0 +1,74 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + ram.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename ram.h */ +/* This is the interface file for asynchronous process 'ram' */ + +#include "common.h" + +SC_MODULE( ram ) +{ + SC_HAS_PROCESS( ram ); + + const signal_bool_vector32& datain; //input + const sc_signal& cs; //input + const sc_signal& we; //input + const signal_bool_vector10& addr; //input + signal_bool_vector32& dataout; //output + + //Constructor + ram(sc_module_name NAME, + const signal_bool_vector32& DATAIN, + const sc_signal& CS, + const sc_signal& WE, + const signal_bool_vector10& ADDR, + signal_bool_vector32& DATAOUT) + : datain(DATAIN), cs(CS), we(WE), + addr(ADDR), dataout(DATAOUT) + { + SC_METHOD( entry ); + sensitive << datain; + sensitive << cs; + sensitive << we; + sensitive << addr; + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.2/accessor.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/accessor.cpp new file mode 100644 index 000000000..dbab69698 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/accessor.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + accessor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename accessor.cc */ +/* This is the implementation file for synchronous process 'accessor' */ + +#include "accessor.h" + +void accessor::entry() +{ + int addr; + int datao; + int datai; + + addr = 10; + datao = 0xdeadbeef; + + while (true) { + // Write memory location first + chip_select.write(true); + write_enable.write(true); + address.write(addr); + dataout.write(datao); + cout << "Accessor: Data Written = " << hex << datao << " at address " + << hex << addr << endl; + wait(memory_latency); // To make all the outputs appear at the interface + + // some process functionality not shown here during which chip + // chip select is deasserted and bus is tristated + chip_select.write(false); + dataout.write(0); + wait(); + + // Now read memory location + chip_select.write(true); + write_enable.write(false); + address.write(addr); + wait(memory_latency); // For data to appear + + datai = datain.read().to_int(); + cout << "Accessor: Data Read = " << hex << datai << " from address " + << hex << addr << endl; + chip_select.write(false); + wait(); + + addr++; + datao++; + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.2/accessor.h b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/accessor.h new file mode 100644 index 000000000..74e1ad141 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/accessor.h @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + accessor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename accessor.h */ +/* This is the interface file for synchronous process 'accessor' */ + +#include "common.h" + +SC_MODULE( accessor ) +{ + SC_HAS_PROCESS( accessor ); + + sc_in_clk clk; + + const signal_bool_vector32& datain; //input + sc_signal& chip_select; //output + sc_signal& write_enable; //output + signal_bool_vector10& address; //output + signal_bool_vector32& dataout; //output + + // Parameter + const int memory_latency; + + //Constructor + accessor(sc_module_name NAME, + sc_clock& CLK, + const signal_bool_vector32& DATAIN, + sc_signal& CHIP_SELECT, + sc_signal& WRITE_ENABLE, + signal_bool_vector10& ADDRESS, + signal_bool_vector32& DATAOUT, + const int MEMORY_LATENCY = 1) + : datain(DATAIN), chip_select(CHIP_SELECT), + write_enable(WRITE_ENABLE), address(ADDRESS), dataout(DATAOUT), + memory_latency(MEMORY_LATENCY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.2/chpt12.2.f b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/chpt12.2.f new file mode 100644 index 000000000..b0f5c4a21 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/chpt12.2.f @@ -0,0 +1,3 @@ +chpt12.2/accessor.cpp +chpt12.2/main.cpp +chpt12.2/ram.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.2/common.h b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/common.h new file mode 100644 index 000000000..5bdfda659 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/common.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector10; +typedef sc_signal > signal_bool_vector32; + +#endif diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.2/golden/chpt12.2.log b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/golden/chpt12.2.log new file mode 100644 index 000000000..6ac89b345 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/golden/chpt12.2.log @@ -0,0 +1,18 @@ +SystemC Simulation +Accessor: Data Written = deadbeef at address a +Accessor: Data Read = deadbeef from address a +Accessor: Data Written = deadbef0 at address b +Accessor: Data Read = deadbef0 from address b +Accessor: Data Written = deadbef1 at address c +Accessor: Data Read = deadbef1 from address c +Accessor: Data Written = deadbef2 at address d +Accessor: Data Read = deadbef2 from address d +Accessor: Data Written = deadbef3 at address e +Accessor: Data Read = deadbef3 from address e +Accessor: Data Written = deadbef4 at address f +Accessor: Data Read = deadbef4 from address f +Accessor: Data Written = deadbef5 at address 10 +Accessor: Data Read = deadbef5 from address 10 +Accessor: Data Written = deadbef6 at address 11 +Accessor: Data Read = deadbef6 from address 11 +Accessor: Data Written = deadbef7 at address 12 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.2/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/main.cpp new file mode 100644 index 000000000..148ed84db --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/main.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for memory simulation */ + +#include "accessor.h" +#include "ram.h" + +int sc_main(int ac, char *av[]) +{ + sc_signal cs("CS"); + sc_signal we("WE"); + signal_bool_vector10 addr("Address"); + signal_bool_vector32 data1("Data1"); + signal_bool_vector32 data2("Data2"); + const int delay_cycles = 2; + + sc_clock clk("Clock", 20, SC_NS, 0.5, 0.0, SC_NS); + + accessor A("Accessor", clk, data1, cs, we, addr, data2, delay_cycles); + ram R("Ram", clk, data2, cs, we, addr, data1, delay_cycles); + + sc_start(1060, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.2/ram.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/ram.cpp new file mode 100644 index 000000000..2aa9a5c47 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/ram.cpp @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + ram.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename ram.cc */ +/* This is the implementation file for asynchronous process `ram' */ + +#include "ram.h" + +void ram::entry() +{ + int address; + + while (true) { + do { wait(); } while (cs != true); + address = addr.read().to_int(); + if (we.read() == true) { // Write operation + wait(wait_cycles-1); + memory[address] = datain.read().to_int(); + } + else { // Read operation + if (wait_cycles > 2) + wait(wait_cycles-2); // Introduce delay needed + dataout.write(memory[address]); + wait(); + } + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt12.2/ram.h b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/ram.h new file mode 100644 index 000000000..f1b3b824b --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt12.2/ram.h @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + ram.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename ram.h */ +/* This is the interface file for synchronous process 'ram' */ + +#include "common.h" + +SC_MODULE( ram ) +{ + SC_HAS_PROCESS( ram ); + + sc_in_clk clk; + + const signal_bool_vector32& datain; //input + const sc_signal& cs; //input + const sc_signal& we; //input + const signal_bool_vector10& addr; //input + signal_bool_vector32& dataout; //output + + // Internal variable + int memory[4000]; + + // Parameter + const int wait_cycles; // Number of cycles it takes to access memory + + //Constructor + ram(sc_module_name NAME, + sc_clock& TICK, + const signal_bool_vector32& DATAIN, + const sc_signal& CS, + const sc_signal& WE, + const signal_bool_vector10& ADDR, + signal_bool_vector32& DATAOUT, + const int WAIT_CYCLES = 1) + : datain(DATAIN), cs(CS), we(WE), + addr(ADDR), dataout(DATAOUT), wait_cycles(WAIT_CYCLES) + { + clk(TICK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt14.1/chpt14.1.f b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/chpt14.1.f new file mode 100644 index 000000000..6ce18bf40 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/chpt14.1.f @@ -0,0 +1,3 @@ +chpt14.1/main.cpp +chpt14.1/proc1.cpp +chpt14.1/proc2.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt14.1/golden/chpt14.1.log b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/golden/chpt14.1.log new file mode 100644 index 000000000..81d08281a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/golden/chpt14.1.log @@ -0,0 +1,33 @@ +SystemC Simulation + +Proc1: Initiating Transfer +Proc1: Data Ready has value = 1 at time 20 ns +Proc1: Data Ack has value = 0 at same time +Proc2: Received data = 10 at time 20 ns +Proc1: Data Ack Received at time 30 ns +Proc1: Data Ready has value = 0 at time 40 ns +Proc1: Transfer complete + +Proc1: Initiating Transfer +Proc1: Data Ready has value = 1 at time 50 ns +Proc1: Data Ack has value = 0 at same time +Proc2: Received data = 11 at time 50 ns +Proc1: Data Ack Received at time 60 ns +Proc1: Data Ready has value = 0 at time 70 ns +Proc1: Transfer complete + +Proc1: Initiating Transfer +Proc1: Data Ready has value = 1 at time 80 ns +Proc1: Data Ack has value = 0 at same time +Proc2: Received data = 12 at time 80 ns +Proc1: Data Ack Received at time 90 ns +Proc1: Data Ready has value = 0 at time 100 ns +Proc1: Transfer complete + +Proc1: Initiating Transfer +Proc1: Data Ready has value = 1 at time 110 ns +Proc1: Data Ack has value = 0 at same time +Proc2: Received data = 13 at time 110 ns + +Info: /OSCI/SystemC: Simulation stopped by user. +SIMULATION COMPLETED AT TIME 110 ns diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt14.1/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/main.cpp new file mode 100644 index 000000000..0d21a9bb9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/main.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for handshaking simulation */ + +#include "proc1.h" +#include "proc2.h" + +int sc_main(int ac, char *av[]) +{ + sc_signal data_ready; + sc_signal data_ack; + sc_signal data; + + sc_clock clock("CLOCK", 10, SC_NS, 0.5, 0.0, SC_NS); + + proc1 Master("MasterProcess", clock, data_ack, data, data_ready); + proc2 Slave("SlaveProcess", clock, data_ready, data, data_ack); + + sc_start(); + cout << "SIMULATION COMPLETED AT TIME " << sc_time_stamp() << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc1.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc1.cpp new file mode 100644 index 000000000..2c7463e42 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc1.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc1.cc */ +/* This is the implementation file for synchronous process `proc1' */ + +#include "proc1.h" + +void proc1::entry() +{ + int i = 10; + + data_ready.write(false); + wait(); + + while(true) { + cout << endl << "Proc1: Initiating Transfer" << endl; + data_ready.write(true); + data.write(i++); + wait(); + cout << "Proc1: Data Ready has value = " << data_ready.read() + << " at time " << sc_time_stamp() << endl; + cout << "Proc1: Data Ack has value = " << data_ack.read() + << " at same time" << endl; + do { wait(); } while (data_ack != true); + cout << "Proc1: Data Ack Received at time " << sc_time_stamp() << + endl; + data_ready.write(false); + wait(); + cout << "Proc1: Data Ready has value = " << data_ready.read() + << " at time " << sc_time_stamp() << endl; + cout << "Proc1: Transfer complete" << endl; + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc1.h b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc1.h new file mode 100644 index 000000000..85e801580 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc1.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc1.h */ +/* This is the interface file for synchronous process `proc1' */ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in_clk clk; + + const sc_signal& data_ack; //input + sc_signal& data; //output + sc_signal& data_ready; //output + + //Constructor + proc1(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& DATA_ACK, + sc_signal& DATA, + sc_signal& DATA_READY) + : data_ack(DATA_ACK), data(DATA), data_ready(DATA_READY) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc2.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc2.cpp new file mode 100644 index 000000000..6047baea9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc2.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc2.cc */ +/* This is the implementation file for synchronous process `proc2' */ + +#include "proc2.h" + +void proc2::entry() +{ + int i; + + data_ack.write(false); + wait(); + + while (true) { + do { wait(); } while (data_ready != true); + i = data.read(); + cout << "Proc2: Received data = " << i << " at time " << + sc_time_stamp() << endl; + if (i > 12) { + sc_stop(); + } + data_ack.write(true); + wait(); + do { wait(); } while (data_ready != false); + data_ack.write(false); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc2.h b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc2.h new file mode 100644 index 000000000..d056542c2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt14.1/proc2.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + proc2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename proc2.h */ +/* This is the interface file for synchronous process `proc2' */ + +#include "systemc.h" + +SC_MODULE( proc2 ) +{ + SC_HAS_PROCESS( proc2 ); + + sc_in_clk clk; + + const sc_signal& data_ready; //input + const sc_signal& data; //input + sc_signal& data_ack; //output + + //Constructor + proc2(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& DATA_READY, + const sc_signal& DATA, + sc_signal& DATA_ACK) + : data_ready(DATA_READY), data(DATA), data_ack(DATA_ACK) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/chpt3.1.f b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/chpt3.1.f new file mode 100644 index 000000000..e036afa06 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/chpt3.1.f @@ -0,0 +1,4 @@ +chpt3.1/counter.cpp +chpt3.1/fsmr.cpp +chpt3.1/main.cpp +chpt3.1/sg.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/counter.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/counter.cpp new file mode 100644 index 000000000..a5cf06e8f --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/counter.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + counter.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* File containing functionality of counter */ + +#include "counter.h" + +void counter::entry() +{ + int count; + + count = 0; + while (true) { // infinite loop + do { wait(); } while (found != true); + count = count + 1; + cout << "\nFound Count is " << count << endl; + } +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/counter.h b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/counter.h new file mode 100644 index 000000000..400246f5f --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/counter.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + counter.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Header file for the counter that counts number of strings found */ + +#include "systemc.h" + +SC_MODULE( counter ) +{ + SC_HAS_PROCESS( counter ); + + sc_in_clk clk; + + // The inputs + const sc_signal& found; + + // The constructor + counter(sc_module_name NAME, + sc_clock& POS_CLK, + const sc_signal& FOUND) + : found(FOUND) { + clk(POS_CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // The main functionality of the process + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/fsmr.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/fsmr.cpp new file mode 100644 index 000000000..d2fef570d --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/fsmr.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsmr.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* File containing functionality of the FSM recognizer */ + +#include "fsmr.h" + +void fsm_recognizer::entry() +{ + char c; + int state = 0; + bool out; + + while (true) { + do { wait(); } while (data_ready != true); + c = input_char.read(); + cout << c << flush; + + switch(state) { + case 0: + if (c == pattern[0]) state = 1; + else state = 0; + out = false; + break; + case 1: + if (c == pattern[1]) state = 2; + else state = 0; + out = false; + break; + case 2: + if (c == pattern[2]) state = 3; + else state = 0; + out = false; + break; + case 3: + if (c == pattern[3]) out = true; + else out = false; + state = 0; + break; + default: + cout << "Error: FSM in bad state." << endl; + break; + } + + found.write(out); + wait(); // for writing the found signal + found.write(false); // reset the found signal + } +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/fsmr.h b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/fsmr.h new file mode 100644 index 000000000..237afcfae --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/fsmr.h @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsmr.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Header file for FSM recognizer */ + +#include "systemc.h" + +SC_MODULE( fsm_recognizer ) +{ + SC_HAS_PROCESS( fsm_recognizer ); + + sc_in_clk clk; + + // The input signals + const sc_signal& input_char; // The input character + const sc_signal& data_ready; // The data ready signal + // The output signals + sc_signal& found; // The indicator that sequence found + + // The internal variables + char pattern[4]; // This string will hold the pattern to match against + + // The constructor + fsm_recognizer(sc_module_name NAME, + sc_clock& TICK, + const sc_signal& INPUT_CHAR, + const sc_signal& DATA_READY, + sc_signal& FOUND) + : input_char(INPUT_CHAR), data_ready(DATA_READY), + found(FOUND) { + clk(TICK); + SC_CTHREAD( entry, clk.pos() ); + found = 0; + pattern[0] = 'S'; + pattern[1] = 'c'; + pattern[2] = 'e'; + pattern[3] = 'n'; + } + + // The functionality of the process + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/golden/chpt3.1.log b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/golden/chpt3.1.log new file mode 100644 index 000000000..52e7c3766 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/golden/chpt3.1.log @@ -0,0 +1,12 @@ +SystemC Simulation +Synopsys is delivering great value through Scen +Found Count is 1 +ic. I cannot wait to use Scen +Found Count is 2 +ic +Compiler and Scen +Found Count is 3 +ic Simulator. I am learning a lot about modeling using +Scen +Found Count is 4 +ic. diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/main.cpp new file mode 100644 index 000000000..d432b7f42 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/main.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main routine - top level */ + +#include "counter.h" +#include "sg.h" +#include "fsmr.h" + +int sc_main(int ac, char *av[]) +{ + sc_signal handshake ("HS"); + sc_signal found; + sc_signal stream ("ST"); + + sc_clock clk("Clock", 20, SC_NS, 0.5, 0.0, SC_NS); + + counter cnt("COUNTER", clk, found); + fsm_recognizer fsm("Recog", clk, stream, handshake, found); + stimgen chargen("TESTB", clk, stream, handshake); + + int n; + if (ac == 2) n = atoi(av[1]); + else n = 6340; + sc_start(n, SC_NS); + cout << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/sg.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/sg.cpp new file mode 100644 index 000000000..65edd73e6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/sg.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sg.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* File containing functionality for the Stimulus Generator */ + +#include "sg.h" + +void stimgen::entry() +{ + char c; + FILE *file; + + file = fopen("./chpt3.1/testcase", "r"); + + while (true) { + fscanf(file, "%c", &c); + data_ready.write(true); + stream.write(c); + wait(); + data_ready.write(false); + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/sg.h b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/sg.h new file mode 100644 index 000000000..937c3169e --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/sg.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sg.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Header file for the stimulus generator */ + +#include "systemc.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // The output + sc_signal& stream; + sc_signal& data_ready; + + // The constructor + stimgen(sc_module_name NAME, + sc_clock& CLK, + sc_signal& STREAM, + sc_signal& DATA_READY) + : stream(STREAM), data_ready(DATA_READY) { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // The functionality of the process + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.1/testcase b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/testcase new file mode 100644 index 000000000..3b56603ff --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.1/testcase @@ -0,0 +1,9 @@ +Synopsys is delivering great value through Scenic. I cannot wait to use Scenic +Compiler and Scenic Simulator. I am learning a lot about modeling using +Scenic. + +This is a testcase for my first Scenic program. I have learnt modeling using +Scenic and would now like to check if I can really program in Scenic. There is +no doubt in my mind that Scenic is the best way to model hardware. The Scenic +Compiler will make a lot of things easy by implementing by refined Scenic +models. diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/chpt3.2.f b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/chpt3.2.f new file mode 100644 index 000000000..88feda635 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/chpt3.2.f @@ -0,0 +1,4 @@ +chpt3.2/counter.cpp +chpt3.2/fsmr.cpp +chpt3.2/main.cpp +chpt3.2/sg.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/counter.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/counter.cpp new file mode 100644 index 000000000..7dbab48d1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/counter.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + counter.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* File containing functionality of counter */ + +#include "counter.h" + +void counter::entry() +{ + int count; + + count = 0; + while (true) { // infinite loop + do { wait(); } while (found != true); + count = count + 1; + cout << "\nFound Count is " << count << "\n"; + } +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/counter.h b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/counter.h new file mode 100644 index 000000000..400246f5f --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/counter.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + counter.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Header file for the counter that counts number of strings found */ + +#include "systemc.h" + +SC_MODULE( counter ) +{ + SC_HAS_PROCESS( counter ); + + sc_in_clk clk; + + // The inputs + const sc_signal& found; + + // The constructor + counter(sc_module_name NAME, + sc_clock& POS_CLK, + const sc_signal& FOUND) + : found(FOUND) { + clk(POS_CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // The main functionality of the process + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/fsmr.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/fsmr.cpp new file mode 100644 index 000000000..adb1a9c81 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/fsmr.cpp @@ -0,0 +1,83 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsmr.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* File containing functionality of the FSM recognizer */ + +#include "fsmr.h" + +void fsm_recognizer::entry() +{ + char c; + int state = 0; + bool out; + + while (true) { + do { wait(); } while (data_ready != true); + c = input_char.read(); + cout << c; + + switch(state) { + case 0: + if (c == pattern[0]) state = 1; + else state = 0; + out = false; + break; + case 1: + if (c == pattern[1]) state = 2; + else state = 0; + out = false; + break; + case 2: + if (c == pattern[2]) state = 3; + else state = 0; + out = false; + break; + case 3: + if (c == pattern[3]) out = true; + else out = false; + state = 0; + break; + default: + cout << "Error: FSM in bad state." << endl; + break; + } + + found.write(out); + wait(); // for writing the found signal + found.write(false); // reset the found signal + } +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/fsmr.h b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/fsmr.h new file mode 100644 index 000000000..13b192655 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/fsmr.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + fsmr.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Header file for FSM recognizer */ + +#include "systemc.h" + +SC_MODULE( fsm_recognizer ) +{ + SC_HAS_PROCESS( fsm_recognizer ); + + sc_in_clk clk; + + // The input signals + const sc_signal& input_char; // The input character + const sc_signal& data_ready; // The data ready signal + // The output signals + sc_signal& found; // The indicator that sequence found + + // The internal variables + char pattern[4]; // This string will hold the pattern to match against + + // The constructor + fsm_recognizer(sc_module_name NAME, + sc_clock& TICK, + const sc_signal& INPUT_CHAR, + const sc_signal& DATA_READY, + sc_signal& FOUND) + : input_char(INPUT_CHAR), data_ready(DATA_READY), + found(FOUND) { + clk(TICK); + SC_CTHREAD( entry, clk.pos() ); + pattern[0] = 'S'; + pattern[1] = 'c'; + pattern[2] = 'e'; + pattern[3] = 'n'; + } + + // The functionality of the process + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/golden/chpt3.2.log b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/golden/chpt3.2.log new file mode 100644 index 000000000..959b3c600 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/golden/chpt3.2.log @@ -0,0 +1,32 @@ +SystemC Simulation +Synopsys is delivering great value through Scen +Found Count is 1 +ic. I cannot wait to use Scen +Found Count is 2 +ic +Compiler and Scen +Found Count is 3 +ic Simulator. I am learning a lot about modeling using +Scen +Found Count is 4 +ic. + +This is a testcase for my first Scen +Found Count is 5 +ic program. I have learnt modeling using +Scen +Found Count is 6 +ic and would now like to check if I can really program in Scen +Found Count is 7 +ic. There is +no doubt in my mind that Scen +Found Count is 8 +ic is the best way to model hardware. The Scen +Found Count is 9 +ic +Compiler will make a lot of things easy by implementing by refined Scen +Found Count is 10 +ic +models. + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/main.cpp new file mode 100644 index 000000000..eeed80090 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/main.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main routine - top level */ + +#include "counter.h" +#include "sg.h" +#include "fsmr.h" + +int sc_main(int ac, char **av) +{ + sc_signal handshake ("HS"); + sc_signal found; + sc_signal stream ("ST"); + + sc_clock clk("Clock", 20, SC_NS, 0.5, 0.0, SC_NS); + + counter cnt("COUNTER", clk, found); + fsm_recognizer fsm("Recog", clk, stream, handshake, found); + stimgen chargen("TESTB", clk, stream, handshake); + + // initialize signals - ali + handshake = false; + found = false; + + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/sg.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/sg.cpp new file mode 100644 index 000000000..995d4a2c5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/sg.cpp @@ -0,0 +1,58 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sg.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* File containing functionality for the Stimulus Generator */ + +#include "sg.h" + +void stimgen::entry() +{ + char c; + FILE *file; + + file = fopen("./chpt3.2/testcase", "r"); + + while (true) { + if (fscanf(file, "%c", &c) == EOF) + sc_stop(); + data_ready.write(true); + stream.write(c); + wait(); + data_ready.write(false); + wait(); + } +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/sg.h b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/sg.h new file mode 100644 index 000000000..937c3169e --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/sg.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sg.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Header file for the stimulus generator */ + +#include "systemc.h" + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + sc_in_clk clk; + + // The output + sc_signal& stream; + sc_signal& data_ready; + + // The constructor + stimgen(sc_module_name NAME, + sc_clock& CLK, + sc_signal& STREAM, + sc_signal& DATA_READY) + : stream(STREAM), data_ready(DATA_READY) { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // The functionality of the process + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt3.2/testcase b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/testcase new file mode 100644 index 000000000..3b56603ff --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt3.2/testcase @@ -0,0 +1,9 @@ +Synopsys is delivering great value through Scenic. I cannot wait to use Scenic +Compiler and Scenic Simulator. I am learning a lot about modeling using +Scenic. + +This is a testcase for my first Scenic program. I have learnt modeling using +Scenic and would now like to check if I can really program in Scenic. There is +no doubt in my mind that Scenic is the best way to model hardware. The Scenic +Compiler will make a lot of things easy by implementing by refined Scenic +models. diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/chpt4.1.f b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/chpt4.1.f new file mode 100644 index 000000000..e0ed6002a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/chpt4.1.f @@ -0,0 +1,6 @@ +chpt4.1/display.cpp +chpt4.1/main.cpp +chpt4.1/numgen.cpp +chpt4.1/stage1.cpp +chpt4.1/stage2.cpp +chpt4.1/stage3.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/display.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/display.cpp new file mode 100644 index 000000000..ae725e8b2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.cc */ +/* This is the implementation file for synchronous process `display' */ + +#include "display.h" + +void display::entry() +{ + while (true) { + char buf[BUFSIZ]; + sprintf( buf, "Result = %.16g", in.read() ); + cout << buf << endl; + wait(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/display.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/display.h new file mode 100644 index 000000000..176856285 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/display.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.h */ +/* This is the interface file for synchronous process `display' */ + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in; //input + + //Constructor + display(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_) + : in(IN_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log new file mode 100644 index 000000000..2632f0378 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.bsd b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.bsd new file mode 100644 index 000000000..be6a13764 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.bsd @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812002 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803264 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037049 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193586 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.bsd64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.bsd64 new file mode 100644 index 000000000..be6a13764 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.bsd64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812002 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803264 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037049 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193586 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.cygwin64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.cygwin64 new file mode 100644 index 000000000..be6a13764 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.cygwin64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812002 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803264 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037049 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193586 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.mingw b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.mingw new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.mingw @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.mingw64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.mingw64 new file mode 100644 index 000000000..cbad61984 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.mingw64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111162 +Result = 7.880663294494538e+023 +Result = 5.025308156461848e+022 +Result = 3.785504588212779e+021 +Result = 3.318767046037847e+020 +Result = 3.342044498889828e+019 +Result = 3.820952118187873e+018 +Result = 4.908588040698598e+017 +Result = 7.020262707849121e+016 +Result = 1.108584445158e+016 +Result = 1918564708588396 +Result = 361468937900785.8 +Result = 73693454684249.83 +Result = 16168706434671.58 +Result = 3798873238107.02 +Result = 951496336681.9108 +Result = 253014396064.4429 +Result = 71160144395.97923 +Result = 21095409040.56878 +Result = 6570959918.81201 +Result = 2144377535.813799 +Result = 731219410.5057683 +Result = 259897217.2803262 +Result = 96068017.3665321 +Result = 36852754.87464552 +Result = 14643125.53882816 +Result = 6015770.001652751 +Result = 2551056.2523366 +Result = 1114936.454099942 +Result = 501486.5582467155 +Result = 231829.9907002871 +Result = 110013.0011393046 +Result = 53528.29122037047 +Result = 26676.20253819451 +Result = 13603.0193391548 +Result = 7091.170580193591 +Result = 3775.739764121695 +Result = 2051.852446275869 +Result = 1137.197386657551 +Result = 642.367482946381 +Result = 369.5965461434236 +Result = 216.4882041213385 +Result = 129.0313860266489 +Result = 78.22278438714326 +Result = 48.21719670307594 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc10 b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc10 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc10 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc10-x64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc10-x64 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc10-x64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc11 b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc11 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc11 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc11-x64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc11-x64 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc11-x64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc12 b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc12 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc12 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc12-x64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc12-x64 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/golden/chpt4.1.log.msvc12-x64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/main.cpp new file mode 100644 index 000000000..d9b80752d --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/main.cpp @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for pipeline simulation */ + +#include "stage1.h" +#include "stage2.h" +#include "stage3.h" +#include "display.h" +#include "numgen.h" + +int sc_main(int ac, char *av[]) +{ + sc_signal in1; + sc_signal in2; + sc_signal sum; + sc_signal diff; + sc_signal prod; + sc_signal quot; + sc_signal powr; + powr = 0.0; + + sc_clock clk("CLOCK", 20.0, SC_NS, 0.5, 0.0, SC_NS); + + numgen N("STIMULUS", clk, in1, in2); + stage1 S1("Stage1", clk, in1, in2, sum, diff); + stage2 S2("Stage2", clk, sum, diff, prod, quot); + stage3 S3("Stage3", clk, prod, quot, powr); + display D("Display", clk, powr); + + sc_start(1000, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/numgen.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/numgen.cpp new file mode 100644 index 000000000..77887df1a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/numgen.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + numgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename numgen.cc */ +/* This is the implementation file for synchronous process `numgen' */ + +#include "numgen.h" + +void numgen::entry() +{ + double a = 134.56; + double b = 98.24; + + while (true) { + a -= 1.5; + b -= 2.8; + out1.write(a); + out2.write(b); + wait(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/numgen.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/numgen.h new file mode 100644 index 000000000..c56670c86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/numgen.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + numgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename numgen.h */ +/* This is the interface file for synchronous process `numgen' */ + +#include "systemc.h" + +SC_MODULE( numgen ) +{ + SC_HAS_PROCESS( numgen ); + + sc_in_clk clk; + + sc_signal& out1; //output + sc_signal& out2; //output + + //Constructor + numgen(sc_module_name NAME, + sc_clock& CLK, + sc_signal& OUT1, + sc_signal& OUT2) + : out1(OUT1), out2(OUT2) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage1.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage1.cpp new file mode 100644 index 000000000..58a59f7ab --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage1.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage1.cc */ +/* This is the implementation file for synchronous process `stage1' */ + +#include "stage1.h" + +void stage1::entry() +{ + double a, b; + + a = 20.0; + b = 5.0; + while (true) { + sum.write(a+b); + diff.write(a-b); + wait(); + a = in1.read(); + b = in2.read(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage1.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage1.h new file mode 100644 index 000000000..5f5cc8044 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage1.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage1.h */ +/* This is the interface file for synchronous process `stage1' */ + +#include "systemc.h" + +SC_MODULE( stage1 ) +{ + SC_HAS_PROCESS( stage1 ); + + sc_in_clk clk; + + const sc_signal& in1; //input + const sc_signal& in2; //input + sc_signal& sum; //output + sc_signal& diff; //output + + //Constructor + stage1(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& SUM, + sc_signal& DIFF) + : in1(IN1), in2(IN2), sum(SUM), diff(DIFF) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage2.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage2.cpp new file mode 100644 index 000000000..7a80f1f50 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage2.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage2.cc */ +/* This is the implementation file for synchronous process `stage2' */ + +#include "stage2.h" + +void stage2::entry() +{ + double a, b; + + a = 20.0; + b = 5.0; + while (true) { + prod.write(a*b); + quot.write(a/b); + wait(); + a = sum.read(); + b = diff.read(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage2.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage2.h new file mode 100644 index 000000000..5e8e788d1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage2.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage2.h */ +/* This is the interface file for synchronous process `stage2' */ + +#include "systemc.h" + +SC_MODULE( stage2 ) +{ + SC_HAS_PROCESS( stage2 ); + + sc_in_clk clk; + + const sc_signal& sum; //input + const sc_signal& diff; //input + sc_signal& prod; //output + sc_signal& quot; //output + + //Constructor + stage2(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& SUM, + const sc_signal& DIFF, + sc_signal& PROD, + sc_signal& QUOT) + : sum(SUM), diff(DIFF), prod(PROD), quot(QUOT) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage3.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage3.cpp new file mode 100644 index 000000000..2cdb4f519 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage3.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage3.cc */ +/* This is the implementation file for synchronous process `stage3' */ + +#include +#include "stage3.h" + +void stage3::entry() +{ + double a, b; + double c; + + a = 20.0; + b = 5.0; + while (true) { + c = pow(a, b); + powr.write(c); + wait(); + a = prod.read(); + b = quot.read(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage3.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage3.h new file mode 100644 index 000000000..60bb8caad --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.1/stage3.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage3.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage3.h */ +/* This is the interface file for synchronous process `stage3' */ + +#include "systemc.h" + +SC_MODULE( stage3 ) +{ + SC_HAS_PROCESS( stage3 ); + + sc_in_clk clk; + + const sc_signal& prod; //input + const sc_signal& quot; //input + sc_signal& powr; //output + + //Constructor + stage3(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& PROD, + const sc_signal& QUOT, + sc_signal& POWR) + : prod(PROD), quot(QUOT), powr(POWR) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/chpt4.2.f b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/chpt4.2.f new file mode 100644 index 000000000..17905fc7b --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/chpt4.2.f @@ -0,0 +1,6 @@ +chpt4.2/display.cpp +chpt4.2/main.cpp +chpt4.2/numgen.cpp +chpt4.2/stage1.cpp +chpt4.2/stage2.cpp +chpt4.2/stage3.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/display.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/display.cpp new file mode 100644 index 000000000..ae725e8b2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.cc */ +/* This is the implementation file for synchronous process `display' */ + +#include "display.h" + +void display::entry() +{ + while (true) { + char buf[BUFSIZ]; + sprintf( buf, "Result = %.16g", in.read() ); + cout << buf << endl; + wait(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/display.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/display.h new file mode 100644 index 000000000..176856285 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/display.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.h */ +/* This is the interface file for synchronous process `display' */ + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in; //input + + //Constructor + display(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_) + : in(IN_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log new file mode 100644 index 000000000..2632f0378 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.bsd b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.bsd new file mode 100644 index 000000000..be6a13764 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.bsd @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812002 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803264 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037049 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193586 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.bsd64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.bsd64 new file mode 100644 index 000000000..be6a13764 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.bsd64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812002 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803264 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037049 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193586 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.cygwin64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.cygwin64 new file mode 100644 index 000000000..be6a13764 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.cygwin64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812002 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803264 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037049 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193586 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.mingw b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.mingw new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.mingw @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.mingw64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.mingw64 new file mode 100644 index 000000000..cbad61984 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.mingw64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111162 +Result = 7.880663294494538e+023 +Result = 5.025308156461848e+022 +Result = 3.785504588212779e+021 +Result = 3.318767046037847e+020 +Result = 3.342044498889828e+019 +Result = 3.820952118187873e+018 +Result = 4.908588040698598e+017 +Result = 7.020262707849121e+016 +Result = 1.108584445158e+016 +Result = 1918564708588396 +Result = 361468937900785.8 +Result = 73693454684249.83 +Result = 16168706434671.58 +Result = 3798873238107.02 +Result = 951496336681.9108 +Result = 253014396064.4429 +Result = 71160144395.97923 +Result = 21095409040.56878 +Result = 6570959918.81201 +Result = 2144377535.813799 +Result = 731219410.5057683 +Result = 259897217.2803262 +Result = 96068017.3665321 +Result = 36852754.87464552 +Result = 14643125.53882816 +Result = 6015770.001652751 +Result = 2551056.2523366 +Result = 1114936.454099942 +Result = 501486.5582467155 +Result = 231829.9907002871 +Result = 110013.0011393046 +Result = 53528.29122037047 +Result = 26676.20253819451 +Result = 13603.0193391548 +Result = 7091.170580193591 +Result = 3775.739764121695 +Result = 2051.852446275869 +Result = 1137.197386657551 +Result = 642.367482946381 +Result = 369.5965461434236 +Result = 216.4882041213385 +Result = 129.0313860266489 +Result = 78.22278438714326 +Result = 48.21719670307594 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc10 b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc10 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc10 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc10-x64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc10-x64 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc10-x64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc11 b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc11 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc11 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc11-x64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc11-x64 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc11-x64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc12 b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc12 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc12 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc12-x64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc12-x64 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/golden/chpt4.2.log.msvc12-x64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/main.cpp new file mode 100644 index 000000000..6ceda6f1c --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/main.cpp @@ -0,0 +1,66 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for pipeline simulation */ + +#include "stage1.h" +#include "stage2.h" +#include "stage3.h" +#include "display.h" +#include "numgen.h" +#include "stage1_2.h" +#include "pipeline.h" +#include "testbench.h" + +int sc_main(int ac, char *av[]) +{ + sc_signal in1; + sc_signal in2; + sc_signal powr; + + in1 = 0.0; + in2 = 0.0; + powr = 0.0; + sc_clock clk("CLOCK", 20.0, SC_NS, 0.5, 0.0, SC_NS); + + testbench T("Testbench", clk, powr, in1, in2); + pipeline P("PIPE", clk, in1, in2, powr); + + sc_start(1000, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/numgen.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/numgen.cpp new file mode 100644 index 000000000..77887df1a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/numgen.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + numgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename numgen.cc */ +/* This is the implementation file for synchronous process `numgen' */ + +#include "numgen.h" + +void numgen::entry() +{ + double a = 134.56; + double b = 98.24; + + while (true) { + a -= 1.5; + b -= 2.8; + out1.write(a); + out2.write(b); + wait(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/numgen.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/numgen.h new file mode 100644 index 000000000..c56670c86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/numgen.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + numgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename numgen.h */ +/* This is the interface file for synchronous process `numgen' */ + +#include "systemc.h" + +SC_MODULE( numgen ) +{ + SC_HAS_PROCESS( numgen ); + + sc_in_clk clk; + + sc_signal& out1; //output + sc_signal& out2; //output + + //Constructor + numgen(sc_module_name NAME, + sc_clock& CLK, + sc_signal& OUT1, + sc_signal& OUT2) + : out1(OUT1), out2(OUT2) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/pipeline.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/pipeline.h new file mode 100644 index 000000000..febd18488 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/pipeline.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pipeline.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename pipeline.h */ +/* This is the interface file for module `pipeline' */ + +#include "systemc.h" + +struct pipeline : public sc_module { + sc_signal prod; + sc_signal quot; + + stage1_2 S1_2; // component + stage3 S3; //component + + //Constructor + pipeline(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& OUT_) + : sc_module(NAME), + S1_2("Stage1_2", CLK, IN1, IN2, prod, quot), + S3("Stage3", CLK, prod, quot, OUT_) + { + } +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage1.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage1.cpp new file mode 100644 index 000000000..58a59f7ab --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage1.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage1.cc */ +/* This is the implementation file for synchronous process `stage1' */ + +#include "stage1.h" + +void stage1::entry() +{ + double a, b; + + a = 20.0; + b = 5.0; + while (true) { + sum.write(a+b); + diff.write(a-b); + wait(); + a = in1.read(); + b = in2.read(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage1.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage1.h new file mode 100644 index 000000000..5f5cc8044 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage1.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage1.h */ +/* This is the interface file for synchronous process `stage1' */ + +#include "systemc.h" + +SC_MODULE( stage1 ) +{ + SC_HAS_PROCESS( stage1 ); + + sc_in_clk clk; + + const sc_signal& in1; //input + const sc_signal& in2; //input + sc_signal& sum; //output + sc_signal& diff; //output + + //Constructor + stage1(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& SUM, + sc_signal& DIFF) + : in1(IN1), in2(IN2), sum(SUM), diff(DIFF) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage1_2.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage1_2.h new file mode 100644 index 000000000..e6ec5fac8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage1_2.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage1_2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage1_2.h */ +/* This is the interface file for module `stage1_2' */ + +#include "systemc.h" + +struct stage1_2 : public sc_module { + sc_signal sum; // internal signal + sc_signal diff; // internal signal + + stage1 S1; // component + stage2 S2; // component + + //Constructor + stage1_2(sc_module_name NAME, + sc_clock& TICK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& PROD, + sc_signal& QUOT) + : sc_module(NAME), + S1("Stage1", TICK, IN1, IN2, sum, diff), + S2("Stage2", TICK, sum, diff, PROD, QUOT), + sum("SigSum") + { + } +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage2.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage2.cpp new file mode 100644 index 000000000..7a80f1f50 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage2.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage2.cc */ +/* This is the implementation file for synchronous process `stage2' */ + +#include "stage2.h" + +void stage2::entry() +{ + double a, b; + + a = 20.0; + b = 5.0; + while (true) { + prod.write(a*b); + quot.write(a/b); + wait(); + a = sum.read(); + b = diff.read(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage2.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage2.h new file mode 100644 index 000000000..5e8e788d1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage2.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage2.h */ +/* This is the interface file for synchronous process `stage2' */ + +#include "systemc.h" + +SC_MODULE( stage2 ) +{ + SC_HAS_PROCESS( stage2 ); + + sc_in_clk clk; + + const sc_signal& sum; //input + const sc_signal& diff; //input + sc_signal& prod; //output + sc_signal& quot; //output + + //Constructor + stage2(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& SUM, + const sc_signal& DIFF, + sc_signal& PROD, + sc_signal& QUOT) + : sum(SUM), diff(DIFF), prod(PROD), quot(QUOT) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage3.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage3.cpp new file mode 100644 index 000000000..2cdb4f519 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage3.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage3.cc */ +/* This is the implementation file for synchronous process `stage3' */ + +#include +#include "stage3.h" + +void stage3::entry() +{ + double a, b; + double c; + + a = 20.0; + b = 5.0; + while (true) { + c = pow(a, b); + powr.write(c); + wait(); + a = prod.read(); + b = quot.read(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage3.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage3.h new file mode 100644 index 000000000..60bb8caad --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/stage3.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage3.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage3.h */ +/* This is the interface file for synchronous process `stage3' */ + +#include "systemc.h" + +SC_MODULE( stage3 ) +{ + SC_HAS_PROCESS( stage3 ); + + sc_in_clk clk; + + const sc_signal& prod; //input + const sc_signal& quot; //input + sc_signal& powr; //output + + //Constructor + stage3(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& PROD, + const sc_signal& QUOT, + sc_signal& POWR) + : prod(PROD), quot(QUOT), powr(POWR) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.2/testbench.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/testbench.h new file mode 100644 index 000000000..128433c2a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.2/testbench.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.h */ +/* This is the interface file for module `testbench' */ + +#include "systemc.h" + +struct testbench : public sc_module { + numgen N; // component + display D; // component + + //Constructor + testbench(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_, + sc_signal& OUT1, + sc_signal& OUT2) + : sc_module(NAME), + N("Numgen", CLK, OUT1, OUT2), + D("Display", CLK, IN_) + { + } +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.3/clocks.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.3/clocks.h new file mode 100644 index 000000000..cf5db589a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.3/clocks.h @@ -0,0 +1,166 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + clocks.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename clocks.h */ +/* This is an integrated interface & implementation file for */ +/* all clock processes that react to the clock edges */ + +#include "systemc.h" + +// First process +SC_MODULE( clk_pos ) +{ + SC_HAS_PROCESS( clk_pos ); + + sc_in_clk clk; + + sc_signal& out_clk_pos; + + clk_pos(sc_module_name NAME, + sc_clock& TICK_P, + sc_signal& OUT_CLK_POS) + : + out_clk_pos(OUT_CLK_POS) + { + clk(TICK_P); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +void +clk_pos::entry() +{ + out_clk_pos.write(1); cout << "Clk Pos 1\n"; + wait(); + out_clk_pos.write(0); cout << "Clk Pos 0\n"; + wait(); +} + +// Second process +SC_MODULE( clk_neg ) +{ + SC_HAS_PROCESS( clk_neg ); + + sc_in_clk clk; + + sc_signal& out_clk_neg; + + clk_neg(sc_module_name NAME, + sc_clock& TICK_N, + sc_signal& OUT_CLK_NEG) + : + out_clk_neg(OUT_CLK_NEG) + { + clk(TICK_N); + SC_CTHREAD( entry, clk.neg() ); + } + + void entry(); +}; + +void +clk_neg::entry() +{ + out_clk_neg.write(1); cout << "Clk Neg 1\n"; + wait(); + out_clk_neg.write(0); cout << "Clk Neg 0\n"; + wait(); +} + +// Third process +SC_MODULE( clk2_pos ) +{ + SC_HAS_PROCESS( clk2_pos ); + + sc_in_clk clk; + + sc_signal& out_clk2_pos; + + clk2_pos(sc_module_name NAME, + sc_clock& TICK2_P, + sc_signal& OUT_CLK2_POS) + : + out_clk2_pos(OUT_CLK2_POS) + { + clk(TICK2_P); + SC_CTHREAD( entry, clk.pos() ); + } + + void entry(); +}; + +void +clk2_pos::entry() +{ + out_clk2_pos.write(1); cout << "Clk2 Pos 1\n"; + wait(); + out_clk2_pos.write(0); cout << "Clk2 Pos 0\n"; + wait(); +} + +// Fourth process +SC_MODULE( clk2_neg ) +{ + SC_HAS_PROCESS( clk2_neg ); + + sc_in_clk clk; + + sc_signal& out_clk2_neg; + + clk2_neg(sc_module_name NAME, + sc_clock& TICK2_N, + sc_signal& OUT_CLK2_NEG) + : + out_clk2_neg (OUT_CLK2_NEG) + { + clk(TICK2_N); + SC_CTHREAD( entry, clk.neg() ); + } + + void entry(); +}; + +void +clk2_neg::entry() +{ + out_clk2_neg.write(1); cout << "Clk2 Neg 1\n"; + wait(); + out_clk2_neg.write(0); cout << "Clk2 Neg 0\n"; + wait(); +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.3/golden/main.log b/src/systemc/tests/systemc/misc/user_guide/chpt4.3/golden/main.log new file mode 100644 index 000000000..969474425 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.3/golden/main.log @@ -0,0 +1,10 @@ +SystemC Simulation +Clk Pos 1 +Clk2 Pos 1 +Clk2 Neg 1 +Clk Neg 1 +Clk Pos 0 +Clk2 Pos 0 +Clk2 Neg 0 +Clk Neg 0 +Example run successfully diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.3/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.3/main.cpp new file mode 100644 index 000000000..5bec21ff5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.3/main.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for clock simulation */ + +#include "clocks.h" +#include "tb.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clk( "CLK", 20, SC_NS, 0.5, 0, SC_NS); + sc_clock clk2( "CLK2", 20, SC_NS, 0.2, 5, SC_NS); + testbench tb1("TB1", clk, clk2); + + sc_start(80, SC_NS); + cout << "Example run successfully" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.3/tb.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.3/tb.h new file mode 100644 index 000000000..1d9e77c7b --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.3/tb.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tb.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename tb.h */ +/* This is the interface file for the testbench module */ + +#include "systemc.h" + +struct testbench : public sc_module { + sc_signal out_clk_pos; + sc_signal out_clk_neg; + sc_signal out_clk2_pos; + sc_signal out_clk2_neg; + clk_pos clkp; + clk_neg clkn; + clk2_pos clkp2; + clk2_neg clkn2; + + // Constructor + testbench(sc_module_name NAME, + sc_clock& TICK, + sc_clock& TICK2) + : sc_module (NAME), + out_clk_pos ("out_clk_pos"), + out_clk_neg ("out_clk_neg"), + out_clk2_pos ("out_clk2_pos"), + out_clk2_neg ("out_clk2_neg"), + clkp ("CLKP", TICK, out_clk_pos), + clkn ("CLKN", TICK, out_clk_neg), + clkp2 ("CLKP2", TICK2, out_clk2_pos), + clkn2 ("CLKN2", TICK2, out_clk2_neg) + { + } +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/chpt4.4.f b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/chpt4.4.f new file mode 100644 index 000000000..319f4cc1d --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/chpt4.4.f @@ -0,0 +1,7 @@ +chpt4.4/display.cpp +chpt4.4/main.cpp +chpt4.4/numgen.cpp +chpt4.4/pipeline.cpp +chpt4.4/stage1.cpp +chpt4.4/stage2.cpp +chpt4.4/stage3.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/display.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/display.cpp new file mode 100644 index 000000000..ae725e8b2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/display.cpp @@ -0,0 +1,52 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.cc */ +/* This is the implementation file for synchronous process `display' */ + +#include "display.h" + +void display::entry() +{ + while (true) { + char buf[BUFSIZ]; + sprintf( buf, "Result = %.16g", in.read() ); + cout << buf << endl; + wait(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/display.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/display.h new file mode 100644 index 000000000..176856285 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/display.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.h */ +/* This is the interface file for synchronous process `display' */ + +#include "systemc.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + sc_in_clk clk; + + const sc_signal& in; //input + + //Constructor + display(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_) + : in(IN_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_pipeline.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_pipeline.h new file mode 100644 index 000000000..38b7534f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_pipeline.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + f_pipeline.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename f_pipeline.h */ +/* This is the functional interface file for module `pipeline' */ + +void f_pipeline(const char *NAME, + sc_clock& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& OUT); + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_stage1.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_stage1.h new file mode 100644 index 000000000..0120bdbd0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_stage1.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + f_stage1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename f_stage1.h */ +/* This is the functional interface file for synchronous process `stage1' */ + +void f_stage1(const char *NAME, + sc_clock& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& SUM, + sc_signal& DIFF); diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_stage2.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_stage2.h new file mode 100644 index 000000000..08eaa6529 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_stage2.h @@ -0,0 +1,46 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + f_stage2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename f_stage2.h */ +/* This is the functional interface file for synchronous process `stage2' */ + +void f_stage2(const char *NAME, + sc_clock& CLK, + const sc_signal& SUM, + const sc_signal& DIFF, + sc_signal& PROD, + sc_signal& QUOT); diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_stage3.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_stage3.h new file mode 100644 index 000000000..6532f99ff --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/f_stage3.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + f_stage3.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename f_stage3.h */ +/* This is the functional interface file for synchronous process `stage3' */ + +void f_stage3(const char *NAME, + sc_clock& CLK, + const sc_signal& PROD, + const sc_signal& QUOT, + sc_signal& POWR); diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log new file mode 100644 index 000000000..2632f0378 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.bsd b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.bsd new file mode 100644 index 000000000..be6a13764 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.bsd @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812002 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803264 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037049 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193586 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.bsd64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.bsd64 new file mode 100644 index 000000000..be6a13764 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.bsd64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812002 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803264 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037049 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193586 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.cygwin64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.cygwin64 new file mode 100644 index 000000000..be6a13764 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.cygwin64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+23 +Result = 5.025308156461862e+22 +Result = 3.785504588212786e+21 +Result = 3.318767046037861e+20 +Result = 3.342044498889812e+19 +Result = 3.820952118187878e+18 +Result = 4.9085880406986e+17 +Result = 7.02026270784911e+16 +Result = 1.108584445158003e+16 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812002 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803264 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037049 +Result = 26676.20253819449 +Result = 13603.01933915479 +Result = 7091.170580193586 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463808 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.mingw b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.mingw new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.mingw @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.mingw64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.mingw64 new file mode 100644 index 000000000..cbad61984 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.mingw64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111162 +Result = 7.880663294494538e+023 +Result = 5.025308156461848e+022 +Result = 3.785504588212779e+021 +Result = 3.318767046037847e+020 +Result = 3.342044498889828e+019 +Result = 3.820952118187873e+018 +Result = 4.908588040698598e+017 +Result = 7.020262707849121e+016 +Result = 1.108584445158e+016 +Result = 1918564708588396 +Result = 361468937900785.8 +Result = 73693454684249.83 +Result = 16168706434671.58 +Result = 3798873238107.02 +Result = 951496336681.9108 +Result = 253014396064.4429 +Result = 71160144395.97923 +Result = 21095409040.56878 +Result = 6570959918.81201 +Result = 2144377535.813799 +Result = 731219410.5057683 +Result = 259897217.2803262 +Result = 96068017.3665321 +Result = 36852754.87464552 +Result = 14643125.53882816 +Result = 6015770.001652751 +Result = 2551056.2523366 +Result = 1114936.454099942 +Result = 501486.5582467155 +Result = 231829.9907002871 +Result = 110013.0011393046 +Result = 53528.29122037047 +Result = 26676.20253819451 +Result = 13603.0193391548 +Result = 7091.170580193591 +Result = 3775.739764121695 +Result = 2051.852446275869 +Result = 1137.197386657551 +Result = 642.367482946381 +Result = 369.5965461434236 +Result = 216.4882041213385 +Result = 129.0313860266489 +Result = 78.22278438714326 +Result = 48.21719670307594 +Result = 30.2128638146017 +Result = 19.24141599285792 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc10 b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc10 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc10 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc10-x64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc10-x64 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc10-x64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc11 b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc11 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc11 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc11-x64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc11-x64 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc11-x64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc12 b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc12 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc12 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc12-x64 b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc12-x64 new file mode 100644 index 000000000..59ff54c34 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/golden/chpt4.4.log.msvc12-x64 @@ -0,0 +1,51 @@ +SystemC Simulation +Result = 0 +Result = 3200000 +Result = 100000000 +Result = 19500.78584111161 +Result = 7.880663294494549e+023 +Result = 5.025308156461862e+022 +Result = 3.785504588212786e+021 +Result = 3.318767046037861e+020 +Result = 3.342044498889812e+019 +Result = 3.820952118187878e+018 +Result = 4.9085880406986e+017 +Result = 7.02026270784911e+016 +Result = 1.108584445158003e+016 +Result = 1918564708588393 +Result = 361468937900785.4 +Result = 73693454684249.92 +Result = 16168706434671.58 +Result = 3798873238107.018 +Result = 951496336681.913 +Result = 253014396064.4423 +Result = 71160144395.97931 +Result = 21095409040.5688 +Result = 6570959918.812003 +Result = 2144377535.8138 +Result = 731219410.5057685 +Result = 259897217.2803263 +Result = 96068017.36653221 +Result = 36852754.87464556 +Result = 14643125.53882816 +Result = 6015770.001652755 +Result = 2551056.252336602 +Result = 1114936.454099941 +Result = 501486.5582467156 +Result = 231829.9907002873 +Result = 110013.0011393045 +Result = 53528.29122037048 +Result = 26676.2025381945 +Result = 13603.01933915479 +Result = 7091.170580193587 +Result = 3775.739764121693 +Result = 2051.852446275868 +Result = 1137.19738665755 +Result = 642.3674829463809 +Result = 369.5965461434234 +Result = 216.4882041213384 +Result = 129.0313860266488 +Result = 78.22278438714326 +Result = 48.21719670307593 +Result = 30.2128638146017 +Result = 19.24141599285791 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/main.cpp new file mode 100644 index 000000000..9af44ba3e --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/main.cpp @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main file for pipeline simulation */ + +#include "display.h" +#include "numgen.h" +#include "testbench.h" +#include "f_pipeline.h" + +int sc_main(int ac, char* av[]) +{ + sc_signal in1; + sc_signal in2; + sc_signal powr; + + in1 = 0.0; + in2 = 0.0; + powr = 0.0; + + sc_clock clk("CLOCK", 20.0, SC_NS, 0.5, 0.0, SC_NS); + + testbench T("Testbench", clk, powr, in1, in2); + f_pipeline("PIPE", clk, in1, in2, powr); + + sc_start(1000, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/numgen.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/numgen.cpp new file mode 100644 index 000000000..77887df1a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/numgen.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + numgen.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename numgen.cc */ +/* This is the implementation file for synchronous process `numgen' */ + +#include "numgen.h" + +void numgen::entry() +{ + double a = 134.56; + double b = 98.24; + + while (true) { + a -= 1.5; + b -= 2.8; + out1.write(a); + out2.write(b); + wait(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/numgen.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/numgen.h new file mode 100644 index 000000000..c56670c86 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/numgen.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + numgen.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename numgen.h */ +/* This is the interface file for synchronous process `numgen' */ + +#include "systemc.h" + +SC_MODULE( numgen ) +{ + SC_HAS_PROCESS( numgen ); + + sc_in_clk clk; + + sc_signal& out1; //output + sc_signal& out2; //output + + //Constructor + numgen(sc_module_name NAME, + sc_clock& CLK, + sc_signal& OUT1, + sc_signal& OUT2) + : out1(OUT1), out2(OUT2) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/pipeline.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/pipeline.cpp new file mode 100644 index 000000000..a1a9a903c --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/pipeline.cpp @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pipeline.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename pipeline.cc */ +/* This is the implementation file for module `pipeline' */ + +#include "systemc.h" +#include "f_stage1.h" +#include "f_stage2.h" +#include "stage1_2.h" +#include "f_stage3.h" +#include "pipeline.h" +#include "f_pipeline.h" + +void f_pipeline(const char *NAME, + sc_clock& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& OUT_) +{ + SC_NEW(pipeline(NAME, CLK, IN1, IN2, OUT_)); +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/pipeline.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/pipeline.h new file mode 100644 index 000000000..e328f5ac5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/pipeline.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pipeline.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename pipeline.h */ +/* This is the interface file for module `pipeline' */ + +#include "systemc.h" + +struct pipeline : public sc_module { + sc_signal prod; + sc_signal quot; + + stage1_2 S1_2; // component + + //Constructor + pipeline(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& OUT_) + : sc_module(NAME), + S1_2("Stage1_2", CLK, IN1, IN2, prod, quot) + { + f_stage3("Stage3", CLK, prod, quot, OUT_); + } +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage1.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage1.cpp new file mode 100644 index 000000000..f09af1ef3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage1.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage1.cc */ +/* This is the implementation file for synchronous process `stage1' */ + +#include "stage1.h" +#include "f_stage1.h" + +void stage1::entry() +{ + double a, b; + + a = 20.0; + b = 5.0; + while (true) { + sum.write(a+b); + diff.write(a-b); + wait(); + a = in1.read(); + b = in2.read(); + } +} // end of entry function + +void f_stage1(const char *NAME, + sc_clock& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& SUM, + sc_signal& DIFF) +{ + SC_NEW(stage1(NAME, CLK, IN1, IN2, SUM, DIFF)); +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage1.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage1.h new file mode 100644 index 000000000..5f5cc8044 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage1.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage1.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage1.h */ +/* This is the interface file for synchronous process `stage1' */ + +#include "systemc.h" + +SC_MODULE( stage1 ) +{ + SC_HAS_PROCESS( stage1 ); + + sc_in_clk clk; + + const sc_signal& in1; //input + const sc_signal& in2; //input + sc_signal& sum; //output + sc_signal& diff; //output + + //Constructor + stage1(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& SUM, + sc_signal& DIFF) + : in1(IN1), in2(IN2), sum(SUM), diff(DIFF) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage1_2.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage1_2.h new file mode 100644 index 000000000..166cc0be6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage1_2.h @@ -0,0 +1,61 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage1_2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage1_2.h */ +/* This is the interface file for module `stage1_2' */ + +#include "systemc.h" + +struct stage1_2 : public sc_module { + sc_signal sum; // internal signal + sc_signal diff; // internal signal + + //Constructor + stage1_2(sc_module_name NAME, + sc_clock& TICK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& PROD, + sc_signal& QUOT) + : sc_module(NAME) + { + f_stage1("Stage1", TICK, IN1, IN2, sum, diff); + f_stage2("Stage2", TICK, sum, diff, PROD, QUOT); + } +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage2.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage2.cpp new file mode 100644 index 000000000..9d3128b15 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage2.cpp @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage2.cc */ +/* This is the implementation file for synchronous process `stage2' */ + +#include "stage2.h" +#include "f_stage2.h" + +void stage2::entry() +{ + double a, b; + + a = 20.0; + b = 5.0; + while (true) { + prod.write(a*b); + quot.write(a/b); + wait(); + a = sum.read(); + b = diff.read(); + } +} // end of entry function + +void f_stage2(const char *NAME, + sc_clock& CLK, + const sc_signal& SUM, + const sc_signal& DIFF, + sc_signal& PROD, + sc_signal& QUOT) +{ + SC_NEW(stage2(NAME, CLK, SUM, DIFF, PROD, QUOT)); +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage2.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage2.h new file mode 100644 index 000000000..5e8e788d1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage2.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage2.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage2.h */ +/* This is the interface file for synchronous process `stage2' */ + +#include "systemc.h" + +SC_MODULE( stage2 ) +{ + SC_HAS_PROCESS( stage2 ); + + sc_in_clk clk; + + const sc_signal& sum; //input + const sc_signal& diff; //input + sc_signal& prod; //output + sc_signal& quot; //output + + //Constructor + stage2(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& SUM, + const sc_signal& DIFF, + sc_signal& PROD, + sc_signal& QUOT) + : sum(SUM), diff(DIFF), prod(PROD), quot(QUOT) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage3.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage3.cpp new file mode 100644 index 000000000..1a7c47489 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage3.cpp @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage3.cc */ +/* This is the implementation file for synchronous process `stage3' */ + +#include +#include "stage3.h" +#include "f_stage3.h" + +void stage3::entry() +{ + double a, b; + double c; + + a = 20.0; + b = 5.0; + while (true) { + c = pow(a, b); + powr.write(c); + wait(); + a = prod.read(); + b = quot.read(); + } +} // end of entry function + + +void f_stage3(const char *NAME, + sc_clock& CLK, + const sc_signal& PROD, + const sc_signal& QUOT, + sc_signal& POWR) +{ + SC_NEW(stage3(NAME, CLK, PROD, QUOT, POWR)); +} + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage3.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage3.h new file mode 100644 index 000000000..60bb8caad --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/stage3.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stage3.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename stage3.h */ +/* This is the interface file for synchronous process `stage3' */ + +#include "systemc.h" + +SC_MODULE( stage3 ) +{ + SC_HAS_PROCESS( stage3 ); + + sc_in_clk clk; + + const sc_signal& prod; //input + const sc_signal& quot; //input + sc_signal& powr; //output + + //Constructor + stage3(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& PROD, + const sc_signal& QUOT, + sc_signal& POWR) + : prod(PROD), quot(QUOT), powr(POWR) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt4.4/testbench.h b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/testbench.h new file mode 100644 index 000000000..128433c2a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt4.4/testbench.h @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.h */ +/* This is the interface file for module `testbench' */ + +#include "systemc.h" + +struct testbench : public sc_module { + numgen N; // component + display D; // component + + //Constructor + testbench(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& IN_, + sc_signal& OUT1, + sc_signal& OUT2) + : sc_module(NAME), + N("Numgen", CLK, OUT1, OUT2), + D("Display", CLK, IN_) + { + } +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt5.1/accumulator.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/accumulator.cpp new file mode 100644 index 000000000..fa55fb2fd --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/accumulator.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + accumulator.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename accumulator.cc */ +/* This is the implementation file for synchronous process `accumulator' */ + +#include "accumulator.h" + +void accumulator::entry() +{ + int a = 1; + + sum_acc = 1234; // some random number + mult_acc = 3; // some random number + + while (true) { + sum_acc += a; + mult_acc *= a; + sum.write(sum_acc); + prod.write(mult_acc); + wait(); + a = number.read(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt5.1/accumulator.h b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/accumulator.h new file mode 100644 index 000000000..6005d3fac --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/accumulator.h @@ -0,0 +1,72 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + accumulator.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename accumulator.h */ +/* This is the interface file for synchronous process `accumulator' */ + +#include "systemc.h" + +SC_MODULE( accumulator ) +{ + SC_HAS_PROCESS( accumulator ); + + sc_in_clk clk; + + const sc_signal& number; //input + sc_signal& sum; //output + sc_signal& prod; //output + + int sum_acc; //internal variable + int mult_acc; //internal variable + + //Constructor + accumulator(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& NUMBER, + sc_signal& SUM, + sc_signal& PROD) + : number(NUMBER), sum(SUM), prod(PROD) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt5.1/chpt5.1.f b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/chpt5.1.f new file mode 100644 index 000000000..58b8e125d --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/chpt5.1.f @@ -0,0 +1,3 @@ +chpt5.1/accumulator.cpp +chpt5.1/main.cpp +chpt5.1/testbench.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt5.1/golden/chpt5.1.log b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/golden/chpt5.1.log new file mode 100644 index 000000000..e9253c827 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/golden/chpt5.1.log @@ -0,0 +1,50 @@ +SystemC Simulation +Result = 1235 and 3 +Result = 1237 and 6 +Result = 1240 and 18 +Result = 1244 and 72 +Result = 1249 and 360 +Result = 1255 and 2160 +Result = 1262 and 15120 +Result = 1270 and 120960 +Result = 1279 and 1088640 +Result = 1289 and 10886400 +Result = 1300 and 119750400 +Result = 1312 and 1437004800 +Result = 1325 and 1501193216 +Result = 1339 and -458131456 +Result = 1354 and 1717962752 +Result = 1370 and 1717600256 +Result = 1387 and -865566720 +Result = 1405 and 1599668224 +Result = 1424 and 328925184 +Result = 1444 and -2011430912 +Result = 1465 and 709623808 +Result = 1487 and -1568145408 +Result = 1510 and -1707606016 +Result = 1534 and 1967128576 +Result = 1559 and 1933574144 +Result = 1585 and -1266679808 +Result = 1612 and 159383552 +Result = 1640 and 167772160 +Result = 1669 and 570425344 +Result = 1699 and -67108864 +Result = 1730 and -2080374784 +Result = 1762 and -2147483648 +Result = 1795 and -2147483648 +Result = 1829 and 0 +Result = 1864 and 0 +Result = 1900 and 0 +Result = 1937 and 0 +Result = 1975 and 0 +Result = 2014 and 0 +Result = 2054 and 0 +Result = 2095 and 0 +Result = 2137 and 0 +Result = 2180 and 0 +Result = 2224 and 0 +Result = 2269 and 0 +Result = 2315 and 0 +Result = 2362 and 0 +Result = 2410 and 0 +Result = 2459 and 0 diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt5.1/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/main.cpp new file mode 100644 index 000000000..8762229c7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/main.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + +/* Main file for accumulator simulation */ + +#include "testbench.h" +#include "accumulator.h" + +int sc_main(int ac, char *av[]) +{ + sc_signal number; + sc_signal resulta; + sc_signal resultm; + + sc_clock clk("Clock", 20.0, SC_NS, 0.5, 0.0, SC_NS); + + testbench TBH("TB", clk, resulta,resultm, number); + accumulator ACC("ACC", clk, number, resulta, resultm); + + sc_start(1000, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt5.1/testbench.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/testbench.cpp new file mode 100644 index 000000000..9d1df8a8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/testbench.cpp @@ -0,0 +1,54 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.cc */ +/* This is the implementation file for synchronous process `testbench' */ + +#include "testbench.h" + +void testbench::entry() +{ + int num = 2; + + while (true) { + number.write(num++); + wait(); + cout << "Result = " << resulta.read() << " and " << resultm.read() + << endl; + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt5.1/testbench.h b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/testbench.h new file mode 100644 index 000000000..0ab21e4b3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt5.1/testbench.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.h */ +/* This is the interface file for synchronous process `testbench' */ + +#include "systemc.h" + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + const sc_signal& resulta; //input + const sc_signal& resultm; //input + sc_signal& number; //output + + //Constructor + testbench(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& RESULTA, + const sc_signal& RESULTM, + sc_signal& NUMBER) + : resulta(RESULTA), resultm(RESULTM), number(NUMBER) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/chpt6.1.f b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/chpt6.1.f new file mode 100644 index 000000000..656c43793 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/chpt6.1.f @@ -0,0 +1,5 @@ +chpt6.1/display.cpp +chpt6.1/driver.cpp +chpt6.1/main.cpp +chpt6.1/pullup.cpp +chpt6.1/ts_buf.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/common.h b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/common.h new file mode 100644 index 000000000..4d5a25eb6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/common.h @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_logic std_ulogic; + +typedef sc_signal signal_std_logic; + +#endif diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/display.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/display.cpp new file mode 100644 index 000000000..a60ae744f --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/display.cpp @@ -0,0 +1,47 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.cc */ +/* This is the implementation file for asynchronous process `display' */ + +#include "display.h" + +void display::entry() +{ + cout << "Value on Bus = " << bus.read() << endl; +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/display.h b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/display.h new file mode 100644 index 000000000..5d2185daf --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/display.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + display.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename display.h */ +/* This is the interface file for asynchronous process `display' */ + +#include "common.h" + +SC_MODULE( display ) +{ + SC_HAS_PROCESS( display ); + + const signal_std_logic& bus; //input + + //Constructor + display(sc_module_name NAME, + const signal_std_logic& BUS) + : bus(BUS) + { + SC_METHOD( entry ); + dont_initialize(); + sensitive << bus; + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/driver.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/driver.cpp new file mode 100644 index 000000000..797de03cd --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/driver.cpp @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename driver.cc */ +/* This is the implementation file for synchronous process `driver' */ + +#include "driver.h" + +void driver::entry() +{ + control.write(true); + out.write(false); + wait(); + cout << "Input is = " << in.read() << endl; + + control.write(false); + wait(); + cout << "Input is = " << in.read() << endl; + + control.write(true); + out.write(true); + wait(); + cout << "Input is = " << in.read() << endl; + + control.write(false); + wait(); + cout << "Input is = " << in.read() << endl; + sc_stop(); +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/driver.h b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/driver.h new file mode 100644 index 000000000..68df6d26f --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/driver.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename driver.h */ +/* This is the interface file for synchronous process `driver' */ + +#include "common.h" + +SC_MODULE( driver ) +{ + SC_HAS_PROCESS( driver ); + + sc_in_clk clk; + + const signal_std_logic& in; //input + sc_signal& control; //output + sc_signal& out; //output + + //Constructor + driver(sc_module_name NAME, + sc_clock& CLK, + const signal_std_logic& IN_, + sc_signal& CONTROL, + sc_signal& OUT_) + : in(IN_), control(CONTROL), out(OUT_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/golden/chpt6.1.log b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/golden/chpt6.1.log new file mode 100644 index 000000000..58ed81894 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/golden/chpt6.1.log @@ -0,0 +1,12 @@ +SystemC Simulation +Value on Bus = Z +Value on Bus = 0 +Input is = 0 +Value on Bus = Z +Input is = Z +Value on Bus = 1 +Input is = 1 +Value on Bus = Z +Input is = Z + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/main.cpp new file mode 100644 index 000000000..afb1d333c --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/main.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main routine for tri-state simulation */ + +#include "driver.h" +#include "ts_buf.h" +#include "display.h" + +int sc_main(int ac, char *av[]) +{ + signal_std_logic bus; + sc_signal control; + sc_signal out; + + sc_clock clock("CLK", 10.0, SC_NS, 0.5, 0.0, SC_NS); + + driver D("Driver", clock, bus, control, out); + ts_buf B("Buffer", out, control, bus); + display DISP("BusDisplay", bus); + + sc_start(200, SC_NS); + return 0; +} + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/pullup.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/pullup.cpp new file mode 100644 index 000000000..e4729a6ec --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/pullup.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pullup.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename pullup.cc */ +/* This is the implementation file for synchronous process `pullup' */ + +#include "pullup.h" + +void pullup::entry() +{ + while (true) { + pup.write(sc_logic('H')); + wait(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/pullup.h b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/pullup.h new file mode 100644 index 000000000..a5608f51e --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/pullup.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pullup.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename pullup.h */ +/* This is the interface file for synchronous process `pullup' */ + +#include "common.h" + +SC_MODULE( pullup ) +{ + SC_HAS_PROCESS( pullup ); + + sc_in_clk clk; + + signal_std_logic& pup; //output + + //Constructor + pullup(sc_module_name NAME, + sc_clock& CLK, + signal_std_logic& PUP) + : pup(PUP) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/ts_buf.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/ts_buf.cpp new file mode 100644 index 000000000..28e0e257a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/ts_buf.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + ts_buf.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename ts_buf.cc */ +/* This is the implementation file for asynchronous process `ts_buf' */ + +#include "ts_buf.h" + +void ts_buf::entry() +{ + bool c; + bool bus_val; + std_ulogic val; + + c = control.read(); + + if (c == false) { + ts_out.write(sc_logic('Z')); + } + else { + bus_val = in.read(); + val = bus_val; // automatic type conversion + ts_out.write(val); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt6.1/ts_buf.h b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/ts_buf.h new file mode 100644 index 000000000..4a0a9bc90 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt6.1/ts_buf.h @@ -0,0 +1,67 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + ts_buf.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename ts_buf.h */ +/* This is the interface file for asynchronous process `ts_buf' */ + +#include "common.h" + +SC_MODULE( ts_buf ) +{ + SC_HAS_PROCESS( ts_buf ); + + const sc_signal& in; //input + const sc_signal& control; //input + signal_std_logic& ts_out; //output + + //Constructor + ts_buf(sc_module_name NAME, + const sc_signal& IN_, + const sc_signal& CONTROL, + signal_std_logic& TS_OUT) + : in(IN_), control(CONTROL), ts_out(TS_OUT) + { + SC_METHOD( entry ); + sensitive << in; + sensitive << control; + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.1/chpt7.1.f b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/chpt7.1.f new file mode 100644 index 000000000..4bc3b23d4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/chpt7.1.f @@ -0,0 +1,2 @@ +chpt7.1/main.cpp +chpt7.1/testbench.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.1/golden/chpt7.1.log b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/golden/chpt7.1.log new file mode 100644 index 000000000..25ff64775 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/golden/chpt7.1.log @@ -0,0 +1,13 @@ +SystemC Simulation +A = 136708339, B = 739981, C = 1795618, D = 135968358, SUM = 139243938 +A = 9096481, B = 158324345, C = 156370665, D = -149227864, SUM = 323791491 +A = 67086517, B = 264870948, C = 252125103, D = -197784431, SUM = 584082568 +A = 35986927, B = 156189122, C = 206347003, D = -120202195, SUM = 398523052 +A = 113459060, B = 75282205, C = 152014781, D = 38176855, SUM = 340756046 +A = 106493306, B = 96640536, C = 38402601, D = 9852770, SUM = 241536443 +A = 182546426, B = 97022397, C = 80174628, D = 85524029, SUM = 359743451 +A = 179563193, B = 205851535, C = 103403428, D = -26288342, SUM = 488818156 +A = 1501295, B = 41700621, C = 124029719, D = -40199326, SUM = 167231635 +A = 96489422, B = 81002361, C = 111989263, D = 15487061, SUM = 289481046 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.1/isaac.h b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.1/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/main.cpp new file mode 100644 index 000000000..7e442ee4c --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/main.cpp @@ -0,0 +1,50 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "testbench.h" + +int sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", 10, SC_NS, 0.5, 0, SC_NS); + + testbench T("TB", clock); + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.1/testbench.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/testbench.cpp new file mode 100644 index 000000000..aa6e20ad6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/testbench.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.cc */ +/* This is the implementation file for synchronous process `testbench' */ + +#include +#include "testbench.h" +#include "isaac.h" + +QTIsaac<8> rng; + +int add(int a, int b) +{ + return (a + b); +} + +int adder_sub(int a, int b, int c, int *d) +{ + int sum; + + sum = add(a, b); + sum = add(sum, c); + *d = a - b; + return (sum); +} + +void testbench::entry() +{ + int a, b, c, d; + int sum; + int i; + + for (i=0; i < 10; i++) { + a = rng.rand() & 0x0fffffff; + b = rng.rand() & 0x0fffffff; + c = rng.rand() & 0x0fffffff; + + sum = adder_sub(a, b, c, &d); + // printf("A = %d, B = %d, C = %d, D = %d, SUM = %d\n", a, b, c, d, sum); + char buf[BUFSIZ]; + sprintf(buf, "A = %d, B = %d, C = %d, D = %d, SUM = %d\n", a, b, c, d, sum); + cout << buf; + } + sc_stop(); +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.1/testbench.h b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/testbench.h new file mode 100644 index 000000000..275bf0ea5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.1/testbench.h @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.h */ +/* This is the interface file for synchronous process `testbench' */ + +#include "systemc.h" + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + //Constructor + testbench(sc_module_name NAME, + sc_clock& CLK) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.2/adder_sub.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/adder_sub.cpp new file mode 100644 index 000000000..caf7e5c1f --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/adder_sub.cpp @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + adder_sub.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename adder_sub.cc */ +/* This is the implementation file for synchronous process `adder_sub' */ + +#include "adder_sub.h" + +int add(int a, int b) +{ + return (a + b); +} + +void adder_sub::entry() +{ + int sum; + int a, b, c, d; + + while (true) { + // Wait until you get signal to go + do { wait(); } while (adder_sub_ready != true); + // Read inputs + a = Sa.read(); + b = Sb.read(); + c = Sc.read(); + + // Perform the computation. + sum = add(a, b); + sum = add(sum, c); + d = a - b; + + // Write outputs + adder_sub_done.write(true); + Ssum.write(sum); + Sd.write(d); + wait(); + adder_sub_done.write(false); + // Loop back to do { wait(); } while . + } + +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.2/adder_sub.h b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/adder_sub.h new file mode 100644 index 000000000..913f1f5f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/adder_sub.h @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + adder_sub.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename adder_sub.h */ +/* This is the interface file for synchronous process `adder_sub' */ + +#include "systemc.h" + +SC_MODULE( adder_sub ) +{ + SC_HAS_PROCESS( adder_sub ); + + sc_in_clk clk; + + const sc_signal& Sa; //input + const sc_signal& Sb; //input + const sc_signal& Sc; //input + const sc_signal& adder_sub_ready; //input + sc_signal& Sd; //output + sc_signal& Ssum; //output + sc_signal& adder_sub_done; //output + + //Constructor + adder_sub(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& SA, + const sc_signal& SB, + const sc_signal& SC, + const sc_signal& ADDER_SUB_READY, + sc_signal& SD, + sc_signal& SSUM, + sc_signal& ADDER_SUB_DONE) + : Sa(SA), Sb(SB), Sc(SC), + adder_sub_ready(ADDER_SUB_READY), + Sd(SD), Ssum(SSUM), adder_sub_done(ADDER_SUB_DONE) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.2/chpt7.2.f b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/chpt7.2.f new file mode 100644 index 000000000..e19c1162a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/chpt7.2.f @@ -0,0 +1,3 @@ +chpt7.2/adder_sub.cpp +chpt7.2/main.cpp +chpt7.2/testbench.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.2/golden/chpt7.2.log b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/golden/chpt7.2.log new file mode 100644 index 000000000..25ff64775 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/golden/chpt7.2.log @@ -0,0 +1,13 @@ +SystemC Simulation +A = 136708339, B = 739981, C = 1795618, D = 135968358, SUM = 139243938 +A = 9096481, B = 158324345, C = 156370665, D = -149227864, SUM = 323791491 +A = 67086517, B = 264870948, C = 252125103, D = -197784431, SUM = 584082568 +A = 35986927, B = 156189122, C = 206347003, D = -120202195, SUM = 398523052 +A = 113459060, B = 75282205, C = 152014781, D = 38176855, SUM = 340756046 +A = 106493306, B = 96640536, C = 38402601, D = 9852770, SUM = 241536443 +A = 182546426, B = 97022397, C = 80174628, D = 85524029, SUM = 359743451 +A = 179563193, B = 205851535, C = 103403428, D = -26288342, SUM = 488818156 +A = 1501295, B = 41700621, C = 124029719, D = -40199326, SUM = 167231635 +A = 96489422, B = 81002361, C = 111989263, D = 15487061, SUM = 289481046 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.2/isaac.h b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.2/main.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/main.cpp new file mode 100644 index 000000000..745338a04 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/main.cpp @@ -0,0 +1,59 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// Main routine + +#include "testbench.h" +#include "adder_sub.h" + +int sc_main(int ac, char *av[]) +{ + sc_signal a; + sc_signal b; + sc_signal c; + sc_signal d; + sc_signal sum; + sc_signal ready; + sc_signal done; + sc_clock clock("Clock", 10, SC_NS, 0.5, 0, SC_NS); + + testbench T("TB", clock, sum, d, done, a, b, c, ready); + adder_sub AS("AS", clock, a, b, c, ready, d, sum, done); + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.2/testbench.cpp b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/testbench.cpp new file mode 100644 index 000000000..bc91bb257 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/testbench.cpp @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.cc */ +/* This is the implementation file for synchronous process `testbench' */ + +#include +#include "testbench.h" +#include "isaac.h" + +QTIsaac<8> rng; + +void testbench::entry() +{ + int a, b, c, d; + int sum; + int i; + + for (i=0; i < 10; i++) { + a = rng.rand() & 0x0fffffff; + b = rng.rand() & 0x0fffffff; + c = rng.rand() & 0x0fffffff; + + Sa.write(a); + Sb.write(b); + Sc.write(c); + adder_sub_ready.write(true); + wait(); + adder_sub_ready.write(false); + do { wait(); } while (adder_sub_done != true); + sum = Ssum.read(); + d = Sdiff.read(); + // printf("A = %d, B = %d, C = %d, D = %d, SUM = %d\n", a, b, c, d, sum); + char buf[BUFSIZ]; + sprintf(buf, "A = %d, B = %d, C = %d, D = %d, SUM = %d\n", a, b, c, d, sum); + cout << buf; + } + sc_stop(); + +} // end of entry function + diff --git a/src/systemc/tests/systemc/misc/user_guide/chpt7.2/testbench.h b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/testbench.h new file mode 100644 index 000000000..9e5e2383f --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/chpt7.2/testbench.h @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + testbench.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename testbench.h */ +/* This is the interface file for synchronous process `testbench' */ + +#include "systemc.h" + +SC_MODULE( testbench ) +{ + SC_HAS_PROCESS( testbench ); + + sc_in_clk clk; + + const sc_signal& Ssum; //input + const sc_signal& Sdiff; //input + const sc_signal& adder_sub_done; //input + sc_signal& Sa; //output + sc_signal& Sb; //output + sc_signal& Sc; //output + sc_signal& adder_sub_ready; //output + + //Constructor + testbench(sc_module_name NAME, + sc_clock& CLK, + const sc_signal& SSUM, + const sc_signal& SDIFF, + const sc_signal& ADDER_SUB_DONE, + sc_signal& SA, + sc_signal& SB, + sc_signal& SC, + sc_signal& ADDER_SUB_READY) + : Ssum(SSUM), Sdiff(SDIFF), + adder_sub_done(ADDER_SUB_DONE), + Sa(SA), Sb(SB), Sc(SC), adder_sub_ready(ADDER_SUB_READY) + + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; + + diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test1/golden/test1.log b/src/systemc/tests/systemc/misc/user_guide/newsched/test1/golden/test1.log new file mode 100644 index 000000000..102bd3432 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test1/golden/test1.log @@ -0,0 +1,38 @@ +SystemC Simulation + +Info: (I703) tracing timescale unit set: 1 ns (systemc.vcd) +Seen other edge +AsyncBlock: Value read = 0 +AsyncProc: Value read = 0 +Seen other edge +AsyncBlock: Value read = 100 +Sync: Value written = 100 value1 read = 0 value2 read = 0 +AsyncProc: Value read = 100 +Seen other edge +AsyncBlock: Value read = 100 +Waited one cycle + +AsyncProc: Value read = 100 +Seen other edge +AsyncBlock: Value read = 101 +Sync: Value written = 101 value1 read = 100 value2 read = 100 +AsyncProc: Value read = 101 +Seen other edge +AsyncBlock: Value read = 101 +Waited one cycle + +AsyncProc: Value read = 101 +Seen other edge +AsyncBlock: Value read = 102 +Sync: Value written = 102 value1 read = 101 value2 read = 101 +AsyncProc: Value read = 102 +Seen other edge +AsyncBlock: Value read = 102 +Waited one cycle + +AsyncProc: Value read = 102 +Seen other edge +AsyncBlock: Value read = 103 +Sync: Value written = 103 value1 read = 102 value2 read = 102 +AsyncProc: Value read = 103 +Seen other edge diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test1/test1.cpp b/src/systemc/tests/systemc/misc/user_guide/newsched/test1/test1.cpp new file mode 100644 index 000000000..101387b96 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test1/test1.cpp @@ -0,0 +1,176 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test1.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Corner case testing for new scheduler. + Case 1. Checking triggering of a sc_async/sc_aproc + vis-a-vis a synchronous process. + This test checks to ensure that a synch. and async. sensitive + to a clock are triggered correctly. + */ + +#include "systemc.h" + +SC_MODULE( syncproc ) +{ + SC_HAS_PROCESS( syncproc ); + + sc_in clk; + + const sc_signal& in1; + const sc_signal& in2; + sc_signal& out; + + syncproc(sc_module_name NAME, + sc_signal_in_if& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& OUT_) + : in1(IN1), in2(IN2), out(OUT_) + { + SC_CTHREAD( entry, clk.pos() ); + clk(CLK); + out = 0; + } + + void entry() + { + int i = 100; + while (true) { + out = i; + wait(); + while (in1.read() != i) { + cout << "Sync: Value written = " << i << " value1 read = " << in1.read() << " value2 read = " << in2.read() << endl; + wait(); + cout << "Waited one cycle\n" << endl; + } + i++; + } + } +}; + +SC_MODULE( asyncproc ) +{ + SC_HAS_PROCESS( asyncproc ); + + const sc_signal& in; + sc_signal& out; + sc_in clock; + + asyncproc(sc_module_name NAME, + const sc_signal& IN_, + sc_signal& OUT_, + sc_signal_in_if& CLOCK) + : in(IN_), out(OUT_) + { + out = 0; + clock(CLOCK); + SC_THREAD( entry ); + sensitive << clock.pos(); + } + + void entry() + { + wait(); + while (true) { + if (clock.posedge()) { + out = in; + cout << "AsyncProc: Value read = " << in.read() << endl; + } + else { + cout << "Error" << endl; + } + wait(); + } + } +}; + +SC_MODULE( asyncblock ) +{ + SC_HAS_PROCESS( asyncblock ); + + const sc_signal& in; + sc_signal& out; + sc_in clock; + + asyncblock(sc_module_name NAME, + const sc_signal& IN_, + sc_signal& OUT_, + sc_signal_in_if& CLOCK) + : in(IN_), out(OUT_) + { + clock(CLOCK); + out = 0; + SC_METHOD( entry ); + sensitive << clock; + } + + void entry() + { + if (clock.posedge()) { + out = in; + cout << "AsyncBlock: Value read = " << in.read() << endl; + } + else { + cout << "Seen other edge" << endl; + } + } +}; + + +int +sc_main(int ac, char *av[]) +{ + sc_signal a, b, c; + + sc_clock clock("Clock", 20, SC_NS, 0.5); + + syncproc P1("P1", clock, a, b, c); + asyncproc P2("P2", c, a, clock); + asyncblock P3("P3", c, b, clock); + + sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); + tf->set_time_unit(1, SC_NS); + sc_trace(tf, a, "SYNC-IN1"); + sc_trace(tf, b, "SYNC-IN2"); + sc_trace(tf, c, "SYNC2-OUT"); + sc_trace(tf, clock, "Clock"); + + sc_start(160, SC_NS); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test2/golden/test2.log b/src/systemc/tests/systemc/misc/user_guide/newsched/test2/golden/test2.log new file mode 100644 index 000000000..33f68dce4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test2/golden/test2.log @@ -0,0 +1,34 @@ +SystemC Simulation + +Info: (I703) tracing timescale unit set: 1 ns (systemc.vcd) +Seen other edge +AsyncBlock: Value read = 0 +AsyncProc: Value read = 100 +Seen other edge +AsyncBlock: Value read = 100 +Sync: Value written = 100 value1 read = 110 value2 read = 0 +Seen other edge +AsyncBlock: Value read = 100 +Waited one cycle + +AsyncProc: Value read = 101 +Seen other edge +AsyncBlock: Value read = 101 +Sync: Value written = 101 value1 read = 111 value2 read = 100 +Seen other edge +AsyncBlock: Value read = 101 +Waited one cycle + +AsyncProc: Value read = 102 +Seen other edge +AsyncBlock: Value read = 102 +Sync: Value written = 102 value1 read = 112 value2 read = 101 +Seen other edge +AsyncBlock: Value read = 102 +Waited one cycle + +AsyncProc: Value read = 103 +Seen other edge +AsyncBlock: Value read = 103 +Sync: Value written = 103 value1 read = 113 value2 read = 102 +Seen other edge diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test2/test2.cpp b/src/systemc/tests/systemc/misc/user_guide/newsched/test2/test2.cpp new file mode 100644 index 000000000..8b6201c96 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test2/test2.cpp @@ -0,0 +1,170 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test2.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Corner case testing for new scheduler. + Case 2: Checking single cycle interaction between + sc_sync and async, in conjunction with triggering of + sc_sync and async that are sensitive to a clock + */ + +#include "systemc.h" + +SC_MODULE( syncproc ) +{ + SC_HAS_PROCESS( syncproc ); + + sc_in clk; + + const sc_signal& in1; + const sc_signal& in2; + sc_signal& out; + + syncproc(sc_module_name NAME, + sc_signal_in_if& CLK, + const sc_signal& IN1, + const sc_signal& IN2, + sc_signal& OUT_) + : in1(IN1), in2(IN2), out(OUT_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + out = 0; + } + + void entry() + { + int i = 100; + while (true) { + out = i; + wait(); + while (in2.read() != i) { + cout << "Sync: Value written = " << i << " value1 read = " << in1.read() << " value2 read = " << in2.read() << endl; + wait(); + cout << "Waited one cycle\n" << endl; + } + i++; + } + } +}; + +SC_MODULE( asyncproc ) +{ + SC_HAS_PROCESS( asyncproc ); + + const sc_signal& in; + sc_signal& out; + sc_in clock; + + asyncproc(sc_module_name NAME, + const sc_signal& IN_, + sc_signal& OUT_, + sc_signal_in_if& CLOCK) + : in(IN_), out(OUT_) + { + clock(CLOCK); + out = 0; + SC_THREAD( entry ); + sensitive << in; + } + + void entry() + { + wait(); + while (true) { + out = in + 10; + cout << "AsyncProc: Value read = " << in.read() << endl; + wait(); + } + } +}; + +SC_MODULE( asyncblock ) +{ + SC_HAS_PROCESS( asyncblock ); + + const sc_signal& in; + sc_signal& out; + sc_in clock; + + asyncblock(sc_module_name NAME, + const sc_signal& IN_, + sc_signal& OUT_, + sc_signal_in_if& CLOCK) + : in(IN_), out(OUT_) + { + clock(CLOCK); + out = 0; + SC_METHOD( entry ); + sensitive << clock; + } + + void entry() + { + if (clock.posedge()) { + out = in; + cout << "AsyncBlock: Value read = " << in.read() << endl; + } + else { + cout << "Seen other edge" << endl; + } + } +}; + + +int +sc_main(int ac, char *av[]) +{ + sc_signal a, b, c; + + sc_clock clock("Clock", 20, SC_NS, 0.5); + + syncproc P1("P1", clock, a, b, c); + asyncproc P2("P2", c, a, clock); + asyncblock P3("P3", c, b, clock); + + sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); + tf->set_time_unit(1, SC_NS); + sc_trace(tf, a, "SYNC-IN1"); + sc_trace(tf, b, "SYNC-IN2"); + sc_trace(tf, c, "SYNC2-OUT"); + sc_trace(tf, clock, "Clock"); + + sc_start(160, SC_NS); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test3/golden/test3.log b/src/systemc/tests/systemc/misc/user_guide/newsched/test3/golden/test3.log new file mode 100644 index 000000000..694dcb348 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test3/golden/test3.log @@ -0,0 +1,18 @@ +SystemC Simulation +AsyncBlock: Negedge +AsyncProc: Posedge +AsyncBlock: Negedge +AsyncProc: Posedge +AsyncBlock: Negedge +AsyncProc: Posedge +AsyncBlock: Negedge +AsyncProc: Posedge +AsyncBlock: Negedge +AsyncProc: Posedge +AsyncBlock: Negedge +AsyncProc: Posedge +AsyncBlock: Negedge +AsyncProc: Posedge +AsyncBlock: Negedge +AsyncProc: Posedge +AsyncBlock: Negedge diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test3/test3.cpp b/src/systemc/tests/systemc/misc/user_guide/newsched/test3/test3.cpp new file mode 100644 index 000000000..eda07c614 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test3/test3.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test3.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Corner case testing for new scheduler. + Case 3: Checking sensitive_pos() and sensitive_neg() methods +*/ + +#include "systemc.h" + +SC_MODULE( asyncproc ) +{ + SC_HAS_PROCESS( asyncproc ); + + sc_in clock; + + asyncproc(sc_module_name NAME, + sc_signal_in_if& CLOCK) + { + clock(CLOCK); + SC_THREAD( entry ); + sensitive << clock.pos(); + } + + void entry() + { + wait(); + while (true) { + if (clock.posedge()) { + cout << "AsyncProc: Posedge\n"; + } + else { + cout << "AsyncProc: ERROR" << endl; + } + wait(); + } + } +}; + +SC_MODULE( asyncblock ) +{ + SC_HAS_PROCESS( asyncblock ); + + sc_in clock; + + asyncblock(sc_module_name NAME, + sc_signal_in_if& CLOCK) + { + clock(CLOCK); + SC_METHOD( entry ); + sensitive << clock.neg(); + } + + void entry() + { + if (clock.posedge()) { + cout << "AsyncBlock: ERROR\n"; + } + else { + cout << "AsyncBlock: Negedge" << endl; + } + } +}; + + +int +sc_main(int ac, char *av[]) +{ + sc_clock clock("Clock", 20, SC_NS, 0.5); + + asyncproc P2("P2", clock); + asyncblock P3("P3", clock); + + sc_start(160, SC_NS); + return 0; + +} diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test4/golden/test4.log b/src/systemc/tests/systemc/misc/user_guide/newsched/test4/golden/test4.log new file mode 100644 index 000000000..c4c8ca893 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test4/golden/test4.log @@ -0,0 +1,121 @@ +SystemC Simulation +[ Gate = 1 - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 11 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 12 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 13 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 14 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Gate = 1 - ] +[ Posedge(D) - ] +[ A = 15 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 16 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 17 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 18 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Gate = 1 - ] +[ Posedge(D) - ] +[ A = 19 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 20 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 21 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 22 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Gate = 1 - ] +[ Posedge(D) - ] +[ A = 23 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 24 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 25 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 26 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Gate = 1 - ] +[ Posedge(D) - ] +[ A = 27 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 28 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 29 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 30 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test4/test4.cpp b/src/systemc/tests/systemc/misc/user_guide/newsched/test4/test4.cpp new file mode 100644 index 000000000..f9d97063f --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test4/test4.cpp @@ -0,0 +1,199 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test4.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Corner case testing for new scheduler. + Case 4: Checking gated clocks and triggering of processes + */ + +#include "systemc.h" + +SC_MODULE( cgater ) +{ + SC_HAS_PROCESS( cgater ); + + const sc_signal& gate; + sc_in clock_in; + sc_out clock_out; + + cgater(sc_module_name NAME, + const sc_signal& GATE, + sc_signal_in_if& CLOCK_IN, + sc_signal_out_if& CLOCK_OUT) + : gate(GATE) + { + clock_in(CLOCK_IN); + clock_out(CLOCK_OUT); + SC_METHOD( entry ); + sensitive << gate; + sensitive << clock_in; + } + + void entry() + { + clock_out = clock_in & gate; + } +}; + +SC_MODULE( watcher ) +{ + SC_HAS_PROCESS( watcher ); + + const sc_signal& gate; + sc_in clock; + sc_in dclock; + const sc_signal& a; + + watcher(sc_module_name NAME, + const sc_signal& GATE, + sc_signal_in_if& CLOCK, + sc_signal_in_if& DCLOCK, + const sc_signal& A) + : gate(GATE), a(A) + { + clock(CLOCK); + dclock(DCLOCK); + SC_METHOD( entry ); + sensitive << clock; + sensitive << a; + sensitive << gate; + sensitive << dclock; + } + + void entry() + { + cout << "[ "; + if (clock.posedge()) cout << "Posedge - "; + if (clock.negedge()) cout << "Negedge - "; + if (dclock.posedge()) cout << "Posedge(D) - "; + if (dclock.negedge()) cout << "Negedge(D) - "; + if (a.event()) cout << "A = " << a.read() << " - "; + if (gate.event()) cout << "Gate = " << gate.read() << " - "; + cout << "]" << endl; + } +}; + + +SC_MODULE( gategen ) +{ + SC_HAS_PROCESS( gategen ); + + sc_in clk; + + sc_signal& gate; + + gategen(sc_module_name NAME, + sc_signal_in_if& CLK, + sc_signal& GATE) + : gate(GATE) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + gate = 1; + } + + void entry() + { + while (true) { + gate = 1; wait(3); + gate = 0; wait (3); + } + } +}; + +SC_MODULE( trigp ) +{ + SC_HAS_PROCESS( trigp ); + + sc_in clk; + + sc_signal& out; + + trigp(sc_module_name NAME, + sc_signal_in_if& CLK, + sc_signal& OUT_) + : out(OUT_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + out = 0; + } + + void entry() + { + int i = 11; + while (true) { + out = i++; + wait(); + } + } +}; + +int +sc_main(int ac, char *av[]) +{ + // sc_clock clock1("Clock1", 20, SC_NS, 0.5); + // sc_clock dclock("Derived"); + sc_signal clock1( "Clock1" ); + sc_signal dclock( "Derived" ); + + sc_signal Gate; + sc_signal Output; + + cgater CG("CG", Gate, clock1, dclock); + watcher W("W", Gate, clock1, dclock, Output); + gategen G("G", clock1, Gate); + trigp T("T", dclock, Output); + + sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); + sc_trace(tf, clock1, "Clock"); + sc_trace(tf, dclock, "Dclock"); + sc_trace(tf, Gate, "Gate"); + sc_trace(tf, Output, "Out"); + + sc_start(0, SC_NS); + clock1.write(0); + sc_start(5, SC_NS); + for (int i=0; i < 30; i++) { + clock1.write(1); + sc_start(5, SC_NS); + clock1.write(0); + sc_start(5, SC_NS); + } + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test5/golden/test5.log b/src/systemc/tests/systemc/misc/user_guide/newsched/test5/golden/test5.log new file mode 100644 index 000000000..c4c8ca893 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test5/golden/test5.log @@ -0,0 +1,121 @@ +SystemC Simulation +[ Gate = 1 - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 11 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 12 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 13 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 14 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Gate = 1 - ] +[ Posedge(D) - ] +[ A = 15 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 16 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 17 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 18 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Gate = 1 - ] +[ Posedge(D) - ] +[ A = 19 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 20 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 21 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 22 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Gate = 1 - ] +[ Posedge(D) - ] +[ A = 23 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 24 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 25 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 26 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Gate = 1 - ] +[ Posedge(D) - ] +[ A = 27 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 28 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - ] +[ A = 29 - ] +[ Negedge - ] +[ Negedge(D) - ] +[ Posedge - ] +[ Posedge(D) - Gate = 0 - ] +[ Negedge(D) - A = 30 - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] +[ Posedge - ] +[ Negedge - ] diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test5/test5.cpp b/src/systemc/tests/systemc/misc/user_guide/newsched/test5/test5.cpp new file mode 100644 index 000000000..2338cde83 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test5/test5.cpp @@ -0,0 +1,189 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test5.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Corner case testing for new scheduler. + Case 4: Checking gated clocks and triggering of processes + */ + +#include "systemc.h" + +SC_MODULE( cgater ) +{ + SC_HAS_PROCESS( cgater ); + + const sc_signal& gate; + sc_in clock_in; + sc_out clock_out; + + cgater(sc_module_name NAME, + const sc_signal& GATE, + sc_signal_in_if& CLOCK_IN, + sc_signal_out_if& CLOCK_OUT) + : gate(GATE) + { + clock_in(CLOCK_IN); + clock_out(CLOCK_OUT); + SC_METHOD( entry ); + sensitive << gate; + sensitive << clock_in; + } + + void entry() + { + clock_out = clock_in & gate; + } +}; + +SC_MODULE( watcher ) +{ + SC_HAS_PROCESS( watcher ); + + const sc_signal& gate; + sc_in clock; + sc_in dclock; + const sc_signal& a; + + watcher(sc_module_name NAME, + const sc_signal& GATE, + sc_signal_in_if& CLOCK, + sc_signal_in_if& DCLOCK, + const sc_signal& A) + : gate(GATE), a(A) + { + clock(CLOCK); + dclock(DCLOCK); + SC_METHOD( entry ); + sensitive << clock; + sensitive << a; + sensitive << gate; + sensitive << dclock; + } + + void entry() + { + cout << "[ "; + if (clock.posedge()) cout << "Posedge - "; + if (clock.negedge()) cout << "Negedge - "; + if (dclock.posedge()) cout << "Posedge(D) - "; + if (dclock.negedge()) cout << "Negedge(D) - "; + if (a.event()) cout << "A = " << a.read() << " - "; + if (gate.event()) cout << "Gate = " << gate.read() << " - "; + cout << "]" << endl; + } +}; + + +SC_MODULE( gategen ) +{ + SC_HAS_PROCESS( gategen ); + + sc_in clk; + + sc_signal& gate; + + gategen(sc_module_name NAME, + sc_signal_in_if& CLK, + sc_signal& GATE) + : gate(GATE) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + gate = 1; + } + + void entry() + { + while (true) { + gate = 1; wait(3); + gate = 0; wait (3); + } + } +}; + +SC_MODULE( trigp ) +{ + SC_HAS_PROCESS( trigp ); + + sc_in clk; + + sc_signal& out; + + trigp(sc_module_name NAME, + sc_signal_in_if& CLK, + sc_signal& OUT_) + : out(OUT_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + out = 0; + } + + void entry() + { + int i = 11; + while (true) { + out = i++; + wait(); + } + } +}; + +int +sc_main(int ac, char *av[]) +{ + sc_clock clock1("Clock1", 20, SC_NS, 0.5); + // sc_clock dclock("Derived", -1); + sc_signal dclock( "Derived" ); + + sc_signal Gate; + sc_signal Output; + + cgater CG("CG", Gate, clock1, dclock); + watcher W("W", Gate, clock1, dclock, Output); + gategen G("G", clock1, Gate); + trigp T("T", dclock, Output); + + sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); + sc_trace(tf, clock1, "Clock"); + sc_trace(tf, dclock, "Dclock"); + sc_trace(tf, Gate, "Gate"); + sc_trace(tf, Output, "Out"); + + sc_start(600, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test6/golden/test6.log b/src/systemc/tests/systemc/misc/user_guide/newsched/test6/golden/test6.log new file mode 100644 index 000000000..8b5d0ffef --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test6/golden/test6.log @@ -0,0 +1,22 @@ +SystemC Simulation +[ ] +[ Posedge(1) - Posedge(2) - ASync1 Out = 1 - ASync2 Out = 1 - ] +[ Sync1 Out = 11 - ASync1 Out = 2 - Sync2 Out = 11 - ASync2 Out = 2 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 3 - ASync2 Out = 3 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 12 - ASync1 Out = 4 - Sync2 Out = 12 - ASync2 Out = 4 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 5 - ASync2 Out = 5 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 13 - ASync1 Out = 6 - Sync2 Out = 13 - ASync2 Out = 6 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 7 - ASync2 Out = 7 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 14 - ASync1 Out = 8 - Sync2 Out = 14 - ASync2 Out = 8 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 9 - ASync2 Out = 9 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 15 - ASync1 Out = 10 - Sync2 Out = 15 - ASync2 Out = 10 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 11 - ASync2 Out = 11 - ] diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test6/test6.cpp b/src/systemc/tests/systemc/misc/user_guide/newsched/test6/test6.cpp new file mode 100644 index 000000000..a1446e8aa --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test6/test6.cpp @@ -0,0 +1,165 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test6.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Corner case testing for new scheduler. + Case 5: Checking multiple clock transitions at the same time + */ + +#include "systemc.h" + +SC_MODULE( triga ) +{ + SC_HAS_PROCESS( triga ); + + sc_in clock; + sc_signal& out; + + int i; + + triga(sc_module_name NAME, + sc_signal_in_if& CLOCK, + sc_signal& OUT_) + : out(OUT_) + { + clock(CLOCK); + SC_METHOD( entry ); + sensitive << clock; + i = 0; + out = i++; + } + + void entry() + { + out = i++; + } +}; + +SC_MODULE( watcher ) +{ + SC_HAS_PROCESS( watcher ); + + sc_in clock1; + sc_in clock2; + const sc_signal& in1; + const sc_signal& in2; + const sc_signal& in3; + const sc_signal& in4; + + watcher(sc_module_name NAME, + sc_signal_in_if& CLOCK1, + sc_signal_in_if& CLOCK2, + const sc_signal& IN1, + const sc_signal& IN2, + const sc_signal& IN3, + const sc_signal& IN4) + : in1(IN1), in2(IN2), in3(IN3), in4(IN4) + { + clock1(CLOCK1); clock2(CLOCK2); + SC_METHOD( entry ); + sensitive << clock1 << clock2 << in1 << in2 << in3 << in4; + } + + void entry() + { + cout << "[ "; + if (clock1.posedge()) cout << "Posedge(1) - "; + if (clock1.negedge()) cout << "Negedge(1) - "; + if (clock2.posedge()) cout << "Posedge(2) - "; + if (clock2.negedge()) cout << "Negedge(2) - "; + if (in1.event()) cout << "Sync1 Out = " << in1.read() << " - "; + if (in2.event()) cout << "ASync1 Out = " << in2.read() << " - "; + if (in3.event()) cout << "Sync2 Out = " << in3.read() << " - "; + if (in4.event()) cout << "ASync2 Out = " << in4.read() << " - "; + cout << "]" << endl; + } +}; + + +SC_MODULE( trigp ) +{ + SC_HAS_PROCESS( trigp ); + + sc_in clk; + + sc_signal& out; + + trigp(sc_module_name NAME, + sc_signal_in_if& CLK, + sc_signal& OUT_) + : out(OUT_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + out = 0; + } + + void entry() + { + int i = 11; + while (true) { + out = i++; + wait(); + } + } +}; + +int +sc_main(int ac, char *av[]) +{ + sc_clock clock1("Clock1", 20, SC_NS, 0.5); + sc_clock clock2("Clock2", 20, SC_NS, 0.5); + + sc_signal sig1, sig2, sig3, sig4; + + triga T1("T1", clock1, sig2); + triga T2("T2", clock2, sig4); + trigp T3("T3", clock1, sig1); + trigp T4("T4", clock2, sig3); + watcher W("W", clock1, clock2, sig1, sig2, sig3, sig4); + + sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); + sc_trace(tf, clock1, "Clock1"); + sc_trace(tf, clock2, "Clock2"); + sc_trace(tf, sig1, "Sync1"); + sc_trace(tf, sig2, "Async1"); + sc_trace(tf, sig3, "Sync2"); + sc_trace(tf, sig4, "Async2"); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test7/golden/test7.log b/src/systemc/tests/systemc/misc/user_guide/newsched/test7/golden/test7.log new file mode 100644 index 000000000..be038115a --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test7/golden/test7.log @@ -0,0 +1,22 @@ +SystemC Simulation +[ ] +[ Posedge(1) - Posedge(2) - ASync1 Out = 1 - ASync2 Out = 1 - ] +[ Sync1 Out = 11 - ASync1 Out = 2 - Sync2 Out = 11 - ASync2 Out = 2 - ] +[ Negedge(1) - ] +[ ASync1 Out = 3 - ] +[ Posedge(1) - Negedge(2) - ] +[ Sync1 Out = 12 - ASync1 Out = 4 - ASync2 Out = 3 - ] +[ Negedge(1) - ] +[ ASync1 Out = 5 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 13 - ASync1 Out = 6 - Sync2 Out = 12 - ASync2 Out = 4 - ] +[ Negedge(1) - ] +[ ASync1 Out = 7 - ] +[ Posedge(1) - Negedge(2) - ] +[ Sync1 Out = 14 - ASync1 Out = 8 - ASync2 Out = 5 - ] +[ Negedge(1) - ] +[ ASync1 Out = 9 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 15 - ASync1 Out = 10 - Sync2 Out = 13 - ASync2 Out = 6 - ] +[ Negedge(1) - ] +[ ASync1 Out = 11 - ] diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test7/test7.cpp b/src/systemc/tests/systemc/misc/user_guide/newsched/test7/test7.cpp new file mode 100644 index 000000000..a9bc31693 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test7/test7.cpp @@ -0,0 +1,167 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test7.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* + Corner case testing for new scheduler. + Case 5: Checking multiple clock transitions at the same time + */ + +#include "systemc.h" + +SC_MODULE( triga ) +{ + SC_HAS_PROCESS( triga ); + + sc_in clock; + sc_signal& out; + + int i; + + triga(sc_module_name NAME, + sc_signal_in_if& CLOCK, + sc_signal& OUT_) + : out(OUT_) + { + clock(CLOCK); + SC_METHOD( entry ); + sensitive << clock; + i = 0; + out = i++; + } + + void entry() + { + out = i++; + } +}; + +SC_MODULE( watcher ) +{ + SC_HAS_PROCESS( watcher ); + + sc_in clock1; + sc_in clock2; + const sc_signal& in1; + const sc_signal& in2; + const sc_signal& in3; + const sc_signal& in4; + + watcher(sc_module_name NAME, + sc_signal_in_if& CLOCK1, + sc_signal_in_if& CLOCK2, + const sc_signal& IN1, + const sc_signal& IN2, + const sc_signal& IN3, + const sc_signal& IN4) + : in1(IN1), in2(IN2), in3(IN3), in4(IN4) + { + clock1(CLOCK1); + clock2(CLOCK2); + SC_METHOD( entry ); + sensitive << clock1 << clock2; + sensitive << in1 << in2 << in3 << in4; + } + + void entry() + { + cout << "[ "; + if (clock1.posedge()) cout << "Posedge(1) - "; + if (clock1.negedge()) cout << "Negedge(1) - "; + if (clock2.posedge()) cout << "Posedge(2) - "; + if (clock2.negedge()) cout << "Negedge(2) - "; + if (in1.event()) cout << "Sync1 Out = " << in1.read() << " - "; + if (in2.event()) cout << "ASync1 Out = " << in2.read() << " - "; + if (in3.event()) cout << "Sync2 Out = " << in3.read() << " - "; + if (in4.event()) cout << "ASync2 Out = " << in4.read() << " - "; + cout << "]" << endl; + } +}; + + +SC_MODULE( trigp ) +{ + SC_HAS_PROCESS( trigp ); + + sc_in clk; + + sc_signal& out; + + trigp(sc_module_name NAME, + sc_signal_in_if& CLK, + sc_signal& OUT_) + : out(OUT_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + out = 0; + } + + void entry() + { + int i = 11; + while (true) { + out = i++; + wait(); + } + } +}; + +int +sc_main(int ac, char *av[]) +{ + sc_clock clock1("Clock1", 20, SC_NS, 0.5); + sc_clock clock2("Clock2", 40, SC_NS, 0.5); + + sc_signal sig1, sig2, sig3, sig4; + + triga T1("T1", clock1, sig2); + triga T2("T2", clock2, sig4); + trigp T3("T3", clock1, sig1); + trigp T4("T4", clock2, sig3); + watcher W("W", clock1, clock2, sig1, sig2, sig3, sig4); + + sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); + sc_trace(tf, clock1, "Clock1"); + sc_trace(tf, clock2, "Clock2"); + sc_trace(tf, sig1, "Sync1"); + sc_trace(tf, sig2, "Async1"); + sc_trace(tf, sig3, "Sync2"); + sc_trace(tf, sig4, "Async2"); + + sc_start(100, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test8/golden/test8.log b/src/systemc/tests/systemc/misc/user_guide/newsched/test8/golden/test8.log new file mode 100644 index 000000000..33a2eacbf --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test8/golden/test8.log @@ -0,0 +1,43 @@ +SystemC Simulation +[ ] +[ ASync1 Out = 1 - ASync2 Out = 1 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 11 - ASync1 Out = 2 - Sync2 Out = 11 - ASync2 Out = 2 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 3 - ASync2 Out = 3 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 12 - ASync1 Out = 4 - Sync2 Out = 12 - ASync2 Out = 4 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 5 - ASync2 Out = 5 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 13 - ASync1 Out = 6 - Sync2 Out = 13 - ASync2 Out = 6 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 7 - ASync2 Out = 7 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 14 - ASync1 Out = 8 - Sync2 Out = 14 - ASync2 Out = 8 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 9 - ASync2 Out = 9 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 15 - ASync1 Out = 10 - Sync2 Out = 15 - ASync2 Out = 10 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 11 - ASync2 Out = 11 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 16 - ASync1 Out = 12 - Sync2 Out = 16 - ASync2 Out = 12 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 13 - ASync2 Out = 13 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 17 - ASync1 Out = 14 - Sync2 Out = 17 - ASync2 Out = 14 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 15 - ASync2 Out = 15 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 18 - ASync1 Out = 16 - Sync2 Out = 18 - ASync2 Out = 16 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 17 - ASync2 Out = 17 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 19 - ASync1 Out = 18 - Sync2 Out = 19 - ASync2 Out = 18 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 19 - ASync2 Out = 19 - ] +[ Posedge(1) - Posedge(2) - ] +[ Sync1 Out = 20 - ASync1 Out = 20 - Sync2 Out = 20 - ASync2 Out = 20 - ] +[ Negedge(1) - Negedge(2) - ] +[ ASync1 Out = 21 - ASync2 Out = 21 - ] diff --git a/src/systemc/tests/systemc/misc/user_guide/newsched/test8/test8.cpp b/src/systemc/tests/systemc/misc/user_guide/newsched/test8/test8.cpp new file mode 100644 index 000000000..9d4fe3d00 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/newsched/test8/test8.cpp @@ -0,0 +1,187 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test8.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: test8.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:23 acg +// systemc_tests-2.3 +// +// Revision 1.2 2006/01/24 21:05:50 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// + +/* + Corner case testing for new scheduler. + Case 5: Checking multiple clock transitions at the same time + */ + +#include "systemc.h" + +SC_MODULE( triga ) +{ + SC_HAS_PROCESS( triga ); + + sc_in clock; + sc_signal& out; + + int i; + + triga(sc_module_name NAME, + sc_signal_in_if& CLOCK, + sc_signal& OUT_) + : out(OUT_) + { + clock(CLOCK); + SC_METHOD( entry ); + sensitive << clock; + i = 0; + out = i++; + } + + void entry() + { + out = i++; + } +}; + +SC_MODULE( watcher ) +{ + SC_HAS_PROCESS( watcher ); + + sc_in clock1; + sc_in clock2; + const sc_signal& in1; + const sc_signal& in2; + const sc_signal& in3; + const sc_signal& in4; + + watcher(sc_module_name NAME, + sc_signal_in_if& CLOCK1, + sc_signal_in_if& CLOCK2, + const sc_signal& IN1, + const sc_signal& IN2, + const sc_signal& IN3, + const sc_signal& IN4) + : in1(IN1), in2(IN2), in3(IN3), in4(IN4) + { + clock1(CLOCK1); + clock2(CLOCK2); + SC_METHOD( entry ); + sensitive << clock1; sensitive << clock2; + sensitive << in1; sensitive << in2; sensitive << in3; sensitive << in4; + } + + void entry() + { + cout << "[ "; + if (clock1.posedge()) cout << "Posedge(1) - "; + if (clock1.negedge()) cout << "Negedge(1) - "; + if (clock2.posedge()) cout << "Posedge(2) - "; + if (clock2.negedge()) cout << "Negedge(2) - "; + if (in1.event()) cout << "Sync1 Out = " << in1.read() << " - "; + if (in2.event()) cout << "ASync1 Out = " << in2.read() << " - "; + if (in3.event()) cout << "Sync2 Out = " << in3.read() << " - "; + if (in4.event()) cout << "ASync2 Out = " << in4.read() << " - "; + cout << "]" << endl; + } +}; + + +SC_MODULE( trigp ) +{ + SC_HAS_PROCESS( trigp ); + + sc_in clk; + + sc_signal& out; + + trigp(sc_module_name NAME, + sc_signal_in_if& CLK, + sc_signal& OUT_) + : out(OUT_) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + out = 0; + } + + void entry() + { + int i = 11; + while (true) { + out = i++; + wait(); + } + } +}; + +int +sc_main(int ac, char *av[]) +{ + // sc_clock clock1("Clock1", 20, SC_NS, 0.5); + // sc_clock clock2("Clock2", 20, SC_NS, 0.5); + sc_signal clock1( "Clock1" ); + sc_signal clock2( "Clock2" ); + + sc_signal sig1, sig2, sig3, sig4; + + triga T1("T1", clock1, sig2); + triga T2("T2", clock2, sig4); + trigp T3("T3", clock1, sig1); + trigp T4("T4", clock2, sig3); + watcher W("W", clock1, clock2, sig1, sig2, sig3, sig4); + + sc_trace_file *tf = sc_create_vcd_trace_file("systemc"); + sc_trace(tf, clock1, "Clock1"); + sc_trace(tf, clock2, "Clock2"); + sc_trace(tf, sig1, "Sync1"); + sc_trace(tf, sig2, "Async1"); + sc_trace(tf, sig3, "Sync2"); + sc_trace(tf, sig4, "Async2"); + + sc_start(0, SC_NS); + clock1 = 0; + clock2 = 0; + sc_start(5, SC_NS); + for (int i = 0; i< 10; i++) { + clock1 = 1; clock2 = 1; + sc_start(5, SC_NS); + clock1 = 0; clock2 = 0; + sc_start(5, SC_NS); + } + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/param_model/common.h b/src/systemc/tests/systemc/misc/user_guide/param_model/common.h new file mode 100644 index 000000000..43c767bcc --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/param_model/common.h @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + common.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef COMMON_H +#define COMMON_H + +#include "systemc.h" + +typedef sc_signal > signal_bool_vector; + +#endif diff --git a/src/systemc/tests/systemc/misc/user_guide/param_model/golden/param_model.log b/src/systemc/tests/systemc/misc/user_guide/param_model/golden/param_model.log new file mode 100644 index 000000000..8b3af8297 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/param_model/golden/param_model.log @@ -0,0 +1,260 @@ +SystemC Simulation +35 ns : RESET off ...by stim +60 ns : 0 + 0 + 1 = 1 => carry = 0 sum = 00001 +100 ns : 1 + 0 + 0 = 1 => carry = 0 sum = 00001 +140 ns : 2 + 0 + 1 = 3 => carry = 0 sum = 00011 +180 ns : 3 + 0 + 0 = 3 => carry = 0 sum = 00011 +220 ns : 4 + 0 + 1 = 5 => carry = 0 sum = 00101 +260 ns : 5 + 0 + 0 = 5 => carry = 0 sum = 00101 +300 ns : 6 + 0 + 1 = 7 => carry = 0 sum = 00111 +340 ns : 7 + 0 + 0 = 7 => carry = 0 sum = 00111 +380 ns : 8 + 0 + 1 = 9 => carry = 0 sum = 01001 +420 ns : 9 + 0 + 0 = 9 => carry = 0 sum = 01001 +460 ns : 10 + 0 + 1 = 11 => carry = 0 sum = 01011 +500 ns : 11 + 0 + 0 = 11 => carry = 0 sum = 01011 +540 ns : 12 + 0 + 1 = 13 => carry = 0 sum = 01101 +580 ns : 13 + 0 + 0 = 13 => carry = 0 sum = 01101 +620 ns : 14 + 0 + 1 = 15 => carry = 0 sum = 01111 +660 ns : 15 + 0 + 0 = 15 => carry = 0 sum = 01111 +700 ns : 0 + 1 + 1 = 2 => carry = 0 sum = 00010 +740 ns : 1 + 1 + 0 = 2 => carry = 0 sum = 00010 +780 ns : 2 + 1 + 1 = 4 => carry = 0 sum = 00100 +820 ns : 3 + 1 + 0 = 4 => carry = 0 sum = 00100 +860 ns : 4 + 1 + 1 = 6 => carry = 0 sum = 00110 +900 ns : 5 + 1 + 0 = 6 => carry = 0 sum = 00110 +940 ns : 6 + 1 + 1 = 8 => carry = 0 sum = 01000 +980 ns : 7 + 1 + 0 = 8 => carry = 0 sum = 01000 +1020 ns : 8 + 1 + 1 = 10 => carry = 0 sum = 01010 +1060 ns : 9 + 1 + 0 = 10 => carry = 0 sum = 01010 +1100 ns : 10 + 1 + 1 = 12 => carry = 0 sum = 01100 +1140 ns : 11 + 1 + 0 = 12 => carry = 0 sum = 01100 +1180 ns : 12 + 1 + 1 = 14 => carry = 0 sum = 01110 +1220 ns : 13 + 1 + 0 = 14 => carry = 0 sum = 01110 +1260 ns : 14 + 1 + 1 = 16 => carry = 0 sum = 10000 +1300 ns : 15 + 1 + 0 = 16 => carry = 0 sum = 10000 +1340 ns : 0 + 2 + 1 = 3 => carry = 0 sum = 00011 +1380 ns : 1 + 2 + 0 = 3 => carry = 0 sum = 00011 +1420 ns : 2 + 2 + 1 = 5 => carry = 0 sum = 00101 +1460 ns : 3 + 2 + 0 = 5 => carry = 0 sum = 00101 +1500 ns : 4 + 2 + 1 = 7 => carry = 0 sum = 00111 +1540 ns : 5 + 2 + 0 = 7 => carry = 0 sum = 00111 +1580 ns : 6 + 2 + 1 = 9 => carry = 0 sum = 01001 +1620 ns : 7 + 2 + 0 = 9 => carry = 0 sum = 01001 +1660 ns : 8 + 2 + 1 = 11 => carry = 0 sum = 01011 +1700 ns : 9 + 2 + 0 = 11 => carry = 0 sum = 01011 +1740 ns : 10 + 2 + 1 = 13 => carry = 0 sum = 01101 +1780 ns : 11 + 2 + 0 = 13 => carry = 0 sum = 01101 +1820 ns : 12 + 2 + 1 = 15 => carry = 0 sum = 01111 +1860 ns : 13 + 2 + 0 = 15 => carry = 0 sum = 01111 +1900 ns : 14 + 2 + 1 = 17 => carry = 0 sum = 10001 +1940 ns : 15 + 2 + 0 = 17 => carry = 0 sum = 10001 +1980 ns : 0 + 3 + 1 = 4 => carry = 0 sum = 00100 +2020 ns : 1 + 3 + 0 = 4 => carry = 0 sum = 00100 +2060 ns : 2 + 3 + 1 = 6 => carry = 0 sum = 00110 +2100 ns : 3 + 3 + 0 = 6 => carry = 0 sum = 00110 +2140 ns : 4 + 3 + 1 = 8 => carry = 0 sum = 01000 +2180 ns : 5 + 3 + 0 = 8 => carry = 0 sum = 01000 +2220 ns : 6 + 3 + 1 = 10 => carry = 0 sum = 01010 +2260 ns : 7 + 3 + 0 = 10 => carry = 0 sum = 01010 +2300 ns : 8 + 3 + 1 = 12 => carry = 0 sum = 01100 +2340 ns : 9 + 3 + 0 = 12 => carry = 0 sum = 01100 +2380 ns : 10 + 3 + 1 = 14 => carry = 0 sum = 01110 +2420 ns : 11 + 3 + 0 = 14 => carry = 0 sum = 01110 +2460 ns : 12 + 3 + 1 = 16 => carry = 0 sum = 10000 +2500 ns : 13 + 3 + 0 = 16 => carry = 0 sum = 10000 +2540 ns : 14 + 3 + 1 = 18 => carry = 0 sum = 10010 +2580 ns : 15 + 3 + 0 = 18 => carry = 0 sum = 10010 +2620 ns : 0 + 4 + 1 = 5 => carry = 0 sum = 00101 +2660 ns : 1 + 4 + 0 = 5 => carry = 0 sum = 00101 +2700 ns : 2 + 4 + 1 = 7 => carry = 0 sum = 00111 +2740 ns : 3 + 4 + 0 = 7 => carry = 0 sum = 00111 +2780 ns : 4 + 4 + 1 = 9 => carry = 0 sum = 01001 +2820 ns : 5 + 4 + 0 = 9 => carry = 0 sum = 01001 +2860 ns : 6 + 4 + 1 = 11 => carry = 0 sum = 01011 +2900 ns : 7 + 4 + 0 = 11 => carry = 0 sum = 01011 +2940 ns : 8 + 4 + 1 = 13 => carry = 0 sum = 01101 +2980 ns : 9 + 4 + 0 = 13 => carry = 0 sum = 01101 +3020 ns : 10 + 4 + 1 = 15 => carry = 0 sum = 01111 +3060 ns : 11 + 4 + 0 = 15 => carry = 0 sum = 01111 +3100 ns : 12 + 4 + 1 = 17 => carry = 0 sum = 10001 +3140 ns : 13 + 4 + 0 = 17 => carry = 0 sum = 10001 +3180 ns : 14 + 4 + 1 = 19 => carry = 0 sum = 10011 +3220 ns : 15 + 4 + 0 = 19 => carry = 0 sum = 10011 +3260 ns : 0 + 5 + 1 = 6 => carry = 0 sum = 00110 +3300 ns : 1 + 5 + 0 = 6 => carry = 0 sum = 00110 +3340 ns : 2 + 5 + 1 = 8 => carry = 0 sum = 01000 +3380 ns : 3 + 5 + 0 = 8 => carry = 0 sum = 01000 +3420 ns : 4 + 5 + 1 = 10 => carry = 0 sum = 01010 +3460 ns : 5 + 5 + 0 = 10 => carry = 0 sum = 01010 +3500 ns : 6 + 5 + 1 = 12 => carry = 0 sum = 01100 +3540 ns : 7 + 5 + 0 = 12 => carry = 0 sum = 01100 +3580 ns : 8 + 5 + 1 = 14 => carry = 0 sum = 01110 +3620 ns : 9 + 5 + 0 = 14 => carry = 0 sum = 01110 +3660 ns : 10 + 5 + 1 = 16 => carry = 0 sum = 10000 +3700 ns : 11 + 5 + 0 = 16 => carry = 0 sum = 10000 +3740 ns : 12 + 5 + 1 = 18 => carry = 0 sum = 10010 +3780 ns : 13 + 5 + 0 = 18 => carry = 0 sum = 10010 +3820 ns : 14 + 5 + 1 = 20 => carry = 0 sum = 10100 +3860 ns : 15 + 5 + 0 = 20 => carry = 0 sum = 10100 +3900 ns : 0 + 6 + 1 = 7 => carry = 0 sum = 00111 +3940 ns : 1 + 6 + 0 = 7 => carry = 0 sum = 00111 +3980 ns : 2 + 6 + 1 = 9 => carry = 0 sum = 01001 +4020 ns : 3 + 6 + 0 = 9 => carry = 0 sum = 01001 +4060 ns : 4 + 6 + 1 = 11 => carry = 0 sum = 01011 +4100 ns : 5 + 6 + 0 = 11 => carry = 0 sum = 01011 +4140 ns : 6 + 6 + 1 = 13 => carry = 0 sum = 01101 +4180 ns : 7 + 6 + 0 = 13 => carry = 0 sum = 01101 +4220 ns : 8 + 6 + 1 = 15 => carry = 0 sum = 01111 +4260 ns : 9 + 6 + 0 = 15 => carry = 0 sum = 01111 +4300 ns : 10 + 6 + 1 = 17 => carry = 0 sum = 10001 +4340 ns : 11 + 6 + 0 = 17 => carry = 0 sum = 10001 +4380 ns : 12 + 6 + 1 = 19 => carry = 0 sum = 10011 +4420 ns : 13 + 6 + 0 = 19 => carry = 0 sum = 10011 +4460 ns : 14 + 6 + 1 = 21 => carry = 0 sum = 10101 +4500 ns : 15 + 6 + 0 = 21 => carry = 0 sum = 10101 +4540 ns : 0 + 7 + 1 = 8 => carry = 0 sum = 01000 +4580 ns : 1 + 7 + 0 = 8 => carry = 0 sum = 01000 +4620 ns : 2 + 7 + 1 = 10 => carry = 0 sum = 01010 +4660 ns : 3 + 7 + 0 = 10 => carry = 0 sum = 01010 +4700 ns : 4 + 7 + 1 = 12 => carry = 0 sum = 01100 +4740 ns : 5 + 7 + 0 = 12 => carry = 0 sum = 01100 +4780 ns : 6 + 7 + 1 = 14 => carry = 0 sum = 01110 +4820 ns : 7 + 7 + 0 = 14 => carry = 0 sum = 01110 +4860 ns : 8 + 7 + 1 = 16 => carry = 0 sum = 10000 +4900 ns : 9 + 7 + 0 = 16 => carry = 0 sum = 10000 +4940 ns : 10 + 7 + 1 = 18 => carry = 0 sum = 10010 +4980 ns : 11 + 7 + 0 = 18 => carry = 0 sum = 10010 +5020 ns : 12 + 7 + 1 = 20 => carry = 0 sum = 10100 +5060 ns : 13 + 7 + 0 = 20 => carry = 0 sum = 10100 +5100 ns : 14 + 7 + 1 = 22 => carry = 0 sum = 10110 +5140 ns : 15 + 7 + 0 = 22 => carry = 0 sum = 10110 +5180 ns : 0 + 8 + 1 = 9 => carry = 0 sum = 01001 +5220 ns : 1 + 8 + 0 = 9 => carry = 0 sum = 01001 +5260 ns : 2 + 8 + 1 = 11 => carry = 0 sum = 01011 +5300 ns : 3 + 8 + 0 = 11 => carry = 0 sum = 01011 +5340 ns : 4 + 8 + 1 = 13 => carry = 0 sum = 01101 +5380 ns : 5 + 8 + 0 = 13 => carry = 0 sum = 01101 +5420 ns : 6 + 8 + 1 = 15 => carry = 0 sum = 01111 +5460 ns : 7 + 8 + 0 = 15 => carry = 0 sum = 01111 +5500 ns : 8 + 8 + 1 = 17 => carry = 0 sum = 10001 +5540 ns : 9 + 8 + 0 = 17 => carry = 0 sum = 10001 +5580 ns : 10 + 8 + 1 = 19 => carry = 0 sum = 10011 +5620 ns : 11 + 8 + 0 = 19 => carry = 0 sum = 10011 +5660 ns : 12 + 8 + 1 = 21 => carry = 0 sum = 10101 +5700 ns : 13 + 8 + 0 = 21 => carry = 0 sum = 10101 +5740 ns : 14 + 8 + 1 = 23 => carry = 0 sum = 10111 +5780 ns : 15 + 8 + 0 = 23 => carry = 0 sum = 10111 +5820 ns : 0 + 9 + 1 = 10 => carry = 0 sum = 01010 +5860 ns : 1 + 9 + 0 = 10 => carry = 0 sum = 01010 +5900 ns : 2 + 9 + 1 = 12 => carry = 0 sum = 01100 +5940 ns : 3 + 9 + 0 = 12 => carry = 0 sum = 01100 +5980 ns : 4 + 9 + 1 = 14 => carry = 0 sum = 01110 +6020 ns : 5 + 9 + 0 = 14 => carry = 0 sum = 01110 +6060 ns : 6 + 9 + 1 = 16 => carry = 0 sum = 10000 +6100 ns : 7 + 9 + 0 = 16 => carry = 0 sum = 10000 +6140 ns : 8 + 9 + 1 = 18 => carry = 0 sum = 10010 +6180 ns : 9 + 9 + 0 = 18 => carry = 0 sum = 10010 +6220 ns : 10 + 9 + 1 = 20 => carry = 0 sum = 10100 +6260 ns : 11 + 9 + 0 = 20 => carry = 0 sum = 10100 +6300 ns : 12 + 9 + 1 = 22 => carry = 0 sum = 10110 +6340 ns : 13 + 9 + 0 = 22 => carry = 0 sum = 10110 +6380 ns : 14 + 9 + 1 = 24 => carry = 0 sum = 11000 +6420 ns : 15 + 9 + 0 = 24 => carry = 0 sum = 11000 +6460 ns : 0 + 10 + 1 = 11 => carry = 0 sum = 01011 +6500 ns : 1 + 10 + 0 = 11 => carry = 0 sum = 01011 +6540 ns : 2 + 10 + 1 = 13 => carry = 0 sum = 01101 +6580 ns : 3 + 10 + 0 = 13 => carry = 0 sum = 01101 +6620 ns : 4 + 10 + 1 = 15 => carry = 0 sum = 01111 +6660 ns : 5 + 10 + 0 = 15 => carry = 0 sum = 01111 +6700 ns : 6 + 10 + 1 = 17 => carry = 0 sum = 10001 +6740 ns : 7 + 10 + 0 = 17 => carry = 0 sum = 10001 +6780 ns : 8 + 10 + 1 = 19 => carry = 0 sum = 10011 +6820 ns : 9 + 10 + 0 = 19 => carry = 0 sum = 10011 +6860 ns : 10 + 10 + 1 = 21 => carry = 0 sum = 10101 +6900 ns : 11 + 10 + 0 = 21 => carry = 0 sum = 10101 +6940 ns : 12 + 10 + 1 = 23 => carry = 0 sum = 10111 +6980 ns : 13 + 10 + 0 = 23 => carry = 0 sum = 10111 +7020 ns : 14 + 10 + 1 = 25 => carry = 0 sum = 11001 +7060 ns : 15 + 10 + 0 = 25 => carry = 0 sum = 11001 +7100 ns : 0 + 11 + 1 = 12 => carry = 0 sum = 01100 +7140 ns : 1 + 11 + 0 = 12 => carry = 0 sum = 01100 +7180 ns : 2 + 11 + 1 = 14 => carry = 0 sum = 01110 +7220 ns : 3 + 11 + 0 = 14 => carry = 0 sum = 01110 +7260 ns : 4 + 11 + 1 = 16 => carry = 0 sum = 10000 +7300 ns : 5 + 11 + 0 = 16 => carry = 0 sum = 10000 +7340 ns : 6 + 11 + 1 = 18 => carry = 0 sum = 10010 +7380 ns : 7 + 11 + 0 = 18 => carry = 0 sum = 10010 +7420 ns : 8 + 11 + 1 = 20 => carry = 0 sum = 10100 +7460 ns : 9 + 11 + 0 = 20 => carry = 0 sum = 10100 +7500 ns : 10 + 11 + 1 = 22 => carry = 0 sum = 10110 +7540 ns : 11 + 11 + 0 = 22 => carry = 0 sum = 10110 +7580 ns : 12 + 11 + 1 = 24 => carry = 0 sum = 11000 +7620 ns : 13 + 11 + 0 = 24 => carry = 0 sum = 11000 +7660 ns : 14 + 11 + 1 = 26 => carry = 0 sum = 11010 +7700 ns : 15 + 11 + 0 = 26 => carry = 0 sum = 11010 +7740 ns : 0 + 12 + 1 = 13 => carry = 0 sum = 01101 +7780 ns : 1 + 12 + 0 = 13 => carry = 0 sum = 01101 +7820 ns : 2 + 12 + 1 = 15 => carry = 0 sum = 01111 +7860 ns : 3 + 12 + 0 = 15 => carry = 0 sum = 01111 +7900 ns : 4 + 12 + 1 = 17 => carry = 0 sum = 10001 +7940 ns : 5 + 12 + 0 = 17 => carry = 0 sum = 10001 +7980 ns : 6 + 12 + 1 = 19 => carry = 0 sum = 10011 +8020 ns : 7 + 12 + 0 = 19 => carry = 0 sum = 10011 +8060 ns : 8 + 12 + 1 = 21 => carry = 0 sum = 10101 +8100 ns : 9 + 12 + 0 = 21 => carry = 0 sum = 10101 +8140 ns : 10 + 12 + 1 = 23 => carry = 0 sum = 10111 +8180 ns : 11 + 12 + 0 = 23 => carry = 0 sum = 10111 +8220 ns : 12 + 12 + 1 = 25 => carry = 0 sum = 11001 +8260 ns : 13 + 12 + 0 = 25 => carry = 0 sum = 11001 +8300 ns : 14 + 12 + 1 = 27 => carry = 0 sum = 11011 +8340 ns : 15 + 12 + 0 = 27 => carry = 0 sum = 11011 +8380 ns : 0 + 13 + 1 = 14 => carry = 0 sum = 01110 +8420 ns : 1 + 13 + 0 = 14 => carry = 0 sum = 01110 +8460 ns : 2 + 13 + 1 = 16 => carry = 0 sum = 10000 +8500 ns : 3 + 13 + 0 = 16 => carry = 0 sum = 10000 +8540 ns : 4 + 13 + 1 = 18 => carry = 0 sum = 10010 +8580 ns : 5 + 13 + 0 = 18 => carry = 0 sum = 10010 +8620 ns : 6 + 13 + 1 = 20 => carry = 0 sum = 10100 +8660 ns : 7 + 13 + 0 = 20 => carry = 0 sum = 10100 +8700 ns : 8 + 13 + 1 = 22 => carry = 0 sum = 10110 +8740 ns : 9 + 13 + 0 = 22 => carry = 0 sum = 10110 +8780 ns : 10 + 13 + 1 = 24 => carry = 0 sum = 11000 +8820 ns : 11 + 13 + 0 = 24 => carry = 0 sum = 11000 +8860 ns : 12 + 13 + 1 = 26 => carry = 0 sum = 11010 +8900 ns : 13 + 13 + 0 = 26 => carry = 0 sum = 11010 +8940 ns : 14 + 13 + 1 = 28 => carry = 0 sum = 11100 +8980 ns : 15 + 13 + 0 = 28 => carry = 0 sum = 11100 +9020 ns : 0 + 14 + 1 = 15 => carry = 0 sum = 01111 +9060 ns : 1 + 14 + 0 = 15 => carry = 0 sum = 01111 +9100 ns : 2 + 14 + 1 = 17 => carry = 0 sum = 10001 +9140 ns : 3 + 14 + 0 = 17 => carry = 0 sum = 10001 +9180 ns : 4 + 14 + 1 = 19 => carry = 0 sum = 10011 +9220 ns : 5 + 14 + 0 = 19 => carry = 0 sum = 10011 +9260 ns : 6 + 14 + 1 = 21 => carry = 0 sum = 10101 +9300 ns : 7 + 14 + 0 = 21 => carry = 0 sum = 10101 +9340 ns : 8 + 14 + 1 = 23 => carry = 0 sum = 10111 +9380 ns : 9 + 14 + 0 = 23 => carry = 0 sum = 10111 +9420 ns : 10 + 14 + 1 = 25 => carry = 0 sum = 11001 +9460 ns : 11 + 14 + 0 = 25 => carry = 0 sum = 11001 +9500 ns : 12 + 14 + 1 = 27 => carry = 0 sum = 11011 +9540 ns : 13 + 14 + 0 = 27 => carry = 0 sum = 11011 +9580 ns : 14 + 14 + 1 = 29 => carry = 0 sum = 11101 +9620 ns : 15 + 14 + 0 = 29 => carry = 0 sum = 11101 +9660 ns : 0 + 15 + 1 = 16 => carry = 0 sum = 10000 +9700 ns : 1 + 15 + 0 = 16 => carry = 0 sum = 10000 +9740 ns : 2 + 15 + 1 = 18 => carry = 0 sum = 10010 +9780 ns : 3 + 15 + 0 = 18 => carry = 0 sum = 10010 +9820 ns : 4 + 15 + 1 = 20 => carry = 0 sum = 10100 +9860 ns : 5 + 15 + 0 = 20 => carry = 0 sum = 10100 +9900 ns : 6 + 15 + 1 = 22 => carry = 0 sum = 10110 +9940 ns : 7 + 15 + 0 = 22 => carry = 0 sum = 10110 +9980 ns : 8 + 15 + 1 = 24 => carry = 0 sum = 11000 +10020 ns : 9 + 15 + 0 = 24 => carry = 0 sum = 11000 +10060 ns : 10 + 15 + 1 = 26 => carry = 0 sum = 11010 +10100 ns : 11 + 15 + 0 = 26 => carry = 0 sum = 11010 +10140 ns : 12 + 15 + 1 = 28 => carry = 0 sum = 11100 +10180 ns : 13 + 15 + 0 = 28 => carry = 0 sum = 11100 +10220 ns : 14 + 15 + 1 = 30 => carry = 0 sum = 11110 +10260 ns : 15 + 15 + 0 = 30 => carry = 0 sum = 11110 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/user_guide/param_model/main.cpp b/src/systemc/tests/systemc/misc/user_guide/param_model/main.cpp new file mode 100644 index 000000000..6e74edc79 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/param_model/main.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Main Filename: main.cc */ + /***************************************/ + +#include "param.h" +#include "stim.h" + +int sc_main(int ac, char *av[]) +{ + +// Parameter Settings + + int data_width = 5; + +// Signal Instantiation + + sc_signal reset; + signal_bool_vector a; + signal_bool_vector b; + sc_signal cin; + sc_signal ready; + signal_bool_vector sum; + sc_signal co; + sc_signal done; + +// Clock Instantiation + + sc_clock clk ("Clock", 10, SC_NS, 0.5, 0, SC_NS); + +// Process Instantiation + + param D1 ("D1", clk, reset, a, b, cin, ready, sum, + co, done, data_width); + + stim T1 ("T1", clk, done, reset, a, b, cin, + ready, data_width); + +// Simulation Run Control + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/user_guide/param_model/param.cpp b/src/systemc/tests/systemc/misc/user_guide/param_model/param.cpp new file mode 100644 index 000000000..14bfc64cb --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/param_model/param.cpp @@ -0,0 +1,91 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + param.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Implementation Filename: param.cc */ + /***************************************/ + +#include "param.h" + +void param::entry() +{ + sc_unsigned sum1 (data_width + 1); + sc_unsigned a1 (data_width); + sc_unsigned b1 (data_width); + bool c1; + +// RESET INIT + sum.write(0); + co.write(0); + wait(); + + while(true) { // MAIN LOOP + + // HANDSHAKE + done.write(0); + do { wait(); } while (ready != 1); + + // COMPUTATION + a1 = a.read(); + b1 = b.read(); + c1 = cin.read(); + + sum1 = a1 + b1 + c1; + + // sum.write( sum1.range(data_width-1,0) ); + sc_unsigned tmp( data_width ); + tmp = sum1.range( data_width - 1, 0 ); + sum.write( tmp ); + co.write( sum1[data_width] ); + // wait(); + wait( 2 ); + + cout << sc_time_stamp() << "\t : " + << a1 << " + " + << b1 << " + " + << cin << " = " << sum1 + << "\t => carry = " << co + << " sum = " << sum + << endl; + + // HANDSHAKE + done.write(1); + wait(); + + } + +} diff --git a/src/systemc/tests/systemc/misc/user_guide/param_model/param.h b/src/systemc/tests/systemc/misc/user_guide/param_model/param.h new file mode 100644 index 000000000..979da821e --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/param_model/param.h @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + param.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: param.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( param ) +{ + SC_HAS_PROCESS( param ); + + sc_in_clk clk; + + // Inputs + const sc_signal& reset; + const signal_bool_vector& a; + const signal_bool_vector& b; + const sc_signal& cin; + const sc_signal& ready; + // Outputs + signal_bool_vector& sum; + sc_signal& co; + sc_signal& done; + // Parameters + const int data_width; + + // Constructor + param (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& RESET, + const signal_bool_vector& A, + const signal_bool_vector& B, + const sc_signal& CIN, + const sc_signal& READY, + signal_bool_vector& SUM, + sc_signal& CO, + sc_signal& DONE, + const int DATA_WIDTH = 4) + + : reset (RESET), + a (A), + b (B), + cin (CIN), + ready (READY), + sum (SUM), + co (CO), + done (DONE), + data_width (DATA_WIDTH) + + { + clk(TICK); + SC_CTHREAD( entry, clk.pos() ); + reset_signal_is(reset,false); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/user_guide/param_model/param_model.f b/src/systemc/tests/systemc/misc/user_guide/param_model/param_model.f new file mode 100644 index 000000000..01e637776 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/param_model/param_model.f @@ -0,0 +1,3 @@ +param_model/param.cpp +param_model/stim.cpp +param_model/main.cpp diff --git a/src/systemc/tests/systemc/misc/user_guide/param_model/stim.cpp b/src/systemc/tests/systemc/misc/user_guide/param_model/stim.cpp new file mode 100644 index 000000000..5e1df5558 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/param_model/stim.cpp @@ -0,0 +1,87 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stim.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /*************************************/ + /* Implementation Filename: stim.cc */ + /*************************************/ + +#include "stim.h" + +void stim::entry() +{ + +// VARIABLE INITIALIZATION + sc_unsigned a_tmp(data_width); + sc_unsigned b_tmp(data_width); + bool c_tmp; + int i, j; + +// RESET CYCLE + reset.write(0); + wait(2); + + reset.write(1); + wait(); + cout << sc_time_stamp() << "\t : " + << "RESET off \t...by stim" << endl; + +// STIMULUS GENERATION + c_tmp = 0; + + for (i=0; i<16; i++) { + for (j=0; j<16; j++) { + a_tmp = j; + b_tmp = i; + c_tmp = !c_tmp; + + a.write(a_tmp); + b.write(b_tmp); + cin.write(c_tmp); + + ready.write(1); + // wait(); + do { wait(); } while ( done != 1 ); + + ready.write(0); + // do { wait(); } while (done == 1); + wait(); + } + } + + sc_stop(); + +} diff --git a/src/systemc/tests/systemc/misc/user_guide/param_model/stim.h b/src/systemc/tests/systemc/misc/user_guide/param_model/stim.h new file mode 100644 index 000000000..829a83434 --- /dev/null +++ b/src/systemc/tests/systemc/misc/user_guide/param_model/stim.h @@ -0,0 +1,86 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + stim.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + + /***************************************/ + /* Interface Filename: stim.h */ + /***************************************/ + +#include "common.h" + +SC_MODULE( stim ) +{ + SC_HAS_PROCESS( stim ); + + sc_in_clk clk; + + // Inputs + const sc_signal& done; + // Outputs + sc_signal& reset; + signal_bool_vector& a; + signal_bool_vector& b; + sc_signal& cin; + sc_signal& ready; + // Parameters + const int data_width; + + // Constructor + stim (sc_module_name NAME, + sc_clock& TICK, + const sc_signal& DONE, + sc_signal& RESET, + signal_bool_vector& A, + signal_bool_vector& B, + sc_signal& CIN, + sc_signal& READY, + const int DATA_WIDTH = 4) + + : done (DONE), + reset (RESET), + a (A), + b (B), + cin (CIN), + ready (READY), + data_width (DATA_WIDTH) + + { + clk(TICK); + SC_CTHREAD( entry, clk.neg() ); + } + + void entry(); +}; diff --git a/src/systemc/tests/systemc/misc/v1.0/blv/blv.cpp b/src/systemc/tests/systemc/misc/v1.0/blv/blv.cpp new file mode 100644 index 000000000..e2135fbf9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/blv/blv.cpp @@ -0,0 +1,148 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + blv.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//---------------------------------------------------------- +// test the basic functionality of sc_bv<> and sc_lv<> +//---------------------------------------------------------- +#include "systemc.h" +#include +#include "isaac.h" + +QTIsaac<8> rng; + +template +void compare(int W) +{ // functionality verification + sc_bv_base x(W); + T st; + // initialize + for(int i=0; i" << endl; + try{ + for(int i=0; i<1000; i++) + compare >(N); + } + catch(...) + { + cout<<"Test failed due to exception in sc_bv. Seed = "<" << endl; + for(int i=0; i<1000; i++) + compare >(N); + } + catch(...) + { + cout<<"Test failed due to exception in sc_lv. Seed = "< + +verifying sc_lv<2000> diff --git a/src/systemc/tests/systemc/misc/v1.0/blv/isaac.h b/src/systemc/tests/systemc/misc/v1.0/blv/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/blv/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/const.h b/src/systemc/tests/systemc/misc/v1.0/dash0/const.h new file mode 100644 index 000000000..233583047 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/dash0.f b/src/systemc/tests/systemc/misc/v1.0/dash0/dash0.f new file mode 100644 index 000000000..787379cf9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/dash0.f @@ -0,0 +1,4 @@ +dash0/main.cpp +dash0/dist.cpp +dash0/pulse.cpp +dash0/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash0/dist.cpp new file mode 100644 index 000000000..8056060ba --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/dist.cpp @@ -0,0 +1,88 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:51 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:10 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:44 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +// Compute the total and partial distances travelled. +void +dist_mod::get_dist_proc() +{ + wait(); + + double total = 0.0; + double partial = 0.0; + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + // Increment the distances: + total = total + DIST_INCR; + partial = partial + DIST_INCR; + + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + + if (total >= 3 * DIST_INCR) + sc_stop(); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash0/dist.h new file mode 100644 index 000000000..9eb449ad7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/dist.h @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_mod ) +{ + // Ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + + // Compute the total and partial distances travelled. + void get_dist_proc(); + + SC_CTOR( dist_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + } + +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/golden/dash0.log b/src/systemc/tests/systemc/misc/v1.0/dash0/golden/dash0.log new file mode 100644 index 000000000..e3c2c7c53 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/golden/dash0.log @@ -0,0 +1,191 @@ +SystemC Simulation +Current speed displayed = 79.2 km/h @ 100 ns +Current speedometer angle = 164.492 degrees @ 100 ns +Current speed displayed = 118.8 km/h @ 200 ns +Current speedometer angle = 246.738 degrees @ 200 ns +Current speed displayed = 118.8 km/h @ 300 ns +Current speedometer angle = 246.738 degrees @ 300 ns +Current speed displayed = 118.8 km/h @ 400 ns +Current speedometer angle = 246.738 degrees @ 400 ns +Current speed displayed = 118.8 km/h @ 500 ns +Current speedometer angle = 246.738 degrees @ 500 ns +Current speed displayed = 118.8 km/h @ 600 ns +Current speedometer angle = 246.738 degrees @ 600 ns +Current speed displayed = 118.8 km/h @ 700 ns +Current speedometer angle = 246.738 degrees @ 700 ns +Current speed displayed = 118.8 km/h @ 800 ns +Current speedometer angle = 246.738 degrees @ 800 ns +Current speed displayed = 118.8 km/h @ 900 ns +Current speedometer angle = 246.738 degrees @ 900 ns +Current speed displayed = 118.8 km/h @ 1 us +Current speedometer angle = 246.738 degrees @ 1 us +Current speed displayed = 118.8 km/h @ 1100 ns +Current speedometer angle = 246.738 degrees @ 1100 ns +Current speed displayed = 118.8 km/h @ 1200 ns +Current speedometer angle = 246.738 degrees @ 1200 ns +Current speed displayed = 118.8 km/h @ 1300 ns +Current speedometer angle = 246.738 degrees @ 1300 ns +Current speed displayed = 118.8 km/h @ 1400 ns +Current speedometer angle = 246.738 degrees @ 1400 ns +Current speed displayed = 118.8 km/h @ 1500 ns +Current speedometer angle = 246.738 degrees @ 1500 ns +Current speed displayed = 118.8 km/h @ 1600 ns +Current speedometer angle = 246.738 degrees @ 1600 ns +Current speed displayed = 118.8 km/h @ 1700 ns +Current speedometer angle = 246.738 degrees @ 1700 ns +Current speed displayed = 118.8 km/h @ 1800 ns +Current speedometer angle = 246.738 degrees @ 1800 ns +Current speed displayed = 118.8 km/h @ 1900 ns +Current speedometer angle = 246.738 degrees @ 1900 ns +Current speed displayed = 118.8 km/h @ 2 us +Current speedometer angle = 246.738 degrees @ 2 us +Current speed displayed = 118.8 km/h @ 2100 ns +Current speedometer angle = 246.738 degrees @ 2100 ns +Current speed displayed = 118.8 km/h @ 2200 ns +Current speedometer angle = 246.738 degrees @ 2200 ns +Current speed displayed = 118.8 km/h @ 2300 ns +Current speedometer angle = 246.738 degrees @ 2300 ns +Current speed displayed = 118.8 km/h @ 2400 ns +Current speedometer angle = 246.738 degrees @ 2400 ns +Current speed displayed = 118.8 km/h @ 2500 ns +Current speedometer angle = 246.738 degrees @ 2500 ns +Current speed displayed = 118.8 km/h @ 2600 ns +Current speedometer angle = 246.738 degrees @ 2600 ns +Current speed displayed = 118.8 km/h @ 2700 ns +Current speedometer angle = 246.738 degrees @ 2700 ns +Current speed displayed = 118.8 km/h @ 2800 ns +Current speedometer angle = 246.738 degrees @ 2800 ns +Current speed displayed = 118.8 km/h @ 2900 ns +Current speedometer angle = 246.738 degrees @ 2900 ns +Current speed displayed = 118.8 km/h @ 3 us +Current speedometer angle = 246.738 degrees @ 3 us +Current total distance displayed = 0.01 km @ 3050 ns +Current partial distance displayed = 0.01 km @ 3050 ns +Current speed displayed = 118.8 km/h @ 3100 ns +Current speedometer angle = 246.738 degrees @ 3100 ns +Current speed displayed = 118.8 km/h @ 3200 ns +Current speedometer angle = 246.738 degrees @ 3200 ns +Current speed displayed = 118.8 km/h @ 3300 ns +Current speedometer angle = 246.738 degrees @ 3300 ns +Current speed displayed = 118.8 km/h @ 3400 ns +Current speedometer angle = 246.738 degrees @ 3400 ns +Current speed displayed = 118.8 km/h @ 3500 ns +Current speedometer angle = 246.738 degrees @ 3500 ns +Current speed displayed = 118.8 km/h @ 3600 ns +Current speedometer angle = 246.738 degrees @ 3600 ns +Current speed displayed = 118.8 km/h @ 3700 ns +Current speedometer angle = 246.738 degrees @ 3700 ns +Current speed displayed = 118.8 km/h @ 3800 ns +Current speedometer angle = 246.738 degrees @ 3800 ns +Current speed displayed = 118.8 km/h @ 3900 ns +Current speedometer angle = 246.738 degrees @ 3900 ns +Current speed displayed = 118.8 km/h @ 4 us +Current speedometer angle = 246.738 degrees @ 4 us +Current speed displayed = 118.8 km/h @ 4100 ns +Current speedometer angle = 246.738 degrees @ 4100 ns +Current speed displayed = 118.8 km/h @ 4200 ns +Current speedometer angle = 246.738 degrees @ 4200 ns +Current speed displayed = 118.8 km/h @ 4300 ns +Current speedometer angle = 246.738 degrees @ 4300 ns +Current speed displayed = 118.8 km/h @ 4400 ns +Current speedometer angle = 246.738 degrees @ 4400 ns +Current speed displayed = 118.8 km/h @ 4500 ns +Current speedometer angle = 246.738 degrees @ 4500 ns +Current speed displayed = 118.8 km/h @ 4600 ns +Current speedometer angle = 246.738 degrees @ 4600 ns +Current speed displayed = 118.8 km/h @ 4700 ns +Current speedometer angle = 246.738 degrees @ 4700 ns +Current speed displayed = 118.8 km/h @ 4800 ns +Current speedometer angle = 246.738 degrees @ 4800 ns +Current speed displayed = 118.8 km/h @ 4900 ns +Current speedometer angle = 246.738 degrees @ 4900 ns +Current speed displayed = 118.8 km/h @ 5 us +Current speedometer angle = 246.738 degrees @ 5 us +Current speed displayed = 118.8 km/h @ 5100 ns +Current speedometer angle = 246.738 degrees @ 5100 ns +Current speed displayed = 118.8 km/h @ 5200 ns +Current speedometer angle = 246.738 degrees @ 5200 ns +Current speed displayed = 118.8 km/h @ 5300 ns +Current speedometer angle = 246.738 degrees @ 5300 ns +Current speed displayed = 118.8 km/h @ 5400 ns +Current speedometer angle = 246.738 degrees @ 5400 ns +Current speed displayed = 118.8 km/h @ 5500 ns +Current speedometer angle = 246.738 degrees @ 5500 ns +Current speed displayed = 118.8 km/h @ 5600 ns +Current speedometer angle = 246.738 degrees @ 5600 ns +Current speed displayed = 118.8 km/h @ 5700 ns +Current speedometer angle = 246.738 degrees @ 5700 ns +Current speed displayed = 118.8 km/h @ 5800 ns +Current speedometer angle = 246.738 degrees @ 5800 ns +Current speed displayed = 118.8 km/h @ 5900 ns +Current speedometer angle = 246.738 degrees @ 5900 ns +Current speed displayed = 118.8 km/h @ 6 us +Current speedometer angle = 246.738 degrees @ 6 us +Current speed displayed = 118.8 km/h @ 6100 ns +Current speedometer angle = 246.738 degrees @ 6100 ns +Current total distance displayed = 0.02 km @ 6100 ns +Current partial distance displayed = 0.02 km @ 6100 ns +Current speed displayed = 118.8 km/h @ 6200 ns +Current speedometer angle = 246.738 degrees @ 6200 ns +Current speed displayed = 118.8 km/h @ 6300 ns +Current speedometer angle = 246.738 degrees @ 6300 ns +Current speed displayed = 118.8 km/h @ 6400 ns +Current speedometer angle = 246.738 degrees @ 6400 ns +Current speed displayed = 118.8 km/h @ 6500 ns +Current speedometer angle = 246.738 degrees @ 6500 ns +Current speed displayed = 118.8 km/h @ 6600 ns +Current speedometer angle = 246.738 degrees @ 6600 ns +Current speed displayed = 118.8 km/h @ 6700 ns +Current speedometer angle = 246.738 degrees @ 6700 ns +Current speed displayed = 118.8 km/h @ 6800 ns +Current speedometer angle = 246.738 degrees @ 6800 ns +Current speed displayed = 118.8 km/h @ 6900 ns +Current speedometer angle = 246.738 degrees @ 6900 ns +Current speed displayed = 118.8 km/h @ 7 us +Current speedometer angle = 246.738 degrees @ 7 us +Current speed displayed = 118.8 km/h @ 7100 ns +Current speedometer angle = 246.738 degrees @ 7100 ns +Current speed displayed = 118.8 km/h @ 7200 ns +Current speedometer angle = 246.738 degrees @ 7200 ns +Current speed displayed = 118.8 km/h @ 7300 ns +Current speedometer angle = 246.738 degrees @ 7300 ns +Current speed displayed = 118.8 km/h @ 7400 ns +Current speedometer angle = 246.738 degrees @ 7400 ns +Current speed displayed = 118.8 km/h @ 7500 ns +Current speedometer angle = 246.738 degrees @ 7500 ns +Current speed displayed = 118.8 km/h @ 7600 ns +Current speedometer angle = 246.738 degrees @ 7600 ns +Current speed displayed = 118.8 km/h @ 7700 ns +Current speedometer angle = 246.738 degrees @ 7700 ns +Current speed displayed = 118.8 km/h @ 7800 ns +Current speedometer angle = 246.738 degrees @ 7800 ns +Current speed displayed = 118.8 km/h @ 7900 ns +Current speedometer angle = 246.738 degrees @ 7900 ns +Current speed displayed = 118.8 km/h @ 8 us +Current speedometer angle = 246.738 degrees @ 8 us +Current speed displayed = 118.8 km/h @ 8100 ns +Current speedometer angle = 246.738 degrees @ 8100 ns +Current speed displayed = 118.8 km/h @ 8200 ns +Current speedometer angle = 246.738 degrees @ 8200 ns +Current speed displayed = 118.8 km/h @ 8300 ns +Current speedometer angle = 246.738 degrees @ 8300 ns +Current speed displayed = 118.8 km/h @ 8400 ns +Current speedometer angle = 246.738 degrees @ 8400 ns +Current speed displayed = 118.8 km/h @ 8500 ns +Current speedometer angle = 246.738 degrees @ 8500 ns +Current speed displayed = 118.8 km/h @ 8600 ns +Current speedometer angle = 246.738 degrees @ 8600 ns +Current speed displayed = 118.8 km/h @ 8700 ns +Current speedometer angle = 246.738 degrees @ 8700 ns +Current speed displayed = 118.8 km/h @ 8800 ns +Current speedometer angle = 246.738 degrees @ 8800 ns +Current speed displayed = 118.8 km/h @ 8900 ns +Current speedometer angle = 246.738 degrees @ 8900 ns +Current speed displayed = 118.8 km/h @ 9 us +Current speedometer angle = 246.738 degrees @ 9 us +Current speed displayed = 118.8 km/h @ 9100 ns +Current speedometer angle = 246.738 degrees @ 9100 ns +Current total distance displayed = 0.03 km @ 9150 ns +Current partial distance displayed = 0.03 km @ 9150 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash0/main.cpp new file mode 100644 index 000000000..f31ae8c8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/main.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), a clock, and the pulse generator. The + pulses are generated by the sensors placed around one of the wheel + shafts. The rate of pulse generation is determined by the speed of + the car, which is constant at 120 km/h. The clock represents the + real time. The signals in this program are traced. The simulation + is stopped by the odometers module. + + purpose -- no environment module; multiple modules at one level; + single processes within each module; input, output and clock + ports; internal and external signals; asynchronous function and + thread processes; one clock; tracing. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:19 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:51 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:10 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:44 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Clocks. + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, speed_pulses); + + dist_mod odometers("odometers"); + odometers(dist_pulses); + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash0/pulse.cpp new file mode 100644 index 000000000..db885b1e0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/pulse.cpp @@ -0,0 +1,102 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:51 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:10 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:44 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + wait(); + + speed_pulse = false; + dist_pulse = false; + int speed = 120; + + while (true) { + +#ifdef DEBUG + cout << "Pulses were generated @ " << sc_time_stamp() << endl; +#endif + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash0/pulse.h new file mode 100644 index 000000000..d11f80185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/pulse.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_THREAD( gen_pulse_proc ); + sensitive << clk; + } + +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash0/speed.cpp new file mode 100644 index 000000000..012a8428e --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/speed.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:52 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:10 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:44 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + elapsed_time = elapsed_time + 1; +} + +// Compute speed. +void +speed_mod::read_speed_proc() +{ + wait(); + + double speed = 0.0; + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + + // Reset timer. + elapsed_time = 0; + + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + cout << "Current speedometer angle = " + << speed * MAX_ANGLE / MAX_SPEED + << " degrees @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash0/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash0/speed.h new file mode 100644 index 000000000..821b36c25 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash0/speed.h @@ -0,0 +1,71 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_mod ) +{ + // Ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in pulse; // Pulse coming from the pulse generator. + + // Internal signals: + sc_signal elapsed_time; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + // Compute speed. + void read_speed_proc(); + + SC_CTOR( speed_mod ) + { + // Initialize time. + elapsed_time = 0; + + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + } + +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/const.h b/src/systemc/tests/systemc/misc/v1.0/dash1/const.h new file mode 100644 index 000000000..9bc1ed3bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/dash1.f b/src/systemc/tests/systemc/misc/v1.0/dash1/dash1.f new file mode 100644 index 000000000..42e7f867e --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/dash1.f @@ -0,0 +1,5 @@ +dash1/driver.cpp +dash1/dist.cpp +dash1/main.cpp +dash1/pulse.cpp +dash1/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash1/dist.cpp new file mode 100644 index 000000000..3bd6062bd --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/dist.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:12 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +bool dist_mod::prev_reset; + +// Compute the total and partial distances travelled. +void +dist_mod::get_dist_proc() +{ + wait(); + + double tmp_total = 0; + double tmp_partial = 0; + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + if (start) { + + // Increment the distances: + tmp_total += DIST_INCR; + + // This is to simulate reset.event(): + if (prev_reset != (bool) reset) + tmp_partial = 0.0; // If reset.event(), reset the partial distance. + else + tmp_partial += DIST_INCR; + + prev_reset = reset; + + } + else { + prev_reset = false; + tmp_total = 0.0; + tmp_partial = 0.0; + } + + total = tmp_total; + partial = tmp_partial; + + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash1/dist.h new file mode 100644 index 000000000..8ccdc790f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/dist.h @@ -0,0 +1,68 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_mod ) +{ + // Input ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // Internal variables: + static bool prev_reset; + + // Compute the total and partial distances travelled. + void get_dist_proc(); + + SC_CTOR( dist_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + + prev_reset = false; + } + +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/driver.cpp b/src/systemc/tests/systemc/misc/v1.0/dash1/driver.cpp new file mode 100644 index 000000000..b06573cce --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/driver.cpp @@ -0,0 +1,122 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- Implementation of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: driver.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:52 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:12 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" + +// Driver's output actions. +void +driver_mod::driver_out_proc() +{ + wait(); + + cout << "Driver is up @ " << sc_time_stamp() << endl; + + // Car is at rest. + reset = false; + start = false; + speed_set = 0; + wait(); + + cout << "Driver started the car @ " << sc_time_stamp() << endl; + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + start = true; + speed_set = 40; + wait(); + + cout << "Driver set the speed to 120 km/h @ " << sc_time_stamp() << endl; + speed_set = 120; + wait(); + + cout << "Driver reset the partial distance odometer @ " + << sc_time_stamp() << endl; + cout << "Driver set the speed to 60 km/h @ " << sc_time_stamp() << endl; + reset = true; + speed_set = 60; + wait(); + + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + speed_set = 40; + wait(); + + cout << "Driver stopped the car @ " << sc_time_stamp() << endl; + sc_stop(); +} + +// Driver's input actions. +void +driver_mod::driver_in_proc() +{ + if (speed.event()) { + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + } + + if (angle.event()) { + cout << "Current speedometer angle = " << angle + << " degrees @ " << sc_time_stamp() << endl; + } + + if (total.event()) { + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + } + + if (partial.event()) { + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/driver.h b/src/systemc/tests/systemc/misc/v1.0/dash1/driver.h new file mode 100644 index 000000000..f12767fb4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/driver.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- Definition of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DRIVER_H +#define DRIVER_H + +SC_MODULE( driver_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock for the actions of the driver. + sc_in speed; + sc_in angle; + sc_in total; + sc_in partial; + + // Output ports: + sc_out reset; // Set if the driver wants to reset the partial + // distance odometer. + sc_out speed_set; // Speed of the car as set by the driver. + sc_out start; // Set if the driver starts the car. + + // Driver's actions. + void driver_out_proc(); + void driver_in_proc(); + + SC_CTOR( driver_mod ) + { + SC_THREAD( driver_out_proc ); + sensitive << clk.pos(); + + SC_METHOD( driver_in_proc ); + sensitive << speed << angle << total << partial; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/golden/dash1.log b/src/systemc/tests/systemc/misc/v1.0/dash1/golden/dash1.log new file mode 100644 index 000000000..a84ae19b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/golden/dash1.log @@ -0,0 +1,37 @@ +SystemC Simulation +Driver is up @ 0 s +Driver started the car @ 10 us +Driver set the speed to 40 km/h @ 10 us +Current speed displayed = 39.6 km/h @ 10300 ns +Current speedometer angle = 82.2462 degrees @ 10300 ns +Current total distance displayed = 0.01 km @ 19150 ns +Current partial distance displayed = 0.01 km @ 19150 ns +Driver set the speed to 120 km/h @ 20 us +Current speed displayed = 59.4 km/h @ 20075 ns +Current speedometer angle = 123.369 degrees @ 20075 ns +Current speed displayed = 118.8 km/h @ 20175 ns +Current speedometer angle = 246.738 degrees @ 20175 ns +Current total distance displayed = 0.02 km @ 22775 ns +Current partial distance displayed = 0.02 km @ 22775 ns +Current total distance displayed = 0.03 km @ 25825 ns +Current partial distance displayed = 0.03 km @ 25825 ns +Current total distance displayed = 0.04 km @ 28875 ns +Current partial distance displayed = 0.04 km @ 28875 ns +Driver reset the partial distance odometer @ 30 us +Driver set the speed to 60 km/h @ 30 us +Current speed displayed = 79.2 km/h @ 30150 ns +Current speedometer angle = 164.492 degrees @ 30150 ns +Current speed displayed = 59.4 km/h @ 30350 ns +Current speedometer angle = 123.369 degrees @ 30350 ns +Current total distance displayed = 0.05 km @ 33850 ns +Current partial distance displayed = 0 km @ 33850 ns +Current total distance displayed = 0.06 km @ 39950 ns +Current partial distance displayed = 0.01 km @ 39950 ns +Driver set the speed to 40 km/h @ 40 us +Current speed displayed = 39.6 km/h @ 40225 ns +Current speedometer angle = 82.2462 degrees @ 40225 ns +Current total distance displayed = 0.07 km @ 49075 ns +Current partial distance displayed = 0.02 km @ 49075 ns +Driver stopped the car @ 50 us + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash1/main.cpp new file mode 100644 index 000000000..225ee80a7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/main.cpp @@ -0,0 +1,141 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), the driver of the car, clocks, and the + pulse generator. The pulses are generated by the sensors placed + around one of the wheel shafts. The rate of pulse generation is + determined by the speed of the car. The driver can start the car, + set its speed, reset the partial distance odometer, and stop the + car (which means he will stop the simulation). One of the clocks + is slow and the other is fast. The fast clock represents the real + time. The slow clock is used to control the actions of the + driver. The signals in this program are traced. + + purpose (in terms of changes to dash0's purpose) -- environment + module (driver); multiple clocks. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:20 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:53 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:12 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Signals for the driver's actions. + sc_signal reset("reset"); + sc_signal speed("speed"); + sc_signal start("start"); + + // Signals observed by the driver. + sc_signal disp_speed("disp_speed"); + sc_signal disp_angle("disp_angle"); + sc_signal disp_total_dist("disp_total_dist"); + sc_signal disp_partial_dist("disp_partial_dist"); + + // Clocks. + sc_clock clk0("slow_clk", SLOW_CLOCK_PERIOD0, SC_NS, 0.5, 0.0, SC_NS, true); + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + driver_mod driver("driver"); + driver(clk0, disp_speed, disp_angle, disp_total_dist, disp_partial_dist, + reset, speed, start); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, start, speed, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, start, speed_pulses, disp_speed, disp_angle); + + dist_mod odometers("odometers"); + odometers(dist_pulses, reset, start, disp_total_dist, disp_partial_dist); + + // Initialize signals: + start = false; + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk0, "slow_clk"); + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + sc_trace(tf, reset, "reset"); + sc_trace(tf, start, "start"); + sc_trace(tf, speed, "speed"); + sc_trace(tf, disp_speed, "disp_speed"); + sc_trace(tf, disp_angle, "disp_angle"); + sc_trace(tf, disp_total_dist, "disp_total_dist"); + sc_trace(tf, disp_partial_dist, "disp_partial_dist"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash1/pulse.cpp new file mode 100644 index 000000000..397abccc6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/pulse.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:12 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + wait(); + + speed_pulse = false; + dist_pulse = false; + + // Wait until the car is started. + do { + wait(); + } while (start.read() == false); + + while (true) { + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash1/pulse.h new file mode 100644 index 000000000..1188e2bc3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/pulse.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_in start; // Becomes true if the car's started. + sc_in speed; // Speed of the car set by the driver. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_THREAD( gen_pulse_proc ); + sensitive << clk << start; + } + +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash1/speed.cpp new file mode 100644 index 000000000..44fdd64bc --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/speed.cpp @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:12 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + if (start) + elapsed_time = elapsed_time + 1; + else + elapsed_time = 0; +} + +// Compute speed. +void +speed_mod::read_speed_proc() +{ + wait(); + + double tmp_speed; + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + if (start) { + tmp_speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + speed = tmp_speed; + angle = tmp_speed * MAX_ANGLE / MAX_SPEED; + } + else { + speed = 0.0; + angle = 0.0; + } + + // Reset timer. + elapsed_time = 0; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash1/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash1/speed.h new file mode 100644 index 000000000..47e3ced3c --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash1/speed.h @@ -0,0 +1,75 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Internal signals: + sc_signal elapsed_time; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + // Compute speed. + void read_speed_proc(); + + SC_CTOR( speed_mod ) + { + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + + elapsed_time = 0; + } + +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/const.h b/src/systemc/tests/systemc/misc/v1.0/dash2/const.h new file mode 100644 index 000000000..9bc1ed3bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/dash2.f b/src/systemc/tests/systemc/misc/v1.0/dash2/dash2.f new file mode 100644 index 000000000..04f0b3607 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/dash2.f @@ -0,0 +1,5 @@ +dash2/driver.cpp +dash2/dist.cpp +dash2/main.cpp +dash2/pulse.cpp +dash2/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash2/dist.cpp new file mode 100644 index 000000000..ac090ed87 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/dist.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:14 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +bool dist_mod::prev_reset; + +// Get the pulses for one distance increment. +void +dist_mod::get_dist_proc() +{ + wait(); + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + if (start) + ok_for_incr = (ok_for_incr ? false : true); + else + ok_for_incr = false; + } +} + +// Compute total distance. +void +dist_mod::compute_total_proc() +{ + if (start) + total_dist = total_dist + 1.0; + else + total_dist = 0.0; +} + +// Compute partial distance. +void +dist_mod::compute_partial_proc() +{ + if (start) { + + // Implement reset.event(): + if (prev_reset != (bool) reset) + partial_dist = 0.0; + else + partial_dist = partial_dist + 1.0; + + prev_reset = reset; + + } + else + partial_dist = 0.0; +} + +// LCD display driver. +void +dist_mod::lcd_driver_proc() +{ + if (start) { + + if (total_dist.event()) + total = total_dist * DIST_INCR; + + if (partial_dist.event()) + partial = partial_dist * DIST_INCR; + + } + else { + total = 0.0; + partial = 0.0; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash2/dist.h new file mode 100644 index 000000000..e34e9a923 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/dist.h @@ -0,0 +1,91 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_mod ) +{ + // Ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // Internal signals: + sc_signal ok_for_incr; + sc_signal total_dist; + sc_signal partial_dist; + + // Internal variables: + static bool prev_reset; + + // Get the pulses for one distance increment. + void get_dist_proc(); + + // Compute total and partial distances. + void compute_total_proc(); + void compute_partial_proc(); + + // LCD display driver. + void lcd_driver_proc(); + + SC_CTOR( dist_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + + SC_METHOD( compute_total_proc ); + sensitive << ok_for_incr; + + SC_METHOD( compute_partial_proc ); + sensitive << ok_for_incr; + + SC_METHOD( lcd_driver_proc ); + sensitive << total_dist << partial_dist; + + ok_for_incr = false; + total_dist = 0.0; + partial_dist = 0.0; + } + +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/driver.cpp b/src/systemc/tests/systemc/misc/v1.0/dash2/driver.cpp new file mode 100644 index 000000000..ed3ba8455 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/driver.cpp @@ -0,0 +1,122 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- Implementation of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: driver.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:53 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:14 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" + +// Driver's output actions. +void +driver_mod::driver_out_proc() +{ + wait(); + + cout << "Driver is up @ " << sc_time_stamp() << endl; + + // Car is at rest. + speed_set = 0; + reset = false; + start = false; + wait(); + + cout << "Driver started the car @ " << sc_time_stamp() << endl; + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + start = true; + speed_set = 40; + wait(); + + cout << "Driver set the speed to 120 km/h @ " << sc_time_stamp() << endl; + speed_set = 120; + wait(); + + cout << "Driver reset the partial distance odometer @ " + << sc_time_stamp() << endl; + cout << "Driver set the speed to 60 km/h @ " << sc_time_stamp() << endl; + reset = true; + speed_set = 60; + wait(); + + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + speed_set = 40; + wait(); + + cout << "Driver stopped the car @ " << sc_time_stamp() << endl; + sc_stop(); +} + +// Driver's input actions. +void +driver_mod::driver_in_proc() +{ + if (speed.event()) { + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + } + + if (angle.event()) { + cout << "Current speedometer angle = " << angle + << " degrees @ " << sc_time_stamp() << endl; + } + + if (total.event()) { + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + } + + if (partial.event()) { + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/driver.h b/src/systemc/tests/systemc/misc/v1.0/dash2/driver.h new file mode 100644 index 000000000..f12767fb4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/driver.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- Definition of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DRIVER_H +#define DRIVER_H + +SC_MODULE( driver_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock for the actions of the driver. + sc_in speed; + sc_in angle; + sc_in total; + sc_in partial; + + // Output ports: + sc_out reset; // Set if the driver wants to reset the partial + // distance odometer. + sc_out speed_set; // Speed of the car as set by the driver. + sc_out start; // Set if the driver starts the car. + + // Driver's actions. + void driver_out_proc(); + void driver_in_proc(); + + SC_CTOR( driver_mod ) + { + SC_THREAD( driver_out_proc ); + sensitive << clk.pos(); + + SC_METHOD( driver_in_proc ); + sensitive << speed << angle << total << partial; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/golden/dash2.log b/src/systemc/tests/systemc/misc/v1.0/dash2/golden/dash2.log new file mode 100644 index 000000000..a84ae19b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/golden/dash2.log @@ -0,0 +1,37 @@ +SystemC Simulation +Driver is up @ 0 s +Driver started the car @ 10 us +Driver set the speed to 40 km/h @ 10 us +Current speed displayed = 39.6 km/h @ 10300 ns +Current speedometer angle = 82.2462 degrees @ 10300 ns +Current total distance displayed = 0.01 km @ 19150 ns +Current partial distance displayed = 0.01 km @ 19150 ns +Driver set the speed to 120 km/h @ 20 us +Current speed displayed = 59.4 km/h @ 20075 ns +Current speedometer angle = 123.369 degrees @ 20075 ns +Current speed displayed = 118.8 km/h @ 20175 ns +Current speedometer angle = 246.738 degrees @ 20175 ns +Current total distance displayed = 0.02 km @ 22775 ns +Current partial distance displayed = 0.02 km @ 22775 ns +Current total distance displayed = 0.03 km @ 25825 ns +Current partial distance displayed = 0.03 km @ 25825 ns +Current total distance displayed = 0.04 km @ 28875 ns +Current partial distance displayed = 0.04 km @ 28875 ns +Driver reset the partial distance odometer @ 30 us +Driver set the speed to 60 km/h @ 30 us +Current speed displayed = 79.2 km/h @ 30150 ns +Current speedometer angle = 164.492 degrees @ 30150 ns +Current speed displayed = 59.4 km/h @ 30350 ns +Current speedometer angle = 123.369 degrees @ 30350 ns +Current total distance displayed = 0.05 km @ 33850 ns +Current partial distance displayed = 0 km @ 33850 ns +Current total distance displayed = 0.06 km @ 39950 ns +Current partial distance displayed = 0.01 km @ 39950 ns +Driver set the speed to 40 km/h @ 40 us +Current speed displayed = 39.6 km/h @ 40225 ns +Current speedometer angle = 82.2462 degrees @ 40225 ns +Current total distance displayed = 0.07 km @ 49075 ns +Current partial distance displayed = 0.02 km @ 49075 ns +Driver stopped the car @ 50 us + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash2/main.cpp new file mode 100644 index 000000000..4c5e17742 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/main.cpp @@ -0,0 +1,151 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), the driver of the car, clocks, and the + pulse generator. The pulses are generated by the sensors placed + around one of the wheel shafts. The rate of pulse generation is + determined by the speed of the car. The driver can start the car, + set its speed, reset the partial distance odometer, and stop the + car (which means he will stop the simulation). One of the clocks + is slow and the other is fast. The fast clock represents the real + time. The slow clock is used to control the actions of the + driver. The signals in this program are traced. + + purpose (in terms of changes to dash1's purpose) -- multiple + processes inside single modules. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:20 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:54 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:14 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Signals for the driver's actions. + sc_signal reset("reset"); + sc_signal speed("speed"); + sc_signal start("start"); + + // Signals observed by the driver. + sc_signal disp_speed("disp_speed"); + sc_signal disp_angle("disp_angle"); + sc_signal disp_total_dist("disp_total_dist"); + sc_signal disp_partial_dist("disp_partial_dist"); + + // Clocks. + sc_clock clk0("slow_clk", SLOW_CLOCK_PERIOD0, SC_NS, 0.5, 0.0, SC_NS, true); + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + driver_mod driver("driver"); + driver(clk0, disp_speed, disp_angle, disp_total_dist, disp_partial_dist, + reset, speed, start); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, start, speed, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, start, speed_pulses, disp_speed, disp_angle); + + dist_mod odometers("odometers"); + odometers(dist_pulses, reset, start, disp_total_dist, disp_partial_dist); + + // Initialize signals: + start = false; + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk0, "slow_clk"); + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + sc_trace(tf, reset, "reset"); + sc_trace(tf, start, "start"); + sc_trace(tf, speed, "speed"); + sc_trace(tf, disp_speed, "disp_speed"); + sc_trace(tf, disp_angle, "disp_angle"); + sc_trace(tf, disp_total_dist, "disp_total_dist"); + sc_trace(tf, disp_partial_dist, "disp_partial_dist"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + sc_trace(tf, speedometer.raw_speed, "raw_speed"); + sc_trace(tf, speedometer.filtered_speed, "filtered_speed"); + sc_trace(tf, odometers.ok_for_incr, "ok_for_incr"); + sc_trace(tf, odometers.total_dist, "total_dist"); + sc_trace(tf, odometers.partial_dist, "partial_dist"); + + disp_speed = 0.0; + disp_angle = 0.0; + disp_total_dist = 0.0; + disp_partial_dist = 0.0; + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash2/pulse.cpp new file mode 100644 index 000000000..4a2c87009 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/pulse.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:14 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + wait(); + + speed_pulse = false; + dist_pulse = false; + + // Wait until the car is started. + do { + wait(); + } while (start.read() == false); + + while (true) { + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash2/pulse.h new file mode 100644 index 000000000..1188e2bc3 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/pulse.h @@ -0,0 +1,65 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_in start; // Becomes true if the car's started. + sc_in speed; // Speed of the car set by the driver. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_THREAD( gen_pulse_proc ); + sensitive << clk << start; + } + +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash2/speed.cpp new file mode 100644 index 000000000..1f592886f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/speed.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:14 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + if (start) + elapsed_time = elapsed_time + 1; + else + elapsed_time = 0; +} + +// Compute speed. +void +speed_mod::read_speed_proc() +{ + wait(); + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + if (start) + raw_speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + else + raw_speed = 0.0; + + // Reset timer. + elapsed_time = 0; + } +} + +// Filter speed. +void +speed_mod::filter_speed_proc() +{ + if (start) + filtered_speed = raw_speed; + else + filtered_speed = 0.0; +} + +// Compute needle angle and drive the speedometer. +void +speed_mod::pwm_driver_proc() +{ + if (start) { + speed = filtered_speed * 1.0; + angle = filtered_speed * MAX_ANGLE / MAX_SPEED; + } + else { + speed = 0.0; + angle = 0.0; + } +} + + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash2/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash2/speed.h new file mode 100644 index 000000000..db9ac2262 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash2/speed.h @@ -0,0 +1,91 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Internal signals: + sc_signal elapsed_time; + sc_signal raw_speed; + sc_signal filtered_speed; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + // Compute speed. + void read_speed_proc(); + + // Filter speed. + void filter_speed_proc(); + + // Compute needle angle and drive the speedometer. + void pwm_driver_proc(); + + SC_CTOR( speed_mod ) + { + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + + SC_METHOD( filter_speed_proc ); + sensitive << raw_speed; + + SC_METHOD( pwm_driver_proc ); + sensitive << filtered_speed; + + elapsed_time = 0; + raw_speed = 0.0; + filtered_speed = 0.0; + } + +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/const.h b/src/systemc/tests/systemc/misc/v1.0/dash3/const.h new file mode 100644 index 000000000..9bc1ed3bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/dash3.f b/src/systemc/tests/systemc/misc/v1.0/dash3/dash3.f new file mode 100644 index 000000000..103c584fa --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/dash3.f @@ -0,0 +1,5 @@ +dash3/driver.cpp +dash3/dist.cpp +dash3/main.cpp +dash3/pulse.cpp +dash3/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash3/dist.cpp new file mode 100644 index 000000000..2734277f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/dist.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:19 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +bool dist_compute_mod::prev_reset; +double dist_compute_mod::total_compute_dist; +double dist_compute_mod::partial_compute_dist; + +// Get the pulses for one distance increment. +void +dist_read_mod::get_dist_proc() +{ + wait(); + + bool ok = false; + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + if (start) + ok = !ok; + else + ok = false; + + ok_for_incr = ok; + } +} + +// Compute total distance. +void +dist_compute_mod::compute_total_proc() +{ + if (start) + total_compute_dist += 1.0; + else + total_compute_dist = 0.0; + + total_dist = total_compute_dist; +} + +// Compute partial distance. +void +dist_compute_mod::compute_partial_proc() +{ + if (start) { + + // Implement reset.event(): + if (prev_reset != (bool) reset) + partial_compute_dist = 0.0; + else + partial_compute_dist += 1.0; + + prev_reset = reset; + + } + else + partial_compute_dist = 0.0; + + partial_dist = partial_compute_dist; +} + +// LCD display driver. +void +dist_lcd_mod::lcd_driver_proc() +{ + if (start) { + + if (total_dist.event()) + total = total_dist * DIST_INCR; + + if (partial_dist.event()) + partial = partial_dist * DIST_INCR; + + } + else { + total = 0.0; + partial = 0.0; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash3/dist.h new file mode 100644 index 000000000..9c7cb5761 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/dist.h @@ -0,0 +1,164 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_read_mod ) +{ + // Input ports: + sc_in pulse; // Pulse coming from the pulse generator. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out ok_for_incr; + + // Get the pulses for one distance increment. + void get_dist_proc(); + + SC_CTOR( dist_read_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + } +}; + +SC_MODULE( dist_compute_mod ) +{ + // Input ports: + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + sc_in ok_for_incr; + + // Output ports: + sc_out total_dist; + sc_out partial_dist; + + // Internal variables: + static bool prev_reset; + static double total_compute_dist; + static double partial_compute_dist; + + // Compute total and partial distances. + void compute_total_proc(); + void compute_partial_proc(); + + SC_CTOR( dist_compute_mod ) + { + SC_METHOD( compute_total_proc ); + sensitive << ok_for_incr; + + SC_METHOD( compute_partial_proc ); + sensitive << ok_for_incr; + + prev_reset = false; + total_compute_dist = 0.0; + partial_compute_dist = 0.0; + } +}; + +SC_MODULE( dist_lcd_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in total_dist; + sc_in partial_dist; + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // LCD display driver. + void lcd_driver_proc(); + + SC_CTOR( dist_lcd_mod ) + { + SC_METHOD( lcd_driver_proc ); + sensitive << total_dist << partial_dist; + } +}; + +SC_MODULE( dist_mod ) +{ + // Ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // Internal signals: + sc_signal ok_for_incr; + sc_signal total_dist; + sc_signal partial_dist; + + // Internal models: + dist_read_mod *read_mod; + dist_compute_mod *compute_mod; + dist_lcd_mod *lcd_mod; + + SC_CTOR( dist_mod ) + { + read_mod = new dist_read_mod("read_mod"); + compute_mod = new dist_compute_mod("compute_mod"); + lcd_mod = new dist_lcd_mod("lcd_mod"); + + read_mod->pulse.bind(pulse); + read_mod->start.bind(start); + read_mod->ok_for_incr.bind(ok_for_incr); + + compute_mod->reset.bind(reset); + compute_mod->start.bind(start); + compute_mod->ok_for_incr.bind(ok_for_incr); + compute_mod->total_dist.bind(total_dist); + compute_mod->partial_dist.bind(partial_dist); + + lcd_mod->start.bind(start); + lcd_mod->total_dist.bind(total_dist); + lcd_mod->partial_dist.bind(partial_dist); + lcd_mod->total.bind(total); + lcd_mod->partial.bind(partial); + + ok_for_incr = false; + total_dist = 0.0; + partial_dist = 0.0; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/driver.cpp b/src/systemc/tests/systemc/misc/v1.0/dash3/driver.cpp new file mode 100644 index 000000000..305b32a58 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/driver.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- Implementation of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: driver.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:54 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:19 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" + +// Driver's output actions. +void +driver_mod::driver_out_proc() +{ + wait(); + + // while (true) { + cout << "Driver is up @ " << sc_time_stamp() << endl; + + // Car is at rest. + speed_set = 0; + reset = false; + start = false; + wait(); + + cout << "Driver started the car @ " << sc_time_stamp() << endl; + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + start = true; + speed_set = 40; + wait(); + + cout << "Driver set the speed to 120 km/h @ " << sc_time_stamp() << endl; + speed_set = 120; + wait(); + + cout << "Driver reset the partial distance odometer @ " + << sc_time_stamp() << endl; + cout << "Driver set the speed to 60 km/h @ " << sc_time_stamp() << endl; + reset = true; + speed_set = 60; + wait(); + + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + speed_set = 40; + wait(); + + cout << "Driver stopped the car @ " << sc_time_stamp() << endl; + sc_stop(); + // } +} + +// Driver's input actions. +void +driver_mod::driver_in_proc() +{ + if (speed.event()) { + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + } + + if (angle.event()) { + cout << "Current speedometer angle = " << angle + << " degrees @ " << sc_time_stamp() << endl; + } + + if (total.event()) { + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + } + + if (partial.event()) { + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/driver.h b/src/systemc/tests/systemc/misc/v1.0/dash3/driver.h new file mode 100644 index 000000000..f12767fb4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/driver.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- Definition of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DRIVER_H +#define DRIVER_H + +SC_MODULE( driver_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock for the actions of the driver. + sc_in speed; + sc_in angle; + sc_in total; + sc_in partial; + + // Output ports: + sc_out reset; // Set if the driver wants to reset the partial + // distance odometer. + sc_out speed_set; // Speed of the car as set by the driver. + sc_out start; // Set if the driver starts the car. + + // Driver's actions. + void driver_out_proc(); + void driver_in_proc(); + + SC_CTOR( driver_mod ) + { + SC_THREAD( driver_out_proc ); + sensitive << clk.pos(); + + SC_METHOD( driver_in_proc ); + sensitive << speed << angle << total << partial; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/golden/dash3.log b/src/systemc/tests/systemc/misc/v1.0/dash3/golden/dash3.log new file mode 100644 index 000000000..a84ae19b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/golden/dash3.log @@ -0,0 +1,37 @@ +SystemC Simulation +Driver is up @ 0 s +Driver started the car @ 10 us +Driver set the speed to 40 km/h @ 10 us +Current speed displayed = 39.6 km/h @ 10300 ns +Current speedometer angle = 82.2462 degrees @ 10300 ns +Current total distance displayed = 0.01 km @ 19150 ns +Current partial distance displayed = 0.01 km @ 19150 ns +Driver set the speed to 120 km/h @ 20 us +Current speed displayed = 59.4 km/h @ 20075 ns +Current speedometer angle = 123.369 degrees @ 20075 ns +Current speed displayed = 118.8 km/h @ 20175 ns +Current speedometer angle = 246.738 degrees @ 20175 ns +Current total distance displayed = 0.02 km @ 22775 ns +Current partial distance displayed = 0.02 km @ 22775 ns +Current total distance displayed = 0.03 km @ 25825 ns +Current partial distance displayed = 0.03 km @ 25825 ns +Current total distance displayed = 0.04 km @ 28875 ns +Current partial distance displayed = 0.04 km @ 28875 ns +Driver reset the partial distance odometer @ 30 us +Driver set the speed to 60 km/h @ 30 us +Current speed displayed = 79.2 km/h @ 30150 ns +Current speedometer angle = 164.492 degrees @ 30150 ns +Current speed displayed = 59.4 km/h @ 30350 ns +Current speedometer angle = 123.369 degrees @ 30350 ns +Current total distance displayed = 0.05 km @ 33850 ns +Current partial distance displayed = 0 km @ 33850 ns +Current total distance displayed = 0.06 km @ 39950 ns +Current partial distance displayed = 0.01 km @ 39950 ns +Driver set the speed to 40 km/h @ 40 us +Current speed displayed = 39.6 km/h @ 40225 ns +Current speedometer angle = 82.2462 degrees @ 40225 ns +Current total distance displayed = 0.07 km @ 49075 ns +Current partial distance displayed = 0.02 km @ 49075 ns +Driver stopped the car @ 50 us + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash3/main.cpp new file mode 100644 index 000000000..fba72223d --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/main.cpp @@ -0,0 +1,151 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), the driver of the car, clocks, and the + pulse generator. The pulses are generated by the sensors placed + around one of the wheel shafts. The rate of pulse generation is + determined by the speed of the car. The driver can start the car, + set its speed, reset the partial distance odometer, and stop the + car (which means he will stop the simulation). One of the clocks + is slow and the other is fast. The fast clock represents the real + time. The slow clock is used to control the actions of the + driver. The signals in this program are traced. + + purpose (in terms of changes to dash2's purpose) -- multiple + modules inside single modules. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:20 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:54 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:19 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Signals for the driver's actions. + sc_signal reset("reset"); + sc_signal speed("speed"); + sc_signal start("start"); + + // Signals observed by the driver. + sc_signal disp_speed("disp_speed"); + sc_signal disp_angle("disp_angle"); + sc_signal disp_total_dist("disp_total_dist"); + sc_signal disp_partial_dist("disp_partial_dist"); + + // Clocks. + sc_clock clk0("slow_clk", SLOW_CLOCK_PERIOD0, SC_NS, 0.5, 0.0, SC_NS, true); + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + driver_mod driver("driver"); + driver(clk0, disp_speed, disp_angle, disp_total_dist, disp_partial_dist, + reset, speed, start); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, start, speed, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, start, speed_pulses, disp_speed, disp_angle); + + dist_mod odometers("odometers"); + odometers(dist_pulses, reset, start, disp_total_dist, disp_partial_dist); + + // Initialize signals: + start = false; + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk0, "slow_clk"); + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + sc_trace(tf, reset, "reset"); + sc_trace(tf, start, "start"); + sc_trace(tf, speed, "speed"); + sc_trace(tf, disp_speed, "disp_speed"); + sc_trace(tf, disp_angle, "disp_angle"); + sc_trace(tf, disp_total_dist, "disp_total_dist"); + sc_trace(tf, disp_partial_dist, "disp_partial_dist"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + sc_trace(tf, speedometer.read_mod->raw_speed, "raw_speed"); + sc_trace(tf, speedometer.filtered_speed, "filtered_speed"); + sc_trace(tf, odometers.ok_for_incr, "ok_for_incr"); + sc_trace(tf, odometers.total_dist, "total_dist"); + sc_trace(tf, odometers.partial_dist, "partial_dist"); + + disp_speed = 0.0; + disp_angle = 0.0; + disp_total_dist = 0.0; + disp_partial_dist = 0.0; + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash3/pulse.cpp new file mode 100644 index 000000000..d9f83ce87 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/pulse.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:19 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + wait(); + + speed_pulse = false; + dist_pulse = false; + + // Wait until the car is started. + do { + wait(); + } while (start.read() == false); + + while (true) { + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash3/pulse.h new file mode 100644 index 000000000..17d301bb7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/pulse.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_in start; // Becomes true if the car's started. + sc_in speed; // Speed of the car set by the driver. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_THREAD( gen_pulse_proc ); + sensitive << clk << start; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash3/speed.cpp new file mode 100644 index 000000000..33445c1d0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/speed.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:19 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + if (start) + elapsed_time = elapsed_time + 1; + else + elapsed_time = 0; +} + +// Compute speed. +void +speed_read_mod::read_speed_proc() +{ + wait(); + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + if (start) + raw_speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + else + raw_speed = 0.0; + + // Reset timer. + elapsed_time = 0; + } +} + +// Filter speed. +void +speed_read_mod::filter_speed_proc() +{ + if (start) + filtered_speed = raw_speed * 1.0; // Ambiguous overload w/o 1.0. + else + filtered_speed = 0.0; +} + +// Compute needle angle and drive the speedometer. +void +speed_pwm_mod::pwm_driver_proc() +{ + if (start) { + speed = filtered_speed * 1.0; // Ambiguous overload w/o 1.0. + angle = filtered_speed * MAX_ANGLE / MAX_SPEED; + } + else { + speed = 0.0; + angle = 0.0; + } +} + + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash3/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash3/speed.h new file mode 100644 index 000000000..7e63cda24 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash3/speed.h @@ -0,0 +1,140 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_read_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out filtered_speed; // Filtered speed. + + // Inout ports: + sc_inout elapsed_time; + + // Internal signals: + sc_signal raw_speed; + + // Compute speed. + void read_speed_proc(); + + // Filter speed. + void filter_speed_proc(); + + SC_CTOR( speed_read_mod ) + { + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + + SC_METHOD( filter_speed_proc ); + sensitive << raw_speed; + + raw_speed = 0.0; + } +}; + +SC_MODULE( speed_pwm_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in filtered_speed; + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Compute needle angle and drive the speedometer. + void pwm_driver_proc(); + + SC_CTOR( speed_pwm_mod ) + { + SC_METHOD( pwm_driver_proc ); + sensitive << filtered_speed; + } +}; + +SC_MODULE( speed_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Internal signals: + sc_signal elapsed_time; + sc_signal filtered_speed; + + // Internal models: + speed_read_mod *read_mod; + speed_pwm_mod *pwm_mod; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + SC_CTOR( speed_mod ) + { + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + read_mod = new speed_read_mod("read_mod"); + pwm_mod = new speed_pwm_mod("pwm_mod"); + + read_mod->start.bind(start); + read_mod->pulse.bind(pulse); + read_mod->elapsed_time.bind(elapsed_time); + read_mod->filtered_speed.bind(filtered_speed); + + pwm_mod->start.bind(start); + pwm_mod->filtered_speed.bind(filtered_speed); + pwm_mod->speed.bind(speed); + pwm_mod->angle.bind(angle); + + elapsed_time = 0; + filtered_speed = 0.0; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/const.h b/src/systemc/tests/systemc/misc/v1.0/dash4/const.h new file mode 100644 index 000000000..9bc1ed3bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/dash4.f b/src/systemc/tests/systemc/misc/v1.0/dash4/dash4.f new file mode 100644 index 000000000..f5f312dc5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/dash4.f @@ -0,0 +1,5 @@ +dash4/driver.cpp +dash4/dist.cpp +dash4/main.cpp +dash4/pulse.cpp +dash4/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash4/dist.cpp new file mode 100644 index 000000000..2734277f4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/dist.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:19 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +bool dist_compute_mod::prev_reset; +double dist_compute_mod::total_compute_dist; +double dist_compute_mod::partial_compute_dist; + +// Get the pulses for one distance increment. +void +dist_read_mod::get_dist_proc() +{ + wait(); + + bool ok = false; + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + if (start) + ok = !ok; + else + ok = false; + + ok_for_incr = ok; + } +} + +// Compute total distance. +void +dist_compute_mod::compute_total_proc() +{ + if (start) + total_compute_dist += 1.0; + else + total_compute_dist = 0.0; + + total_dist = total_compute_dist; +} + +// Compute partial distance. +void +dist_compute_mod::compute_partial_proc() +{ + if (start) { + + // Implement reset.event(): + if (prev_reset != (bool) reset) + partial_compute_dist = 0.0; + else + partial_compute_dist += 1.0; + + prev_reset = reset; + + } + else + partial_compute_dist = 0.0; + + partial_dist = partial_compute_dist; +} + +// LCD display driver. +void +dist_lcd_mod::lcd_driver_proc() +{ + if (start) { + + if (total_dist.event()) + total = total_dist * DIST_INCR; + + if (partial_dist.event()) + partial = partial_dist * DIST_INCR; + + } + else { + total = 0.0; + partial = 0.0; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash4/dist.h new file mode 100644 index 000000000..9c7cb5761 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/dist.h @@ -0,0 +1,164 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_read_mod ) +{ + // Input ports: + sc_in pulse; // Pulse coming from the pulse generator. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out ok_for_incr; + + // Get the pulses for one distance increment. + void get_dist_proc(); + + SC_CTOR( dist_read_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + } +}; + +SC_MODULE( dist_compute_mod ) +{ + // Input ports: + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + sc_in ok_for_incr; + + // Output ports: + sc_out total_dist; + sc_out partial_dist; + + // Internal variables: + static bool prev_reset; + static double total_compute_dist; + static double partial_compute_dist; + + // Compute total and partial distances. + void compute_total_proc(); + void compute_partial_proc(); + + SC_CTOR( dist_compute_mod ) + { + SC_METHOD( compute_total_proc ); + sensitive << ok_for_incr; + + SC_METHOD( compute_partial_proc ); + sensitive << ok_for_incr; + + prev_reset = false; + total_compute_dist = 0.0; + partial_compute_dist = 0.0; + } +}; + +SC_MODULE( dist_lcd_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in total_dist; + sc_in partial_dist; + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // LCD display driver. + void lcd_driver_proc(); + + SC_CTOR( dist_lcd_mod ) + { + SC_METHOD( lcd_driver_proc ); + sensitive << total_dist << partial_dist; + } +}; + +SC_MODULE( dist_mod ) +{ + // Ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // Internal signals: + sc_signal ok_for_incr; + sc_signal total_dist; + sc_signal partial_dist; + + // Internal models: + dist_read_mod *read_mod; + dist_compute_mod *compute_mod; + dist_lcd_mod *lcd_mod; + + SC_CTOR( dist_mod ) + { + read_mod = new dist_read_mod("read_mod"); + compute_mod = new dist_compute_mod("compute_mod"); + lcd_mod = new dist_lcd_mod("lcd_mod"); + + read_mod->pulse.bind(pulse); + read_mod->start.bind(start); + read_mod->ok_for_incr.bind(ok_for_incr); + + compute_mod->reset.bind(reset); + compute_mod->start.bind(start); + compute_mod->ok_for_incr.bind(ok_for_incr); + compute_mod->total_dist.bind(total_dist); + compute_mod->partial_dist.bind(partial_dist); + + lcd_mod->start.bind(start); + lcd_mod->total_dist.bind(total_dist); + lcd_mod->partial_dist.bind(partial_dist); + lcd_mod->total.bind(total); + lcd_mod->partial.bind(partial); + + ok_for_incr = false; + total_dist = 0.0; + partial_dist = 0.0; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/driver.cpp b/src/systemc/tests/systemc/misc/v1.0/dash4/driver.cpp new file mode 100644 index 000000000..9e601c155 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/driver.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- Implementation of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: driver.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:55 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:19 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" + +// Driver's output actions. +void +driver_mod::driver_out_proc() +{ + wait(); + + // while (true) { + cout << "Driver is up @ " << sc_time_stamp() << endl; + + // Car is at rest. + speed_set = 0; + reset = false; + start = false; + wait(); + + cout << "Driver started the car @ " << sc_time_stamp() << endl; + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + start = true; + speed_set = 40; + wait(); + + cout << "Driver set the speed to 120 km/h @ " << sc_time_stamp() << endl; + speed_set = 120; + wait(); + + cout << "Driver reset the partial distance odometer @ " + << sc_time_stamp() << endl; + cout << "Driver set the speed to 60 km/h @ " << sc_time_stamp() << endl; + reset = true; + speed_set = 60; + wait(); + + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + speed_set = 40; + wait(); + + cout << "Driver stopped the car @ " << sc_time_stamp() << endl; + sc_stop(); + // } +} + +// Driver's input actions. +void +driver_mod::driver_in_proc() +{ + if (speed.event()) { + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + } + + if (angle.event()) { + cout << "Current speedometer angle = " << angle + << " degrees @ " << sc_time_stamp() << endl; + } + + if (total.event()) { + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + } + + if (partial.event()) { + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/driver.h b/src/systemc/tests/systemc/misc/v1.0/dash4/driver.h new file mode 100644 index 000000000..f12767fb4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/driver.h @@ -0,0 +1,70 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- Definition of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DRIVER_H +#define DRIVER_H + +SC_MODULE( driver_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock for the actions of the driver. + sc_in speed; + sc_in angle; + sc_in total; + sc_in partial; + + // Output ports: + sc_out reset; // Set if the driver wants to reset the partial + // distance odometer. + sc_out speed_set; // Speed of the car as set by the driver. + sc_out start; // Set if the driver starts the car. + + // Driver's actions. + void driver_out_proc(); + void driver_in_proc(); + + SC_CTOR( driver_mod ) + { + SC_THREAD( driver_out_proc ); + sensitive << clk.pos(); + + SC_METHOD( driver_in_proc ); + sensitive << speed << angle << total << partial; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/golden/dash4.log b/src/systemc/tests/systemc/misc/v1.0/dash4/golden/dash4.log new file mode 100644 index 000000000..a84ae19b4 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/golden/dash4.log @@ -0,0 +1,37 @@ +SystemC Simulation +Driver is up @ 0 s +Driver started the car @ 10 us +Driver set the speed to 40 km/h @ 10 us +Current speed displayed = 39.6 km/h @ 10300 ns +Current speedometer angle = 82.2462 degrees @ 10300 ns +Current total distance displayed = 0.01 km @ 19150 ns +Current partial distance displayed = 0.01 km @ 19150 ns +Driver set the speed to 120 km/h @ 20 us +Current speed displayed = 59.4 km/h @ 20075 ns +Current speedometer angle = 123.369 degrees @ 20075 ns +Current speed displayed = 118.8 km/h @ 20175 ns +Current speedometer angle = 246.738 degrees @ 20175 ns +Current total distance displayed = 0.02 km @ 22775 ns +Current partial distance displayed = 0.02 km @ 22775 ns +Current total distance displayed = 0.03 km @ 25825 ns +Current partial distance displayed = 0.03 km @ 25825 ns +Current total distance displayed = 0.04 km @ 28875 ns +Current partial distance displayed = 0.04 km @ 28875 ns +Driver reset the partial distance odometer @ 30 us +Driver set the speed to 60 km/h @ 30 us +Current speed displayed = 79.2 km/h @ 30150 ns +Current speedometer angle = 164.492 degrees @ 30150 ns +Current speed displayed = 59.4 km/h @ 30350 ns +Current speedometer angle = 123.369 degrees @ 30350 ns +Current total distance displayed = 0.05 km @ 33850 ns +Current partial distance displayed = 0 km @ 33850 ns +Current total distance displayed = 0.06 km @ 39950 ns +Current partial distance displayed = 0.01 km @ 39950 ns +Driver set the speed to 40 km/h @ 40 us +Current speed displayed = 39.6 km/h @ 40225 ns +Current speedometer angle = 82.2462 degrees @ 40225 ns +Current total distance displayed = 0.07 km @ 49075 ns +Current partial distance displayed = 0.02 km @ 49075 ns +Driver stopped the car @ 50 us + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash4/main.cpp new file mode 100644 index 000000000..537dd6ede --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/main.cpp @@ -0,0 +1,152 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), the driver of the car, clocks, and the + pulse generator. The pulses are generated by the sensors placed + around one of the wheel shafts. The rate of pulse generation is + determined by the speed of the car. The driver can start the car, + set its speed, reset the partial distance odometer, and stop the + car (which means he will stop the simulation). One of the clocks + is slow and the other is fast. The fast clock represents the real + time. The slow clock is used to control the actions of the + driver. The signals in this program are traced. + + purpose (in terms of changes to dash3's purpose) -- new style of + declaring modules and processes (i.e., via the use of + module_name). + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:20 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:55 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:19 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Signals for the driver's actions. + sc_signal reset("reset"); + sc_signal speed("speed"); + sc_signal start("start"); + + // Signals observed by the driver. + sc_signal disp_speed("disp_speed"); + sc_signal disp_angle("disp_angle"); + sc_signal disp_total_dist("disp_total_dist"); + sc_signal disp_partial_dist("disp_partial_dist"); + + // Clocks. + sc_clock clk0("slow_clk", SLOW_CLOCK_PERIOD0, SC_NS, 0.5, 0.0, SC_NS, true); + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + driver_mod driver("driver"); + driver(clk0, disp_speed, disp_angle, disp_total_dist, disp_partial_dist, + reset, speed, start); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, start, speed, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, start, speed_pulses, disp_speed, disp_angle); + + dist_mod odometers("odometers"); + odometers(dist_pulses, reset, start, disp_total_dist, disp_partial_dist); + + // Initialize signals: + start = false; + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk0, "slow_clk"); + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + sc_trace(tf, reset, "reset"); + sc_trace(tf, start, "start"); + sc_trace(tf, speed, "speed"); + sc_trace(tf, disp_speed, "disp_speed"); + sc_trace(tf, disp_angle, "disp_angle"); + sc_trace(tf, disp_total_dist, "disp_total_dist"); + sc_trace(tf, disp_partial_dist, "disp_partial_dist"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + sc_trace(tf, speedometer.read_mod->raw_speed, "raw_speed"); + sc_trace(tf, speedometer.filtered_speed, "filtered_speed"); + sc_trace(tf, odometers.ok_for_incr, "ok_for_incr"); + sc_trace(tf, odometers.total_dist, "total_dist"); + sc_trace(tf, odometers.partial_dist, "partial_dist"); + + disp_speed = 0.0; + disp_angle = 0.0; + disp_total_dist = 0.0; + disp_partial_dist = 0.0; + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash4/pulse.cpp new file mode 100644 index 000000000..d9f83ce87 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/pulse.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:19 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + wait(); + + speed_pulse = false; + dist_pulse = false; + + // Wait until the car is started. + do { + wait(); + } while (start.read() == false); + + while (true) { + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash4/pulse.h new file mode 100644 index 000000000..17d301bb7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/pulse.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_in start; // Becomes true if the car's started. + sc_in speed; // Speed of the car set by the driver. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_THREAD( gen_pulse_proc ); + sensitive << clk << start; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash4/speed.cpp new file mode 100644 index 000000000..ed4c5a8b6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/speed.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + if (start) + elapsed_time = elapsed_time + 1; + else + elapsed_time = 0; +} + +// Compute speed. +void +speed_read_mod::read_speed_proc() +{ + wait(); + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + if (start) + raw_speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + else + raw_speed = 0.0; + + // Reset timer. + elapsed_time = 0; + } +} + +// Filter speed. +void +speed_read_mod::filter_speed_proc() +{ + if (start) + filtered_speed = raw_speed * 1.0; // Ambiguous overload w/o 1.0. + else + filtered_speed = 0.0; +} + +// Compute needle angle and drive the speedometer. +void +speed_pwm_mod::pwm_driver_proc() +{ + if (start) { + speed = filtered_speed * 1.0; // Ambiguous overload w/o 1.0. + angle = filtered_speed * MAX_ANGLE / MAX_SPEED; + } + else { + speed = 0.0; + angle = 0.0; + } +} + + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash4/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash4/speed.h new file mode 100644 index 000000000..7e63cda24 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash4/speed.h @@ -0,0 +1,140 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_read_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out filtered_speed; // Filtered speed. + + // Inout ports: + sc_inout elapsed_time; + + // Internal signals: + sc_signal raw_speed; + + // Compute speed. + void read_speed_proc(); + + // Filter speed. + void filter_speed_proc(); + + SC_CTOR( speed_read_mod ) + { + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + + SC_METHOD( filter_speed_proc ); + sensitive << raw_speed; + + raw_speed = 0.0; + } +}; + +SC_MODULE( speed_pwm_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in filtered_speed; + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Compute needle angle and drive the speedometer. + void pwm_driver_proc(); + + SC_CTOR( speed_pwm_mod ) + { + SC_METHOD( pwm_driver_proc ); + sensitive << filtered_speed; + } +}; + +SC_MODULE( speed_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Internal signals: + sc_signal elapsed_time; + sc_signal filtered_speed; + + // Internal models: + speed_read_mod *read_mod; + speed_pwm_mod *pwm_mod; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + SC_CTOR( speed_mod ) + { + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + read_mod = new speed_read_mod("read_mod"); + pwm_mod = new speed_pwm_mod("pwm_mod"); + + read_mod->start.bind(start); + read_mod->pulse.bind(pulse); + read_mod->elapsed_time.bind(elapsed_time); + read_mod->filtered_speed.bind(filtered_speed); + + pwm_mod->start.bind(start); + pwm_mod->filtered_speed.bind(filtered_speed); + pwm_mod->speed.bind(speed); + pwm_mod->angle.bind(angle); + + elapsed_time = 0; + filtered_speed = 0.0; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/const.h b/src/systemc/tests/systemc/misc/v1.0/dash5/const.h new file mode 100644 index 000000000..9bc1ed3bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/dash5.f b/src/systemc/tests/systemc/misc/v1.0/dash5/dash5.f new file mode 100644 index 000000000..078a71be9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/dash5.f @@ -0,0 +1,5 @@ +dash5/driver.cpp +dash5/dist.cpp +dash5/main.cpp +dash5/pulse.cpp +dash5/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash5/dist.cpp new file mode 100644 index 000000000..e2759fdf9 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/dist.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:50 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +bool dist_compute_mod::prev_reset; +double dist_compute_mod::total_compute_dist; +double dist_compute_mod::partial_compute_dist; + +// Get the pulses for one distance increment. +void +dist_read_mod::get_dist_proc() +{ + wait(); + + bool ok = false; + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + if (start) + ok = !ok; + else + ok = false; + + ok_for_incr = ok; + } +} + +// Compute total distance. +void +dist_compute_mod::compute_total_proc() +{ + if (start) + total_compute_dist += 1.0; + else + total_compute_dist = 0.0; + + total_dist = total_compute_dist; +} + +// Compute partial distance. +void +dist_compute_mod::compute_partial_proc() +{ + if (start) { + + // Implement reset.event(): + if (prev_reset != (bool) reset) + partial_compute_dist = 0.0; + else + partial_compute_dist += 1.0; + + prev_reset = reset; + + } + else + partial_compute_dist = 0.0; + + partial_dist = partial_compute_dist; +} + +// LCD display driver. +void +dist_lcd_mod::lcd_driver_proc() +{ + if (start) { + + if (total_dist.event()) + total = total_dist * DIST_INCR; + + if (partial_dist.event()) + partial = partial_dist * DIST_INCR; + + } + else { + total = 0.0; + partial = 0.0; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash5/dist.h new file mode 100644 index 000000000..9c7cb5761 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/dist.h @@ -0,0 +1,164 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_read_mod ) +{ + // Input ports: + sc_in pulse; // Pulse coming from the pulse generator. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out ok_for_incr; + + // Get the pulses for one distance increment. + void get_dist_proc(); + + SC_CTOR( dist_read_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + } +}; + +SC_MODULE( dist_compute_mod ) +{ + // Input ports: + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + sc_in ok_for_incr; + + // Output ports: + sc_out total_dist; + sc_out partial_dist; + + // Internal variables: + static bool prev_reset; + static double total_compute_dist; + static double partial_compute_dist; + + // Compute total and partial distances. + void compute_total_proc(); + void compute_partial_proc(); + + SC_CTOR( dist_compute_mod ) + { + SC_METHOD( compute_total_proc ); + sensitive << ok_for_incr; + + SC_METHOD( compute_partial_proc ); + sensitive << ok_for_incr; + + prev_reset = false; + total_compute_dist = 0.0; + partial_compute_dist = 0.0; + } +}; + +SC_MODULE( dist_lcd_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in total_dist; + sc_in partial_dist; + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // LCD display driver. + void lcd_driver_proc(); + + SC_CTOR( dist_lcd_mod ) + { + SC_METHOD( lcd_driver_proc ); + sensitive << total_dist << partial_dist; + } +}; + +SC_MODULE( dist_mod ) +{ + // Ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // Internal signals: + sc_signal ok_for_incr; + sc_signal total_dist; + sc_signal partial_dist; + + // Internal models: + dist_read_mod *read_mod; + dist_compute_mod *compute_mod; + dist_lcd_mod *lcd_mod; + + SC_CTOR( dist_mod ) + { + read_mod = new dist_read_mod("read_mod"); + compute_mod = new dist_compute_mod("compute_mod"); + lcd_mod = new dist_lcd_mod("lcd_mod"); + + read_mod->pulse.bind(pulse); + read_mod->start.bind(start); + read_mod->ok_for_incr.bind(ok_for_incr); + + compute_mod->reset.bind(reset); + compute_mod->start.bind(start); + compute_mod->ok_for_incr.bind(ok_for_incr); + compute_mod->total_dist.bind(total_dist); + compute_mod->partial_dist.bind(partial_dist); + + lcd_mod->start.bind(start); + lcd_mod->total_dist.bind(total_dist); + lcd_mod->partial_dist.bind(partial_dist); + lcd_mod->total.bind(total); + lcd_mod->partial.bind(partial); + + ok_for_incr = false; + total_dist = 0.0; + partial_dist = 0.0; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/driver.cpp b/src/systemc/tests/systemc/misc/v1.0/dash5/driver.cpp new file mode 100644 index 000000000..404770b0c --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/driver.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- Implementation of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: driver.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:56 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" + +// Driver's output actions. +void +driver_mod::driver_out_proc() +{ + // while (true) { + cout << "Driver is up @ " << sc_time_stamp() << endl; + + // Car is at rest. + speed_set = 0; + reset = false; + start = false; + wait(); + + cout << "Driver started the car @ " << sc_time_stamp() << endl; + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + start = true; + speed_set = 40; + wait(); + + cout << "Driver set the speed to 120 km/h @ " << sc_time_stamp() << endl; + speed_set = 120; + wait(); + + cout << "Driver reset the partial distance odometer @ " + << sc_time_stamp() << endl; + cout << "Driver set the speed to 60 km/h @ " << sc_time_stamp() << endl; + reset = true; + speed_set = 60; + wait(); + + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + speed_set = 40; + wait(); + + cout << "Driver stopped the car @ " << sc_time_stamp() << endl; + wait(); + + sc_stop(); + // } +} + +// Driver's input actions. +void +driver_mod::driver_in_proc() +{ + if (speed.event()) { + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + } + + if (angle.event()) { + cout << "Current speedometer angle = " << angle + << " degrees @ " << sc_time_stamp() << endl; + } + + if (total.event()) { + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + } + + if (partial.event()) { + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/driver.h b/src/systemc/tests/systemc/misc/v1.0/dash5/driver.h new file mode 100644 index 000000000..795fa63b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/driver.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- Definition of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DRIVER_H +#define DRIVER_H + +SC_MODULE( driver_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock for the actions of the driver. + sc_in speed; + sc_in angle; + sc_in total; + sc_in partial; + + // Output ports: + sc_out reset; // Set if the driver wants to reset the partial + // distance odometer. + sc_out speed_set; // Speed of the car as set by the driver. + sc_out start; // Set if the driver starts the car. + + // Driver's actions. + void driver_out_proc(); + void driver_in_proc(); + + SC_CTOR( driver_mod ) + { + SC_CTHREAD( driver_out_proc, clk.pos() ); + + SC_METHOD( driver_in_proc ); + sensitive << speed << angle << total << partial; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/golden/dash5.log b/src/systemc/tests/systemc/misc/v1.0/dash5/golden/dash5.log new file mode 100644 index 000000000..bc7566ef8 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/golden/dash5.log @@ -0,0 +1,39 @@ +SystemC Simulation +Driver is up @ 0 s +Driver started the car @ 10 us +Driver set the speed to 40 km/h @ 10 us +Current speed displayed = 39.6 km/h @ 10300 ns +Current speedometer angle = 82.2462 degrees @ 10300 ns +Current total distance displayed = 0.01 km @ 19150 ns +Current partial distance displayed = 0.01 km @ 19150 ns +Driver set the speed to 120 km/h @ 20 us +Current speed displayed = 59.4 km/h @ 20075 ns +Current speedometer angle = 123.369 degrees @ 20075 ns +Current speed displayed = 118.8 km/h @ 20175 ns +Current speedometer angle = 246.738 degrees @ 20175 ns +Current total distance displayed = 0.02 km @ 22775 ns +Current partial distance displayed = 0.02 km @ 22775 ns +Current total distance displayed = 0.03 km @ 25825 ns +Current partial distance displayed = 0.03 km @ 25825 ns +Current total distance displayed = 0.04 km @ 28875 ns +Current partial distance displayed = 0.04 km @ 28875 ns +Driver reset the partial distance odometer @ 30 us +Driver set the speed to 60 km/h @ 30 us +Current speed displayed = 79.2 km/h @ 30150 ns +Current speedometer angle = 164.492 degrees @ 30150 ns +Current speed displayed = 59.4 km/h @ 30350 ns +Current speedometer angle = 123.369 degrees @ 30350 ns +Current total distance displayed = 0.05 km @ 33850 ns +Current partial distance displayed = 0 km @ 33850 ns +Current total distance displayed = 0.06 km @ 39950 ns +Current partial distance displayed = 0.01 km @ 39950 ns +Driver set the speed to 40 km/h @ 40 us +Current speed displayed = 39.6 km/h @ 40225 ns +Current speedometer angle = 82.2462 degrees @ 40225 ns +Current total distance displayed = 0.07 km @ 49075 ns +Current partial distance displayed = 0.02 km @ 49075 ns +Driver stopped the car @ 50 us +Current total distance displayed = 0.08 km @ 58225 ns +Current partial distance displayed = 0.03 km @ 58225 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash5/main.cpp new file mode 100644 index 000000000..af9623388 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/main.cpp @@ -0,0 +1,151 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), the driver of the car, clocks, and the + pulse generator. The pulses are generated by the sensors placed + around one of the wheel shafts. The rate of pulse generation is + determined by the speed of the car. The driver can start the car, + set its speed, reset the partial distance odometer, and stop the + car (which means he will stop the simulation). One of the clocks + is slow and the other is fast. The fast clock represents the real + time. The slow clock is used to control the actions of the + driver. The signals in this program are traced. + + purpose (in terms of changes to dash4's purpose) -- synchronous + processes. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:20 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:56 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Signals for the driver's actions. + sc_signal reset("reset"); + sc_signal speed("speed"); + sc_signal start("start"); + + // Signals observed by the driver. + sc_signal disp_speed("disp_speed"); + sc_signal disp_angle("disp_angle"); + sc_signal disp_total_dist("disp_total_dist"); + sc_signal disp_partial_dist("disp_partial_dist"); + + // Clocks. + sc_clock clk0("slow_clk", SLOW_CLOCK_PERIOD0, SC_NS, 0.5, 0.0, SC_NS, true); + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + driver_mod driver("driver"); + driver(clk0, disp_speed, disp_angle, disp_total_dist, disp_partial_dist, + reset, speed, start); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, start, speed, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, start, speed_pulses, disp_speed, disp_angle); + + dist_mod odometers("odometers"); + odometers(dist_pulses, reset, start, disp_total_dist, disp_partial_dist); + + // Initialize signals: + start = false; + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk0, "slow_clk"); + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + sc_trace(tf, reset, "reset"); + sc_trace(tf, start, "start"); + sc_trace(tf, speed, "speed"); + sc_trace(tf, disp_speed, "disp_speed"); + sc_trace(tf, disp_angle, "disp_angle"); + sc_trace(tf, disp_total_dist, "disp_total_dist"); + sc_trace(tf, disp_partial_dist, "disp_partial_dist"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + sc_trace(tf, speedometer.read_mod->raw_speed, "raw_speed"); + sc_trace(tf, speedometer.filtered_speed, "filtered_speed"); + sc_trace(tf, odometers.ok_for_incr, "ok_for_incr"); + sc_trace(tf, odometers.total_dist, "total_dist"); + sc_trace(tf, odometers.partial_dist, "partial_dist"); + + disp_speed = 0.0; + disp_angle = 0.0; + disp_total_dist = 0.0; + disp_partial_dist = 0.0; + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash5/pulse.cpp new file mode 100644 index 000000000..eb6d70d23 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/pulse.cpp @@ -0,0 +1,99 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + wait(); + + speed_pulse = false; + dist_pulse = false; + + // Wait until the car is started. + // do { wait(); } while (start == true); + do { + wait(); + } while (start == false); + + while (true) { + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash5/pulse.h new file mode 100644 index 000000000..17d301bb7 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/pulse.h @@ -0,0 +1,64 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_in start; // Becomes true if the car's started. + sc_in speed; // Speed of the car set by the driver. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_THREAD( gen_pulse_proc ); + sensitive << clk << start; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash5/speed.cpp new file mode 100644 index 000000000..913d0aa6a --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/speed.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + if (start) + elapsed_time = elapsed_time + 1; + else + elapsed_time = 0; +} + +// Compute speed. +void +speed_read_mod::read_speed_proc() +{ + wait(); + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + if (start) + raw_speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + else + raw_speed = 0.0; + + // Reset timer. + elapsed_time = 0; + } +} + +// Filter speed. +void +speed_read_mod::filter_speed_proc() +{ + if (start) + filtered_speed = raw_speed * 1.0; // Ambiguous overload w/o 1.0. + else + filtered_speed = 0.0; +} + +// Compute needle angle and drive the speedometer. +void +speed_pwm_mod::pwm_driver_proc() +{ + if (start) { + speed = filtered_speed * 1.0; // Ambiguous overload w/o 1.0. + angle = filtered_speed * MAX_ANGLE / MAX_SPEED; + } + else { + speed = 0.0; + angle = 0.0; + } +} + + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash5/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash5/speed.h new file mode 100644 index 000000000..7e63cda24 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash5/speed.h @@ -0,0 +1,140 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_read_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out filtered_speed; // Filtered speed. + + // Inout ports: + sc_inout elapsed_time; + + // Internal signals: + sc_signal raw_speed; + + // Compute speed. + void read_speed_proc(); + + // Filter speed. + void filter_speed_proc(); + + SC_CTOR( speed_read_mod ) + { + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + + SC_METHOD( filter_speed_proc ); + sensitive << raw_speed; + + raw_speed = 0.0; + } +}; + +SC_MODULE( speed_pwm_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in filtered_speed; + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Compute needle angle and drive the speedometer. + void pwm_driver_proc(); + + SC_CTOR( speed_pwm_mod ) + { + SC_METHOD( pwm_driver_proc ); + sensitive << filtered_speed; + } +}; + +SC_MODULE( speed_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Internal signals: + sc_signal elapsed_time; + sc_signal filtered_speed; + + // Internal models: + speed_read_mod *read_mod; + speed_pwm_mod *pwm_mod; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + SC_CTOR( speed_mod ) + { + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + read_mod = new speed_read_mod("read_mod"); + pwm_mod = new speed_pwm_mod("pwm_mod"); + + read_mod->start.bind(start); + read_mod->pulse.bind(pulse); + read_mod->elapsed_time.bind(elapsed_time); + read_mod->filtered_speed.bind(filtered_speed); + + pwm_mod->start.bind(start); + pwm_mod->filtered_speed.bind(filtered_speed); + pwm_mod->speed.bind(speed); + pwm_mod->angle.bind(angle); + + elapsed_time = 0; + filtered_speed = 0.0; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/const.h b/src/systemc/tests/systemc/misc/v1.0/dash6/const.h new file mode 100644 index 000000000..9bc1ed3bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/dash6.f b/src/systemc/tests/systemc/misc/v1.0/dash6/dash6.f new file mode 100644 index 000000000..4479b4c89 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/dash6.f @@ -0,0 +1,5 @@ +dash6/driver.cpp +dash6/dist.cpp +dash6/main.cpp +dash6/pulse.cpp +dash6/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash6/dist.cpp new file mode 100644 index 000000000..7080a461f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/dist.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +bool dist_compute_mod::prev_reset; +double dist_compute_mod::total_compute_dist; +double dist_compute_mod::partial_compute_dist; + +// Get the pulses for one distance increment. +void +dist_read_mod::get_dist_proc() +{ + wait(); + + bool ok = false; + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + if (start) + ok = !ok; + else + ok = false; + + ok_for_incr = ok; + } +} + +// Compute total distance. +void +dist_compute_mod::compute_total_proc() +{ + if (start) + total_compute_dist += 1.0; + else + total_compute_dist = 0.0; + + total_dist = total_compute_dist; +} + +// Compute partial distance. +void +dist_compute_mod::compute_partial_proc() +{ + if (start) { + + // Implement reset.event(): + if (prev_reset != (bool) reset) + partial_compute_dist = 0.0; + else + partial_compute_dist += 1.0; + + prev_reset = reset; + + } + else + partial_compute_dist = 0.0; + + partial_dist = partial_compute_dist; +} + +// LCD display driver. +void +dist_lcd_mod::lcd_driver_proc() +{ + if (start) { + + if (total_dist.event()) + total = total_dist * DIST_INCR; + + if (partial_dist.event()) + partial = partial_dist * DIST_INCR; + + } + else { + total = 0.0; + partial = 0.0; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash6/dist.h new file mode 100644 index 000000000..9c7cb5761 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/dist.h @@ -0,0 +1,164 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_read_mod ) +{ + // Input ports: + sc_in pulse; // Pulse coming from the pulse generator. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out ok_for_incr; + + // Get the pulses for one distance increment. + void get_dist_proc(); + + SC_CTOR( dist_read_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + } +}; + +SC_MODULE( dist_compute_mod ) +{ + // Input ports: + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + sc_in ok_for_incr; + + // Output ports: + sc_out total_dist; + sc_out partial_dist; + + // Internal variables: + static bool prev_reset; + static double total_compute_dist; + static double partial_compute_dist; + + // Compute total and partial distances. + void compute_total_proc(); + void compute_partial_proc(); + + SC_CTOR( dist_compute_mod ) + { + SC_METHOD( compute_total_proc ); + sensitive << ok_for_incr; + + SC_METHOD( compute_partial_proc ); + sensitive << ok_for_incr; + + prev_reset = false; + total_compute_dist = 0.0; + partial_compute_dist = 0.0; + } +}; + +SC_MODULE( dist_lcd_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in total_dist; + sc_in partial_dist; + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // LCD display driver. + void lcd_driver_proc(); + + SC_CTOR( dist_lcd_mod ) + { + SC_METHOD( lcd_driver_proc ); + sensitive << total_dist << partial_dist; + } +}; + +SC_MODULE( dist_mod ) +{ + // Ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // Internal signals: + sc_signal ok_for_incr; + sc_signal total_dist; + sc_signal partial_dist; + + // Internal models: + dist_read_mod *read_mod; + dist_compute_mod *compute_mod; + dist_lcd_mod *lcd_mod; + + SC_CTOR( dist_mod ) + { + read_mod = new dist_read_mod("read_mod"); + compute_mod = new dist_compute_mod("compute_mod"); + lcd_mod = new dist_lcd_mod("lcd_mod"); + + read_mod->pulse.bind(pulse); + read_mod->start.bind(start); + read_mod->ok_for_incr.bind(ok_for_incr); + + compute_mod->reset.bind(reset); + compute_mod->start.bind(start); + compute_mod->ok_for_incr.bind(ok_for_incr); + compute_mod->total_dist.bind(total_dist); + compute_mod->partial_dist.bind(partial_dist); + + lcd_mod->start.bind(start); + lcd_mod->total_dist.bind(total_dist); + lcd_mod->partial_dist.bind(partial_dist); + lcd_mod->total.bind(total); + lcd_mod->partial.bind(partial); + + ok_for_incr = false; + total_dist = 0.0; + partial_dist = 0.0; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/driver.cpp b/src/systemc/tests/systemc/misc/v1.0/dash6/driver.cpp new file mode 100644 index 000000000..6c085b77d --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/driver.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- Implementation of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: driver.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:57 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" + +// Driver's output actions. +void +driver_mod::driver_out_proc() +{ + // while (true) { + cout << "Driver is up @ " << sc_time_stamp() << endl; + + // Car is at rest. + speed_set = 0; + reset = false; + start = false; + wait(); + + cout << "Driver started the car @ " << sc_time_stamp() << endl; + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + start = true; + speed_set = 40; + wait(); + + cout << "Driver set the speed to 120 km/h @ " << sc_time_stamp() << endl; + speed_set = 120; + wait(); + + cout << "Driver reset the partial distance odometer @ " + << sc_time_stamp() << endl; + cout << "Driver set the speed to 60 km/h @ " << sc_time_stamp() << endl; + reset = true; + speed_set = 60; + wait(); + + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + speed_set = 40; + wait(); + + cout << "Driver stopped the car @ " << sc_time_stamp() << endl; + wait(); + + sc_stop(); + // } +} + +// Driver's input actions. +void +driver_mod::driver_in_proc() +{ + if (speed.event()) { + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + } + + if (angle.event()) { + cout << "Current speedometer angle = " << angle + << " degrees @ " << sc_time_stamp() << endl; + } + + if (total.event()) { + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + } + + if (partial.event()) { + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/driver.h b/src/systemc/tests/systemc/misc/v1.0/dash6/driver.h new file mode 100644 index 000000000..795fa63b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/driver.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- Definition of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DRIVER_H +#define DRIVER_H + +SC_MODULE( driver_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock for the actions of the driver. + sc_in speed; + sc_in angle; + sc_in total; + sc_in partial; + + // Output ports: + sc_out reset; // Set if the driver wants to reset the partial + // distance odometer. + sc_out speed_set; // Speed of the car as set by the driver. + sc_out start; // Set if the driver starts the car. + + // Driver's actions. + void driver_out_proc(); + void driver_in_proc(); + + SC_CTOR( driver_mod ) + { + SC_CTHREAD( driver_out_proc, clk.pos() ); + + SC_METHOD( driver_in_proc ); + sensitive << speed << angle << total << partial; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/golden/dash6.log b/src/systemc/tests/systemc/misc/v1.0/dash6/golden/dash6.log new file mode 100644 index 000000000..8668a2d8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/golden/dash6.log @@ -0,0 +1,35 @@ +SystemC Simulation +Driver is up @ 0 s +Driver started the car @ 10 us +Driver set the speed to 40 km/h @ 10 us +Current speed displayed = 18.2769 km/h @ 10625 ns +Current speedometer angle = 37.9598 degrees @ 10625 ns +Current speed displayed = 19.8 km/h @ 11225 ns +Current speedometer angle = 41.1231 degrees @ 11225 ns +Driver set the speed to 120 km/h @ 20 us +Current speed displayed = 26.4 km/h @ 20075 ns +Current speedometer angle = 54.8308 degrees @ 20075 ns +Current speed displayed = 59.4 km/h @ 20275 ns +Current speedometer angle = 123.369 degrees @ 20275 ns +Current total distance displayed = 0.01 km @ 22775 ns +Current partial distance displayed = 0.01 km @ 22775 ns +Current total distance displayed = 0.02 km @ 28875 ns +Current partial distance displayed = 0.02 km @ 28875 ns +Driver reset the partial distance odometer @ 30 us +Driver set the speed to 60 km/h @ 30 us +Current speed displayed = 39.6 km/h @ 30175 ns +Current speedometer angle = 82.2462 degrees @ 30175 ns +Current speed displayed = 29.7 km/h @ 30575 ns +Current speedometer angle = 61.6846 degrees @ 30575 ns +Current total distance displayed = 0.03 km @ 39975 ns +Current partial distance displayed = 0 km @ 39975 ns +Driver set the speed to 40 km/h @ 40 us +Current speed displayed = 23.76 km/h @ 40275 ns +Current speedometer angle = 49.3477 degrees @ 40275 ns +Current speed displayed = 19.8 km/h @ 40875 ns +Current speedometer angle = 41.1231 degrees @ 40875 ns +Driver stopped the car @ 50 us +Current total distance displayed = 0.04 km @ 58275 ns +Current partial distance displayed = 0.01 km @ 58275 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash6/main.cpp new file mode 100644 index 000000000..a84f33217 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/main.cpp @@ -0,0 +1,151 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), the driver of the car, clocks, and the + pulse generator. The pulses are generated by the sensors placed + around one of the wheel shafts. The rate of pulse generation is + determined by the speed of the car. The driver can start the car, + set its speed, reset the partial distance odometer, and stop the + car (which means he will stop the simulation). One of the clocks + is slow and the other is fast. The fast clock represents the real + time. The slow clock is used to control the actions of the + driver. The signals in this program are traced. + + purpose (in terms of changes to dash5's purpose) -- more + synchronous processes. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:20 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:57 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Signals for the driver's actions. + sc_signal reset("reset"); + sc_signal speed("speed"); + sc_signal start("start"); + + // Signals observed by the driver. + sc_signal disp_speed("disp_speed"); + sc_signal disp_angle("disp_angle"); + sc_signal disp_total_dist("disp_total_dist"); + sc_signal disp_partial_dist("disp_partial_dist"); + + // Clocks. + sc_clock clk0("slow_clk", SLOW_CLOCK_PERIOD0, SC_NS, 0.5, 0.0, SC_NS, true); + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + driver_mod driver("driver"); + driver(clk0, disp_speed, disp_angle, disp_total_dist, disp_partial_dist, + reset, speed, start); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, start, speed, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, start, speed_pulses, disp_speed, disp_angle); + + dist_mod odometers("odometers"); + odometers(dist_pulses, reset, start, disp_total_dist, disp_partial_dist); + + // Initialize signals: + start = false; + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk0, "slow_clk"); + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + sc_trace(tf, reset, "reset"); + sc_trace(tf, start, "start"); + sc_trace(tf, speed, "speed"); + sc_trace(tf, disp_speed, "disp_speed"); + sc_trace(tf, disp_angle, "disp_angle"); + sc_trace(tf, disp_total_dist, "disp_total_dist"); + sc_trace(tf, disp_partial_dist, "disp_partial_dist"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + sc_trace(tf, speedometer.read_mod->raw_speed, "raw_speed"); + sc_trace(tf, speedometer.filtered_speed, "filtered_speed"); + sc_trace(tf, odometers.ok_for_incr, "ok_for_incr"); + sc_trace(tf, odometers.total_dist, "total_dist"); + sc_trace(tf, odometers.partial_dist, "partial_dist"); + + disp_speed = 0.0; + disp_angle = 0.0; + disp_total_dist = 0.0; + disp_partial_dist = 0.0; + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash6/pulse.cpp new file mode 100644 index 000000000..c2b5031f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/pulse.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + speed_pulse = false; + dist_pulse = false; + + // Wait until the car is started. + + do { wait(); } while (start != true); + + /* + do { + wait(); + } while (start == false); + */ + + while (true) { + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash6/pulse.h new file mode 100644 index 000000000..b1206d185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/pulse.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_in start; // Becomes true if the car's started. + sc_in speed; // Speed of the car set by the driver. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_CTHREAD( gen_pulse_proc, clk.pos() ); + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash6/speed.cpp new file mode 100644 index 000000000..913d0aa6a --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/speed.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + if (start) + elapsed_time = elapsed_time + 1; + else + elapsed_time = 0; +} + +// Compute speed. +void +speed_read_mod::read_speed_proc() +{ + wait(); + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + if (start) + raw_speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + else + raw_speed = 0.0; + + // Reset timer. + elapsed_time = 0; + } +} + +// Filter speed. +void +speed_read_mod::filter_speed_proc() +{ + if (start) + filtered_speed = raw_speed * 1.0; // Ambiguous overload w/o 1.0. + else + filtered_speed = 0.0; +} + +// Compute needle angle and drive the speedometer. +void +speed_pwm_mod::pwm_driver_proc() +{ + if (start) { + speed = filtered_speed * 1.0; // Ambiguous overload w/o 1.0. + angle = filtered_speed * MAX_ANGLE / MAX_SPEED; + } + else { + speed = 0.0; + angle = 0.0; + } +} + + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash6/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash6/speed.h new file mode 100644 index 000000000..7e63cda24 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash6/speed.h @@ -0,0 +1,140 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_read_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out filtered_speed; // Filtered speed. + + // Inout ports: + sc_inout elapsed_time; + + // Internal signals: + sc_signal raw_speed; + + // Compute speed. + void read_speed_proc(); + + // Filter speed. + void filter_speed_proc(); + + SC_CTOR( speed_read_mod ) + { + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + + SC_METHOD( filter_speed_proc ); + sensitive << raw_speed; + + raw_speed = 0.0; + } +}; + +SC_MODULE( speed_pwm_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in filtered_speed; + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Compute needle angle and drive the speedometer. + void pwm_driver_proc(); + + SC_CTOR( speed_pwm_mod ) + { + SC_METHOD( pwm_driver_proc ); + sensitive << filtered_speed; + } +}; + +SC_MODULE( speed_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Internal signals: + sc_signal elapsed_time; + sc_signal filtered_speed; + + // Internal models: + speed_read_mod *read_mod; + speed_pwm_mod *pwm_mod; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + SC_CTOR( speed_mod ) + { + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + read_mod = new speed_read_mod("read_mod"); + pwm_mod = new speed_pwm_mod("pwm_mod"); + + read_mod->start.bind(start); + read_mod->pulse.bind(pulse); + read_mod->elapsed_time.bind(elapsed_time); + read_mod->filtered_speed.bind(filtered_speed); + + pwm_mod->start.bind(start); + pwm_mod->filtered_speed.bind(filtered_speed); + pwm_mod->speed.bind(speed); + pwm_mod->angle.bind(angle); + + elapsed_time = 0; + filtered_speed = 0.0; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/const.h b/src/systemc/tests/systemc/misc/v1.0/dash7/const.h new file mode 100644 index 000000000..9bc1ed3bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/dash7.f b/src/systemc/tests/systemc/misc/v1.0/dash7/dash7.f new file mode 100644 index 000000000..319d6fb4f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/dash7.f @@ -0,0 +1,5 @@ +dash7/driver.cpp +dash7/dist.cpp +dash7/main.cpp +dash7/pulse.cpp +dash7/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash7/dist.cpp new file mode 100644 index 000000000..7080a461f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/dist.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +bool dist_compute_mod::prev_reset; +double dist_compute_mod::total_compute_dist; +double dist_compute_mod::partial_compute_dist; + +// Get the pulses for one distance increment. +void +dist_read_mod::get_dist_proc() +{ + wait(); + + bool ok = false; + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + if (start) + ok = !ok; + else + ok = false; + + ok_for_incr = ok; + } +} + +// Compute total distance. +void +dist_compute_mod::compute_total_proc() +{ + if (start) + total_compute_dist += 1.0; + else + total_compute_dist = 0.0; + + total_dist = total_compute_dist; +} + +// Compute partial distance. +void +dist_compute_mod::compute_partial_proc() +{ + if (start) { + + // Implement reset.event(): + if (prev_reset != (bool) reset) + partial_compute_dist = 0.0; + else + partial_compute_dist += 1.0; + + prev_reset = reset; + + } + else + partial_compute_dist = 0.0; + + partial_dist = partial_compute_dist; +} + +// LCD display driver. +void +dist_lcd_mod::lcd_driver_proc() +{ + if (start) { + + if (total_dist.event()) + total = total_dist * DIST_INCR; + + if (partial_dist.event()) + partial = partial_dist * DIST_INCR; + + } + else { + total = 0.0; + partial = 0.0; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash7/dist.h new file mode 100644 index 000000000..0285b557e --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/dist.h @@ -0,0 +1,177 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_read_mod ) +{ + // Input ports: + sc_in pulse; // Pulse coming from the pulse generator. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out ok_for_incr; + + // Get the pulses for one distance increment. + void get_dist_proc(); + + SC_CTOR( dist_read_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + } +}; + +SC_MODULE( dist_compute_mod ) +{ + // Input ports: + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + sc_in ok_for_incr; + + // Output ports: + sc_out total_dist; + sc_out partial_dist; + + // Internal variables: + static bool prev_reset; + static double total_compute_dist; + static double partial_compute_dist; + + // Compute total and partial distances. + void compute_total_proc(); + void compute_partial_proc(); + + SC_CTOR( dist_compute_mod ) + { + SC_METHOD( compute_total_proc ); + sensitive << ok_for_incr; + + SC_METHOD( compute_partial_proc ); + sensitive << ok_for_incr; + + prev_reset = false; + total_compute_dist = 0.0; + partial_compute_dist = 0.0; + } +}; + +SC_MODULE( dist_lcd_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in total_dist; + sc_in partial_dist; + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // LCD display driver. + void lcd_driver_proc(); + + SC_CTOR( dist_lcd_mod ) + { + SC_METHOD( lcd_driver_proc ); + sensitive << total_dist << partial_dist; + } +}; + +SC_MODULE( dist_mod ) +{ + // Ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // Internal signals: + sc_signal ok_for_incr; + sc_signal total_dist; + sc_signal partial_dist; + + // Internal models: + dist_read_mod *read_mod; + dist_compute_mod *compute_mod; + dist_lcd_mod *lcd_mod; + + SC_CTOR( dist_mod ) + { + read_mod = new dist_read_mod("read_mod"); + compute_mod = new dist_compute_mod("compute_mod"); + lcd_mod = new dist_lcd_mod("lcd_mod"); + + // read_mod->pulse.bind(pulse); + // read_mod->start.bind(start); + // read_mod->ok_for_incr.bind(ok_for_incr); + read_mod->pulse(pulse); + read_mod->start(start); + read_mod->ok_for_incr(ok_for_incr); + + // compute_mod->reset.bind(reset); + // compute_mod->start.bind(start); + // compute_mod->ok_for_incr.bind(ok_for_incr); + // compute_mod->total_dist.bind(total_dist); + // compute_mod->partial_dist.bind(partial_dist); + compute_mod->reset(reset); + compute_mod->start(start); + compute_mod->ok_for_incr(ok_for_incr); + compute_mod->total_dist(total_dist); + compute_mod->partial_dist(partial_dist); + + // lcd_mod->start.bind(start); + // lcd_mod->total_dist.bind(total_dist); + // lcd_mod->partial_dist.bind(partial_dist); + // lcd_mod->total.bind(total); + // lcd_mod->partial.bind(partial); + lcd_mod->start.bind(start); + lcd_mod->total_dist.bind(total_dist); + lcd_mod->partial_dist(partial_dist); + lcd_mod->total(total); + lcd_mod->partial.bind(partial); + + ok_for_incr = false; + total_dist = 0.0; + partial_dist = 0.0; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/driver.cpp b/src/systemc/tests/systemc/misc/v1.0/dash7/driver.cpp new file mode 100644 index 000000000..6c085b77d --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/driver.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- Implementation of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: driver.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:57 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" + +// Driver's output actions. +void +driver_mod::driver_out_proc() +{ + // while (true) { + cout << "Driver is up @ " << sc_time_stamp() << endl; + + // Car is at rest. + speed_set = 0; + reset = false; + start = false; + wait(); + + cout << "Driver started the car @ " << sc_time_stamp() << endl; + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + start = true; + speed_set = 40; + wait(); + + cout << "Driver set the speed to 120 km/h @ " << sc_time_stamp() << endl; + speed_set = 120; + wait(); + + cout << "Driver reset the partial distance odometer @ " + << sc_time_stamp() << endl; + cout << "Driver set the speed to 60 km/h @ " << sc_time_stamp() << endl; + reset = true; + speed_set = 60; + wait(); + + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + speed_set = 40; + wait(); + + cout << "Driver stopped the car @ " << sc_time_stamp() << endl; + wait(); + + sc_stop(); + // } +} + +// Driver's input actions. +void +driver_mod::driver_in_proc() +{ + if (speed.event()) { + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + } + + if (angle.event()) { + cout << "Current speedometer angle = " << angle + << " degrees @ " << sc_time_stamp() << endl; + } + + if (total.event()) { + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + } + + if (partial.event()) { + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/driver.h b/src/systemc/tests/systemc/misc/v1.0/dash7/driver.h new file mode 100644 index 000000000..795fa63b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/driver.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- Definition of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DRIVER_H +#define DRIVER_H + +SC_MODULE( driver_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock for the actions of the driver. + sc_in speed; + sc_in angle; + sc_in total; + sc_in partial; + + // Output ports: + sc_out reset; // Set if the driver wants to reset the partial + // distance odometer. + sc_out speed_set; // Speed of the car as set by the driver. + sc_out start; // Set if the driver starts the car. + + // Driver's actions. + void driver_out_proc(); + void driver_in_proc(); + + SC_CTOR( driver_mod ) + { + SC_CTHREAD( driver_out_proc, clk.pos() ); + + SC_METHOD( driver_in_proc ); + sensitive << speed << angle << total << partial; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/golden/dash7.log b/src/systemc/tests/systemc/misc/v1.0/dash7/golden/dash7.log new file mode 100644 index 000000000..8668a2d8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/golden/dash7.log @@ -0,0 +1,35 @@ +SystemC Simulation +Driver is up @ 0 s +Driver started the car @ 10 us +Driver set the speed to 40 km/h @ 10 us +Current speed displayed = 18.2769 km/h @ 10625 ns +Current speedometer angle = 37.9598 degrees @ 10625 ns +Current speed displayed = 19.8 km/h @ 11225 ns +Current speedometer angle = 41.1231 degrees @ 11225 ns +Driver set the speed to 120 km/h @ 20 us +Current speed displayed = 26.4 km/h @ 20075 ns +Current speedometer angle = 54.8308 degrees @ 20075 ns +Current speed displayed = 59.4 km/h @ 20275 ns +Current speedometer angle = 123.369 degrees @ 20275 ns +Current total distance displayed = 0.01 km @ 22775 ns +Current partial distance displayed = 0.01 km @ 22775 ns +Current total distance displayed = 0.02 km @ 28875 ns +Current partial distance displayed = 0.02 km @ 28875 ns +Driver reset the partial distance odometer @ 30 us +Driver set the speed to 60 km/h @ 30 us +Current speed displayed = 39.6 km/h @ 30175 ns +Current speedometer angle = 82.2462 degrees @ 30175 ns +Current speed displayed = 29.7 km/h @ 30575 ns +Current speedometer angle = 61.6846 degrees @ 30575 ns +Current total distance displayed = 0.03 km @ 39975 ns +Current partial distance displayed = 0 km @ 39975 ns +Driver set the speed to 40 km/h @ 40 us +Current speed displayed = 23.76 km/h @ 40275 ns +Current speedometer angle = 49.3477 degrees @ 40275 ns +Current speed displayed = 19.8 km/h @ 40875 ns +Current speedometer angle = 41.1231 degrees @ 40875 ns +Driver stopped the car @ 50 us +Current total distance displayed = 0.04 km @ 58275 ns +Current partial distance displayed = 0.01 km @ 58275 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash7/main.cpp new file mode 100644 index 000000000..fd1b45ba0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/main.cpp @@ -0,0 +1,157 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), the driver of the car, clocks, and the + pulse generator. The pulses are generated by the sensors placed + around one of the wheel shafts. The rate of pulse generation is + determined by the speed of the car. The driver can start the car, + set its speed, reset the partial distance odometer, and stop the + car (which means he will stop the simulation). One of the clocks + is slow and the other is fast. The fast clock represents the real + time. The slow clock is used to control the actions of the + driver. The signals in this program are traced. + + purpose (in terms of changes to dash6's purpose) -- named port + binding mixed with bind(). Example: let m1 and m2 be two modules, + and p1 and p2 be their ports. Let m2 contain m1. Let's bind these + ports. In dashX with X <= 6, the binding is done in m2's + constructor as m1->p1.bind(p2). In this test, the binding is named + in that the binding is done in m2's constructor as m1->p1(p2). + + The output of this program is identical to that of dash6. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:20 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:58 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Signals for the driver's actions. + sc_signal reset("reset"); + sc_signal speed("speed"); + sc_signal start("start"); + + // Signals observed by the driver. + sc_signal disp_speed("disp_speed"); + sc_signal disp_angle("disp_angle"); + sc_signal disp_total_dist("disp_total_dist"); + sc_signal disp_partial_dist("disp_partial_dist"); + + // Clocks. + sc_clock clk0("slow_clk", SLOW_CLOCK_PERIOD0, SC_NS, 0.5, 0.0, SC_NS, true); + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + driver_mod driver("driver"); + driver(clk0, disp_speed, disp_angle, disp_total_dist, disp_partial_dist, + reset, speed, start); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, start, speed, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, start, speed_pulses, disp_speed, disp_angle); + + dist_mod odometers("odometers"); + odometers(dist_pulses, reset, start, disp_total_dist, disp_partial_dist); + + // Initialize signals: + start = false; + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk0, "slow_clk"); + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + sc_trace(tf, reset, "reset"); + sc_trace(tf, start, "start"); + sc_trace(tf, speed, "speed"); + sc_trace(tf, disp_speed, "disp_speed"); + sc_trace(tf, disp_angle, "disp_angle"); + sc_trace(tf, disp_total_dist, "disp_total_dist"); + sc_trace(tf, disp_partial_dist, "disp_partial_dist"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + sc_trace(tf, speedometer.read_mod->raw_speed, "raw_speed"); + sc_trace(tf, speedometer.filtered_speed, "filtered_speed"); + sc_trace(tf, odometers.ok_for_incr, "ok_for_incr"); + sc_trace(tf, odometers.total_dist, "total_dist"); + sc_trace(tf, odometers.partial_dist, "partial_dist"); + + disp_speed = 0.0; + disp_angle = 0.0; + disp_total_dist = 0.0; + disp_partial_dist = 0.0; + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash7/pulse.cpp new file mode 100644 index 000000000..c2b5031f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/pulse.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + speed_pulse = false; + dist_pulse = false; + + // Wait until the car is started. + + do { wait(); } while (start != true); + + /* + do { + wait(); + } while (start == false); + */ + + while (true) { + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash7/pulse.h new file mode 100644 index 000000000..b1206d185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/pulse.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_in start; // Becomes true if the car's started. + sc_in speed; // Speed of the car set by the driver. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_CTHREAD( gen_pulse_proc, clk.pos() ); + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash7/speed.cpp new file mode 100644 index 000000000..10e29ce12 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/speed.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + if (start) + elapsed_time = elapsed_time + 1; + else + elapsed_time = 0; +} + +// Compute speed. +void +speed_read_mod::read_speed_proc() +{ + wait(); + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + if (start) + raw_speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + else + raw_speed = 0.0; + + // Reset timer. + elapsed_time = 0; + } +} + +// Filter speed. +void +speed_read_mod::filter_speed_proc() +{ + if (start) + filtered_speed = raw_speed; + else + filtered_speed = 0.0; +} + +// Compute needle angle and drive the speedometer. +void +speed_pwm_mod::pwm_driver_proc() +{ + if (start) { + speed = filtered_speed; + angle = filtered_speed * MAX_ANGLE / MAX_SPEED; + } + else { + speed = 0.0; + angle = 0.0; + } +} + + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash7/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash7/speed.h new file mode 100644 index 000000000..b56b3a17e --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash7/speed.h @@ -0,0 +1,148 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_read_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out filtered_speed; // Filtered speed. + + // Inout ports: + sc_inout elapsed_time; + + // Internal signals: + sc_signal raw_speed; + + // Compute speed. + void read_speed_proc(); + + // Filter speed. + void filter_speed_proc(); + + SC_CTOR( speed_read_mod ) + { + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + + SC_METHOD( filter_speed_proc ); + sensitive << raw_speed; + + raw_speed = 0.0; + } +}; + +SC_MODULE( speed_pwm_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in filtered_speed; + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Compute needle angle and drive the speedometer. + void pwm_driver_proc(); + + SC_CTOR( speed_pwm_mod ) + { + SC_METHOD( pwm_driver_proc ); + sensitive << filtered_speed; + } +}; + +SC_MODULE( speed_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Internal signals: + sc_signal elapsed_time; + sc_signal filtered_speed; + + // Internal models: + speed_read_mod *read_mod; + speed_pwm_mod *pwm_mod; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + SC_CTOR( speed_mod ) + { + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + read_mod = new speed_read_mod("read_mod"); + pwm_mod = new speed_pwm_mod("pwm_mod"); + + // read_mod->start.bind(start); + // read_mod->pulse.bind(pulse); + // read_mod->elapsed_time.bind(elapsed_time); + // read_mod->filtered_speed.bind(filtered_speed); + read_mod->start(start); + read_mod->pulse(pulse); + read_mod->elapsed_time(elapsed_time); + read_mod->filtered_speed(filtered_speed); + + // pwm_mod->start.bind(start); + // pwm_mod->filtered_speed.bind(filtered_speed); + // pwm_mod->speed.bind(speed); + // pwm_mod->angle.bind(angle); + pwm_mod->start(start); + pwm_mod->filtered_speed.bind(filtered_speed); + pwm_mod->speed.bind(speed); + pwm_mod->angle(angle); + + elapsed_time = 0; + filtered_speed = 0.0; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/const.h b/src/systemc/tests/systemc/misc/v1.0/dash8/const.h new file mode 100644 index 000000000..9bc1ed3bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/dash8.f b/src/systemc/tests/systemc/misc/v1.0/dash8/dash8.f new file mode 100644 index 000000000..356623a35 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/dash8.f @@ -0,0 +1,5 @@ +dash8/driver.cpp +dash8/dist.cpp +dash8/main.cpp +dash8/pulse.cpp +dash8/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash8/dist.cpp new file mode 100644 index 000000000..7080a461f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/dist.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +bool dist_compute_mod::prev_reset; +double dist_compute_mod::total_compute_dist; +double dist_compute_mod::partial_compute_dist; + +// Get the pulses for one distance increment. +void +dist_read_mod::get_dist_proc() +{ + wait(); + + bool ok = false; + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + if (start) + ok = !ok; + else + ok = false; + + ok_for_incr = ok; + } +} + +// Compute total distance. +void +dist_compute_mod::compute_total_proc() +{ + if (start) + total_compute_dist += 1.0; + else + total_compute_dist = 0.0; + + total_dist = total_compute_dist; +} + +// Compute partial distance. +void +dist_compute_mod::compute_partial_proc() +{ + if (start) { + + // Implement reset.event(): + if (prev_reset != (bool) reset) + partial_compute_dist = 0.0; + else + partial_compute_dist += 1.0; + + prev_reset = reset; + + } + else + partial_compute_dist = 0.0; + + partial_dist = partial_compute_dist; +} + +// LCD display driver. +void +dist_lcd_mod::lcd_driver_proc() +{ + if (start) { + + if (total_dist.event()) + total = total_dist * DIST_INCR; + + if (partial_dist.event()) + partial = partial_dist * DIST_INCR; + + } + else { + total = 0.0; + partial = 0.0; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash8/dist.h new file mode 100644 index 000000000..6cf8446f0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/dist.h @@ -0,0 +1,183 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_read_mod ) +{ + // Input ports: + sc_in pulse; // Pulse coming from the pulse generator. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out ok_for_incr; + + // Get the pulses for one distance increment. + void get_dist_proc(); + + SC_CTOR( dist_read_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + } +}; + +SC_MODULE( dist_compute_mod ) +{ + // Input ports: + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + sc_in ok_for_incr; + + // Output ports: + sc_out total_dist; + sc_out partial_dist; + + // Internal variables: + static bool prev_reset; + static double total_compute_dist; + static double partial_compute_dist; + + // Compute total and partial distances. + void compute_total_proc(); + void compute_partial_proc(); + + SC_CTOR( dist_compute_mod ) + { + SC_METHOD( compute_total_proc ); + sensitive << ok_for_incr; + + SC_METHOD( compute_partial_proc ); + sensitive << ok_for_incr; + + prev_reset = false; + total_compute_dist = 0.0; + partial_compute_dist = 0.0; + } +}; + +SC_MODULE( dist_lcd_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in total_dist; + sc_in partial_dist; + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // LCD display driver. + void lcd_driver_proc(); + + SC_CTOR( dist_lcd_mod ) + { + SC_METHOD( lcd_driver_proc ); + sensitive << total_dist << partial_dist; + } +}; + +SC_MODULE( dist_mod ) +{ + // Ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // Internal signals: + sc_signal ok_for_incr; + sc_signal total_dist; + sc_signal partial_dist; + + // Internal models: + dist_read_mod *read_mod; + dist_compute_mod *compute_mod; + dist_lcd_mod *lcd_mod; + + SC_CTOR( dist_mod ) + { + read_mod = new dist_read_mod("read_mod"); + compute_mod = new dist_compute_mod("compute_mod"); + lcd_mod = new dist_lcd_mod("lcd_mod"); + + // read_mod->pulse.bind(pulse); + // read_mod->start.bind(start); + // read_mod->ok_for_incr.bind(ok_for_incr); + + read_mod->pulse(pulse); + read_mod->start(start); + read_mod->ok_for_incr(ok_for_incr); + + // (*read_mod)(pulse, start, ok_for_incr); + + // compute_mod->reset.bind(reset); + // compute_mod->start.bind(start); + // compute_mod->ok_for_incr.bind(ok_for_incr); + // compute_mod->total_dist.bind(total_dist); + // compute_mod->partial_dist.bind(partial_dist); + compute_mod->reset(reset); + compute_mod->start(start); + compute_mod->ok_for_incr.bind(ok_for_incr); + compute_mod->total_dist.bind(total_dist); + compute_mod->partial_dist(partial_dist); + + // lcd_mod->start.bind(start); + // lcd_mod->total_dist.bind(total_dist); + // lcd_mod->partial_dist.bind(partial_dist); + // lcd_mod->total.bind(total); + // lcd_mod->partial.bind(partial); + + lcd_mod->start(start); + lcd_mod->total_dist(total_dist); + lcd_mod->partial_dist(partial_dist); + lcd_mod->total(total); + lcd_mod->partial(partial); + + // *lcd_mod << start, total_dist, partial_dist, total, partial; + + ok_for_incr = false; + total_dist = 0.0; + partial_dist = 0.0; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/driver.cpp b/src/systemc/tests/systemc/misc/v1.0/dash8/driver.cpp new file mode 100644 index 000000000..a16743f2f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/driver.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- Implementation of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: driver.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:58 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" + +// Driver's output actions. +void +driver_mod::driver_out_proc() +{ + // while (true) { + cout << "Driver is up @ " << sc_time_stamp() << endl; + + // Car is at rest. + speed_set = 0; + reset = false; + start = false; + wait(); + + cout << "Driver started the car @ " << sc_time_stamp() << endl; + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + start = true; + speed_set = 40; + wait(); + + cout << "Driver set the speed to 120 km/h @ " << sc_time_stamp() << endl; + speed_set = 120; + wait(); + + cout << "Driver reset the partial distance odometer @ " + << sc_time_stamp() << endl; + cout << "Driver set the speed to 60 km/h @ " << sc_time_stamp() << endl; + reset = true; + speed_set = 60; + wait(); + + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + speed_set = 40; + wait(); + + cout << "Driver stopped the car @ " << sc_time_stamp() << endl; + wait(); + + sc_stop(); + // } +} + +// Driver's input actions. +void +driver_mod::driver_in_proc() +{ + if (speed.event()) { + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + } + + if (angle.event()) { + cout << "Current speedometer angle = " << angle + << " degrees @ " << sc_time_stamp() << endl; + } + + if (total.event()) { + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + } + + if (partial.event()) { + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/driver.h b/src/systemc/tests/systemc/misc/v1.0/dash8/driver.h new file mode 100644 index 000000000..795fa63b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/driver.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- Definition of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DRIVER_H +#define DRIVER_H + +SC_MODULE( driver_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock for the actions of the driver. + sc_in speed; + sc_in angle; + sc_in total; + sc_in partial; + + // Output ports: + sc_out reset; // Set if the driver wants to reset the partial + // distance odometer. + sc_out speed_set; // Speed of the car as set by the driver. + sc_out start; // Set if the driver starts the car. + + // Driver's actions. + void driver_out_proc(); + void driver_in_proc(); + + SC_CTOR( driver_mod ) + { + SC_CTHREAD( driver_out_proc, clk.pos() ); + + SC_METHOD( driver_in_proc ); + sensitive << speed << angle << total << partial; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/golden/dash8.log b/src/systemc/tests/systemc/misc/v1.0/dash8/golden/dash8.log new file mode 100644 index 000000000..8668a2d8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/golden/dash8.log @@ -0,0 +1,35 @@ +SystemC Simulation +Driver is up @ 0 s +Driver started the car @ 10 us +Driver set the speed to 40 km/h @ 10 us +Current speed displayed = 18.2769 km/h @ 10625 ns +Current speedometer angle = 37.9598 degrees @ 10625 ns +Current speed displayed = 19.8 km/h @ 11225 ns +Current speedometer angle = 41.1231 degrees @ 11225 ns +Driver set the speed to 120 km/h @ 20 us +Current speed displayed = 26.4 km/h @ 20075 ns +Current speedometer angle = 54.8308 degrees @ 20075 ns +Current speed displayed = 59.4 km/h @ 20275 ns +Current speedometer angle = 123.369 degrees @ 20275 ns +Current total distance displayed = 0.01 km @ 22775 ns +Current partial distance displayed = 0.01 km @ 22775 ns +Current total distance displayed = 0.02 km @ 28875 ns +Current partial distance displayed = 0.02 km @ 28875 ns +Driver reset the partial distance odometer @ 30 us +Driver set the speed to 60 km/h @ 30 us +Current speed displayed = 39.6 km/h @ 30175 ns +Current speedometer angle = 82.2462 degrees @ 30175 ns +Current speed displayed = 29.7 km/h @ 30575 ns +Current speedometer angle = 61.6846 degrees @ 30575 ns +Current total distance displayed = 0.03 km @ 39975 ns +Current partial distance displayed = 0 km @ 39975 ns +Driver set the speed to 40 km/h @ 40 us +Current speed displayed = 23.76 km/h @ 40275 ns +Current speedometer angle = 49.3477 degrees @ 40275 ns +Current speed displayed = 19.8 km/h @ 40875 ns +Current speedometer angle = 41.1231 degrees @ 40875 ns +Driver stopped the car @ 50 us +Current total distance displayed = 0.04 km @ 58275 ns +Current partial distance displayed = 0.01 km @ 58275 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash8/main.cpp new file mode 100644 index 000000000..f00f7f46a --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/main.cpp @@ -0,0 +1,164 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), the driver of the car, clocks, and the + pulse generator. The pulses are generated by the sensors placed + around one of the wheel shafts. The rate of pulse generation is + determined by the speed of the car. The driver can start the car, + set its speed, reset the partial distance odometer, and stop the + car (which means he will stop the simulation). One of the clocks + is slow and the other is fast. The fast clock represents the real + time. The slow clock is used to control the actions of the + driver. The signals in this program are traced. + + purpose (in terms of changes to dash7's purpose) -- Positional + connection method for binding the ports of modules. Example: Let m + be a module with ports p1 and p2. Let m_ptr be a pointer to m, and + let p1_arg and p2_arg be the ports that we want to bind to p1 and + p2 of m. Then, we can do the binding in one of the following: + + m(p1_arg, p2_arg); or (*m_ptr)(p1_arg, p2_arg); + m.p1(p1_arg); m.p2.bind(p2_arg); or + m_ptr->p1(p1_arg); m->p2.bind(p2_arg); + + The output of this program is identical to that of dash6 and dash7. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:20 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:58 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Signals for the driver's actions. + sc_signal reset("reset"); + sc_signal speed("speed"); + sc_signal start("start"); + + // Signals observed by the driver. + sc_signal disp_speed("disp_speed"); + sc_signal disp_angle("disp_angle"); + sc_signal disp_total_dist("disp_total_dist"); + sc_signal disp_partial_dist("disp_partial_dist"); + + // Clocks. + sc_clock clk0("slow_clk", SLOW_CLOCK_PERIOD0, SC_NS, 0.5, 0.0, SC_NS, true); + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + driver_mod driver("driver"); + driver(clk0, disp_speed, disp_angle, disp_total_dist, + disp_partial_dist, reset, speed, start); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, start, speed, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, start, speed_pulses, disp_speed, disp_angle); + + dist_mod odometers("odometers"); + odometers.pulse(dist_pulses); + odometers.reset(reset); + odometers.start.bind(start); + odometers.total(disp_total_dist); + odometers.partial.bind(disp_partial_dist); + + // Initialize signals: + start = false; + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk0, "slow_clk"); + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + sc_trace(tf, reset, "reset"); + sc_trace(tf, start, "start"); + sc_trace(tf, speed, "speed"); + sc_trace(tf, disp_speed, "disp_speed"); + sc_trace(tf, disp_angle, "disp_angle"); + sc_trace(tf, disp_total_dist, "disp_total_dist"); + sc_trace(tf, disp_partial_dist, "disp_partial_dist"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + sc_trace(tf, speedometer.read_mod->raw_speed, "raw_speed"); + sc_trace(tf, speedometer.filtered_speed, "filtered_speed"); + sc_trace(tf, odometers.ok_for_incr, "ok_for_incr"); + sc_trace(tf, odometers.total_dist, "total_dist"); + sc_trace(tf, odometers.partial_dist, "partial_dist"); + + disp_speed = 0.0; + disp_angle = 0.0; + disp_total_dist = 0.0; + disp_partial_dist = 0.0; + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash8/pulse.cpp new file mode 100644 index 000000000..c2b5031f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/pulse.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + speed_pulse = false; + dist_pulse = false; + + // Wait until the car is started. + + do { wait(); } while (start != true); + + /* + do { + wait(); + } while (start == false); + */ + + while (true) { + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash8/pulse.h new file mode 100644 index 000000000..b1206d185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/pulse.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_in start; // Becomes true if the car's started. + sc_in speed; // Speed of the car set by the driver. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_CTHREAD( gen_pulse_proc, clk.pos() ); + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash8/speed.cpp new file mode 100644 index 000000000..10e29ce12 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/speed.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + if (start) + elapsed_time = elapsed_time + 1; + else + elapsed_time = 0; +} + +// Compute speed. +void +speed_read_mod::read_speed_proc() +{ + wait(); + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + if (start) + raw_speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + else + raw_speed = 0.0; + + // Reset timer. + elapsed_time = 0; + } +} + +// Filter speed. +void +speed_read_mod::filter_speed_proc() +{ + if (start) + filtered_speed = raw_speed; + else + filtered_speed = 0.0; +} + +// Compute needle angle and drive the speedometer. +void +speed_pwm_mod::pwm_driver_proc() +{ + if (start) { + speed = filtered_speed; + angle = filtered_speed * MAX_ANGLE / MAX_SPEED; + } + else { + speed = 0.0; + angle = 0.0; + } +} + + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash8/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash8/speed.h new file mode 100644 index 000000000..181cac253 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash8/speed.h @@ -0,0 +1,154 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_read_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out filtered_speed; // Filtered speed. + + // Inout ports: + sc_inout elapsed_time; + + // Internal signals: + sc_signal raw_speed; + + // Compute speed. + void read_speed_proc(); + + // Filter speed. + void filter_speed_proc(); + + SC_CTOR( speed_read_mod ) + { + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + + SC_METHOD( filter_speed_proc ); + sensitive << raw_speed; + + raw_speed = 0.0; + } +}; + +SC_MODULE( speed_pwm_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in filtered_speed; + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Compute needle angle and drive the speedometer. + void pwm_driver_proc(); + + SC_CTOR( speed_pwm_mod ) + { + SC_METHOD( pwm_driver_proc ); + sensitive << filtered_speed; + } +}; + +SC_MODULE( speed_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Internal signals: + sc_signal elapsed_time; + sc_signal filtered_speed; + + // Internal models: + speed_read_mod *read_mod; + speed_pwm_mod *pwm_mod; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + SC_CTOR( speed_mod ) + { + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + read_mod = new speed_read_mod("read_mod"); + pwm_mod = new speed_pwm_mod("pwm_mod"); + + // read_mod->start.bind(start); + // read_mod->pulse.bind(pulse); + // read_mod->filtered_speed.bind(filtered_speed); + // read_mod->elapsed_time.bind(elapsed_time); + + read_mod->start(start); + read_mod->pulse(pulse); + read_mod->filtered_speed(filtered_speed); + read_mod->elapsed_time(elapsed_time); + + // (*read_mod)(start, pulse, filtered_speed, elapsed_time); + + // pwm_mod->start.bind(start); + // pwm_mod->filtered_speed.bind(filtered_speed); + // pwm_mod->speed.bind(speed); + // pwm_mod->angle.bind(angle); + + pwm_mod->start(start); + pwm_mod->filtered_speed(filtered_speed); + pwm_mod->speed(speed); + pwm_mod->angle(angle); + + // *pwm_mod << start << filtered_speed << speed << angle; + + elapsed_time = 0; + filtered_speed = 0.0; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/const.h b/src/systemc/tests/systemc/misc/v1.0/dash9/const.h new file mode 100644 index 000000000..9bc1ed3bf --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/const.h @@ -0,0 +1,62 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + const.h -- Constants for the dashboard controller. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef CONST_H +#define CONST_H + +const int MAX_SPEED = 130; // Car speed in km/h. +const int MAX_ANGLE = 270; // Needle angle in the speedometer in degrees. + +const double DIST_BETWEEN_TWO_PULSES = 0.00066 / 2; // 1/2 of a tire in km. +const double DIST_INCR = 0.01; // One distance increment in km. + +// Two pulses are needed to compute speed. +const int NUM_PULSES_FOR_SPEED = 2; + +// DIST_INCR / DIST_BETWEEN_TWO_PULSES +const int NUM_PULSES_FOR_DIST_INCR = 61; + +const int SLOW_CLOCK_PERIOD0 = 10000; // in 10 x milliseconds. +const int FAST_CLOCK_PERIOD1 = 50; // in 10 x milliseconds. +const int ONE_HOUR = 36000000; // in 10 x milliseconds. +const int PERIODS_PER_HOUR = ONE_HOUR / FAST_CLOCK_PERIOD1; + +#define AWAIT(N) \ + for (register int i = 0; i < N; ++i) \ + wait(); + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/dash9.f b/src/systemc/tests/systemc/misc/v1.0/dash9/dash9.f new file mode 100644 index 000000000..bfe0d5fe0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/dash9.f @@ -0,0 +1,5 @@ +dash9/driver.cpp +dash9/dist.cpp +dash9/main.cpp +dash9/pulse.cpp +dash9/speed.cpp diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/dist.cpp b/src/systemc/tests/systemc/misc/v1.0/dash9/dist.cpp new file mode 100644 index 000000000..7080a461f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/dist.cpp @@ -0,0 +1,134 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.cpp -- Implementation of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: dist.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "dist.h" + +bool dist_compute_mod::prev_reset; +double dist_compute_mod::total_compute_dist; +double dist_compute_mod::partial_compute_dist; + +// Get the pulses for one distance increment. +void +dist_read_mod::get_dist_proc() +{ + wait(); + + bool ok = false; + + while (true) { + + // More than one pulse is needed for a distance increment. This + // function collects NUM_PULSES_FOR_DIST_INCR pulses for that + // purpose. + AWAIT(NUM_PULSES_FOR_DIST_INCR); + + if (start) + ok = !ok; + else + ok = false; + + ok_for_incr = ok; + } +} + +// Compute total distance. +void +dist_compute_mod::compute_total_proc() +{ + if (start) + total_compute_dist += 1.0; + else + total_compute_dist = 0.0; + + total_dist = total_compute_dist; +} + +// Compute partial distance. +void +dist_compute_mod::compute_partial_proc() +{ + if (start) { + + // Implement reset.event(): + if (prev_reset != (bool) reset) + partial_compute_dist = 0.0; + else + partial_compute_dist += 1.0; + + prev_reset = reset; + + } + else + partial_compute_dist = 0.0; + + partial_dist = partial_compute_dist; +} + +// LCD display driver. +void +dist_lcd_mod::lcd_driver_proc() +{ + if (start) { + + if (total_dist.event()) + total = total_dist * DIST_INCR; + + if (partial_dist.event()) + partial = partial_dist * DIST_INCR; + + } + else { + total = 0.0; + partial = 0.0; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/dist.h b/src/systemc/tests/systemc/misc/v1.0/dash9/dist.h new file mode 100644 index 000000000..6cf8446f0 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/dist.h @@ -0,0 +1,183 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + dist.h -- Definition of the odometers. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DIST_H +#define DIST_H + +SC_MODULE( dist_read_mod ) +{ + // Input ports: + sc_in pulse; // Pulse coming from the pulse generator. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out ok_for_incr; + + // Get the pulses for one distance increment. + void get_dist_proc(); + + SC_CTOR( dist_read_mod ) + { + SC_THREAD( get_dist_proc ); + sensitive << pulse.pos(); + } +}; + +SC_MODULE( dist_compute_mod ) +{ + // Input ports: + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + sc_in ok_for_incr; + + // Output ports: + sc_out total_dist; + sc_out partial_dist; + + // Internal variables: + static bool prev_reset; + static double total_compute_dist; + static double partial_compute_dist; + + // Compute total and partial distances. + void compute_total_proc(); + void compute_partial_proc(); + + SC_CTOR( dist_compute_mod ) + { + SC_METHOD( compute_total_proc ); + sensitive << ok_for_incr; + + SC_METHOD( compute_partial_proc ); + sensitive << ok_for_incr; + + prev_reset = false; + total_compute_dist = 0.0; + partial_compute_dist = 0.0; + } +}; + +SC_MODULE( dist_lcd_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in total_dist; + sc_in partial_dist; + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // LCD display driver. + void lcd_driver_proc(); + + SC_CTOR( dist_lcd_mod ) + { + SC_METHOD( lcd_driver_proc ); + sensitive << total_dist << partial_dist; + } +}; + +SC_MODULE( dist_mod ) +{ + // Ports: + sc_in pulse; // Pulse coming ftom the pulse generator. + sc_in reset; // Reset the partial distance odometer if true. + sc_in start; // Becomes true if the car's started. + + // Output ports: + sc_out total; // Total distance. + sc_out partial; // Partial distance. + + // Internal signals: + sc_signal ok_for_incr; + sc_signal total_dist; + sc_signal partial_dist; + + // Internal models: + dist_read_mod *read_mod; + dist_compute_mod *compute_mod; + dist_lcd_mod *lcd_mod; + + SC_CTOR( dist_mod ) + { + read_mod = new dist_read_mod("read_mod"); + compute_mod = new dist_compute_mod("compute_mod"); + lcd_mod = new dist_lcd_mod("lcd_mod"); + + // read_mod->pulse.bind(pulse); + // read_mod->start.bind(start); + // read_mod->ok_for_incr.bind(ok_for_incr); + + read_mod->pulse(pulse); + read_mod->start(start); + read_mod->ok_for_incr(ok_for_incr); + + // (*read_mod)(pulse, start, ok_for_incr); + + // compute_mod->reset.bind(reset); + // compute_mod->start.bind(start); + // compute_mod->ok_for_incr.bind(ok_for_incr); + // compute_mod->total_dist.bind(total_dist); + // compute_mod->partial_dist.bind(partial_dist); + compute_mod->reset(reset); + compute_mod->start(start); + compute_mod->ok_for_incr.bind(ok_for_incr); + compute_mod->total_dist.bind(total_dist); + compute_mod->partial_dist(partial_dist); + + // lcd_mod->start.bind(start); + // lcd_mod->total_dist.bind(total_dist); + // lcd_mod->partial_dist.bind(partial_dist); + // lcd_mod->total.bind(total); + // lcd_mod->partial.bind(partial); + + lcd_mod->start(start); + lcd_mod->total_dist(total_dist); + lcd_mod->partial_dist(partial_dist); + lcd_mod->total(total); + lcd_mod->partial(partial); + + // *lcd_mod << start, total_dist, partial_dist, total, partial; + + ok_for_incr = false; + total_dist = 0.0; + partial_dist = 0.0; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/driver.cpp b/src/systemc/tests/systemc/misc/v1.0/dash9/driver.cpp new file mode 100644 index 000000000..8f36a3e4f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/driver.cpp @@ -0,0 +1,124 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.cpp -- Implementation of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: driver.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.4 2006/01/24 21:05:59 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" + +// Driver's output actions. +void +driver_mod::driver_out_proc() +{ + // while (true) { + cout << "Driver is up @ " << sc_time_stamp() << endl; + + // Car is at rest. + speed_set = 0; + reset = false; + start = false; + wait(); + + cout << "Driver started the car @ " << sc_time_stamp() << endl; + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + start = true; + speed_set = 40; + wait(); + + cout << "Driver set the speed to 120 km/h @ " << sc_time_stamp() << endl; + speed_set = 120; + wait(); + + cout << "Driver reset the partial distance odometer @ " + << sc_time_stamp() << endl; + cout << "Driver set the speed to 60 km/h @ " << sc_time_stamp() << endl; + reset = true; + speed_set = 60; + wait(); + + cout << "Driver set the speed to 40 km/h @ " << sc_time_stamp() << endl; + speed_set = 40; + wait(); + + cout << "Driver stopped the car @ " << sc_time_stamp() << endl; + wait(); + + sc_stop(); + // } +} + +// Driver's input actions. +void +driver_mod::driver_in_proc() +{ + if (speed.event()) { + cout << "Current speed displayed = " + << speed << " km/h @ " << sc_time_stamp() << endl; + } + + if (angle.event()) { + cout << "Current speedometer angle = " << angle + << " degrees @ " << sc_time_stamp() << endl; + } + + if (total.event()) { + cout << "Current total distance displayed = " + << total << " km @ " << sc_time_stamp() << endl; + } + + if (partial.event()) { + cout << "Current partial distance displayed = " + << partial << " km @ " << sc_time_stamp() << endl; + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/driver.h b/src/systemc/tests/systemc/misc/v1.0/dash9/driver.h new file mode 100644 index 000000000..795fa63b5 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/driver.h @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + driver.h -- Definition of the driver. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef DRIVER_H +#define DRIVER_H + +SC_MODULE( driver_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock for the actions of the driver. + sc_in speed; + sc_in angle; + sc_in total; + sc_in partial; + + // Output ports: + sc_out reset; // Set if the driver wants to reset the partial + // distance odometer. + sc_out speed_set; // Speed of the car as set by the driver. + sc_out start; // Set if the driver starts the car. + + // Driver's actions. + void driver_out_proc(); + void driver_in_proc(); + + SC_CTOR( driver_mod ) + { + SC_CTHREAD( driver_out_proc, clk.pos() ); + + SC_METHOD( driver_in_proc ); + sensitive << speed << angle << total << partial; + } +}; + +#endif diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/golden/dash9.log b/src/systemc/tests/systemc/misc/v1.0/dash9/golden/dash9.log new file mode 100644 index 000000000..8668a2d8a --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/golden/dash9.log @@ -0,0 +1,35 @@ +SystemC Simulation +Driver is up @ 0 s +Driver started the car @ 10 us +Driver set the speed to 40 km/h @ 10 us +Current speed displayed = 18.2769 km/h @ 10625 ns +Current speedometer angle = 37.9598 degrees @ 10625 ns +Current speed displayed = 19.8 km/h @ 11225 ns +Current speedometer angle = 41.1231 degrees @ 11225 ns +Driver set the speed to 120 km/h @ 20 us +Current speed displayed = 26.4 km/h @ 20075 ns +Current speedometer angle = 54.8308 degrees @ 20075 ns +Current speed displayed = 59.4 km/h @ 20275 ns +Current speedometer angle = 123.369 degrees @ 20275 ns +Current total distance displayed = 0.01 km @ 22775 ns +Current partial distance displayed = 0.01 km @ 22775 ns +Current total distance displayed = 0.02 km @ 28875 ns +Current partial distance displayed = 0.02 km @ 28875 ns +Driver reset the partial distance odometer @ 30 us +Driver set the speed to 60 km/h @ 30 us +Current speed displayed = 39.6 km/h @ 30175 ns +Current speedometer angle = 82.2462 degrees @ 30175 ns +Current speed displayed = 29.7 km/h @ 30575 ns +Current speedometer angle = 61.6846 degrees @ 30575 ns +Current total distance displayed = 0.03 km @ 39975 ns +Current partial distance displayed = 0 km @ 39975 ns +Driver set the speed to 40 km/h @ 40 us +Current speed displayed = 23.76 km/h @ 40275 ns +Current speedometer angle = 49.3477 degrees @ 40275 ns +Current speed displayed = 19.8 km/h @ 40875 ns +Current speedometer angle = 41.1231 degrees @ 40875 ns +Driver stopped the car @ 50 us +Current total distance displayed = 0.04 km @ 58275 ns +Current partial distance displayed = 0.01 km @ 58275 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/main.cpp b/src/systemc/tests/systemc/misc/v1.0/dash9/main.cpp new file mode 100644 index 000000000..22c03af23 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/main.cpp @@ -0,0 +1,169 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- Main function for the dashboard controller for a + car. This controller contains a speedometer, two odometers (total + and partial distance), the driver of the car, clocks, and the + pulse generator. The pulses are generated by the sensors placed + around one of the wheel shafts. The rate of pulse generation is + determined by the speed of the car. The driver can start the car, + set its speed, reset the partial distance odometer, and stop the + car (which means he will stop the simulation). One of the clocks + is slow and the other is fast. The fast clock represents the real + time. The slow clock is used to control the actions of the + driver. The signals in this program are traced. + + dash8's purpose (in terms of changes to dash7's purpose) -- + Positional connection method for binding the ports of modules. + Example: Let m be a module with ports p1 and p2. Let m_ptr be a + pointer to m, and let p1_arg and p2_arg be the ports that we want + to bind to p1 and p2 of m. Then, we can do the binding in one of + the following: + + m(p1_arg, p2_arg); or (*m_ptr)(p1_arg, p2_arg); + + m.p1(p1_arg); m.p2.bind(p2_arg); or + m_ptr->p1(p1_arg); m->p2.bind(p2_arg); + + The output of this program is identical to that of dash[6-8]. + + purpose (in terms of changes to dash8's purpose) -- the use of + module and process declaration macros, defined in systemc.h. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: main.cpp,v $ +// Revision 1.2 2011/01/07 01:20:20 acg +// Andy Goodrich: update for new IEEE 1666. +// +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.5 2006/01/24 21:05:59 acg +// Andy Goodrich: replacement of deprecated features with their non-deprecated +// counterparts. +// +// Revision 1.4 2006/01/20 00:43:24 acg +// Andy Goodrich: Changed over to use putenv() instead of setenv() to accommodate old versions of Solaris. +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "driver.h" +#include "pulse.h" +#include "speed.h" +#include "dist.h" + +int +sc_main(int argc, char *argv[]) +{ + // Pulses for the speedometer and odometers, generated by the pulse + // generator. + sc_signal speed_pulses("speed_pulses"); + sc_signal dist_pulses("dist_pulses"); + // Signals for the driver's actions. + sc_signal reset("reset"); + sc_signal speed("speed"); + sc_signal start("start"); + + // Signals observed by the driver. + sc_signal disp_speed("disp_speed"); + sc_signal disp_angle("disp_angle"); + sc_signal disp_total_dist("disp_total_dist"); + sc_signal disp_partial_dist("disp_partial_dist"); + + // Clocks. + sc_clock clk0("slow_clk", SLOW_CLOCK_PERIOD0, SC_NS, 0.5, 0.0, SC_NS, true); + sc_clock clk1("fast_clk", FAST_CLOCK_PERIOD1, SC_NS, 0.5, 0.0, SC_NS, false); + + driver_mod driver("driver"); + driver(clk0, disp_speed, disp_angle, disp_total_dist, + disp_partial_dist, reset, speed, start); + + gen_pulse_mod gen_pulse("gen_pulse"); + gen_pulse(clk1, start, speed, speed_pulses, dist_pulses); + + speed_mod speedometer("speedometer"); + speedometer(clk1, start, speed_pulses, disp_speed, disp_angle); + + dist_mod odometers("odometers"); + odometers.pulse(dist_pulses); + odometers.reset(reset); + odometers.start.bind(start); + odometers.total(disp_total_dist); + odometers.partial.bind(disp_partial_dist); + + // Initialize signals: + start = false; + + // Tracing: + // Trace file creation. + sc_trace_file *tf = sc_create_vcd_trace_file("dash"); + // External signals. + sc_trace(tf, clk0, "slow_clk"); + sc_trace(tf, clk1, "fast_clk"); + sc_trace(tf, speed_pulses, "speed_pulses"); + sc_trace(tf, dist_pulses, "dist_pulses"); + sc_trace(tf, reset, "reset"); + sc_trace(tf, start, "start"); + sc_trace(tf, speed, "speed"); + sc_trace(tf, disp_speed, "disp_speed"); + sc_trace(tf, disp_angle, "disp_angle"); + sc_trace(tf, disp_total_dist, "disp_total_dist"); + sc_trace(tf, disp_partial_dist, "disp_partial_dist"); + // Internal signals. + sc_trace(tf, speedometer.elapsed_time, "elapsed_time"); + sc_trace(tf, speedometer.read_mod->raw_speed, "raw_speed"); + sc_trace(tf, speedometer.filtered_speed, "filtered_speed"); + sc_trace(tf, odometers.ok_for_incr, "ok_for_incr"); + sc_trace(tf, odometers.total_dist, "total_dist"); + sc_trace(tf, odometers.partial_dist, "partial_dist"); + + disp_speed = 0.0; + disp_angle = 0.0; + disp_total_dist = 0.0; + disp_partial_dist = 0.0; + + sc_start(); + + return 0; +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/pulse.cpp b/src/systemc/tests/systemc/misc/v1.0/dash9/pulse.cpp new file mode 100644 index 000000000..c2b5031f2 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/pulse.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.cpp -- Implementation of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: pulse.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "pulse.h" + +// Find the pulse period to produce speed. +// This function also rounds the period to the nearest integer. +int +gen_pulse_mod::find_period(int speed) +{ + if (speed <= 0) + return 1; + + const double num = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / 2; + + double dp = num / speed; + int ip = int(dp); + + ip = ip + ((dp - ip) >= double(0.5) ? 1 : 0); + + return ip; +} + +// Generate pulses for speedometer and odometers. +void +gen_pulse_mod::gen_pulse_proc() +{ + speed_pulse = false; + dist_pulse = false; + + // Wait until the car is started. + + do { wait(); } while (start != true); + + /* + do { + wait(); + } while (start == false); + */ + + while (true) { + + speed_pulse = true; + dist_pulse = true; + AWAIT(find_period(speed)); + + speed_pulse = false; + dist_pulse = false; + AWAIT(find_period(speed)); + } +} + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/pulse.h b/src/systemc/tests/systemc/misc/v1.0/dash9/pulse.h new file mode 100644 index 000000000..b1206d185 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/pulse.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + pulse.h -- Definition of the pulse generator. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef PULSE_H +#define PULSE_H + +SC_MODULE( gen_pulse_mod ) +{ + // Ports: + sc_in_clk clk; // Clock for the pulse generator. + sc_in start; // Becomes true if the car's started. + sc_in speed; // Speed of the car set by the driver. + sc_out speed_pulse; // Pulses for the speedometer. + sc_out dist_pulse; // Pulses for the odometers. + + // Find the pulse period to produce speed. + int find_period(int speed); + + // Generate pulses for speedometer and odometers. + void gen_pulse_proc(); + + SC_CTOR( gen_pulse_mod ) + { + SC_CTHREAD( gen_pulse_proc, clk.pos() ); + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/speed.cpp b/src/systemc/tests/systemc/misc/v1.0/dash9/speed.cpp new file mode 100644 index 000000000..10e29ce12 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/speed.cpp @@ -0,0 +1,111 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.cpp -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// $Log: speed.cpp,v $ +// Revision 1.1.1.1 2006/12/15 20:26:24 acg +// systemc_tests-2.3 +// +// Revision 1.3 2006/01/19 00:48:20 acg +// Andy Goodrich: Changes for the fact signal write checking is enabled. +// +// Revision 1.2 2006/01/18 00:23:51 acg +// Change over from SC_NO_WRITE_CHECK to sc_write_check_enable() call. +// + +#define SC_NO_WRITE_CHECK +#include "systemc.h" +#include "const.h" +#include "speed.h" + +// Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. +void speed_mod::find_time_proc() +{ + if (start) + elapsed_time = elapsed_time + 1; + else + elapsed_time = 0; +} + +// Compute speed. +void +speed_read_mod::read_speed_proc() +{ + wait(); + + while (true) { + + // More than one pulse is needed to compute a distance and + // consequently, speed. This function collects NUM_PULSES_FOR_SPEED + // pulses for that purpose. + AWAIT(NUM_PULSES_FOR_SPEED); + + if (start) + raw_speed = DIST_BETWEEN_TWO_PULSES * PERIODS_PER_HOUR / elapsed_time; + else + raw_speed = 0.0; + + // Reset timer. + elapsed_time = 0; + } +} + +// Filter speed. +void +speed_read_mod::filter_speed_proc() +{ + if (start) + filtered_speed = raw_speed; + else + filtered_speed = 0.0; +} + +// Compute needle angle and drive the speedometer. +void +speed_pwm_mod::pwm_driver_proc() +{ + if (start) { + speed = filtered_speed; + angle = filtered_speed * MAX_ANGLE / MAX_SPEED; + } + else { + speed = 0.0; + angle = 0.0; + } +} + + +// End of file diff --git a/src/systemc/tests/systemc/misc/v1.0/dash9/speed.h b/src/systemc/tests/systemc/misc/v1.0/dash9/speed.h new file mode 100644 index 000000000..181cac253 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/dash9/speed.h @@ -0,0 +1,154 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + speed.h -- Definition of the speedometer. + + Original Author: Ali Dasdan, Synopsys, Inc. + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#ifndef SPEED_H +#define SPEED_H + +SC_MODULE( speed_read_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out filtered_speed; // Filtered speed. + + // Inout ports: + sc_inout elapsed_time; + + // Internal signals: + sc_signal raw_speed; + + // Compute speed. + void read_speed_proc(); + + // Filter speed. + void filter_speed_proc(); + + SC_CTOR( speed_read_mod ) + { + SC_THREAD( read_speed_proc ); + sensitive << pulse.pos(); + + SC_METHOD( filter_speed_proc ); + sensitive << raw_speed; + + raw_speed = 0.0; + } +}; + +SC_MODULE( speed_pwm_mod ) +{ + // Input ports: + sc_in start; // Becomes true if the car's started. + sc_in filtered_speed; + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Compute needle angle and drive the speedometer. + void pwm_driver_proc(); + + SC_CTOR( speed_pwm_mod ) + { + SC_METHOD( pwm_driver_proc ); + sensitive << filtered_speed; + } +}; + +SC_MODULE( speed_mod ) +{ + // Input ports: + sc_in_clk clk; // Clock to measure the time, needed to compute the speed. + sc_in start; // Becomes true if the car's started. + sc_in pulse; // Pulse coming from the pulse generator. + + // Output ports: + sc_out speed; // Displayed speed. + sc_out angle; // Displayed angle. + + // Internal signals: + sc_signal elapsed_time; + sc_signal filtered_speed; + + // Internal models: + speed_read_mod *read_mod; + speed_pwm_mod *pwm_mod; + + // Find the elapsed_time between NUM_PULSES_FOR_SPEED pulses. + void find_time_proc(); + + SC_CTOR( speed_mod ) + { + SC_METHOD( find_time_proc ); + sensitive << clk.pos(); + + read_mod = new speed_read_mod("read_mod"); + pwm_mod = new speed_pwm_mod("pwm_mod"); + + // read_mod->start.bind(start); + // read_mod->pulse.bind(pulse); + // read_mod->filtered_speed.bind(filtered_speed); + // read_mod->elapsed_time.bind(elapsed_time); + + read_mod->start(start); + read_mod->pulse(pulse); + read_mod->filtered_speed(filtered_speed); + read_mod->elapsed_time(elapsed_time); + + // (*read_mod)(start, pulse, filtered_speed, elapsed_time); + + // pwm_mod->start.bind(start); + // pwm_mod->filtered_speed.bind(filtered_speed); + // pwm_mod->speed.bind(speed); + // pwm_mod->angle.bind(angle); + + pwm_mod->start(start); + pwm_mod->filtered_speed(filtered_speed); + pwm_mod->speed(speed); + pwm_mod->angle(angle); + + // *pwm_mod << start << filtered_speed << speed << angle; + + elapsed_time = 0; + filtered_speed = 0.0; + } +}; + +#endif + diff --git a/src/systemc/tests/systemc/misc/v1.0/module_name/golden/module_name.log b/src/systemc/tests/systemc/misc/v1.0/module_name/golden/module_name.log new file mode 100644 index 000000000..dbee91c11 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/module_name/golden/module_name.log @@ -0,0 +1,161 @@ +SystemC Simulation +block_f 32 +block_e 0 +tb_proc +tb2_proc +a = 49597 +b = 41218 +c = 760938885 +block_d 0 +block_f 33 +block_e 1 +tb_proc +tb2_proc +a = 20635 +b = 40894 +c = -1246516011 +block_d 1 +block_f 34 +block_e 2 +tb_proc +tb2_proc +a = 16767 +b = 17233 +c = -15844000 +block_d 2 +block_f 35 +block_e 3 +tb_proc +tb2_proc +a = 36246 +b = 28171 +c = 520167275 +block_d 3 +block_f 36 +block_e 4 +tb_proc +tb2_proc +a = 60879 +b = 49566 +c = 1249464285 +block_d 4 +block_f 37 +block_e 5 +tb_proc +tb2_proc +a = 10971 +b = 24107 +c = -460784608 +block_d 5 +block_f 38 +block_e 6 +tb_proc +tb2_proc +a = 30561 +b = 49648 +c = -1530949183 +block_d 6 +block_f 39 +block_e 7 +tb_proc +tb2_proc +a = 50031 +b = 12559 +c = -1949594816 +block_d 7 +block_f 40 +block_e 8 +tb_proc +tb2_proc +a = 23787 +b = 35674 +c = -706812907 +block_d 8 +block_f 41 +block_e 9 +tb_proc +tb2_proc +a = 43320 +b = 37558 +c = 466019036 +block_d 9 +block_f 42 +block_e 10 +tb_proc +tb2_proc +a = 840 +b = 18689 +c = -348573121 +block_d 10 +block_f 43 +block_e 11 +tb_proc +tb2_proc +a = 62466 +b = 6308 +c = -432757004 +block_d 11 +block_f 44 +block_e 12 +tb_proc +tb2_proc +a = 46271 +b = 49801 +c = -339134160 +block_d 12 +block_f 45 +block_e 13 +tb_proc +tb2_proc +a = 43433 +b = 22683 +c = 1371907000 +block_d 13 +block_f 46 +block_e 14 +tb_proc +tb2_proc +a = 35494 +b = 35259 +c = 16626955 +block_d 14 +block_f 47 +block_e 15 +tb_proc +tb2_proc +a = 29020 +b = 19555 +c = 459762375 +block_d 15 +block_f 48 +block_e 16 +tb_proc +tb2_proc +a = 10941 +b = 49656 +c = 1948954441 +block_d 16 +block_f 49 +block_e 17 +tb_proc +tb2_proc +a = 60450 +b = 27709 +c = -1408553477 +block_d 17 +block_f 50 +block_e 18 +tb_proc +tb2_proc +a = 1353 +b = 31160 +c = -969114991 +block_d 18 +block_f 51 +block_e 19 +tb_proc +tb2_proc +a = 55880 +b = 62232 +c = -750247424 +block_d 19 diff --git a/src/systemc/tests/systemc/misc/v1.0/module_name/module_name.cpp b/src/systemc/tests/systemc/misc/v1.0/module_name/module_name.cpp new file mode 100644 index 000000000..3cdae1f91 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/module_name/module_name.cpp @@ -0,0 +1,228 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + module_name.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +int numbers[] = { 49597, 41218, 20635, 40894, 16767, 17233, 36246, 28171, 60879, 49566, 10971, 24107, 30561, 49648, 50031, 12559, 23787, 35674, 43320, 37558, 840, 18689, 62466, 6308, 46271, 49801, 43433, 22683, 35494, 35259, 29020, 19555, 10941, 49656, 60450, 27709, 1353, 31160, 55880, 62232, 15190, 1315, 20803, 45751, 50963, 5298, 58311, 9215, 2378 }; + +int numbers_index = 0; + +struct example : sc_module { + sc_in_clk clk; + sc_in a; + sc_in b; + sc_out c; + + sc_signal d; + sc_signal e; + + void block_a(); + void block_b(); + void block_c(); + void block_d(); + void block_e(); + void block_f(); + + SC_CTOR(example) + { + SC_METHOD( block_a ); + sensitive << a; + sensitive << b; + + SC_METHOD( block_b ); + sensitive << a << b; + + SC_METHOD( block_c ); + sensitive << d << e; + + SC_CTHREAD( block_d, clk.neg() ); + + SC_CTHREAD( block_e, clk.pos() ); + + SC_CTHREAD( block_f, clk.pos() ); + } +}; + +void +example::block_a() +{ + d = a + b; +} + +void +example::block_b() +{ + e = a - b; +} + +void +example::block_c() +{ + c = d * e; +} + +void +example::block_d() +{ + int i = 0; + while (true) { + cout << "block_d " << i << endl; + i++; + wait(); + } +} + +void +example::block_e() +{ + int i = 0; + while (true) { + cout << "block_e " << i << endl; + i++; + wait(); + } +} + +void +example::block_f() +{ + int i = 32; + while (true) { + cout << "block_f " << i << endl; + i++; + wait(); + } +} + +struct tb : sc_module { + sc_in_clk clk; + sc_out a; + + void tb_proc(); + + SC_CTOR(tb) + { + SC_CTHREAD( tb_proc, clk.pos() ); + } +}; + +void +tb::tb_proc() +{ + while (true) { + a = numbers[numbers_index % (sizeof(numbers)/sizeof(numbers[0]))]; + numbers_index++; + cout << "tb_proc " << endl; + wait(); + } +} + +struct tb2 : sc_module { + sc_in_clk clk; + sc_out b; + + void tb2_proc(); + + SC_CTOR(tb2) + { + SC_CTHREAD( tb2_proc, clk.pos() ); + } +}; + +void +tb2::tb2_proc() +{ + while (true) { + b = numbers[numbers_index % (sizeof(numbers)/sizeof(numbers[0]))]; + numbers_index++; + cout << "tb2_proc " << endl; + wait(); + } +} + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + const sc_signal& a; + const sc_signal& b; + const sc_signal& c; + + monitor( sc_module_name, + const sc_signal& A, + const sc_signal& B, + const sc_signal& C ) : + a(A), b(B), c(C) + { + SC_METHOD( entry ); + sensitive << a; + sensitive << b; + sensitive << c; + } + void entry(); +}; + +void +monitor::entry() +{ + if (a.event()) cout << "a = " << a << endl; + if (b.event()) cout << "b = " << b << endl; + if (c.event()) cout << "c = " << c << endl; +} + +int +sc_main( int argc, char* argv[] ) +{ + sc_signal a("a"); + sc_signal b("b"); + sc_signal c("c"); + sc_clock clk("clk", 10, SC_NS); + + example ex1("ex1"); + ex1(clk, a, b, c); + + tb tbb1("tbb1"); + tbb1(clk, a); + + tb2 tbb2("tbb2"); + tbb2(clk, b); + + monitor mon("mon", a, b, c); + + sc_start(200, SC_NS); + return 0; +} diff --git a/src/systemc/tests/systemc/misc/v1.0/out_of_bounds/golden/out_of_bounds.log b/src/systemc/tests/systemc/misc/v1.0/out_of_bounds/golden/out_of_bounds.log new file mode 100644 index 000000000..ff9f7da9f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/out_of_bounds/golden/out_of_bounds.log @@ -0,0 +1,17 @@ +SystemC Simulation +Error: (E5) out of bounds +In file: +Error: (E5) out of bounds +In file: +Error: (E5) out of bounds +In file: +Error: (E5) out of bounds +In file: +Error: (E5) out of bounds +In file: +Error: (E5) out of bounds +In file: +Error: (E5) out of bounds +In file: +Error: (E5) out of bounds +In file: diff --git a/src/systemc/tests/systemc/misc/v1.0/out_of_bounds/out_of_bounds.cpp b/src/systemc/tests/systemc/misc/v1.0/out_of_bounds/out_of_bounds.cpp new file mode 100644 index 000000000..2377edbb1 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/out_of_bounds/out_of_bounds.cpp @@ -0,0 +1,79 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + out_of_bounds.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//---------------------------------------------------------- +// test the out of range of sc_bv<> and sc_lv<> +//---------------------------------------------------------- +#include "systemc.h" + +template +void test(int W) +{ + X x(W); + try { x.range(W+1,0); } + catch(const sc_report& s) + { + cout< >(N); + test >(N); + + return 0; +} diff --git a/src/systemc/tests/systemc/misc/v1.0/resolved_sig/golden/resolved_sig.log b/src/systemc/tests/systemc/misc/v1.0/resolved_sig/golden/resolved_sig.log new file mode 100644 index 000000000..076b2dbe6 --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/resolved_sig/golden/resolved_sig.log @@ -0,0 +1,75 @@ +SystemC Simulation +writing to bus: 00000000; reading from bus=00000000 +datawidth writing to bus: 10101010 +writing to bus: 10101010; reading from bus=10101010 +datawidth writing to bus: 10101010 +writing to bus: Z0Z0Z0Z0; reading from bus=10101010 +datawidth writing to bus: 10101010 +writing to bus: X0X0X0X0; reading from bus=X0X0X0X0 +datawidth writing to bus: 10101010 +writing to bus: 00000000; reading from bus=X0X0X0X0 +datawidth writing to bus: 10101010 +writing to bus: 10101010; reading from bus=10101010 +datawidth writing to bus: 10101010 +writing to bus: 01010101; reading from bus=XXXXXXXX +datawidth writing to bus: 10101010 +writing to bus: 11111111; reading from bus=1X1X1X1X +datawidth writing to bus: 10101010 +writing to bus: Z1Z1Z1Z1; reading from bus=1X1X1X1X +datawidth writing to bus: 10101010 +writing to bus: X1X1X1X1; reading from bus=XXXXXXXX +datawidth writing to bus: 10101010 +writing to bus: 01010101; reading from bus=XXXXXXXX +datawidth writing to bus: 10101010 +writing to bus: 11111111; reading from bus=1X1X1X1X +datawidth writing to bus: 10101010 +writing to bus: 0Z0Z0Z0Z; reading from bus=X0X0X0X0 +datawidth writing to bus: 10101010 +writing to bus: 1Z1Z1Z1Z; reading from bus=10101010 +datawidth writing to bus: 10101010 +writing to bus: ZZZZZZZZ; reading from bus=10101010 +datawidth writing to bus: 10101010 +writing to bus: XZXZXZXZ; reading from bus=X0X0X0X0 +datawidth writing to bus: 10101010 +writing to bus: 0Z0Z0Z0Z; reading from bus=X0X0X0X0 +datawidth writing to bus: 10101010 +writing to bus: 1Z1Z1Z1Z; reading from bus=10101010 +datawidth writing to bus: 10101010 +writing to bus: 0X0X0X0X; reading from bus=XXXXXXXX +datawidth writing to bus: 10101010 +writing to bus: 1X1X1X1X; reading from bus=1X1X1X1X +datawidth writing to bus: 10101010 +writing to bus: ZXZXZXZX; reading from bus=1X1X1X1X +datawidth writing to bus: 10101010 +writing to bus: XXXXXXXX; reading from bus=XXXXXXXX +datawidth writing to bus: 10101010 +writing to bus: 0X0X0X0X; reading from bus=XXXXXXXX +datawidth writing to bus: 10101010 +writing to bus: 1X1X1X1X; reading from bus=1X1X1X1X +datawidth writing to bus: 10101010 +writing to bus: 00000000; reading from bus=X0X0X0X0 +datawidth writing to bus: 10101010 +writing to bus: 10101010; reading from bus=10101010 +datawidth writing to bus: 10101010 +writing to bus: Z0Z0Z0Z0; reading from bus=10101010 +datawidth writing to bus: 10101010 +writing to bus: X0X0X0X0; reading from bus=X0X0X0X0 +datawidth writing to bus: 10101010 +writing to bus: 00000000; reading from bus=X0X0X0X0 +datawidth writing to bus: 10101010 +writing to bus: 10101010; reading from bus=10101010 +datawidth writing to bus: 10101010 +writing to bus: 01010101; reading from bus=XXXXXXXX +datawidth writing to bus: 10101010 +writing to bus: 11111111; reading from bus=1X1X1X1X +datawidth writing to bus: 10101010 +writing to bus: Z1Z1Z1Z1; reading from bus=1X1X1X1X +datawidth writing to bus: 10101010 +writing to bus: X1X1X1X1; reading from bus=XXXXXXXX +datawidth writing to bus: 10101010 +writing to bus: 01010101; reading from bus=XXXXXXXX +datawidth writing to bus: 10101010 +writing to bus: 11111111; reading from bus=1X1X1X1X +datawidth writing to bus: 10101010 + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/misc/v1.0/resolved_sig/resolved_sig.cpp b/src/systemc/tests/systemc/misc/v1.0/resolved_sig/resolved_sig.cpp new file mode 100644 index 000000000..91f5eea6f --- /dev/null +++ b/src/systemc/tests/systemc/misc/v1.0/resolved_sig/resolved_sig.cpp @@ -0,0 +1,205 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + resolved_sig.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + + /**************************************/ + +SC_MODULE( stimgen ) +{ + SC_HAS_PROCESS( stimgen ); + + // Inputs + sc_in_clk clk; + sc_in result; + + // Outputs + sc_out in1; + sc_out in2; + sc_out ready; + sc_out_rv<8> bus; + + // Constructor + stimgen( sc_module_name NAME, + sc_clock& TICK, + sc_signal& RESULT, + sc_signal& IN1, + sc_signal& IN2, + sc_signal& READY, + sc_signal_rv<8>& BUS ) + { + SC_CTHREAD( entry, clk.pos() ); + clk( TICK ); + result( RESULT ); + in1( IN1 ); + in2( IN2 ); + ready( READY ); + bus( BUS ); + } + + void entry(); +}; + + /**************************************/ + +SC_MODULE( datawidth ) +{ + SC_HAS_PROCESS( datawidth ); + + // Inputs + sc_in_clk clk; + sc_in in1; + sc_in in2; + sc_in ready; + sc_inout_rv<8> bus; + + // Outputs + sc_out result; + + // Constructor + datawidth( sc_module_name NAME, + sc_clock& TICK, + sc_signal& IN1, + sc_signal& IN2, + sc_signal& READY, + sc_signal& RESULT, + sc_signal_rv<8>& BUS ) + { + SC_CTHREAD( entry, clk.pos() ); + clk( TICK ); + in1( IN1 ); + in2( IN2 ); + ready( READY ); + bus( BUS ); + result( RESULT ); + } + + void entry(); +}; + + /*******************************************/ + +void +datawidth::entry() +{ + int tmp_a; + int tmp_b; + int tmp_result; + + while (true) { + + // HANDSHAKING + do { wait(); } while ( ready != 1 ); + + // COMPUTATION + tmp_a = in1.read(); + tmp_b = in2.read(); + tmp_result = tmp_a + tmp_b; + cout << "; reading from bus=" << bus.read() << endl; + sc_lv<8> lv( '0' ); + lv[1] = lv[3] = lv[5] = lv[7] = 1; + cout << "datawidth writing to bus: " << lv << endl; + bus.write( lv ); + + // WRITE OUTPUT + result.write( tmp_result ); // result = in1 + in2 + wait(); + } +} + + /*****************************************/ + +void +stimgen::entry() +{ + int i; + int j; + + ready.write( 0 ); + + for( i = 0; i < 6; i ++ ) { // integer in1 (6 bits of data) + for( j = 0; j < 6; j ++ ) { // integer in2 (6 bits of data) + in1.write( i ); + in2.write( j ); + ready.write( 1 ); + sc_lv<8> lv( sc_logic( i % 4 ) ); + lv[1] = lv[3] = lv[5] = lv[7] = j % 4; + cout << "writing to bus: " << lv << flush; + bus.write( lv ); + wait(); + + ready.write( 0 ); + wait(); + + // cout << in1.read() << " + " << in2.read() + // << " = " << result.read() << endl; + } + } + + sc_stop(); +} + + /***************************************/ + /* */ + /* int = int + int */ + /* */ + /* Max addition is 63 + 63 */ + /* */ + /***************************************/ + +int +sc_main( int ac, char *av[] ) +{ + // Signal Instantiation + sc_signal in1( "in1" ); + sc_signal in2( "in2" ); + sc_signal result( "result" ); + sc_signal ready( "ready" ); + sc_signal_rv<8> bus( "bus" ); + + // Clock Instantiation + sc_clock clk( "clock", 10, SC_NS, 0.5, 0, SC_NS ); + + // Process Instantiation + datawidth D1( "D1", clk, in1, in2, ready, result, bus ); + stimgen T1( "T1", clk, result, in1, in2, ready,bus ); + + // Simulation Run Control + sc_start(); + + return 0; +} diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_5.3.4.2/test01/golden/test01.log b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_5.3.4.2/test01/golden/test01.log new file mode 100644 index 000000000..0724df224 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_5.3.4.2/test01/golden/test01.log @@ -0,0 +1,9 @@ +SystemC Simulation + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Success diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_5.3.4.2/test01/test01.cpp b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_5.3.4.2/test01/test01.cpp new file mode 100644 index 000000000..169311fca --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_5.3.4.2/test01/test01.cpp @@ -0,0 +1,82 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// test01.cpp -- sc_start With Event Starvation Policy +// +// Original Author: John Aynsley, Doulos +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: test01.cpp,v $ +// Revision 1.1 2011/02/05 21:14:24 acg +// Andy Goodrich: moving tests John Aynsley will replace. +// +// Revision 1.2 2011/01/25 20:54:03 acg +// Andy Goodrich: regolden for new delta counter rules. +// +// Revision 1.1 2011/01/24 12:06:06 acg +// Andy Goodrich: changes for IEEE 1666 2011 +// + +#include +using namespace sc_core; +using std::cout; +using std::endl; + +SC_MODULE(Top) +{ + SC_CTOR(Top) + { + SC_THREAD(T); + } + + sc_event ev; + + void T() + { + ev.notify(150, SC_NS); + } +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_assert( sc_get_status() == SC_ELABORATION ); + sc_assert( sc_time_stamp() == SC_ZERO_TIME ); + sc_start(100, SC_NS); + sc_assert( sc_time_stamp() == sc_time(100, SC_NS) ); + + sc_start(10, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); + + sc_start(10, SC_NS, SC_EXIT_ON_STARVATION); + // sc_assert( sc_time_stamp() == sc_time(120, SC_NS) ); + sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); + + sc_start(80, SC_NS, SC_EXIT_ON_STARVATION); + sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); + + sc_start(); + sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); + sc_assert( sc_get_status() == SC_PAUSED ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test01/golden/test01.log b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test01/golden/test01.log new file mode 100644 index 000000000..2a87849ba --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test01/golden/test01.log @@ -0,0 +1,16 @@ +SystemC Simulation +T2: time = 10 ns +T2: time = 20 ns +suspend: time = 25 ns +resume: time = 45 ns +T2: time = 45 ns +T2: time = 50 ns +T2: time = 60 ns +disable: time = 65 ns +enable: time = 85 ns +T2: time = 90 ns +T2: time = 100 ns + +Info: /OSCI/SystemC: Simulation stopped by user. + +End Of Test diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test01/test01.cpp b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test01/test01.cpp new file mode 100644 index 000000000..ee8d29416 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test01/test01.cpp @@ -0,0 +1,106 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// test01.cpp -- Quick Test Of Process Control On Threads For IEEE 1666-2011 +// +// Original Author: John Aynsley, Doulos +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: test01.cpp,v $ +// Revision 1.2 2011/03/07 19:32:18 acg +// Andy Goodrich: addition to set sc_core::sc_allow_process_control_corners +// to true so that this test avoids corner case error messages. +// +// Revision 1.1 2011/02/05 21:13:19 acg +// Andy Goodrich: move of tests John Aynsley will replace. +// +// Revision 1.1 2011/01/14 14:23:16 acg +// Andy Goodrich: new test. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +SC_MODULE(Top) +{ + SC_CTOR(Top) + { + SC_THREAD(gen); + SC_THREAD(T1); + h1 = sc_get_current_process_handle(); + SC_THREAD(T2); + h2 = sc_get_current_process_handle(); + } + + sc_event ev; + + sc_process_handle h1, h2; + + void gen() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void T1() + { + wait(25, SC_NS); + cout << "suspend: time = " << sc_time_stamp() << endl; + h2.suspend(); + wait(20, SC_NS); + cout << "resume: time = " << sc_time_stamp() << endl; + h2.resume(); + wait(20, SC_NS); + + cout << "disable: time = " << sc_time_stamp() << endl; + h2.disable(); + wait(20, SC_NS); + cout << "enable: time = " << sc_time_stamp() << endl; + h2.enable(); + wait(20, SC_NS); + sc_stop(); + } + + void T2() + { + for (;;) + { + wait(ev); + cout << "T2: time = " << sc_time_stamp() << endl; + } + } +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + sc_core::sc_allow_process_control_corners = true; + sc_start(); + + cout << endl << "End Of Test" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test02/golden/test02.log b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test02/golden/test02.log new file mode 100644 index 000000000..973018653 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test02/golden/test02.log @@ -0,0 +1,8 @@ +SystemC Simulation +Target called at 10 ns +Target called at 20 ns +Target called at 35 ns +Target called at 40 ns +Target called at 50 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test02/test02.cpp b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test02/test02.cpp new file mode 100644 index 000000000..ca18bdeb8 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test02/test02.cpp @@ -0,0 +1,128 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// test02.cpp -- Test Method Suspending Itself +// +// Original Author: John Aynsley, Doulos +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: test02.cpp,v $ +// Revision 1.3 2011/03/07 19:32:19 acg +// Andy Goodrich: addition to set sc_core::sc_allow_process_control_corners +// to true so that this test avoids corner case error messages. +// +// Revision 1.2 2011/02/20 13:44:06 acg +// Andy Goodrich: updates for IEEE 1666 2011. +// +// Revision 1.1 2011/02/05 21:13:26 acg +// Andy Goodrich: move of tests John Aynsley will replace. +// +// Revision 1.1 2011/01/20 16:54:54 acg +// Andy Goodrich: changes for IEEE 1666 2011. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M5: sc_module +{ + M5(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_METHOD(target); + sensitive << ev; + dont_initialize(); + t = sc_get_current_process_handle(); + suspend_target = false; + resume_target = false; + } + + sc_process_handle t; + sc_event ev; + bool suspend_target; + bool resume_target; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at 10 NS + + suspend_target = true; + wait(10, SC_NS); + // Target runs at 20 NS and suspends itself + + wait(10, SC_NS); + // Target does not run at 30 NS + + suspend_target = false; + t.resume(); + // Target runs at 35 NS + + wait(10, SC_NS); + // Target runs at 40 NS + + suspend_target = true; + resume_target = true; + wait(10, SC_NS); + // Target runs at 50 NS + + sc_stop(); + } + + void target() + { + cout << "Target called at " << sc_time_stamp() << endl; + if (suspend_target) + t.suspend(); + if (resume_target) + { + t.resume(); + suspend_target = false; + } + } + + SC_HAS_PROCESS(M5); +}; + +int sc_main(int argc, char* argv[]) +{ + M5 m("m"); + + sc_core::sc_allow_process_control_corners = true; + sc_start(); + + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test03/golden/test03.log b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test03/golden/test03.log new file mode 100644 index 000000000..5cc0f85cb --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test03/golden/test03.log @@ -0,0 +1,8 @@ +SystemC Simulation +Target called/reset at 0 s +Target awoke at 10 ns +Target awoke at 20 ns +Target called/reset at 25 ns +Target awoke at 30 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test03/test03.cpp b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test03/test03.cpp new file mode 100644 index 000000000..61e4e948c --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test03/test03.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// test03.cpp -- Quick Test Of kill() And reset() sc_process_handle Methods. +// +// Original Author: John Aynsley, Doulos +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: test03.cpp,v $ +// Revision 1.1 2011/02/05 21:13:26 acg +// Andy Goodrich: move of tests John Aynsley will replace. +// +// Revision 1.1 2011/01/20 16:55:01 acg +// Andy Goodrich: changes for IEEE 1666 2011. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M3: sc_module +{ + M3(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_THREAD(target); + t = sc_get_current_process_handle(); + } + + sc_process_handle t; + sc_event ev; + int count; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at time 10 NS due to notification + sc_assert( count == 1 ); + + wait(10, SC_NS); + // Target runs again at time 20 NS due to notification + sc_assert( count == 2 ); + + t.reset(); + // Target reset immediately at time 25 NS + sc_assert( count == 0 ); + + wait(10, SC_NS); + // Target runs again at time 30 NS due to notification + sc_assert( count == 1 ); + + t.kill(); + // Target killed immediately at time 35 NS + sc_assert( t.terminated() ); + + sc_stop(); + } + + void target() + { + cout << "Target called/reset at " << sc_time_stamp() << endl; + count = 0; + for (;;) + { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << endl; + ++count; + } + } + + SC_HAS_PROCESS(M3); +}; + +int sc_main(int argc, char* argv[]) +{ + M3 m("m"); + + sc_start(); + + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test04/golden/test04.log b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test04/golden/test04.log new file mode 100644 index 000000000..cfeb74f2d --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test04/golden/test04.log @@ -0,0 +1,8 @@ +SystemC Simulation +Target called/reset at 0 s +Target awoke at 10 ns +Target called/reset at 20 ns +Target called/reset at 30 ns +Target awoke at 40 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test04/test04.cpp b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test04/test04.cpp new file mode 100644 index 000000000..d172bcfeb --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test04/test04.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// test04.cpp -- Quick Test Of Synchronous Reset sc_process_handle Support +// +// Original Author: John Aynsley, Doulos +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: test04.cpp,v $ +// Revision 1.1 2011/02/05 21:13:26 acg +// Andy Goodrich: move of tests John Aynsley will replace. +// +// Revision 1.1 2011/01/20 16:55:07 acg +// Andy Goodrich: changes for IEEE 1666 2011. +// + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M: sc_module +{ + M(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_THREAD(target); + t = sc_get_current_process_handle(); + } + + sc_process_handle t; + sc_event ev; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at time 10 NS due to notification + + t.sync_reset_on(); + // Target does not run at time 15 NS + + wait(10, SC_NS); + // Target is reset at time 20 NS due to notification + + wait(10, SC_NS); + // Target is reset again at time 30 NS due to notification + + t.sync_reset_off(); + // Target does not run at time 35 NS + + wait(10, SC_NS); + // Target runs at time 40 NS due to notification + + sc_stop(); + } + + void target() + { + cout << "Target called/reset at " << sc_time_stamp() << endl; + for (;;) + { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << endl; + } + } + + SC_HAS_PROCESS(M); +}; + +int sc_main(int argc, char* argv[]) +{ + M m("m"); + + sc_start(); + + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test05/golden/test05.log b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test05/golden/test05.log new file mode 100644 index 000000000..81a9fd590 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test05/golden/test05.log @@ -0,0 +1,11 @@ +SystemC Simulation +Target called/reset at 0 s +Target awoke at 10 ns +Target awoke at 20 ns +sc_unwind_exception caught by target +Target called/reset at 25 ns +Target awoke at 30 ns +sc_unwind_exception caught by target +sc_unwind_exception caught by ticker + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test05/test05.cpp b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test05/test05.cpp new file mode 100644 index 000000000..31cc771b4 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/compliance_1666_2011/section_6.6/test05/test05.cpp @@ -0,0 +1,152 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +// test05.cpp -- Reset and kill a thread process, including nested kills +// +// Original Author: John Aynsley, Doulos +// +// MODIFICATION LOG - modifiers, enter your name, affiliation, date and +// +// $Log: test05.cpp,v $ +// Revision 1.1 2011/02/05 21:13:26 acg +// Andy Goodrich: move of tests John Aynsley will replace. +// +// Revision 1.2 2011/01/25 20:54:03 acg +// Andy Goodrich: regolden for new delta counter rules. +// +// Revision 1.1 2011/01/24 12:06:10 acg +// Andy Goodrich: changes for IEEE 1666 2011 +// + + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M3: sc_module +{ + M3(sc_module_name _name) + { + SC_THREAD(ticker); + k = sc_get_current_process_handle(); + + SC_THREAD(calling); + + SC_THREAD(target); + t = sc_get_current_process_handle(); + + killing_over = false; + } + + sc_process_handle t, k; + sc_event ev; + int count; + bool killing_over; + + void ticker() + { + for (;;) + { + try { + wait(10, SC_NS); + ev.notify(); + } + catch (const sc_unwind_exception& ex) { + // ticker process killed by target + cout << "sc_unwind_exception caught by ticker" << endl; + sc_assert( sc_is_unwinding() ); + sc_assert( !ex.is_reset() ); + sc_assert( count == 1 ); + sc_assert( !killing_over ); + throw ex; + } + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at time 10 NS due to notification + sc_assert( count == 1 ); + + wait(10, SC_NS); + // Target runs again at time 20 NS due to notification + sc_assert( count == 2 ); + + t.reset(); + // Target reset immediately at time 25 NS + sc_assert( count == 0 ); + + wait(10, SC_NS); + // Target runs again at time 30 NS due to notification + sc_assert( count == 1 ); + + t.kill(); + sc_assert( !killing_over ); + killing_over = true; + + // Target killed immediately at time 35 NS + sc_assert( t.terminated() ); + sc_assert( k.terminated() ); + + sc_stop(); + } + + void target() + { + cout << "Target called/reset at " << sc_time_stamp() << endl; + count = 0; + for (;;) + { + try { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << endl; + ++count; + } + catch (const sc_unwind_exception& ex) { + cout << "sc_unwind_exception caught by target" << endl; + if (count == 2) + sc_assert( ex.is_reset() ); + else if (count == 1) + { + sc_assert( !ex.is_reset() ); + sc_assert( !killing_over ); + k.kill(); + } + else + sc_assert( false ); + throw ex; + } + } + } + + SC_HAS_PROCESS(M3); +}; + +int sc_main(int argc, char* argv[]) +{ + M3 m("m"); + + sc_start(); + + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/others/OLD_kill_reset/OLD_kill_reset.cpp b/src/systemc/tests/systemc/tmp/others/OLD_kill_reset/OLD_kill_reset.cpp new file mode 100644 index 000000000..c35c11b9e --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/OLD_kill_reset/OLD_kill_reset.cpp @@ -0,0 +1,80 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M3: sc_module +{ + M3(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_THREAD(target); + t = sc_get_current_process_handle(); + } + + sc_process_handle t; + sc_event ev; + int count; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at time 10 NS due to notification + sc_assert( count == 1 ); + + wait(10, SC_NS); + // Target runs again at time 20 NS due to notification + sc_assert( count == 2 ); + + t.reset(); + // Target reset immediately at time 25 NS + sc_assert( count == 0 ); + + wait(10, SC_NS); + // Target runs again at time 30 NS due to notification + sc_assert( count == 1 ); + + t.kill(); + // Target killed immediately at time 35 NS + sc_assert( t.terminated() ); + + sc_stop(); + } + + void target() + { + cout << "Target called/reset at " << sc_time_stamp() << endl; + count = 0; + for (;;) + { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << endl; + ++count; + } + } + + SC_HAS_PROCESS(M3); +}; + +int sc_main(int argc, char* argv[]) +{ + M3 m("m"); + + sc_start(); + + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/others/OLD_kill_reset/golden/OLD_kill_reset.log b/src/systemc/tests/systemc/tmp/others/OLD_kill_reset/golden/OLD_kill_reset.log new file mode 100644 index 000000000..5cc0f85cb --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/OLD_kill_reset/golden/OLD_kill_reset.log @@ -0,0 +1,8 @@ +SystemC Simulation +Target called/reset at 0 s +Target awoke at 10 ns +Target awoke at 20 ns +Target called/reset at 25 ns +Target awoke at 30 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/tmp/others/OLD_sc_start_starvation/OLD_sc_start_starvation.cpp b/src/systemc/tests/systemc/tmp/others/OLD_sc_start_starvation/OLD_sc_start_starvation.cpp new file mode 100644 index 000000000..76fb5d09b --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/OLD_sc_start_starvation/OLD_sc_start_starvation.cpp @@ -0,0 +1,48 @@ + +// sc_start with event starvation policy + +#include +using namespace sc_core; +using std::cout; +using std::endl; + +SC_MODULE(Top) +{ + SC_CTOR(Top) + { + SC_THREAD(T); + } + + sc_event ev; + + void T() + { + ev.notify(150, SC_NS); + } +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_assert( sc_get_status() == SC_ELABORATION ); + sc_assert( sc_time_stamp() == SC_ZERO_TIME ); + sc_start(100, SC_NS); + sc_assert( sc_time_stamp() == sc_time(100, SC_NS) ); + + sc_start(10, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); + + sc_start(10, SC_NS, SC_EXIT_ON_STARVATION); + sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); + + sc_start(80, SC_NS, SC_EXIT_ON_STARVATION); + sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); // FAILS - time = 200 NS + + sc_start(); + sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); + sc_assert( sc_get_status() == SC_PAUSED ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/tmp/others/OLD_sc_start_starvation/golden/OLD_sc_start_starvation.log b/src/systemc/tests/systemc/tmp/others/OLD_sc_start_starvation/golden/OLD_sc_start_starvation.log new file mode 100644 index 000000000..0724df224 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/OLD_sc_start_starvation/golden/OLD_sc_start_starvation.log @@ -0,0 +1,9 @@ +SystemC Simulation + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Success diff --git a/src/systemc/tests/systemc/tmp/others/bogus_reset/bogus_reset.cpp b/src/systemc/tests/systemc/tmp/others/bogus_reset/bogus_reset.cpp new file mode 100644 index 000000000..d816456cd --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/bogus_reset/bogus_reset.cpp @@ -0,0 +1,61 @@ +// Bogus reset + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M5: sc_module +{ + M5(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_METHOD(target); + sensitive << ev; + dont_initialize(); + t = sc_get_current_process_handle(); + } + + sc_process_handle t; + sc_event ev; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + wait(15, SC_NS); + // target runs at 10 NS due to notification of ev + + t.reset(); + // target runs at 15 NS due to reset. + + sc_stop(); + } + + void target() + { + cout << "Target called at " << sc_time_stamp() << endl; + } + + SC_HAS_PROCESS(M5); +}; + +int sc_main(int argc, char* argv[]) +{ + M5 m("m"); + + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/others/bogus_reset/golden/bogus_reset.log b/src/systemc/tests/systemc/tmp/others/bogus_reset/golden/bogus_reset.log new file mode 100644 index 000000000..d270e77be --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/bogus_reset/golden/bogus_reset.log @@ -0,0 +1,7 @@ +SystemC Simulation +Target called at 10 ns +Target called at 15 ns + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/tmp/others/is_unwinding_bug/golden/is_unwinding_bug.log b/src/systemc/tests/systemc/tmp/others/is_unwinding_bug/golden/is_unwinding_bug.log new file mode 100644 index 000000000..e7d0691d0 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/is_unwinding_bug/golden/is_unwinding_bug.log @@ -0,0 +1,12 @@ +SystemC Simulation +Target called/reset at 0 s +Target awoke at 10 ns +Unwinding at 20 ns +Target called/reset at 20 ns +Target awoke at 30 ns +Unwinding at 35 ns +Target called/reset at 35 ns + +Info: /OSCI/SystemC: Simulation stopped by user. + +Success diff --git a/src/systemc/tests/systemc/tmp/others/is_unwinding_bug/is_unwinding_bug.cpp b/src/systemc/tests/systemc/tmp/others/is_unwinding_bug/is_unwinding_bug.cpp new file mode 100644 index 000000000..0dc33a59f --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/is_unwinding_bug/is_unwinding_bug.cpp @@ -0,0 +1,80 @@ +// sync_reset_on/off + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M2: sc_module +{ + M2(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_THREAD(target); + t = sc_get_current_process_handle(); + } + + sc_process_handle t; + sc_event ev; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + wait(15, SC_NS); + + t.sync_reset_on(); + wait(10, SC_NS); + + t.sync_reset_off(); + wait(10, SC_NS); + + t.reset(); + wait(SC_ZERO_TIME); + + sc_stop(); + } + + void target() + { + cout << "Target called/reset at " << sc_time_stamp() << endl; + + for (;;) + { + try { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << endl; + } + catch (const sc_unwind_exception& ex) { + cout << "Unwinding at " << sc_time_stamp() << endl; + sc_assert( t.is_unwinding() ); + sc_assert( sc_is_unwinding() ); + throw ex; + } + } + } + + SC_HAS_PROCESS(M2); +}; + +int sc_main(int argc, char* argv[]) +{ + M2 m("m"); + + sc_start(); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/others/kill_reset/golden/kill_reset.log b/src/systemc/tests/systemc/tmp/others/kill_reset/golden/kill_reset.log new file mode 100644 index 000000000..81a9fd590 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/kill_reset/golden/kill_reset.log @@ -0,0 +1,11 @@ +SystemC Simulation +Target called/reset at 0 s +Target awoke at 10 ns +Target awoke at 20 ns +sc_unwind_exception caught by target +Target called/reset at 25 ns +Target awoke at 30 ns +sc_unwind_exception caught by target +sc_unwind_exception caught by ticker + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/tmp/others/kill_reset/kill_reset.cpp b/src/systemc/tests/systemc/tmp/others/kill_reset/kill_reset.cpp new file mode 100644 index 000000000..65d140fc7 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/kill_reset/kill_reset.cpp @@ -0,0 +1,116 @@ +// Reset and kill a thread process, including nested kills + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M3: sc_module +{ + M3(sc_module_name _name) + { + SC_THREAD(ticker); + k = sc_get_current_process_handle(); + + SC_THREAD(calling); + + SC_THREAD(target); + t = sc_get_current_process_handle(); + + killing_over = false; + } + + sc_process_handle t, k; + sc_event ev; + int count; + bool killing_over; + + void ticker() + { + for (;;) + { + try { + wait(10, SC_NS); + ev.notify(); + } + catch (const sc_unwind_exception& ex) { + // ticker process killed by target + cout << "sc_unwind_exception caught by ticker" << endl; + sc_assert( !ex.is_reset() ); + sc_assert( count == 1 ); + sc_assert( !killing_over ); + throw ex; + } + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at time 10 NS due to notification + sc_assert( count == 1 ); + + wait(10, SC_NS); + // Target runs again at time 20 NS due to notification + sc_assert( count == 2 ); + + t.reset(); + // Target reset immediately at time 25 NS + sc_assert( count == 0 ); + + wait(10, SC_NS); + // Target runs again at time 30 NS due to notification + sc_assert( count == 1 ); + + t.kill(); + sc_assert( !killing_over ); + killing_over = true; + + // Target killed immediately at time 35 NS + sc_assert( t.terminated() ); // FAILS IN PRESENCE OF k.kill(); on line 96 + sc_assert( k.terminated() ); + + sc_stop(); + } + + void target() + { + cout << "Target called/reset at " << sc_time_stamp() << endl; + count = 0; + for (;;) + { + try { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << endl; + ++count; + } + catch (const sc_unwind_exception& ex) { + cout << "sc_unwind_exception caught by target" << endl; + if (count == 2) + sc_assert( ex.is_reset() ); + else if (count == 1) + { + sc_assert( !ex.is_reset() ); + sc_assert( !killing_over ); + k.kill(); + } + else + sc_assert( false ); + throw ex; + } + } + } + + SC_HAS_PROCESS(M3); +}; + +int sc_main(int argc, char* argv[]) +{ + M3 m("m"); + + sc_start(); + + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/others/method_suspends_itself/golden/method_suspends_itself.log b/src/systemc/tests/systemc/tmp/others/method_suspends_itself/golden/method_suspends_itself.log new file mode 100644 index 000000000..973018653 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/method_suspends_itself/golden/method_suspends_itself.log @@ -0,0 +1,8 @@ +SystemC Simulation +Target called at 10 ns +Target called at 20 ns +Target called at 35 ns +Target called at 40 ns +Target called at 50 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/tmp/others/method_suspends_itself/method_suspends_itself.cpp b/src/systemc/tests/systemc/tmp/others/method_suspends_itself/method_suspends_itself.cpp new file mode 100644 index 000000000..aea645c45 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/method_suspends_itself/method_suspends_itself.cpp @@ -0,0 +1,88 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M5: sc_module +{ + M5(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_METHOD(target); + sensitive << ev; + dont_initialize(); + t = sc_get_current_process_handle(); + suspend_target = false; + resume_target = false; + } + + sc_process_handle t; + sc_event ev; + bool suspend_target; + bool resume_target; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at 10 NS + + suspend_target = true; + wait(10, SC_NS); + // Target runs at 20 NS and suspends itself + + wait(10, SC_NS); + // Target does not run at 30 NS + + suspend_target = false; + t.resume(); + // Target runs at 35 NS + + wait(10, SC_NS); + // Target runs at 40 NS + + suspend_target = true; + resume_target = true; + wait(10, SC_NS); + // Target runs at 50 NS + + sc_stop(); + } + + void target() + { + cout << "Target called at " << sc_time_stamp() << endl; + if (suspend_target) + t.suspend(); + if (resume_target) + { + t.resume(); + suspend_target = false; + } + } + + SC_HAS_PROCESS(M5); +}; + +int sc_main(int argc, char* argv[]) +{ + M5 m("m"); + + sc_core::sc_allow_process_control_corners = true; + sc_start(); + + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/others/priority_bug/golden/priority_bug.log b/src/systemc/tests/systemc/tmp/others/priority_bug/golden/priority_bug.log new file mode 100644 index 000000000..9eee67f21 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/priority_bug/golden/priority_bug.log @@ -0,0 +1,4 @@ +SystemC Simulation +Target called/reset at 0 s + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/tmp/others/priority_bug/priority_bug.cpp b/src/systemc/tests/systemc/tmp/others/priority_bug/priority_bug.cpp new file mode 100644 index 000000000..a5dd2e664 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/priority_bug/priority_bug.cpp @@ -0,0 +1,63 @@ +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M4: sc_module +{ + M4(sc_module_name _name) + { + SC_THREAD(calling); + SC_THREAD(target); + t = sc_get_current_process_handle(); + } + + sc_process_handle t; + sc_event ev; + int count; + + void calling() + { + + t.sync_reset_on(); + wait(10, SC_NS); + + t.suspend(); + wait(10, SC_NS); + + t.disable(); + wait(10, SC_NS); + + t.enable(); + ev.notify(); + wait(10, SC_NS); // !!!!!! target is RESET WHILE STILL SUSPENDED !!!!!! + + sc_stop(); + } + + void target() + { + cout << "Target called/reset at " << sc_time_stamp() << endl; + count = 0; + for (;;) + { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << " count = " << count << endl; + ++count; + } + } + + SC_HAS_PROCESS(M4); +}; + +int sc_main(int argc, char* argv[]) +{ + M4 m("m"); + + sc_core::sc_allow_process_control_corners = true; + sc_start(); + + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/others/sc_start_starvation/golden/sc_start_starvation.log b/src/systemc/tests/systemc/tmp/others/sc_start_starvation/golden/sc_start_starvation.log new file mode 100644 index 000000000..510e7e741 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/sc_start_starvation/golden/sc_start_starvation.log @@ -0,0 +1,15 @@ +SystemC Simulation + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: +sc_time_stamp() = 150 ns +sc_pending_activity_at_future_time() = 1 +sc_time_to_pending_activity() = 100 ns + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Warning: (W571) no activity or clock movement for sc_start() invocation +In file: + +Success diff --git a/src/systemc/tests/systemc/tmp/others/sc_start_starvation/sc_start_starvation.cpp b/src/systemc/tests/systemc/tmp/others/sc_start_starvation/sc_start_starvation.cpp new file mode 100644 index 000000000..bcc743c43 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/sc_start_starvation/sc_start_starvation.cpp @@ -0,0 +1,85 @@ + +// sc_start with event starvation policy + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include +using namespace sc_core; +using std::cout; +using std::endl; + +SC_MODULE(Top) +{ + SC_CTOR(Top) + { + SC_THREAD(T); + } + + sc_event ev2; + + void T() + { + sc_assert( sc_get_status() == SC_RUNNING ); + ev2.notify(150, SC_NS); + + //wait(ev2); // Inserting this line makes the test pass + } +}; + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + + sc_event ev; + ev.notify(250, SC_NS); + + sc_assert( sc_get_status() == SC_ELABORATION ); + sc_assert( sc_time_stamp() == SC_ZERO_TIME ); + sc_start(100, SC_NS); + sc_assert( sc_get_status() == SC_PAUSED ); + sc_assert( sc_time_stamp() == sc_time(100, SC_NS) ); + + sc_start(10, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); + + sc_start(10, SC_NS, SC_EXIT_ON_STARVATION); + sc_assert( sc_time_stamp() == sc_time(110, SC_NS) ); + + sc_start(80, SC_NS, SC_EXIT_ON_STARVATION); + + cout << "sc_time_stamp() = " << sc_time_stamp() << endl; + cout << "sc_pending_activity_at_future_time() = " << sc_pending_activity_at_future_time() << endl; + cout << "sc_time_to_pending_activity() = " << sc_time_to_pending_activity() << endl; + + sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); // FAILS. Does not see ev2 + + sc_start(50, SC_NS, SC_EXIT_ON_STARVATION); + sc_assert( sc_time_stamp() == sc_time(150, SC_NS) ); + + sc_start(50, SC_NS, SC_RUN_TO_TIME); + sc_assert( sc_time_stamp() == sc_time(200, SC_NS) ); + + sc_start(); + sc_assert( sc_get_status() == SC_PAUSED ); + sc_assert( sc_time_stamp() == sc_time(250, SC_NS) ); + + ev.notify(SC_ZERO_TIME); + sc_start(); + sc_assert( sc_time_stamp() == sc_time(250, SC_NS) ); + + ev.notify(10, SC_NS); + sc_start(); + sc_assert( sc_time_stamp() == sc_time(260, SC_NS) ); + + ev.notify(10, SC_NS); + sc_start(sc_time(100, SC_NS), SC_EXIT_ON_STARVATION); + sc_assert( sc_time_stamp() == sc_time(270, SC_NS) ); + + ev.notify(10, SC_NS); + sc_start(sc_time(100, SC_NS)); // SC_RUN_TO_TIME + sc_assert( sc_time_stamp() == sc_time(370, SC_NS) ); + sc_assert( sc_get_status() == SC_PAUSED ); + + cout << endl << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/tmp/others/sc_writer_bug/golden/sc_writer_bug.log b/src/systemc/tests/systemc/tmp/others/sc_writer_bug/golden/sc_writer_bug.log new file mode 100644 index 000000000..40bfc2caa --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/sc_writer_bug/golden/sc_writer_bug.log @@ -0,0 +1,5 @@ +SystemC Simulation +port written in top.m1 at 1 ps +port written in top.m2 at 2 ps + +Success diff --git a/src/systemc/tests/systemc/tmp/others/sc_writer_bug/sc_writer_bug.cpp b/src/systemc/tests/systemc/tmp/others/sc_writer_bug/sc_writer_bug.cpp new file mode 100644 index 000000000..a54ceddf5 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/sc_writer_bug/sc_writer_bug.cpp @@ -0,0 +1,69 @@ +// sc_writer_policy template argument of class sc_signal + +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include + +using namespace sc_core; +using namespace sc_dt; +using std::cout; +using std::endl; +using std::string; + + +struct M: sc_module +{ + sc_inout port; + + sc_time delay; + + M(sc_module_name _name, sc_time _delay) + : port("port") + , delay(_delay) + { + SC_THREAD(T); + } + + void T() + { + wait(delay); + port.write(true); + cout << "port written in " << name() << " at " << sc_time_stamp() + << endl; + wait(sc_time(1, SC_NS)); + } + + SC_HAS_PROCESS(M); +}; + +struct Top: sc_module +{ + M *m1; + M *m2; + + sc_signal multi_sig_1; + + Top(sc_module_name _name) + : multi_sig_1("multi_sig_1") + { + m1 = new M("m1", sc_time(1, SC_PS)); + m2 = new M("m2", sc_time(2, SC_PS)); + + m1->port.bind(multi_sig_1); + m2->port.bind(multi_sig_1); + + multi_sig_1.write(true); + } + + SC_HAS_PROCESS(Top); +}; + + +int sc_main(int argc, char* argv[]) +{ + Top top("top"); + sc_start(5,SC_PS); + + cout << endl << "Success" << endl; + return 0; +} + diff --git a/src/systemc/tests/systemc/tmp/others/sync_reset/golden/sync_reset.log b/src/systemc/tests/systemc/tmp/others/sync_reset/golden/sync_reset.log new file mode 100644 index 000000000..cfeb74f2d --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/sync_reset/golden/sync_reset.log @@ -0,0 +1,8 @@ +SystemC Simulation +Target called/reset at 0 s +Target awoke at 10 ns +Target called/reset at 20 ns +Target called/reset at 30 ns +Target awoke at 40 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/systemc/tmp/others/sync_reset/sync_reset.cpp b/src/systemc/tests/systemc/tmp/others/sync_reset/sync_reset.cpp new file mode 100644 index 000000000..dfe7fbc54 --- /dev/null +++ b/src/systemc/tests/systemc/tmp/others/sync_reset/sync_reset.cpp @@ -0,0 +1,75 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include + +using namespace sc_core; +using std::cout; +using std::endl; + +struct M: sc_module +{ + M(sc_module_name _name) + { + SC_THREAD(ticker); + SC_THREAD(calling); + SC_THREAD(target); + t = sc_get_current_process_handle(); + } + + sc_process_handle t; + sc_event ev; + + void ticker() + { + for (;;) + { + wait(10, SC_NS); + ev.notify(); + } + } + + void calling() + { + wait(15, SC_NS); + // Target runs at time 10 NS due to notification + + t.sync_reset_on(); + // Target does not run at time 15 NS + + wait(10, SC_NS); + // Target is reset at time 20 NS due to notification + + wait(10, SC_NS); + // Target is reset again at time 30 NS due to notification + + t.sync_reset_off(); + // Target does not run at time 35 NS + + wait(10, SC_NS); + // Target runs at time 40 NS due to notification + + sc_stop(); + } + + void target() + { + cout << "Target called/reset at " << sc_time_stamp() << endl; + for (;;) + { + wait(ev); + cout << "Target awoke at " << sc_time_stamp() << endl; + } + } + + SC_HAS_PROCESS(M); +}; + +int sc_main(int argc, char* argv[]) +{ + M m("m"); + + sc_start(); + + return 0; +} + diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/sc_signal_ports/golden/test.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/sc_signal_ports/golden/test.vcd new file mode 100644 index 000000000..f6330342b --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/sc_signal_ports/golden/test.vcd @@ -0,0 +1,202 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 32 aaaaa sig_int [31:0] $end +$var wire 1 aaaab sig_bool $end +$var wire 1 aaaac sig_logic $end +$var wire 1 aaaad sig_resolved $end +$var wire 1 aaaae sig_rv1 $end +$scope module a $end +$var wire 1 aaaaf out_rv1 $end +$var wire 1 aaaag out_resolved $end +$var wire 1 aaaah out_logic $end +$var wire 1 aaaai out_bool $end +$var wire 32 aaaaj out_int [31:0] $end +$var wire 1 aaaak in_rv1 $end +$var wire 1 aaaal in_resolved $end +$var wire 1 aaaam in_logic $end +$var wire 1 aaaan in_bool $end +$var wire 32 aaaao in_int [31:0] $end +$upscope $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b0 aaaaa +0aaaab +xaaaac +xaaaad +Xaaaae +Xaaaaf +xaaaag +xaaaah +0aaaai +b0 aaaaj +Xaaaak +xaaaal +xaaaam +0aaaan +b0 aaaao +$end + +#1000 +b1 aaaaa +1aaaab +1aaaac +1aaaad +1aaaae +1aaaaf +1aaaag +1aaaah +1aaaai +b1 aaaaj +1aaaak +1aaaal +1aaaam +1aaaan +b1 aaaao + +#2000 +b10 aaaaa +0aaaab +zaaaac +zaaaad +Zaaaae +Zaaaaf +zaaaag +zaaaah +0aaaai +b10 aaaaj +Zaaaak +zaaaal +zaaaam +0aaaan +b10 aaaao + +#3000 +b11 aaaaa +1aaaab +xaaaac +xaaaad +Xaaaae +Xaaaaf +xaaaag +xaaaah +1aaaai +b11 aaaaj +Xaaaak +xaaaal +xaaaam +1aaaan +b11 aaaao + +#4000 +b100 aaaaa +0aaaab +0aaaac +0aaaad +0aaaae +0aaaaf +0aaaag +0aaaah +0aaaai +b100 aaaaj +0aaaak +0aaaal +0aaaam +0aaaan +b100 aaaao + +#5000 +b101 aaaaa +1aaaab +1aaaac +1aaaad +1aaaae +1aaaaf +1aaaag +1aaaah +1aaaai +b101 aaaaj +1aaaak +1aaaal +1aaaam +1aaaan +b101 aaaao + +#6000 +b110 aaaaa +0aaaab +zaaaac +zaaaad +Zaaaae +Zaaaaf +zaaaag +zaaaah +0aaaai +b110 aaaaj +Zaaaak +zaaaal +zaaaam +0aaaan +b110 aaaao + +#7000 +b111 aaaaa +1aaaab +xaaaac +xaaaad +Xaaaae +Xaaaaf +xaaaag +xaaaah +1aaaai +b111 aaaaj +Xaaaak +xaaaal +xaaaam +1aaaan +b111 aaaao + +#8000 +b1000 aaaaa +0aaaab +0aaaac +0aaaad +0aaaae +0aaaaf +0aaaag +0aaaah +0aaaai +b1000 aaaaj +0aaaak +0aaaal +0aaaam +0aaaan +b1000 aaaao + +#9000 +b1001 aaaaa +1aaaab +1aaaac +1aaaad +1aaaae +1aaaaf +1aaaag +1aaaah +1aaaai +b1001 aaaaj +1aaaak +1aaaal +1aaaam +1aaaan +b1001 aaaao + +#10000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/sc_signal_ports/test.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/sc_signal_ports/test.cpp new file mode 100644 index 000000000..276941ca0 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/sc_signal_ports/test.cpp @@ -0,0 +1,144 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of signal port tracing. + +#include "systemc.h" + +SC_MODULE( mod_a ) +{ + sc_in_clk clk; + + sc_in in_int; + sc_in in_bool; + sc_in in_logic; + sc_in_resolved in_resolved; + sc_in_rv<1> in_rv1; + + sc_out out_int; + sc_out out_bool; + sc_out out_logic; + sc_out_resolved out_resolved; + sc_out_rv<1> out_rv1; + + void main_action() + { + int a_int = 0; + bool a_bool = false; + sc_logic a_logic = SC_LOGIC_X; + sc_logic a_resolved = SC_LOGIC_X; + sc_lv<1> a_rv1 = sc_lv<1>( SC_LOGIC_X ); + + wait(); + + while( true ) { + out_int = a_int; + out_bool = a_bool; + out_logic = a_logic; + out_resolved = a_resolved; + out_rv1 = a_rv1; + + a_int ++; + a_bool = ! a_bool; + a_logic = sc_dt::sc_logic_value_t( a_int % 4 ); + a_resolved = a_logic; + a_rv1 = sc_lv<1>( a_logic ); + + wait(); + } + } + + SC_CTOR( mod_a ) + { + SC_THREAD( main_action ); + sensitive << clk.pos(); + } +}; + +int +sc_main( int, char*[] ) +{ + sc_clock clk; + + sc_signal sig_int; + sc_signal sig_bool; + sc_signal sig_logic; + sc_signal_resolved sig_resolved; + sc_signal_rv<1> sig_rv1; + + mod_a a( "a" ); + + a.clk( clk ); + + a.in_int( sig_int ); + a.in_bool( sig_bool ); + a.in_logic( sig_logic ); + a.in_resolved( sig_resolved ); + a.in_rv1( sig_rv1 ); + + a.out_int( sig_int ); + a.out_bool( sig_bool ); + a.out_logic( sig_logic ); + a.out_resolved( sig_resolved ); + a.out_rv1( sig_rv1 ); + + sc_trace_file* tf = sc_create_vcd_trace_file( "test" ); + + sc_trace( tf, sig_int, "sig_int" ); + sc_trace( tf, sig_bool, "sig_bool" ); + sc_trace( tf, sig_logic, "sig_logic" ); + sc_trace( tf, sig_resolved, "sig_resolved" ); + sc_trace( tf, sig_rv1, "sig_rv1" ); + + sc_trace( tf, a.in_int, "a.in_int" ); + sc_trace( tf, a.in_bool, "a.in_bool" ); + sc_trace( tf, a.in_logic, "a.in_logic" ); + sc_trace( tf, a.in_resolved, "a.in_resolved" ); + sc_trace( tf, a.in_rv1, "a.in_rv1" ); + + sc_trace( tf, a.out_int, "a.out_int" ); + sc_trace( tf, a.out_bool, "a.out_bool" ); + sc_trace( tf, a.out_logic, "a.out_logic" ); + sc_trace( tf, a.out_resolved, "a.out_resolved" ); + sc_trace( tf, a.out_rv1, "a.out_rv1" ); + + sc_start( 10, SC_NS ); + + sc_close_vcd_trace_file( tf ); + + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test01/golden/test01.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test01/golden/test01.vcd new file mode 100644 index 000000000..2c425a471 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test01/golden/test01.vcd @@ -0,0 +1,126 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 1 aaaaa Bool $end +$var wire 1 aaaab SC_Logic $end +$var wire 4 aaaac SC_BV [3:0] $end +$var wire 4 aaaad SC_LV [3:0] $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +0aaaaa +1aaaab +b0 aaaac +b1111 aaaad +$end + +#10000 +1aaaaa +0aaaab +b1010 aaaac +b1011 aaaad + +#20000 +b101 aaaac +b101 aaaad + +#30000 +0aaaaa +1aaaab +b0 aaaac +b1111 aaaad + +#40000 +1aaaaa +0aaaab +b1010 aaaac +b1011 aaaad + +#50000 +b110 aaaac +b110 aaaad + +#60000 +0aaaaa +1aaaab +b0 aaaac +b1111 aaaad + +#70000 +1aaaaa +0aaaab +b1010 aaaac +b1011 aaaad + +#80000 +b111 aaaac +b111 aaaad + +#90000 +0aaaaa +1aaaab +b0 aaaac +b1111 aaaad + +#100000 +1aaaaa +0aaaab +b1010 aaaac +b1011 aaaad + +#110000 +b1000 aaaac +b1000 aaaad + +#120000 +0aaaaa +1aaaab +b0 aaaac +b1111 aaaad + +#130000 +1aaaaa +0aaaab +b1010 aaaac +b1011 aaaad + +#140000 +b1001 aaaac +b1001 aaaad + +#150000 +0aaaaa +1aaaab +b0 aaaac +b1111 aaaad + +#160000 +1aaaaa +0aaaab +b1010 aaaac +b1011 aaaad + +#170000 +b1010 aaaad + +#180000 +0aaaaa +1aaaab +b0 aaaac +b1111 aaaad + +#190000 +1aaaaa +0aaaab +b1010 aaaac +b1011 aaaad + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test01/test01.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test01/test01.cpp new file mode 100644 index 000000000..39e0fded1 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test01/test01.cpp @@ -0,0 +1,117 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + bool obj1; + sc_logic obj2; + sc_bv<4> obj3; + sc_lv<4> obj4; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = "0000"; + obj4 = "0000"; + } + + void entry(); +}; + +void proc1::entry() +{ + sc_bv<4> bv; + sc_lv<4> sv; + int i = 5; + wait(); + while(true) { + bv = i; + sv = i++; + obj1 = 0; + obj2 = 1; + obj3 = "0000"; + obj4 = "1111"; + wait(); + obj1 = 1; + obj2 = 0; + obj3 = "1010"; + obj4 = "1011"; + wait(); + obj3 = bv; + obj4 = sv; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_vcd_trace_file("test01"); + tf->set_time_unit(1.0, SC_PS); + sc_trace(tf, P1.obj1, "Bool"); + sc_trace(tf, P1.obj2, "SC_Logic"); + sc_trace(tf, P1.obj3, "SC_BV"); + sc_trace(tf, P1.obj4, "SC_LV"); + //sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_vcd_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd new file mode 100644 index 000000000..10a09a376 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd @@ -0,0 +1,160 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 32 aaaad Long [31:0] $end +$var wire 1 aaaae Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae +$end + +#10000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#20000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#30000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#40000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#50000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#60000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#70000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#80000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#90000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#100000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#110000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#120000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#130000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#140000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#150000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#160000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#170000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#180000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#190000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.bsd64 b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.bsd64 new file mode 100644 index 000000000..21100dc36 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.bsd64 @@ -0,0 +1,160 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 1 aaaae Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae +$end + +#10000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#20000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#30000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#40000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#50000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#60000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#70000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#80000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#90000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#100000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#110000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#120000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#130000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#140000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#150000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#160000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#170000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#180000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#190000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.cygwin64 b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.cygwin64 new file mode 100644 index 000000000..21100dc36 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.cygwin64 @@ -0,0 +1,160 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 1 aaaae Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae +$end + +#10000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#20000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#30000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#40000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#50000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#60000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#70000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#80000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#90000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#100000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#110000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#120000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#130000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#140000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#150000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#160000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#170000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#180000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#190000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.linux64 b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.linux64 new file mode 100644 index 000000000..21100dc36 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.linux64 @@ -0,0 +1,160 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 1 aaaae Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae +$end + +#10000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#20000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#30000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#40000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#50000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#60000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#70000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#80000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#90000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#100000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#110000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#120000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#130000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#140000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#150000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#160000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#170000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#180000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#190000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.linuxaarch64 b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.linuxaarch64 new file mode 100644 index 000000000..21100dc36 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.linuxaarch64 @@ -0,0 +1,160 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 1 aaaae Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae +$end + +#10000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#20000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#30000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#40000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#50000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#60000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#70000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#80000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#90000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#100000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#110000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#120000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#130000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#140000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#150000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#160000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#170000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#180000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#190000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.macosx64 b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.macosx64 new file mode 100644 index 000000000..21100dc36 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test02/golden/test02.vcd.macosx64 @@ -0,0 +1,160 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 1 aaaae Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae +$end + +#10000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#20000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#30000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#40000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#50000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#60000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#70000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#80000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#90000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#100000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#110000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#120000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#130000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#140000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#150000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#160000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#170000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#180000 +b111 aaaaa +b11111 aaaab +b1111111111 aaaac +b11111111111 aaaad +1aaaae + +#190000 +b1 aaaaa +b100000 aaaab +b10000000000 aaaac +b100000000000 aaaad +0aaaae + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test02/test02.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test02/test02.cpp new file mode 100644 index 000000000..d69a71802 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test02/test02.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + unsigned char obj1; + unsigned short obj2; + unsigned int obj3; + unsigned long obj4; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = 0; + obj4 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 7; + obj2 = 31; + obj3 = 1023; + obj4 = 2047; + wait(); + obj1 = 1; + obj2 = 32; + obj3 = 1024; + obj4 = 2048; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_vcd_trace_file("test02"); + sc_trace(tf, P1.obj1, "Char"); + sc_trace(tf, P1.obj2, "Short"); + sc_trace(tf, P1.obj3, "Int"); + sc_trace(tf, P1.obj4, "Long"); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_vcd_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test03/golden/test03.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test03/golden/test03.vcd new file mode 100644 index 000000000..f1bf6667c --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test03/golden/test03.vcd @@ -0,0 +1,181 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 4 aaaaa Char [3:0] $end +$var wire 4 aaaab Short [3:0] $end +$var wire 12 aaaac Int [11:0] $end +$var wire 10 aaaad Long [9:0] $end +$var wire 43 aaaae Uint64 [42:0] $end +$var wire 1 aaaaf Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf +$end + +#10000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#20000 +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf + +#30000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#40000 +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf + +#50000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#60000 +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf + +#70000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#80000 +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf + +#90000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#100000 +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf + +#110000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#120000 +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf + +#130000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#140000 +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf + +#150000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#160000 +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf + +#170000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#180000 +b111 aaaaa +bx aaaab +b1111111111 aaaac +b111111 aaaad +b1000000000000000000000000000000000000000000 aaaae +1aaaaf + +#190000 +b1 aaaaa +b11 aaaab +b10000000000 aaaac +bx aaaad +bx aaaae +0aaaaf + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test03/test03.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test03/test03.cpp new file mode 100644 index 000000000..3d53b4eb7 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test03/test03.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + unsigned char obj1; + unsigned short obj2; + unsigned int obj3; + unsigned long obj4; + uint64 obj5; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = 0; + obj4 = 0; + obj5 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 7; + obj2 = 31; + obj3 = 1023; + obj4 = 63; + obj5 = 1; + obj5 = obj5 << 42; + wait(); + obj1 = 1; + obj2 = 3; + obj3 = 1024; + obj4 = 2048; + obj5 = 3; + obj5 = obj5 << 42; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_vcd_trace_file("test03"); + sc_trace(tf, P1.obj1, "Char", 4); + sc_trace(tf, P1.obj2, "Short", 4); + sc_trace(tf, P1.obj3, "Int", 12); + sc_trace(tf, P1.obj4, "Long", 10); + sc_trace(tf, P1.obj5, "Uint64", 43); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_vcd_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd new file mode 100644 index 000000000..c2129bb0e --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd @@ -0,0 +1,181 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 32 aaaad Long [31:0] $end +$var wire 64 aaaae Int64 [63:0] $end +$var wire 1 aaaaf Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf +$end + +#10000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#20000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#30000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#40000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#50000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#60000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#70000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#80000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#90000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#100000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#110000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#120000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#130000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#140000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#150000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#160000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#170000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#180000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#190000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b11111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.bsd64 b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.bsd64 new file mode 100644 index 000000000..538167b24 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.bsd64 @@ -0,0 +1,181 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 64 aaaae Int64 [63:0] $end +$var wire 1 aaaaf Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf +$end + +#10000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#20000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#30000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#40000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#50000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#60000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#70000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#80000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#90000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#100000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#110000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#120000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#130000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#140000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#150000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#160000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#170000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#180000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#190000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.cygwin64 b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.cygwin64 new file mode 100644 index 000000000..538167b24 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.cygwin64 @@ -0,0 +1,181 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 64 aaaae Int64 [63:0] $end +$var wire 1 aaaaf Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf +$end + +#10000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#20000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#30000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#40000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#50000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#60000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#70000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#80000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#90000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#100000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#110000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#120000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#130000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#140000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#150000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#160000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#170000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#180000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#190000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.linux64 b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.linux64 new file mode 100644 index 000000000..538167b24 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.linux64 @@ -0,0 +1,181 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 64 aaaae Int64 [63:0] $end +$var wire 1 aaaaf Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf +$end + +#10000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#20000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#30000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#40000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#50000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#60000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#70000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#80000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#90000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#100000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#110000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#120000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#130000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#140000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#150000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#160000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#170000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#180000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#190000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.linuxaarch64 b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.linuxaarch64 new file mode 100644 index 000000000..538167b24 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.linuxaarch64 @@ -0,0 +1,181 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 64 aaaae Int64 [63:0] $end +$var wire 1 aaaaf Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf +$end + +#10000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#20000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#30000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#40000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#50000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#60000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#70000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#80000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#90000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#100000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#110000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#120000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#130000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#140000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#150000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#160000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#170000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#180000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#190000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.macosx64 b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.macosx64 new file mode 100644 index 000000000..538167b24 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test04/golden/test04.vcd.macosx64 @@ -0,0 +1,181 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 8 aaaaa Char [7:0] $end +$var wire 16 aaaab Short [15:0] $end +$var wire 32 aaaac Int [31:0] $end +$var wire 64 aaaad Long [63:0] $end +$var wire 64 aaaae Int64 [63:0] $end +$var wire 1 aaaaf Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf +$end + +#10000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#20000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#30000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#40000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#50000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#60000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#70000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#80000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#90000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#100000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#110000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#120000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#130000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#140000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#150000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#160000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#170000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#180000 +b111 aaaaa +b11111 aaaab +b11111111111111111111110000000001 aaaac +b11111111111 aaaad +b1111111111111111111111111111111111111111 aaaae +1aaaaf + +#190000 +b1 aaaaa +b1111111111111110 aaaab +b10000000000 aaaac +b1111111111111111111111111111111111111111111111111111100000000000 aaaad +b1111111111111111111111110000000000000000000000000000000000000000 aaaae +0aaaaf + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test04/test04.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test04/test04.cpp new file mode 100644 index 000000000..546b3ca55 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test04/test04.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + char obj1; + short obj2; + int obj3; + long obj4; + int64 obj5; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = 0; + obj4 = 0; + obj5 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 7; + obj2 = 31; + obj3 = -1023; + obj4 = 2047; + obj5 = -1; + obj5 = ~(obj5 << 40); + wait(); + obj1 = 1; + obj2 = -2; + obj3 = 1024; + obj4 = -2048; + obj5 = -(obj5+1); + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_vcd_trace_file("test04"); + sc_trace(tf, P1.obj1, "Char"); + sc_trace(tf, P1.obj2, "Short"); + sc_trace(tf, P1.obj3, "Int"); + sc_trace(tf, P1.obj4, "Long"); + sc_trace(tf, P1.obj5, "Int64"); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_vcd_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test05/golden/test05.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test05/golden/test05.vcd new file mode 100644 index 000000000..4e8be3b3b --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test05/golden/test05.vcd @@ -0,0 +1,181 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 4 aaaaa Char [3:0] $end +$var wire 12 aaaab Short [11:0] $end +$var wire 14 aaaac Int [13:0] $end +$var wire 14 aaaad Long [13:0] $end +$var wire 44 aaaae Int64 [43:0] $end +$var wire 1 aaaaf Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf +$end + +#10000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#20000 +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf + +#30000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#40000 +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf + +#50000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#60000 +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf + +#70000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#80000 +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf + +#90000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#100000 +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf + +#110000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#120000 +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf + +#130000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#140000 +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf + +#150000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#160000 +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf + +#170000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#180000 +b111 aaaaa +b11111 aaaab +bx aaaac +b11111111111 aaaad +bx aaaae +1aaaaf + +#190000 +b1 aaaaa +bx aaaab +b10000000000 aaaac +bx aaaad +b1110000000000000000000000000000000000000000 aaaae +0aaaaf + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test05/test05.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test05/test05.cpp new file mode 100644 index 000000000..b0880c4c6 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test05/test05.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + char obj1; + short obj2; + int obj3; + long obj4; + int64 obj5; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = 0; + obj4 = 0; + obj5 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 7; + obj2 = 31; + obj3 = -1023; + obj4 = 2047; + obj5 = -1; + obj5 = obj5 << 40; + wait(); + obj1 = 1; + obj2 = -2; + obj3 = 1024; + obj4 = -2048; + obj5 = 7; + obj5 = obj5 << 40; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_vcd_trace_file("test05"); + sc_trace(tf, P1.obj1, "Char", 4); + sc_trace(tf, P1.obj2, "Short", 12); + sc_trace(tf, P1.obj3, "Int", 14); + sc_trace(tf, P1.obj4, "Long", 14); + sc_trace(tf, P1.obj5, "Int64", 44); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_vcd_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test06/golden/test06.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test06/golden/test06.vcd new file mode 100644 index 000000000..f46546373 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test06/golden/test06.vcd @@ -0,0 +1,97 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var real 1 aaaaa Float $end +$var real 1 aaaab Double $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +r12.34500026702881 aaaaa +r-13.5678923 aaaab +$end + +#10000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#20000 +r12.34500026702881 aaaaa +r-13.5678923 aaaab + +#30000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#40000 +r12.34500026702881 aaaaa +r-13.5678923 aaaab + +#50000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#60000 +r12.34500026702881 aaaaa +r-13.5678923 aaaab + +#70000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#80000 +r12.34500026702881 aaaaa +r-13.5678923 aaaab + +#90000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#100000 +r12.34500026702881 aaaaa +r-13.5678923 aaaab + +#110000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#120000 +r12.34500026702881 aaaaa +r-13.5678923 aaaab + +#130000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#140000 +r12.34500026702881 aaaaa +r-13.5678923 aaaab + +#150000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#160000 +r12.34500026702881 aaaaa +r-13.5678923 aaaab + +#170000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#180000 +r12.34500026702881 aaaaa +r-13.5678923 aaaab + +#190000 +r-182634880 aaaaa +r1672357.298346 aaaab + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test06/test06.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test06/test06.cpp new file mode 100644 index 000000000..a24951485 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test06/test06.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + float obj1; + double obj2; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0.0; + obj2 = 0.0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 12.345; + obj2 = -13.5678923; + wait(); + obj1 = -182634876.5659374; + obj2 = 1672357.298346; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_vcd_trace_file("test06"); + sc_trace(tf, P1.obj1, "Float"); + sc_trace(tf, P1.obj2, "Double"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_vcd_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test07/golden/test07.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test07/golden/test07.vcd new file mode 100644 index 000000000..0c2a3a022 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test07/golden/test07.vcd @@ -0,0 +1,139 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 4 aaaaa Signed [3:0] $end +$var wire 4 aaaab Unsigned [3:0] $end +$var wire 4 aaaac BV [3:0] $end +$var wire 4 aaaad SV [3:0] $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad +$end + +#10000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#20000 +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad + +#30000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#40000 +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad + +#50000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#60000 +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad + +#70000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#80000 +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad + +#90000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#100000 +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad + +#110000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#120000 +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad + +#130000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#140000 +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad + +#150000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#160000 +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad + +#170000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#180000 +b11 aaaaa +b111 aaaab +b11 aaaac +b1100 aaaad + +#190000 +b1101 aaaaa +b101 aaaab +b1111 aaaac +b1110 aaaad + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test07/test07.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test07/test07.cpp new file mode 100644 index 000000000..b0a73c6c4 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test07/test07.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + sc_signal >& bv; + sc_signal >& sv; + + sc_signed obj1; + sc_unsigned obj2; + + proc1( sc_module_name NAME, + sc_signal& CLK, + sc_signal >& BV, + sc_signal >& SV ) + : bv(BV), sv(SV), obj1(4), obj2(4) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + bv = "0000"; + sv = "0000"; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 3; + obj2 = 7; + bv = "0011"; + sv = "1100"; + wait(); + obj1 = -3; + obj2 = 5; + bv = "1111"; + sv = "1110"; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + sc_signal > bv; + sc_signal > sv; + + proc1 P1("P1", clock, bv, sv); + + tf = sc_create_vcd_trace_file("test07"); + sc_trace(tf, P1.obj1, "Signed"); + sc_trace(tf, P1.obj2, "Unsigned"); + sc_trace(tf, bv, "BV"); + sc_trace(tf, sv, "SV"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_vcd_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test08/golden/test08.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test08/golden/test08.vcd new file mode 100644 index 000000000..89c44a8e3 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test08/golden/test08.vcd @@ -0,0 +1,160 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 1 aaaaa Clock $end +$var wire 32 aaaab Int [31:0] $end +$var wire 8 aaaac Char [7:0] $end +$var real 1 aaaad Float $end +$var wire 1 aaaae Logic $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae +$end + +#10000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#20000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#30000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#40000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#50000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#60000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#70000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#80000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#90000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#100000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#110000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#120000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#130000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#140000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#150000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#160000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#170000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#180000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#190000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test08/test08.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test08/test08.cpp new file mode 100644 index 000000000..5ca91070c --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test08/test08.cpp @@ -0,0 +1,116 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + sc_signal& Isig; + sc_signal& Csig; + sc_signal& Fsig; + sc_signal& Lsig; + + proc1( sc_module_name NAME, + sc_signal& CLK, + sc_signal& ISIG, + sc_signal& CSIG, + sc_signal& FSIG, + sc_signal& LSIG ) + : Isig(ISIG), Csig(CSIG), Fsig(FSIG), Lsig(LSIG) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + Isig = 0; + Csig = 0; + Fsig = 0.0; + Lsig = SC_LOGIC_0;//'0'; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + Isig = 1023; + Csig = 15; + Fsig = -4; + Lsig = SC_LOGIC_X;//'x'; + wait(); + Isig = 10; + Csig = 8; + Fsig = 1000.23456; + Lsig = SC_LOGIC_Z;//'z'; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + sc_signal I; + sc_signal C; + sc_signal F; + sc_signal L; + + proc1 P1("P1", clock, I, C, F, L); + + tf = sc_create_vcd_trace_file("test08"); + sc_trace(tf, clock, "Clock"); + sc_trace(tf, I, "Int", 32); + sc_trace(tf, C, "Char", 8); + sc_trace(tf, F, "Float"); + sc_trace(tf, L, "Logic"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_vcd_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test09/golden/test09.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test09/golden/test09.vcd new file mode 100644 index 000000000..89c44a8e3 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test09/golden/test09.vcd @@ -0,0 +1,160 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 1 aaaaa Clock $end +$var wire 32 aaaab Int [31:0] $end +$var wire 8 aaaac Char [7:0] $end +$var real 1 aaaad Float $end +$var wire 1 aaaae Logic $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae +$end + +#10000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#20000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#30000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#40000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#50000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#60000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#70000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#80000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#90000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#100000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#110000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#120000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#130000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#140000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#150000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#160000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#170000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#180000 +1aaaaa +b1111111111 aaaab +b1111 aaaac +r-4 aaaad +xaaaae + +#190000 +0aaaaa +b1010 aaaab +b1000 aaaac +r1000.234558105469 aaaad +zaaaae + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test09/test09.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test09/test09.cpp new file mode 100644 index 000000000..2cf32898d --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test09/test09.cpp @@ -0,0 +1,118 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test09.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + sc_signal& Isig; + sc_signal& Csig; + sc_signal& Fsig; + sc_signal& Lsig; + + proc1( sc_module_name NAME, + sc_signal& CLK, + sc_signal& ISIG, + sc_signal& CSIG, + sc_signal& FSIG, + sc_signal& LSIG ) + : Isig(ISIG), Csig(CSIG), Fsig(FSIG), Lsig(LSIG) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + Isig = 0; + Csig = 0; + Fsig = 0.0; + Lsig = SC_LOGIC_0;//'0'; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + Isig = 1023; + Csig = 15; + Fsig = -4; + Lsig = SC_LOGIC_X;//'x'; + wait(); + Isig = 10; + Csig = 8; + Fsig = 1000.23456; + Lsig = SC_LOGIC_Z;//'z'; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + sc_signal I; + sc_signal C; + sc_signal F; + sc_signal L; + + proc1 P1("P1", clock, I, C, F, L); + + tf = sc_create_vcd_trace_file("test09"); + sc_trace(tf, clock, "Clock"); + sc_trace(tf, I, "Int"); + sc_trace(tf, C, "Char"); + sc_trace(tf, F, "Float"); + sc_trace(tf, L, "Logic"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + + sc_close_vcd_trace_file( tf ); + + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test10/golden/test10.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test10/golden/test10.vcd new file mode 100644 index 000000000..ade576b74 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test10/golden/test10.vcd @@ -0,0 +1,97 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 2 aaaaa Enum [1:0] $end +$var wire 1 aaaab Clock $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b0 aaaaa +1aaaab +$end + +#10000 +b1 aaaaa +0aaaab + +#20000 +b10 aaaaa +1aaaab + +#30000 +b0 aaaaa +0aaaab + +#40000 +b1 aaaaa +1aaaab + +#50000 +b10 aaaaa +0aaaab + +#60000 +b0 aaaaa +1aaaab + +#70000 +b1 aaaaa +0aaaab + +#80000 +b10 aaaaa +1aaaab + +#90000 +b0 aaaaa +0aaaab + +#100000 +b1 aaaaa +1aaaab + +#110000 +b10 aaaaa +0aaaab + +#120000 +b0 aaaaa +1aaaab + +#130000 +b1 aaaaa +0aaaab + +#140000 +b10 aaaaa +1aaaab + +#150000 +b0 aaaaa +0aaaab + +#160000 +b1 aaaaa +1aaaab + +#170000 +b10 aaaaa +0aaaab + +#180000 +b0 aaaaa +1aaaab + +#190000 +b1 aaaaa +0aaaab + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test10/test10.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test10/test10.cpp new file mode 100644 index 000000000..2d2688a34 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test10/test10.cpp @@ -0,0 +1,107 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + enum Ttype { + OK, + NOTOK, + SOSO + }; + + unsigned obj1; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = OK; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = OK; + wait(); + obj1 = NOTOK; + wait(); + obj1 = SOSO; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + char *enum_literals[4]; + enum_literals[0] = "OK"; + enum_literals[1] = "NOTOK"; + enum_literals[2] = "SOSO"; + enum_literals[3] = 0; + + proc1 P1("P1", clock); + + tf = sc_create_vcd_trace_file("test10"); + sc_trace(tf, P1.obj1, "Enum", (const char **) enum_literals); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_vcd_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test12/golden/test12.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test12/golden/test12.vcd new file mode 100644 index 000000000..00ddc9460 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test12/golden/test12.vcd @@ -0,0 +1,139 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 10 aaaaa Signed [9:0] $end +$var wire 10 aaaab Unsigned [9:0] $end +$var wire 10 aaaac BV [9:0] $end +$var wire 10 aaaad SV [9:0] $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad +$end + +#10000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#20000 +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad + +#30000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#40000 +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad + +#50000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#60000 +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad + +#70000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#80000 +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad + +#90000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#100000 +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad + +#110000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#120000 +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad + +#130000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#140000 +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad + +#150000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#160000 +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad + +#170000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#180000 +b11 aaaaa +b111 aaaab +b11 aaaac +b111 aaaad + +#190000 +b1111111101 aaaaa +b101 aaaab +b1111111101 aaaac +b101 aaaad + +#200000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test12/test12.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test12/test12.cpp new file mode 100644 index 000000000..d4f19a26e --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test12/test12.cpp @@ -0,0 +1,117 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test12.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + sc_signal >& bv; + sc_signal >& sv; + + sc_int<10> obj1; + sc_uint<10> obj2; + + proc1( sc_module_name NAME, + sc_signal& CLK, + sc_signal >& BV, + sc_signal >& SV ) + : bv(BV), sv(SV) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + bv.write(0); + sv.write(0); + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 3; + obj2 = 7; + bv = obj1; + sv = obj2; + wait(); + obj1 = -3; + obj2 = 5; + bv = obj1; + sv = obj2; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + sc_signal > bv; + sc_signal > sv; + + proc1 P1("P1", clock, bv, sv); + + tf = sc_create_vcd_trace_file("test12"); + sc_trace(tf, P1.obj1, "Signed"); + sc_trace(tf, P1.obj2, "Unsigned"); + sc_trace(tf, bv, "BV"); + sc_trace(tf, sv, "SV"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { +cerr << sc_time_stamp() << endl; + clock.write(1); + sc_start(10, SC_NS); +cerr << sc_time_stamp() << endl; + clock.write(0); + sc_start(10, SC_NS); +cerr << sc_time_stamp() << endl; + } + + sc_close_vcd_trace_file( tf ); + + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test13/golden/test13.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test13/golden/test13.vcd new file mode 100644 index 000000000..f1b55ff3a --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test13/golden/test13.vcd @@ -0,0 +1,32 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 1 aaaaa clk $end +$scope module mod $end +$var wire 37 aaaab a [36:0] $end +$upscope $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +1aaaaa +b0 aaaab +$end + +#25000 +0aaaaa + +#50000 +1aaaaa +b1100 aaaab + +#75000 +0aaaaa + diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test13/test13.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test13/test13.cpp new file mode 100644 index 000000000..1c3333c78 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test13/test13.cpp @@ -0,0 +1,53 @@ +#include +sc_trace_file* sc_tf; + +class Mod : public sc_module +{ + public: + sc_in_clk clk; + sc_in > a; + + SC_HAS_PROCESS(Mod); + void foo() + { + cout << sc_time_stamp() << "\n"; + cout << " a = " << a << "\n"; + cout << "\n"; + + return; + + } // foo() + + Mod(const sc_module_name& name) : sc_module(name), a("a") + { + SC_METHOD(foo); + sensitive << clk.pos(); + dont_initialize(); + + sc_trace(sc_tf, a, a.name()); + } + +}; // class Mod + + +int sc_main(int argc, char* argv[]) +{ + sc_clock clk("clk", 50, SC_NS, 0.5, 0, SC_NS); + sc_signal > a; + + sc_tf = sc_create_vcd_trace_file("test13"); + + Mod mod("mod"); + + mod.clk(clk); + mod.a(a); + + sc_trace(sc_tf, clk, clk.name()); + + sc_start(50, SC_NS); + a = 12; + sc_start(50, SC_NS); + + return 0; + +} // sc_main() diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test14/golden/test14.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test14/golden/test14.vcd new file mode 100644 index 000000000..78a2f6ebb --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test14/golden/test14.vcd @@ -0,0 +1,35 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var wire 1 aaaaa clk $end +$scope module mod $end +$var wire 37 aaaab a [36:0] $end +$var wire 1 aaaac port_1 $end +$upscope $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +1aaaaa +b0 aaaab +0aaaac +$end + +#25000 +0aaaaa + +#50000 +1aaaaa +b1100 aaaab +1aaaac + +#75000 +0aaaaa + diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test14/test14.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test14/test14.cpp new file mode 100644 index 000000000..a53fdc6e8 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test14/test14.cpp @@ -0,0 +1,65 @@ + +#include + +sc_trace_file* sc_tf; + +class Mod : public sc_module +{ + public: + + sc_in_clk clk; + + sc_in > a; + sc_inout b; + + + + SC_HAS_PROCESS(Mod); + + void foo() + { + cout << sc_time_stamp() << "\n"; + cout << " a = " << a << " b = " << b << "\n"; + cout << "\n"; + return; + } // foo() + + Mod(const sc_module_name& name) : sc_module(name), a("a") + { + SC_METHOD(foo); + sensitive << clk.pos(); + dont_initialize(); + } + + void start_of_simulation() { + + sc_trace(sc_tf, a, a.name()); + sc_trace(sc_tf, b, b.name()); + } + +}; // class Mod + + + + + +int sc_main(int argc, char* argv[]) + +{ + sc_clock clk("clk", 50, SC_NS, 0.5, 0, SC_NS); + sc_signal > a; + sc_signal b; + sc_tf = sc_create_vcd_trace_file("test14"); + Mod mod("mod"); + mod.clk(clk); + mod.a(a); + mod.b(b); + sc_trace(sc_tf, clk, clk.name()); + sc_start(50, SC_NS); + a = 12; + b = true; + sc_start(50, SC_NS); + return 0; +} // sc_main() + + diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test15/golden/test15.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test15/golden/test15.vcd new file mode 100644 index 000000000..c6c94f7b7 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test15/golden/test15.vcd @@ -0,0 +1,44 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$scope module test_top $end +$var wire 32 aaaaa sig [31:0] $end +$upscope $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars +b10 aaaaa +$end + +#1 +b11 aaaaa + +#2 +b100 aaaaa + +#1002 +b111 aaaaa + +#2002 +b1000 aaaaa + +#3002 +b1001 aaaaa + +#3003 +b1010 aaaaa + +#3005 +b1011 aaaaa + +#4005 +b1100 aaaaa + diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test15/test15.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test15/test15.cpp new file mode 100644 index 000000000..979572423 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test15/test15.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test15.cpp -- test delta cycle tracing + + Original Author: Romain I Popov, Intel Corporation, 2017-05-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +SC_MODULE(trace_delta_test) +{ + sc_signal sig; + sc_inout iport; + + SC_CTOR(trace_delta_test) + : sig("sig",0) + { + iport.bind(sig); + iport.initialize(1); + SC_THREAD(test_thread); + } + + void test_thread() { + cout << "initial sig value is " << sig.read() << endl; + sig = 2; + wait(SC_ZERO_TIME); + sig = 3; + wait(SC_ZERO_TIME); + sig = 4; + wait(1, SC_PS); + sig = 5; // This won't be shown on delta-cycle enabled trace + wait(1, SC_PS); + sig = 6; // This won't be shown on delta-cycle enabled trace + wait(1, SC_NS); + sig = 7; + wait(1, SC_NS); + sig = 8; + wait(1, SC_NS); + sig = 9; + wait(SC_ZERO_TIME); + sig = 10; + wait(3, SC_PS); + sig = 11; // Ok: 3ps > 2ps delta cycle shift + wait(1, SC_NS); + sig = 12; + + cout << "stop at " << sc_time_stamp() << endl; + sc_stop(); + } + +}; + + +int sc_main(int argc, char **argv) +{ + trace_delta_test test_top("test_top"); + sc_trace_file* tf = sc_create_vcd_trace_file("test15"); + sc_trace_delta_cycles(tf,true); + sc_trace(tf, test_top.sig, test_top.sig.name()); + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test16/golden/test16.vcd b/src/systemc/tests/systemc/tracing/vcd_trace/test16/golden/test16.vcd new file mode 100644 index 000000000..9e5cd34d7 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test16/golden/test16.vcd @@ -0,0 +1,51 @@ + +$timescale + 1 ps +$end + +$scope module SystemC $end +$var event 1 aaaaa event $end +$var time 64 aaaab time [63:0] $end +$upscope $end +$enddefinitions $end + +$comment +All initial values are dumped below at time 0 sec = 0 timescale units. +$end + +$dumpvars + +b0 aaaab +$end + +#1000 +1aaaaa +b1111101000 aaaab + +#2000 +1aaaaa +b11111010000 aaaab + +#3000 +b101110111000 aaaab + +#4000 +1aaaaa +b111110100000 aaaab + +#5000 +1aaaaa +b1001110001000 aaaab + +#6000 +1aaaaa +b1011101110000 aaaab + +#7000 +b1101101011000 aaaab + +#8000 +1aaaaa +b1111101000000 aaaab + +#9000 diff --git a/src/systemc/tests/systemc/tracing/vcd_trace/test16/test16.cpp b/src/systemc/tests/systemc/tracing/vcd_trace/test16/test16.cpp new file mode 100644 index 000000000..40ee45d20 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/vcd_trace/test16/test16.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test15.cpp -- test event/time tracing + + Original Author: Philipp A Hartmann, Intel Corporation, 2017-08-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include +using namespace sc_core; + +SC_MODULE(module) +{ + SC_CTOR(module) + { + SC_THREAD(driver); + SC_METHOD(consumer); + sensitive << event; + dont_initialize(); + } + + void driver() + { + wait(1, SC_NS); + event.notify(); // t == 1ns + + wait(1, SC_NS); + event.notify(SC_ZERO_TIME); // t == 2ns + + wait(1, SC_NS); + event.notify(1, SC_NS); // t == 4ns + time = sc_time_stamp(); + + wait(2, SC_NS); + event.notify(); // t == 5ns + + wait(1, SC_NS); + event.notify(SC_ZERO_TIME); // t == 6ns + + wait(1, SC_NS); + event.notify(1, SC_NS); // t == 8ns + time = sc_time_stamp(); + + wait(2, SC_NS); + } + + void consumer() + { + time = sc_time_stamp(); + } + + sc_event event; + sc_time time; +}; + +int sc_main(int argc, char* argv[]) +{ + sc_trace_file* tf = sc_create_vcd_trace_file("test16"); + + module m("m"); + + sc_trace(tf, m.event, "event"); + sc_trace(tf, m.time, "time"); + + sc_start(); + sc_stop(); + + sc_close_vcd_trace_file(tf); + return 0; +} + + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/mixed/golden/mixed.awif b/src/systemc/tests/systemc/tracing/wif_trace/mixed/golden/mixed.awif new file mode 100644 index 000000000..2444304f7 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/mixed/golden/mixed.awif @@ -0,0 +1,462 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "a" BIT 0 31 variable ; +start_trace O0 ; +declare O1 "b" BIT 0 31 variable ; +start_trace O1 ; +declare O2 "sum" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "clk" BIT variable ; +start_trace O3 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000000000000000000000011110011" ; +assign O1 "00000000000000000100101010001101" ; +assign O2 "00000000000000000000000000000000" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000110011000100010" ; +assign O1 "00000000000000000100110100100001" ; +assign O2 "00000000000000000100101110000000" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000101011001111001" ; +assign O1 "00000000000000000000011011101001" ; +assign O2 "00000000000000001011001101000011" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000010100010110101" ; +assign O1 "00000000000000000001110000100100" ; +assign O2 "00000000000000000101110101100010" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000001111110101111" ; +assign O1 "00000000000000000001110111101111" ; +assign O2 "00000000000000000100010011011001" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000100000111000010" ; +assign O1 "00000000000000000001101011111011" ; +assign O2 "00000000000000000011110110011110" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000011111101110100" ; +assign O1 "00000000000000000011011100011101" ; +assign O2 "00000000000000000101110010111101" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000000111110111101" ; +assign O1 "00000000000000000111010101111010" ; +assign O2 "00000000000000000111011010010001" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000001111000011000" ; +assign O1 "00000000000000000111101000101001" ; +assign O2 "00000000000000001000010100110111" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000110111111111010" ; +assign O1 "00000000000000000111000110111101" ; +assign O2 "00000000000000001001100001000001" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000101111000100100" ; +assign O1 "00000000000000000110101010111001" ; +assign O2 "00000000000000001110000110110111" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000000101110001111" ; +assign O1 "00000000000000000100111110100100" ; +assign O2 "00000000000000001100100011011101" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000110100001101111" ; +assign O1 "00000000000000000100110100001101" ; +assign O2 "00000000000000000101101100110011" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000000101100010111" ; +assign O1 "00000000000000000100111111001110" ; +assign O2 "00000000000000001011010101111100" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000111111101111001" ; +assign O1 "00000000000000000101001000001111" ; +assign O2 "00000000000000000101101011100101" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000101100110010100" ; +assign O1 "00000000000000000011000111000100" ; +assign O2 "00000000000000001101000110001000" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000010100100000000" ; +assign O1 "00000000000000000101101000001101" ; +assign O2 "00000000000000001000101101011000" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000100110001111011" ; +assign O1 "00000000000000000000111010011001" ; +assign O2 "00000000000000001000001100001101" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000111101101101111" ; +assign O1 "00000000000000000111011000100111" ; +assign O2 "00000000000000000101101100010100" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000001111010101110" ; +assign O1 "00000000000000000001110011010111" ; +assign O2 "00000000000000001111000110010110" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000110101110010100" ; +assign O1 "00000000000000000010000101011000" ; +assign O2 "00000000000000000011101110000101" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000100111010000001" ; +assign O1 "00000000000000000010010011011110" ; +assign O2 "00000000000000001000110011101100" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000111011101001101" ; +assign O1 "00000000000000000001001100001010" ; +assign O2 "00000000000000000111001101011111" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000101010001110110" ; +assign O1 "00000000000000000111101010111110" ; +assign O2 "00000000000000001000101001010111" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000100100010101110" ; +assign O1 "00000000000000000101001001010100" ; +assign O2 "00000000000000001100111100110100" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000000000011101010" ; +assign O1 "00000000000000000101111010101101" ; +assign O2 "00000000000000001001101100000010" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000001100000010000" ; +assign O1 "00000000000000000011111011101010" ; +assign O2 "00000000000000000101111110010111" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000111011001111011" ; +assign O1 "00000000000000000001011000111011" ; +assign O2 "00000000000000000101011011111010" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000000000101101101" ; +assign O1 "00000000000000000111111010111111" ; +assign O2 "00000000000000001000110010110110" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000110111001010110" ; +assign O1 "00000000000000000011110111110001" ; +assign O2 "00000000000000001000000000101100" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000000111000000100" ; +assign O1 "00000000000000000011010001111101" ; +assign O2 "00000000000000001010110001000111" ; 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+ +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000100100110110010" ; +assign O1 "00000000000000000101110100101001" ; +assign O2 "00000000000000001010110001110000" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000001010010111110" ; +assign O1 "00000000000000000000010101000110" ; +assign O2 "00000000000000001010011011011011" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000010001000111100" ; +assign O1 "00000000000000000001110010011010" ; +assign O2 "00000000000000000001101000000100" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000011101011110001" ; +assign O1 "00000000000000000100001100100011" ; +assign O2 "00000000000000000011111011010110" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000010110100010100" ; +assign O1 "00000000000000000011000100000001" ; +assign O2 "00000000000000000111111000010100" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000011000110011011" ; +assign O1 "00000000000000000110110101010100" ; +assign O2 "00000000000000000101111000010101" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000000000100100100" ; +assign O1 "00000000000000000000110110111010" ; +assign O2 "00000000000000001001111011101111" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000101100111010101" ; +assign O1 "00000000000000000110110001001001" ; +assign O2 "00000000000000000000111011011110" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000000011011000110" ; +assign O1 "00000000000000000110001010101100" ; +assign O2 "00000000000000001100011000011110" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + +delta_time 10000 ; +assign O0 "00000000000000000001100101110001" ; +assign O1 "00000000000000000111101111001100" ; +assign O2 "00000000000000000110100101110010" ; +assign O3 '1' ; + +delta_time 10000 ; +assign O3 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/mixed/isaac.h b/src/systemc/tests/systemc/tracing/wif_trace/mixed/isaac.h new file mode 100644 index 000000000..9625be2ac --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/mixed/isaac.h @@ -0,0 +1,272 @@ +#ifndef __ISAAC_HPP +#define __ISAAC_HPP + + +/* + + C++ TEMPLATE VERSION OF Robert J. Jenkins Jr.'s + ISAAC Random Number Generator. + + Ported from vanilla C to to template C++ class + by Quinn Tyler Jackson on 16-23 July 1998. + + quinn@qtj.net + + The function for the expected period of this + random number generator, according to Jenkins is: + + f(a,b) = 2**((a+b*(3+2^^a)-1) + + (where a is ALPHA and b is bitwidth) + + So, for a bitwidth of 32 and an ALPHA of 8, + the expected period of ISAAC is: + + 2^^(8+32*(3+2^^8)-1) = 2^^8295 + + Jackson has been able to run implementations + with an ALPHA as high as 16, or + + 2^^2097263 + +*/ + + +typedef unsigned int UINT32; +const UINT32 GOLDEN_RATIO = UINT32(0x9e3779b9); + + +template +class QTIsaac +{ + public: + + typedef unsigned char byte; + + struct randctx + { + randctx(void) + { + randrsl = new UINT32[N]; + randmem = new UINT32[N]; + } + + ~randctx(void) + { + delete [] randrsl; + delete [] randmem; + } + + UINT32 randcnt; + UINT32* randrsl; + UINT32* randmem; + UINT32 randa; + UINT32 randb; + UINT32 randc; + }; + + QTIsaac(UINT32 a = 0, UINT32 b = 0, UINT32 c = 0); + virtual ~QTIsaac(void); + + UINT32 rand(void); + virtual void randinit(randctx* ctx, bool bUseSeed); + virtual void srand( + UINT32 a = 0, UINT32 b = 0, UINT32 c = 0, UINT32* s = NULL); + + enum {N = (1< +QTIsaac::QTIsaac(UINT32 a, UINT32 b, UINT32 c) : m_rc() +{ + srand(a, b, c); +} + + +template +QTIsaac::~QTIsaac(void) +{ + // DO NOTHING +} + + +template +void QTIsaac::srand(UINT32 a, UINT32 b, UINT32 c, UINT32* s) +{ + for(int i = 0; i < N; i++) + { + m_rc.randrsl[i] = s != NULL ? s[i] : 0; + } + + m_rc.randa = a; + m_rc.randb = b; + m_rc.randc = c; + + randinit(&m_rc, true); +} + + +template +inline UINT32 QTIsaac::rand(void) +{ + return 0x7fffffff & (!m_rc.randcnt-- ? + (isaac(&m_rc), m_rc.randcnt=(N-1), m_rc.randrsl[m_rc.randcnt]) : + m_rc.randrsl[m_rc.randcnt]); +} + + +template +inline void QTIsaac::randinit(randctx* ctx, bool bUseSeed) +{ + UINT32 a,b,c,d,e,f,g,h; + int i; + + a = b = c = d = e = f = g = h = GOLDEN_RATIO; + + UINT32* m = (ctx->randmem); + UINT32* r = (ctx->randrsl); + + if(!bUseSeed) + { + ctx->randa = 0; + ctx->randb = 0; + ctx->randc = 0; + } + + // scramble it + for(i=0; i < 4; ++i) + { + shuffle(a,b,c,d,e,f,g,h); + } + + if(bUseSeed) + { + // initialize using the contents of r[] as the seed + + for(i=0; i < N; i+=8) + { + a+=r[i ]; b+=r[i+1]; c+=r[i+2]; d+=r[i+3]; + e+=r[i+4]; f+=r[i+5]; g+=r[i+6]; h+=r[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + + //do a second pass to make all of the seed affect all of m + + for(i=0; i < N; i += 8) + { + a+=m[i ]; b+=m[i+1]; c+=m[i+2]; d+=m[i+3]; + e+=m[i+4]; f+=m[i+5]; g+=m[i+6]; h+=m[i+7]; + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + } + } + else + { + // fill in mm[] with messy stuff + + shuffle(a,b,c,d,e,f,g,h); + + m[i ]=a; m[i+1]=b; m[i+2]=c; m[i+3]=d; + m[i+4]=e; m[i+5]=f; m[i+6]=g; m[i+7]=h; + + } + + isaac(ctx); // fill in the first set of results + ctx->randcnt = N; // prepare to use the first set of results +} + + +template +inline UINT32 QTIsaac::ind(UINT32* mm, UINT32 x) +{ + return (*(UINT32*)((byte*)(mm) + ((x) & ((N-1)<<2)))); +} + + +template +inline void QTIsaac::rngstep(UINT32 mix, UINT32& a, UINT32& b, UINT32*& mm, UINT32*& m, UINT32*& m2, UINT32*& r, UINT32& x, UINT32& y) +{ + x = *m; + a = (a^(mix)) + *(m2++); + *(m++) = y = ind(mm,x) + a + b; + *(r++) = b = ind(mm,y>>ALPHA) + x; +} + + +template +inline void QTIsaac::shuffle(UINT32& a, UINT32& b, UINT32& c, UINT32& d, UINT32& e, UINT32& f, UINT32& g, UINT32& h) +{ + a^=b<<11; d+=a; b+=c; + b^=c>>2; e+=b; c+=d; + c^=d<<8; f+=c; d+=e; + d^=e>>16; g+=d; e+=f; + e^=f<<10; h+=e; f+=g; + f^=g>>4; a+=f; g+=h; + g^=h<<8; b+=g; h+=a; + h^=a>>9; c+=h; a+=b; +} + + +template +inline void QTIsaac::isaac(randctx* ctx) +{ + UINT32 x,y; + + UINT32* mm = ctx->randmem; + UINT32* r = ctx->randrsl; + + UINT32 a = (ctx->randa); + UINT32 b = (ctx->randb + (++ctx->randc)); + + UINT32* m = mm; + UINT32* m2 = (m+(N/2)); + UINT32* mend = m2; + + for(; m>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + m2 = mm; + + for(; m2>6) , a, b, mm, m, m2, r, x, y); + rngstep((a<<2) , a, b, mm, m, m2, r, x, y); + rngstep((a>>16), a, b, mm, m, m2, r, x, y); + } + + ctx->randb = b; + ctx->randa = a; +} + + +#endif // __ISAAC_HPP + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/mixed/mixed.cpp b/src/systemc/tests/systemc/tracing/wif_trace/mixed/mixed.cpp new file mode 100644 index 000000000..bb52e29d9 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/mixed/mixed.cpp @@ -0,0 +1,129 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + mixed.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "isaac.h" + +QTIsaac<8> rng; + +SC_MODULE( adder ) +{ + SC_HAS_PROCESS( adder ); + + sc_in clk; + sc_in a; + sc_in b; + sc_out sum; + + adder( sc_module_name NAME, + sc_clock& CLK, + sc_signal& A, + sc_signal& B, + sc_signal& SUM ) + : a(A), b(B), sum(SUM) + { + clk(CLK); + SC_METHOD( entry ); + sensitive << clk; + sensitive << a; + sensitive << b; + } + void entry(); +}; + +void +adder::entry() +{ + if (clk.posedge()) { + sum = a + b; + } +} + +SC_MODULE( stim ) +{ + SC_HAS_PROCESS( stim ); + + sc_in_clk clk; + sc_out a; + sc_out b; + + stim( sc_module_name NAME, + sc_clock& CLK, + sc_signal& A, + sc_signal& B ) + : a(A), b(B) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + void entry(); +}; + +void +stim::entry() +{ + while (true) { + a = rng.rand() % 32768; + b = rng.rand() % 32768; + wait(); + } +} + +int +sc_main( int argc, char* argv[] ) +{ + sc_signal a("a"); + sc_signal b("b"); + sc_signal sum("sum"); + sc_clock clk("clk", 20, SC_NS); + + a = 0; + b = 0; + sum = 0; + + adder add("add", clk, a, b, sum); + stim sti("sti", clk, a, b); + + sc_trace_file* tf = sc_create_wif_trace_file("mixed"); + sc_trace(tf, a, "a"); + sc_trace(tf, b, "b"); + sc_trace(tf, sum, "sum"); + sc_trace(tf, clk, "clk"); + sc_start(1000, SC_NS); + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/pct1/golden/pct1.awif b/src/systemc/tests/systemc/tracing/wif_trace/pct1/golden/pct1.awif new file mode 100644 index 000000000..354800e3d --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/pct1/golden/pct1.awif @@ -0,0 +1,81 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Tx" BIT variable ; +start_trace O0 ; +declare O1 "dout" BIT 0 31 variable ; +start_trace O1 ; +declare O2 "wr" BIT variable ; +start_trace O2 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 '1' ; +assign O1 "00000000000000000000000000000000" ; +assign O2 '1' ; + +delta_time 50000 ; +assign O0 '0' ; + +delta_time 20000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 20000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 20000 ; +assign O0 '1' ; + +delta_time 20000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 80000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 30000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 20000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 10000 ; +assign O0 '0' ; + +delta_time 10000 ; +assign O0 '1' ; + +delta_time 90000 ; +assign O0 '0' ; + +delta_time 20000 ; +assign O0 '1' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/pct1/main.cpp b/src/systemc/tests/systemc/tracing/wif_trace/pct1/main.cpp new file mode 100644 index 000000000..bb8807add --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/pct1/main.cpp @@ -0,0 +1,69 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + main.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Main routine for tri-state simulation */ + +#include "tx.h" +#include "monitor.h" + +int sc_main(int ac, char *av[]) +{ + sc_signal tx; + sc_signal wr; + sc_signal dout; + sc_signal two_stop_bits; + sc_clock clock("CLK", 10.0, SC_NS, 0.5, 0.0, SC_NS); + sc_trace_file *tf = sc_create_wif_trace_file("pct1"); + + tx = true; + wr = true; + dout = 0; + + two_stop_bits = true; + sio_tx TX("Transmitter", clock, two_stop_bits, tx); + monitor MON("Monitor", clock, tx, dout, wr); + + // sc_trace(tf, clock.signal(), "Clock"); + sc_trace(tf, tx, "Tx"); + sc_trace(tf, dout, "dout"); + sc_trace(tf, wr, "wr"); + + sc_start(500, SC_NS); + sc_close_wif_trace_file( tf ); + return 0; +} + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/pct1/monitor.cpp b/src/systemc/tests/systemc/tracing/wif_trace/pct1/monitor.cpp new file mode 100644 index 000000000..9e8f68c6e --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/pct1/monitor.cpp @@ -0,0 +1,49 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "monitor.h" + +void monitor::entry() +{ + int n=0; + + while(1) { + printf("%x", tx.read()); + wait(); + } +} // end of entry function + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/pct1/monitor.h b/src/systemc/tests/systemc/tracing/wif_trace/pct1/monitor.h new file mode 100644 index 000000000..1c37a3b28 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/pct1/monitor.h @@ -0,0 +1,63 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + monitor.h -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( monitor ) +{ + SC_HAS_PROCESS( monitor ); + + sc_in_clk clk; + sc_in tx; + sc_in dout; + sc_in wr; + + // Constructor + monitor( sc_module_name NAME, + sc_clock& CLK, + sc_signal& TX, + sc_signal& DOUT, + sc_signal& WR ) + : tx(TX), dout(DOUT), wr(WR) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); +}; diff --git a/src/systemc/tests/systemc/tracing/wif_trace/pct1/pct1.f b/src/systemc/tests/systemc/tracing/wif_trace/pct1/pct1.f new file mode 100644 index 000000000..4c3ccdbdb --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/pct1/pct1.f @@ -0,0 +1,3 @@ +pct1/main.cpp +pct1/monitor.cpp +pct1/tx.cpp diff --git a/src/systemc/tests/systemc/tracing/wif_trace/pct1/tx.cpp b/src/systemc/tests/systemc/tracing/wif_trace/pct1/tx.cpp new file mode 100644 index 000000000..d868d2402 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/pct1/tx.cpp @@ -0,0 +1,98 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + tx.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +/* Filename driver.cc */ +/* This is a SIO transmitter */ + +#include "tx.h" + +void sio_tx::byte (char c) +{ + bool parity = false; + int n; + + // Start bit + tx.write(false); + wait(); + + // 8 data bits + for (n=0; n<8; n++) { + if (c & 0x1) parity=!parity; + tx.write (c & 0x1); + c = c >>1; + wait(); + } + + // parity bit + tx.write(parity); + wait(); + + // stop bits; + if (two_stop_bits) { + tx.write(true); + wait(); + tx.write(true); + wait(); + } else { + tx.write(true); + wait(); + } +} // end of entry function + + +void sio_tx::mark (int cycles) +{ + int n; + + for (n=0; n two_stop_bits; + sc_out tx; + + // Constructor + sio_tx( sc_module_name NAME, + sc_clock& CLK, + sc_signal& TWO_STOP_BITS, + sc_signal& TX ) + : two_stop_bits(TWO_STOP_BITS), tx(TX) + { + clk(CLK); + SC_CTHREAD( entry, clk.pos() ); + } + + // Process functionality in member function below + void entry(); + void byte (char byte); + void mark(int cycles); +}; diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test01/golden/test01.awif b/src/systemc/tests/systemc/tracing/wif_trace/test01/golden/test01.awif new file mode 100644 index 000000000..0b2dc346c --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test01/golden/test01.awif @@ -0,0 +1,141 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Bool" BIT variable ; +start_trace O0 ; +declare O1 "SC_Logic" MVL variable ; +start_trace O1 ; +declare O2 "SC_BV" BIT 0 3 variable ; +start_trace O2 ; +declare O3 "SC_LV" MVL 0 3 variable ; +start_trace O3 ; +declare O4 "Clock" BIT variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "0101" ; +assign O3 "0101" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "0110" ; +assign O3 "0110" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "0111" ; +assign O3 "0111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "1000" ; +assign O3 "1000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "1001" ; +assign O3 "1001" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O3 "1010" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 '1' ; +assign O2 "0000" ; +assign O3 "1111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 '0' ; +assign O2 "1010" ; +assign O3 "1011" ; +assign O4 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test01/test01.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test01/test01.cpp new file mode 100644 index 000000000..0ad3a2913 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test01/test01.cpp @@ -0,0 +1,118 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + bool obj1; + sc_logic obj2; + sc_bv<4> obj3; + sc_lv<4> obj4; + + proc1( sc_module_name NAME, + sc_signal& CLK) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = "0000"; + obj4 = "0000"; + } + + void entry(); +}; + +void proc1::entry() +{ + sc_bv<4> bv; + sc_lv<4> sv; + int i = 5; + wait(); + while(true) { + bv = i; + sv = i++; + obj1 = 0; + obj2 = 1; + obj3 = "0000"; + obj4 = "1111"; + wait(); + obj1 = 1; + obj2 = 0; + obj3 = "1010"; + obj4 = "1011"; + wait(); + obj3 = bv; + obj4 = sv; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test01"); + tf->set_time_unit( 1, SC_PS ); + // @@@@ ((wif_trace_file *) tf)->sc_set_wif_time_unit(-12); + sc_trace(tf, P1.obj1, "Bool"); + sc_trace(tf, P1.obj2, "SC_Logic"); + sc_trace(tf, P1.obj3, "SC_BV"); + sc_trace(tf, P1.obj4, "SC_LV"); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif new file mode 100644 index 000000000..3d1de26fd --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif @@ -0,0 +1,154 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 31 variable ; +start_trace O3 ; +declare O4 "Clock" BIT variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "00000000000000000000100000000000" ; +assign O4 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.bsd64 b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.bsd64 new file mode 100644 index 000000000..e6673ef1e --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.bsd64 @@ -0,0 +1,154 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Clock" BIT variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.cygwin64 b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.cygwin64 new file mode 100644 index 000000000..e6673ef1e --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.cygwin64 @@ -0,0 +1,154 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Clock" BIT variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.linux64 b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.linux64 new file mode 100644 index 000000000..e6673ef1e --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.linux64 @@ -0,0 +1,154 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Clock" BIT variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.linuxaarch64 b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.linuxaarch64 new file mode 100644 index 000000000..e6673ef1e --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.linuxaarch64 @@ -0,0 +1,154 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Clock" BIT variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.macosx64 b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.macosx64 new file mode 100644 index 000000000..e6673ef1e --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test02/golden/test02.awif.macosx64 @@ -0,0 +1,154 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Clock" BIT variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "00000000000000000000001111111111" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "0000000000100000" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000100000000000" ; +assign O4 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test02/test02.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test02/test02.cpp new file mode 100644 index 000000000..ed861481a --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test02/test02.cpp @@ -0,0 +1,108 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + unsigned char obj1; + unsigned short obj2; + unsigned int obj3; + unsigned long obj4; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = 0; + obj4 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 7; + obj2 = 31; + obj3 = 1023; + obj4 = 2047; + wait(); + obj1 = 1; + obj2 = 32; + obj3 = 1024; + obj4 = 2048; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test02"); + sc_trace(tf, P1.obj1, "Char"); + sc_trace(tf, P1.obj2, "Short"); + sc_trace(tf, P1.obj3, "Int"); + sc_trace(tf, P1.obj4, "Long"); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test03/golden/test03.awif b/src/systemc/tests/systemc/tracing/wif_trace/test03/golden/test03.awif new file mode 100644 index 000000000..749f0e6ce --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test03/golden/test03.awif @@ -0,0 +1,176 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 3 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 3 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 11 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 9 variable ; +start_trace O3 ; +declare O4 "Uint64" BIT 0 42 variable ; +start_trace O4 ; +declare O5 "Clock" BIT variable ; +start_trace O5 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "0000" ; +assign O2 "001111111111" ; +assign O3 "0000111111" ; +assign O4 "1000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "0011" ; +assign O2 "010000000000" ; +assign O3 "0000000000" ; +assign O4 "0000000000000000000000000000000000000000000" ; +assign O5 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test03/test03.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test03/test03.cpp new file mode 100644 index 000000000..9d58baffe --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test03/test03.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + unsigned char obj1; + unsigned short obj2; + unsigned int obj3; + unsigned long obj4; + uint64 obj5; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = 0; + obj4 = 0; + obj5 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 7; + obj2 = 31; + obj3 = 1023; + obj4 = 63; + obj5 = 1; + obj5 = obj5 << 42; + wait(); + obj1 = 1; + obj2 = 3; + obj3 = 1024; + obj4 = 2048; + obj5 = 3; + obj5 = obj5 << 42; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test03"); + sc_trace(tf, P1.obj1, "Char", 4); + sc_trace(tf, P1.obj2, "Short", 4); + sc_trace(tf, P1.obj3, "Int", 12); + sc_trace(tf, P1.obj4, "Long", 10); + sc_trace(tf, P1.obj5, "Uint64", 43); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif new file mode 100644 index 000000000..a236147e6 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif @@ -0,0 +1,176 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 31 variable ; +start_trace O3 ; +declare O4 "Int64" BIT 0 63 variable ; +start_trace O4 ; +declare O5 "Clock" BIT variable ; +start_trace O5 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "00000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "11111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.bsd64 b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.bsd64 new file mode 100644 index 000000000..41866c731 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.bsd64 @@ -0,0 +1,183 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Int64" BIT 0 63 variable ; +start_trace O4 ; +declare O5 "Clock" BIT variable ; +start_trace O5 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000000" ; +assign O1 "0000000000000000" ; +assign O2 "00000000000000000000000000000000" ; +assign O3 "0000000000000000000000000000000000000000000000000000000000000000" ; +assign O4 "0000000000000000000000000000000000000000000000000000000000000000" ; +assign O5 '0' ; +delta_time 0 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.cygwin64 b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.cygwin64 new file mode 100644 index 000000000..d113ab0bc --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.cygwin64 @@ -0,0 +1,176 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Int64" BIT 0 63 variable ; +start_trace O4 ; +declare O5 "Clock" BIT variable ; +start_trace O5 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.linux64 b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.linux64 new file mode 100644 index 000000000..d113ab0bc --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.linux64 @@ -0,0 +1,176 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Int64" BIT 0 63 variable ; +start_trace O4 ; +declare O5 "Clock" BIT variable ; +start_trace O5 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.linuxaarch64 b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.linuxaarch64 new file mode 100644 index 000000000..d113ab0bc --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.linuxaarch64 @@ -0,0 +1,176 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Int64" BIT 0 63 variable ; +start_trace O4 ; +declare O5 "Clock" BIT variable ; +start_trace O5 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.macosx64 b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.macosx64 new file mode 100644 index 000000000..d113ab0bc --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test04/golden/test04.awif.macosx64 @@ -0,0 +1,176 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 7 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 15 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 31 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 63 variable ; +start_trace O3 ; +declare O4 "Int64" BIT 0 63 variable ; +start_trace O4 ; +declare O5 "Clock" BIT variable ; +start_trace O5 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "00000111" ; +assign O1 "0000000000011111" ; +assign O2 "11111111111111111111110000000001" ; +assign O3 "0000000000000000000000000000000000000000000000000000011111111111" ; +assign O4 "0000000000000000000000001111111111111111111111111111111111111111" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "00000001" ; +assign O1 "1111111111111110" ; +assign O2 "00000000000000000000010000000000" ; +assign O3 "1111111111111111111111111111111111111111111111111111100000000000" ; +assign O4 "1111111111111111111111110000000000000000000000000000000000000000" ; +assign O5 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test04/test04.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test04/test04.cpp new file mode 100644 index 000000000..3cab6fddb --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test04/test04.cpp @@ -0,0 +1,114 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + char obj1; + short obj2; + int obj3; + long obj4; + int64 obj5; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = 0; + obj4 = 0; + obj5 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 7; + obj2 = 31; + obj3 = -1023; + obj4 = 2047; + obj5 = -1; + obj5 = ~(obj5 << 40); + wait(); + obj1 = 1; + obj2 = -2; + obj3 = 1024; + obj4 = -2048; + obj5 = -(obj5+1); + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test04"); + sc_trace(tf, P1.obj1, "Char"); + sc_trace(tf, P1.obj2, "Short"); + sc_trace(tf, P1.obj3, "Int"); + sc_trace(tf, P1.obj4, "Long"); + sc_trace(tf, P1.obj5, "Int64"); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test05/golden/test05.awif b/src/systemc/tests/systemc/tracing/wif_trace/test05/golden/test05.awif new file mode 100644 index 000000000..38b76b2c1 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test05/golden/test05.awif @@ -0,0 +1,176 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Char" BIT 0 3 variable ; +start_trace O0 ; +declare O1 "Short" BIT 0 11 variable ; +start_trace O1 ; +declare O2 "Int" BIT 0 13 variable ; +start_trace O2 ; +declare O3 "Long" BIT 0 13 variable ; +start_trace O3 ; +declare O4 "Int64" BIT 0 43 variable ; +start_trace O4 ; +declare O5 "Clock" BIT variable ; +start_trace O5 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + +delta_time 10000 ; +assign O0 "0111" ; +assign O1 "000000011111" ; +assign O2 "00000000000000" ; +assign O3 "00011111111111" ; +assign O4 "00000000000000000000000000000000000000000000" ; +assign O5 '1' ; + +delta_time 10000 ; +assign O0 "0001" ; +assign O1 "000000000000" ; +assign O2 "00010000000000" ; +assign O3 "00000000000000" ; +assign O4 "01110000000000000000000000000000000000000000" ; +assign O5 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test05/test05.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test05/test05.cpp new file mode 100644 index 000000000..c84d0fd42 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test05/test05.cpp @@ -0,0 +1,115 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test05.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + char obj1; + short obj2; + int obj3; + long obj4; + int64 obj5; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = 0; + obj4 = 0; + obj5 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 7; + obj2 = 31; + obj3 = -1023; + obj4 = 2047; + obj5 = -1; + obj5 = obj5 << 40; + wait(); + obj1 = 1; + obj2 = -2; + obj3 = 1024; + obj4 = -2048; + obj5 = 7; + obj5 = obj5 << 40; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test05"); + sc_trace(tf, P1.obj1, "Char", 4); + sc_trace(tf, P1.obj2, "Short", 12); + sc_trace(tf, P1.obj3, "Int", 14); + sc_trace(tf, P1.obj4, "Long", 14); + sc_trace(tf, P1.obj5, "Int64", 44); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test06/golden/test06.awif b/src/systemc/tests/systemc/tracing/wif_trace/test06/golden/test06.awif new file mode 100644 index 000000000..862c64add --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test06/golden/test06.awif @@ -0,0 +1,88 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Float" real variable ; +start_trace O0 ; +declare O1 "Double" real variable ; +start_trace O1 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + +delta_time 10000 ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + +delta_time 10000 ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + +delta_time 10000 ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + +delta_time 10000 ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + +delta_time 10000 ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + +delta_time 10000 ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + +delta_time 10000 ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + +delta_time 10000 ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + +delta_time 10000 ; +assign O0 12.345000 ; +assign O1 -13.567892 ; + +delta_time 10000 ; +assign O0 -182634880.000000 ; +assign O1 1672357.298346 ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test06/test06.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test06/test06.cpp new file mode 100644 index 000000000..d02147af5 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test06/test06.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + float obj1; + double obj2; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0.0; + obj2 = 0.0; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 12.345; + obj2 = -13.5678923; + wait(); + obj1 = -182634876.5659374; + obj2 = 1672357.298346; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test06"); + sc_trace(tf, P1.obj1, "Float"); + sc_trace(tf, P1.obj2, "Double"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test07/golden/test07.awif b/src/systemc/tests/systemc/tracing/wif_trace/test07/golden/test07.awif new file mode 100644 index 000000000..585b806b1 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test07/golden/test07.awif @@ -0,0 +1,132 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Signed" BIT 0 3 variable ; +start_trace O0 ; +declare O1 "Unsigned" BIT 0 3 variable ; +start_trace O1 ; +declare O2 "BV" BIT 0 3 variable ; +start_trace O2 ; +declare O3 "SV" MVL 0 3 variable ; +start_trace O3 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + +delta_time 10000 ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + +delta_time 10000 ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + +delta_time 10000 ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + +delta_time 10000 ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + +delta_time 10000 ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + +delta_time 10000 ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + +delta_time 10000 ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + +delta_time 10000 ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + +delta_time 10000 ; +assign O0 "0011" ; +assign O1 "0111" ; +assign O2 "0011" ; +assign O3 "1100" ; + +delta_time 10000 ; +assign O0 "1101" ; +assign O1 "0101" ; +assign O2 "1111" ; +assign O3 "1110" ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test07/test07.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test07/test07.cpp new file mode 100644 index 000000000..61cf796de --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test07/test07.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test07.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + sc_signal >& bv; + sc_signal >& sv; + + sc_signed obj1; + sc_unsigned obj2; + + proc1( sc_module_name NAME, + sc_signal& CLK, + sc_signal >& BV, + sc_signal >& SV ) + : bv(BV), sv(SV), obj1(4), obj2(4) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + bv = "0000"; + sv = "0000"; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = 3; + obj2 = 7; + bv = "0011"; + sv = "1100"; + wait(); + obj1 = -3; + obj2 = 5; + bv = "1111"; + sv = "1110"; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + sc_signal > bv; + sc_signal > sv; + + proc1 P1("P1", clock, bv, sv); + + tf = sc_create_wif_trace_file("test07"); + sc_trace(tf, P1.obj1, "Signed"); + sc_trace(tf, P1.obj2, "Unsigned"); + sc_trace(tf, bv, "BV"); + sc_trace(tf, sv, "SV"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test08/golden/test08.awif b/src/systemc/tests/systemc/tracing/wif_trace/test08/golden/test08.awif new file mode 100644 index 000000000..73faefe3d --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test08/golden/test08.awif @@ -0,0 +1,154 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Clock" BIT variable ; +start_trace O0 ; +declare O1 "Int" BIT 0 31 variable ; +start_trace O1 ; +declare O2 "Char" BIT 0 7 variable ; +start_trace O2 ; +declare O3 "Float" real variable ; +start_trace O3 ; +declare O4 "Logic" MVL variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test08/test08.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test08/test08.cpp new file mode 100644 index 000000000..23acc6f8b --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test08/test08.cpp @@ -0,0 +1,116 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + sc_signal& Isig; + sc_signal& Csig; + sc_signal& Fsig; + sc_signal& Lsig; + + proc1( sc_module_name NAME, + sc_signal& CLK, + sc_signal& ISIG, + sc_signal& CSIG, + sc_signal& FSIG, + sc_signal& LSIG ) + : Isig(ISIG), Csig(CSIG), Fsig(FSIG), Lsig(LSIG) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + Isig = 0; + Csig = 0; + Fsig = 0.0; + Lsig = SC_LOGIC_0;//'0'; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + Isig = 1023; + Csig = 15; + Fsig = -4; + Lsig = SC_LOGIC_X;//'x'; + wait(); + Isig = 10; + Csig = 8; + Fsig = 1000.23456; + Lsig = SC_LOGIC_Z;//'z'; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + sc_signal I; + sc_signal C; + sc_signal F; + sc_signal L; + + proc1 P1("P1", clock, I, C, F, L); + + tf = sc_create_wif_trace_file("test08"); + sc_trace(tf, clock, "Clock"); + sc_trace(tf, I, "Int", 32); + sc_trace(tf, C, "Char", 8); + sc_trace(tf, F, "Float"); + sc_trace(tf, L, "Logic"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test09/golden/test09.awif b/src/systemc/tests/systemc/tracing/wif_trace/test09/golden/test09.awif new file mode 100644 index 000000000..73faefe3d --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test09/golden/test09.awif @@ -0,0 +1,154 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Clock" BIT variable ; +start_trace O0 ; +declare O1 "Int" BIT 0 31 variable ; +start_trace O1 ; +declare O2 "Char" BIT 0 7 variable ; +start_trace O2 ; +declare O3 "Float" real variable ; +start_trace O3 ; +declare O4 "Logic" MVL variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + +delta_time 10000 ; +assign O0 '1' ; +assign O1 "00000000000000000000001111111111" ; +assign O2 "00001111" ; +assign O3 -4.000000 ; +assign O4 'X' ; + +delta_time 10000 ; +assign O0 '0' ; +assign O1 "00000000000000000000000000001010" ; +assign O2 "00001000" ; +assign O3 1000.234558 ; +assign O4 'Z' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test09/test09.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test09/test09.cpp new file mode 100644 index 000000000..a5372a9dd --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test09/test09.cpp @@ -0,0 +1,116 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test09.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + sc_signal& Isig; + sc_signal& Csig; + sc_signal& Fsig; + sc_signal& Lsig; + + proc1( sc_module_name NAME, + sc_signal& CLK, + sc_signal& ISIG, + sc_signal& CSIG, + sc_signal& FSIG, + sc_signal& LSIG ) + : Isig(ISIG), Csig(CSIG), Fsig(FSIG), Lsig(LSIG) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + Isig = 0; + Csig = 0; + Fsig = 0.0; + Lsig = SC_LOGIC_0;//'0'; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + Isig = 1023; + Csig = 15; + Fsig = -4; + Lsig = SC_LOGIC_X;//'x'; + wait(); + Isig = 10; + Csig = 8; + Fsig = 1000.23456; + Lsig = SC_LOGIC_Z;//'z'; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + sc_signal I; + sc_signal C; + sc_signal F; + sc_signal L; + + proc1 P1("P1", clock, I, C, F, L); + + tf = sc_create_wif_trace_file("test09"); + sc_trace(tf, clock, "Clock"); + sc_trace(tf, I, "Int"); + sc_trace(tf, C, "Char"); + sc_trace(tf, F, "Float"); + sc_trace(tf, L, "Logic"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test10/golden/test10.awif b/src/systemc/tests/systemc/tracing/wif_trace/test10/golden/test10.awif new file mode 100644 index 000000000..1768dbc9c --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test10/golden/test10.awif @@ -0,0 +1,89 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +type scalar "Enum__type__" enum "OK", "NOTOK", "SOSO", "SC_WIF_UNDEF" ; +declare O0 "Enum" "Enum__type__" variable ; +start_trace O0 ; +declare O1 "Clock" BIT variable ; +start_trace O1 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "OK" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "NOTOK" ; +assign O1 '0' ; + +delta_time 10000 ; +assign O0 "SOSO" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "SC_WIF_UNDEF" ; +assign O1 '0' ; + +delta_time 10000 ; +assign O0 "OK" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "NOTOK" ; +assign O1 '0' ; + +delta_time 10000 ; +assign O0 "SOSO" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "SC_WIF_UNDEF" ; +assign O1 '0' ; + +delta_time 10000 ; +assign O0 "OK" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "NOTOK" ; +assign O1 '0' ; + +delta_time 10000 ; +assign O0 "SOSO" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "SC_WIF_UNDEF" ; +assign O1 '0' ; + +delta_time 10000 ; +assign O0 "OK" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "NOTOK" ; +assign O1 '0' ; + +delta_time 10000 ; +assign O0 "SOSO" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "SC_WIF_UNDEF" ; +assign O1 '0' ; + +delta_time 10000 ; +assign O0 "OK" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "NOTOK" ; +assign O1 '0' ; + +delta_time 10000 ; +assign O0 "SOSO" ; +assign O1 '1' ; + +delta_time 10000 ; +assign O0 "SC_WIF_UNDEF" ; +assign O1 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test10/test10.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test10/test10.cpp new file mode 100644 index 000000000..5ffd2707e --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test10/test10.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test10.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + enum Ttype { + OK, + NOTOK, + SOSO + }; + + unsigned obj1; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = OK; + } + + void entry(); +}; + +void proc1::entry() +{ + wait(); + while(true) { + obj1 = OK; + wait(); + obj1 = NOTOK; + wait(); + obj1 = SOSO; + wait(); + obj1 = 5; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + char *enum_literals[4]; + enum_literals[0] = "OK"; + enum_literals[1] = "NOTOK"; + enum_literals[2] = "SOSO"; + enum_literals[3] = 0; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test10"); + sc_trace(tf, P1.obj1, "Enum", (const char **) enum_literals); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test11/golden/test11.awif b/src/systemc/tests/systemc/tracing/wif_trace/test11/golden/test11.awif new file mode 100644 index 000000000..cef27ab08 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test11/golden/test11.awif @@ -0,0 +1,116 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Bool" BIT variable ; +start_trace O0 ; +declare O1 "SC_Logic" MVL variable ; +start_trace O1 ; +declare O2 "SC_BV" BIT 0 3 variable ; +start_trace O2 ; +declare O3 "SC_LV" MVL 0 3 variable ; +start_trace O3 ; +declare O4 "Clock" BIT variable ; +start_trace O4 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 '0' ; +assign O1 '0' ; +assign O2 "0001" ; +assign O3 "0001" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "0011" ; +assign O3 "0011" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "0111" ; +assign O3 "0111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "1111" ; +assign O3 "1111" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "1110" ; +assign O3 "1110" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "1100" ; +assign O3 "1100" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "1000" ; +assign O3 "1000" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "0000" ; +assign O3 "0000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "0001" ; +assign O3 "0001" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "0011" ; +assign O3 "0011" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "0111" ; +assign O3 "0111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "1111" ; +assign O3 "1111" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "1110" ; +assign O3 "1110" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "1100" ; +assign O3 "1100" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "1000" ; +assign O3 "1000" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "0000" ; +assign O3 "0000" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "0001" ; +assign O3 "0001" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "0011" ; +assign O3 "0011" ; +assign O4 '0' ; + +delta_time 10000 ; +assign O2 "0111" ; +assign O3 "0111" ; +assign O4 '1' ; + +delta_time 10000 ; +assign O2 "1111" ; +assign O3 "1111" ; +assign O4 '0' ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test11/test11.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test11/test11.cpp new file mode 100644 index 000000000..05042cea8 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test11/test11.cpp @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test11.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + + bool obj1; + sc_logic obj2; + sc_bv<4> obj3; + sc_lv<4> obj4; + + proc1( sc_module_name NAME, + sc_signal& CLK ) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + obj3 = "0000"; + obj4 = "0000"; + } + + void entry(); +}; + +void proc1::entry() +{ + sc_bv<4> bv; + sc_lv<4> sv; + int i = 0; + bv = 0; + sv = 0; + wait(); + while(true) { + bv[i] = bv[i] ^ 1; + sv[i] ^= SC_LOGIC_1; + i = (i + 1) % 4; + obj3 = bv; + obj4 = sv; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + + proc1 P1("P1", clock); + + tf = sc_create_wif_trace_file("test11"); + tf->set_time_unit(1, SC_PS); + sc_trace(tf, P1.obj1, "Bool"); + sc_trace(tf, P1.obj2, "SC_Logic"); + sc_trace(tf, P1.obj3, "SC_BV"); + sc_trace(tf, P1.obj4, "SC_LV"); + sc_trace(tf, clock, "Clock"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test12/golden/test12.awif b/src/systemc/tests/systemc/tracing/wif_trace/test12/golden/test12.awif new file mode 100644 index 000000000..aadce2805 --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test12/golden/test12.awif @@ -0,0 +1,132 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "Signed" BIT 0 9 variable ; +start_trace O0 ; +declare O1 "Unsigned" BIT 0 9 variable ; +start_trace O1 ; +declare O2 "BV" BIT 0 9 variable ; +start_trace O2 ; +declare O3 "SV" BIT 0 9 variable ; +start_trace O3 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + +delta_time 10000 ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + +delta_time 10000 ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + +delta_time 10000 ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + +delta_time 10000 ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + +delta_time 10000 ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + +delta_time 10000 ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + +delta_time 10000 ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + +delta_time 10000 ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + +delta_time 10000 ; +assign O0 "0000000011" ; +assign O1 "0000000111" ; +assign O2 "0000000011" ; +assign O3 "0000000111" ; + +delta_time 10000 ; +assign O0 "1111111101" ; +assign O1 "0000000101" ; +assign O2 "1111111101" ; +assign O3 "0000000101" ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test12/test12.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test12/test12.cpp new file mode 100644 index 000000000..550b693fb --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test12/test12.cpp @@ -0,0 +1,112 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test12.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( proc1 ) +{ + SC_HAS_PROCESS( proc1 ); + + sc_in clk; + sc_out > bv; + sc_out > sv; + + sc_int<10> obj1; + sc_uint<10> obj2; + + proc1( sc_module_name NAME, + sc_signal& CLK, + sc_signal >& BV, + sc_signal >& SV ) + : bv(BV), sv(SV) + { + clk(CLK); + SC_THREAD( entry ); + sensitive << clk; + obj1 = 0; + obj2 = 0; + } + + void entry(); +}; + +void proc1::entry() +{ + bv = obj1; + sv = obj2; + wait(); + while(true) { + obj1 = 3; + obj2 = 7; + bv = obj1; + sv = obj2; + wait(); + obj1 = -3; + obj2 = 5; + bv = obj1; + sv = obj2; + wait(); + } +} + + +int sc_main(int ac, char *av[]) +{ + sc_trace_file *tf; + sc_signal clock; + sc_signal > bv; + sc_signal > sv; + + proc1 P1("P1", clock, bv, sv); + + tf = sc_create_wif_trace_file("test12"); + sc_trace(tf, P1.obj1, "Signed"); + sc_trace(tf, P1.obj2, "Unsigned"); + sc_trace(tf, bv, "BV"); + sc_trace(tf, sv, "SV"); + + clock.write(0); + sc_start(0, SC_NS); + for (int i = 0; i< 10; i++) { + clock.write(1); + sc_start(10, SC_NS); + clock.write(0); + sc_start(10, SC_NS); + } + sc_close_wif_trace_file( tf ); + return 0; +} diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test15/golden/test15.awif b/src/systemc/tests/systemc/tracing/wif_trace/test15/golden/test15.awif new file mode 100644 index 000000000..49d173e5c --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test15/golden/test15.awif @@ -0,0 +1,33 @@ + +type scalar "BIT" enum '0', '1' ; +type scalar "MVL" enum '0', '1', 'X', 'Z', '?' ; + +declare O0 "test_top.sig" BIT 0 31 variable ; +start_trace O0 ; +comment "All initial values are dumped below at time 0 sec = 0 timescale units." ; +assign O0 "00000000000000000000000000000010" ; + +delta_time 1 ; +assign O0 "00000000000000000000000000000011" ; + +delta_time 1 ; +assign O0 "00000000000000000000000000000100" ; + +delta_time 1000 ; +assign O0 "00000000000000000000000000000111" ; + +delta_time 1000 ; +assign O0 "00000000000000000000000000001000" ; + +delta_time 1000 ; +assign O0 "00000000000000000000000000001001" ; + +delta_time 1 ; +assign O0 "00000000000000000000000000001010" ; + +delta_time 2 ; +assign O0 "00000000000000000000000000001011" ; + +delta_time 1000 ; +assign O0 "00000000000000000000000000001100" ; + diff --git a/src/systemc/tests/systemc/tracing/wif_trace/test15/test15.cpp b/src/systemc/tests/systemc/tracing/wif_trace/test15/test15.cpp new file mode 100644 index 000000000..a6ef6a07d --- /dev/null +++ b/src/systemc/tests/systemc/tracing/wif_trace/test15/test15.cpp @@ -0,0 +1,92 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test15.cpp -- test delta cycle tracing + + Original Author: Romain I Popov, Intel Corporation, 2017-05-29 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +SC_MODULE(trace_delta_test) +{ + sc_signal sig; + sc_inout iport; + + SC_CTOR(trace_delta_test) + : sig("sig",0) + { + iport.bind(sig); + iport.initialize(1); + SC_THREAD(test_thread); + } + + void test_thread() { + cout << "initial sig value is " << sig.read() << endl; + sig = 2; + wait(SC_ZERO_TIME); + sig = 3; + wait(SC_ZERO_TIME); + sig = 4; + wait(1, SC_PS); + sig = 5; // This won't be shown on delta-cycle enabled trace + wait(1, SC_PS); + sig = 6; // This won't be shown on delta-cycle enabled trace + wait(1, SC_NS); + sig = 7; + wait(1, SC_NS); + sig = 8; + wait(1, SC_NS); + sig = 9; + wait(SC_ZERO_TIME); + sig = 10; + wait(3, SC_PS); + sig = 11; // Ok: 3ps > 2ps delta cycle shift + wait(1, SC_NS); + sig = 12; + + cout << "stop at " << sc_time_stamp() << endl; + sc_stop(); + } + +}; + + +int sc_main(int argc, char **argv) +{ + trace_delta_test test_top("test_top"); + sc_trace_file* tf = sc_create_wif_trace_file("test15"); + sc_trace_delta_cycles(tf,true); + sc_trace(tf, test_top.sig, test_top.sig.name()); + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_report/action_selection/action_selection.cpp b/src/systemc/tests/systemc/utils/sc_report/action_selection/action_selection.cpp new file mode 100644 index 000000000..75951037b --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/action_selection/action_selection.cpp @@ -0,0 +1,245 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_report -- test error reporting, sepcifically which actions are selected + + An important part of the sc_report functionality is to translate + an reported tupel (id,severity) into a set of actions. This test + is dedicated to this functionality. It uses user-defined actions and + user-defined handler. + + Original Author: Ulli Holtmann, Synopsys, Inc., Jan 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + + +/* + Allocate user-defined action: + + Allocate as many user-defined actions as possible. + Note: We need to have at least usr1..usr6 action which are used in + subsequent tests. + +*/ + +const unsigned num_usr_actions = 6; +sc_actions usr_actions[num_usr_actions]; + +sc_actions& usr1 = usr_actions[0]; +sc_actions& usr2 = usr_actions[1]; +sc_actions& usr3 = usr_actions[2]; +sc_actions& usr4 = usr_actions[3]; +sc_actions& usr5 = usr_actions[4]; +sc_actions& usr6 = usr_actions[5]; + +const char* id1 = "ID1"; +const char* id2 = "ID2"; +const char* id3 = "ID3"; +const char* id4 = "ID4"; + + +void allocate_user_actions( ) +{ + sc_actions usr; + for (unsigned int n=0; n<1000; n++) { + usr = sc_report_handler::get_new_action_id(); + if ( usr == SC_UNSPECIFIED ) { + cout << "We got " << n << " user-defined actions\n"; + break; + } + // make sure we don't get the same usr action again and that it + // is really new + sc_assert (usr!=SC_UNSPECIFIED && usr!=SC_DO_NOTHING && usr!=SC_THROW && + usr!=SC_LOG && usr!=SC_DISPLAY && usr!=SC_CACHE_REPORT && + usr!=SC_STOP && usr!=SC_ABORT ); + if ( n < num_usr_actions ) { + // save for later use + usr_actions[n] = usr; + for (unsigned int i=0; i "; + for (int n=0; n<32; n++) { + sc_actions action = actions & 1<") << endl; +} + + +/* + Test selection schema id x severity : + + ID + Severity 1 2 3 + + info usr2 usr1 usr5* + warning usr3 usr1 usr3 + error usr4 usr1 usr1* + fatal usr5 usr1 usr5 + + usr1..usr5 are user-defined actions + + ID 1 selects by severity rule which has lowest priority, + ID 2 selects by ID rule, + ID 3 selects by individual severity x ID rules (highest priority) + +*/ +void set_rules() +{ + // set rule 1: by severity + sc_report_handler::set_actions( SC_INFO, usr2 ); + sc_report_handler::set_actions( SC_WARNING, usr3 ); + sc_report_handler::set_actions( SC_ERROR, usr4 ); + sc_report_handler::set_actions( SC_FATAL, usr5 ); + + // set rule 2: by id + sc_report_handler::set_actions( id2, usr1 ); + + // set rule 3: by (id,severity) + sc_report_handler::set_actions ( id3, SC_INFO, usr5 ); + sc_report_handler::set_actions ( id3, SC_ERROR, usr1 ); +} +void query_rules( const char* id ) +{ + sc_report_handler::report( SC_INFO, id, "extra_msg_for_info", "no_specific_file", 0); + sc_report_handler::report( SC_WARNING, id, "extra_msg_for_warning","no_specific_file", 1); + sc_report_handler::report( SC_ERROR, id, "extra_msg_for_error", "no_specific_file", 2); + sc_report_handler::report( SC_FATAL, id, "extra_msg_for_fatal", "no_specific_file", 3); + cout << endl; +} +void query_rules() +{ + query_rules( id1 ); + query_rules( id2 ); + query_rules( id3 ); +} + + +int sc_main(int,char**) +{ + allocate_user_actions(); + sc_report_handler::set_handler( &dump_all_handler ); + + // disable automatic stop + sc_report_handler::stop_after( SC_ERROR, 0 ); + sc_report_handler::stop_after( SC_FATAL, 0 ); + + // Don't emit error|fatal for ID4 because this would + // terminate the simulation. + cout << "Default settings for ID4\n"; + query_rules( id4 ); + + // check default setting of rules + cout << "Specific settings for ID1..ID3\n"; + set_rules(); + query_rules(); + + // temporarily suppress usr4: + // - check which actions are emitted + // - check that suppress() restores old state + // - check return value of suppress(.) + cout << "temporarily suppress usr4\n"; + sc_start( 1,SC_NS ); + sc_report_handler::suppress( usr3 ); + sc_assert( sc_report_handler::suppress( usr4 ) == usr3 ); + query_rules( id1 ); + sc_assert( sc_report_handler::suppress() == usr4 ); + query_rules( id1 ); + + // temporarily force usr1: same checking as with suppress + cout << "temporarily force usr1\n"; + sc_start( 1,SC_NS ); + sc_report_handler::force( usr2 ); + sc_assert( sc_report_handler::force( usr1 ) == usr2 ); + query_rules( id1 ); + sc_assert( sc_report_handler::force() == usr1 ); + query_rules( id1 ); + + // temporarily force usr1: same checking as with suppress + cout << "temporarily suppress {usr3,usr4} and force {usr1,usr3}\n"; + sc_start( 1,SC_NS ); + sc_report_handler::force ( usr1|usr3 ); + sc_report_handler::suppress( usr3|usr4 ); + query_rules( id1 ); + sc_report_handler::force(); + sc_report_handler::suppress(); + query_rules( id1 ); + + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_report/action_selection/golden/action_selection.log b/src/systemc/tests/systemc/utils/sc_report/action_selection/golden/action_selection.log new file mode 100644 index 000000000..e24a895b4 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/action_selection/golden/action_selection.log @@ -0,0 +1,97 @@ +SystemC Simulation +We got 24 user-defined actions +Default settings for ID4 +report: ID4 INFO --> log display + msg=extra_msg_for_info file=no_specific_file line 0 time=0 s process= +report: ID4 WARNING --> log display + msg=extra_msg_for_warning file=no_specific_file line 1 time=0 s process= +report: ID4 ERROR --> throw log cache-report + msg=extra_msg_for_error file=no_specific_file line 2 time=0 s process= +report: ID4 FATAL --> log display cache-report abort + msg=extra_msg_for_fatal file=no_specific_file line 3 time=0 s process= + +Specific settings for ID1..ID3 +report: ID1 INFO --> usr2 + msg=extra_msg_for_info file=no_specific_file line 0 time=0 s process= +report: ID1 WARNING --> usr3 + msg=extra_msg_for_warning file=no_specific_file line 1 time=0 s process= +report: ID1 ERROR --> usr4 + msg=extra_msg_for_error file=no_specific_file line 2 time=0 s process= +report: ID1 FATAL --> usr5 + msg=extra_msg_for_fatal file=no_specific_file line 3 time=0 s process= + +report: ID2 INFO --> usr1 + msg=extra_msg_for_info file=no_specific_file line 0 time=0 s process= +report: ID2 WARNING --> usr1 + msg=extra_msg_for_warning file=no_specific_file line 1 time=0 s process= +report: ID2 ERROR --> usr1 + msg=extra_msg_for_error file=no_specific_file line 2 time=0 s process= +report: ID2 FATAL --> usr1 + msg=extra_msg_for_fatal file=no_specific_file line 3 time=0 s process= + +report: ID3 INFO --> usr5 + msg=extra_msg_for_info file=no_specific_file line 0 time=0 s process= +report: ID3 WARNING --> usr3 + msg=extra_msg_for_warning file=no_specific_file line 1 time=0 s process= +report: ID3 ERROR --> usr1 + msg=extra_msg_for_error file=no_specific_file line 2 time=0 s process= +report: ID3 FATAL --> usr5 + msg=extra_msg_for_fatal file=no_specific_file line 3 time=0 s process= + +temporarily suppress usr4 +report: ID1 INFO --> usr2 + msg=extra_msg_for_info file=no_specific_file line 0 time=1 ns process= +report: ID1 WARNING --> usr3 + msg=extra_msg_for_warning file=no_specific_file line 1 time=1 ns process= +report: ID1 ERROR --> + msg=extra_msg_for_error file=no_specific_file line 2 time=1 ns process= +report: ID1 FATAL --> usr5 + msg=extra_msg_for_fatal file=no_specific_file line 3 time=1 ns process= + +report: ID1 INFO --> usr2 + msg=extra_msg_for_info file=no_specific_file line 0 time=1 ns process= +report: ID1 WARNING --> usr3 + msg=extra_msg_for_warning file=no_specific_file line 1 time=1 ns process= +report: ID1 ERROR --> usr4 + msg=extra_msg_for_error file=no_specific_file line 2 time=1 ns process= +report: ID1 FATAL --> usr5 + msg=extra_msg_for_fatal file=no_specific_file line 3 time=1 ns process= + +temporarily force usr1 +report: ID1 INFO --> usr1 usr2 + msg=extra_msg_for_info file=no_specific_file line 0 time=2 ns process= +report: ID1 WARNING --> usr1 usr3 + msg=extra_msg_for_warning file=no_specific_file line 1 time=2 ns process= +report: ID1 ERROR --> usr1 usr4 + msg=extra_msg_for_error file=no_specific_file line 2 time=2 ns process= +report: ID1 FATAL --> usr1 usr5 + msg=extra_msg_for_fatal file=no_specific_file line 3 time=2 ns process= + +report: ID1 INFO --> usr2 + msg=extra_msg_for_info file=no_specific_file line 0 time=2 ns process= +report: ID1 WARNING --> usr3 + msg=extra_msg_for_warning file=no_specific_file line 1 time=2 ns process= +report: ID1 ERROR --> usr4 + msg=extra_msg_for_error file=no_specific_file line 2 time=2 ns process= +report: ID1 FATAL --> usr5 + msg=extra_msg_for_fatal file=no_specific_file line 3 time=2 ns process= + +temporarily suppress {usr3,usr4} and force {usr1,usr3} +report: ID1 INFO --> usr1 usr2 usr3 + msg=extra_msg_for_info file=no_specific_file line 0 time=3 ns process= +report: ID1 WARNING --> usr1 usr3 + msg=extra_msg_for_warning file=no_specific_file line 1 time=3 ns process= +report: ID1 ERROR --> usr1 usr3 + msg=extra_msg_for_error file=no_specific_file line 2 time=3 ns process= +report: ID1 FATAL --> usr1 usr3 usr5 + msg=extra_msg_for_fatal file=no_specific_file line 3 time=3 ns process= + +report: ID1 INFO --> usr2 + msg=extra_msg_for_info file=no_specific_file line 0 time=3 ns process= +report: ID1 WARNING --> usr3 + msg=extra_msg_for_warning file=no_specific_file line 1 time=3 ns process= +report: ID1 ERROR --> usr4 + msg=extra_msg_for_error file=no_specific_file line 2 time=3 ns process= +report: ID1 FATAL --> usr5 + msg=extra_msg_for_fatal file=no_specific_file line 3 time=3 ns process= + diff --git a/src/systemc/tests/systemc/utils/sc_report/cached/cached.cpp b/src/systemc/tests/systemc/utils/sc_report/cached/cached.cpp new file mode 100644 index 000000000..8bddd9001 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/cached/cached.cpp @@ -0,0 +1,227 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_report -- caching of report in process context + + Original Author: Ulli Holtmann, Synopsys, Inc., Jan 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + + +/* + + id1 has actions: display, cache + id2 has actions: display + + Issue report in this order in the following contextes: + + retrieve report from thread1 -> no report + retrieve report from method1 -> no report + retrieve report from global -> no report + + info/id1/a -> thread1 + warning/id1/b -> method1 + info/id1/c -> global + warning/id1/d -> thread2 + info/id1/e -> method2 + + info/id2/f -> thread1 + warning/id2/g -> method1 + info/id2/h -> global + warning/id2/i -> thread2 + info/id2/j -> method2 + + retrieve report from thread1 -> info/id1/a + retrieve report from method1 -> warning/id1/b + retrieve report from global -> info/id1/c + retrieve report from thread2 -> no report + retrieve report from method2 -> no report +*/ + + +static const char* severity2str[] = { + "INFO", "WARNING", "ERROR", "FATAL", "UNKNOWN_SEVERITY" +}; + +void dump_cached_report(const char* ctx) +{ + sc_report* report = sc_report_handler::get_cached_report(); + cout << sc_time_stamp() + << " from context '" << ctx << "' "; + if (report) { + cout << report->get_msg_type() + << " " << severity2str[ report->get_severity() ] << endl + << " msg=" << report->get_msg() + << " file=" << report->get_file_name() + << " line " << report->get_line_number() + << " time=" << report->get_time(); + const char* name = report->get_process_name(); + cout << " process=" << (name ? name : "") << endl; + } else { + cout << "\n"; + } + sc_report_handler::clear_cached_report(); +} + +SC_MODULE( M ) +{ + sc_in emit; // 1: emit, 0: dump cahced report + sc_in id; + sc_in ofs; + sc_event t1, t2, m1, m2; + + SC_CTOR( M ) { + SC_THREAD( thread1 ); + sensitive << t1; + dont_initialize(); + + SC_THREAD( thread2 ); + sensitive << t2; + dont_initialize(); + + SC_METHOD( method1 ); + sensitive << m1; + dont_initialize(); + + SC_METHOD( method2 ); + sensitive << m2; + dont_initialize(); + } + void thread1() { + while(1) { + if (emit) + sc_report_handler::report(SC_INFO, id.read(), "aa"+ofs, "file_t1", 110+ofs); + else + dump_cached_report("t1"); + wait(); + } + } + void method1() { + if (emit) + sc_report_handler::report(SC_WARNING, id.read(), "bb"+ofs, "file_m1", 210+ofs); + else + dump_cached_report("m1"); + } + void thread2() { + while(1) { + if (emit) + sc_report_handler::report(SC_WARNING, id.read(), "dd"+ofs, "file_t2", 120+ofs); + else + dump_cached_report("t2"); + wait(); + } + } + void method2() { + if (emit) + sc_report_handler::report(SC_INFO, id.read(), "ee"+ofs, "file_m2", 220+ofs); + else + dump_cached_report("m2"); + } +}; + + +int sc_main(int,char**) +{ + sc_report_handler::set_actions( "ID1", SC_DISPLAY | SC_CACHE_REPORT ); + sc_report_handler::set_actions( "ID2", SC_DISPLAY ); + + sc_signal emit; + sc_signal ID; + sc_signal ofs; + M uut("M"); + uut( emit,ID,ofs ); + + emit = 0; + ID="ID3"; + ofs=0; + sc_start( 1,SC_NS ); + + // dump initial cached reports + cout << "Initial status:\n"; + uut.t1.notify(); + uut.m1.notify(); + uut.t2.notify(); + uut.m2.notify(); + dump_cached_report("global"); + sc_start( 1, SC_NS ); + + // emit report ID1 everywhere + emit = 1; + ID="ID1"; + sc_start( 1,SC_NS ); + cout << "\n\nEmit ID1\n"; + uut.t1.notify(); + uut.m1.notify(); + sc_start( 1, SC_NS ); + sc_report_handler::report(SC_INFO, ID.read(), "cc", "file_g", 300); + uut.t2.notify(); + uut.m2.notify(); + sc_start( 1, SC_NS ); + + // emit report ID2 everywhere + cout << "\n\nEmit ID2\n"; + emit = 1; + ID="ID2"; + ofs=1; + sc_start( 1,SC_NS ); + uut.t1.notify(); + uut.m1.notify(); + sc_start( 1, SC_NS ); + sc_report_handler::report(SC_INFO, ID.read(), "c", "file_g", 310); + uut.t2.notify(); + uut.m2.notify(); + sc_start( 1, SC_NS ); + + // dump cached reports: should be all ID1 + emit = 0; + sc_start( 1,SC_NS ); + cout << "\n\nStatus:\n"; + uut.t1.notify(); + uut.t2.notify(); + uut.m1.notify(); + uut.m2.notify(); + dump_cached_report("global"); + sc_start( 1, SC_NS ); + + // dump cached reports again + // (should be all empty because dump clears cached report) + cout << "\n\nStatus:\n"; + uut.t1.notify(); + uut.t2.notify(); + uut.m1.notify(); + uut.m2.notify(); + dump_cached_report("global"); + sc_start( 1, SC_NS ); + + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_report/cached/golden/cached.log b/src/systemc/tests/systemc/utils/sc_report/cached/golden/cached.log new file mode 100644 index 000000000..7b0aa9b80 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/cached/golden/cached.log @@ -0,0 +1,62 @@ +SystemC Simulation +Initial status: +1 ns from context 'global' +1 ns from context 'm1' +1 ns from context 'm2' +1 ns from context 't1' +1 ns from context 't2' + + +Emit ID1 + +Warning: ID1: bb +In file: +In process: M.method1 @ 3 ns + +Info: ID1: aa + +Info: ID1: cc + +Info: ID1: ee + +Warning: ID1: dd +In file: +In process: M.thread2 @ 4 ns + + +Emit ID2 + +Warning: ID2: b +In file: +In process: M.method1 @ 6 ns + +Info: ID2: a + +Info: ID2: c + +Info: ID2: e + +Warning: ID2: d +In file: +In process: M.thread2 @ 7 ns + + +Status: +9 ns from context 'global' ID1 INFO + msg=cc file=file_g line 300 time=4 ns process= +9 ns from context 'm1' ID1 WARNING + msg=bb file=file_m1 line 210 time=3 ns process=M.method1 +9 ns from context 'm2' ID1 INFO + msg=ee file=file_m2 line 220 time=4 ns process=M.method2 +9 ns from context 't1' ID1 INFO + msg=aa file=file_t1 line 110 time=3 ns process=M.thread1 +9 ns from context 't2' ID1 WARNING + msg=dd file=file_t2 line 120 time=4 ns process=M.thread2 + + +Status: +10 ns from context 'global' +10 ns from context 'm1' +10 ns from context 'm2' +10 ns from context 't1' +10 ns from context 't2' diff --git a/src/systemc/tests/systemc/utils/sc_report/log_file/golden/log_file.log b/src/systemc/tests/systemc/utils/sc_report/log_file/golden/log_file.log new file mode 100644 index 000000000..2b1399285 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/log_file/golden/log_file.log @@ -0,0 +1,85 @@ +SystemC Simulation + +Info: ID1: before log is opened + +Warning: ID1: before log is opened +In file: + +Info: ID1: after log is opened + +Warning: ID2: after log is opened +In file: + +Error: ID1: after log is opened +In file: + +Fatal: ID2: after log is opened +In file: + +Error: ID1: after log is opened +In file: + +Info: ID1: after log is opened + +Warning: ID2: after log is opened +In file: +In process: uut.method1 @ 20 ns + +Error: ID1: after log is opened +In file: +In process: uut.method1 @ 20 ns + +Fatal: ID2: after log is opened +In file: +In process: uut.method1 @ 20 ns + +Info: ID2: after log is opened + +Warning: ID1: after log is opened +In file: +In process: uut.thread1 @ 30 ns + +Error: ID2: after log is opened +In file: +In process: uut.thread1 @ 30 ns + +Fatal: ID1: after log is opened +In file: +In process: uut.thread1 @ 30 ns + +Info: ID1: after log is closed + +Warning: ID1: after log is closed +In file: + + +Dump the logfile +0 s: Info: ID1: after log is opened +0 s: Warning: ID2: after log is opened +In file: +0 s: Error: ID1: after log is opened +In file: +0 s: Fatal: ID2: after log is opened +In file: +10 ns: Error: ID1: after log is opened +In file: +20 ns: Info: ID1: after log is opened +20 ns: Warning: ID2: after log is opened +In file: +In process: uut.method1 @ 20 ns +20 ns: Error: ID1: after log is opened +In file: +In process: uut.method1 @ 20 ns +20 ns: Fatal: ID2: after log is opened +In file: +In process: uut.method1 @ 20 ns +30 ns: Info: ID2: after log is opened +30 ns: Warning: ID1: after log is opened +In file: +In process: uut.thread1 @ 30 ns +30 ns: Error: ID2: after log is opened +In file: +In process: uut.thread1 @ 30 ns +30 ns: Fatal: ID1: after log is opened +In file: +In process: uut.thread1 @ 30 ns diff --git a/src/systemc/tests/systemc/utils/sc_report/log_file/log_file.cpp b/src/systemc/tests/systemc/utils/sc_report/log_file/log_file.cpp new file mode 100644 index 000000000..7df9cb497 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/log_file/log_file.cpp @@ -0,0 +1,126 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + sc_report -- test error reporting, sepcifically log file + + That that messages are printed into the log file. + + Original Author: Ulli Holtmann, Synopsys, Inc., Jan 2003 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include + +SC_MODULE( M ) +{ + sc_event trigger_t, trigger_m; + SC_CTOR( M ) { + SC_THREAD( thread1 ); + sensitive << trigger_t; + dont_initialize(); + + SC_METHOD( method1 ); + sensitive << trigger_m; + dont_initialize(); + } + void method1() { + sc_report_handler::report( SC_INFO, "ID1", "after log is opened", "method", 101); + sc_report_handler::report( SC_WARNING, "ID2", "after log is opened", "method", 102); + sc_report_handler::report( SC_ERROR, "ID1", "after log is opened", "method", 103); + sc_report_handler::report( SC_FATAL, "ID2", "after log is opened", "method", 104); + } + void thread1() { + while(1) { + sc_report_handler::report( SC_INFO, "ID2", "after log is opened", "thread", 201); + sc_report_handler::report( SC_WARNING, "ID1", "after log is opened", "thread", 202); + sc_report_handler::report( SC_ERROR, "ID2", "after log is opened", "thread", 203); + sc_report_handler::report( SC_FATAL, "ID1", "after log is opened", "thread", 204); + wait(); + } + } +}; + +int sc_main(int,char**) +{ + const char fname[] = "./sc_report.log"; + M uut("uut"); + + // do not abort when on error, fatal + sc_report_handler::stop_after( SC_ERROR, 0 ); + sc_report_handler::stop_after( SC_FATAL, 0 ); + sc_report_handler::suppress( SC_STOP | SC_ABORT ); + sc_report_handler::set_actions( "ID1", SC_LOG | SC_DISPLAY ); + sc_report_handler::set_actions( "ID2", SC_LOG | SC_DISPLAY ); + + // produces messages before the log file is opened + sc_report_handler::report( SC_INFO, "ID1", "before log is opened", "no_file", 0); + sc_report_handler::report( SC_WARNING, "ID1", "before log is opened", "no_file", 0); + + // open log file + sc_report_handler::set_log_file_name( fname ); + sc_assert( strcmp(fname,sc_report_handler::get_log_file_name()) == 0 ); + + // emit report from global context at t=0 + sc_report_handler::report( SC_INFO, "ID1", "after log is opened", "file1", 1); + sc_report_handler::report( SC_WARNING, "ID2", "after log is opened", "file2", 2); + sc_report_handler::report( SC_ERROR, "ID1", "after log is opened", "file3", 3); + sc_report_handler::report( SC_FATAL, "ID2", "after log is opened", "file4", 4); + + // emit report from global context at 10ns, method at 20ns, thread at 30ns + uut.trigger_m.notify( 20, SC_NS ); + uut.trigger_t.notify( 30, SC_NS ); + sc_start( 10,SC_NS ); + sc_report_handler::report( SC_ERROR, "ID1", "after log is opened", "file3", 5); + sc_start( 100, SC_NS ); + + // close log file and more messages + sc_report_close_default_log(); + + sc_report_handler::report( SC_INFO, "ID1", "after log is closed", "no_file", 0); + sc_report_handler::report( SC_WARNING, "ID1", "after log is closed", "no_file", 0); + + // open file again and dump into cout so we cover it by regression + cout << "\n\nDump the logfile\n"; + FILE* log = fopen( fname,"r" ); + if ( !log ) { + SC_REPORT_FATAL( "Can not open the sc_report log file: ", fname ); + return 1; + } + while ( 1 ) { + int c = fgetc(log); + if (c==EOF) + break; + cout << static_cast(c); + } + fclose( log) ; + + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_report/test01/golden/test01.log b/src/systemc/tests/systemc/utils/sc_report/test01/golden/test01.log new file mode 100644 index 000000000..e42609dd4 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test01/golden/test01.log @@ -0,0 +1,45 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: integer report ids are deprecated, use string values: sc_report::register_id() +bogus message +0 +1 +0 + +Info: (I9999) bogus message: infos ... + +Info: (I9999) bogus message: infos not suppressed + +Info: (I9999) bogus message: not suppressed + +Warning: (W9999) bogus message: warnings ... +In file: + +Warning: (W9999) bogus message: warnings not suppressed +In file: + +Warning: (W9999) bogus message: not suppressed +In file: + +caught exception +Error: (E9999) bogus message: do make warnings errors +In file: + +Warning: (W9999) bogus message: do not make warnings errors +In file: + +caught exception +Error: (E9999) bogus message: errors ... +In file: + +caught exception +Error: (E9999) bogus message: cannot be suppressed +In file: + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/utils/sc_report/test01/test01.cpp b/src/systemc/tests/systemc/utils/sc_report/test01/test01.cpp new file mode 100644 index 000000000..88f5a76af --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test01/test01.cpp @@ -0,0 +1,109 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of reporting -- API + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + const int MY_ID = 9999; + + sc_report::register_id( MY_ID, "bogus message" ); + cout << sc_report::get_message( MY_ID ) << endl; + cout << sc_report::is_suppressed( MY_ID ) << endl; + sc_report::suppress_id( MY_ID, true ); + cout << sc_report::is_suppressed( MY_ID ) << endl; + sc_report::suppress_id( MY_ID, false ); + cout << sc_report::is_suppressed( MY_ID ) << endl; + + SC_REPORT_INFO( MY_ID, "infos ..." ); + sc_report::suppress_infos( true ); + SC_REPORT_INFO( MY_ID, "infos suppressed" ); + sc_report::suppress_infos( false ); + SC_REPORT_INFO( MY_ID, "infos not suppressed" ); + sc_report::suppress_id( MY_ID, true ); + SC_REPORT_INFO( MY_ID, "suppressed" ); + sc_report::suppress_id( MY_ID, false ); + SC_REPORT_INFO( MY_ID, "not suppressed" ); + + SC_REPORT_WARNING( MY_ID, "warnings ..." ); + sc_report::suppress_warnings( true ); + SC_REPORT_WARNING( MY_ID, "warnings suppressed" ); + sc_report::suppress_warnings( false ); + SC_REPORT_WARNING( MY_ID, "warnings not suppressed" ); + sc_report::suppress_id( MY_ID, true ); + SC_REPORT_WARNING( MY_ID, "suppressed" ); + sc_report::suppress_id( MY_ID, false ); + SC_REPORT_WARNING( MY_ID, "not suppressed" ); + + sc_report::make_warnings_errors( true ); + try { + SC_REPORT_WARNING( MY_ID, "do make warnings errors" ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + sc_report::make_warnings_errors( false ); + try { + SC_REPORT_WARNING( MY_ID, "do not make warnings errors" ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + + try { + SC_REPORT_ERROR( MY_ID, "errors ..." ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + sc_report::suppress_id( MY_ID, true ); + try { + SC_REPORT_ERROR( MY_ID, "cannot be suppressed" ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_report/test02/golden/test02.log b/src/systemc/tests/systemc/utils/sc_report/test02/golden/test02.log new file mode 100644 index 000000000..a4a3c22b1 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test02/golden/test02.log @@ -0,0 +1,27 @@ +SystemC Simulation + +Info: (I804) /IEEE_Std_1666/deprecated: integer report ids are deprecated, use string values: sc_report::register_id() + +caught exception +Error: (E800) register_id failed: invalid report id +In file: + +caught exception +Error: (E800) register_id failed: invalid report message +In file: + +caught exception +Error: (E800) register_id failed: report id already exists +In file: + +unknown id + +0 + +Info: (I804) /IEEE_Std_1666/deprecated: You can turn off warnings about + IEEE 1666 deprecated features by placing this method call + as the first statement in your sc_main() function: + + sc_core::sc_report_handler::set_actions( "/IEEE_Std_1666/deprecated", + sc_core::SC_DO_NOTHING ); + diff --git a/src/systemc/tests/systemc/utils/sc_report/test02/test02.cpp b/src/systemc/tests/systemc/utils/sc_report/test02/test02.cpp new file mode 100644 index 000000000..c72871006 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test02/test02.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- + + Original Author: Martin Janssen, Synopsys, Inc., 2002-02-15 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +// test of reporting -- implementation + +#include "systemc.h" + +int +sc_main( int, char*[] ) +{ + const int MY_ID = 9999; + + try { + sc_report::register_id( -1, "first try" ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + + try { + sc_report::register_id( MY_ID, 0 ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + + try { + sc_report::register_id( MY_ID, "bogus message" ); + sc_report::register_id( MY_ID, "another bogus message" ); + } + catch( sc_report x ) { + cout << "\ncaught exception" << endl; + cout << x.what() << endl; + } + + cout << endl; + cout << sc_report::get_message( 1234 ) << endl; + + sc_report::suppress_id( 4321, true ); + cout << endl; + cout << sc_report::is_suppressed( 4321 ) << endl; + + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_report/test03/golden/test03.log b/src/systemc/tests/systemc/utils/sc_report/test03/golden/test03.log new file mode 100644 index 000000000..f2e6178c3 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test03/golden/test03.log @@ -0,0 +1,10 @@ +SystemC Simulation + +Fatal: Oh no!: A bad thing has happened +In file: +In process: dut.thread @ 1 ns + +Fatal: Oh no!: A bad thing has happened +In file: +In process: dut.thread @ 2 ns +Program completed diff --git a/src/systemc/tests/systemc/utils/sc_report/test03/test03.cpp b/src/systemc/tests/systemc/utils/sc_report/test03/test03.cpp new file mode 100644 index 000000000..79aafea54 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test03/test03.cpp @@ -0,0 +1,76 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- Test of disabling of SC_FATAL + + Original Author: Andy Goodrich, Forte Design Systems, Inc., 2005-12-12 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE(DUT) +{ + SC_CTOR(DUT) + { + SC_CTHREAD(thread,m_clk.pos()); + reset_signal_is(m_reset, true); + } + void thread() + { + sc_report_handler::set_actions(SC_FATAL,SC_DISPLAY); + sc_report_handler::stop_after(SC_FATAL,-1); + for (;;) + { + wait(); + SC_REPORT_FATAL("Oh no!","A bad thing has happened"); + } + } + sc_in m_clk; + sc_in m_reset; +}; +int sc_main(int argc, char* argv[]) +{ + sc_clock clock; + DUT dut("dut"); + sc_signal reset; + + dut.m_clk(clock); + dut.m_reset(reset); + + reset = true; + sc_start(1, SC_NS); + reset = false; + sc_start(2, SC_NS); + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_report/test04/empty_msg_id.cpp b/src/systemc/tests/systemc/utils/sc_report/test04/empty_msg_id.cpp new file mode 100644 index 000000000..4fd0a9d94 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test04/empty_msg_id.cpp @@ -0,0 +1,57 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + empty_msg_id.cpp -- Test for empty message IDs + + Original Author: Philipp A. Hartmann, OFFIS, 2013-09-17 + + *****************************************************************************/ + +#include + +using std::cout; +using std::endl; +using sc_core::sc_report_handler; + +static const char * null_msg = NULL; +static const char * empty_msg = ""; + +int sc_main(int,char*[]) +{ + SC_REPORT_INFO( empty_msg, "empty msg id" ); + cout << sc_report_handler::get_count(empty_msg) << endl; + sc_assert( sc_report_handler::get_count(empty_msg) == 1 ); + + SC_REPORT_INFO( 1, "empty msg id" ); // integer ID + cout << sc_report_handler::get_count("") << endl; + sc_assert( sc_report_handler::get_count(empty_msg) == 2 ); + + + SC_REPORT_INFO( null_msg, "null msg id" ); + cout << sc_report_handler::get_count(null_msg) << endl; + sc_assert( sc_report_handler::get_count(null_msg) == 1 ); + + SC_REPORT_INFO( 0, "another (integer) null msg id" ); + cout << sc_report_handler::get_count(null_msg) << endl; + sc_assert( sc_report_handler::get_count(null_msg) == 2 ); + + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_report/test04/golden/empty_msg_id.log b/src/systemc/tests/systemc/utils/sc_report/test04/golden/empty_msg_id.log new file mode 100644 index 000000000..20a630dec --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test04/golden/empty_msg_id.log @@ -0,0 +1,13 @@ +SystemC Simulation + +Info: (I1) : empty msg id +1 + +Info: (I1) : empty msg id +2 + +Info: (I0) unknown error: null msg id +1 + +Info: (I0) unknown error: another (integer) null msg id +2 diff --git a/src/systemc/tests/systemc/utils/sc_report/test05/catch_actions.cpp b/src/systemc/tests/systemc/utils/sc_report/test05/catch_actions.cpp new file mode 100644 index 000000000..cdc94543b --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test05/catch_actions.cpp @@ -0,0 +1,93 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + catch_actions.cpp -- Test for catch actions used with a custom report handler + + Original Author: Philipp A. Hartmann, Intel, 2017-01-22 + + *****************************************************************************/ + +#include + +using std::cout; +using std::endl; +using sc_core::sc_actions; +using sc_core::SC_DISPLAY; +using sc_core::SC_ERROR; +using sc_core::SC_LOG; +using sc_core::SC_THROW; +using sc_core::sc_report; +using sc_core::sc_report_handler; + +/* anonymous */ namespace { +bool last_report_thrown = false; +void custom_handler(const sc_report& rep, const sc_actions& actions) +{ + if ( actions & SC_DISPLAY ) { + cout << endl + // if last_report_thrown is set, we're in a catch action + << (last_report_thrown ? "[caught] " : "[normal] ") + << sc_core::sc_report_compose_message(rep) + << endl; + } + + // only log errors from catch actions + if (rep.get_severity() == SC_ERROR) { + if (actions & SC_LOG) { + sc_assert( !(actions & SC_THROW) ); + } else { + sc_assert( actions & SC_THROW ); + } + } + + // cache SC_THROW state of current report + last_report_thrown = (actions & SC_THROW); + + // delegate other actions to default handler + sc_report_handler::default_handler(rep, actions & ~SC_DISPLAY); + +} /* custom_handler */ +} /* anonymous namespace */ + +int sc_main(int,char*[]) +{ + // extended report logging, currently not checked in verify.pl + sc_report_handler::set_log_file_name("catch_actions.ext.log"); + + sc_report_handler::set_handler(custom_handler); + SC_REPORT_INFO("catch_actions", "prepared custom handler"); + sc_assert(last_report_thrown == false); + + SC_REPORT_INFO("catch_actions", "preparing catch actions"); + sc_actions act = sc_report_handler::set_catch_actions(SC_DISPLAY | SC_LOG); + sc_assert(act == SC_DISPLAY); + sc_assert(sc_report_handler::get_catch_actions() == (SC_DISPLAY | SC_LOG)); + + SC_REPORT_INFO("catch_actions", "only log errors from catch actions"); + act = sc_report_handler::set_actions + (SC_ERROR, (sc_core::SC_DEFAULT_ERROR_ACTIONS & ~SC_LOG)); + + // real test + SC_REPORT_ERROR("catch_actions", "throwing an exception"); + + // not reached + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_report/test05/golden/catch_actions.log b/src/systemc/tests/systemc/utils/sc_report/test05/golden/catch_actions.log new file mode 100644 index 000000000..868e965f2 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_report/test05/golden/catch_actions.log @@ -0,0 +1,10 @@ +SystemC Simulation + +[normal] Info: catch_actions: prepared custom handler + +[normal] Info: catch_actions: preparing catch actions + +[normal] Info: catch_actions: only log errors from catch actions + +[caught] Error: catch_actions: throwing an exception +In file: diff --git a/src/systemc/tests/systemc/utils/sc_vector/test01/golden/test01.log b/src/systemc/tests/systemc/utils/sc_vector/test01/golden/test01.log new file mode 100644 index 000000000..c05a2fb7c --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test01/golden/test01.log @@ -0,0 +1,12 @@ +SystemC Simulation +dut.sub_modules - sc_vector +dut.sub_modules_0 - sc_module +dut.sub_modules_1 - sc_module +dut.sub_modules_2 - sc_module +dut.sub_modules_3 - sc_module +dut.vector_0 - sc_vector +dut.vector_0_0 - sc_in +dut.vector_0_1 - sc_in +dut.vector_0_2 - sc_in +dut.vector_0_3 - sc_in +Program completed diff --git a/src/systemc/tests/systemc/utils/sc_vector/test01/test01.cpp b/src/systemc/tests/systemc/utils/sc_vector/test01/test01.cpp new file mode 100644 index 000000000..47cc9d45a --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test01/test01.cpp @@ -0,0 +1,84 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- Test sc_vector + + Original Author: Philipp A. Hartmann, OFFIS, 2010-01-10 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#include "sysc/utils/sc_vector.h" +using sc_core::sc_vector; + +SC_MODULE( sub_module ) +{ + sc_in in; + SC_CTOR(sub_module) {} +}; + +SC_MODULE( module ) +{ + // vector of sub-modules + sc_vector< sub_module > m_sub_vec; + + // vector of ports + sc_vector< sc_in > in_vec; + + module( sc_core::sc_module_name, unsigned n_sub ) + : m_sub_vec( "sub_modules", n_sub ) // set name prefix, and create sub-modules + // , in_vec() // use default constructor + // , in_vec( "in_vec" ) // set name prefix + { + // delayed initialisation of port vector + // here with default prefix sc_core::sc_gen_unique_name("vector") + in_vec.init( n_sub ); + + // bind ports of sub-modules -- sc_assemble_vector + sc_assemble_vector( m_sub_vec, &sub_module::in ).bind( in_vec ); + } +}; + +int sc_main(int , char* []) +{ + module m("dut", 4); + + std::vector children = m.get_child_objects(); + + for (size_t i=0; iname() << " - " + << children[i]->kind() + << endl; + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_vector/test02/golden/test02.log b/src/systemc/tests/systemc/utils/sc_vector/test02/golden/test02.log new file mode 100644 index 000000000..6140c1e6a --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test02/golden/test02.log @@ -0,0 +1,18 @@ +SystemC Simulation +dut.array - sc_vector +dut.inps - sc_vector +dut.inps_0 - sc_in +dut.inps_1 - sc_in +dut.inps_2 - sc_in +dut.inps_3 - sc_in +dut.inps_4 - sc_in +dut.sigs - sc_vector +dut.array_0 - derived_0 +dut.array_1 - derived_1 +dut.array_2 - derived_0 +dut.sigs_0 - sc_signal +dut.sigs_1 - sc_signal +dut.sigs_2 - sc_signal +dut.sigs_3 - sc_signal +dut.sigs_4 - sc_signal +Program completed diff --git a/src/systemc/tests/systemc/utils/sc_vector/test02/test02.cpp b/src/systemc/tests/systemc/utils/sc_vector/test02/test02.cpp new file mode 100644 index 000000000..7b827dd3a --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test02/test02.cpp @@ -0,0 +1,127 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test02.cpp -- Test sc_vector + + Original Author: Philipp A. Hartmann, OFFIS, 2010-01-10 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +//#define USE_BOOST + +#ifndef USE_BOOST +# define SC_INCLUDE_DYNAMIC_PROCESSES +#endif + +#include "systemc.h" + +#include "sysc/utils/sc_vector.h" +using sc_core::sc_vector; + +#ifdef USE_BOOST +#include +#include +#endif + +// ---- some classes +// +struct base : sc_object +{ + base( const char* n ) : sc_object(n) {} +}; + +struct derived_0 : base +{ + derived_0(const char* name) : base(name) {} + const char* kind() const { return "derived_0"; } +}; + +struct derived_1 : public base +{ + derived_1(const char* name) : base(name) {} + const char* kind() const { return "derived_1"; } +}; + +// plain function pointer +base* fill_array( const char* n, size_t i ) +{ + if( i%2 ) return new derived_1( n ); + return new derived_0( n ); +} + +SC_MODULE(DUT) +{ + sc_vector< base > arr; + sc_vector< sc_in > inps; + sc_vector< sc_signal > sigs; + + SC_CTOR(DUT); + + // member function as creator (use with sc_bind()) + sc_signal* init_sig_bind( const char* n, unsigned i ) + { + sc_signal* sig = new sc_signal(n); + inps[i]( *sig ); + return sig; + } +}; + + +DUT::DUT( sc_module_name ) + : arr("array") + , inps("inps", 5) + , sigs("sigs") +{ + arr.init( 3, fill_array ); + + sigs.init( inps.size() +#if defined( SC_INCLUDE_DYNAMIC_PROCESSES ) + , sc_bind( &DUT::init_sig_bind, this, sc_unnamed::_1, sc_unnamed::_2 ) +#elif defined( USE_BOOST ) + , boost::bind( &DUT::init_sig_bind, this, _1, _2 ) +#endif + ); +} + +int sc_main(int , char* []) +{ + DUT dut("dut"); + + std::vector children = dut.get_child_objects(); + + for (size_t i=0; iname() << " - " + << children[i]->kind() + << endl; + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_vector/test03/golden/test03.log b/src/systemc/tests/systemc/utils/sc_vector/test03/golden/test03.log new file mode 100644 index 000000000..a982c7ab8 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test03/golden/test03.log @@ -0,0 +1,12 @@ +SystemC Simulation +dut.sub_modules_0 - sc_module +dut.sub_modules_1 - sc_module +dut.sub_modules_2 - sc_module +dut.sub_modules_3 - sc_module +dut.sub_modules_4 - sc_module +sub_modules_0 - dut +sub_modules_1 - dut +sub_modules_2 - dut +sub_modules_3 - dut +sub_modules_4 - dut +Program completed diff --git a/src/systemc/tests/systemc/utils/sc_vector/test03/test03.cpp b/src/systemc/tests/systemc/utils/sc_vector/test03/test03.cpp new file mode 100644 index 000000000..9feebdc64 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test03/test03.cpp @@ -0,0 +1,101 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test03.cpp -- Test sc_vector + + Original Author: Philipp A. Hartmann, OFFIS, 2010-03-05 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +#include "sysc/utils/sc_vector.h" +using sc_core::sc_vector; + +SC_MODULE( sub_module ) +{ + // constructor with additional parameters + sub_module( sc_core::sc_module_name, int param ); + // ... +}; + +SC_MODULE( module ) +{ + sc_core::sc_vector< sub_module > m_sub_vec; // vector of sub-modules + + module( sc_core::sc_module_name, unsigned n_sub ); // constructor + + struct mod_creator // Creator struct + { + mod_creator( int p ) : param(p) {} // store parameter to forward + + sub_module* operator()( const char* name, size_t ) // actual creator function + { + return new sub_module( name, param ); // forward param to sub-module + } + int param; + }; + +}; + +sub_module::sub_module( sc_core::sc_module_name, int ) + { /* empty */ } + +module::module( sc_core::sc_module_name, unsigned n_sub ) + : m_sub_vec( "sub_modules" ) // set name prefix +{ + m_sub_vec.init( n_sub, mod_creator(42) ); // init with custom creator + // ... +} + +int sc_main(int , char* []) +{ + module dut( "dut", 5 ); + + typedef sc_core::sc_vector vec_type; + vec_type const & children = dut.m_sub_vec; + + for( vec_type::const_iterator it = children.begin(); + it != children.end(); ++it ) + { + cout << it->name() << " - " + << (*it).kind() + << endl; + } + + for (size_t i=0; i < children.size(); ++i ) + cout << children[i].basename() << " - " + << children[i].get_parent_object()->name() + << endl; + + cout << "Program completed" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_vector/test04/golden/test04.log b/src/systemc/tests/systemc/utils/sc_vector/test04/golden/test04.log new file mode 100644 index 000000000..a7dfafcea --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test04/golden/test04.log @@ -0,0 +1,42 @@ +SystemC Simulation +dut.nodes_0_0 created @ 0x0 +dut.nodes_0_1 created @ 0x1 +dut.nodes_0_2 created @ 0x2 +dut.nodes_0_3 created @ 0x3 +dut.nodes_0_4 created @ 0x4 +dut.nodes_1_0 created @ 1x0 +dut.nodes_1_1 created @ 1x1 +dut.nodes_1_2 created @ 1x2 +dut.nodes_1_3 created @ 1x3 +dut.nodes_1_4 created @ 1x4 +dut.nodes_2_0 created @ 2x0 +dut.nodes_2_1 created @ 2x1 +dut.nodes_2_2 created @ 2x2 +dut.nodes_2_3 created @ 2x3 +dut.nodes_2_4 created @ 2x4 +dut.nodes_3_0 created @ 3x0 +dut.nodes_3_1 created @ 3x1 +dut.nodes_3_2 created @ 3x2 +dut.nodes_3_3 created @ 3x3 +dut.nodes_3_4 created @ 3x4 +dut.nodes_0_0 - sc_module +dut.nodes_1_0 - sc_module +dut.nodes_2_0 - sc_module +dut.nodes_3_0 - sc_module +dut.nodes_0_1 - sc_module +dut.nodes_1_1 - sc_module +dut.nodes_2_1 - sc_module +dut.nodes_3_1 - sc_module +dut.nodes_0_2 - sc_module +dut.nodes_1_2 - sc_module +dut.nodes_2_2 - sc_module +dut.nodes_3_2 - sc_module +dut.nodes_0_3 - sc_module +dut.nodes_1_3 - sc_module +dut.nodes_2_3 - sc_module +dut.nodes_3_3 - sc_module +dut.nodes_0_4 - sc_module +dut.nodes_1_4 - sc_module +dut.nodes_2_4 - sc_module +dut.nodes_3_4 - sc_module +Program completed diff --git a/src/systemc/tests/systemc/utils/sc_vector/test04/test04.cpp b/src/systemc/tests/systemc/utils/sc_vector/test04/test04.cpp new file mode 100644 index 000000000..e8aa4df8b --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test04/test04.cpp @@ -0,0 +1,110 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test04.cpp -- Test sc_vector -- build a two dimensional mesh + + Original Author: Philipp A. Hartmann, OFFIS, 2010-03-01 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" +#include "sysc/utils/sc_vector.h" + + +SC_MODULE( mesh_node ) +{ + // constructor with additional parameters + mesh_node( sc_core::sc_module_name, int x, int y ); +}; + +typedef sc_vector< mesh_node > row_type; +typedef sc_vector< row_type > mesh_type; + +SC_MODULE(mesh) +{ + mesh_type nodes; + + mesh( sc_module_name, int n, int m ); + + struct node_creator + { + node_creator( int row ) : x(row) {} + + mesh_node* operator()(const char * name, size_t idx ) + { + return new mesh_node( name, x, idx ); + } + int x; + }; + + struct row_creator + { + row_creator( int n_cols ) : cols_( n_cols ) {} + + row_type* operator()( const char* name, size_t idx ) + { + return new row_type( name, cols_, node_creator(idx) ); + } + int cols_; + }; + + const unsigned rows; + const unsigned cols; + +}; + +mesh_node::mesh_node( sc_module_name, int x, int y ) +{ + std::cout << name() << " created @ " + << x << "x" << y << std::endl; +} + +mesh::mesh( sc_module_name, int n, int m ) + : nodes("nodes") + , rows( n ) + , cols( m ) +{ + nodes.init( n, row_creator(m) ); +} + +int sc_main(int argc, char* argv[]) +{ + mesh dut("dut", 4, 5); + + for (size_t j=0; j + +#include "sysc/utils/sc_vector.h" +using sc_core::sc_vector; + +typedef sc_vector< sc_fifo_out > port_vec; + +static void +dump_port_array( const char* from, const port_vec& in ) +{ + std::cout << "\n" << from << "\n"; + for( unsigned i=0; i(in[i][j])->name() + << " @ " << j; + } + std::cout << std::endl; + } +} + +SC_MODULE(sub_module) +{ + port_vec in; + + sub_module( sc_core::sc_module_name, unsigned n_sub ) + : in("in", n_sub ) {} + + void before_end_of_elaboration() + { dump_port_array( "sub_module::before_end_of_elaboration", in ); } + void end_of_elaboration() + { dump_port_array( "sub_module::end_of_elaboration", in ); } +}; + + +SC_MODULE(module) +{ + sub_module sub; + port_vec in; + + SC_CTOR(module) + : sub("sub", 4), in("in",4) + { + // vector to vector binding + sub.in( in ); + } + + void before_end_of_elaboration() + { dump_port_array( "module::before_end_of_elaboration", in ); } + void end_of_elaboration() + { dump_port_array( "module::end_of_elaboration", in ); } +}; + +int sc_main( int, char*[] ) +{ + + module top("top"); + + const unsigned size = 4; + const unsigned half = 2; + + sc_assert( top.in.size() == size ); + + sc_vector< sc_fifo > + fifo_1( "src_1", half ), + fifo_2( "src_2", size ); + + // bind full vector (smaller than target) + port_vec::iterator mid = top.in( fifo_1 ); + sc_assert( ( mid - top.in.begin() ) - half == 0 ); + + // bind range, starting from last position + mid = top.in.bind( fifo_2.begin(), fifo_2.end(), mid ); + sc_assert( mid == top.in.end() ); + + // bind a plain C array of channels + sc_fifo fifo_a[ half ]; + top.sub.in( fifo_a, fifo_a + half ); + + sc_start(); + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_vector/test06/golden/test06.log b/src/systemc/tests/systemc/utils/sc_vector/test06/golden/test06.log new file mode 100644 index 000000000..d46c54a94 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test06/golden/test06.log @@ -0,0 +1,37 @@ +SystemC Simulation + +-->-- m.get_child_objects() -->-- + - size: 10 + - dut.sub_modules - sc_vector + - dut.in_vec - sc_vector + - dut.sub_modules_0 - sc_module + - dut.sub_modules_1 - sc_module + - dut.sub_modules_2 - sc_module + - dut.sub_modules_3 - sc_module + - dut.in_vec_0 - sc_in + - dut.in_vec_1 - sc_in + - dut.in_vec_2 - sc_in + - dut.in_vec_3 - sc_in +--<-- m.get_child_objects() --<-- + +-->-- m.sub_vec.get_child_objects() -->-- + - size: 0 +--<-- m.sub_vec.get_child_objects() --<-- + +-->-- m.sub_vec.get_elements() -->-- + - size: 4 + - dut.sub_modules_0 - sc_module + - dut.sub_modules_1 - sc_module + - dut.sub_modules_2 - sc_module + - dut.sub_modules_3 - sc_module +--<-- m.sub_vec.get_elements() --<-- + +-->-- sc_assemble_vector( m.sub_vec, &sub_module::in ).get_elements() -->-- + - size: 4 + - dut.sub_modules_0.port_0 - sc_in + - dut.sub_modules_1.port_0 - sc_in + - dut.sub_modules_2.port_0 - sc_in + - dut.sub_modules_3.port_0 - sc_in +--<-- sc_assemble_vector( m.sub_vec, &sub_module::in ).get_elements() --<-- + +Program completed diff --git a/src/systemc/tests/systemc/utils/sc_vector/test06/test06.cpp b/src/systemc/tests/systemc/utils/sc_vector/test06/test06.cpp new file mode 100644 index 000000000..051d49c31 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test06/test06.cpp @@ -0,0 +1,113 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test06.cpp -- Test sc_vector::get_elements + + Original Author: Philipp A. Hartmann, OFFIS, 2010-11-04 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc" + +#include "sysc/utils/sc_vector.h" + +using sc_core::sc_object; +using sc_core::sc_vector; +using sc_core::sc_mutex; +using sc_core::sc_in; + +void print_vector( const char * header, + const std::vector & vec ) +{ + std::cout << "\n-->-- " << header << " -->--\n"; + + std::cout << " - size: " << vec.size() << "\n"; + + for (size_t i=0; iname() << " - " + << vec[i]->kind() << "\n"; + + std::cout << "--<-- " << header << " --<--" + << std::endl; +} + +#define PRINT_VECTOR( Vector ) \ + print_vector( #Vector, Vector ) + +SC_MODULE( sub_module ) +{ + sc_in in; + SC_CTOR(sub_module) {} +}; + + +SC_MODULE( module ) +{ + // vector of sub-modules + sc_vector< sub_module > sub_vec; + + // vector of ports + sc_vector< sc_in > in_vec; + + SC_CTOR(module) + : sub_vec( "sub_modules" ) + , in_vec( "in_vec" ) + {} + + void init( unsigned n_sub ) + { + sub_vec.init(n_sub); + in_vec.init(n_sub); + // in_vec.init(n_sub); // second call fails + + // bind ports of sub-modules -- no dereference + sc_assemble_vector( sub_vec, &sub_module::in ).bind( in_vec ); + } + +}; + +int sc_main(int, char* []) +{ + module m("dut"); + m.init(4); // calls from external context + + PRINT_VECTOR( m.get_child_objects() ); + + PRINT_VECTOR( m.sub_vec.get_child_objects() ); + + PRINT_VECTOR( m.sub_vec.get_elements() ); + + PRINT_VECTOR( sc_assemble_vector( m.sub_vec, &sub_module::in ).get_elements() ); + + std::cout << "\nProgram completed" << std::endl; + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_vector/test07/golden/test07.log b/src/systemc/tests/systemc/utils/sc_vector/test07/golden/test07.log new file mode 100644 index 000000000..da00cd389 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test07/golden/test07.log @@ -0,0 +1,14 @@ +SystemC Simulation + +Warning: (W807) sc_vector::bind called with empty range: target `dut.sub_modules' (sc_vector_assembly) not initialised yet +In file: + +Warning: (W807) sc_vector::bind called with empty range: target `dut.sub_modules' (sc_vector_assembly) empty destination range given +In file: + +Warning: (W807) sc_vector::bind called with empty range: target `dut.in_vec' (sc_vector) empty destination range given +In file: + +Warning: (W807) sc_vector::bind called with empty range: target `dut.in_vec' (sc_vector) empty destination range given +In file: +Success diff --git a/src/systemc/tests/systemc/utils/sc_vector/test07/test07.cpp b/src/systemc/tests/systemc/utils/sc_vector/test07/test07.cpp new file mode 100644 index 000000000..beed04b1f --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test07/test07.cpp @@ -0,0 +1,105 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test01.cpp -- Test sc_vector -- empty bindings + + Original Author: Philipp A. Hartmann, OFFIS, 2011-02-14 + + *****************************************************************************/ + +/***************************************************************************** + + MODIFICATION LOG - modifiers, enter your name, affiliation, date and + changes you are making here. + + Name, Affiliation, Date: + Description of Modification: + + *****************************************************************************/ + +#include "systemc.h" + +SC_MODULE( sub_module ) +{ + sc_in in; + SC_CTOR(sub_module) {} +}; + +SC_MODULE( module ) +{ + // vector of sub-modules + sc_vector< sub_module > m_sub_vec; + + // vector of ports + sc_vector< sc_in > in_vec; + + module( sc_core::sc_module_name, unsigned n_sub ) + : m_sub_vec( "sub_modules" ) + , in_vec( "in_vec" ) + { + // bind ports of submodules (before initialisation of module vector) + do_bind(); + + // initialise module vector + m_sub_vec.init( n_sub ); + + // bind ports of submodules (before initialisation of port vector) + do_bind(); + + // delayed initialisation of port vector + in_vec.init( n_sub ); + + // bind ports of submodules (should be fine now) + do_bind(); + } + + void do_bind() + { + try { + // bind ports of sub-modules -- sc_assemble_vector + sc_assemble_vector( m_sub_vec, &sub_module::in ).bind( in_vec ); + } catch( sc_report const & rpt ) { + std::cout << rpt.what() << std::endl; + } + } +}; + +int sc_main(int , char* []) +{ + module m("dut", 4); + sc_vector< sc_signal > s("sig"); + + // bind ports to signals -- before initialisation of signal vector + m.in_vec( s ); + + s.init(4); + + // bind empty range + m.in_vec( s.begin(), s.begin() ); + + // bind with full range + m.in_vec( s ); + + sc_start( SC_ZERO_TIME ); + + cout << "Success" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_vector/test08/golden/test08.log b/src/systemc/tests/systemc/utils/sc_vector/test08/golden/test08.log new file mode 100644 index 000000000..4e18b8169 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test08/golden/test08.log @@ -0,0 +1,9 @@ +SystemC Simulation + +Error: (E808) sc_vector::get_elements called for element type not derived from sc_object: evs +In file: + +Error: (E808) sc_vector::get_elements called for element type not derived from sc_object: foo +In file: + +Success diff --git a/src/systemc/tests/systemc/utils/sc_vector/test08/test08.cpp b/src/systemc/tests/systemc/utils/sc_vector/test08/test08.cpp new file mode 100644 index 000000000..d08a0d7fb --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test08/test08.cpp @@ -0,0 +1,60 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + test08.cpp -- sc_vector of objects not derived from sc_object + (OSCI extension to IEEE 1666-2011) + + Original Author: Philipp A. Hartmann, OFFIS, 2011-10-01 + + *****************************************************************************/ + +#include "systemc.h" + +struct foo +{ + explicit + foo( const char* nm ) + : name(nm) + {} + std::string name; +}; + +int sc_main( int, char*[] ) +{ + sc_report_handler::set_actions( SC_ERROR, SC_DISPLAY ); + + sc_vector< sc_event > ev_vec ( "evs", 1 ); + + sc_assert( ev_vec.size() == 1 ); + // should print an error + sc_assert( ev_vec.get_elements().size() == 0 ); + + sc_vector< foo > foo_vec( "foo", 1 ); + + sc_assert( foo_vec.size() == 1 ); + sc_assert( sc_assemble_vector( foo_vec, &foo::name ).size() == 1 ); + // should print an error + sc_assert( sc_assemble_vector( foo_vec, &foo::name ) + .get_elements().size() == 0 ); + + cout << "\nSuccess" << endl; + return 0; +} diff --git a/src/systemc/tests/systemc/utils/sc_vector/test09/golden/iter_test.log b/src/systemc/tests/systemc/utils/sc_vector/test09/golden/iter_test.log new file mode 100644 index 000000000..7ced375b0 --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test09/golden/iter_test.log @@ -0,0 +1,3 @@ +SystemC Simulation + +Success diff --git a/src/systemc/tests/systemc/utils/sc_vector/test09/iter_test.cpp b/src/systemc/tests/systemc/utils/sc_vector/test09/iter_test.cpp new file mode 100644 index 000000000..4a4599afa --- /dev/null +++ b/src/systemc/tests/systemc/utils/sc_vector/test09/iter_test.cpp @@ -0,0 +1,97 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +/***************************************************************************** + + iter_test.cpp -- sc_vector iterator comparisons + + Original Author: Philipp A. Hartmann, OFFIS, 2014-08-21 + + *****************************************************************************/ +#include + +SC_MODULE(mod) +{ + sc_in p; + SC_CTOR(mod){} +}; + +int sc_main(int,char*[]) +{ + typedef sc_vector module_vec; + typedef sc_vector_assembly > module_port_vec; + + module_vec mv("sigs",5); + module_vec::const_iterator citr = mv.begin(); + module_vec::iterator itr = mv.begin(); + + module_port_vec mpv = sc_assemble_vector(mv, &mod::p); + module_port_vec::const_iterator cpitr = mpv.cbegin(); + module_port_vec::iterator pitr = mpv.begin(); + + sc_assert(itr == citr); + sc_assert(citr == itr); + sc_assert(!(itr != citr)); + sc_assert(!(citr != itr)); + + sc_assert(itr == cpitr); + sc_assert(citr == pitr); + sc_assert(cpitr == itr); + sc_assert(pitr == citr); + sc_assert(!(itr != cpitr)); + sc_assert(!(citr != pitr)); + sc_assert(!(cpitr != pitr)); + sc_assert(!(pitr != itr)); + + sc_assert(itr < mv.end()); + sc_assert(!(itr > mv.cend())); + sc_assert(citr < mv.end()); + sc_assert(!(citr > mv.cend())); + + ++citr; + sc_assert(itr != citr); + sc_assert(citr != itr); + sc_assert(!(itr == citr)); + sc_assert(!(citr == itr)); + + sc_assert(!(itr < itr)); + sc_assert(!(itr > itr)); + sc_assert(itr < citr); + sc_assert(citr > itr); + + sc_assert(1 == citr - mv.begin()); + sc_assert(0 == pitr - mv.cbegin()); + itr += citr - mpv.begin(); + sc_assert(1 == itr - mpv.cbegin()); + + sc_assert(citr == itr); + sc_assert(itr <= citr); + sc_assert(citr <= itr); + sc_assert(cpitr <= itr); + sc_assert(!(itr <= cpitr)); + + itr++; + cpitr = pitr += itr - mv.begin(); + sc_assert(itr == pitr); + sc_assert(itr >= citr); + sc_assert(!(citr >= pitr)); + + cout << "\nSuccess" << endl; + return 0; +} diff --git a/src/systemc/tests/tlm/README.txt b/src/systemc/tests/tlm/README.txt new file mode 100644 index 000000000..33def095a --- /dev/null +++ b/src/systemc/tests/tlm/README.txt @@ -0,0 +1,89 @@ + +TLM-2.0 unit tests +================== + +Dir: tests/tlm/ +SubDirs: + bus/ + bus_dmi/ + cancel_all/ + common/ + endian_conv/ + multi_sockets/ + nb2b_adapter/ + p2p/ + static_extensions/ + update_original/ + +Files: README.txt + + +Comments +======== + +Running the tests: +------------------ + +See the main README and README_windows.txt files. + + +The tests: +---------- + +All tests are build using a set of models that can be found in the subdirectory +common/include/models. For a description of the models see the README.txt in +that subdirectory. + +The test themselves can be found in the following subdirectories: +bus/ : + test system using a TLM2 compliant AT bus model and a combination of + LT and AT targets and initiators, with and without temporal decoupling. + +bus_dmi/ : + test system using a similar system as in the bus/ test but now with DMI + support added for the LT initiators and targets. + +cancel_all/ : + Tests the cancel_all() methods of the two PEQs, peq_with_cb_and_phase and peq_with_get. + Along the way, it also tests the basic operation of each PEQ. + +endian_conv/ : + unit test for the endianness conversion ftions, there is only a build for + linux provided, the C++ test performs a single conversion, there is a + python script using the program to do a more extensive test + +multi_sockets/ : + test system using a TLM2 compliant AT busmodel using a single socket to + bind all targets and initiators to, in combination with LT and AT + initiators and targets. This test also uses instance specific extentions + in the generic payload + +nb2b_adapter/ : + Primarily a regression test for a bug in the nb2b adapter of the simple_target_socket. + Tests the operation of the nb2b adapter, and also exercises the peq_with_cb_and_phase + and the instance_specific_extension. + +p2p/ : + BaseSocketLT/ : + simple point to point test for LT initiator and target + CoreDecoupling/ + simple test for using the LT initiator with temporal decoupling + EndEventLT/ + ?? + HierarchicalSocket/ + tests sockets on hierachical modules + RegisterSocketProcessLT/ + simple test for initiator and target using callback registry in sockets + SimpleAT/ + simple point to point test for AT initiator and target using GP + AT phases and TLM_ACCEPTED + SimpleAT_TA/ + simple point to point test for AT initiator and target using GP + AT phases and TLM_UPDATED + +static_extentions/ : + contains 3 unit tests to verify the GP extention mechanism + +update_original/ : + Tests the deep_copy_from() and update_original_from() methods of tlm_generic_payload. + Along the way, it also tests the use of byte enables for read and write commands. diff --git a/src/systemc/tests/tlm/bugs/multi_passthrough_sockets_bug/golden/multi_passthrough_sockets_bug.log b/src/systemc/tests/tlm/bugs/multi_passthrough_sockets_bug/golden/multi_passthrough_sockets_bug.log new file mode 100644 index 000000000..1511493c4 --- /dev/null +++ b/src/systemc/tests/tlm/bugs/multi_passthrough_sockets_bug/golden/multi_passthrough_sockets_bug.log @@ -0,0 +1,2 @@ +SystemC Simulation +Received successfully introspection extension! diff --git a/src/systemc/tests/tlm/bugs/multi_passthrough_sockets_bug/multi_passthrough_sockets_bug.cpp b/src/systemc/tests/tlm/bugs/multi_passthrough_sockets_bug/multi_passthrough_sockets_bug.cpp new file mode 100644 index 000000000..209093aa7 --- /dev/null +++ b/src/systemc/tests/tlm/bugs/multi_passthrough_sockets_bug/multi_passthrough_sockets_bug.cpp @@ -0,0 +1,196 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc" +#include "tlm" +#include "tlm_utils/simple_initiator_socket.h" +#include "tlm_utils/multi_passthrough_target_socket.h" + +class introspection_extension; + +class initiator_module : public sc_core::sc_module +{ +public: + + tlm_utils::simple_initiator_socket initiator_socket; + SC_HAS_PROCESS(initiator_module); + explicit initiator_module(sc_core::sc_module_name module_name) + : sc_core::sc_module(module_name) + , initiator_socket("initiator_socket") + { + SC_THREAD(process); + } + + void process() + { + // To verify regular TLM-2 access from initiators are OK + tlm::tlm_generic_payload transaction; + + unsigned char byte = 0x42; + + transaction.set_command(tlm::TLM_WRITE_COMMAND); + transaction.set_address(sc_dt::uint64(0)); + transaction.set_data_length(1); + transaction.set_streaming_width(1); + transaction.set_data_ptr(&byte); + transaction.set_byte_enable_ptr(0); + transaction.set_byte_enable_length(0); + transaction.set_dmi_allowed(false); + transaction.set_response_status(tlm::TLM_INCOMPLETE_RESPONSE); + + sc_core::sc_time t = sc_core::SC_ZERO_TIME; + + initiator_socket->b_transport(transaction, t); + } + +}; + +class target_module : public sc_core::sc_module +{ +public: + + tlm_utils::multi_passthrough_target_socket target_socket; + tlm_utils::multi_passthrough_target_socket target_optional; + + explicit target_module(sc_core::sc_module_name module_name) + : sc_core::sc_module(module_name) + , target_socket("target_socket") + , target_optional("target_optional") + { + target_socket.register_b_transport(this, &target_module::transport); + target_socket.register_transport_dbg(this, &target_module::transport_dbg); + target_socket.register_get_direct_mem_ptr(this, &target_module::get_direct_mem_ptr); + + // bind callbacks to optional socket (unbound) + target_optional.register_b_transport(this, &target_module::transport); + target_optional.register_transport_dbg(this, &target_module::transport_dbg); + target_optional.register_get_direct_mem_ptr(this, &target_module::get_direct_mem_ptr); + } + + virtual void transport(int port, tlm::tlm_generic_payload & transaction, sc_core::sc_time & t) {} + + virtual unsigned int transport_dbg(int port, tlm::tlm_generic_payload & transaction) + { + if ((transaction.get_command() == tlm::TLM_IGNORE_COMMAND) && + transaction.get_extension()) + { + std::cout << "Received successfully introspection extension!" << std::endl; + } + + return 0; + } + + virtual bool get_direct_mem_ptr(int port, tlm::tlm_generic_payload & transaction, tlm::tlm_dmi & dmi_data) { return false; } + +}; + +// Simple empty extension to verify the target module is receiving it +class introspection_extension : public tlm::tlm_extension +{ +public: + + virtual tlm_extension_base * clone() const + { + return new introspection_extension; + } + + virtual void copy_from(tlm_extension_base const & ext) + { + } + +}; + +class introspector_module : public sc_core::sc_module +{ +public: + + SC_HAS_PROCESS(introspector_module); + introspector_module(sc_core::sc_module_name module_name) : + sc_core::sc_module(module_name) + { + SC_THREAD(process); + } + + void send_introspection_request(sc_core::sc_export > & target_socket) + { + tlm::tlm_generic_payload transaction; + + transaction.set_command(tlm::TLM_IGNORE_COMMAND); + transaction.set_address(sc_dt::uint64(0)); + transaction.set_data_length(0); + transaction.set_streaming_width(0); + transaction.set_data_ptr(0); + transaction.set_byte_enable_ptr(0); + transaction.set_byte_enable_length(0); + transaction.set_dmi_allowed(false); + transaction.set_response_status(tlm::TLM_INCOMPLETE_RESPONSE); + + introspection_extension *ext = new introspection_extension; + + transaction.set_extension(ext); + + target_socket->transport_dbg(transaction); + } + + void find_target_sockets(sc_core::sc_module *module) + { + std::vector children = module->get_child_objects(); + + for (std::vector::iterator i = children.begin(); i != children.end(); ++i) + { + if (dynamic_cast(*i)) + { + find_target_sockets(dynamic_cast(*i)); + } + else if (dynamic_cast > *>((*i))) + { + sc_core::sc_export > * target_socket = dynamic_cast > *>(*i); + + send_introspection_request(*target_socket); + } + } + } + + void process() + { + const std::vector & top_objs = sc_core::sc_get_top_level_objects(); + + for (std::vector::const_iterator i = top_objs.begin(); i != top_objs.end(); ++i) + { + if (dynamic_cast(*i)) + { + find_target_sockets(dynamic_cast(*i)); + } + } + } + +}; + +int sc_main(int argc, char* argv[]) +{ + initiator_module initiator("initiator"); + target_module target("target"); + introspector_module introspector("introspector"); + + initiator.initiator_socket(target.target_socket); + + sc_core::sc_start(); + + return 0; +} diff --git a/src/systemc/tests/tlm/bus/bus.cpp b/src/systemc/tests/tlm/bus/bus.cpp new file mode 100644 index 000000000..0f3f5ae65 --- /dev/null +++ b/src/systemc/tests/tlm/bus/bus.cpp @@ -0,0 +1,81 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include +#include "tlm.h" + +#include "SimpleLTInitiator1.h" +#include "SimpleLTTarget1.h" +#include "SimpleLTInitiator2.h" +#include "SimpleLTTarget2.h" +#include "SimpleATInitiator1.h" +#include "SimpleATInitiator2.h" +#include "SimpleATTarget1.h" +#include "SimpleATInitiator2.h" +#include "SimpleATTarget2.h" +#include "CoreDecouplingLTInitiator.h" +#include "ExplicitLTTarget.h" +#include "ExplicitATTarget.h" +#include "SimpleBusAT.h" + +int sc_main(int argc, char* argv[]) +{ + SimpleLTInitiator1 initiator1("initiator1", 10, 0x00000000); + SimpleLTTarget1 target1("target1"); + + SimpleLTInitiator2 initiator2("initiator2", 10, 0x10000000); + SimpleLTTarget2 target2("target2"); + + SimpleATInitiator1 initiator3("initiator3", 10, 0x20000000); + SimpleATTarget1 target3("target3"); + + SimpleATInitiator2 initiator4("initiator4", 10, 0x30000000); + SimpleATTarget2 target4("target4"); + + SimpleATInitiator2 initiator5("initiator5", 10, 0x40000000); + SimpleATTarget2 target5("target5"); + + CoreDecouplingLTInitiator initiator6("initiator6", 10, 0x50000000); + ExplicitLTTarget target6("target6"); + + CoreDecouplingLTInitiator initiator7("initiator7", 10, 0x60000000); + ExplicitATTarget target7("target7"); + + SimpleBusAT<7, 7> bus("bus"); + + initiator1.socket(bus.target_socket[0]); + initiator2.socket(bus.target_socket[1]); + initiator3.socket(bus.target_socket[2]); + initiator4.socket(bus.target_socket[3]); + initiator5.socket(bus.target_socket[4]); + initiator6.socket(bus.target_socket[5]); + initiator7.socket(bus.target_socket[6]); + bus.initiator_socket[0](target1.socket); + bus.initiator_socket[1](target2.socket); + bus.initiator_socket[2](target3.socket); + bus.initiator_socket[3](target4.socket); + bus.initiator_socket[4](target5.socket); + bus.initiator_socket[5](target6.socket); + bus.initiator_socket[6](target7.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/bus/golden/bus.log b/src/systemc/tests/tlm/bus/golden/bus.log new file mode 100644 index 000000000..05fbfe374 --- /dev/null +++ b/src/systemc/tests/tlm/bus/golden/bus.log @@ -0,0 +1,445 @@ +SystemC Simulation +initiator1: Send write request: A = 0x0, D = 0x0 @ 0 s +initiator2: Send write request: A = 0x10000000, D = 0x0 @ 0 s +initiator3: Send write request: A = 0x20000000, D = 0x0 @ 0 s +initiator4: Send write request: A = 0x30000000, D = 0x0 @ 0 s +initiator5: Send write request: A = 0x40000000, D = 0x0 @ 0 s +initiator6: Send write request: A = 0x50000000, D = 0x0 @ 0 s (0 s + 0 s) +initiator7: Send write request: A = 0x60000000, D = 0x0 @ 0 s (0 s + 0 s) +target3: Received write request: A = 0x0, D = 0x0 @ 0 s +target4: Received write request: A = 0x0, D = 0x0 @ 25 ns +initiator3: Send write request: A = 0x20000004, D = 0x1 @ 25 ns +target5: Received write request: A = 0x0, D = 0x0 @ 50 ns +initiator4: Send write request: A = 0x30000004, D = 0x1 @ 50 ns +target7: Received write request: A = 0x0, D = 0x0 @ 75 ns +initiator5: Send write request: A = 0x40000004, D = 0x1 @ 75 ns +target6: Received write request: A = 0x0, D = 0x0 @ 75 ns +target2: Received write request: A = 0x0, D = 0x0 @ 125 ns +initiator3: Received ok response @ 135 ns +target1: Received write request: A = 0x0, D = 0x0 @ 135 ns +initiator7: Received ok response @ 135 ns (135 ns + 0 s) +initiator7: Send write request: A = 0x60000004, D = 0x1 @ 135 ns (135 ns + 0 s) +initiator6: Received ok response @ 135 ns (135 ns + 0 s) +initiator6: Send write request: A = 0x50000004, D = 0x1 @ 135 ns (135 ns + 0 s) +initiator2: Received ok response @ 135 ns +initiator2: Send write request: A = 0x10000004, D = 0x1 @ 135 ns +target3: Received write request: A = 0x4, D = 0x1 @ 145 ns +initiator1: Received ok response @ 145 ns +initiator1: Send write request: A = 0x4, D = 0x1 @ 145 ns +initiator4: Received ok response @ 150 ns +target4: Received write request: A = 0x4, D = 0x1 @ 150 ns +initiator3: Send write request: A = 0x20000008, D = 0x2 @ 150 ns +target5: Received write request: A = 0x4, D = 0x1 @ 175 ns +initiator4: Send write request: A = 0x30000008, D = 0x2 @ 175 ns +initiator5: Received ok response @ 175 ns +target7: Received write request: A = 0x4, D = 0x1 @ 200 ns +initiator5: Send write request: A = 0x40000008, D = 0x2 @ 200 ns +target6: Received write request: A = 0x4, D = 0x1 @ 200 ns +target2: Received write request: A = 0x4, D = 0x1 @ 250 ns +initiator7: Received ok response @ 250 ns (250 ns + 0 s) +initiator7: Send write request: A = 0x60000008, D = 0x2 @ 250 ns (250 ns + 0 s) +initiator6: Received ok response @ 250 ns (250 ns + 0 s) +initiator6: Send write request: A = 0x50000008, D = 0x2 @ 250 ns (250 ns + 0 s) +target1: Received write request: A = 0x4, D = 0x1 @ 260 ns +initiator4: Received ok response @ 260 ns +initiator2: Received ok response @ 260 ns +initiator2: Send write request: A = 0x10000008, D = 0x2 @ 260 ns +target3: Received write request: A = 0x8, D = 0x2 @ 270 ns +target4: Received write request: A = 0x8, D = 0x2 @ 270 ns +initiator3: Send write request: A = 0x2000000c, D = 0x3 @ 270 ns +initiator1: Received ok response @ 270 ns +initiator1: Send write request: A = 0x8, D = 0x2 @ 270 ns +initiator3: Received ok response @ 280 ns +initiator5: Received ok response @ 285 ns +target5: Received write request: A = 0x8, D = 0x2 @ 295 ns +initiator4: Send write request: A = 0x3000000c, D = 0x3 @ 295 ns +target7: Received write request: A = 0x8, D = 0x2 @ 320 ns +initiator5: Send write request: A = 0x4000000c, D = 0x3 @ 320 ns +target6: Received write request: A = 0x8, D = 0x2 @ 320 ns +target2: Received write request: A = 0x8, D = 0x2 @ 370 ns +initiator7: Received ok response @ 370 ns (370 ns + 0 s) +initiator7: Send write request: A = 0x6000000c, D = 0x3 @ 370 ns (370 ns + 0 s) +initiator6: Received ok response @ 370 ns (370 ns + 0 s) +initiator6: Send write request: A = 0x5000000c, D = 0x3 @ 370 ns (370 ns + 0 s) +target3: Received write request: A = 0xc, D = 0x3 @ 380 ns +initiator2: Received ok response @ 380 ns +initiator2: Send write request: A = 0x1000000c, D = 0x3 @ 380 ns +initiator5: Received ok response @ 395 ns +target1: Received write request: A = 0x8, D = 0x2 @ 395 ns +initiator3: Send write request: A = 0x20000010, D = 0x4 @ 395 ns +target4: Received write request: A = 0xc, D = 0x3 @ 405 ns +initiator3: Received ok response @ 415 ns +initiator4: Received ok response @ 415 ns +initiator1: Received ok response @ 425 ns +initiator1: Send write request: A = 0xc, D = 0x3 @ 425 ns +target5: Received write request: A = 0xc, D = 0x3 @ 430 ns +initiator4: Send write request: A = 0x30000010, D = 0x4 @ 430 ns +target7: Received write request: A = 0xc, D = 0x3 @ 455 ns +initiator5: Send write request: A = 0x40000010, D = 0x4 @ 455 ns +target6: Received write request: A = 0xc, D = 0x3 @ 455 ns +target2: Received write request: A = 0xc, D = 0x3 @ 505 ns +Sync'ing... +initiator7: Received ok response @ 505 ns (505 ns + 0 s) +initiator7: Send write request: A = 0x60000010, D = 0x4 @ 505 ns (505 ns + 0 s) +Sync'ing... +initiator6: Received ok response @ 505 ns (505 ns + 0 s) +initiator6: Send write request: A = 0x50000010, D = 0x4 @ 505 ns (505 ns + 0 s) +target3: Received write request: A = 0x10, D = 0x4 @ 515 ns +target1: Received write request: A = 0xc, D = 0x3 @ 515 ns +initiator3: Send write request: A = 0x20000014, D = 0x5 @ 515 ns +initiator2: Received ok response @ 515 ns +initiator2: Send write request: A = 0x10000010, D = 0x4 @ 515 ns +initiator3: Received ok response @ 525 ns +target4: Received write request: A = 0x10, D = 0x4 @ 525 ns +initiator4: Received ok response @ 525 ns +initiator1: Received ok response @ 525 ns +initiator1: Send write request: A = 0x10, D = 0x4 @ 525 ns +target5: Received write request: A = 0x10, D = 0x4 @ 550 ns +initiator4: Send write request: A = 0x30000014, D = 0x5 @ 550 ns +initiator5: Received ok response @ 555 ns +target7: Received write request: A = 0x10, D = 0x4 @ 575 ns +initiator5: Send write request: A = 0x40000014, D = 0x5 @ 575 ns +target6: Received write request: A = 0x10, D = 0x4 @ 575 ns +target3: Received write request: A = 0x14, D = 0x5 @ 625 ns +initiator7: Received ok response @ 625 ns (625 ns + 0 s) +initiator7: Send write request: A = 0x60000014, D = 0x5 @ 625 ns (625 ns + 0 s) +target2: Received write request: A = 0x10, D = 0x4 @ 625 ns +initiator3: Send write request: A = 0x20000018, D = 0x6 @ 625 ns +initiator6: Received ok response @ 625 ns (625 ns + 0 s) +initiator6: Send write request: A = 0x50000014, D = 0x5 @ 625 ns (625 ns + 0 s) +target1: Received write request: A = 0x10, D = 0x4 @ 635 ns +initiator4: Received ok response @ 635 ns +initiator2: Received ok response @ 635 ns +initiator2: Send write request: A = 0x10000014, D = 0x5 @ 635 ns +target4: Received write request: A = 0x14, D = 0x5 @ 645 ns +initiator3: Received ok response @ 655 ns +initiator1: Received ok response @ 655 ns +initiator1: Send write request: A = 0x14, D = 0x5 @ 655 ns +initiator5: Received ok response @ 665 ns +target5: Received write request: A = 0x14, D = 0x5 @ 670 ns +initiator4: Send write request: A = 0x30000018, D = 0x6 @ 670 ns +target3: Received write request: A = 0x18, D = 0x6 @ 695 ns +initiator5: Send write request: A = 0x40000018, D = 0x6 @ 695 ns +target7: Received write request: A = 0x14, D = 0x5 @ 720 ns +initiator3: Send write request: A = 0x2000001c, D = 0x7 @ 720 ns +target6: Received write request: A = 0x14, D = 0x5 @ 720 ns +initiator4: Received ok response @ 745 ns +target2: Received write request: A = 0x14, D = 0x5 @ 745 ns +target1: Received write request: A = 0x14, D = 0x5 @ 755 ns +initiator2: Received ok response @ 755 ns +initiator2: Send write request: A = 0x10000018, D = 0x6 @ 755 ns +initiator3: Received ok response @ 765 ns +target4: Received write request: A = 0x18, D = 0x6 @ 765 ns +initiator1: Received ok response @ 765 ns +initiator1: Send write request: A = 0x18, D = 0x6 @ 765 ns +initiator7: Received ok response @ 770 ns (770 ns + 0 s) +initiator7: Send write request: A = 0x60000018, D = 0x6 @ 770 ns (770 ns + 0 s) +initiator6: Received ok response @ 770 ns (770 ns + 0 s) +initiator6: Send write request: A = 0x50000018, D = 0x6 @ 770 ns (770 ns + 0 s) +initiator5: Received ok response @ 775 ns +target5: Received write request: A = 0x18, D = 0x6 @ 790 ns +initiator4: Send write request: A = 0x3000001c, D = 0x7 @ 790 ns +target3: Received write request: A = 0x1c, D = 0x7 @ 815 ns +initiator5: Send write request: A = 0x4000001c, D = 0x7 @ 815 ns +target2: Received write request: A = 0x18, D = 0x6 @ 840 ns +initiator3: Send write request: A = 0x20000020, D = 0x8 @ 840 ns +target1: Received write request: A = 0x18, D = 0x6 @ 850 ns +initiator2: Received ok response @ 850 ns +initiator2: Send write request: A = 0x1000001c, D = 0x7 @ 850 ns +target7: Received write request: A = 0x18, D = 0x6 @ 860 ns +initiator1: Received ok response @ 860 ns +initiator1: Send write request: A = 0x1c, D = 0x7 @ 860 ns +target6: Received write request: A = 0x18, D = 0x6 @ 860 ns +target4: Received write request: A = 0x1c, D = 0x7 @ 865 ns +initiator3: Received ok response @ 875 ns +target5: Received write request: A = 0x1c, D = 0x7 @ 890 ns +initiator4: Send write request: A = 0x30000020, D = 0x8 @ 890 ns +initiator4: Received ok response @ 890 ns +initiator7: Received ok response @ 910 ns (910 ns + 0 s) +initiator7: Send write request: A = 0x6000001c, D = 0x7 @ 910 ns (910 ns + 0 s) +initiator6: Received ok response @ 910 ns (910 ns + 0 s) +initiator6: Send write request: A = 0x5000001c, D = 0x7 @ 910 ns (910 ns + 0 s) +target3: Received write request: A = 0x20, D = 0x8 @ 915 ns +initiator5: Send write request: A = 0x40000020, D = 0x8 @ 915 ns +initiator5: Received ok response @ 915 ns +target2: Received write request: A = 0x1c, D = 0x7 @ 915 ns +initiator3: Send write request: A = 0x20000024, D = 0x9 @ 915 ns +target1: Received write request: A = 0x1c, D = 0x7 @ 925 ns +initiator2: Received ok response @ 925 ns +initiator2: Send write request: A = 0x10000020, D = 0x8 @ 925 ns +target4: Received write request: A = 0x20, D = 0x8 @ 935 ns +initiator1: Received ok response @ 935 ns +initiator1: Send write request: A = 0x20, D = 0x8 @ 935 ns +target7: Received write request: A = 0x1c, D = 0x7 @ 960 ns +initiator4: Send write request: A = 0x30000024, D = 0x9 @ 960 ns +target6: Received write request: A = 0x1c, D = 0x7 @ 960 ns +target5: Received write request: A = 0x20, D = 0x8 @ 975 ns +initiator3: Received ok response @ 985 ns +target3: Received write request: A = 0x24, D = 0x9 @ 1 us +initiator5: Send write request: A = 0x40000024, D = 0x9 @ 1 us +initiator4: Received ok response @ 1 us +target2: Received write request: A = 0x20, D = 0x8 @ 1 us +initiator3: Send read request: A = 0x20000000 @ 1 us +target1: Received write request: A = 0x20, D = 0x8 @ 1010 ns +initiator2: Received ok response @ 1010 ns +initiator2: Send write request: A = 0x10000024, D = 0x9 @ 1010 ns +Sync'ing... +initiator7: Received ok response @ 1010 ns (1010 ns + 0 s) +initiator7: Send write request: A = 0x60000020, D = 0x8 @ 1010 ns (1010 ns + 0 s) +Sync'ing... +initiator6: Received ok response @ 1010 ns (1010 ns + 0 s) +initiator6: Send write request: A = 0x50000020, D = 0x8 @ 1010 ns (1010 ns + 0 s) +target4: Received write request: A = 0x24, D = 0x9 @ 1020 ns +initiator1: Received ok response @ 1020 ns +initiator1: Send write request: A = 0x24, D = 0x9 @ 1020 ns +initiator5: Received ok response @ 1025 ns +target5: Received write request: A = 0x24, D = 0x9 @ 1045 ns +initiator4: Send read request: A = 0x30000000 @ 1045 ns +target3: Received read request: A = 0x0 @ 1070 ns +initiator5: Send read request: A = 0x40000000 @ 1070 ns +target2: Received write request: A = 0x24, D = 0x9 @ 1085 ns +initiator3: Send read request: A = 0x20000004 @ 1085 ns +initiator3: Received ok response @ 1095 ns +target7: Received write request: A = 0x20, D = 0x8 @ 1095 ns +target6: Received write request: A = 0x20, D = 0x8 @ 1095 ns +initiator2: Received ok response @ 1095 ns +initiator2: Send read request: A = 0x10000000 @ 1095 ns +initiator4: Received ok response @ 1110 ns +target1: Received write request: A = 0x24, D = 0x9 @ 1110 ns +target4: Received read request: A = 0x0 @ 1120 ns +initiator1: Received ok response @ 1120 ns +initiator1: Send read request: A = 0x0 @ 1120 ns +initiator5: Received ok response @ 1135 ns +target5: Received read request: A = 0x0 @ 1145 ns +initiator4: Send read request: A = 0x30000004 @ 1145 ns +initiator7: Received ok response @ 1145 ns (1145 ns + 0 s) +initiator7: Send write request: A = 0x60000024, D = 0x9 @ 1145 ns (1145 ns + 0 s) +initiator6: Received ok response @ 1145 ns (1145 ns + 0 s) +initiator6: Send write request: A = 0x50000024, D = 0x9 @ 1145 ns (1145 ns + 0 s) +target3: Received read request: A = 0x4 @ 1170 ns +initiator5: Send read request: A = 0x40000004 @ 1170 ns +target2: Received read request: A = 0x0 @ 1195 ns +initiator3: Send read request: A = 0x20000008 @ 1195 ns +initiator3: Received ok response @ 1205 ns +initiator4: Received ok response @ 1220 ns +initiator5: Received ok response @ 1245 ns +target1: Received read request: A = 0x0 @ 1295 ns +initiator2: Received ok response: D = 0x0 @ 1295 ns +initiator2: Send read request: A = 0x10000004 @ 1295 ns +initiator3: Received ok response: D = 0x0 @ 1315 ns +initiator4: Received ok response: D = 0x0 @ 1330 ns +initiator5: Received ok response: D = 0x0 @ 1355 ns +target4: Received read request: A = 0x4 @ 1395 ns +initiator1: Received ok response: D = 0x0 @ 1395 ns +initiator1: Send read request: A = 0x4 @ 1395 ns +target7: Received write request: A = 0x24, D = 0x9 @ 1420 ns +initiator4: Send read request: A = 0x30000008 @ 1420 ns +target6: Received write request: A = 0x24, D = 0x9 @ 1420 ns +initiator3: Received ok response: D = 0x1 @ 1425 ns +target5: Received read request: A = 0x4 @ 1470 ns +initiator7: Received ok response @ 1470 ns (1470 ns + 0 s) +initiator7: Send read request: A = 0x60000000 @ 1470 ns (1470 ns + 0 s) +initiator6: Received ok response @ 1470 ns (1470 ns + 0 s) +initiator6: Send read request: A = 0x50000000 @ 1470 ns (1470 ns + 0 s) +target3: Received read request: A = 0x8 @ 1495 ns +initiator5: Send read request: A = 0x40000008 @ 1495 ns +initiator4: Received ok response: D = 0x1 @ 1520 ns +target2: Received read request: A = 0x4 @ 1520 ns +initiator3: Send read request: A = 0x2000000c @ 1520 ns +initiator5: Received ok response: D = 0x1 @ 1595 ns +target1: Received read request: A = 0x4 @ 1620 ns +initiator2: Received ok response: D = 0x1 @ 1620 ns +initiator2: Send read request: A = 0x10000008 @ 1620 ns +initiator3: Received ok response: D = 0x2 @ 1630 ns +target4: Received read request: A = 0x8 @ 1720 ns +initiator1: Received ok response: D = 0x1 @ 1720 ns +initiator1: Send read request: A = 0x8 @ 1720 ns +target7: Received read request: A = 0x0 @ 1745 ns +initiator4: Send read request: A = 0x3000000c @ 1745 ns +initiator4: Received ok response: D = 0x2 @ 1845 ns +Sync'ing... +target6: Received read request: A = 0x0 @ 1845 ns +target5: Received read request: A = 0x8 @ 1845 ns +initiator7: Received ok response: D = 0x0 @ 1845 ns (1845 ns + 0 s) +initiator7: Send read request: A = 0x60000004 @ 1845 ns (1845 ns + 0 s) +target3: Received read request: A = 0xc @ 1870 ns +initiator5: Send read request: A = 0x4000000c @ 1870 ns +target2: Received read request: A = 0x8 @ 1895 ns +initiator3: Send read request: A = 0x20000010 @ 1895 ns +Sync'ing... +initiator6: Received ok response: D = 0x0 @ 1945 ns (1945 ns + 0 s) +initiator6: Send read request: A = 0x50000004 @ 1945 ns (1945 ns + 0 s) +initiator5: Received ok response: D = 0x2 @ 1970 ns +target1: Received read request: A = 0x8 @ 1995 ns +initiator2: Received ok response: D = 0x2 @ 1995 ns +initiator2: Send read request: A = 0x1000000c @ 1995 ns +initiator3: Received ok response: D = 0x3 @ 2005 ns +target4: Received read request: A = 0xc @ 2095 ns +initiator1: Received ok response: D = 0x2 @ 2095 ns +initiator1: Send read request: A = 0xc @ 2095 ns +target7: Received read request: A = 0x4 @ 2120 ns +initiator4: Send read request: A = 0x30000010 @ 2120 ns +target5: Received read request: A = 0xc @ 2220 ns +initiator4: Received ok response: D = 0x3 @ 2220 ns +Sync'ing... +initiator7: Received ok response: D = 0x1 @ 2220 ns (2220 ns + 0 s) +initiator7: Send read request: A = 0x60000008 @ 2220 ns (2220 ns + 0 s) +target3: Received read request: A = 0x10 @ 2245 ns +initiator5: Send read request: A = 0x40000010 @ 2245 ns +target6: Received read request: A = 0x4 @ 2270 ns +initiator3: Send read request: A = 0x20000014 @ 2270 ns +initiator5: Received ok response: D = 0x3 @ 2345 ns +target2: Received read request: A = 0xc @ 2345 ns +initiator3: Received ok response: D = 0x4 @ 2380 ns +Sync'ing... +initiator6: Received ok response: D = 0x1 @ 2380 ns (2380 ns + 0 s) +initiator6: Send read request: A = 0x50000008 @ 2380 ns (2380 ns + 0 s) +target1: Received read request: A = 0xc @ 2445 ns +initiator2: Received ok response: D = 0x3 @ 2445 ns +initiator2: Send read request: A = 0x10000010 @ 2445 ns +target4: Received read request: A = 0x10 @ 2545 ns +initiator1: Received ok response: D = 0x3 @ 2545 ns +initiator1: Send read request: A = 0x10 @ 2545 ns +target7: Received read request: A = 0x8 @ 2570 ns +initiator4: Send read request: A = 0x30000014 @ 2570 ns +target5: Received read request: A = 0x10 @ 2670 ns +initiator4: Received ok response: D = 0x4 @ 2670 ns +Sync'ing... +initiator7: Received ok response: D = 0x2 @ 2670 ns (2670 ns + 0 s) +initiator7: Send read request: A = 0x6000000c @ 2670 ns (2670 ns + 0 s) +target3: Received read request: A = 0x14 @ 2695 ns +initiator5: Send read request: A = 0x40000014 @ 2695 ns +target6: Received read request: A = 0x8 @ 2720 ns +initiator3: Send read request: A = 0x20000018 @ 2720 ns +initiator5: Received ok response: D = 0x4 @ 2795 ns +target2: Received read request: A = 0x10 @ 2795 ns +initiator3: Received ok response: D = 0x5 @ 2830 ns +Sync'ing... +initiator6: Received ok response: D = 0x2 @ 2830 ns (2830 ns + 0 s) +initiator6: Send read request: A = 0x5000000c @ 2830 ns (2830 ns + 0 s) +target1: Received read request: A = 0x10 @ 2895 ns +initiator2: Received ok response: D = 0x4 @ 2895 ns +initiator2: Send read request: A = 0x10000014 @ 2895 ns +target4: Received read request: A = 0x14 @ 2995 ns +initiator1: Received ok response: D = 0x4 @ 2995 ns +initiator1: Send read request: A = 0x14 @ 2995 ns +target7: Received read request: A = 0xc @ 3020 ns +initiator4: Send read request: A = 0x30000018 @ 3020 ns +target5: Received read request: A = 0x14 @ 3120 ns +initiator4: Received ok response: D = 0x5 @ 3120 ns +Sync'ing... +initiator7: Received ok response: D = 0x3 @ 3120 ns (3120 ns + 0 s) +initiator7: Send read request: A = 0x60000010 @ 3120 ns (3120 ns + 0 s) +target3: Received read request: A = 0x18 @ 3145 ns +initiator5: Send read request: A = 0x40000018 @ 3145 ns +target6: Received read request: A = 0xc @ 3170 ns +initiator3: Send read request: A = 0x2000001c @ 3170 ns +initiator5: Received ok response: D = 0x5 @ 3245 ns +target2: Received read request: A = 0x14 @ 3245 ns +initiator3: Received ok response: D = 0x6 @ 3280 ns +Sync'ing... +initiator6: Received ok response: D = 0x3 @ 3280 ns (3280 ns + 0 s) +initiator6: Send read request: A = 0x50000010 @ 3280 ns (3280 ns + 0 s) +target1: Received read request: A = 0x14 @ 3345 ns +initiator2: Received ok response: D = 0x5 @ 3345 ns +initiator2: Send read request: A = 0x10000018 @ 3345 ns +target4: Received read request: A = 0x18 @ 3445 ns +initiator1: Received ok response: D = 0x5 @ 3445 ns +initiator1: Send read request: A = 0x18 @ 3445 ns +target7: Received read request: A = 0x10 @ 3470 ns +initiator4: Send read request: A = 0x3000001c @ 3470 ns +target5: Received read request: A = 0x18 @ 3570 ns +initiator4: Received ok response: D = 0x6 @ 3570 ns +Sync'ing... +initiator7: Received ok response: D = 0x4 @ 3570 ns (3570 ns + 0 s) +initiator7: Send read request: A = 0x60000014 @ 3570 ns (3570 ns + 0 s) +target3: Received read request: A = 0x1c @ 3595 ns +initiator5: Send read request: A = 0x4000001c @ 3595 ns +target6: Received read request: A = 0x10 @ 3620 ns +initiator3: Send read request: A = 0x20000020 @ 3620 ns +initiator5: Received ok response: D = 0x6 @ 3695 ns +target2: Received read request: A = 0x18 @ 3695 ns +initiator3: Received ok response: D = 0x7 @ 3730 ns +Sync'ing... +initiator6: Received ok response: D = 0x4 @ 3730 ns (3730 ns + 0 s) +initiator6: Send read request: A = 0x50000014 @ 3730 ns (3730 ns + 0 s) +target1: Received read request: A = 0x18 @ 3795 ns +initiator2: Received ok response: D = 0x6 @ 3795 ns +initiator2: Send read request: A = 0x1000001c @ 3795 ns +target4: Received read request: A = 0x1c @ 3895 ns +initiator1: Received ok response: D = 0x6 @ 3895 ns +initiator1: Send read request: A = 0x1c @ 3895 ns +target7: Received read request: A = 0x14 @ 3920 ns +initiator4: Send read request: A = 0x30000020 @ 3920 ns +target5: Received read request: A = 0x1c @ 4020 ns +initiator4: Received ok response: D = 0x7 @ 4020 ns +Sync'ing... +initiator7: Received ok response: D = 0x5 @ 4020 ns (4020 ns + 0 s) +initiator7: Send read request: A = 0x60000018 @ 4020 ns (4020 ns + 0 s) +target3: Received read request: A = 0x20 @ 4045 ns +initiator5: Send read request: A = 0x40000020 @ 4045 ns +target6: Received read request: A = 0x14 @ 4070 ns +initiator3: Send read request: A = 0x20000024 @ 4070 ns +initiator5: Received ok response: D = 0x7 @ 4145 ns +target2: Received read request: A = 0x1c @ 4145 ns +initiator3: Received ok response: D = 0x8 @ 4180 ns +Sync'ing... +initiator6: Received ok response: D = 0x5 @ 4180 ns (4180 ns + 0 s) +initiator6: Send read request: A = 0x50000018 @ 4180 ns (4180 ns + 0 s) +target1: Received read request: A = 0x1c @ 4245 ns +initiator2: Received ok response: D = 0x7 @ 4245 ns +initiator2: Send read request: A = 0x10000020 @ 4245 ns +target4: Received read request: A = 0x20 @ 4345 ns +initiator1: Received ok response: D = 0x7 @ 4345 ns +initiator1: Send read request: A = 0x20 @ 4345 ns +target7: Received read request: A = 0x18 @ 4370 ns +initiator4: Send read request: A = 0x30000024 @ 4370 ns +target5: Received read request: A = 0x20 @ 4470 ns +initiator4: Received ok response: D = 0x8 @ 4470 ns +initiator7: Received ok response: D = 0x6 @ 4470 ns (4470 ns + 0 s) +initiator7: Send read request: A = 0x6000001c @ 4470 ns (4470 ns + 0 s) +target3: Received read request: A = 0x24 @ 4495 ns +initiator5: Send read request: A = 0x40000024 @ 4495 ns +target6: Received read request: A = 0x18 @ 4520 ns +initiator5: Received ok response: D = 0x8 @ 4595 ns +target2: Received read request: A = 0x20 @ 4595 ns +initiator3: Received ok response: D = 0x9 @ 4630 ns +Sync'ing... +initiator6: Received ok response: D = 0x6 @ 4630 ns (4630 ns + 0 s) +initiator6: Send read request: A = 0x5000001c @ 4630 ns (4630 ns + 0 s) +target1: Received read request: A = 0x20 @ 4695 ns +initiator2: Received ok response: D = 0x8 @ 4695 ns +initiator2: Send read request: A = 0x10000024 @ 4695 ns +target4: Received read request: A = 0x24 @ 4795 ns +initiator1: Received ok response: D = 0x8 @ 4795 ns +initiator1: Send read request: A = 0x24 @ 4795 ns +target7: Received read request: A = 0x1c @ 4820 ns +target5: Received read request: A = 0x24 @ 4920 ns +initiator4: Received ok response: D = 0x9 @ 4920 ns +Sync'ing... +initiator7: Received ok response: D = 0x7 @ 4920 ns (4920 ns + 0 s) +initiator7: Send read request: A = 0x60000020 @ 4920 ns (4920 ns + 0 s) +target6: Received read request: A = 0x1c @ 4945 ns +initiator5: Received ok response: D = 0x9 @ 5045 ns +target2: Received read request: A = 0x24 @ 5045 ns +Sync'ing... +initiator6: Received ok response: D = 0x7 @ 5055 ns (5055 ns + 0 s) +initiator6: Send read request: A = 0x50000020 @ 5055 ns (5055 ns + 0 s) +target1: Received read request: A = 0x24 @ 5145 ns +initiator2: Received ok response: D = 0x9 @ 5145 ns +target7: Received read request: A = 0x20 @ 5245 ns +initiator1: Received ok response: D = 0x9 @ 5245 ns +target6: Received read request: A = 0x20 @ 5345 ns +Sync'ing... +initiator7: Received ok response: D = 0x8 @ 5345 ns (5345 ns + 0 s) +initiator7: Send read request: A = 0x60000024 @ 5345 ns (5345 ns + 0 s) +target7: Received read request: A = 0x24 @ 5445 ns +initiator6: Received ok response: D = 0x8 @ 5445 ns (5445 ns + 0 s) +initiator6: Send read request: A = 0x50000024 @ 5445 ns (5445 ns + 0 s) +target6: Received read request: A = 0x24 @ 5545 ns +Sync'ing... +initiator7: Received ok response: D = 0x9 @ 5545 ns (5545 ns + 0 s) +Sync'ing... +initiator6: Received ok response: D = 0x9 @ 5645 ns (5645 ns + 0 s) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/tlm/bus_dmi/bus_dmi.cpp b/src/systemc/tests/tlm/bus_dmi/bus_dmi.cpp new file mode 100644 index 000000000..20ff68577 --- /dev/null +++ b/src/systemc/tests/tlm/bus_dmi/bus_dmi.cpp @@ -0,0 +1,80 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "tlm.h" + +#include "SimpleLTInitiator1_DMI.h" +#include "SimpleLTTarget1.h" +#include "SimpleLTInitiator2_DMI.h" +#include "SimpleLTTarget2.h" +#include "SimpleLTInitiator3_DMI.h" +#include "SimpleATInitiator1.h" +#include "SimpleATTarget1.h" +#include "SimpleATInitiator2.h" +#include "SimpleATTarget2.h" +#include "CoreDecouplingLTInitiator.h" +#include "ExplicitLTTarget.h" +#include "ExplicitATTarget.h" +#include "SimpleBusLT.h" + +int sc_main(int argc, char* argv[]) +{ + SimpleLTInitiator1_dmi initiator1("initiator1", 10, 0x00000000); + SimpleLTTarget1 target1("target1"); + + SimpleLTInitiator2_dmi initiator2("initiator2", 10, 0x10000000); + SimpleLTTarget2 target2("target2"); + + SimpleLTInitiator3_dmi initiator3("initiator3", 10, 0x20000000); + SimpleLTTarget2 target3("target3"); + + SimpleATInitiator1 initiator4("initiator4", 10, 0x30000000); + SimpleATTarget1 target4("target4"); + + SimpleATInitiator2 initiator5("initiator5", 10, 0x40000000); + SimpleATTarget2 target5("target5"); + + CoreDecouplingLTInitiator initiator6("initiator6", 10, 0x50000000); + ExplicitLTTarget target6("target6"); + + CoreDecouplingLTInitiator initiator7("initiator7", 10, 0x60000000); + ExplicitATTarget target7("target7"); + + SimpleBusLT<7, 7> bus("bus"); + + initiator1.socket(bus.target_socket[0]); + initiator2.socket(bus.target_socket[1]); + initiator3.socket(bus.target_socket[2]); + initiator4.socket(bus.target_socket[3]); + initiator5.socket(bus.target_socket[4]); + initiator6.socket(bus.target_socket[5]); + initiator7.socket(bus.target_socket[6]); + bus.initiator_socket[0](target1.socket); + bus.initiator_socket[1](target2.socket); + bus.initiator_socket[2](target3.socket); + bus.initiator_socket[3](target4.socket); + bus.initiator_socket[4](target5.socket); + bus.initiator_socket[5](target6.socket); + bus.initiator_socket[6](target7.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/bus_dmi/golden/bus_dmi.log b/src/systemc/tests/tlm/bus_dmi/golden/bus_dmi.log new file mode 100644 index 000000000..2e653101e --- /dev/null +++ b/src/systemc/tests/tlm/bus_dmi/golden/bus_dmi.log @@ -0,0 +1,381 @@ +SystemC Simulation +initiator1: Send write request: A = 0x0, D = 0x0 @ 0 s +target1: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator2: Send write request: A = 0x10000000, D = 0x0 @ 0 s +initiator3: Send write request: A = 0x20000000, D = 0x0 @ 0 s +initiator4: Send write request: A = 0x30000000, D = 0x0 @ 0 s +initiator5: Send write request: A = 0x40000000, D = 0x0 @ 0 s +initiator6: Send write request: A = 0x50000000, D = 0x0 @ 0 s (0 s + 0 s) +target6: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator7: Send write request: A = 0x60000000, D = 0x0 @ 0 s (0 s + 0 s) +target7: Received write request: A = 0x0, D = 0x0 @ 0 s +target4: Received write request: A = 0x0, D = 0x0 @ 0 s +target5: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator1: Received ok response @ 10 ns +initiator1: Send write request: A = 0x4, D = 0x1 @ 10 ns +initiator2: Received ok response @ 10 ns +initiator2: Send write request: A = 0x10000004, D = 0x1 @ 10 ns +initiator3: Received ok response @ 10 ns +initiator3: Send write request: A = 0x20000004, D = 0x1 @ 10 ns +initiator1: Received ok response @ 20 ns +initiator1: Send write request: A = 0x8, D = 0x2 @ 20 ns +initiator3: Received ok response @ 20 ns +initiator3: Send write request: A = 0x20000008, D = 0x2 @ 20 ns +initiator2: Received ok response @ 20 ns +initiator2: Send write request: A = 0x10000008, D = 0x2 @ 20 ns +initiator3: Received ok response @ 30 ns +initiator3: Send write request: A = 0x2000000c, D = 0x3 @ 30 ns +initiator2: Received ok response @ 30 ns +initiator2: Send write request: A = 0x1000000c, D = 0x3 @ 30 ns +initiator1: Received ok response @ 30 ns +initiator1: Send write request: A = 0xc, D = 0x3 @ 30 ns +initiator3: Received ok response @ 40 ns +initiator3: Send write request: A = 0x20000010, D = 0x4 @ 40 ns +initiator1: Received ok response @ 40 ns +initiator1: Send write request: A = 0x10, D = 0x4 @ 40 ns +initiator2: Received ok response @ 40 ns +initiator2: Send write request: A = 0x10000010, D = 0x4 @ 40 ns +initiator6: Received ok response @ 50 ns (50 ns + 0 s) +initiator6: Send write request: A = 0x50000004, D = 0x1 @ 50 ns (50 ns + 0 s) +target6: Received write request: A = 0x4, D = 0x1 @ 50 ns +initiator2: Received ok response @ 50 ns +initiator2: Send write request: A = 0x10000014, D = 0x5 @ 50 ns +initiator3: Received ok response @ 50 ns +initiator3: Send write request: A = 0x20000014, D = 0x5 @ 50 ns +initiator1: Received ok response @ 50 ns +initiator1: Send write request: A = 0x14, D = 0x5 @ 50 ns +initiator7: Received ok response @ 50 ns (50 ns + 0 s) +initiator7: Send write request: A = 0x60000004, D = 0x1 @ 50 ns (50 ns + 0 s) +target7: Received write request: A = 0x4, D = 0x1 @ 50 ns +initiator2: Received ok response @ 60 ns +initiator2: Send write request: A = 0x10000018, D = 0x6 @ 60 ns +initiator3: Received ok response @ 60 ns +initiator3: Send write request: A = 0x20000018, D = 0x6 @ 60 ns +initiator1: Received ok response @ 60 ns +initiator1: Send write request: A = 0x18, D = 0x6 @ 60 ns +initiator2: Received ok response @ 70 ns +initiator2: Send write request: A = 0x1000001c, D = 0x7 @ 70 ns +initiator1: Received ok response @ 70 ns +initiator1: Send write request: A = 0x1c, D = 0x7 @ 70 ns +initiator3: Received ok response @ 70 ns +initiator3: Send write request: A = 0x2000001c, D = 0x7 @ 70 ns +initiator2: Received ok response @ 80 ns +initiator2: Send write request: A = 0x10000020, D = 0x8 @ 80 ns +initiator3: Received ok response @ 80 ns +initiator3: Send write request: A = 0x20000020, D = 0x8 @ 80 ns +initiator1: Received ok response @ 80 ns +initiator1: Send write request: A = 0x20, D = 0x8 @ 80 ns +initiator2: Received ok response @ 90 ns +initiator2: Send write request: A = 0x10000024, D = 0x9 @ 90 ns +initiator1: Received ok response @ 90 ns +initiator1: Send write request: A = 0x24, D = 0x9 @ 90 ns +initiator3: Received ok response @ 90 ns +initiator3: Send write request: A = 0x20000024, D = 0x9 @ 90 ns +initiator3: Received ok response @ 100 ns +initiator3: Send read request: A = 0x20000000 @ 100 ns +initiator6: Received ok response @ 100 ns (100 ns + 0 s) +initiator6: Send write request: A = 0x50000008, D = 0x2 @ 100 ns (100 ns + 0 s) +target6: Received write request: A = 0x8, D = 0x2 @ 100 ns +initiator2: Received ok response @ 100 ns +initiator2: Send read request: A = 0x10000000 @ 100 ns +initiator1: Received ok response @ 100 ns +initiator1: Send read request: A = 0x0 @ 100 ns +initiator7: Received ok response @ 100 ns (100 ns + 0 s) +initiator7: Send write request: A = 0x60000008, D = 0x2 @ 100 ns (100 ns + 0 s) +target7: Received write request: A = 0x8, D = 0x2 @ 100 ns +initiator5: Received ok response @ 125 ns +initiator4: Send write request: A = 0x30000004, D = 0x1 @ 125 ns +initiator5: Send write request: A = 0x40000004, D = 0x1 @ 125 ns +target4: Received write request: A = 0x4, D = 0x1 @ 125 ns +target5: Received write request: A = 0x4, D = 0x1 @ 125 ns +initiator4: Received ok response @ 135 ns +initiator6: Received ok response @ 150 ns (150 ns + 0 s) +initiator6: Send write request: A = 0x5000000c, D = 0x3 @ 150 ns (150 ns + 0 s) +target6: Received write request: A = 0xc, D = 0x3 @ 150 ns +initiator7: Received ok response @ 150 ns (150 ns + 0 s) +initiator7: Send write request: A = 0x6000000c, D = 0x3 @ 150 ns (150 ns + 0 s) +target7: Received write request: A = 0xc, D = 0x3 @ 150 ns +initiator2: Received ok response: D = 0x0 @ 200 ns +initiator2: Send read request: A = 0x10000004 @ 200 ns +initiator3: Received ok response: D = 0x0 @ 200 ns +initiator3: Send read request: A = 0x20000004 @ 200 ns +initiator1: Received ok response: D = 0x0 @ 200 ns +initiator1: Send read request: A = 0x4 @ 200 ns +initiator6: Received ok response @ 200 ns (200 ns + 0 s) +initiator6: Send write request: A = 0x50000010, D = 0x4 @ 200 ns (200 ns + 0 s) +target6: Received write request: A = 0x10, D = 0x4 @ 200 ns +initiator7: Received ok response @ 200 ns (200 ns + 0 s) +initiator7: Send write request: A = 0x60000010, D = 0x4 @ 200 ns (200 ns + 0 s) +target7: Received write request: A = 0x10, D = 0x4 @ 200 ns +initiator6: Received ok response @ 250 ns (250 ns + 0 s) +initiator6: Send write request: A = 0x50000014, D = 0x5 @ 250 ns (250 ns + 0 s) +target6: Received write request: A = 0x14, D = 0x5 @ 250 ns +initiator7: Received ok response @ 250 ns (250 ns + 0 s) +initiator7: Send write request: A = 0x60000014, D = 0x5 @ 250 ns (250 ns + 0 s) +initiator5: Received ok response @ 250 ns +target7: Received write request: A = 0x14, D = 0x5 @ 250 ns +initiator4: Send write request: A = 0x30000008, D = 0x2 @ 250 ns +initiator5: Send write request: A = 0x40000008, D = 0x2 @ 250 ns +target4: Received write request: A = 0x8, D = 0x2 @ 250 ns +target5: Received write request: A = 0x8, D = 0x2 @ 250 ns +initiator4: Received ok response @ 260 ns +initiator1: Received ok response: D = 0x1 @ 300 ns +initiator1: Send read request: A = 0x8 @ 300 ns +initiator6: Received ok response @ 300 ns (300 ns + 0 s) +initiator6: Send write request: A = 0x50000018, D = 0x6 @ 300 ns (300 ns + 0 s) +target6: Received write request: A = 0x18, D = 0x6 @ 300 ns +initiator3: Received ok response: D = 0x1 @ 300 ns +initiator3: Send read request: A = 0x20000008 @ 300 ns +initiator2: Received ok response: D = 0x1 @ 300 ns +initiator2: Send read request: A = 0x10000008 @ 300 ns +initiator7: Received ok response @ 300 ns (300 ns + 0 s) +initiator7: Send write request: A = 0x60000018, D = 0x6 @ 300 ns (300 ns + 0 s) +target7: Received write request: A = 0x18, D = 0x6 @ 300 ns +initiator6: Received ok response @ 350 ns (350 ns + 0 s) +initiator6: Send write request: A = 0x5000001c, D = 0x7 @ 350 ns (350 ns + 0 s) +target6: Received write request: A = 0x1c, D = 0x7 @ 350 ns +initiator7: Received ok response @ 350 ns (350 ns + 0 s) +initiator7: Send write request: A = 0x6000001c, D = 0x7 @ 350 ns (350 ns + 0 s) +target7: Received write request: A = 0x1c, D = 0x7 @ 350 ns +initiator5: Received ok response @ 375 ns +initiator5: Send write request: A = 0x4000000c, D = 0x3 @ 375 ns +initiator4: Send write request: A = 0x3000000c, D = 0x3 @ 375 ns +target5: Received write request: A = 0xc, D = 0x3 @ 375 ns +target4: Received write request: A = 0xc, D = 0x3 @ 375 ns +initiator4: Received ok response @ 385 ns +initiator1: Received ok response: D = 0x2 @ 400 ns +initiator1: Send read request: A = 0xc @ 400 ns +initiator3: Received ok response: D = 0x2 @ 400 ns +initiator3: Send read request: A = 0x2000000c @ 400 ns +initiator2: Received ok response: D = 0x2 @ 400 ns +initiator2: Send read request: A = 0x1000000c @ 400 ns +initiator6: Received ok response @ 400 ns (400 ns + 0 s) +initiator6: Send write request: A = 0x50000020, D = 0x8 @ 400 ns (400 ns + 0 s) +target6: Received write request: A = 0x20, D = 0x8 @ 400 ns +initiator7: Received ok response @ 400 ns (400 ns + 0 s) +initiator7: Send write request: A = 0x60000020, D = 0x8 @ 400 ns (400 ns + 0 s) +target7: Received write request: A = 0x20, D = 0x8 @ 400 ns +initiator6: Received ok response @ 450 ns (450 ns + 0 s) +initiator6: Send write request: A = 0x50000024, D = 0x9 @ 450 ns (450 ns + 0 s) +target6: Received write request: A = 0x24, D = 0x9 @ 450 ns +initiator7: Received ok response @ 450 ns (450 ns + 0 s) +initiator7: Send write request: A = 0x60000024, D = 0x9 @ 450 ns (450 ns + 0 s) +target7: Received write request: A = 0x24, D = 0x9 @ 450 ns +initiator1: Received ok response: D = 0x3 @ 500 ns +initiator1: Send read request: A = 0x10 @ 500 ns +Sync'ing... +initiator2: Received ok response: D = 0x3 @ 500 ns +initiator2: Send read request: A = 0x10000010 @ 500 ns +initiator3: Received ok response: D = 0x3 @ 500 ns +initiator3: Send read request: A = 0x20000010 @ 500 ns +initiator6: Received ok response @ 500 ns (500 ns + 0 s) +initiator6: Send read request: A = 0x50000000 @ 500 ns (500 ns + 0 s) +target6: Received read request: A = 0x0 @ 500 ns +initiator6: Received ok response: D = 0x0 @ 600 ns (500 ns + 100 ns) +initiator6: Send read request: A = 0x50000004 @ 600 ns (500 ns + 100 ns) +target6: Received read request: A = 0x4 @ 500 ns +initiator6: Received ok response: D = 0x1 @ 700 ns (500 ns + 200 ns) +initiator6: Send read request: A = 0x50000008 @ 700 ns (500 ns + 200 ns) +target6: Received read request: A = 0x8 @ 500 ns +initiator6: Received ok response: D = 0x2 @ 800 ns (500 ns + 300 ns) +initiator6: Send read request: A = 0x5000000c @ 800 ns (500 ns + 300 ns) +target6: Received read request: A = 0xc @ 500 ns +initiator6: Received ok response: D = 0x3 @ 900 ns (500 ns + 400 ns) +initiator6: Send read request: A = 0x50000010 @ 900 ns (500 ns + 400 ns) +target6: Received read request: A = 0x10 @ 500 ns +Sync'ing... +Sync'ing... +initiator5: Received ok response @ 500 ns +initiator7: Received ok response @ 500 ns (500 ns + 0 s) +initiator7: Send read request: A = 0x60000000 @ 500 ns (500 ns + 0 s) +target7: Received read request: A = 0x0 @ 500 ns +initiator4: Send write request: A = 0x30000010, D = 0x4 @ 500 ns +initiator5: Send write request: A = 0x40000010, D = 0x4 @ 500 ns +target4: Received write request: A = 0x10, D = 0x4 @ 500 ns +target5: Received write request: A = 0x10, D = 0x4 @ 500 ns +initiator4: Received ok response @ 510 ns +initiator3: Received ok response: D = 0x4 @ 600 ns +initiator3: Send read request: A = 0x20000014 @ 600 ns +initiator1: Received ok response: D = 0x4 @ 600 ns +initiator1: Send read request: A = 0x14 @ 600 ns +initiator2: Received ok response: D = 0x4 @ 600 ns +initiator2: Send read request: A = 0x10000014 @ 600 ns +initiator7: Received ok response: D = 0x0 @ 600 ns (600 ns + 0 s) +initiator7: Send read request: A = 0x60000004 @ 600 ns (600 ns + 0 s) +target7: Received read request: A = 0x4 @ 600 ns +initiator5: Received ok response @ 625 ns +initiator4: Send write request: A = 0x30000014, D = 0x5 @ 625 ns +initiator5: Send write request: A = 0x40000014, D = 0x5 @ 625 ns +target4: Received write request: A = 0x14, D = 0x5 @ 625 ns +target5: Received write request: A = 0x14, D = 0x5 @ 625 ns +initiator4: Received ok response @ 635 ns +initiator2: Received ok response: D = 0x5 @ 700 ns +initiator2: Send read request: A = 0x10000018 @ 700 ns +initiator3: Received ok response: D = 0x5 @ 700 ns +initiator3: Send read request: A = 0x20000018 @ 700 ns +initiator1: Received ok response: D = 0x5 @ 700 ns +initiator1: Send read request: A = 0x18 @ 700 ns +initiator7: Received ok response: D = 0x1 @ 700 ns (700 ns + 0 s) +initiator7: Send read request: A = 0x60000008 @ 700 ns (700 ns + 0 s) +target7: Received read request: A = 0x8 @ 700 ns +initiator5: Received ok response @ 750 ns +initiator4: Send write request: A = 0x30000018, D = 0x6 @ 750 ns +initiator5: Send write request: A = 0x40000018, D = 0x6 @ 750 ns +target4: Received write request: A = 0x18, D = 0x6 @ 750 ns +target5: Received write request: A = 0x18, D = 0x6 @ 750 ns +initiator4: Received ok response @ 760 ns +initiator1: Received ok response: D = 0x6 @ 800 ns +initiator1: Send read request: A = 0x1c @ 800 ns +initiator2: Received ok response: D = 0x6 @ 800 ns +initiator2: Send read request: A = 0x1000001c @ 800 ns +initiator3: Received ok response: D = 0x6 @ 800 ns +initiator3: Send read request: A = 0x2000001c @ 800 ns +initiator7: Received ok response: D = 0x2 @ 800 ns (800 ns + 0 s) +initiator7: Send read request: A = 0x6000000c @ 800 ns (800 ns + 0 s) +target7: Received read request: A = 0xc @ 800 ns +initiator5: Received ok response @ 875 ns +initiator4: Send write request: A = 0x3000001c, D = 0x7 @ 875 ns +initiator5: Send write request: A = 0x4000001c, D = 0x7 @ 875 ns +target4: Received write request: A = 0x1c, D = 0x7 @ 875 ns +target5: Received write request: A = 0x1c, D = 0x7 @ 875 ns +initiator4: Received ok response @ 885 ns +initiator1: Received ok response: D = 0x7 @ 900 ns +initiator1: Send read request: A = 0x20 @ 900 ns +initiator7: Received ok response: D = 0x3 @ 900 ns (900 ns + 0 s) +initiator7: Send read request: A = 0x60000010 @ 900 ns (900 ns + 0 s) +initiator2: Received ok response: D = 0x7 @ 900 ns +initiator2: Send read request: A = 0x10000020 @ 900 ns +initiator3: Received ok response: D = 0x7 @ 900 ns +initiator3: Send read request: A = 0x20000020 @ 900 ns +target7: Received read request: A = 0x10 @ 900 ns +initiator6: Received ok response: D = 0x4 @ 1 us (1 us + 0 s) +initiator6: Send read request: A = 0x50000014 @ 1 us (1 us + 0 s) +target6: Received read request: A = 0x14 @ 1 us +initiator6: Received ok response: D = 0x5 @ 1100 ns (1 us + 100 ns) +initiator6: Send read request: A = 0x50000018 @ 1100 ns (1 us + 100 ns) +target6: Received read request: A = 0x18 @ 1 us +initiator6: Received ok response: D = 0x6 @ 1200 ns (1 us + 200 ns) +initiator6: Send read request: A = 0x5000001c @ 1200 ns (1 us + 200 ns) +target6: Received read request: A = 0x1c @ 1 us +initiator6: Received ok response: D = 0x7 @ 1300 ns (1 us + 300 ns) +initiator6: Send read request: A = 0x50000020 @ 1300 ns (1 us + 300 ns) +target6: Received read request: A = 0x20 @ 1 us +initiator6: Received ok response: D = 0x8 @ 1400 ns (1 us + 400 ns) +initiator6: Send read request: A = 0x50000024 @ 1400 ns (1 us + 400 ns) +target6: Received read request: A = 0x24 @ 1 us +Sync'ing... +Sync'ing... +initiator3: Received ok response: D = 0x8 @ 1 us +initiator3: Send read request: A = 0x20000024 @ 1 us +initiator2: Received ok response: D = 0x8 @ 1 us +initiator2: Send read request: A = 0x10000024 @ 1 us +initiator1: Received ok response: D = 0x8 @ 1 us +initiator1: Send read request: A = 0x24 @ 1 us +initiator7: Received ok response: D = 0x4 @ 1 us (1 us + 0 s) +initiator7: Send read request: A = 0x60000014 @ 1 us (1 us + 0 s) +initiator5: Received ok response @ 1 us +target7: Received read request: A = 0x14 @ 1 us +initiator5: Send write request: A = 0x40000020, D = 0x8 @ 1 us +initiator4: Send write request: A = 0x30000020, D = 0x8 @ 1 us +target5: Received write request: A = 0x20, D = 0x8 @ 1 us +target4: Received write request: A = 0x20, D = 0x8 @ 1 us +initiator4: Received ok response @ 1010 ns +initiator3: Received ok response: D = 0x9 @ 1100 ns +initiator1: Received ok response: D = 0x9 @ 1100 ns +initiator7: Received ok response: D = 0x5 @ 1100 ns (1100 ns + 0 s) +initiator7: Send read request: A = 0x60000018 @ 1100 ns (1100 ns + 0 s) +initiator2: Received ok response: D = 0x9 @ 1100 ns +target7: Received read request: A = 0x18 @ 1100 ns +initiator5: Received ok response @ 1125 ns +initiator5: Send write request: A = 0x40000024, D = 0x9 @ 1125 ns +initiator4: Send write request: A = 0x30000024, D = 0x9 @ 1125 ns +target5: Received write request: A = 0x24, D = 0x9 @ 1125 ns +target4: Received write request: A = 0x24, D = 0x9 @ 1125 ns +initiator4: Received ok response @ 1135 ns +initiator7: Received ok response: D = 0x6 @ 1200 ns (1200 ns + 0 s) +initiator7: Send read request: A = 0x6000001c @ 1200 ns (1200 ns + 0 s) +target7: Received read request: A = 0x1c @ 1200 ns +initiator5: Received ok response @ 1250 ns +initiator5: Send read request: A = 0x40000000 @ 1250 ns +initiator4: Send read request: A = 0x30000000 @ 1250 ns +target5: Received read request: A = 0x0 @ 1250 ns +target4: Received read request: A = 0x0 @ 1250 ns +initiator4: Received ok response @ 1260 ns +initiator7: Received ok response: D = 0x7 @ 1300 ns (1300 ns + 0 s) +initiator7: Send read request: A = 0x60000020 @ 1300 ns (1300 ns + 0 s) +target7: Received read request: A = 0x20 @ 1300 ns +initiator5: Received ok response: D = 0x0 @ 1375 ns +initiator5: Send read request: A = 0x40000004 @ 1375 ns +initiator4: Send read request: A = 0x30000004 @ 1375 ns +target5: Received read request: A = 0x4 @ 1375 ns +target4: Received read request: A = 0x4 @ 1375 ns +initiator4: Received ok response: D = 0x0 @ 1385 ns +initiator7: Received ok response: D = 0x8 @ 1400 ns (1400 ns + 0 s) +initiator7: Send read request: A = 0x60000024 @ 1400 ns (1400 ns + 0 s) +target7: Received read request: A = 0x24 @ 1400 ns +Sync'ing... +initiator6: Received ok response: D = 0x9 @ 1500 ns (1500 ns + 0 s) +initiator7: Received ok response: D = 0x9 @ 1500 ns (1500 ns + 0 s) +initiator5: Received ok response: D = 0x1 @ 1500 ns +initiator4: Send read request: A = 0x30000008 @ 1500 ns +initiator5: Send read request: A = 0x40000008 @ 1500 ns +target4: Received read request: A = 0x8 @ 1500 ns +target5: Received read request: A = 0x8 @ 1500 ns +initiator4: Received ok response: D = 0x1 @ 1510 ns +initiator5: Received ok response: D = 0x2 @ 1625 ns +initiator4: Send read request: A = 0x3000000c @ 1625 ns +initiator5: Send read request: A = 0x4000000c @ 1625 ns +target4: Received read request: A = 0xc @ 1625 ns +target5: Received read request: A = 0xc @ 1625 ns +initiator4: Received ok response: D = 0x2 @ 1635 ns +initiator5: Received ok response: D = 0x3 @ 1750 ns +initiator4: Send read request: A = 0x30000010 @ 1750 ns +initiator5: Send read request: A = 0x40000010 @ 1750 ns +target4: Received read request: A = 0x10 @ 1750 ns +target5: Received read request: A = 0x10 @ 1750 ns +initiator4: Received ok response: D = 0x3 @ 1760 ns +initiator5: Received ok response: D = 0x4 @ 1875 ns +initiator4: Send read request: A = 0x30000014 @ 1875 ns +initiator5: Send read request: A = 0x40000014 @ 1875 ns +target4: Received read request: A = 0x14 @ 1875 ns +target5: Received read request: A = 0x14 @ 1875 ns +initiator4: Received ok response: D = 0x4 @ 1885 ns +initiator5: Received ok response: D = 0x5 @ 2 us +initiator4: Send read request: A = 0x30000018 @ 2 us +initiator5: Send read request: A = 0x40000018 @ 2 us +target4: Received read request: A = 0x18 @ 2 us +target5: Received read request: A = 0x18 @ 2 us +initiator4: Received ok response: D = 0x5 @ 2010 ns +initiator5: Received ok response: D = 0x6 @ 2125 ns +initiator4: Send read request: A = 0x3000001c @ 2125 ns +initiator5: Send read request: A = 0x4000001c @ 2125 ns +target4: Received read request: A = 0x1c @ 2125 ns +target5: Received read request: A = 0x1c @ 2125 ns +initiator4: Received ok response: D = 0x6 @ 2135 ns +initiator5: Received ok response: D = 0x7 @ 2250 ns +initiator4: Send read request: A = 0x30000020 @ 2250 ns +initiator5: Send read request: A = 0x40000020 @ 2250 ns +target4: Received read request: A = 0x20 @ 2250 ns +target5: Received read request: A = 0x20 @ 2250 ns +initiator4: Received ok response: D = 0x7 @ 2260 ns +initiator5: Received ok response: D = 0x8 @ 2375 ns +initiator4: Send read request: A = 0x30000024 @ 2375 ns +initiator5: Send read request: A = 0x40000024 @ 2375 ns +target4: Received read request: A = 0x24 @ 2375 ns +target5: Received read request: A = 0x24 @ 2375 ns +initiator4: Received ok response: D = 0x8 @ 2385 ns +initiator5: Received ok response: D = 0x9 @ 2500 ns +initiator4: Received ok response: D = 0x9 @ 2510 ns + +Info: /OSCI/SystemC: Simulation stopped by user. +initiator1, <>: + +Mem @0 +00 00 00 00 01 00 00 00 02 00 00 00 03 00 00 00 +04 00 00 00 05 00 00 00 06 00 00 00 07 00 00 00 + +initiator2, <>: + +Mem @10000000 +OK: debug transaction didn't give data. + diff --git a/src/systemc/tests/tlm/cancel_all/cancel_all.cpp b/src/systemc/tests/tlm/cancel_all/cancel_all.cpp new file mode 100644 index 000000000..df97d8962 --- /dev/null +++ b/src/systemc/tests/tlm/cancel_all/cancel_all.cpp @@ -0,0 +1,164 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "systemc" +using namespace sc_core; +using namespace sc_dt; +using namespace std; + +#include "tlm.h" +#include "tlm_utils/peq_with_cb_and_phase.h" +#include "tlm_utils/peq_with_get.h" + + +SC_MODULE(Test_peq_with_cb) +{ + + SC_CTOR(Test_peq_with_cb) + : m_peq(this, &Test_peq_with_cb::peq_cb), flag1(true), flag2(true) + { + SC_THREAD(thread); + } + + void thread() + { + section = 1; + + tlm::tlm_generic_payload *trans; + tlm::tlm_phase phase; + for (int i = 0; i < 50; i++) + { + trans = new tlm::tlm_generic_payload; + trans->set_address(i); + m_peq.notify( *trans, phase, sc_time(rand() % 100, SC_NS) ); + } + wait(50, SC_NS); + + m_peq.cancel_all(); + cout << "cancel_all\n"; + section = 2; + + for (int i = 100; i < 150; i++) + { + trans = new tlm::tlm_generic_payload; + trans->set_address(i); + m_peq.notify( *trans, phase, sc_time(rand() % 100, SC_NS) ); + } + wait(50, SC_NS); + m_peq.cancel_all(); + cout << "cancel_all\n"; + + wait(50, SC_NS); + } + + void peq_cb(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase) + { + sc_time t = sc_time_stamp(); + sc_dt::uint64 adr = trans.get_address(); + sc_assert( section == 1 || section == 2 ); + if (section == 1) + { + if (flag1) cout << "Called peq_cb with section = " << section << "\n"; + flag1 = false; + sc_assert( t >= sc_time(0, SC_NS) && t <= sc_time(50, SC_NS) ); + sc_assert( adr >= 0 && adr < 50); + } + else if (section == 2) + { + if (flag2) cout << "Called peq_cb with section = " << section << "\n"; + flag2 = false; + sc_assert( t >= sc_time(50, SC_NS) && t <= sc_time(100, SC_NS) ); + sc_assert( adr >= 100 && adr < 150); + } + } + + int section; + tlm_utils::peq_with_cb_and_phase m_peq; + bool flag1, flag2; +}; + + +SC_MODULE(Test_peq_with_get) +{ + + SC_CTOR(Test_peq_with_get) + : m_peq("foo"), flag3(true), flag4(true) + { + SC_THREAD(thread); + SC_THREAD(ass_end_thread); + } + + void thread() + { + wait(1000, SC_NS); + + section = 3; + + tlm::tlm_generic_payload *trans; + for (int i = 0; i < 50; i++) + { + trans = new tlm::tlm_generic_payload; + trans->set_address(i); + m_peq.notify( *trans, sc_time(rand() % 100, SC_NS) ); + } + wait(50, SC_NS); + + m_peq.cancel_all(); + cout << "cancel_all\n"; + section = 4; + + for (int i = 100; i < 150; i++) + { + trans = new tlm::tlm_generic_payload; + trans->set_address(i); + m_peq.notify( *trans, sc_time(rand() % 100, SC_NS) ); + } + wait(50, SC_NS); + m_peq.cancel_all(); + cout << "cancel_all\n"; + + wait(50, SC_NS); + } + + void ass_end_thread() + { + tlm::tlm_generic_payload *trans; + for(;;) + { + wait(m_peq.get_event()); + while( (trans = m_peq.get_next_transaction()) ) + { + sc_time t = sc_time_stamp(); + sc_dt::uint64 adr = trans->get_address(); + sc_assert( section == 3 || section == 4 ); + if (section == 3) + { + if (flag3) cout << "Called get_next_transaction with section = " << section << "\n"; + flag3 = false; + sc_assert( t >= sc_time(1000, SC_NS) && t <= sc_time(1050, SC_NS) ); + sc_assert( adr >= 0 && adr < 50); + } + else if (section == 4) + { + if (flag4) cout << "Called get_next_transaction with section = " << section << "\n"; + flag4 = false; + sc_assert( t >= sc_time(1050, SC_NS) && t <= sc_time(1100, SC_NS) ); + sc_assert( adr >= 100 && adr < 150); + } + } + } + } + + int section; + tlm_utils::peq_with_get m_peq; + bool flag3, flag4; +}; + + +int sc_main(int argc, char* argv[]) +{ + cout << "Unit test for cancel_all()\n"; + Test_peq_with_cb cb("test_peq_with_cb"); + Test_peq_with_get get("test_peq_with_get"); + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/tlm/cancel_all/golden/cancel_all.log b/src/systemc/tests/tlm/cancel_all/golden/cancel_all.log new file mode 100644 index 000000000..1077270d5 --- /dev/null +++ b/src/systemc/tests/tlm/cancel_all/golden/cancel_all.log @@ -0,0 +1,10 @@ +SystemC Simulation +Unit test for cancel_all() +Called peq_cb with section = 1 +cancel_all +Called peq_cb with section = 2 +cancel_all +Called get_next_transaction with section = 3 +cancel_all +Called get_next_transaction with section = 4 +cancel_all diff --git a/src/systemc/tests/tlm/endian_conv/golden/test_endian_conv.log b/src/systemc/tests/tlm/endian_conv/golden/test_endian_conv.log new file mode 100644 index 000000000..356868498 --- /dev/null +++ b/src/systemc/tests/tlm/endian_conv/golden/test_endian_conv.log @@ -0,0 +1,1204 @@ +SystemC Simulation + +TLM-2 Endianness Conversion Helper Functions Tester +March 2008 +January 2012 Updated to read from endian_conv/input.txt + +0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 0 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 16 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 0 + +Converted Transaction + Addr = 0 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 1111111111111111, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 45670123cdef89abxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 0 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 16 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 1 + +Converted Transaction + Addr = 0 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 1111111111111111, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 45670123cdef89abxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 16 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 16 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 2 + +Converted Transaction + Addr = 16 + Len = 16 + Txn data pointer = changed + Byte enable length = 0 + Streaming width = 16 + +Memory States after Transaction + initiator = klmnghijstuvopqrxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 16 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 4 + Byte enables = x + Byte enable length = 0 + Streaming width = 16 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 0 + +Converted Transaction + Addr = 16 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 1111111111111111, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxx89ab4567ghijcdefxxxx + +4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +Pool status: +Pool status: (16,16) +Pool status: (16,16) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 16 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 4 + Byte enables = x + Byte enable length = 0 + Streaming width = 16 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 1 + +Converted Transaction + Addr = 16 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 1111111111111111, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxx89ab4567ghijcdefxxxx + +5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 0 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 16 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 2 + +Converted Transaction + Addr = 0 + Len = 16 + Txn data pointer = changed + Byte enable length = 0 + Streaming width = 16 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = 45670123cdef89abxxxxxxxxxxxxxxxxxxxx + +6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 0 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = 1111000011110000 + Byte enable length = 16 + Streaming width = 16 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 0 + +Converted Transaction + Addr = 0 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 0000111100001111, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 4567xxxxcdefxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 0 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = 1111000011110000 + Byte enable length = 16 + Streaming width = 16 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 1 + +Converted Transaction + Addr = 0 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 0000111100001111, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 4567xxxxcdefxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 16 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = 1111000011110000 + Byte enable length = 16 + Streaming width = 16 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 2 + +Converted Transaction + Addr = 16 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 0000111100001111, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = klmnxxxxstuvxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 16 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 4 + Byte enables = 1111000000001111 + Byte enable length = 16 + Streaming width = 16 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 0 + +Converted Transaction + Addr = 16 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 0000111111110000, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxxxxxx4567ghijxxxxxxxx + +3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 16 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 4 + Byte enables = 1111000000001111 + Byte enable length = 16 + Streaming width = 16 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 1 + +Converted Transaction + Addr = 16 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 0000111111110000, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxxxxxx4567ghijxxxxxxxx + +4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +Pool status: (32,32) +Pool status: (32,32) (32,32) +Pool status: (32,32) (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 0 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = 1111000000001111 + Byte enable length = 16 + Streaming width = 16 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 2 + +Converted Transaction + Addr = 0 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 0000111111110000, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxx0123cdefxxxxxxxxxxxxxxxxxxxxxxxx + +5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 20 + Len = 4 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 4 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 0 + +Converted Transaction + Addr = 16 + Len = 8 + Txn data pointer = changed + Byte enables and byte enable pointer = 11110000, changed + Byte enable length = 8 + Streaming width = 8 + +Memory States after Transaction + initiator = ghijxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 20 + Len = 4 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 4 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 1 + +Converted Transaction + Addr = 16 + Len = 4 + Txn data pointer = changed + Byte enables and byte enable pointer = 1111, changed + Byte enable length = 4 + Streaming width = 4 + +Memory States after Transaction + initiator = ghijxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 20 + Len = 4 + Bus Width = 8 + Data Word = 4 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 4 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 3 + +Converted Transaction + Addr = 16 + Len = 4 + Txn data pointer = unchanged + Byte enable length = 0 + Streaming width = 4 + +Memory States after Transaction + initiator = ghijxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 28 + Len = 4 + Bus Width = 8 + Data Word = 4 + Initiator offset = 4 + Byte enables = x + Byte enable length = 0 + Streaming width = 4 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 0 + +Converted Transaction + Addr = 24 + Len = 8 + Txn data pointer = changed + Byte enables and byte enable pointer = 11110000, changed + Byte enable length = 8 + Streaming width = 8 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxxxxxxxxxx4567xxxxxxxx + +2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 28 + Len = 4 + Bus Width = 8 + Data Word = 4 + Initiator offset = 4 + Byte enables = x + Byte enable length = 0 + Streaming width = 4 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 1 + +Converted Transaction + Addr = 24 + Len = 4 + Txn data pointer = changed + Byte enables and byte enable pointer = 1111, changed + Byte enable length = 4 + Streaming width = 4 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxxxxxxxxxx4567xxxxxxxx + +3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 28 + Len = 4 + Bus Width = 8 + Data Word = 4 + Initiator offset = 4 + Byte enables = x + Byte enable length = 0 + Streaming width = 4 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 3 + +Converted Transaction + Addr = 24 + Len = 4 + Txn data pointer = unchanged + Byte enable length = 0 + Streaming width = 4 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxxxxxxxxxx4567xxxxxxxx + +4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +Pool status: (32,32) +Pool status: (32,32) (32,32) +Pool status: (32,32) (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 21 + Len = 2 + Bus Width = 8 + Data Word = 2 + Initiator offset = 0 + Byte enables = 11 + Byte enable length = 2 + Streaming width = 2 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 0 + +Converted Transaction + Addr = 16 + Len = 8 + Txn data pointer = changed + Byte enables and byte enable pointer = 01100000, changed + Byte enable length = 8 + Streaming width = 8 + +Memory States after Transaction + initiator = hixxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 21 + Len = 2 + Bus Width = 8 + Data Word = 2 + Initiator offset = 0 + Byte enables = 11 + Byte enable length = 2 + Streaming width = 2 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 1 + +Converted Transaction + Addr = 16 + Len = 3 + Txn data pointer = changed + Byte enables and byte enable pointer = 011, changed + Byte enable length = 3 + Streaming width = 3 + +Memory States after Transaction + initiator = hixxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 21 + Len = 2 + Bus Width = 8 + Data Word = 2 + Initiator offset = 0 + Byte enables = 11 + Byte enable length = 2 + Streaming width = 2 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 3 + +Converted Transaction + Addr = 17 + Len = 2 + Txn data pointer = unchanged + Byte enables and byte enable pointer = 11, unchanged + Byte enable length = 2 + Streaming width = 2 + +Memory States after Transaction + initiator = hixxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 0 + Len = 4 + Bus Width = 4 + Data Word = 4 + Initiator offset = 25 + Byte enables = 1111 + Byte enable length = 4 + Streaming width = 4 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 0 + +Converted Transaction + Addr = 0 + Len = 4 + Txn data pointer = changed + Byte enables and byte enable pointer = 1111, changed + Byte enable length = 4 + Streaming width = 4 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = pqrsxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + +1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 0 + Len = 4 + Bus Width = 4 + Data Word = 4 + Initiator offset = 25 + Byte enables = 1111 + Byte enable length = 4 + Streaming width = 4 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 1 + +Converted Transaction + Addr = 0 + Len = 4 + Txn data pointer = changed + Byte enables and byte enable pointer = 1111, changed + Byte enable length = 4 + Streaming width = 4 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = pqrsxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + +2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 0 + Len = 4 + Bus Width = 4 + Data Word = 4 + Initiator offset = 25 + Byte enables = 1111 + Byte enable length = 4 + Streaming width = 4 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 3 + +Converted Transaction + Addr = 0 + Len = 4 + Txn data pointer = unchanged + Byte enables and byte enable pointer = 1111, unchanged + Byte enable length = 4 + Streaming width = 4 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = pqrsxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + +3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 13 + Len = 14 + Bus Width = 8 + Data Word = 2 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 14 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 0 + +Converted Transaction + Addr = 8 + Len = 24 + Txn data pointer = changed + Byte enables and byte enable pointer = 111000001111111100000111, changed + Byte enable length = 24 + Streaming width = 24 + +Memory States after Transaction + initiator = 9an8lmjkhivgtuxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +Pool status: (32,32) +Pool status: (32,32) (32,32) +Pool status: (32,32) (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 5 + Len = 4 + Bus Width = 4 + Data Word = 1 + Initiator offset = 25 + Byte enables = x + Byte enable length = 0 + Streaming width = 4 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 0 + +Converted Transaction + Addr = 4 + Len = 8 + Txn data pointer = changed + Byte enables and byte enable pointer = 11100001, changed + Byte enable length = 8 + Streaming width = 8 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxrqpxxxxsxxxxxxxxxxxxxxxxxxxxxxxx + +5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 10 + Len = 12 + Bus Width = 4 + Data Word = 4 + Initiator offset = 0 + Byte enables = 111100001111 + Byte enable length = 12 + Streaming width = 12 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 0 + +Converted Transaction + Addr = 8 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 1100001111000011, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 15 + Len = 8 + Bus Width = 8 + Data Word = 4 + Initiator offset = 25 + Byte enables = 00001111 + Byte enable length = 8 + Streaming width = 8 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 0 + +Converted Transaction + Addr = 8 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 0000000001111000, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxxxtuvwxxxxxxxxxxxxxxx + +0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 13 + Len = 14 + Bus Width = 8 + Data Word = 2 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 14 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 1 + +Converted Transaction + Addr = 8 + Len = 24 + Txn data pointer = changed + Byte enables and byte enable pointer = 111000001111111100000111, changed + Byte enable length = 24 + Streaming width = 24 + +Memory States after Transaction + initiator = 9an8lmjkhivgtuxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 5 + Len = 4 + Bus Width = 4 + Data Word = 1 + Initiator offset = 25 + Byte enables = x + Byte enable length = 0 + Streaming width = 4 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 1 + +Converted Transaction + Addr = 4 + Len = 8 + Txn data pointer = changed + Byte enables and byte enable pointer = 11100001, changed + Byte enable length = 8 + Streaming width = 8 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxrqpxxxxsxxxxxxxxxxxxxxxxxxxxxxxx + +2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 10 + Len = 12 + Bus Width = 4 + Data Word = 4 + Initiator offset = 0 + Byte enables = 111100001111 + Byte enable length = 12 + Streaming width = 12 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 1 + +Converted Transaction + Addr = 8 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 1100001111000011, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 15 + Len = 8 + Bus Width = 8 + Data Word = 4 + Initiator offset = 25 + Byte enables = 00001111 + Byte enable length = 8 + Streaming width = 8 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 1 + +Converted Transaction + Addr = 8 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 0000000001111000, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxxxtuvwxxxxxxxxxxxxxxx + +4 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: +Pool status: (32,32) +Pool status: (32,32) (32,32) +Pool status: (32,32) (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 13 + Len = 14 + Bus Width = 8 + Data Word = 2 + Initiator offset = 0 + Byte enables = x + Byte enable length = 0 + Streaming width = 2 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 0 + +Converted Transaction + Addr = 8 + Len = 56 + Txn data pointer = changed + Byte enables and byte enable pointer = 01100000011000000110000001100000011000000110000001100000, changed + Byte enable length = 56 + Streaming width = 8 + +Memory States after Transaction + initiator = 9a9a9a9a9a9a9axxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +5 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 5 + Len = 4 + Bus Width = 4 + Data Word = 1 + Initiator offset = 25 + Byte enables = 1101 + Byte enable length = 4 + Streaming width = 2 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 0 + +Converted Transaction + Addr = 4 + Len = 8 + Txn data pointer = changed + Byte enables and byte enable pointer = 01100100, changed + Byte enable length = 8 + Streaming width = 4 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz + target = xxxxxspxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + +6 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 10 + Len = 12 + Bus Width = 4 + Data Word = 4 + Initiator offset = 0 + Byte enables = 11110000 + Byte enable length = 8 + Streaming width = 12 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 0 + +Converted Transaction + Addr = 8 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 1100001111000011, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +0 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 15 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 25 + Byte enables = 00001111 + Byte enable length = 8 + Streaming width = 30 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 0 + +Converted Transaction + Addr = 8 + Len = 24 + Txn data pointer = changed + Byte enables and byte enable pointer = 000000000111100001111000, changed + Byte enable length = 24 + Streaming width = 24 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxxxtuvwxxxx1234xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + +1 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = R + Addr = 10 + Len = 12 + Bus Width = 4 + Data Word = 4 + Initiator offset = 0 + Byte enables = 11110000 + Byte enable length = 8 + Streaming width = 15 + Initiator memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Target memory = 0123456789abcdefghijklmnopqrstuvwxyz + Converter = 0 + +Converted Transaction + Addr = 8 + Len = 16 + Txn data pointer = changed + Byte enables and byte enable pointer = 1100001111000011, changed + Byte enable length = 16 + Streaming width = 16 + +Memory States after Transaction + initiator = ef89xxxxmnghxxxxxxxxxxxxxxxxxxxxxxxx + target = 0123456789abcdefghijklmnopqrstuvwxyz + +2 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +enter initiator memory state = (2048 characters) +enter target memory state = (2048 characters) +enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single) +Initiator Intent + Cmd = W + Addr = 15 + Len = 16 + Bus Width = 8 + Data Word = 4 + Initiator offset = 25 + Byte enables = 00001111 + Byte enable length = 8 + Streaming width = 16 + Initiator memory = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz + Target memory = xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + Converter = 0 + +Converted Transaction + Addr = 8 + Len = 24 + Txn data pointer = changed + Byte enables and byte enable pointer = 000000000111100001111000, changed + Byte enable length = 24 + Streaming width = 24 + +Memory States after Transaction + initiator = 0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz + target = xxxxxxxxxxxxxxxxxtuvwxxxx1234xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx + +3 enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s +Pool status: (32,32) +Pool status: (32,32) (32,32) +Pool status: (32,32) (32,32) (32,32) +Pool status: (24,24) (32,32) (32,32) (32,32) +Pool status: (24,24) (32,32) (32,32) (32,32) +Pool status: (56,56) (24,24) (32,32) (32,32) (32,32) +Pool status: (18,18) (56,56) (24,24) (32,32) (32,32) (32,32) +Pool status: (20,20) (18,18) (56,56) (24,24) (32,32) (32,32) (32,32) diff --git a/src/systemc/tests/tlm/endian_conv/input.txt b/src/systemc/tests/tlm/endian_conv/input.txt new file mode 100644 index 000000000..672c1a55e --- /dev/null +++ b/src/systemc/tests/tlm/endian_conv/input.txt @@ -0,0 +1,198 @@ + +R aligned: addr=0 len=16 bus=8 word=4 dptr=0 be=x s=16 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=0 + +R aligned: addr=0 len=16 bus=8 word=4 dptr=0 be=x s=16 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=1 + +R aligned: addr=16 len=16 bus=8 word=4 dptr=0 be=x s=16 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=2 + +W aligned: addr=16 len=16 bus=8 word=4 dptr=4 be=x s=16 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=0 + +W aligned: addr=16 len=16 bus=8 word=4 dptr=4 be=x s=16 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=1 + +W aligned: addr=0 len=16 bus=8 word=4 dptr=0 be=x s=16 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=2 + +R aligned: addr=0 len=16 bus=8 word=4 dptr=0 be=1111000011110000 s=16 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=0 + +R aligned: addr=0 len=16 bus=8 word=4 dptr=0 be=1111000011110000 s=16 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=1 + +R aligned: addr=16 len=16 bus=8 word=4 dptr=0 be=1111000011110000 s=16 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=2 + +W aligned: addr=16 len=16 bus=8 word=4 dptr=4 be=1111000000001111 s=16 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=0 + +W aligned: addr=16 len=16 bus=8 word=4 dptr=4 be=1111000000001111 s=16 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=1 + +W aligned: addr=0 len=16 bus=8 word=4 dptr=0 be=1111000000001111 s=16 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=2 + + +R single: addr=20 len=4 bus=8 word=4 dptr=0 be=x s=4 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=0 + +R single: addr=20 len=4 bus=8 word=4 dptr=0 be=x s=4 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=1 + +R single: addr=20 len=4 bus=8 word=4 dptr=0 be=x s=4 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=3 + +W single: addr=28 len=4 bus=8 word=4 dptr=4 be=x s=4 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=0 + +W single: addr=28 len=4 bus=8 word=4 dptr=4 be=x s=4 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=1 + +W single: addr=28 len=4 bus=8 word=4 dptr=4 be=x s=4 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=3 + +R single: addr=21 len=2 bus=8 word=2 dptr=0 be=11 s=2 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=0 + +R single: addr=21 len=2 bus=8 word=2 dptr=0 be=11 s=2 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=1 + +R single: addr=21 len=2 bus=8 word=2 dptr=0 be=11 s=2 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=3 + +W single: addr=0 len=4 bus=4 word=4 dptr=25 be=1111 s=4 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=0 + +W single: addr=0 len=4 bus=4 word=4 dptr=25 be=1111 s=4 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=1 + +W single: addr=0 len=4 bus=4 word=4 dptr=25 be=1111 s=4 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=3 + + +R awkward: addr=13 len=14 bus=8 word=2 dptr=0 be=x s=14 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=0 + +W awkward: addr=5 len=4 bus=4 word=1 dptr=25 be=x s=4 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=0 + +R awkward: addr=10 len=12 bus=4 word=4 dptr=0 be=111100001111 s=12 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=0 + +W awkward: addr=15 len=8 bus=8 word=4 dptr=25 be=00001111 s=8 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=0 + + +R awkward: addr=13 len=14 bus=8 word=2 dptr=0 be=x s=14 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=1 + +W awkward: addr=5 len=4 bus=4 word=1 dptr=25 be=x s=4 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=1 + +R awkward: addr=10 len=12 bus=4 word=4 dptr=0 be=111100001111 s=12 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=1 + +W awkward: addr=15 len=8 bus=8 word=4 dptr=25 be=00001111 s=8 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=1 + + +R stream: addr=13 len=14 bus=8 word=2 dptr=0 be=x s=2 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=0 + +W stream: addr=5 len=4 bus=4 word=1 dptr=25 be=1101 s=2 +i=0123456789abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=0 + + +R byte-en-len: addr=10 len=12 bus=4 word=4 dptr=0 be=11110000 s=12 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=0 + +W byte-en-len: addr=15 len=16 bus=8 word=4 dptr=25 be=00001111 s=30 +i=0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=0 + + +R stream-byte-en-len: addr=10 len=12 bus=4 word=4 dptr=0 be=11110000 s=15 +i=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +t=0123456789abcdefghijklmnopqrstuvwxyz +c=0 + +W stream-byte-en-len: addr=15 len=16 bus=8 word=4 dptr=25 be=00001111 s=16 +i=0123456789abcdefghijklmnopqrstuvwxyz01234567890abcdefghijklmnopqrstuvwxyz +t=xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx +c=0 + + diff --git a/src/systemc/tests/tlm/endian_conv/test_endian_conv.cpp b/src/systemc/tests/tlm/endian_conv/test_endian_conv.cpp new file mode 100644 index 000000000..8a6ff5c56 --- /dev/null +++ b/src/systemc/tests/tlm/endian_conv/test_endian_conv.cpp @@ -0,0 +1,419 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + + +/* +This C++ programme runs single transactions through a single +endianness conversion function, then through a simple memory model, +then converts it back. +Takes the initial memory state as input and provides the final +memory state as output. +*/ + + +#define BUFFER_SIZE 2048 + +#include +#include "tlm.h" +#include +#include +#include + +using namespace std; +using namespace tlm; +using namespace sc_dt; + + +// simple set of types with known sizeof(), for testing // +template class dt { + char content[SIZE]; +}; + + +#define convert(function) \ + switch(data_width) { \ + case 1: function >(&txn,bus_width); break; \ + case 2: function >(&txn,bus_width); break; \ + case 4: function >(&txn,bus_width); break; \ + case 8: function >(&txn,bus_width); break; \ + case 16: function >(&txn,bus_width); break; \ + case 32: function >(&txn,bus_width); break; \ + default: cout << "bad data width\n"; \ + exit(1); \ + } + + +// forward declarations - see below +template inline void +local_single_tohe(tlm_generic_payload *txn, unsigned int sizeof_databus); +template inline void +local_single_fromhe(tlm_generic_payload *txn, unsigned int sizeof_databus); + + +void test_a_conversion(char cmd, tlm_generic_payload &txn, std::ifstream & fin) { + + if(cmd == 'R') txn.set_read(); + else txn.set_write(); + + fin.ignore(10000,'='); + uint64 a; + fin >> a; + txn.set_address(a); + + fin.ignore(10000,'='); + int l; + fin >> l; + txn.set_data_length(l); + + int bus_width; + fin.ignore(10000,'='); fin >> bus_width; + + int data_width; + fin.ignore(10000,'='); fin >> data_width; + + int initiator_offset; + fin.ignore(10000,'='); fin >> initiator_offset; + + unsigned char *original_byte_enable = 0; + unsigned char *byte_enable_legible = + new unsigned char[txn.get_data_length() + 1]; + memset(byte_enable_legible, 0, txn.get_data_length() + 1); + fin.ignore(10000,'='); + for(unsigned b=0; b> tmp; + if((tmp=='0')||(tmp=='1')||(tmp=='x')) byte_enable_legible[b]=tmp; + else break; + } + if((byte_enable_legible[0] == '1') || (byte_enable_legible[0] == '0')) { + txn.set_byte_enable_ptr(new unsigned char[txn.get_data_length()]); + txn.set_byte_enable_length(txn.get_data_length()); + original_byte_enable = txn.get_byte_enable_ptr(); + for(unsigned int i=0; i> initiator_mem; + + txn.set_data_ptr(initiator_mem + initiator_offset); + + cout << "enter target memory state = ("<< BUFFER_SIZE << " characters)\n"; + unsigned char target_mem[BUFFER_SIZE+1]; + memset(target_mem, 0, BUFFER_SIZE+1); + fin.ignore(10000,'='); fin >> target_mem; + + cout << "enter converter choice = (0 => generic, 1 => word, 2 => aligned, 3 => single)\n"; + int converter; + fin.ignore(10000,'='); fin >> converter; + + cout << "Initiator Intent\n"; + cout << " Cmd = " << cmd << endl; + cout << " Addr = " << txn.get_address() << endl; + cout << " Len = " << txn.get_data_length() << endl; + cout << " Bus Width = " << bus_width << endl; + cout << " Data Word = " << data_width << endl; +#ifdef VERBOSE + cout << " Initiator offset and txn data pointer = " << initiator_offset << ", " << int(txn.get_data_ptr()) << endl; + cout << " Byte enables and byte enable pointer = " << byte_enable_legible << ", " << int(txn.get_byte_enable_ptr()) << endl; +#else + cout << " Initiator offset = " << initiator_offset << endl; + cout << " Byte enables = " << byte_enable_legible << endl; +#endif + cout << " Byte enable length = " << txn.get_byte_enable_length() << endl; + cout << " Streaming width = " << txn.get_streaming_width() << endl; + cout << " Initiator memory = " << initiator_mem << endl; + cout << " Target memory = " << target_mem << endl; + cout << " Converter = " << converter << endl << endl; + + // initiator // + switch(converter) { + case 0: convert(tlm_to_hostendian_generic); break; + case 1: convert(tlm_to_hostendian_word); break; + case 2: convert(tlm_to_hostendian_aligned); break; + case 3: convert(tlm_to_hostendian_single); break; + case 4: convert(local_single_tohe); break; + default: cout << "no such converter as " << converter << endl; + exit(1); + } + + cout << "Converted Transaction\n"; + cout << " Addr = " << txn.get_address() << endl; + cout << " Len = " << txn.get_data_length() << endl; +#ifdef VERBOSE + cout << " Txn data pointer = " << int(txn.get_data_ptr()) << endl; + if(txn.get_byte_enable_ptr() != 0) { + cout << " Byte enables and byte enable pointer = "; + for(unsigned int i=0; idbuf_size << "," << f->bebuf_size << ") "; + f = f->next; + } + cout << endl; +} + + +int sc_main(int argc, char **argv) { + + #include + + // no command line parameters // + // get everything from stdin and build transaction object // + cout << "\nTLM-2 Endianness Conversion Helper Functions Tester\n"; + cout << "March 2008\n"; + cout << "January 2012 Updated to read from endian_conv/input.txt\n\n"; + + std::string filename; + std::ifstream fin; + + if (1 == argc) + filename = "endian_conv/input.txt"; + else if (2 == argc) + filename = argv[1]; + else { + std::cerr << "Too many input arguments" << std::endl; + return 1; + } + + + fin.open(filename.c_str(), ios_base::in); + if (!fin) { + std::cerr << "Could not open input filename " << filename << std::endl; + return 1; + } + + srand(time(NULL)); + const int nr_txns_in_pool = 7; + const int txn_to_cycle = 4; + tlm_generic_payload *txns[nr_txns_in_pool]; + for(int i=0; i < nr_txns_in_pool; i++) txns[i] = new tlm_generic_payload; + + for(int i=0; true; i = ((i+1) % nr_txns_in_pool)) { + cout << i << " enter {R|W}, addr=a, len=l, bus width=b, word width=w, initiator offset=i, be={x|01}, stream width=s\n"; + pool_status(); + char command; + fin >> command; + if(fin.eof()) break; + if((command != 'R') && (command != 'W')) break; + if(i==txn_to_cycle) { + // should cause 2 extensions to get pushed to the pool once they've been used + delete txns[i]; + pool_status(); + delete txns[i-1]; + pool_status(); + // and popped back later when these new ones establish contexts + txns[i] = new tlm_generic_payload; + txns[i-1] = new tlm_generic_payload; + pool_status(); + } + test_a_conversion(command, *txns[i], fin); + } + + for(int i=0; i < nr_txns_in_pool; i++) { + delete txns[i]; + pool_status(); + } + return 0; +} + + +// converter functions for non-aligned single transactions +// included here for validation only. not designed for general use. + +unsigned char *original_dptr; +sc_dt::uint64 original_addr; + +template inline void +local_single_tohe(tlm_generic_payload *txn, unsigned int sizeof_databus) { + if(txn->get_data_length() != sizeof(DATAWORD)) { + cout << "Error: local_single_tohe() wrongly called\n"; + exit(1); + } + + sc_dt::uint64 mask = sizeof_databus - 1; + + // set up new buffers, length and address + if(sizeof(DATAWORD) > sizeof_databus) + txn->set_data_length(sizeof_databus + sizeof(DATAWORD)); + else + txn->set_data_length(2 * sizeof_databus); + txn->set_streaming_width(txn->get_data_length()); + unsigned char *new_data = new unsigned char[txn->get_data_length()]; + unsigned char *new_be = new unsigned char[txn->get_data_length()]; + // drive all BEs to zero initially + for(unsigned int i=0; iget_data_length(); i++) new_be[i] = 0; + sc_dt::uint64 new_addr = txn->get_address() & ~mask; + + // Comments assume arithmetic mode big endian initiator modelled on little + // endian host (but the functionality is the same for LE initiator on BE host) + + // iterate over the initiator word byte by byte, MSB first + unsigned char *curr_d = txn->get_data_ptr() + sizeof(DATAWORD) - 1; + unsigned char *curr_b = txn->get_byte_enable_ptr() + sizeof(DATAWORD) - 1; + + // initiator intent is to put the MSB at the address given in the transaction + sc_dt::uint64 curr_a = txn->get_address(); + + // iterate copying data and byte enables + for( ; curr_d >= txn->get_data_ptr(); curr_d--, curr_b--, curr_a++) { + // work out the address in the TLM interpretation of the initiator's intent + sc_dt::uint64 he_addr = curr_a ^ mask; + int idx = he_addr - new_addr; + if(txn->is_write()) new_data[idx] = *curr_d; + if(txn->get_byte_enable_ptr() == 0) new_be[idx] = 1; + else new_be[idx] = *curr_b; + } + + // replace the pointers + original_dptr = txn->get_data_ptr(); + txn->set_data_ptr(new_data); + txn->set_byte_enable_ptr(new_be); + txn->set_byte_enable_length(txn->get_data_length()); + original_addr = txn->get_address(); + txn->set_address(new_addr); +} + + +template inline void +local_single_fromhe(tlm_generic_payload *txn, unsigned int sizeof_databus) { + sc_dt::uint64 mask = sizeof_databus - 1; + + // Comments assume arithmetic mode big endian initiator modelled on little + // endian host (but the functionality is the same for LE initiator on BE host) + + // iterate over the initiator word byte by byte, MSB first + unsigned char *curr_d = original_dptr + sizeof(DATAWORD) - 1; + + // initiator intent is to put the MSB at the address given in the transaction + sc_dt::uint64 curr_a = original_addr; + + // iterate copying data and byte enables + for( ; curr_d >= original_dptr; curr_d--, curr_a++) { + // work out the address in the TLM interpretation of the initiator's intent + sc_dt::uint64 he_addr = curr_a ^ mask; + int idx = he_addr - txn->get_address(); + if((txn->is_read()) && (txn->get_byte_enable_ptr()[idx] != 0)) + *curr_d = txn->get_data_ptr()[idx]; + } + + // clean up + delete [] txn->get_data_ptr(); + delete [] txn->get_byte_enable_ptr(); +} + diff --git a/src/systemc/tests/tlm/endian_conv/testall.py b/src/systemc/tests/tlm/endian_conv/testall.py new file mode 100644 index 000000000..63bf6abe8 --- /dev/null +++ b/src/systemc/tests/tlm/endian_conv/testall.py @@ -0,0 +1,456 @@ +""" +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +Python Script to test Endianness Conversion Functions for OSCI TLM-2 + +There is a simple testbench programme in C++ which runs a single +transaction through a single conversion function, to a simple target +memory and back. This script will run the testbench many times and test for +- incomplete execution, seg-faults, etc +- distributability of conversion function: each transaction should have +the same effect on initiator/target memory as a set of smaller transactions +that sum to it +- equivalence: all conversion functions should have the same functional +effect as each other + +The approach is to provide the initial state of the initiator and +target memory (as strings) and to capture their final states, so that +only the effect of the transaction on the data buffers is measured. + +Script works out for itself which conversion functions are legal for a +given transaction and applies all of them. Note that where data is +wider than bus, only one conversion function is legal and testing is +somewhat limited. + +Testing space (select a transaction at random from the space): +- with and without byte-enables (generated at random for each data word +and can be all-zero) +- data widths of (1,2,4,8,16) +- bus widths of (1,2,4,8,16), lower priority for those smaller than data +width +- transaction lengths of (1..32) x data width, higher probability for +lower values +- base address (0..1023) at bus_width steps +- offset address (0..bus width) with a higher priority for 0 +- address in initiator buffer uniform random +- read or write +- byte-enable length may be smaller than transasction length +- may be a streaming burst + +Transaction breakdown +- individual words (always) +- one random breakdown with each segment containing between 1 and N-1 +words, where N is the length in words +- one breakdown with two segments interleaved, using (additional) byte +enables to suppress the part where the other segment is active + +Data buffer definition: starts at 0, randomly filled +with lower case letters and numbers. Size 2 kB. Addresses are limited to +1 kB. +""" + + +import random +import string + + +class transaction: + """ contains read_not_write, address, length, byte_enable, + bus_width, data_width, data_pointer, stream_width """ + def __init__(self, **a): self.__dict__ = a + def __str__(self): + if self.read_not_write: a = "R: " + else: a = "W: " + a += "addr = %d, len = %d, bus = %d, word = %d, data = %d" % \ + (self.address, self.length, self.bus_width, self.data_width, \ + self.data_pointer) + if self.byte_enable: a += ", be = " + self.byte_enable + else: a += ", be = x" + a += ", sw = %d" % (self.stream_width) + return a + + +def txn_generator(nr): + pr_read = 0.5 + pr_byte_enable = 0.5 + pr_enabled = 0.5 + bus_widths = [1, 2, 4, 8, 16] + data_widths = [1, 2, 4, 8, 16] + [1, 2, 4, 8] + [1, 2, 4] + [1, 2] + lengths = range(1,33) + range(1,17) + range(1,9) + range(1,5) + range(1,3) + pr_short_be = 0.2 + pr_stream = 0.1 + nr_generated = 0 + while nr_generated < nr: + # create a random transaction + bus_width = random.choice(bus_widths) + while True: + data_width = random.choice(data_widths) + if data_width <= bus_width: break + if random.random() < 0.25: break + length = random.choice(lengths) + addr_base = random.choice(range(0,1024,bus_width)) + addr_offset = random.choice(range(bus_width)+[0]*(bus_width/2)) + txn = transaction( + bus_width = bus_width, + data_width = data_width, + read_not_write = random.random() < pr_read, + length = length * data_width, + address = addr_base + addr_offset, + byte_enable = False, + stream_width = length * data_width, + data_pointer = random.randint(0,1023) + ) + if random.random() < pr_byte_enable: + belen = length + if random.random() < pr_short_be: + belen = min(random.choice(lengths), length) + bep = ["0" * data_width, "1" * data_width] + txn.byte_enable = "".join([random.choice(bep) for x in range(belen)]) + if random.random() < pr_stream and length > 1: + strlen = length + while True: + strlen -= 1 + if strlen == 1 or \ + (random.random() < 0.5 and (length/strlen)*strlen == length): + break + txn.stream_width = strlen * data_width + nr_generated += 1 + yield txn + +# test code for transaction generator +if False: + for t in txn_generator(20): + print t + raise Exception +# end test code + + +class memory_state_cl: + buffer_size = 2048 + repeats = 10 * buffer_size / 36 + population = (string.lowercase + string.digits) * repeats + def __init__(self): + self.initiator = "".join( + random.sample(memory_state_cl.population, memory_state_cl.buffer_size)) + self.target = "".join( + random.sample(memory_state_cl.population, memory_state_cl.buffer_size)) + def copy(self): + r = memory_state_cl() + r.initiator = self.initiator + r.target = self.target + return r + def __eq__(self, golden): + return self.initiator==golden.initiator and self.target==golden.target + def __ne__(self, golden): + return self.initiator!=golden.initiator or self.target!=golden.target + def __str__(self): + return "initiator = " + self.initiator + "\n" + "target = " + self.target + + +# all fragmentation generators +def __FRAG__null(txn): + yield txn + +def __FRAG__word(txn): + curr_address = txn.address + reset_address = curr_address + txn.stream_width + if txn.byte_enable: + full_byte_enable = txn.byte_enable * (1+txn.length/len(txn.byte_enable)) + be_pos = 0 + d_pos = txn.data_pointer + end = txn.length + d_pos + while d_pos < end: + new_txn = transaction( + bus_width = txn.bus_width, + data_width = txn.data_width, + read_not_write = txn.read_not_write, + length = txn.data_width, + address = curr_address, + byte_enable = False, + stream_width = txn.data_width, + data_pointer = d_pos + ) + curr_address += txn.data_width + if curr_address == reset_address: curr_address = txn.address + d_pos += txn.data_width + if txn.byte_enable: + new_txn.byte_enable = full_byte_enable[be_pos:be_pos+txn.data_width] + be_pos += txn.data_width + yield new_txn + +def __FRAG__stream(txn): + if txn.byte_enable: + full_byte_enable = txn.byte_enable * (1+txn.length/len(txn.byte_enable)) + be_pos = 0 + bytes_done = 0 + while bytes_done < txn.length: + new_txn = transaction( + bus_width = txn.bus_width, + data_width = txn.data_width, + read_not_write = txn.read_not_write, + length = txn.stream_width, + address = txn.address, + byte_enable = False, + stream_width = txn.stream_width, + data_pointer = bytes_done + txn.data_pointer + ) + if txn.byte_enable: + new_txn.byte_enable = full_byte_enable[be_pos:be_pos+txn.stream_width] + be_pos += txn.stream_width + yield new_txn + bytes_done += txn.stream_width + +def __FRAG__random(stream_txn): + for txn in __FRAG__stream(stream_txn): + # txn has full byte enables and no stream feature guaranteed + pr_nofrag = 0.5 + end_address = txn.address + txn.length + curr_address = txn.address + be_pos = 0 + d_pos = txn.data_pointer + while curr_address < end_address: + new_txn = transaction( + bus_width = txn.bus_width, + data_width = txn.data_width, + read_not_write = txn.read_not_write, + length = txn.data_width, + address = curr_address, + byte_enable = txn.byte_enable, + stream_width = txn.data_width, + data_pointer = d_pos + ) + curr_address += txn.data_width + d_pos += txn.data_width + if txn.byte_enable: + new_txn.byte_enable = txn.byte_enable[be_pos:be_pos+txn.data_width] + be_pos += txn.data_width + while random.random() < pr_nofrag and curr_address < end_address: + new_txn.length += txn.data_width + new_txn.stream_width += txn.data_width + curr_address += txn.data_width + d_pos += txn.data_width + if txn.byte_enable: + new_txn.byte_enable += txn.byte_enable[be_pos:be_pos+txn.data_width] + be_pos += txn.data_width + yield new_txn + +def __FRAG__randinterleave(stream_txn): + for txn in __FRAG__stream(stream_txn): + # txn has full byte enables and no stream feature guaranteed + pr_frag = 0.5 + txns = [ transaction( + bus_width = txn.bus_width, + data_width = txn.data_width, + read_not_write = txn.read_not_write, + length = txn.length, + address = txn.address, + byte_enable = "", + stream_width = txn.length, + data_pointer = txn.data_pointer + ), transaction( + bus_width = txn.bus_width, + data_width = txn.data_width, + read_not_write = txn.read_not_write, + length = txn.length, + address = txn.address, + byte_enable = "", + stream_width = txn.length, + data_pointer = txn.data_pointer + ) ] + curr = 0 + be_pos = 0 + on = "1" * txn.data_width + off = "0" * txn.data_width + while be_pos < txn.length: + if txn.byte_enable: bew = txn.byte_enable[be_pos:be_pos+txn.data_width] + else: bew = on + txns[curr].byte_enable += bew + txns[1-curr].byte_enable += off + be_pos += txn.data_width + if random.random() < pr_frag: curr = 1-curr + yield txns[0] + yield txns[1] + +fragmenters = [globals()[n] for n in globals().keys() if n[:8]=="__FRAG__"] + +# test code for fragmenters +if False: + for t in txn_generator(1): + print t + print + for u in fragmenters[4](t): + print u + raise Exception +# end test code + + +# conversion functions are determined by an index (shared with C++) and +# a function that tests if they can be applied to a transaction +def __CHCK__generic(txn): + __CHCK__generic.nr = 0 + return True + +def __CHCK__word(txn): + __CHCK__word.nr = 1 + if txn.data_width > txn.bus_width: return False + if txn.stream_width < txn.length: return False + if txn.byte_enable and len(txn.byte_enable) < txn.length: return False + return True + +def __CHCK__aligned(txn): + __CHCK__aligned.nr = 2 + if txn.data_width > txn.bus_width: return False + if txn.stream_width < txn.length: return False + if txn.byte_enable and len(txn.byte_enable) < txn.length: return False + base_addr = txn.address / txn.bus_width + if base_addr * txn.bus_width != txn.address: return False + nr_bus_words = txn.length / txn.bus_width + if nr_bus_words * txn.bus_width != txn.length: return False + return True + +def __CHCK__single(txn): + __CHCK__single.nr = 3 + if txn.length != txn.data_width: return False + base_addr = txn.address / txn.bus_width + end_base_addr = (txn.address + txn.length - 1) / txn.bus_width + if base_addr != end_base_addr: return False + return True + +def __CHCK__local_single(txn): + __CHCK__local_single.nr = 4 + if txn.length != txn.data_width: return False + return True + +all_converters = [globals()[n] for n in globals().keys() if n[:8]=="__CHCK__"] +for x in all_converters: x.usage = 0 + + +class TesterFailure(Exception): pass +class SystemCFailure(Exception): pass +class ConverterDifference(Exception): pass +class FragmenterDifference(Exception): pass + +from subprocess import Popen, PIPE + +# test a single fragment in multiple ways +def test_a_fragment(f, ms): + # f is the (fragment of a) transaction + # ms is the memory state to use at start of test + + # run the same fragment through all applicable conversion functions + # and check they all do the same thing + # use the same sub-process for all of them + + # build complete stdin + convs = [c for c in all_converters if c(f)] + if len(convs) == 0: raise TesterFailure(f.str()) + txtin = "\n".join( + [("%s\n%s\nconverter = %d\n" % (f, ms, c.nr)) for c in convs]) + + # run and get stdout + txtout = "no output" + try: + sp = Popen("../build-unix/test_endian_conv.exe", stdin=PIPE, stdout=PIPE) + txtout = sp.communicate(txtin)[0] + tmp = txtout.splitlines() + initiators = [l.split()[-1] for l in tmp if l[:14] == " initiator = "] + targets = [l.split()[-1] for l in tmp if l[:11] == " target = "] + except: + raise SystemCFailure("\n" + txtin + txtout) + if sp.returncode != 0: raise SystemCFailure("\n" + txtin + txtout) + if len(initiators) != len(convs): raise SystemCFailure("\n" + txtin + txtout) + if len(targets) != len(convs): raise SystemCFailure("\n" + txtin + txtout) + for c in convs: c.usage += 1 + + ms_out = memory_state_cl() + ms_out.initiator = initiators[0] + ms_out.target = targets[0] + for i in range(1,len(convs)): + if initiators[i]!=ms_out.initiator or targets[i]!=ms_out.target: + raise ConverterDifference(""" +%s +start memory: +%s +converter = %d +golden memory: +%s +actual memory: +%s""" % (f, ms, i, golden_ms, ms_out)) + + return ms_out + + +# main loop + +from sys import argv + +print "Testing Endianness Conversion Functions" +print "March 2008" +print "OSCI TLM-2" + +try: nr_txns_to_test = int(argv[1]) +except: + print "No command line input for number of tests, using default" + nr_txns_to_test = 1000 + +print "Number to test:", nr_txns_to_test + +# generate and test a number of transactions +for txn in txn_generator(nr_txns_to_test): + + # each transaction has a random initial memory state + initial_memory = memory_state_cl() + + # iterate over all defined fragmentation functions + first_time = True + for fragmenter in fragmenters: + + # all versions of the transaction start in the same place + memory_state = initial_memory.copy() + + # now iterate over the fragments of the transaction, accumulating + # the memory state + for partial_txn in fragmenter(txn): + memory_state = test_a_fragment(partial_txn, memory_state) + + if first_time: + golden_memory_state = memory_state.copy() + first_time = False + else: + if memory_state != golden_memory_state: raise FragmenterDifference(""" +fragmenter: %s +transaction: +%s +start memory: +%s +golden memory: +%s +actual memory: +%s""" % (fragmenter, txn, initial_memory, golden_memory_state, memory_state)) + + print ".", +print + + +print "Conversion functions usage frequency:" +for c in all_converters: + print c.nr, c.__name__, c.usage + + diff --git a/src/systemc/tests/tlm/multi_sockets/MultiSocketSimpleSwitchAT.h b/src/systemc/tests/tlm/multi_sockets/MultiSocketSimpleSwitchAT.h new file mode 100644 index 000000000..3e03db312 --- /dev/null +++ b/src/systemc/tests/tlm/multi_sockets/MultiSocketSimpleSwitchAT.h @@ -0,0 +1,340 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __SIMPLESWITCHAT_H__ +#define __SIMPLESWITCHAT_H__ + +#include "tlm.h" + +#include "tlm_utils/multi_passthrough_initiator_socket.h" +#include "tlm_utils/multi_passthrough_target_socket.h" +#include "simpleAddressMap.h" +#include "extensionPool.h" +#include "tlm_utils/instance_specific_extensions.h" +#include "tlm_utils/peq_with_cb_and_phase.h" + + +/* +This class is a simple crossbar switch through which an arbitrary number of initiators +may communicate in parallel as long as they do not talk to the same target. + +If two masters address the same target at the same point of time, +the choice who will be allowed to communicate +is done non-deterministically (based on the SystemC process exectution order). + +This could be avoided by changing the fwPEQ into a priority PEQ of some kind. + +The switch ensures that the end_req and end_resp rules are not violated when +many initiator talk to the same target. +*/ +class MultiSocketSimpleSwitchAT : public sc_core::sc_module, public tlm::tlm_mm_interface +{ +public: + typedef tlm::tlm_generic_payload transaction_type; + typedef tlm::tlm_phase phase_type; + typedef tlm::tlm_sync_enum sync_enum_type; + typedef tlm_utils::multi_passthrough_target_socket target_socket_type; + typedef tlm_utils::multi_passthrough_initiator_socket initiator_socket_type; + +public: + target_socket_type target_socket; //the target multi socket + +private: + initiator_socket_type initiator_socket; //the initiator multi socket (private to enforce use of bindTarget function) + SimpleAddressMap m_addrMap; //a pretty simple address map + std::vector > m_pendingReqs; //list of pending reqs per target + std::vector > m_pendingResps; //list of pending resps per initiator + std::vector m_masks; //address masks for each target + tlm_utils::instance_specific_extension_accessor accessMySpecificExtensions; //extension accessor to access private extensions + tlm_utils::peq_with_cb_and_phase m_bwPEQ; //PEQ in the fw direction + tlm_utils::peq_with_cb_and_phase m_fwPEQ; //PEQ in the bw direction + + + //an instance specific extension that tells us whether we are in a wrapped b_transport or not + class BTag : public tlm_utils::instance_specific_extension{ + public: + sc_core::sc_event event; //trigger this event when transaction is done + }; + + //an instance specific extension that holds information about source and sink of a txn + // as well as information if the req still has to be cleared and if the txn is already + // complete on the target side + class ConnectionInfo : public tlm_utils::instance_specific_extension{ + public: + unsigned int fwID; //socket number of sink + unsigned int bwID; //socket number of source + bool clearReq; //is the txn still in req phase? + bool alreadyComplete; //has the txn already completed on the target side? + }; + + class internalPEQTypes{ //use the tpPEQ to delay connection infos + public: + typedef ConnectionInfo tlm_payload_type; + typedef tlm::tlm_phase tlm_phase_type; + }; + ExtensionPool m_connInfoPool; //our pool of extensions + unsigned int m_target_count; //number of connected targets (see bindTargetSocket for explanation) + +public: + SC_HAS_PROCESS(MultiSocketSimpleSwitchAT); + MultiSocketSimpleSwitchAT(sc_core::sc_module_name name) : + sc_core::sc_module(name), + target_socket("target_socket"), + initiator_socket("initiator_socket"), + m_bwPEQ(this, &MultiSocketSimpleSwitchAT::bwPEQcb), + m_fwPEQ(this, &MultiSocketSimpleSwitchAT::fwPEQcb), + m_connInfoPool(10), + m_target_count(0) + { + target_socket.register_nb_transport_fw(this, &MultiSocketSimpleSwitchAT::initiatorNBTransport); + target_socket.register_b_transport(this, &MultiSocketSimpleSwitchAT::b_transport); + initiator_socket.register_nb_transport_bw(this, &MultiSocketSimpleSwitchAT::targetNBTransport); + } + + void bindTargetSocket(initiator_socket_type::base_target_socket_type& target + ,sc_dt::uint64 low + ,sc_dt::uint64 high + ,sc_dt::uint64 mask = 0xffffffffffffffffULL){ + initiator_socket(target); //bind sockets + //insert into address map and increase target count + // (we have to count the targets manually, because target_socket.size() is only reliable during simulation + // as it gets evaluated during end_of_elaboration) + m_addrMap.insert(low, high, m_target_count++); + m_masks.push_back(mask); //add the mask for this target + } + + unsigned int decode(const sc_dt::uint64& address) + { + return m_addrMap.decode(address); + } + + void start_of_simulation(){ + //initialize the lists of pending reqs and resps + m_pendingReqs.resize(initiator_socket.size()); + m_pendingResps.resize(target_socket.size()); + } + + + void b_transport(int initiator_id, transaction_type& trans, sc_core::sc_time& t){ + //first make sure that there is no BTag (just for debugging) + BTag* btag; + accessMySpecificExtensions(trans).get_extension(btag); + sc_assert(!btag); + BTag tag; //now add our BTag + bool added_mm=!trans.has_mm(); //in case there is no MM in we add it now + if (added_mm){ + trans.set_mm(this); + trans.acquire(); //acquire the txn + } + accessMySpecificExtensions(trans).set_extension(&tag); + phase_type phase=tlm::BEGIN_REQ; //then simply use our nb implementation (respects all the rules) + initiatorNBTransport(initiator_id, trans, phase, t); + wait(tag.event); //and wait for the event to be triggered + if (added_mm){ //if we added MM + trans.release(); //we release our reference (this will not delete the txn but trigger the tag.event as soon as the ref count is zero) + if (trans.get_ref_count()) + wait(tag.event); //wait for the ref count to get to zero + trans.set_mm(NULL); //remove the MM + } + //don't forget to remove the extension (instance specific extensions are not cleared off by MM) + accessMySpecificExtensions(trans).clear_extension(&tag); + } + + void free(transaction_type* txn){ + BTag* btag; + accessMySpecificExtensions(*txn).get_extension(btag); + sc_assert(btag); + txn->reset(); //clean off all extension that were added down stream + btag->event.notify(); + } + + //do a fw transmission + void initiatorNBTransport_core(transaction_type& trans, + phase_type& phase, + sc_core::sc_time& t, + unsigned int tgtSocketNumber){ + switch (initiator_socket[tgtSocketNumber]->nb_transport_fw(trans, phase, t)) { + case tlm::TLM_ACCEPTED: + case tlm::TLM_UPDATED: + // Transaction not yet finished + if (phase != tlm::BEGIN_REQ) + { + sc_assert(phase!=tlm::END_RESP); + m_bwPEQ.notify(trans,phase,t); + } + break; + case tlm::TLM_COMPLETED: + // Transaction finished + ConnectionInfo* connInfo; + accessMySpecificExtensions(trans).get_extension(connInfo); + sc_assert(connInfo); + connInfo->alreadyComplete=true; + phase=tlm::BEGIN_RESP; + m_bwPEQ.notify(trans, phase, t); + break; + default: + sc_assert(0); exit(1); + }; + } + + //nb_transport_fw + sync_enum_type initiatorNBTransport(int initiator_id, + transaction_type& trans, + phase_type& phase, + sc_core::sc_time& t) + { + ConnectionInfo* connInfo; + accessMySpecificExtensions(trans).get_extension(connInfo); + m_fwPEQ.notify(trans,phase,t); + if (phase==tlm::BEGIN_REQ){ + //add our private information to the txn + sc_assert(!connInfo); + connInfo=m_connInfoPool.construct(); + connInfo->fwID=decode(trans.get_address()); + connInfo->bwID=initiator_id; + connInfo->clearReq=true; + connInfo->alreadyComplete=false; + accessMySpecificExtensions(trans).set_extension(connInfo); + } + else + if (phase==tlm::END_RESP){ + return tlm::TLM_COMPLETED; + } + else + {sc_assert(0); exit(1);} + return tlm::TLM_ACCEPTED; + } + + sync_enum_type targetNBTransport(int portId, + transaction_type& trans, + phase_type& phase, + sc_core::sc_time& t) + { + if (phase != tlm::END_REQ && phase != tlm::BEGIN_RESP) { + std::cout << "ERROR: '" << name() + << "': Illegal phase received from target." << std::endl; + sc_assert(false); exit(1); + } + //simply stuff it into the bw PEQ + m_bwPEQ.notify(trans,phase,t); + return tlm::TLM_ACCEPTED; + } + + void bwPEQcb(transaction_type& trans, const phase_type& phase){ + //first get our private info from the txn + ConnectionInfo* connInfo; + accessMySpecificExtensions(trans).get_extension(connInfo); + sc_assert(connInfo); + phase_type p=phase; + sc_core::sc_time t=sc_core::SC_ZERO_TIME; + BTag* btag; + accessMySpecificExtensions(trans).get_extension(btag); + bool doCall=btag==NULL; //we only will do a bw call if we are not in a wrapped b_transport + if ((phase==tlm::END_REQ) | (connInfo->clearReq)){ //in case the target left out end_req clearReq reminds us to unlock the req port + sc_assert(m_pendingReqs[connInfo->fwID].size()); + sc_assert(m_pendingReqs[connInfo->fwID].front()==&trans); + m_pendingReqs[connInfo->fwID].pop_front(); //allow another req to start at this target + if (m_pendingReqs[connInfo->fwID].size()){ //there was a pending req + phase_type ph=tlm::BEGIN_REQ; + initiatorNBTransport_core(*m_pendingReqs[connInfo->fwID].front(), ph, t,connInfo->fwID); + } + connInfo->clearReq=false; + } + //no else here, since we might clear the req AND begin a resp + if (phase==tlm::BEGIN_RESP){ + m_pendingResps[connInfo->bwID].push_back(&trans); + doCall=m_pendingResps[connInfo->bwID].size()==1; //do a call in case the response socket was free + } + + if (doCall){ //we have to do a call on the bw of fw path + if (btag){ //only possible if BEGIN_RESP and resp socket was free + phase_type ph=tlm::END_RESP; + m_fwPEQ.notify(trans, ph, t); + } + else + switch (target_socket[connInfo->bwID]->nb_transport_bw(trans, p, t)){ + case tlm::TLM_ACCEPTED: + case tlm::TLM_UPDATED: + break; + case tlm::TLM_COMPLETED:{ + //covers a piggy bagged END_RESP to START_RESP + phase_type ph=tlm::END_RESP; + m_fwPEQ.notify(trans, ph, t); + } + break; + default: + sc_assert(0); exit(1); + + }; + } + } + + //the following two functions (fwPEQcb and clearPEQcb) could be one, if we were allowed + // to stick END_RESP into a PEQ + void fwPEQcb(transaction_type& trans, const phase_type& phase){ + ConnectionInfo* connInfo; + accessMySpecificExtensions(trans).get_extension(connInfo); + sc_assert(connInfo); + phase_type ph=phase; + sc_core::sc_time t=sc_core::SC_ZERO_TIME; + if (phase==tlm::BEGIN_REQ){ + trans.set_address(trans.get_address()&m_masks[connInfo->fwID]); //mask address + m_pendingReqs[connInfo->fwID].push_back(&trans); + if (m_pendingReqs[connInfo->fwID].size()==1){ //the socket is free + initiatorNBTransport_core(trans, ph, t, connInfo->fwID); + } + } + else + { + //phase is always END_RESP + BTag* btag; + accessMySpecificExtensions(trans).get_extension(btag); + accessMySpecificExtensions(trans).clear_extension(connInfo); //remove our specific extension as it is not needed any more + if (!connInfo->alreadyComplete) { + sync_enum_type tmp=initiator_socket[connInfo->fwID]->nb_transport_fw(trans, ph, t); + sc_assert(tmp==tlm::TLM_COMPLETED); + } + sc_assert(m_pendingResps[connInfo->bwID].size()); + m_pendingResps[connInfo->bwID].pop_front(); //remove current response + if (m_pendingResps[connInfo->bwID].size()){ //if there was one pending + ph=tlm::BEGIN_RESP; //schedule its transmission + m_bwPEQ.notify(*m_pendingResps[connInfo->bwID].front(),ph,t); + } + m_connInfoPool.free(connInfo); //release connInfo + if (btag) btag->event.notify(t); //release b_transport + } + } + + void dump_status(){ + std::cout<<"At "< +class ExtensionPool{ + struct entry{ + public: + entry(T* content){ + that=content; + next=NULL; + } + T* that; + entry* next; + }; + +public: + ExtensionPool(int size): used(NULL){ + unused=new entry(new T()); //create first one + mine.push_back(unused->that); + for (int i=0; inext=unused; + unused=e; + mine.push_back(unused->that); + } + } + + ~ExtensionPool(){ + //delete all T* that belong to this pool + for (unsigned int i=0; inext; + delete e; + } + + //delete all used elements + while (used){ + entry* e=used; + used=used->next; + delete e; + } + } + + bool is_from(T* cont){ //slow!!! + for (int i=0; ithat); + } + else{ + e=unused; + unused=unused->next; + } + e->next=used; + used=e; + return used->that; //if all elements of pool are used, just create a new one and go on + } + + void free (T* cont){ + sc_assert(used); + entry* e=used; + used=e->next; + e->that=cont; + e->next=unused; + unused=e; + } + +private: + entry* unused; + entry* used; + std::vector mine; //just for clean up and is_from +}; + +#endif + diff --git a/src/systemc/tests/tlm/multi_sockets/golden/multi_sockets.log b/src/systemc/tests/tlm/multi_sockets/golden/multi_sockets.log new file mode 100644 index 000000000..6ca308579 --- /dev/null +++ b/src/systemc/tests/tlm/multi_sockets/golden/multi_sockets.log @@ -0,0 +1,151 @@ +SystemC Simulation +AT_I1: Send write request: A = 0x10000000, D = 0x0 @ 0 s +LT_I1: Send write request: A = 0x20000000, D = 0x0 @ 0 s +LT_I2: Send write request: A = 0x30000000, D = 0x0 @ 0 s +LT_I3: Send write request: A = 0x60000000, D = 0x0 @ 0 s +AT_I2: Send write request: A = 0x50000000, D = 0x0 @ 0 s +LT_I4: Send write request: A = 0x40000000, D = 0x0 @ 0 s (0 s + 0 s) +AT_T2: Received write request: A = 0x0, D = 0x0 @ 0 s +AT_T1: Received write request: A = 0x0, D = 0x0 @ 0 s +LT_T1: Received write request: A = 0x0, D = 0x0 @ 0 s +LT_T2: Received write request: A = 0x0, D = 0x0 @ 0 s +LT_T3: Received write request: A = 0x0, D = 0x0 @ 0 s +AT_T3: Received write request: A = 0x0, D = 0x0 @ 10 ns +LT_I1: Received ok response @ 10 ns +LT_I1: Send write request: A = 0x20000004, D = 0x1 @ 10 ns +LT_T1: Received write request: A = 0x4, D = 0x1 @ 10 ns +LT_I2: Received ok response @ 10 ns +LT_I2: Send write request: A = 0x30000004, D = 0x1 @ 10 ns +LT_T2: Received write request: A = 0x4, D = 0x1 @ 10 ns +LT_I1: Received ok response @ 20 ns +LT_I1: Send write request: A = 0x20000008, D = 0x2 @ 20 ns +LT_T1: Received write request: A = 0x8, D = 0x2 @ 20 ns +LT_I2: Received ok response @ 20 ns +LT_I2: Send write request: A = 0x30000008, D = 0x2 @ 20 ns +LT_T2: Received write request: A = 0x8, D = 0x2 @ 20 ns +AT_I2: Send write request: A = 0x50000004, D = 0x1 @ 25 ns +AT_T2: Received write request: A = 0x4, D = 0x1 @ 25 ns +AT_I1: Send write request: A = 0x10000004, D = 0x1 @ 25 ns +AT_T1: Received write request: A = 0x4, D = 0x1 @ 25 ns +LT_I1: Received ok response @ 30 ns +LT_I1: Send read request: A = 0x20000000 @ 30 ns +LT_T1: Received read request: A = 0x0 @ 30 ns +LT_I2: Received ok response @ 30 ns +LT_I2: Send read request: A = 0x30000000 @ 30 ns +LT_T2: Received read request: A = 0x0 @ 30 ns +AT_I2: Send write request: A = 0x50000008, D = 0x2 @ 50 ns +AT_T2: Received write request: A = 0x8, D = 0x2 @ 50 ns +AT_I1: Send write request: A = 0x10000008, D = 0x2 @ 50 ns +AT_T1: Received write request: A = 0x8, D = 0x2 @ 50 ns +LT_I4: Received ok response @ 50 ns (50 ns + 0 s) +LT_I4: Send write request: A = 0x40000004, D = 0x1 @ 50 ns (50 ns + 0 s) +LT_T3: Received write request: A = 0x4, D = 0x1 @ 50 ns +LT_I3: Received ok response @ 60 ns +LT_I3: Send write request: A = 0x60000004, D = 0x1 @ 60 ns +AT_I2: Send read request: A = 0x50000000 @ 75 ns +AT_T2: Received read request: A = 0x0 @ 75 ns +AT_I1: Send read request: A = 0x10000000 @ 75 ns +AT_T1: Received read request: A = 0x0 @ 75 ns +AT_I2: Send read request: A = 0x50000004 @ 100 ns +AT_T2: Received read request: A = 0x4 @ 100 ns +AT_I1: Send read request: A = 0x10000004 @ 100 ns +AT_T1: Received read request: A = 0x4 @ 100 ns +LT_I4: Received ok response @ 100 ns (100 ns + 0 s) +LT_I4: Send write request: A = 0x40000008, D = 0x2 @ 100 ns (100 ns + 0 s) +LT_T3: Received write request: A = 0x8, D = 0x2 @ 100 ns +AT_I2: Received ok response @ 125 ns +AT_I2: Send read request: A = 0x50000008 @ 125 ns +AT_T2: Received read request: A = 0x8 @ 125 ns +AT_I1: Send read request: A = 0x10000008 @ 125 ns +AT_T1: Received read request: A = 0x8 @ 125 ns +AT_T3: Received write request: A = 0x4, D = 0x1 @ 130 ns +LT_I1: Received ok response: D = 0x0 @ 130 ns +LT_I1: Send read request: A = 0x20000004 @ 130 ns +LT_T1: Received read request: A = 0x4 @ 130 ns +LT_I2: Received ok response: D = 0x0 @ 130 ns +LT_I2: Send read request: A = 0x30000004 @ 130 ns +LT_T2: Received read request: A = 0x4 @ 130 ns +AT_I1: Received ok response @ 135 ns +LT_I4: Received ok response @ 150 ns (150 ns + 0 s) +LT_I4: Send read request: A = 0x40000000 @ 150 ns (150 ns + 0 s) +LT_T3: Received read request: A = 0x0 @ 150 ns +LT_I3: Received ok response @ 180 ns +LT_I3: Send write request: A = 0x60000008, D = 0x2 @ 180 ns +AT_T3: Received write request: A = 0x8, D = 0x2 @ 230 ns +LT_I1: Received ok response: D = 0x1 @ 230 ns +LT_I1: Send read request: A = 0x20000008 @ 230 ns +LT_T1: Received read request: A = 0x8 @ 230 ns +LT_I2: Received ok response: D = 0x1 @ 230 ns +LT_I2: Send read request: A = 0x30000008 @ 230 ns +LT_T2: Received read request: A = 0x8 @ 230 ns +AT_I2: Received ok response @ 235 ns +AT_I1: Received ok response @ 245 ns +LT_I4: Received ok response: D = 0x0 @ 250 ns (250 ns + 0 s) +LT_I4: Send read request: A = 0x40000004 @ 250 ns (250 ns + 0 s) +LT_T3: Received read request: A = 0x4 @ 250 ns +LT_I3: Received ok response @ 280 ns +LT_I3: Send read request: A = 0x60000000 @ 280 ns +AT_T3: Received read request: A = 0x0 @ 330 ns +LT_I1: Received ok response: D = 0x2 @ 330 ns +LT_I2: Received ok response: D = 0x2 @ 330 ns +AT_I2: Received ok response @ 345 ns +LT_I4: Received ok response: D = 0x1 @ 350 ns (350 ns + 0 s) +LT_I4: Send read request: A = 0x40000008 @ 350 ns (350 ns + 0 s) +LT_T3: Received read request: A = 0x8 @ 350 ns +AT_I1: Received ok response @ 355 ns +LT_I3: Received ok response: D = 0x0 @ 430 ns +LT_I3: Send read request: A = 0x60000004 @ 430 ns +AT_T3: Received read request: A = 0x4 @ 430 ns +LT_I4: Received ok response: D = 0x2 @ 450 ns (450 ns + 0 s) +AT_I2: Received ok response: D = 0x0 @ 455 ns +AT_I1: Received ok response: D = 0x0 @ 465 ns +LT_I3: Received ok response: D = 0x1 @ 530 ns +LT_I3: Send read request: A = 0x60000008 @ 530 ns +AT_T3: Received read request: A = 0x8 @ 530 ns +AT_I2: Received ok response: D = 0x1 @ 565 ns +AT_I1: Received ok response: D = 0x1 @ 575 ns +LT_I3: Received ok response: D = 0x2 @ 630 ns +AT_I2: Received ok response: D = 0x2 @ 675 ns +AT_I1: Received ok response: D = 0x2 @ 685 ns +At 685 ns status of bus1 is + Number of connected initiators: 4 + Number of connected targets: 3 + Pending requests: + 0 pending requests for target number 0 + 0 pending requests for target number 1 + 0 pending requests for target number 2 + Pending responses: + 0 pending responses for initiator number 0 + 0 pending responses for initiator number 1 + 0 pending responses for initiator number 2 + 0 pending responses for initiator number 3 + The address map is: +SimpleAddressMap: printing the sorted MAP: +key: 10000000 value: 255 +key: 1000ffff value: 0 +key: 20000000 value: 255 +key: 2000ffff value: 1 +key: 30000000 value: 255 +key: 6000ffff value: 2 +At 685 ns status of bus2 is + Number of connected initiators: 3 + Number of connected targets: 4 + Pending requests: + 0 pending requests for target number 0 + 0 pending requests for target number 1 + 0 pending requests for target number 2 + 0 pending requests for target number 3 + Pending responses: + 0 pending responses for initiator number 0 + 0 pending responses for initiator number 1 + 0 pending responses for initiator number 2 + The address map is: +SimpleAddressMap: printing the sorted MAP: +key: 30000000 value: 255 +key: 3000ffff value: 1 +key: 40000000 value: 255 +key: 4000ffff value: 3 +key: 50000000 value: 255 +key: 5000ffff value: 0 +key: 60000000 value: 255 +key: 6000ffff value: 2 diff --git a/src/systemc/tests/tlm/multi_sockets/multi_sockets.cpp b/src/systemc/tests/tlm/multi_sockets/multi_sockets.cpp new file mode 100644 index 000000000..fd60e8ba4 --- /dev/null +++ b/src/systemc/tests/tlm/multi_sockets/multi_sockets.cpp @@ -0,0 +1,73 @@ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "CoreDecouplingLTInitiator.h" +#include "SimpleATInitiator1.h" +#include "SimpleATInitiator2.h" +#include "SimpleLTInitiator1.h" +#include "SimpleLTInitiator2.h" +#include "SimpleLTInitiator3.h" +#include "SimpleATTarget1.h" +#include "SimpleATTarget2.h" +#include "SimpleLTTarget1.h" +#include "SimpleLTTarget2.h" +#include "ExplicitATTarget.h" +#include "ExplicitLTTarget.h" + +#include "MultiSocketSimpleSwitchAT.h" + +/* +Connection Map: Busses are written vertically + +AT_I1-B-AT_T1 +LT_I1-U-LT_T1 +LT_I2-S +LT_I3-1-B-LT_T2 + U-LT_T3 + AT_I2-S-AT_T2 + LT_I4-2-AT_T3 +*/ +int sc_main(int argc, char* argv[]){ + + MultiSocketSimpleSwitchAT bus1("bus1"); + MultiSocketSimpleSwitchAT bus2("bus2"); + + SimpleATInitiator1 at_i1("AT_I1", 3, 0x10000000); //AT_T1 + SimpleLTInitiator1 lt_i1("LT_I1", 3, 0x20000000); //LT_T1 + SimpleLTInitiator2 lt_i2("LT_I2", 3, 0x30000000); //LT_T2 + SimpleLTInitiator3 lt_i3("LT_I3", 3, 0x60000000); //AT_T3 + + + SimpleATInitiator2 at_i2("AT_I2", 3, 0x50000000); //AT_T2 + CoreDecouplingLTInitiator lt_i4("LT_I4", 3, 0x40000000); //LT_T3 + + SimpleATTarget1 at_t1("AT_T1"); + SimpleATTarget2 at_t2("AT_T2"); + ExplicitATTarget at_t3("AT_T3"); + SimpleLTTarget1 lt_t1("LT_T1"); + SimpleLTTarget2 lt_t2("LT_T2"); + ExplicitLTTarget lt_t3("LT_T3"); + + + at_i1.socket(bus1.target_socket); + lt_i1.socket(bus1.target_socket); + lt_i2.socket(bus1.target_socket); + lt_i3.socket(bus1.target_socket); + + at_i2.socket(bus2.target_socket); + lt_i4.socket(bus2.target_socket); + + bus1.bindTargetSocket(at_t1.socket, 0x10000000,0x1000ffff, 0xfffffff); + bus1.bindTargetSocket(lt_t1.socket, 0x20000000,0x2000ffff, 0xfffffff); + bus1.bindTargetSocket(bus2.target_socket, 0x30000000,0x6000ffff); + + bus2.bindTargetSocket(at_t2.socket, 0x50000000,0x5000ffff, 0xfffffff); + bus2.bindTargetSocket(lt_t2.socket, 0x30000000,0x3000ffff, 0xfffffff); + bus2.bindTargetSocket(at_t3.socket, 0x60000000,0x6000ffff, 0xfffffff); + bus2.bindTargetSocket(lt_t3.socket, 0x40000000,0x4000ffff, 0xfffffff); + + sc_core::sc_start(); + + bus1.dump_status(); + bus2.dump_status(); + + return 0; +} diff --git a/src/systemc/tests/tlm/multi_sockets/simpleAddressMap.h b/src/systemc/tests/tlm/multi_sockets/simpleAddressMap.h new file mode 100644 index 000000000..87ef7851e --- /dev/null +++ b/src/systemc/tests/tlm/multi_sockets/simpleAddressMap.h @@ -0,0 +1,148 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __simpleAddressMap_h__ +#define __simpleAddressMap_h__ + +#include +#include + + +//-------------------------------------------------------------------------- +/** + * Simple address map implementation for the generic protocol. + */ +//-------------------------------------------------------------------------- +class SimpleAddressMap +{ + typedef std::map mapType; + typedef std::map::iterator addressMapIterator; + +public: + SimpleAddressMap() {} + + //-------------------------------------------------------------------------- + /** + * Check for overlapping address ranges + */ + //-------------------------------------------------------------------------- + void checkSanity() + { + addressMapIterator pos; + for (pos=m_addressMap.begin();pos!=m_addressMap.end();++pos){ + if(pos->second!=255) + SC_REPORT_ERROR("SimpleAddressMap","Overlapping Address Regions."); + else + ++pos; + if(pos->second==255) + SC_REPORT_ERROR("SimpleAddressMap","Overlapping Address Regions."); + } + std::cout<<"Address check successful."<second==255) + printf("key: %x value: %i \n", (unsigned int) ((pos->first+1)>>1)-1, pos->second); + else + printf("key: %x value: %i \n", (unsigned int) (pos->first>>1)-1, pos->second); + } + } + + + //-------------------------------------------------------------------------- + /** + * Decode slave address. + * @param address_ A slave address. + * @return The decoded slave port number. On error, the value 255 is returned. + */ + //-------------------------------------------------------------------------- + unsigned int decode(sc_dt::uint64 address_) + { + addressMapIterator lbound; + + lbound=m_addressMap.lower_bound((address_+1)<<1); + if((lbound->second == 255) | (lbound==m_addressMap.end())){ + SC_REPORT_ERROR("SimpleAddressMap", "Address does not match any registered address range."); + } + else{ + return lbound->second; + } + return 255; + } + + const sc_dt::uint64& get_max(){ + if (m_addressMap.size()){ + addressMapIterator i=(m_addressMap.end()); + i--; + retval=(i->first>>1)-1; + return retval; + } + else { + SC_REPORT_ERROR("SimpleAddressMap", "get_max() called on empty address map."); + return retval; + } + } + + const sc_dt::uint64& get_min(){ + if (m_addressMap.size()){ + addressMapIterator i=(m_addressMap.begin()); + retval=((i->first+1)>>1)-1; + return retval; + } + else { + SC_REPORT_ERROR("SimpleAddressMap", "get_min() called on empty address map."); + return retval; + } + } + + //-------------------------------------------------------------------------- + /** + * Insert a slave into the address map + */ + //-------------------------------------------------------------------------- + void insert(sc_dt::uint64 baseAddress_, sc_dt::uint64 highAddress_, unsigned int portNumber_) + { + if(baseAddress_>highAddress_) + SC_REPORT_ERROR("SimpleAddressMap", "Base address must be lower than high address."); + if(portNumber_>=255) + SC_REPORT_ERROR("SimpleAddressMap", "Only ;-) 255 targets can be handled."); + m_addressMap.insert(mapType::value_type(((baseAddress_+1)<<1)-1, 255 )); + m_addressMap.insert(mapType::value_type( (highAddress_+1)<<1 ,portNumber_)); + } + +private: + sc_dt::uint64 retval; + /// the address map + mapType m_addressMap; +}; + + + + +#endif diff --git a/src/systemc/tests/tlm/nb2b_adapter/golden/nb2b_adapter.log b/src/systemc/tests/tlm/nb2b_adapter/golden/nb2b_adapter.log new file mode 100644 index 000000000..e8b02e2f3 --- /dev/null +++ b/src/systemc/tests/tlm/nb2b_adapter/golden/nb2b_adapter.log @@ -0,0 +1,2 @@ +SystemC Simulation +Unit test for nb2b adapter, PEQ, and instance-specific extensions. Should remain silent diff --git a/src/systemc/tests/tlm/nb2b_adapter/mm.h b/src/systemc/tests/tlm/nb2b_adapter/mm.h new file mode 100644 index 000000000..c91dd3ed5 --- /dev/null +++ b/src/systemc/tests/tlm/nb2b_adapter/mm.h @@ -0,0 +1,85 @@ + +// ******************************************************************* +// User-defined memory manager, which maintains a pool of transactions +// ******************************************************************* + +#include "tlm.h" + +class mm: public tlm::tlm_mm_interface +{ + typedef tlm::tlm_generic_payload gp_t; + +public: + mm() : free_list(0), empties(0) {} + + virtual ~mm() + { + gp_t* ptr; + + while (free_list) + { + ptr = free_list->trans; + + // Delete generic payload and all extensions + sc_assert(ptr); + delete ptr; + + free_list = free_list->next; + } + + while (empties) + { + access* x = empties; + empties = empties->next; + + // Delete free list access struct + delete x; + } + } + + gp_t* allocate(); + void free(gp_t* trans); + +private: + struct access + { + gp_t* trans; + access* next; + access* prev; + }; + + access* free_list; + access* empties; +}; + +mm::gp_t* mm::allocate() +{ + gp_t* ptr; + if (free_list) + { + ptr = free_list->trans; + empties = free_list; + free_list = free_list->next; + } + else + { + ptr = new gp_t(this); + } + return ptr; +} + +void mm::free(gp_t* trans) +{ + trans->reset(); // Delete auto extensions + if (!empties) + { + empties = new access; + empties->next = free_list; + empties->prev = 0; + if (free_list) + free_list->prev = empties; + } + free_list = empties; + free_list->trans = trans; + empties = free_list->prev; +} diff --git a/src/systemc/tests/tlm/nb2b_adapter/nb2b_adapter.cpp b/src/systemc/tests/tlm/nb2b_adapter/nb2b_adapter.cpp new file mode 100644 index 000000000..cde8b30bf --- /dev/null +++ b/src/systemc/tests/tlm/nb2b_adapter/nb2b_adapter.cpp @@ -0,0 +1,376 @@ + +// Unit test for nb2b adapter in simple_target_socket, PEQ, and instance-specific extensions +// Checks for bug in original version of simple_target_socket + +#include + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include "systemc" +using namespace sc_core; +using namespace sc_dt; +using namespace std; + +#include "tlm.h" +#include "tlm_utils/simple_initiator_socket.h" +#include "tlm_utils/simple_target_socket.h" +#include "tlm_utils/multi_passthrough_initiator_socket.h" +#include "tlm_utils/multi_passthrough_target_socket.h" +#include "tlm_utils/peq_with_cb_and_phase.h" +#include "tlm_utils/instance_specific_extensions.h" + +#include "mm.h" + + +int rand_ps() +{ + int n = rand() % 100; + n = n * n * n; + return n / 100; +} + + +struct Initiator: sc_module +{ + tlm_utils::simple_initiator_socket socket; + + SC_CTOR(Initiator) + : socket("socket") + , request_in_progress(0) + , m_peq(this, &Initiator::peq_cb) + { + socket.register_nb_transport_bw(this, &Initiator::nb_transport_bw); + + SC_THREAD(thread_process); + } + + void thread_process() + { + tlm::tlm_generic_payload* trans; + tlm::tlm_phase phase; + sc_time delay; + + trans = m_mm.allocate(); + trans->acquire(); + + int adr = 0; + data[0] = adr; + + trans->set_command( tlm::TLM_WRITE_COMMAND ); + trans->set_address( adr ); + trans->set_data_ptr( reinterpret_cast(&data[0]) ); + trans->set_data_length( 4 ); + trans->set_streaming_width( 4 ); + trans->set_byte_enable_ptr( 0 ); + trans->set_dmi_allowed( false ); + trans->set_response_status( tlm::TLM_INCOMPLETE_RESPONSE ); + + socket->b_transport( *trans, delay ); + + trans->release(); + + for (int i = 0; i < 5000; i++) + { + int adr = rand(); + tlm::tlm_command cmd = static_cast(rand() % 2); + if (cmd == tlm::TLM_WRITE_COMMAND) data[i % 16] = adr; + + // Grab a new transaction from the memory manager + trans = m_mm.allocate(); + trans->acquire(); + + trans->set_command( cmd ); + trans->set_address( adr ); + trans->set_data_ptr( reinterpret_cast(&data[i % 16]) ); + trans->set_data_length( 4 ); + trans->set_streaming_width( 4 ); + trans->set_byte_enable_ptr( 0 ); + trans->set_dmi_allowed( false ); + trans->set_response_status( tlm::TLM_INCOMPLETE_RESPONSE ); + + if (request_in_progress) + wait(end_request_event); + request_in_progress = trans; + phase = tlm::BEGIN_REQ; + + delay = sc_time(rand_ps(), SC_PS); + + tlm::tlm_sync_enum status; + status = socket->nb_transport_fw( *trans, phase, delay ); + previous_time = sc_time_stamp() + delay; + + if (status == tlm::TLM_UPDATED) + { + m_peq.notify( *trans, phase, delay ); + } + else if (status == tlm::TLM_COMPLETED) + { + request_in_progress = 0; + + check_transaction( *trans ); + + trans->release(); + } + wait( sc_time(rand_ps(), SC_PS) ); + } + } + + virtual tlm::tlm_sync_enum nb_transport_bw( tlm::tlm_generic_payload& trans, + tlm::tlm_phase& phase, sc_time& delay ) + { + if (sc_time_stamp() + delay < previous_time) + SC_REPORT_FATAL("TLM-2", "nb_transport_bw called with decreasing timing annotation"); + previous_time = sc_time_stamp() + delay; + + m_peq.notify( trans, phase, delay ); + return tlm::TLM_ACCEPTED; + } + + void peq_cb(tlm::tlm_generic_payload& trans, const tlm::tlm_phase& phase) + { + if (phase == tlm::END_REQ || (&trans == request_in_progress && phase == tlm::BEGIN_RESP)) + { + request_in_progress = 0; + end_request_event.notify(); + } + else if (phase == tlm::BEGIN_REQ || phase == tlm::END_RESP) + SC_REPORT_FATAL("TLM-2", "Illegal transaction phase received by initiator"); + + if (phase == tlm::BEGIN_RESP) + { + check_transaction( trans ); + + tlm::tlm_phase fw_phase = tlm::END_RESP; + sc_time delay = sc_time(rand_ps(), SC_PS); + socket->nb_transport_fw( trans, fw_phase, delay ); + previous_time = sc_time_stamp() + delay; + + trans.release(); + } + } + + void check_transaction(tlm::tlm_generic_payload& trans) + { + if ( trans.is_response_error() ) + { + char txt[100]; + sprintf(txt, "Transaction returned with error, response status = %s", + trans.get_response_string().c_str()); + SC_REPORT_ERROR("TLM-2", txt); + } + + tlm::tlm_command cmd = trans.get_command(); + sc_dt::uint64 adr = trans.get_address(); + int* ptr = reinterpret_cast( trans.get_data_ptr() ); + + if (cmd == tlm::TLM_READ_COMMAND) + sc_assert( *ptr == -int(adr) ); + } + + mm m_mm; + int data[16]; + tlm::tlm_generic_payload* request_in_progress; + sc_event end_request_event; + tlm_utils::peq_with_cb_and_phase m_peq; + sc_time previous_time; +}; + + +// Dumb interconnect that simply routes transactions through + +struct Interconnect: sc_module +{ + tlm_utils::multi_passthrough_target_socket targ_socket; + tlm_utils::multi_passthrough_initiator_socket init_socket; + + Interconnect(sc_module_name _name, unsigned int _offset) + : sc_module(_name) + , targ_socket("targ_socket") + , init_socket("init_socket") + , offset(_offset) + { + targ_socket.register_b_transport (this, &Interconnect::b_transport); + targ_socket.register_nb_transport_fw (this, &Interconnect::nb_transport_fw); + targ_socket.register_get_direct_mem_ptr (this, &Interconnect::get_direct_mem_ptr); + targ_socket.register_transport_dbg (this, &Interconnect::transport_dbg); + init_socket.register_nb_transport_bw (this, &Interconnect::nb_transport_bw); + init_socket.register_invalidate_direct_mem_ptr(this, &Interconnect::invalidate_direct_mem_ptr); + } + + void end_of_elaboration() + { + if ( targ_socket.size() != init_socket.size() ) + SC_REPORT_ERROR("TLM-2", "#initiators != #targets in Interconnect"); + } + + virtual void b_transport( int id, tlm::tlm_generic_payload& trans, sc_time& delay ) + { + unsigned int target = (id + offset) % init_socket.size(); // Route-through + + init_socket[target]->b_transport( trans, delay ); + } + + + struct route_extension: tlm_utils::instance_specific_extension + { + int id; + }; + + tlm_utils::instance_specific_extension_accessor accessor; + + + virtual tlm::tlm_sync_enum nb_transport_fw( int id, tlm::tlm_generic_payload& trans, + tlm::tlm_phase& phase, sc_time& delay ) + { + route_extension* ext = 0; + if (phase == tlm::BEGIN_REQ) + { + ext = new route_extension; + ext->id = id; + accessor(trans).set_extension(ext); + } + + unsigned int target = (id + offset) % init_socket.size(); // Route-through + + tlm::tlm_sync_enum status; + status = init_socket[target]->nb_transport_fw( trans, phase, delay ); + + if (status == tlm::TLM_COMPLETED) + { + accessor(trans).clear_extension(ext); + delete ext; + } + + return status; + } + + virtual bool get_direct_mem_ptr( int id, tlm::tlm_generic_payload& trans, + tlm::tlm_dmi& dmi_data) + { + unsigned int target = (id + offset) % init_socket.size(); // Route-through + + bool status = init_socket[target]->get_direct_mem_ptr( trans, dmi_data ); + + return status; + } + + virtual unsigned int transport_dbg( int id, tlm::tlm_generic_payload& trans ) + { + unsigned int target = (id + offset) % init_socket.size(); // Route-through + + return init_socket[target]->transport_dbg( trans ); + } + + + virtual tlm::tlm_sync_enum nb_transport_bw( int id, tlm::tlm_generic_payload& trans, + tlm::tlm_phase& phase, sc_time& delay ) + { + route_extension* ext = 0; + accessor(trans).get_extension(ext); + sc_assert(ext); + + tlm::tlm_sync_enum status; + status = targ_socket[ ext->id ]->nb_transport_bw( trans, phase, delay ); + + if (status == tlm::TLM_COMPLETED) + { + accessor(trans).clear_extension(ext); + delete ext; + } + + return status; + } + + virtual void invalidate_direct_mem_ptr( int id, sc_dt::uint64 start_range, + sc_dt::uint64 end_range ) + { + for (unsigned int i = 0; i < targ_socket.size(); i++) + targ_socket[i]->invalidate_direct_mem_ptr(start_range, end_range); + } + + unsigned int offset; +}; + + +struct Target: sc_module +{ + tlm_utils::simple_target_socket socket; + + SC_CTOR(Target) + : socket("socket") + { + socket.register_b_transport (this, &Target::b_transport); + } + + virtual void b_transport( tlm::tlm_generic_payload& trans, sc_time& delay ) + { + execute_transaction(trans); + } + + + void execute_transaction(tlm::tlm_generic_payload& trans) + { + tlm::tlm_command cmd = trans.get_command(); + sc_dt::uint64 adr = trans.get_address(); + unsigned char* ptr = trans.get_data_ptr(); + unsigned int len = trans.get_data_length(); + unsigned char* byt = trans.get_byte_enable_ptr(); + unsigned int wid = trans.get_streaming_width(); + + if (byt != 0) { + trans.set_response_status( tlm::TLM_BYTE_ENABLE_ERROR_RESPONSE ); + return; + } + if (len > 4 || wid < len) { + trans.set_response_status( tlm::TLM_BURST_ERROR_RESPONSE ); + return; + } + + if ( cmd == tlm::TLM_READ_COMMAND ) + { + *reinterpret_cast(ptr) = -int(adr); + } + else if ( cmd == tlm::TLM_WRITE_COMMAND ) + { + sc_assert( *reinterpret_cast(ptr) == adr ); + } + + trans.set_response_status( tlm::TLM_OK_RESPONSE ); + } + +}; + + +SC_MODULE(Top) +{ + Initiator *initiator1; + Initiator *initiator2; + Interconnect *interconnect; + Target *target1; + Target *target2; + + SC_CTOR(Top) + { + initiator1 = new Initiator ("initiator1"); + initiator2 = new Initiator ("initiator2"); + interconnect = new Interconnect("interconnect", 1); + target1 = new Target ("target1"); + target2 = new Target ("target2"); + + initiator1->socket.bind(interconnect->targ_socket); + initiator2->socket.bind(interconnect->targ_socket); + interconnect->init_socket.bind(target1->socket); + interconnect->init_socket.bind(target2->socket); + } +}; + + +int sc_main(int argc, char* argv[]) +{ + cout << "Unit test for nb2b adapter, PEQ, and instance-specific extensions. Should remain silent\n"; + + Top top("top"); + sc_start(); + return 0; +} + diff --git a/src/systemc/tests/tlm/p2p/BaseSocketLT/base_socket_LT.cpp b/src/systemc/tests/tlm/p2p/BaseSocketLT/base_socket_LT.cpp new file mode 100644 index 000000000..9f527fd53 --- /dev/null +++ b/src/systemc/tests/tlm/p2p/BaseSocketLT/base_socket_LT.cpp @@ -0,0 +1,36 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#include "tlm.h" + +#include "SimpleLTInitiator1.h" +#include "SimpleLTTarget1.h" + +int sc_main(int argc, char* argv[]) +{ + SimpleLTInitiator1 initiator("initiator"); + SimpleLTTarget1 target("target"); + + initiator.socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/p2p/BaseSocketLT/golden/base_socket_LT.log b/src/systemc/tests/tlm/p2p/BaseSocketLT/golden/base_socket_LT.log new file mode 100644 index 000000000..186648cba --- /dev/null +++ b/src/systemc/tests/tlm/p2p/BaseSocketLT/golden/base_socket_LT.log @@ -0,0 +1,33 @@ +SystemC Simulation +initiator: Send write request: A = 0x0, D = 0x0 @ 0 s +target: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator: Received ok response @ 10 ns +initiator: Send write request: A = 0x4, D = 0x1 @ 10 ns +target: Received write request: A = 0x4, D = 0x1 @ 10 ns +initiator: Received ok response @ 20 ns +initiator: Send write request: A = 0x8, D = 0x2 @ 20 ns +target: Received write request: A = 0x8, D = 0x2 @ 20 ns +initiator: Received ok response @ 30 ns +initiator: Send write request: A = 0xc, D = 0x3 @ 30 ns +target: Received write request: A = 0xc, D = 0x3 @ 30 ns +initiator: Received ok response @ 40 ns +initiator: Send write request: A = 0x10, D = 0x4 @ 40 ns +target: Received write request: A = 0x10, D = 0x4 @ 40 ns +initiator: Received ok response @ 50 ns +initiator: Send read request: A = 0x0 @ 50 ns +target: Received read request: A = 0x0 @ 50 ns +initiator: Received ok response: D = 0x0 @ 150 ns +initiator: Send read request: A = 0x4 @ 150 ns +target: Received read request: A = 0x4 @ 150 ns +initiator: Received ok response: D = 0x1 @ 250 ns +initiator: Send read request: A = 0x8 @ 250 ns +target: Received read request: A = 0x8 @ 250 ns +initiator: Received ok response: D = 0x2 @ 350 ns +initiator: Send read request: A = 0xc @ 350 ns +target: Received read request: A = 0xc @ 350 ns +initiator: Received ok response: D = 0x3 @ 450 ns +initiator: Send read request: A = 0x10 @ 450 ns +target: Received read request: A = 0x10 @ 450 ns +initiator: Received ok response: D = 0x4 @ 550 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/tlm/p2p/CoreDecoupling/core_decoupling.cpp b/src/systemc/tests/tlm/p2p/CoreDecoupling/core_decoupling.cpp new file mode 100644 index 000000000..aa68951f3 --- /dev/null +++ b/src/systemc/tests/tlm/p2p/CoreDecoupling/core_decoupling.cpp @@ -0,0 +1,36 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "tlm.h" + +#include "CoreDecouplingLTInitiator.h" +#include "ExplicitLTTarget.h" + +int sc_main(int argc, char* argv[]) +{ + CoreDecouplingLTInitiator initiator("initiator", 10); + ExplicitLTTarget target("target"); + + initiator.socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/p2p/CoreDecoupling/golden/core_decoupling.log b/src/systemc/tests/tlm/p2p/CoreDecoupling/golden/core_decoupling.log new file mode 100644 index 000000000..b5a9e8314 --- /dev/null +++ b/src/systemc/tests/tlm/p2p/CoreDecoupling/golden/core_decoupling.log @@ -0,0 +1,66 @@ +SystemC Simulation +initiator: Send write request: A = 0x0, D = 0x0 @ 0 s (0 s + 0 s) +target: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator: Received ok response @ 50 ns (50 ns + 0 s) +initiator: Send write request: A = 0x4, D = 0x1 @ 50 ns (50 ns + 0 s) +target: Received write request: A = 0x4, D = 0x1 @ 50 ns +initiator: Received ok response @ 100 ns (100 ns + 0 s) +initiator: Send write request: A = 0x8, D = 0x2 @ 100 ns (100 ns + 0 s) +target: Received write request: A = 0x8, D = 0x2 @ 100 ns +initiator: Received ok response @ 150 ns (150 ns + 0 s) +initiator: Send write request: A = 0xc, D = 0x3 @ 150 ns (150 ns + 0 s) +target: Received write request: A = 0xc, D = 0x3 @ 150 ns +initiator: Received ok response @ 200 ns (200 ns + 0 s) +initiator: Send write request: A = 0x10, D = 0x4 @ 200 ns (200 ns + 0 s) +target: Received write request: A = 0x10, D = 0x4 @ 200 ns +initiator: Received ok response @ 250 ns (250 ns + 0 s) +initiator: Send write request: A = 0x14, D = 0x5 @ 250 ns (250 ns + 0 s) +target: Received write request: A = 0x14, D = 0x5 @ 250 ns +initiator: Received ok response @ 300 ns (300 ns + 0 s) +initiator: Send write request: A = 0x18, D = 0x6 @ 300 ns (300 ns + 0 s) +target: Received write request: A = 0x18, D = 0x6 @ 300 ns +initiator: Received ok response @ 350 ns (350 ns + 0 s) +initiator: Send write request: A = 0x1c, D = 0x7 @ 350 ns (350 ns + 0 s) +target: Received write request: A = 0x1c, D = 0x7 @ 350 ns +initiator: Received ok response @ 400 ns (400 ns + 0 s) +initiator: Send write request: A = 0x20, D = 0x8 @ 400 ns (400 ns + 0 s) +target: Received write request: A = 0x20, D = 0x8 @ 400 ns +initiator: Received ok response @ 450 ns (450 ns + 0 s) +initiator: Send write request: A = 0x24, D = 0x9 @ 450 ns (450 ns + 0 s) +target: Received write request: A = 0x24, D = 0x9 @ 450 ns +Sync'ing... +initiator: Received ok response @ 500 ns (500 ns + 0 s) +initiator: Send read request: A = 0x0 @ 500 ns (500 ns + 0 s) +target: Received read request: A = 0x0 @ 500 ns +initiator: Received ok response: D = 0x0 @ 600 ns (500 ns + 100 ns) +initiator: Send read request: A = 0x4 @ 600 ns (500 ns + 100 ns) +target: Received read request: A = 0x4 @ 500 ns +initiator: Received ok response: D = 0x1 @ 700 ns (500 ns + 200 ns) +initiator: Send read request: A = 0x8 @ 700 ns (500 ns + 200 ns) +target: Received read request: A = 0x8 @ 500 ns +initiator: Received ok response: D = 0x2 @ 800 ns (500 ns + 300 ns) +initiator: Send read request: A = 0xc @ 800 ns (500 ns + 300 ns) +target: Received read request: A = 0xc @ 500 ns +initiator: Received ok response: D = 0x3 @ 900 ns (500 ns + 400 ns) +initiator: Send read request: A = 0x10 @ 900 ns (500 ns + 400 ns) +target: Received read request: A = 0x10 @ 500 ns +Sync'ing... +initiator: Received ok response: D = 0x4 @ 1 us (1 us + 0 s) +initiator: Send read request: A = 0x14 @ 1 us (1 us + 0 s) +target: Received read request: A = 0x14 @ 1 us +initiator: Received ok response: D = 0x5 @ 1100 ns (1 us + 100 ns) +initiator: Send read request: A = 0x18 @ 1100 ns (1 us + 100 ns) +target: Received read request: A = 0x18 @ 1 us +initiator: Received ok response: D = 0x6 @ 1200 ns (1 us + 200 ns) +initiator: Send read request: A = 0x1c @ 1200 ns (1 us + 200 ns) +target: Received read request: A = 0x1c @ 1 us +initiator: Received ok response: D = 0x7 @ 1300 ns (1 us + 300 ns) +initiator: Send read request: A = 0x20 @ 1300 ns (1 us + 300 ns) +target: Received read request: A = 0x20 @ 1 us +initiator: Received ok response: D = 0x8 @ 1400 ns (1 us + 400 ns) +initiator: Send read request: A = 0x24 @ 1400 ns (1 us + 400 ns) +target: Received read request: A = 0x24 @ 1 us +Sync'ing... +initiator: Received ok response: D = 0x9 @ 1500 ns (1500 ns + 0 s) + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/tlm/p2p/EndEventLT/end_event_LT.cpp b/src/systemc/tests/tlm/p2p/EndEventLT/end_event_LT.cpp new file mode 100644 index 000000000..1aca86b87 --- /dev/null +++ b/src/systemc/tests/tlm/p2p/EndEventLT/end_event_LT.cpp @@ -0,0 +1,36 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#include "tlm.h" + +#include "SimpleLTInitiator3.h" +#include "SimpleLTTarget2.h" + +int sc_main(int argc, char* argv[]) +{ + SimpleLTInitiator3 initiator("initiator"); + SimpleLTTarget2 target("target"); + + initiator.socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/p2p/EndEventLT/golden/end_event_LT.log b/src/systemc/tests/tlm/p2p/EndEventLT/golden/end_event_LT.log new file mode 100644 index 000000000..186648cba --- /dev/null +++ b/src/systemc/tests/tlm/p2p/EndEventLT/golden/end_event_LT.log @@ -0,0 +1,33 @@ +SystemC Simulation +initiator: Send write request: A = 0x0, D = 0x0 @ 0 s +target: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator: Received ok response @ 10 ns +initiator: Send write request: A = 0x4, D = 0x1 @ 10 ns +target: Received write request: A = 0x4, D = 0x1 @ 10 ns +initiator: Received ok response @ 20 ns +initiator: Send write request: A = 0x8, D = 0x2 @ 20 ns +target: Received write request: A = 0x8, D = 0x2 @ 20 ns +initiator: Received ok response @ 30 ns +initiator: Send write request: A = 0xc, D = 0x3 @ 30 ns +target: Received write request: A = 0xc, D = 0x3 @ 30 ns +initiator: Received ok response @ 40 ns +initiator: Send write request: A = 0x10, D = 0x4 @ 40 ns +target: Received write request: A = 0x10, D = 0x4 @ 40 ns +initiator: Received ok response @ 50 ns +initiator: Send read request: A = 0x0 @ 50 ns +target: Received read request: A = 0x0 @ 50 ns +initiator: Received ok response: D = 0x0 @ 150 ns +initiator: Send read request: A = 0x4 @ 150 ns +target: Received read request: A = 0x4 @ 150 ns +initiator: Received ok response: D = 0x1 @ 250 ns +initiator: Send read request: A = 0x8 @ 250 ns +target: Received read request: A = 0x8 @ 250 ns +initiator: Received ok response: D = 0x2 @ 350 ns +initiator: Send read request: A = 0xc @ 350 ns +target: Received read request: A = 0xc @ 350 ns +initiator: Received ok response: D = 0x3 @ 450 ns +initiator: Send read request: A = 0x10 @ 450 ns +target: Received read request: A = 0x10 @ 450 ns +initiator: Received ok response: D = 0x4 @ 550 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/tlm/p2p/HierarchicalSocket/SimpleInitiatorWrapper.h b/src/systemc/tests/tlm/p2p/HierarchicalSocket/SimpleInitiatorWrapper.h new file mode 100644 index 000000000..41b982ecd --- /dev/null +++ b/src/systemc/tests/tlm/p2p/HierarchicalSocket/SimpleInitiatorWrapper.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __SIMPLE_INITIATOR_WRAPPER_H__ +#define __SIMPLE_INITIATOR_WRAPPER_H__ + +#include "tlm.h" +#include "SimpleLTInitiator1.h" + +class SimpleInitiatorWrapper : public sc_core::sc_module +{ +public: + typedef tlm::tlm_generic_payload transaction_type; + typedef tlm::tlm_phase phase_type; + typedef tlm::tlm_sync_enum sync_enum_type; + typedef tlm::tlm_fw_transport_if<> fw_interface_type; + typedef tlm::tlm_bw_transport_if<> bw_interface_type; + typedef tlm::tlm_initiator_socket<> initiator_socket_type; + +public: + initiator_socket_type socket; + +public: + SimpleInitiatorWrapper(sc_core::sc_module_name name) : + sc_core::sc_module(name), + socket("socket"), + child("child") + { + child.socket(socket); + } + +protected: + SimpleLTInitiator1 child; + +}; + +#endif + + diff --git a/src/systemc/tests/tlm/p2p/HierarchicalSocket/SimpleTargetWrapper.h b/src/systemc/tests/tlm/p2p/HierarchicalSocket/SimpleTargetWrapper.h new file mode 100644 index 000000000..16212515c --- /dev/null +++ b/src/systemc/tests/tlm/p2p/HierarchicalSocket/SimpleTargetWrapper.h @@ -0,0 +1,55 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __SIMPLE_TARGET_WRAPPER_H__ +#define __SIMPLE_TARGET_WRAPPER_H__ + +#include "tlm.h" +#include "SimpleLTTarget1.h" + +class SimpleTargetWrapper : public sc_core::sc_module +{ +public: + typedef tlm::tlm_generic_payload transaction_type; + typedef tlm::tlm_phase phase_type; + typedef tlm::tlm_sync_enum sync_enum_type; + typedef tlm::tlm_fw_transport_if<> fw_interface_type; + typedef tlm::tlm_bw_transport_if<> bw_interface_type; + typedef tlm::tlm_target_socket<> target_socket_type; + +public: + target_socket_type socket; + +public: + SimpleTargetWrapper(sc_core::sc_module_name name) : + sc_core::sc_module(name), + socket("socket"), + child("child") + { + socket(child.socket); + } + +protected: + SimpleLTTarget1 child; + +}; + +#endif + + diff --git a/src/systemc/tests/tlm/p2p/HierarchicalSocket/golden/hierarchical_socket.log b/src/systemc/tests/tlm/p2p/HierarchicalSocket/golden/hierarchical_socket.log new file mode 100644 index 000000000..137330634 --- /dev/null +++ b/src/systemc/tests/tlm/p2p/HierarchicalSocket/golden/hierarchical_socket.log @@ -0,0 +1,33 @@ +SystemC Simulation +initiatorWrapper.child: Send write request: A = 0x0, D = 0x0 @ 0 s +targetWrapper.child: Received write request: A = 0x0, D = 0x0 @ 0 s +initiatorWrapper.child: Received ok response @ 10 ns +initiatorWrapper.child: Send write request: A = 0x4, D = 0x1 @ 10 ns +targetWrapper.child: Received write request: A = 0x4, D = 0x1 @ 10 ns +initiatorWrapper.child: Received ok response @ 20 ns +initiatorWrapper.child: Send write request: A = 0x8, D = 0x2 @ 20 ns +targetWrapper.child: Received write request: A = 0x8, D = 0x2 @ 20 ns +initiatorWrapper.child: Received ok response @ 30 ns +initiatorWrapper.child: Send write request: A = 0xc, D = 0x3 @ 30 ns +targetWrapper.child: Received write request: A = 0xc, D = 0x3 @ 30 ns +initiatorWrapper.child: Received ok response @ 40 ns +initiatorWrapper.child: Send write request: A = 0x10, D = 0x4 @ 40 ns +targetWrapper.child: Received write request: A = 0x10, D = 0x4 @ 40 ns +initiatorWrapper.child: Received ok response @ 50 ns +initiatorWrapper.child: Send read request: A = 0x0 @ 50 ns +targetWrapper.child: Received read request: A = 0x0 @ 50 ns +initiatorWrapper.child: Received ok response: D = 0x0 @ 150 ns +initiatorWrapper.child: Send read request: A = 0x4 @ 150 ns +targetWrapper.child: Received read request: A = 0x4 @ 150 ns +initiatorWrapper.child: Received ok response: D = 0x1 @ 250 ns +initiatorWrapper.child: Send read request: A = 0x8 @ 250 ns +targetWrapper.child: Received read request: A = 0x8 @ 250 ns +initiatorWrapper.child: Received ok response: D = 0x2 @ 350 ns +initiatorWrapper.child: Send read request: A = 0xc @ 350 ns +targetWrapper.child: Received read request: A = 0xc @ 350 ns +initiatorWrapper.child: Received ok response: D = 0x3 @ 450 ns +initiatorWrapper.child: Send read request: A = 0x10 @ 450 ns +targetWrapper.child: Received read request: A = 0x10 @ 450 ns +initiatorWrapper.child: Received ok response: D = 0x4 @ 550 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/tlm/p2p/HierarchicalSocket/hierarchical_socket.cpp b/src/systemc/tests/tlm/p2p/HierarchicalSocket/hierarchical_socket.cpp new file mode 100644 index 000000000..be2ec433c --- /dev/null +++ b/src/systemc/tests/tlm/p2p/HierarchicalSocket/hierarchical_socket.cpp @@ -0,0 +1,40 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +//#include + +//#include + +#include "tlm.h" + +#include "SimpleInitiatorWrapper.h" +#include "SimpleTargetWrapper.h" + +int sc_main(int argc, char* argv[]) +{ + SimpleInitiatorWrapper initiator("initiatorWrapper"); + SimpleTargetWrapper target("targetWrapper"); + + initiator.socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/p2p/RegisterSocketProcessLT/golden/register_socket_process_LT.log b/src/systemc/tests/tlm/p2p/RegisterSocketProcessLT/golden/register_socket_process_LT.log new file mode 100644 index 000000000..186648cba --- /dev/null +++ b/src/systemc/tests/tlm/p2p/RegisterSocketProcessLT/golden/register_socket_process_LT.log @@ -0,0 +1,33 @@ +SystemC Simulation +initiator: Send write request: A = 0x0, D = 0x0 @ 0 s +target: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator: Received ok response @ 10 ns +initiator: Send write request: A = 0x4, D = 0x1 @ 10 ns +target: Received write request: A = 0x4, D = 0x1 @ 10 ns +initiator: Received ok response @ 20 ns +initiator: Send write request: A = 0x8, D = 0x2 @ 20 ns +target: Received write request: A = 0x8, D = 0x2 @ 20 ns +initiator: Received ok response @ 30 ns +initiator: Send write request: A = 0xc, D = 0x3 @ 30 ns +target: Received write request: A = 0xc, D = 0x3 @ 30 ns +initiator: Received ok response @ 40 ns +initiator: Send write request: A = 0x10, D = 0x4 @ 40 ns +target: Received write request: A = 0x10, D = 0x4 @ 40 ns +initiator: Received ok response @ 50 ns +initiator: Send read request: A = 0x0 @ 50 ns +target: Received read request: A = 0x0 @ 50 ns +initiator: Received ok response: D = 0x0 @ 150 ns +initiator: Send read request: A = 0x4 @ 150 ns +target: Received read request: A = 0x4 @ 150 ns +initiator: Received ok response: D = 0x1 @ 250 ns +initiator: Send read request: A = 0x8 @ 250 ns +target: Received read request: A = 0x8 @ 250 ns +initiator: Received ok response: D = 0x2 @ 350 ns +initiator: Send read request: A = 0xc @ 350 ns +target: Received read request: A = 0xc @ 350 ns +initiator: Received ok response: D = 0x3 @ 450 ns +initiator: Send read request: A = 0x10 @ 450 ns +target: Received read request: A = 0x10 @ 450 ns +initiator: Received ok response: D = 0x4 @ 550 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/tlm/p2p/RegisterSocketProcessLT/register_socket_process_LT.cpp b/src/systemc/tests/tlm/p2p/RegisterSocketProcessLT/register_socket_process_LT.cpp new file mode 100644 index 000000000..33b73faff --- /dev/null +++ b/src/systemc/tests/tlm/p2p/RegisterSocketProcessLT/register_socket_process_LT.cpp @@ -0,0 +1,35 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#include "tlm.h" + +#include "SimpleLTInitiator2.h" +#include "SimpleLTTarget2.h" +int sc_main(int argc, char* argv[]) +{ + SimpleLTInitiator2 initiator("initiator"); + SimpleLTTarget2 target("target"); + + initiator.socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/p2p/SimpleAT/golden/simple_AT.log b/src/systemc/tests/tlm/p2p/SimpleAT/golden/simple_AT.log new file mode 100644 index 000000000..e64d5ce44 --- /dev/null +++ b/src/systemc/tests/tlm/p2p/SimpleAT/golden/simple_AT.log @@ -0,0 +1,33 @@ +SystemC Simulation +initiator: Send write request: A = 0x0, D = 0x0 @ 0 s +target: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator: Send write request: A = 0x4, D = 0x1 @ 25 ns +target: Received write request: A = 0x4, D = 0x1 @ 25 ns +initiator: Send write request: A = 0x8, D = 0x2 @ 50 ns +target: Received write request: A = 0x8, D = 0x2 @ 50 ns +initiator: Send write request: A = 0xc, D = 0x3 @ 75 ns +target: Received write request: A = 0xc, D = 0x3 @ 75 ns +initiator: Send write request: A = 0x10, D = 0x4 @ 100 ns +target: Received write request: A = 0x10, D = 0x4 @ 100 ns +initiator: Send read request: A = 0x0 @ 125 ns +target: Received read request: A = 0x0 @ 125 ns +initiator: Received ok response @ 135 ns +initiator: Send read request: A = 0x4 @ 150 ns +target: Received read request: A = 0x4 @ 150 ns +initiator: Send read request: A = 0x8 @ 175 ns +target: Received read request: A = 0x8 @ 175 ns +initiator: Send read request: A = 0xc @ 200 ns +target: Received read request: A = 0xc @ 200 ns +initiator: Send read request: A = 0x10 @ 225 ns +target: Received read request: A = 0x10 @ 225 ns +initiator: Received ok response @ 245 ns +initiator: Received ok response @ 355 ns +initiator: Received ok response @ 465 ns +initiator: Received ok response @ 575 ns +initiator: Received ok response: D = 0x0 @ 685 ns +initiator: Received ok response: D = 0x1 @ 795 ns +initiator: Received ok response: D = 0x2 @ 905 ns +initiator: Received ok response: D = 0x3 @ 1015 ns +initiator: Received ok response: D = 0x4 @ 1125 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/tlm/p2p/SimpleAT/simple_AT.cpp b/src/systemc/tests/tlm/p2p/SimpleAT/simple_AT.cpp new file mode 100644 index 000000000..92e920369 --- /dev/null +++ b/src/systemc/tests/tlm/p2p/SimpleAT/simple_AT.cpp @@ -0,0 +1,36 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "tlm.h" + +#include "SimpleATInitiator1.h" +#include "SimpleATTarget1.h" + +int sc_main(int argc, char* argv[]) +{ + SimpleATInitiator1 initiator("initiator"); + SimpleATTarget1 target("target"); + + initiator.socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/p2p/SimpleAT_TA/golden/simple_AT_TA.log b/src/systemc/tests/tlm/p2p/SimpleAT_TA/golden/simple_AT_TA.log new file mode 100644 index 000000000..4970861d2 --- /dev/null +++ b/src/systemc/tests/tlm/p2p/SimpleAT_TA/golden/simple_AT_TA.log @@ -0,0 +1,33 @@ +SystemC Simulation +initiator: Send write request: A = 0x0, D = 0x0 @ 0 s +target: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator: Send write request: A = 0x4, D = 0x1 @ 25 ns +target: Received write request: A = 0x4, D = 0x1 @ 25 ns +initiator: Send write request: A = 0x8, D = 0x2 @ 50 ns +target: Received write request: A = 0x8, D = 0x2 @ 50 ns +initiator: Send write request: A = 0xc, D = 0x3 @ 75 ns +target: Received write request: A = 0xc, D = 0x3 @ 75 ns +initiator: Send write request: A = 0x10, D = 0x4 @ 100 ns +target: Received write request: A = 0x10, D = 0x4 @ 100 ns +initiator: Received ok response @ 125 ns +initiator: Send read request: A = 0x0 @ 125 ns +target: Received read request: A = 0x0 @ 125 ns +initiator: Send read request: A = 0x4 @ 150 ns +target: Received read request: A = 0x4 @ 150 ns +initiator: Send read request: A = 0x8 @ 175 ns +target: Received read request: A = 0x8 @ 175 ns +initiator: Send read request: A = 0xc @ 200 ns +target: Received read request: A = 0xc @ 200 ns +initiator: Send read request: A = 0x10 @ 225 ns +target: Received read request: A = 0x10 @ 225 ns +initiator: Received ok response @ 235 ns +initiator: Received ok response @ 345 ns +initiator: Received ok response @ 455 ns +initiator: Received ok response @ 565 ns +initiator: Received ok response: D = 0x0 @ 675 ns +initiator: Received ok response: D = 0x1 @ 785 ns +initiator: Received ok response: D = 0x2 @ 895 ns +initiator: Received ok response: D = 0x3 @ 1005 ns +initiator: Received ok response: D = 0x4 @ 1115 ns + +Info: /OSCI/SystemC: Simulation stopped by user. diff --git a/src/systemc/tests/tlm/p2p/SimpleAT_TA/simple_AT_TA.cpp b/src/systemc/tests/tlm/p2p/SimpleAT_TA/simple_AT_TA.cpp new file mode 100644 index 000000000..909ca9390 --- /dev/null +++ b/src/systemc/tests/tlm/p2p/SimpleAT_TA/simple_AT_TA.cpp @@ -0,0 +1,36 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "tlm.h" + +#include "SimpleATInitiator2.h" +#include "SimpleATTarget2.h" + +int sc_main(int argc, char* argv[]) +{ + SimpleATInitiator2 initiator("initiator"); + SimpleATTarget2 target("target"); + + initiator.socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/static_extensions/ext2gp/SimpleLTInitiator_ext.h b/src/systemc/tests/tlm/static_extensions/ext2gp/SimpleLTInitiator_ext.h new file mode 100644 index 000000000..1d10e0785 --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/ext2gp/SimpleLTInitiator_ext.h @@ -0,0 +1,343 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __SIMPLE_LT_INITIATOR_EXT_H__ +#define __SIMPLE_LT_INITIATOR_EXT_H__ + +#include "tlm.h" +#include "tlm_utils/simple_initiator_socket.h" +#include "my_extension.h" + +#include +#include +#include +#include +#include + +class SimpleLTInitiator_ext : public sc_core::sc_module +{ +public: + typedef tlm::tlm_generic_payload transaction_type; + typedef tlm::tlm_dmi dmi_type; + typedef tlm::tlm_phase phase_type; + typedef tlm::tlm_sync_enum sync_enum_type; + typedef tlm_utils::simple_initiator_socket initiator_socket_type; + +public: + initiator_socket_type socket; + +public: + SC_HAS_PROCESS(SimpleLTInitiator_ext); + SimpleLTInitiator_ext(sc_core::sc_module_name name, + unsigned int nrOfTransactions = 0x5, + unsigned int baseAddress = 0x0) : + sc_core::sc_module(name), + socket("socket"), + mNrOfTransactions(nrOfTransactions), + mBaseAddress(baseAddress), + mTransactionCount(0) + { + invalidate(mDMIData); + + // register nb_transport method + socket.register_nb_transport_bw(this, &SimpleLTInitiator_ext::myNBTransport); + socket.register_invalidate_direct_mem_ptr(this, &SimpleLTInitiator_ext::invalidate_direct_mem_ptr); + + // Initiator thread + SC_THREAD(run); + + } + + bool initTransaction(transaction_type& trans) + { + // initialize DMI hint: + trans.set_dmi_allowed(false); + + if (mTransactionCount < mNrOfTransactions) + { + trans.set_address(mBaseAddress + 4*mTransactionCount); + mData = mTransactionCount; + trans.set_data_ptr(reinterpret_cast(&mData)); + trans.set_command(tlm::TLM_WRITE_COMMAND); + + } + else if (mTransactionCount < 2 * mNrOfTransactions) + { + trans.set_address(mBaseAddress + 4*(mTransactionCount-mNrOfTransactions)); + mData = 0; + trans.set_data_ptr(reinterpret_cast(&mData)); + trans.set_command(tlm::TLM_READ_COMMAND); + + } + else + { + return false; + } + + ++mTransactionCount; + return true; + } + + void logStartTransation(transaction_type& trans) + { + if (trans.get_command() == tlm::TLM_WRITE_COMMAND) + { + std::cout << name() << ": Send write request: A = 0x" + << std::hex << (unsigned int)trans.get_address() + << ", D = 0x" << mData << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + + } + else + { + std::cout << name() << ": Send read request: A = 0x" + << std::hex << (unsigned int)trans.get_address() + << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + } + } + + void logEndTransaction(transaction_type& trans) + { + if (trans.get_response_status() != tlm::TLM_OK_RESPONSE) { + std::cout << name() << ": Received error response @ " + << sc_core::sc_time_stamp() << std::endl; + } + else + { + std::cout << name() << ": Received ok response"; + if (trans.get_command() == tlm::TLM_READ_COMMAND) { + std::cout << ": D = 0x" << std::hex << mData << std::dec; + } + std::cout << " @ " << sc_core::sc_time_stamp() << std::endl; + } + } + + void run() + { + transaction_type trans; + phase_type phase; + sc_core::sc_time t; + // make sure that our transaction has the proper extension: + my_extension* tmp_ext = new my_extension(); + tmp_ext->m_data = 11; + + trans.set_extension(tmp_ext); + + while (initTransaction(trans)) + { + // Create transaction and initialise phase and t + phase = tlm::BEGIN_REQ; + t = sc_core::SC_ZERO_TIME; + + logStartTransation(trans); + /////////////////////////////////////////////////////////// + // DMI handling: + // We use the DMI hint to check if it makes sense to ask for + // DMI pointers. The pattern is: + // - if the address is covered by a DMI region do a DMI access + // - otherwise do a normal transaction + // -> check if we get a DMI hint and acquire the DMI pointers if it + // is set + /////////////////////////////////////////////////////////// + + // Check if the address is covered by our DMI region + if ( (trans.get_address() >= mDMIData.get_start_address()) && + (trans.get_address() <= mDMIData.get_end_address()) ) + { + // We can handle the data here. As the logEndTransaction is + // assuming something to happen in the data structure, we really + // need to do this: + trans.set_response_status(tlm::TLM_OK_RESPONSE); + sc_dt::uint64 tmp = trans.get_address() - mDMIData.get_start_address(); + if (trans.get_command() == tlm::TLM_WRITE_COMMAND) { + *(unsigned int*)&mDMIData.get_dmi_ptr()[tmp] = mData; + + } else { + mData = *(unsigned int*)&mDMIData.get_dmi_ptr()[tmp]; + } + + // Do the wait immediately. Note that doing the wait here eats + // almost all the performance anyway, so we only gain something + // if we're using temporal decoupling. + if (trans.get_command() == tlm::TLM_WRITE_COMMAND) { + wait(mDMIData.get_write_latency()); + + } else { + wait(mDMIData.get_read_latency()); + } + + logEndTransaction(trans); + + } else { // we need a full transaction + switch (socket->nb_transport_fw(trans, phase, t)) { + case tlm::TLM_COMPLETED: + // Transaction Finished, wait for the returned delay + wait(t); + break; + + case tlm::TLM_ACCEPTED: + case tlm::TLM_UPDATED: + // Transaction not yet finished, wait for the end of it + wait(mEndEvent); + break; + + default: + sc_assert(0); exit(1); + }; + + logEndTransaction(trans); + + // Acquire DMI pointer if one is available: + if (trans.is_dmi_allowed()) + { + trans.set_write(); + dmi_type tmp; + if (socket->get_direct_mem_ptr(trans, + tmp)) + { + // FIXME: No support for separate read/write ranges + sc_assert(tmp.is_read_write_allowed()); + mDMIData = tmp; + } + } + } + } + delete tmp_ext; + wait(); + + } + + sync_enum_type myNBTransport(transaction_type& trans, + phase_type& phase, + sc_core::sc_time& t) + { + switch (phase) { + case tlm::END_REQ: + // Request phase ended + return tlm::TLM_ACCEPTED; + + case tlm::BEGIN_RESP: + sc_assert(t == sc_core::SC_ZERO_TIME); // FIXME: can t != 0? + mEndEvent.notify(t); + // Not needed to update the phase if true is returned + return tlm::TLM_COMPLETED; + + case tlm::BEGIN_REQ: // fall-through + case tlm::END_RESP: // fall-through + default: + // A target should never call nb_transport with these phases + sc_assert(0); exit(1); +// return tlm::TLM_COMPLETED; //unreachable code + }; + } + + void invalidate(dmi_type& dmiData) + { + dmiData.set_start_address(1); + dmiData.set_end_address(0); + } + + // Invalidate DMI pointer(s) + void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, + sc_dt::uint64 end_range) + { + // do the invalidation if there is an address range overlap + if (start_range <= mDMIData.get_end_address ()&& + end_range >= mDMIData.get_start_address()) { + std::cout << name() << ": got DMI pointer invalidation" + << " @ " << sc_core::sc_time_stamp() << std::endl; + + invalidate(mDMIData); + } else { + std::cout << name() << ": ignored DMI invalidation for addresses " + << std::hex << start_range << ", " + << end_range << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + } + } + + // Test for transport_dbg, this one should fail in bus_dmi as we address + // a target that doesn't support transport_dbg: + // FIXME: use a configurable address + void end_of_simulation() + { + std::cout << name() << ", <>:" << std::endl + << std::endl; + unsigned char data[32]; + + transaction_type trans; + trans.set_address(mBaseAddress); + trans.set_data_length(32); + trans.set_data_ptr(data); + trans.set_read(); + + unsigned int n = socket->transport_dbg(trans); + + std::cout << "Mem @" << std::hex << mBaseAddress << std::endl; + unsigned int j = 0; + + if (n > 0) + { + // always align endianness, so that we don't get a diff when + // printing the raw data + int e_start = 0; + int e_end = 4; + int e_increment = 1; + if (!tlm::host_has_little_endianness()) + { + e_start = 3; + e_end = -1; + e_increment = -1; + } + + for (unsigned int i=0; i bridge("bridge"); + SimpleLTTarget1 target("target", true); + + initiator.socket(bridge.target_socket); + bridge.initiator_socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/static_extensions/ext2gp/extension_adaptors.h b/src/systemc/tests/tlm/static_extensions/ext2gp/extension_adaptors.h new file mode 100644 index 000000000..a6b470e2a --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/ext2gp/extension_adaptors.h @@ -0,0 +1,212 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __EXTENSIONS_ADAPTORS_H__ +#define __EXTENSIONS_ADAPTORS_H__ + +#include "tlm.h" +#include "my_extension.h" + +#include "tlm_utils/simple_initiator_socket.h" +#include "tlm_utils/simple_target_socket.h" + +template +class adapt_ext2gp : public sc_core::sc_module +{ + public: + typedef tlm::tlm_generic_payload initiator_payload_type; + typedef tlm::tlm_generic_payload target_payload_type; + typedef tlm_utils::simple_initiator_socket initiator_socket_type; + typedef tlm_utils::simple_target_socket target_socket_type; + + target_socket_type target_socket; + initiator_socket_type initiator_socket; + + SC_HAS_PROCESS(adapt_ext2gp); + adapt_ext2gp(sc_core::sc_module_name name_) + : sc_core::sc_module(name_) + { + target_socket.register_nb_transport_fw(this, &adapt_ext2gp::forward_nb_transport); + target_socket.register_transport_dbg(this, &adapt_ext2gp::transport_debug); + target_socket.register_get_direct_mem_ptr(this, &adapt_ext2gp::get_dmi_pointer); + + initiator_socket.register_nb_transport_bw(this, &adapt_ext2gp::backward_nb_transport); + initiator_socket.register_invalidate_direct_mem_ptr(this, &adapt_ext2gp::invalidate_dmi_pointers); + } + + /////////////// + // NB transport + /////////////// + + // Forward direction: The initiator calls this method with an extended + // payload. We leave the extension class in the vector, and it will be + // ignored by the GP target. + tlm::tlm_sync_enum forward_nb_transport(initiator_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + return initiator_socket->nb_transport_fw(trans, phase, t); + } + // Backward direction: we can assume here that the payload we get + // as parameter is the same one that the initiator sent out. Thus, the + // extension vector is known to be present. + tlm::tlm_sync_enum backward_nb_transport(target_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + return target_socket->nb_transport_bw(trans, phase, t); + } + + bool get_dmi_pointer(target_payload_type& trans, + tlm::tlm_dmi& dmi_data) + { + bool tmp_ret = initiator_socket->get_direct_mem_ptr(trans, + dmi_data); + return tmp_ret; + } + + ////////////////////////// + // simple call forwarders: + ////////////////////////// + unsigned int transport_debug(target_payload_type& trans) + { + return initiator_socket->transport_dbg(trans); + } + void invalidate_dmi_pointers(sc_dt::uint64 start_range, + sc_dt::uint64 end_range) + { + target_socket->invalidate_direct_mem_ptr(start_range, + end_range); + } +}; + +template +class adapt_gp2ext : public sc_core::sc_module +{ + public: + typedef tlm::tlm_generic_payload initiator_payload_type; + typedef tlm::tlm_generic_payload target_payload_type; + typedef tlm_utils::simple_initiator_socket initiator_socket_type; + typedef tlm_utils::simple_target_socket target_socket_type; + + target_socket_type target_socket; + initiator_socket_type initiator_socket; + + SC_HAS_PROCESS(adapt_gp2ext); + adapt_gp2ext(sc_core::sc_module_name name_) + : sc_core::sc_module(name_) + { + // Optionally, we can initialize our private extension class + // here, if required. + + target_socket.register_nb_transport_fw(this, &adapt_gp2ext::forward_nb_transport); + target_socket.register_transport_dbg(this, &adapt_gp2ext::transport_debug); + target_socket.register_get_direct_mem_ptr(this, &adapt_gp2ext::get_dmi_pointer); + + initiator_socket.register_nb_transport_bw(this, &adapt_gp2ext::backward_nb_transport); + initiator_socket.register_invalidate_direct_mem_ptr(this, &adapt_gp2ext::invalidate_dmi_pointers); + + m_ext.m_data = 13; + } + + /////////////// + // NB transport + /////////////// + + // Forward direction: We extend the payload on the fly (if needed). + tlm::tlm_sync_enum forward_nb_transport(initiator_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + // If the mandatory extension is not there, we need to add it and + // store it so that we can re-construc the original state. + // Otherwise we don't touch the extension, so that we don't overwrite + // it in e.g. a nonGP->GP->nonGP (initiator->interconnect->target) + // setup. + // Note, however, that there might be situations where we might need to + // re-initialize the extension, e.g. for mutable data fields in + // different system setups. + trans.get_extension(m_initiator_ext); + if (!m_initiator_ext) + { + m_initiator_ext = trans.set_extension(&m_ext); + } + tlm::tlm_sync_enum tmp = + initiator_socket->nb_transport_fw(trans, phase, t); + if (tmp == tlm::TLM_COMPLETED) + { + m_initiator_ext = trans.set_extension(m_initiator_ext); + } + return tmp; + } + // Backward direction: only restore of original extension and static_cast. + tlm::tlm_sync_enum backward_nb_transport(target_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + m_initiator_ext = trans.set_extension(m_initiator_ext); + return target_socket->nb_transport_bw(trans, phase, t); + } + + bool get_dmi_pointer(target_payload_type& trans, + tlm::tlm_dmi& dmi_data) + { + // If the mandatory extension is not there, we need to add it and + // store it so that we can re-construc the original state. + // Otherwise we don't touch the extension, so that we don't overwrite + // it in e.g. a nonGP->GP->nonGP (initiator->interconnect->target) + // setup. + my_extension* tmp_ext; + trans.get_extension(tmp_ext); + if (!tmp_ext) + { + trans.set_extension(&m_ext); + } + bool tmp_ret = initiator_socket->get_direct_mem_ptr(trans, + dmi_data); + if(!tmp_ext) + { + trans.clear_extension(tmp_ext); + } + return tmp_ret; + } + ////////////////////////// + // simple call forwarders: + ////////////////////////// + unsigned int transport_debug(target_payload_type& trans) + { + return initiator_socket->transport_dbg(trans); + } + void invalidate_dmi_pointers(sc_dt::uint64 start_range, + sc_dt::uint64 end_range) + { + target_socket->invalidate_direct_mem_ptr(start_range, + end_range); + } + +private: + my_extension m_ext; + my_extension* m_initiator_ext; +}; + +#endif diff --git a/src/systemc/tests/tlm/static_extensions/ext2gp/golden/ext2gp.log b/src/systemc/tests/tlm/static_extensions/ext2gp/golden/ext2gp.log new file mode 100644 index 000000000..bffb34320 --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/ext2gp/golden/ext2gp.log @@ -0,0 +1,65 @@ +SystemC Simulation +initiator: Send write request: A = 0x0, D = 0x0 @ 0 s +target: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator: Received ok response @ 10 ns +initiator: Send write request: A = 0x4, D = 0x1 @ 10 ns +initiator: Received ok response @ 20 ns +initiator: Send write request: A = 0x8, D = 0x2 @ 20 ns +initiator: Received ok response @ 30 ns +initiator: Send write request: A = 0xc, D = 0x3 @ 30 ns +initiator: got DMI pointer invalidation @ 35 ns +initiator: Received ok response @ 40 ns +initiator: Send write request: A = 0x10, D = 0x4 @ 40 ns +target: Received write request: A = 0x10, D = 0x4 @ 40 ns +initiator: Received ok response @ 50 ns +initiator: Send write request: A = 0x14, D = 0x5 @ 50 ns +initiator: Received ok response @ 60 ns +initiator: Send write request: A = 0x18, D = 0x6 @ 60 ns +initiator: Received ok response @ 70 ns +initiator: Send write request: A = 0x1c, D = 0x7 @ 70 ns +initiator: got DMI pointer invalidation @ 75 ns +initiator: Received ok response @ 80 ns +initiator: Send write request: A = 0x20, D = 0x8 @ 80 ns +target: Received write request: A = 0x20, D = 0x8 @ 80 ns +initiator: Received ok response @ 90 ns +initiator: Send write request: A = 0x24, D = 0x9 @ 90 ns +initiator: Received ok response @ 100 ns +initiator: Send read request: A = 0x0 @ 100 ns +initiator: got DMI pointer invalidation @ 115 ns +initiator: Received ok response: D = 0x0 @ 200 ns +initiator: Send read request: A = 0x4 @ 200 ns +target: Received read request: A = 0x4 @ 200 ns +initiator: Received ok response: D = 0x1 @ 300 ns +initiator: Send read request: A = 0x8 @ 300 ns +initiator: got DMI pointer invalidation @ 325 ns +initiator: Received ok response: D = 0x2 @ 400 ns +initiator: Send read request: A = 0xc @ 400 ns +target: Received read request: A = 0xc @ 400 ns +initiator: Received ok response: D = 0x3 @ 500 ns +initiator: Send read request: A = 0x10 @ 500 ns +initiator: got DMI pointer invalidation @ 525 ns +initiator: Received ok response: D = 0x4 @ 600 ns +initiator: Send read request: A = 0x14 @ 600 ns +target: Received read request: A = 0x14 @ 600 ns +initiator: Received ok response: D = 0x5 @ 700 ns +initiator: Send read request: A = 0x18 @ 700 ns +initiator: got DMI pointer invalidation @ 725 ns +initiator: Received ok response: D = 0x6 @ 800 ns +initiator: Send read request: A = 0x1c @ 800 ns +target: Received read request: A = 0x1c @ 800 ns +initiator: Received ok response: D = 0x7 @ 900 ns +initiator: Send read request: A = 0x20 @ 900 ns +initiator: got DMI pointer invalidation @ 925 ns +initiator: Received ok response: D = 0x8 @ 1 us +initiator: Send read request: A = 0x24 @ 1 us +target: Received read request: A = 0x24 @ 1 us +initiator: Received ok response: D = 0x9 @ 1100 ns +initiator: got DMI pointer invalidation @ 1125 ns + +Info: /OSCI/SystemC: Simulation stopped by user. +initiator, <>: + +Mem @0 +00 00 00 00 01 00 00 00 02 00 00 00 03 00 00 00 +04 00 00 00 05 00 00 00 06 00 00 00 07 00 00 00 + diff --git a/src/systemc/tests/tlm/static_extensions/ext2gp/my_extension.h b/src/systemc/tests/tlm/static_extensions/ext2gp/my_extension.h new file mode 100644 index 000000000..650931cd1 --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/ext2gp/my_extension.h @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __MY_EXTENSION_H__ +#define __MY_EXTENSION_H__ + +#include "tlm.h" +#include + +class my_extension : + public tlm::tlm_extension +{ +public: + my_extension() + : m_data(0) + {} + tlm_extension_base* clone() const + { + return new my_extension(*this); + } + void free() + { + delete this; + } + void copy_from(tlm_extension_base const & e) + { + sc_assert(typeid(this) == typeid(e)); + m_data = static_cast(e).m_data; + } + + int m_data; +}; + +struct my_extended_payload_types +{ + typedef tlm::tlm_base_protocol_types::tlm_payload_type tlm_payload_type; + typedef tlm::tlm_base_protocol_types::tlm_phase_type tlm_phase_type; +}; + +#endif diff --git a/src/systemc/tests/tlm/static_extensions/ext2gp2ext/SimpleLTInitiator_ext.h b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/SimpleLTInitiator_ext.h new file mode 100644 index 000000000..1d10e0785 --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/SimpleLTInitiator_ext.h @@ -0,0 +1,343 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __SIMPLE_LT_INITIATOR_EXT_H__ +#define __SIMPLE_LT_INITIATOR_EXT_H__ + +#include "tlm.h" +#include "tlm_utils/simple_initiator_socket.h" +#include "my_extension.h" + +#include +#include +#include +#include +#include + +class SimpleLTInitiator_ext : public sc_core::sc_module +{ +public: + typedef tlm::tlm_generic_payload transaction_type; + typedef tlm::tlm_dmi dmi_type; + typedef tlm::tlm_phase phase_type; + typedef tlm::tlm_sync_enum sync_enum_type; + typedef tlm_utils::simple_initiator_socket initiator_socket_type; + +public: + initiator_socket_type socket; + +public: + SC_HAS_PROCESS(SimpleLTInitiator_ext); + SimpleLTInitiator_ext(sc_core::sc_module_name name, + unsigned int nrOfTransactions = 0x5, + unsigned int baseAddress = 0x0) : + sc_core::sc_module(name), + socket("socket"), + mNrOfTransactions(nrOfTransactions), + mBaseAddress(baseAddress), + mTransactionCount(0) + { + invalidate(mDMIData); + + // register nb_transport method + socket.register_nb_transport_bw(this, &SimpleLTInitiator_ext::myNBTransport); + socket.register_invalidate_direct_mem_ptr(this, &SimpleLTInitiator_ext::invalidate_direct_mem_ptr); + + // Initiator thread + SC_THREAD(run); + + } + + bool initTransaction(transaction_type& trans) + { + // initialize DMI hint: + trans.set_dmi_allowed(false); + + if (mTransactionCount < mNrOfTransactions) + { + trans.set_address(mBaseAddress + 4*mTransactionCount); + mData = mTransactionCount; + trans.set_data_ptr(reinterpret_cast(&mData)); + trans.set_command(tlm::TLM_WRITE_COMMAND); + + } + else if (mTransactionCount < 2 * mNrOfTransactions) + { + trans.set_address(mBaseAddress + 4*(mTransactionCount-mNrOfTransactions)); + mData = 0; + trans.set_data_ptr(reinterpret_cast(&mData)); + trans.set_command(tlm::TLM_READ_COMMAND); + + } + else + { + return false; + } + + ++mTransactionCount; + return true; + } + + void logStartTransation(transaction_type& trans) + { + if (trans.get_command() == tlm::TLM_WRITE_COMMAND) + { + std::cout << name() << ": Send write request: A = 0x" + << std::hex << (unsigned int)trans.get_address() + << ", D = 0x" << mData << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + + } + else + { + std::cout << name() << ": Send read request: A = 0x" + << std::hex << (unsigned int)trans.get_address() + << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + } + } + + void logEndTransaction(transaction_type& trans) + { + if (trans.get_response_status() != tlm::TLM_OK_RESPONSE) { + std::cout << name() << ": Received error response @ " + << sc_core::sc_time_stamp() << std::endl; + } + else + { + std::cout << name() << ": Received ok response"; + if (trans.get_command() == tlm::TLM_READ_COMMAND) { + std::cout << ": D = 0x" << std::hex << mData << std::dec; + } + std::cout << " @ " << sc_core::sc_time_stamp() << std::endl; + } + } + + void run() + { + transaction_type trans; + phase_type phase; + sc_core::sc_time t; + // make sure that our transaction has the proper extension: + my_extension* tmp_ext = new my_extension(); + tmp_ext->m_data = 11; + + trans.set_extension(tmp_ext); + + while (initTransaction(trans)) + { + // Create transaction and initialise phase and t + phase = tlm::BEGIN_REQ; + t = sc_core::SC_ZERO_TIME; + + logStartTransation(trans); + /////////////////////////////////////////////////////////// + // DMI handling: + // We use the DMI hint to check if it makes sense to ask for + // DMI pointers. The pattern is: + // - if the address is covered by a DMI region do a DMI access + // - otherwise do a normal transaction + // -> check if we get a DMI hint and acquire the DMI pointers if it + // is set + /////////////////////////////////////////////////////////// + + // Check if the address is covered by our DMI region + if ( (trans.get_address() >= mDMIData.get_start_address()) && + (trans.get_address() <= mDMIData.get_end_address()) ) + { + // We can handle the data here. As the logEndTransaction is + // assuming something to happen in the data structure, we really + // need to do this: + trans.set_response_status(tlm::TLM_OK_RESPONSE); + sc_dt::uint64 tmp = trans.get_address() - mDMIData.get_start_address(); + if (trans.get_command() == tlm::TLM_WRITE_COMMAND) { + *(unsigned int*)&mDMIData.get_dmi_ptr()[tmp] = mData; + + } else { + mData = *(unsigned int*)&mDMIData.get_dmi_ptr()[tmp]; + } + + // Do the wait immediately. Note that doing the wait here eats + // almost all the performance anyway, so we only gain something + // if we're using temporal decoupling. + if (trans.get_command() == tlm::TLM_WRITE_COMMAND) { + wait(mDMIData.get_write_latency()); + + } else { + wait(mDMIData.get_read_latency()); + } + + logEndTransaction(trans); + + } else { // we need a full transaction + switch (socket->nb_transport_fw(trans, phase, t)) { + case tlm::TLM_COMPLETED: + // Transaction Finished, wait for the returned delay + wait(t); + break; + + case tlm::TLM_ACCEPTED: + case tlm::TLM_UPDATED: + // Transaction not yet finished, wait for the end of it + wait(mEndEvent); + break; + + default: + sc_assert(0); exit(1); + }; + + logEndTransaction(trans); + + // Acquire DMI pointer if one is available: + if (trans.is_dmi_allowed()) + { + trans.set_write(); + dmi_type tmp; + if (socket->get_direct_mem_ptr(trans, + tmp)) + { + // FIXME: No support for separate read/write ranges + sc_assert(tmp.is_read_write_allowed()); + mDMIData = tmp; + } + } + } + } + delete tmp_ext; + wait(); + + } + + sync_enum_type myNBTransport(transaction_type& trans, + phase_type& phase, + sc_core::sc_time& t) + { + switch (phase) { + case tlm::END_REQ: + // Request phase ended + return tlm::TLM_ACCEPTED; + + case tlm::BEGIN_RESP: + sc_assert(t == sc_core::SC_ZERO_TIME); // FIXME: can t != 0? + mEndEvent.notify(t); + // Not needed to update the phase if true is returned + return tlm::TLM_COMPLETED; + + case tlm::BEGIN_REQ: // fall-through + case tlm::END_RESP: // fall-through + default: + // A target should never call nb_transport with these phases + sc_assert(0); exit(1); +// return tlm::TLM_COMPLETED; //unreachable code + }; + } + + void invalidate(dmi_type& dmiData) + { + dmiData.set_start_address(1); + dmiData.set_end_address(0); + } + + // Invalidate DMI pointer(s) + void invalidate_direct_mem_ptr(sc_dt::uint64 start_range, + sc_dt::uint64 end_range) + { + // do the invalidation if there is an address range overlap + if (start_range <= mDMIData.get_end_address ()&& + end_range >= mDMIData.get_start_address()) { + std::cout << name() << ": got DMI pointer invalidation" + << " @ " << sc_core::sc_time_stamp() << std::endl; + + invalidate(mDMIData); + } else { + std::cout << name() << ": ignored DMI invalidation for addresses " + << std::hex << start_range << ", " + << end_range << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + } + } + + // Test for transport_dbg, this one should fail in bus_dmi as we address + // a target that doesn't support transport_dbg: + // FIXME: use a configurable address + void end_of_simulation() + { + std::cout << name() << ", <>:" << std::endl + << std::endl; + unsigned char data[32]; + + transaction_type trans; + trans.set_address(mBaseAddress); + trans.set_data_length(32); + trans.set_data_ptr(data); + trans.set_read(); + + unsigned int n = socket->transport_dbg(trans); + + std::cout << "Mem @" << std::hex << mBaseAddress << std::endl; + unsigned int j = 0; + + if (n > 0) + { + // always align endianness, so that we don't get a diff when + // printing the raw data + int e_start = 0; + int e_end = 4; + int e_increment = 1; + if (!tlm::host_has_little_endianness()) + { + e_start = 3; + e_end = -1; + e_increment = -1; + } + + for (unsigned int i=0; i +#include +#include +//#include + +class SimpleLTTarget_ext : public sc_core::sc_module +{ +public: + typedef tlm::tlm_generic_payload transaction_type; + typedef tlm::tlm_phase phase_type; + typedef tlm::tlm_sync_enum sync_enum_type; + typedef tlm_utils::simple_target_socket target_socket_type; + +public: + target_socket_type socket; + +public: + SC_HAS_PROCESS(SimpleLTTarget_ext); + SimpleLTTarget_ext(sc_core::sc_module_name name, + sc_core::sc_time invalidate_dmi_time = sc_core::sc_time(25, sc_core::SC_NS)) : + sc_core::sc_module(name), + socket("socket") + { + // register nb_transport method + socket.register_nb_transport_fw(this, &SimpleLTTarget_ext::myNBTransport); + socket.register_get_direct_mem_ptr(this, &SimpleLTTarget_ext::myGetDMIPtr); + + socket.register_transport_dbg(this, &SimpleLTTarget_ext::transport_dbg); + + SC_METHOD(invalidate_dmi_method); + sensitive << m_invalidate_dmi_event; + dont_initialize(); + m_invalidate_dmi_time = invalidate_dmi_time; + } + + sync_enum_type myNBTransport(transaction_type& trans, phase_type& phase, sc_core::sc_time& t) + { + sc_assert(phase == tlm::BEGIN_REQ); + + my_extension* tmp_ext; + trans.get_extension(tmp_ext); + if (!tmp_ext) + { + std::cout << name() << ": ERROR, extension not present" << std::endl; + } + else + { + std::cout << name() << ": OK, extension data = " + << tmp_ext->m_data << std::endl; + } + sc_dt::uint64 address = trans.get_address(); + sc_assert(address < 400); + + unsigned int& data = *reinterpret_cast(trans.get_data_ptr()); + if (trans.get_command() == tlm::TLM_WRITE_COMMAND) { + std::cout << name() << ": Received write request: A = 0x" + << std::hex << (unsigned int)address + << ", D = 0x" << data << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + + *reinterpret_cast(&mMem[address]) = data; + t += sc_core::sc_time(10, sc_core::SC_NS); + + } else { + std::cout << name() << ": Received read request: A = 0x" + << std::hex << (unsigned int)address << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + + data = *reinterpret_cast(&mMem[address]); + t += sc_core::sc_time(100, sc_core::SC_NS); + } + + trans.set_response_status(tlm::TLM_OK_RESPONSE); + + trans.set_dmi_allowed(true); + + // LT target + // - always return true + // - not necessary to update phase (if true is returned) + return tlm::TLM_COMPLETED; + } + + unsigned int transport_dbg(transaction_type& r) + { + if (r.get_address() >= 400) return 0; + + unsigned int tmp = (int)r.get_address(); + unsigned int num_bytes; + if (tmp + r.get_data_length() >= 400) { + num_bytes = 400 - tmp; + + } else { + num_bytes = r.get_data_length(); + } + if (r.is_read()) { + for (unsigned int i = 0; i < num_bytes; ++i) { + r.get_data_ptr()[i] = mMem[i + tmp]; + } + + } else { + for (unsigned int i = 0; i < num_bytes; ++i) { + mMem[i + tmp] = r.get_data_ptr()[i]; + } + } + return num_bytes; + } + + bool myGetDMIPtr(transaction_type& trans, + tlm::tlm_dmi& dmi_data) + { + // notify DMI invalidation, just to check if this reaches the + // initiators properly + m_invalidate_dmi_event.notify(m_invalidate_dmi_time); + + // Check for DMI extension: + my_extension * tmp_ext; + trans.get_extension(tmp_ext); + if (tmp_ext) + { + std::cout << name() << ": get_direct_mem_ptr OK, extension data = " + <m_data << std::endl; + } + else + { + std::cout << name() << ", get_direct_mem_ptr ERROR: " + << "didn't get pointer to extension" + << std::endl; + } + if (trans.get_address() < 400) { + dmi_data.allow_read_write(); + dmi_data.set_start_address(0x0); + dmi_data.set_end_address(399); + dmi_data.set_dmi_ptr(mMem); + dmi_data.set_read_latency(sc_core::sc_time(100, sc_core::SC_NS)); + dmi_data.set_write_latency(sc_core::sc_time(10, sc_core::SC_NS)); + return true; + + } else { + // should not happen + dmi_data.set_start_address(trans.get_address()); + dmi_data.set_end_address(trans.get_address()); + return false; + + } + } + + void invalidate_dmi_method() + { + sc_dt::uint64 start_address = 0x0; + sc_dt::uint64 end_address = 399; + socket->invalidate_direct_mem_ptr(start_address, end_address); + } +private: + unsigned char mMem[400]; + sc_core::sc_event m_invalidate_dmi_event; + sc_core::sc_time m_invalidate_dmi_time; +}; + +#endif diff --git a/src/systemc/tests/tlm/static_extensions/ext2gp2ext/ext2gp2ext.cpp b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/ext2gp2ext.cpp new file mode 100644 index 000000000..13f66f094 --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/ext2gp2ext.cpp @@ -0,0 +1,45 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "tlm.h" + +#include "SimpleLTInitiator_ext.h" +#include "SimpleBusLT.h" +#include "SimpleLTTarget_ext.h" +#include "extension_adaptors.h" + + +int sc_main(int argc, char* argv[]) +{ + SimpleLTInitiator_ext initiator("initiator1", 10, 0x0); + adapt_ext2gp<32> bridge1("bridge1"); + SimpleBusLT<1,1> bus("bus"); + adapt_gp2ext<32> bridge2("bridge2"); + SimpleLTTarget_ext target("target1"); + + initiator.socket(bridge1.target_socket); + bridge1.initiator_socket(bus.target_socket[0]); + bus.initiator_socket[0](bridge2.target_socket); + bridge2.initiator_socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/static_extensions/ext2gp2ext/extension_adaptors.h b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/extension_adaptors.h new file mode 100644 index 000000000..a6b470e2a --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/extension_adaptors.h @@ -0,0 +1,212 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __EXTENSIONS_ADAPTORS_H__ +#define __EXTENSIONS_ADAPTORS_H__ + +#include "tlm.h" +#include "my_extension.h" + +#include "tlm_utils/simple_initiator_socket.h" +#include "tlm_utils/simple_target_socket.h" + +template +class adapt_ext2gp : public sc_core::sc_module +{ + public: + typedef tlm::tlm_generic_payload initiator_payload_type; + typedef tlm::tlm_generic_payload target_payload_type; + typedef tlm_utils::simple_initiator_socket initiator_socket_type; + typedef tlm_utils::simple_target_socket target_socket_type; + + target_socket_type target_socket; + initiator_socket_type initiator_socket; + + SC_HAS_PROCESS(adapt_ext2gp); + adapt_ext2gp(sc_core::sc_module_name name_) + : sc_core::sc_module(name_) + { + target_socket.register_nb_transport_fw(this, &adapt_ext2gp::forward_nb_transport); + target_socket.register_transport_dbg(this, &adapt_ext2gp::transport_debug); + target_socket.register_get_direct_mem_ptr(this, &adapt_ext2gp::get_dmi_pointer); + + initiator_socket.register_nb_transport_bw(this, &adapt_ext2gp::backward_nb_transport); + initiator_socket.register_invalidate_direct_mem_ptr(this, &adapt_ext2gp::invalidate_dmi_pointers); + } + + /////////////// + // NB transport + /////////////// + + // Forward direction: The initiator calls this method with an extended + // payload. We leave the extension class in the vector, and it will be + // ignored by the GP target. + tlm::tlm_sync_enum forward_nb_transport(initiator_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + return initiator_socket->nb_transport_fw(trans, phase, t); + } + // Backward direction: we can assume here that the payload we get + // as parameter is the same one that the initiator sent out. Thus, the + // extension vector is known to be present. + tlm::tlm_sync_enum backward_nb_transport(target_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + return target_socket->nb_transport_bw(trans, phase, t); + } + + bool get_dmi_pointer(target_payload_type& trans, + tlm::tlm_dmi& dmi_data) + { + bool tmp_ret = initiator_socket->get_direct_mem_ptr(trans, + dmi_data); + return tmp_ret; + } + + ////////////////////////// + // simple call forwarders: + ////////////////////////// + unsigned int transport_debug(target_payload_type& trans) + { + return initiator_socket->transport_dbg(trans); + } + void invalidate_dmi_pointers(sc_dt::uint64 start_range, + sc_dt::uint64 end_range) + { + target_socket->invalidate_direct_mem_ptr(start_range, + end_range); + } +}; + +template +class adapt_gp2ext : public sc_core::sc_module +{ + public: + typedef tlm::tlm_generic_payload initiator_payload_type; + typedef tlm::tlm_generic_payload target_payload_type; + typedef tlm_utils::simple_initiator_socket initiator_socket_type; + typedef tlm_utils::simple_target_socket target_socket_type; + + target_socket_type target_socket; + initiator_socket_type initiator_socket; + + SC_HAS_PROCESS(adapt_gp2ext); + adapt_gp2ext(sc_core::sc_module_name name_) + : sc_core::sc_module(name_) + { + // Optionally, we can initialize our private extension class + // here, if required. + + target_socket.register_nb_transport_fw(this, &adapt_gp2ext::forward_nb_transport); + target_socket.register_transport_dbg(this, &adapt_gp2ext::transport_debug); + target_socket.register_get_direct_mem_ptr(this, &adapt_gp2ext::get_dmi_pointer); + + initiator_socket.register_nb_transport_bw(this, &adapt_gp2ext::backward_nb_transport); + initiator_socket.register_invalidate_direct_mem_ptr(this, &adapt_gp2ext::invalidate_dmi_pointers); + + m_ext.m_data = 13; + } + + /////////////// + // NB transport + /////////////// + + // Forward direction: We extend the payload on the fly (if needed). + tlm::tlm_sync_enum forward_nb_transport(initiator_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + // If the mandatory extension is not there, we need to add it and + // store it so that we can re-construc the original state. + // Otherwise we don't touch the extension, so that we don't overwrite + // it in e.g. a nonGP->GP->nonGP (initiator->interconnect->target) + // setup. + // Note, however, that there might be situations where we might need to + // re-initialize the extension, e.g. for mutable data fields in + // different system setups. + trans.get_extension(m_initiator_ext); + if (!m_initiator_ext) + { + m_initiator_ext = trans.set_extension(&m_ext); + } + tlm::tlm_sync_enum tmp = + initiator_socket->nb_transport_fw(trans, phase, t); + if (tmp == tlm::TLM_COMPLETED) + { + m_initiator_ext = trans.set_extension(m_initiator_ext); + } + return tmp; + } + // Backward direction: only restore of original extension and static_cast. + tlm::tlm_sync_enum backward_nb_transport(target_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + m_initiator_ext = trans.set_extension(m_initiator_ext); + return target_socket->nb_transport_bw(trans, phase, t); + } + + bool get_dmi_pointer(target_payload_type& trans, + tlm::tlm_dmi& dmi_data) + { + // If the mandatory extension is not there, we need to add it and + // store it so that we can re-construc the original state. + // Otherwise we don't touch the extension, so that we don't overwrite + // it in e.g. a nonGP->GP->nonGP (initiator->interconnect->target) + // setup. + my_extension* tmp_ext; + trans.get_extension(tmp_ext); + if (!tmp_ext) + { + trans.set_extension(&m_ext); + } + bool tmp_ret = initiator_socket->get_direct_mem_ptr(trans, + dmi_data); + if(!tmp_ext) + { + trans.clear_extension(tmp_ext); + } + return tmp_ret; + } + ////////////////////////// + // simple call forwarders: + ////////////////////////// + unsigned int transport_debug(target_payload_type& trans) + { + return initiator_socket->transport_dbg(trans); + } + void invalidate_dmi_pointers(sc_dt::uint64 start_range, + sc_dt::uint64 end_range) + { + target_socket->invalidate_direct_mem_ptr(start_range, + end_range); + } + +private: + my_extension m_ext; + my_extension* m_initiator_ext; +}; + +#endif diff --git a/src/systemc/tests/tlm/static_extensions/ext2gp2ext/golden/ext2gp2ext.log b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/golden/ext2gp2ext.log new file mode 100644 index 000000000..4a27a6f7d --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/golden/ext2gp2ext.log @@ -0,0 +1,81 @@ +SystemC Simulation +initiator1: Send write request: A = 0x0, D = 0x0 @ 0 s +target1: OK, extension data = 11 +target1: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator1: Received ok response @ 10 ns +target1: get_direct_mem_ptr OK, extension data = 11 +initiator1: Send write request: A = 0x4, D = 0x1 @ 10 ns +initiator1: Received ok response @ 20 ns +initiator1: Send write request: A = 0x8, D = 0x2 @ 20 ns +initiator1: Received ok response @ 30 ns +initiator1: Send write request: A = 0xc, D = 0x3 @ 30 ns +initiator1: got DMI pointer invalidation @ 35 ns +initiator1: Received ok response @ 40 ns +initiator1: Send write request: A = 0x10, D = 0x4 @ 40 ns +target1: OK, extension data = 11 +target1: Received write request: A = 0x10, D = 0x4 @ 40 ns +initiator1: Received ok response @ 50 ns +target1: get_direct_mem_ptr OK, extension data = 11 +initiator1: Send write request: A = 0x14, D = 0x5 @ 50 ns +initiator1: Received ok response @ 60 ns +initiator1: Send write request: A = 0x18, D = 0x6 @ 60 ns +initiator1: Received ok response @ 70 ns +initiator1: Send write request: A = 0x1c, D = 0x7 @ 70 ns +initiator1: got DMI pointer invalidation @ 75 ns +initiator1: Received ok response @ 80 ns +initiator1: Send write request: A = 0x20, D = 0x8 @ 80 ns +target1: OK, extension data = 11 +target1: Received write request: A = 0x20, D = 0x8 @ 80 ns +initiator1: Received ok response @ 90 ns +target1: get_direct_mem_ptr OK, extension data = 11 +initiator1: Send write request: A = 0x24, D = 0x9 @ 90 ns +initiator1: Received ok response @ 100 ns +initiator1: Send read request: A = 0x0 @ 100 ns +initiator1: got DMI pointer invalidation @ 115 ns +initiator1: Received ok response: D = 0x0 @ 200 ns +initiator1: Send read request: A = 0x4 @ 200 ns +target1: OK, extension data = 11 +target1: Received read request: A = 0x4 @ 200 ns +initiator1: Received ok response: D = 0x1 @ 300 ns +target1: get_direct_mem_ptr OK, extension data = 11 +initiator1: Send read request: A = 0x8 @ 300 ns +initiator1: got DMI pointer invalidation @ 325 ns +initiator1: Received ok response: D = 0x2 @ 400 ns +initiator1: Send read request: A = 0xc @ 400 ns +target1: OK, extension data = 11 +target1: Received read request: A = 0xc @ 400 ns +initiator1: Received ok response: D = 0x3 @ 500 ns +target1: get_direct_mem_ptr OK, extension data = 11 +initiator1: Send read request: A = 0x10 @ 500 ns +initiator1: got DMI pointer invalidation @ 525 ns +initiator1: Received ok response: D = 0x4 @ 600 ns +initiator1: Send read request: A = 0x14 @ 600 ns +target1: OK, extension data = 11 +target1: Received read request: A = 0x14 @ 600 ns +initiator1: Received ok response: D = 0x5 @ 700 ns +target1: get_direct_mem_ptr OK, extension data = 11 +initiator1: Send read request: A = 0x18 @ 700 ns +initiator1: got DMI pointer invalidation @ 725 ns +initiator1: Received ok response: D = 0x6 @ 800 ns +initiator1: Send read request: A = 0x1c @ 800 ns +target1: OK, extension data = 11 +target1: Received read request: A = 0x1c @ 800 ns +initiator1: Received ok response: D = 0x7 @ 900 ns +target1: get_direct_mem_ptr OK, extension data = 11 +initiator1: Send read request: A = 0x20 @ 900 ns +initiator1: got DMI pointer invalidation @ 925 ns +initiator1: Received ok response: D = 0x8 @ 1 us +initiator1: Send read request: A = 0x24 @ 1 us +target1: OK, extension data = 11 +target1: Received read request: A = 0x24 @ 1 us +initiator1: Received ok response: D = 0x9 @ 1100 ns +target1: get_direct_mem_ptr OK, extension data = 11 +initiator1: got DMI pointer invalidation @ 1125 ns + +Info: /OSCI/SystemC: Simulation stopped by user. +initiator1, <>: + +Mem @0 +00 00 00 00 01 00 00 00 02 00 00 00 03 00 00 00 +04 00 00 00 05 00 00 00 06 00 00 00 07 00 00 00 + diff --git a/src/systemc/tests/tlm/static_extensions/ext2gp2ext/my_extension.h b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/my_extension.h new file mode 100644 index 000000000..650931cd1 --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/ext2gp2ext/my_extension.h @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __MY_EXTENSION_H__ +#define __MY_EXTENSION_H__ + +#include "tlm.h" +#include + +class my_extension : + public tlm::tlm_extension +{ +public: + my_extension() + : m_data(0) + {} + tlm_extension_base* clone() const + { + return new my_extension(*this); + } + void free() + { + delete this; + } + void copy_from(tlm_extension_base const & e) + { + sc_assert(typeid(this) == typeid(e)); + m_data = static_cast(e).m_data; + } + + int m_data; +}; + +struct my_extended_payload_types +{ + typedef tlm::tlm_base_protocol_types::tlm_payload_type tlm_payload_type; + typedef tlm::tlm_base_protocol_types::tlm_phase_type tlm_phase_type; +}; + +#endif diff --git a/src/systemc/tests/tlm/static_extensions/gp2ext/SimpleLTTarget_ext.h b/src/systemc/tests/tlm/static_extensions/gp2ext/SimpleLTTarget_ext.h new file mode 100644 index 000000000..c542c196d --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/gp2ext/SimpleLTTarget_ext.h @@ -0,0 +1,186 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __SIMPLE_LT_TARGET2_H__ +#define __SIMPLE_LT_TARGET2_H__ + +#include "tlm.h" +#include "tlm_utils/simple_target_socket.h" +#include "my_extension.h" + +//#include +#include +#include +//#include + +class SimpleLTTarget_ext : public sc_core::sc_module +{ +public: + typedef tlm::tlm_generic_payload transaction_type; + typedef tlm::tlm_phase phase_type; + typedef tlm::tlm_sync_enum sync_enum_type; + typedef tlm_utils::simple_target_socket target_socket_type; + +public: + target_socket_type socket; + +public: + SC_HAS_PROCESS(SimpleLTTarget_ext); + SimpleLTTarget_ext(sc_core::sc_module_name name, + sc_core::sc_time invalidate_dmi_time = sc_core::sc_time(25, sc_core::SC_NS)) : + sc_core::sc_module(name), + socket("socket") + { + // register nb_transport method + socket.register_nb_transport_fw(this, &SimpleLTTarget_ext::myNBTransport); + socket.register_get_direct_mem_ptr(this, &SimpleLTTarget_ext::myGetDMIPtr); + + socket.register_transport_dbg(this, &SimpleLTTarget_ext::transport_dbg); + + SC_METHOD(invalidate_dmi_method); + sensitive << m_invalidate_dmi_event; + dont_initialize(); + m_invalidate_dmi_time = invalidate_dmi_time; + } + + sync_enum_type myNBTransport(transaction_type& trans, phase_type& phase, sc_core::sc_time& t) + { + sc_assert(phase == tlm::BEGIN_REQ); + + my_extension* tmp_ext; + trans.get_extension(tmp_ext); + if (!tmp_ext) + { + std::cout << name() << ": ERROR, extension not present" << std::endl; + } + else + { + std::cout << name() << ": OK, extension data = " + << tmp_ext->m_data << std::endl; + } + sc_dt::uint64 address = trans.get_address(); + sc_assert(address < 400); + + unsigned int& data = *reinterpret_cast(trans.get_data_ptr()); + if (trans.get_command() == tlm::TLM_WRITE_COMMAND) { + std::cout << name() << ": Received write request: A = 0x" + << std::hex << (unsigned int)address + << ", D = 0x" << data << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + + *reinterpret_cast(&mMem[address]) = data; + t += sc_core::sc_time(10, sc_core::SC_NS); + + } else { + std::cout << name() << ": Received read request: A = 0x" + << std::hex << (unsigned int)address << std::dec + << " @ " << sc_core::sc_time_stamp() << std::endl; + + data = *reinterpret_cast(&mMem[address]); + t += sc_core::sc_time(100, sc_core::SC_NS); + } + + trans.set_response_status(tlm::TLM_OK_RESPONSE); + + trans.set_dmi_allowed(true); + + // LT target + // - always return true + // - not necessary to update phase (if true is returned) + return tlm::TLM_COMPLETED; + } + + unsigned int transport_dbg(transaction_type& r) + { + if (r.get_address() >= 400) return 0; + + unsigned int tmp = (int)r.get_address(); + unsigned int num_bytes; + if (tmp + r.get_data_length() >= 400) { + num_bytes = 400 - tmp; + + } else { + num_bytes = r.get_data_length(); + } + if (r.is_read()) { + for (unsigned int i = 0; i < num_bytes; ++i) { + r.get_data_ptr()[i] = mMem[i + tmp]; + } + + } else { + for (unsigned int i = 0; i < num_bytes; ++i) { + mMem[i + tmp] = r.get_data_ptr()[i]; + } + } + return num_bytes; + } + + bool myGetDMIPtr(transaction_type& trans, + tlm::tlm_dmi& dmi_data) + { + // notify DMI invalidation, just to check if this reaches the + // initiators properly + m_invalidate_dmi_event.notify(m_invalidate_dmi_time); + + // Check for DMI extension: + my_extension * tmp_ext; + trans.get_extension(tmp_ext); + if (tmp_ext) + { + std::cout << name() << ": get_direct_mem_ptr OK, extension data = " + <m_data << std::endl; + } + else + { + std::cout << name() << ", get_direct_mem_ptr ERROR: " + << "didn't get pointer to extension" + << std::endl; + } + if (trans.get_address() < 400) { + dmi_data.allow_read_write(); + dmi_data.set_start_address(0x0); + dmi_data.set_end_address(399); + dmi_data.set_dmi_ptr(mMem); + dmi_data.set_read_latency(sc_core::sc_time(100, sc_core::SC_NS)); + dmi_data.set_write_latency(sc_core::sc_time(10, sc_core::SC_NS)); + return true; + + } else { + // should not happen + dmi_data.set_start_address(trans.get_address()); + dmi_data.set_end_address(trans.get_address()); + return false; + + } + } + + void invalidate_dmi_method() + { + sc_dt::uint64 start_address = 0x0; + sc_dt::uint64 end_address = 399; + socket->invalidate_direct_mem_ptr(start_address, end_address); + } +private: + unsigned char mMem[400]; + sc_core::sc_event m_invalidate_dmi_event; + sc_core::sc_time m_invalidate_dmi_time; +}; + +#endif diff --git a/src/systemc/tests/tlm/static_extensions/gp2ext/extension_adaptors.h b/src/systemc/tests/tlm/static_extensions/gp2ext/extension_adaptors.h new file mode 100644 index 000000000..a6b470e2a --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/gp2ext/extension_adaptors.h @@ -0,0 +1,212 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __EXTENSIONS_ADAPTORS_H__ +#define __EXTENSIONS_ADAPTORS_H__ + +#include "tlm.h" +#include "my_extension.h" + +#include "tlm_utils/simple_initiator_socket.h" +#include "tlm_utils/simple_target_socket.h" + +template +class adapt_ext2gp : public sc_core::sc_module +{ + public: + typedef tlm::tlm_generic_payload initiator_payload_type; + typedef tlm::tlm_generic_payload target_payload_type; + typedef tlm_utils::simple_initiator_socket initiator_socket_type; + typedef tlm_utils::simple_target_socket target_socket_type; + + target_socket_type target_socket; + initiator_socket_type initiator_socket; + + SC_HAS_PROCESS(adapt_ext2gp); + adapt_ext2gp(sc_core::sc_module_name name_) + : sc_core::sc_module(name_) + { + target_socket.register_nb_transport_fw(this, &adapt_ext2gp::forward_nb_transport); + target_socket.register_transport_dbg(this, &adapt_ext2gp::transport_debug); + target_socket.register_get_direct_mem_ptr(this, &adapt_ext2gp::get_dmi_pointer); + + initiator_socket.register_nb_transport_bw(this, &adapt_ext2gp::backward_nb_transport); + initiator_socket.register_invalidate_direct_mem_ptr(this, &adapt_ext2gp::invalidate_dmi_pointers); + } + + /////////////// + // NB transport + /////////////// + + // Forward direction: The initiator calls this method with an extended + // payload. We leave the extension class in the vector, and it will be + // ignored by the GP target. + tlm::tlm_sync_enum forward_nb_transport(initiator_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + return initiator_socket->nb_transport_fw(trans, phase, t); + } + // Backward direction: we can assume here that the payload we get + // as parameter is the same one that the initiator sent out. Thus, the + // extension vector is known to be present. + tlm::tlm_sync_enum backward_nb_transport(target_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + return target_socket->nb_transport_bw(trans, phase, t); + } + + bool get_dmi_pointer(target_payload_type& trans, + tlm::tlm_dmi& dmi_data) + { + bool tmp_ret = initiator_socket->get_direct_mem_ptr(trans, + dmi_data); + return tmp_ret; + } + + ////////////////////////// + // simple call forwarders: + ////////////////////////// + unsigned int transport_debug(target_payload_type& trans) + { + return initiator_socket->transport_dbg(trans); + } + void invalidate_dmi_pointers(sc_dt::uint64 start_range, + sc_dt::uint64 end_range) + { + target_socket->invalidate_direct_mem_ptr(start_range, + end_range); + } +}; + +template +class adapt_gp2ext : public sc_core::sc_module +{ + public: + typedef tlm::tlm_generic_payload initiator_payload_type; + typedef tlm::tlm_generic_payload target_payload_type; + typedef tlm_utils::simple_initiator_socket initiator_socket_type; + typedef tlm_utils::simple_target_socket target_socket_type; + + target_socket_type target_socket; + initiator_socket_type initiator_socket; + + SC_HAS_PROCESS(adapt_gp2ext); + adapt_gp2ext(sc_core::sc_module_name name_) + : sc_core::sc_module(name_) + { + // Optionally, we can initialize our private extension class + // here, if required. + + target_socket.register_nb_transport_fw(this, &adapt_gp2ext::forward_nb_transport); + target_socket.register_transport_dbg(this, &adapt_gp2ext::transport_debug); + target_socket.register_get_direct_mem_ptr(this, &adapt_gp2ext::get_dmi_pointer); + + initiator_socket.register_nb_transport_bw(this, &adapt_gp2ext::backward_nb_transport); + initiator_socket.register_invalidate_direct_mem_ptr(this, &adapt_gp2ext::invalidate_dmi_pointers); + + m_ext.m_data = 13; + } + + /////////////// + // NB transport + /////////////// + + // Forward direction: We extend the payload on the fly (if needed). + tlm::tlm_sync_enum forward_nb_transport(initiator_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + // If the mandatory extension is not there, we need to add it and + // store it so that we can re-construc the original state. + // Otherwise we don't touch the extension, so that we don't overwrite + // it in e.g. a nonGP->GP->nonGP (initiator->interconnect->target) + // setup. + // Note, however, that there might be situations where we might need to + // re-initialize the extension, e.g. for mutable data fields in + // different system setups. + trans.get_extension(m_initiator_ext); + if (!m_initiator_ext) + { + m_initiator_ext = trans.set_extension(&m_ext); + } + tlm::tlm_sync_enum tmp = + initiator_socket->nb_transport_fw(trans, phase, t); + if (tmp == tlm::TLM_COMPLETED) + { + m_initiator_ext = trans.set_extension(m_initiator_ext); + } + return tmp; + } + // Backward direction: only restore of original extension and static_cast. + tlm::tlm_sync_enum backward_nb_transport(target_payload_type& trans, + tlm::tlm_phase& phase, + sc_core::sc_time& t) + { + m_initiator_ext = trans.set_extension(m_initiator_ext); + return target_socket->nb_transport_bw(trans, phase, t); + } + + bool get_dmi_pointer(target_payload_type& trans, + tlm::tlm_dmi& dmi_data) + { + // If the mandatory extension is not there, we need to add it and + // store it so that we can re-construc the original state. + // Otherwise we don't touch the extension, so that we don't overwrite + // it in e.g. a nonGP->GP->nonGP (initiator->interconnect->target) + // setup. + my_extension* tmp_ext; + trans.get_extension(tmp_ext); + if (!tmp_ext) + { + trans.set_extension(&m_ext); + } + bool tmp_ret = initiator_socket->get_direct_mem_ptr(trans, + dmi_data); + if(!tmp_ext) + { + trans.clear_extension(tmp_ext); + } + return tmp_ret; + } + ////////////////////////// + // simple call forwarders: + ////////////////////////// + unsigned int transport_debug(target_payload_type& trans) + { + return initiator_socket->transport_dbg(trans); + } + void invalidate_dmi_pointers(sc_dt::uint64 start_range, + sc_dt::uint64 end_range) + { + target_socket->invalidate_direct_mem_ptr(start_range, + end_range); + } + +private: + my_extension m_ext; + my_extension* m_initiator_ext; +}; + +#endif diff --git a/src/systemc/tests/tlm/static_extensions/gp2ext/golden/gp2ext.log b/src/systemc/tests/tlm/static_extensions/gp2ext/golden/gp2ext.log new file mode 100644 index 000000000..d43825d43 --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/gp2ext/golden/gp2ext.log @@ -0,0 +1,81 @@ +SystemC Simulation +initiator1: Send write request: A = 0x0, D = 0x0 @ 0 s +target1: OK, extension data = 13 +target1: Received write request: A = 0x0, D = 0x0 @ 0 s +initiator1: Received ok response @ 10 ns +target1: get_direct_mem_ptr OK, extension data = 13 +initiator1: Send write request: A = 0x4, D = 0x1 @ 10 ns +initiator1: Received ok response @ 20 ns +initiator1: Send write request: A = 0x8, D = 0x2 @ 20 ns +initiator1: Received ok response @ 30 ns +initiator1: Send write request: A = 0xc, D = 0x3 @ 30 ns +initiator1: got DMI pointer invalidation @ 35 ns +initiator1: Received ok response @ 40 ns +initiator1: Send write request: A = 0x10, D = 0x4 @ 40 ns +target1: OK, extension data = 13 +target1: Received write request: A = 0x10, D = 0x4 @ 40 ns +initiator1: Received ok response @ 50 ns +target1: get_direct_mem_ptr OK, extension data = 13 +initiator1: Send write request: A = 0x14, D = 0x5 @ 50 ns +initiator1: Received ok response @ 60 ns +initiator1: Send write request: A = 0x18, D = 0x6 @ 60 ns +initiator1: Received ok response @ 70 ns +initiator1: Send write request: A = 0x1c, D = 0x7 @ 70 ns +initiator1: got DMI pointer invalidation @ 75 ns +initiator1: Received ok response @ 80 ns +initiator1: Send write request: A = 0x20, D = 0x8 @ 80 ns +target1: OK, extension data = 13 +target1: Received write request: A = 0x20, D = 0x8 @ 80 ns +initiator1: Received ok response @ 90 ns +target1: get_direct_mem_ptr OK, extension data = 13 +initiator1: Send write request: A = 0x24, D = 0x9 @ 90 ns +initiator1: Received ok response @ 100 ns +initiator1: Send read request: A = 0x0 @ 100 ns +initiator1: got DMI pointer invalidation @ 115 ns +initiator1: Received ok response: D = 0x0 @ 200 ns +initiator1: Send read request: A = 0x4 @ 200 ns +target1: OK, extension data = 13 +target1: Received read request: A = 0x4 @ 200 ns +initiator1: Received ok response: D = 0x1 @ 300 ns +target1: get_direct_mem_ptr OK, extension data = 13 +initiator1: Send read request: A = 0x8 @ 300 ns +initiator1: got DMI pointer invalidation @ 325 ns +initiator1: Received ok response: D = 0x2 @ 400 ns +initiator1: Send read request: A = 0xc @ 400 ns +target1: OK, extension data = 13 +target1: Received read request: A = 0xc @ 400 ns +initiator1: Received ok response: D = 0x3 @ 500 ns +target1: get_direct_mem_ptr OK, extension data = 13 +initiator1: Send read request: A = 0x10 @ 500 ns +initiator1: got DMI pointer invalidation @ 525 ns +initiator1: Received ok response: D = 0x4 @ 600 ns +initiator1: Send read request: A = 0x14 @ 600 ns +target1: OK, extension data = 13 +target1: Received read request: A = 0x14 @ 600 ns +initiator1: Received ok response: D = 0x5 @ 700 ns +target1: get_direct_mem_ptr OK, extension data = 13 +initiator1: Send read request: A = 0x18 @ 700 ns +initiator1: got DMI pointer invalidation @ 725 ns +initiator1: Received ok response: D = 0x6 @ 800 ns +initiator1: Send read request: A = 0x1c @ 800 ns +target1: OK, extension data = 13 +target1: Received read request: A = 0x1c @ 800 ns +initiator1: Received ok response: D = 0x7 @ 900 ns +target1: get_direct_mem_ptr OK, extension data = 13 +initiator1: Send read request: A = 0x20 @ 900 ns +initiator1: got DMI pointer invalidation @ 925 ns +initiator1: Received ok response: D = 0x8 @ 1 us +initiator1: Send read request: A = 0x24 @ 1 us +target1: OK, extension data = 13 +target1: Received read request: A = 0x24 @ 1 us +initiator1: Received ok response: D = 0x9 @ 1100 ns +target1: get_direct_mem_ptr OK, extension data = 13 +initiator1: got DMI pointer invalidation @ 1125 ns + +Info: /OSCI/SystemC: Simulation stopped by user. +initiator1, <>: + +Mem @0 +00 00 00 00 01 00 00 00 02 00 00 00 03 00 00 00 +04 00 00 00 05 00 00 00 06 00 00 00 07 00 00 00 + diff --git a/src/systemc/tests/tlm/static_extensions/gp2ext/gp2ext.cpp b/src/systemc/tests/tlm/static_extensions/gp2ext/gp2ext.cpp new file mode 100644 index 000000000..0533e9d1b --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/gp2ext/gp2ext.cpp @@ -0,0 +1,40 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ +#define SC_INCLUDE_DYNAMIC_PROCESSES +#include "tlm.h" + +#include "SimpleLTInitiator1_DMI.h" +#include "SimpleLTTarget_ext.h" +#include "extension_adaptors.h" + + +int sc_main(int argc, char* argv[]) +{ + SimpleLTInitiator1_dmi initiator("initiator1", 10, 0x0); + adapt_gp2ext<32> bridge("bridge"); + SimpleLTTarget_ext target("target1"); + + initiator.socket(bridge.target_socket); + bridge.initiator_socket(target.socket); + + sc_core::sc_start(); + sc_core::sc_stop(); + + return 0; +} diff --git a/src/systemc/tests/tlm/static_extensions/gp2ext/my_extension.h b/src/systemc/tests/tlm/static_extensions/gp2ext/my_extension.h new file mode 100644 index 000000000..650931cd1 --- /dev/null +++ b/src/systemc/tests/tlm/static_extensions/gp2ext/my_extension.h @@ -0,0 +1,56 @@ +/***************************************************************************** + + Licensed to Accellera Systems Initiative Inc. (Accellera) under one or + more contributor license agreements. See the NOTICE file distributed + with this work for additional information regarding copyright ownership. + Accellera licenses this file to you under the Apache License, Version 2.0 + (the "License"); you may not use this file except in compliance with the + License. You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + implied. See the License for the specific language governing + permissions and limitations under the License. + + *****************************************************************************/ + +#ifndef __MY_EXTENSION_H__ +#define __MY_EXTENSION_H__ + +#include "tlm.h" +#include + +class my_extension : + public tlm::tlm_extension +{ +public: + my_extension() + : m_data(0) + {} + tlm_extension_base* clone() const + { + return new my_extension(*this); + } + void free() + { + delete this; + } + void copy_from(tlm_extension_base const & e) + { + sc_assert(typeid(this) == typeid(e)); + m_data = static_cast(e).m_data; + } + + int m_data; +}; + +struct my_extended_payload_types +{ + typedef tlm::tlm_base_protocol_types::tlm_payload_type tlm_payload_type; + typedef tlm::tlm_base_protocol_types::tlm_phase_type tlm_phase_type; +}; + +#endif diff --git a/src/systemc/tests/tlm/update_original/golden/update_original.log b/src/systemc/tests/tlm/update_original/golden/update_original.log new file mode 100644 index 000000000..17680a7f7 --- /dev/null +++ b/src/systemc/tests/tlm/update_original/golden/update_original.log @@ -0,0 +1,2 @@ +SystemC Simulation +Unit test for update_original_from(). Should remain silent diff --git a/src/systemc/tests/tlm/update_original/mm.h b/src/systemc/tests/tlm/update_original/mm.h new file mode 100644 index 000000000..c91dd3ed5 --- /dev/null +++ b/src/systemc/tests/tlm/update_original/mm.h @@ -0,0 +1,85 @@ + +// ******************************************************************* +// User-defined memory manager, which maintains a pool of transactions +// ******************************************************************* + +#include "tlm.h" + +class mm: public tlm::tlm_mm_interface +{ + typedef tlm::tlm_generic_payload gp_t; + +public: + mm() : free_list(0), empties(0) {} + + virtual ~mm() + { + gp_t* ptr; + + while (free_list) + { + ptr = free_list->trans; + + // Delete generic payload and all extensions + sc_assert(ptr); + delete ptr; + + free_list = free_list->next; + } + + while (empties) + { + access* x = empties; + empties = empties->next; + + // Delete free list access struct + delete x; + } + } + + gp_t* allocate(); + void free(gp_t* trans); + +private: + struct access + { + gp_t* trans; + access* next; + access* prev; + }; + + access* free_list; + access* empties; +}; + +mm::gp_t* mm::allocate() +{ + gp_t* ptr; + if (free_list) + { + ptr = free_list->trans; + empties = free_list; + free_list = free_list->next; + } + else + { + ptr = new gp_t(this); + } + return ptr; +} + +void mm::free(gp_t* trans) +{ + trans->reset(); // Delete auto extensions + if (!empties) + { + empties = new access; + empties->next = free_list; + empties->prev = 0; + if (free_list) + free_list->prev = empties; + } + free_list = empties; + free_list->trans = trans; + empties = free_list->prev; +} diff --git a/src/systemc/tests/tlm/update_original/update_original.cpp b/src/systemc/tests/tlm/update_original/update_original.cpp new file mode 100644 index 000000000..e99d70c03 --- /dev/null +++ b/src/systemc/tests/tlm/update_original/update_original.cpp @@ -0,0 +1,270 @@ + +// Unit test for tlm_generic_payload update_original_from() method + +#include + +#define SC_INCLUDE_DYNAMIC_PROCESSES + +#include "systemc" +using namespace sc_core; +using namespace sc_dt; +using namespace std; + +#include "tlm.h" +#include "tlm_utils/simple_initiator_socket.h" +#include "tlm_utils/simple_target_socket.h" + +#include "mm.h" + +struct my_extension: tlm::tlm_extension +{ + my_extension() {} + + virtual tlm_extension_base* clone() const + { + my_extension* ext = new my_extension; + ext->len = len; + ext->bel = bel; + ext->ptr = ptr; + ext->byt = byt; + return ext; + } + + virtual void copy_from(tlm_extension_base const &ext) + { + len = static_cast(ext).len; + bel = static_cast(ext).bel; + ptr = static_cast(ext).ptr; + byt = static_cast(ext).byt; + } + + unsigned int len; + unsigned int bel; + unsigned char* ptr; + unsigned char* byt; +}; + + +struct Initiator: sc_module +{ + tlm_utils::simple_initiator_socket socket; + + typedef unsigned char uchar; + + SC_CTOR(Initiator) + : socket("socket") + { + SC_THREAD(thread_process); + data = new uchar[32]; + byte_enable = new uchar[32]; + } + + void thread_process() + { + tlm::tlm_generic_payload* trans; + sc_time delay = SC_ZERO_TIME; + + for (int i = 0; i < 1000000; i++) + { + int addr = 0; + tlm::tlm_command cmd = static_cast(rand() % 2); + + unsigned int len = rand() % 33; + unsigned int bel = rand() % (len + 1); + + // Fix sizes when performing a speed test + //cmd = tlm::TLM_READ_COMMAND; + //len = 32; + //bel = 8; + + + for (unsigned int i = 0; i < len; i++) + if (cmd == tlm::TLM_WRITE_COMMAND) + { + data[i] = rand() % 256; + } + else + data[i] = 0x99; + + trans = m_mm.allocate(); + trans->acquire(); + + trans->set_command( cmd ); + trans->set_address( addr ); + trans->set_data_ptr( data ); + trans->set_data_length( len ); + trans->set_streaming_width( len ); + + trans->set_byte_enable_length( bel ); + + for (unsigned int i = 0; i < bel; i++) + { + byte_enable[i] = (rand() % 2) ? 0xff : 0; + } + + if (bel) + trans->set_byte_enable_ptr( byte_enable ); + else + trans->set_byte_enable_ptr( 0 ); + + trans->set_dmi_allowed( false ); + trans->set_response_status( tlm::TLM_INCOMPLETE_RESPONSE ); + + // Add sticky extension diagnostics + my_extension* ext; + trans->get_extension(ext); + if (!ext) + { + ext = new my_extension; + trans->set_extension(ext); + } + + ext->len = len; + ext->bel = bel; + ext->ptr = data; + ext->byt = byte_enable; + + socket->b_transport( *trans, delay ); // Blocking transport call + + if ( trans->is_response_error() ) + SC_REPORT_ERROR("TLM-2", "Response error from b_transport"); + + //cout << "cmd = " << cmd << ", len = " << len << ", bel = " << bel << endl; + //cout << hex << setw(2) << setfill('0') << (unsigned int)data[i]; + + if (cmd == tlm::TLM_READ_COMMAND) + { + for (unsigned int i = 0; i < len; i++) + if (bel) + if (byte_enable[i % bel]) + sc_assert( data[i] == ext->ptr[i] ); + else + sc_assert( data[i] == 0x99 ); + else + sc_assert( data[i] == ext->ptr[i] ); + + } + trans->release(); + } + } + + mm m_mm; // Memory manager + unsigned char* data; // 32 bytes + unsigned char* byte_enable; +}; + + +struct Interconnect: sc_module +{ + tlm_utils::simple_target_socket targ_socket; + tlm_utils::simple_initiator_socket init_socket; + + SC_CTOR(Interconnect) + : targ_socket("targ_socket") + , init_socket("init_socket") + { + targ_socket.register_b_transport(this, &Interconnect::b_transport); + } + + virtual void b_transport( tlm::tlm_generic_payload& trans, sc_time& delay ) + { + unsigned int bel = trans.get_byte_enable_length(); + + trans2.set_data_ptr( data ); + if (bel) + trans2.set_byte_enable_ptr( byte_enable ); + trans2.deep_copy_from(trans); + + init_socket->b_transport( trans2, delay ); + + trans.update_original_from( trans2 ); + } + + tlm::tlm_generic_payload trans2; + unsigned char data[32]; + unsigned char byte_enable[32]; +}; + + +struct Target: sc_module +{ + tlm_utils::simple_target_socket socket; + + SC_CTOR(Target) + : socket("socket") + { + socket.register_b_transport(this, &Target ::b_transport); + + typedef unsigned char uchar; + data = new uchar[32]; + } + + + virtual void b_transport( tlm::tlm_generic_payload& trans, sc_time& delay ) + { + tlm::tlm_command cmd = trans.get_command(); + unsigned char* ptr = trans.get_data_ptr(); + unsigned int len = trans.get_data_length(); + unsigned char* byt = trans.get_byte_enable_ptr(); + unsigned int bel = trans.get_byte_enable_length(); + + my_extension* ext; + trans.get_extension(ext); + sc_assert( ext ); + + sc_assert( len == ext->len ); + sc_assert( bel == ext->bel ); + for (unsigned int i = 0; i < bel; i++) + sc_assert( byt[i] == ext->byt[i] ); + for (unsigned int i = 0; i < len; i++) + sc_assert( ptr[i] == ext->ptr[i] ); + + if (cmd == tlm::TLM_READ_COMMAND) + { + for (unsigned int i = 0; i < len; i++) + { + data[i] = rand() % 256; + ptr[i] = data[i]; + } + ext->ptr = data; + } + + trans.set_dmi_allowed( true ); + trans.set_response_status( tlm::TLM_OK_RESPONSE ); + } + + unsigned char* data; // 32 bytes +}; + + +SC_MODULE(Top) +{ + Initiator *initiator; + Interconnect *interconnect; + Target *target; + + SC_CTOR(Top) + { + // Instantiate components + initiator = new Initiator ("initiator"); + interconnect = new Interconnect("interconnect"); + target = new Target ("target"); + + // One initiator is bound directly to one target with no intervening bus + + // Bind initiator socket to target socket + initiator ->socket .bind( interconnect->targ_socket ); + interconnect ->init_socket.bind( target ->socket ); + } +}; + + +int sc_main(int argc, char* argv[]) +{ + cout << "Unit test for update_original_from(). Should remain silent\n"; + + Top top("top"); + sc_start(); + return 0; +} + -- 2.30.2